Sample records for additional hardware requirements

  1. Hardware

    NASA Technical Reports Server (NTRS)

    1999-01-01

    The full complement of EDOMP investigations called for a broad spectrum of flight hardware ranging from commercial items, modified for spaceflight, to custom designed hardware made to meet the unique requirements of testing in the space environment. In addition, baseline data collection before and after spaceflight required numerous items of ground-based hardware. Two basic categories of ground-based hardware were used in EDOMP testing before and after flight: (1) hardware used for medical baseline testing and analysis, and (2) flight-like hardware used both for astronaut training and medical testing. To ensure post-landing data collection, hardware was required at both the Kennedy Space Center (KSC) and the Dryden Flight Research Center (DFRC) landing sites. Items that were very large or sensitive to the rigors of shipping were housed permanently at the landing site test facilities. Therefore, multiple sets of hardware were required to adequately support the prime and backup landing sites plus the Johnson Space Center (JSC) laboratories. Development of flight hardware was a major element of the EDOMP. The challenges included obtaining or developing equipment that met the following criteria: (1) compact (small size and light weight), (2) battery-operated or requiring minimal spacecraft power, (3) sturdy enough to survive the rigors of spaceflight, (4) quiet enough to pass acoustics limitations, (5) shielded and filtered adequately to assure electromagnetic compatibility with spacecraft systems, (6) user-friendly in a microgravity environment, and (7) accurate and efficient operation to meet medical investigative requirements.

  2. Loads and Structural Dynamics Requirements for Spaceflight Hardware

    NASA Technical Reports Server (NTRS)

    Schultz, Kenneth P.

    2011-01-01

    The purpose of this document is to establish requirements relating to the loads and structural dynamics technical discipline for NASA and commercial spaceflight launch vehicle and spacecraft hardware. Requirements are defined for the development of structural design loads and recommendations regarding methodologies and practices for the conduct of load analyses are provided. As such, this document represents an implementation of NASA STD-5002. Requirements are also defined for structural mathematical model development and verification to ensure sufficient accuracy of predicted responses. Finally, requirements for model/data delivery and exchange are specified to facilitate interactions between Launch Vehicle Providers (LVPs), Spacecraft Providers (SCPs), and the NASA Technical Authority (TA) providing insight/oversight and serving in the Independent Verification and Validation role. In addition to the analysis-related requirements described above, a set of requirements are established concerning coupling phenomena or other interaction between structural dynamics and aerodynamic environments or control or propulsion system elements. Such requirements may reasonably be considered structure or control system design criteria, since good engineering practice dictates consideration of and/or elimination of the identified conditions in the development of those subsystems. The requirements are included here, however, to ensure that such considerations are captured in the design space for launch vehicles (LV), spacecraft (SC) and the Launch Abort Vehicle (LAV). The requirements in this document are focused on analyses to be performed to develop data needed to support structural verification. As described in JSC 65828, Structural Design Requirements and Factors of Safety for Spaceflight Hardware, implementation of the structural verification requirements is expected to be described in a Structural Verification Plan (SVP), which should describe the verification of each

  3. Flight Hardware Packaging Design for Stringent EMC Radiated Emission Requirements

    NASA Technical Reports Server (NTRS)

    Lortz, Charlene L.; Huang, Chi-Chien N.; Ravich, Joshua A.; Steiner, Carl N.

    2013-01-01

    This packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.

  4. Initial SVS Integrated Technology Evaluation Flight Test Requirements and Hardware Architecture

    NASA Technical Reports Server (NTRS)

    Harrison, Stella V.; Kramer, Lynda J.; Bailey, Randall E.; Jones, Denise R.; Young, Steven D.; Harrah, Steven D.; Arthur, Jarvis J.; Parrish, Russell V.

    2003-01-01

    This document presents the flight test requirements for the Initial Synthetic Vision Systems Integrated Technology Evaluation flight Test to be flown aboard NASA Langley's ARIES aircraft and the final hardware architecture implemented to meet these requirements. Part I of this document contains the hardware, software, simulator, and flight operations requirements for this light test as they were defined in August 2002. The contents of this section are the actual requirements document that was signed for this flight test. Part II of this document contains information pertaining to the hardware architecture that was realized to meet these requirements as presented to and approved by a Critical Design Review Panel prior to installation on the B-757 Airborne Research Integrated Experiments Systems (ARIES) airplane. This information includes a description of the equipment, block diagrams of the architecture, layouts of the workstations, and pictures of the actual installations.

  5. Fastener Retention Requirements and Practices in Spaceflight Hardware

    NASA Technical Reports Server (NTRS)

    Dasgupta, Rajib

    2004-01-01

    This presentation reviews the requirements for safety critical fasteners in spaceflight hardware. Included in the presentation are design guidelines and information for Locking Helicoils, key locked inserts and thinwalled inserts, self locking screws and bolts. locknuts, and a locking adhesives, Loctite and Vibratite.

  6. Requirements analysis for a hardware, discrete-event, simulation engine accelerator

    NASA Astrophysics Data System (ADS)

    Taylor, Paul J., Jr.

    1991-12-01

    An analysis of a general Discrete Event Simulation (DES), executing on the distributed architecture of an eight mode Intel PSC/2 hypercube, was performed. The most time consuming portions of the general DES algorithm were determined to be the functions associated with message passing of required simulation data between processing nodes of the hypercube architecture. A behavioral description, using the IEEE standard VHSIC Hardware Description and Design Language (VHDL), for a general DES hardware accelerator is presented. The behavioral description specifies the operational requirements for a DES coprocessor to augment the hypercube's execution of DES simulations. The DES coprocessor design implements the functions necessary to perform distributed discrete event simulations using a conservative time synchronization protocol.

  7. Hardware Development Process for Human Research Facility Applications

    NASA Technical Reports Server (NTRS)

    Bauer, Liz

    2000-01-01

    well as modifications needed to meet program requirements. Options are consolidated and the hardware development team reaches a hardware development decision point. Within budget and schedule constraints, the team must decide whether or not to complete the hardware as an in-house, subcontract with vendor, or commercial-off-the-shelf (COTS) development. An in-house development indicates NASA personnel or a contractor builds the hardware at a NASA site. A subcontract development is completed off-site by a commercial company. A COTS item is a vendor product available by ordering a specific part number. The team evaluates the pros and cons of each development path. For example, in-bouse developments utilize existing corporate knowledge regarding bow to build equipment for use in space. However, technical expertise would be required to fully understand the medical equipment capabilities, such as for an ultrasound system. It may require additional time and funding to gain the expertise that commercially exists. The major benefit of subcontracting a hardware development is the product is delivered as an end-item and commercial expertise is utilized. On the other hand, NASA has limited control over schedule delays. The final option of COTS or modified COTS equipment is a compromise between in-house and subcontracts. A vendor product may exist that meets all functional requirements but req uires in-house modifications for successful operation in a space environment. The HRF utilizes equipment developed using all of the paths described: inhouse, subcontract, and modified COTS.

  8. Space Telecommunications Radio Systems (STRS) Hardware Architecture Standard: Release 1.0 Hardware Section

    NASA Technical Reports Server (NTRS)

    Reinhart, Richard C.; Kacpura, Thomas J.; Smith, Carl R.; Liebetreu, John; Hill, Gary; Mortensen, Dale J.; Andro, Monty; Scardelletti, Maximilian C.; Farrington, Allen

    2008-01-01

    This report defines a hardware architecture approach for software-defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general-purpose processors, digital signal processors, field programmable gate arrays, and application-specific integrated circuits (ASICs) in addition to flexible and tunable radiofrequency front ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that compose a typical communication radio. This report describes the architecture details, the module definitions, the typical functions on each module, and the module interfaces. Tradeoffs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify a physical implementation internally on each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

  9. Speed challenge: a case for hardware implementation in soft-computing

    NASA Technical Reports Server (NTRS)

    Daud, T.; Stoica, A.; Duong, T.; Keymeulen, D.; Zebulum, R.; Thomas, T.; Thakoor, A.

    2000-01-01

    For over a decade, JPL has been actively involved in soft computing research on theory, architecture, applications, and electronics hardware. The driving force in all our research activities, in addition to the potential enabling technology promise, has been creation of a niche that imparts orders of magnitude speed advantage by implementation in parallel processing hardware with algorithms made especially suitable for hardware implementation. We review our work on neural networks, fuzzy logic, and evolvable hardware with selected application examples requiring real time response capabilities.

  10. Exercise Countermeasure Hardware Evolution on ISS: The First Decade.

    PubMed

    Korth, Deborah W

    2015-12-01

    The hardware systems necessary to support exercise countermeasures to the deconditioning associated with microgravity exposure have evolved and improved significantly during the first decade of the International Space Station (ISS), resulting in both new types of hardware and enhanced performance capabilities for initial hardware items. The original suite of countermeasure hardware supported the first crews to arrive on the ISS and the improved countermeasure system delivered in later missions continues to serve the astronauts today with increased efficacy. Due to aggressive hardware development schedules and constrained budgets, the initial approach was to identify existing spaceflight-certified exercise countermeasure equipment, when available, and modify it for use on the ISS. Program management encouraged the use of commercial-off-the-shelf (COTS) hardware, or hardware previously developed (heritage hardware) for the Space Shuttle Program. However, in many cases the resultant hardware did not meet the additional requirements necessary to support crew health maintenance during long-duration missions (3 to 12 mo) and anticipated future utilization activities in support of biomedical research. Hardware development was further complicated by performance requirements that were not fully defined at the outset and tended to evolve over the course of design and fabrication. Modifications, ranging from simple to extensive, were necessary to meet these evolving requirements in each case where heritage hardware was proposed. Heritage hardware was anticipated to be inherently reliable without the need for extensive ground testing, due to its prior positive history during operational spaceflight utilization. As a result, developmental budgets were typically insufficient and schedules were too constrained to permit long-term evaluation of dedicated ground-test units ("fleet leader" type testing) to identify reliability issues when applied to long-duration use. In most cases

  11. Modular hardware synthesis using an HDL. [Hardware Description Language

    NASA Technical Reports Server (NTRS)

    Covington, J. A.; Shiva, S. G.

    1981-01-01

    Although hardware description languages (HDL) are becoming more and more necessary to automated design systems, their application is complicated due to the difficulty in translating the HDL description into an implementable format, nonfamiliarity of hardware designers with high-level language programming, nonuniform design methodologies and the time and costs involved in transfering HDL design software. Digital design language (DDL) suffers from all of the above problems and in addition can only by synthesized on a complete system and not on its subparts, making it unsuitable for synthesis using standard modules or prefabricated chips such as those required in LSI or VLSI circuits. The present paper presents a method by which the DDL translator can be made to generate modular equations that will allow the system to be synthesized as an interconnection of lower-level modules. The method involves the introduction of a new language construct called a Module which provides for the separate translation of all equations bounded by it.

  12. Final postflight hardware evaluation report RSRM-32 (STS-57)

    NASA Technical Reports Server (NTRS)

    Nielson, Greg

    1993-01-01

    This document is the final report for the postflight assessment of the RSRM-32 (STS-57) flight set. This report presents the disassembly evaluations performed at the Thiokol facilities in Utah and is a continuation of the evaluations performed at KSC (TWR-64239). The PEEP for this assessment is outlined in TWR-50051, Revision B. The PEEP defines the requirements for evaluating RSRM hardware. Special hardware issues pertaining to this flight set requiring additional or modified assessment are outlined in TWR-64237. All observed hardware conditions were documented on PFOR's which are included in Appendix A. Observations were compared against limits defined in the PEEP. Any observation that was categorized as reportable or had no defined limits was documented on a preliminary PFAR by the assessment engineers. Preliminary PFAR's were reviewed by the Thiokol SPAT Executive Board to determine if elevation to PFAR's was required.

  13. Targeting multiple heterogeneous hardware platforms with OpenCL

    NASA Astrophysics Data System (ADS)

    Fox, Paul A.; Kozacik, Stephen T.; Humphrey, John R.; Paolini, Aaron; Kuller, Aryeh; Kelmelis, Eric J.

    2014-06-01

    The OpenCL API allows for the abstract expression of parallel, heterogeneous computing, but hardware implementations have substantial implementation differences. The abstractions provided by the OpenCL API are often insufficiently high-level to conceal differences in hardware architecture. Additionally, implementations often do not take advantage of potential performance gains from certain features due to hardware limitations and other factors. These factors make it challenging to produce code that is portable in practice, resulting in much OpenCL code being duplicated for each hardware platform being targeted. This duplication of effort offsets the principal advantage of OpenCL: portability. The use of certain coding practices can mitigate this problem, allowing a common code base to be adapted to perform well across a wide range of hardware platforms. To this end, we explore some general practices for producing performant code that are effective across platforms. Additionally, we explore some ways of modularizing code to enable optional optimizations that take advantage of hardware-specific characteristics. The minimum requirement for portability implies avoiding the use of OpenCL features that are optional, not widely implemented, poorly implemented, or missing in major implementations. Exposing multiple levels of parallelism allows hardware to take advantage of the types of parallelism it supports, from the task level down to explicit vector operations. Static optimizations and branch elimination in device code help the platform compiler to effectively optimize programs. Modularization of some code is important to allow operations to be chosen for performance on target hardware. Optional subroutines exploiting explicit memory locality allow for different memory hierarchies to be exploited for maximum performance. The C preprocessor and JIT compilation using the OpenCL runtime can be used to enable some of these techniques, as well as to factor in hardware

  14. Extravehicular activity training and hardware design consideration

    NASA Technical Reports Server (NTRS)

    Thuot, P. J.; Harbaugh, G. J.

    1995-01-01

    Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

  15. Extravehicular activity training and hardware design consideration.

    PubMed

    Thuot, P J; Harbaugh, G J

    1995-07-01

    Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

  16. Hardware and Software Integration to Support Real-Time Space Link Emulation

    NASA Technical Reports Server (NTRS)

    Murawski, Robert; Bhasin, Kul; Bittner, David; Sweet, Aaron; Coulter, Rachel; Schwab, Devin

    2012-01-01

    Prior to operational use, communications hardware and software must be thoroughly tested and verified. In space-link communications, field testing equipment can be prohibitively expensive and cannot test to non-ideal situations. In this paper, we show how software and hardware emulation tools can be used to accurately model the characteristics of a satellite communication channel in a lab environment. We describe some of the challenges associated with developing an emulation lab and present results to demonstrate the channel modeling. We then show how network emulation software can be used to extend a hardware emulation model without requiring additional network and channel simulation hardware.

  17. Hardware and Software Integration to Support Real-Time Space-Link Emulation

    NASA Technical Reports Server (NTRS)

    Murawski, Robert; Bhasin, Kul; Bittner, David

    2012-01-01

    Prior to operational use, communications hardware and software must be thoroughly tested and verified. In space-link communications, field testing equipment can be prohibitively expensive and cannot test to non-ideal situations. In this paper, we show how software and hardware emulation tools can be used to accurately model the characteristics of a satellite communication channel in a lab environment. We describe some of the challenges associated with developing an emulation lab and present results to demonstrate the channel modeling. We then show how network emulation software can be used to extend a hardware emulation model without requiring additional network and channel simulation hardware.

  18. Verifying Dissolution Of Wax From Hardware Surfaces

    NASA Technical Reports Server (NTRS)

    Montoya, Benjamina G.

    1995-01-01

    Wax removed by cleaning solvent revealed by cooling solution with liquid nitrogen. Such improved procedure and test needed in case of hardware that must be protected by wax during machining or plating but required to be free of wax during subsequent use. Improved cleaning procedure and test take less than 5 minutes. Does not require special skill or equipment and performs at cleaning site. In addition, enables recovery of all cleaning solvent.

  19. Finite Element Simulation and Additive Manufacturing of Stiffness-Matched NiTi Fixation Hardware for Mandibular Reconstruction Surgery

    PubMed Central

    Jahadakbar, Ahmadreza; Shayesteh Moghaddam, Narges; Amerinatanzi, Amirhesam; Dean, David; Karaca, Haluk E.; Elahinia, Mohammad

    2016-01-01

    Process parameters and post-processing heat treatment techniques have been developed to produce both shape memory and superelastic NiTi using Additive Manufacturing. By introducing engineered porosity, the stiffness of NiTi can be tuned to the level closely matching cortical bone. Using additively manufactured porous superelastic NiTi, we have proposed the use of patient-specific, stiffness-matched fixation hardware, for mandible skeletal reconstructive surgery. Currently, Ti-6Al-4V is the most commonly used material for skeletal fixation devices. Although this material offers more than sufficient strength for immobilization during the bone healing process, the high stiffness of Ti-6Al-4V implants can cause stress shielding. In this paper, we present a study of mandibular reconstruction that uses a dry cadaver mandible to validate our geometric and biomechanical design and fabrication (i.e., 3D printing) of NiTi skeletal fixation hardware. Based on the reference-dried mandible, we have developed a Finite Element model to evaluate the performance of the proposed fixation. Our results show a closer-to-normal stress distribution and an enhanced contact pressure at the bone graft interface than would be in the case with Ti-6Al-4V off-the-shelf fixation hardware. The porous fixation plates used in this study were fabricated by selective laser melting. PMID:28952598

  20. Finite Element Simulation and Additive Manufacturing of Stiffness-Matched NiTi Fixation Hardware for Mandibular Reconstruction Surgery.

    PubMed

    Jahadakbar, Ahmadreza; Shayesteh Moghaddam, Narges; Amerinatanzi, Amirhesam; Dean, David; Karaca, Haluk E; Elahinia, Mohammad

    2016-12-19

    Process parameters and post-processing heat treatment techniques have been developed to produce both shape memory and superelastic NiTi using Additive Manufacturing. By introducing engineered porosity, the stiffness of NiTi can be tuned to the level closely matching cortical bone. Using additively manufactured porous superelastic NiTi, we have proposed the use of patient-specific, stiffness-matched fixation hardware, for mandible skeletal reconstructive surgery. Currently, Ti-6Al-4V is the most commonly used material for skeletal fixation devices. Although this material offers more than sufficient strength for immobilization during the bone healing process, the high stiffness of Ti-6Al-4V implants can cause stress shielding. In this paper, we present a study of mandibular reconstruction that uses a dry cadaver mandible to validate our geometric and biomechanical design and fabrication (i.e., 3D printing) of NiTi skeletal fixation hardware. Based on the reference-dried mandible, we have developed a Finite Element model to evaluate the performance of the proposed fixation. Our results show a closer-to-normal stress distribution and an enhanced contact pressure at the bone graft interface than would be in the case with Ti-6Al-4V off-the-shelf fixation hardware. The porous fixation plates used in this study were fabricated by selective laser melting.

  1. 16 CFR 1508.6 - Hardware.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... eliminates from any hardware accessible to a child within the crib the possibility of the hardware's... foreseeable damage or abuse. (b) Locking or latching devices used to secure dropside rails shall require a...

  2. 16 CFR 1508.6 - Hardware.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... eliminates from any hardware accessible to a child within the crib the possibility of the hardware's... foreseeable damage or abuse. (b) Locking or latching devices used to secure dropside rails shall require a...

  3. Satellite Communication Hardware Emulation System (SCHES)

    NASA Technical Reports Server (NTRS)

    Kaplan, Ted

    1993-01-01

    Satellite Communication Hardware Emulator System (SCHES) is a powerful simulator that emulates the hardware used in TDRSS links. SCHES is a true bit-by-bit simulator that models communications hardware accurately enough to be used as a verification mechanism for actual hardware tests on user spacecraft. As a credit to its modular design, SCHES is easily configurable to model any user satellite communication link, though some development may be required to tailor existing software to user specific hardware.

  4. Electronic processing and control system with programmable hardware

    NASA Technical Reports Server (NTRS)

    Alkalaj, Leon (Inventor); Fang, Wai-Chi (Inventor); Newell, Michael A. (Inventor)

    1998-01-01

    A computer system with reprogrammable hardware allowing dynamically allocating hardware resources for different functions and adaptability for different processors and different operating platforms. All hardware resources are physically partitioned into system-user hardware and application-user hardware depending on the specific operation requirements. A reprogrammable interface preferably interconnects the system-user hardware and application-user hardware.

  5. Hardware implementation of CMAC neural network with reduced storage requirement.

    PubMed

    Ker, J S; Kuo, Y H; Wen, R C; Liu, B D

    1997-01-01

    The cerebellar model articulation controller (CMAC) neural network has the advantages of fast convergence speed and low computation complexity. However, it suffers from a low storage space utilization rate on weight memory. In this paper, we propose a direct weight address mapping approach, which can reduce the required weight memory size with a utilization rate near 100%. Based on such an address mapping approach, we developed a pipeline architecture to efficiently perform the addressing operations. The proposed direct weight address mapping approach also speeds up the computation for the generation of weight addresses. Besides, a CMAC hardware prototype used for color calibration has been implemented to confirm the proposed approach and architecture.

  6. Environmental Conditions for Space Flight Hardware: A Survey

    NASA Technical Reports Server (NTRS)

    Plante, Jeannette; Lee, Brandon

    2005-01-01

    Interest in generalization of the physical environment experienced by NASA hardware from the natural Earth environment (on the launch pad), man-made environment on Earth (storage acceptance an d qualification testing), the launch environment, and the space environment, is ed to find commonality among our hardware in an effort to reduce cost and complexity. NASA is entering a period of increase in its number of planetary missions and it is important to understand how our qualification requirements will evolve with and track these new environments. Environmental conditions are described for NASA projects in several ways for the different periods of the mission life cycle. At the beginning, the mission manager defines survivability requirements based on the mission length, orbit, launch date, launch vehicle, and other factors . such as the use of reactor engines. Margins are then applied to these values (temperature extremes, vibration extremes, radiation tolerances, etc,) and a new set of conditions is generalized for design requirements. Mission assurance documents will then assign an additional margin for reliability, and a third set of values is provided for during testing. A fourth set of environmental condition values may evolve intermittently from heritage hardware that has been tested to a level beyond the actual mission requirement. These various sets of environment figures can make it quite confusing and difficult to capture common hardware environmental requirements. Environmental requirement information can be found in a wide variety of places. The most obvious is with the individual projects. We can easily get answers to questions about temperature extremes being used and radiation tolerance goals, but it is more difficult to map the answers to the process that created these requirements: for design, for qualification, and for actual environment with no margin applied. Not everyone assigned to a NASA project may have that kind of insight, as many have

  7. Transistor Level Circuit Experiments using Evolvable Hardware

    NASA Technical Reports Server (NTRS)

    Stoica, A.; Zebulum, R. S.; Keymeulen, D.; Ferguson, M. I.; Daud, Taher; Thakoor, A.

    2005-01-01

    The Jet Propulsion Laboratory (JPL) performs research in fault tolerant, long life, and space survivable electronics for the National Aeronautics and Space Administration (NASA). With that focus, JPL has been involved in Evolvable Hardware (EHW) technology research for the past several years. We have advanced the technology not only by simulation and evolution experiments, but also by designing, fabricating, and evolving a variety of transistor-based analog and digital circuits at the chip level. EHW refers to self-configuration of electronic hardware by evolutionary/genetic search mechanisms, thereby maintaining existing functionality in the presence of degradations due to aging, temperature, and radiation. In addition, EHW has the capability to reconfigure itself for new functionality when required for mission changes or encountered opportunities. Evolution experiments are performed using a genetic algorithm running on a DSP as the reconfiguration mechanism and controlling the evolvable hardware mounted on a self-contained circuit board. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The paper illustrates hardware evolution results of electronic circuits and their ability to perform under 230 C temperature as well as radiations of up to 250 kRad.

  8. High-Speed Isolation Board for Flight Hardware Testing

    NASA Technical Reports Server (NTRS)

    Yamamoto, Clifford K.; Goodpasture, Richard L.

    2011-01-01

    There is a need to provide a portable and cost-effective galvanic isolation between ground support equipment and flight hardware such that any unforeseen voltage differential between ground and power supplies is eliminated. An interface board was designed for use between the ground support equipment and the flight hardware that electrically isolates all input and output signals and faithfully reproduces them on each side of the interface. It utilizes highly integrated multi-channel isolating devices to minimize size and reduce assembly time. This single-board solution provides appropriate connector hardware and breakout of required flight signals to individual connectors as needed for various ground support equipment. The board utilizes multi-channel integrated circuits that contain transformer coupling, thereby allowing input and output signals to be isolated from one another while still providing high-fidelity reproduction of the signal up to 90 MHz. The board also takes in a single-voltage power supply input from the ground support equipment and in turn provides a transformer-derived isolated voltage supply to power the portion of the circuitry that is electrically connected to the flight hardware. Prior designs used expensive opto-isolated couplers that were required for each signal to isolate and were time-consuming to assemble. In addition, these earlier designs were bulky and required a 2U rack-mount enclosure. The new design is smaller than a piece of 8.5 11-in. (.22 28-mm) paper and can be easily hand-carried where needed. The flight hardware in question is based on a lineage of existing software-defined radios (SDRs) that utilize a common interface connector with many similar input-output signals present. There are currently four to five variations of this SDR, and more upcoming versions are planned based on the more recent design.

  9. Hardware development process for Human Research facility applications

    NASA Astrophysics Data System (ADS)

    Bauer, Liz

    2000-01-01

    The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. .

  10. Energy efficient engine low-pressure compressor component test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Michael, C. J.; Halle, J. E.

    1981-01-01

    The aerodynamic and mechanical design description of the low pressure compressor component of the Energy Efficient Engine were used. The component was designed to meet the requirements of the Flight Propulsion System while maintaining a low cost approach in providing a low pressure compressor design for the Integrated Core/Low Spool test required in the Energy Efficient Engine Program. The resulting low pressure compressor component design meets or exceeds all design goals with the exception of surge margin. In addition, the expense of hardware fabrication for the Integrated Core/Low Spool test has been minimized through the use of existing minor part hardware.

  11. Hardware architecture design of image restoration based on time-frequency domain computation

    NASA Astrophysics Data System (ADS)

    Wen, Bo; Zhang, Jing; Jiao, Zipeng

    2013-10-01

    The image restoration algorithms based on time-frequency domain computation is high maturity and applied widely in engineering. To solve the high-speed implementation of these algorithms, the TFDC hardware architecture is proposed. Firstly, the main module is designed, by analyzing the common processing and numerical calculation. Then, to improve the commonality, the iteration control module is planed for iterative algorithms. In addition, to reduce the computational cost and memory requirements, the necessary optimizations are suggested for the time-consuming module, which include two-dimensional FFT/IFFT and the plural calculation. Eventually, the TFDC hardware architecture is adopted for hardware design of real-time image restoration system. The result proves that, the TFDC hardware architecture and its optimizations can be applied to image restoration algorithms based on TFDC, with good algorithm commonality, hardware realizability and high efficiency.

  12. Open-source hardware for medical devices.

    PubMed

    Niezen, Gerrit; Eslambolchilar, Parisa; Thimbleby, Harold

    2016-04-01

    Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device.

  13. A hardware implementation of the discrete Pascal transform for image processing

    NASA Astrophysics Data System (ADS)

    Goodman, Thomas J.; Aburdene, Maurice F.

    2006-02-01

    The discrete Pascal transform is a polynomial transform with applications in pattern recognition, digital filtering, and digital image processing. It already has been shown that the Pascal transform matrix can be decomposed into a product of binary matrices. Such a factorization leads to a fast and efficient hardware implementation without the use of multipliers, which consume large amounts of hardware. We recently developed a field-programmable gate array (FPGA) implementation to compute the Pascal transform. Our goal was to demonstrate the computational efficiency of the transform while keeping hardware requirements at a minimum. Images are uploaded into memory from a remote computer prior to processing, and the transform coefficients can be offloaded from the FPGA board for analysis. Design techniques like as-soon-as-possible scheduling and adder sharing allowed us to develop a fast and efficient system. An eight-point, one-dimensional transform completes in 13 clock cycles and requires only four adders. An 8x8 two-dimensional transform completes in 240 cycles and requires only a top-level controller in addition to the one-dimensional transform hardware. Finally, through minor modifications to the controller, the transform operations can be pipelined to achieve 100% utilization of the four adders, allowing one eight-point transform to complete every seven clock cycles.

  14. Open-source hardware for medical devices

    PubMed Central

    2016-01-01

    Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device. PMID:27158528

  15. A Common Approach for the Certifying of International Space Station (ISS) Basic Hardware for Ground Safety

    NASA Technical Reports Server (NTRS)

    Kirkpatrick, Paul D.; Trinchero, Jean-Pierre

    2005-01-01

    In order to support the International Space Station, as well as any future long term human missions, vast amounts of logistical-type hardware is required to be processed through the various launch sites. This category consists of such hardware as spare parts, replacement items, and upgraded hardware. The category also includes samples for experiments and consumables. One attribute that all these items have is they are generally non-hazardous, at least to ground personnel. Even though the items are non-hazardous, launch site ground safety has a responsibility for the protection of personnel, the flight hardware, and launch site resources. In order to fulfill this responsibility, the safety organization must have knowledge of the hardware and its operations. Conversely, the hardware providers are entitled to a process that is commensurate with the hazard. Additionally, a common system should be in place that is flexible enough to account for the requirements at all launch sites, so that, the hardware provider need only complete one process for ground safety regardless of the launch site.

  16. Exascale Hardware Architectures Working Group

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Hemmert, S; Ang, J; Chiang, P

    2011-03-15

    The ASC Exascale Hardware Architecture working group is challenged to provide input on the following areas impacting the future use and usability of potential exascale computer systems: processor, memory, and interconnect architectures, as well as the power and resilience of these systems. Going forward, there are many challenging issues that will need to be addressed. First, power constraints in processor technologies will lead to steady increases in parallelism within a socket. Additionally, all cores may not be fully independent nor fully general purpose. Second, there is a clear trend toward less balanced machines, in terms of compute capability compared tomore » memory and interconnect performance. In order to mitigate the memory issues, memory technologies will introduce 3D stacking, eventually moving on-socket and likely on-die, providing greatly increased bandwidth but unfortunately also likely providing smaller memory capacity per core. Off-socket memory, possibly in the form of non-volatile memory, will create a complex memory hierarchy. Third, communication energy will dominate the energy required to compute, such that interconnect power and bandwidth will have a significant impact. All of the above changes are driven by the need for greatly increased energy efficiency, as current technology will prove unsuitable for exascale, due to unsustainable power requirements of such a system. These changes will have the most significant impact on programming models and algorithms, but they will be felt across all layers of the machine. There is clear need to engage all ASC working groups in planning for how to deal with technological changes of this magnitude. The primary function of the Hardware Architecture Working Group is to facilitate codesign with hardware vendors to ensure future exascale platforms are capable of efficiently supporting the ASC applications, which in turn need to meet the mission needs of the NNSA Stockpile Stewardship Program. This issue

  17. Efficient Hardware Implementation of the Lightweight Block Encryption Algorithm LEA

    PubMed Central

    Lee, Donggeon; Kim, Dong-Chan; Kwon, Daesung; Kim, Howon

    2014-01-01

    Recently, due to the advent of resource-constrained trends, such as smartphones and smart devices, the computing environment is changing. Because our daily life is deeply intertwined with ubiquitous networks, the importance of security is growing. A lightweight encryption algorithm is essential for secure communication between these kinds of resource-constrained devices, and many researchers have been investigating this field. Recently, a lightweight block cipher called LEA was proposed. LEA was originally targeted for efficient implementation on microprocessors, as it is fast when implemented in software and furthermore, it has a small memory footprint. To reflect on recent technology, all required calculations utilize 32-bit wide operations. In addition, the algorithm is comprised of not complex S-Box-like structures but simple Addition, Rotation, and XOR operations. To the best of our knowledge, this paper is the first report on a comprehensive hardware implementation of LEA. We present various hardware structures and their implementation results according to key sizes. Even though LEA was originally targeted at software efficiency, it also shows high efficiency when implemented as hardware. PMID:24406859

  18. Hardware and software reliability estimation using simulations

    NASA Technical Reports Server (NTRS)

    Swern, Frederic L.

    1994-01-01

    The simulation technique is used to explore the validation of both hardware and software. It was concluded that simulation is a viable means for validating both hardware and software and associating a reliability number with each. This is useful in determining the overall probability of system failure of an embedded processor unit, and improving both the code and the hardware where necessary to meet reliability requirements. The methodologies were proved using some simple programs, and simple hardware models.

  19. A Framework for Assessing the Reusability of Hardware (Reusable Rocket Engines)

    NASA Technical Reports Server (NTRS)

    Childress-Thompson, Rhonda; Farrington, Philip; Thomas, Dale

    2016-01-01

    Within the space flight community, reusability has taken center stage as the new buzzword. In order for reusable hardware to be competitive with its expendable counterpart, two major elements must be closely scrutinized. First, recovery and refurbishment costs must be lower than the development and acquisition costs. Additionally, the reliability for reused hardware must remain the same (or nearly the same) as "first use" hardware. Therefore, it is imperative that a systematic approach be established to enhance the development of reusable systems. However, before the decision can be made on whether it is more beneficial to reuse hardware or to replace it, the parameters that are needed to deem hardware worthy of reuse must be identified. For reusable hardware to be successful, the factors that must be considered are reliability (integrity, life, number of uses), operability (maintenance, accessibility), and cost (procurement, retrieval, refurbishment). These three factors are essential to the successful implementation of reusability while enabling the ability to meet performance goals. Past and present strategies and attempts at reuse within the space industry will be examined to identify important attributes of reusability that can be used to evaluate hardware when contemplating reusable versus expendable options. This paper will examine why reuse must be stated as an initial requirement rather than included as an afterthought in the final design. Late in the process, changes in the overall objective/purpose of components typically have adverse effects that potentially negate the benefits. A methodology for assessing the viability of reusing hardware will be presented by using the Space Shuttle Main Engine (SSME) to validate the approach. Because reliability, operability, and costs are key drivers in making this critical decision, they will be used to assess requirements for reuse as applied to components of the SSME.

  20. Structural Design Requirements and Factors of Safety for Spaceflight Hardware: For Human Spaceflight. Revision A

    NASA Technical Reports Server (NTRS)

    Bernstein, Karen S.; Kujala, Rod; Fogt, Vince; Romine, Paul

    2011-01-01

    This document establishes the structural requirements for human-rated spaceflight hardware including launch vehicles, spacecraft and payloads. These requirements are applicable to Government Furnished Equipment activities as well as all related contractor, subcontractor and commercial efforts. These requirements are not imposed on systems other than human-rated spacecraft, such as ground test articles, but may be tailored for use in specific cases where it is prudent to do so such as for personnel safety or when assets are at risk. The requirements in this document are focused on design rather than verification. Implementation of the requirements is expected to be described in a Structural Verification Plan (SVP), which should describe the verification of each structural item for the applicable requirements. The SVP may also document unique verifications that meet or exceed these requirements with NASA Technical Authority approval.

  1. 10 CFR 20.2302 - Additional requirements.

    Code of Federal Regulations, 2012 CFR

    2012-01-01

    ... 10 Energy 1 2012-01-01 2012-01-01 false Additional requirements. 20.2302 Section 20.2302 Energy NUCLEAR REGULATORY COMMISSION STANDARDS FOR PROTECTION AGAINST RADIATION Exemptions and Additional Requirements § 20.2302 Additional requirements. The Commission may, by rule, regulation, or order, impose...

  2. 10 CFR 20.2302 - Additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 10 Energy 1 2014-01-01 2014-01-01 false Additional requirements. 20.2302 Section 20.2302 Energy NUCLEAR REGULATORY COMMISSION STANDARDS FOR PROTECTION AGAINST RADIATION Exemptions and Additional Requirements § 20.2302 Additional requirements. The Commission may, by rule, regulation, or order, impose...

  3. 10 CFR 20.2302 - Additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 10 Energy 1 2010-01-01 2010-01-01 false Additional requirements. 20.2302 Section 20.2302 Energy NUCLEAR REGULATORY COMMISSION STANDARDS FOR PROTECTION AGAINST RADIATION Exemptions and Additional Requirements § 20.2302 Additional requirements. The Commission may, by rule, regulation, or order, impose...

  4. 49 CFR 238.105 - Train electronic hardware and software safety.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Train electronic hardware and software safety. 238... and General Requirements § 238.105 Train electronic hardware and software safety. The requirements of this section apply to electronic hardware and software used to control or monitor safety functions in...

  5. 49 CFR 238.105 - Train electronic hardware and software safety.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Train electronic hardware and software safety. 238... and General Requirements § 238.105 Train electronic hardware and software safety. The requirements of this section apply to electronic hardware and software used to control or monitor safety functions in...

  6. 49 CFR 238.105 - Train electronic hardware and software safety.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Train electronic hardware and software safety. 238... and General Requirements § 238.105 Train electronic hardware and software safety. The requirements of this section apply to electronic hardware and software used to control or monitor safety functions in...

  7. 49 CFR 238.105 - Train electronic hardware and software safety.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 49 Transportation 4 2013-10-01 2013-10-01 false Train electronic hardware and software safety. 238... and General Requirements § 238.105 Train electronic hardware and software safety. The requirements of this section apply to electronic hardware and software used to control or monitor safety functions in...

  8. Evaluation of methods for determining hardware projected life

    NASA Technical Reports Server (NTRS)

    1971-01-01

    An investigation of existing methods of predicting hardware life is summarized by reviewing programs having long life requirements, current research efforts on long life problems, and technical papers reporting work on life predicting techniques. The results indicate that there are no accurate quantitative means to predict hardware life for system level hardware. The effectiveness of test programs and the cause of hardware failures is considered.

  9. 10 CFR 55.7 - Additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 10 Energy 2 2014-01-01 2014-01-01 false Additional requirements. 55.7 Section 55.7 Energy NUCLEAR REGULATORY COMMISSION (CONTINUED) OPERATORS' LICENSES General Provisions § 55.7 Additional requirements. The Commission may, by rule, regulation, or order, impose upon any licensee such requirements, in addition to...

  10. 10 CFR 55.7 - Additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 10 Energy 2 2010-01-01 2010-01-01 false Additional requirements. 55.7 Section 55.7 Energy NUCLEAR REGULATORY COMMISSION (CONTINUED) OPERATORS' LICENSES General Provisions § 55.7 Additional requirements. The Commission may, by rule, regulation, or order, impose upon any licensee such requirements, in addition to...

  11. Hardware Architecture Study for NASA's Space Software Defined Radios

    NASA Technical Reports Server (NTRS)

    Reinhart, Richard C.; Scardelletti, Maximilian C.; Mortensen, Dale J.; Kacpura, Thomas J.; Andro, Monty; Smith, Carl; Liebetreu, John

    2008-01-01

    This study defines a hardware architecture approach for software defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general purpose processors, digital signal processors, field programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) in addition to flexible and tunable radio frequency (RF) front-ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and and interfaces. The modules are a logical division of common radio functions that comprise a typical communication radio. This paper describes the architecture details, module definitions, and the typical functions on each module as well as the module interfaces. Trade-offs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify the internal physical implementation within each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

  12. System-level protection and hardware Trojan detection using weighted voting.

    PubMed

    Amin, Hany A M; Alkabani, Yousra; Selim, Gamal M I

    2014-07-01

    The problem of hardware Trojans is becoming more serious especially with the widespread of fabless design houses and design reuse. Hardware Trojans can be embedded on chip during manufacturing or in third party intellectual property cores (IPs) during the design process. Recent research is performed to detect Trojans embedded at manufacturing time by comparing the suspected chip with a golden chip that is fully trusted. However, Trojan detection in third party IP cores is more challenging than other logic modules especially that there is no golden chip. This paper proposes a new methodology to detect/prevent hardware Trojans in third party IP cores. The method works by gradually building trust in suspected IP cores by comparing the outputs of different untrusted implementations of the same IP core. Simulation results show that our method achieves higher probability of Trojan detection over a naive implementation of simple voting on the output of different IP cores. In addition, experimental results show that the proposed method requires less hardware overhead when compared with a simple voting technique achieving the same degree of security.

  13. A Modular Framework for Modeling Hardware Elements in Distributed Engine Control Systems

    NASA Technical Reports Server (NTRS)

    Zinnecker, Alicia M.; Culley, Dennis E.; Aretskin-Hariton, Eliot D.

    2014-01-01

    Progress toward the implementation of distributed engine control in an aerospace application may be accelerated through the development of a hardware-in-the-loop (HIL) system for testing new control architectures and hardware outside of a physical test cell environment. One component required in an HIL simulation system is a high-fidelity model of the control platform: sensors, actuators, and the control law. The control system developed for the Commercial Modular Aero-Propulsion System Simulation 40k (C-MAPSS40k) provides a verifiable baseline for development of a model for simulating a distributed control architecture. This distributed controller model will contain enhanced hardware models, capturing the dynamics of the transducer and the effects of data processing, and a model of the controller network. A multilevel framework is presented that establishes three sets of interfaces in the control platform: communication with the engine (through sensors and actuators), communication between hardware and controller (over a network), and the physical connections within individual pieces of hardware. This introduces modularity at each level of the model, encouraging collaboration in the development and testing of various control schemes or hardware designs. At the hardware level, this modularity is leveraged through the creation of a Simulink(R) library containing blocks for constructing smart transducer models complying with the IEEE 1451 specification. These hardware models were incorporated in a distributed version of the baseline C-MAPSS40k controller and simulations were run to compare the performance of the two models. The overall tracking ability differed only due to quantization effects in the feedback measurements in the distributed controller. Additionally, it was also found that the added complexity of the smart transducer models did not prevent real-time operation of the distributed controller model, a requirement of an HIL system.

  14. A Modular Framework for Modeling Hardware Elements in Distributed Engine Control Systems

    NASA Technical Reports Server (NTRS)

    Zinnecker, Alicia M.; Culley, Dennis E.; Aretskin-Hariton, Eliot D.

    2015-01-01

    Progress toward the implementation of distributed engine control in an aerospace application may be accelerated through the development of a hardware-in-the-loop (HIL) system for testing new control architectures and hardware outside of a physical test cell environment. One component required in an HIL simulation system is a high-fidelity model of the control platform: sensors, actuators, and the control law. The control system developed for the Commercial Modular Aero-Propulsion System Simulation 40k (C-MAPSS40k) provides a verifiable baseline for development of a model for simulating a distributed control architecture. This distributed controller model will contain enhanced hardware models, capturing the dynamics of the transducer and the effects of data processing, and a model of the controller network. A multilevel framework is presented that establishes three sets of interfaces in the control platform: communication with the engine (through sensors and actuators), communication between hardware and controller (over a network), and the physical connections within individual pieces of hardware. This introduces modularity at each level of the model, encouraging collaboration in the development and testing of various control schemes or hardware designs. At the hardware level, this modularity is leveraged through the creation of a SimulinkR library containing blocks for constructing smart transducer models complying with the IEEE 1451 specification. These hardware models were incorporated in a distributed version of the baseline C-MAPSS40k controller and simulations were run to compare the performance of the two models. The overall tracking ability differed only due to quantization effects in the feedback measurements in the distributed controller. Additionally, it was also found that the added complexity of the smart transducer models did not prevent real-time operation of the distributed controller model, a requirement of an HIL system.

  15. A Modular Framework for Modeling Hardware Elements in Distributed Engine Control Systems

    NASA Technical Reports Server (NTRS)

    Zinnecker, Alicia Mae; Culley, Dennis E.; Aretskin-Hariton, Eliot D.

    2014-01-01

    Progress toward the implementation of distributed engine control in an aerospace application may be accelerated through the development of a hardware-in-the-loop (HIL) system for testing new control architectures and hardware outside of a physical test cell environment. One component required in an HIL simulation system is a high-fidelity model of the control platform: sensors, actuators, and the control law. The control system developed for the Commercial Modular Aero-Propulsion System Simulation 40k (40,000 pound force thrust) (C-MAPSS40k) provides a verifiable baseline for development of a model for simulating a distributed control architecture. This distributed controller model will contain enhanced hardware models, capturing the dynamics of the transducer and the effects of data processing, and a model of the controller network. A multilevel framework is presented that establishes three sets of interfaces in the control platform: communication with the engine (through sensors and actuators), communication between hardware and controller (over a network), and the physical connections within individual pieces of hardware. This introduces modularity at each level of the model, encouraging collaboration in the development and testing of various control schemes or hardware designs. At the hardware level, this modularity is leveraged through the creation of a Simulink (R) library containing blocks for constructing smart transducer models complying with the IEEE 1451 specification. These hardware models were incorporated in a distributed version of the baseline C-MAPSS40k controller and simulations were run to compare the performance of the two models. The overall tracking ability differed only due to quantization effects in the feedback measurements in the distributed controller. Additionally, it was also found that the added complexity of the smart transducer models did not prevent real-time operation of the distributed controller model, a requirement of an HIL

  16. Detailed requirements document for Stowage List and Hardware Tracking System (SLAHTS). [computer based information management system in support of space shuttle orbiter stowage configuration

    NASA Technical Reports Server (NTRS)

    Keltner, D. J.

    1975-01-01

    The stowage list and hardware tracking system, a computer based information management system, used in support of the space shuttle orbiter stowage configuration and the Johnson Space Center hardware tracking is described. The input, processing, and output requirements that serve as a baseline for system development are defined.

  17. Final postflight hardware evaluation report RSRM-28 (STS-53)

    NASA Technical Reports Server (NTRS)

    Starrett, William David, Jr.

    1993-01-01

    The final report for the Clearfield disassembly evaluation and a continuation of the KSC postflight assessment for the RSRM-28 (STS-53) RSRM flight set is presented. All observed hardware conditions were documented on PFOR's and are included in Appendices A through C. Appendices D and E contain the measurements and safety factor data for the nozzle and insulation components. This report, along with the KSC Ten-Day Postflight Hardware Evaluation Report (TWR-64215), represents a summary of the RSRM-28 hardware evaluation. The as-flown hardware configuration is documented in TWR-63638. Disassembly evaluation photograph numbers are logged in TWA-1989. The RSRM-28 flight set disassembly evaluations described were performed at the RSRM Refurbishment Facility in Clearfield, Utah. The final factory joint demate occurred on July 15, 1993. Additional time was required to perform the evaluation of the stiffener rings per special issue 4.1.5.2 because of the washout schedule. The release of this report was after completion of all special issues per program management direction. Detailed evaluations were performed in accordance with the Clearfield PEEP, TWR-50051, Revision A. All observations were compared against limits that are also defined in the PEEP. These limits outline the criteria for categorizing the observations as acceptable, reportable, or critical. Hardware conditions that were unexpected and/or determined to be reportable or critical were evaluated by the applicable team and tracked through the PFAR system.

  18. VEG-01: Veggie Hardware Verification Testing

    NASA Technical Reports Server (NTRS)

    Massa, Gioia; Newsham, Gary; Hummerick, Mary; Morrow, Robert; Wheeler, Raymond

    2013-01-01

    The Veggie plant/vegetable production system is scheduled to fly on ISS at the end of2013. Since much of the technology associated with Veggie has not been previously tested in microgravity, a hardware validation flight was initiated. This test will allow data to be collected about Veggie hardware functionality on ISS, allow crew interactions to be vetted for future improvements, validate the ability of the hardware to grow and sustain plants, and collect data that will be helpful to future Veggie investigators as they develop their payloads. Additionally, food safety data on the lettuce plants grown will be collected to help support the development of a pathway for the crew to safely consume produce grown on orbit. Significant background research has been performed on the Veggie plant growth system, with early tests focusing on the development of the rooting pillow concept, and the selection of fertilizer, rooting medium and plant species. More recent testing has been conducted to integrate the pillow concept into the Veggie hardware and to ensure that adequate water is provided throughout the growth cycle. Seed sanitation protocols have been established for flight, and hardware sanitation between experiments has been studied. Methods for shipping and storage of rooting pillows and the development of crew procedures and crew training videos for plant activities on-orbit have been established. Science verification testing was conducted and lettuce plants were successfully grown in prototype Veggie hardware, microbial samples were taken, plant were harvested, frozen, stored and later analyzed for microbial growth, nutrients, and A TP levels. An additional verification test, prior to the final payload verification testing, is desired to demonstrate similar growth in the flight hardware and also to test a second set of pillows containing zinnia seeds. Issues with root mat water supply are being resolved, with final testing and flight scheduled for later in 2013.

  19. Safe to Fly: Certifying COTS Hardware for Spaceflight

    NASA Technical Reports Server (NTRS)

    Fichuk, Jessica L.

    2011-01-01

    Providing hardware for the astronauts to use on board the Space Shuttle or International Space Station (ISS) involves a certification process that entails evaluating hardware safety, weighing risks, providing mitigation, and verifying requirements. Upon completion of this certification process, the hardware is deemed safe to fly. This process from start to finish can be completed as quickly as 1 week or can take several years in length depending on the complexity of the hardware and whether the item is a unique custom design. One area of cost and schedule savings that NASA implements is buying Commercial Off the Shelf (COTS) hardware and certifying it for human spaceflight as safe to fly. By utilizing commercial hardware, NASA saves time not having to develop, design and build the hardware from scratch, as well as a timesaving in the certification process. By utilizing COTS hardware, the current detailed certification process can be simplified which results in schedule savings. Cost savings is another important benefit of flying COTS hardware. Procuring COTS hardware for space use can be more economical than custom building the hardware. This paper will investigate the cost savings associated with certifying COTS hardware to NASA s standards rather than performing a custom build.

  20. 7 CFR 3015.161 - Additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 7 Agriculture 15 2010-01-01 2010-01-01 false Additional requirements. 3015.161 Section 3015.161 Agriculture Regulations of the Department of Agriculture (Continued) OFFICE OF THE CHIEF FINANCIAL OFFICER, DEPARTMENT OF AGRICULTURE UNIFORM FEDERAL ASSISTANCE REGULATIONS Property § 3015.161 Additional requirements...

  1. An approach to secure weather and climate models against hardware faults

    NASA Astrophysics Data System (ADS)

    Düben, Peter D.; Dawson, Andrew

    2017-03-01

    Enabling Earth System models to run efficiently on future supercomputers is a serious challenge for model development. Many publications study efficient parallelization to allow better scaling of performance on an increasing number of computing cores. However, one of the most alarming threats for weather and climate predictions on future high performance computing architectures is widely ignored: the presence of hardware faults that will frequently hit large applications as we approach exascale supercomputing. Changes in the structure of weather and climate models that would allow them to be resilient against hardware faults are hardly discussed in the model development community. In this paper, we present an approach to secure the dynamical core of weather and climate models against hardware faults using a backup system that stores coarse resolution copies of prognostic variables. Frequent checks of the model fields on the backup grid allow the detection of severe hardware faults, and prognostic variables that are changed by hardware faults on the model grid can be restored from the backup grid to continue model simulations with no significant delay. To justify the approach, we perform model simulations with a C-grid shallow water model in the presence of frequent hardware faults. As long as the backup system is used, simulations do not crash and a high level of model quality can be maintained. The overhead due to the backup system is reasonable and additional storage requirements are small. Runtime is increased by only 13 % for the shallow water model.

  2. An approach to secure weather and climate models against hardware faults

    NASA Astrophysics Data System (ADS)

    Düben, Peter; Dawson, Andrew

    2017-04-01

    Enabling Earth System models to run efficiently on future supercomputers is a serious challenge for model development. Many publications study efficient parallelisation to allow better scaling of performance on an increasing number of computing cores. However, one of the most alarming threats for weather and climate predictions on future high performance computing architectures is widely ignored: the presence of hardware faults that will frequently hit large applications as we approach exascale supercomputing. Changes in the structure of weather and climate models that would allow them to be resilient against hardware faults are hardly discussed in the model development community. We present an approach to secure the dynamical core of weather and climate models against hardware faults using a backup system that stores coarse resolution copies of prognostic variables. Frequent checks of the model fields on the backup grid allow the detection of severe hardware faults, and prognostic variables that are changed by hardware faults on the model grid can be restored from the backup grid to continue model simulations with no significant delay. To justify the approach, we perform simulations with a C-grid shallow water model in the presence of frequent hardware faults. As long as the backup system is used, simulations do not crash and a high level of model quality can be maintained. The overhead due to the backup system is reasonable and additional storage requirements are small. Runtime is increased by only 13% for the shallow water model.

  3. Space Station Freedom biomedical monitoring and countermeasures: Biomedical facility hardware catalog

    NASA Technical Reports Server (NTRS)

    1990-01-01

    This hardware catalog covers that hardware proposed under the Biomedical Monitoring and Countermeasures Development Program supported by the Johnson Space Center. The hardware items are listed separately by item, and are in alphabetical order. Each hardware item specification consists of four pages. The first page describes background information with an illustration, definition and a history/design status. The second page identifies the general specifications, performance, rack interface requirements, problems, issues, concerns, physical description, and functional description. The level of hardware design reliability is also identified under the maintainability and reliability category. The third page specifies the mechanical design guidelines and assumptions. Described are the material types and weights, modules, and construction methods. Also described is an estimation of percentage of construction which utilizes a particular method, and the percentage of required new mechanical design is documented. The fourth page analyzes the electronics, the scope of design effort, and the software requirements. Electronics are described by percentages of component types and new design. The design effort, as well as, the software requirements are identified and categorized.

  4. Parameterized hardware description as object oriented hardware model implementation

    NASA Astrophysics Data System (ADS)

    Drabik, Pawel K.

    2010-09-01

    The paper introduces novel model for design, visualization and management of complex, highly adaptive hardware systems. The model settles component oriented environment for both hardware modules and software application. It is developed on parameterized hardware description research. Establishment of stable link between hardware and software, as a purpose of designed and realized work, is presented. Novel programming framework model for the environment, named Graphic-Functional-Components is presented. The purpose of the paper is to present object oriented hardware modeling with mentioned features. Possible model implementation in FPGA chips and its management by object oriented software in Java is described.

  5. Hardware Simulations of Spacecraft Attitude Synchronization Using Lyapunov-Based Controllers

    NASA Astrophysics Data System (ADS)

    Jung, Juno; Park, Sang-Young; Eun, Youngho; Kim, Sung-Woo; Park, Chandeok

    2018-04-01

    In the near future, space missions with multiple spacecraft are expected to replace traditional missions with a single large spacecraft. These spacecraft formation flying missions generally require precise knowledge of relative position and attitude between neighboring agents. In this study, among the several challenging issues, we focus on the technique to control spacecraft attitude synchronization in formation. We develop a number of nonlinear control schemes based on the Lyapunov stability theorem and considering special situations: full-state feedback control, full-state feedback control with unknown inertia parameters, and output feedback control without angular velocity measurements. All the proposed controllers offer absolute and relative control using reaction wheel assembly for both regulator and tracking problems. In addition to the numerical simulations, an air-bearing-based hardware-in-the-loop (HIL) system is used to verify the proposed control laws in real-time hardware environments. The pointing errors converge to 0.5{°} with numerical simulations and to 2{°} using the HIL system. Consequently, both numerical and hardware simulations confirm the performance of the spacecraft attitude synchronization algorithms developed in this study.

  6. Pre-Hardware Optimization of Spacecraft Image Processing Software Algorithms and Hardware Implementation

    NASA Technical Reports Server (NTRS)

    Kizhner, Semion; Flatley, Thomas P.; Hestnes, Phyllis; Jentoft-Nilsen, Marit; Petrick, David J.; Day, John H. (Technical Monitor)

    2001-01-01

    class of applications with moderate input-output data rates but large intermediate multi-thread data streams has been addressed and mitigated. This opens a new class of satellite image processing applications for bottleneck problems solution using RC technologies. The issue of a science algorithm level of abstraction necessary for RC hardware implementation is also described. Selected Matlab functions already implemented in hardware were investigated for their direct applicability to the GOES-8 application with the intent to create a library of Matlab and IDL RC functions for ongoing work. A complete class of spacecraft image processing applications using embedded re-configurable computing technology to meet real-time requirements, including performance results and comparison with the existing system, is described in this paper.

  7. 42 CFR 417.592 - Additional benefits requirement.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 42 Public Health 3 2010-10-01 2010-10-01 false Additional benefits requirement. 417.592 Section... HEALTH CARE PREPAYMENT PLANS Medicare Payment: Risk Basis § 417.592 Additional benefits requirement. (a... benefits. Provide its Medicare enrollees with additional benefits in accordance with paragraph (c) of this...

  8. Event-driven processing for hardware-efficient neural spike sorting

    NASA Astrophysics Data System (ADS)

    Liu, Yan; Pereira, João L.; Constandinou, Timothy G.

    2018-02-01

    Objective. The prospect of real-time and on-node spike sorting provides a genuine opportunity to push the envelope of large-scale integrated neural recording systems. In such systems the hardware resources, power requirements and data bandwidth increase linearly with channel count. Event-based (or data-driven) processing can provide here a new efficient means for hardware implementation that is completely activity dependant. In this work, we investigate using continuous-time level-crossing sampling for efficient data representation and subsequent spike processing. Approach. (1) We first compare signals (synthetic neural datasets) encoded with this technique against conventional sampling. (2) We then show how such a representation can be directly exploited by extracting simple time domain features from the bitstream to perform neural spike sorting. (3) The proposed method is implemented in a low power FPGA platform to demonstrate its hardware viability. Main results. It is observed that considerably lower data rates are achievable when using 7 bits or less to represent the signals, whilst maintaining the signal fidelity. Results obtained using both MATLAB and reconfigurable logic hardware (FPGA) indicate that feature extraction and spike sorting accuracies can be achieved with comparable or better accuracy than reference methods whilst also requiring relatively low hardware resources. Significance. By effectively exploiting continuous-time data representation, neural signal processing can be achieved in a completely event-driven manner, reducing both the required resources (memory, complexity) and computations (operations). This will see future large-scale neural systems integrating on-node processing in real-time hardware.

  9. VME rollback hardware for time warp multiprocessor systems

    NASA Technical Reports Server (NTRS)

    Robb, Michael J.; Buzzell, Calvin A.

    1992-01-01

    The purpose of the research effort is to develop and demonstrate innovative hardware to implement specific rollback and timing functions required for efficient queue management and precision timekeeping in multiprocessor discrete event simulations. The previously completed phase 1 effort demonstrated the technical feasibility of building hardware modules which eliminate the state saving overhead of the Time Warp paradigm used in distributed simulations on multiprocessor systems. The current phase 2 effort will build multiple pre-production rollback hardware modules integrated with a network of Sun workstations, and the integrated system will be tested by executing a Time Warp simulation. The rollback hardware will be designed to interface with the greatest number of multiprocessor systems possible. The authors believe that the rollback hardware will provide for significant speedup of large scale discrete event simulation problems and allow multiprocessors using Time Warp to dramatically increase performance.

  10. Hardware/software codesign for embedded RISC core

    NASA Astrophysics Data System (ADS)

    Liu, Peng

    2001-12-01

    This paper describes hardware/software codesign method of the extendible embedded RISC core VIRGO, which based on MIPS-I instruction set architecture. VIRGO is described by Verilog hardware description language that has five-stage pipeline with shared 32-bit cache/memory interface, and it is controlled by distributed control scheme. Every pipeline stage has one small controller, which controls the pipeline stage status and cooperation among the pipeline phase. Since description use high level language and structure is distributed, VIRGO core has highly extension that can meet the requirements of application. We take look at the high-definition television MPEG2 MPHL decoder chip, constructed the hardware/software codesign virtual prototyping machine that can research on VIRGO core instruction set architecture, and system on chip memory size requirements, and system on chip software, etc. We also can evaluate the system on chip design and RISC instruction set based on the virtual prototyping machine platform.

  11. Shielded battery syndrome: a new hardware complication of deep brain stimulation.

    PubMed

    Chelvarajah, Ramesh; Lumsden, Daniel; Kaminska, Margaret; Samuel, Michael; Hulse, Natasha; Selway, Richard P; Lin, Jean-Pierre; Ashkan, Keyoumars

    2012-01-01

    Deep brain stimulation hardware is constantly advancing. The last few years have seen the introduction of rechargeable cell technology into the implanted pulse generator design, allowing for longer battery life and fewer replacement operations. The Medtronic® system requires an additional pocket adaptor when revising a non-rechargeable battery such as their Kinetra® to their rechargeable Activa® RC. This additional hardware item can, if it migrates superficially, become an impediment to the recharging of the battery and negate the intended technological advance. To report the emergence of the 'shielded battery syndrome', which has not been previously described. We reviewed our deep brain stimulation database to identify cases of recharging difficulties reported by patients with Activa RC implanted pulse generators. Two cases of shielded battery syndrome were identified. The first required surgery to reposition the adaptor to the deep aspect of the subcutaneous pocket. In the second case, it was possible to perform external manual manipulation to restore the adaptor to its original position deep to the battery. We describe strategies to minimise the occurrence of the shielded battery syndrome and advise vigilance in all patients who experience difficulty with recharging after replacement surgery of this type for the implanted pulse generator. Copyright © 2012 S. Karger AG, Basel.

  12. International Space Station (ISS) Water Transfer Hardware Logistics

    NASA Technical Reports Server (NTRS)

    Shkedi, Brienne D.

    2006-01-01

    Water transferred from the Space Shuttle to the International Space Station (ISS) is generated as a by-product from the Shuttle fuel cells, and is generally preferred over the Progress which has to launch water from the ground. However, launch mass and volume are still required for the transfer and storage hardware. Some of these up-mass requirements have been reduced since ISS assembly began due to changes in the storage hardware (CWC). This paper analyzes the launch mass and volume required to transfer water from the Shuttle and analyzes the up-mass savings due to modifications in the CWC. Suggestions for improving the launch mass and volume are also provided.

  13. 42 CFR 493.557 - Additional submission requirements.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... scope of the specialty or subspecialty areas. (2) A description of the organization's data management..., Nonprofit Accreditation Organization or Exemption Under an Approved State Laboratory Program § 493.557 Additional submission requirements. (a) Specific requirements for accreditation organizations. In addition to...

  14. Extravehicular Activity training and hardware design considerations

    NASA Technical Reports Server (NTRS)

    Thuot, Pierre J.; Harbaugh, Gregory J.

    1993-01-01

    Designing hardware that can be successfully operated by EVA astronauts for EVA tasks required to assemble and maintain Space Station Freedom requires a thorough understanding of human factors and of the capabilities and limitations of the space-suited astronaut, as well as of the effect of microgravity environment on the crew member's capabilities and on the overhead associated with EVA. This paper describes various training methods and facilities that are being designed for training EVA astronauts for Space Station assembly and maintenance, taking into account the above discussed factors. Particular attention is given to the user-friendly hardware design for EVA and to recent EVA flight experience.

  15. Multi-User Hardware Solutions to Combustion Science ISS Research

    NASA Technical Reports Server (NTRS)

    Otero, Angel M.

    2001-01-01

    In response to the budget environment and to expand on the International Space Station (ISS) Fluids and Combustion Facility (FCF) Combustion Integrated Rack (CIR), common hardware approach, the NASA Combustion Science Program shifted focus in 1999 from single investigator PI (Principal Investigator)-specific hardware to multi-user 'Minifacilities'. These mini-facilities would take the CIR common hardware philosophy to the next level. The approach that was developed re-arranged all the investigations in the program into sub-fields of research. Then common requirements within these subfields were used to develop a common system that would then be complemented by a few PI-specific components. The sub-fields of research selected were droplet combustion, solids and fire safety, and gaseous fuels. From these research areas three mini-facilities have sprung: the Multi-user Droplet Combustion Apparatus (MDCA) for droplet research, Flow Enclosure for Novel Investigations in Combustion of Solids (FEANICS) for solids and fire safety, and the Multi-user Gaseous Fuels Apparatus (MGFA) for gaseous fuels. These mini-facilities will develop common Chamber Insert Assemblies (CIA) and diagnostics for the respective investigators complementing the capability provided by CIR. Presently there are four investigators for MDCA, six for FEANICS, and four for MGFA. The goal of these multi-user facilities is to drive the cost per PI down after the initial development investment is made. Each of these mini-facilities will become a fixture of future Combustion Science NASA Research Announcements (NRAs), enabling investigators to propose against an existing capability. Additionally, an investigation is provided the opportunity to enhance the existing capability to bridge the gap between the capability and their specific science requirements. This multi-user development approach will enable the Combustion Science Program to drive cost per investigation down while drastically reducing the time

  16. 10 CFR 70.74 - Additional reporting requirements.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 10 Energy 2 2011-01-01 2011-01-01 false Additional reporting requirements. 70.74 Section 70.74 Energy NUCLEAR REGULATORY COMMISSION (CONTINUED) DOMESTIC LICENSING OF SPECIAL NUCLEAR MATERIAL Additional Requirements for Certain Licensees Authorized To Possess a Critical Mass of Special Nuclear...

  17. Development of robotics facility docking test hardware

    NASA Technical Reports Server (NTRS)

    Loughead, T. E.; Winkler, R. V.

    1984-01-01

    Design and fabricate test hardware for NASA's George C. Marshall Space Flight Center (MSFC) are reported. A docking device conceptually developed was fabricated, and two docking targets which provide high and low mass docking loads were required and were represented by an aft 61.0 cm section of a Hubble space telescope (ST) mockup and an upgrading of an existing multimission modular spacecraft (MSS) mockup respectively. A test plan is developed for testing the hardware.

  18. Data Applicability of Heritage and New Hardware for Launch Vehicle System Reliability Models

    NASA Technical Reports Server (NTRS)

    Al Hassan Mohammad; Novack, Steven

    2015-01-01

    Many launch vehicle systems are designed and developed using heritage and new hardware. In most cases, the heritage hardware undergoes modifications to fit new functional system requirements, impacting the failure rates and, ultimately, the reliability data. New hardware, which lacks historical data, is often compared to like systems when estimating failure rates. Some qualification of applicability for the data source to the current system should be made. Accurately characterizing the reliability data applicability and quality under these circumstances is crucial to developing model estimations that support confident decisions on design changes and trade studies. This presentation will demonstrate a data-source classification method that ranks reliability data according to applicability and quality criteria to a new launch vehicle. This method accounts for similarities/dissimilarities in source and applicability, as well as operating environments like vibrations, acoustic regime, and shock. This classification approach will be followed by uncertainty-importance routines to assess the need for additional data to reduce uncertainty.

  19. Testing Microgravity Flight Hardware Concepts on the NASA KC-135

    NASA Technical Reports Server (NTRS)

    Motil, Susan M.; Harrivel, Angela R.; Zimmerli, Gregory A.

    2001-01-01

    This paper provides an overview of utilizing the NASA KC-135 Reduced Gravity Aircraft for the Foam Optics and Mechanics (FOAM) microgravity flight project. The FOAM science requirements are summarized, and the KC-135 test-rig used to test hardware concepts designed to meet the requirements are described. Preliminary results regarding foam dispensing, foam/surface slip tests, and dynamic light scattering data are discussed in support of the flight hardware development for the FOAM experiment.

  20. 46 CFR 133.07 - Additional equipment and requirements.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 4 2012-10-01 2012-10-01 false Additional equipment and requirements. 133.07 Section 133.07 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OFFSHORE SUPPLY VESSELS LIFESAVING SYSTEMS General § 133.07 Additional equipment and requirements. The OCMI may require an OSV to...

  1. 46 CFR 133.07 - Additional equipment and requirements.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 4 2014-10-01 2014-10-01 false Additional equipment and requirements. 133.07 Section 133.07 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OFFSHORE SUPPLY VESSELS LIFESAVING SYSTEMS General § 133.07 Additional equipment and requirements. The OCMI may require an OSV to...

  2. 33 CFR 155.1125 - Additional response plan requirements.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 33 Navigation and Navigable Waters 2 2013-07-01 2013-07-01 false Additional response plan... Additional Response Plan Requirements for Tankers Loading Cargo at a Facility Permitted Under the Trans-Alaska Pipeline Authorization Act § 155.1125 Additional response plan requirements. (a) The owner or...

  3. 33 CFR 155.1125 - Additional response plan requirements.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 33 Navigation and Navigable Waters 2 2014-07-01 2014-07-01 false Additional response plan... Additional Response Plan Requirements for Tankers Loading Cargo at a Facility Permitted Under the Trans-Alaska Pipeline Authorization Act § 155.1125 Additional response plan requirements. (a) The owner or...

  4. 33 CFR 155.1125 - Additional response plan requirements.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 33 Navigation and Navigable Waters 2 2012-07-01 2012-07-01 false Additional response plan... Additional Response Plan Requirements for Tankers Loading Cargo at a Facility Permitted Under the Trans-Alaska Pipeline Authorization Act § 155.1125 Additional response plan requirements. (a) The owner or...

  5. Fifty Years of Observing Hardware and Human Behavior

    NASA Technical Reports Server (NTRS)

    McMann, Joe

    2011-01-01

    During this half-day workshop, Joe McMann presented the lessons learned during his 50 years of experience in both industry and government, which included all U.S. manned space programs, from Mercury to the ISS. He shared his thoughts about hardware and people and what he has learned from first-hand experience. Included were such topics as design, testing, design changes, development, failures, crew expectations, hardware, requirements, and meetings.

  6. 42 CFR 417.592 - Additional benefits requirement.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 42 Public Health 3 2012-10-01 2012-10-01 false Additional benefits requirement. 417.592 Section... PLANS, AND HEALTH CARE PREPAYMENT PLANS Medicare Payment: Risk Basis § 417.592 Additional benefits...) Additional benefits. Provide its Medicare enrollees with additional benefits in accordance with paragraph (c...

  7. Current trends in hardware and software for brain-computer interfaces (BCIs)

    NASA Astrophysics Data System (ADS)

    Brunner, P.; Bianchi, L.; Guger, C.; Cincotti, F.; Schalk, G.

    2011-04-01

    A brain-computer interface (BCI) provides a non-muscular communication channel to people with and without disabilities. BCI devices consist of hardware and software. BCI hardware records signals from the brain, either invasively or non-invasively, using a series of device components. BCI software then translates these signals into device output commands and provides feedback. One may categorize different types of BCI applications into the following four categories: basic research, clinical/translational research, consumer products, and emerging applications. These four categories use BCI hardware and software, but have different sets of requirements. For example, while basic research needs to explore a wide range of system configurations, and thus requires a wide range of hardware and software capabilities, applications in the other three categories may be designed for relatively narrow purposes and thus may only need a very limited subset of capabilities. This paper summarizes technical aspects for each of these four categories of BCI applications. The results indicate that BCI technology is in transition from isolated demonstrations to systematic research and commercial development. This process requires several multidisciplinary efforts, including the development of better integrated and more robust BCI hardware and software, the definition of standardized interfaces, and the development of certification, dissemination and reimbursement procedures.

  8. Development and characteristics of the hardware for Skylab experiment S015

    NASA Technical Reports Server (NTRS)

    Thirolf, R. G.

    1975-01-01

    Details are given regarding the hardware for the Skylab S015 experiment, which was designed to detect the effects of zero gravity on cell growth rates. Experience gained in hardware-related considerations is presented for use of researchers concerned with future research of this type and further study of the S015 results. Brief descriptions are given of the experiment hardware, the hardware configuration for the critical design review, the major configuration changes, the final configuration, and the postflight review and analysis. An appendix describes pertinent documentation, film, and hardware that are available to qualified researchers; sources for additional or special information are given.

  9. 29 CFR 1602.37 - Additional reporting requirements.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... Report § 1602.37 Additional reporting requirements. The Commission reserves the right to require reports... employment practices of individual political jurisdictions or group of political jurisdictions whenever, in...

  10. A fast, programmable hardware architecture for spaceborne SAR processing

    NASA Technical Reports Server (NTRS)

    Bennett, J. R.; Cumming, I. G.; Lim, J.; Wedding, R. M.

    1983-01-01

    The launch of spaceborne SARs during the 1980's is discussed. The satellite SARs require high quality and high throughput ground processors. Compression ratios in range and azimuth of greater than 500 and 150 respectively lead to frequency domain processing and data computation rates in excess of 2000 million real operations per second for C-band SARs under consideration. Various hardware architectures are examined and two promising candidates and proceeds to recommend a fast, programmable hardware architecture for spaceborne SAR processing are selected. Modularity and programmability are introduced as desirable attributes for the purpose of HTSP hardware selection.

  11. Shuttle mission simulator hardware conceptual design report

    NASA Technical Reports Server (NTRS)

    Burke, J. F.

    1973-01-01

    The detailed shuttle mission simulator hardware requirements are discussed. The conceptual design methods, or existing technology, whereby those requirements will be fulfilled are described. Information of a general nature on the total design problem plus specific details on how these requirements are to be satisfied are reported. The configuration of the simulator is described and the capabilities for various types of training are identified.

  12. The Art of Space Flight Exercise Hardware: Design and Implementation

    NASA Technical Reports Server (NTRS)

    Beyene, Nahom M.

    2004-01-01

    The design of space flight exercise hardware depends on experience with crew health maintenance in a microgravity environment, history in development of flight-quality exercise hardware, and a foundation for certifying proper project management and design methodology. Developed over the past 40 years, the expertise in designing exercise countermeasures hardware at the Johnson Space Center stems from these three aspects of design. The medical community has steadily pursued an understanding of physiological changes in humans in a weightless environment and methods of counteracting negative effects on the cardiovascular and musculoskeletal system. The effects of weightlessness extend to the pulmonary and neurovestibular system as well with conditions ranging from motion sickness to loss of bone density. Results have shown losses in water weight and muscle mass in antigravity muscle groups. With the support of university-based research groups and partner space agencies, NASA has identified exercise to be the primary countermeasure for long-duration space flight. The history of exercise hardware began during the Apollo Era and leads directly to the present hardware on the International Space Station. Under the classifications of aerobic and resistive exercise, there is a clear line of development from the early devices to the countermeasures hardware used today. In support of all engineering projects, the engineering directorate has created a structured framework for project management. Engineers have identified standards and "best practices" to promote efficient and elegant design of space exercise hardware. The quality of space exercise hardware depends on how well hardware requirements are justified by exercise performance guidelines and crew health indicators. When considering the microgravity environment of the device, designers must consider performance of hardware separately from the combined human-in-hardware system. Astronauts are the caretakers of the hardware

  13. Motion compensation in digital subtraction angiography using graphics hardware.

    PubMed

    Deuerling-Zheng, Yu; Lell, Michael; Galant, Adam; Hornegger, Joachim

    2006-07-01

    An inherent disadvantage of digital subtraction angiography (DSA) is its sensitivity to patient motion which causes artifacts in the subtraction images. These artifacts could often reduce the diagnostic value of this technique. Automated, fast and accurate motion compensation is therefore required. To cope with this requirement, we first examine a method explicitly designed to detect local motions in DSA. Then, we implement a motion compensation algorithm by means of block matching on modern graphics hardware. Both methods search for maximal local similarity by evaluating a histogram-based measure. In this context, we are the first who have mapped an optimizing search strategy on graphics hardware while paralleling block matching. Moreover, we provide an innovative method for creating histograms on graphics hardware with vertex texturing and frame buffer blending. It turns out that both methods can effectively correct the artifacts in most case, as the hardware implementation of block matching performs much faster: the displacements of two 1024 x 1024 images can be calculated at 3 frames/s with integer precision or 2 frames/s with sub-pixel precision. Preliminary clinical evaluation indicates that the computation with integer precision could already be sufficient.

  14. OER Approach for Specific Student Groups in Hardware-Based Courses

    ERIC Educational Resources Information Center

    Ackovska, Nevena; Ristov, Sasko

    2014-01-01

    Hardware-based courses in computer science studies require much effort from both students and teachers. The most important part of students' learning is attending in person and actively working on laboratory exercises on hardware equipment. This paper deals with a specific group of students, those who are marginalized by not being able to…

  15. Hardware Acceleration of Adaptive Neural Algorithms.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    James, Conrad D.

    As tradit ional numerical computing has faced challenges, researchers have turned towards alternative computing approaches to reduce power - per - computation metrics and improve algorithm performance. Here, we describe an approach towards non - conventional computing that strengthens the connection between machine learning and neuroscience concepts. The Hardware Acceleration of Adaptive Neural Algorithms (HAANA) project ha s develop ed neural machine learning algorithms and hardware for applications in image processing and cybersecurity. While machine learning methods are effective at extracting relevant features from many types of data, the effectiveness of these algorithms degrades when subjected to real - worldmore » conditions. Our team has generated novel neural - inspired approa ches to improve the resiliency and adaptability of machine learning algorithms. In addition, we have also designed and fabricated hardware architectures and microelectronic devices specifically tuned towards the training and inference operations of neural - inspired algorithms. Finally, our multi - scale simulation framework allows us to assess the impact of microelectronic device properties on algorithm performance.« less

  16. Hardware Testing and System Evaluation: Procedures to Evaluate Commodity Hardware for Production Clusters

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Goebel, J

    2004-02-27

    Without stable hardware any program will fail. The frustration and expense of supporting bad hardware can drain an organization, delay progress, and frustrate everyone involved. At Stanford Linear Accelerator Center (SLAC), we have created a testing method that helps our group, SLAC Computer Services (SCS), weed out potentially bad hardware and purchase the best hardware at the best possible cost. Commodity hardware changes often, so new evaluations happen periodically each time we purchase systems and minor re-evaluations happen for revised systems for our clusters, about twice a year. This general framework helps SCS perform correct, efficient evaluations. This article outlinesmore » SCS's computer testing methods and our system acceptance criteria. We expanded the basic ideas to other evaluations such as storage, and we think the methods outlined in this article has helped us choose hardware that is much more stable and supportable than our previous purchases. We have found that commodity hardware ranges in quality, so systematic method and tools for hardware evaluation were necessary. This article is based on one instance of a hardware purchase, but the guidelines apply to the general problem of purchasing commodity computer systems for production computational work.« less

  17. 48 CFR 27.406-2 - Additional data requirements.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 48 Federal Acquisition Regulations System 1 2013-10-01 2013-10-01 false Additional data... GENERAL CONTRACTING REQUIREMENTS PATENTS, DATA, AND COPYRIGHTS Rights in Data and Copyrights 27.406-2 Additional data requirements. (a) In some contracting situations, such as experimental, developmental...

  18. 48 CFR 27.406-2 - Additional data requirements.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 48 Federal Acquisition Regulations System 1 2011-10-01 2011-10-01 false Additional data... GENERAL CONTRACTING REQUIREMENTS PATENTS, DATA, AND COPYRIGHTS Rights in Data and Copyrights 27.406-2 Additional data requirements. (a) In some contracting situations, such as experimental, developmental...

  19. 46 CFR 11.502 - Additional requirements for engineer endorsements.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 1 2013-10-01 2013-10-01 false Additional requirements for engineer endorsements. 11... SEAMEN REQUIREMENTS FOR OFFICER ENDORSEMENTS Professional Requirements for Engineer Officer § 11.502 Additional requirements for engineer endorsements. (a) For all original and raise of grade of engineer...

  20. 46 CFR 11.502 - Additional requirements for engineer endorsements.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 1 2010-10-01 2010-10-01 false Additional requirements for engineer endorsements. 11... SEAMEN REQUIREMENTS FOR OFFICER ENDORSEMENTS Professional Requirements for Engineer Officer § 11.502 Additional requirements for engineer endorsements. (a) For all original and raise of grade of engineer...

  1. 46 CFR 11.502 - Additional requirements for engineer endorsements.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 1 2012-10-01 2012-10-01 false Additional requirements for engineer endorsements. 11... SEAMEN REQUIREMENTS FOR OFFICER ENDORSEMENTS Professional Requirements for Engineer Officer § 11.502 Additional requirements for engineer endorsements. (a) For all original and raise of grade of engineer...

  2. 46 CFR 11.502 - Additional requirements for engineer endorsements.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 1 2011-10-01 2011-10-01 false Additional requirements for engineer endorsements. 11... SEAMEN REQUIREMENTS FOR OFFICER ENDORSEMENTS Professional Requirements for Engineer Officer § 11.502 Additional requirements for engineer endorsements. (a) For all original and raise of grade of engineer...

  3. The Evolution of Exercise Hardware on ISS: Past, Present, and Future

    NASA Technical Reports Server (NTRS)

    Buxton, R. E.; Kalogera, K. L.; Hanson, A. M.

    2017-01-01

    During 16 years in low-Earth orbit, the suite of exercise hardware aboard the International Space Station (ISS) has matured significantly. Today, the countermeasure system supports an array of physical-training protocols and serves as an extensive research platform. Future hardware designs are required to have smaller operational envelopes and must also mitigate known physiologic issues observed in long-duration spaceflight. Taking lessons learned from the long history of space exercise will be important to successful development and implementation of future, compact exercise hardware. The evolution of exercise hardware as deployed on the ISS has implications for future exercise hardware and operations. Key lessons learned from the early days of ISS have helped to: 1. Enhance hardware performance (increased speed and loads). 2. Mature software interfaces. 3. Compare inflight exercise workloads to pre-, in-, and post-flight musculoskeletal and aerobic conditions. 4. Improve exercise comfort. 5. Develop complimentary hardware for research and operations. Current ISS exercise hardware includes both custom and commercial-off-the-shelf (COTS) hardware. Benefits and challenges to this approach have prepared engineering teams to take a hybrid approach when designing and implementing future exercise hardware. Significant effort has gone into consideration of hardware instrumentation and wearable devices that provide important data to monitor crew health and performance.

  4. 40 CFR 141.154 - Required additional health information.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 40 Protection of Environment 24 2012-07-01 2012-07-01 false Required additional health information... Required additional health information. (a) All reports must prominently display the following language... from their health care providers. EPA/CDC guidelines on appropriate means to lessen the risk of...

  5. 40 CFR 141.154 - Required additional health information.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 40 Protection of Environment 23 2011-07-01 2011-07-01 false Required additional health information... Required additional health information. (a) All reports must prominently display the following language... from their health care providers. EPA/CDC guidelines on appropriate means to lessen the risk of...

  6. 40 CFR 141.154 - Required additional health information.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 40 Protection of Environment 22 2010-07-01 2010-07-01 false Required additional health information... Required additional health information. (a) All reports must prominently display the following language... from their health care providers. EPA/CDC guidelines on appropriate means to lessen the risk of...

  7. 40 CFR 141.154 - Required additional health information.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 40 Protection of Environment 24 2013-07-01 2013-07-01 false Required additional health information... Required additional health information. (a) All reports must prominently display the following language... from their health care providers. EPA/CDC guidelines on appropriate means to lessen the risk of...

  8. 46 CFR 15.525 - Additional manning requirements for tank vessels.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 1 2014-10-01 2014-10-01 false Additional manning requirements for tank vessels. 15.525... MANNING REQUIREMENTS Manning Requirements; Inspected Vessels § 15.525 Additional manning requirements for tank vessels. Parts 31 and 35 of this chapter contain additional manning requirements applicable to...

  9. Space biology initiative program definition review. Trade study 5: Modification of existing hardware (COTS) versus new hardware build cost analysis

    NASA Technical Reports Server (NTRS)

    Jackson, L. Neal; Crenshaw, John, Sr.; Davidson, William L.; Blacknall, Carolyn; Bilodeau, James W.; Stoval, J. Michael; Sutton, Terry

    1989-01-01

    The JSC Life Sciences Project Division has been directly supporting NASA Headquarters, Life Sciences Division, in the preparation of data from JSC and ARC to assist in defining the Space Biology Initiative (SBI). GE Government Services and Horizon Aerospace have provided contract support for the development and integration of review data, reports, presentations, and detailed supporting data. An SBI Definition (Non-Advocate) Review at NASA Headquarters, Code B, has been scheduled for the June-July 1989 time period. In a previous NASA Headquarters review, NASA determined that additional supporting data would be beneficial to determine the potential advantages in modifying commercial off-the-shelf (COTS) hardware for some SBI hardware items. In order to meet the demands of program implementation planning with the definition review in late spring of 1989, the definition trade study analysis must be adjusted in scope and schedule to be complete for the SBI Definition (Non-Advocate) Review. The relative costs of modifying existing commercial off-the-shelf (COTS) hardware is compared to fabricating new hardware. An historical basis for new build versus modifying COTS to meet current NMI specifications for manned space flight hardware is surveyed and identified. Selected SBI hardware are identified as potential candidates for off-the-shelf modification and statistical estimates on the relative cost of modifying COTS versus new build are provided.

  10. A modular suite of hardware enabling spaceflight cell culture research

    NASA Technical Reports Server (NTRS)

    Hoehn, Alexander; Klaus, David M.; Stodieck, Louis S.

    2004-01-01

    BioServe Space Technologies, a NASA Research Partnership Center (RPC), has developed and operated various middeck payloads launched on 23 shuttle missions since 1991 in support of commercial space biotechnology projects. Modular cell culture systems are contained within the Commercial Generic Bioprocessing Apparatus (CGBA) suite of flight-qualified hardware, compatible with Space Shuttle, SPACEHAB, Spacelab and International Space Station (ISS) EXPRESS Rack interfaces. As part of the CGBA family, the Isothermal Containment Module (ICM) incubator provides thermal control, data acquisition and experiment manipulation capabilities, including accelerometer launch detection for automated activation and thermal profiling for culture incubation and sample preservation. The ICM can accommodate up to 8 individually controlled temperature zones. Command and telemetry capabilities allow real-time downlink of data and video permitting remote payload operation and ground control synchronization. Individual cell culture experiments can be accommodated in a variety of devices ranging from 'microgravity test tubes' or standard 100 mm Petri dishes, to complex, fed-batch bioreactors with automated culture feeding, waste removal and multiple sample draws. Up to 3 levels of containment can be achieved for chemical fixative addition, and passive gas exchange can be provided through hydrophobic membranes. Many additional options exist for designing customized hardware depending on specific science requirements.

  11. Companion Chip: Building a Segregated Hardware Architecture

    NASA Astrophysics Data System (ADS)

    Pareaud, Thomas; Houelle, Alain; Vaucher, Niolas; Albinet, Mathieu; Honvault, Christophe

    2011-08-01

    Partitioning is a more and more mature concept in Space industry. It aims at assuring that some error propagation modes are not possible. This paper gives an overview of an analysis conducted in the frame of a research and technology study performed in 2010/2011. The "Java Companion Chip" study addresses an interesting approach to partitioning using hardware concepts: a SoC architecture integrates a master processor, a companion chip and additional hardware functions aiming at enforcing the time and space segregation between the master processor and the slave one.This paper discusses the benefits and the main challenges of the proposed approach. In addition, it presents an application of these concepts to a case study: a Leon/Java processor architecture able to concurrently execute native and Java applications.

  12. Evaluating the Applicability of Heritage Flight Hardware in Orion Environmental Control and Life Support Systems

    NASA Technical Reports Server (NTRS)

    Cross, Cynthia D.; Lewis, John F.; Barido, Richard A.; Carrasquillo, Robyn; Rains, George E.

    2011-01-01

    Recent changes in the overall NASA vision has resulted in further cost and schedule challenges for the Orion program. As a result, additional scrutiny has been focused on the use of new developments for hardware in the environmental control and life support systems. This paper will examine the Orion architecture as it is envisioned to support missions to the International Space Station and future exploration missions and determine what if any functions can be satisfied through the use of existing, heritage hardware designs. An initial evaluation of each component is included and where a heritage component was deemed likely further details are examined. Key technical parameters, mass, volume and vibration loads are a few of the specific items that are evaluated. Where heritage hardware has been identified that may be substituted in the Orion architecture a discussion of key requirement changes that may need to be made as well as recommendation to further evaluate applicability are noted.

  13. 33 CFR 104.295 - Additional requirements-cruise ships.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 33 Navigation and Navigable Waters 1 2010-07-01 2010-07-01 false Additional requirements-cruise ships. 104.295 Section 104.295 Navigation and Navigable Waters COAST GUARD, DEPARTMENT OF HOMELAND SECURITY MARITIME SECURITY MARITIME SECURITY: VESSELS Vessel Security Requirements § 104.295 Additional requirements—cruise ships. (a) At all MARSEC...

  14. Functional design specification for Stowage List And Hardware Tracking System (SLAHTS). [space shuttles

    NASA Technical Reports Server (NTRS)

    Keltner, D. J.

    1975-01-01

    This functional design specification defines the total systems approach to meeting the requirements stated in the Detailed Requirements Document for Stowage List and Hardware Tracking System for the space shuttle program. The stowage list and hardware tracking system is identified at the system and subsystem level with each subsystem defined as a function of the total system.

  15. Extended Logic Intelligent Processing System for a Sensor Fusion Processor Hardware

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian; Thomas, Tyson; Li, Wei-Te; Daud, Taher; Fabunmi, James

    2000-01-01

    The paper presents the hardware implementation and initial tests from a low-power, highspeed reconfigurable sensor fusion processor. The Extended Logic Intelligent Processing System (ELIPS) is described, which combines rule-based systems, fuzzy logic, and neural networks to achieve parallel fusion of sensor signals in compact low power VLSI. The development of the ELIPS concept is being done to demonstrate the interceptor functionality which particularly underlines the high speed and low power requirements. The hardware programmability allows the processor to reconfigure into different machines, taking the most efficient hardware implementation during each phase of information processing. Processing speeds of microseconds have been demonstrated using our test hardware.

  16. Testing Microshutter Arrays Using Commercial FPGA Hardware

    NASA Technical Reports Server (NTRS)

    Rapchun, David

    2008-01-01

    NASA is developing micro-shutter arrays for the Near Infrared Spectrometer (NIRSpec) instrument on the James Webb Space Telescope (JWST). These micro-shutter arrays allow NIRspec to do Multi Object Spectroscopy, a key part of the mission. Each array consists of 62414 individual 100 x 200 micron shutters. These shutters are magnetically opened and held electrostatically. Individual shutters are then programmatically closed using a simple row/column addressing technique. A common approach to provide these data/clock patterns is to use a Field Programmable Gate Array (FPGA). Such devices require complex VHSIC Hardware Description Language (VHDL) programming and custom electronic hardware. Due to JWST's rapid schedule on the development of the micro-shutters, rapid changes were required to the FPGA code to facilitate new approaches being discovered to optimize the array performance. Such rapid changes simply could not be made using conventional VHDL programming. Subsequently, National Instruments introduced an FPGA product that could be programmed through a Labview interface. Because Labview programming is considerably easier than VHDL programming, this method was adopted and brought success. The software/hardware allowed the rapid change the FPGA code and timely results of new micro-shutter array performance data. As a result, numerous labor hours and money to the project were conserved.

  17. 40 CFR 63.504 - Additional requirements for performance testing.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Additional requirements for performance... Additional requirements for performance testing. (a) Performance testing shall be conducted in accordance.... Sections 63.484 through 63.501 also contain specific testing requirements. (1) Performance tests shall be...

  18. Programming time-multiplexed reconfigurable hardware using a scalable neuromorphic compiler.

    PubMed

    Minkovich, Kirill; Srinivasa, Narayan; Cruz-Albrecht, Jose M; Cho, Youngkwan; Nogin, Aleksey

    2012-06-01

    Scalability and connectivity are two key challenges in designing neuromorphic hardware that can match biological levels. In this paper, we describe a neuromorphic system architecture design that addresses an approach to meet these challenges using traditional complementary metal-oxide-semiconductor (CMOS) hardware. A key requirement in realizing such neural architectures in hardware is the ability to automatically configure the hardware to emulate any neural architecture or model. The focus for this paper is to describe the details of such a programmable front-end. This programmable front-end is composed of a neuromorphic compiler and a digital memory, and is designed based on the concept of synaptic time-multiplexing (STM). The neuromorphic compiler automatically translates any given neural architecture to hardware switch states and these states are stored in digital memory to enable desired neural architectures. STM enables our proposed architecture to address scalability and connectivity using traditional CMOS hardware. We describe the details of the proposed design and the programmable front-end, and provide examples to illustrate its capabilities. We also provide perspectives for future extensions and potential applications.

  19. Hardware description languages

    NASA Technical Reports Server (NTRS)

    Tucker, Jerry H.

    1994-01-01

    Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

  20. Environmental Control System Software & Hardware Development

    NASA Technical Reports Server (NTRS)

    Vargas, Daniel Eduardo

    2017-01-01

    ECS hardware: (1) Provides controlled purge to SLS Rocket and Orion spacecraft. (2) Provide mission-focused engineering products and services. ECS software: (1) NASA requires Compact Unique Identifiers (CUIs); fixed-length identifier used to identify information items. (2) CUI structure; composed of nine semantic fields that aid the user in recognizing its purpose.

  1. 49 CFR 172.203 - Additional description requirements.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ..., TRAINING REQUIREMENTS, AND SECURITY PLANS Shipping Papers § 172.203 Additional description requirements. (a) Special permits. Except as provided in § 173.23 of this subchapter, each shipping paper issued in... to which the special permit applies. Each shipping paper issued in connection with a shipment made...

  2. 49 CFR 172.203 - Additional description requirements.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ..., TRAINING REQUIREMENTS, AND SECURITY PLANS Shipping Papers § 172.203 Additional description requirements. (a) Special permits. Except as provided in § 173.23 of this subchapter, each shipping paper issued in... to which the special permit applies. Each shipping paper issued in connection with a shipment made...

  3. 49 CFR 172.203 - Additional description requirements.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ..., TRAINING REQUIREMENTS, AND SECURITY PLANS Shipping Papers § 172.203 Additional description requirements. (a) Special permits. Except as provided in § 173.23 of this subchapter, each shipping paper issued in... to which the special permit applies. Each shipping paper issued in connection with a shipment made...

  4. 49 CFR 172.203 - Additional description requirements.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ..., TRAINING REQUIREMENTS, AND SECURITY PLANS Shipping Papers § 172.203 Additional description requirements. (a) Special permits. Except as provided in § 173.23 of this subchapter, each shipping paper issued in... to which the special permit applies. Each shipping paper issued in connection with a shipment made...

  5. Is a 4-bit synaptic weight resolution enough? - constraints on enabling spike-timing dependent plasticity in neuromorphic hardware.

    PubMed

    Pfeil, Thomas; Potjans, Tobias C; Schrader, Sven; Potjans, Wiebke; Schemmel, Johannes; Diesmann, Markus; Meier, Karlheinz

    2012-01-01

    Large-scale neuromorphic hardware systems typically bear the trade-off between detail level and required chip resources. Especially when implementing spike-timing dependent plasticity, reduction in resources leads to limitations as compared to floating point precision. By design, a natural modification that saves resources would be reducing synaptic weight resolution. In this study, we give an estimate for the impact of synaptic weight discretization on different levels, ranging from random walks of individual weights to computer simulations of spiking neural networks. The FACETS wafer-scale hardware system offers a 4-bit resolution of synaptic weights, which is shown to be sufficient within the scope of our network benchmark. Our findings indicate that increasing the resolution may not even be useful in light of further restrictions of customized mixed-signal synapses. In addition, variations due to production imperfections are investigated and shown to be uncritical in the context of the presented study. Our results represent a general framework for setting up and configuring hardware-constrained synapses. We suggest how weight discretization could be considered for other backends dedicated to large-scale simulations. Thus, our proposition of a good hardware verification practice may rise synergy effects between hardware developers and neuroscientists.

  6. Neutron Imaging for Selective Laser Melting Inconel Hardware with Internal Passages

    NASA Technical Reports Server (NTRS)

    Tramel, Terri L.; Norwood, Joseph K.; Bilheux, Hassina

    2014-01-01

    Additive Manufacturing is showing great promise for the development of new innovative designs and large potential life cycle cost reduction for the Aerospace Industry. However, more development work is required to move this technology into space flight hardware production. With selective laser melting (SLM), hardware that once consisted of multiple, carefully machined and inspected pieces, joined together can be made in one part. However standard inspection techniques cannot be used to verify that the internal passages are within dimensional tolerances or surface finish requirements. NASA/MSFC traveled to Oak Ridge National Lab's (ORNL) Spallation Neutron Source to perform some non-destructive, proof of concept imaging measurements to assess the capabilities to understand internal dimensional tolerances and internal passages surface roughness. This presentation will describe 1) the goals of this proof of concept testing, 2) the lessons learned when designing and building these Inconel 718 test specimens to minimize beam time, 3) the neutron imaging test setup and test procedure to get the images, 4) the initial results in images, volume and a video, 4) the assessment of using this imaging technique to gather real data for designing internal flow passages in SLM manufacturing aerospace hardware, and lastly 5) how proper cleaning of the internal passages is critically important. In summary, the initial results are very promising and continued development of a technique to assist in SLM development for aerospace components is desired by both NASA and ORNL. A plan forward that benefits both ORNL and NASA will also be presented, based on the promising initial results. The initial images and volume reconstruction showed that clean, clear images of the internal passages geometry are obtainable. These clear images of the internal passages of simple geometries will be compared to the build model to determine any differences. One surprising result was that a new cleaning

  7. Inexact hardware for modelling weather & climate

    NASA Astrophysics Data System (ADS)

    Düben, Peter D.; McNamara, Hugh; Palmer, Tim

    2014-05-01

    The use of stochastic processing hardware and low precision arithmetic in atmospheric models is investigated. Stochastic processors allow hardware-induced faults in calculations, sacrificing exact calculations in exchange for improvements in performance and potentially accuracy and a reduction in power consumption. A similar trade-off is achieved using low precision arithmetic, with improvements in computation and communication speed and savings in storage and memory requirements. As high-performance computing becomes more massively parallel and power intensive, these two approaches may be important stepping stones in the pursuit of global cloud resolving atmospheric modelling. The impact of both, hardware induced faults and low precision arithmetic is tested in the dynamical core of a global atmosphere model. Our simulations show that both approaches to inexact calculations do not substantially affect the quality of the model simulations, provided they are restricted to act only on smaller scales. This suggests that inexact calculations at the small scale could reduce computation and power costs without adversely affecting the quality of the simulations.

  8. Packaging films for electronic and space-related hardware

    NASA Astrophysics Data System (ADS)

    Shon, E. M.; Hamberg, O.

    1985-08-01

    Flexible packaging films are used to bag and/or wrap precision cleaned electronic or space hardware to protect them from environmental degradation during shipping and storage. Selection of packaging films depends on a knowledge of product requirements and packaging film characteristics. The literature presently available on protective packaging films has been updated to include new materials and to amplify space-related applications. Presently available packaging film materials are compared for their various characteristics: electrostatic discharge (ESD) control, flame retardancy, water vapor transmission rate, particulate shedding, molecular contamination, and transparency. The tradeoff between product requirements and the characteristics of the packaging films available are discussed. Selection considerations are given for the application of specific materials of space hardware-related applications. Applications for intimate, environmental, and electrostatic protective packaging are discussed.

  9. Hardware Removal in Craniomaxillofacial Trauma

    PubMed Central

    Cahill, Thomas J.; Gandhi, Rikesh; Allori, Alexander C.; Marcus, Jeffrey R.; Powers, David; Erdmann, Detlev; Hollenbeck, Scott T.; Levinson, Howard

    2015-01-01

    Background Craniomaxillofacial (CMF) fractures are typically treated with open reduction and internal fixation. Open reduction and internal fixation can be complicated by hardware exposure or infection. The literature often does not differentiate between these 2 entities; so for this study, we have considered all hardware exposures as hardware infections. Approximately 5% of adults with CMF trauma are thought to develop hardware infections. Management consists of either removing the hardware versus leaving it in situ. The optimal approach has not been investigated. Thus, a systematic review of the literature was undertaken and a resultant evidence-based approach to the treatment and management of CMF hardware infections was devised. Materials and Methods A comprehensive search of journal articles was performed in parallel using MEDLINE, Web of Science, and ScienceDirect electronic databases. Keywords and phrases used were maxillofacial injuries; facial bones; wounds and injuries; fracture fixation, internal; wound infection; and infection. Our search yielded 529 articles. To focus on CMF fractures with hardware infections, the full text of English-language articles was reviewed to identify articles focusing on the evaluation and management of infected hardware in CMF trauma. Each article’s reference list was manually reviewed and citation analysis performed to identify articles missed by the search strategy. There were 259 articles that met the full inclusion criteria and form the basis of this systematic review. The articles were rated based on the level of evidence. There were 81 grade II articles included in the meta-analysis. Result Our meta-analysis revealed that 7503 patients were treated with hardware for CMF fractures in the 81 grade II articles. Hardware infection occurred in 510 (6.8%) of these patients. Of those infections, hardware removal occurred in 264 (51.8%) patients; hardware was left in place in 166 (32.6%) patients; and in 80 (15.6%) cases

  10. 15 CFR 292.6 - Additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 15 Commerce and Foreign Trade 1 2010-01-01 2010-01-01 false Additional requirements. 292.6 Section 292.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST EXTRAMURAL PROGRAMS MANUFACTURING EXTENSION...

  11. 15 CFR 292.6 - Additional requirements.

    Code of Federal Regulations, 2012 CFR

    2012-01-01

    ... 15 Commerce and Foreign Trade 1 2012-01-01 2012-01-01 false Additional requirements. 292.6 Section 292.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST EXTRAMURAL PROGRAMS MANUFACTURING EXTENSION...

  12. 15 CFR 292.6 - Additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 15 Commerce and Foreign Trade 1 2014-01-01 2014-01-01 false Additional requirements. 292.6 Section 292.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST EXTRAMURAL PROGRAMS MANUFACTURING EXTENSION...

  13. 15 CFR 292.6 - Additional requirements.

    Code of Federal Regulations, 2013 CFR

    2013-01-01

    ... 15 Commerce and Foreign Trade 1 2013-01-01 2013-01-01 false Additional requirements. 292.6 Section 292.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST EXTRAMURAL PROGRAMS MANUFACTURING EXTENSION...

  14. 15 CFR 292.6 - Additional requirements.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 15 Commerce and Foreign Trade 1 2011-01-01 2011-01-01 false Additional requirements. 292.6 Section 292.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST EXTRAMURAL PROGRAMS MANUFACTURING EXTENSION...

  15. 33 CFR 154.1125 - Additional response plan requirements.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 33 Navigation and Navigable Waters 2 2013-07-01 2013-07-01 false Additional response plan... SECURITY (CONTINUED) POLLUTION FACILITIES TRANSFERRING OIL OR HAZARDOUS MATERIAL IN BULK Additional... Prince William Sound, Alaska § 154.1125 Additional response plan requirements. (a) The owner or operator...

  16. Life Sciences Division Spaceflight Hardware

    NASA Technical Reports Server (NTRS)

    Yost, B.

    1999-01-01

    The Ames Research Center (ARC) is responsible for the development, integration, and operation of non-human life sciences payloads in support of NASA's Gravitational Biology and Ecology (GB&E) program. To help stimulate discussion and interest in the development and application of novel technologies for incorporation within non-human life sciences experiment systems, three hardware system models will be displayed with associated graphics/text explanations. First, an Animal Enclosure Model (AEM) will be shown to communicate the nature and types of constraints physiological researchers must deal with during manned space flight experiments using rodent specimens. Second, a model of the Modular Cultivation System (MCS) under development by ESA will be presented to highlight technologies that may benefit cell-based research, including advanced imaging technologies. Finally, subsystems of the Cell Culture Unit (CCU) in development by ARC will also be shown. A discussion will be provided on candidate technology requirements in the areas of specimen environmental control, biotelemetry, telescience and telerobotics, and in situ analytical techniques and imaging. In addition, an overview of the Center for Gravitational Biology Research facilities will be provided.

  17. 33 CFR 203.83 - Additional requirements.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 33 Navigation and Navigable Waters 3 2011-07-01 2011-07-01 false Additional requirements. 203.83 Section 203.83 Navigation and Navigable Waters CORPS OF ENGINEERS, DEPARTMENT OF THE ARMY, DEPARTMENT OF DEFENSE EMERGENCY EMPLOYMENT OF ARMY AND OTHER RESOURCES, NATURAL DISASTER PROCEDURES Local Interests...

  18. 33 CFR 203.83 - Additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 33 Navigation and Navigable Waters 3 2014-07-01 2014-07-01 false Additional requirements. 203.83 Section 203.83 Navigation and Navigable Waters CORPS OF ENGINEERS, DEPARTMENT OF THE ARMY, DEPARTMENT OF DEFENSE EMERGENCY EMPLOYMENT OF ARMY AND OTHER RESOURCES, NATURAL DISASTER PROCEDURES Local Interests...

  19. 33 CFR 203.83 - Additional requirements.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 33 Navigation and Navigable Waters 3 2012-07-01 2012-07-01 false Additional requirements. 203.83 Section 203.83 Navigation and Navigable Waters CORPS OF ENGINEERS, DEPARTMENT OF THE ARMY, DEPARTMENT OF DEFENSE EMERGENCY EMPLOYMENT OF ARMY AND OTHER RESOURCES, NATURAL DISASTER PROCEDURES Local Interests...

  20. 33 CFR 203.83 - Additional requirements.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 33 Navigation and Navigable Waters 3 2013-07-01 2013-07-01 false Additional requirements. 203.83 Section 203.83 Navigation and Navigable Waters CORPS OF ENGINEERS, DEPARTMENT OF THE ARMY, DEPARTMENT OF DEFENSE EMERGENCY EMPLOYMENT OF ARMY AND OTHER RESOURCES, NATURAL DISASTER PROCEDURES Local Interests...

  1. 27 CFR 18.27 - Additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 27 Alcohol, Tobacco Products and Firearms 1 2010-04-01 2010-04-01 false Additional requirements. 18.27 Section 18.27 Alcohol, Tobacco Products and Firearms ALCOHOL AND TOBACCO TAX AND TRADE BUREAU, DEPARTMENT OF THE TREASURY LIQUORS PRODUCTION OF VOLATILE FRUIT-FLAVOR CONCENTRATE Qualification Application...

  2. 27 CFR 18.27 - Additional requirements.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 27 Alcohol, Tobacco Products and Firearms 1 2011-04-01 2011-04-01 false Additional requirements. 18.27 Section 18.27 Alcohol, Tobacco Products and Firearms ALCOHOL AND TOBACCO TAX AND TRADE BUREAU, DEPARTMENT OF THE TREASURY LIQUORS PRODUCTION OF VOLATILE FRUIT-FLAVOR CONCENTRATE Qualification Application...

  3. 27 CFR 18.27 - Additional requirements.

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... 27 Alcohol, Tobacco Products and Firearms 1 2013-04-01 2013-04-01 false Additional requirements. 18.27 Section 18.27 Alcohol, Tobacco Products and Firearms ALCOHOL AND TOBACCO TAX AND TRADE BUREAU, DEPARTMENT OF THE TREASURY ALCOHOL PRODUCTION OF VOLATILE FRUIT-FLAVOR CONCENTRATE Qualification Application...

  4. 27 CFR 18.27 - Additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... 27 Alcohol, Tobacco Products and Firearms 1 2014-04-01 2014-04-01 false Additional requirements. 18.27 Section 18.27 Alcohol, Tobacco Products and Firearms ALCOHOL AND TOBACCO TAX AND TRADE BUREAU, DEPARTMENT OF THE TREASURY ALCOHOL PRODUCTION OF VOLATILE FRUIT-FLAVOR CONCENTRATE Qualification Application...

  5. 27 CFR 18.27 - Additional requirements.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 27 Alcohol, Tobacco Products and Firearms 1 2012-04-01 2012-04-01 false Additional requirements. 18.27 Section 18.27 Alcohol, Tobacco Products and Firearms ALCOHOL AND TOBACCO TAX AND TRADE BUREAU, DEPARTMENT OF THE TREASURY LIQUORS PRODUCTION OF VOLATILE FRUIT-FLAVOR CONCENTRATE Qualification Application...

  6. 18 CFR 154.400 - Additional requirements.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 18 Conservation of Power and Water Resources 1 2012-04-01 2012-04-01 false Additional requirements. 154.400 Section 154.400 Conservation of Power and Water Resources FEDERAL ENERGY REGULATORY COMMISSION, DEPARTMENT OF ENERGY REGULATIONS UNDER NATURAL GAS ACT RATE SCHEDULES AND TARIFFS Limited Rate Changes § 154...

  7. 18 CFR 154.400 - Additional requirements.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 18 Conservation of Power and Water Resources 1 2011-04-01 2011-04-01 false Additional requirements. 154.400 Section 154.400 Conservation of Power and Water Resources FEDERAL ENERGY REGULATORY COMMISSION, DEPARTMENT OF ENERGY REGULATIONS UNDER NATURAL GAS ACT RATE SCHEDULES AND TARIFFS Limited Rate Changes § 154...

  8. 18 CFR 154.400 - Additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... 18 Conservation of Power and Water Resources 1 2014-04-01 2014-04-01 false Additional requirements. 154.400 Section 154.400 Conservation of Power and Water Resources FEDERAL ENERGY REGULATORY COMMISSION, DEPARTMENT OF ENERGY REGULATIONS UNDER NATURAL GAS ACT RATE SCHEDULES AND TARIFFS Limited Rate Changes § 154...

  9. 18 CFR 154.400 - Additional requirements.

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... 18 Conservation of Power and Water Resources 1 2013-04-01 2013-04-01 false Additional requirements. 154.400 Section 154.400 Conservation of Power and Water Resources FEDERAL ENERGY REGULATORY COMMISSION, DEPARTMENT OF ENERGY REGULATIONS UNDER NATURAL GAS ACT RATE SCHEDULES AND TARIFFS Limited Rate Changes § 154...

  10. 18 CFR 154.400 - Additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 18 Conservation of Power and Water Resources 1 2010-04-01 2010-04-01 false Additional requirements. 154.400 Section 154.400 Conservation of Power and Water Resources FEDERAL ENERGY REGULATORY COMMISSION, DEPARTMENT OF ENERGY REGULATIONS UNDER NATURAL GAS ACT RATE SCHEDULES AND TARIFFS Limited Rate Changes § 154...

  11. High Temperature Thermoplastic Additive Manufacturing Using Low-Cost, Open-Source Hardware

    NASA Technical Reports Server (NTRS)

    Gardner, John M.; Stelter, Christopher J.; Yashin, Edward A.; Siochi, Emilie J.

    2016-01-01

    Additive manufacturing (or 3D printing) via Fused Filament Fabrication (FFF), also known as Fused Deposition Modeling (FDM), is a process where material is placed in specific locations layer-by-layer to create a complete part. Printers designed for FFF build parts by extruding a thermoplastic filament from a nozzle in a predetermined path. Originally developed for commercial printers, 3D printing via FFF has become accessible to a much larger community of users since the introduction of Reprap printers. These low-cost, desktop machines are typically used to print prototype parts or novelty items. As the adoption of desktop sized 3D printers broadens, there is increased demand for these machines to produce functional parts that can withstand harsher conditions such as high temperature and mechanical loads. Materials meeting these requirements tend to possess better mechanical properties and higher glass transition temperatures (Tg), thus requiring printers with high temperature printing capability. This report outlines the problems and solutions, and includes a detailed description of the machine design, printing parameters, and processes specific to high temperature thermoplastic 3D printing.

  12. 33 CFR 105.290 - Additional requirements-cruise ship terminals.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 33 Navigation and Navigable Waters 1 2010-07-01 2010-07-01 false Additional requirements-cruise ship terminals. 105.290 Section 105.290 Navigation and Navigable Waters COAST GUARD, DEPARTMENT OF HOMELAND SECURITY MARITIME SECURITY MARITIME SECURITY: FACILITIES Facility Security Requirements § 105.290 Additional requirements—cruise ship terminals...

  13. 29 CFR 1926.1421 - Signals-voice signals-additional requirements.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 29 Labor 8 2013-07-01 2013-07-01 false Signals-voice signals-additional requirements. 1926.1421... Derricks in Construction § 1926.1421 Signals—voice signals—additional requirements. (a) Prior to beginning operations, the operator, signal person and lift director (if there is one), must contact each other and...

  14. 29 CFR 1926.1421 - Signals-voice signals-additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 29 Labor 8 2014-07-01 2014-07-01 false Signals-voice signals-additional requirements. 1926.1421... Derricks in Construction § 1926.1421 Signals—voice signals—additional requirements. (a) Prior to beginning operations, the operator, signal person and lift director (if there is one), must contact each other and...

  15. 29 CFR 1926.1421 - Signals-voice signals-additional requirements.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 29 Labor 8 2012-07-01 2012-07-01 false Signals-voice signals-additional requirements. 1926.1421... Derricks in Construction § 1926.1421 Signals—voice signals—additional requirements. (a) Prior to beginning operations, the operator, signal person and lift director (if there is one), must contact each other and...

  16. A novel visual hardware behavioral language

    NASA Technical Reports Server (NTRS)

    Li, Xueqin; Cheng, H. D.

    1992-01-01

    Most hardware behavioral languages just use texts to describe the behavior of the desired hardware design. This is inconvenient for VLSI designers who enjoy using the schematic approach. The proposed visual hardware behavioral language has the ability to graphically express design information using visual parallel models (blocks), visual sequential models (processes) and visual data flow graphs (which consist of primitive operational icons, control icons, and Data and Synchro links). Thus, the proposed visual hardware behavioral language can not only specify hardware concurrent and sequential functionality, but can also visually expose parallelism, sequentiality, and disjointness (mutually exclusive operations) for the hardware designers. That would make the hardware designers capture the design ideas easily and explicitly using this visual hardware behavioral language.

  17. Scalable digital hardware for a trapped ion quantum computer

    NASA Astrophysics Data System (ADS)

    Mount, Emily; Gaultney, Daniel; Vrijsen, Geert; Adams, Michael; Baek, So-Young; Hudek, Kai; Isabella, Louis; Crain, Stephen; van Rynbach, Andre; Maunz, Peter; Kim, Jungsang

    2016-12-01

    Many of the challenges of scaling quantum computer hardware lie at the interface between the qubits and the classical control signals used to manipulate them. Modular ion trap quantum computer architectures address scalability by constructing individual quantum processors interconnected via a network of quantum communication channels. Successful operation of such quantum hardware requires a fully programmable classical control system capable of frequency stabilizing the continuous wave lasers necessary for loading, cooling, initialization, and detection of the ion qubits, stabilizing the optical frequency combs used to drive logic gate operations on the ion qubits, providing a large number of analog voltage sources to drive the trap electrodes, and a scheme for maintaining phase coherence among all the controllers that manipulate the qubits. In this work, we describe scalable solutions to these hardware development challenges.

  18. 10 CFR 70.74 - Additional reporting requirements.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... Additional Requirements for Certain Licensees Authorized To Possess a Critical Mass of Special Nuclear... subpart is complete. (5) Each licensee shall provide reasonable assurance that reliable communication with...

  19. 40 CFR 503.5 - Additional or more stringent requirements.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... requirements. 503.5 Section 503.5 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) SEWAGE SLUDGE STANDARDS FOR THE USE OR DISPOSAL OF SEWAGE SLUDGE General Provisions § 503.5 Additional or more... the use or disposal of sewage sludge in addition to or more stringent than the requirements in this...

  20. NASA HUNCH Hardware

    NASA Technical Reports Server (NTRS)

    Hall, Nancy R.; Wagner, James; Phelps, Amanda

    2014-01-01

    What is NASA HUNCH? High School Students United with NASA to Create Hardware-HUNCH is an instructional partnership between NASA and educational institutions. This partnership benefits both NASA and students. NASA receives cost-effective hardware and soft goods, while students receive real-world hands-on experiences. The 2014-2015 was the 12th year of the HUNCH Program. NASA Glenn Research Center joined the program that already included the NASA Johnson Space Flight Center, Marshall Space Flight Center, Langley Research Center and Goddard Space Flight Center. The program included 76 schools in 24 states and NASA Glenn worked with the following five schools in the HUNCH Build to Print Hardware Program: Medina Career Center, Medina, OH; Cattaraugus Allegheny-BOCES, Olean, NY; Orleans Niagara-BOCES, Medina, NY; Apollo Career Center, Lima, OH; Romeo Engineering and Tech Center, Washington, MI. The schools built various parts of an International Space Station (ISS) middeck stowage locker and learned about manufacturing process and how best to build these components to NASA specifications. For the 2015-2016 school year the schools will be part of a larger group of schools building flight hardware consisting of 20 ISS middeck stowage lockers for the ISS Program. The HUNCH Program consists of: Build to Print Hardware; Build to Print Soft Goods; Design and Prototyping; Culinary Challenge; Implementation: Web Page and Video Production.

  1. Hardware-efficient bosonic quantum error-correcting codes based on symmetry operators

    NASA Astrophysics Data System (ADS)

    Niu, Murphy Yuezhen; Chuang, Isaac L.; Shapiro, Jeffrey H.

    2018-03-01

    We establish a symmetry-operator framework for designing quantum error-correcting (QEC) codes based on fundamental properties of the underlying system dynamics. Based on this framework, we propose three hardware-efficient bosonic QEC codes that are suitable for χ(2 )-interaction based quantum computation in multimode Fock bases: the χ(2 ) parity-check code, the χ(2 ) embedded error-correcting code, and the χ(2 ) binomial code. All of these QEC codes detect photon-loss or photon-gain errors by means of photon-number parity measurements, and then correct them via χ(2 ) Hamiltonian evolutions and linear-optics transformations. Our symmetry-operator framework provides a systematic procedure for finding QEC codes that are not stabilizer codes, and it enables convenient extension of a given encoding to higher-dimensional qudit bases. The χ(2 ) binomial code is of special interest because, with m ≤N identified from channel monitoring, it can correct m -photon-loss errors, or m -photon-gain errors, or (m -1 )th -order dephasing errors using logical qudits that are encoded in O (N ) photons. In comparison, other bosonic QEC codes require O (N2) photons to correct the same degree of bosonic errors. Such improved photon efficiency underscores the additional error-correction power that can be provided by channel monitoring. We develop quantum Hamming bounds for photon-loss errors in the code subspaces associated with the χ(2 ) parity-check code and the χ(2 ) embedded error-correcting code, and we prove that these codes saturate their respective bounds. Our χ(2 ) QEC codes exhibit hardware efficiency in that they address the principal error mechanisms and exploit the available physical interactions of the underlying hardware, thus reducing the physical resources required for implementing their encoding, decoding, and error-correction operations, and their universal encoded-basis gate sets.

  2. Fundamentals of Hardware. Curriculum Improvement Project. Region II.

    ERIC Educational Resources Information Center

    Onabajo, Femi

    This course curriculum is intended for use by community college instructors and administrators in implementing a fundamentals in hardware course. A student's course syllabus provides this information: credit hours, catalog description, prerequisites, required text, instructional process, objectives, student evaluation, and class schedule. A…

  3. Monitoring and Hardware Management for Critical Fusion Plasma Instrumentation

    NASA Astrophysics Data System (ADS)

    Carvalho, Paulo F.; Santos, Bruno; Correia, Miguel; Combo, Álvaro M.; Rodrigues, AntÓnio P.; Pereira, Rita C.; Fernandes, Ana; Cruz, Nuno; Sousa, Jorge; Carvalho, Bernardo B.; Batista, AntÓnio J. N.; Correia, Carlos M. B. A.; Gonçalves, Bruno

    2018-01-01

    Controlled nuclear fusion aims to obtain energy by particles collision confined inside a nuclear reactor (Tokamak). These ionized particles, heavier isotopes of hydrogen, are the main elements inside of plasma that is kept at high temperatures (millions of Celsius degrees). Due to high temperatures and magnetic confinement, plasma is exposed to several sources of instabilities which require a set of procedures by the control and data acquisition systems throughout fusion experiments processes. Control and data acquisition systems often used in nuclear fusion experiments are based on the Advanced Telecommunication Computer Architecture (AdvancedTCA®) standard introduced by the Peripheral Component Interconnect Industrial Manufacturers Group (PICMG®), to meet the demands of telecommunications that require large amount of data (TB) transportation at high transfer rates (Gb/s), to ensure high availability including features such as reliability, serviceability and redundancy. For efficient plasma control, systems are required to collect large amounts of data, process it, store for later analysis, make critical decisions in real time and provide status reports either from the experience itself or the electronic instrumentation involved. Moreover, systems should also ensure the correct handling of detected anomalies and identified faults, notify the system operator of occurred events, decisions taken to acknowledge and implemented changes. Therefore, for everything to work in compliance with specifications it is required that the instrumentation includes hardware management and monitoring mechanisms for both hardware and software. These mechanisms should check the system status by reading sensors, manage events, update inventory databases with hardware system components in use and maintenance, store collected information, update firmware and installed software modules, configure and handle alarms to detect possible system failures and prevent emergency scenarios

  4. MRI monitoring of focused ultrasound sonications near metallic hardware.

    PubMed

    Weber, Hans; Ghanouni, Pejman; Pascal-Tenorio, Aurea; Pauly, Kim Butts; Hargreaves, Brian A

    2018-07-01

    To explore the temperature-induced signal change in two-dimensional multi-spectral imaging (2DMSI) for fast thermometry near metallic hardware to enable MR-guided focused ultrasound surgery (MRgFUS) in patients with implanted metallic hardware. 2DMSI was optimized for temperature sensitivity and applied to monitor focus ultrasound surgery (FUS) sonications near metallic hardware in phantoms and ex vivo porcine muscle tissue. Further, we evaluated its temperature sensitivity for in vivo muscle in patients without metallic hardware. In addition, we performed a comparison of temperature sensitivity between 2DMSI and conventional proton-resonance-frequency-shift (PRFS) thermometry at different distances from metal devices and different signal-to-noise ratios (SNR). 2DMSI thermometry enabled visualization of short ultrasound sonications near metallic hardware. Calibration using in vivo muscle yielded a constant temperature sensitivity for temperatures below 43 °C. For an off-resonance coverage of ± 6 kHz, we achieved a temperature sensitivity of 1.45%/K, resulting in a minimum detectable temperature change of ∼2.5 K for an SNR of 100 with a temporal resolution of 6 s per frame. The proposed 2DMSI thermometry has the potential to allow MR-guided FUS treatments of patients with metallic hardware and therefore expand its reach to a larger patient population. Magn Reson Med 80:259-271, 2018. © 2017 International Society for Magnetic Resonance in Medicine. © 2017 International Society for Magnetic Resonance in Medicine.

  5. Hardware-assisted software clock synchronization for homogeneous distributed systems

    NASA Technical Reports Server (NTRS)

    Ramanathan, P.; Kandlur, Dilip D.; Shin, Kang G.

    1990-01-01

    A clock synchronization scheme that strikes a balance between hardware and software solutions is proposed. The proposed is a software algorithm that uses minimal additional hardware to achieve reasonably tight synchronization. Unlike other software solutions, the guaranteed worst-case skews can be made insensitive to the maximum variation of message transit delay in the system. The scheme is particularly suitable for large partially connected distributed systems with topologies that support simple point-to-point broadcast algorithms. Examples of such topologies include the hypercube and the mesh interconnection structures.

  6. 40 CFR 161.75 - Requirements for additional data.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 40 Protection of Environment 23 2010-07-01 2010-07-01 false Requirements for additional data. 161.75 Section 161.75 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) PESTICIDE PROGRAMS DATA REQUIREMENTS FOR REGISTRATION OF ANTIMICROBIAL PESTICIDES General Provisions § 161.75...

  7. Pulseq: A rapid and hardware-independent pulse sequence prototyping framework.

    PubMed

    Layton, Kelvin J; Kroboth, Stefan; Jia, Feng; Littin, Sebastian; Yu, Huijun; Leupold, Jochen; Nielsen, Jon-Fredrik; Stöcker, Tony; Zaitsev, Maxim

    2017-04-01

    Implementing new magnetic resonance experiments, or sequences, often involves extensive programming on vendor-specific platforms, which can be time consuming and costly. This situation is exacerbated when research sequences need to be implemented on several platforms simultaneously, for example, at different field strengths. This work presents an alternative programming environment that is hardware-independent, open-source, and promotes rapid sequence prototyping. A novel file format is described to efficiently store the hardware events and timing information required for an MR pulse sequence. Platform-dependent interpreter modules convert the file to appropriate instructions to run the sequence on MR hardware. Sequences can be designed in high-level languages, such as MATLAB, or with a graphical interface. Spin physics simulation tools are incorporated into the framework, allowing for comparison between real and virtual experiments. Minimal effort is required to implement relatively advanced sequences using the tools provided. Sequences are executed on three different MR platforms, demonstrating the flexibility of the approach. A high-level, flexible and hardware-independent approach to sequence programming is ideal for the rapid development of new sequences. The framework is currently not suitable for large patient studies or routine scanning although this would be possible with deeper integration into existing workflows. Magn Reson Med 77:1544-1552, 2017. © 2016 International Society for Magnetic Resonance in Medicine. © 2016 International Society for Magnetic Resonance in Medicine.

  8. Hardware architecture for projective model calculation and false match refining using random sample consensus algorithm

    NASA Astrophysics Data System (ADS)

    Azimi, Ehsan; Behrad, Alireza; Ghaznavi-Ghoushchi, Mohammad Bagher; Shanbehzadeh, Jamshid

    2016-11-01

    The projective model is an important mapping function for the calculation of global transformation between two images. However, its hardware implementation is challenging because of a large number of coefficients with different required precisions for fixed point representation. A VLSI hardware architecture is proposed for the calculation of a global projective model between input and reference images and refining false matches using random sample consensus (RANSAC) algorithm. To make the hardware implementation feasible, it is proved that the calculation of the projective model can be divided into four submodels comprising two translations, an affine model and a simpler projective mapping. This approach makes the hardware implementation feasible and considerably reduces the required number of bits for fixed point representation of model coefficients and intermediate variables. The proposed hardware architecture for the calculation of a global projective model using the RANSAC algorithm was implemented using Verilog hardware description language and the functionality of the design was validated through several experiments. The proposed architecture was synthesized by using an application-specific integrated circuit digital design flow utilizing 180-nm CMOS technology as well as a Virtex-6 field programmable gate array. Experimental results confirm the efficiency of the proposed hardware architecture in comparison with software implementation.

  9. Hardware accelerator of convolution with exponential function for image processing applications

    NASA Astrophysics Data System (ADS)

    Panchenko, Ivan; Bucha, Victor

    2015-12-01

    In this paper we describe a Hardware Accelerator (HWA) for fast recursive approximation of separable convolution with exponential function. This filter can be used in many Image Processing (IP) applications, e.g. depth-dependent image blur, image enhancement and disparity estimation. We have adopted this filter RTL implementation to provide maximum throughput in constrains of required memory bandwidth and hardware resources to provide a power-efficient VLSI implementation.

  10. 46 CFR 199.07 - Additional equipment and requirements.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 7 2010-10-01 2010-10-01 false Additional equipment and requirements. 199.07 Section 199.07 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LIFESAVING APPLIANCES AND ARRANGEMENTS LIFESAVING SYSTEMS FOR CERTAIN INSPECTED VESSELS General § 199.07 Additional equipment and...

  11. Efficient architecture for spike sorting in reconfigurable hardware.

    PubMed

    Hwang, Wen-Jyi; Lee, Wei-Hao; Lin, Shiow-Jyu; Lai, Sheng-Ying

    2013-11-01

    This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA) and fuzzy C-means (FCM) algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA). It is embedded in a System-on-Chip (SOC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation.

  12. Is a 4-Bit Synaptic Weight Resolution Enough? – Constraints on Enabling Spike-Timing Dependent Plasticity in Neuromorphic Hardware

    PubMed Central

    Pfeil, Thomas; Potjans, Tobias C.; Schrader, Sven; Potjans, Wiebke; Schemmel, Johannes; Diesmann, Markus; Meier, Karlheinz

    2012-01-01

    Large-scale neuromorphic hardware systems typically bear the trade-off between detail level and required chip resources. Especially when implementing spike-timing dependent plasticity, reduction in resources leads to limitations as compared to floating point precision. By design, a natural modification that saves resources would be reducing synaptic weight resolution. In this study, we give an estimate for the impact of synaptic weight discretization on different levels, ranging from random walks of individual weights to computer simulations of spiking neural networks. The FACETS wafer-scale hardware system offers a 4-bit resolution of synaptic weights, which is shown to be sufficient within the scope of our network benchmark. Our findings indicate that increasing the resolution may not even be useful in light of further restrictions of customized mixed-signal synapses. In addition, variations due to production imperfections are investigated and shown to be uncritical in the context of the presented study. Our results represent a general framework for setting up and configuring hardware-constrained synapses. We suggest how weight discretization could be considered for other backends dedicated to large-scale simulations. Thus, our proposition of a good hardware verification practice may rise synergy effects between hardware developers and neuroscientists. PMID:22822388

  13. 46 CFR 35.03-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 1 2013-10-01 2013-10-01 false Additional requirements for hybrid work vests. 35.03-25 Section 35.03-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY TANK VESSELS OPERATIONS Work Vests § 35.03-25 Additional requirements for hybrid work vests. (a) In addition to the other requirements in...

  14. 46 CFR 35.03-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 1 2012-10-01 2012-10-01 false Additional requirements for hybrid work vests. 35.03-25 Section 35.03-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY TANK VESSELS OPERATIONS Work Vests § 35.03-25 Additional requirements for hybrid work vests. (a) In addition to the other requirements in...

  15. 46 CFR 35.03-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 1 2011-10-01 2011-10-01 false Additional requirements for hybrid work vests. 35.03-25 Section 35.03-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY TANK VESSELS OPERATIONS Work Vests § 35.03-25 Additional requirements for hybrid work vests. (a) In addition to the other requirements in...

  16. 46 CFR 35.03-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 1 2014-10-01 2014-10-01 false Additional requirements for hybrid work vests. 35.03-25 Section 35.03-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY TANK VESSELS OPERATIONS Work Vests § 35.03-25 Additional requirements for hybrid work vests. (a) In addition to the other requirements in...

  17. 46 CFR 35.03-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 1 2010-10-01 2010-10-01 false Additional requirements for hybrid work vests. 35.03-25 Section 35.03-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY TANK VESSELS OPERATIONS Work Vests § 35.03-25 Additional requirements for hybrid work vests. (a) In addition to the other requirements in...

  18. Workmanship Challenges for NASA Mission Hardware

    NASA Technical Reports Server (NTRS)

    Plante, Jeannette

    2010-01-01

    This slide presentation reviews several challenges in workmanship for NASA mission hardware development. Several standards for NASA workmanship exist, that are required for all programs, projects, contracts and subcontracts. These Standards contain our best known methods for avoiding past assembly problems and defects. These best practices may not be available if suppliers are used who are not compliant with them. Compliance includes having certified operators and inspectors. Some examples of problems that have occured from the lack of requirements flow-down to contractors are reviewed. The presentation contains a detailed example of the challenge in regards to The Packaging "Design" Dilemma.

  19. Implementation of COTs Hardware in Non-Critical Space Applications: A Brief Tutorial

    NASA Technical Reports Server (NTRS)

    Yoder, Geoffrey L.

    2004-01-01

    Approaches used for manned applications include limited items such as CD-players evaluated for safety to high criticality applications where the COTs hardware is evaluated on a case-by-case basis for the application and commensurate screening and qualification testing. COTS hardware is successfully implemented in both the International Space Station and Space Shuttle but requires evaluation and modifications for the application. Screening and qualification of COTs hardware used in critical applications may need to be more extensive and stringent than traditional military screening. Evaluation for: a) Suitability for the application; b) Safety; c) Reliability and maintainability; and d) Workmanship.

  20. 46 CFR 72.01-25 - Additional structural requirements.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... CONSTRUCTION AND ARRANGEMENT Hull Structure § 72.01-25 Additional structural requirements. (a) Vessels required.... The construction of the bulkheads shall be to the satisfaction of the Commandant. (2) Steps and... deck, such bulkhead or deck shall be made structurally watertight without the use of wood, cement, or...

  1. 14 CFR 136.5 - Additional requirements for Hawaii.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 14 Aeronautics and Space 3 2010-01-01 2010-01-01 false Additional requirements for Hawaii. 136.5 Section 136.5 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION, DEPARTMENT OF TRANSPORTATION... requirements for Hawaii. No person may conduct a commercial air tour in the State of Hawaii unless they comply...

  2. Hardware acceleration and verification of systems designed with hardware description languages (HDL)

    NASA Astrophysics Data System (ADS)

    Wisniewski, Remigiusz; Wegrzyn, Marek

    2005-02-01

    Hardware description languages (HDLs) allow creating bigger and bigger designs nowadays. The size of prototyped systems very often exceeds million gates. Therefore verification process of the designs takes several hours or even days. The solution for this problem can be solved by hardware acceleration of simulation.

  3. Automated power distribution system hardware. [for space station power supplies

    NASA Technical Reports Server (NTRS)

    Anderson, Paul M.; Martin, James A.; Thomason, Cindy

    1989-01-01

    An automated power distribution system testbed for the space station common modules has been developed. It incorporates automated control and monitoring of a utility-type power system. Automated power system switchgear, control and sensor hardware requirements, hardware design, test results, and potential applications are discussed. The system is designed so that the automated control and monitoring of the power system is compatible with both a 208-V, 20-kHz single-phase AC system and a high-voltage (120 to 150 V) DC system.

  4. 50 CFR 660.15 - Equipment requirements.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... receivers, computer hardware for electronic fish ticket software and computer hardware for electronic logbook software. (b) Performance and technical requirements for scales used to weigh catch at sea... ticket software provided by Pacific States Marine Fish Commission are required to meet the hardware and...

  5. 49 CFR 236.1007 - Additional requirements for high-speed service.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Additional requirements for high-speed service. 236.1007 Section 236.1007 Transportation Other Regulations Relating to Transportation (Continued..., AND APPLIANCES Positive Train Control Systems § 236.1007 Additional requirements for high-speed...

  6. Advanced wiring technique and hardware application: Airplane and space vehicle

    NASA Technical Reports Server (NTRS)

    Ernst, H. L.; Eichman, C. D.

    1972-01-01

    An advanced wiring system is described which achieves the safety/reliability required for present and future airplane and space vehicle applications. Also, present wiring installation techniques and hardware are analyzed to establish existing problem areas. An advanced wiring system employing matrix interconnecting unit, plug to plug trunk bundles (FCC or ribbon cable) is outlined, and an installation study presented. A planned program to develop, lab test and flight test key features of these techniques and hardware as a part of the SST technology follow-on activities is discussed.

  7. Stretched Lens Array (SLA) Photovoltaic Concentrator Hardware Development and Testing

    NASA Technical Reports Server (NTRS)

    Piszczor, Michael; O'Neill, Mark J.; Eskenazi, Michael

    2003-01-01

    Over the past two years, the Stretched Lens Array (SLA) photovoltaic concentrator has evolved, under a NASA contract, from a concept with small component demonstrators to operational array hardware that is ready for space validation testing. A fully-functional four panel SLA solar array has been designed, built and tested. This paper will summarize the focus of the hardware development effort, discuss the results of recent testing conducted under this program and present the expected performance of a full size 7kW array designed to meet the requirements of future space missions.

  8. 49 CFR 236.1007 - Additional requirements for high-speed service.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Additional requirements for high-speed service..., AND APPLIANCES Positive Train Control Systems § 236.1007 Additional requirements for high-speed... by this subpart, and which have been utilized on high-speed rail systems with similar technical and...

  9. 46 CFR 160.027-3 - Additional requirements for life floats.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 6 2010-10-01 2010-10-01 false Additional requirements for life floats. 160.027-3..., CONSTRUCTION, AND MATERIALS: SPECIFICATIONS AND APPROVAL LIFESAVING EQUIPMENT Life Floats for Merchant Vessels § 160.027-3 Additional requirements for life floats. (a) Each life float must have a platform designed...

  10. 46 CFR 160.027-3 - Additional requirements for life floats.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 6 2011-10-01 2011-10-01 false Additional requirements for life floats. 160.027-3..., CONSTRUCTION, AND MATERIALS: SPECIFICATIONS AND APPROVAL LIFESAVING EQUIPMENT Life Floats for Merchant Vessels § 160.027-3 Additional requirements for life floats. (a) Each life float must have a platform designed...

  11. 37 CFR 2.23 - Additional requirements for TEAS Plus application.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... TEAS Plus application. 2.23 Section 2.23 Patents, Trademarks, and Copyrights UNITED STATES PATENT AND... § 2.23 Additional requirements for TEAS Plus application. (a) In addition to the filing requirements under § 2.22(a), the applicant must: (1) File the following communications through TEAS: (i) Responses...

  12. 46 CFR 160.027-3 - Additional requirements for life floats.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 6 2014-10-01 2014-10-01 false Additional requirements for life floats. 160.027-3..., CONSTRUCTION, AND MATERIALS: SPECIFICATIONS AND APPROVAL LIFESAVING EQUIPMENT Life Floats for Merchant Vessels § 160.027-3 Additional requirements for life floats. (a) Each life float must have a platform designed...

  13. 46 CFR 160.027-3 - Additional requirements for life floats.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 6 2013-10-01 2013-10-01 false Additional requirements for life floats. 160.027-3..., CONSTRUCTION, AND MATERIALS: SPECIFICATIONS AND APPROVAL LIFESAVING EQUIPMENT Life Floats for Merchant Vessels § 160.027-3 Additional requirements for life floats. (a) Each life float must have a platform designed...

  14. 46 CFR 160.027-3 - Additional requirements for life floats.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 6 2012-10-01 2012-10-01 false Additional requirements for life floats. 160.027-3..., CONSTRUCTION, AND MATERIALS: SPECIFICATIONS AND APPROVAL LIFESAVING EQUIPMENT Life Floats for Merchant Vessels § 160.027-3 Additional requirements for life floats. (a) Each life float must have a platform designed...

  15. 37 CFR 2.23 - Additional requirements for TEAS Plus application.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... TEAS Plus application. 2.23 Section 2.23 Patents, Trademarks, and Copyrights UNITED STATES PATENT AND... § 2.23 Additional requirements for TEAS Plus application. (a) In addition to the filing requirements under § 2.22(a), the applicant must: (1) File the following communications through TEAS: (i) Responses...

  16. Real Time Target Tracking Using Dedicated Vision Hardware

    NASA Astrophysics Data System (ADS)

    Kambies, Keith; Walsh, Peter

    1988-03-01

    This paper describes a real-time vision target tracking system developed by Adaptive Automation, Inc. and delivered to NASA's Launch Equipment Test Facility, Kennedy Space Center, Florida. The target tracking system is part of the Robotic Application Development Laboratory (RADL) which was designed to provide NASA with a general purpose robotic research and development test bed for the integration of robot and sensor systems. One of the first RADL system applications is the closing of a position control loop around a six-axis articulated arm industrial robot using a camera and dedicated vision processor as the input sensor so that the robot can locate and track a moving target. The vision system is inside of the loop closure of the robot tracking system, therefore, tight throughput and latency constraints are imposed on the vision system that can only be met with specialized hardware and a concurrent approach to the processing algorithms. State of the art VME based vision boards capable of processing the image at frame rates were used with a real-time, multi-tasking operating system to achieve the performance required. This paper describes the high speed vision based tracking task, the system throughput requirements, the use of dedicated vision hardware architecture, and the implementation design details. Important to the overall philosophy of the complete system was the hierarchical and modular approach applied to all aspects of the system, hardware and software alike, so there is special emphasis placed on this topic in the paper.

  17. 12 CFR 229.18 - Additional disclosure requirements.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... RESERVE SYSTEM AVAILABILITY OF FUNDS AND COLLECTION OF CHECKS (REGULATION CC) Availability of Funds and Disclosure of Funds Availability Policies § 229.18 Additional disclosure requirements. (a) Deposit slips. A... consumer accounts a notice that sets forth the time periods applicable to the availability of funds...

  18. 12 CFR 229.18 - Additional disclosure requirements.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... RESERVE SYSTEM AVAILABILITY OF FUNDS AND COLLECTION OF CHECKS (REGULATION CC) Availability of Funds and Disclosure of Funds Availability Policies § 229.18 Additional disclosure requirements. (a) Deposit slips. A... consumer accounts a notice that sets forth the time periods applicable to the availability of funds...

  19. Real-time orthorectification by FPGA-based hardware acceleration

    NASA Astrophysics Data System (ADS)

    Kuo, David; Gordon, Don

    2010-10-01

    Orthorectification that corrects the perspective distortion of remote sensing imagery, providing accurate geolocation and ease of correlation to other images is a valuable first-step in image processing for information extraction. However, the large amount of metadata and the floating-point matrix transformations required to operate on each pixel make this a computation and I/O (Input/Output) intensive process. As result much imagery is either left unprocessed or loses timesensitive value in the long processing cycle. However, the computation on each pixel can be reduced substantially by using computational results of the neighboring pixels and accelerated by special pipelined hardware architecture in one to two orders of magnitude. A specialized coprocessor that is implemented inside an FPGA (Field Programmable Gate Array) chip and surrounded by vendorsupported hardware IP (Intellectual Property) shares the computation workload with CPU through PCI-Express interface. The ultimate speed of one pixel per clock (125 MHz) is achieved by the pipelined systolic array architecture. The optimal partition between software and hardware, the timing profile among image I/O and computation, and the highly automated GUI (Graphical User Interface) that fully exploits this speed increase to maximize overall image production throughput will also be discussed. The software that runs on a workstation with the acceleration hardware orthorectifies 16 Megapixels per second, which is 16 times faster than without the hardware. It turns the production time from months to days. A real-life successful story of an imaging satellite company that adopted such workstations for their orthorectified imagery production will be presented. The potential candidacy of the image processing computation that can be accelerated more efficiently by the same approach will also be analyzed.

  20. Integrated Hardware and Software for No-Loss Computing

    NASA Technical Reports Server (NTRS)

    James, Mark

    2007-01-01

    When an algorithm is distributed across multiple threads executing on many distinct processors, a loss of one of those threads or processors can potentially result in the total loss of all the incremental results up to that point. When implementation is massively hardware distributed, then the probability of a hardware failure during the course of a long execution is potentially high. Traditionally, this problem has been addressed by establishing checkpoints where the current state of some or part of the execution is saved. Then in the event of a failure, this state information can be used to recompute that point in the execution and resume the computation from that point. A serious problem arises when one distributes a problem across multiple threads and physical processors is that one increases the likelihood of the algorithm failing due to no fault of the scientist but as a result of hardware faults coupled with operating system problems. With good reason, scientists expect their computing tools to serve them and not the other way around. What is novel here is a unique combination of hardware and software that reformulates an application into monolithic structure that can be monitored in real-time and dynamically reconfigured in the event of a failure. This unique reformulation of hardware and software will provide advanced aeronautical technologies to meet the challenges of next-generation systems in aviation, for civilian and scientific purposes, in our atmosphere and in atmospheres of other worlds. In particular, with respect to NASA s manned flight to Mars, this technology addresses the critical requirements for improving safety and increasing reliability of manned spacecraft.

  1. 30 CFR 75.1103-10 - Fire suppression systems; additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... requirements. 75.1103-10 Section 75.1103-10 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT... Protection § 75.1103-10 Fire suppression systems; additional requirements. For each conveyor belt flight... per minute, an additional cache of the materials specified in § 75.1103-9(a)(1), (2), and (3) shall be...

  2. 24 CFR 235.1218 - Additional eligibility requirements.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ...; Direct Endorsement § 235.1218 Additional eligibility requirements. (a) Mortgage amount. It must be in an... par on one of the following dates, whichever rate is higher: (i) The date the Direct Endorsement mortgagee's underwriter signs the Mortgage Credit Analysis Worksheet (form HUD-92900 WS); or (ii) The date...

  3. 48 CFR 1352.271-72 - Additional Item Requirements (AIR)-growth work

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... Requirements (AIR)-growth work 1352.271-72 Section 1352.271-72 Federal Acquisition Regulations System... Clauses 1352.271-72 Additional Item Requirements (AIR)—growth work As prescribed in 48 CFR 1371.103, insert the following clause: Additional Item Requirements (Air)—Growth Work (APR 2010) (a) This clause...

  4. Hardware demonstration of flexible beam control

    NASA Technical Reports Server (NTRS)

    Schaechter, D. B.

    1980-01-01

    An experiment employing a pinned-free flexible beam has been constructed to demonstrate and verify several facets of the control of flexible structures. The desired features of the experiment are to demonstrate active shape control, active dynamic control, adaptive control, various control law design approaches, and associated hardware requirements and mechanization difficulties. This paper contains the analytical work performed in support of the facility development, the final design specifications, control law synthesis, and some preliminary results.

  5. Analysis of a hardware and software fault tolerant processor for critical applications

    NASA Technical Reports Server (NTRS)

    Dugan, Joanne B.

    1993-01-01

    Computer systems for critical applications must be designed to tolerate software faults as well as hardware faults. A unified approach to tolerating hardware and software faults is characterized by classifying faults in terms of duration (transient or permanent) rather than source (hardware or software). Errors arising from transient faults can be handled through masking or voting, but errors arising from permanent faults require system reconfiguration to bypass the failed component. Most errors which are caused by software faults can be considered transient, in that they are input-dependent. Software faults are triggered by a particular set of inputs. Quantitative dependability analysis of systems which exhibit a unified approach to fault tolerance can be performed by a hierarchical combination of fault tree and Markov models. A methodology for analyzing hardware and software fault tolerant systems is applied to the analysis of a hypothetical system, loosely based on the Fault Tolerant Parallel Processor. The models consider both transient and permanent faults, hardware and software faults, independent and related software faults, automatic recovery, and reconfiguration.

  6. 46 CFR 196.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 7 2014-10-01 2014-10-01 false Additional requirements for hybrid work vests. 196.34-25 Section 196.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OCEANOGRAPHIC RESEARCH VESSELS OPERATIONS Work Vests § 196.34-25 Additional requirements for hybrid work vests. (a) In addition...

  7. 46 CFR 196.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 7 2010-10-01 2010-10-01 false Additional requirements for hybrid work vests. 196.34-25 Section 196.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OCEANOGRAPHIC RESEARCH VESSELS OPERATIONS Work Vests § 196.34-25 Additional requirements for hybrid work vests. (a) In addition...

  8. 46 CFR 196.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 7 2011-10-01 2011-10-01 false Additional requirements for hybrid work vests. 196.34-25 Section 196.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OCEANOGRAPHIC RESEARCH VESSELS OPERATIONS Work Vests § 196.34-25 Additional requirements for hybrid work vests. (a) In addition...

  9. 46 CFR 196.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 7 2013-10-01 2013-10-01 false Additional requirements for hybrid work vests. 196.34-25 Section 196.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OCEANOGRAPHIC RESEARCH VESSELS OPERATIONS Work Vests § 196.34-25 Additional requirements for hybrid work vests. (a) In addition...

  10. 46 CFR 196.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 7 2012-10-01 2012-10-01 false Additional requirements for hybrid work vests. 196.34-25 Section 196.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) OCEANOGRAPHIC RESEARCH VESSELS OPERATIONS Work Vests § 196.34-25 Additional requirements for hybrid work vests. (a) In addition...

  11. 24 CFR 235.1218 - Additional eligibility requirements.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 24 Housing and Urban Development 2 2011-04-01 2011-04-01 false Additional eligibility requirements... interest due and delinquent interest not to exceed two months; and (2) The original principal amount of the... based on the closing price for three-month forward delivery contracts closest to par but not exceeding...

  12. 25 CFR 215.17 - Additional information required.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 25 Indians 1 2011-04-01 2011-04-01 false Additional information required. 215.17 Section 215.17 Indians BUREAU OF INDIAN AFFAIRS, DEPARTMENT OF THE INTERIOR ENERGY AND MINERALS LEAD AND ZINC MINING... application, must file one certified copy of articles of incorporation and, if a foreign corporation, evidence...

  13. 46 CFR 97.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 4 2013-10-01 2013-10-01 false Additional requirements for hybrid work vests. 97.34-25 Section 97.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) CARGO AND MISCELLANEOUS VESSELS OPERATIONS Work Vests § 97.34-25 Additional requirements for hybrid work vests. (a) In addition to...

  14. 46 CFR 97.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 4 2011-10-01 2011-10-01 false Additional requirements for hybrid work vests. 97.34-25 Section 97.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) CARGO AND MISCELLANEOUS VESSELS OPERATIONS Work Vests § 97.34-25 Additional requirements for hybrid work vests. (a) In addition to...

  15. 46 CFR 78.36-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 3 2011-10-01 2011-10-01 false Additional requirements for hybrid work vests. 78.36-25 Section 78.36-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) PASSENGER VESSELS OPERATIONS Work Vests § 78.36-25 Additional requirements for hybrid work vests. (a) In addition to the other...

  16. 46 CFR 78.36-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 3 2010-10-01 2010-10-01 false Additional requirements for hybrid work vests. 78.36-25 Section 78.36-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) PASSENGER VESSELS OPERATIONS Work Vests § 78.36-25 Additional requirements for hybrid work vests. (a) In addition to the other...

  17. 46 CFR 97.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 4 2010-10-01 2010-10-01 false Additional requirements for hybrid work vests. 97.34-25 Section 97.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) CARGO AND MISCELLANEOUS VESSELS OPERATIONS Work Vests § 97.34-25 Additional requirements for hybrid work vests. (a) In addition to...

  18. 46 CFR 78.36-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 3 2014-10-01 2014-10-01 false Additional requirements for hybrid work vests. 78.36-25 Section 78.36-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) PASSENGER VESSELS OPERATIONS Work Vests § 78.36-25 Additional requirements for hybrid work vests. (a) In addition to the other...

  19. 46 CFR 97.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 4 2012-10-01 2012-10-01 false Additional requirements for hybrid work vests. 97.34-25 Section 97.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) CARGO AND MISCELLANEOUS VESSELS OPERATIONS Work Vests § 97.34-25 Additional requirements for hybrid work vests. (a) In addition to...

  20. 46 CFR 78.36-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 3 2013-10-01 2013-10-01 false Additional requirements for hybrid work vests. 78.36-25 Section 78.36-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) PASSENGER VESSELS OPERATIONS Work Vests § 78.36-25 Additional requirements for hybrid work vests. (a) In addition to the other...

  1. 46 CFR 78.36-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 3 2012-10-01 2012-10-01 false Additional requirements for hybrid work vests. 78.36-25 Section 78.36-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) PASSENGER VESSELS OPERATIONS Work Vests § 78.36-25 Additional requirements for hybrid work vests. (a) In addition to the other...

  2. 46 CFR 97.34-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 4 2014-10-01 2014-10-01 false Additional requirements for hybrid work vests. 97.34-25 Section 97.34-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) CARGO AND MISCELLANEOUS VESSELS OPERATIONS Work Vests § 97.34-25 Additional requirements for hybrid work vests. (a) In addition to...

  3. Fast image interpolation for motion estimation using graphics hardware

    NASA Astrophysics Data System (ADS)

    Kelly, Francis; Kokaram, Anil

    2004-05-01

    Motion estimation and compensation is the key to high quality video coding. Block matching motion estimation is used in most video codecs, including MPEG-2, MPEG-4, H.263 and H.26L. Motion estimation is also a key component in the digital restoration of archived video and for post-production and special effects in the movie industry. Sub-pixel accurate motion vectors can improve the quality of the vector field and lead to more efficient video coding. However sub-pixel accuracy requires interpolation of the image data. Image interpolation is a key requirement of many image processing algorithms. Often interpolation can be a bottleneck in these applications, especially in motion estimation due to the large number pixels involved. In this paper we propose using commodity computer graphics hardware for fast image interpolation. We use the full search block matching algorithm to illustrate the problems and limitations of using graphics hardware in this way.

  4. Choice of word length in the design of a specialized hardware for lossless wavelet compression of medical images

    NASA Astrophysics Data System (ADS)

    Urriza, Isidro; Barragan, Luis A.; Artigas, Jose I.; Garcia, Jose I.; Navarro, Denis

    1997-11-01

    Image compression plays an important role in the archiving and transmission of medical images. Discrete cosine transform (DCT)-based compression methods are not suitable for medical images because of block-like image artifacts that could mask or be mistaken for pathology. Wavelet transforms (WTs) are used to overcome this problem. When implementing WTs in hardware, finite precision arithmetic introduces quantization errors. However, lossless compression is usually required in the medical image field. Thus, the hardware designer must look for the optimum register length that, while ensuring the lossless accuracy criteria, will also lead to a high-speed implementation with small chip area. In addition, wavelet choice is a critical issue that affects image quality as well as system design. We analyze the filters best suited to image compression that appear in the literature. For them, we obtain the maximum quantization errors produced in the calculation of the WT components. Thus, we deduce the minimum word length required for the reconstructed image to be numerically identical to the original image. The theoretical results are compared with experimental results obtained from algorithm simulations on random test images. These results enable us to compare the hardware implementation cost of the different filter banks. Moreover, to reduce the word length, we have analyzed the case of increasing the integer part of the numbers while maintaining constant the word length when the scale increases.

  5. 25 CFR 215.17 - Additional information required.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... interested in lead and zinc mining leases, or land under the jurisdiction of the Quapaw Indian Agency, and... 25 Indians 1 2010-04-01 2010-04-01 false Additional information required. 215.17 Section 215.17 Indians BUREAU OF INDIAN AFFAIRS, DEPARTMENT OF THE INTERIOR ENERGY AND MINERALS LEAD AND ZINC MINING...

  6. 46 CFR 42.09-30 - Additional survey requirements for steel-hull vessels.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 2 2011-10-01 2011-10-01 false Additional survey requirements for steel-hull vessels...-30 Additional survey requirements for steel-hull vessels. (a) In addition to the requirements in § 42..., peaks, bilges, machinery spaces, and bunkers shall be examined to determine the condition of the framing...

  7. 46 CFR 42.09-30 - Additional survey requirements for steel-hull vessels.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 2 2012-10-01 2012-10-01 false Additional survey requirements for steel-hull vessels. 42.09-30 Section 42.09-30 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD...-30 Additional survey requirements for steel-hull vessels. (a) In addition to the requirements in § 42...

  8. 46 CFR 42.09-30 - Additional survey requirements for steel-hull vessels.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 2 2014-10-01 2014-10-01 false Additional survey requirements for steel-hull vessels. 42.09-30 Section 42.09-30 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD...-30 Additional survey requirements for steel-hull vessels. (a) In addition to the requirements in § 42...

  9. 46 CFR 42.09-30 - Additional survey requirements for steel-hull vessels.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 2 2013-10-01 2013-10-01 false Additional survey requirements for steel-hull vessels. 42.09-30 Section 42.09-30 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD...-30 Additional survey requirements for steel-hull vessels. (a) In addition to the requirements in § 42...

  10. 46 CFR 42.09-35 - Additional survey requirements for wood-hull vessels.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 2 2013-10-01 2013-10-01 false Additional survey requirements for wood-hull vessels. 42.09-35 Section 42.09-35 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD LINES... Additional survey requirements for wood-hull vessels. (a) In addition to the requirements in § 42.09-25, the...

  11. 46 CFR 42.09-35 - Additional survey requirements for wood-hull vessels.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 2 2012-10-01 2012-10-01 false Additional survey requirements for wood-hull vessels. 42.09-35 Section 42.09-35 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD LINES... Additional survey requirements for wood-hull vessels. (a) In addition to the requirements in § 42.09-25, the...

  12. 46 CFR 42.09-35 - Additional survey requirements for wood-hull vessels.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 2 2014-10-01 2014-10-01 false Additional survey requirements for wood-hull vessels. 42.09-35 Section 42.09-35 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD LINES... Additional survey requirements for wood-hull vessels. (a) In addition to the requirements in § 42.09-25, the...

  13. 46 CFR 42.09-35 - Additional survey requirements for wood-hull vessels.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 2 2010-10-01 2010-10-01 false Additional survey requirements for wood-hull vessels. 42.09-35 Section 42.09-35 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD LINES... Additional survey requirements for wood-hull vessels. (a) In addition to the requirements in § 42.09-25, the...

  14. 46 CFR 42.09-30 - Additional survey requirements for steel-hull vessels.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 2 2010-10-01 2010-10-01 false Additional survey requirements for steel-hull vessels...-30 Additional survey requirements for steel-hull vessels. (a) In addition to the requirements in § 42...) When the vessel is in drydock, the hull plating, etc., shall be examined. (c) The holds, 'tween decks...

  15. 46 CFR 42.09-35 - Additional survey requirements for wood-hull vessels.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 2 2011-10-01 2011-10-01 false Additional survey requirements for wood-hull vessels. 42.09-35 Section 42.09-35 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) LOAD LINES... Additional survey requirements for wood-hull vessels. (a) In addition to the requirements in § 42.09-25, the...

  16. An evaluation of Skylab habitability hardware

    NASA Technical Reports Server (NTRS)

    Stokes, J.

    1974-01-01

    For effective mission performance, participants in space missions lasting 30-60 days or longer must be provided with hardware to accommodate their personal needs. Such habitability hardware was provided on Skylab. Equipment defined as habitability hardware was that equipment composing the food system, water system, sleep system, waste management system, personal hygiene system, trash management system, and entertainment equipment. Equipment not specifically defined as habitability hardware but which served that function were the Wardroom window, the exercise equipment, and the intercom system, which was occasionally used for private communications. All Skylab habitability hardware generally functioned as intended for the three missions, and most items could be considered as adequate concepts for future flights of similar duration. Specific components were criticized for their shortcomings.

  17. Contamination of planets by nonsterile flight hardware.

    NASA Technical Reports Server (NTRS)

    Wolfson, R. P.; Craven, C. W.

    1971-01-01

    The various factors about space missions and spacecraft involved in the study of nonsterile space flight hardware with respect to their effects on planetary quarantine are reviewed. It is shown that methodology currently exists to evaluate the various potential contamination sources and to take appropriate steps in the design of spacecraft ha rdware and mission parameters so that quarantine constraints are met. This work should be done for each program so that the latest knowledge pertaining to various biological questions is utilized, and so that the specific hardware designs of the program can be assessed. The general trend of specific recommendations include: (1) biasing the launch trajectory away from planet to assure against accidental impact of the spacecraft; (2) selecting planetary orbits that meet quarantine requirements - both for accidental impact and for minimizing contamination probabilities due to ejecta; and (3) manufacturing and handling spacecraft under cleanliness conditions assuring minimum bioload.

  18. Space station common module network topology and hardware development

    NASA Technical Reports Server (NTRS)

    Anderson, P.; Braunagel, L.; Chwirka, S.; Fishman, M.; Freeman, K.; Eason, D.; Landis, D.; Lech, L.; Martin, J.; Mccorkle, J.

    1990-01-01

    Conceptual space station common module power management and distribution (SSM/PMAD) network layouts and detailed network evaluations were developed. Individual pieces of hardware to be developed for the SSM/PMAD test bed were identified. A technology assessment was developed to identify pieces of equipment requiring development effort. Equipment lists were developed from the previously selected network schematics. Additionally, functional requirements for the network equipment as well as other requirements which affected the suitability of specific items for use on the Space Station Program were identified. Assembly requirements were derived based on the SSM/PMAD developed requirements and on the selected SSM/PMAD network concepts. Basic requirements and simplified design block diagrams are included. DC remote power controllers were successfully integrated into the DC Marshall Space Flight Center breadboard. Two DC remote power controller (RPC) boards experienced mechanical failure of UES 706 stud-mounted diodes during mechanical installation of the boards into the system. These broken diodes caused input to output shorting of the RPC's. The UES 706 diodes were replaced on these RPC's which eliminated the problem. The DC RPC's as existing in the present breadboard configuration do not provide ground fault protection because the RPC was designed to only switch the hot side current. If ground fault protection were to be implemented, it would be necessary to design the system so the RPC switched both the hot and the return sides of power.

  19. Test Hardware Design for Flight-Like Operation of Advanced Stirling Convertors

    NASA Technical Reports Server (NTRS)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  20. 46 CFR 95.17-25 - Additional protection required.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... FIRE PROTECTION EQUIPMENT Foam Extinguishing Systems, Details § 95.17-25 Additional protection required. (a) In order that any residual fires above the floor plates may be extinguished when a foam system is...

  1. 46 CFR 76.17-25 - Additional protection required.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... PROTECTION EQUIPMENT Foam Extinguishing Systems, Details § 76.17-25 Additional protection required. (a) In order that any residual fires above the floor plates may be extinguished when a foam system is installed...

  2. 46 CFR 95.17-25 - Additional protection required.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... FIRE PROTECTION EQUIPMENT Foam Extinguishing Systems, Details § 95.17-25 Additional protection required. (a) In order that any residual fires above the floor plates may be extinguished when a foam system is...

  3. 46 CFR 76.17-25 - Additional protection required.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... PROTECTION EQUIPMENT Foam Extinguishing Systems, Details § 76.17-25 Additional protection required. (a) In order that any residual fires above the floor plates may be extinguished when a foam system is installed...

  4. Hardware-in-the-loop tow missile system simulator

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Waldman, G.S.; Wootton, J.R.; Hobson, G.L.

    1993-07-06

    A missile system simulator is described for use in training people for target acquisition, missile launch, and missile guidance under simulated battlefield conditions comprising: simulating means for producing a digital signal representing a simulated battlefield environment including at least one target movable therewithin, the simulating means generating an infrared map representing the field-of-view and the target; interface means for converting said digital signals to an infrared image; missile system hardware including the missile acquisition, tracking, and guidance portions thereof, said hardware sensing the infrared image to determine the location of the target in a field-of-view; and, image means for generatingmore » an infrared image of a missile launched at the target and guided thereto, the image means imposing the missile image onto the field-of-view for the missile hardware to acquire the image of the missile in addition to that of the target, and to generate guidance signals to guide the missile image to the target image, wherein the interfacing means is responsive to a guidance signal from the hardware to simulate, in real-time, the response of the missile to the guidance signal, the image means including a blackbody, laser means for irradiating the blackbody to heat it to a temperature at which it emits infrared radiation, and optic means for integrating the radiant image produced by heating the blackbody into the infrared map.« less

  5. Door Hardware and Installations; Carpentry: 901894.

    ERIC Educational Resources Information Center

    Dade County Public Schools, Miami, FL.

    The curriculum guide outlines a course designed to provide instruction in the selection, preparation, and installation of hardware for door assemblies. The course is divided into five blocks of instruction (introduction to doors and hardware, door hardware, exterior doors and jambs, interior doors and jambs, and a quinmester post-test) totaling…

  6. Performance of Adsorption - Based CO2 Acquisition Hardware for Mars ISRU

    NASA Technical Reports Server (NTRS)

    Finn, John E.; Mulloth, Lila M.; Borchers, Bruce A.; Luna, Bernadette (Technical Monitor)

    2000-01-01

    Chemical processing of the dusty, low-pressure Martian atmosphere typically requires conditioning and compression of the gases as first steps. A temperature-swing adsorption process can perform these tasks using nearly solid-state hardware and with relatively low power consumption compared to alternative processes. In addition, the process can separate the atmospheric constituents, producing both pressurized CO2 and a buffer gas mixture of nitrogen and argon. To date we have developed and tested adsorption compressors at scales appropriate for the near-term robotic missions that will lead the way to ISRU-based human exploration missions. In this talk we describe the characteristics, testing, and performance of these devices. We also discuss scale-up issues associated with meeting the processing demands of sample return and human missions.

  7. Hardware-Efficient On-line Learning through Pipelined Truncated-Error Backpropagation in Binary-State Networks

    PubMed Central

    Mostafa, Hesham; Pedroni, Bruno; Sheik, Sadique; Cauwenberghs, Gert

    2017-01-01

    Artificial neural networks (ANNs) trained using backpropagation are powerful learning architectures that have achieved state-of-the-art performance in various benchmarks. Significant effort has been devoted to developing custom silicon devices to accelerate inference in ANNs. Accelerating the training phase, however, has attracted relatively little attention. In this paper, we describe a hardware-efficient on-line learning technique for feedforward multi-layer ANNs that is based on pipelined backpropagation. Learning is performed in parallel with inference in the forward pass, removing the need for an explicit backward pass and requiring no extra weight lookup. By using binary state variables in the feedforward network and ternary errors in truncated-error backpropagation, the need for any multiplications in the forward and backward passes is removed, and memory requirements for the pipelining are drastically reduced. Further reduction in addition operations owing to the sparsity in the forward neural and backpropagating error signal paths contributes to highly efficient hardware implementation. For proof-of-concept validation, we demonstrate on-line learning of MNIST handwritten digit classification on a Spartan 6 FPGA interfacing with an external 1Gb DDR2 DRAM, that shows small degradation in test error performance compared to an equivalently sized binary ANN trained off-line using standard back-propagation and exact errors. Our results highlight an attractive synergy between pipelined backpropagation and binary-state networks in substantially reducing computation and memory requirements, making pipelined on-line learning practical in deep networks. PMID:28932180

  8. Hardware-Efficient On-line Learning through Pipelined Truncated-Error Backpropagation in Binary-State Networks.

    PubMed

    Mostafa, Hesham; Pedroni, Bruno; Sheik, Sadique; Cauwenberghs, Gert

    2017-01-01

    Artificial neural networks (ANNs) trained using backpropagation are powerful learning architectures that have achieved state-of-the-art performance in various benchmarks. Significant effort has been devoted to developing custom silicon devices to accelerate inference in ANNs. Accelerating the training phase, however, has attracted relatively little attention. In this paper, we describe a hardware-efficient on-line learning technique for feedforward multi-layer ANNs that is based on pipelined backpropagation. Learning is performed in parallel with inference in the forward pass, removing the need for an explicit backward pass and requiring no extra weight lookup. By using binary state variables in the feedforward network and ternary errors in truncated-error backpropagation, the need for any multiplications in the forward and backward passes is removed, and memory requirements for the pipelining are drastically reduced. Further reduction in addition operations owing to the sparsity in the forward neural and backpropagating error signal paths contributes to highly efficient hardware implementation. For proof-of-concept validation, we demonstrate on-line learning of MNIST handwritten digit classification on a Spartan 6 FPGA interfacing with an external 1Gb DDR2 DRAM, that shows small degradation in test error performance compared to an equivalently sized binary ANN trained off-line using standard back-propagation and exact errors. Our results highlight an attractive synergy between pipelined backpropagation and binary-state networks in substantially reducing computation and memory requirements, making pipelined on-line learning practical in deep networks.

  9. 33 CFR 105.290 - Additional requirements-cruise ship terminals.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 33 Navigation and Navigable Waters 1 2011-07-01 2011-07-01 false Additional requirements-cruise ship terminals. 105.290 Section 105.290 Navigation and Navigable Waters COAST GUARD, DEPARTMENT OF... Additional requirements—cruise ship terminals. At all MARSEC Levels, in coordination with a vessel moored at...

  10. 33 CFR 105.290 - Additional requirements-cruise ship terminals.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 33 Navigation and Navigable Waters 1 2012-07-01 2012-07-01 false Additional requirements-cruise ship terminals. 105.290 Section 105.290 Navigation and Navigable Waters COAST GUARD, DEPARTMENT OF... Additional requirements—cruise ship terminals. At all MARSEC Levels, in coordination with a vessel moored at...

  11. 33 CFR 105.290 - Additional requirements-cruise ship terminals.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 33 Navigation and Navigable Waters 1 2013-07-01 2013-07-01 false Additional requirements-cruise ship terminals. 105.290 Section 105.290 Navigation and Navigable Waters COAST GUARD, DEPARTMENT OF... Additional requirements—cruise ship terminals. At all MARSEC Levels, in coordination with a vessel moored at...

  12. 33 CFR 105.290 - Additional requirements-cruise ship terminals.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 33 Navigation and Navigable Waters 1 2014-07-01 2014-07-01 false Additional requirements-cruise ship terminals. 105.290 Section 105.290 Navigation and Navigable Waters COAST GUARD, DEPARTMENT OF... Additional requirements—cruise ship terminals. At all MARSEC Levels, in coordination with a vessel moored at...

  13. 14 CFR 61.31 - Type rating requirements, additional training, and authorization requirements.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... holder is already qualified. (k) Additional training required for night vision goggle operations. (1... aircraft using night vision goggles only if that person receives and logs ground training from an...: (i) Applicable portions of this chapter that relate to night vision goggle limitations and flight...

  14. 14 CFR 61.31 - Type rating requirements, additional training, and authorization requirements.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... holder is already qualified. (k) Additional training required for night vision goggle operations. (1... aircraft using night vision goggles only if that person receives and logs ground training from an...: (i) Applicable portions of this chapter that relate to night vision goggle limitations and flight...

  15. ISS Logistics Hardware Disposition and Metrics Validation

    NASA Technical Reports Server (NTRS)

    Rogers, Toneka R.

    2010-01-01

    I was assigned to the Logistics Division of the International Space Station (ISS)/Spacecraft Processing Directorate. The Division consists of eight NASA engineers and specialists that oversee the logistics portion of the Checkout, Assembly, and Payload Processing Services (CAPPS) contract. Boeing, their sub-contractors and the Boeing Prime contract out of Johnson Space Center, provide the Integrated Logistics Support for the ISS activities at Kennedy Space Center. Essentially they ensure that spares are available to support flight hardware processing and the associated ground support equipment (GSE). Boeing maintains a Depot for electrical, mechanical and structural modifications and/or repair capability as required. My assigned task was to learn project management techniques utilized by NASA and its' contractors to provide an efficient and effective logistics support infrastructure to the ISS program. Within the Space Station Processing Facility (SSPF) I was exposed to Logistics support components, such as, the NASA Spacecraft Services Depot (NSSD) capabilities, Mission Processing tools, techniques and Warehouse support issues, required for integrating Space Station elements at the Kennedy Space Center. I also supported the identification of near-term ISS Hardware and Ground Support Equipment (GSE) candidates for excessing/disposition prior to October 2010; and the validation of several Logistics Metrics used by the contractor to measure logistics support effectiveness.

  16. Advanced flight hardware for organic separations

    NASA Astrophysics Data System (ADS)

    Deuser, Mark S.; Vellinger, John C.; Weber, John T.

    1997-01-01

    Aqueous Two-Phase Partitioning (ATPP) is a unique separation technique which allows purification and classification of biological materials. SHOT has employed the ATPP process in separation equipment developed for both space and ground applications. Initial equipment development and research focused on the ORganic SEParation (ORSEP) space flight experiments that were performed on suborbital rockets and the shuttle. ADvanced SEParations (ADSEP) technology was developed as the next generation of ORSEP equipment through a NASA Small Business Innovation Research (SBIR) contract. Under the SBIR contract, a marketing study was conducted, indicating a growing commercial market exists among biotechnology firms for ADSEP equipment and associated flight research and development services. SHOT is preparing to begin manufacturing and marketing laboratory versions of the ADSEP hardware for the ground-based market. In addition, through a self-financed SBIR Phase III effort, SHOT fabricated and integrated the ADSEP flight hardware for a commercially-driven flight experiment as the initial step in marketing space processing services. The ADSEP ground-based and microgravity research is expected to play a vital role in developing important new biomedical and pharmaceutical products.

  17. Hardware cleanliness methodology and certification

    NASA Technical Reports Server (NTRS)

    Harvey, Gale A.; Lash, Thomas J.; Rawls, J. Richard

    1995-01-01

    Inadequacy of mass loss cleanliness criteria for selection of materials for contamination sensitive uses, and processing of flight hardware for contamination sensitive instruments is discussed. Materials selection for flight hardware is usually based on mass loss (ASTM E-595). However, flight hardware cleanliness (MIL 1246A) is a surface cleanliness assessment. It is possible for materials (e.g. Sil-Pad 2000) to pass ASTM E-595 and fail MIL 1246A class A by orders of magnitude. Conversely, it is possible for small amounts of nonconforming material (Huma-Seal conformal coating) to not present significant cleanliness problems to an optical flight instrument. Effective cleaning (precleaning, precision cleaning, and ultra cleaning) and cleanliness verification are essential for contamination sensitive flight instruments. Polish cleaning of hardware, e.g. vacuum baking for vacuum applications, and storage of clean hardware, e.g. laser optics, is discussed. Silicone materials present special concerns for use in space because of the rapid conversion of the outgassed residues to glass by solar ultraviolet radiation and/or atomic oxygen. Non ozone depleting solvent cleaning and institutional support for cleaning and certification are also discussed.

  18. Eglin virtual range database for hardware-in-the-loop testing

    NASA Astrophysics Data System (ADS)

    Talele, Sunjay E.; Pickard, J. W., Jr.; Owens, Monte A.; Foster, Joseph; Watson, John S.; Amick, Mary Amenda; Anthony, Kenneth

    1998-07-01

    Realistic backgrounds are necessary to support high fidelity hardware-in-the-loop testing. Advanced avionics and weapon system sensors are driving the requirement for higher resolution imagery. The model-test-model philosophy being promoted by the T&E community is resulting in the need for backgrounds that are realistic or virtual representations of actual test areas. Combined, these requirements led to a major upgrade of the terrain database used for hardware-in-the-loop testing at the Guided Weapons Evaluation Facility (GWEF) at Eglin Air Force Base, Florida. This paper will describe the process used to generate the high-resolution (1-foot) database of ten sites totaling over 20 square kilometers of the Eglin range. this process involved generating digital elevation maps from stereo aerial imagery and classifying ground cover material using the spectral content. These databases were then optimized for real-time operation at 90 Hz.

  19. 45 CFR 162.925 - Additional requirements for health plans.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 45 Public Welfare 1 2013-10-01 2013-10-01 false Additional requirements for health plans. 162.925 Section 162.925 Public Welfare DEPARTMENT OF HEALTH AND HUMAN SERVICES ADMINISTRATIVE DATA STANDARDS AND... requirements for health plans. (a) General rules. (1) If an entity requests a health plan to conduct a...

  20. 45 CFR 162.925 - Additional requirements for health plans.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 45 Public Welfare 1 2014-10-01 2014-10-01 false Additional requirements for health plans. 162.925 Section 162.925 Public Welfare Department of Health and Human Services ADMINISTRATIVE DATA STANDARDS AND... requirements for health plans. (a) General rules. (1) If an entity requests a health plan to conduct a...

  1. 45 CFR 162.925 - Additional requirements for health plans.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... clearinghouse to receive, process, or transmit a standard transaction may not charge fees or costs in excess of... RELATED REQUIREMENTS ADMINISTRATIVE REQUIREMENTS General Provisions for Transactions § 162.925 Additional... transaction as a standard transaction, the health plan must do so. (2) A health plan may not delay or reject a...

  2. OPTiM: Optical projection tomography integrated microscope using open-source hardware and software

    PubMed Central

    Andrews, Natalie; Davis, Samuel; Bugeon, Laurence; Dallman, Margaret D.; McGinty, James

    2017-01-01

    We describe the implementation of an OPT plate to perform optical projection tomography (OPT) on a commercial wide-field inverted microscope, using our open-source hardware and software. The OPT plate includes a tilt adjustment for alignment and a stepper motor for sample rotation as required by standard projection tomography. Depending on magnification requirements, three methods of performing OPT are detailed using this adaptor plate: a conventional direct OPT method requiring only the addition of a limiting aperture behind the objective lens; an external optical-relay method allowing conventional OPT to be performed at magnifications >4x; a remote focal scanning and region-of-interest method for improved spatial resolution OPT (up to ~1.6 μm). All three methods use the microscope’s existing incoherent light source (i.e. arc-lamp) and all of its inherent functionality is maintained for day-to-day use. OPT acquisitions are performed on in vivo zebrafish embryos to demonstrate the implementations’ viability. PMID:28700724

  3. Space biology initiative program definition review. Trade study 2: Prototype utilization in the development of space biology hardware

    NASA Technical Reports Server (NTRS)

    Jackson, L. Neal; Crenshaw, John, Sr.; Schulze, Arthur E.; Wood, H. J., Jr.

    1989-01-01

    The objective was to define the factors which space flight hardware developers and planners should consider when determining: (1) the number of hardware units required to support program; (2) design level of the units; and (3) most efficient means of utilization of the units. The analysis considered technology risk, maintainability, reliability, and safety design requirements for achieving the delivery of highest quality flight hardware. Relative cost impacts of the utilization of prototyping were identified. The development of Space Biology Initiative research hardware will involve intertwined hardware/software activities. Experience has shown that software development can be an expensive portion of a system design program. While software prototyping could imply the development of a significantly different end item, an operational system prototype must be considered to be a combination of software and hardware. Hundreds of factors were identified that could be considered in determining the quantity and types of prototypes that should be constructed. In developing the decision models, these factors were combined and reduced by approximately ten-to-one in order to develop a manageable structure based on the major determining factors. The Baseline SBI hardware list of Appendix D was examined and reviewed in detail; however, from the facts available it was impossible to identify the exact types and quantities of prototypes required for each of these items. Although the factors that must be considered could be enumerated for each of these pieces of equipment, the exact status and state of development of the equipment is variable and uncertain at this time.

  4. Mechanically verified hardware implementing an 8-bit parallel IO Byzantine agreement processor

    NASA Technical Reports Server (NTRS)

    Moore, J. Strother

    1992-01-01

    Consider a network of four processors that use the Oral Messages (Byzantine Generals) Algorithm of Pease, Shostak, and Lamport to achieve agreement in the presence of faults. Bevier and Young have published a functional description of a single processor that, when interconnected appropriately with three identical others, implements this network under the assumption that the four processors step in synchrony. By formalizing the original Pease, et al work, Bevier and Young mechanically proved that such a network achieves fault tolerance. We develop, formalize, and discuss a hardware design that has been mechanically proven to implement their processor. In particular, we formally define mapping functions from the abstract state space of the Bevier-Young processor to a concrete state space of a hardware module and state a theorem that expresses the claim that the hardware correctly implements the processor. We briefly discuss the Brock-Hunt Formal Hardware Description Language which permits designs both to be proved correct with the Boyer-Moore theorem prover and to be expressed in a commercially supported hardware description language for additional electrical analysis and layout. We briefly describe our implementation.

  5. PREPARING FOR EXASCALE: ORNL Leadership Computing Application Requirements and Strategy

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Joubert, Wayne; Kothe, Douglas B; Nam, Hai Ah

    2009-12-01

    In 2009 the Oak Ridge Leadership Computing Facility (OLCF), a U.S. Department of Energy (DOE) facility at the Oak Ridge National Laboratory (ORNL) National Center for Computational Sciences (NCCS), elicited petascale computational science requirements from leading computational scientists in the international science community. This effort targeted science teams whose projects received large computer allocation awards on OLCF systems. A clear finding of this process was that in order to reach their science goals over the next several years, multiple projects will require computational resources in excess of an order of magnitude more powerful than those currently available. Additionally, for themore » longer term, next-generation science will require computing platforms of exascale capability in order to reach DOE science objectives over the next decade. It is generally recognized that achieving exascale in the proposed time frame will require disruptive changes in computer hardware and software. Processor hardware will become necessarily heterogeneous and will include accelerator technologies. Software must undergo the concomitant changes needed to extract the available performance from this heterogeneous hardware. This disruption portends to be substantial, not unlike the change to the message passing paradigm in the computational science community over 20 years ago. Since technological disruptions take time to assimilate, we must aggressively embark on this course of change now, to insure that science applications and their underlying programming models are mature and ready when exascale computing arrives. This includes initiation of application readiness efforts to adapt existing codes to heterogeneous architectures, support of relevant software tools, and procurement of next-generation hardware testbeds for porting and testing codes. The 2009 OLCF requirements process identified numerous actions necessary to meet this challenge: (1) Hardware capabilities

  6. 16 CFR 1509.7 - Hardware.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... NON-FULL-SIZE BABY CRIBS § 1509.7 Hardware. (a) The hardware in a non-full-size baby crib shall be... abuse. (b) Non-full-size baby cribs shall incorporate locking or latching devices for dropsides or... non-full-size baby crib. ...

  7. Commercial Aircraft Maintenance Experience Relating to Engine External Hardware

    NASA Technical Reports Server (NTRS)

    Soditus, Sharon M.

    2006-01-01

    Airlines are extremely sensitive to the amount of dollars spent on maintaining the external engine hardware in the field. Analysis reveals that many problems revolve around a central issue, reliability. Fuel and oil leakage due to seal failure and electrical fault messages due to wire harness failures play a major role in aircraft delays and cancellations (D&C's) and scheduled maintenance. Correcting these items on the line requires a large investment of engineering resources and manpower after the fact. The smartest and most cost effective philosophy is to build the best hardware the first time. The only way to do that is to completely understand and model the operating environment, study the field experience of similar designs and to perform extensive testing.

  8. Hardware multiplier processor

    DOEpatents

    Pierce, Paul E.

    1986-01-01

    A hardware processor is disclosed which in the described embodiment is a memory mapped multiplier processor that can operate in parallel with a 16 bit microcomputer. The multiplier processor decodes the address bus to receive specific instructions so that in one access it can write and automatically perform single or double precision multiplication involving a number written to it with or without addition or subtraction with a previously stored number. It can also, on a single read command automatically round and scale a previously stored number. The multiplier processor includes two concatenated 16 bit multiplier registers, two 16 bit concatenated 16 bit multipliers, and four 16 bit product registers connected to an internal 16 bit data bus. A high level address decoder determines when the multiplier processor is being addressed and first and second low level address decoders generate control signals. In addition, certain low order address lines are used to carry uncoded control signals. First and second control circuits coupled to the decoders generate further control signals and generate a plurality of clocking pulse trains in response to the decoded and address control signals.

  9. Hardware multiplier processor

    DOEpatents

    Pierce, P.E.

    A hardware processor is disclosed which in the described embodiment is a memory mapped multiplier processor that can operate in parallel with a 16 bit microcomputer. The multiplier processor decodes the address bus to receive specific instructions so that in one access it can write and automatically perform single or double precision multiplication involving a number written to it with or without addition or subtraction with a previously stored number. It can also, on a single read command automatically round and scale a previously stored number. The multiplier processor includes two concatenated 16 bit multiplier registers, two 16 bit concatenated 16 bit multipliers, and four 16 bit product registers connected to an internal 16 bit data bus. A high level address decoder determines when the multiplier processor is being addressed and first and second low level address decoders generate control signals. In addition, certain low order address lines are used to carry uncoded control signals. First and second control circuits coupled to the decoders generate further control signals and generate a plurality of clocking pulse trains in response to the decoded and address control signals.

  10. 40 CFR 144.85 - Do these additional requirements apply to me?

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 40 Protection of Environment 24 2013-07-01 2013-07-01 false Do these additional requirements apply to me? 144.85 Section 144.85 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED... Vehicle Waste Disposal Wells § 144.85 Do these additional requirements apply to me? (a) Large-capacity...

  11. 40 CFR 144.85 - Do these additional requirements apply to me?

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 40 Protection of Environment 23 2011-07-01 2011-07-01 false Do these additional requirements apply to me? 144.85 Section 144.85 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED... Vehicle Waste Disposal Wells § 144.85 Do these additional requirements apply to me? (a) Large-capacity...

  12. 40 CFR 144.85 - Do these additional requirements apply to me?

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 40 Protection of Environment 22 2010-07-01 2010-07-01 false Do these additional requirements apply to me? 144.85 Section 144.85 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED... of Class V Injection Wells § 144.85 Do these additional requirements apply to me? (a) Large-Capacity...

  13. 20 CFR 666.110 - May a Governor require additional indicators of performance?

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 20 Employees' Benefits 3 2011-04-01 2011-04-01 false May a Governor require additional indicators... of Performance § 666.110 May a Governor require additional indicators of performance? Yes, Governors may develop additional indicators of performance for adults, youth and dislocated worker activities...

  14. 20 CFR 666.110 - May a Governor require additional indicators of performance?

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 3 2010-04-01 2010-04-01 false May a Governor require additional indicators... of Performance § 666.110 May a Governor require additional indicators of performance? Yes, Governors may develop additional indicators of performance for adults, youth and dislocated worker activities...

  15. ZEUS hardware control system

    NASA Astrophysics Data System (ADS)

    Loveless, R.; Erhard, P.; Ficenec, J.; Gather, K.; Heath, G.; Iacovacci, M.; Kehres, J.; Mobayyen, M.; Notz, D.; Orr, R.; Orr, R.; Sephton, A.; Stroili, R.; Tokushuku, K.; Vogel, W.; Whitmore, J.; Wiggers, L.

    1989-12-01

    The ZEUS collaboration is building a system to monitor, control and document the hardware of the ZEUS detector. This system is based on a network of VAX computers and microprocessors connected via ethernet. The database for the hardware values will be ADAMO tables; the ethernet connection will be DECNET, TCP/IP, or RPC. Most of the documentation will also be kept in ADAMO tables for easy access by users.

  16. 46 CFR 167.43-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 7 2014-10-01 2014-10-01 false Additional requirements for hybrid work vests. 167.43-25 Section 167.43-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) NAUTICAL SCHOOLS PUBLIC NAUTICAL SCHOOL SHIPS Work Vests § 167.43-25 Additional requirements for hybrid work vests. (a) In...

  17. 46 CFR 167.43-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 7 2012-10-01 2012-10-01 false Additional requirements for hybrid work vests. 167.43-25 Section 167.43-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) NAUTICAL SCHOOLS PUBLIC NAUTICAL SCHOOL SHIPS Work Vests § 167.43-25 Additional requirements for hybrid work vests. (a) In...

  18. 46 CFR 167.43-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 7 2013-10-01 2013-10-01 false Additional requirements for hybrid work vests. 167.43-25 Section 167.43-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) NAUTICAL SCHOOLS PUBLIC NAUTICAL SCHOOL SHIPS Work Vests § 167.43-25 Additional requirements for hybrid work vests. (a) In...

  19. 46 CFR 167.43-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 46 Shipping 7 2010-10-01 2010-10-01 false Additional requirements for hybrid work vests. 167.43-25 Section 167.43-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) NAUTICAL SCHOOLS PUBLIC NAUTICAL SCHOOL SHIPS Work Vests § 167.43-25 Additional requirements for hybrid work vests. (a) In...

  20. 46 CFR 167.43-25 - Additional requirements for hybrid work vests.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 7 2011-10-01 2011-10-01 false Additional requirements for hybrid work vests. 167.43-25 Section 167.43-25 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) NAUTICAL SCHOOLS PUBLIC NAUTICAL SCHOOL SHIPS Work Vests § 167.43-25 Additional requirements for hybrid work vests. (a) In...

  1. Hardware cloth seed-spot screens reduce high surface soil temperature

    Treesearch

    H.A. Fowells; R.K. Arnold

    1939-01-01

    Screens made of hardware cloth are commonly used to protect seed-spots in forest plantations from the depredations of birds and rodents. It is important to know whether or not the screens influence germination and survival of seedlings in addition to furnishing protection against animals.

  2. Energy Efficient Engine combustor test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Burrus, D. L.; Chahrour, C. A.; Foltz, H. L.; Sabla, P. E.; Seto, S. P.; Taylor, J. R.

    1984-01-01

    The Energy Efficient Engine (E3) Combustor Development effort was conducted as part of the overall NASA/GE E3 Program. This effort included the selection of an advanced double-annular combustion system design. The primary intent was to evolve a design which meets the stringent emissions and life goals of the E3 as well as all of the usual performance requirements of combustion systems for modern turbofan engines. Numerous detailed design studies were conducted to define the features of the combustion system design. Development test hardware was fabricated, and an extensive testing effort was undertaken to evaluate the combustion system subcomponents in order to verify and refine the design. Technology derived from this development effort will be incorporated into the engine combustion system hardware design. This advanced engine combustion system will then be evaluated in component testing to verify the design intent. What is evolving from this development effort is an advanced combustion system capable of satisfying all of the combustion system design objectives and requirements of the E3. Fuel nozzle, diffuser, starting, and emissions design studies are discussed.

  3. 40 CFR 60.4176 - Additional requirements to provide heat input data.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 40 Protection of Environment 6 2010-07-01 2010-07-01 false Additional requirements to provide heat... Compliance Times for Coal-Fired Electric Steam Generating Units Monitoring and Reporting § 60.4176 Additional requirements to provide heat input data. The owner or operator of a Hg Budget unit that monitors and reports Hg...

  4. NDAS Hardware Translation Layer Development

    NASA Technical Reports Server (NTRS)

    Nazaretian, Ryan N.; Holladay, Wendy T.

    2011-01-01

    The NASA Data Acquisition System (NDAS) project is aimed to replace all DAS software for NASA s Rocket Testing Facilities. There must be a software-hardware translation layer so the software can properly talk to the hardware. Since the hardware from each test stand varies, drivers for each stand have to be made. These drivers will act more like plugins for the software. If the software is being used in E3, then the software should point to the E3 driver package. If the software is being used at B2, then the software should point to the B2 driver package. The driver packages should also be filled with hardware drivers that are universal to the DAS system. For example, since A1, A2, and B2 all use the Preston 8300AU signal conditioners, then the driver for those three stands should be the same and updated collectively.

  5. Hardware for dynamic quantum computing.

    PubMed

    Ryan, Colm A; Johnson, Blake R; Ristè, Diego; Donovan, Brian; Ohki, Thomas A

    2017-10-01

    We describe the hardware, gateware, and software developed at Raytheon BBN Technologies for dynamic quantum information processing experiments on superconducting qubits. In dynamic experiments, real-time qubit state information is fed back or fed forward within a fraction of the qubits' coherence time to dynamically change the implemented sequence. The hardware presented here covers both control and readout of superconducting qubits. For readout, we created a custom signal processing gateware and software stack on commercial hardware to convert pulses in a heterodyne receiver into qubit state assignments with minimal latency, alongside data taking capability. For control, we developed custom hardware with gateware and software for pulse sequencing and steering information distribution that is capable of arbitrary control flow in a fraction of superconducting qubit coherence times. Both readout and control platforms make extensive use of field programmable gate arrays to enable tailored qubit control systems in a reconfigurable fabric suitable for iterative development.

  6. Automatic Digital Hardware Synthesis

    DTIC Science & Technology

    1990-09-01

    VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate array (FPGAI using...process of translating VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate...allows the engineer to use VHDL to create and validate a design, and then to implement it in a gate array. The development of software o translate VHDL

  7. Thermal Hardware for the Thermal Analyst

    NASA Technical Reports Server (NTRS)

    Steinfeld, David

    2015-01-01

    The presentation will be given at the 26th Annual Thermal Fluids Analysis Workshop (TFAWS 2015) hosted by the Goddard Space Flight Center (GSFC) Thermal Engineering Branch (Code 545). NCTS 21070-1. Most Thermal analysts do not have a good background into the hardware which thermally controls the spacecraft they design. SINDA and Thermal Desktop models are nice, but knowing how this applies to the actual thermal hardware (heaters, thermostats, thermistors, MLI blanketing, optical coatings, etc...) is just as important. The course will delve into the thermal hardware and their application techniques on actual spacecraft. Knowledge of how thermal hardware is used and applied will make a thermal analyst a better engineer.

  8. Hardware device binding and mutual authentication

    DOEpatents

    Hamlet, Jason R; Pierson, Lyndon G

    2014-03-04

    Detection and deterrence of device tampering and subversion by substitution may be achieved by including a cryptographic unit within a computing device for binding multiple hardware devices and mutually authenticating the devices. The cryptographic unit includes a physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generates a binding PUF value. The cryptographic unit uses the binding PUF value during an enrollment phase and subsequent authentication phases. During a subsequent authentication phase, the cryptographic unit uses the binding PUF values of the multiple hardware devices to generate a challenge to send to the other device, and to verify a challenge received from the other device to mutually authenticate the hardware devices.

  9. Hardware friendly probabilistic spiking neural network with long-term and short-term plasticity.

    PubMed

    Hsieh, Hung-Yi; Tang, Kea-Tiong

    2013-12-01

    This paper proposes a probabilistic spiking neural network (PSNN) with unimodal weight distribution, possessing long- and short-term plasticity. The proposed algorithm is derived by both the arithmetic gradient decent calculation and bioinspired algorithms. The algorithm is benchmarked by the Iris and Wisconsin breast cancer (WBC) data sets. The network features fast convergence speed and high accuracy. In the experiment, the PSNN took not more than 40 epochs for convergence. The average testing accuracy for Iris and WBC data is 96.7% and 97.2%, respectively. To test the usefulness of the PSNN to real world application, the PSNN was also tested with the odor data, which was collected by our self-developed electronic nose (e-nose). Compared with the algorithm (K-nearest neighbor) that has the highest classification accuracy in the e-nose for the same odor data, the classification accuracy of the PSNN is only 1.3% less but the memory requirement can be reduced at least 40%. All the experiments suggest that the PSNN is hardware friendly. First, it requires only nine-bits weight resolution for training and testing. Second, the PSNN can learn complex data sets with a little number of neurons that in turn reduce the cost of VLSI implementation. In addition, the algorithm is insensitive to synaptic noise and the parameter variation induced by the VLSI fabrication. Therefore, the algorithm can be implemented by either software or hardware, making it suitable for wider application.

  10. 29 CFR 502.44 - Additional information, if required.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 29 Labor 3 2010-07-01 2010-07-01 false Additional information, if required. 502.44 Section 502.44 Labor Regulations Relating to Labor (Continued) WAGE AND HOUR DIVISION, DEPARTMENT OF LABOR REGULATIONS ENFORCEMENT OF CONTRACTUAL OBLIGATIONS FOR TEMPORARY ALIEN AGRICULTURAL WORKERS ADMITTED UNDER SECTION 218 OF...

  11. 29 CFR 501.44 - Additional information, if required.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 29 Labor 3 2010-07-01 2010-07-01 false Additional information, if required. 501.44 Section 501.44 Labor Regulations Relating to Labor (Continued) WAGE AND HOUR DIVISION, DEPARTMENT OF LABOR REGULATIONS ENFORCEMENT OF CONTRACTUAL OBLIGATIONS FOR TEMPORARY ALIEN AGRICULTURAL WORKERS ADMITTED UNDER SECTION 218 OF...

  12. 33 CFR 154.1125 - Additional response plan requirements.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... Prince William Sound, Alaska § 154.1125 Additional response plan requirements. (a) The owner or operator of a TAPAA facility shall include the following information in the Prince William Sound appendix to... for personnel, including local residents and fishermen, from the following locations in Prince William...

  13. The Impact of Flight Hardware Scavenging on Space Logistics

    NASA Technical Reports Server (NTRS)

    Oeftering, Richard C.

    2011-01-01

    For a given fixed launch vehicle capacity the logistics payload delivered to the moon may be only roughly 20 percent of the payload delivered to the International Space Station (ISS). This is compounded by the much lower flight frequency to the moon and thus low availability of spares for maintenance. This implies that lunar hardware is much more scarce and more costly per kilogram than ISS and thus there is much more incentive to preserve hardware. The Constellation Lunar Surface System (LSS) program is considering ways of utilizing hardware scavenged from vehicles including the Altair lunar lander. In general, the hardware will have only had a matter of hours of operation yet there may be years of operational life remaining. By scavenging this hardware the program, in effect, is treating vehicle hardware as part of the payload. Flight hardware may provide logistics spares for system maintenance and reduce the overall logistics footprint. This hardware has a wide array of potential applications including expanding the power infrastructure, and exploiting in-situ resources. Scavenging can also be seen as a way of recovering the value of, literally, billions of dollars worth of hardware that would normally be discarded. Scavenging flight hardware adds operational complexity and steps must be taken to augment the crew s capability with robotics, capabilities embedded in flight hardware itself, and external processes. New embedded technologies are needed to make hardware more serviceable and scavengable. Process technologies are needed to extract hardware, evaluate hardware, reconfigure or repair hardware, and reintegrate it into new applications. This paper also illustrates how scavenging can be used to drive down the cost of the overall program by exploiting the intrinsic value of otherwise discarded flight hardware.

  14. 25 CFR 304.4 - Standards and additional requirements.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 25 Indians 2 2010-04-01 2010-04-01 false Standards and additional requirements. 304.4 Section 304.4 Indians INDIAN ARTS AND CRAFTS BOARD, DEPARTMENT OF THE INTERIOR NAVAJO, PUEBLO, AND HOPI SILVER... in compliance with the standards set forth by the Indian Arts and Crafts Board, shall bear the...

  15. Innovative Contamination Certification of Multi-Mission Flight Hardware

    NASA Technical Reports Server (NTRS)

    Hansen, Patricia A.; Hughes, David W.; Montt, Kristina M.; Triolo, Jack J.

    1998-01-01

    Maintaining contamination certification of multi-mission flight hardware is an innovative approach to controlling mission costs. Methods for assessing ground induced degradation between missions have been employed by the Hubble Space Telescope (HST) Project for the multi-mission (servicing) hardware. By maintaining the cleanliness of the hardware between missions, and by controlling the materials added to the hardware during modification and refurbishment both project funding for contamination recertification and schedule have been significantly reduced. These methods will be discussed and HST hardware data will be presented.

  16. Innovative Contamination Certification of Multi-Mission Flight Hardware

    NASA Technical Reports Server (NTRS)

    Hansen, Patricia A.; Hughes, David W.; Montt, Kristina M.; Triolo, Jack J.

    1999-01-01

    Maintaining contamination certification of multi-mission flight hardware is an innovative approach to controlling mission costs. Methods for assessing ground induced degradation between missions have been employed by the Hubble Space Telescope (HST) Project for the multi-mission (servicing) hardware. By maintaining the cleanliness of the hardware between missions, and by controlling the materials added to the hardware during modification and refurbishment both project funding for contamination recertification and schedule have been significantly reduced. These methods will be discussed and HST hardware data will be presented.

  17. Applying reconfigurable hardware to the analysis of multispectral and hyperspectral imagery

    NASA Astrophysics Data System (ADS)

    Leeser, Miriam E.; Belanovic, Pavle; Estlick, Michael; Gokhale, Maya; Szymanski, John J.; Theiler, James P.

    2002-01-01

    Unsupervised clustering is a powerful technique for processing multispectral and hyperspectral images. Last year, we reported on an implementation of k-means clustering for multispectral images. Our implementation in reconfigurable hardware processed 10 channel multispectral images two orders of magnitude faster than a software implementation of the same algorithm. The advantage of using reconfigurable hardware to accelerate k-means clustering is clear; the disadvantage is the hardware implementation worked for one specific dataset. It is a non-trivial task to change this implementation to handle a dataset with different number of spectral channels, bits per spectral channel, or number of pixels; or to change the number of clusters. These changes required knowledge of the hardware design process and could take several days of a designer's time. Since multispectral data sets come in many shapes and sizes, being able to easily change the k-means implementation for these different data sets is important. For this reason, we have developed a parameterized implementation of the k-means algorithm. Our design is parameterized by the number of pixels in an image, the number of channels per pixel, and the number of bits per channel as well as the number of clusters. These parameters can easily be changed in a few minutes by someone not familiar with the design process. The resulting implementation is very close in performance to the original hardware implementation. It has the added advantage that the parameterized design compiles approximately three times faster than the original.

  18. Automated culture system experiments hardware: developing test results and design solutions.

    PubMed

    Freddi, M; Covini, M; Tenconi, C; Ricci, C; Caprioli, M; Cotronei, V

    2002-07-01

    The experiment proposed by Prof. Ricci University of Milan is funded by ASI with Laben as industrial Prime Contractor. ACS-EH (Automated Culture System-Experiment Hardware) will support the multigenerational experiment on weightlessness with rotifers and nematodes within four Experiment Containers (ECs) located inside the European Modular Cultivation System (EMCS) facility..Actually the Phase B is in progress and a concept design solution has been defined. The most challenging aspects for the design of such hardware are, from biological point of view the provision of an environment which permits animal's survival and to maintain desiccated generations separated and from the technical point of view, the miniaturisation of the hardware itself due to the reduce EC provided volume (160mmx60mmx60mm). The miniaturisation will allow a better use of the available EMCS Facility resources (e.g. volume. power etc.) and to fulfil the experiment requirements. ACS-EH, will be ready to fly in the year 2005 on boar the ISS.

  19. Power Consumption and Calculation Requirement Analysis of AES for WSN IoT.

    PubMed

    Hung, Chung-Wen; Hsu, Wen-Ting

    2018-05-23

    Because of the ubiquity of Internet of Things (IoT) devices, the power consumption and security of IoT systems have become very important issues. Advanced Encryption Standard (AES) is a block cipher algorithm is commonly used in IoT devices. In this paper, the power consumption and cryptographic calculation requirement for different payload lengths and AES encryption types are analyzed. These types include software-based AES-CB, hardware-based AES-ECB (Electronic Codebook Mode), and hardware-based AES-CCM (Counter with CBC-MAC Mode). The calculation requirement and power consumption for these AES encryption types are measured on the Texas Instruments LAUNCHXL-CC1310 platform. The experimental results show that the hardware-based AES performs better than the software-based AES in terms of power consumption and calculation cycle requirements. In addition, in terms of AES mode selection, the AES-CCM-MIC64 mode may be a better choice if the IoT device is considering security, encryption calculation requirement, and low power consumption at the same time. However, if the IoT device is pursuing lower power and the payload length is generally less than 16 bytes, then AES-ECB could be considered.

  20. Weight and the Future of Space Flight Hardware Cost Modeling

    NASA Technical Reports Server (NTRS)

    Prince, Frank A.

    2003-01-01

    Weight has been used as the primary input variable for cost estimating almost as long as there have been parametric cost models. While there are good reasons for using weight, serious limitations exist. These limitations have been addressed by multi-variable equations and trend analysis in models such as NAFCOM, PRICE, and SEER; however, these models have not be able to address the significant time lags that can occur between the development of similar space flight hardware systems. These time lags make the cost analyst's job difficult because insufficient data exists to perform trend analysis, and the current set of parametric models are not well suited to accommodating process improvements in space flight hardware design, development, build and test. As a result, people of good faith can have serious disagreement over the cost for new systems. To address these shortcomings, new cost modeling approaches are needed. The most promising approach is process based (sometimes called activity) costing. Developing process based models will require a detailed understanding of the functions required to produce space flight hardware combined with innovative approaches to estimating the necessary resources. Particularly challenging will be the lack of data at the process level. One method for developing a model is to combine notional algorithms with a discrete event simulation and model changes to the total cost as perturbations to the program are introduced. Despite these challenges, the potential benefits are such that efforts should be focused on developing process based cost models.

  1. Wireless Energy Harvesting Two-Way Relay Networks with Hardware Impairments.

    PubMed

    Peng, Chunling; Li, Fangwei; Liu, Huaping

    2017-11-13

    This paper considers a wireless energy harvesting two-way relay (TWR) network where the relay has energy-harvesting abilities and the effects of practical hardware impairments are taken into consideration. In particular, power splitting (PS) receiver is adopted at relay to harvests the power it needs for relaying the information between the source nodes from the signals transmitted by the source nodes, and hardware impairments is assumed suffered by each node. We analyze the effect of hardware impairments [-20]on both decode-and-forward (DF) relaying and amplify-and-forward (AF) relaying networks. By utilizing the obtained new expressions of signal-to-noise-plus-distortion ratios, the exact analytical expressions of the achievable sum rate and ergodic capacities for both DF and AF relaying protocols are derived. Additionally, the optimal power splitting (OPS) ratio that maximizes the instantaneous achievable sum rate is formulated and solved for both protocols. The performances of DF and AF protocols are evaluated via numerical results, which also show the effects of various network parameters on the system performance and on the OPS ratio design.

  2. Orbiter CIU/IUS communications hardware evaluation

    NASA Technical Reports Server (NTRS)

    Huth, G. K.

    1979-01-01

    The DOD and NASA inertial upper stage communication system design, hardware specifications and interfaces were analyzed to determine their compatibility with the Orbiter payload communications equipment (Payload Interrogator, Payload Signal Processors, Communications Interface Unit, and the Orbiter operational communications equipment (the S-Band and Ku-band systems). Topics covered include (1) IUS/shuttle Orbiter communications interface definition; (2) Orbiter avionics equipment serving the IUS; (3) IUS communication equipment; (4) IUS/shuttle Orbiter RF links; (5) STDN/TDRS S-band related activities; and (6) communication interface unit/Orbiter interface issues. A test requirement plan overview is included.

  3. Development of a hardware-in-loop attitude control simulator for a CubeSat satellite

    NASA Astrophysics Data System (ADS)

    Tapsawat, Wittawat; Sangpet, Teerawat; Kuntanapreeda, Suwat

    2018-01-01

    Attitude control is an important part in satellite on-orbit operation. It greatly affects the performance of satellites. Testing of an attitude determination and control subsystem (ADCS) is very challenging since it might require attitude dynamics and space environment in the orbit. This paper develops a low-cost hardware-in-loop (HIL) simulator for testing an ADCS of a CubeSat satellite. The simulator consists of a numerical simulation part, a hardware part, and a HIL interface hardware unit. The numerical simulation part includes orbital dynamics, attitude dynamics and Earth’s magnetic field. The hardware part is the real ADCS board of the satellite. The simulation part outputs satellite’s angular velocity and geomagnetic field information to the HIL interface hardware. Then, based on this information, the HIL interface hardware generates I2C signals mimicking the signals of the on-board rate-gyros and magnetometers and consequently outputs the signals to the ADCS board. The ADCS board reads the rate-gyro and magnetometer signals, calculates control signals, and drives the attitude actuators which are three magnetic torquers (MTQs). The responses of the MTQs sensed by a separated magnetometer are feedback to the numerical simulation part completing the HIL simulation loop. Experimental studies are conducted to demonstrate the feasibility and effectiveness of the simulator.

  4. 20 CFR 416.805 - When additional evidence may be required.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 20 Employees' Benefits 2 2011-04-01 2011-04-01 false When additional evidence may be required. 416.805 Section 416.805 Employees' Benefits SOCIAL SECURITY ADMINISTRATION SUPPLEMENTAL SECURITY INCOME FOR THE AGED, BLIND, AND DISABLED Determination of Age § 416.805 When additional evidence may be...

  5. Criticality as a Set-Point for Adaptive Behavior in Neuromorphic Hardware

    PubMed Central

    Srinivasa, Narayan; Stepp, Nigel D.; Cruz-Albrecht, Jose

    2015-01-01

    Neuromorphic hardware are designed by drawing inspiration from biology to overcome limitations of current computer architectures while forging the development of a new class of autonomous systems that can exhibit adaptive behaviors. Several designs in the recent past are capable of emulating large scale networks but avoid complexity in network dynamics by minimizing the number of dynamic variables that are supported and tunable in hardware. We believe that this is due to the lack of a clear understanding of how to design self-tuning complex systems. It has been widely demonstrated that criticality appears to be the default state of the brain and manifests in the form of spontaneous scale-invariant cascades of neural activity. Experiment, theory and recent models have shown that neuronal networks at criticality demonstrate optimal information transfer, learning and information processing capabilities that affect behavior. In this perspective article, we argue that understanding how large scale neuromorphic electronics can be designed to enable emergent adaptive behavior will require an understanding of how networks emulated by such hardware can self-tune local parameters to maintain criticality as a set-point. We believe that such capability will enable the design of truly scalable intelligent systems using neuromorphic hardware that embrace complexity in network dynamics rather than avoiding it. PMID:26648839

  6. 34 CFR 379.45 - What are the additional reporting requirements?

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... SPECIAL EDUCATION AND REHABILITATIVE SERVICES, DEPARTMENT OF EDUCATION PROJECTS WITH INDUSTRY What Conditions Must Be Met by a Grantee? § 379.45 What are the additional reporting requirements? Each grantee must submit the data from its annual evaluation of project operations required under § 379.21(a)(5) no...

  7. Overview of Additive Manufacturing Initiatives at NASA Marshall Space Flight Center

    NASA Technical Reports Server (NTRS)

    Clinton, R. G., Jr.

    2018-01-01

    NASA's In Space Manufacturing Initiative (ISM) includes: The case for ISM - why; ISM path to exploration - results from the 3D Printing In Zero-G Technology Demonstration - ISM challenges; In space Robotic Manufacturing and Assembly (IRMA); Additive construction. Additively Manufacturing (AM) development for liquid rocket engine space flight hardware. MSFC standard and specification for additively manufactured space flight hardware. Summary.

  8. Veggie and the VEG-01 Hardware Validation Test

    NASA Technical Reports Server (NTRS)

    Massa, Gioia; wheeler, Ray; Smith, Trent

    2015-01-01

    This presentation presents a brief overview of KSC plant science hardware for space and then details the Veggie hardware and the VEG-01 hardware validation test. The test results and future plans are discussed.

  9. Reconfigurable Hardware for Compressing Hyperspectral Image Data

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh; Namkung, Jeffrey; Villapando, Carlos; Kiely, Aaron; Klimesh, Matthew; Xie, Hua

    2010-01-01

    the FPGAs makes it possible to effectively alter the design to some extent to satisfy different requirements without adding hardware. The implementation could be easily propagated to future FPGA generations and/or to custom application-specific integrated circuits.

  10. Programmable hardware for reconfigurable computing systems

    NASA Astrophysics Data System (ADS)

    Smith, Stephen

    1996-10-01

    In 1945 the work of J. von Neumann and H. Goldstein created the principal architecture for electronic computation that has now lasted fifty years. Nevertheless alternative architectures have been created that have computational capability, for special tasks, far beyond that feasible with von Neumann machines. The emergence of high capacity programmable logic devices has made the realization of these architectures practical. The original ENIAC and EDVAC machines were conceived to solve special mathematical problems that were far from today's concept of 'killer applications.' In a similar vein programmable hardware computation is being used today to solve unique mathematical problems. Our programmable hardware activity is focused on the research and development of novel computational systems based upon the reconfigurability of our programmable logic devices. We explore our programmable logic architectures and their implications for programmable hardware. One programmable hardware board implementation is detailed.

  11. Investigation of Cleanliness Verification Techniques for Rocket Engine Hardware

    NASA Technical Reports Server (NTRS)

    Fritzemeier, Marilyn L.; Skowronski, Raymund P.

    1994-01-01

    Oxidizer propellant systems for liquid-fueled rocket engines must meet stringent cleanliness requirements for particulate and nonvolatile residue. These requirements were established to limit residual contaminants which could block small orifices or ignite in the oxidizer system during engine operation. Limiting organic residues in high pressure oxygen systems, such as in the Space Shuttle Main Engine (SSME), is particularly important. The current method of cleanliness verification for the SSME uses an organic solvent flush of the critical hardware surfaces. The solvent is filtered and analyzed for particulate matter followed by gravimetric determination of the nonvolatile residue (NVR) content of the filtered solvent. The organic solvents currently specified for use (1, 1, 1-trichloroethane and CFC-113) are ozone-depleting chemicals slated for elimination by December 1995. A test program is in progress to evaluate alternative methods for cleanliness verification that do not require the use of ozone-depleting chemicals and that minimize or eliminate the use of solvents regulated as hazardous air pollutants or smog precursors. Initial results from the laboratory test program to evaluate aqueous-based methods and organic solvent flush methods for NVR verification are provided and compared with results obtained using the current method. Evaluation of the alternative methods was conducted using a range of contaminants encountered in the manufacture of rocket engine hardware.

  12. A Power Hardware-in-the-Loop Platform with Remote Distribution Circuit Cosimulation

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Palmintier, Bryan; Lundstrom, Blake; Chakraborty, Sudipta

    2015-04-01

    This paper demonstrates the use of a novel cosimulation architecture that integrates hardware testing using Power Hardware-in-the-Loop (PHIL) with larger-scale electric grid models using off-the-shelf, non-PHIL software tools. This architecture enables utilities to study the impacts of emerging energy technologies on their system and manufacturers to explore the interactions of new devices with existing and emerging devices on the power system, both without the need to convert existing grid models to a new platform or to conduct in-field trials. The paper describes an implementation of this architecture for testing two residential-scale advanced solar inverters at separate points of common coupling.more » The same hardware setup is tested with two different distribution feeders (IEEE 123 and 8500 node test systems) modeled using GridLAB-D. In addition to simplifying testing with multiple feeders, the architecture demonstrates additional flexibility with hardware testing in one location linked via the Internet to software modeling in a remote location. In testing, inverter current, real and reactive power, and PCC voltage are well captured by the co-simulation platform. Testing of the inverter advanced control features is currently somewhat limited by the software model time step (1 sec) and tested communication latency (24 msec). Overshoot induced oscillations are observed with volt/VAR control delays of 0 and 1.5 sec, while 3.4 sec and 5.5 sec delays produced little or no oscillation. These limitations could be overcome using faster modeling and communication within the same co-simulation architecture.« less

  13. Test Hardware Design for Flightlike Operation of Advanced Stirling Convertors (ASC-E3)

    NASA Technical Reports Server (NTRS)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  14. Computer hardware fault administration

    DOEpatents

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-09-14

    Computer hardware fault administration carried out in a parallel computer, where the parallel computer includes a plurality of compute nodes. The compute nodes are coupled for data communications by at least two independent data communications networks, where each data communications network includes data communications links connected to the compute nodes. Typical embodiments carry out hardware fault administration by identifying a location of a defective link in the first data communications network of the parallel computer and routing communications data around the defective link through the second data communications network of the parallel computer.

  15. Computer hardware for radiologists: Part 2

    PubMed Central

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. “Storage drive” is a term describing a “memory” hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. “Drive interfaces” connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular “input/output devices” used commonly with computers are the printer, monitor, mouse, and keyboard. The “bus” is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. “Ports” are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the ‘ever increasing’ digital future. PMID:21423895

  16. Computer hardware for radiologists: Part 2.

    PubMed

    Indrajit, Ik; Alam, A

    2010-11-01

    Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the 'ever increasing' digital future.

  17. Reliability and Qualification of Hardware to Enhance the Mission Assurance of JPL/NASA Projects

    NASA Technical Reports Server (NTRS)

    Ramesham, Rajeshuni

    2010-01-01

    Packaging Qualification and Verification (PQV) and life testing of advanced electronic packaging, mechanical assemblies (motors/actuators), and interconnect technologies (flip-chip), platinum temperature thermometer attachment processes, and various other types of hardware for Mars Exploration Rover (MER)/Mars Science Laboratory (MSL), and JUNO flight projects was performed to enhance the mission assurance. The qualification of hardware under extreme cold to hot temperatures was performed with reference to various project requirements. The flight like packages, assemblies, test coupons, and subassemblies were selected for the study to survive three times the total number of expected temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware including all relevant manufacturing, ground operations, and mission phases. Qualification/life testing was performed by subjecting flight-like qualification hardware to the environmental temperature extremes and assessing any structural failures, mechanical failures or degradation in electrical performance due to either overstress or thermal cycle fatigue. Experimental flight qualification test results will be described in this presentation.

  18. Hardware efficient monitoring of input/output signals

    NASA Technical Reports Server (NTRS)

    Driscoll, Kevin R. (Inventor); Hall, Brendan (Inventor); Paulitsch, Michael (Inventor)

    2012-01-01

    A communication device comprises first and second circuits to implement a plurality of ports via which the communicative device is operable to communicate over a plurality of communication channels. For each of the plurality of ports, the communication device comprises: command hardware that includes a first transmitter to transmit data over a respective one of the plurality of channels and a first receiver to receive data from the respective one of the plurality of channels; and monitor hardware that includes a second receiver coupled to the first transmitter and a third receiver coupled to the respective one of the plurality of channels. The first circuit comprises the command hardware for a first subset of the plurality of ports. The second circuit comprises the monitor hardware for the first subset of the plurality of ports and the command hardware for a second subset of the plurality of ports.

  19. Summary of materials and hardware performance on LDEF

    NASA Technical Reports Server (NTRS)

    Dursch, Harry; Pippin, Gary; Teichman, Lou

    1993-01-01

    A wide variety of materials and experiment support hardware were flown on the Long Duration Exposure Facility (LDEF). Postflight testing has determined the effects of the almost 6 years of low-earth orbit (LEO) exposure on this hardware. An overview of the results are presented. Hardware discussed includes adhesives, fasteners, lubricants, data storage systems, solar cells, seals, and the LDEF structure. Lessons learned from the testing and analysis of LDEF hardware is also presented.

  20. 30 CFR 75.1103-10 - Fire suppression systems; additional requirements.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... per minute, an additional cache of the materials specified in § 75.1103-9(a)(1), (2), and (3) shall be... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Fire suppression systems; additional requirements. 75.1103-10 Section 75.1103-10 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION, DEPARTMENT...

  1. 40 CFR 141.624 - Additional requirements for consecutive systems.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 40 Protection of Environment 23 2011-07-01 2011-07-01 false Additional requirements for consecutive systems. 141.624 Section 141.624 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) WATER PROGRAMS (CONTINUED) NATIONAL PRIMARY DRINKING WATER REGULATIONS Stage 2 Disinfection...

  2. 40 CFR 141.624 - Additional requirements for consecutive systems.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 40 Protection of Environment 24 2013-07-01 2013-07-01 false Additional requirements for consecutive systems. 141.624 Section 141.624 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) WATER PROGRAMS (CONTINUED) NATIONAL PRIMARY DRINKING WATER REGULATIONS Stage 2 Disinfection...

  3. 40 CFR 141.624 - Additional requirements for consecutive systems.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 40 Protection of Environment 24 2012-07-01 2012-07-01 false Additional requirements for consecutive systems. 141.624 Section 141.624 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) WATER PROGRAMS (CONTINUED) NATIONAL PRIMARY DRINKING WATER REGULATIONS Stage 2 Disinfection...

  4. 40 CFR 141.624 - Additional requirements for consecutive systems.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 40 Protection of Environment 23 2014-07-01 2014-07-01 false Additional requirements for consecutive systems. 141.624 Section 141.624 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) WATER PROGRAMS (CONTINUED) NATIONAL PRIMARY DRINKING WATER REGULATIONS Stage 2 Disinfection...

  5. 21 CFR 70.25 - Labeling requirements for color additives (other than hair dyes).

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... 21 Food and Drugs 1 2014-04-01 2014-04-01 false Labeling requirements for color additives (other than hair dyes). 70.25 Section 70.25 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH... color additives (other than hair dyes). (a) General labeling requirements. All color additives shall be...

  6. 21 CFR 70.25 - Labeling requirements for color additives (other than hair dyes).

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... 21 Food and Drugs 1 2013-04-01 2013-04-01 false Labeling requirements for color additives (other than hair dyes). 70.25 Section 70.25 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH... color additives (other than hair dyes). (a) General labeling requirements. All color additives shall be...

  7. 21 CFR 70.25 - Labeling requirements for color additives (other than hair dyes).

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 21 Food and Drugs 1 2012-04-01 2012-04-01 false Labeling requirements for color additives (other than hair dyes). 70.25 Section 70.25 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH... color additives (other than hair dyes). (a) General labeling requirements. All color additives shall be...

  8. Comparative Modal Analysis of Sieve Hardware Designs

    NASA Technical Reports Server (NTRS)

    Thompson, Nathaniel

    2012-01-01

    The CMTB Thwacker hardware operates as a testbed analogue for the Flight Thwacker and Sieve components of CHIMRA, a device on the Curiosity Rover. The sieve separates particles with a diameter smaller than 150 microns for delivery to onboard science instruments. The sieving behavior of the testbed hardware should be similar to the Flight hardware for the results to be meaningful. The elastodynamic behavior of both sieves was studied analytically using the Rayleigh Ritz method in conjunction with classical plate theory. Finite element models were used to determine the mode shapes of both designs, and comparisons between the natural frequencies and mode shapes were made. The analysis predicts that the performance of the CMTB Thwacker will closely resemble the performance of the Flight Thwacker within the expected steady state operating regime. Excitations of the testbed hardware that will mimic the flight hardware were recommended, as were those that will improve the efficiency of the sieving process.

  9. Hardware system of X-wave generator with simple driving pulses

    NASA Astrophysics Data System (ADS)

    Li, Xu; Li, Yaqin; Xiao, Feng; Ding, Mingyue; Yuchi, Ming

    2013-03-01

    The limited diffraction beams such as X-wave have the properties of larger depth of field. Thus, it has the potential to generate ultra-high frame rate ultrasound images. However, in practice, the real-time generation of X-wave ultrasonic field requires complex and high-cost system, especially the precise and specific voltage time distribution part for the excitation of each distinct array element. In order to simplify the hardware realization of X-wave, based on the previous works, X-wave excitation signals were decomposed and expressed as the superposition of a group of simple driving pulses, such as rectangular and triangular waves. The hardware system for the X-wave generator was also designed. The generator consists of a computer for communication with the circuit, universal serial bus (USB) based micro-controller unit (MCU) for data transmission, field programmable gate array (FPGA) based Direct Digital Synthesizer(DDS), 12-bit digital-to-analog (D/A) converter and a two stage amplifier.The hardware simulation results show that the designed system can generate the waveforms at different radius approximating the theoretical X-wave excitations with a maximum error of 0.49% triggered by the quantification of amplitude data.

  10. 40 CFR 80.1613 - Standards and other requirements for gasoline additive manufacturers and blenders.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... gasoline additive manufacturers and blenders. 80.1613 Section 80.1613 Protection of Environment... Gasoline Sulfur § 80.1613 Standards and other requirements for gasoline additive manufacturers and blenders. Gasoline additive manufacturers and blenders must meet the following requirements: (a) Gasoline additive...

  11. 41 CFR 60-2.17 - Additional required elements of affirmative action programs.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... elements of affirmative action programs. 60-2.17 Section 60-2.17 Public Contracts and Property Management... Action Programs § 60-2.17 Additional required elements of affirmative action programs. In addition to the elements required by § 60-2.10 through § 60-2.16, an acceptable affirmative action program must include the...

  12. 41 CFR 60-2.17 - Additional required elements of affirmative action programs.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... elements of affirmative action programs. 60-2.17 Section 60-2.17 Public Contracts and Property Management... Action Programs § 60-2.17 Additional required elements of affirmative action programs. In addition to the elements required by § 60-2.10 through § 60-2.16, an acceptable affirmative action program must include the...

  13. 41 CFR 60-2.17 - Additional required elements of affirmative action programs.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... elements of affirmative action programs. 60-2.17 Section 60-2.17 Public Contracts and Property Management... Action Programs § 60-2.17 Additional required elements of affirmative action programs. In addition to the elements required by § 60-2.10 through § 60-2.16, an acceptable affirmative action program must include the...

  14. Zero Boil-OFF Tank Hardware Setup

    NASA Image and Video Library

    2017-09-19

    iss053e027051 (Sept. 19, 2017) --- Flight Engineer Joe Acaba works in the U.S. Destiny laboratory module setting up hardware for the Zero Boil-Off Tank (ZBOT) experiment. ZBOT uses an experimental fluid to test active heat removal and forced jet mixing as alternative means for controlling tank pressure for volatile fluids. Rocket fuel, spacecraft heating and cooling systems, and sensitive scientific instruments rely on very cold cryogenic fluids. Heat from the environment around cryogenic tanks can cause their pressures to rise, which requires dumping or "boiling off" fluid to release the excess pressure, or actively cooling the tanks in some way.

  15. Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor

    NASA Technical Reports Server (NTRS)

    Gwaltney, David A.; Ferguson, Michael I.

    2003-01-01

    Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a second generation Field Programmable Transistor Array (FPTA2). The performance of an evolved controller is compared to that of a conventional proportional-integral (PI) controller. It is shown that hardware evolution is able to create a compact design that provides good performance, while using considerably less functional electronic components than the conventional design. Additionally, the use of hardware evolution to provide fault tolerance by reconfiguring the design is explored. Experimental results are presented showing that significant recovery of capability can be made in the face of damaging induced faults.

  16. Tri-FAST Hardware-in-the-Loop Simulation. Volume I. Tri-FAST Hardware-in-the-Loop Simulation at the Advanced Simulation Center

    DTIC Science & Technology

    1979-03-28

    TECHNICAL REPORT T-79-43 TRI- FAST HARDWARE-IN-THE-LOOP SIMULATION Volume 1: Trn FAST Hardware-In-the. Loop Simulation at the Advanced Simulation...Identify by block number) Tri- FAST Hardware-in-the-Loop ACSL Advanced Simulation Center Simulation RF Target Models I a. AfIACT ( sin -oveme skit N nem...e n tdositr by block number) The purpose of this report is to document the Tri- FAST missile simulation development and the seeker hardware-in-the

  17. Real-Time Hardware-in-the-Loop Simulation of Ares I Launch Vehicle

    NASA Technical Reports Server (NTRS)

    Tobbe, Patrick; Matras, Alex; Walker, David; Wilson, Heath; Fulton, Chris; Alday, Nathan; Betts, Kevin; Hughes, Ryan; Turbe, Michael

    2009-01-01

    The Ares Real-Time Environment for Modeling, Integration, and Simulation (ARTEMIS) has been developed for use by the Ares I launch vehicle System Integration Laboratory at the Marshall Space Flight Center. The primary purpose of the Ares System Integration Laboratory is to test the vehicle avionics hardware and software in a hardware - in-the-loop environment to certify that the integrated system is prepared for flight. ARTEMIS has been designed to be the real-time simulation backbone to stimulate all required Ares components for verification testing. ARTE_VIIS provides high -fidelity dynamics, actuator, and sensor models to simulate an accurate flight trajectory in order to ensure realistic test conditions. ARTEMIS has been designed to take advantage of the advances in underlying computational power now available to support hardware-in-the-loop testing to achieve real-time simulation with unprecedented model fidelity. A modular realtime design relying on a fully distributed computing architecture has been implemented.

  18. Hardware test program for evaluation of baseline range/range rate sensor concept

    NASA Technical Reports Server (NTRS)

    1985-01-01

    The Hardware Test Program for evaluation of the baseline range/range rate sensor concept was initiated 11 September 1984. This ninth report covers the period 12 May through 11 June 1885. A contract amendment adding a second phase has extended the Hardware Test Program through 10 December 1985. The objective of the added program phase is to establish range and range measurement accuracy and radar signature characteristics for a typical spacecraft target. Phase I of the Hardware Test Program was designed to reduce the risks associated with the Range/Range Rate (R/R) Sensor baseline design approach. These risks are associated with achieving the sensor performance required for the two modes of operation, the Interrupted CW (ICW) mode for initial acquisition and tracking to close-in ranges, and the CW mode, providing coverage during the final docking maneuver. The risks associated with these modes of operation have to do with the realization of adequate sensitivity to operate to their individual maximum ranges.

  19. Energy Emergency Management Information System (EEMIS): Functional requirements

    NASA Astrophysics Data System (ADS)

    1980-10-01

    These guidelines state that in order to create the widest practicable competition, the system's requirements, with few exceptions, must be expressed in functional terms without reference to specific hardware or software products, and that wherever exceptions are made a statement of justification must be provided. In addition, these guidelines set forth a recommended maximum threshold limit of annual contract value for schedule contract procurements.

  20. Remote hardware-reconfigurable robotic camera

    NASA Astrophysics Data System (ADS)

    Arias-Estrada, Miguel; Torres-Huitzil, Cesar; Maya-Rueda, Selene E.

    2001-10-01

    In this work, a camera with integrated image processing capabilities is discussed. The camera is based on an imager coupled to an FPGA device (Field Programmable Gate Array) which contains an architecture for real-time computer vision low-level processing. The architecture can be reprogrammed remotely for application specific purposes. The system is intended for rapid modification and adaptation for inspection and recognition applications, with the flexibility of hardware and software reprogrammability. FPGA reconfiguration allows the same ease of upgrade in hardware as a software upgrade process. The camera is composed of a digital imager coupled to an FPGA device, two memory banks, and a microcontroller. The microcontroller is used for communication tasks and FPGA programming. The system implements a software architecture to handle multiple FPGA architectures in the device, and the possibility to download a software/hardware object from the host computer into its internal context memory. System advantages are: small size, low power consumption, and a library of hardware/software functionalities that can be exchanged during run time. The system has been validated with an edge detection and a motion processing architecture, which will be presented in the paper. Applications targeted are in robotics, mobile robotics, and vision based quality control.

  1. Hardware Design Improvements to the Major Constituent Analyzer

    NASA Technical Reports Server (NTRS)

    Combs, Scott; Schwietert, Daniel; Anaya, Marcial; DeWolf, Shannon; Merrill, Dave; Gardner, Ben D.; Thoresen, Souzan; Granahan, John; Belcher, Paul; Matty, Chris

    2011-01-01

    The Major Constituent Analyzer (MCA) onboard the International Space Station (ISS) is designed to monitor the major constituents of the ISS's internal atmosphere. This mass spectrometer based system is an integral part of the Environmental Control and Life Support System (ECLSS) and is a primary tool for the management of ISS atmosphere composition. As a part of NASA Change Request CR10773A, several alterations to the hardware have been made to accommodate improved MCA logistics. First, the ORU 08 verification gas assembly has been modified to allow the verification gas cylinder to be installed on orbit. The verification gas is an essential MCA consumable that requires periodic replenishment. Designing the cylinder for subassembly transport reduces the size and weight of the maintained item for launch. The redesign of the ORU 08 assembly includes a redesigned housing, cylinder mounting apparatus, and pneumatic connection. The second hardware change is a redesigned wiring harness for the ORU 02 analyzer. The ORU 02 electrical connector interface was damaged in a previous on-orbit installation, and this necessitated the development of a temporary fix while a more permanent solution was developed. The new wiring harness design includes flexible cable as well as indexing fasteners and guide-pins, and provides better accessibility during the on-orbit maintenance operation. This presentation will describe the hardware improvements being implemented for MCA as well as the expected improvement to logistics and maintenance.

  2. Data to hardware binding with physical unclonable functions

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Hamlet, Jason

    The various technologies presented herein relate to binding data (e.g., software) to hardware, wherein the hardware is to utilize the data. The generated binding can be utilized to detect whether at least one of the hardware or the data has been modified between an initial moment (enrollment) and a later moment (authentication). During enrollment, an enrollment value is generated that includes a signature of the data, a first response from a PUF located on the hardware, and a code word. During authentication, a second response from the PUF is utilized to authenticate any of the content in the enrollment value,more » and based upon the authentication, a determination can be made regarding whether the hardware and/or the data have been modified. If modification is detected then a mitigating operation can be performed, e.g., the hardware is prevented from utilizing the data. If no modification is detected, the data can be utilized.« less

  3. Use of Heritage Hardware on Orion MPCV Exploration Flight Test One

    NASA Technical Reports Server (NTRS)

    Rains, George Edward; Cross, Cynthia D.

    2012-01-01

    Due to an aggressive schedule for the first space flight of an unmanned Orion capsule, currently known as Exploration Flight Test One (EFT1), combined with severe programmatic funding constraints, an effort was made within the Orion Program to identify heritage hardware, i.e., already existing, flight-certified components from previous manned space programs, which might be available for use on EFT1. With the end of the Space Shuttle Program, no current means exists to launch Multi-Purpose Logistics Modules (MPLMs) to the International Space Station (ISS), and so the inventory of many flight-certified Shuttle and MPLM components are available for other purposes. Two of these items are the MPLM cabin Positive Pressure Relief Assembly (PPRA), and the Shuttle Ground Support Equipment Heat Exchanger (GSE HX). In preparation for the utilization of these components by the Orion Program, analyses and testing of the hardware were performed. The PPRA had to be analyzed to determine its susceptibility to pyrotechnic shock, and vibration testing had to be performed, since those environments are predicted to be more severe during an Orion mission than those the hardware was originally designed to accommodate. The GSE HX had to be tested for performance with the Orion thermal working fluids, which are different from those used by the Space Shuttle. This paper summarizes the activities required in order to utilize heritage hardware for EFT1.

  4. APRON: A Cellular Processor Array Simulation and Hardware Design Tool

    NASA Astrophysics Data System (ADS)

    Barr, David R. W.; Dudek, Piotr

    2009-12-01

    We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

  5. 48 CFR 7.106 - Additional requirements for major systems.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    .... (b) In planning for the solicitation of a major system (see part 34) production contract, planners... REGULATION ACQUISITION PLANNING ACQUISITION PLANNING Acquisition Plans 7.106 Additional requirements for major systems. (a) In planning for the solicitation of a major system (see part 34) development contract...

  6. 48 CFR 7.106 - Additional requirements for major systems.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    .... (b) In planning for the solicitation of a major system (see part 34) production contract, planners... REGULATION ACQUISITION PLANNING ACQUISITION PLANNING Acquisition Plans 7.106 Additional requirements for major systems. (a) In planning for the solicitation of a major system (see part 34) development contract...

  7. 48 CFR 7.106 - Additional requirements for major systems.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    .... (b) In planning for the solicitation of a major system (see part 34) production contract, planners... REGULATION ACQUISITION PLANNING ACQUISITION PLANNING Acquisition Plans 7.106 Additional requirements for major systems. (a) In planning for the solicitation of a major system (see part 34) development contract...

  8. 48 CFR 7.106 - Additional requirements for major systems.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    .... (b) In planning for the solicitation of a major system (see part 34) production contract, planners... REGULATION ACQUISITION PLANNING ACQUISITION PLANNING Acquisition Plans 7.106 Additional requirements for major systems. (a) In planning for the solicitation of a major system (see part 34) development contract...

  9. 48 CFR 7.106 - Additional requirements for major systems.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    .... (b) In planning for the solicitation of a major system (see part 34) production contract, planners... REGULATION ACQUISITION PLANNING ACQUISITION PLANNING Acquisition Plans 7.106 Additional requirements for major systems. (a) In planning for the solicitation of a major system (see part 34) development contract...

  10. Recent Developments in Hardware-in-the-Loop Formation Navigation and Control

    NASA Technical Reports Server (NTRS)

    Mitchell, Jason W.; Luquette, Richard J.

    2005-01-01

    The Formation Flying Test-Bed (FFTB) at NASA Goddard Space Flight Center (GSFC) provides a hardware-in-the-loop test environment for formation navigation and control. The facility is evolving as a modular, hybrid, dynamic simulation facility for end-tc-end guidance, navigation, and control (GN&C) design and analysis of formation flying spacecraft. The core capabilities of the FFTB, as a platform for testing critical hardware and software algorithms in-the-loop, are reviewed with a focus on many recent improvements. Two significant upgrades to the FFTB are a message-oriented middleware (MOM) architecture, and a software crosslink for inter-spacecraft ranging. The MOM architecture provides a common messaging bus for software agents, easing integration, arid supporting the GSFC Mission Services Evolution Center (GMSEC) architecture via software bridge. Additionally, the FFTB s hardware capabilities are expanding. Recently, two Low-Power Transceivers (LPTs) with ranging capability have been introduced into the FFTB. The LPT crosslinks will be connected to a modified Crosslink Channel Simulator (CCS), which applies realistic space-environment effects to the Radio Frequency (RF) signals produced by the LPTs.

  11. Computer hardware description languages - A tutorial

    NASA Technical Reports Server (NTRS)

    Shiva, S. G.

    1979-01-01

    The paper introduces hardware description languages (HDL) as useful tools for hardware design and documentation. The capabilities and limitations of HDLs are discussed along with the guidelines needed in selecting an appropriate HDL. The directions for future work are provided and attention is given to the implementation of HDLs in microcomputers.

  12. Hardware-efficient fermionic simulation with a cavity-QED system

    NASA Astrophysics Data System (ADS)

    Zhu, Guanyu; Subaşı, Yiǧit; Whitfield, James D.; Hafezi, Mohammad

    2018-03-01

    In digital quantum simulation of fermionic models with qubits, non-local maps for encoding are often encountered. Such maps require linear or logarithmic overhead in circuit depth which could render the simulation useless, for a given decoherence time. Here we show how one can use a cavity-QED system to perform digital quantum simulation of fermionic models. In particular, we show that highly nonlocal Jordan-Wigner or Bravyi-Kitaev transformations can be efficiently implemented through a hardware approach. The key idea is using ancilla cavity modes, which are dispersively coupled to a qubit string, to collectively manipulate and measure qubit states. Our scheme reduces the circuit depth in each Trotter step of the Jordan-Wigner encoding by a factor of N2, comparing to the scheme for a device with only local connectivity, where N is the number of orbitals for a generic two-body Hamiltonian. Additional analysis for the Fermi-Hubbard model on an N × N square lattice results in a similar reduction. We also discuss a detailed implementation of our scheme with superconducting qubits and cavities.

  13. Sterilization of space hardware.

    NASA Technical Reports Server (NTRS)

    Pflug, I. J.

    1971-01-01

    Discussion of various techniques of sterilization of space flight hardware using either destructive heating or the action of chemicals. Factors considered in the dry-heat destruction of microorganisms include the effects of microbial water content, temperature, the physicochemical properties of the microorganism and adjacent support, and nature of the surrounding gas atmosphere. Dry-heat destruction rates of microorganisms on the surface, between mated surface areas, or buried in the solid material of space vehicle hardware are reviewed, along with alternative dry-heat sterilization cycles, thermodynamic considerations, and considerations of final sterilization-process design. Discussed sterilization chemicals include ethylene oxide, formaldehyde, methyl bromide, dimethyl sulfoxide, peracetic acid, and beta-propiolactone.

  14. Software for Managing Inventory of Flight Hardware

    NASA Technical Reports Server (NTRS)

    Salisbury, John; Savage, Scott; Thomas, Shirman

    2003-01-01

    The Flight Hardware Support Request System (FHSRS) is a computer program that relieves engineers at Marshall Space Flight Center (MSFC) of most of the non-engineering administrative burden of managing an inventory of flight hardware. The FHSRS can also be adapted to perform similar functions for other organizations. The FHSRS affords a combination of capabilities, including those formerly provided by three separate programs in purchasing, inventorying, and inspecting hardware. The FHSRS provides a Web-based interface with a server computer that supports a relational database of inventory; electronic routing of requests and approvals; and electronic documentation from initial request through implementation of quality criteria, acquisition, receipt, inspection, storage, and final issue of flight materials and components. The database lists both hardware acquired for current projects and residual hardware from previous projects. The increased visibility of residual flight components provided by the FHSRS has dramatically improved the re-utilization of materials in lieu of new procurements, resulting in a cost savings of over $1.7 million. The FHSRS includes subprograms for manipulating the data in the database, informing of the status of a request or an item of hardware, and searching the database on any physical or other technical characteristic of a component or material. The software structure forces normalization of the data to facilitate inquiries and searches for which users have entered mixed or inconsistent values.

  15. OpenMM 4: A Reusable, Extensible, Hardware Independent Library for High Performance Molecular Simulation.

    PubMed

    Eastman, Peter; Friedrichs, Mark S; Chodera, John D; Radmer, Randall J; Bruns, Christopher M; Ku, Joy P; Beauchamp, Kyle A; Lane, Thomas J; Wang, Lee-Ping; Shukla, Diwakar; Tye, Tony; Houston, Mike; Stich, Timo; Klein, Christoph; Shirts, Michael R; Pande, Vijay S

    2013-01-08

    OpenMM is a software toolkit for performing molecular simulations on a range of high performance computing architectures. It is based on a layered architecture: the lower layers function as a reusable library that can be invoked by any application, while the upper layers form a complete environment for running molecular simulations. The library API hides all hardware-specific dependencies and optimizations from the users and developers of simulation programs: they can be run without modification on any hardware on which the API has been implemented. The current implementations of OpenMM include support for graphics processing units using the OpenCL and CUDA frameworks. In addition, OpenMM was designed to be extensible, so new hardware architectures can be accommodated and new functionality (e.g., energy terms and integrators) can be easily added.

  16. 19 CFR 141.37 - Additional requirements for nonresident corporations.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... corporations. 141.37 Section 141.37 Customs Duties U.S. CUSTOMS AND BORDER PROTECTION, DEPARTMENT OF HOMELAND... Additional requirements for nonresident corporations. If a nonresident corporation has not qualified to... authority of the grantor designated to execute the power of attorney on behalf of the corporation. [T.D. 84...

  17. 19 CFR 141.37 - Additional requirements for nonresident corporations.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... corporations. 141.37 Section 141.37 Customs Duties U.S. CUSTOMS AND BORDER PROTECTION, DEPARTMENT OF HOMELAND... Additional requirements for nonresident corporations. If a nonresident corporation has not qualified to... authority of the grantor designated to execute the power of attorney on behalf of the corporation. [T.D. 84...

  18. 19 CFR 141.37 - Additional requirements for nonresident corporations.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... corporations. 141.37 Section 141.37 Customs Duties U.S. CUSTOMS AND BORDER PROTECTION, DEPARTMENT OF HOMELAND... Additional requirements for nonresident corporations. If a nonresident corporation has not qualified to... authority of the grantor designated to execute the power of attorney on behalf of the corporation. [T.D. 84...

  19. 19 CFR 141.37 - Additional requirements for nonresident corporations.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... corporations. 141.37 Section 141.37 Customs Duties U.S. CUSTOMS AND BORDER PROTECTION, DEPARTMENT OF HOMELAND... Additional requirements for nonresident corporations. If a nonresident corporation has not qualified to... authority of the grantor designated to execute the power of attorney on behalf of the corporation. [T.D. 84...

  20. 19 CFR 141.37 - Additional requirements for nonresident corporations.

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... corporations. 141.37 Section 141.37 Customs Duties U.S. CUSTOMS AND BORDER PROTECTION, DEPARTMENT OF HOMELAND... Additional requirements for nonresident corporations. If a nonresident corporation has not qualified to... authority of the grantor designated to execute the power of attorney on behalf of the corporation. [T.D. 84...

  1. 36 CFR 1236.24 - What are the additional requirements for managing unstructured electronic records?

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... requirements for managing unstructured electronic records? 1236.24 Section 1236.24 Parks, Forests, and Public Property NATIONAL ARCHIVES AND RECORDS ADMINISTRATION RECORDS MANAGEMENT ELECTRONIC RECORDS MANAGEMENT Additional Requirements for Electronic Records § 1236.24 What are the additional requirements for managing...

  2. 36 CFR 1236.24 - What are the additional requirements for managing unstructured electronic records?

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... requirements for managing unstructured electronic records? 1236.24 Section 1236.24 Parks, Forests, and Public Property NATIONAL ARCHIVES AND RECORDS ADMINISTRATION RECORDS MANAGEMENT ELECTRONIC RECORDS MANAGEMENT Additional Requirements for Electronic Records § 1236.24 What are the additional requirements for managing...

  3. 36 CFR 1236.24 - What are the additional requirements for managing unstructured electronic records?

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... requirements for managing unstructured electronic records? 1236.24 Section 1236.24 Parks, Forests, and Public Property NATIONAL ARCHIVES AND RECORDS ADMINISTRATION RECORDS MANAGEMENT ELECTRONIC RECORDS MANAGEMENT Additional Requirements for Electronic Records § 1236.24 What are the additional requirements for managing...

  4. 36 CFR 1236.24 - What are the additional requirements for managing unstructured electronic records?

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... requirements for managing unstructured electronic records? 1236.24 Section 1236.24 Parks, Forests, and Public Property NATIONAL ARCHIVES AND RECORDS ADMINISTRATION RECORDS MANAGEMENT ELECTRONIC RECORDS MANAGEMENT Additional Requirements for Electronic Records § 1236.24 What are the additional requirements for managing...

  5. Apollo Guidance, Navigation, and Control (GNC) Hardware Overview

    NASA Technical Reports Server (NTRS)

    Interbartolo, Michael

    2009-01-01

    This viewgraph presentation reviews basic guidance, navigation and control (GNC) concepts, examines the Command and Service Module (CSM) and Lunar Module (LM) GNC organization and discusses the primary GNC and the CSM Stabilization and Control System (SCS), as well as other CSM-specific hardware. The LM Abort Guidance System (AGS), Control Electronics System (CES) and other LM-specific hardware are also addressed. Three subsystems exist on each vehicle: the computer subsystem (CSS), the inertial subsystem (ISS) and the optical subsystem (OSS). The CSS and ISS are almost identical between CSM and LM and each is designed to operate independently. CSM SCS hardware are highlighted, including translation control, rotation controls, gyro assemblies, a gyro display coupler and flight director attitude indicators. The LM AGS hardware are also highlighted and include the abort electronics assembly and the abort sensor assembly; while the LM CES hardware includes the attitude controller assembly, thrust/translation controller assemblies and the ascent engine arming assemble. Other common hardware including the Orbital Rate Display - Earth and Lunar (ORDEAL) and the Crewman Optical Alignment Sight (COAS), a docking aid, are also highlighted.

  6. 33 CFR 105.295 - Additional requirements-Certain Dangerous Cargo (CDC) facilities.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... Dangerous Cargo (CDC) facilities. 105.295 Section 105.295 Navigation and Navigable Waters COAST GUARD... Requirements § 105.295 Additional requirements-Certain Dangerous Cargo (CDC) facilities. (a) At all MARSEC Levels, owners or operators of CDC facilities must ensure the implementation of the following security...

  7. 33 CFR 105.295 - Additional requirements-Certain Dangerous Cargo (CDC) facilities.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... Dangerous Cargo (CDC) facilities. 105.295 Section 105.295 Navigation and Navigable Waters COAST GUARD... Requirements § 105.295 Additional requirements-Certain Dangerous Cargo (CDC) facilities. (a) At all MARSEC Levels, owners or operators of CDC facilities must ensure the implementation of the following security...

  8. 33 CFR 105.295 - Additional requirements-Certain Dangerous Cargo (CDC) facilities.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... Dangerous Cargo (CDC) facilities. 105.295 Section 105.295 Navigation and Navigable Waters COAST GUARD... Requirements § 105.295 Additional requirements-Certain Dangerous Cargo (CDC) facilities. (a) At all MARSEC Levels, owners or operators of CDC facilities must ensure the implementation of the following security...

  9. 33 CFR 105.295 - Additional requirements-Certain Dangerous Cargo (CDC) facilities.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... Dangerous Cargo (CDC) facilities. 105.295 Section 105.295 Navigation and Navigable Waters COAST GUARD... Requirements § 105.295 Additional requirements-Certain Dangerous Cargo (CDC) facilities. (a) At all MARSEC Levels, owners or operators of CDC facilities must ensure the implementation of the following security...

  10. 33 CFR 105.295 - Additional requirements-Certain Dangerous Cargo (CDC) facilities.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... Dangerous Cargo (CDC) facilities. 105.295 Section 105.295 Navigation and Navigable Waters COAST GUARD... Requirements § 105.295 Additional requirements-Certain Dangerous Cargo (CDC) facilities. (a) At all MARSEC Levels, owners or operators of CDC facilities must ensure the implementation of the following security...

  11. 49 CFR 173.24b - Additional general requirements for bulk packagings.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... packagings. 173.24b Section 173.24b Transportation Other Regulations Relating to Transportation PIPELINE AND... SHIPPERS-GENERAL REQUIREMENTS FOR SHIPMENTS AND PACKAGINGS Preparation of Hazardous Materials for Transportation § 173.24b Additional general requirements for bulk packagings. (a) Outage and filling limits. (1...

  12. Exploiting current-generation graphics hardware for synthetic-scene generation

    NASA Astrophysics Data System (ADS)

    Tanner, Michael A.; Keen, Wayne A.

    2010-04-01

    Increasing seeker frame rate and pixel count, as well as the demand for higher levels of scene fidelity, have driven scene generation software for hardware-in-the-loop (HWIL) and software-in-the-loop (SWIL) testing to higher levels of parallelization. Because modern PC graphics cards provide multiple computational cores (240 shader cores for a current NVIDIA Corporation GeForce and Quadro cards), implementation of phenomenology codes on graphics processing units (GPUs) offers significant potential for simultaneous enhancement of simulation frame rate and fidelity. To take advantage of this potential requires algorithm implementation that is structured to minimize data transfers between the central processing unit (CPU) and the GPU. In this paper, preliminary methodologies developed at the Kinetic Hardware In-The-Loop Simulator (KHILS) will be presented. Included in this paper will be various language tradeoffs between conventional shader programming, Compute Unified Device Architecture (CUDA) and Open Computing Language (OpenCL), including performance trades and possible pathways for future tool development.

  13. Product Assurance for Spaceflight Hardware

    NASA Technical Reports Server (NTRS)

    Monroe, Mike

    1995-01-01

    This report contains information about the tasks I have completed and the valuable experience I have gained at NASA. The report is divided into two different sections followed by a program summary sheet. The first section describes the two reports I have completed for the Office of Mission Assurance (OMA). I describe the approach and the resources and facilities used to complete each report. The second section describes my experience working in the Receipt Inspection/Quality Assurance Lab (RI/QA). The first report described is a Product Assurance Plan for the Gas Permeable Polymer Materials (GPPM) mission. The purpose of the Product Assurance Plan is to define the various requirements which are to be met through completion of the GPPM mission. The GPPM experiment is a space payload which will be flown in the shuttle's SPACEHAB module. The experiment will use microgravity to enable production of complex polymeric gas permeable materials. The second report described in the first section is a Fracture Analysis for the Mir Environmental Effects Payload (MEEP). The Fracture Analysis report is a summary of the fracture control classifications for all structural elements of the MEEP. The MEEP hardware consists of four experiment carriers, each of which contains an experiment container holding a passive experiment. The MEEP hardware will be attached to the cargo bay of the space shuttle. It will be transferred by Extravehicular Activity and mounted on the Mir space station. The second section of this report describes my experiences in the RVQA lab. I listed the different equipment I used at the lab and their functions. I described the extensive inspection process that must be completed for spaceflight hardware. Included, at the end of this section, are pictures of most of the equipment used in the lab. There is a summary sheet located at the end of this report. It briefly describes the valuable experience I have gained at NASA this summer and what I will be able to take

  14. Use of Shuttle Heritage Hardware in Space Launch System (SLS) Application-Structural Assessment

    NASA Technical Reports Server (NTRS)

    Aggarwal, Pravin; Booker, James N.

    2018-01-01

    NASA is moving forward with the development of the next generation system of human spaceflight to meet the Nation's goals of human space exploration. To meet these goals, NASA is aggressively pursuing the development of an integrated architecture and capabilities for safe crewed and cargo missions beyond low-Earth orbit. Two important tenets critical to the achievement of NASA's strategic objectives are Affordability and Safety. The Space Launch System (SLS) is a heavy-lift launch vehicle being designed/developed to meet these goals. The SLS Block 1 configuration (Figure 1) will be used for the first Exploration Mission (EM-1). It utilizes existing hardware from the Space Shuttle inventory, as much as possible, to save cost and expedite the schedule. SLS Block 1 Elements include the Core Stage, "Heritage" Boosters, Heritage Engines, and the Integrated Spacecraft and Payload Element (ISPE) consisting of the Launch Vehicle Stage Adapter (LVSA), the Multi-Purpose Crew Vehicle (MPCV) Stage Adapter (MSA), and an Interim Cryogenic Propulsion Stage (ICPS) for Earth orbit escape and beyond-Earth orbit in-space propulsive maneuvers. When heritage hardware is used in a new application, it requires a systematic evaluation of its qualification. In addition, there are previously-documented Lessons Learned (Table -1) in this area cautioning the need of a rigorous evaluation in any new application. This paper will exemplify the systematic qualification/assessment efforts made to qualify the application of Heritage Solid Rocket Booster (SRB) hardware in SLS. This paper describes the testing and structural assessment performed to ensure the application is acceptable for intended use without having any adverse impact to Safety. It will further address elements such as Loads, Material Properties and Manufacturing, Testing, Analysis, Failure Criterion and Factor of Safety (FS) considerations made to reach the conclusion and recommendation.

  15. CASIS Fact Sheet: Hardware and Facilities

    NASA Technical Reports Server (NTRS)

    Solomon, Michael R.; Romero, Vergel

    2016-01-01

    Vencore is a proven information solutions, engineering, and analytics company that helps our customers solve their most complex challenges. For more than 40 years, we have designed, developed and delivered mission-critical solutions as our customers' trusted partner. The Engineering Services Contract, or ESC, provides engineering and design services to the NASA organizations engaged in development of new technologies at the Kennedy Space Center. Vencore is the ESC prime contractor, with teammates that include Stinger Ghaffarian Technologies, Sierra Lobo, Nelson Engineering, EASi, and Craig Technologies. The Vencore team designs and develops systems and equipment to be used for the processing of space launch vehicles, spacecraft, and payloads. We perform flight systems engineering for spaceflight hardware and software; develop technologies that serve NASA's mission requirements and operations needs for the future. Our Flight Payload Support (FPS) team at Kennedy Space Center (KSC) provides engineering, development, and certification services as well as payload integration and management services to NASA and commercial customers. Our main objective is to assist principal investigators (PIs) integrate their science experiments into payload hardware for research aboard the International Space Station (ISS), commercial spacecraft, suborbital vehicles, parabolic flight aircrafts, and ground-based studies. Vencore's FPS team is AS9100 certified and a recognized implementation partner for the Center for Advancement of Science in Space (CASIS

  16. Extensible Hardware Architecture for Mobile Robots

    NASA Technical Reports Server (NTRS)

    Park, Eric; Kobayashi, Linda; Lee, Susan Y.

    2005-01-01

    The Intelligent Robotics Group at NASA Ames Research Center has developed a new mobile robot hardware architecture designed for extensibility and reconfigurability. Currently implemented on the k9 rover. and won to be integrated onto the K10 series of human-robot collaboration research robots, this architecture allows for rapid changes in instrumentation configuration and provides a high degree of modularity through a synergistic mix of off-the-shelf and custom designed components, allowing eased transplantation into a wide vane6 of mobile robot platforms. A component level overview of this architecture is presented along with a description of the changes required for implementation on K10 , followed by plans for future work.

  17. Analysis of systems hardware flown on LDEF: New findings and comparison to other retrieved spacecraft hardware

    NASA Astrophysics Data System (ADS)

    Dursch, Harry; Bohnhoff-Hlavacek, Gail; Blue, Donald; Hansen, Patricia

    1995-09-01

    The Long Duration Exposure Facility (LDEF) was retrieved in 1990 after spending 69 months in low-earth-orbit (LEO). A wide variety of mechanical, electrical, thermal, and optical systems, subsystems, and components were flown on LDEF. The Systems Special Investigation Group (Systems SIG) was formed by NASA to investigate the effects of the 69 month exposure on systems related hardware and to coordinate and collate all systems analysis of LDEF hardware. This report is the Systems SIG final report which updates earlier findings and compares LDEF systems findings to results from other retrieved spacecraft hardware such as Hubble Space Telescope. Also included are sections titled (1) Effects of Long Duration Space Exposure on Optical Scatter, (2) Contamination Survey of LDEF, and (3) Degradation of Optical Materials in Space.

  18. Analysis of systems hardware flown on LDEF: New findings and comparison to other retrieved spacecraft hardware

    NASA Technical Reports Server (NTRS)

    Dursch, Harry; Bohnhoff-Hlavacek, Gail; Blue, Donald; Hansen, Patricia

    1995-01-01

    The Long Duration Exposure Facility (LDEF) was retrieved in 1990 after spending 69 months in low-earth-orbit (LEO). A wide variety of mechanical, electrical, thermal, and optical systems, subsystems, and components were flown on LDEF. The Systems Special Investigation Group (Systems SIG) was formed by NASA to investigate the effects of the 69 month exposure on systems related hardware and to coordinate and collate all systems analysis of LDEF hardware. This report is the Systems SIG final report which updates earlier findings and compares LDEF systems findings to results from other retrieved spacecraft hardware such as Hubble Space Telescope. Also included are sections titled (1) Effects of Long Duration Space Exposure on Optical Scatter, (2) Contamination Survey of LDEF, and (3) Degradation of Optical Materials in Space.

  19. 30 CFR 75.151 - Tests for methane; qualified person; additional requirement.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Tests for methane; qualified person; additional... Certified Persons § 75.151 Tests for methane; qualified person; additional requirement. Notwithstanding the... methane unless he demonstrates to the satisfaction of an authorized representative of the Secretary that...

  20. 30 CFR 75.151 - Tests for methane; qualified person; additional requirement.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Tests for methane; qualified person; additional... Certified Persons § 75.151 Tests for methane; qualified person; additional requirement. Notwithstanding the... methane unless he demonstrates to the satisfaction of an authorized representative of the Secretary that...

  1. The Application of Hardware in the Loop Testing for Distributed Engine Control

    NASA Technical Reports Server (NTRS)

    Thomas, George L.; Culley, Dennis E.; Brand, Alex

    2016-01-01

    The essence of a distributed control system is the modular partitioning of control function across a hardware implementation. This type of control architecture requires embedding electronics in a multitude of control element nodes for the execution of those functions, and their integration as a unified system. As the field of distributed aeropropulsion control moves toward reality, questions about building and validating these systems remain. This paper focuses on the development of hardware-in-the-loop (HIL) test techniques for distributed aero engine control, and the application of HIL testing as it pertains to potential advanced engine control applications that may now be possible due to the intelligent capability embedded in the nodes.

  2. Object and Facial Recognition in Augmented and Virtual Reality: Investigation into Software, Hardware and Potential Uses

    NASA Technical Reports Server (NTRS)

    Schulte, Erin

    2017-01-01

    As augmented and virtual reality grows in popularity, and more researchers focus on its development, other fields of technology have grown in the hopes of integrating with the up-and-coming hardware currently on the market. Namely, there has been a focus on how to make an intuitive, hands-free human-computer interaction (HCI) utilizing AR and VR that allows users to control their technology with little to no physical interaction with hardware. Computer vision, which is utilized in devices such as the Microsoft Kinect, webcams and other similar hardware has shown potential in assisting with the development of a HCI system that requires next to no human interaction with computing hardware and software. Object and facial recognition are two subsets of computer vision, both of which can be applied to HCI systems in the fields of medicine, security, industrial development and other similar areas.

  3. INTEGRATED MONITORING HARDWARE DEVELOPMENTS AT LOS ALAMOS

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    R. PARKER; J. HALBIG; ET AL

    1999-09-01

    The hardware of the integrated monitoring system supports a family of instruments having a common internal architecture and firmware. Instruments can be easily configured from application-specific personality boards combined with common master-processor and high- and low-voltage power supply boards, and basic operating firmware. The instruments are designed to function autonomously to survive power and communication outages and to adapt to changing conditions. The personality boards allow measurement of gross gammas and neutrons, neutron coincidence and multiplicity, and gamma spectra. In addition, the Intelligent Local Node (ILON) provides a moderate-bandwidth network to tie together instruments, sensors, and computers.

  4. Using reconfigurable hardware to accelerate multiple sequence alignment with ClustalW.

    PubMed

    Oliver, Tim; Schmidt, Bertil; Nathan, Darran; Clemens, Ralf; Maskell, Douglas

    2005-08-15

    Aligning hundreds of sequences using progressive alignment tools such as ClustalW requires several hours on state-of-the-art workstations. We present a new approach to compute multiple sequence alignments in far shorter time using reconfigurable hardware. This results in an implementation of ClustalW with significant runtime savings on a standard off-the-shelf FPGA.

  5. CHeCS: International Space Station Medical Hardware Catalog

    NASA Technical Reports Server (NTRS)

    2008-01-01

    The purpose of this catalog is to provide a detailed description of each piece of hardware in the Crew Health Care System (CHeCS), including subpacks associated with the hardware, and to briefly describe the interfaces between the hardware and the ISS. The primary user of this document is the Space Medicine/Medical Operations ISS Biomedical Flight Controllers (ISS BMEs).

  6. Osseodensification for enhancement of spinal surgical hardware fixation.

    PubMed

    Lopez, Christopher D; Alifarag, Adham M; Torroni, Andrea; Tovar, Nick; Diaz-Siso, J Rodrigo; Witek, Lukasz; Rodriguez, Eduardo D; Coelho, Paulo G

    2017-05-01

    Integration between implant and bone is an essential concept for osseous healing requiring hardware placement. A novel approach to hardware implantation, termed osseodensification, is described here as an effective alternative. 12 sheep averaging 65kg had fixation devices installed in their C2, C3, and C4 vertebral bodies; each device measured 4mm diameter×10mm length. The left-sided vertebral body devices were implanted using regular surgical drilling (R) while the right-sided devices were implanted using osseodensification drilling (OD). The C2 and C4 vertebra provided the t=0 in vivo time point, while the C3 vertebra provided the t=3 and t=6 week time points, in vivo. Structural competence of hardware was measured using biomechanical testing of pullout strength, while the quality and degree of new bone formation and remodeling was assessed via histomorphometry. Pullout strength demonstrated osseodensification drilling to provide superior anchoring when compared to the control group collapsed over time with statistical significance (p<0.01). On Wilcoxon rank signed test, C2 and C4 specimens demonstrated significance when comparing device pullout (p=0.031) for both, and C3 pullout tests at 3 and 6 weeks collapsed over time had significance as well (p=0.027). Percent bone-to-implant contact (%BIC) analysis as a function of drilling technique demonstrated an OD group with significantly higher values relative to the R group (p<0.01). Similarly, percent bone-area-fraction-occupancy (BAFO) analysis presented with significantly higher values for the OD group compared to the R group (p=0.024). As a function of time, between 0 and 3 weeks, a decrease in BAFO was observed, a trend that reversed between 3 and 6 weeks, resulting in a BAFO value roughly equivalent to the t=0 percentage, which was attributed to an initial loss of bone fraction due to remodeling, followed by regaining of bone fraction via production of woven bone. Histomorphological data demonstrated

  7. Osseodensification for enhancement of spinal surgical hardware fixation

    PubMed Central

    Lopez, Christopher D.; Alifarag, Adham M.; Torroni, Andrea; Tovar, Nick; Diaz-Siso, J. Rodrigo; Witek, Lukasz; Rodriguez, Eduardo D.; Coelho, Paulo G.

    2017-01-01

    Integration between implant and bone is an essential concept for osseous healing requiring hardware placement. A novel approach to hardware implantation, termed osseodensification, is described here as an effective alternative. 12 sheep averaging 65 kg had fixation devices installed in their C2, C3, and C4 vertebral bodies; each device measured 4 mm diameter×10 mm length. The left-sided vertebral body devices were implanted using regular surgical drilling (R) while the right-sided devices were implanted using osseodensification drilling (OD). The C2 and C4 vertebra provided the t=0 in vivo time point, while the C3 vertebra provided the t=3 and t=6 week time points, in vivo. Structural competence of hardware was measured using biomechanical testing of pullout strength, while the quality and degree of new bone formation and remodeling was assessed via histomorphometry. Pullout strength demonstrated osseodensification drilling to provide superior anchoring when compared to the control group collapsed over time with statistical significance (p < 0.01). On Wilcoxon rank signed test, C2 and C4 specimens demonstrated significance when comparing device pullout (p=0.031) for both, and C3 pullout tests at 3 and 6 weeks collapsed over time had significance as well (p=0.027). Percent bone-to-implant contact (%BIC) analysis as a function of drilling technique demonstrated an OD group with significantly higher values relative to the R group (p < 0.01). Similarly, percent bone-area-fraction-occupancy (BAFO) analysis presented with significantly higher values for the OD group compared to the R group (p=0.024). As a function of time, between 0 and 3 weeks, a decrease in BAFO was observed, a trend that reversed between 3 and 6 weeks, resulting in a BAFO value roughly equivalent to the t=0 percentage, which was attributed to an initial loss of bone fraction due to remodeling, followed by regaining of bone fraction via production of woven bone. Histomorphological data demonstrated

  8. 76 FR 14562 - Federal Acquisition Regulation; Additional Requirements for Market Research

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-03-16

    ... circumstances and entry of new businesses, on- going market research is not a waste of manpower and taxpayers..., Sequence 1] RIN 9000-AL50 Federal Acquisition Regulation; Additional Requirements for Market Research..., Market Research, of the National Defense Authorization Act for Fiscal Year 2008. Section 826 requires the...

  9. Issues Related to Large Flight Hardware Acoustic Qualification Testing

    NASA Technical Reports Server (NTRS)

    Kolaini, Ali R.; Perry, Douglas C.; Kern, Dennis L.

    2011-01-01

    The characteristics of acoustical testing volumes generated by reverberant chambers or a circle of loudspeakers with and without large flight hardware within the testing volume are significantly different. The parameters attributing to these differences are normally not accounted for through analysis or acoustic tests prior to the qualification testing without the test hardware present. In most cases the control microphones are kept at least 2-ft away from hardware surfaces, chamber walls, and speaker surfaces to minimize the impact of the hardware in controlling the sound field. However, the acoustic absorption and radiation of sound by hardware surfaces may significantly alter the sound pressure field controlled within the chamber/speaker volume to a given specification. These parameters often result in an acoustic field that may provide under/over testing scenarios for flight hardware. In this paper the acoustic absorption by hardware surfaces will be discussed in some detail. A simple model is provided to account for some of the observations made from Mars Science Laboratory spacecraft that recently underwent acoustic qualification tests in a reverberant chamber.

  10. Ultra-low noise miniaturized neural amplifier with hardware averaging.

    PubMed

    Dweiri, Yazan M; Eggers, Thomas; McCallum, Grant; Durand, Dominique M

    2015-08-01

    Peripheral nerves carry neural signals that could be used to control hybrid bionic systems. Cuff electrodes provide a robust and stable interface but the recorded signal amplitude is small (<3 μVrms 700 Hz-7 kHz), thereby requiring a baseline noise of less than 1 μVrms for a useful signal-to-noise ratio (SNR). Flat interface nerve electrode (FINE) contacts alone generate thermal noise of at least 0.5 μVrms therefore the amplifier should add as little noise as possible. Since mainstream neural amplifiers have a baseline noise of 2 μVrms or higher, novel designs are required. Here we apply the concept of hardware averaging to nerve recordings obtained with cuff electrodes. An optimization procedure is developed to minimize noise and power simultaneously. The novel design was based on existing neural amplifiers (Intan Technologies, LLC) and is validated with signals obtained from the FINE in chronic dog experiments. We showed that hardware averaging leads to a reduction in the total recording noise by a factor of 1/√N or less depending on the source resistance. Chronic recording of physiological activity with FINE using the presented design showed significant improvement on the recorded baseline noise with at least two parallel operation transconductance amplifiers leading to a 46.1% reduction at N = 8. The functionality of these recordings was quantified by the SNR improvement and shown to be significant for N = 3 or more. The present design was shown to be capable of generating <1.5 μVrms total recording baseline noise when connected to a FINE placed on the sciatic nerve of an awake animal. An algorithm was introduced to find the value of N that can minimize both the power consumption and the noise in order to design a miniaturized ultralow-noise neural amplifier. These results demonstrate the efficacy of hardware averaging on noise improvement for neural recording with cuff electrodes, and can accommodate the presence of high source impedances that are

  11. Increased risk for complications following removal of hardware in patients with liver disease, pilon or pelvic fractures: A regression analysis.

    PubMed

    Brown, Bryan D; Steinert, Justin N; Stelzer, John W; Yoon, Richard S; Langford, Joshua R; Koval, Kenneth J

    2017-12-01

    Indications for removing orthopedic hardware on an elective basis varies widely. Although viewed as a relatively benign procedure, there is a lack of data regarding overall complication rates after fracture fixation. The purpose of this study is to determine the overall short-term complication rate for elective removal of orthopedic hardware after fracture fixation and to identify associated risk factors. Adult patients indicated for elective hardware removal after fracture fixation between July 2012 and July 2016 were screened for inclusion. Inclusion criteria included patients with hardware related pain and/or impaired cosmesis with complete medical and radiographic records and at least 3-month follow-up. Exclusion criteria were those patients indicated for hardware removal for a diagnosis of malunion, non-union, and/or infection. Data collected included patient age, gender, anatomic location of hardware removed, body mass index, ASA score, and comorbidities. Overall complications, as well as complications requiring revision surgery were recorded. Statistical analysis was performed with SPSS 20.0, and included univariate and multivariate regression analysis. 391 patients (418 procedures) were included for analysis. Overall complication rates were 8.4%, with a 3.6% revision surgery rate. Univariate regression analysis revealed that patients who had liver disease were at significant risk for complication (p=0.001) and revision surgery (p=0.036). Multivariate regression analysis showed that: 1) patients who had liver disease were at significant risk of overall complication (p=0.001) and revision surgery (p=0.039); 2) Removal of hardware following fixation for a pilon had significantly increased risk for complication (p=0.012), but not revision surgery (p=0.43); and 3) Removal of hardware for pelvic fixation had a significantly increased risk for revision surgery (p=0.017). Removal of hardware following fracture fixation is not a risk-free procedure. Patients with

  12. OpenMM 4: A Reusable, Extensible, Hardware Independent Library for High Performance Molecular Simulation

    PubMed Central

    Eastman, Peter; Friedrichs, Mark S.; Chodera, John D.; Radmer, Randall J.; Bruns, Christopher M.; Ku, Joy P.; Beauchamp, Kyle A.; Lane, Thomas J.; Wang, Lee-Ping; Shukla, Diwakar; Tye, Tony; Houston, Mike; Stich, Timo; Klein, Christoph; Shirts, Michael R.; Pande, Vijay S.

    2012-01-01

    OpenMM is a software toolkit for performing molecular simulations on a range of high performance computing architectures. It is based on a layered architecture: the lower layers function as a reusable library that can be invoked by any application, while the upper layers form a complete environment for running molecular simulations. The library API hides all hardware-specific dependencies and optimizations from the users and developers of simulation programs: they can be run without modification on any hardware on which the API has been implemented. The current implementations of OpenMM include support for graphics processing units using the OpenCL and CUDA frameworks. In addition, OpenMM was designed to be extensible, so new hardware architectures can be accommodated and new functionality (e.g., energy terms and integrators) can be easily added. PMID:23316124

  13. Universal computer test stand (recommended computer test requirements). [for space shuttle computer evaluation

    NASA Technical Reports Server (NTRS)

    1973-01-01

    Techniques are considered which would be used to characterize areospace computers with the space shuttle application as end usage. The system level digital problems which have been encountered and documented are surveyed. From the large cross section of tests, an optimum set is recommended that has a high probability of discovering documented system level digital problems within laboratory environments. Defined is a baseline hardware, software system which is required as a laboratory tool to test aerospace computers. Hardware and software baselines and additions necessary to interface the UTE to aerospace computers for test purposes are outlined.

  14. Human-machine interface hardware: The next decade

    NASA Technical Reports Server (NTRS)

    Marcus, Elizabeth A.

    1991-01-01

    In order to understand where human-machine interface hardware is headed, it is important to understand where we are today, how we got there, and what our goals for the future are. As computers become more capable, faster, and programs become more sophisticated, it becomes apparent that the interface hardware is the key to an exciting future in computing. How can a user interact and control a seemingly limitless array of parameters effectively? Today, the answer is most often a limitless array of controls. The link between these controls and human sensory motor capabilities does not utilize existing human capabilities to their full extent. Interface hardware for teleoperation and virtual environments is now facing a crossroad in design. Therefore, we as developers need to explore how the combination of interface hardware, human capabilities, and user experience can be blended to get the best performance today and in the future.

  15. 40 CFR 33.302 - Are there any additional contract administration requirements?

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... ENVIRONMENTAL PROTECTION AGENCY PROGRAMS Good Faith Efforts § 33.302 Are there any additional contract... require its prime contractor to employ the six good faith efforts described in § 33.301 even if the prime... the subcontract for any reason, the recipient must require the prime contractor to employ the six good...

  16. Towards composition of verified hardware devices

    NASA Technical Reports Server (NTRS)

    Schubert, E. Thomas; Levitt, K.; Cohen, G. C.

    1991-01-01

    Computers are being used where no affordable level of testing is adequate. Safety and life critical systems must find a replacement for exhaustive testing to guarantee their correctness. Through a mathematical proof, hardware verification research has focused on device verification and has largely ignored system composition verification. To address these deficiencies, we examine how the current hardware verification methodology can be extended to verify complete systems.

  17. Cache Hardware Approaches to Multiple Independent Levels of Security (MILS)

    DTIC Science & Technology

    2012-10-01

    systems that require that several multicore processors be connected together in a single system. However, no such boards were available on the market ...available concerning each module. However, the availability of modules seems to significantly lag the time when the corresponding hardware hits the market ...version of real mode often referred to as “Unreal mode” can be entered by loading a Local Descriptor Table (LDT) and Global Descriptor Table (GDT

  18. Movable Ground Based Recovery System for Reuseable Space Flight Hardware

    NASA Technical Reports Server (NTRS)

    Sarver, George L. (Inventor)

    2013-01-01

    A reusable space flight launch system is configured to eliminate complex descent and landing systems from the space flight hardware and move them to maneuverable ground based systems. Precision landing of the reusable space flight hardware is enabled using a simple, light weight aerodynamic device on board the flight hardware such as a parachute, and one or more translating ground based vehicles such as a hovercraft that include active speed, orientation and directional control. The ground based vehicle maneuvers itself into position beneath the descending flight hardware, matching its speed and direction and captures the flight hardware. The ground based vehicle will contain propulsion, command and GN&C functionality as well as space flight hardware landing cushioning and retaining hardware. The ground based vehicle propulsion system enables longitudinal and transverse maneuverability independent of its physical heading.

  19. Hierarchical image-based rendering using texture mapping hardware

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Max, N

    1999-01-15

    Multi-layered depth images containing color and normal information for subobjects in a hierarchical scene model are precomputed with standard z-buffer hardware for six orthogonal views. These are adaptively selected according to the proximity of the viewpoint, and combined using hardware texture mapping to create ''reprojected'' output images for new viewpoints. (If a subobject is too close to the viewpoint, the polygons in the original model are rendered.) Specific z-ranges are selected from the textures with the hardware alpha test to give accurate 3D reprojection. The OpenGL color matrix is used to transform the precomputed normals into their orientations in themore » final view, for hardware shading.« less

  20. Hardware design for the Autonomous Visibility Monitoring (AVM) observatory

    NASA Technical Reports Server (NTRS)

    Cowles, K.

    1993-01-01

    The hardware for the three Autonomous Visibility Monitoring (AVM) observatories was redesigned. Changes in hardware design include electronics components, weather sensors, and the telescope drive system. Operation of the new hardware is discussed, as well as some of its features. The redesign will allow reliable automated operation.

  1. A new control system hardware architecture for the Hobby-Eberly Telescope prime focus instrument package

    NASA Astrophysics Data System (ADS)

    Ramiller, Chuck; Taylor, Trey; Rafferty, Tom H.; Cornell, Mark E.; Rafal, Marc; Savage, Richard

    2010-07-01

    The Hobby-Eberly Telescope (HET) will be undergoing a major upgrade as a precursor to the HET Dark Energy Experiment (HETDEX‡). As part of this upgrade, the Prime Focus Instrument Package (PFIP) will be replaced with a new design that supports the HETDEX requirements along with the existing suite of instruments and anticipated future additions. This paper describes the new PFIP control system hardware plus the physical constraints and other considerations driving its design. Because of its location at the top end of the telescope, the new PFIP is essentially a stand-alone remote automation island containing over a dozen subsystems. Within the PFIP, motion controllers and modular IO systems are interconnected using a local Controller Area Network (CAN) bus and the CANOpen messaging protocol. CCD cameras that are equipped only with USB 2.0 interfaces are connected to a local Ethernet network via small microcontroller boards running embedded Linux. Links to ground-level systems pass through a 100 m cable bundle and use Ethernet over fiber optic cable exclusively; communications are either direct or through Ethernet/CAN gateways that pass CANOpen messages transparently. All of the control system hardware components are commercially available, designed for rugged industrial applications, and rated for extended temperature operation down to -10 °C.

  2. Precision Cleaning and Verification Processes Used at Marshall Space Flight Center for Critical Hardware Applications

    NASA Technical Reports Server (NTRS)

    Caruso, Salvadore V.; Cox, Jack A.; McGee, Kathleen A.

    1998-01-01

    Marshall Space Flight Center (MSFC) of the National Aeronautics and Space Administration performs many research and development programs that require hardware and assemblies to be cleaned to levels that are compatible with fuels and oxidizers (liquid oxygen, solid propellants, etc.). Also, MSFC is responsible for developing large telescope satellites which require a variety of optical systems to be cleaned. A precision cleaning shop is operated within MSFC by the Fabrication Services Division of the Materials & Processes Laboratory. Verification of cleanliness is performed for all precision cleaned articles in the Environmental and Analytical Chemistry Branch. Since the Montreal Protocol was instituted, MSFC had to find substitutes for many materials that have been in use for many years, including cleaning agents and organic solvents. As MSFC is a research center, there is a great variety of hardware that is processed in the Precision Cleaning Shop. This entails the use of many different chemicals and solvents, depending on the nature and configuration of the hardware and softgoods being cleaned. A review of the manufacturing cleaning and verification processes, cleaning materials and solvents used at MSFC and changes that resulted from the Montreal Protocol will be presented.

  3. Precision Cleaning and Verification Processes Used at Marshall Space Flight Center for Critical Hardware Applications

    NASA Technical Reports Server (NTRS)

    Caruso, Salvadore V.

    1999-01-01

    Marshall Space Flight Center (MSFC) of the National Aeronautics and Space Administration (NASA) performs many research and development programs that require hardware and assemblies to be cleaned to levels that are compatible with fuels and oxidizers (liquid oxygen, solid propellants, etc.). Also, the Center is responsible for developing large telescope satellites which requires a variety of optical systems to be cleaned. A precision cleaning shop is operated with-in MSFC by the Fabrication Services Division of the Materials & Processes Division. Verification of cleanliness is performed for all precision cleaned articles in the Analytical Chemistry Branch. Since the Montreal Protocol was instituted, MSFC had to find substitutes for many materials that has been in use for many years, including cleaning agents and organic solvents. As MSFC is a research Center, there is a great variety of hardware that is processed in the Precision Cleaning Shop. This entails the use of many different chemicals and solvents, depending on the nature and configuration of the hardware and softgoods being cleaned. A review of the manufacturing cleaning and verification processes, cleaning materials and solvents used at MSFC and changes that resulted from the Montreal Protocol will be presented.

  4. Toward Evolvable Hardware Chips: Experiments with a Programmable Transistor Array

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian

    1998-01-01

    Evolvable Hardware is reconfigurable hardware that self-configures under the control of an evolutionary algorithm. We search for a hardware configuration can be performed using software models or, faster and more accurate, directly in reconfigurable hardware. Several experiments have demonstrated the possibility to automatically synthesize both digital and analog circuits. The paper introduces an approach to automated synthesis of CMOS circuits, based on evolution on a Programmable Transistor Array (PTA). The approach is illustrated with a software experiment showing evolutionary synthesis of a circuit with a desired DC characteristic. A hardware implementation of a test PTA chip is then described, and the same evolutionary experiment is performed on the chip demonstrating circuit synthesis/self-configuration directly in hardware.

  5. Water system hardware and management rehabilitation: Qualitative evidence from Ghana, Kenya, and Zambia.

    PubMed

    Klug, Tori; Shields, Katherine F; Cronk, Ryan; Kelly, Emma; Behnke, Nikki; Lee, Kristen; Bartram, Jamie

    2017-05-01

    Sufficient, safe, continuously available drinking water is important for human health and development, yet one in three handpumps in sub-Saharan Africa are non-functional at any given time. Community management, coupled with access to external technical expertise and spare parts, is a widely promoted model for rural water supply management. However, there is limited evidence describing how community management can address common hardware and management failures of rural water systems in sub-Saharan Africa. We identified hardware and management rehabilitation pathways using qualitative data from 267 interviews and 57 focus group discussions in Ghana, Kenya, and Zambia. Study participants were water committee members, community members, and local leaders in 18 communities (six in each study country) with water systems managed by a water committee and supported by World Vision (WV), an international non-governmental organization (NGO). Government, WV or private sector employees engaged in supporting the water systems were also interviewed. Inductive analysis was used to allow for pathways to emerge from the data, based on the perspectives and experiences of study participants. Four hardware rehabilitation pathways were identified, based on the types of support used in rehabilitation. Types of support were differentiated as community or external. External support includes financial and/or technical support from government or WV employees. Community actor understanding of who to contact when a hardware breakdown occurs and easy access to technical experts were consistent reasons for rapid rehabilitation for all hardware rehabilitation pathways. Three management rehabilitation pathways were identified. All require the involvement of community leaders and were best carried out when the action was participatory. The rehabilitation pathways show how available resources can be leveraged to restore hardware breakdowns and management failures for rural water systems in sub

  6. The role of hardware in learning engineering fundamentals: An empirical study of engineering design and product analysis activity

    NASA Astrophysics Data System (ADS)

    Brereton, Margot Felicity

    A series of short engineering exercises and design projects was created to help students learn to apply abstract knowledge to physical experiences with hardware. The exercises involved designing machines from kits of materials and dissecting and analyzing familiar household products. Students worked in teams. During the activities students brought their knowledge of engineering fundamentals to bear. Videotape analysis was used to identify and characterize the ways in which hardware contributed to learning fundamental concepts. Structural and qualitative analyses of videotaped activities were undertaken. Structural analysis involved counting the references to theory and hardware and the extent of interleaving of references in activity. The analysis found that there was much more discussion linking fundamental concepts to hardware in some activities than in others. The analysis showed that the interleaving of references to theory and hardware in activity is observable and quantifiable. Qualitative analysis was used to investigate the dialog linking concepts and hardware. Students were found to advance their designs and their understanding of engineering fundamentals through a negotiation process in which they pitted abstract concepts against hardware behavior. Through this process students sorted out theoretical assumptions and causal relations. In addition they discovered design assumptions, functional connections and physical embodiments of abstract concepts in hardware, developing a repertoire of familiar hardware components and machines. Hardware was found to be integral to learning, affecting the course of inquiry and the dynamics of group interaction. Several case studies are presented to illustrate the processes at work. The research illustrates the importance of working across the boundary between abstractions and experiences with hardware in order to learn engineering and physical sciences. The research findings are: (a) the negotiation process by which

  7. 40 CFR 60.4176 - Additional requirements to provide heat input data.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 40 Protection of Environment 6 2011-07-01 2011-07-01 false Additional requirements to provide heat... requirements to provide heat input data. The owner or operator of a Hg Budget unit that monitors and reports Hg... monitor and report heat input rate at the unit level using the procedures set forth in part 75 of this...

  8. Study of the adaptability of existing hardware designs to a Pioneer Saturn/Uranus probe

    NASA Technical Reports Server (NTRS)

    1973-01-01

    The basic concept of designing a scientific entry probe for the expected range of environments at Saturn or Uranus and making the probe compatible with the interface constraints of the Pioneer spacecraft was investigated for launches in the early 1980's. It was found that the amount of hardware commonality between that used in the Pioneer Venus program and that for the Saturn/Uranus probe was approximately 85%. It is recommended that additional development studies be conducted to improve the hardware definitions of the probe design for the following: heat shield, battery, nose cap jettisoning, and thermal control insulation.

  9. Optimum SNR data compression in hardware using an Eigencoil array.

    PubMed

    King, Scott B; Varosi, Steve M; Duensing, G Randy

    2010-05-01

    With the number of receivers available on clinical MRI systems now ranging from 8 to 32 channels, data compression methods are being explored to lessen the demands on the computer for data handling and processing. Although software-based methods of compression after reception lessen computational requirements, a hardware-based method before the receiver also reduces the number of receive channels required. An eight-channel Eigencoil array is constructed by placing a hardware radiofrequency signal combiner inline after preamplification, before the receiver system. The Eigencoil array produces signal-to-noise ratio (SNR) of an optimal reconstruction using a standard sum-of-squares reconstruction, with peripheral SNR gains of 30% over the standard array. The concept of "receiver channel reduction" or MRI data compression is demonstrated, with optimal SNR using only four channels, and with a three-channel Eigencoil, superior sum-of-squares SNR was achieved over the standard eight-channel array. A three-channel Eigencoil portion of a product neurovascular array confirms in vivo SNR performance and demonstrates parallel MRI up to R = 3. This SNR-preserving data compression method advantageously allows users of MRI systems with fewer receiver channels to achieve the SNR of higher-channel MRI systems. (c) 2010 Wiley-Liss, Inc.

  10. Tinker's Toys: Lessons from Bank Street: Hardware.

    ERIC Educational Resources Information Center

    Tinker, Robert

    1985-01-01

    Bank Street Laboratory (a set of hardware/software tools for measuring temperature, light, and sound) consists of a board that plugs into Apple microcomputers, cabling, software, and six probes. Discusses the laboratory's hardware, including the analog-to-digital converter, multiplier chip, and modular connectors. Circuit diagrams of components…

  11. Hardware device to physical structure binding and authentication

    DOEpatents

    Hamlet, Jason R.; Stein, David J.; Bauer, Todd M.

    2013-08-20

    Detection and deterrence of device tampering and subversion may be achieved by including a cryptographic fingerprint unit within a hardware device for authenticating a binding of the hardware device and a physical structure. The cryptographic fingerprint unit includes an internal physically unclonable function ("PUF") circuit disposed in or on the hardware device, which generate an internal PUF value. Binding logic is coupled to receive the internal PUF value, as well as an external PUF value associated with the physical structure, and generates a binding PUF value, which represents the binding of the hardware device and the physical structure. The cryptographic fingerprint unit also includes a cryptographic unit that uses the binding PUF value to allow a challenger to authenticate the binding.

  12. Compressive Sensing Image Sensors-Hardware Implementation

    PubMed Central

    Dadkhah, Mohammadreza; Deen, M. Jamal; Shirani, Shahram

    2013-01-01

    The compressive sensing (CS) paradigm uses simultaneous sensing and compression to provide an efficient image acquisition technique. The main advantages of the CS method include high resolution imaging using low resolution sensor arrays and faster image acquisition. Since the imaging philosophy in CS imagers is different from conventional imaging systems, new physical structures have been developed for cameras that use the CS technique. In this paper, a review of different hardware implementations of CS encoding in optical and electrical domains is presented. Considering the recent advances in CMOS (complementary metal–oxide–semiconductor) technologies and the feasibility of performing on-chip signal processing, important practical issues in the implementation of CS in CMOS sensors are emphasized. In addition, the CS coding for video capture is discussed. PMID:23584123

  13. Optimized design of embedded DSP system hardware supporting complex algorithms

    NASA Astrophysics Data System (ADS)

    Li, Yanhua; Wang, Xiangjun; Zhou, Xinling

    2003-09-01

    The paper presents an optimized design method for a flexible and economical embedded DSP system that can implement complex processing algorithms as biometric recognition, real-time image processing, etc. It consists of a floating-point DSP, 512 Kbytes data RAM, 1 Mbytes FLASH program memory, a CPLD for achieving flexible logic control of input channel and a RS-485 transceiver for local network communication. Because of employing a high performance-price ratio DSP TMS320C6712 and a large FLASH in the design, this system permits loading and performing complex algorithms with little algorithm optimization and code reduction. The CPLD provides flexible logic control for the whole DSP board, especially in input channel, and allows convenient interface between different sensors and DSP system. The transceiver circuit can transfer data between DSP and host computer. In the paper, some key technologies are also introduced which make the whole system work efficiently. Because of the characters referred above, the hardware is a perfect flat for multi-channel data collection, image processing, and other signal processing with high performance and adaptability. The application section of this paper presents how this hardware is adapted for the biometric identification system with high identification precision. The result reveals that this hardware is easy to interface with a CMOS imager and is capable of carrying out complex biometric identification algorithms, which require real-time process.

  14. Applying a Genetic Algorithm to Reconfigurable Hardware

    NASA Technical Reports Server (NTRS)

    Wells, B. Earl; Weir, John; Trevino, Luis; Patrick, Clint; Steincamp, Jim

    2004-01-01

    This paper investigates the feasibility of applying genetic algorithms to solve optimization problems that are implemented entirely in reconfgurable hardware. The paper highlights the pe$ormance/design space trade-offs that must be understood to effectively implement a standard genetic algorithm within a modem Field Programmable Gate Array, FPGA, reconfgurable hardware environment and presents a case-study where this stochastic search technique is applied to standard test-case problems taken from the technical literature. In this research, the targeted FPGA-based platform and high-level design environment was the Starbridge Hypercomputing platform, which incorporates multiple Xilinx Virtex II FPGAs, and the Viva TM graphical hardware description language.

  15. An Overview of Hardware for Protein Crystallization in a Magnetic Field.

    PubMed

    Yan, Er-Kai; Zhang, Chen-Yan; He, Jin; Yin, Da-Chuan

    2016-11-16

    Protein crystallization under a magnetic field is an interesting research topic because a magnetic field may provide a special environment to acquire improved quality protein crystals. Because high-quality protein crystals are very useful in high-resolution structure determination using diffraction techniques (X-ray, neutron, and electron diffraction), research using magnetic fields in protein crystallization has attracted substantial interest; some studies have been performed in the past two decades. In this research field, the hardware is especially essential for successful studies because the environment is special and the design and utilization of the research apparatus in such an environment requires special considerations related to the magnetic field. This paper reviews the hardware for protein crystallization (including the magnet systems and the apparatus designed for use in a magnetic field) and progress in this area. Future prospects in this field will also be discussed.

  16. Process of videotape making: presentation design, software, and hardware

    NASA Astrophysics Data System (ADS)

    Dickinson, Robert R.; Brady, Dan R.; Bennison, Tim; Burns, Thomas; Pines, Sheldon

    1991-06-01

    The use of technical video tape presentations for communicating abstractions of complex data is now becoming commonplace. While the use of video tapes in the day-to-day work of scientists and engineers is still in its infancy, their use as applications oriented conferences is now growing rapidly. Despite these advancements, there is still very little that is written down about the process of making technical videotapes. For printed media, different presentation styles are well known for categories such as results reports, executive summary reports, and technical papers and articles. In this paper, the authors present ideas on the topic of technical videotape presentation design in a format that is worth referring to. They have started to document the ways in which the experience of media specialist, teaching professionals, and character animators can be applied to scientific animation. Software and hardware considerations are also discussed. For this portion, distinctions are drawn between the software and hardware required for computer animation (frame at a time) productions, and live recorded interaction with a computer graphics display.

  17. An environmental testing facility for Space Station Freedom power management and distribution hardware

    NASA Technical Reports Server (NTRS)

    Jackola, Arthur S.; Hartjen, Gary L.

    1992-01-01

    The plans for a new test facility, including new environmental test systems, which are presently under construction, and the major environmental Test Support Equipment (TSE) used therein are addressed. This all-new Rocketdyne facility will perform space simulation environmental tests on Power Management and Distribution (PMAD) hardware to Space Station Freedom (SSF) at the Engineering Model, Qualification Model, and Flight Model levels of fidelity. Testing will include Random Vibration in three axes - Thermal Vacuum, Thermal Cycling and Thermal Burn-in - as well as numerous electrical functional tests. The facility is designed to support a relatively high throughput of hardware under test, while maintaining the high standards required for a man-rated space program.

  18. Ka-Band Wide-Bandgap Solid-State Power Amplifier: Hardware Validation

    NASA Technical Reports Server (NTRS)

    Epp, L.; Khan, P.; Silva, A.

    2005-01-01

    Motivated by recent advances in wide-bandgap (WBG) gallium nitride (GaN) semiconductor technology, there is considerable interest in developing efficient solid-state power amplifiers (SSPAs) as an alternative to the traveling-wave tube amplifier (TWTA) for space applications. This article documents proof-of-concept hardware used to validate power-combining technologies that may enable a 120-W, 40 percent power-added efficiency (PAE) SSPA. Results in previous articles [1-3] indicate that architectures based on at least three power combiner designs are likely to enable the target SSPA. Previous architecture performance analyses and estimates indicate that the proposed architectures can power combine 16 to 32 individual monolithic microwave integrated circuits (MMICs) with >80 percent combining efficiency. This combining efficiency would correspond to MMIC requirements of 5- to 10-W output power and >48 percent PAE. In order to validate the performance estimates of the three proposed architectures, measurements of proof-of-concept hardware are reported here.

  19. 15 CFR 291.6 - Additional requirements; Federal policies and procedures.

    Code of Federal Regulations, 2012 CFR

    2012-01-01

    ... 15 Commerce and Foreign Trade 1 2012-01-01 2012-01-01 false Additional requirements; Federal policies and procedures. 291.6 Section 291.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST...

  20. 15 CFR 291.6 - Additional requirements; Federal policies and procedures.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 15 Commerce and Foreign Trade 1 2011-01-01 2011-01-01 false Additional requirements; Federal policies and procedures. 291.6 Section 291.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST...

  1. 15 CFR 291.6 - Additional requirements; Federal policies and procedures.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 15 Commerce and Foreign Trade 1 2010-01-01 2010-01-01 false Additional requirements; Federal policies and procedures. 291.6 Section 291.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST...

  2. 15 CFR 291.6 - Additional requirements; Federal policies and procedures.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 15 Commerce and Foreign Trade 1 2014-01-01 2014-01-01 false Additional requirements; Federal policies and procedures. 291.6 Section 291.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST...

  3. 15 CFR 291.6 - Additional requirements; Federal policies and procedures.

    Code of Federal Regulations, 2013 CFR

    2013-01-01

    ... 15 Commerce and Foreign Trade 1 2013-01-01 2013-01-01 false Additional requirements; Federal policies and procedures. 291.6 Section 291.6 Commerce and Foreign Trade Regulations Relating to Commerce and Foreign Trade NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY, DEPARTMENT OF COMMERCE NIST...

  4. Performance Analysis of a Hardware Implemented Complex Signal Kurtosis Radio-Frequency Interference Detector

    NASA Technical Reports Server (NTRS)

    Schoenwald, Adam J.; Bradley, Damon C.; Mohammed, Priscilla N.; Piepmeier, Jeffrey R.; Wong, Mark

    2016-01-01

    Radio-frequency interference (RFI) is a known problem for passive remote sensing as evidenced in the L-band radiometers SMOS, Aquarius and more recently, SMAP. Various algorithms have been developed and implemented on SMAP to improve science measurements. This was achieved by the use of a digital microwave radiometer. RFI mitigation becomes more challenging for microwave radiometers operating at higher frequencies in shared allocations. At higher frequencies larger bandwidths are also desirable for lower measurement noise further adding to processing challenges. This work focuses on finding improved RFI mitigation techniques that will be effective at additional frequencies and at higher bandwidths. To aid the development and testing of applicable detection and mitigation techniques, a wide-band RFI algorithm testing environment has been developed using the Reconfigurable Open Architecture Computing Hardware System (ROACH) built by the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) Group. The testing environment also consists of various test equipment used to reproduce typical signals that a radiometer may see including those with and without RFI. The testing environment permits quick evaluations of RFI mitigation algorithms as well as show that they are implementable in hardware. The algorithm implemented is a complex signal kurtosis detector which was modeled and simulated. The complex signal kurtosis detector showed improved performance over the real kurtosis detector under certain conditions. The real kurtosis is implemented on SMAP at 24 MHz bandwidth. The complex signal kurtosis algorithm was then implemented in hardware at 200 MHz bandwidth using the ROACH. In this work, performance of the complex signal kurtosis and the real signal kurtosis are compared. Performance evaluations and comparisons in both simulation as well as experimental hardware implementations were done with the use of receiver operating characteristic (ROC

  5. A Survey of Display Hardware and Software.

    ERIC Educational Resources Information Center

    Poore, Jesse H., Jr.; And Others

    Reported are two papers which deal with the fundamentals of display hardware and software in computer systems. The first report presents the basic principles of display hardware in terms of image generation from buffers presumed to be loaded and controlled by a digital computer. The concepts surrounding the electrostatic tube, the electromagnetic…

  6. 5 CFR 890.1025 - Cases where additional fact-finding is not required.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... Sanctions Imposed Against Health Care Providers Permissive Debarments § 890.1025 Cases where additional fact..., suspension, restriction, or nonrenewal by a State licensing authority; (2) Debarment, exclusion, suspension... additional fact-finding proceeding is not required when: (a) Prior adjudication. The proposed debarment is...

  7. The J-2X Upper Stage Engine: From Heritage to Hardware

    NASA Technical Reports Server (NTRS)

    Byrd, THomas

    2008-01-01

    NASA's Global Exploration Strategy requires safe, reliable, robust, efficient transportation to support sustainable operations from Earth to orbit and into the far reaches of the solar system. NASA selected the Ares I crew launch vehicle and the Ares V cargo launch vehicle to provide that transportation. Guiding principles in creating the architecture represented by the Ares vehicles were the maximum use of heritage hardware and legacy knowledge, particularly Space Shuttle assets, and commonality between the Ares vehicles where possible to streamline the hardware development approach and reduce programmatic, technical, and budget risks. The J-2X exemplifies those goals. It was selected by the Exploration Systems Architecture Study (ESAS) as the upper stage propulsion for the Ares I Upper Stage and the Ares V Earth Departure Stage (EDS). The J-2X is an evolved version ofthe historic J-2 engine that successfully powered the second stage of the Saturn I launch vehicle and the second and third stages of the Saturn V launch vehicle. The Constellation architecture, however, requires performance greater than its predecessor. The new architecture calls for larger payloads delivered to the Moon and demands greater loss of mission reliability and numerous other requirements associated with human rating that were not applied to the original J-2. As a result, the J-2X must operate at much higher temperatures, pressures, and flow rates than the heritage J-2, making it one of the highest performing gas generator cycle engines ever built, approaching the efficiency of more complex stage combustion engines. Development is focused on early risk mitigation, component and subassembly test, and engine system test. The development plans include testing engine components, including the subscale injector, main igniter, powerpack assembly (turbopumps, gas generator and associated ducting and structural mounts), full-scale gas generator, valves, and control software with hardware

  8. Hardware Implementation of Lossless Adaptive and Scalable Hyperspectral Data Compression for Space

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh; Keymeulen, Didier; Bakhshi, Alireza; Klimesh, Matthew

    2009-01-01

    On-board lossless hyperspectral data compression reduces data volume in order to meet NASA and DoD limited downlink capabilities. The technique also improves signature extraction, object recognition and feature classification capabilities by providing exact reconstructed data on constrained downlink resources. At JPL a novel, adaptive and predictive technique for lossless compression of hyperspectral data was recently developed. This technique uses an adaptive filtering method and achieves a combination of low complexity and compression effectiveness that far exceeds state-of-the-art techniques currently in use. The JPL-developed 'Fast Lossless' algorithm requires no training data or other specific information about the nature of the spectral bands for a fixed instrument dynamic range. It is of low computational complexity and thus well-suited for implementation in hardware. A modified form of the algorithm that is better suited for data from pushbroom instruments is generally appropriate for flight implementation. A scalable field programmable gate array (FPGA) hardware implementation was developed. The FPGA implementation achieves a throughput performance of 58 Msamples/sec, which can be increased to over 100 Msamples/sec in a parallel implementation that uses twice the hardware resources This paper describes the hardware implementation of the 'Modified Fast Lossless' compression algorithm on an FPGA. The FPGA implementation targets the current state-of-the-art FPGAs (Xilinx Virtex IV and V families) and compresses one sample every clock cycle to provide a fast and practical real-time solution for space applications.

  9. 12 CFR 987.8 - Additional requirements; notice of attachment for Book-entry consolidated obligations.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... for Book-entry consolidated obligations. 987.8 Section 987.8 Banks and Banking FEDERAL HOUSING FINANCE BOARD OFFICE OF FINANCE BOOK-ENTRY PROCEDURE FOR CONSOLIDATED OBLIGATIONS § 987.8 Additional requirements; notice of attachment for Book-entry consolidated obligations. (a) Additional requirements. In any...

  10. 36 CFR § 1236.24 - What are the additional requirements for managing unstructured electronic records?

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... requirements for managing unstructured electronic records? § 1236.24 Section § 1236.24 Parks, Forests, and Public Property NATIONAL ARCHIVES AND RECORDS ADMINISTRATION RECORDS MANAGEMENT ELECTRONIC RECORDS MANAGEMENT Additional Requirements for Electronic Records § 1236.24 What are the additional requirements for...

  11. 40 CFR 80.521 - What are the standards and identification requirements for diesel fuel additives?

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... identification requirements for diesel fuel additives? 80.521 Section 80.521 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES... requirements for diesel fuel additives? (a) Except as provided in paragraph (b) of this section, any diesel...

  12. 40 CFR 80.521 - What are the standards and identification requirements for diesel fuel additives?

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... identification requirements for diesel fuel additives? 80.521 Section 80.521 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES... requirements for diesel fuel additives? (a) Except as provided in paragraph (b) of this section, any diesel...

  13. 40 CFR 80.521 - What are the standards and identification requirements for diesel fuel additives?

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... identification requirements for diesel fuel additives? 80.521 Section 80.521 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES... requirements for diesel fuel additives? (a) Except as provided in paragraph (b) of this section, any diesel...

  14. 40 CFR 80.521 - What are the standards and identification requirements for diesel fuel additives?

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... identification requirements for diesel fuel additives? 80.521 Section 80.521 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES... requirements for diesel fuel additives? (a) Except as provided in paragraph (b) of this section, any diesel...

  15. 40 CFR 80.521 - What are the standards and identification requirements for diesel fuel additives?

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... identification requirements for diesel fuel additives? 80.521 Section 80.521 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES... requirements for diesel fuel additives? (a) Except as provided in paragraph (b) of this section, any diesel...

  16. 42 CFR 489.66 - Additional requirements of the surety bond.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 42 Public Health 5 2011-10-01 2011-10-01 false Additional requirements of the surety bond. 489.66 Section 489.66 Public Health CENTERS FOR MEDICARE & MEDICAID SERVICES, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) STANDARDS AND CERTIFICATION PROVIDER AGREEMENTS AND SUPPLIER APPROVAL Surety Bond...

  17. Space Station Freedom electrical power system hardware commonality with the United States Polar Platform

    NASA Technical Reports Server (NTRS)

    Rieker, Lorra L.; Haraburda, Francis M.

    1989-01-01

    The National Aeronautics and Space Administration has adopted the policy to achieve the maximum practical level of commonality for the Space Station Freedom program in order to significantly reduce life cycle costs. Commonality means using identical or similar hardware/software for meeting common sets of functionally similar requirements. Information on how the concept of commonality is being implemented with respect to electric power system hardware for the Space Station Freedom and the U.S. Polar Platform is presented. Included is a historical account of the candidate common items which have the potential to serve the same power system functions on both Freedom and the Polar Platform.

  18. 45 CFR 287.60 - Are there additional financial reporting and auditing requirements?

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 45 Public Welfare 2 2010-10-01 2010-10-01 false Are there additional financial reporting and... there additional financial reporting and auditing requirements? (a) The reporting of expenditures are... comply with all laws, regulations, and Departmental policies that govern submission of financial reports...

  19. 45 CFR 287.60 - Are there additional financial reporting and auditing requirements?

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 45 Public Welfare 2 2011-10-01 2011-10-01 false Are there additional financial reporting and... there additional financial reporting and auditing requirements? (a) The reporting of expenditures are... comply with all laws, regulations, and Departmental policies that govern submission of financial reports...

  20. Use of CCSDS Packets Over SpaceWire to Control Hardware

    NASA Technical Reports Server (NTRS)

    Haddad, Omar; Blau, Michael; Haghani, Noosha; Yuknis, William; Albaijes, Dennis

    2012-01-01

    For the Lunar Reconnaissance Orbiter, the Command and Data Handling subsystem consisted of several electronic hardware assemblies that were connected with SpaceWire serial links. Electronic hardware would be commanded/controlled and telemetry data was obtained using the SpaceWire links. Prior art focused on parallel data buses and other types of serial buses, which were not compatible with the SpaceWire and the core flight executive (CFE) software bus. This innovation applies to anything that utilizes both SpaceWire networks and the CFE software. The CCSDS (Consultative Committee for Space Data Systems) packet contains predetermined values in its payload fields that electronic hardware attached at the terminus of the SpaceWire node would decode, interpret, and execute. The hardware s interpretation of the packet data would enable the hardware to change its state/configuration (command) or generate status (telemetry). The primary purpose is to provide an interface that is compatible with the hardware and the CFE software bus. By specifying the format of the CCSDS packet, it is possible to specify how the resulting hardware is to be built (in terms of digital logic) that results in a hardware design that can be controlled by the CFE software bus in the final application

  1. Returned Solar Max hardware degradation study results

    NASA Technical Reports Server (NTRS)

    Triolo, Jack J.; Ousley, Gilbert W.

    1989-01-01

    The Solar Maximum Repair Mission returned with the replaced hardware that had been in low Earth orbit for over four years. The materials of this returned hardware gave the aerospace community an opportunity to study the realtime effects of atomic oxygen, solar radiation, impact particles, charged particle radiation, and molecular contamination. The results of these studies are summarized.

  2. 42 CFR 489.66 - Additional requirements of the surety bond.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 42 Public Health 5 2010-10-01 2010-10-01 false Additional requirements of the surety bond. 489.66 Section 489.66 Public Health CENTERS FOR MEDICARE & MEDICAID SERVICES, DEPARTMENT OF HEALTH AND HUMAN... of this subpart, remains effective and the Surety remains liable for unpaid claims, civil money...

  3. 46 CFR 62.50-30 - Additional requirements for periodically unattended machinery plants.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 2 2014-10-01 2014-10-01 false Additional requirements for periodically unattended machinery plants. 62.50-30 Section 62.50-30 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) MARINE ENGINEERING VITAL SYSTEM AUTOMATION Automated Self-propelled Vessel Manning § 62.50-30 Additional...

  4. DATAS Hardware Diagnostic Tests

    DOT National Transportation Integrated Search

    1990-10-01

    This document is reference material for personnel using the Data Link and : Analysis System (DATAS) for hardware diagnostic testing. Included in this : document is a brief overall description of the DATAS, and a thorough : description of how to opera...

  5. A historical survey of algorithms and hardware architectures for neural-inspired and neuromorphic computing applications

    DOE PAGES

    James, Conrad D.; Aimone, James B.; Miner, Nadine E.; ...

    2017-01-04

    In this study, biological neural networks continue to inspire new developments in algorithms and microelectronic hardware to solve challenging data processing and classification problems. Here in this research, we survey the history of neural-inspired and neuromorphic computing in order to examine the complex and intertwined trajectories of the mathematical theory and hardware developed in this field. Early research focused on adapting existing hardware to emulate the pattern recognition capabilities of living organisms. Contributions from psychologists, mathematicians, engineers, neuroscientists, and other professions were crucial to maturing the field from narrowly-tailored demonstrations to more generalizable systems capable of addressing difficult problem classesmore » such as object detection and speech recognition. Algorithms that leverage fundamental principles found in neuroscience such as hierarchical structure, temporal integration, and robustness to error have been developed, and some of these approaches are achieving world-leading performance on particular data classification tasks. Additionally, novel microelectronic hardware is being developed to perform logic and to serve as memory in neuromorphic computing systems with optimized system integration and improved energy efficiency. Key to such advancements was the incorporation of new discoveries in neuroscience research, the transition away from strict structural replication and towards the functional replication of neural systems, and the use of mathematical theory frameworks to guide algorithm and hardware developments.« less

  6. A historical survey of algorithms and hardware architectures for neural-inspired and neuromorphic computing applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    James, Conrad D.; Aimone, James B.; Miner, Nadine E.

    In this study, biological neural networks continue to inspire new developments in algorithms and microelectronic hardware to solve challenging data processing and classification problems. Here in this research, we survey the history of neural-inspired and neuromorphic computing in order to examine the complex and intertwined trajectories of the mathematical theory and hardware developed in this field. Early research focused on adapting existing hardware to emulate the pattern recognition capabilities of living organisms. Contributions from psychologists, mathematicians, engineers, neuroscientists, and other professions were crucial to maturing the field from narrowly-tailored demonstrations to more generalizable systems capable of addressing difficult problem classesmore » such as object detection and speech recognition. Algorithms that leverage fundamental principles found in neuroscience such as hierarchical structure, temporal integration, and robustness to error have been developed, and some of these approaches are achieving world-leading performance on particular data classification tasks. Additionally, novel microelectronic hardware is being developed to perform logic and to serve as memory in neuromorphic computing systems with optimized system integration and improved energy efficiency. Key to such advancements was the incorporation of new discoveries in neuroscience research, the transition away from strict structural replication and towards the functional replication of neural systems, and the use of mathematical theory frameworks to guide algorithm and hardware developments.« less

  7. Programming languages and compiler design for realistic quantum hardware.

    PubMed

    Chong, Frederic T; Franklin, Diana; Martonosi, Margaret

    2017-09-13

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  8. Programming languages and compiler design for realistic quantum hardware

    NASA Astrophysics Data System (ADS)

    Chong, Frederic T.; Franklin, Diana; Martonosi, Margaret

    2017-09-01

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  9. An Overview of Hardware for Protein Crystallization in a Magnetic Field

    PubMed Central

    Yan, Er-Kai; Zhang, Chen-Yan; He, Jin; Yin, Da-Chuan

    2016-01-01

    Protein crystallization under a magnetic field is an interesting research topic because a magnetic field may provide a special environment to acquire improved quality protein crystals. Because high-quality protein crystals are very useful in high-resolution structure determination using diffraction techniques (X-ray, neutron, and electron diffraction), research using magnetic fields in protein crystallization has attracted substantial interest; some studies have been performed in the past two decades. In this research field, the hardware is especially essential for successful studies because the environment is special and the design and utilization of the research apparatus in such an environment requires special considerations related to the magnetic field. This paper reviews the hardware for protein crystallization (including the magnet systems and the apparatus designed for use in a magnetic field) and progress in this area. Future prospects in this field will also be discussed. PMID:27854318

  10. Space station common module power system network topology and hardware development

    NASA Technical Reports Server (NTRS)

    Landis, D. M.

    1985-01-01

    Candidate power system newtork topologies for the space station common module are defined and developed and the necessary hardware for test and evaluation is provided. Martin Marietta's approach to performing the proposed program is presented. Performance of the tasks described will assure systematic development and evaluation of program results, and will provide the necessary management tools, visibility, and control techniques for performance assessment. The plan is submitted in accordance with the data requirements given and includes a comprehensive task logic flow diagram, time phased manpower requirements, a program milestone schedule, and detailed descriptions of each program task.

  11. 41 CFR 60-2.17 - Additional required elements of affirmative action programs.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... elements of affirmative action programs. 60-2.17 Section 60-2.17 Public Contracts and Property Management... EMPLOYMENT OPPORTUNITY, DEPARTMENT OF LABOR 2-AFFIRMATIVE ACTION PROGRAMS Purpose and Contents of Affirmative Action Programs § 60-2.17 Additional required elements of affirmative action programs. In addition to the...

  12. 30 CFR 250.177 - What additional requirements may the Regional Supervisor order for a suspension?

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 2 2010-07-01 2010-07-01 false What additional requirements may the Regional... Suspensions § 250.177 What additional requirements may the Regional Supervisor order for a suspension? If MMS grants or directs a suspension under paragraph § 250.172(b), the Regional Supervisor may require you to...

  13. BASS Hardware Setup

    NASA Image and Video Library

    2016-01-27

    ISS046e025945 (01/27/2016) --- NASA astronaut Tim Kopra sets up hardware for the Burning and Suppression of Solids – Milliken, or BASS-M, experiment. The BASS-M investigation tests flame-retardant cotton fabrics to determine how well they resist burning in microgravity. Results benefit research on flame-retardant textiles that can be used on Earth and in space

  14. Hardware survey for the avionics test bed

    NASA Technical Reports Server (NTRS)

    Cobb, J. M.

    1981-01-01

    A survey of maor hardware items that could possibly be used in the development of an avionics test bed for space shuttle attached or autonomous large space structures was conducted in NASA Johnson Space Center building 16. The results of the survey are organized to show the hardware by laboratory usage. Computer systems in each laboratory are described in some detail.

  15. Spectral-element Seismic Wave Propagation on CUDA/OpenCL Hardware Accelerators

    NASA Astrophysics Data System (ADS)

    Peter, D. B.; Videau, B.; Pouget, K.; Komatitsch, D.

    2015-12-01

    Seismic wave propagation codes are essential tools to investigate a variety of wave phenomena in the Earth. Furthermore, they can now be used for seismic full-waveform inversions in regional- and global-scale adjoint tomography. Although these seismic wave propagation solvers are crucial ingredients to improve the resolution of tomographic images to answer important questions about the nature of Earth's internal processes and subsurface structure, their practical application is often limited due to high computational costs. They thus need high-performance computing (HPC) facilities to improving the current state of knowledge. At present, numerous large HPC systems embed many-core architectures such as graphics processing units (GPUs) to enhance numerical performance. Such hardware accelerators can be programmed using either the CUDA programming environment or the OpenCL language standard. CUDA software development targets NVIDIA graphic cards while OpenCL was adopted by additional hardware accelerators, like e.g. AMD graphic cards, ARM-based processors as well as Intel Xeon Phi coprocessors. For seismic wave propagation simulations using the open-source spectral-element code package SPECFEM3D_GLOBE, we incorporated an automatic source-to-source code generation tool (BOAST) which allows us to use meta-programming of all computational kernels for forward and adjoint runs. Using our BOAST kernels, we generate optimized source code for both CUDA and OpenCL languages within the source code package. Thus, seismic wave simulations are able now to fully utilize CUDA and OpenCL hardware accelerators. We show benchmarks of forward seismic wave propagation simulations using SPECFEM3D_GLOBE on CUDA/OpenCL GPUs, validating results and comparing performances for different simulations and hardware usages.

  16. OPERATOR BURDEN IN METAL ADDITIVE MANUFACTURING

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Elliott, Amy M; Love, Lonnie J

    2016-01-01

    Additive manufacturing (AM) is an emerging manufacturing process that creates usable machine parts via layer-by-layer joining of a stock material. With this layer-wise approach, high-performance geometries can be created which are impossible with traditional manufacturing methods. Metal AM technology has the potential to significantly reduce the manufacturing burden of developing custom hardware; however, a major consideration in choosing a metal AM system is the required amount of operator involvement (i.e., operator burden) in the manufacturing process. The operator burden not only determines the amount of operator training and specialization required but also the usability of the system in a facility.more » As operators of several metal AM processes, the Manufacturing Demonstration Facility (MDF) at Oak Ridge National Labs is uniquely poised to provide insight into requirements for operator involvement in each of the three major metal AM processes. The paper covers an overview of each of the three metal AM technologies, focusing on the burden on the operator to complete the build cycle, process the part for final use, and reset the AM equipment for future builds.« less

  17. Defining Exercise Performance Metrics for Flight Hardware Development

    NASA Technical Reports Server (NTRS)

    Beyene, Nahon M.

    2004-01-01

    The space industry has prevailed over numerous design challenges in the spirit of exploration. Manned space flight entails creating products for use by humans and the Johnson Space Center has pioneered this effort as NASA's center for manned space flight. NASA Astronauts use a suite of flight exercise hardware to maintain strength for extravehicular activities and to minimize losses in muscle mass and bone mineral density. With a cycle ergometer, treadmill, and the Resistive Exercise Device available on the International Space Station (ISS), the Space Medicine community aspires to reproduce physical loading schemes that match exercise performance in Earth s gravity. The resistive exercise device presents the greatest challenge with the duty of accommodating 20 different exercises and many variations on the core set of exercises. This paper presents a methodology for capturing engineering parameters that can quantify proper resistive exercise performance techniques. For each specified exercise, the method provides engineering parameters on hand spacing, foot spacing, and positions of the point of load application at the starting point, midpoint, and end point of the exercise. As humans vary in height and fitness levels, the methodology presents values as ranges. In addition, this method shows engineers the proper load application regions on the human body. The methodology applies to resistive exercise in general and is in use for the current development of a Resistive Exercise Device. Exercise hardware systems must remain available for use and conducive to proper exercise performance as a contributor to mission success. The astronauts depend on exercise hardware to support extended stays aboard the ISS. Future plans towards exploration of Mars and beyond acknowledge the necessity of exercise. Continuous improvement in technology and our understanding of human health maintenance in space will allow us to support the exploration of Mars and the future of space

  18. Support for Diagnosis of Custom Computer Hardware

    NASA Technical Reports Server (NTRS)

    Molock, Dwaine S.

    2008-01-01

    The Coldfire SDN Diagnostics software is a flexible means of exercising, testing, and debugging custom computer hardware. The software is a set of routines that, collectively, serve as a common software interface through which one can gain access to various parts of the hardware under test and/or cause the hardware to perform various functions. The routines can be used to construct tests to exercise, and verify the operation of, various processors and hardware interfaces. More specifically, the software can be used to gain access to memory, to execute timer delays, to configure interrupts, and configure processor cache, floating-point, and direct-memory-access units. The software is designed to be used on diverse NASA projects, and can be customized for use with different processors and interfaces. The routines are supported, regardless of the architecture of a processor that one seeks to diagnose. The present version of the software is configured for Coldfire processors on the Subsystem Data Node processor boards of the Solar Dynamics Observatory. There is also support for the software with respect to Mongoose V, RAD750, and PPC405 processors or their equivalents.

  19. Evaluation of pressurized water cleaning systems for hardware refurbishment

    NASA Technical Reports Server (NTRS)

    Dillard, Terry W.; Deweese, Charles D.; Hoppe, David T.; Vickers, John H.; Swenson, Gary J.; Hutchens, Dale E.

    1995-01-01

    Historically, refurbishment processes for RSRM motor cases and components have employed environmentally harmful materials. Specifically, vapor degreasing processes consume and emit large amounts of ozone depleting compounds. This program evaluates the use of pressurized water cleaning systems as a replacement for the vapor degreasing process. Tests have been conducted to determine if high pressure water washing, without any form of additive cleaner, is a viable candidate for replacing vapor degreasing processes. This paper discusses the findings thus far of Engineering Test Plan - 1168 (ETP-1168), 'Evaluation of Pressurized Water Cleaning Systems for Hardware Refurbishment.'

  20. A hardware-in-the-loop simulation program for ground-based radar

    NASA Astrophysics Data System (ADS)

    Lam, Eric P.; Black, Dennis W.; Ebisu, Jason S.; Magallon, Julianna

    2011-06-01

    A radar system created using an embedded computer system needs testing. The way to test an embedded computer system is different from the debugging approaches used on desktop computers. One way to test a radar system is to feed it artificial inputs and analyze the outputs of the radar. More often, not all of the building blocks of the radar system are available to test. This will require the engineer to test parts of the radar system using a "black box" approach. A common way to test software code on a desktop simulation is to use breakpoints so that is pauses after each cycle through its calculations. The outputs are compared against the values that are expected. This requires the engineer to use valid test scenarios. We will present a hardware-in-the-loop simulator that allows the embedded system to think it is operating with real-world inputs and outputs. From the embedded system's point of view, it is operating in real-time. The hardware in the loop simulation is based on our Desktop PC Simulation (PCS) testbed. In the past, PCS was used for ground-based radars. This embedded simulation, called Embedded PCS, allows a rapid simulated evaluation of ground-based radar performance in a laboratory environment.

  1. Computer hardware for radiologists: Part I

    PubMed Central

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called “buses”. The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute “programs”. A Pentium® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration. PMID:21042437

  2. J-2X Upper Stage Engine: Hardware and Testing 2009

    NASA Technical Reports Server (NTRS)

    Buzzell, James C.

    2009-01-01

    Mission: Common upper stage engine for Ares I and Ares V. Challenge: Use proven technology from Saturn X-33, RS-68 to develop the highest Isp GG cycle engine in history for 2 missions in record time . Key Features: LOX/LH2 GG cycle, series turbines (2), HIP-bonded MCC, pneumatic ball-sector valves, on-board engine controller, tube-wall regen nozzle/large passively-cooled nozzle extension, TEG boost/cooling . Development Philosophy: proven hardware, aggressive schedule, early risk reduction, requirements-driven.

  3. Hardware Evolution of Closed-Loop Controller Designs

    NASA Technical Reports Server (NTRS)

    Gwaltney, David; Ferguson, Ian

    2002-01-01

    Poster presentation will outline on-going efforts at NASA, MSFC to employ various Evolvable Hardware experimental platforms in the evolution of digital and analog circuitry for application to automatic control. Included will be information concerning the application of commercially available hardware and software along with the use of the JPL developed FPTA2 integrated circuit and supporting JPL developed software. Results to date will be presented.

  4. Simulation and analysis of support hardware for multiple instruction rollback

    NASA Technical Reports Server (NTRS)

    Alewine, Neil J.

    1992-01-01

    Recently, a compiler-assisted approach to multiple instruction retry was developed. In this scheme, a read buffer of size 2N, where N represents the maximum instruction rollback distance, is used to resolve one type of data hazard. This hardware support helps to reduce code growth, compilation time, and some of the performance impacts associated with hazard resolution. The 2N read buffer size requirement of the compiler-assisted approach is worst case, assuring data redundancy for all data required but also providing some unnecessary redundancy. By adding extra bits in the operand field for source 1 and source 2 it becomes possible to design the read buffer to save only those values required, thus reducing the read buffer size requirement. This study measures the effect on performance of a DECstation 3100 running 10 application programs using 6 read buffer configurations at varying read buffer sizes.

  5. Hardware in the Loop at Megawatt-Scale Power | Energy Systems Integration

    Science.gov Websites

    Facility | NREL Hardware in the Loop at Megawatt-Scale Power Hardware in the Loop at Megawatt -Scale Power Hardware-in-the-loop simulation is not new, but the Energy System Integration Facility's -in-the-loop co-simulation. For more information, read the power hardware-in-the-loop factsheet. Text

  6. Orbiter subsystem hardware/software interaction analysis. Volume 8: AFT reaction control system, part 2

    NASA Technical Reports Server (NTRS)

    Becker, D. D.

    1980-01-01

    The orbiter subsystems and interfacing program elements which interact with the orbiter computer flight software are analyzed. The failure modes identified in the subsystem/element failure mode and effects analysis are examined. Potential interaction with the software is examined through an evaluation of the software requirements. The analysis is restricted to flight software requirements and excludes utility/checkout software. The results of the hardware/software interaction analysis for the forward reaction control system are presented.

  7. Acceleration of fluoro-CT reconstruction for a mobile C-Arm on GPU and FPGA hardware: a simulation study

    NASA Astrophysics Data System (ADS)

    Xue, Xinwei; Cheryauka, Arvi; Tubbs, David

    2006-03-01

    CT imaging in interventional and minimally-invasive surgery requires high-performance computing solutions that meet operational room demands, healthcare business requirements, and the constraints of a mobile C-arm system. The computational requirements of clinical procedures using CT-like data are increasing rapidly, mainly due to the need for rapid access to medical imagery during critical surgical procedures. The highly parallel nature of Radon transform and CT algorithms enables embedded computing solutions utilizing a parallel processing architecture to realize a significant gain of computational intensity with comparable hardware and program coding/testing expenses. In this paper, using a sample 2D and 3D CT problem, we explore the programming challenges and the potential benefits of embedded computing using commodity hardware components. The accuracy and performance results obtained on three computational platforms: a single CPU, a single GPU, and a solution based on FPGA technology have been analyzed. We have shown that hardware-accelerated CT image reconstruction can be achieved with similar levels of noise and clarity of feature when compared to program execution on a CPU, but gaining a performance increase at one or more orders of magnitude faster. 3D cone-beam or helical CT reconstruction and a variety of volumetric image processing applications will benefit from similar accelerations.

  8. Environmental Control and Life Support (ECLS) Hardware Commonality for Exploration Vehicles

    NASA Technical Reports Server (NTRS)

    Carrasquillo, Robyn; Anderson, Molly

    2012-01-01

    In August 2011, the Environmental Control and Life Support Systems (ECLSS) technical community, along with associated stakeholders, held a workshop to review NASA s plans for Exploration missions and vehicles with two objectives: revisit the Exploration Atmospheres Working Group (EAWG) findings from 2006, and discuss preliminary ECLSS architecture concepts and technology choices for Exploration vehicles, identifying areas for potential common hardware or technologies to be utilized. Key considerations for selection of vehicle design total pressure and percent oxygen include operational concepts for extravehicular activity (EVA) and prebreathe protocols, materials flammability, and controllability within pressure and oxygen ranges. New data for these areas since the 2006 study were presented and discussed, and the community reached consensus on conclusions and recommendations for target design pressures for each Exploration vehicle concept. For the commonality study, the workshop identified many areas of potential commonality across the Exploration vehicles as well as with heritage International Space Station (ISS) and Shuttle hardware. Of the 36 ECLSS functions reviewed, 16 were considered to have strong potential for commonality, 13 were considered to have some potential commonality, and 7 were considered to have limited potential for commonality due to unique requirements or lack of sufficient heritage hardware. These findings, which will be utilized in architecture studies and budget exercises going forward, are presented in detail.

  9. Network Hardware Virtualization for Application Provisioning in Core Networks

    DOE PAGES

    Gumaste, Ashwin; Das, Tamal; Khandwala, Kandarp; ...

    2017-02-03

    We present that service providers and vendors are moving toward a network virtualized core, whereby multiple applications would be treated on their own merit in programmable hardware. Such a network would have the advantage of being customized for user requirements and allow provisioning of next generation services that are built specifically to meet user needs. In this article, we articulate the impact of network virtualization on networks that provide customized services and how a provider's business can grow with network virtualization. We outline a decision map that allows mapping of applications with technology that is supported in network-virtualization - orientedmore » equipment. Analogies to the world of virtual machines and generic virtualization show that hardware supporting network virtualization will facilitate new customer needs while optimizing the provider network from the cost and performance perspectives. A key conclusion of the article is that growth would yield sizable revenue when providers plan ahead in terms of supporting network-virtualization-oriented technology in their networks. To be precise, providers have to incorporate into their growth plans network elements capable of new service deployments while protecting network neutrality. Finally, a simulation study validates our NV-induced model.« less

  10. Network Hardware Virtualization for Application Provisioning in Core Networks

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Gumaste, Ashwin; Das, Tamal; Khandwala, Kandarp

    We present that service providers and vendors are moving toward a network virtualized core, whereby multiple applications would be treated on their own merit in programmable hardware. Such a network would have the advantage of being customized for user requirements and allow provisioning of next generation services that are built specifically to meet user needs. In this article, we articulate the impact of network virtualization on networks that provide customized services and how a provider's business can grow with network virtualization. We outline a decision map that allows mapping of applications with technology that is supported in network-virtualization - orientedmore » equipment. Analogies to the world of virtual machines and generic virtualization show that hardware supporting network virtualization will facilitate new customer needs while optimizing the provider network from the cost and performance perspectives. A key conclusion of the article is that growth would yield sizable revenue when providers plan ahead in terms of supporting network-virtualization-oriented technology in their networks. To be precise, providers have to incorporate into their growth plans network elements capable of new service deployments while protecting network neutrality. Finally, a simulation study validates our NV-induced model.« less

  11. Robustness of spiking Deep Belief Networks to noise and reduced bit precision of neuro-inspired hardware platforms.

    PubMed

    Stromatias, Evangelos; Neil, Daniel; Pfeiffer, Michael; Galluppi, Francesco; Furber, Steve B; Liu, Shih-Chii

    2015-01-01

    Increasingly large deep learning architectures, such as Deep Belief Networks (DBNs) are the focus of current machine learning research and achieve state-of-the-art results in different domains. However, both training and execution of large-scale Deep Networks require vast computing resources, leading to high power requirements and communication overheads. The on-going work on design and construction of spike-based hardware platforms offers an alternative for running deep neural networks with significantly lower power consumption, but has to overcome hardware limitations in terms of noise and limited weight precision, as well as noise inherent in the sensor signal. This article investigates how such hardware constraints impact the performance of spiking neural network implementations of DBNs. In particular, the influence of limited bit precision during execution and training, and the impact of silicon mismatch in the synaptic weight parameters of custom hybrid VLSI implementations is studied. Furthermore, the network performance of spiking DBNs is characterized with regard to noise in the spiking input signal. Our results demonstrate that spiking DBNs can tolerate very low levels of hardware bit precision down to almost two bits, and show that their performance can be improved by at least 30% through an adapted training mechanism that takes the bit precision of the target platform into account. Spiking DBNs thus present an important use-case for large-scale hybrid analog-digital or digital neuromorphic platforms such as SpiNNaker, which can execute large but precision-constrained deep networks in real time.

  12. NASA-STD-(I)-6016, Standard Materials and Processes Requirements for Spacecraft

    NASA Technical Reports Server (NTRS)

    Pedley, Michael; Griffin, Dennis

    2006-01-01

    This document is directed toward Materials and Processes (M&P) used in the design, fabrication, and testing of flight components for all NASA manned, unmanned, robotic, launch vehicle, lander, in-space and surface systems, and spacecraft program/project hardware elements. All flight hardware is covered by the M&P requirements of this document, including vendor designed, off-the-shelf, and vendor furnished items. Materials and processes used in interfacing ground support equipment (GSE); test equipment; hardware processing equipment; hardware packaging; and hardware shipment shall be controlled to prevent damage to or contamination of flight hardware.

  13. Object oriented design (OOD) in real-time hardware-in-the-loop (HWIL) simulations

    NASA Astrophysics Data System (ADS)

    Morris, Joe; Richard, Henri; Lowman, Alan; Youngren, Rob

    2006-05-01

    Using Object Oriented Design (OOD) concepts in AMRDEC's Hardware-in-the Loop (HWIL) real-time simulations allows the user to interchange parts of the simulation to meet test requirements. A large-scale three-spectral band simulator connected via a high speed reflective memory ring for time-critical data transfers to PC controllers connected by non real-time Ethernet protocols is used to separate software objects from logical entities close to their respective controlled hardware. Each standalone object does its own dynamic initialization, real-time processing, and end of run processing; therefore it can be easily maintained and updated. A Resource Allocation Program (RAP) is also utilized along with a device table to allocate, organize, and document the communication protocol between the software and hardware components. A GUI display program lists all allocations and deallocations of HWIL memory and hardware resources. This interactive program is also used to clean up defunct allocations of dead processes. Three examples are presented using the OOD and RAP concepts. The first is the control of an ACUTRONICS built three-axis flight table using the same control for calibration and real-time functions. The second is the transportability of a six-degree-of-freedom (6-DOF) simulation from an Onyx residence to a Linux-PC. The third is the replacement of the 6-DOF simulation with a replay program to drive the facility with archived run data for demonstration or analysis purposes.

  14. Advances in flexible optrode hardware for use in cybernetic insects

    NASA Astrophysics Data System (ADS)

    Register, Joseph; Callahan, Dennis M.; Segura, Carlos; LeBlanc, John; Lissandrello, Charles; Kumar, Parshant; Salthouse, Christopher; Wheeler, Jesse

    2017-08-01

    Optogenetic manipulation is widely used to selectively excite and silence neurons in laboratory experiments. Recent efforts to miniaturize the components of optogenetic systems have enabled experiments on freely moving animals, but further miniaturization is required for freely flying insects. In particular, miniaturization of high channel-count optical waveguides are needed for high-resolution interfaces. Thin flexible waveguide arrays are needed to bend light around tight turns to access small anatomical targets. We present the design of lightweight miniaturized optogentic hardware and supporting electronics for the untethered steering of dragonfly flight. The system is designed to enable autonomous flight and includes processing, guidance sensors, solar power, and light stimulators. The system will weigh less than 200mg and be worn by the dragonfly as a backpack. The flexible implant has been designed to provide stimuli around nerves through micron scale apertures of adjacent neural tissue without the use of heavy hardware. We address the challenges of lightweight optogenetics and the development of high contrast polymer waveguides for this purpose.

  15. Study of a unified hardware and software fault-tolerant architecture

    NASA Technical Reports Server (NTRS)

    Lala, Jaynarayan; Alger, Linda; Friend, Steven; Greeley, Gregory; Sacco, Stephen; Adams, Stuart

    1989-01-01

    A unified architectural concept, called the Fault Tolerant Processor Attached Processor (FTP-AP), that can tolerate hardware as well as software faults is proposed for applications requiring ultrareliable computation capability. An emulation of the FTP-AP architecture, consisting of a breadboard Motorola 68010-based quadruply redundant Fault Tolerant Processor, four VAX 750s as attached processors, and four versions of a transport aircraft yaw damper control law, is used as a testbed in the AIRLAB to examine a number of critical issues. Solutions of several basic problems associated with N-Version software are proposed and implemented on the testbed. This includes a confidence voter to resolve coincident errors in N-Version software. A reliability model of N-Version software that is based upon the recent understanding of software failure mechanisms is also developed. The basic FTP-AP architectural concept appears suitable for hosting N-Version application software while at the same time tolerating hardware failures. Architectural enhancements for greater efficiency, software reliability modeling, and N-Version issues that merit further research are identified.

  16. An optical/digital processor - Hardware and applications

    NASA Technical Reports Server (NTRS)

    Casasent, D.; Sterling, W. M.

    1975-01-01

    A real-time two-dimensional hybrid processor consisting of a coherent optical system, an optical/digital interface, and a PDP-11/15 control minicomputer is described. The input electrical-to-optical transducer is an electron-beam addressed potassium dideuterium phosphate (KD2PO4) light valve. The requirements and hardware for the output optical-to-digital interface, which is constructed from modular computer building blocks, are presented. Initial experimental results demonstrating the operation of this hybrid processor in phased-array radar data processing, synthetic-aperture image correlation, and text correlation are included. The applications chosen emphasize the role of the interface in the analysis of data from an optical processor and possible extensions to the digital feedback control of an optical processor.

  17. 46 CFR 111.105-39 - Additional requirements for vessels carrying vehicles with fuel in their tanks.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 4 2011-10-01 2011-10-01 false Additional requirements for vessels carrying vehicles... SECURITY (CONTINUED) ELECTRICAL ENGINEERING ELECTRIC SYSTEMS-GENERAL REQUIREMENTS Hazardous Locations § 111.105-39 Additional requirements for vessels carrying vehicles with fuel in their tanks. Each vessel...

  18. 46 CFR 111.105-39 - Additional requirements for vessels carrying vehicles with fuel in their tanks.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 4 2012-10-01 2012-10-01 false Additional requirements for vessels carrying vehicles... SECURITY (CONTINUED) ELECTRICAL ENGINEERING ELECTRIC SYSTEMS-GENERAL REQUIREMENTS Hazardous Locations § 111.105-39 Additional requirements for vessels carrying vehicles with fuel in their tanks. Each vessel...

  19. Resolution-independent surface rendering using programmable graphics hardware

    DOEpatents

    Loop, Charles T.; Blinn, James Frederick

    2008-12-16

    Surfaces defined by a Bezier tetrahedron, and in particular quadric surfaces, are rendered on programmable graphics hardware. Pixels are rendered through triangular sides of the tetrahedra and locations on the shapes, as well as surface normals for lighting evaluations, are computed using pixel shader computations. Additionally, vertex shaders are used to aid interpolation over a small number of values as input to the pixel shaders. Through this, rendering of the surfaces is performed independently of viewing resolution, allowing for advanced level-of-detail management. By individually rendering tetrahedrally-defined surfaces which together form complex shapes, the complex shapes can be rendered in their entirety.

  20. On the use of inexact, pruned hardware in atmospheric modelling

    PubMed Central

    Düben, Peter D.; Joven, Jaume; Lingamneni, Avinash; McNamara, Hugh; De Micheli, Giovanni; Palem, Krishna V.; Palmer, T. N.

    2014-01-01

    Inexact hardware design, which advocates trading the accuracy of computations in exchange for significant savings in area, power and/or performance of computing hardware, has received increasing prominence in several error-tolerant application domains, particularly those involving perceptual or statistical end-users. In this paper, we evaluate inexact hardware for its applicability in weather and climate modelling. We expand previous studies on inexact techniques, in particular probabilistic pruning, to floating point arithmetic units and derive several simulated set-ups of pruned hardware with reasonable levels of error for applications in atmospheric modelling. The set-up is tested on the Lorenz ‘96 model, a toy model for atmospheric dynamics, using software emulation for the proposed hardware. The results show that large parts of the computation tolerate the use of pruned hardware blocks without major changes in the quality of short- and long-time diagnostics, such as forecast errors and probability density functions. This could open the door to significant savings in computational cost and to higher resolution simulations with weather and climate models. PMID:24842031

  1. 49 CFR 192.328 - Additional construction requirements for steel pipe using alternative maximum allowable operating...

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 3 2012-10-01 2012-10-01 false Additional construction requirements for steel pipe using alternative maximum allowable operating pressure. 192.328 Section 192.328 Transportation... Lines and Mains § 192.328 Additional construction requirements for steel pipe using alternative maximum...

  2. 49 CFR 192.328 - Additional construction requirements for steel pipe using alternative maximum allowable operating...

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 3 2014-10-01 2014-10-01 false Additional construction requirements for steel pipe using alternative maximum allowable operating pressure. 192.328 Section 192.328 Transportation... Lines and Mains § 192.328 Additional construction requirements for steel pipe using alternative maximum...

  3. SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain

    PubMed Central

    Piromalis, Dimitrios; Arvanitis, Konstantinos

    2016-01-01

    Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture. PMID:27527180

  4. SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain.

    PubMed

    Piromalis, Dimitrios; Arvanitis, Konstantinos

    2016-08-04

    Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture.

  5. An improved non-uniformity correction algorithm and its hardware implementation on FPGA

    NASA Astrophysics Data System (ADS)

    Rong, Shenghui; Zhou, Huixin; Wen, Zhigang; Qin, Hanlin; Qian, Kun; Cheng, Kuanhong

    2017-09-01

    The Non-uniformity of Infrared Focal Plane Arrays (IRFPA) severely degrades the infrared image quality. An effective non-uniformity correction (NUC) algorithm is necessary for an IRFPA imaging and application system. However traditional scene-based NUC algorithm suffers the image blurring and artificial ghosting. In addition, few effective hardware platforms have been proposed to implement corresponding NUC algorithms. Thus, this paper proposed an improved neural-network based NUC algorithm by the guided image filter and the projection-based motion detection algorithm. First, the guided image filter is utilized to achieve the accurate desired image to decrease the artificial ghosting. Then a projection-based moving detection algorithm is utilized to determine whether the correction coefficients should be updated or not. In this way the problem of image blurring can be overcome. At last, an FPGA-based hardware design is introduced to realize the proposed NUC algorithm. A real and a simulated infrared image sequences are utilized to verify the performance of the proposed algorithm. Experimental results indicated that the proposed NUC algorithm can effectively eliminate the fix pattern noise with less image blurring and artificial ghosting. The proposed hardware design takes less logic elements in FPGA and spends less clock cycles to process one frame of image.

  6. Hardware accelerator for molecular dynamics: MDGRAPE-2

    NASA Astrophysics Data System (ADS)

    Susukita, Ryutaro; Ebisuzaki, Toshikazu; Elmegreen, Bruce G.; Furusawa, Hideaki; Kato, Kenya; Kawai, Atsushi; Kobayashi, Yoshinao; Koishi, Takahiro; McNiven, Geoffrey D.; Narumi, Tetsu; Yasuoka, Kenji

    2003-10-01

    We developed MDGRAPE-2, a hardware accelerator that calculates forces at high speed in molecular dynamics (MD) simulations. MDGRAPE-2 is connected to a PC or a workstation as an extension board. The sustained performance of one MDGRAPE-2 board is 15 Gflops, roughly equivalent to the peak performance of the fastest supercomputer processing element. One board is able to calculate all forces between 10 000 particles in 0.28 s (i.e. 310000 time steps per day). If 16 boards are connected to one computer and operated in parallel, this calculation speed becomes ˜10 times faster. In addition to MD, MDGRAPE-2 can be applied to gravitational N-body simulations, the vortex method and smoothed particle hydrodynamics in computational fluid dynamics.

  7. Framework for Development and Distribution of Hardware Acceleration

    NASA Astrophysics Data System (ADS)

    Thomas, David B.; Luk, Wayne W.

    2002-07-01

    This paper describes IGOL, a framework for developing reconfigurable data processing applications. While IGOL was originally designed to target imaging and graphics systems, its structure is sufficiently general to support a broad range of applications. IGOL adopts a four-layer architecture: application layer, operation layer, appliance layer and configuration layer. This architecture is intended to separate and co-ordinate both the development and execution of hardware and software components. Hardware developers can use IGOL as an instance testbed for verification and benchmarking, as well as for distribution. Software application developers can use IGOL to discover hardware accelerated data processors, and to access them in a transparent, non-hardware specific manner. IGOL provides extensive support for the RC1000-PP board via the Handel-C language, and a wide selection of image processing filters have been developed. IGOL also supplies plug-ins to enable such filters to be incorporated in popular applications such as Premiere, Winamp, VirtualDub and DirectShow. Moreover, IGOL allows the automatic use of multiple cards to accelerate an application, demonstrated using DirectShow. To enable transparent acceleration without sacrificing performance, a three-tiered COM (Component Object Model) API has been designed and implemented. This API provides a well-defined and extensible interface which facilitates the development of hardware data processors that can accelerate multiple applications.

  8. OS friendly microprocessor architecture: Hardware level computer security

    NASA Astrophysics Data System (ADS)

    Jungwirth, Patrick; La Fratta, Patrick

    2016-05-01

    We present an introduction to the patented OS Friendly Microprocessor Architecture (OSFA) and hardware level computer security. Conventional microprocessors have not tried to balance hardware performance and OS performance at the same time. Conventional microprocessors have depended on the Operating System for computer security and information assurance. The goal of the OS Friendly Architecture is to provide a high performance and secure microprocessor and OS system. We are interested in cyber security, information technology (IT), and SCADA control professionals reviewing the hardware level security features. The OS Friendly Architecture is a switched set of cache memory banks in a pipeline configuration. For light-weight threads, the memory pipeline configuration provides near instantaneous context switching times. The pipelining and parallelism provided by the cache memory pipeline provides for background cache read and write operations while the microprocessor's execution pipeline is running instructions. The cache bank selection controllers provide arbitration to prevent the memory pipeline and microprocessor's execution pipeline from accessing the same cache bank at the same time. This separation allows the cache memory pages to transfer to and from level 1 (L1) caching while the microprocessor pipeline is executing instructions. Computer security operations are implemented in hardware. By extending Unix file permissions bits to each cache memory bank and memory address, the OSFA provides hardware level computer security.

  9. New Approaches in Force-Limited Vibration Testing of Flight Hardware

    NASA Technical Reports Server (NTRS)

    Kolaini, Ali R.; Kern, Dennis L.

    2012-01-01

    To qualify flight hardware for random vibration environments the following methods are used to limit the loads in the aerospace industry: (1) Response limiting and notching (2) Simple TDOF model (3) Semi-empirical force limits (4) Apparent mass, etc. and (5) Impedance method. In all these methods attempts are made to remove conservatism due to the mismatch in impedances between the test and the flight configurations of the hardware that are being qualified. Assumption is the hardware interfaces have correlated responses. A new method that takes into account the un-correlated hardware interface responses are described in this presentation.

  10. PLC Hardware Discrimination using RF-DNA fingerprinting

    DTIC Science & Technology

    2014-06-19

    PLC HARDWARE DISCRIMINATION USING RF-DNA FINGERPRINTING THESIS Bradley C. Wright, Civilian, USAF AFIT-ENG-T-14-J-12 DEPARTMENT OF THE AIR FORCE AIR...protection in the United States. AFIT-ENG-T-14-J-12 PLC HARDWARE DISCRIMINATION USING RF-DNA FINGERPRINTING THESIS Presented to the Faculty Department...DISCRIMINATION USING RF-DNA FINGERPRINTING Bradley C. Wright, B.S.E.E. Civilian, USAF Approved: /signed/ Maj Samuel J. Stone, PhD (Chairman) /signed/ Michael A

  11. 30 CFR 250.1166 - What additional reporting is required for developments in the Alaska OCS Region?

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 2 2014-07-01 2014-07-01 false What additional reporting is required for... CONTINENTAL SHELF Oil and Gas Production Requirements Other Requirements § 250.1166 What additional reporting... correlative rights; and (3) Maximize ultimate recovery of oil and gas. (b) If your development is jointly...

  12. 30 CFR 250.1166 - What additional reporting is required for developments in the Alaska OCS Region?

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 2 2012-07-01 2012-07-01 false What additional reporting is required for... CONTINENTAL SHELF Oil and Gas Production Requirements Other Requirements § 250.1166 What additional reporting... correlative rights; and (3) Maximize ultimate recovery of oil and gas. (b) If your development is jointly...

  13. 24 CFR 570.711 - State borrowers; additional requirements and application procedures.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 24 Housing and Urban Development 3 2012-04-01 2012-04-01 false State borrowers; additional requirements and application procedures. 570.711 Section 570.711 Housing and Urban Development Regulations Relating to Housing and Urban Development (Continued) OFFICE OF ASSISTANT SECRETARY FOR COMMUNITY PLANNING...

  14. 24 CFR 570.711 - State borrowers; additional requirements and application procedures.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 24 Housing and Urban Development 3 2011-04-01 2010-04-01 true State borrowers; additional requirements and application procedures. 570.711 Section 570.711 Housing and Urban Development Regulations Relating to Housing and Urban Development (Continued) OFFICE OF ASSISTANT SECRETARY FOR COMMUNITY PLANNING...

  15. 24 CFR 570.711 - State borrowers; additional requirements and application procedures.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 24 Housing and Urban Development 3 2010-04-01 2010-04-01 false State borrowers; additional requirements and application procedures. 570.711 Section 570.711 Housing and Urban Development Regulations Relating to Housing and Urban Development (Continued) OFFICE OF ASSISTANT SECRETARY FOR COMMUNITY PLANNING...

  16. 42 CFR 403.306 - Additional requirements for State systems-mandatory approval.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 42 Public Health 2 2010-10-01 2010-10-01 false Additional requirements for State systems-mandatory approval. 403.306 Section 403.306 Public Health CENTERS FOR MEDICARE & MEDICAID SERVICES, DEPARTMENT OF HEALTH AND HUMAN SERVICES GENERAL PROVISIONS SPECIAL PROGRAMS AND PROJECTS Recognition of State...

  17. Hardware assisted hypervisor introspection.

    PubMed

    Shi, Jiangyong; Yang, Yuexiang; Tang, Chuan

    2016-01-01

    In this paper, we introduce hypervisor introspection, an out-of-box way to monitor the execution of hypervisors. Similar to virtual machine introspection which has been proposed to protect virtual machines in an out-of-box way over the past decade, hypervisor introspection can be used to protect hypervisors which are the basis of cloud security. Virtual machine introspection tools are usually deployed either in hypervisor or in privileged virtual machines, which might also be compromised. By utilizing hardware support including nested virtualization, EPT protection and #BP, we are able to monitor all hypercalls belongs to the virtual machines of one hypervisor, include that of privileged virtual machine and even when the hypervisor is compromised. What's more, hypercall injection method is used to simulate hypercall-based attacks and evaluate the performance of our method. Experiment results show that our method can effectively detect hypercall-based attacks with some performance cost. Lastly, we discuss our furture approaches of reducing the performance cost and preventing the compromised hypervisor from detecting the existence of our introspector, in addition with some new scenarios to apply our hypervisor introspection system.

  18. Hardware Evolution of Control Electronics

    NASA Technical Reports Server (NTRS)

    Gwaltney, David; Steincamp, Jim; Corder, Eric; King, Ken; Ferguson, M. I.; Dutton, Ken

    2003-01-01

    The evolution of closed-loop motor speed controllers implemented on the JPL FPTA2 is presented. The response of evolved controller to sinusoidal commands, controller reconfiguration for fault tolerance,and hardware evolution are described.

  19. Development of Enhanced Avionics Flight Hardware Selection Process

    NASA Technical Reports Server (NTRS)

    Smith, K.; Watson, G. L.

    2003-01-01

    The primary objective of this research was to determine the processes and feasibility of using commercial off-the-shelf PC104 hardware for flight applications. This would lead to a faster, better, and cheaper approach to low-budget programs as opposed to the design, procurement. and fabrication of space flight hardware. This effort will provide experimental evaluation with results of flight environmental testing. Also, a method and/or suggestion used to bring test hardware up to flight standards will be given. Several microgravity programs, such as the Equiaxed Dendritic Solidification Experiment, Self-Diffusion in Liquid Elements, and various other programs, are interested in PC104 environmental testing to establish the limits of this technology.

  20. Microbiologic assay of space hardware.

    NASA Technical Reports Server (NTRS)

    Favero, M. S.

    1971-01-01

    Review of the procedures used in the microbiological examination of space hardware. The general procedure for enumerating aerobic and anaerobic microorganisms and spores is outlined. Culture media and temperature-time cycles used for incubation are reviewed, along with assay systems designed for the enumeration of aerobic and anaerobic spores. The special problems which are discussed are involved in the precise and accurate enumeration of microorganisms on surfaces and in the neutralization of viable organisms buried inside solid materials that could be released to a planet's surface if the solid should be fractured. Special attention is given to sampling procedures including also the indirect techniques of surface assays of space hardware such as those using detachable or fallout strips. Some data on comparative levels of microbial contamination on lunar and planetary spacecraft are presented.