High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

NASA Technical Reports Server (NTRS)

Lin, Shu; Uehara, Gregory T.

1996-01-01

implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

High-speed high-resolution epifluorescence imaging system using CCD sensor and digital storage for neurobiological research

NASA Astrophysics Data System (ADS)

Takashima, Ichiro; Kajiwara, Riichi; Murano, Kiyo; Iijima, Toshio; Morinaka, Yasuhiro; Komobuchi, Hiroyoshi

2001-04-01

We have designed and built a high-speed CCD imaging system for monitoring neural activity in an exposed animal cortex stained with a voltage-sensitive dye. Two types of custom-made CCD sensors were developed for this system. The type I chip has a resolution of 2664 (H) X 1200 (V) pixels and a wide imaging area of 28.1 X 13.8 mm, while the type II chip has 1776 X 1626 pixels and an active imaging area of 20.4 X 18.7 mm. The CCD arrays were constructed with multiple output amplifiers in order to accelerate the readout rate. The two chips were divided into either 24 (I) or 16 (II) distinct areas that were driven in parallel. The parallel CCD outputs were digitized by 12-bit A/D converters and then stored in the frame memory. The frame memory was constructed with synchronous DRAM modules, which provided a capacity of 128 MB per channel. On-chip and on-memory binning methods were incorporated into the system, e.g., this enabled us to capture 444 X 200 pixel-images for periods of 36 seconds at a rate of 500 frames/second. This system was successfully used to visualize neural activity in the cortices of rats, guinea pigs, and monkeys.

Flexible multimode polymer waveguides for high-speed short-reach communication links

NASA Astrophysics Data System (ADS)

Bamiedakis, N.; Shi, F.; Chu, D.; Penty, R. V.; White, I. H.

2018-02-01

Multimode polymer waveguides have attracted great interest for use in high-speed short-reach communication links as they can be cost-effectively integrated onto standard PCBs using conventional methods of the electronics industry and provide low loss (<0.04 dB/cm at 850 nm) and high bandwidth (>30 GHz×m) interconnection. The formation of such waveguides on flexible substrates can further provide flexible low-weight low-thickness interconnects and offer additional freedom in the implementation of high-speed short-reach optical links. These attributes make these flexible waveguides particularly attractive for use in low-cost detachable chip-to-chip links and in environments where weight and shape conformity become important, such as in cars and aircraft. However, the highly-multimoded nature of these waveguides raises important questions about their performance under severe flex due to mode loss and mode coupling. In this work therefore, we investigate the loss, crosstalk and bandwidth performance of such waveguides under out-of plane bending and in-plane twisting under different launch conditions and carry out data transmission tests at 40 Gb/s on a 1 m long spiral flexible waveguide under flexure. Excellent optical transmission characteristics are obtained while robust loss, crosstalk and bandwidth performance are demonstrated under flexure. Error-free (BER<10-12) 40 Gb/s data transmission is achieved over the 1 m long spiral waveguide for a 180° bend with a 4 mm radius. The obtained results demonstrate the excellent optical and mechanical properties of this technology and highlight its potential for use in real-world systems.

The difference of delay time in monitoring system of facial acupressure learning media using bluetooth, wireless and ethernet

NASA Astrophysics Data System (ADS)

Agustin, Eny Widhia; Hangga, Arimaz; Fahrian, Muhammad Iqbal; Azhari, Anis Fikri

2018-03-01

The implementation of monitoring system in the facial acupressure learning media could increase the students' proficiency. However the common learning media still has not implemented a monitoring system in their learning process. This research was conducted to implement monitoring system in the mannequin head prototype as a learning media of facial acupressure using Bluetooth, wireless and Ethernet. The results of the implementation of monitoring system in the prototype showed that there were differences in the delay time between Bluetooth and wireless or Ethernet. The results data showed no difference in the average delay time between the use of Bluetooth with wireless and the use of Bluetooth with Ethernet in monitoring system of facial acupressure learning media. From all the facial acupressure points, the forehead facial acupressure point has the longest delay time of 11.93 seconds. The average delay time in all 3 class rooms was 1.96 seconds therefore the use of Bluetooth, wireless and Ethernet is highly recommended in the monitoring system of facial acupressure.

SPIDR, a general-purpose readout system for pixel ASICs

NASA Astrophysics Data System (ADS)

van der Heijden, B.; Visser, J.; van Beuzekom, M.; Boterenbrood, H.; Kulis, S.; Munneke, B.; Schreuder, F.

2017-02-01

The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a "soft core" CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four 10 Gigabit

Physical Layer Ethernet Clock Synchronization

DTIC Science & Technology

2010-11-01

42 nd Annual Precise Time and Time Interval (PTTI) Meeting 77 PHYSICAL LAYER ETHERNET CLOCK SYNCHRONIZATION Reinhard Exel, Georg...oeaw.ac.at Nikolaus Kerö Oregano Systems, Mohsgasse 1, 1030 Wien, Austria E-mail: nikolaus.keroe@oregano.at Abstract Clock synchronization ...is a service widely used in distributed networks to coordinate data acquisition and actions. As the requirement to achieve tighter synchronization

Reconfigurable radio-frequency arbitrary waveforms synthesized in a silicon photonic chip.

PubMed

Wang, Jian; Shen, Hao; Fan, Li; Wu, Rui; Niu, Ben; Varghese, Leo T; Xuan, Yi; Leaird, Daniel E; Wang, Xi; Gan, Fuwan; Weiner, Andrew M; Qi, Minghao

2015-01-12

Photonic methods of radio-frequency waveform generation and processing can provide performance advantages and flexibility over electronic methods due to the ultrawide bandwidth offered by the optical carriers. However, bulk optics implementations suffer from the lack of integration and slow reconfiguration speed. Here we propose an architecture of integrated photonic radio-frequency generation and processing and implement it on a silicon chip fabricated in a semiconductor manufacturing foundry. Our device can generate programmable radio-frequency bursts or continuous waveforms with only the light source, electrical drives/controls and detectors being off-chip. It modulates an individual pulse in a radio-frequency burst within 4 ns, achieving a reconfiguration speed three orders of magnitude faster than thermal tuning. The on-chip optical delay elements offer an integrated approach to accurately manipulating individual radio-frequency waveform features without constraints set by the speed and timing jitter of electronics, and should find applications ranging from high-speed wireless to defence electronics.

Reconfigurable radio-frequency arbitrary waveforms synthesized in a silicon photonic chip

PubMed Central

Wang, Jian; Shen, Hao; Fan, Li; Wu, Rui; Niu, Ben; Varghese, Leo T.; Xuan, Yi; Leaird, Daniel E.; Wang, Xi; Gan, Fuwan; Weiner, Andrew M.; Qi, Minghao

2015-01-01

Photonic methods of radio-frequency waveform generation and processing can provide performance advantages and flexibility over electronic methods due to the ultrawide bandwidth offered by the optical carriers. However, bulk optics implementations suffer from the lack of integration and slow reconfiguration speed. Here we propose an architecture of integrated photonic radio-frequency generation and processing and implement it on a silicon chip fabricated in a semiconductor manufacturing foundry. Our device can generate programmable radio-frequency bursts or continuous waveforms with only the light source, electrical drives/controls and detectors being off-chip. It modulates an individual pulse in a radio-frequency burst within 4 ns, achieving a reconfiguration speed three orders of magnitude faster than thermal tuning. The on-chip optical delay elements offer an integrated approach to accurately manipulating individual radio-frequency waveform features without constraints set by the speed and timing jitter of electronics, and should find applications ranging from high-speed wireless to defence electronics. PMID:25581847

Design and Construction of a High-speed Network Connecting All the Protein Crystallography Beamlines at the Photon Factory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Matsugaki, Naohiro; Yamada, Yusuke; Igarashi, Noriyuki

2007-01-19

A private network, physically separated from the facility network, was designed and constructed which covered all the four protein crystallography beamlines at the Photon Factory (PF) and Structural Biology Research Center (SBRC). Connecting all the beamlines in the same network allows for simple authentication and a common working environment for a user who uses multiple beamlines. Giga-bit Ethernet wire-speed was achieved for the communication among the beamlines and SBRC buildings.

Optical time division multiplexer on silicon chip.

PubMed

Aboketaf, Abdelsalam A; Elshaari, Ali W; Preble, Stefan F

2010-06-21

In this work, we experimentally demonstrate a novel broadband optical time division multiplexer (OTDM) on a silicon chip. The fabricated devices generate 20 Gb/s and 40 Gb/s signals starting from a 5 Gb/s input signal. The proposed design has a small footprint of 1mm x 1mm. The system is inherently broadband with a bandwidth of over 100nm making it suitable for high-speed optical networks on chip.

A low-power high-speed ultra-wideband pulse radio transmission system.

PubMed

Wei Tang; Culurciello, E

2009-10-01

We present a low-power high-speed ultra-wideband (UWB) transmitter with a wireless transmission test platform. The system is specifically designed for low-power high-speed wireless implantable biosensors. The integrated transmitter consists of a compact pulse generator and a modulator. The circuit is fabricated in the 0.5-mum silicon-on-sapphire process and occupies 420 mum times 420 mum silicon area. The transmitter is capable of generating pulses with 1-ns width and the pulse rate can be controlled between 90 MHz and 270 MHz. We built a demonstration/testing system for the transmitter. The transmitter achieves a 14-Mb/s data rate. With 50% duty cycle data, the power consumption of the chip is between 10 mW and 21 mW when the transmission distance is from 3.2 to 4 m. The core circuit size is 70 mum times 130 mum.

Advanced Flip Chips in Extreme Temperature Environments

NASA Technical Reports Server (NTRS)

Ramesham, Rajeshuni

2010-01-01

The use of underfill materials is necessary with flip-chip interconnect technology to redistribute stresses due to mismatching coefficients of thermal expansion (CTEs) between dissimilar materials in the overall assembly. Underfills are formulated using organic polymers and possibly inorganic filler materials. There are a few ways to apply the underfills with flip-chip technology. Traditional capillary-flow underfill materials now possess high flow speed and reduced time to cure, but they still require additional processing steps beyond the typical surface-mount technology (SMT) assembly process. Studies were conducted using underfills in a temperature range of -190 to 85 C, which resulted in an increase of reliability by one to two orders of magnitude. Thermal shock of the flip-chip test articles was designed to induce failures at the interconnect sites (-40 to 100 C). The study on the reliability of flip chips using underfills in the extreme temperature region is of significant value for space applications. This technology is considered as an enabling technology for future space missions. Flip-chip interconnect technology is an advanced electrical interconnection approach where the silicon die or chip is electrically connected, face down, to the substrate by reflowing solder bumps on area-array metallized terminals on the die to matching footprints of solder-wettable pads on the chosen substrate. This advanced flip-chip interconnect technology will significantly improve the performance of high-speed systems, productivity enhancement over manual wire bonding, self-alignment during die joining, low lead inductances, and reduced need for attachment of precious metals. The use of commercially developed no-flow fluxing underfills provides a means of reducing the processing steps employed in the traditional capillary flow methods to enhance SMT compatibility. Reliability of flip chips may be significantly increased by matching/tailoring the CTEs of the substrate

FPGA Based "Intelligent Tap" Device for Real-Time Ethernet Network Monitoring

NASA Astrophysics Data System (ADS)

Cupek, Rafał; Piękoś, Piotr; Poczobutt, Marcin; Ziębiński, Adam

This paper describes an "Intelligent Tap" - hardware device dedicated to support real-time Ethernet networks monitoring. Presented solution was created as a student project realized in Institute of Informatics, Silesian University of Technology with support from Softing A.G company. Authors provide description of realized FPGA based "Intelligent Tap" architecture dedicated for Real-Time Ethernet network monitoring systems. The practical device realization and feasibility study conclusions are presented also.

Katherine: Ethernet Embedded Readout Interface for Timepix3

NASA Astrophysics Data System (ADS)

Burian, P.; Broulím, P.; Jára, M.; Georgiev, V.; Bergmann, B.

2017-11-01

The Timepix3—the latest generation of hybrid particle pixel detectors of Medipix family—yields a lot of new possibilities, i.e. a high hit-rate, a time resolution of 1.56 ns, event data-driven readout mode, and the capability of measuring the Time-over-Threshold (ToT - energy) and the Time-of-Arrival (ToA) simultaneously. This paper introduces a newly developed readout device for the Timepix3, called "Katherine", featuring a Gigabit Ethernet interface. The primary benefit of the Katherine is the operation of Timepix3 at long distance (up to 100 m) from computer or server, which is advantageous for the installation at beam lines, where the access is difficult or where radiation levels are too high for human interventions. The maximal hit-rate is limited by the bandwidth of the Ethernet connection (peer-to-peer connection; up to 16 Mhit/s). Since the Katherine interface is equipped with a processor of high computational power (ARM Cortex-A9 dual-core processor), it permits the use as a stand-alone (autonomous) radiation detector. The key features of the device are described in detail. These are the implemented high voltage power supply offering both polarities of bias voltage (up to ± 300 V), the automatic data sending to a sever via SSH, the automatic compensation of ToA values from columns with shifted matrix clock, etc. A dedicated control software was developed, which can be used for the detector preparation (sensor equalization, the DACs dependency scan, and the THL scan) and measurement control. Measured energy spectra from photon fields are shown.

High-speed uncooled MWIR hostile fire indication sensor

NASA Astrophysics Data System (ADS)

Zhang, L.; Pantuso, F. P.; Jin, G.; Mazurenko, A.; Erdtmann, M.; Radhakrishnan, S.; Salerno, J.

2011-06-01

Hostile fire indication (HFI) systems require high-resolution sensor operation at extremely high speeds to capture hostile fire events, including rocket-propelled grenades, anti-aircraft artillery, heavy machine guns, anti-tank guided missiles and small arms. HFI must also be conducted in a waveband with large available signal and low background clutter, in particular the mid-wavelength infrared (MWIR). The shortcoming of current HFI sensors in the MWIR is the bandwidth of the sensor is not sufficient to achieve the required frame rate at the high sensor resolution. Furthermore, current HFI sensors require cryogenic cooling that contributes to size, weight, and power (SWAP) in aircraft-mounted applications where these factors are at a premium. Based on its uncooled photomechanical infrared imaging technology, Agiltron has developed a low-SWAP, high-speed MWIR HFI sensor that breaks the bandwidth bottleneck typical of current infrared sensors. This accomplishment is made possible by using a commercial-off-the-shelf, high-performance visible imager as the readout integrated circuit and physically separating this visible imager from the MWIR-optimized photomechanical sensor chip. With this approach, we have achieved high-resolution operation of our MWIR HFI sensor at 1000 fps, which is unprecedented for an uncooled infrared sensor. We have field tested our MWIR HFI sensor for detecting all hostile fire events mentioned above at several test ranges under a wide range of environmental conditions. The field testing results will be presented.

Photon-trapping microstructures enable high-speed high-efficiency silicon photodiodes

NASA Astrophysics Data System (ADS)

Gao, Yang; Cansizoglu, Hilal; Polat, Kazim G.; Ghandiparsi, Soroush; Kaya, Ahmet; Mamtaz, Hasina H.; Mayet, Ahmed S.; Wang, Yinan; Zhang, Xinzhi; Yamada, Toshishige; Devine, Ekaterina Ponizovskaya; Elrefaie, Aly F.; Wang, Shih-Yuan; Islam, M. Saif

2017-04-01

High-speed, high-efficiency photodetectors play an important role in optical communication links that are increasingly being used in data centres to handle higher volumes of data traffic and higher bandwidths, as big data and cloud computing continue to grow exponentially. Monolithic integration of optical components with signal-processing electronics on a single silicon chip is of paramount importance in the drive to reduce cost and improve performance. We report the first demonstration of micro- and nanoscale holes enabling light trapping in a silicon photodiode, which exhibits an ultrafast impulse response (full-width at half-maximum) of 30 ps and a high efficiency of more than 50%, for use in data-centre optical communications. The photodiode uses micro- and nanostructured holes to enhance, by an order of magnitude, the absorption efficiency of a thin intrinsic layer of less than 2 µm thickness and is designed for a data rate of 20 gigabits per second or higher at a wavelength of 850 nm. Further optimization can improve the efficiency to more than 70%.

Gigabit Ethernet Asynchronous Clock Compensation FIFO

NASA Technical Reports Server (NTRS)

Duhachek, Jeff

2012-01-01

Clock compensation for Gigabit Ethernet is necessary because the clock recovered from the 1.25 Gb/s serial data stream has the potential to be 200 ppm slower or faster than the system clock. The serial data is converted to 10-bit parallel data at a 125 MHz rate on a clock recovered from the serial data stream. This recovered data needs to be processed by a system clock that is also running at a nominal rate of 125 MHz, but not synchronous to the recovered clock. To cross clock domains, an asynchronous FIFO (first-in-first-out) is used, with the write pointer (wprt) in the recovered clock domain and the read pointer (rptr) in the system clock domain. Because the clocks are generated from separate sources, there is potential for FIFO overflow or underflow. Clock compensation in Gigabit Ethernet is possible by taking advantage of the protocol data stream features. There are two distinct data streams that occur in Gigabit Ethernet where identical data is transmitted for a period of time. The first is configuration, which happens during auto-negotiation. The second is idle, which occurs at the end of auto-negotiation and between every packet. The identical data in the FIFO can be repeated by decrementing the read pointer, thus compensating for a FIFO that is draining too fast. The identical data in the FIFO can also be skipped by incrementing the read pointer, which compensates for a FIFO draining too slowly. The unique and novel features of this FIFO are that it works in both the idle stream and the configuration streams. The increment or decrement of the read pointer is different in the idle and compensation streams to preserve disparity. Another unique feature is that the read pointer to write pointer difference range changes between compensation and idle to minimize FIFO latency during packet transmission.

Using a Commercial Ethernet PHY Device in a Radiation Environment

NASA Technical Reports Server (NTRS)

Parks, Jeremy; Arani, Michael; Arroyo, Roberto

2014-01-01

This work involved placing a commercial Ethernet PHY on its own power boundary, with limited current supply, and providing detection methods to determine when the device is not operating and when it needs either a reset or power-cycle. The device must be radiation-tested and free of destructive latchup errors. The commercial Ethernet PHY's own power boundary must be supplied by a current-limited power regulator that must have an enable (for power cycling), and its maximum power output must not exceed the PHY's input requirements, thus preventing damage to the device. A regulator with configurable output limits and short-circuit protection (such as the RHFL4913, rad hard positive voltage regulator family) is ideal. This will prevent a catastrophic failure due to radiation (such as a short between the commercial device's power and ground) from taking down the board's main power. Logic provided on the board will detect errors in the PHY. An FPGA (field-programmable gate array) with embedded Ethernet MAC (Media Access Control) will work well. The error detection includes monitoring the PHY's interrupt line, and the status of the Ethernet's switched power. When the PHY is determined to be non-functional, the logic device resets the PHY, which will often clear radiation induced errors. If this doesn't work, the logic device power-cycles the FPGA by toggling the regulator's enable input. This should clear almost all radiation induced errors provided the device is not latched up.

Analysis of 100Mb/s Ethernet for the Whitney Commodity Computing Testbed

NASA Technical Reports Server (NTRS)

Fineberg, Samuel A.; Pedretti, Kevin T.; Kutler, Paul (Technical Monitor)

1997-01-01

We evaluate the performance of a Fast Ethernet network configured with a single large switch, a single hub, and a 4x4 2D torus topology in a testbed cluster of "commodity" Pentium Pro PCs. We also evaluated a mixed network composed of ethernet hubs and switches. An MPI collective communication benchmark, and the NAS Parallel Benchmarks version 2.2 (NPB2) show that the torus network performs best for all sizes that we were able to test (up to 16 nodes). For larger networks the ethernet switch outperforms the hub, though its performance is far less than peak. The hub/switch combination tests indicate that the NAS parallel benchmarks are relatively insensitive to hub densities of less than 7 nodes per hub.

High speed machinability of the aerospace alloy AA7075 T6 under different cooling conditions

NASA Astrophysics Data System (ADS)

Imbrogno, Stano; Rinaldi, Sergio; Suarez, Asier Gurruchaga; Arrazola, Pedro J.; Umbrello, Domenico

2018-05-01

This paper describes the results of an experimental investigation aimed to st udy the machinability of AA7075 T6 (160 HV) for aerospace industry at high cutting speeds. The paper investigates the effects of different lubri-cooling strategies (cryogenic, M QL and dry) during high speed turning process on cutting forces, tool wear, chip morphology and cutting temperatures. The cutting speeds selected were 1000m/min, 1250m/min and 1500 m/min, while the feed rate values used were 0.1mm/rev and 0.3 mm/rev. The results of cryogenic and M QL application is compared with dry application. It was found that the cryogenic and M QL lubri-cooling techniques could represent a functional alternative to the common dry cutting application in order to implement a more effect ive high speed turning process. Higher cuttingparameters would be able to increase the productivity and reduce the production costs. The effects of the cutting parameters and on the variables object of study were investigated and the role of the different lubri-cooling conditions was assessed.

Researching the 915 nm high-power and high-brightness semiconductor laser single chip coupling module

NASA Astrophysics Data System (ADS)

Wang, Xin; Wang, Cuiluan; Wu, Xia; Zhu, Lingni; Jing, Hongqi; Ma, Xiaoyu; Liu, Suping

2017-02-01

Based on the high-speed development of the fiber laser in recent years, the development of researching 915 nm semiconductor laser as main pumping sources of the fiber laser is at a high speed. Because the beam quality of the laser diode is very poor, the 915 nm laser diode is generally based on optical fiber coupling module to output the laser. Using the beam-shaping and fiber-coupling technology to improve the quality of output beam light, we present a kind of high-power and high-brightness semiconductor laser module, which can output 13.22 W through the optical fiber. Based on 915 nm GaAs semiconductor laser diode which has output power of 13.91 W, we describe a thoroughly detailed procedure for reshaping the beam output from the semiconductor laser diode and coupling the beam into the optical fiber of which the core diameter is 105 μm and the numerical aperture is 0.18. We get 13.22 W from the output fiber of the module at 14.5 A, the coupling efficiency of the whole module is 95.03% and the brightness is 1.5 MW/cm2 -str. The output power of the single chip semiconductor laser module achieves the advanced level in the domestic use.

The Design of Passive Optical Networking+Ethernet over Coaxial Cable Access Networking and Video-on-Demand Services Carrying

NASA Astrophysics Data System (ADS)

Ji, Wei

2013-07-01

Video on demand is a very attractive service used for entertainment, education, and other purposes. The design of passive optical networking+Ethernet over coaxial cable accessing and a home gateway system is proposed. The network integrates the passive optical networking and Ethernet over coaxial cable to provide high dedicated bandwidth for the metropolitan video-on-demand services. Using digital video broadcasting, IP television protocol, unicasting, and broadcasting mechanisms maximizes the system throughput. The home gateway finishes radio frequency signal receiving and provides three kinds of interfaces for high-definition video, voice, and data, which achieves triple-play and wire/wireless access synchronously.

A proposed holistic approach to on-chip, off-chip, test, and package interconnections

NASA Astrophysics Data System (ADS)

Bartelink, Dirk J.

1998-11-01

The term interconnection has traditionally implied a `robust' connection from a transistor or a group of transistors in an IC to the outside world, usually a PC board. Optimum system utilization is done from outside the IC. As an alternative, this paper addresses `unimpeded' transistor-to-transistor interconnection aimed at reaching the high circuit densities and computational capabilities of neighboring IC's. In this view, interconnections are not made to some human-centric place outside the IC world requiring robustness—except for system input and output connections. This unimpeded interconnect style is currently available only through intra-chip signal traces in `system-on-a-chip' implementations, as exemplified by embedded DRAMs. Because the traditional off-chip penalty in performance and wiring density is so large, a merging of complex process technologies is the only option today. It is suggested that, for system integration to move forward, the traditional robustness requirement inherited from conventional packaging interconnect and IC manufacturing test must be discarded. Traditional system assembly from vendor parts requires robustness under shipping, inspection and assembly. The trend toward systems on a chip signifies willingness by semiconductor companies to design and fabricate whole systems in house, so that `in-house' chip-to-chip assembly is not beyond reach. In this scenario, bare chips never leave the controlled environment of the IC fabricator while the two major contributors to off-chip signal penalty, ESD protection and the need to source a 50-ohm test head, are avoided. With in-house assembly, ESD protection can be eliminated with the precautions already familiar in plasma etching. Test interconnection impacts the fundamentals of IC manufacturing, particularly with clock speeds approaching 1GHz, and cannot be an afterthought. It should be an integral part of the chip-to-chip interconnection bandwidth optimization, because—as we must

Improved pulse laser ranging algorithm based on high speed sampling

NASA Astrophysics Data System (ADS)

Gao, Xuan-yi; Qian, Rui-hai; Zhang, Yan-mei; Li, Huan; Guo, Hai-chao; He, Shi-jie; Guo, Xiao-kang

2016-10-01

Narrow pulse laser ranging achieves long-range target detection using laser pulse with low divergent beams. Pulse laser ranging is widely used in military, industrial, civil, engineering and transportation field. In this paper, an improved narrow pulse laser ranging algorithm is studied based on the high speed sampling. Firstly, theoretical simulation models have been built and analyzed including the laser emission and pulse laser ranging algorithm. An improved pulse ranging algorithm is developed. This new algorithm combines the matched filter algorithm and the constant fraction discrimination (CFD) algorithm. After the algorithm simulation, a laser ranging hardware system is set up to implement the improved algorithm. The laser ranging hardware system includes a laser diode, a laser detector and a high sample rate data logging circuit. Subsequently, using Verilog HDL language, the improved algorithm is implemented in the FPGA chip based on fusion of the matched filter algorithm and the CFD algorithm. Finally, the laser ranging experiment is carried out to test the improved algorithm ranging performance comparing to the matched filter algorithm and the CFD algorithm using the laser ranging hardware system. The test analysis result demonstrates that the laser ranging hardware system realized the high speed processing and high speed sampling data transmission. The algorithm analysis result presents that the improved algorithm achieves 0.3m distance ranging precision. The improved algorithm analysis result meets the expected effect, which is consistent with the theoretical simulation.

Design and reliability analysis of high-speed and continuous data recording system based on disk array

NASA Astrophysics Data System (ADS)

Jiang, Changlong; Ma, Cheng; He, Ning; Zhang, Xugang; Wang, Chongyang; Jia, Huibo

2002-12-01

In many real-time fields the sustained high-speed data recording system is required. This paper proposes a high-speed and sustained data recording system based on the complex-RAID 3+0. The system consists of Array Controller Module (ACM), String Controller Module (SCM) and Main Controller Module (MCM). ACM implemented by an FPGA chip is used to split the high-speed incoming data stream into several lower-speed streams and generate one parity code stream synchronously. It also can inversely recover the original data stream while reading. SCMs record lower-speed streams from the ACM into the SCSI disk drivers. In the SCM, the dual-page buffer technology is adopted to implement speed-matching function and satisfy the need of sustainable recording. MCM monitors the whole system, controls ACM and SCMs to realize the data stripping, reconstruction, and recovery functions. The method of how to determine the system scale is presented. At the end, two new ways Floating Parity Group (FPG) and full 2D-Parity Group (full 2D-PG) are proposed to improve the system reliability and compared with the Traditional Parity Group (TPG). This recording system can be used conveniently in many areas of data recording, storing, playback and remote backup with its high-reliability.

High-speed and ultrahigh-speed cinematographic recording techniques

NASA Astrophysics Data System (ADS)

Miquel, J. C.

1980-12-01

A survey is presented of various high-speed and ultrahigh-speed cinematographic recording systems (covering a range of speeds from 100 to 14-million pps). Attention is given to the functional and operational characteristics of cameras and to details of high-speed cinematography techniques (including image processing, and illumination). A list of cameras (many of them French) available in 1980 is presented

A computer tool to support in design of industrial Ethernet.

PubMed

Lugli, Alexandre Baratella; Santos, Max Mauro Dias; Franco, Lucia Regina Horta Rodrigues

2009-04-01

This paper presents a computer tool to support in the project and development of an industrial Ethernet network, verifying the physical layer (cables-resistance and capacitance, scan time, network power supply-POE's concept "Power Over Ethernet" and wireless), and occupation rate (amount of information transmitted to the network versus the controller network scan time). These functions are accomplished without a single physical element installed in the network, using only simulation. The computer tool has a software that presents a detailed vision of the network to the user, besides showing some possible problems in the network, and having an extremely friendly environment.

Analysis and solutions of security issues in Ethernet PON

NASA Astrophysics Data System (ADS)

Meng, Yu; Jiang, Tao; Xiao, Dingzhong

2005-02-01

Ethernet Passive Optical Network (EPON), which combines the low cost Ethernet equipment and economic fiber infrastructure, is being considered as a promising solution for Fiber-To-The-Home (FTTH). However, since EPON is an optical shared medium network, some unique features make it more vulnerable to security attacks. In this paper, the key security threats of EPON are firstly analyzed. And then, considering some specific properties which might be utilized for security, such as the safety of transmissions in upstream direction, some novel methods are presented to solve security problems. Firstly, based on some modification about registration, the mechanism of access control is achieved. Secondly, we implement an AES-128 symmetrical encryption and decryption in the EPON system. The AES-128 algorithm can process data blocks of 128 bits, but the length of Ethernet frame is variable. How to deal with the last block, which is not up to 128 bits, is discussed in detail. Finally, key update is accomplished through a vendor specific OAM frame in order to enhance the level of security. The proposed mechanism will remain in conformance with P2MP specification defined by 802.3ah TF, and can supply a complete security solution for EPON.

Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

NASA Astrophysics Data System (ADS)

Zhang, Liping; Sawchuk, Alexander A.

2001-12-01

We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

An Integrated Power-Efficient Active Rectifier With Offset-Controlled High Speed Comparators for Inductively Powered Applications

PubMed Central

Lee, Hyung-Min; Ghovanloo, Maysam

2011-01-01

We present an active full-wave rectifier with offset-controlled high speed comparators in standard CMOS that provides high power conversion efficiency (PCE) in high frequency (HF) range for inductively powered devices. This rectifier provides much lower dropout voltage and far better PCE compared to the passive on-chip or off-chip rectifiers. The built-in offset-control functions in the comparators compensate for both turn-on and turn-off delays in the main rectifying switches, thus maximizing the forward current delivered to the load and minimizing the back current to improve the PCE. We have fabricated this active rectifier in a 0.5-μm 3M2P standard CMOS process, occupying 0.18 mm2 of chip area. With 3.8 V peak ac input at 13.56 MHz, the rectifier provides 3.12 V dc output to a 500 Ω load, resulting in the PCE of 80.2%, which is the highest measured at this frequency. In addition, overvoltage protection (OVP) as safety measure and built-in back telemetry capabilities have been incorporated in our design using detuning and load shift keying (LSK) techniques, respectively, and tested. PMID:22174666

UW VLSI chip tester

NASA Astrophysics Data System (ADS)

McKenzie, Neil

1989-12-01

We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

High-speed highly temperature stable 980 nm VCSELs operating at 25 Gb/s at up to 85 °C for short reach optical interconnects

NASA Astrophysics Data System (ADS)

Mutig, Alex; Lott, James A.; Blokhin, Sergey A.; Moser, Philip; Wolf, Philip; Hofmann, Werner; Nadtochiy, Alexey M.; Bimberg, Dieter

2011-03-01

The progressive penetration of optical communication links into traditional copper interconnect markets greatly expands the applications of vertical cavity surface emitting lasers (VCSELs) for the next-generation of board-to-board, moduleto- module, chip-to-chip, and on-chip optical interconnects. Stability of the VCSEL parameters at high temperatures is indispensable for such applications, since these lasers typically reside directly on or near integrated circuit chips. Here we present 980 nm oxide-confined VCSELs operating error-free at bit rates up to 25 Gbit/s at temperatures as high as 85 °C without adjustment of the drive current and peak-to-peak modulation voltage. The driver design is therefore simplified and the power consumption of the driver electronics is lowered, reducing the production and operational costs. Small and large signal modulation experiments at various temperatures from 20 up to 85 °C for lasers with different oxide aperture diameters are presented in order to analyze the physical processes controlling the performance of the VCSELs. Temperature insensitive maximum -3 dB bandwidths of around 13-15 GHz for VCSELs with aperture diameters of 10 μm and corresponding parasitic cut-off frequencies exceeding 22 GHz are observed. Presented results demonstrate the suitability of our VCSELs for practical high speed and high temperature stable short-reach optical links.

Performance Comparison of 112-Gb/s DMT, Nyquist PAM4, and Partial-Response PAM4 for Future 5G Ethernet-Based Fronthaul Architecture

NASA Astrophysics Data System (ADS)

Eiselt, Nicklas; Muench, Daniel; Dochhan, Annika; Griesser, Helmut; Eiselt, Michael; Olmos, Juan Jose Vegas; Monroy, Idelfonso Tafur; Elbers, Joerg-Peter

2018-05-01

For a future 5G Ethernet-based fronthaul architecture, 100G trunk lines of a transmission distance up to 10 km standard single mode fiber (SSMF) in combination with cheap grey optics to daisy chain cell site network interfaces are a promising cost- and power-efficient solution. For such a scenario, different intensity modulation and direct detect (IMDD) Formats at a data rate of 112 Gb/s, namely Nyquist four-level pulse amplitude modulation (PAM4), discrete multi-tone Transmission (DMT) and partial-response (PR) PAM4 are experimentally investigated, using a low-cost electro-absorption modulated laser (EML), a 25G driver and current state-of-the-art high Speed 84 GS/s CMOS digital-to-analog converter (DAC) and analog-to-digital converter (ADC) test chips. Each modulation Format is optimized independently for the desired scenario and their digital signal processing (DSP) requirements are investigated. The performance of Nyquist PAM4 and PR PAM4 depend very much on the efficiency of pre- and post-equalization. We show the necessity for at least 11 FFE-taps for pre-emphasis and up to 41 FFE coefficients at the receiver side. In addition, PR PAM4 requires an MLSE with four states to decode the signal back to a PAM4 signal. On the contrary, bit- and power-loading (BL, PL) is crucial for DMT and an FFT length of at least 512 is necessary. With optimized parameters, all Modulation formats result in a very similar performances, demonstrating a transmission distance of up to 10 km over SSMF with bit error rates (BERs) below a FEC threshold of 4.4E-3, allowing error free transmission.

A novel architecture of recovered data comparison for high speed clock and data recovery

NASA Astrophysics Data System (ADS)

Gao, Susan; Li, Fei; Wang, Zhigong; Cui, Hongliang

2005-05-01

A clock and data recovery (CDR) circuit is one of the crucial blocks in high-speed serial link communication systems. The data received in these systems are asynchronous and noisy, requiring that a clock be extracted to allow synchronous operations. Furthermore, the data must be "retimed" so that the jitter accumulated during transmission is removed. This paper presents a novel architecture of CDR, which is very tolerant to long sequences of serial ones or zeros and also robust to occasional long absence of transitions. The design is based on the fact that a basic clock recovery having a clock recovery circuit (CRC) and a data decision circuit separately would generate a high jitter clock when the received non-return-to-zero (NRZ) data with long sequences of ones or zeros. To eliminate this drawback, the proposed architecture incorporates a data circuit decision circuit within the phase-locked loop (PLL) CRC. Other than this, a new phase detector (PD) is also proposed, which was easy to accomplish and robust at high speed. This PD is functional with a random input and automatically turns to disable during both the locked state and long absence of transitions. The voltage-controlled oscillator (VCO) is also designed delicately to suppress the jitter. Due to the high stability, the jitter is highly reduced when the loop is locked. The simulation results of such CDR working at 1.25Gb/s particularly for 1000BASE-X Gigabit Ethernet by using TSMC 0.25μm technology are presented to prove the feasibility of this architecture. One more CDR based on edge detection architecture is also built in the circuit for performance comparisons.

High-speed fixed-target serial virus crystallography

PubMed Central

Roedig, Philip; Ginn, Helen M.; Pakendorf, Tim; Sutton, Geoff; Harlos, Karl; Walter, Thomas S.; Meyer, Jan; Fischer, Pontus; Duman, Ramona; Vartiainen, Ismo; Reime, Bernd; Warmer, Martin; Brewster, Aaron S.; Young, Iris D.; Michels-Clark, Tara; Sauter, Nicholas K.; Kotecha, Abhay; Kelly, James; Rowlands, David J.; Sikorsky, Marcin; Nelson, Silke; Damiani, Daniel S.; Alonso-Mori, Roberto; Ren, Jingshan; Fry, Elizabeth E.; David, Christian; Stuart, David I.; Wagner, Armin; Meents, Alke

2017-01-01

We report a method for serial X-ray crystallography at X-ray free electron lasers (XFELs), which allows for full use of the current 120 Hz repetition rate of the Linear Coherent Light Source (LCLS). Using a micro-patterned silicon chip in combination with the high-speed Roadrunner goniometer for sample delivery we were able to determine the crystal structures of a picornavirus, bovine enterovirus 2 (BEV2), and the cytoplasmic polyhedrosis virus type 18 polyhedrin. Total data collection times were less than 14 and 10 minutes, respectively. Our method requires only micrograms of sample and will therefore broaden the applicability of serial femtosecond crystallography to challenging projects for which only limited sample amounts are available. By synchronizing the sample exchange to the XFEL repetition rate, our method allows for the most efficient use of the limited beamtime available at XFELs and should enable a substantial increase in sample throughput at these facilities. PMID:28628129

High-speed fixed-target serial virus crystallography

DOE PAGES

Roedig, Philip; Ginn, Helen M.; Pakendorf, Tim; ...

2017-06-19

Here, we report a method for serial X-ray crystallography at X-ray free-electron lasers (XFELs), which allows for full use of the current 120-Hz repetition rate of the Linear Coherent Light Source (LCLS). Using a micropatterned silicon chip in combination with the high-speed Roadrunner goniometer for sample delivery, we were able to determine the crystal structures of the picornavirus bovine enterovirus 2 (BEV2) and the cytoplasmic polyhedrosis virus type 18 polyhedrin, with total data collection times of less than 14 and 10 min, respectively. Our method requires only micrograms of sample and should therefore broaden the applicability of serial femtosecond crystallographymore » to challenging projects for which only limited sample amounts are available. By synchronizing the sample exchange to the XFEL repetition rate, our method allows for most efficient use of the limited beam time available at XFELs and should enable a substantial increase in sample throughput at these facilities.« less

High-speed fixed-target serial virus crystallography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Roedig, Philip; Ginn, Helen M.; Pakendorf, Tim

Here, we report a method for serial X-ray crystallography at X-ray free-electron lasers (XFELs), which allows for full use of the current 120-Hz repetition rate of the Linear Coherent Light Source (LCLS). Using a micropatterned silicon chip in combination with the high-speed Roadrunner goniometer for sample delivery, we were able to determine the crystal structures of the picornavirus bovine enterovirus 2 (BEV2) and the cytoplasmic polyhedrosis virus type 18 polyhedrin, with total data collection times of less than 14 and 10 min, respectively. Our method requires only micrograms of sample and should therefore broaden the applicability of serial femtosecond crystallographymore » to challenging projects for which only limited sample amounts are available. By synchronizing the sample exchange to the XFEL repetition rate, our method allows for most efficient use of the limited beam time available at XFELs and should enable a substantial increase in sample throughput at these facilities.« less

Systems and technologies for high-speed inter-office/datacenter interface

NASA Astrophysics Data System (ADS)

Sone, Y.; Nishizawa, H.; Yamamoto, S.; Fukutoku, M.; Yoshimatsu, T.

2017-01-01

Emerging requirements for inter-office/inter-datacenter short reach links for data center interconnects (DCI) and metro transport networks have led to various inter-office and inter-datacenter optical interface technologies. These technologies are bringing significant changes to systems and network architectures. In this paper, we present a system and ZR optical interface technologies for DCI and metro transport networks, then introduce the latest challenges facing the system framework. There are two trends in reach extension; one is to use Ethernet and the other is to use digital coherent technologies. The first approach achieves reach extension while using as many existing Ethernet components as possible. It offers low costs as reuses the cost-effective components created for the large Ethernet market. The second approach adopts low-cost and low power coherent DSPs that implement the minimal set long haul transmission functions. This paper introduces an architecture that integrates both trends. The architecture satisfies both datacom and telecom needs with a common control and management interface and automated configuration.

Fronthaul evolution: From CPRI to Ethernet

NASA Astrophysics Data System (ADS)

Gomes, Nathan J.; Chanclou, Philippe; Turnbull, Peter; Magee, Anthony; Jungnickel, Volker

2015-12-01

It is proposed that using Ethernet in the fronthaul, between base station baseband unit (BBU) pools and remote radio heads (RRHs), can bring a number of advantages, from use of lower-cost equipment, shared use of infrastructure with fixed access networks, to obtaining statistical multiplexing and optimised performance through probe-based monitoring and software-defined networking. However, a number of challenges exist: ultra-high-bit-rate requirements from the transport of increased bandwidth radio streams for multiple antennas in future mobile networks, and low latency and jitter to meet delay requirements and the demands of joint processing. A new fronthaul functional division is proposed which can alleviate the most demanding bit-rate requirements by transport of baseband signals instead of sampled radio waveforms, and enable statistical multiplexing gains. Delay and synchronisation issues remain to be solved.

Using the ACR/NEMA standard with TCP/IP and Ethernet

NASA Astrophysics Data System (ADS)

Chimiak, William J.; Williams, Rodney C.

1991-07-01

There is a need for a consolidated picture archival and communications system (PACS) in hospitals. At the Bowman Gray School of Medicine of Wake Forest University (BGSM), the authors are enhancing the ACR/NEMA Version 2 protocol using UNIX sockets and TCP/IP to greatly improve connectivity. Initially, nuclear medicine studies using gamma cameras are to be sent to PACS. The ACR/NEMA Version 2 protocol provides the functionality of the upper three layers of the open system interconnection (OSI) model in this implementation. The images, imaging equipment information, and patient information are then sent in ACR/NEMA format to a software socket. From there it is handed to the TCP/IP protocol, which provides the transport and network service. TCP/IP, in turn, uses the services of IEEE 802.3 (Ethernet) to complete the connectivity. The advantage of this implementation is threefold: (1) Only one I/O port is consumed by numerous nuclear medicine cameras, instead of a physical port for each camera. (2) Standard protocols are used which maximize interoperability with ACR/NEMA compliant PACSs. (3) The use of sockets allows a migration path to the transport and networking services of OSIs TP4 and connectionless network service as well as the high-performance protocol being considered by the American National Standards Institute (ANSI) and the International Standards Organization (ISO) -- the Xpress Transfer Protocol (XTP). The use of sockets also gives access to ANSI's Fiber Distributed Data Interface (FDDI) as well as other high-speed network standards.

A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip

NASA Astrophysics Data System (ADS)

Lattuca, A.; Mazza, G.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Mager, M.; Sielewicz, K. Marek; Marin Tobon, C. Augusto; Marras, D.; Martinengo, P.; Mugnier, H.; Musa, L.; Pham, T. Hung; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. Willem; Yang, P.

2016-01-01

This work presents the 600 MHz clock multiplier PLL and the pseudo-LVDS driver which are two essential components of the Data Transmission Unit (DTU), a fast serial link for the 1.2 Gb/s data transmission of the ALICE inner detector front-end chip (ALPIDE). The PLL multiplies the 40 MHz input clock in order to obtain the 600 MHz and the 200 MHz clock for a fast serializer which works in Double Data Rate mode. The outputs of the serializer feed the pseudo-LVDS driver inputs which transmits the data from the pixel chip to the patch panel with a limited number of signal lines. The driver drives a 5.3 m-6.5 m long differential transmission line by steering a maximum of 5 mA of current at the target speed. To overcome bandwidth limitations coming from the long cables the pre-emphasis can be applied to the output. Currents for the main and pre-emphasis driver can individually be adjusted using on-chip digital-to-analog converters. The circuits will be integrated in the pixel chip and are designed in the same 0.18 μm CMOS technology and will operate from the same 1.8 V supply. Design and test results of both circuits are presented.

Integrated Formal Analysis of Timed-Triggered Ethernet

NASA Technical Reports Server (NTRS)

Dutertre, Bruno; Shankar, Nstarajan; Owre, Sam

2012-01-01

We present new results related to the verification of the Timed-Triggered Ethernet (TTE) clock synchronization protocol. This work extends previous verification of TTE based on model checking. We identify a suboptimal design choice in a compression function used in clock synchronization, and propose an improvement. We compare the original design and the improved definition using the SAL model checker.

High-performance, scalable optical network-on-chip architectures

NASA Astrophysics Data System (ADS)

Tan, Xianfang

The rapid advance of technology enables a large number of processing cores to be integrated into a single chip which is called a Chip Multiprocessor (CMP) or a Multiprocessor System-on-Chip (MPSoC) design. The on-chip interconnection network, which is the communication infrastructure for these processing cores, plays a central role in a many-core system. With the continuously increasing complexity of many-core systems, traditional metallic wired electronic networks-on-chip (NoC) became a bottleneck because of the unbearable latency in data transmission and extremely high energy consumption on chip. Optical networks-on-chip (ONoC) has been proposed as a promising alternative paradigm for electronic NoC with the benefits of optical signaling communication such as extremely high bandwidth, negligible latency, and low power consumption. This dissertation focus on the design of high-performance and scalable ONoC architectures and the contributions are highlighted as follow: 1. A micro-ring resonator (MRR)-based Generic Wavelength-routed Optical Router (GWOR) is proposed. A method for developing any sized GWOR is introduced. GWOR is a scalable non-blocking ONoC architecture with simple structure, low cost and high power efficiency compared to existing ONoC designs. 2. To expand the bandwidth and improve the fault tolerance of the GWOR, a redundant GWOR architecture is designed by cascading different type of GWORs into one network. 3. The redundant GWOR built with MRR-based comb switches is proposed. Comb switches can expand the bandwidth while keep the topology of GWOR unchanged by replacing the general MRRs with comb switches. 4. A butterfly fat tree (BFT)-based hybrid optoelectronic NoC (HONoC) architecture is developed in which GWORs are used for global communication and electronic routers are used for local communication. The proposed HONoC uses less numbers of electronic routers and links than its counterpart of electronic BFT-based NoC. It takes the advantages of

Analysis of the resistive network in a bio-inspired CMOS vision chip

NASA Astrophysics Data System (ADS)

Kong, Jae-Sung; Sung, Dong-Kyu; Hyun, Hyo-Young; Shin, Jang-Kyoo

2007-12-01

CMOS vision chips for edge detection based on a resistive circuit have recently been developed. These chips help develop neuromorphic systems with a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends dominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the MOSFET for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160×120 CMOS vision chips have been fabricated by using a standard CMOS technology. The experimental results have been nicely matched with our prediction.

OFDM and PAM comparison using a high baudrate low resolution IM/DD interface for 400G Ethernet access.

PubMed

André, Nuno Sequeira; Louchet, Hadrien; Filsinger, Volker; Hansen, Erik; Richter, André

2016-05-30

We compare OFDM and PAM for 400G Ethernet based on a 3-bit high baudrate IM/DD interface at 1550nm. We demonstrate 27Gb/s and 32Gb/s transmission over 10km SSMF using OFDM and PAM respectively. We show that capacity can be improved through adaptation/equalization to achieve 42Gb/s and 64Gb/s for OFDM and PAM respectively. Experimental results are used to create realistic simulations to extrapolate the performance of both modulation formats under varied conditions. For the considered interface we found that PAM has the best performance, OFDM is impaired by quantization noise. When the resolution limitation is relaxed, OFDM shows better performance.

A Realization of Theoretical Maximum Performance in IPSec on Gigabit Ethernet

NASA Astrophysics Data System (ADS)

Onuki, Atsushi; Takeuchi, Kiyofumi; Inada, Toru; Tokiniwa, Yasuhisa; Ushirozawa, Shinobu

This paper describes “IPSec(IP Security) VPN system" and how it attains a theoretical maximum performance on Gigabit Ethernet. The Conventional System is implemented by software. However, the system has several bottlenecks which must be overcome to realize a theoretical maximum performance on Gigabit Ethernet. Thus, we newly propose IPSec VPN System with the FPGA(Field Programmable Gate Array) based hardware architecture, which transmits a packet by the pipe-lined flow processing and has 6 parallel structure of encryption and authentication engines. We show that our system attains the theoretical maximum performance in the short packet which is difficult to realize until now.

Oxide-confined 2D VCSEL arrays for high-density inter/intra-chip interconnects

NASA Astrophysics Data System (ADS)

King, Roger; Michalzik, Rainer; Jung, Christian; Grabherr, Martin; Eberhard, Franz; Jaeger, Roland; Schnitzer, Peter; Ebeling, Karl J.

1998-04-01

We have designed and fabricated 4 X 8 vertical-cavity surface-emitting laser (VCSEL) arrays intended to be used as transmitters in short-distance parallel optical interconnects. In order to meet the requirements of 2D, high-speed optical links, each of the 32 laser diodes is supplied with two individual top contacts. The metallization scheme allows flip-chip mounting of the array modules junction-side down on silicon complementary metal oxide semiconductor (CMOS) chips. The optical and electrical characteristics across the arrays with device pitch of 250 micrometers are quite homogeneous. Arrays with 3 micrometers , 6 micrometers and 10 micrometers active diameter lasers have been investigated. The small devices show threshold currents of 600 (mu) A, single-mode output powers as high as 3 mW and maximum wavelength deviations of only 3 nm. The driving characteristics of all arrays are fully compatible to advanced 3.3 V CMOS technology. Using these arrays, we have measured small-signal modulation bandwidths exceeding 10 GHz and transmitted pseudo random data at 8 Gbit/s channel over 500 m graded index multimode fiber. This corresponds to a data transmission rate of 256 Gbit/s per array of 1 X 2 mm2 footprint area.

Research on Dynamic Torque Measurement of High Speed Rotating Axis Based on Whole Optical Fiber Technique

NASA Astrophysics Data System (ADS)

Ma, H. P.; Jin, Y. Q.; Ha, Y. W.; Liu, L. H.

2006-10-01

Non-contact torque measurement system of fiber grating is proposed in this paper. It is used for the dynamic torque measurement of the rotating axis in the spaceflight servo system. Optical fiber is used as sensing probe with high sensitivity, anti-electromagnetic interference, resistance to high temperature and corrosion. It is suitable to apply in a bad environment. Signals are processed by digital circuit and Single Chip Microcomputer. This project can realize super speed dynamic measurement and it is the first time to apply the project in the spaceflight system.

Impact Analysis of Flow Shaping in Ethernet-AVB/TSN and AFDX from Network Calculus and Simulation Perspective

PubMed Central

He, Feng; Zhao, Lin; Li, Ershuai

2017-01-01

Ethernet-AVB/TSN (Audio Video Bridging/Time-Sensitive Networking) and AFDX (Avionics Full DupleX switched Ethernet) are switched Ethernet technologies, which are both candidates for real-time communication in the context of transportation systems. AFDX implements a fixed priority scheduling strategy with two priority levels. Ethernet-AVB/TSN supports a similar fixed priority scheduling with an additional Credit-Based Shaper (CBS) mechanism. Besides, TSN can support time-triggered scheduling strategy. One direct effect of CBS mechanism is to increase the delay of its flows while decreasing the delay of other priority ones. The former effect can be seen as the shaping restriction and the latter effect can be seen as the shaping benefit from CBS. The goal of this paper is to investigate the impact of CBS on different priority flows, especially on the intermediate priority ones, as well as the effect of CBS bandwidth allocation. It is based on a performance comparison of AVB/TSN and AFDX by simulation in an automotive case study. Furthermore, the shaping benefit is modeled based on integral operation from network calculus perspective. Combing with the analysis of shaping restriction and shaping benefit, some configuration suggestions on the setting of CBS bandwidth are given. Results show that the effect of CBS depends on flow loads and CBS configurations. A larger load of high priority flows in AVB tends to a better performance for the intermediate priority flows when compared with AFDX. Shaping benefit can be explained and calculated according to the changing from the permitted maximum burst. PMID:28531158

A CMOS high speed imaging system design based on FPGA

NASA Astrophysics Data System (ADS)

Tang, Hong; Wang, Huawei; Cao, Jianzhong; Qiao, Mingrui

2015-10-01

CMOS sensors have more advantages than traditional CCD sensors. The imaging system based on CMOS has become a hot spot in research and development. In order to achieve the real-time data acquisition and high-speed transmission, we design a high-speed CMOS imaging system on account of FPGA. The core control chip of this system is XC6SL75T and we take advantages of CameraLink interface and AM41V4 CMOS image sensors to transmit and acquire image data. AM41V4 is a 4 Megapixel High speed 500 frames per second CMOS image sensor with global shutter and 4/3" optical format. The sensor uses column parallel A/D converters to digitize the images. The CameraLink interface adopts DS90CR287 and it can convert 28 bits of LVCMOS/LVTTL data into four LVDS data stream. The reflected light of objects is photographed by the CMOS detectors. CMOS sensors convert the light to electronic signals and then send them to FPGA. FPGA processes data it received and transmits them to upper computer which has acquisition cards through CameraLink interface configured as full models. Then PC will store, visualize and process images later. The structure and principle of the system are both explained in this paper and this paper introduces the hardware and software design of the system. FPGA introduces the driven clock of CMOS. The data in CMOS is converted to LVDS signals and then transmitted to the data acquisition cards. After simulation, the paper presents a row transfer timing sequence of CMOS. The system realized real-time image acquisition and external controls.

Flexible high speed codec

NASA Technical Reports Server (NTRS)

Boyd, R. W.; Hartman, W. F.

1992-01-01

The project's objective is to develop an advanced high speed coding technology that provides substantial coding gains with limited bandwidth expansion for several common modulation types. The resulting technique is applicable to several continuous and burst communication environments. Decoding provides a significant gain with hard decisions alone and can utilize soft decision information when available from the demodulator to increase the coding gain. The hard decision codec will be implemented using a single application specific integrated circuit (ASIC) chip. It will be capable of coding and decoding as well as some formatting and synchronization functions at data rates up to 300 megabits per second (Mb/s). Code rate is a function of the block length and can vary from 7/8 to 15/16. Length of coded bursts can be any multiple of 32 that is greater than or equal to 256 bits. Coding may be switched in or out on a burst by burst basis with no change in the throughput delay. Reliability information in the form of 3-bit (8-level) soft decisions, can be exploited using applique circuitry around the hard decision codec. This applique circuitry will be discrete logic in the present contract. However, ease of transition to LSI is one of the design guidelines. Discussed here is the selected coding technique. Its application to some communication systems is described. Performance with 4, 8, and 16-ary Phase Shift Keying (PSK) modulation is also presented.

Ethernet access network based on free-space optic deployment technology

NASA Astrophysics Data System (ADS)

Gebhart, Michael; Leitgeb, Erich; Birnbacher, Ulla; Schrotter, Peter

2004-06-01

The satisfaction of all communication needs from single households and business companies over a single access infrastructure is probably the most challenging topic in communications technology today. But even though the so-called "Last Mile Access Bottleneck" is well known since more than ten years and many distribution technologies have been tried out, the optimal solution has not yet been found and paying commercial access networks offering all service classes are still rare today. Conventional services like telephone, radio and TV, as well as new and emerging services like email, web browsing, online-gaming, video conferences, business data transfer or external data storage can all be transmitted over the well known and cost effective Ethernet networking protocol standard. Key requirements for the deployment technology driven by the different services are high data rates to the single customer, security, moderate deployment costs and good scalability to number and density of users, quick and flexible deployment without legal impediments and high availability, referring to the properties of optical and wireless communication. We demonstrate all elements of an Ethernet Access Network based on Free Space Optic distribution technology. Main physical parts are Central Office, Distribution Network and Customer Equipment. Transmission of different services, as well as configuration, service upgrades and remote control of the network are handled by networking features over one FSO connection. All parts of the network are proven, the latest commercially available technology. The set up is flexible and can be adapted to any more specific need if required.

Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network.

PubMed

Lee, Dasheng

2008-12-02

In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

PubMed Central

Lee, Dasheng

2008-01-01

In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

Safety management of Ethernet broadband access based on VLAN aggregation

NASA Astrophysics Data System (ADS)

Wang, Li

2004-04-01

With broadband access network development, the Ethernet technology is more and more applied access network now. It is different from the private network -LAN. The differences lie in four points: customer management, safety management, service management and count-fee management. This paper mainly discusses the safety management related questions. Safety management means that the access network must secure the customer data safety, isolate the broad message which brings the customer private information, such as ARP, DHCP, and protect key equipment from attack. Virtue LAN (VLAN) technology can restrict network broadcast flow. We can config each customer port with a VLAN, so each customer is isolated with others. The IP address bound with VLAN ID can be routed rightly. But this technology brings another question: IP address shortage. VLAN aggregation technology can solve this problem well. Such a mechanism provides several advantages over traditional IPv4 addressing architectures employed in large switched LANs today. With VLAN aggregation technology, we introduce the notion of sub-VLANs and super-VLANs, a much more optimal approach to IP addressing can be realized. This paper will expatiate the VLAN aggregation model and its implementation in Ethernet access network. It is obvious that the customers in different sub-VLANs can not communication to each other because the ARP packet is isolated. Proxy ARP can enable the communication among them. This paper will also expatiate the proxy ARP model and its implementation in Ethernet access network.

25 Gbps 850 nm photodiode for emerging 100 Gb ethernet applications

NASA Astrophysics Data System (ADS)

Joshi, Abhay; Rue, Jim; Becker, Don; Datta, Shubhashish; McFaul, Will

2011-06-01

The IEEE Std 802.3ba-2010 for 40 Gb and 100 Gb Ethernet was released in July, 2010. This standard will continue to evolve over the next several years. Two of the challenging transmit/receive architectures contained in this standard are the 100GBASE-LR4 (<10 km range) and 100GBASE-ER4 (<40 km range). Although presently envisioned for 1310 nm optical wavelengths, both of these 4 lane, 25.78 GBaud formats may be adopted for the impending 850 nm short reach optical backplane market, whose range is below 150 m. Driven by major computer server companies, such as IBM, HP and Oracle, the 850 nm Active Optical Cable (AOC) market is presently undergoing an increase of serial rates up to 25 Gbaud to enhance backplane interconnectivity. With AOCs up to 16 channels, the potential for up to 400 Gbps backhaul composite data rates will soon be possible. We report a 25 Gbps photodiode with quantum efficiency ~ 0.6 at 850 nm. This InGaAs/InP device was optimized for high quantum efficiency at 850 nm. When pigtailed with multimode fiber and integrated with an application-specific RF amplifier, the resultant photoreceiver will provide multiple functionalities for these 100 Gb Ethernet markets.

Wear evaluation of flank in burins of high speed steel modified with titanium ions

NASA Astrophysics Data System (ADS)

E Caballero, J.; V-Niño, E. D.

2017-12-01

This report shows the results obtained researching the flank wearing resistance performed by the high-speed steel (HSS) burins without any surface treatment (reference substrate) and others with surface treatment based on Titanium ions. The flank wearing was carried out by means of an industrial process by chip removal with repetitive tests of dry finished turning of AISI/SAE 1045 steel bars. The useful service life of the burins was evaluated according to ISO 3685:1993, and it was found that the burins treated with Titanium ions showed an increase in the flank wearing resistance with respect to the ones used as reference.

High-speed and high-efficiency travelling wave single-photon detectors embedded in nanophotonic circuits

PubMed Central

Pernice, W.H.P.; Schuck, C.; Minaeva, O.; Li, M.; Goltsman, G.N.; Sergienko, A.V.; Tang, H.X.

2012-01-01

Ultrafast, high-efficiency single-photon detectors are among the most sought-after elements in modern quantum optics and quantum communication. However, imperfect modal matching and finite photon absorption rates have usually limited their maximum attainable detection efficiency. Here we demonstrate superconducting nanowire detectors atop nanophotonic waveguides, which enable a drastic increase of the absorption length for incoming photons. This allows us to achieve high on-chip single-photon detection efficiency up to 91% at telecom wavelengths, repeatable across several fabricated chips. We also observe remarkably low dark count rates without significant compromise of the on-chip detection efficiency. The detectors are fully embedded in scalable silicon photonic circuits and provide ultrashort timing jitter of 18 ps. Exploiting this high temporal resolution, we demonstrate ballistic photon transport in silicon ring resonators. Our direct implementation of a high-performance single-photon detector on chip overcomes a major barrier in integrated quantum photonics. PMID:23271658

Comparison of the osteogenic potential of bone dust and iliac bone chip.

PubMed

Ye, Shuai; Seo, Kyu-Bum; Park, Byung-Hyun; Song, Kyung-Jin; Kim, Jung-Ryul; Jang, Kyu-Yun; Chae, Young Ju; Lee, Kwang-Bok

2013-11-01

There is no comparative study of the in vitro and in vivo osteogenic potential of iliac bone chips (autogenous iliac cancellous bone chips) compared with bone dusts generated during the decortication process with a high-speed burr in spine fracture or fusion surgery. To compare the osteogenic potential of three sizes of bone dusts with iliac bone chips and to determine whether bone dusts can be used as a bone graft substitute. In vitro and in vivo study. Bone chips were harvested from the posterior superior iliac spine and bone dusts from the vertebrae of 15 patients who underwent spinal fracture surgery. Bone dust was divided into three groups: small (3 mm), middle (4 mm), and large (5 mm) according to the size of the burr tip. A comparison was made using a cell proliferation assay, alkaline phosphatase (ALP) activity, the degree of mineralization in an in vitro model, and radiographic and histologic studies (the change of absorbable area and tissue density) after implantation of the various materials into back muscles of nude mice. Although all three bone dust groups were less active with regard to cell proliferation, ALP activity, and the degree of mineralization, than were bone chips, they still exhibited osteogenic potential. Furthermore, there was no significant difference among the three bone dust groups. The three bone dust groups did show greater absorbable area and change of the tissue density than did the iliac bone chip group. Again, there was no significant difference among the three bone dust groups in this regard. Histologically, specimens from the bone dust groups had a higher osteoclast cell number than specimens from the iliac bone chip group. The osteogenic potential of bone dusts is lower than that of iliac bone chips, and the absorption speed of bone dusts in vivo is faster than that of iliac bone chips. The increased resorption speed appeared to result from an increase in osteoclast cell number. Therefore, caution needs to be used when

High-speed 1.3 -1.55 um InGaAs/InP PIN photodetector for microwave photonics

NASA Astrophysics Data System (ADS)

Kozyreva, O. A.; Solov'ev, Y. V.; Polukhin, I. S.; Mikhailov, A. K.; Mikhailovskiy, G. A.; Odnoblyudov, M. A.; Gareev, E. Z.; Kolodeznyi, E. S.; Novikov, I. I.; Karachinsky, L. Ya; Egorov, A. Yu; Bougrov, V. E.

2017-11-01

We have fabricated the 1.3-1.55 um PIN photodetector based on InGaAs/InP heterostructure. Measurement results of optical and electrical characteristics of PIN photodetector chip were the following: photoconductivity at 1550 nm was 0.65 A/W and internal capacitance was 0.025 pF. Microwave model of photodetector was developed and verified by measurements of scattering matrix. The implementation of broadband (up to 20 GHz) hybrid integrated matching and biasing circuit for high-speed photodetector is presented.

Optical signal processing for enabling high-speed, highly spectrally efficient and high capacity optical systems

NASA Astrophysics Data System (ADS)

Fazal, Muhammad Irfan

The unabated demand for more capacity due to the ever-increasing internet traffic dictates that the boundaries of the state of the art maybe pushed to send more data through the network. Traditionally, this need has been satisfied by multiple wavelengths (wavelength division multiplexing), higher order modulation formats and coherent communication (either individually or combined together). WDM has the ability to reduce cost by using multiple channels within the same physical fiber, and with EDFA amplifiers, the need for O-E-O regenerators is eliminated. Moreover the availability of multiple colors allows for wavelength-based routing and network planning. Higher order modulation formats increases the capacity of the link by their ability to encode data in both the phase and amplitude of light, thereby increasing the bits/sec/Hz as compared to simple on-off keyed format. Coherent communications has also emerged as a primary means of transmitting and receiving optical data due to its support of formats that utilize both phase and amplitude to further increase the spectral efficiency of the optical channel, including quadrature amplitude modulation (QAM) and quadrature phase shift keying (QPSK). Polarization multiplexing of channels can double capacity by allowing two channels to share the same wavelength by propagating on orthogonal polarization axis and is easily supported in coherent systems where the polarization tracking can be performed in the digital domain. Furthermore, the forthcoming IEEE 100 Gbit/s Ethernet Standard, 802.3ba, provides greater bandwidth, higher data rates, and supports a mixture of modulation formats. In particular, Pol-MUX QPSK is increasingly becoming the industry's format of choice as the high spectral efficiency allows for 100 Gbit/s transmission while still occupying the current 50 GHz/channel allocation of current 10 Gbit/s OOK fiber systems. In this manner, 100 Gbit/s transfer speeds using current fiber links, amplifiers, and filters

Chip-scale thermal management of high-brightness LED packages

NASA Astrophysics Data System (ADS)

Arik, Mehmet; Weaver, Stanton

2004-10-01

The efficiency and reliability of the solid-state lighting devices strongly depend on successful thermal management. Light emitting diodes, LEDs, are a strong candidate for the next generation, general illumination applications. LEDs are making great strides in terms of lumen performance and reliability, however the barrier to widespread use in general illumination still remains the cost or $/Lumen. LED packaging designers are pushing the LED performance to its limits. This is resulting in increased drive currents, and thus the need for lower thermal resistance packaging designs. As the power density continues to rise, the integrity of the package electrical and thermal interconnect becomes extremely important. Experimental results with high brightness LED packages show that chip attachment defects can cause significant thermal gradients across the LED chips leading to premature failures. A numerical study was also carried out with parametric models to understand the chip active layer temperature profile variation due to the bump defects. Finite element techniques were utilized to evaluate the effects of localized hot spots at the chip active layer. The importance of "zero defects" in one of the more popular interconnect schemes; the "epi down" soldered flip chip configuration is investigated and demonstrated.

A microfluidic device for automated, high-speed microinjection of Caenorhabditis elegans

PubMed Central

Song, Pengfei; Dong, Xianke; Liu, Xinyu

2016-01-01

The nematode worm Caenorhabditis elegans has been widely used as a model organism in biological studies because of its short and prolific life cycle, relatively simple body structure, significant genetic overlap with human, and facile/inexpensive cultivation. Microinjection, as an established and versatile tool for delivering liquid substances into cellular/organismal objects, plays an important role in C. elegans research. However, the conventional manual procedure of C. elegans microinjection is labor-intensive and time-consuming and thus hinders large-scale C. elegans studies involving microinjection of a large number of C. elegans on a daily basis. In this paper, we report a novel microfluidic device that enables, for the first time, fully automated, high-speed microinjection of C. elegans. The device is automatically regulated by on-chip pneumatic valves and allows rapid loading, immobilization, injection, and downstream sorting of single C. elegans. For demonstration, we performed microinjection experiments on 200 C. elegans worms and demonstrated an average injection speed of 6.6 worm/min (average worm handling time: 9.45 s/worm) and a success rate of 77.5% (post-sorting success rate: 100%), both much higher than the performance of manual operation (speed: 1 worm/4 min and success rate: 30%). We conducted typical viability tests on the injected C. elegans and confirmed that the automated injection system does not impose significant adverse effect on the physiological condition of the injected C. elegans. We believe that the developed microfluidic device holds great potential to become a useful tool for facilitating high-throughput, large-scale worm biology research. PMID:26958099

GaN-based integrated photonics chip with suspended LED and waveguide

NASA Astrophysics Data System (ADS)

Li, Xin; Wang, Yongjin; Hane, Kazuhiro; Shi, Zheng; Yan, Jiang

2018-05-01

We propose a GaN-based integrated photonics chip with suspended LED and straight waveguide with different geometric parameters. The integrated photonics chip is prepared by double-side process. Light transmission performance of the integrated chip verse current is quantitatively analyzed by capturing light transmitted to waveguide tip and BPM (beam propagation method) simulation. Reduction of the waveguide width from 8 μm to 4 μm results in an over linear reduction of the light output power while a doubling of the length from 250 μm to 500 μm only results in under linear decrease of the output power. Free-space data transmission with 80 Mbps random binary sequence of the integrated chip is capable of achieving high speed data transmission via visible light. This study provides a potential approach for GaN-based integrated photonics chip as micro light source and passive optical device in VLC (visible light communication).

Development of a driving method suitable for ultrahigh-speed shooting in a 2M-fps 300k-pixel single-chip color camera

NASA Astrophysics Data System (ADS)

Yonai, J.; Arai, T.; Hayashida, T.; Ohtake, H.; Namiki, J.; Yoshida, T.; Etoh, T. Goji

2012-03-01

We have developed an ultrahigh-speed CCD camera that can capture instantaneous phenomena not visible to the human eye and impossible to capture with a regular video camera. The ultrahigh-speed CCD was specially constructed so that the CCD memory between the photodiode and the vertical transfer path of each pixel can store 144 frames each. For every one-frame shot, the electric charges generated from the photodiodes are transferred in one step to the memory of all the parallel pixels, making ultrahigh-speed shooting possible. Earlier, we experimentally manufactured a 1M-fps ultrahigh-speed camera and tested it for broadcasting applications. Through those tests, we learned that there are cases that require shooting speeds (frame rate) of more than 1M fps; hence we aimed to develop a new ultrahigh-speed camera that will enable much faster shooting speeds than what is currently possible. Since shooting at speeds of more than 200,000 fps results in decreased image quality and abrupt heating of the image sensor and drive circuit board, faster speeds cannot be achieved merely by increasing the drive frequency. We therefore had to improve the image sensor wiring layout and the driving method to develop a new 2M-fps, 300k-pixel ultrahigh-speed single-chip color camera for broadcasting purposes.

On-chip spectroscopy with thermally tuned high-Q photonic crystal cavities

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liapis, Andreas C., E-mail: andreas.liapis@gmail.com; Gao, Boshen; Siddiqui, Mahmudur R.

2016-01-11

Spectroscopic methods are a sensitive way to determine the chemical composition of potentially hazardous materials. Here, we demonstrate that thermally tuned high-Q photonic crystal cavities can be used as a compact high-resolution on-chip spectrometer. We have used such a chip-scale spectrometer to measure the absorption spectra of both acetylene and hydrogen cyanide in the 1550 nm spectral band and show that we can discriminate between the two chemical species even though the two materials have spectral features in the same spectral region. Our results pave the way for the development of chip-size chemical sensors that can detect toxic substances.

High-Speed, high-power, switching transistor

NASA Technical Reports Server (NTRS)

Carnahan, D.; Ohu, C. K.; Hower, P. L.

1979-01-01

Silicon transistor rate for 200 angstroms at 400 to 600 volts combines switching speed of transistors with ruggedness, power capacity of thyristor. Transistor introduces unique combination of increased power-handling capability, unusally low saturation and switching losses, and submicrosecond switching speeds. Potential applications include high power switching regulators, linear amplifiers, chopper controls for high frequency electrical vehicle drives, VLF transmitters, RF induction heaters, kitchen cooking ranges, and electronic scalpels for medical surgery.

A molecular dynamics investigation into the mechanisms of subsurface damage and material removal of monocrystalline copper subjected to nanoscale high speed grinding

NASA Astrophysics Data System (ADS)

Li, Jia; Fang, Qihong; Liu, Youwen; Zhang, Liangchi

2014-06-01

This paper investigates the mechanisms of subsurface damage and material removal of monocrystalline copper when it is under a nanoscale high speed grinding of a diamond tip. The analysis was carried out with the aid of three-dimensional molecular dynamics simulations. The key factors that would influence the deformation of the material were carefully explored by analyzing the chip, dislocation movement, and workpiece deformation, which include grinding speed, depth of cut, grid tip radius, crystal orientation and machining angle of copper. An analytical model was also established to predict the emission of partial dislocations during the nanoscale high speed grinding. The investigation showed that a higher grinding velocity, a larger tip radius or a larger depth of cut would result in a larger chipping volume and a greater temperature rise in the copper workpiece. A lower grinding velocity would produce more intrinsic stacking faults. It was also found that the transition of deformation mechanisms depends on the competition between the dislocations and deformation twinning. There is a critical machining angle, at which a higher velocity, a smaller tip radius, or a smaller depth of cut will reduce the subsurface damage and improve the smoothness of a ground surface. The established analytical model showed that the Shockley dislocation emission is most likely to occur with the crystal orientations of (0 0 1)[1 0 0] at 45° angle.

Rotational microfluidic motor for on-chip microcentrifugation

NASA Astrophysics Data System (ADS)

Shilton, Richie J.; Glass, Nick R.; Chan, Peggy; Yeo, Leslie Y.; Friend, James R.

2011-06-01

We report on the design of a surface acoustic wave (SAW) driven fluid-coupled micromotor which runs at high rotational velocities. A pair of opposing SAWs generated on a lithium niobate substrate are each obliquely passed into either side of a fluid drop to drive rotation of the fluid, and the thin circular disk set on the drop. Using water for the drop, a 5 mm diameter disk was driven with rotation speeds and start-up torques up to 2250 rpm and 60 nN m, respectively. Most importantly for lab-on-a-chip applications, radial accelerations of 172 m/s2 was obtained, presenting possibilities for microcentrifugation, flow sequencing, assays, and cell culturing in truly microscale lab-on-a-chip devices.

Chip-scale integrated optical interconnects: a key enabler for future high-performance computing

NASA Astrophysics Data System (ADS)

Haney, Michael; Nair, Rohit; Gu, Tian

2012-01-01

High Performance Computing (HPC) systems are putting ever-increasing demands on the throughput efficiency of their interconnection fabrics. In this paper, the limits of conventional metal trace-based inter-chip interconnect fabrics are examined in the context of state-of-the-art HPC systems, which currently operate near the 1 GFLOPS/W level. The analysis suggests that conventional metal trace interconnects will limit performance to approximately 6 GFLOPS/W in larger HPC systems that require many computer chips to be interconnected in parallel processing architectures. As the HPC communications bottlenecks push closer to the processing chips, integrated Optical Interconnect (OI) technology may provide the ultra-high bandwidths needed at the inter- and intra-chip levels. With inter-chip photonic link energies projected to be less than 1 pJ/bit, integrated OI is projected to enable HPC architecture scaling to the 50 GFLOPS/W level and beyond - providing a path to Peta-FLOPS-level HPC within a single rack, and potentially even Exa-FLOPSlevel HPC for large systems. A new hybrid integrated chip-scale OI approach is described and evaluated. The concept integrates a high-density polymer waveguide fabric directly on top of a multiple quantum well (MQW) modulator array that is area-bonded to the Silicon computing chip. Grayscale lithography is used to fabricate 5 μm x 5 μm polymer waveguides and associated novel small-footprint total internal reflection-based vertical input/output couplers directly onto a layer containing an array of GaAs MQW devices configured to be either absorption modulators or photodetectors. An external continuous wave optical "power supply" is coupled into the waveguide links. Contrast ratios were measured using a test rider chip in place of a Silicon processing chip. The results suggest that sub-pJ/b chip-scale communication is achievable with this concept. When integrated into high-density integrated optical interconnect fabrics, it could provide

On-chip plasmon-induced transparency based on plasmonic coupled nanocavities

PubMed Central

Zhu, Yu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-01

On-chip plasmon-induced transparency offers the possibility of realization of ultrahigh-speed information processing chips. Unfortunately, little experimental progress has been made to date because it is difficult to obtain on-chip plasmon-induced transparency using only a single meta-molecule in plasmonic circuits. Here, we report a simple and efficient strategy to realize on-chip plasmon-induced transparency in a nanoscale U-shaped plasmonic waveguide side-coupled nanocavity pair. High tunability in the transparency window is achieved by covering the pair with different organic polymer layers. It is possible to realize ultrafast all-optical tunability based on pump light-induced refractive index change of a graphene cover layer. Compared with previous reports, the overall feature size of the plasmonic nanostructure is reduced by more than three orders of magnitude, while ultrahigh tunability of the transparency window is maintained. This work also provides a superior platform for the study of the various physical effects and phenomena of nonlinear optics and quantum optics. PMID:24435059

On-chip plasmon-induced transparency based on plasmonic coupled nanocavities.

PubMed

Zhu, Yu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-17

On-chip plasmon-induced transparency offers the possibility of realization of ultrahigh-speed information processing chips. Unfortunately, little experimental progress has been made to date because it is difficult to obtain on-chip plasmon-induced transparency using only a single meta-molecule in plasmonic circuits. Here, we report a simple and efficient strategy to realize on-chip plasmon-induced transparency in a nanoscale U-shaped plasmonic waveguide side-coupled nanocavity pair. High tunability in the transparency window is achieved by covering the pair with different organic polymer layers. It is possible to realize ultrafast all-optical tunability based on pump light-induced refractive index change of a graphene cover layer. Compared with previous reports, the overall feature size of the plasmonic nanostructure is reduced by more than three orders of magnitude, while ultrahigh tunability of the transparency window is maintained. This work also provides a superior platform for the study of the various physical effects and phenomena of nonlinear optics and quantum optics.

Bidirectional and simultaneous FTTX/Ethernet services using RSOA based remodulation and polarization multiplexing technique

NASA Astrophysics Data System (ADS)

Das, Anindya S.; Patra, Ardhendu S.

2015-08-01

A bidirectional and simultaneous transmission of Ethernet, FTTX services through single optical carrier wavelength employing polarization multiplexing technique in the transmitter end and the user end. 10 Gbps and 2.5 Gbps datarates are transmitted over 50 km single mode fiber employing POLMUX technique at OLT and ONU to provide Ethernet and FTTX services concurrently to the user. Reflective semiconductor optical amplifier is used to reuse and remodulate the downlink signal to uplink transmission. The upstream and the downstream transmission performances are observed by the bit error rate values and the eye diagrams obtained by the BER analyzer.

High precision, fast ultrasonic thermometer based on measurement of the speed of sound in air

NASA Astrophysics Data System (ADS)

Huang, K. N.; Huang, C. F.; Li, Y. C.; Young, M. S.

2002-11-01

This study presents a microcomputer-based ultrasonic system which measures air temperature by detecting variations in the speed of sound in the air. Changes in the speed of sound are detected by phase shift variations of a 40 kHz continuous ultrasonic wave. In a test embodiment, two 40 kHz ultrasonic transducers are set face to face at a constant distance. Phase angle differences between transmitted and received signals are determined by a FPGA digital phase detector and then analyzed in an 89C51 single-chip microcomputer. Temperature is calculated and then sent to a LCD display and, optionally, to a PC. Accuracy of measurement is within 0.05 degC at an inter-transducer distance of 10 cm. Temperature variations are displayed within 10 ms. The main advantages of the proposed system are high resolution, rapid temperature measurement, noncontact measurement and easy implementation.

Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

NASA Astrophysics Data System (ADS)

Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

2003-06-01

We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

High-Speed Sealift Technology. Volume 1

DTIC Science & Technology

1998-09-01

performance of high - speed commercial and military sealift ships , in advance of detailed design studies, in order to help define realistic future mission...Therefore, the viability of new High - Speed Sealift (HSS) ships (oceangoing cargo vessels capable of at least 40 kt that are able to onload and offload... propulsion power for dynamically supported concepts) VK = average ship speed for a voyage (i.e., sustained or service speed )

High-speed sailing

NASA Astrophysics Data System (ADS)

Püschl, Wolfgang

2018-07-01

This article is to review, for the benefit of university teachers, the most important arguments concerning the theory of sailing, especially regarding its high-speed aspect. The matter presented should be appropriate for students with basic knowledge of physics, such as advanced undergraduate or graduate. It is intended, furthermore, to put recent developments in the art of sailing in the proper historic perspective. We first regard the general geometric and dynamic conditions for steady sailing on a given course and then take a closer look at the high-speed case and its counter-intuitive aspects. A short overview is given on how the aero-hydrodynamic lift force arises, disposing of some wrong but entrenched ideas. The multi-faceted, composite nature of the drag force is expounded, with the special case of wave drag as a phenomenon at the boundary between different media. It is discussed how these various factors have to contribute in order to attain maximum speed. Modern solutions to this optimisation problem are considered, as well as their repercussions on the sport of sailing now and in the future.

An integrated CMOS high voltage supply for lab-on-a-chip systems.

PubMed

Behnam, M; Kaigala, G V; Khorasani, M; Marshall, P; Backhouse, C J; Elliott, D G

2008-09-01

Electrophoresis is a mainstay of lab-on-a-chip (LOC) implementations of molecular biology procedures and is the basis of many medical diagnostics. High voltage (HV) power supplies are necessary in electrophoresis instruments and are a significant part of the overall system cost. This cost of instrumentation is a significant impediment to making LOC technologies more widely available. We believe one approach to overcoming this problem is to use microelectronic technology (complementary metal-oxide semiconductor, CMOS) to generate and control the HV. We present a CMOS-based chip (3 mm x 2.9 mm) that generates high voltages (hundreds of volts), switches HV outputs, and is powered by a 5 V input supply (total power of 28 mW) while being controlled using a standard computer serial interface. Microchip electrophoresis with laser induced fluorescence (LIF) detection is implemented using this HV CMOS chip. With the other advancements made in the LOC community (e.g. micro-fluidic and optical devices), these CMOS chips may ultimately enable 'true' LOC solutions where essentially all the microfluidics, photonics and electronics are on a single chip.

Compact sub-nanosecond pulse seed source with diode laser driven by a high-speed circuit

NASA Astrophysics Data System (ADS)

Wang, Xiaoqian; Wang, Bo; Wang, Junhua; Cheng, Wenyong

2018-06-01

A compact sub-nanosecond pulse seed source with 1550 nm diode laser (DL) was obtained by employing a high-speed circuit. The circuit mainly consisted of a short pulse generator and a short pulse driver. The short pulse generator, making up of a complex programmable logic device (CPLD), a level translator, two programmable delay chips and an AND gate chip, output a triggering signal to control metal-oxide-semiconductor field-effect transistor (MOSFET) switch of the short pulse driver. The MOSFET switch with fast rising time and falling time both shorter than 1 ns drove the DL to emit short optical pulses. Performances of the pulse seed source were tested. The results showed that continuously adjustable repetition frequency ranging from 500 kHz to 100 MHz and pulse duration in the range of 538 ps to 10 ns were obtained, respectively. 537 μW output was obtained at the highest repetition frequency of 100 MHz with the shortest pulse duration of 538 ps. These seed pulses were injected into an fiber amplifier, and no optical pulse distortions were found.

Comparison of bone healing and outcomes between allogenous bone chip and hydroxyapatite chip grafts in open wedge high tibial osteotomy.

PubMed

Lee, O-Sung; Lee, Kyung Jae; Lee, Yong Seuk

2017-11-03

Allogenous bone chips and hydroxyapatite (HA) chips have been known as good options for filling an inevitable void after open wedge high tibial osteotomy (OWHTO). However, there are concerns regarding bone healing after the use of these grafts. The purpose of this study was to compare the bone healing represented by the osteoconductivity and absorbability between allogenous bone chips and HA chips in OWHTO. The outcomes of bone healing of 53 patients who received an allogenous bone chip graft and 41 patients who received an HA chip graft were retrospectively evaluated, and the results were compared between the two groups. Osteoconductivity and absorbability were serially evaluated for the assessment of bone healing at 6 weeks, 3 months, 6 months, and 1 year postoperatively. The osteoconductivity of the allogenous bone chips was greater than that of the HA chips at 6 weeks postoperatively (p < 0.05). However, there were no statistically significant differences from 3 months to 1 year postoperatively. The absorbability showed no statistically significant differences 6 weeks and 3 months after OWHTO; however, the allogenous bone chip group showed a greater absorbability at 6 months and 1 year postoperatively (42.8 ± 14.2 vs. 34.6 ± 13.8, p = 0.006 at 6 months postoperatively; 54.6 ± 14.4 vs. 43.0 ± 14.0, p < 0.001 at 1 year postoperatively). However, the two graft materials showed similar results of HKA angle, WBL ratio, posterior tibial slope.

The Application of Virtex-II Pro FPGA in High-Speed Image Processing Technology of Robot Vision Sensor

NASA Astrophysics Data System (ADS)

Ren, Y. J.; Zhu, J. G.; Yang, X. Y.; Ye, S. H.

2006-10-01

The Virtex-II Pro FPGA is applied to the vision sensor tracking system of IRB2400 robot. The hardware platform, which undertakes the task of improving SNR and compressing data, is constructed by using the high-speed image processing of FPGA. The lower level image-processing algorithm is realized by combining the FPGA frame and the embedded CPU. The velocity of image processing is accelerated due to the introduction of FPGA and CPU. The usage of the embedded CPU makes it easily to realize the logic design of interface. Some key techniques are presented in the text, such as read-write process, template matching, convolution, and some modules are simulated too. In the end, the compare among the modules using this design, using the PC computer and using the DSP, is carried out. Because the high-speed image processing system core is a chip of FPGA, the function of which can renew conveniently, therefore, to a degree, the measure system is intelligent.

Laser-induced forward transfer for flip-chip packaging of single dies.

PubMed

Kaur, Kamal S; Van Steenberge, Geert

2015-03-20

Flip-chip (FC) packaging is a key technology for realizing high performance, ultra-miniaturized and high-density circuits in the micro-electronics industry. In this technique the chip and/or the substrate is bumped and the two are bonded via these conductive bumps. Many bumping techniques have been developed and intensively investigated since the introduction of the FC technology in 1960(1) such as stencil printing, stud bumping, evaporation and electroless/electroplating2. Despite the progress that these methods have made they all suffer from one or more than one drawbacks that need to be addressed such as cost, complex processing steps, high processing temperatures, manufacturing time and most importantly the lack of flexibility. In this paper, we demonstrate a simple and cost-effective laser-based bump forming technique known as Laser-induced Forward Transfer (LIFT)3. Using the LIFT technique a wide range of bump materials can be printed in a single-step with great flexibility, high speed and accuracy at RT. In addition, LIFT enables the bumping and bonding down to chip-scale, which is critical for fabricating ultra-miniature circuitry.

An Ethernet Java Applet for a Course for Non-Majors.

ERIC Educational Resources Information Center

Holliday, Mark A.

1997-01-01

Details the topics of a new course that introduces computing and communication technology to students not majoring in computer science. Discusses the process of developing a Java applet (a program that can be invoked through a World Wide Web browser) that illustrates the protocol used by ethernet local area networks to determine which computer can…

A novel "gain chip" concept for high-power lasers (Conference Presentation)

NASA Astrophysics Data System (ADS)

Li, Min; Li, Mingzhong; Wang, Zhenguo; Yan, Xiongwei; Jiang, Xinying; Zheng, Jiangang; Cui, Xudong; Zhang, Xiaomin

2017-05-01

High-power lasers, including high-peak power lasers (HPPL) and high-average power lasers (HAPL), attract much interest for enormous variety of applications in inertial fusion energy (IFE), materials processing, defense, spectroscopy, and high-field physics research. To meet the requirements of high efficiency and quality, a "gain chip" concept is proposed to properly design the pumping, cooling and lasing fields. The gain chip mainly consists of the laser diode arrays, lens duct, rectangle wave guide and slab-shaped gain media. For the pumping field, the pump light will be compressed and homogenized by the lens duct to high irradiance with total internal reflection, and further coupled into the gain media through its two edge faces. For the cooling field, the coolant travels along the flow channel created by the adjacent slabs in the other two edge-face direction, and cool the lateral faces of the gain media. For the lasing field, the laser beam travels through the lateral faces and experiences minimum thermal wavefront distortions. Thereby, these three fields are in orthogonality offering more spatial freedom to handle them during the construction of the lasers. Transverse gradient doping profiles for HPPL and HAPL have been employed to achieve uniform gain distributions (UGD) within the gain media, respectively. This UGD will improve the management for both amplified spontaneous emission (ASE) and thermal behavior. Since each "gain chip" has its own pump source, power scaling can be easily achieved by placing identical "gain chips" along the laser beam axis without disturbing the gain and thermal distributions. To detail our concept, a 1-kJ pulsed amplifier is designed and optical-to-optical efficiency up to 40% has been obtained. We believe that with proper coolant (gas or liquid) and gain media (Yb:YAG, Nd:glass or Nd:YAG) our "gain chip" concept might provide a general configuration for high-power lasers with high efficiency and quality.

ShareSync: A Solution for Deterministic Data Sharing over Ethernet

NASA Technical Reports Server (NTRS)

Dunn, Daniel J., II; Koons, William A.; Kennedy, Richard D.; Davis, Philip A.

2007-01-01

As part of upgrading the Contact Dynamics Simulation Laboratory (CDSL) at the NASA Marshall Space Flight Center (MSFC), a simple, cost effective method was needed to communicate data among the networked simulation machines and I/O controllers used to run the facility. To fill this need and similar applicable situations, a generic protocol was developed, called ShareSync. ShareSync is a lightweight, real-time, publish-subscribe Ethernet protocol for simple and deterministic data sharing across diverse machines and operating systems. ShareSync provides a simple Application Programming Interface (API) for simulation programmers to incorporate into their code. The protocol is compatible with virtually all Ethernet-capable machines, is flexible enough to support a variety of applications, is fast enough to provide soft real-time determinism, and is a low-cost resource for distributed simulation development, deployment, and maintenance. The first design cycle iteration of ShareSync has been completed, and the protocol has undergone several testing procedures including endurance and benchmarking tests and approaches the 2001ts data synchronization design goal for the CDSL.

Ultra-high-Q phononic resonators on-chip at cryogenic temperatures

NASA Astrophysics Data System (ADS)

Kharel, Prashanta; Chu, Yiwen; Power, Michael; Renninger, William H.; Schoelkopf, Robert J.; Rakich, Peter T.

2018-06-01

Long-lived, high-frequency phonons are valuable for applications ranging from optomechanics to emerging quantum systems. For scientific as well as technological impact, we seek high-performance oscillators that offer a path toward chip-scale integration. Confocal bulk acoustic wave resonators have demonstrated an immense potential to support long-lived phonon modes in crystalline media at cryogenic temperatures. So far, these devices have been macroscopic with cm-scale dimensions. However, as we push these oscillators to high frequencies, we have an opportunity to radically reduce the footprint as a basis for classical and emerging quantum technologies. In this paper, we present novel design principles and simple microfabrication techniques to create high performance chip-scale confocal bulk acoustic wave resonators in a wide array of crystalline materials. We tailor the acoustic modes of such resonators to efficiently couple to light, permitting us to perform a non-invasive laser-based phonon spectroscopy. Using this technique, we demonstrate an acoustic Q-factor of 2.8 × 107 (6.5 × 106) for chip-scale resonators operating at 12.7 GHz (37.8 GHz) in crystalline z-cut quartz (x-cut silicon) at cryogenic temperatures.

Experimental assessment of eye protection efficiency against high speed projectiles.

PubMed

Speck, Alexis; Zelzer, Benedikt; Eppig, Timo; Langenbucher, Achim

2013-02-01

Work in hazardous zones with the risk of mechanical injuries requires protection with safety spectacles. Mechanical eye injuries with metal foreign bodies are often caused by rotational material machining or production processes with high pressure or high velocity moving parts. Normative regulations restrict to tests with small and fast flying objects (e.g. 6mm ball). The literature does not provide any information about protection capabilities against larger objects with high mass and arbitrary shape. The purpose of this study was to test the protection efficiency of safety spectacles against flying objects. The scope of this paper is to present a new test setup for mechanical impact resistance testing of personal protective eyewear against objects with arbitrary shape and mass. The setup is based on a catapult platform, accelerating a sliding carriage on a rail. A pull rope system allows velocities up to 62±2 m·s(-1). A photo sensor was used for velocity measurement. The carriage can be loaded with projectiles of up to 30mm×30mm×40mm in size with arbitrary orientation, depending on the carriage insert. Testing and validation was done with projectiles such as 7g metal chips and fragments with approximate dimensions of 10mm×15mm. Samples were standard occupational safety spectacles mounted on a test head. The projectile impact was captured with a monochrome high speed camera. The aiming accuracy test showed deviations of approximately 1mm of two impacts on the same spectacle surface with a free flight distance of 150mm. All tests with slow, medium and high speed projectiles showed no contact with the eye medium. Objects with velocities from 10 m·s(-1) to 62 m·s(-1) fired the spectacle off from the test head. The medium speed test cut off one side of the spectacle frame. The high speed test with 62±2 m·s(-1) cracked the polycarbonate shield. We describe a method for accelerating arbitrary objects up to 62 m·s(-1) and for aiming these objects on safety

Prediction of 3D chip formation in the facing cutting with lathe machine using FEM

NASA Astrophysics Data System (ADS)

Prasetyo, Yudhi; Tauviqirrahman, Mohamad; Rusnaldy

2016-04-01

This paper presents the prediction of the chip formation at the machining process using a lathe machine in a more specific way focusing on facing cutting (face turning). The main purpose is to propose a new approach to predict the chip formation with the variation of the cutting directions i.e., the backward and forward direction. In addition, the interaction between stress analysis and chip formation on cutting process was also investigated. The simulations were conducted using three dimensional (3D) finite element method based on ABAQUS software with aluminum and high speed steel (HSS) as the workpiece and the tool materials, respectively. The simulation result showed that the chip resulted using a backward direction depicts a better formation than that using a conventional (forward) direction.

Developing course lecture notes on high-speed rail.

DOT National Transportation Integrated Search

2017-07-15

1. Introduction a. World-wide Development of High-Speed Rail (Japan, Europe, China) b. High-speed Rail in the U.S. 2. High-Speed Rail Infrastructure a. Geometric Design of High Speed Rail i. Horizontal Curve ii. Vertical Curve iii. Grade and Turnout ...

14 CFR 23.253 - High speed characteristics.

Code of Federal Regulations, 2010 CFR

2010-01-01

... 14 Aeronautics and Space 1 2010-01-01 2010-01-01 false High speed characteristics. 23.253 Section... Requirements § 23.253 High speed characteristics. If a maximum operating speed VMO/MMO is established under § 23.1505(c), the following speed increase and recovery characteristics must be met: (a) Operating...

14 CFR 23.253 - High speed characteristics.

Code of Federal Regulations, 2011 CFR

2011-01-01

... 14 Aeronautics and Space 1 2011-01-01 2011-01-01 false High speed characteristics. 23.253 Section... Requirements § 23.253 High speed characteristics. If a maximum operating speed VMO/MMO is established under § 23.1505(c), the following speed increase and recovery characteristics must be met: (a) Operating...

Aerodynamic Characteristics of Airfoils at High Speeds

NASA Technical Reports Server (NTRS)

Briggs, L J; Hull, G F; Dryden, H L

1925-01-01

This report deals with an experimental investigation of the aerodynamical characteristics of airfoils at high speeds. Lift, drag, and center of pressure measurements were made on six airfoils of the type used by the air service in propeller design, at speeds ranging from 550 to 1,000 feet per second. The results show a definite limit to the speed at which airfoils may efficiently be used to produce lift, the lift coefficient decreasing and the drag coefficient increasing as the speed approaches the speed of sound. The change in lift coefficient is large for thick airfoil sections (camber ratio 0.14 to 0.20) and for high angles of attack. The change is not marked for thin sections (camber ratio 0.10) at low angles of attack, for the speed range employed. At high speeds the center of pressure moves back toward the trailing edge of the airfoil as the speed increases. The results indicate that the use of tip speeds approaching the speed of sound for propellers of customary design involves a serious loss in efficiency.

[Fabrications of a poly (methyl methacrylate) (PMMA) microfluidic chip-based DNA analysis device].

PubMed

Du, Xiao-Guang

2009-12-01

A DNA analysis device based on poly(methyl methacrylate) (PMMA) microfluidic chips was developed. A PMMA chip with cross microchannels was fabricated by a simple hot embossing. Microchannels were modified with a static adsorptive coating method using 2% hydroxyethyl cellulose. A high-voltage power unit, variable in the range 0-1 800 V, was used for on-chip DNA sample injection and gel electrophoretic separation. High speed, high resolution DNA analysis was obtained with the home-built PMMA chip in a sieving matrix containing 2% hydroxyethyl cellulose with a blue intercalating dye, TO-PRO-3 (TP3), by using diode laser induced fluorescence detection based on optical fibers with a 670 nm long-pass filter. The DNA analysis device was applied for the separation of phiX-174/HaeIII DNA digest sample with 11 fragments ranging from 72 to 1 353 bp. A separation efficiency of 1.14 x 10(6) plates/m was obtained for the 603 bp fragments, while the R of 271/281 bp fragments was 1.2. The device was characterized by simple design, low cost for fabrication and operation, reusable PMMA chips, and good reproducibility. A portable microfluidic device for DNA analysis can be developed for clinical diagnosis and disease screening.

Single-chip microcomputer application in high-altitude balloon orientation system

NASA Technical Reports Server (NTRS)

Lim, T. S.; Ehrmann, C. H.; Allison, S. R.

1980-01-01

This paper describes the application of a single-chip microcomputer in a high-altitude balloon instrumentation system. The system, consisting of a magnetometer, a stepping motor, a microcomputer and a gray code shaft encoder, is used to provide an orientation reference to point a scientific instrument at an object in space. The single-chip microcomputer, Intel's 8748, consisting of a CPU, program memory, data memory and I/O ports, is used to control the orientation of the system.

High Voltage Dielectrophoretic and Magnetophoretic Hybrid Integrated Circuit / Microfluidic Chip.

PubMed

Issadore, David; Franke, Thomas; Brown, Keith A; Hunt, Thomas P; Westervelt, Robert M

2009-12-01

A hybrid integrated circuit (IC) / microfluidic chip is presented that independently and simultaneously traps and moves microscopic objects suspended in fluid using both electric and magnetic fields. This hybrid chip controls the location of dielectric objects, such as living cells and drops of fluid, on a 60 × 61 array of pixels that are 30 × 38 μm(2) in size, each of which can be individually addressed with a 50 V peak-to-peak, DC to 10 MHz radio frequency voltage. These high voltage pixels produce electric fields above the chip's surface with a magnitude , resulting in strong dielectrophoresis (DEP) forces . Underneath the array of DEP pixels there is a magnetic matrix that consists of two perpendicular sets of 60 metal wires running across the chip. Each wire can be sourced with 120 mA to trap and move magnetically susceptible objects using magnetophoresis (MP). The DEP pixel array and magnetic matrix can be used simultaneously to apply forces to microscopic objects, such as living cells or lipid vesicles, that are tagged with magnetic nanoparticles. The capabilities of the hybrid IC / microfluidic chip demonstrated in this paper provide important building blocks for a platform for biological and chemical applications.

Study on the separation effect of high-speed ultrasonic vibration cutting.

PubMed

Zhang, Xiangyu; Sui, He; Zhang, Deyuan; Jiang, Xinggang

2018-07-01

High-speed ultrasonic vibration cutting (HUVC) has been proven to be significantly effective when turning Ti-6Al-4V alloy in recent researches. Despite of breaking through the cutting speed restriction of the ultrasonic vibration cutting (UVC) method, HUVC can also achieve the reduction of cutting force and the improvements in surface quality and cutting efficiency in the high-speed machining field. These benefits all result from the separation effect that occurs during the HUVC process. Despite the fact that the influences of vibration and cutting parameters have been discussed in previous researches, the separation analysis of HUVC should be conducted in detail in real cutting situations, and the tool geometry parameters should also be considered. In this paper, three situations are investigated in details: (1) cutting without negative transient clearance angle and without tool wear, (2) cutting with negative transient clearance angle and without tool wear, and (3) cutting with tool wear. And then, complete separation state, partial separation state and continuous cutting state are deduced according to real cutting processes. All the analysis about the above situations demonstrate that the tool-workpiece separation will take place only if appropriate cutting parameters, vibration parameters, and tool geometry parameters are set up. The best separation effect was obtained with a low feedrate and a phase shift approaching 180 degrees. Moreover, flank face interference resulted from the negative transient clearance angle and tool wear contributes to an improved separation effect that makes the workpiece and tool separate even at zero phase shift. Finally, axial and radial transient cutting force are firstly obtained to verify the separation effect of HUVC, and the cutting chips are collected to weigh the influence of flank face interference. Copyright © 2018 Elsevier B.V. All rights reserved.

Label-Free Biomedical Imaging Using High-Speed Lock-In Pixel Sensor for Stimulated Raman Scattering.

PubMed

Mars, Kamel; Lioe, De Xing; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

2017-11-09

Raman imaging eliminates the need for staining procedures, providing label-free imaging to study biological samples. Recent developments in stimulated Raman scattering (SRS) have achieved fast acquisition speed and hyperspectral imaging. However, there has been a problem of lack of detectors suitable for MHz modulation rate parallel detection, detecting multiple small SRS signals while eliminating extremely strong offset due to direct laser light. In this paper, we present a complementary metal-oxide semiconductor (CMOS) image sensor using high-speed lock-in pixels for stimulated Raman scattering that is capable of obtaining the difference of Stokes-on and Stokes-off signal at modulation frequency of 20 MHz in the pixel before reading out. The generated small SRS signal is extracted and amplified in a pixel using a high-speed and large area lateral electric field charge modulator (LEFM) employing two-step ion implantation and an in-pixel pair of low-pass filter, a sample and hold circuit and a switched capacitor integrator using a fully differential amplifier. A prototype chip is fabricated using 0.11 μm CMOS image sensor technology process. SRS spectra and images of stearic acid and 3T3-L1 samples are successfully obtained. The outcomes suggest that hyperspectral and multi-focus SRS imaging at video rate is viable after slight modifications to the pixel architecture and the acquisition system.

Label-Free Biomedical Imaging Using High-Speed Lock-In Pixel Sensor for Stimulated Raman Scattering

PubMed Central

Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro

2017-01-01

Raman imaging eliminates the need for staining procedures, providing label-free imaging to study biological samples. Recent developments in stimulated Raman scattering (SRS) have achieved fast acquisition speed and hyperspectral imaging. However, there has been a problem of lack of detectors suitable for MHz modulation rate parallel detection, detecting multiple small SRS signals while eliminating extremely strong offset due to direct laser light. In this paper, we present a complementary metal-oxide semiconductor (CMOS) image sensor using high-speed lock-in pixels for stimulated Raman scattering that is capable of obtaining the difference of Stokes-on and Stokes-off signal at modulation frequency of 20 MHz in the pixel before reading out. The generated small SRS signal is extracted and amplified in a pixel using a high-speed and large area lateral electric field charge modulator (LEFM) employing two-step ion implantation and an in-pixel pair of low-pass filter, a sample and hold circuit and a switched capacitor integrator using a fully differential amplifier. A prototype chip is fabricated using 0.11 μm CMOS image sensor technology process. SRS spectra and images of stearic acid and 3T3-L1 samples are successfully obtained. The outcomes suggest that hyperspectral and multi-focus SRS imaging at video rate is viable after slight modifications to the pixel architecture and the acquisition system. PMID:29120358

High-Speed Photography

DOE Office of Scientific and Technical Information (OSTI.GOV)

Paisley, D.L.; Schelev, M.Y.

1998-08-01

The applications of high-speed photography to a diverse set of subjects including inertial confinement fusion, laser surgical procedures, communications, automotive airbags, lightning etc. are briefly discussed. (AIP) {copyright} {ital 1998 Society of Photo-Optical Instrumentation Engineers.}

Communications for High Speed Ground Transportation

DOT National Transportation Integrated Search

1971-11-15

This report is an account of investigations and analyses undertaken for the Office of High Speed Ground Transportation (OHSGT), beginning in July of 1970, which relate to communications systems for high speed ground vehicles. The authorized scope of ...

SEAL FOR HIGH SPEED CENTRIFUGE

DOEpatents

Skarstrom, C.W.

1957-12-17

A seal is described for a high speed centrifuge wherein the centrifugal force of rotation acts on the gasket to form a tight seal. The cylindrical rotating bowl of the centrifuge contains a closure member resting on a shoulder in the bowl wall having a lower surface containing bands of gasket material, parallel and adjacent to the cylinder wall. As the centrifuge speed increases, centrifugal force acts on the bands of gasket material forcing them in to a sealing contact against the cylinder wall. This arrangememt forms a simple and effective seal for high speed centrifuges, replacing more costly methods such as welding a closure in place.

High-Speed Data Recorder for Space, Geodesy, and Other High-Speed Recording Applications

NASA Technical Reports Server (NTRS)

Taveniku, Mikael

2013-01-01

A high-speed data recorder and replay equipment has been developed for reliable high-data-rate recording to disk media. It solves problems with slow or faulty disks, multiple disk insertions, high-altitude operation, reliable performance using COTS hardware, and long-term maintenance and upgrade path challenges. The current generation data recor - ders used within the VLBI community are aging, special-purpose machines that are both slow (do not meet today's requirements) and are very expensive to maintain and operate. Furthermore, they are not easily upgraded to take advantage of commercial technology development, and are not scalable to multiple 10s of Gbit/s data rates required by new applications. The innovation provides a softwaredefined, high-speed data recorder that is scalable with technology advances in the commercial space. It maximally utilizes current technologies without being locked to a particular hardware platform. The innovation also provides a cost-effective way of streaming large amounts of data from sensors to disk, enabling many applications to store raw sensor data and perform post and signal processing offline. This recording system will be applicable to many applications needing realworld, high-speed data collection, including electronic warfare, softwaredefined radar, signal history storage of multispectral sensors, development of autonomous vehicles, and more.

High-speed texture measurement of pavements.

DOT National Transportation Integrated Search

2003-01-01

This study was conducted to validate high-speed texture measuring equipment for use in highway applications. The evaluation included two high-speed systems and a new static referencing device. Tests were conducted on 22 runway and taxiway test sectio...

Nonvolatile memory chips: critical technology for high-performance recce systems

NASA Astrophysics Data System (ADS)

Kaufman, Bruce

2000-11-01

Airborne recce systems universally require nonvolatile storage of recorded data. Both present and next generation designs make use of flash memory chips. Flash memory devices are in high volume use for a variety of commercial products ranging form cellular phones to digital cameras. Fortunately, commercial applications call for increasing capacities and fast write times. These parameters are important to the designer of recce recorders. Of economic necessity COTS devices are used in recorders that must perform in military avionics environments. Concurrently, recording rates are moving to $GTR10Gb/S. Thus to capture imagery for even a few minutes of record time, tactically meaningful solid state recorders will require storage capacities in the 100s of Gbytes. Even with memory chip densities at present day 512Mb, such capacities require thousands of chips. The demands on packaging technology are daunting. This paper will consider the differing flash chip architectures, both available and projected and discuss the impact on recorder architecture and performance. Emerging nonvolatile memory technologies, FeRAM AND MIRAM will be reviewed with regard to their potential use in recce recorders.

High speed imaging - An important industrial tool

NASA Technical Reports Server (NTRS)

Moore, Alton; Pinelli, Thomas E.

1986-01-01

High-speed photography, which is a rapid sequence of photographs that allow an event to be analyzed through the stoppage of motion or the production of slow-motion effects, is examined. In high-speed photography 16, 35, and 70 mm film and framing rates between 64-12,000 frames per second are utilized to measure such factors as angles, velocities, failure points, and deflections. The use of dual timing lamps in high-speed photography and the difficulties encountered with exposure and programming the camera and event are discussed. The application of video cameras to the recording of high-speed events is described.

Cleveland-Columbus-Cincinnati high-speed rail study

DOT National Transportation Integrated Search

2001-07-01

In the past five years, the evaluation of different high-speed rail (HSR) studies in the Midwest has resulted in a realization that high speed rail, with speeds greater than 110 miles per hour, is too expensive in the short term to be implemented in ...

Single-Chip Microcomputer Control Of The PWM Inverter

NASA Astrophysics Data System (ADS)

Morimoto, Masayuki; Sato, Shinji; Sumito, Kiyotaka; Oshitani, Katsumi

1987-10-01

A single-chip microcomputer-based con-troller for a pulsewidth modulated 1.7 KVA inverter of an airconditioner is presented. The PWM pattern generation and the system control of the airconditioner are achieved by software of the 8-bit single-chip micro-computer. The single-chip microcomputer has the disadvantages of low processing speed and small memory capacity which can be overcome by the magnetic flux control method. The PWM pattern is generated every 90 psec. The memory capacity of the PWM look-up table is less than 2 kbytes. The simple and reliable control is realized by the software-based implementation.

Development of a high-throughput Candida albicans biofilm chip.

PubMed

Srinivasan, Anand; Uppuluri, Priya; Lopez-Ribot, Jose; Ramasubramanian, Anand K

2011-04-22

We have developed a high-density microarray platform consisting of nano-biofilms of Candida albicans. A robotic microarrayer was used to print yeast cells of C. albicans encapsulated in a collagen matrix at a volume as low as 50 nL onto surface-modified microscope slides. Upon incubation, the cells grow into fully formed "nano-biofilms". The morphological and architectural complexity of these biofilms were evaluated by scanning electron and confocal scanning laser microscopy. The extent of biofilm formation was determined using a microarray scanner from changes in fluorescence intensities due to FUN 1 metabolic processing. This staining technique was also adapted for antifungal susceptibility testing, which demonstrated that, similar to regular biofilms, cells within the on-chip biofilms displayed elevated levels of resistance against antifungal agents (fluconazole and amphotericin B). Thus, results from structural analyses and antifungal susceptibility testing indicated that despite miniaturization, these biofilms display the typical phenotypic properties associated with the biofilm mode of growth. In its final format, the C. albicans biofilm chip (CaBChip) is composed of 768 equivalent and spatially distinct nano-biofilms on a single slide; multiple chips can be printed and processed simultaneously. Compared to current methods for the formation of microbial biofilms, namely the 96-well microtiter plate model, this fungal biofilm chip has advantages in terms of miniaturization and automation, which combine to cut reagent use and analysis time, minimize labor intensive steps, and dramatically reduce assay costs. Such a chip should accelerate the antifungal drug discovery process by enabling rapid, convenient and inexpensive screening of hundreds-to-thousands of compounds simultaneously.

Differences in energy expenditure during high-speed versus standard-speed yoga: A randomized sequence crossover trial.

PubMed

Potiaumpai, Melanie; Martins, Maria Carolina Massoni; Rodriguez, Roberto; Mooney, Kiersten; Signorile, Joseph F

2016-12-01

To compare energy expenditure and volume of oxygen consumption and carbon dioxide production during a high-speed yoga and a standard-speed yoga program. Randomized repeated measures controlled trial. A laboratory of neuromuscular research and active aging. Sun-Salutation B was performed, for eight minutes, at a high speed versus and a standard-speed separately while oxygen consumption was recorded. Caloric expenditure was calculated using volume of oxygen consumption and carbon dioxide production. Difference in energy expenditure (kcal) of HSY and SSY. Significant differences were observed in energy expenditure between yoga speeds with high-speed yoga producing significantly higher energy expenditure than standard-speed yoga (MD=18.55, SE=1.86, p<0.01). Significant differences were also seen between high-speed and standard-speed yoga for volume of oxygen consumed and carbon dioxide produced. High-speed yoga results in a significantly greater caloric expenditure than standard-speed yoga. High-speed yoga may be an effective alternative program for those targeting cardiometabolic markers. Copyright © 2016 Elsevier Ltd. All rights reserved.

Using a High-Speed Camera to Measure the Speed of Sound

ERIC Educational Resources Information Center

Hack, William Nathan; Baird, William H.

2012-01-01

The speed of sound is a physical property that can be measured easily in the lab. However, finding an inexpensive and intuitive way for students to determine this speed has been more involved. The introduction of affordable consumer-grade high-speed cameras (such as the Exilim EX-FC100) makes conceptually simple experiments feasible. Since the…

Gated high speed optical detector

NASA Technical Reports Server (NTRS)

Green, S. I.; Carson, L. M.; Neal, G. W.

1973-01-01

The design, fabrication, and test of two gated, high speed optical detectors for use in high speed digital laser communication links are discussed. The optical detectors used a dynamic crossed field photomultiplier and electronics including dc bias and RF drive circuits, automatic remote synchronization circuits, automatic gain control circuits, and threshold detection circuits. The equipment is used to detect binary encoded signals from a mode locked neodynium laser.

On chip cryo-anesthesia of Drosophila larvae for high resolution in vivo imaging applications.

PubMed

Chaudhury, Amrita Ray; Insolera, Ryan; Hwang, Ran-Der; Fridell, Yih-Woei; Collins, Catherine; Chronis, Nikos

2017-06-27

We present a microfluidic chip for immobilizing Drosophila melanogaster larvae for high resolution in vivo imaging. The chip creates a low-temperature micro-environment that anaesthetizes and immobilizes the larva in under 3 minutes. We characterized the temperature distribution within the chip and analyzed the resulting larval body movement using high resolution fluorescence imaging. Our results indicate that the proposed method minimizes submicron movements of internal organs and tissue without affecting the larva physiology. It can be used to continuously immobilize larvae for short periods of time (minutes) or for longer periods (several hours) if used intermittently. The same chip can be used to accommodate and immobilize arvae across all developmental stages (1st instar to late 3rd instar), and loading larvae onto the chip does not require any specialized skills. To demonstrate the usability of the chip, we observed mitochondrial trafficking in neurons from the cell bodies to the axon terminals along with mitochondrial fusion and neuro-synaptic growth through time in intact larvae. Besides studying sub-cellular processes and cellular development, we envision the use of on chip cryo-anesthesia in a wide variety of biological in vivo imaging applications, including observing organ development of the salivary glands, fat bodies and body-wall muscles.

33 CFR 84.24 - High-speed craft.

Code of Federal Regulations, 2011 CFR

2011-07-01

... 33 Navigation and Navigable Waters 1 2011-07-01 2011-07-01 false High-speed craft. 84.24 Section... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at a...

33 CFR 84.24 - High-speed craft.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 33 Navigation and Navigable Waters 1 2010-07-01 2010-07-01 false High-speed craft. 84.24 Section... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at a...

14 CFR 25.253 - High-speed characteristics.

Code of Federal Regulations, 2010 CFR

2010-01-01

... 14 Aeronautics and Space 1 2010-01-01 2010-01-01 false High-speed characteristics. 25.253 Section...-speed characteristics. (a) Speed increase and recovery characteristics. The following speed increase and... inadvertent speed increases (including upsets in pitch and roll) must be simulated with the airplane trimmed...

14 CFR 25.253 - High-speed characteristics.

Code of Federal Regulations, 2011 CFR

2011-01-01

... 14 Aeronautics and Space 1 2011-01-01 2011-01-01 false High-speed characteristics. 25.253 Section...-speed characteristics. (a) Speed increase and recovery characteristics. The following speed increase and... inadvertent speed increases (including upsets in pitch and roll) must be simulated with the airplane trimmed...

Reducing Heating In High-Speed Cinematography

NASA Technical Reports Server (NTRS)

Slater, Howard A.

1989-01-01

Infrared-absorbing and infrared-reflecting glass filters simple and effective means for reducing rise in temperature during high-speed motion-picture photography. "Hot-mirror" and "cold-mirror" configurations, employed in projection of images, helps prevent excessive heating of scenes by powerful lamps used in high-speed photography.

Traceability validation of a high speed short-pulse testing method used in LED production

NASA Astrophysics Data System (ADS)

Revtova, Elena; Vuelban, Edgar Moreno; Zhao, Dongsheng; Brenkman, Jacques; Ulden, Henk

2017-12-01

Industrial processes of LED (light-emitting diode) production include LED light output performance testing. Most of them are monitored and controlled by optically, electrically and thermally measuring LEDs by high speed short-pulse measurement methods. However, these are not standardized and a lot of information is proprietary that it is impossible for third parties, such as NMIs, to trace and validate. It is known, that these techniques have traceability issue and metrological inadequacies. Often due to these, the claimed performance specifications of LEDs are overstated, which consequently results to manufacturers experiencing customers' dissatisfaction and a large percentage of failures in daily use of LEDs. In this research a traceable setup is developed to validate one of the high speed testing techniques, investigate inadequacies and work out the traceability issues. A well-characterised short square pulse of 25 ms is applied to chip-on-board (CoB) LED modules to investigate the light output and colour content. We conclude that the short-pulse method is very efficient in case a well-defined electrical current pulse is applied and the stabilization time of the device is "a priori" accurately determined. No colour shift is observed. The largest contributors to the measurement uncertainty include badly-defined current pulse and inaccurate calibration factor.

The Effect of Cutting Speed in Metallic Glass Grinding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Serbest, Erdinc; Bakkal, Mustafa; Karipcin, Ilker

2011-01-17

In this paper, the effects of the cutting speed in metallic glass grinding were investigated in dry conditions. The results showed that grinding forces decrease as grinding energy increase with the increasing cutting speeds. The present investigations on ground surface and grinding chips morphologies -shows that material removal and surface formation of the BMG are mainly due to the ductile chip deformation and ploughing as well as brittle fracture of some particles from the edges of the tracks. The roughness values obtained with the Cubic Boron Nitride wheels are acceptable for the grinding operation.

High-power and brightness laser diode modules using new DBR chips

NASA Astrophysics Data System (ADS)

Yu, Hao; Riva, Martina; Rossi, Giammarco; Braglia, Andrea; Perrone, Guido

2018-02-01

The paper reports on the design, manufacturing and preliminary characterization of a new family of compact and high beam quality multi-emitter laser diode modules capable of delivering up to over 400W in a 135/0.15 fiber. The layout exploits a proprietary architecture and is based on innovative narrow linewidth high-power DBR chips, properly combined through spatial, polarization and wavelength multiplexing. The intrinsic wavelength-stabilization of these DBR chips allows the use of the developed modules not only for direct-diode material processing but also in pump sources for ytterbium-doped fiber lasers without the need of external stabilization devices.

Electromechanical Displacement Detection With an On-Chip High Electron Mobility Transistor Amplifier

NASA Astrophysics Data System (ADS)

Oda, Yasuhiko; Onomitsu, Koji; Kometani, Reo; Warisawa, Shin-ichi; Ishihara, Sunao; Yamaguchi, Hiroshi

2011-06-01

We developed a highly sensitive displacement detection scheme for a GaAs-based electromechanical resonator using an integrated high electron mobility transistor (HEMT). Piezoelectric voltage generated by the vibration of the resonator is applied to the gate of the HEMT, resulting in the on-chip amplification of the signal voltage. This detection scheme achieves a displacement sensitivity of ˜9 pm·Hz-1/2, which is one of the highest among on-chip purely electrical displacement detection schemes at room temperature.

Research on Optical Transmitter and Receiver Module Used for High-Speed Interconnection between CPU and Memory

NASA Astrophysics Data System (ADS)

He, Huimin; Liu, Fengman; Li, Baoxia; Xue, Haiyun; Wang, Haidong; Qiu, Delong; Zhou, Yunyan; Cao, Liqiang

2016-11-01

With the development of the multicore processor, the bandwidth and capacity of the memory, rather than the memory area, are the key factors in server performance. At present, however, the new architectures, such as fully buffered DIMM (FBDIMM), hybrid memory cube (HMC), and high bandwidth memory (HBM), cannot be commercially applied in the server. Therefore, a new architecture for the server is proposed. CPU and memory are separated onto different boards, and optical interconnection is used for the communication between them. Each optical module corresponds to each dual inline memory module (DIMM) with 64 channels. Compared to the previous technology, not only can the architecture realize high-capacity and wide-bandwidth memory, it also can reduce power consumption and cost, and be compatible with the existing dynamic random access memory (DRAM). In this article, the proposed module with system-in-package (SiP) integration is demonstrated. In the optical module, the silicon photonic chip is included, which is a promising technology to be applied in the next-generation data exchanging centers. And due to the bandwidth-distance performance of the optical interconnection, SerDes chips are introduced to convert the 64-bit data at 800 Mbps from/to 4-channel data at 12.8 Gbps after/before they are transmitted though optical fiber. All the devices are packaged on cheap organic substrates. To ensure the performance of the whole system, several optimization efforts have been performed on the two modules. High-speed interconnection traces have been designed and simulated with electromagnetic simulation software. Steady-state thermal characteristics of the transceiver module have been evaluated by ANSYS APLD based on finite-element methodology (FEM). Heat sinks are placed at the hotspot area to ensure the reliability of all working chips. Finally, this transceiver system based on silicon photonics is measured, and the eye diagrams of data and clock signals are verified.

Microfluidic cell chips for high-throughput drug screening

PubMed Central

Chi, Chun-Wei; Ahmed, AH Rezwanuddin; Dereli-Korkut, Zeynep; Wang, Sihong

2016-01-01

The current state of screening methods for drug discovery is still riddled with several inefficiencies. Although some widely used high-throughput screening platforms may enhance the drug screening process, their cost and oversimplification of cell–drug interactions pose a translational difficulty. Microfluidic cell-chips resolve many issues found in conventional HTS technology, providing benefits such as reduced sample quantity and integration of 3D cell culture physically more representative of the physiological/pathological microenvironment. In this review, we introduce the advantages of microfluidic devices in drug screening, and outline the critical factors which influence device design, highlighting recent innovations and advances in the field including a summary of commercialization efforts on microfluidic cell chips. Future perspectives of microfluidic cell devices are also provided based on considerations of present technological limitations and translational barriers. PMID:27071838

Research on single-chip microcomputer controlled rotating magnetic field mineralization model

NASA Astrophysics Data System (ADS)

Li, Yang; Qi, Yulin; Yang, Junxiao; Li, Na

2017-08-01

As one of the method of selecting ore, the magnetic separation method has the advantages of stable operation, simple process flow, high beneficiation efficiency and no chemical environment pollution. But the existing magnetic separator are more mechanical, the operation is not flexible, and can not change the magnetic field parameters according to the precision of the ore needed. Based on the existing magnetic separator is mechanical, the rotating magnetic field can be used for single chip microcomputer control as the research object, design and trial a rotating magnetic field processing prototype, and through the single-chip PWM pulse output to control the rotation of the magnetic field strength and rotating magnetic field speed. This method of using pure software to generate PWM pulse to control rotary magnetic field beneficiation, with higher flexibility, accuracy and lower cost, can give full play to the performance of single-chip.

New concept high-speed and high-resolution color scanner

NASA Astrophysics Data System (ADS)

Nakashima, Keisuke; Shinoda, Shin'ichi; Konishi, Yoshiharu; Sugiyama, Kenji; Hori, Tetsuya

2003-05-01

We have developed a new concept high-speed and high-resolution color scanner (Blinkscan) using digital camera technology. With our most advanced sub-pixel image processing technology, approximately 12 million pixel image data can be captured. High resolution imaging capability allows various uses such as OCR, color document read, and document camera. The scan time is only about 3 seconds for a letter size sheet. Blinkscan scans documents placed "face up" on its scan stage and without any special illumination lights. Using Blinkscan, a high-resolution color document can be easily inputted into a PC at high speed, a paperless system can be built easily. It is small, and since the occupancy area is also small, setting it on an individual desk is possible. Blinkscan offers the usability of a digital camera and accuracy of a flatbed scanner with high-speed processing. Now, about several hundred of Blinkscan are mainly shipping for the receptionist operation in a bank and a security. We will show the high-speed and high-resolution architecture of Blinkscan. Comparing operation-time with conventional image capture device, the advantage of Blinkscan will make clear. And image evaluation for variety of environment, such as geometric distortions or non-uniformity of brightness, will be made.

Management Requirements of the 3COM Ethernet Local Area Network

DTIC Science & Technology

1988-09-01

Management Information System . With the introduction of new technology comes the requirement to administer the network. This paper describes LAN services available on the network, management philosophies for the LAN services, and areas of LAN administration considered important to the successful operation and maintenance of a LAN. LAN administration problems identified by users are also addressed. Keywords included; Local area network (LAN); Lan management; Lan administration; 3COM ETHERNET LAN.

Chicago-St. Louis high speed rail plan

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stead, M.E.

1994-12-31

The Illinois Department of Transportation (IDOT), in cooperation with Amtrak, undertook the Chicago-St. Louis High Speed Rail Financial and Implementation Plan study in order to develop a realistic and achievable blueprint for implementation of high speed rail in the Chicago-St. Louis corridor. This report presents a summary of the Price Waterhouse Project Team`s analysis and the Financial and Implementation Plan for implementing high speed rail service in the Chicago-St. Louis corridor.

High speed multiphoton imaging

NASA Astrophysics Data System (ADS)

Li, Yongxiao; Brustle, Anne; Gautam, Vini; Cockburn, Ian; Gillespie, Cathy; Gaus, Katharina; Lee, Woei Ming

2016-12-01

Intravital multiphoton microscopy has emerged as a powerful technique to visualize cellular processes in-vivo. Real time processes revealed through live imaging provided many opportunities to capture cellular activities in living animals. The typical parameters that determine the performance of multiphoton microscopy are speed, field of view, 3D imaging and imaging depth; many of these are important to achieving data from in-vivo. Here, we provide a full exposition of the flexible polygon mirror based high speed laser scanning multiphoton imaging system, PCI-6110 card (National Instruments) and high speed analog frame grabber card (Matrox Solios eA/XA), which allows for rapid adjustments between frame rates i.e. 5 Hz to 50 Hz with 512 × 512 pixels. Furthermore, a motion correction algorithm is also used to mitigate motion artifacts. A customized control software called Pscan 1.0 is developed for the system. This is then followed by calibration of the imaging performance of the system and a series of quantitative in-vitro and in-vivo imaging in neuronal tissues and mice.

Development of Neuromorphic Sift Operator with Application to High Speed Image Matching

NASA Astrophysics Data System (ADS)

Shankayi, M.; Saadatseresht, M.; Bitetto, M. A. V.

2015-12-01

There was always a speed/accuracy challenge in photogrammetric mapping process, including feature detection and matching. Most of the researches have improved algorithm's speed with simplifications or software modifications which increase the accuracy of the image matching process. This research tries to improve speed without enhancing the accuracy of the same algorithm using Neuromorphic techniques. In this research we have developed a general design of a Neuromorphic ASIC to handle algorithms such as SIFT. We also have investigated neural assignment in each step of the SIFT algorithm. With a rough estimation based on delay of the used elements including MAC and comparator, we have estimated the resulting chip's performance for 3 scenarios, Full HD movie (Videogrammetry), 24 MP (UAV photogrammetry), and 88 MP image sequence. Our estimations led to approximate 3000 fps for Full HD movie, 250 fps for 24 MP image sequence and 68 fps for 88MP Ultracam image sequence which can be a huge improvement for current photogrammetric processing systems. We also estimated the power consumption of less than10 watts which is not comparable to current workflows.

Lubrication and cooling for high speed gears

NASA Technical Reports Server (NTRS)

Townsend, D. P.

1985-01-01

The problems and failures occurring with the operation of high speed gears are discussed. The gearing losses associated with high speed gearing such as tooth mesh friction, bearing friction, churning, and windage are discussed with various ways shown to help reduce these losses and thereby improve efficiency. Several different methods of oil jet lubrication for high speed gearing are given such as into mesh, out of mesh, and radial jet lubrication. The experiments and analytical results for the various methods of oil jet lubrication are shown with the strengths and weaknesses of each method discussed. The analytical and experimental results of gear lubrication and cooling at various test conditions are presented. These results show the very definite need of improved methods of gear cooling at high speed and high load conditions.

The use of high-speed imaging in education

NASA Astrophysics Data System (ADS)

Kleine, H.; McNamara, G.; Rayner, J.

2017-02-01

Recent improvements in camera technology and the associated improved access to high-speed camera equipment have made it possible to use high-speed imaging not only in a research environment but also specifically for educational purposes. This includes high-speed sequences that are created both with and for a target audience of students in high schools and universities. The primary goal is to engage students in scientific exploration by providing them with a tool that allows them to see and measure otherwise inaccessible phenomena. High-speed imaging has the potential to stimulate students' curiosity as the results are often surprising or may contradict initial assumptions. "Live" demonstrations in class or student- run experiments are highly suitable to have a profound influence on student learning. Another aspect is the production of high-speed images for demonstration purposes. While some of the approaches known from the application of high speed imaging in a research environment can simply be transferred, additional techniques must often be developed to make the results more easily accessible for the targeted audience. This paper describes a range of student-centered activities that can be undertaken which demonstrate how student engagement and learning can be enhanced through the use of high speed imaging using readily available technologies.

High Speed Vortex Flows

NASA Technical Reports Server (NTRS)

Wood, Richard M.; Wilcox, Floyd J., Jr.; Bauer, Steven X. S.; Allen, Jerry M.

2000-01-01

A review of the research conducted at the National Aeronautics and Space Administration (NASA), Langley Research Center (LaRC) into high-speed vortex flows during the 1970s, 1980s, and 1990s is presented. The data reviewed is for flat plates, cavities, bodies, missiles, wings, and aircraft. These data are presented and discussed relative to the design of future vehicles. Also presented is a brief historical review of the extensive body of high-speed vortex flow research from the 1940s to the present in order to provide perspective of the NASA LaRC's high-speed research results. Data are presented which show the types of vortex structures which occur at supersonic speeds and the impact of these flow structures to vehicle performance and control is discussed. The data presented shows the presence of both small- and large scale vortex structures for a variety of vehicles, from missiles to transports. For cavities, the data show very complex multiple vortex structures exist at all combinations of cavity depth to length ratios and Mach number. The data for missiles show the existence of very strong interference effects between body and/or fin vortices and the downstream fins. It was shown that these vortex flow interference effects could be both positive and negative. Data are shown which highlights the effect that leading-edge sweep, leading-edge bluntness, wing thickness, location of maximum thickness, and camber has on the aerodynamics of and flow over delta wings. The observed flow fields for delta wings (i.e. separation bubble, classical vortex, vortex with shock, etc.) are discussed in the context of' aircraft design. And data have been shown that indicate that aerodynamic performance improvements are available by considering vortex flows as a primary design feature. Finally a discussing of a design approach for wings which utilize vortex flows for improved aerodynamic performance at supersonic speed is presented.

Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

PubMed

Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

2018-04-01

Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

High speed ultra-broadband amplitude modulators with ultrahigh extinction >65 dB.

PubMed

Liu, S; Cai, H; DeRose, C T; Davids, P; Pomerene, A; Starbuck, A L; Trotter, D C; Camacho, R; Urayama, J; Lentine, A

2017-05-15

We experimentally demonstrate ultrahigh extinction ratio (>65 dB) amplitude modulators (AMs) that can be electrically tuned to operate across a broad spectral range of 160 nm from 1480 - 1640 nm and 95 nm from 1280 - 1375 nm. Our on-chip AMs employ one extra coupler compared with conventional Mach-Zehnder interferometers (MZI), thus form a cascaded MZI (CMZI) structure. Either directional or adiabatic couplers are used to compose the CMZI AMs and experimental comparisons are made between these two different structures. We investigate the performance of CMZI AMs under extreme conditions such as using 95:5 split ratio couplers and unbalanced waveguide losses. Electro-optic phase shifters are also integrated in the CMZI AMs for high-speed operation. Finally, we investigate the output optical phase when the amplitude is modulated, which provides us valuable information when both amplitude and phase are to be controlled. Our demonstration not only paves the road to applications such as quantum information processing that requires high extinction ratio AMs but also significantly alleviates the tight fabrication tolerance needed for large-scale integrated photonics.

High-Speed Photography with Computer Control.

ERIC Educational Resources Information Center

Winters, Loren M.

1991-01-01

Describes the use of a microcomputer as an intervalometer for the control and timing of several flash units to photograph high-speed events. Applies this technology to study the oscillations of a stretched rubber band, the deceleration of high-speed projectiles in water, the splashes of milk drops, and the bursts of popcorn kernels. (MDH)

High-speed civil transport study

NASA Technical Reports Server (NTRS)

1989-01-01

A system study of the potential for a high-speed commercial transport has addressed technological, economic, and environmental constraints. Market projections indicate a need for fleets of transports with supersonic or greater cruise speeds by the year 2000 to 2005. The associated design requirements called for a vehicle to carry 250 to 300 passengers over a range of 5,000 to 6,000 nautical miles. The study was initially unconstrained in terms of vehicle characteristic, such as cruise speed, propulsion systems, fuels, or structural materials. Analyses led to a focus on the most promising vehicle concepts. These were concepts that used a kerosene-type fuel and cruised at Mach numbers between 2.0 to 3.2. Further systems study identified the impact of environmental constraints (for community noise, sonic boom, and engine emissions) on economic attractiveness and technological needs. Results showed that current technology cannot produce a viable high-speed civil transport; significant advances are required to reduce takeoff gross weight and allow for both economic attractiveness and environmental accepatability. Specific technological requirements were identified to meet these needs.

Chromatically encoded high-speed photography of cavitation bubble dynamics inside inhomogeneous ophthalmic tissue

NASA Astrophysics Data System (ADS)

Tinne, N.; Matthias, B.; Kranert, F.; Wetzel, C.; Krüger, A.; Ripken, T.

2016-03-01

The interaction effect of photodisruption, which is used for dissection of biological tissue with fs-laser pulses, has been intensively studied inside water as prevalent sample medium. In this case, the single effect is highly reproducible and, hence, the method of time-resolved photography is sufficiently applicable. In contrast, the reproducibility significantly decreases analyzing more solid and anisotropic media like biological tissue. Therefore, a high-speed photographic approach is necessary in this case. The presented study introduces a novel technique for high-speed photography based on the principle of chromatic encoding. For illumination of the region of interest within the sample medium, the light paths of up to 12 LEDs with various emission wavelengths are overlaid via optical filters. Here, MOSFET-electronics provide a LED flash with a duration <100 ns; the diodes are externally triggered with a distinct delay for every LED. Furthermore, the different illumination wavelengths are chromatically separated again for detection via camera chip. Thus, the experimental setup enables the generation of a time-sequence of <= 12 images of a single cavitation bubble dynamics. In comparison to conventional time-resolved photography, images in sample media like water and HEMA show the significant advantages of this novel illumination technique. In conclusion, the results of this study are of great importance for the fundamental evaluation of the laser-tissue interaction inside anisotropic biological tissue and for the optimization of the surgical process with high-repetition rate fs-lasers. Additionally, this application is also suitable for the investigation of other microscopic, ultra-fast events in transparent inhomogeneous materials.

Mechanisms and FEM Simulation of Chip Formation in Orthogonal Cutting In-Situ TiB₂/7050Al MMC.

PubMed

Xiong, Yifeng; Wang, Wenhu; Jiang, Ruisong; Lin, Kunyang; Shao, Mingwei

2018-04-15

The in-situ TiB₂/7050Al composite is a new kind of Al-based metal matrix composite (MMC) with super properties, such as low density, improved strength, and wear resistance. This paper, for a deep insight into its cutting performance, involves a study of the chip formation process and finite element simulation during orthogonal cutting in-situ TiB₂/7050Al MMC. With chips, material properties, cutting forces, and tool geometry parameters, the Johnson-Cook (J-C) constitutive equation of in-situ TiB₂/7050Al composite was established. Then, the cutting simulation model was established by applying the Abaqus-Explicit method, and the serrated chip, shear plane, strain rate, and temperature were analyzed. The experimental and simulation results showed that the obtained material's constitutive equation was of high reliability, and the saw-tooth chips occurred commonly under either low or high cutting speed and small or large feed rate. From result analysis, it was found that the mechanisms of chip formation included plastic deformation, adiabatic shear, shearing slip, and crack extension. In addition, it was found that the existence of small, hard particles reduced the ductility of the MMC and resulted in segmental chips.

Highly sensitive bacterial susceptibility test against penicillin using parylene-matrix chip.

PubMed

Park, Jong-Min; Kim, Jo-Il; Song, Hyun-Woo; Noh, Joo-Yoon; Kang, Min-Jung; Pyun, Jae-Chul

2015-09-15

This work presented a highly sensitive bacterial antibiotic susceptibility test through β-lactamase assay using Parylene-matrix chip. β-lactamases (EC 3.5.2.6) are an important family of enzymes that confer resistance to β-lactam antibiotics by catalyzing the hydrolysis of these antibiotics. Here we present a highly sensitive assay to quantitate β-lactamase-mediated hydrolysis of penicillin into penicilloic acid. Typically, MALDI-TOF mass spectrometry has been used to quantitate low molecular weight analytes and to discriminate them from noise peaks of matrix fragments that occur at low m/z ratios (m/z<500). The β-lactamase assay for the Escherichia coli antibiotic susceptibility test was carried out using Parylene-matrix chip and MALDI-TOF mass spectrometry. The Parylene-matrix chip was successfully used to quantitate penicillin (m/z: [PEN+H](+)=335.1 and [PEN+Na](+)=357.8) and penicilloic acid (m/z: [PA+H](+)=353.1) in a β-lactamase assay with minimal interference of low molecular weight noise peaks. The β-lactamase assay was carried out with an antibiotic-resistant E. coli strain and an antibiotic-susceptible E. coli strain, revealing that the minimum number of E. coli cells required to screen for antibiotic resistance was 1000 cells for the MALDI-TOF mass spectrometry/Parylene-matrix chip assay. Copyright © 2015 Elsevier B.V. All rights reserved.

Aerodynamic design on high-speed trains

NASA Astrophysics Data System (ADS)

Ding, San-San; Li, Qiang; Tian, Ai-Qin; Du, Jian; Liu, Jia-Li

2016-04-01

Compared with the traditional train, the operational speed of the high-speed train has largely improved, and the dynamic environment of the train has changed from one of mechanical domination to one of aerodynamic domination. The aerodynamic problem has become the key technological challenge of high-speed trains and significantly affects the economy, environment, safety, and comfort. In this paper, the relationships among the aerodynamic design principle, aerodynamic performance indexes, and design variables are first studied, and the research methods of train aerodynamics are proposed, including numerical simulation, a reduced-scale test, and a full-scale test. Technological schemes of train aerodynamics involve the optimization design of the streamlined head and the smooth design of the body surface. Optimization design of the streamlined head includes conception design, project design, numerical simulation, and a reduced-scale test. Smooth design of the body surface is mainly used for the key parts, such as electric-current collecting system, wheel truck compartment, and windshield. The aerodynamic design method established in this paper has been successfully applied to various high-speed trains (CRH380A, CRH380AM, CRH6, CRH2G, and the Standard electric multiple unit (EMU)) that have met expected design objectives. The research results can provide an effective guideline for the aerodynamic design of high-speed trains.

NanoTopoChip: High-throughput nanotopographical cell instruction.

PubMed

Hulshof, Frits F B; Zhao, Yiping; Vasilevich, Aliaksei; Beijer, Nick R M; de Boer, Meint; Papenburg, Bernke J; van Blitterswijk, Clemens; Stamatialis, Dimitrios; de Boer, Jan

2017-10-15

Surface topography is able to influence cell phenotype in numerous ways and offers opportunities to manipulate cells and tissues. In this work, we develop the Nano-TopoChip and study the cell instructive effects of nanoscale topographies. A combination of deep UV projection lithography and conventional lithography was used to fabricate a library of more than 1200 different defined nanotopographies. To illustrate the cell instructive effects of nanotopography, actin-RFP labeled U2OS osteosarcoma cells were cultured and imaged on the Nano-TopoChip. Automated image analysis shows that of many cell morphological parameters, cell spreading, cell orientation and actin morphology are mostly affected by the nanotopographies. Additionally, by using modeling, the changes of cell morphological parameters could by predicted by several feature shape parameters such as lateral size and spacing. This work overcomes the technological challenges of fabricating high quality defined nanoscale features on unprecedented large surface areas of a material relevant for tissue culture such as PS and the screening system is able to infer nanotopography - cell morphological parameter relationships. Our screening platform provides opportunities to identify and study the effect of nanotopography with beneficial properties for the culture of various cell types. The nanotopography of biomaterial surfaces can be modified to influence adhering cells with the aim to improve the performance of medical implants and tissue culture substrates. However, the necessary knowledge of the underlying mechanisms remains incomplete. One reason for this is the limited availability of high-resolution nanotopographies on relevant biomaterials, suitable to conduct systematic biological studies. The present study shows the fabrication of a library of nano-sized surface topographies with high fidelity. The potential of this library, called the 'NanoTopoChip' is shown in a proof of principle HTS study which

High Voltage Dielectrophoretic and Magnetophoretic Hybrid Integrated Circuit / Microfluidic Chip

PubMed Central

Issadore, David; Franke, Thomas; Brown, Keith A.; Hunt, Thomas P.; Westervelt, Robert M.

2010-01-01

A hybrid integrated circuit (IC) / microfluidic chip is presented that independently and simultaneously traps and moves microscopic objects suspended in fluid using both electric and magnetic fields. This hybrid chip controls the location of dielectric objects, such as living cells and drops of fluid, on a 60 × 61 array of pixels that are 30 × 38 μm2 in size, each of which can be individually addressed with a 50 V peak-to-peak, DC to 10 MHz radio frequency voltage. These high voltage pixels produce electric fields above the chip’s surface with a magnitude , resulting in strong dielectrophoresis (DEP) forces . Underneath the array of DEP pixels there is a magnetic matrix that consists of two perpendicular sets of 60 metal wires running across the chip. Each wire can be sourced with 120 mA to trap and move magnetically susceptible objects using magnetophoresis (MP). The DEP pixel array and magnetic matrix can be used simultaneously to apply forces to microscopic objects, such as living cells or lipid vesicles, that are tagged with magnetic nanoparticles. The capabilities of the hybrid IC / microfluidic chip demonstrated in this paper provide important building blocks for a platform for biological and chemical applications. PMID:20625468

A 16X16 Discrete Cosine Transform Chip

NASA Astrophysics Data System (ADS)

Sun, M. T.; Chen, T. C.; Gottlieb, A.; Wu, L.; Liou, M. L.

1987-10-01

Among various transform coding techniques for image compression the Discrete Cosine Transform (DCT) is considered to be the most effective method and has been widely used in the laboratory as well as in the market, place. DCT is computationally intensive. For video application at 14.3 MHz sample rate, a direct implementation of a 16x16 DCT requires a throughput, rate of approximately half a billion multiplications per second. In order to reduce the cost of hardware implementation, a single chip DCT implementation is highly desirable. In this paper, the implementation of a 16x16 DCT chip using a concurrent architecture will be presented. The chip is designed for real-time processing of 14.3 MHz sampled video data. It uses row-column decomposition to implement the two-dimensional transform. Distributed arithmetic combined with hit-serial and hit-parallel structures is used to implement the required vector inner products concurrently. Several schemes are utilized to reduce the size of required memory. The resultant circuit only uses memory, shift registers, and adders. No multipliers are required. It achieves high speed performance with a very regular and efficient integrated circuit realization. The chip accepts 0-bit input and produces 14-bit DCT coefficients. 12 bits are maintained after the first one-dimensional transform. The circuit has been laid out using a 2-μm CMOS technology with a symbolic design tool MULGA. The core contains approximately 73,000 transistors in an area of 7.2 x 7.0

Cheetah: A high frame rate, high resolution SWIR image camera

NASA Astrophysics Data System (ADS)

Neys, Joel; Bentell, Jonas; O'Grady, Matt; Vermeiren, Jan; Colin, Thierry; Hooylaerts, Peter; Grietens, Bob

2008-10-01

A high resolution, high frame rate InGaAs based image sensor and associated camera has been developed. The sensor and the camera are capable of recording and delivering more than 1700 full 640x512pixel frames per second. The FPA utilizes a low lag CTIA current integrator in each pixel, enabling integration times shorter than one microsecond. On-chip logics allows for four different sub windows to be read out simultaneously at even higher rates. The spectral sensitivity of the FPA is situated in the SWIR range [0.9-1.7 μm] and can be further extended into the Visible and NIR range. The Cheetah camera has max 16 GB of on-board memory to store the acquired images and transfer the data over a Gigabit Ethernet connection to the PC. The camera is also equipped with a full CameralinkTM interface to directly stream the data to a frame grabber or dedicated image processing unit. The Cheetah camera is completely under software control.

An Automatic Baseline Regulation in a Highly Integrated Receiver Chip for JUNO

NASA Astrophysics Data System (ADS)

Muralidharan, P.; Zambanini, A.; Karagounis, M.; Grewing, C.; Liebau, D.; Nielinger, D.; Robens, M.; Kruth, A.; Peters, C.; Parkalian, N.; Yegin, U.; van Waasen, S.

2017-09-01

This paper describes the data processing unit and an automatic baseline regulation of a highly integrated readout chip (Vulcan) for JUNO. The chip collects data continuously at 1 Gsamples/sec. The Primary data processing which is performed in the integrated circuit can aid to reduce the memory and data processing efforts in the subsequent stages. In addition, a baseline regulator compensating a shift in the baseline is described.

76 FR 62431 - Notice of Issuance of Final Determination Concerning Certain Ethernet Switches

Federal Register 2010, 2011, 2012, 2013, 2014

2011-10-07

... importing 7 Series Ethernet switches assembled in China. The switches are designed to interconnect servers... country of origin of Arista's 7048, 7050, 7100, 7124, and 7500 series (``7 Series'') local area network..., packaged, and prepared for shipping. Arista's EOS TM (Extensible Operating System) software is designed to...

High-Pressure Open-Channel On-Chip Electroosmotic Pump for Nanoflow High Performance Liquid Chromatography

PubMed Central

2015-01-01

Here, we construct an open-channel on-chip electroosmotic pump capable of generating pressures up to ∼170 bar and flow rates up to ∼500 nL/min, adequate for high performance liquid chromatographic (HPLC) separations. A great feature of this pump is that a number of its basic pump units can be connected in series to enhance its pumping power; the output pressure is directly proportional to the number of pump units connected. This additive nature is excellent and useful, and no other pumps can work in this fashion. We demonstrate the feasibility of using this pump to perform nanoflow HPLC separations; tryptic digests of bovine serum albumin (BSA), transferrin factor (TF), and human immunoglobulins (IgG) are utilized as exemplary samples. We also compare the performance of our electroosmotic (EO)-driven HPLC with Agilent 1200 HPLC; comparable efficiencies, resolutions, and peak capacities are obtained. Since the pump is based on electroosmosis, it has no moving parts. The common material and process also allow this pump to be integrated with other microfabricated functional components. Development of this high-pressure on-chip pump will have a profound impact on the advancement of lab-on-a-chip devices. PMID:24495233

Ethernet based data logger for gaseous detectors

NASA Astrophysics Data System (ADS)

Swain, S.; Sahu, P. K.; Sahu, S. K.

2018-05-01

A data logger is designed to monitor and record ambient parameters such as temperature, pressure and relative humidity along with gas flow rate as a function of time. These parameters are required for understanding the characteristics of gas-filled detectors such as Gas Electron Multiplier (GEM) and Multi-Wire Proportional Counter (MWPC). The data logger has different microcontrollers and has been interfaced to an ethernet port with a local LCD unit for displaying all measured parameters. In this article, the explanation of the data logger design, hardware, and software description of the master microcontroller and the DAQ system along with LabVIEW interface client program have been presented. We have implemented this device with GEM detector and displayed few preliminary results as a function of above parameters.

Full-frame, high-speed 3D shape and deformation measurements using stereo-digital image correlation and a single color high-speed camera

NASA Astrophysics Data System (ADS)

Yu, Liping; Pan, Bing

2017-08-01

Full-frame, high-speed 3D shape and deformation measurement using stereo-digital image correlation (stereo-DIC) technique and a single high-speed color camera is proposed. With the aid of a skillfully designed pseudo stereo-imaging apparatus, color images of a test object surface, composed of blue and red channel images from two different optical paths, are recorded by a high-speed color CMOS camera. The recorded color images can be separated into red and blue channel sub-images using a simple but effective color crosstalk correction method. These separated blue and red channel sub-images are processed by regular stereo-DIC method to retrieve full-field 3D shape and deformation on the test object surface. Compared with existing two-camera high-speed stereo-DIC or four-mirror-adapter-assisted singe-camera high-speed stereo-DIC, the proposed single-camera high-speed stereo-DIC technique offers prominent advantages of full-frame measurements using a single high-speed camera but without sacrificing its spatial resolution. Two real experiments, including shape measurement of a curved surface and vibration measurement of a Chinese double-side drum, demonstrated the effectiveness and accuracy of the proposed technique.

High Speed Rail (HSR) in the United States

DTIC Science & Technology

2009-12-08

Magnetic Levitation ( Maglev ) ...............................................................................................5 High Speed Rail In...commonly referred to as “ maglev .” 6 Passenger Rail Working Group of the National Surface... maglev train in 2003. Because of the greater costs, and relatively minor benefits,11 of operating at extremely high speeds, the top operating speed

HIGH-SPEED GC/MS FOR AIR ANALYSIS

EPA Science Inventory

High speed or fast gas chromatography (FGC) consists of narrow bandwidth injection into a high-speed carrier gas stream passing through a short column leading to a fast detector. Many attempts have been made to demonstrate FGC, but until recently no practical method for routin...

High-voltage solar-cell chip

NASA Technical Reports Server (NTRS)

Kapoor, V. J.; Valco, G. J.; Skebe, G. G.; Evans, J. C., Jr.

1985-01-01

Integrated circuit technology has been successfully applied to the design and fabrication of 0.5 x 0.5-cm planar multijunction solar-cell chips. Each of these solar cells consisted of six voltage-generating unit cells monolithically connected in series and fabricated on a 75-micron-thick, p-type, single crystal, silicon substrate. A contact photolithic process employing five photomask levels together with a standard microelectronics batch-processing technique were used to construct the solar-cell chip. The open-circuit voltage increased rapidly with increasing illumination up to 5 AM1 suns where it began to saturate at the sum of the individual unit-cell voltages at a maximum of 3.0 V. A short-circuit current density per unit cell of 240 mA/sq cm was observed at 10 AM1 suns.

High-speed RNA microextraction technology using magnetic oligo-dT beads and lateral magnetophoresis.

PubMed

Lee, Hwanyong; Jung, Jinhee; Han, Song-I; Han, Ki-Ho

2010-10-21

This paper presents a high-speed RNA microextractor for the direct isolation of RNA from peripheral blood lysate using magnetic oligo-dT beads. The extraction is achieved through lateral magnetophoresis, generated by a ferromagnetic wire array inlaid on a glass substrate. This RNA microextractor separated more than 80% of magnetic beads with a flow rate up to 20 ml h(-1), and the overall extraction procedure was completed within 1 min. The absorbance ratio of RNA to protein (A(260)/A(280)) was >1.7, indicating that the extraction technology yielded nearly pure RNA. The feasibility of this technique was evaluated further for its applicability to reverse transcription polymerase chain reaction (RT-PCR) procedures by performing cDNA synthesis and PCR. The analysis verified that the RNA microextractor is a practical method for easy, rapid, and high-precision RT-PCR using minimal reagent volumes without requiring highly trained personnel. In addition, it can be readily incorporated into genetic analysis procedures for realizing automated on-chip genetic platforms in a micro format.

Chip, Chip, Hooray!

ERIC Educational Resources Information Center

Kelly, Susan

2001-01-01

Presents a science laboratory using different brands of potato chips in which students test their oiliness, size, thickness, saltiness, quality, and cost, then analyze the results to determine the best chip. Gives a brief history of potato chips. (YDS)

A MHz speed wavelength sweeping for ultra-high speed FBG interrogation

NASA Astrophysics Data System (ADS)

Kim, Gyeong Hun; Lee, Hwi Don; Eom, Tae Joong; Jeong, Myung Yung; Kim, Chang-Seok

2015-09-01

We demonstrated a MHz speed wavelength-swept fiber laser based on the active mode locking (AML) technique and applied to interrogation system of an array of fiber Bragg grating (FBG) sensors. MHz speed wavelength sweeping of wavelength-swept fiber laser can be obtained by programmable frequency modulation of the semiconductor optical amplifier (SOA) without any wavelength tunable filter. Both static and dynamic strain measurement of FBG sensors were successfully characterized with high linearity of an R-square value of 0.9999 at sweeping speed of 50 kHz.

Water flow in high-speed handpieces.

PubMed

Cavalcanti, Bruno Neves; Serairdarian, Paulo Isaías; Rode, Sigmar Mello

2005-05-01

This study measured the water flow commonly used in high-speed handpieces to evaluate the water flow's influence on temperature generation. Different flow speeds were evaluated between turbines that had different numbers of cooling apertures. Two water samples were collected from each high-speed handpiece at private practices and at the School of Dentistry at São José dos Campos. The first sample was collected at the customary flow and the second was collected with the terminal opened for maximum flow. The two samples were collected into weighed glass receptacles after 15 seconds of turbine operation. The glass receptacles were reweighed and the difference between weights was recorded to calculate the water flow in mL/min and for further statistical analysis. The average water flow for 137 samples was 29.48 mL/min. The flow speeds obtained were 42.38 mL/min for turbines with one coolant aperture; 34.31 mL/min for turbines with two coolant apertures; and 30.44 mL/min for turbines with three coolant apertures. There were statistical differences between turbines with one and three coolant apertures (Tukey-Kramer multiple comparisons test with P < .05). Turbine handpieces with one cooling aperture distributed more water for the burs than high-speed handpieces with more than one aperture.

High Speed Digital Camera Technology Review

NASA Technical Reports Server (NTRS)

Clements, Sandra D.

2009-01-01

A High Speed Digital Camera Technology Review (HSD Review) is being conducted to evaluate the state-of-the-shelf in this rapidly progressing industry. Five HSD cameras supplied by four camera manufacturers participated in a Field Test during the Space Shuttle Discovery STS-128 launch. Each camera was also subjected to Bench Tests in the ASRC Imaging Development Laboratory. Evaluation of the data from the Field and Bench Tests is underway. Representatives from the imaging communities at NASA / KSC and the Optical Systems Group are participating as reviewers. A High Speed Digital Video Camera Draft Specification was updated to address Shuttle engineering imagery requirements based on findings from this HSD Review. This draft specification will serve as the template for a High Speed Digital Video Camera Specification to be developed for the wider OSG imaging community under OSG Task OS-33.

High Speed Balancing Applied to the T700 Engine

NASA Technical Reports Server (NTRS)

Walton, J.; Lee, C.; Martin, M.

1989-01-01

The work performed under Contracts NAS3-23929 and NAS3-24633 is presented. MTI evaluated the feasibility of high-speed balancing for both the T700 power turbine rotor and the compressor rotor. Modifications were designed for the existing Corpus Christi Army Depot (CCAD) T53/T55 high-speed balancing system for balancing T700 power turbine rotors. Tests conducted under these contracts included a high-speed balancing evaluation for T700 power turbines in the Army/NASA drivetrain facility at MTI. The high-speed balancing tests demonstrated the reduction of vibration amplitudes at operating speed for both low-speed balanced and non-low-speed balanced T700 power turbines. In addition, vibration data from acceptance tests of T53, T55, and T700 engines were analyzed and a vibration diagnostic procedure developed.

High-speed pulse-shape generator, pulse multiplexer

DOEpatents

Burkhart, Scott C.

2002-01-01

The invention combines arbitrary amplitude high-speed pulses for precision pulse shaping for the National Ignition Facility (NIF). The circuitry combines arbitrary height pulses which are generated by replicating scaled versions of a trigger pulse and summing them delayed in time on a pulse line. The combined electrical pulses are connected to an electro-optic modulator which modulates a laser beam. The circuit can also be adapted to combine multiple channels of high speed data into a single train of electrical pulses which generates the optical pulses for very high speed optical communication. The invention has application in laser pulse shaping for inertial confinement fusion, in optical data links for computers, telecommunications, and in laser pulse shaping for atomic excitation studies. The invention can be used to effect at least a 10.times. increase in all fiber communication lines. It allows a greatly increased data transfer rate between high-performance computers. The invention is inexpensive enough to bring high-speed video and data services to homes through a super modem.

Slot angle detecting method for fiber fixed chip

NASA Astrophysics Data System (ADS)

Zhang, Jiaquan; Wang, Jiliang; Zhou, Chaochao

2018-04-01

The slot angle of fiber fixed chip has a significant impact on performance of photoelectric devices. In order to solve the actual engineering problem, this paper put forward a detecting method based on imaging processing. Because the images have very low contrast that is hardly segmented, so this paper proposes imaging segment methods based on edge character. Then get fixed chip edge line slope k2 and calculate the fiber fixed slot line slope k1, which can be used calculating the slot angle. Lastly, test the repeatability and accuracy of system, which show that this method has very fast operation speed and good robustness. Clearly, it is also satisfied to the actual demand of fiber fixed chip slot angle detection.

High-speed photodetectors.

PubMed

Anderson, L K; McMurtry, B J

1966-10-01

This paper is intended as a status report on high-speed detectors for the visible and near-infrared portion of the optical spectrum. Both vacuum and solid-state detectors are discussed, with the emphasis on those devices which can be used as direct (noncoherent) detectors of weak optical signals modulated at microwave frequencies. The best detectors for this application have internal current gain and in this regard the relevant properties and limitations of high-frequency secondary emission multiplication in vacuum tube devices and avalanche multiplication in p-n junctions are summarized.

Review of Millimeter-Wave Integrated Circuits With Low Power Consumption for High Speed Wireless Communications

NASA Astrophysics Data System (ADS)

Ellinger, Frank; Fritsche, David; Tretter, Gregor; Leufker, Jan Dirk; Yodprasit, Uroschanit; Carta, C.

2017-01-01

In this paper we review high-speed radio-frequency integrated circuits operating up to 210 GHz and present selected state-of-the-art circuits with leading-edge performance, which we have designed at our chair. The following components are discussed employing bipolar complementary metal oxide semiconductors (BiCMOS) technologies: a 200 GHz amplifier with 17 dB gain and around 9 dB noise figure consuming only 18 mW, a 200 GHz down mixer with 5.5 dB conversion gain and 40 mW power consumption, a 190 GHz receiver with 47 dB conversion gain and 11 dB noise figure and a 60 GHz power amplifier with 24.5 dBm output power and 12.9 % power added efficiency (PAE). Moreover, we report on a single-core flash CMOS analogue-to-digital converter (ADC) with 3 bit resolution and a speed of 24 GS/s. Finally, we discuss a 60 GHz on-off keying (OOK) BiCMOS transceiver chip set. The wireless transmission of data with 5 Gb/s at 42 cm distance between transmitter and receiver was verified by experiments. The complete transceiver consumes 396 mW.

Water Containment Systems for Testing High-Speed Flywheels

NASA Technical Reports Server (NTRS)

Trase, Larry; Thompson, Dennis

2006-01-01

Water-filled containers are used as building blocks in a new generation of containment systems for testing high-speed flywheels. Such containment systems are needed to ensure safety by trapping high-speed debris in the event of centrifugal breakup or bearing failure. Traditional containment systems for testing flywheels consist mainly of thick steel rings. The effectiveness of this approach to shielding against high-speed debris was demonstrated in a series of tests.

High-speed and high-fidelity system and method for collecting network traffic

DOEpatents

Weigle, Eric H [Los Alamos, NM

2010-08-24

A system is provided for the high-speed and high-fidelity collection of network traffic. The system can collect traffic at gigabit-per-second (Gbps) speeds, scale to terabit-per-second (Tbps) speeds, and support additional functions such as real-time network intrusion detection. The present system uses a dedicated operating system for traffic collection to maximize efficiency, scalability, and performance. A scalable infrastructure and apparatus for the present system is provided by splitting the work performed on one host onto multiple hosts. The present system simultaneously addresses the issues of scalability, performance, cost, and adaptability with respect to network monitoring, collection, and other network tasks. In addition to high-speed and high-fidelity network collection, the present system provides a flexible infrastructure to perform virtually any function at high speeds such as real-time network intrusion detection and wide-area network emulation for research purposes.

Data Relay Board with Protocol for High-Speed, Free-Space Optical Communications

NASA Technical Reports Server (NTRS)

Wright, Malcolm; Clare, Loren; Gould, Gary; Pedyash, Maxim

2004-01-01

In a free-space optical communication system, the mitigation of transient outages through the incorporation of error-control methods is of particular concern, the outages being caused by scintillation fades and obscurants. The focus of this innovative technology is the development of a data relay system for a reliable high-data-rate free-spacebased optical-transport network. The data relay boards will establish the link, maintain synchronous connection, group the data into frames, and provide for automatic retransmission (ARQ) of lost or erred frames. A certain Quality of Service (QoS) can then be ensured, compatible with the required data rate. The protocol to be used by the data relay system is based on the draft CCSDS standard data-link protocol Proximity-1, selected by orbiters to multiple lander assets in the Mars network, for example. In addition to providing data-link protocol capabilities for the free-space optical link and buffering the data, the data relay system will interface directly with user applications over Gigabit Ethernet and/or with highspeed storage resources via Fibre Channel. The hardware implementation is built on a network-processor-based architecture. This technology combines the power of a hardware switch capable of data switching and packet routing at Gbps rates, with the flexibility of a software- driven processor that can host highly adaptive and reconfigurable protocols used, for example, in wireless local-area networks (LANs). The system will be implemented in a modular multi-board fashion. The main hardware elements of the data relay system are the new data relay board developed by Rockwell Scientific, a COTS Gigabit Ethernet board for user interface, and a COTS Fibre Channel board that connects to local storage. The boards reside in a cPCI back plane, and can be housed in a VME-type enclosure.

High-speed digital signal normalization for feature identification

NASA Technical Reports Server (NTRS)

Ortiz, J. A.; Meredith, B. D.

1983-01-01

A design approach for high speed normalization of digital signals was developed. A reciprocal look up table technique is employed, where a digital value is mapped to its reciprocal via a high speed memory. This reciprocal is then multiplied with an input signal to obtain the normalized result. Normalization improves considerably the accuracy of certain feature identification algorithms. By using the concept of pipelining the multispectral sensor data processing rate is limited only by the speed of the multiplier. The breadboard system was found to operate at an execution rate of five million normalizations per second. This design features high precision, a reduced hardware complexity, high flexibility, and expandability which are very important considerations for spaceborne applications. It also accomplishes a high speed normalization rate essential for real time data processing.

A high-throughput lab-on-a-chip interface for zebrafish embryo tests in drug discovery and ecotoxicology

NASA Astrophysics Data System (ADS)

Zhu, Feng; Akagi, Jin; Hall, Chris J.; Crosier, Kathryn E.; Crosier, Philip S.; Delaage, Pierre; Wlodkowic, Donald

2013-12-01

Drug discovery screenings performed on zebrafish embryos mirror with a high level of accuracy. The tests usually performed on mammalian animal models, and the fish embryo toxicity assay (FET) is one of the most promising alternative approaches to acute ecotoxicity testing with adult fish. Notwithstanding this, conventional methods utilising 96-well microtiter plates and manual dispensing of fish embryos are very time-consuming. They rely on laborious and iterative manual pipetting that is a main source of analytical errors and low throughput. In this work, we present development of a miniaturised and high-throughput Lab-on-a-Chip (LOC) platform for automation of FET assays. The 3D high-density LOC array was fabricated in poly-methyl methacrylate (PMMA) transparent thermoplastic using infrared laser micromachining while the off-chip interfaces were fabricated using additive manufacturing processes (FDM and SLA). The system's design facilitates rapid loading and immobilization of a large number of embryos in predefined clusters of traps during continuous microperfusion of drugs/toxins. It has been conceptually designed to seamlessly interface with both upright and inverted fluorescent imaging systems and also to directly interface with conventional microtiter plate readers that accept 96-well plates. We also present proof-of-concept interfacing with a high-speed imaging cytometer Plate RUNNER HD® capable of multispectral image acquisition with resolution of up to 8192 x 8192 pixels and depth of field of about 40 μm. Furthermore, we developed a miniaturized and self-contained analytical device interfaced with a miniaturized USB microscope. This system modification is capable of performing rapid imaging of multiple embryos at a low resolution for drug toxicity analysis.

High speed ultra-broadband amplitude modulators with ultrahigh extinction >65 dB

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, S.; Cai, H.; DeRose, C. T.

Here, we experimentally demonstrate ultrahigh extinction ratio (>65 dB) amplitude modulators (AMs) that can be electrically tuned to operate across a broad spectral range of 160 nm from 1480 – 1640 nm and 95 nm from 1280 – 1375 nm. Our on-chip AMs employ one extra coupler compared with conventional Mach-Zehnder interferometers (MZI), thus form a cascaded MZI (CMZI) structure. Either directional or adiabatic couplers are used to compose the CMZI AMs and experimental comparisons are made between these two different structures. Furthermore, we investigate the performance of CMZI AMs under extreme conditions such as using 95:5 split ratio couplersmore » and unbalanced waveguide losses. Electro-optic phase shifters are also integrated in the CMZI AMs for high-speed operation. Finally, we investigate the output optical phase when the amplitude is modulated, which provides us valuable information when both amplitude and phase are to be controlled. This demonstration not only paves the road to applications such as quantum information processing that requires high extinction ratio AMs but also significantly alleviates the tight fabrication tolerance needed for large-scale integrated photonics.« less

High speed ultra-broadband amplitude modulators with ultrahigh extinction >65 dB

DOE PAGES

Liu, S.; Cai, H.; DeRose, C. T.; ...

2017-05-04

Here, we experimentally demonstrate ultrahigh extinction ratio (>65 dB) amplitude modulators (AMs) that can be electrically tuned to operate across a broad spectral range of 160 nm from 1480 – 1640 nm and 95 nm from 1280 – 1375 nm. Our on-chip AMs employ one extra coupler compared with conventional Mach-Zehnder interferometers (MZI), thus form a cascaded MZI (CMZI) structure. Either directional or adiabatic couplers are used to compose the CMZI AMs and experimental comparisons are made between these two different structures. Furthermore, we investigate the performance of CMZI AMs under extreme conditions such as using 95:5 split ratio couplersmore » and unbalanced waveguide losses. Electro-optic phase shifters are also integrated in the CMZI AMs for high-speed operation. Finally, we investigate the output optical phase when the amplitude is modulated, which provides us valuable information when both amplitude and phase are to be controlled. This demonstration not only paves the road to applications such as quantum information processing that requires high extinction ratio AMs but also significantly alleviates the tight fabrication tolerance needed for large-scale integrated photonics.« less

High Speed Videometric Monitoring of Rock Breakage

NASA Astrophysics Data System (ADS)

Allemand, J.; Shortis, M. R.; Elmouttie, M. K.

2018-05-01

Estimation of rock breakage characteristics plays an important role in optimising various industrial and mining processes used for rock comminution. Although little research has been undertaken into 3D photogrammetric measurement of the progeny kinematics, there is promising potential to improve the efficacy of rock breakage characterisation. In this study, the observation of progeny kinematics was conducted using a high speed, stereo videometric system based on laboratory experiments with a drop weight impact testing system. By manually tracking individual progeny through the captured video sequences, observed progeny coordinates can be used to determine 3D trajectories and velocities, supporting the idea that high speed video can be used for rock breakage characterisation purposes. An analysis of the results showed that the high speed videometric system successfully observed progeny trajectories and showed clear projection of the progeny away from the impact location. Velocities of the progeny could also be determined based on the trajectories and the video frame rate. These results were obtained despite the limitations of the photogrammetric system and experiment processes observed in this study. Accordingly there is sufficient evidence to conclude that high speed videometric systems are capable of observing progeny kinematics from drop weight impact tests. With further optimisation of the systems and processes used, there is potential for improving the efficacy of rock breakage characterisation from measurements with high speed videometric systems.

Interfacing Lab-on-a-Chip Embryo Technology with High-Definition Imaging Cytometry.

PubMed

Zhu, Feng; Hall, Christopher J; Crosier, Philip S; Wlodkowic, Donald

2015-08-01

To spearhead deployment of zebrafish embryo biotests in large-scale drug discovery studies, automated platforms are needed to integrate embryo in-test positioning and immobilization (suitable for high-content imaging) with fluidic modules for continuous drug and medium delivery under microperfusion to developing embryos. In this work, we present an innovative design of a high-throughput three-dimensional (3D) microfluidic chip-based device for automated immobilization and culture and time-lapse imaging of developing zebrafish embryos under continuous microperfusion. The 3D Lab-on-a-Chip array was fabricated in poly(methyl methacrylate) (PMMA) transparent thermoplastic using infrared laser micromachining, while the off-chip interfaces were fabricated using additive manufacturing processes (fused deposition modelling and stereolithography). The system's design facilitated rapid loading and immobilization of a large number of embryos in predefined clusters of traps during continuous microperfusion of drugs/toxins. It was conceptually designed to seamlessly interface with both upright and inverted fluorescent imaging systems and also to directly interface with conventional microtiter plate readers that accept 96-well plates. Compared with the conventional Petri dish assays, the chip-based bioassay was much more convenient and efficient as only small amounts of drug solutions were required for the whole perfusion system running continuously over 72 h. Embryos were spatially separated in the traps that assisted tracing single embryos, preventing interembryo contamination and improving imaging accessibility.

Potential scenarios of concern for high speed rail operations

DOT National Transportation Integrated Search

2011-03-16

Currently, multiple operating authorities are proposing the : introduction of high-speed rail service in the United States. : While high-speed rail service shares a number of basic : principles with conventional-speed rail service, the operational : ...

Effect of osmotic dehydration and vacuum-frying parameters to produce high-quality mango chips.

PubMed

Nunes, Yolanda; Moreira, Rosana G

2009-09-01

Mango (Mangifera indica L.) is a fruit rich in flavor and nutritional values, which is an excellent candidate for producing chips. The objective of this study was to develop high-quality mango chips using vacuum frying. Mango ("Tommy Atkins") slices were pretreated with different maltodextrin concentrations (40, 50, and 65, w/v), osmotic dehydration times (45, 60, and 70 min), and solution temperatures (22 and 40 degrees C). Pretreated slices were vacuum fried at 120, 130, and 138 degrees C and product quality attributes (oil content, texture, color, carotenoid content) determined. The effect of frying temperatures at optimum osmotic dehydration times (65 [w/v] at 40 degrees C) was assessed. All samples were acceptable (scores > 5) to consumer panelists. The best mango chips were those pretreated with 65 (w/v) concentration for 60 min and vacuum fried at 120 degrees C. Mango chips under atmospheric frying had less carotenoid retention (32%) than those under vacuum frying (up to 65%). These results may help further optimize vacuum-frying processing of high-quality fruit-based snacks.

On-Chip Power-Combining for High-Power Schottky Diode-Based Frequency Multipliers

NASA Technical Reports Server (NTRS)

Chattopadhyay, Goutam; Mehdi, Imran; Schlecht, Erich T.; Lee, Choonsup; Siles, Jose V.; Maestrini, Alain E.; Thomas, Bertrand; Jung, Cecile D.

2013-01-01

A 1.6-THz power-combined Schottky frequency tripler was designed to handle approximately 30 mW input power. The design of Schottky-based triplers at this frequency range is mainly constrained by the shrinkage of the waveguide dimensions with frequency and the minimum diode mesa sizes, which limits the maximum number of diodes that can be placed on the chip to no more than two. Hence, multiple-chip power-combined schemes become necessary to increase the power-handling capabilities of high-frequency multipliers. The design presented here overcomes difficulties by performing the power-combining directly on-chip. Four E-probes are located at a single input waveguide in order to equally pump four multiplying structures (featuring two diodes each). The produced output power is then recombined at the output using the same concept.

Three-dimensional femtosecond laser processing for lab-on-a-chip applications

NASA Astrophysics Data System (ADS)

Sima, Felix; Sugioka, Koji; Vázquez, Rebeca Martínez; Osellame, Roberto; Kelemen, Lóránd; Ormos, Pal

2018-02-01

The extremely high peak intensity associated with ultrashort pulse width of femtosecond laser allows us to induce nonlinear interaction such as multiphoton absorption and tunneling ionization with materials that are transparent to the laser wavelength. More importantly, focusing the femtosecond laser beam inside the transparent materials confines the nonlinear interaction only within the focal volume, enabling three-dimensional (3D) micro- and nanofabrication. This 3D capability offers three different schemes, which involve undeformative, subtractive, and additive processing. The undeformative processing preforms internal refractive index modification to construct optical microcomponents including optical waveguides. Subtractive processing can realize the direct fabrication of 3D microfluidics, micromechanics, microelectronics, and photonic microcomponents in glass. Additive processing represented by two-photon polymerization enables the fabrication of 3D polymer micro- and nanostructures for photonic and microfluidic devices. These different schemes can be integrated to realize more functional microdevices including lab-on-a-chip devices, which are miniaturized laboratories that can perform reaction, detection, analysis, separation, and synthesis of biochemical materials with high efficiency, high speed, high sensitivity, low reagent consumption, and low waste production. This review paper describes the principles and applications of femtosecond laser 3D micro- and nanofabrication for lab-on-a-chip applications. A hybrid technique that promises to enhance functionality of lab-on-a-chip devices is also introduced.

Mechanisms and FEM Simulation of Chip Formation in Orthogonal Cutting In-Situ TiB2/7050Al MMC

PubMed Central

Wang, Wenhu; Jiang, Ruisong; Lin, Kunyang; Shao, Mingwei

2018-01-01

The in-situ TiB2/7050Al composite is a new kind of Al-based metal matrix composite (MMC) with super properties, such as low density, improved strength, and wear resistance. This paper, for a deep insight into its cutting performance, involves a study of the chip formation process and finite element simulation during orthogonal cutting in-situ TiB2/7050Al MMC. With chips, material properties, cutting forces, and tool geometry parameters, the Johnson–Cook (J–C) constitutive equation of in-situ TiB2/7050Al composite was established. Then, the cutting simulation model was established by applying the Abaqus–Explicit method, and the serrated chip, shear plane, strain rate, and temperature were analyzed. The experimental and simulation results showed that the obtained material’s constitutive equation was of high reliability, and the saw-tooth chips occurred commonly under either low or high cutting speed and small or large feed rate. From result analysis, it was found that the mechanisms of chip formation included plastic deformation, adiabatic shear, shearing slip, and crack extension. In addition, it was found that the existence of small, hard particles reduced the ductility of the MMC and resulted in segmental chips. PMID:29662047

Method for upgrading the performance at track transitions for high-speed service : next generation high-speed rail program

DOT National Transportation Integrated Search

2001-09-01

High-speed trains in the speed range of 100 to 160 mph require tracks of nearly perfect geometry and mechanical uniformity, when subjected to moving wheel loads. Therefore, this report briefly describes the remedies being used by various railroads to...

Predictors of older drivers' involvement in high-range speeding behavior.

PubMed

Chevalier, Anna; Coxon, Kristy; Rogers, Kris; Chevalier, Aran John; Wall, John; Brown, Julie; Clarke, Elizabeth; Ivers, Rebecca; Keay, Lisa

2017-02-17

Even small increases in vehicle speed raise crash risk and resulting injury severity. Older drivers are at increased risk of involvement in casualty crashes and injury compared to younger drivers. However, there is little objective evidence about older drivers' speeding. This study investigates the nature and predictors of high-range speeding among drivers aged 75-94 years. Speed per second was estimated using Global Positioning System devices installed in participants' vehicles. High-range speeding events were defined as traveling an average 10+km/h above the speed limit over 30 seconds. Descriptive analysis examined speeding events by participant characteristics and mileage driven. Regression analyses were used to examine the association between involvement in high-range speeding events and possible predictive factors. Most (96%, 182/190) participants agreed to have their vehicle instrumented, and speeding events were accurately recorded for 97% (177/182) of participants. While 77% (136/177) of participants were involved in one or more high-range events, 42% (75/177) were involved in greater than five events during 12-months of data collection. Participants involved in high-range events drove approximately twice as many kilometres as those not involved. High-range events tended to be infrequent (median = 6 per 10,000 km; IQR = 2-18). The rate of high-range speeding was associated with better cognitive function and attention to the driving environment. This suggests those older drivers with poorer cognition and visual attention may drive more cautiously, thereby reducing their high-range speeding behavior.

Transportable GPU (General Processor Units) chip set technology for standard computer architectures

NASA Astrophysics Data System (ADS)

Fosdick, R. E.; Denison, H. C.

1982-11-01

The USAFR-developed GPU Chip Set has been utilized by Tracor to implement both USAF and Navy Standard 16-Bit Airborne Computer Architectures. Both configurations are currently being delivered into DOD full-scale development programs. Leadless Hermetic Chip Carrier packaging has facilitated implementation of both architectures on single 41/2 x 5 substrates. The CMOS and CMOS/SOS implementations of the GPU Chip Set have allowed both CPU implementations to use less than 3 watts of power each. Recent efforts by Tracor for USAF have included the definition of a next-generation GPU Chip Set that will retain the application-proven architecture of the current chip set while offering the added cost advantages of transportability across ISO-CMOS and CMOS/SOS processes and across numerous semiconductor manufacturers using a newly-defined set of common design rules. The Enhanced GPU Chip Set will increase speed by an approximate factor of 3 while significantly reducing chip counts and costs of standard CPU implementations.

High-speed civil transport study. Summary

NASA Technical Reports Server (NTRS)

1989-01-01

A system of study of the potential for a high speed commercial transport aircraft addressed technology, economic, and environmental constraints. Market projections indicated a need for fleets of transport with supersonic or greater cruise speeds by the years 2000 to 2005. The associated design requirements called for a vehicle to carry 250 to 300 passengers over a range of 5000 to 6000 nautical miles. The study was initially unconstrained in terms of vehicle characteristics, such as cruise speed, propulsion systems, fuels, or structural materials. Analyses led to a focus on the most promising vehicle concepts. These were concepts that used a kerosene type fuel and cruised at Mach numbers between 2.0 to 3.2. Further systems study identified the impact of environmental constraints (for community noise, sonic boom, and engine emissions) on economic attractiveness and technological needs. Results showed that current technology cannot produce a viable high speed civil transport. Significant advances are needed to take off gross weight and allow for both economic attractiveness and environment acceptability. Specific technological requirements were identified to meet these needs.

High speed hydrogen/graphite interaction

NASA Technical Reports Server (NTRS)

Kelly, A. J.; Hamman, R.; Sharma, O. P.; Harrje, D. T.

1974-01-01

Various aspects of a research program on high speed hydrogen/graphite interaction are presented. Major areas discussed are: (1) theoretical predictions of hydrogen/graphite erosion rates; (2) high temperature, nonequilibrium hydrogen flow in a nozzle; and (3) molecular beam studies of hydrogen/graphite erosion.

Chip-to-chip interconnects based on 3D stacking of optoelectrical dies on Si

NASA Astrophysics Data System (ADS)

Duan, P.; Raz, O.; Smalbrugge, B. E.; Duis, J.; Dorren, H. J. S.

2012-01-01

We demonstrate a new approach to increase the optical interconnection bandwidth density by stacking the opto-electrical dies directly on the CMOS driver. The suggested implementation is aiming to provide a wafer scale process which will make the use of wire bonding redundant and will allow for impedance matched metallic wiring between the electronic driving circuit and its opto-electronic counter part. We suggest the use of a thick photoresist ramp between CMOS driver and opto-electrical dies surface as the bridge for supporting co-plannar waveguides (CPW) electrically plated with lithographic accuracy. In this way all three dimensions of the interconnecting metal layer, width, length and thickness can be completely controlled. In this 1st demonstration all processing is done on commercially available devices and products, and is compatible with CMOS processing technology. To test the applicability of CPW instead of wire bonds for interconnecting the CMOS circuit and opto-electronic chips, we have made test samples and tested their performance at speeds up to 10 Gbps. In this demonstration, a silicon substrate was used on which we evaporated gold co-planar waveguides (CPW) to mimic a wire on the driver. An optical link consisting of a VCSEL chip and a photodiode chip has been assembled and fully characterized using optical coupling into and out of a multimode fiber (MMF). A 10 Gb/s 27-1 NRZ PRBS signal transmitted from one chip to another chip was detected error free. A 4 dB receiver sensitivity penalty is measured for the integrated device compared to a commercial link.

High-Speed Videography Overview

NASA Astrophysics Data System (ADS)

Miller, C. E.

1989-02-01

The field of high-speed videography (HSV) has continued to mature in recent years, due to the introduction of a mixture of new technology and extensions of existing technology. Recent low frame-rate innovations have the potential to dramatically expand the areas of information gathering and motion analysis at all frame-rates. Progress at the 0 - rate is bringing the battle of film versus video to the field of still photography. The pressure to push intermediate frame rates higher continues, although the maximum achievable frame rate has remained stable for several years. Higher maximum recording rates appear technologically practical, but economic factors impose severe limitations to development. The application of diverse photographic techniques to video-based systems is under-exploited. The basics of HSV apply to other fields, such as machine vision and robotics. Present motion analysis systems continue to function mainly as an instant replay replacement for high-speed movie film cameras. The interrelationship among lighting, shuttering and spatial resolution is examined.

Electrostatically focused addressable field emission array chips (AFEA's) for high-speed massively parallel maskless digital E-beam direct write lithography and scanning electron microscopy

DOEpatents

Thomas, Clarence E.; Baylor, Larry R.; Voelkl, Edgar; Simpson, Michael L.; Paulus, Michael J.; Lowndes, Douglas H.; Whealton, John H.; Whitson, John C.; Wilgen, John B.

2002-12-24

Systems and methods are described for addressable field emission array (AFEA) chips. A method of operating an addressable field-emission array, includes: generating a plurality of electron beams from a pluralitly of emitters that compose the addressable field-emission array; and focusing at least one of the plurality of electron beams with an on-chip electrostatic focusing stack. The systems and methods provide advantages including the avoidance of space-charge blow-up.

High-speed optical 3D sensing and its applications

NASA Astrophysics Data System (ADS)

Watanabe, Yoshihiro

2016-12-01

This paper reviews high-speed optical 3D sensing technologies for obtaining the 3D shape of a target using a camera. The focusing speed is from 100 to 1000 fps, exceeding normal camera frame rates, which are typically 30 fps. In particular, contactless, active, and real-time systems are introduced. Also, three example applications of this type of sensing technology are introduced, including surface reconstruction from time-sequential depth images, high-speed 3D user interaction, and high-speed digital archiving.

Reliable Wide-Area Wavelength Division Multiplexing Passive Optical Network Accommodating Gigabit Ethernet and 10-Gb Ethernet Services

NASA Astrophysics Data System (ADS)

Nakamura, Hirotaka; Suzuki, Hiro; Kani, Jun-Ichi; Iwatsuki, Katsumi

2006-05-01

This paper proposes and demonstrates a reliable wide-area wavelength-division-multiplexing passive optical network (WDM-PON) with a wavelength-shifted protection scheme. This protection scheme utilizes the cyclic property of 2 × N athermal arrayed-waveguide grating and two kinds of wavelength allocations, each of which is assigned for working and protection, respectively. Compared with conventional protection schemes, this scheme does not need a 3-dB optical coupler, thus leading to ensure the large loss budget that is suited for wide-area WDM-PONs. It also features a passive access node and does not have a protection function in the optical network unit (ONU). The feasibility of the proposed scheme is experimentally confirmed by the carrier-distributed WDM-PON with gigabit Ethernet interface (GbE-IF) and 10-GbE-IF, in which the ONU does not employ a light source, and all wavelengths for upstream signals are centralized and distributed from the central office.

High-Speed Videography Instrumentation And Procedures

NASA Astrophysics Data System (ADS)

Miller, C. E.

1982-02-01

High-speed videography has been an electronic analog of low-speed film cameras, but having the advantages of instant-replay and simplicity of operation. Recent advances have pushed frame-rates into the realm of the rotating prism camera. Some characteristics of videography systems are discussed in conjunction with applications in sports analysis, and with sports equipment testing.

The analysis and compensation of errors of precise simple harmonic motion control under high speed and large load conditions based on servo electric cylinder

NASA Astrophysics Data System (ADS)

Ma, Chen-xi; Ding, Guo-qing

2017-10-01

Simple harmonic waves and synthesized simple harmonic waves are widely used in the test of instruments. However, because of the errors caused by clearance of gear and time-delay error of FPGA, it is difficult to control servo electric cylinder in precise simple harmonic motion under high speed, high frequency and large load conditions. To solve the problem, a method of error compensation is proposed in this paper. In the method, a displacement sensor is fitted on the piston rod of the electric cylinder. By using the displacement sensor, the real-time displacement of the piston rod is obtained and fed back to the input of servo motor, then a closed loop control is realized. There is compensation of pulses in the next period of the synthetic waves. This paper uses FPGA as the processing core. The software mainly comprises a waveform generator, an Ethernet module, a memory module, a pulse generator, a pulse selector, a protection module, an error compensation module. A durability of shock absorbers is used as the testing platform. The durability mainly comprises a single electric cylinder, a servo motor for driving the electric cylinder, and the servo motor driver.

Active control system for high speed windmills

DOEpatents

Avery, D.E.

1988-01-12

A pump stroke is matched to the operating speed of a high speed windmill. The windmill drives a hydraulic pump for a control. Changes in speed of a wind driven shaft open supply and exhaust valves to opposite ends of a hydraulic actuator to lengthen and shorten an oscillating arm thereby lengthening and shortening the stroke of an output pump. Diminishing wind to a stall speed causes the valves to operate the hydraulic cylinder to shorten the oscillating arm to zero. A pressure accumulator in the hydraulic system provides the force necessary to supply the hydraulic fluid under pressure to drive the actuator into and out of the zero position in response to the windmill shaft speed approaching and exceeding windmill stall speed. 4 figs.

Active control system for high speed windmills

DOEpatents

Avery, Don E.

1988-01-01

A pump stroke is matched to the operating speed of a high speed windmill. The windmill drives a hydraulic pump for a control. Changes in speed of a wind driven shaft open supply and exhaust valves to opposite ends of a hydraulic actuator to lengthen and shorten an oscillating arm thereby lengthening and shortening the stroke of an output pump. Diminishing wind to a stall speed causes the valves to operate the hydraulic cylinder to shorten the oscillating arm to zero. A pressure accumulator in the hydraulic system provides the force necessary to supply the hydraulic fluid under pressure to drive the actuator into and out of the zero position in response to the windmill shaft speed approaching and exceeding windmill stall speed.

First Annual High-Speed Research Workshop, part 4

NASA Technical Reports Server (NTRS)

Whitehead, Allen H., Jr. (Compiler)

1992-01-01

Papers presented at the First Annual High Speed Research Workshop held in Williamsburg, Viginia, on May 14-16, 1991 are presented. This NASA-sponsored workshop provided a national forum for presenting and discussing important technology issues related to the definition of an economically viable and environmentally compatible High Speed Civil Transport. The sessions are developed around the technical components of NASA's Phase 1 High Speed Research Program which addresses the environmental issues of atmospheric emissions, community noise, and sonic boom. In particular, this part of the publication, Part 4, addresses high lift research and supersonic laminar flow control.

Integration of image capture and processing: beyond single-chip digital camera

NASA Astrophysics Data System (ADS)

Lim, SukHwan; El Gamal, Abbas

2001-05-01

An important trend in the design of digital cameras is the integration of capture and processing onto a single CMOS chip. Although integrating the components of a digital camera system onto a single chip significantly reduces system size and power, it does not fully exploit the potential advantages of integration. We argue that a key advantage of integration is the ability to exploit the high speed imaging capability of CMOS image senor to enable new applications such as multiple capture for enhancing dynamic range and to improve the performance of existing applications such as optical flow estimation. Conventional digital cameras operate at low frame rates and it would be too costly, if not infeasible, to operate their chips at high frame rates. Integration solves this problem. The idea is to capture images at much higher frame rates than he standard frame rate, process the high frame rate data on chip, and output the video sequence and the application specific data at standard frame rate. This idea is applied to optical flow estimation, where significant performance improvements are demonstrate over methods using standard frame rate sequences. We then investigate the constraints on memory size and processing power that can be integrated with a CMOS image sensor in a 0.18 micrometers process and below. We show that enough memory and processing power can be integrated to be able to not only perform the functions of a conventional camera system but also to perform applications such as real time optical flow estimation.

High frequency acoustic on-chip integration for particle characterization and manipulation in microfluidics

NASA Astrophysics Data System (ADS)

Li, Sizhe; Carlier, Julien; Toubal, Malika; Liu, Huiqin; Campistron, Pierre; Callens, Dorothée; Nassar, Georges; Nongaillard, Bertrand; Guo, Shishang

2017-10-01

This letter presents a microfluidic device that integrates high frequency (650 MHz) bulk acoustic waves for the realization of particle handling on-chip. The core structure of the microfluidic chip is made up of a confocal lens, a vertical reflection wall, and a ZnO film transducer coupled with a silicon substrate for exciting acoustic beams. The excited acoustic waves propagate in bulk silicon and are then guided by a 45° silicon mirror into the suspensions in the microchannel; afterwards, the acoustic energy is focused on particles by the confocal lens and reflected by a reflection wall. Parts of the reflected acoustic energy backtrack into the transducer, and acoustic attenuation measurements are characterized for particle detection. Meanwhile, a strong acoustic streaming phenomenon can be seen around the reflection wall, which is used to implement particle manipulation. This platform opens a frontier for on-chip integration of high sensitivity acoustic characterization and localized acoustic manipulation in microfluidics.

High-speed parallel implementation of a modified PBR algorithm on DSP-based EH topology

NASA Astrophysics Data System (ADS)

Rajan, K.; Patnaik, L. M.; Ramakrishna, J.

1997-08-01

Algebraic Reconstruction Technique (ART) is an age-old method used for solving the problem of three-dimensional (3-D) reconstruction from projections in electron microscopy and radiology. In medical applications, direct 3-D reconstruction is at the forefront of investigation. The simultaneous iterative reconstruction technique (SIRT) is an ART-type algorithm with the potential of generating in a few iterations tomographic images of a quality comparable to that of convolution backprojection (CBP) methods. Pixel-based reconstruction (PBR) is similar to SIRT reconstruction, and it has been shown that PBR algorithms give better quality pictures compared to those produced by SIRT algorithms. In this work, we propose a few modifications to the PBR algorithms. The modified algorithms are shown to give better quality pictures compared to PBR algorithms. The PBR algorithm and the modified PBR algorithms are highly compute intensive, Not many attempts have been made to reconstruct objects in the true 3-D sense because of the high computational overhead. In this study, we have developed parallel two-dimensional (2-D) and 3-D reconstruction algorithms based on modified PBR. We attempt to solve the two problems encountered by the PBR and modified PBR algorithms, i.e., the long computational time and the large memory requirements, by parallelizing the algorithm on a multiprocessor system. We investigate the possible task and data partitioning schemes by exploiting the potential parallelism in the PBR algorithm subject to minimizing the memory requirement. We have implemented an extended hypercube (EH) architecture for the high-speed execution of the 3-D reconstruction algorithm using the commercially available fast floating point digital signal processor (DSP) chips as the processing elements (PEs) and dual-port random access memories (DPR) as channels between the PEs. We discuss and compare the performances of the PBR algorithm on an IBM 6000 RISC workstation, on a Silicon

High-speed and intercity passenger rail testing strategy.

DOT National Transportation Integrated Search

2013-05-01

This high-speed and intercity passenger rail (HSIPR) testing strategy addresses the requirements for testing of high-speed train sets and technology before introduction to the North American railroad system. The report documents the results of a surv...

Development of high-speed video cameras

NASA Astrophysics Data System (ADS)

Etoh, Takeharu G.; Takehara, Kohsei; Okinaka, Tomoo; Takano, Yasuhide; Ruckelshausen, Arno; Poggemann, Dirk

2001-04-01

Presented in this paper is an outline of the R and D activities on high-speed video cameras, which have been done in Kinki University since more than ten years ago, and are currently proceeded as an international cooperative project with University of Applied Sciences Osnabruck and other organizations. Extensive marketing researches have been done, (1) on user's requirements on high-speed multi-framing and video cameras by questionnaires and hearings, and (2) on current availability of the cameras of this sort by search of journals and websites. Both of them support necessity of development of a high-speed video camera of more than 1 million fps. A video camera of 4,500 fps with parallel readout was developed in 1991. A video camera with triple sensors was developed in 1996. The sensor is the same one as developed for the previous camera. The frame rate is 50 million fps for triple-framing and 4,500 fps for triple-light-wave framing, including color image capturing. Idea on a video camera of 1 million fps with an ISIS, In-situ Storage Image Sensor, was proposed in 1993 at first, and has been continuously improved. A test sensor was developed in early 2000, and successfully captured images at 62,500 fps. Currently, design of a prototype ISIS is going on, and, hopefully, will be fabricated in near future. Epoch-making cameras in history of development of high-speed video cameras by other persons are also briefly reviewed.

Low Speed and High Speed Correlation of SMART Active Flap Rotor Loads

NASA Technical Reports Server (NTRS)

Kottapalli, Sesi B. R.

2010-01-01

Measured, open loop and closed loop data from the SMART rotor test in the NASA Ames 40- by 80- Foot Wind Tunnel are compared with CAMRAD II calculations. One open loop high-speed case and four closed loop cases are considered. The closed loop cases include three high-speed cases and one low-speed case. Two of these high-speed cases include a 2 deg flap deflection at 5P case and a test maximum-airspeed case. This study follows a recent, open loop correlation effort that used a simple correction factor for the airfoil pitching moment Mach number. Compared to the earlier effort, the current open loop study considers more fundamental corrections based on advancing blade aerodynamic conditions. The airfoil tables themselves have been studied. Selected modifications to the HH-06 section flap airfoil pitching moment table are implemented. For the closed loop condition, the effect of the flap actuator is modeled by increased flap hinge stiffness. Overall, the open loop correlation is reasonable, thus confirming the basic correctness of the current semi-empirical modifications; the closed loop correlation is also reasonable considering that the current flap model is a first generation model. Detailed correlation results are given in the paper.

High speed flow cytometric separation of viable cells

DOEpatents

Sasaki, D.T.; Van den Engh, G.J.; Buckie, A.M.

1995-11-14

Hematopoietic cell populations are separated to provide cell sets and subsets as viable cells with high purity and high yields, based on the number of original cells present in the mixture. High-speed flow cytometry is employed using light characteristics of the cells to separate the cells, where high flow speeds are used to reduce the sorting time.

High speed flow cytometric separation of viable cells

DOEpatents

Sasaki, Dennis T.; Van den Engh, Gerrit J.; Buckie, Anne-Marie

1995-01-01

Hematopoietic cell populations are separated to provide cell sets and subsets as viable cells with high purity and high yields, based on the number of original cells present in the mixture. High-speed flow cytometry is employed using light characteristics of the cells to separate the cells, where high flow speeds are used to reduce the sorting time.

Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits

PubMed Central

Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-01

Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits. PMID:24463956

Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits.

PubMed

Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-27

Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

Plug-and-play, infrared, laser-mediated PCR in a microfluidic chip.

PubMed

Pak, Nikita; Saunders, D Curtis; Phaneuf, Christopher R; Forest, Craig R

2012-04-01

Microfluidic polymerase chain reaction (PCR) systems have set milestones for small volume (100 nL-5 μL), amplification speed (100-400 s), and on-chip integration of upstream and downstream sample handling including purification and electrophoretic separation functionality. In practice, the microfluidic chips in these systems require either insertion of thermocouples or calibration prior to every amplification. These factors can offset the speed advantages of microfluidic PCR and have likely hindered commercialization. We present an infrared, laser-mediated, PCR system that features a single calibration, accurate and repeatable precision alignment, and systematic thermal modeling and management for reproducible, open-loop control of PCR in 1 μL chambers of a polymer microfluidic chip. Total cycle time is less than 12 min: 1 min to fill and seal, 10 min to amplify, and 1 min to recover the sample. We describe the design, basis for its operation, and the precision engineering in the system and microfluidic chip. From a single calibration, we demonstrate PCR amplification of a 500 bp amplicon from λ-phage DNA in multiple consecutive trials on the same instrument as well as multiple identical instruments. This simple, relatively low-cost plug-and-play design is thus accessible to persons who may not be skilled in assembly and engineering.

Small Scale High Speed Turbomachinery

NASA Technical Reports Server (NTRS)

London, Adam P. (Inventor); Droppers, Lloyd J. (Inventor); Lehman, Matthew K. (Inventor); Mehra, Amitav (Inventor)

2015-01-01

A small scale, high speed turbomachine is described, as well as a process for manufacturing the turbomachine. The turbomachine is manufactured by diffusion bonding stacked sheets of metal foil, each of which has been pre-formed to correspond to a cross section of the turbomachine structure. The turbomachines include rotating elements as well as static structures. Using this process, turbomachines may be manufactured with rotating elements that have outer diameters of less than four inches in size, and/or blading heights of less than 0.1 inches. The rotating elements of the turbomachines are capable of rotating at speeds in excess of 150 feet per second. In addition, cooling features may be added internally to blading to facilitate cooling in high temperature operations.

Optical interconnects for in-plane high-speed signal distribution at 10 Gb/s: Analysis and demonstration

NASA Astrophysics Data System (ADS)

Chang, Yin-Jung

With decreasing transistor size, increasing chip speed, and larger numbers of processors in a system, the performance of a module/system is being limited by the off-chip and off-module bandwidth-distance products. Optical links have moved from fiber-based long distance communications to the cabinet level of 1m--100m, and recently to the backplane-level (10cm--1m). Board-level inter-chip parallel optical interconnects have been demonstrated recently by researchers from Intel, IBM, Fujitsu, NTT and a few research groups in universities. However, the board-level signal/clock distribution function using optical interconnects, the lightwave circuits, the system design, a practically convenient integration scheme committed to the implementation of a system prototype have not been explored or carefully investigated. In this dissertation, the development of a board-level 1 x 4 optical-to-electrical signal distribution at 10Gb/s is presented. In contrast to other prototypes demonstrating board-level parallel optical interconnects that have been drawing much attention for the past decade, the optical link design for the high-speed signal broadcasting is even more complicated and the pitch between receivers could be varying as opposed to fixed-pitch design that has been widely-used in the parallel optical interconnects. New challenges for the board-level high-speed signal broadcasting include, but are not limited to, a new optical link design, a lightwave circuit as a distribution network, and a novel integration scheme that can be a complete radical departure from the traditional assembly method. One of the key building blocks in the lightwave circuit is the distribution network in which a 1 x 4 multimode interference (MMI) splitter is employed. MMI devices operating at high data rates are important in board-level optical interconnects and need to be characterized in the application of board-level signal broadcasting. To determine the speed limitations of MMI devices, the

On-Chip Biomedical Imaging

PubMed Central

Göröcs, Zoltán; Ozcan, Aydogan

2012-01-01

Lab-on-a-chip systems have been rapidly emerging to pave the way toward ultra-compact, efficient, mass producible and cost-effective biomedical research and diagnostic tools. Although such microfluidic and micro electromechanical systems achieved high levels of integration, and are capable of performing various important tasks on the same chip, such as cell culturing, sorting and staining, they still rely on conventional microscopes for their imaging needs. Recently several alternative on-chip optical imaging techniques have been introduced, which have the potential to substitute conventional microscopes for various lab-on-a-chip applications. Here we present a critical review of these recently emerging on-chip biomedical imaging modalities, including contact shadow imaging, lensfree holographic microscopy, fluorescent on-chip microscopy and lensfree optical tomography. PMID:23558399

High Speed Surface Thermocouples Interface to Wireless Transmitters

DTIC Science & Technology

2017-03-15

Government and/or Private Sector Use Being able to measure high-speed surface temperatures in hostile environments where wireless transmission of the data...09/16/2016 See Item 16 Draft Reg Repro 16. REMARKS Eric Gingrich, COR I Item 0: High Speed Surface Thermocouples Interface to Wireless ...Speed Surface Thermocouples Interface to Wireless Transmitters W56HZV-16-C-0149 Sb. GRANT NUMBER Sc. PROGRAM ELEMENT NUMBER 6. AUTHOR(S) Sd. PROJECT

High speed demodulation systems for fiber optic grating sensors

NASA Technical Reports Server (NTRS)

Udd, Eric (Inventor); Weisshaar, Andreas (Inventor)

2002-01-01

Fiber optic grating sensor demodulation systems are described that offer high speed and multiplexing options for both single and multiple parameter fiber optic grating sensors. To attain very high speeds for single parameter fiber grating sensors ratio techniques are used that allow a series of sensors to be placed in a single fiber while retaining high speed capability. These methods can be extended to multiparameter fiber grating sensors. Optimization of speeds can be obtained by minimizing the number of spectral peaks that must be processed and it is shown that two or three spectral peak measurements may in specific multiparameter applications offer comparable or better performance than processing four spectral peaks. Combining the ratio methods with minimization of peak measurements allows very high speed measurement of such important environmental effects as transverse strain and pressure.

Highly specific detection of genetic modification events using an enzyme-linked probe hybridization chip.

PubMed

Zhang, M Z; Zhang, X F; Chen, X M; Chen, X; Wu, S; Xu, L L

2015-08-10

The enzyme-linked probe hybridization chip utilizes a method based on ligase-hybridizing probe chip technology, with the principle of using thio-primers for protection against enzyme digestion, and using lambda DNA exonuclease to cut multiple PCR products obtained from the sample being tested into single-strand chains for hybridization. The 5'-end amino-labeled probe was fixed onto the aldehyde chip, and hybridized with the single-stranded PCR product, followed by addition of a fluorescent-modified probe that was then enzymatically linked with the adjacent, substrate-bound probe in order to achieve highly specific, parallel, and high-throughput detection. Specificity and sensitivity testing demonstrated that enzyme-linked probe hybridization technology could be applied to the specific detection of eight genetic modification events at the same time, with a sensitivity reaching 0.1% and the achievement of accurate, efficient, and stable results.

High-speed high-stress ring shear tests on granular sods and clayey soils

Treesearch

Hiroshi Fukuoka; Kyoji Sassa

1991-01-01

The purposes of this study is to obtain exact knowledge of the influences on friction angle during shear by shearing speeds. Ring shear tests on sandy and clayey materials have been carried out with a newly developed High-speed High-Stress Ring Shear Apparatus to examine if there are some changes in the frictional behaviors of these materials at high shearing speeds of...

A novel high electrode count spike recording array using an 81,920 pixel transimpedance amplifier-based imaging chip.

PubMed

Johnson, Lee J; Cohen, Ethan; Ilg, Doug; Klein, Richard; Skeath, Perry; Scribner, Dean A

2012-04-15

Microelectrode recording arrays of 60-100 electrodes are commonly used to record neuronal biopotentials, and these have aided our understanding of brain function, development and pathology. However, higher density microelectrode recording arrays of larger area are needed to study neuronal function over broader brain regions such as in cerebral cortex or hippocampal slices. Here, we present a novel design of a high electrode count picocurrent imaging array (PIA), based on an 81,920 pixel Indigo ISC9809 readout integrated circuit camera chip. While originally developed for interfacing to infrared photodetector arrays, we have adapted the chip for neuron recording by bonding it to microwire glass resulting in an array with an inter-electrode pixel spacing of 30 μm. In a high density electrode array, the ability to selectively record neural regions at high speed and with good signal to noise ratio are both functionally important. A critical feature of our PIA is that each pixel contains a dedicated low noise transimpedance amplifier (∼0.32 pA rms) which allows recording high signal to noise ratio biocurrents comparable to single electrode voltage amplifier recordings. Using selective sampling of 256 pixel subarray regions, we recorded the extracellular biocurrents of rabbit retinal ganglion cell spikes at sampling rates up to 7.2 kHz. Full array local electroretinogram currents could also be recorded at frame rates up to 100 Hz. A PIA with a full complement of 4 readout circuits would span 1cm and could acquire simultaneous data from selected regions of 1024 electrodes at sampling rates up to 9.3 kHz. Published by Elsevier B.V.

Low-power chip-level optical interconnects based on bulk-silicon single-chip photonic transceivers

NASA Astrophysics Data System (ADS)

Kim, Gyungock; Park, Hyundai; Joo, Jiho; Jang, Ki-Seok; Kwack, Myung-Joon; Kim, Sanghoon; Kim, In Gyoo; Kim, Sun Ae; Oh, Jin Hyuk; Park, Jaegyu; Kim, Sanggi

2016-03-01

We present new scheme for chip-level photonic I/Os, based on monolithically integrated vertical photonic devices on bulk silicon, which increases the integration level of PICs to a complete photonic transceiver (TRx) including chip-level light source. A prototype of the single-chip photonic TRx based on a bulk silicon substrate demonstrated 20 Gb/s low power chip-level optical interconnects between fabricated chips, proving that this scheme can offer compact low-cost chip-level I/O solutions and have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, 3D-IC, and LAN/SAN/data-center and network applications.

Difference in muscle activation patterns during high-speed versus standard-speed yoga: A randomized sequence crossover study.

PubMed

Potiaumpai, Melanie; Martins, Maria Carolina Massoni; Wong, Claudia; Desai, Trusha; Rodriguez, Roberto; Mooney, Kiersten; Signorile, Joseph F

2017-02-01

To compare the difference in muscle activation between high-speed yoga and standard-speed yoga and to compare muscle activation of the transitions between poses and the held phases of a yoga pose. Randomized sequence crossover trial SETTING: A laboratory of neuromuscular research and active aging Interventions: Eight minutes of continuous Sun Salutation B was performed, at a high speed versus a standard-speed, separately. Electromyography was used to quantify normalized muscle activation patterns of eight upper and lower body muscles (pectoralis major, medial deltoids, lateral head of the triceps, middle fibers of the trapezius, vastus medialis, medial gastrocnemius, thoracic extensor spinae, and external obliques) during the high-speed and standard-speed yoga protocols. Difference in normalized muscle activation between high-speed yoga and standard-speed yoga. Normalized muscle activity signals were significantly higher in all eight muscles during the transition phases of poses compared to the held phases (p<0.01). There was no significant interaction between speed×phase; however, greater normalized muscle activity was seen for highspeed yoga across the entire session. Our results show that transitions from one held phase of a pose to another produces higher normalized muscle activity than the held phases of the poses and that overall activity is greater during highspeed yoga than standard-speed yoga. Therefore, the transition speed and associated number of poses should be considered when targeting specific improvements in performance. Copyright © 2016 Elsevier Ltd. All rights reserved.

Safety issues in high speed machining

NASA Astrophysics Data System (ADS)

1994-05-01

There are several risks related to High-Speed Milling, but they have not been systematically determined or studied so far. Increased loads by high centrifugal forces may result in dramatic hazards. Flying tools or fragments from a tool with high kinetic energy may damage surrounding people, machines and devices. In the project, mechanical risks were evaluated, theoretic values for kinetic energies of rotating tools were calculated, possible damages of the flying objects were determined and terms to eliminate the risks were considered. The noise levels of the High-Speed Machining center owned by the Helsinki University of Technology (HUT) and the Technical Research Center of Finland (VTT) in practical machining situation were measured and the results were compared to those after basic preventive measures were taken.

On-line high-speed rail defect detection.

DOT National Transportation Integrated Search

2004-10-01

This report presents the results of phase 2 of the project On-line high-speed rail defect detection aimed at improving the reliability and the speed of current defect detection in rails. Ultrasonic guided waves, traveling in the rail running di...

Power Conditioning for High-Speed Tracked Vehicles

DOT National Transportation Integrated Search

1971-01-01

The linear induction motor is to provide the propulsion of high-speed tracked vehicles; speed and brake control of the propulsion motor is essential for vehicle operation. The purpose of power conditioning is to provide the power matching interface b...

Power Conditioning for High Speed Tracked Vehicles

DOT National Transportation Integrated Search

1973-01-01

The linear induction motor is to provide the propulsion of high-speed tracked vehicles; speed and brake control of the propulsion motor is essential for vehicle operation. The purpose of power conditioning is to provide the power matching interface b...

Compact high-speed scanning lidar system

NASA Astrophysics Data System (ADS)

Dickinson, Cameron; Hussein, Marwan; Tripp, Jeff; Nimelman, Manny; Koujelev, Alexander

2012-06-01

The compact High Speed Scanning Lidar (HSSL) was designed to meet the requirements for a rover GN&C sensor. The eye-safe HSSL's fast scanning speed, low volume and low power, make it the ideal choice for a variety of real-time and non-real-time applications including: 3D Mapping; Vehicle guidance and Navigation; Obstacle Detection; Orbiter Rendezvous; Spacecraft Landing / Hazard Avoidance. The HSSL comprises two main hardware units: Sensor Head and Control Unit. In a rover application, the Sensor Head mounts on the top of the rover while the Control Unit can be mounted on the rover deck or within its avionics bay. An Operator Computer is used to command the lidar and immediately display the acquired scan data. The innovative lidar design concept was a result of an extensive trade study conducted during the initial phase of an exploration rover program. The lidar utilizes an innovative scanner coupled with a compact fiber laser and high-speed timing electronics. Compared to existing compact lidar systems, distinguishing features of the HSSL include its high accuracy, high resolution, high refresh rate and large field of view. Other benefits of this design include the capability to quickly configure scan settings to fit various operational modes.

Scientific Visualization in High Speed Network Environments

NASA Technical Reports Server (NTRS)

Vaziri, Arsi; Kutler, Paul (Technical Monitor)

1997-01-01

In several cases, new visualization techniques have vastly increased the researcher's ability to analyze and comprehend data. Similarly, the role of networks in providing an efficient supercomputing environment have become more critical and continue to grow at a faster rate than the increase in the processing capabilities of supercomputers. A close relationship between scientific visualization and high-speed networks in providing an important link to support efficient supercomputing is identified. The two technologies are driven by the increasing complexities and volume of supercomputer data. The interaction of scientific visualization and high-speed networks in a Computational Fluid Dynamics simulation/visualization environment are given. Current capabilities supported by high speed networks, supercomputers, and high-performance graphics workstations at the Numerical Aerodynamic Simulation Facility (NAS) at NASA Ames Research Center are described. Applied research in providing a supercomputer visualization environment to support future computational requirements are summarized.

Regeneration of glass nanofluidic chips through a multiple-step sequential thermochemical decomposition process at high temperatures.

PubMed

Xu, Yan; Wu, Qian; Shimatani, Yuji; Yamaguchi, Koji

2015-10-07

Due to the lack of regeneration methods, the reusability of nanofluidic chips is a significant technical challenge impeding the efficient and economic promotion of both fundamental research and practical applications on nanofluidics. Herein, a simple method for the total regeneration of glass nanofluidic chips was described. The method consists of sequential thermal treatment with six well-designed steps, which correspond to four sequential thermal and thermochemical decomposition processes, namely, dehydration, high-temperature redox chemical reaction, high-temperature gasification, and cooling. The method enabled the total regeneration of typical 'dead' glass nanofluidic chips by eliminating physically clogged nanoparticles in the nanochannels, removing chemically reacted organic matter on the glass surface and regenerating permanent functional surfaces of dissimilar materials localized in the nanochannels. The method provides a technical solution to significantly improve the reusability of glass nanofluidic chips and will be useful for the promotion and acceleration of research and applications on nanofluidics.

A Reduced Order Model for Whole-Chip Thermal Analysis of Microfluidic Lab-on-a-Chip Systems

PubMed Central

Wang, Yi; Song, Hongjun; Pant, Kapil

2013-01-01

This paper presents a Krylov subspace projection-based Reduced Order Model (ROM) for whole microfluidic chip thermal analysis, including conjugate heat transfer. Two key steps in the reduced order modeling procedure are described in detail, including (1) the acquisition of a 3D full-scale computational model in the state-space form to capture the dynamic thermal behavior of the entire microfluidic chip; and (2) the model order reduction using the Block Arnoldi algorithm to markedly lower the dimension of the full-scale model. Case studies using practically relevant thermal microfluidic chip are undertaken to establish the capability and to evaluate the computational performance of the reduced order modeling technique. The ROM is compared against the full-scale model and exhibits good agreement in spatiotemporal thermal profiles (<0.5% relative error in pertinent time scales) and over three orders-of-magnitude acceleration in computational speed. The salient model reusability and real-time simulation capability renders it amenable for operational optimization and in-line thermal control and management of microfluidic systems and devices. PMID:24443647

First Annual High-Speed Research Workshop, part 3

NASA Technical Reports Server (NTRS)

Whitehead, Allen H., Jr. (Compiler)

1992-01-01

The First High-Speed Research (HSR) Workshop was hosted by NASA LaRC and was held 14-16 May 1991, in Williamsburg, Virginia. The purpose of the workshop was to provide a national forum for the government, industry, and university participants to present and discuss important technology issues related to the development of a commercially viable, environmentally compatible, U.S. High-Speed Civil Transport. The workshop sessions are organized around the major task elements in NASA's Phase 1 High-Speed Research Program which basically addresses the environmental issues of atmospheric emissions, community noise, and sonic boom.

Trend on High-speed Power Line Communication Technology

NASA Astrophysics Data System (ADS)

Ogawa, Osamu

High-speed power line communication (PLC) is useful technology to easily build the communication networks, because construction of new infrastructure is not necessary. In Europe and America, PLC has been used for broadband networks since the beginning of 21th century. In Japan, high-speed PLC was deregulated only indoor usage in 2006. Afterward it has been widely used for home area network, LAN in hotels and school buildings and so on. And recently, PLC is greatly concerned as communication technology for smart grid network. In this paper, the author surveys the high-speed PLC technology and its current status.

A Lab-on-Chip Design for Miniature Autonomous Bio-Chemoprospecting Planetary Rovers

NASA Astrophysics Data System (ADS)

Santoli, S.

The performance of the so-called ` Lab-on-Chip ' devices, featuring micrometre size components and employed at present for carrying out in a very fast and economic way the extremely high number of sequence determinations required in genomic analyses, can be largely improved as to further size reduction, decrease of power consumption and reaction efficiency through development of nanofluidics and of nano-to-micro inte- grated systems. As is shown, such new technologies would lead to robotic, fully autonomous, microwatt consumption and complete ` laboratory on a chip ' units for accurate, fast and cost-effective astrobiological and planetary exploration missions. The theory and the manufacturing technologies for the ` active chip ' of a miniature bio/chemoprospecting planetary rover working on micro- and nanofluidics are investigated. The chip would include micro- and nanoreactors, integrated MEMS (MicroElectroMechanical System) components, nanoelectronics and an intracavity nanolaser for highly accurate and fast chemical analysis as an application of such recently introduced solid state devices. Nano-reactors would be able to strongly speed up reaction kinetics as a result of increased frequency of reactive collisions. The reaction dynamics may also be altered with respect to standard macroscopic reactors. A built-in miniature telemetering unit would connect a network of other similar rovers and a central, ground-based or orbiting control unit for data collection and transmission to an Earth-based unit through a powerful antenna. The development of the ` Lab-on-Chip ' concept for space applications would affect the economy of space exploration missions, as the rover's ` Lab-on-Chip ' development would link space missions with the ever growing terrestrial market and business concerning such devices, largely employed in modern genomics and bioinformatics, so that it would allow the recoupment of space mission costs.

A Rapid Method for Optimizing Running Temperature of Electrophoresis through Repetitive On-Chip CE Operations

PubMed Central

Kaneda, Shohei; Ono, Koichi; Fukuba, Tatsuhiro; Nojima, Takahiko; Yamamoto, Takatoki; Fujii, Teruo

2011-01-01

In this paper, a rapid and simple method to determine the optimal temperature conditions for denaturant electrophoresis using a temperature-controlled on-chip capillary electrophoresis (CE) device is presented. Since on-chip CE operations including sample loading, injection and separation are carried out just by switching the electric field, we can repeat consecutive run-to-run CE operations on a single on-chip CE device by programming the voltage sequences. By utilizing the high-speed separation and the repeatability of the on-chip CE, a series of electrophoretic operations with different running temperatures can be implemented. Using separations of reaction products of single-stranded DNA (ssDNA) with a peptide nucleic acid (PNA) oligomer, the effectiveness of the presented method to determine the optimal temperature conditions required to discriminate a single-base substitution (SBS) between two different ssDNAs is demonstrated. It is shown that a single run for one temperature condition can be executed within 4 min, and the optimal temperature to discriminate the SBS could be successfully found using the present method. PMID:21845077

A photonic chip based frequency discriminator for a high performance microwave photonic link.

PubMed

Marpaung, David; Roeloffzen, Chris; Leinse, Arne; Hoekman, Marcel

2010-12-20

We report a high performance phase modulation direct detection microwave photonic link employing a photonic chip as a frequency discriminator. The photonic chip consists of five optical ring resonators (ORRs) which are fully programmable using thermo-optical tuning. In this discriminator a drop-port response of an ORR is cascaded with a through response of another ORR to yield a linear phase modulation (PM) to intensity modulation (IM) conversion. The balanced photonic link employing the PM to IM conversion exhibits high second-order and third-order input intercept points of + 46 dBm and + 36 dBm, respectively, which are simultaneously achieved at one bias point.

Assessment of potential aerodynamic effects on personnel and equipment in proximity to high-speed train operations : safety of high-speed ground transportation systems

DOT National Transportation Integrated Search

1999-12-01

Amtrak is planning to provide high-speed passenger train service at speeds significantly higher than their current top speed of 125 mph, and with these higher speeds, there are concerns with safety from the aerodynamic effects created by a passing tr...

Nugget Structure Evolution with Rotation Speed for High-Rotation-Speed Friction-Stir-Welded 6061 Aluminum Alloy

NASA Astrophysics Data System (ADS)

Zhang, H. J.; Wang, M.; Zhu, Z.; Zhang, X.; Yu, T.; Wu, Z. Q.

2018-03-01

High-rotation-speed friction stir welding (HRS-FSW) is a promising technique to reduce the welding loads during FSW and thus facilitates the application of FSW for in situ fabrication and repair. In this study, 6061 aluminum alloy was friction stir welded at high-rotation speeds ranging from 3000 to 7000 rpm at a fixed welding speed of 50 mm/min, and the effects of rotation speed on the nugget zone macro- and microstructures were investigated in detail in order to illuminate the process features. Temperature measurements during HRS-FSW indicated that the peak temperature did not increase consistently with rotation speed; instead, it dropped remarkably at 5000 rpm because of the lowering of material shear stress. The nugget size first increased with rotation speed until 5000 rpm and then decreased due to the change of the dominant tool/workpiece contact condition from sticking to sliding. At the rotation speed of 5000 rpm, where the weld material experienced weaker thermal effect and higher-strain-rate plastic deformation, the nugget exhibited relatively small grain size, large textural intensity, and high dislocation density. Consequently, the joint showed superior nugget hardness and simultaneously a slightly low tensile ductility.

Vibration compensation for high speed scanning tunneling microscopy

NASA Astrophysics Data System (ADS)

Croft, D.; Devasia, S.

1999-12-01

Low scanning speed is a fundamental limitation of scanning tunneling microscopes (STMs), making real time imaging of surface processes and nanofabrication impractical. The effective scanning bandwidth is currently limited by the smallest resonant vibrational frequency of the piezobased positioning system (i.e., scanner) used in the STM. Due to this limitation, the acquired images are distorted during high speed operations. In practice, the achievable scan rates are much less than 1/10th of the resonant vibrational frequency of the STM scanner. To alleviate the scanning speed limitation, this article describes an inversion-based approach that compensates for the structural vibrations in the scanner and thus, allows STM imaging at high scanning speeds (relative to the smallest resonant vibrational frequency). Experimental results are presented to show the increase in scanning speeds achievable by applying the vibration compensation methods.

49 CFR 236.1007 - Additional requirements for high-speed service.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Additional requirements for high-speed service..., AND APPLIANCES Positive Train Control Systems § 236.1007 Additional requirements for high-speed... by this subpart, and which have been utilized on high-speed rail systems with similar technical and...

High speed civil transport

NASA Technical Reports Server (NTRS)

Bogardus, Scott; Loper, Brent; Nauman, Chris; Page, Jeff; Parris, Rusty; Steinbach, Greg

1990-01-01

The design process of the High Speed Civil Transport (HSCT) combines existing technology with the expectation of future technology to create a Mach 3.0 transport. The HSCT was designed to have a range in excess of 6000 nautical miles and carry up to 300 passengers. This range will allow the HSCT to service the economically expanding Pacific Basin region. Effort was made in the design to enable the aircraft to use conventional airports with standard 12,000 foot runways. With a takeoff thrust of 250,000 pounds, the four supersonic through-flow engines will accelerate the HSCT to a cruise speed of Mach 3.0. The 679,000 pound (at takeoff) HSCT is designed to cruise at an altitude of 70,000 feet, flying above most atmospheric disturbances.

Radiated emissions comparison of seven-stage modal filter constructions for Ethernet 100Base-T network protection

NASA Astrophysics Data System (ADS)

Khazhibekov, R. R.; Zabolotsky, A. M.

2018-05-01

The authors consider Ethernet protection devices based on modal filtering. Radiated emission measurement results for three modal filter constructions are presented. It is shown that the improved construction of a non-resistive filter has lower emission levels than the original one.

Ultrasonic Vibration Assisted Grinding of Bio-ceramic Materials: Modeling, Simulation, and Experimental Investigations on Edge Chipping

NASA Astrophysics Data System (ADS)

Tesfay, Hayelom D.

Bio-ceramics are those engineered materials that find their applications in the field of biomedical engineering or medicine. They have been widely used in dental restorations, repairing bones, joint replacements, pacemakers, kidney dialysis machines, and respirators. etc. due to their physico-chemical properties, such as excellent corrosion resistance, good biocompatibility, high strength and high wear resistance. Because of their inherent brittleness and hardness nature they are difficult to machine to exact sizes and dimensions. Abrasive machining processes such as grinding is one of the most widely used manufacturing processes for bioceramics. However, the principal technical challenge resulted from these machining is edge chipping. Edge chipping is a common edge failure commonly observed during the machining of bio-ceramic materials. The presence of edge chipping on bio-ceramic products affects dimensional accuracy, increases manufacturing cost, hider their industrial applications and causes potential failure during service. To overcome these technological challenges, a new ultrasonic vibration-assisted grinding (UVAG) manufacturing method has been developed and employed in this research. The ultimate aim of this study is to develop a new cost-effective manufacturing process relevant to eliminate edge chippings in grinding of bio-ceramic materials. In this dissertation, comprehensive investigations will be carried out using experimental, theoretical, and numerical approaches to evaluate the effect of ultrasonic vibrations on edge chipping of bioceramics. Moreover, effects of nine input variables (static load, vibration frequency, grinding depth, spindle speed, grinding distance, tool speed, grain size, grain number, and vibration amplitude) on edge chipping will be studied based on the developed models. Following a description of previous research and existing approaches, a series of experimental tests on three bio-ceramic materials (Lava, partially fired Lava

High-speed trains subject to abrupt braking

NASA Astrophysics Data System (ADS)

Tran, Minh Thi; Ang, Kok Keng; Luong, Van Hai; Dai, Jian

2016-12-01

The dynamic response of high-speed train subject to braking is investigated using the moving element method. Possible sliding of wheels over the rails is accounted for. The train is modelled as a 15-DOF system comprising of a car body, two bogies and four wheels interconnected by spring-damping units. The rail is modelled as a Euler-Bernoulli beam resting on a two-parameter elastic damped foundation. The interaction between the moving train and track-foundation is accounted for through the normal and tangential wheel-rail contact forces. The effects of braking torque, wheel-rail contact condition, initial train speed and severity of railhead roughness on the dynamic response of the high-speed train are investigated. For a given initial train speed and track irregularity, the study revealed that there is an optimal braking torque that would result in the smallest braking distance with no occurrence of wheel sliding, representing a good compromise between train instability and safety.

36 CFR 1192.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 36 Parks, Forests, and Public Property 3 2010-07-01 2010-07-01 false High-speed rail cars... TRANSPORTATION VEHICLES Other Vehicles and Systems § 1192.175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including but not limited to those using “maglev” or high speed...

36 CFR 1192.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2012 CFR

2012-07-01

... 36 Parks, Forests, and Public Property 3 2012-07-01 2012-07-01 false High-speed rail cars... TRANSPORTATION VEHICLES Other Vehicles and Systems § 1192.175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including but not limited to those using “maglev” or high speed...

36 CFR 1192.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2011 CFR

2011-07-01

... 36 Parks, Forests, and Public Property 3 2011-07-01 2011-07-01 false High-speed rail cars... TRANSPORTATION VEHICLES Other Vehicles and Systems § 1192.175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including but not limited to those using “maglev” or high speed...

36 CFR 1192.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2014 CFR

2014-07-01

... 36 Parks, Forests, and Public Property 3 2014-07-01 2014-07-01 false High-speed rail cars... TRANSPORTATION VEHICLES Other Vehicles and Systems § 1192.175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including but not limited to those using “maglev” or high speed...

(abstract) A High Throughput 3-D Inner Product Processor

NASA Technical Reports Server (NTRS)

Daud, Tuan

1996-01-01

A particularily challenging image processing application is the real time scene acquisition and object discrimination. It requires spatio-temporal recognition of point and resolved objects at high speeds with parallel processing algorithms. Neural network paradigms provide fine grain parallism and, when implemented in hardware, offer orders of magnitude speed up. However, neural networks implemented on a VLSI chip are planer architectures capable of efficient processing of linear vector signals rather than 2-D images. Therefore, for processing of images, a 3-D stack of neural-net ICs receiving planar inputs and consuming minimal power are required. Details of the circuits with chip architectures will be described with need to develop ultralow-power electronics. Further, use of the architecture in a system for high-speed processing will be illustrated.

High-Speed, High-Temperature Finger Seal Test Evaluated

NASA Technical Reports Server (NTRS)

Proctor, Margaret P.

2003-01-01

A finger seal, designed and fabricated by Honeywell Engines, Systems and Services, was tested at the NASA Glenn Research Center at surface speeds up to 1200 ft/s, air temperatures up to 1200 F, and pressures across the seal of 75 psid. These are the first test results obtained with NASA s new High-Temperature, High-Speed Turbine Seal Test Rig (see the photograph). The finger seal is an innovative design recently patented by AlliedSignal Engines, which has demonstrated considerably lower leakage than commonly used labyrinth seals and is considerably cheaper than brush seals. The cost to produce finger seals is estimated to be about half of the cost to produce brush seals. Replacing labyrinth seals with fingers seals at locations that have high-pressure drops in gas turbine engines, typically main engine and thrust seals, can reduce air leakage at each location by 50 percent or more. This directly results in a 0.7- to 1.4-percent reduction in specific fuel consumption and a 0.35- to 0.7-percent reduction in direct operating costs . Because the finger seal is a contacting seal, this testing was conducted to address concerns about its heat generation and life capability at the higher speeds and temperatures required for advanced engines. The test results showed that the seal leakage and wear performance are acceptable for advanced engines.

High-Speed Binary-Output Image Sensor

NASA Technical Reports Server (NTRS)

Fossum, Eric; Panicacci, Roger A.; Kemeny, Sabrina E.; Jones, Peter D.

1996-01-01

Photodetector outputs digitized by circuitry on same integrated-circuit chip. Developmental special-purpose binary-output image sensor designed to capture up to 1,000 images per second, with resolution greater than 10 to the 6th power pixels per image. Lower-resolution but higher-frame-rate prototype of sensor contains 128 x 128 array of photodiodes on complementary metal oxide/semiconductor (CMOS) integrated-circuit chip. In application for which it is being developed, sensor used to examine helicopter oil to determine whether amount of metal and sand in oil sufficient to warrant replacement.

Measurements of speed of response of high-speed visible and IR optical detectors

NASA Technical Reports Server (NTRS)

Rowe, H. E.; Osmundson, J. S.

1972-01-01

A technique for measuring speed of response of high speed visible and IR optical detectors to mode-locked Nd:YAG laser pulses is described. Results of measurements of response times of four detectors are presented. Three detectors that can be used as receivers in a 500-MHz optical communication system are tested.

High-pressure microfluidic control in lab-on-a-chip devices using mobile polymer monoliths.

PubMed

Hasselbrink, Ernest F; Shepodd, Timothy J; Rehm, Jason E

2002-10-01

We have developed a nonstick polymer formulation for creating moving parts inside of microfluidic channels and have applied the technique to create piston-based devices that overcome several microfluidic flow control challenges. The parts were created bycompletely filling the channels of a glass microfluidic chip with the monomer/ solvent/initiator components of a nonstick photopolymer and then selectively exposing the chip to UV light in order to define mobile pistons (or other quasi-two-dimensional shapes) inside the channels. Stops defined in the substrate prevent the part from flushing out of the device but also provide sealing surfaces so that valves and other flow control devices are possible. Sealing against pressures greater than 30 MPa (4,500 psi) and actuation times less than 33 ms are observed. An on-chip check valve, a diverter valve, and a 10-nL pipet are demonstrated. This valving technology, coupled with high-pressure electrokinetic pumps, should make it possible to create a completely integrated HPLC system on a chip.

High-speed massively parallel scanning

DOEpatents

Decker, Derek E [Byron, CA

2010-07-06

A new technique for recording a series of images of a high-speed event (such as, but not limited to: ballistics, explosives, laser induced changes in materials, etc.) is presented. Such technique(s) makes use of a lenslet array to take image picture elements (pixels) and concentrate light from each pixel into a spot that is much smaller than the pixel. This array of spots illuminates a detector region (e.g., film, as one embodiment) which is scanned transverse to the light, creating tracks of exposed regions. Each track is a time history of the light intensity for a single pixel. By appropriately configuring the array of concentrated spots with respect to the scanning direction of the detection material, different tracks fit between pixels and sufficient lengths are possible which can be of interest in several high-speed imaging applications.

Electro-optofluidics: achieving dynamic control on-chip

PubMed Central

Soltani, Mohammad; Inman, James T.; Lipson, Michal; Wang, Michelle D.

2012-01-01

A vital element in integrated optofluidics is dynamic tuning and precise control of photonic devices, especially when employing electronic techniques which are challenging to utilize in an aqueous environment. We overcome this challenge by introducing a new platform in which the photonic device is controlled using electro-optical phase tuning. The phase tuning is generated by the thermo-optic effect using an on-chip electric microheater located outside the fluidic channel, and is transmitted to the optofluidic device through optical waveguides. The microheater is compact, high-speed (> 18 kHz), and consumes low power (~mW). We demonstrate dynamic optical trapping control of nanoparticles by an optofluidic resonator. This novel electro-optofluidic platform allows the realization of high throughput optofluidic devices with switching, tuning, and reconfiguration capability, and promises new directions in optofluidics. PMID:23037380

High-speed cylindrical collapse of two perfect fluids

NASA Astrophysics Data System (ADS)

Sharif, M.; Ahmad, Zahid

2007-09-01

In this paper, the study of the gravitational collapse of cylindrically distributed two perfect fluid system has been carried out. It is assumed that the collapsing speeds of the two fluids are very large. We explore this condition by using the high-speed approximation scheme. There arise two cases, i.e., bounded and vanishing of the ratios of the pressures with densities of two fluids given by c s , d s . It is shown that the high-speed approximation scheme breaks down by non-zero pressures p 1, p 2 when c s , d s are bounded below by some positive constants. The failure of the high-speed approximation scheme at some particular time of the gravitational collapse suggests the uncertainty on the evolution at and after this time. In the bounded case, the naked singularity formation seems to be impossible for the cylindrical two perfect fluids. For the vanishing case, if a linear equation of state is used, the high-speed collapse does not break down by the effects of the pressures and consequently a naked singularity forms. This work provides the generalisation of the results already given by Nakao and Morisawa (Prog Theor Phys 113:73, 2005) for the perfect fluid.

MM-122: High speed civil transport

NASA Technical Reports Server (NTRS)

Demarest, Bill; Anders, Kurt; Manchec, John; Yang, Eric; Overgaard, Dan; Kalkwarf, Mike

1992-01-01

The rapidly expanding Pacific Rim market along with other growing markets indicates that the future market potential for a high speed civil transport is great indeed. The MM-122 is the answer to the international market desire for a state of the art, long range, high speed civil transport. It will carry 250 passengers a distance of 5200 nm at over twice the speed of sound. The MM-122 is designed to incorporate the latest technologies in the areas of control systems, propulsions, aerodynamics, and materials. The MM-122 will accomplish these goals using the following design parameters. First, a double delta wing planform with highly swept canards and an appropriately area ruled fuselage will be incorporated to accomplish desired aerodynamic characteristics. Propulsion will be provided by four low bypass variable cycle turbofan engines. A quad-redundant fly-by-wire flight control system will be incorporated to provide appropriate static stability and level 1 handling qualities. Finally, the latest in conventional metallic and modern composite materials will be used to provide desired weight and performance characteristics. The MM-122 incorporates the latest in technology and cost minimization techniques to provide a viable solution to this future market potential.

On-chip ultraviolet holography for high-throughput nanoparticle and biomolecule detection

NASA Astrophysics Data System (ADS)

Daloglu, Mustafa Ugur; Ray, Aniruddha; Gorocs, Zoltán.; Xiong, Matthew; Malik, Ravinder; Bitan, Gal; McLeod, Euan; Ozcan, Aydogan

2018-02-01

Nanoparticle and biomolecule imaging has become an important need for various applications. In an effort to find a higher throughput alternative to existing devices, we have designed a lensfree on-chip holographic imaging platform operating at an ultraviolet (UV) wavelength of 266 nm. With a custom-designed free-space light delivery system to illuminate the sample that is placed very close (<0.5 mm) to an opto-electronic image sensor chip, without any imaging lenses in between, the full active area of the imager chip (>16 mm2 ) was utilized as the imaging field-of-view (FOV) capturing holographic signatures of target objects on a chip. These holograms were then digitally back propagated to extract both the amplitude and phase information of the sample. The increased forward scattering from nanoparticles due to this shorter illumination wavelength has enabled us to image individual particles that are smaller than 30 nm over an FOV of >16 mm2 . Our platform was further utilized in high-contrast imaging of nanoscopic biomolecule aggregates since 266 nm illumination light is strongly absorbed by biomolecules including proteins and nucleic acids. Aggregates of Cu/Zn-superoxide dismutase (SOD1), which has been linked to a fatal neurodegenerative disease, ALS (amyotrophic lateral sclerosis), have been imaged with significantly improved contrast compared to imaging at visible wavelengths. This unique UV imaging modality could be valuable for biomedical applications (e.g., viral load measurements) and environmental monitoring including air and water quality monitoring.

Rounding Technique for High-Speed Digital Signal Processing

NASA Technical Reports Server (NTRS)

Wechsler, E. R.

1983-01-01

Arithmetic technique facilitates high-speed rounding of 2's complement binary data. Conventional rounding of 2's complement numbers presents problems in high-speed digital circuits. Proposed technique consists of truncating K + 1 bits then attaching bit in least significant position. Mean output error is zero, eliminating introducing voltage offset at input.

Technology needs for high-speed rotorcraft, volume 1

NASA Technical Reports Server (NTRS)

Wilkerson, J. B.; Schneider, J. J.; Bartie, K. M.

1991-01-01

High-speed rotorcraft concepts and the technology needed to extend rotorcraft cruise speeds up to 450 knots (while retaining the helicopter attributes of low downwash velocities) were identified. Task I identified 20 concepts with high-speed potential. These concepts were qualitatively evaluated to determine the five most promising ones. These five concepts were designed with optimum wing loading and disk loading to a common NASA-defined military transport mission. The optimum designs were quantitatively compared against 11 key criteria and ranked accordingly. The two highest ranking concepts were selected for the further study.

Computer Analysis Of High-Speed Roller Bearings

NASA Technical Reports Server (NTRS)

Coe, H.

1988-01-01

High-speed cylindrical roller-bearing analysis program (CYBEAN) developed to compute behavior of cylindrical rolling-element bearings at high speeds and with misaligned shafts. With program, accurate assessment of geometry-induced roller preload possible for variety of out-ring and housing configurations and loading conditions. Enables detailed examination of bearing performance and permits exploration of causes and consequences of bearing skew. Provides general capability for assessment of designs of bearings supporting main shafts of engines. Written in FORTRAN IV.

Design of noise barrier inspection system for high-speed railway

NASA Astrophysics Data System (ADS)

Liu, Bingqian; Shao, Shuangyun; Feng, Qibo; Ma, Le; Cholryong, Kim

2016-10-01

The damage of noise barriers will highly reduce the transportation safety of the high-speed railway. In this paper, an online inspection system of noise barrier based on laser vision for the safety of high-speed railway is proposed. The inspection system, mainly consisted of a fast camera and a line laser, installed in the first carriage of the high-speed CIT(Composited Inspection Train).A Laser line was projected on the surface of the noise barriers and the images of the light line were received by the camera while the train is running at high speed. The distance between the inspection system and the noise barrier can be obtained based on laser triangulation principle. The results of field tests show that the proposed system can meet the need of high speed and high accuracy to get the contour distortion of the noise barriers.

High speed door assembly

DOEpatents

Shapiro, Carolyn

1993-01-01

A high speed door assembly, comprising an actuator cylinder and piston rods, a pressure supply cylinder and fittings, an electrically detonated explosive bolt, a honeycomb structured door, a honeycomb structured decelerator, and a structural steel frame encasing the assembly to close over a 3 foot diameter opening within 50 milliseconds of actuation, to contain hazardous materials and vapors within a test fixture.

High-speed imaging system for observation of discharge phenomena

NASA Astrophysics Data System (ADS)

Tanabe, R.; Kusano, H.; Ito, Y.

2008-11-01

A thin metal electrode tip instantly changes its shape into a sphere or a needlelike shape in a single electrical discharge of high current. These changes occur within several hundred microseconds. To observe these high-speed phenomena in a single discharge, an imaging system using a high-speed video camera and a high repetition rate pulse laser was constructed. A nanosecond laser, the wavelength of which was 532 nm, was used as the illuminating source of a newly developed high-speed video camera, HPV-1. The time resolution of our system was determined by the laser pulse width and was about 80 nanoseconds. The system can take one hundred pictures at 16- or 64-microsecond intervals in a single discharge event. A band-pass filter at 532 nm was placed in front of the camera to block the emission of the discharge arc at other wavelengths. Therefore, clear images of the electrode were recorded even during the discharge. If the laser was not used, only images of plasma during discharge and thermal radiation from the electrode after discharge were observed. These results demonstrate that the combination of a high repetition rate and a short pulse laser with a high speed video camera provides a unique and powerful method for high speed imaging.

High-speed data word monitor

NASA Technical Reports Server (NTRS)

Wirth, M. N.

1975-01-01

Small, portable, self-contained device provides high-speed display of bit pattern or any selected portion of transmission, can suppress filler patterns so that display is not updated, and can freeze display so that specific event may be observed in detail.

High speed rail distribution study.

DOT National Transportation Integrated Search

2016-08-01

The Texas Central Partners are in the process of developing a high speed rail line connecting : Houston and Dallas, Texas. Ultimately, plans are for 8 car trains that accommodate 200 people per : vehicle scheduled every 30 minutes. In addition, Texas...

Field-based high-speed imaging of explosive eruptions

NASA Astrophysics Data System (ADS)

Taddeucci, J.; Scarlato, P.; Freda, C.; Moroni, M.

2012-12-01

Explosive eruptions involve, by definition, physical processes that are highly dynamic over short time scales. Capturing and parameterizing such processes is a major task in eruption understanding and forecasting, and a task that necessarily requires observational systems capable of high sampling rates. Seismic and acoustic networks are a prime tool for high-frequency observation of eruption, recently joined by Doppler radar and electric sensors. In comparison with the above monitoring systems, imaging techniques provide more complete and direct information of surface processes, but usually at a lower sampling rate. However, recent developments in high-speed imaging systems now allow such information to be obtained with a spatial and temporal resolution suitable for the analysis of several key eruption processes. Our most recent set up for high-speed imaging of explosive eruptions (FAMoUS - FAst, MUltiparametric Set-up,) includes: 1) a monochrome high speed camera, capable of 500 frames per second (fps) at high-definition (1280x1024 pixel) resolution and up to 200000 fps at reduced resolution; 2) a thermal camera capable of 50-200 fps at 480-120x640 pixel resolution; and 3) two acoustic to infrasonic sensors. All instruments are time-synchronized via a data logging system, a hand- or software-operated trigger, and via GPS, allowing signals from other instruments or networks to be directly recorded by the same logging unit or to be readily synchronized for comparison. FAMoUS weights less than 20 kg, easily fits into four, hand-luggage-sized backpacks, and can be deployed in less than 20' (and removed in less than 2', if needed). So far, explosive eruptions have been recorded in high-speed at several active volcanoes, including Fuego and Santiaguito (Guatemala), Stromboli (Italy), Yasur (Vanuatu), and Eyjafiallajokull (Iceland). Image processing and analysis from these eruptions helped illuminate several eruptive processes, including: 1) Pyroclasts ejection. High-speed

Hybrid hydrostatic/ball bearings in high-speed turbomachinery

NASA Technical Reports Server (NTRS)

Nielson, C. E.

1983-01-01

A high speed, high pressure liquid hydrogen turbopump was designed, fabricated, and tested under a previous contract. This design was then modified to incorporate hybrid hydrostatic/ball bearings on both the pump end and turbine end to replace the original conventional ball bearing packages. The design, analysis, turbopump modification, assembly, and testing of the turbopump with hybrid bearings is presented here. Initial design considerations and rotordynamic performance analysis was made to define expected turbopump operating characteristics and are reported. The results of testing the turbopump to speeds of 9215 rad/s (88,000 rpm) using a wide range of hydrostatic bearing supply pressures are presented. The hydrostatic bearing test data and the rotordynamic behavior of the turbopump was closely analyzed and are included in the report. The testing of hybrid hydrostatic/ball bearings on a turbopump to the high speed requirements has indicated the configuration concept is feasible. The program has presented a great deal of information on the technology requirements of integrating the hybrid bearing into high speed turbopump designs for improved bearing life.

On-chip microlasers for biomolecular detection via highly localized deposition of a multifunctional phospholipid ink.

PubMed

Bog, Uwe; Laue, Thomas; Grossmann, Tobias; Beck, Torsten; Wienhold, Tobias; Richter, Benjamin; Hirtz, Michael; Fuchs, Harald; Kalt, Heinz; Mappes, Timo

2013-07-21

We report on a novel approach to realize on-chip microlasers, by applying highly localized and material-saving surface functionalization of passive photonic whispering gallery mode microresonators. We apply dip-pen nanolithography on a true three-dimensional structure. We coat solely the light-guiding circumference of pre-fabricated poly(methyl methacrylate) resonators with a multifunctional molecular ink. The functionalization is performed in one single fabrication step and simultaneously provides optical gain as well as molecular binding selectivity. This allows for a direct and flexible realization of on-chip microlasers, which can be utilized as biosensors in optofluidic lab-on-a-chip applications. In a proof-of-concept we show how this highly localized molecule deposition suffices for low-threshold lasing in air and water, and demonstrate the capability of the ink-lasers as biosensors in a biotin-streptavidin binding experiment.

Research on the tool holder mode in high speed machining

NASA Astrophysics Data System (ADS)

Zhenyu, Zhao; Yongquan, Zhou; Houming, Zhou; Xiaomei, Xu; Haibin, Xiao

2018-03-01

High speed machining technology can improve the processing efficiency and precision, but also reduce the processing cost. Therefore, the technology is widely regarded in the industry. With the extensive application of high-speed machining technology, high-speed tool system has higher and higher requirements on the tool chuck. At present, in high speed precision machining, several new kinds of clip heads are as long as there are heat shrinkage tool-holder, high-precision spring chuck, hydraulic tool-holder, and the three-rib deformation chuck. Among them, the heat shrinkage tool-holder has the advantages of high precision, high clamping force, high bending rigidity and dynamic balance, etc., which are widely used. Therefore, it is of great significance to research the new requirements of the machining tool system. In order to adapt to the requirement of high speed machining precision machining technology, this paper expounds the common tool holder technology of high precision machining, and proposes how to select correctly tool clamping system in practice. The characteristics and existing problems are analyzed in the tool clamping system.

High-Speed Video Analysis of Damped Harmonic Motion

ERIC Educational Resources Information Center

Poonyawatpornkul, J.; Wattanakasiwich, P.

2013-01-01

In this paper, we acquire and analyse high-speed videos of a spring-mass system oscillating in glycerin at different temperatures. Three cases of damped harmonic oscillation are investigated and analysed by using high-speed video at a rate of 120 frames s[superscript -1] and Tracker Video Analysis (Tracker) software. We present empirical data for…

High-speed photodetectors in optical communication system

NASA Astrophysics Data System (ADS)

Zhao, Zeping; Liu, Jianguo; Liu, Yu; Zhu, Ninghua

2017-12-01

This paper presents a review and discussion for high-speed photodetectors and their applications on optical communications and microwave photonics. A detailed and comprehensive demonstration of high-speed photodetectors from development history, research hotspots to packaging technologies is provided to the best of our knowledge. A few typical applications based on photodetectors are also illustrated, such as free-space optical communications, radio over fiber and millimeter terahertz signal generation systems. Project supported by the Preeminence Youth Fund of China (No. 61625504).

Analysis and topology optimization design of high-speed driving spindle

NASA Astrophysics Data System (ADS)

Wang, Zhilin; Yang, Hai

2018-04-01

The three-dimensional model of high-speed driving spindle is established by using SOLIDWORKS. The model is imported through the interface of ABAQUS, A finite element analysis model of high-speed driving spindle was established by using spring element to simulate bearing boundary condition. High-speed driving spindle for the static analysis, the spindle of the stress, strain and displacement nephogram, and on the basis of the results of the analysis on spindle for topology optimization, completed the lightweight design of high-speed driving spindle. The design scheme provides guidance for the design of axial parts of similar structures.

Experiments on high speed ejectors

NASA Technical Reports Server (NTRS)

Wu, J. J.

1986-01-01

Experimental studies were conducted to investigate the flow and the performance of thrust augmenting ejectors for flight Mach numbers in the range of 0.5 to 0.8, primary air stagnation pressures up to 107 psig (738 kPa), and primary air stagnation temperatures up to 1250 F (677 C). The experiment verified the existence of the second solution ejector flow, where the flow after complete mixing is supersonic. Thrust augmentation in excess of 1.2 was demonstrated for both hot and cold primary jets. The experimental ejector performed better than the corresponding theoretical optimal first solution ejector, where the mixed flow is subsonic. Further studies are required to realize the full potential of the second solution ejector. The research program was started by the Flight Dynamics Research Corporation (FDRC) to investigate the characteristic of a high speed ejector which augments thrust of a jet at high flight speeds.

High-speed ground transportation noise and vibration impact assessment.

DOT National Transportation Integrated Search

2012-09-01

This report is the second edition of a guidance manual originally issued in 2005, which presents procedures for predicting and assessing noise and vibration impacts of high-speed ground transportation projects. Projects involving high-speed trains us...

South Carolina southeast high speed rail corridor improvement study

DOT National Transportation Integrated Search

2001-02-01

The Southeast Rail Corridor was originally designated as a high-speed corridor in Section 1010 of the Intermodal Surface Transportation Efficiency Act (ISTEA) of 1991. More specifically, it involved the high-speed grade-crossing improvement program o...

Application of polarization in high speed, high contrast inspection

NASA Astrophysics Data System (ADS)

Novak, Matthew J.

2017-08-01

Industrial optical inspection often requires high speed and high throughput of materials. Engineers use a variety of techniques to handle these inspection needs. Some examples include line scan cameras, high speed multi-spectral and laser-based systems. High-volume manufacturing presents different challenges for inspection engineers. For example, manufacturers produce some components in quantities of millions per month, per week or even per day. Quality control of so many parts requires creativity to achieve the measurement needs. At times, traditional vision systems lack the contrast to provide the data required. In this paper, we show how dynamic polarization imaging captures high contrast images. These images are useful for engineers to perform inspection tasks in some cases where optical contrast is low. We will cover basic theory of polarization. We show how to exploit polarization as a contrast enhancement technique. We also show results of modeling for a polarization inspection application. Specifically, we explore polarization techniques for inspection of adhesives on glass.

High speed door assembly

DOEpatents

Shapiro, C.

1993-04-27

A high speed door assembly is described, comprising an actuator cylinder and piston rods, a pressure supply cylinder and fittings, an electrically detonated explosive bolt, a honeycomb structured door, a honeycomb structured decelerator, and a structural steel frame encasing the assembly to close over a 3 foot diameter opening within 50 milliseconds of actuation, to contain hazardous materials and vapors within a test fixture.

A High-Voltage SOI CMOS Exciter Chip for a Programmable Fluidic Processor System.

PubMed

Current, K W; Yuk, K; McConaghy, C; Gascoyne, P R C; Schwartz, J A; Vykoukal, J V; Andrews, C

2007-06-01

A high-voltage (HV) integrated circuit has been demonstrated to transport fluidic droplet samples on programmable paths across the array of driving electrodes on its hydrophobically coated surface. This exciter chip is the engine for dielectrophoresis (DEP)-based micro-fluidic lab-on-a-chip systems, creating field excitations that inject and move fluidic droplets onto and about the manipulation surface. The architecture of this chip is expandable to arrays of N X N identical HV electrode driver circuits and electrodes. The exciter chip is programmable in several senses. The routes of multiple droplets may be set arbitrarily within the bounds of the electrode array. The electrode excitation waveform voltage amplitude, phase, and frequency may be adjusted based on the system configuration and the signal required to manipulate a particular fluid droplet composition. The voltage amplitude of the electrode excitation waveform can be set from the minimum logic level up to the maximum limit of the breakdown voltage of the fabrication technology. The frequency of the electrode excitation waveform can also be set independently of its voltage, up to a maximum depending upon the type of droplets that must be driven. The exciter chip can be coated and its oxide surface used as the droplet manipulation surface or it can be used with a top-mounted, enclosed fluidic chamber consisting of a variety of materials. The HV capability of the exciter chip allows the generated DEP forces to penetrate into the enclosed chamber region and an adjustable voltage amplitude can accommodate a variety of chamber floor thicknesses. This demonstration exciter chip has a 32 x 32 array of nominally 100 V electrode drivers that are individually programmable at each time point in the procedure to either of two phases: 0deg and 180deg with respect to the reference clock. For this demonstration chip, while operating the electrodes with a 100-V peak-to-peak periodic waveform, the maximum HV electrode

Transparent Nanopore Cavity Arrays Enable Highly Parallelized Optical Studies of Single Membrane Proteins on Chip.

PubMed

Diederichs, Tim; Nguyen, Quoc Hung; Urban, Michael; Tampé, Robert; Tornow, Marc

2018-06-13

Membrane proteins involved in transport processes are key targets for pharmaceutical research and industry. Despite continuous improvements and new developments in the field of electrical readouts for the analysis of transport kinetics, a well-suited methodology for high-throughput characterization of single transporters with nonionic substrates and slow turnover rates is still lacking. Here, we report on a novel architecture of silicon chips with embedded nanopore microcavities, based on a silicon-on-insulator technology for high-throughput optical readouts. Arrays containing more than 14 000 inverted-pyramidal cavities of 50 femtoliter volumes and 80 nm circular pore openings were constructed via high-resolution electron-beam lithography in combination with reactive ion etching and anisotropic wet etching. These cavities feature both, an optically transparent bottom and top cap. Atomic force microscopy analysis reveals an overall extremely smooth chip surface, particularly in the vicinity of the nanopores, which exhibits well-defined edges. Our unprecedented transparent chip design provides parallel and independent fluorescent readout of both cavities and buffer reservoir for unbiased single-transporter recordings. Spreading of large unilamellar vesicles with efficiencies up to 96% created nanopore-supported lipid bilayers, which are stable for more than 1 day. A high lipid mobility in the supported membrane was determined by fluorescent recovery after photobleaching. Flux kinetics of α-hemolysin were characterized at single-pore resolution with a rate constant of 0.96 ± 0.06 × 10 -3 s -1 . Here, we deliver an ideal chip platform for pharmaceutical research, which features high parallelism and throughput, synergistically combined with single-transporter resolution.

Focused Mission High Speed Combatant

DTIC Science & Technology

2003-05-09

Landing and airborne autonomous vehicle ( AAV ) operations. AMW 6.7 Serve as a helo haven. AMW 14.6 Conduct spotting for Naval gunfire and artillery...for Building and Classing High Speed Naval Craft 2002, Houston, Texas: ABS, 2002. 13 International Maritime Organization. 2000 HSC Code

Advancing high-speed rail policy in the United States.

DOT National Transportation Integrated Search

2012-06-01

This report builds on a review of international experience with high-speed rail projects to develop recommendations for a High-speed rail policy framework for the United States. The international review looked at the experience of Korea, Taiwan, Chin...

Influence of "J"-Curve Spring Stiffness on Running Speeds of Segmented Legs during High-Speed Locomotion.

PubMed

Wang, Runxiao; Zhao, Wentao; Li, Shujun; Zhang, Shunqi

2016-01-01

Both the linear leg spring model and the two-segment leg model with constant spring stiffness have been broadly used as template models to investigate bouncing gaits for legged robots with compliant legs. In addition to these two models, the other stiffness leg spring models developed using inspiration from biological characteristic have the potential to improve high-speed running capacity of spring-legged robots. In this paper, we investigate the effects of "J"-curve spring stiffness inspired by biological materials on running speeds of segmented legs during high-speed locomotion. Mathematical formulation of the relationship between the virtual leg force and the virtual leg compression is established. When the SLIP model and the two-segment leg model with constant spring stiffness and with "J"-curve spring stiffness have the same dimensionless reference stiffness, the two-segment leg model with "J"-curve spring stiffness reveals that (1) both the largest tolerated range of running speeds and the tolerated maximum running speed are found and (2) at fast running speed from 25 to 40/92 m s -1 both the tolerated range of landing angle and the stability region are the largest. It is suggested that the two-segment leg model with "J"-curve spring stiffness is more advantageous for high-speed running compared with the SLIP model and with constant spring stiffness.

Rapid and Low-Cost CRP Measurement by Integrating a Paper-Based Microfluidic Immunoassay with Smartphone (CRP-Chip).

PubMed

Dong, Meili; Wu, Jiandong; Ma, Zimin; Peretz-Soroka, Hagit; Zhang, Michael; Komenda, Paul; Tangri, Navdeep; Liu, Yong; Rigatto, Claudio; Lin, Francis

2017-03-26

Traditional diagnostic tests for chronic diseases are expensive and require a specialized laboratory, therefore limiting their use for point-of-care (PoC) testing. To address this gap, we developed a method for rapid and low-cost C-reactive protein (CRP) detection from blood by integrating a paper-based microfluidic immunoassay with a smartphone (CRP-Chip). We chose CRP for this initial development because it is a strong biomarker of prognosis in chronic heart and kidney disease. The microfluidic immunoassay is realized by lateral flow and gold nanoparticle-based colorimetric detection of the target protein. The test image signal is acquired and analyzed using a commercial smartphone with an attached microlens and a 3D-printed chip-phone interface. The CRP-Chip was validated for detecting CRP in blood samples from chronic kidney disease patients and healthy subjects. The linear detection range of the CRP-Chip is up to 2 μg/mL and the detection limit is 54 ng/mL. The CRP-Chip test result yields high reproducibility and is consistent with the standard ELISA kit. A single CRP-Chip can perform the test in triplicate on a single chip within 15 min for less than 50 US cents of material cost. This CRP-Chip with attractive features of low-cost, fast test speed, and integrated easy operation with smartphones has the potential to enable future clinical PoC chronic disease diagnosis and risk stratification by parallel measurements of a panel of protein biomarkers.

High-speed adaptive optics for imaging of the living human eye

PubMed Central

Yu, Yongxin; Zhang, Tianjiao; Meadway, Alexander; Wang, Xiaolin; Zhang, Yuhua

2015-01-01

The discovery of high frequency temporal fluctuation of human ocular wave aberration dictates the necessity of high speed adaptive optics (AO) correction for high resolution retinal imaging. We present a high speed AO system for an experimental adaptive optics scanning laser ophthalmoscope (AOSLO). We developed a custom high speed Shack-Hartmann wavefront sensor and maximized the wavefront detection speed based upon a trade-off among the wavefront spatial sampling density, the dynamic range, and the measurement sensitivity. We examined the temporal dynamic property of the ocular wavefront under the AOSLO imaging condition and improved the dual-thread AO control strategy. The high speed AO can be operated with a closed-loop frequency up to 110 Hz. Experiment results demonstrated that the high speed AO system can provide improved compensation for the wave aberration up to 30 Hz in the living human eye. PMID:26368408

Assessment of rural soundscapes with high-speed train noise.

PubMed

Lee, Pyoung Jik; Hong, Joo Young; Jeon, Jin Yong

2014-06-01

In the present study, rural soundscapes with high-speed train noise were assessed through laboratory experiments. A total of ten sites with varying landscape metrics were chosen for audio-visual recording. The acoustical characteristics of the high-speed train noise were analyzed using various noise level indices. Landscape metrics such as the percentage of natural features (NF) and Shannon's diversity index (SHDI) were adopted to evaluate the landscape features of the ten sites. Laboratory experiments were then performed with 20 well-trained listeners to investigate the perception of high-speed train noise in rural areas. The experiments consisted of three parts: 1) visual-only condition, 2) audio-only condition, and 3) combined audio-visual condition. The results showed that subjects' preference for visual images was significantly related to NF, the number of land types, and the A-weighted equivalent sound pressure level (LAeq). In addition, the visual images significantly influenced the noise annoyance, and LAeq and NF were the dominant factors affecting the annoyance from high-speed train noise in the combined audio-visual condition. In addition, Zwicker's loudness (N) was highly correlated with the annoyance from high-speed train noise in both the audio-only and audio-visual conditions. © 2013.

Wireless Interconnects for Intra-chip & Inter-chip Transmission

NASA Astrophysics Data System (ADS)

Narde, Rounak Singh

With the emergence of Internet of Things and information revolution, the demand of high performance computing systems is increasing. The copper interconnects inside the computing chips have evolved into a sophisticated network of interconnects known as Network on Chip (NoC) comprising of routers, switches, repeaters, just like computer networks. When network on chip is implemented on a large scale like in Multicore Multichip (MCMC) systems for High Performance Computing (HPC) systems, length of interconnects increases and so are the problems like power dissipation, interconnect delays, clock synchronization and electrical noise. In this thesis, wireless interconnects are chosen as the substitute for wired copper interconnects. Wireless interconnects offer easy integration with CMOS fabrication and chip packaging. Using wireless interconnects working at unlicensed mm-wave band (57-64GHz), high data rate of Gbps can be achieved. This thesis presents study of transmission between zigzag antennas as wireless interconnects for Multichip multicores (MCMC) systems and 3D IC. For MCMC systems, a four-chips 16-cores model is analyzed with only four wireless interconnects in three configurations with different antenna orientations and locations. Return loss and transmission coefficients are simulated in ANSYS HFSS. Moreover, wireless interconnects are designed, fabricated and tested on a 6'' silicon wafer with resistivity of 55O-cm using a basic standard CMOS process. Wireless interconnect are designed to work at 30GHz using ANSYS HFSS. The fabricated antennas are resonating around 20GHz with a return loss of less than -10dB. The transmission coefficients between antenna pair within a 20mm x 20mm silicon die is found to be varying between -45dB to -55dB. Furthermore, wireless interconnect approach is extended for 3D IC. Wireless interconnects are implemented as zigzag antenna. This thesis extends the work of analyzing the wireless interconnects in 3D IC with different

Prototyping of thermoplastic microfluidic chips and their application in high-performance liquid chromatography separations of small molecules.

PubMed

Wouters, Sam; De Vos, Jelle; Dores-Sousa, José Luís; Wouters, Bert; Desmet, Gert; Eeltink, Sebastiaan

2017-11-10

The present paper discusses practical aspects of prototyping of microfluidic chips using cyclic olefin copolymer as substrate and the application in high-performance liquid chromatography. The developed chips feature a 60mm long straight separation channel with circular cross section (500μm i.d.) that was created using a micromilling robot. To irreversibly seal the top and bottom chip substrates, a solvent-vapor-assisted bonding approach was optimized, allowing to approximate the ideal circular channel geometry. Four different approaches to establish the micro-to-macro interface were pursued. The average burst pressure of the microfluidic chips in combination with an encasing holder was established at 38MPa and the maximum burst pressure was 47MPa, which is believed to be the highest ever report for these polymer-based microfluidic chips. Porous polymer monolithic frits were synthesized in-situ via UV-initiated polymerization and their locations were spatially controlled by the application of a photomask. Next, high-pressure slurry packing was performed to introduce 3μm silica reversed-phase particles as the stationary phase in the separation channel. Finally, the application of the chip technology is demonstrated for the separation of alkyl phenones in gradient mode yielding baseline peak widths of 6s by applying a steep gradient of 1.8min at a flow rate of 10μL/min. Copyright © 2017 Elsevier B.V. All rights reserved.

Safety Relevant Observations on the ICE High Speed Train

DOT National Transportation Integrated Search

1991-07-01

The safety of high speed rail technology proposed for possible application in the United States is of concern to the Federal Railroad Administration. This report, one in a series of reports planned for high speed rail technologies presents an initial...

Soap-film coating: High-speed deposition of multilayer nanofilms

PubMed Central

Zhang, Renyun; Andersson, Henrik A.; Andersson, Mattias; Andres, Britta; Edlund, Håkan; Edström, Per; Edvardsson, Sverker; Forsberg, Sven; Hummelgård, Magnus; Johansson, Niklas; Karlsson, Kristoffer; Nilsson, Hans-Erik; Norgren, Magnus; Olsen, Martin; Uesaka, Tetsu; Öhlund, Thomas; Olin, Håkan

2013-01-01

The coating of thin films is applied in numerous fields and many methods are employed for the deposition of these films. Some coating techniques may deposit films at high speed; for example, ordinary printing paper is coated with micrometre-thick layers of clay at a speed of tens of meters per second. However, to coat nanometre thin films at high speed, vacuum techniques are typically required, which increases the complexity of the process. Here, we report a simple wet chemical method for the high-speed coating of films with thicknesses at the nanometre level. This soap-film coating technique is based on forcing a substrate through a soap film that contains nanomaterials. Molecules and nanomaterials can be deposited at a thickness ranging from less than a monolayer to several layers at speeds up to meters per second. We believe that the soap-film coating method is potentially important for industrial-scale nanotechnology. PMID:23503102

High-speed microjet generation using laser-induced vapor bubbles

NASA Astrophysics Data System (ADS)

Oudalov, Nikolai; Tagawa, Yoshiyuki; Peters, Ivo; Visser, Claas-Willem; van der Meer, Devaraj; Prosperetti, Andrea; Sun, Chao; Lohse, Detlef

2011-11-01

The generation and evolution of microjets are studied both experimentally and numerically. The jets are generated by focusing a laser pulse into a microscopic capillary tube (~50 μm) filled with water-based red dye. A vapor bubble is created instantly after shooting the laser (<1 μs), sending out a shockwave towards the curved free surface at which the high-speed microjet forms. The process of jet formation is captured using high-speed recordings at 1.0 × 106 fps. The velocity of the microjets can reach speeds of ~850 m/s while maintaining a very sharp geometry. The high-speed recordings enable us to study the effect of several parameters on the jet velocity, e.g. the absorbed energy and the distance between the laser spot and the free surface.The results show a clear dependence on these variables, even for supersonic speeds. Comparisons with numerical simulations confirm the nature of these dependencies.

DIVERSITY in binding, regulation, and evolution revealed from high-throughput ChIP.

PubMed

Mitra, Sneha; Biswas, Anushua; Narlikar, Leelavati

2018-04-01

Genome-wide in vivo protein-DNA interactions are routinely mapped using high-throughput chromatin immunoprecipitation (ChIP). ChIP-reported regions are typically investigated for enriched sequence-motifs, which are likely to model the DNA-binding specificity of the profiled protein and/or of co-occurring proteins. However, simple enrichment analyses can miss insights into the binding-activity of the protein. Note that ChIP reports regions making direct contact with the protein as well as those binding through intermediaries. For example, consider a ChIP experiment targeting protein X, which binds DNA at its cognate sites, but simultaneously interacts with four other proteins. Each of these proteins also binds to its own specific cognate sites along distant parts of the genome, a scenario consistent with the current view of transcriptional hubs and chromatin loops. Since ChIP will pull down all X-associated regions, the final reported data will be a union of five distinct sets of regions, each containing binding sites of one of the five proteins, respectively. Characterizing all five different motifs and the corresponding sets is important to interpret the ChIP experiment and ultimately, the role of X in regulation. We present diversity which attempts exactly this: it partitions the data so that each partition can be characterized with its own de novo motif. Diversity uses a Bayesian approach to identify the optimal number of motifs and the associated partitions, which together explain the entire dataset. This is in contrast to standard motif finders, which report motifs individually enriched in the data, but do not necessarily explain all reported regions. We show that the different motifs and associated regions identified by diversity give insights into the various complexes that may be forming along the chromatin, something that has so far not been attempted from ChIP data. Webserver at http://diversity.ncl.res.in/; standalone (Mac OS X/Linux) from https

Lab-on-a-chip modules for detection of highly pathogenic bacteria: from sample preparation to detection

NASA Astrophysics Data System (ADS)

Julich, S.; Kopinč, R.; Hlawatsch, N.; Moche, C.; Lapanje, A.; Gärtner, C.; Tomaso, H.

2014-05-01

Lab-on-a-chip systems are innovative tools for the detection and identification of microbial pathogens in human and veterinary medicine. The major advantages are small sample volume and a compact design. Several fluidic modules have been developed to transform analytical procedures into miniaturized scale including sampling, sample preparation, target enrichment, and detection procedures. We present evaluation data for single modules that will be integrated in a chip system for the detection of pathogens. A microfluidic chip for purification of nucleic acids was established for cell lysis using magnetic beads. This assay was evaluated with spiked environmental aerosol and swab samples. Bacillus thuringiensis was used as simulant for Bacillus anthracis, which is closely related but non-pathogenic for humans. Stationary PCR and a flow-through PCR chip module were investigated for specific detection of six highly pathogenic bacteria. The conventional PCR assays could be transferred into miniaturized scale using the same temperature/time profile. We could demonstrate that the microfluidic chip modules are suitable for the respective purposes and are promising tools for the detection of bacterial pathogens. Future developments will focus on the integration of these separate modules to an entire lab-on-a-chip system.

Ethernet-based smart networked elements (sensors and actuators)

NASA Astrophysics Data System (ADS)

Mata, Carlos T.; Perotti, José M.; Oostdyk, Rebecca L.; Lucena, Angel

2006-05-01

This paper outlines the present design approach for the Ethernet-Based Smart Networked Elements (SNE) being developed by NASA's Instrumentation Branch and the Advanced Electronics and Technology Development Laboratory of ASRC Aerospace Corporation at Kennedy Space Center (KSC). The SNEs are being developed as part of the Integrated Intelligent Health Management System (IIHMS), jointly developed by Stennis Space Center (SSC), KSC, and Marshall Space Flight Center (MSFC). SNEs are sensors/actuators with embedded intelligence, capable of networking among themselves and with higher-level systems (external processors and controllers) to provide not only instrumentation data but also associated data validity qualifiers. NASA KSC has successfully developed and preliminarily demonstrated this new generation of SNEs. SNEs that collect pressure, strain, and temperature measurements (including cryogenic temperature ranges) have been developed and tested in the laboratory and are ready for demonstration in the field.

Introduction of the M-85 high-speed rotorcraft concept

NASA Technical Reports Server (NTRS)

Stroub, Robert H.

1991-01-01

As a result of studying possible requirements for high-speed rotorcraft and studying many high-speed concepts, a new high-speed rotorcraft concept, designated as M-85, was derived. The M-85 is a helicopter that is reconfigured to a fixed-wing aircraft for high-speed cruise. The concept was derived as an approach to enable smooth, stable conversion between fixed-wing and rotary-wing while retaining hover and low-speed flight characteristics of a low disk loading helicopter. The name, M-85, reflects the high-speed goals of 0.85 Mach number at high altitude. For a high-speed rotorcraft, it is expected that a viable concept must be a cruise-efficient, fixed-wing aircraft so it may be attractive for a multiplicity of missions. It is also expected that a viable high-speed rotorcraft concept must be cruise efficient first and secondly, efficient in hover. What makes the M-85 unique is the large circular hub fairing that is large enough to support the aircraft during conversion between rotary-wind and fixed-wing modes. With the aircraft supported by this hub fairing, the rotor blades can be unloaded during the 100 percent change in rotor rpm. With the blades unloaded, the potential for vibratory loads would be lessened. In cruise, the large circular hub fairing would be part of the lifting system with additional lifting panels deployed for better cruise efficiency. In hover, the circular hub fairing would slightly reduce lift potential and/or decrease hover efficiency of the rotor system. The M-85 concept is described and estimated forward flight performance characteristics are presented in terms of thrust requirements and L/D with airspeed. The forward flight performance characteristics reflect recent completed wind tunnel tests of the wing concept. Also presented is a control system technique that is critical to achieving low oscillatory loads in rotary-wing mode. Hover characteristics, C(sub p) versus C(sub T) from test data, is discussed. Other techniques pertinent to

Videoconferencing Comes of Age.

ERIC Educational Resources Information Center

Bosak, Steve

2000-01-01

Hundreds of districts are using high-speed videoconferencing for distance learning and resource sharing, inservice training, and districtwide meetings. Speed matters. Districts will need either Ethernet or ATM (asynchronous transfer mode) forms of wide-area networks to connect schools and offices. (MLH)

Thermomechanical simulations and experimental validation for high speed incremental forming

NASA Astrophysics Data System (ADS)

Ambrogio, Giuseppina; Gagliardi, Francesco; Filice, Luigino; Romero, Natalia

2016-10-01

Incremental sheet forming (ISF) consists in deforming only a small region of the workspace through a punch driven by a NC machine. The drawback of this process is its slowness. In this study, a high speed variant has been investigated from both numerical and experimental points of view. The aim has been the design of a FEM model able to perform the material behavior during the high speed process by defining a thermomechanical model. An experimental campaign has been performed by a CNC lathe with high speed to test process feasibility. The first results have shown how the material presents the same performance than in conventional speed ISF and, in some cases, better material behavior due to the temperature increment. An accurate numerical simulation has been performed to investigate the material behavior during the high speed process confirming substantially experimental evidence.

High Speed Photomicrography

NASA Astrophysics Data System (ADS)

Hyzer, William G.

1983-03-01

One of the most challenging areas in applying high-speed photography and videography in the plant and laboratory is in the recording of rapid events at macro and microscopic scales. Depth of field, exposure efficiency, working distance, and required exposure time are all reduced as optical magnification is increased, which severely taxes the skill and ingenuity of workers interested in recording any fast moving phenomena through the microscope or with magnifying lenses. This paper defines the problems inherent in photographing within macro and microscopic ranges and offers a systematic approach to optimizing the selection of equipment and choice of applicable techniques.

Material requirements for the High Speed Civil Transport

NASA Technical Reports Server (NTRS)

Stephens, Joseph R.; Hecht, Ralph J.; Johnson, Andrew M.

1993-01-01

Under NASA-sponsored High Speed Research (HSR) programs, the materials and processing requirements have been identified for overcoming the environmental and economic barriers of the next generation High Speed Civil Transport (HSCT) propulsion system. The long (2 to 5 hours) supersonic cruise portion of the HSCT cycle will place additional durability requirements on all hot section engine components. Low emissions combustor designs will require high temperature ceramic matrix composite liners to meet an emission goal of less than 5g NO(x) per Kg fuel burned. Large axisymmetric and two-dimensional exhaust nozzle designs are now under development to meet or exceed FAR 36 Stage III noise requirements, and will require lightweight, high temperature metallic, intermetallic, and ceramic matrix composites to reduce nozzle weight and meet structural and acoustic component performance goals. This paper describes and discusses the turbomachinery, combustor, and exhaust nozzle requirements of the High Speed Civil Transport propulsion system.

Addressing On-Chip Power Converstion and Dissipation Issues in Many-Core System-on-a-Chip Based on Conventional Silicon and Emerging Nanotechnologies

NASA Astrophysics Data System (ADS)

Ashenafi, Emeshaw

regulator design very unattractive for SOC integration and multi-/many-core environments. To circumvent the challenges, three alternative techniques based on active circuit elements to replace the passive LC filter of the buck convertor are developed. The first inductorless on-chip switching voltage regulator architecture is based on a cascaded 2nd order multiple feedback (MFB) low-pass filter (LPF). This design has the ability to modulate to multiple voltage settings via pulse-with modulation (PWM). The second approach is a supplementary design utilizing a hybrid low drop-out scheme to lower the output ripple of the switching regulator over a wider frequency range. The third design approach allows the integration of an entire power management system within a single chipset by combining a highly efficient switching regulator with an intermittently efficient linear regulator (area efficient), for robust and highly efficient on-chip regulation. The static power (Pstatic) or subthreshold leakage power (Pleak) increases with technology scaling. To mitigate static power dissipation, power gating techniques are implemented. Power gating is one of the popular methods to manage leakage power during standby periods in low-power high-speed IC design. It works by using transistor based switches to shut down part of the circuit block and put them in the idle mode. The efficiency of a power gating scheme involves minimum Ioff and high Ion for the sleep transistor. A conventional sleep transistor circuit design requires an additional header, footer, or both switches to turn off the logic block. This additional transistor causes signal delay and increases the chip area. We propose two innovative designs for next generation sleep transistor designs. For an above threshold operation, we present a sleep transistor design based on fully depleted silicon-on-insulator (FDSOI) device. For a subthreshold circuit operation, we implement a sleep transistor utilizing the newly developed silicon

Evaluating safety and operation of high-speed intersections.

DOT National Transportation Integrated Search

2010-03-01

This Final Report reviews a research effort to evaluate the safety and operations of high-speed intersections in the State of : Oregon. In particular, this research effort focuses on four-leg, signalized intersections with speed limits of 45 mph or :...

High-speed AFM and the reduction of tip-sample forces

NASA Astrophysics Data System (ADS)

Miles, Mervyn; Sharma, Ravi; Picco, Loren

High-speed DC-mode AFM has been shown to be routinely capable of imaging at video rate, and, if required, at over 1000 frames per second. At sufficiently high tip-sample velocities in ambient conditions, the tip lifts off the sample surface in a superlubricity process which reduces the level of shear forces imposed on the sample by the tip and therefore reduces the potential damage and distortion of the sample being imaged. High-frequency mechanical oscillations, both lateral and vertical, have been reported to reduced the tip-sample frictional forces. We have investigated the effect of combining linear high-speed scanning with these small amplitude high-frequency oscillations with the aim of reducing further the force interaction in high-speed imaging. Examples of this new version of high-speed AFM imaging will be presented for biological samples.

High-Speed TCP Testing

NASA Technical Reports Server (NTRS)

Brooks, David E.; Gassman, Holly; Beering, Dave R.; Welch, Arun; Hoder, Douglas J.; Ivancic, William D.

1999-01-01

Transmission Control Protocol (TCP) is the underlying protocol used within the Internet for reliable information transfer. As such, there is great interest to have all implementations of TCP efficiently interoperate. This is particularly important for links exhibiting long bandwidth-delay products. The tools exist to perform TCP analysis at low rates and low delays. However, for extremely high-rate and lone-delay links such as 622 Mbps over geosynchronous satellites, new tools and testing techniques are required. This paper describes the tools and techniques used to analyze and debug various TCP implementations over high-speed, long-delay links.

Wideband quad optical sensor for high-speed sub-nanometer interferometry.

PubMed

Riobo, L M; Veiras, F E; Sorichetti, P A; Garea, M T

2017-01-20

This paper describes the design and performance of a low-noise and high-speed optical sensor that provides two output signals in quadrature from the simultaneous detection of four phase-shifted interferograms. The sensor employs four high-speed photodiodes and high-speed, low-noise transimpedance amplifiers. The optical and electronic design was optimized for high-speed displacement measurement interferometry, over a broad range of operating frequencies. Compared to other experimental schemes, the sensor is simpler and of lower cost. The performance of the sensor is demonstrated by characterizing a piezoelectric transducer for ultrasonic applications. We measured displacements between 38 pm and 32 nm with 6% relative uncertainty, in the frequency range from 1 to 2 MHz.

Optimal design of high-speed loading spindle based on ABAQUS

NASA Astrophysics Data System (ADS)

Yang, Xudong; Dong, Yu; Ge, Qingkuan; Yang, Hai

2017-12-01

The three-dimensional model of high-speed loading spindle is established by using ABAQUS’s modeling module. A finite element analysis model of high-speed loading spindle was established by using spring element to simulate bearing boundary condition. The static and dynamic performance of the spindle structure with different specifications of the rectangular spline and the different diameter neck of axle are studied in depth, and the influence of different spindle span on the static and dynamic performance of the high-speed loading spindle is studied. Finally, the optimal structure of the high-speed loading spindle is obtained. The results provide a theoretical basis for improving the overall performance of the test-bed

Comprehensive surface treatment of high-speed steel tool

NASA Astrophysics Data System (ADS)

Fedorov, Sergey V.; Aleshin, Sergey V.; Swe, Min Htet; Abdirova, Raushan D.; Kapitanov, Alexey V.; Egorov, Sergey B.

2018-03-01

One of the promising directions of hardening of high-speed steel tool is the creation on their surface of the layered structures with the gradient of physic-chemical properties between the wear-resistant coatings to the base material. Among the methods of such surface modification, a special process takes place based on the use of pulsed high-intensity charged particle beams. The high speed of heating and cooling allows structural-phase transformations in the surface layer, which cannot be realized in a stationary mode. The treatment was conducted in a RITM-SP unit, which constitutes a combination of a source of low-energy high-current electron beams "RITM" and two magnetron spraying systems on a single vacuum chamber. The unit enables deposition of films on the surface of the desired product and subsequent liquid-phase mixing of materials of the film and the substrate by an intense pulse electron beam. The article discusses features of the structure of the subsurface layer of high-speed steel M2, modified by surface alloying of a low-energy high-current electron beam, and its effect on the wear resistance of the tool when dry cutting hard to machine Nickel alloy. A significant decrease of intensity of wear of high-speed steel with combined treatment happens due to the displacement of the zone of wear and decrease the radius of rounding of the cutting edge because of changes in conditions of interaction with the material being treated.

36 CFR § 1192.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2013 CFR

2013-07-01

... 36 Parks, Forests, and Public Property 3 2013-07-01 2012-07-01 true High-speed rail cars... TRANSPORTATION VEHICLES Other Vehicles and Systems § 1192.175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including but not limited to those using “maglev” or high speed...

A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier.

PubMed

Lioe, De Xing; Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

2016-04-13

A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF) and switched-capacitor (SC) integrator with a fully CMOS differential amplifier. AC (modulated) components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated) components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise) components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10(-)⁵ is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed.

High-speed railway signal trackside equipment patrol inspection system

NASA Astrophysics Data System (ADS)

Wu, Nan

2018-03-01

High-speed railway signal trackside equipment patrol inspection system comprehensively applies TDI (time delay integration), high-speed and highly responsive CMOS architecture, low illumination photosensitive technique, image data compression technique, machine vision technique and so on, installed on high-speed railway inspection train, and achieves the collection, management and analysis of the images of signal trackside equipment appearance while the train is running. The system will automatically filter out the signal trackside equipment images from a large number of the background image, and identify of the equipment changes by comparing the original image data. Combining with ledger data and train location information, the system accurately locate the trackside equipment, conscientiously guiding maintenance.

49 CFR 38.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 1 2011-10-01 2011-10-01 false High-speed rail cars, monorails and systems. 38....175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including... for high-platform, level boarding and shall comply with § 38.111(a) of this part for each type of car...

49 CFR 38.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 49 Transportation 1 2014-10-01 2014-10-01 false High-speed rail cars, monorails and systems. 38....175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including... for high-platform, level boarding and shall comply with § 38.111(a) of this part for each type of car...

49 CFR 38.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 49 Transportation 1 2013-10-01 2013-10-01 false High-speed rail cars, monorails and systems. 38....175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including... for high-platform, level boarding and shall comply with § 38.111(a) of this part for each type of car...

49 CFR 38.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 1 2010-10-01 2010-10-01 false High-speed rail cars, monorails and systems. 38....175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including... for high-platform, level boarding and shall comply with § 38.111(a) of this part for each type of car...

49 CFR 38.175 - High-speed rail cars, monorails and systems.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 49 Transportation 1 2012-10-01 2012-10-01 false High-speed rail cars, monorails and systems. 38....175 High-speed rail cars, monorails and systems. (a) All cars for high-speed rail systems, including... for high-platform, level boarding and shall comply with § 38.111(a) of this part for each type of car...

Optical RAM-enabled cache memory and optical routing for chip multiprocessors: technologies and architectures

NASA Astrophysics Data System (ADS)

Pleros, Nikos; Maniotis, Pavlos; Alexoudi, Theonitsa; Fitsios, Dimitris; Vagionas, Christos; Papaioannou, Sotiris; Vyrsokinos, K.; Kanellos, George T.

2014-03-01

The processor-memory performance gap, commonly referred to as "Memory Wall" problem, owes to the speed mismatch between processor and electronic RAM clock frequencies, forcing current Chip Multiprocessor (CMP) configurations to consume more than 50% of the chip real-estate for caching purposes. In this article, we present our recent work spanning from Si-based integrated optical RAM cell architectures up to complete optical cache memory architectures for Chip Multiprocessor configurations. Moreover, we discuss on e/o router subsystems with up to Tb/s routing capacity for cache interconnection purposes within CMP configurations, currently pursued within the FP7 PhoxTrot project.

Driver speed selection on high-speed two-lane highways: Comparing speed profiles between uniform and differential speed limits.

PubMed

Russo, Brendan J; Savolainen, Peter T; Gates, Timothy J; Kay, Jonathan J; Frazier, Sterling

2017-07-04

Although a considerable amount of prior research has investigated the impacts of speed limits on traffic safety and operations, much of this research, and nearly all of the research related to differential speed limits, has been specific to limited access freeways. The unique safety and operational issues on highways without access control create difficulty relating the conclusions from prior freeway-related speed limit research to 2-lane highways, particularly research on differential limits due to passing limitations and subsequent queuing. Therefore, the objective of this study was to assess differences in driver speed selection with respect to the posted speed limit on rural 2-lane highways, with a particular emphasis on the differences between uniform and differential speed limits. Data were collected from nearly 59,000 vehicles across 320 sites in Montana and 4 neighboring states. Differences in mean speeds, 85th percentile speeds, and the standard deviation in speeds for free-flowing vehicles were examined across these sites using ordinary least squares regression models. Ultimately, the results of the analysis show that the mean speed, 85th percentile speed, and variability in travel speeds for free-flowing vehicles on 2-lane highways are generally lower at locations with uniform 65 mph speed limits, compared to locations with differential limits of 70 mph for cars and 60 mph for trucks. In addition to posted speed limits, several site characteristics were shown to influence speed selection including shoulder widths, frequency of horizontal curves, percentage of the segment that included no passing zones, and hourly volumes. Differences in vehicle speed characteristics were also observed between states, indicating that speed selection may also be influenced by local factors, such as driver population or enforcement.

Laryngeal High-Speed Videoendoscopy: Rationale and Recommendation for Accurate and Consistent Terminology

PubMed Central

Deliyski, Dimitar D.; Hillman, Robert E.

2015-01-01

Purpose The authors discuss the rationale behind the term laryngeal high-speed videoendoscopy to describe the application of high-speed endoscopic imaging techniques to the visualization of vocal fold vibration. Method Commentary on the advantages of using accurate and consistent terminology in the field of voice research is provided. Specific justification is described for each component of the term high-speed videoendoscopy, which is compared and contrasted with alternative terminologies in the literature. Results In addition to the ubiquitous high-speed descriptor, the term endoscopy is necessary to specify the appropriate imaging technology and distinguish among modalities such as ultrasound, magnetic resonance imaging, and nonendoscopic optical imaging. Furthermore, the term video critically indicates the electronic recording of a sequence of optical still images representing scenes in motion, in contrast to strobed images using high-speed photography and non-optical high-speed magnetic resonance imaging. High-speed videoendoscopy thus concisely describes the technology and can be appended by the desired anatomical nomenclature such as laryngeal. Conclusions Laryngeal high-speed videoendoscopy strikes a balance between conciseness and specificity when referring to the typical high-speed imaging method performed on human participants. Guidance for the creation of future terminology provides clarity and context for current and future experiments and the dissemination of results among researchers. PMID:26375398

Pulse-burst PIV in a high-speed wind tunnel

NASA Astrophysics Data System (ADS)

Beresh, Steven; Kearney, Sean; Wagner, Justin; Guildenbecher, Daniel; Henfling, John; Spillers, Russell; Pruett, Brian; Jiang, Naibo; Slipchenko, Mikhail; Mance, Jason; Roy, Sukesh

2015-09-01

Time-resolved particle image velocimetry (TR-PIV) has been achieved in a high-speed wind tunnel, providing velocity field movies of compressible turbulence events. The requirements of high-speed flows demand greater energy at faster pulse rates than possible with the TR-PIV systems developed for low-speed flows. This has been realized using a pulse-burst laser to obtain movies at up to 50 kHz, with higher speeds possible at the cost of spatial resolution. The constraints imposed by use of a pulse-burst laser are limited burst duration of 10.2 ms and a low duty cycle for data acquisition. Pulse-burst PIV has been demonstrated in a supersonic jet exhausting into a transonic crossflow and in transonic flow over a rectangular cavity. The velocity field sequences reveal the passage of turbulent structures and can be used to find velocity power spectra at every point in the field, providing spatial distributions of acoustic modes. The present work represents the first use of TR-PIV in a high-speed ground-test facility.

Advanced superposition methods for high speed turbopump vibration analysis

NASA Technical Reports Server (NTRS)

Nielson, C. E.; Campany, A. D.

1981-01-01

The small, high pressure Mark 48 liquid hydrogen turbopump was analyzed and dynamically tested to determine the cause of high speed vibration at an operating speed of 92,400 rpm. This approaches the design point operating speed of 95,000 rpm. The initial dynamic analysis in the design stage and subsequent further analysis of the rotor only dynamics failed to predict the vibration characteristics found during testing. An advanced procedure for dynamics analysis was used in this investigation. The procedure involves developing accurate dynamic models of the rotor assembly and casing assembly by finite element analysis. The dynamically instrumented assemblies are independently rap tested to verify the analytical models. The verified models are then combined by modal superposition techniques to develop a completed turbopump model where dynamic characteristics are determined. The results of the dynamic testing and analysis obtained are presented and methods of moving the high speed vibration characteristics to speeds above the operating range are recommended. Recommendations for use of these advanced dynamic analysis procedures during initial design phases are given.

HPLC-Chip/MS Technology in Proteomic Profiling

NASA Astrophysics Data System (ADS)

Vollmer, Martin; van de Goor, Tom

HPLC-chip/MS is a novel nanoflow analytical technology conducted on a microfabricated chip that allows for highly efficient HPLC separation and superior sensitive MS detection of complex proteomic mixtures. This is possible through on-chip preconcentration and separation with fluidic connection made automatically in a leak-tight fashion. Minimum precolumn and postcolumn peak dispersion and uncompromised ease of use result in compounds eluting in bands of only a few nanoliters. The chip is fabricated out of bio-inert polyimide-containing channels and integrated chip structures, such as an electrospray emitter, columns, and frits manufactured by laser ablation technology. Meanwhile, a variety of HPLC-chips differing in design and stationary phase are commercially available, which provide a comprehensive solution for applications in proteomics, glycomics, biomarker, and pharmaceutical discovery. The HPLC-chip can also be easily integrated into a multidimensional separation workflow where different orthogonal separation techniques are combined to solve a highly complex separation problems. In this chapter, we describe in detail the methodological chip usage and functionality and its application in the elucidation of the protein profile of human nucleoli.

Development of a 300,000-pixel ultrahigh-speed high-sensitivity CCD

NASA Astrophysics Data System (ADS)

Ohtake, H.; Hayashida, T.; Kitamura, K.; Arai, T.; Yonai, J.; Tanioka, K.; Maruyama, H.; Etoh, T. Goji; Poggemann, D.; Ruckelshausen, A.; van Kuijk, H.; Bosiers, Jan T.

2006-02-01

We are developing an ultrahigh-speed, high-sensitivity broadcast camera that is capable of capturing clear, smooth slow-motion videos even where lighting is limited, such as at professional baseball games played at night. In earlier work, we developed an ultrahigh-speed broadcast color camera1) using three 80,000-pixel ultrahigh-speed, highsensitivity CCDs2). This camera had about ten times the sensitivity of standard high-speed cameras, and enabled an entirely new style of presentation for sports broadcasts and science programs. Most notably, increasing the pixel count is crucially important for applying ultrahigh-speed, high-sensitivity CCDs to HDTV broadcasting. This paper provides a summary of our experimental development aimed at improving the resolution of CCD even further: a new ultrahigh-speed high-sensitivity CCD that increases the pixel count four-fold to 300,000 pixels.

High throughput on-chip analysis of high-energy charged particle tracks using lensfree imaging

DOE Office of Scientific and Technical Information (OSTI.GOV)

Luo, Wei; Shabbir, Faizan; Gong, Chao

2015-04-13

We demonstrate a high-throughput charged particle analysis platform, which is based on lensfree on-chip microscopy for rapid ion track analysis using allyl diglycol carbonate, i.e., CR-39 plastic polymer as the sensing medium. By adopting a wide-area opto-electronic image sensor together with a source-shifting based pixel super-resolution technique, a large CR-39 sample volume (i.e., 4 cm × 4 cm × 0.1 cm) can be imaged in less than 1 min using a compact lensfree on-chip microscope, which detects partially coherent in-line holograms of the ion tracks recorded within the CR-39 detector. After the image capture, using highly parallelized reconstruction and ion track analysis algorithms running on graphics processingmore » units, we reconstruct and analyze the entire volume of a CR-39 detector within ∼1.5 min. This significant reduction in the entire imaging and ion track analysis time not only increases our throughput but also allows us to perform time-resolved analysis of the etching process to monitor and optimize the growth of ion tracks during etching. This computational lensfree imaging platform can provide a much higher throughput and more cost-effective alternative to traditional lens-based scanning optical microscopes for ion track analysis using CR-39 and other passive high energy particle detectors.« less

Highly Sensitive, Label-Free Detection of 2,4-Dichlorophenoxyacetic Acid Using an Optofluidic Chip.

PubMed

Feng, Xueling; Zhang, Gong; Chin, Lip Ket; Liu, Ai Qun; Liedberg, Bo

2017-07-28

A highly sensitive approach for rapid and label-free detection of the herbicide 2,4-dichlorophenoxyacetic acid (2,4-D) using an optofluidic chip is demonstrated. The optofluidic chip is prepared by covalent immobilization of 2,4-D-bovine serum albumin (2,4-D-BSA) conjugate to an integrated microring resonator. Subsequent detection of 2,4-D carried out in a competitive immunoreaction format enables selective detection of 2,4-D in different types of water samples, including bottled, tap, and lake water, at a limit of detection (LOD) of 4.5 pg/mL and in a quantitative range of 15-10 5 pg/mL. The microring resonator-based optofluidic chip is reusable with ultrahigh sensitivity that offers real-time and on-site detection of low-molecular-weight targets for potential applications in food safety and environmental monitoring.

Noise in the passenger cars of high-speed trains.

PubMed

Hong, Joo Young; Cha, Yongwon; Jeon, Jin Yong

2015-12-01

The aim of this study is to investigate the effects of both room acoustic conditions and spectral characteristics of noises on acoustic discomfort in a high-speed train's passenger car. Measurement of interior noises in a high-speed train was performed when the train was operating at speeds of 100 km/h and 300 km/h. Acoustic discomfort caused by interior noises was evaluated by paired comparison methods based on the variation of reverberation time (RT) in a passenger car and the spectral differences in interior noises. The effect of RT on acoustic discomfort was not significant, whereas acoustic discomfort significantly varied depending on spectral differences in noise. Acoustic discomfort increased with increment of the sound pressure level (SPL) ratio at high frequencies, and variation in high-frequency noise components were described using sharpness. Just noticeable differences of SPL with low- and high-frequency components were determined to be 3.7 and 2.9 dB, respectively. This indicates that subjects were more sensitive to differences in SPLs at the high-frequency range than differences at the low-frequency range. These results support that, for interior noises, reduction in SPLs at high frequencies would significantly contribute to improved acoustic quality in passenger cars of high-speed trains.

Time Triggered Ethernet System Testing Means and Method

NASA Technical Reports Server (NTRS)

Smithgall, William Todd (Inventor); Hall, Brendan (Inventor); Varadarajan, Srivatsan (Inventor)

2014-01-01

Methods and apparatus are provided for evaluating the performance of a Time Triggered Ethernet (TTE) system employing Time Triggered (TT) communication. A real TTE system under test (SUT) having real input elements communicating using TT messages with output elements via one or more first TTE switches during a first time interval schedule established for the SUT. A simulation system is also provided having input simulators that communicate using TT messages via one or more second TTE switches with the same output elements during a second time interval schedule established for the simulation system. The first and second time interval schedules are off-set slightly so that messages from the input simulators, when present, arrive at the output elements prior to messages from the analogous real inputs, thereby having priority over messages from the real inputs and causing the system to operate based on the simulated inputs when present.

Research on natural frequency based on modal test for high speed vehicles

NASA Astrophysics Data System (ADS)

Ma, Guangsong; He, Guanglin; Guo, Yachao

2018-04-01

High speed vehicle as a vibration system, resonance generated in flight may be harmful to high speed vehicles. It is possible to solve the resonance problem by acquiring the natural frequency of the high-speed aircraft and then taking some measures to avoid the natural frequency of the high speed vehicle. Therefore, In this paper, the modal test of the high speed vehicle was carried out by using the running hammer method and the PolyMAX modal parameter identification method. Firstly, the total frequency response function, coherence function of the high speed vehicle are obtained by the running hammer stimulation test, and through the modal assurance criterion (MAC) to determine the accuracy of the estimated parameters. Secondly, the first three order frequencies, the pole steady state diagram of the high speed vehicles is obtained by the PolyMAX modal parameter identification method. At last, the natural frequency of the vibration system was accurately obtained by the running hammer method.

High speed magneto-resistive random access memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor)

1992-01-01

A high speed read MRAM memory element is configured from a sandwich of magnetizable, ferromagnetic film surrounding a magneto-resistive film which may be ferromagnetic or not. One outer ferromagnetic film has a higher coercive force than the other and therefore remains magnetized in one sense while the other may be switched in sense by a switching magnetic field. The magneto-resistive film is therefore sensitive to the amplitude of the resultant field between the outer ferromagnetic films and may be constructed of a high resistivity, high magneto-resistive material capable of higher sensing currents. This permits higher read voltages and therefore faster read operations. Alternate embodiments with perpendicular anisotropy, and in-plane anisotropy are shown, including an embodiment which uses high permeability guides to direct the closing flux path through the magneto-resistive material. High density, high speed, radiation hard, memory matrices may be constructed from these memory elements.

Quiet High-Speed Fan

NASA Technical Reports Server (NTRS)

Lieber, Lysbeth; Repp, Russ; Weir, Donald S.

1996-01-01

A calibration of the acoustic and aerodynamic prediction methods was performed and a baseline fan definition was established and evaluated to support the quiet high speed fan program. A computational fluid dynamic analysis of the NASA QF-12 Fan rotor, using the DAWES flow simulation program was performed to demonstrate and verify the causes of the relatively poor aerodynamic performance observed during the fan test. In addition, the rotor flowfield characteristics were qualitatively compared to the acoustic measurements to identify the key acoustic characteristics of the flow. The V072 turbofan source noise prediction code was used to generate noise predictions for the TFE731-60 fan at three operating conditions and compared to experimental data. V072 results were also used in the Acoustic Radiation Code to generate far field noise for the TFE731-60 nacelle at three speed points for the blade passage tone. A full 3-D viscous flow simulation of the current production TFE731-60 fan rotor was performed with the DAWES flow analysis program. The DAWES analysis was used to estimate the onset of multiple pure tone noise, based on predictions of inlet shock position as a function of the rotor tip speed. Finally, the TFE731-60 fan rotor wake structure predicted by the DAWES program was used to define a redesigned stator with the leading edge configured to minimize the acoustic effects of rotor wake / stator interaction, without appreciably degrading performance.

Influence of “J”-Curve Spring Stiffness on Running Speeds of Segmented Legs during High-Speed Locomotion

PubMed Central

2016-01-01

Both the linear leg spring model and the two-segment leg model with constant spring stiffness have been broadly used as template models to investigate bouncing gaits for legged robots with compliant legs. In addition to these two models, the other stiffness leg spring models developed using inspiration from biological characteristic have the potential to improve high-speed running capacity of spring-legged robots. In this paper, we investigate the effects of “J”-curve spring stiffness inspired by biological materials on running speeds of segmented legs during high-speed locomotion. Mathematical formulation of the relationship between the virtual leg force and the virtual leg compression is established. When the SLIP model and the two-segment leg model with constant spring stiffness and with “J”-curve spring stiffness have the same dimensionless reference stiffness, the two-segment leg model with “J”-curve spring stiffness reveals that (1) both the largest tolerated range of running speeds and the tolerated maximum running speed are found and (2) at fast running speed from 25 to 40/92 m s−1 both the tolerated range of landing angle and the stability region are the largest. It is suggested that the two-segment leg model with “J”-curve spring stiffness is more advantageous for high-speed running compared with the SLIP model and with constant spring stiffness. PMID:28018127

High Speed Research Program Sonic Fatigue

NASA Technical Reports Server (NTRS)

Rizzi, Stephen A. (Technical Monitor); Beier, Theodor H.; Heaton, Paul

2005-01-01

The objective of this sonic fatigue summary is to provide major findings and technical results of studies, initiated in 1994, to assess sonic fatigue behavior of structure that is being considered for the High Speed Civil Transport (HSCT). High Speed Research (HSR) program objectives in the area of sonic fatigue were to predict inlet, exhaust and boundary layer acoustic loads; measure high cycle fatigue data for materials developed during the HSR program; develop advanced sonic fatigue calculation methods to reduce required conservatism in airframe designs; develop damping techniques for sonic fatigue reduction where weight effective; develop wing and fuselage sonic fatigue design requirements; and perform sonic fatigue analyses on HSCT structural concepts to provide guidance to design teams. All goals were partially achieved, but none were completed due to the premature conclusion of the HSR program. A summary of major program findings and recommendations for continued effort are included in the report.

Design of the low-speed NLF(1)-0414F and the high-speed HSNLF(1)-0213 airfoils with high-lift systems

NASA Technical Reports Server (NTRS)

Viken, Jeffrey K.; Watson-Viken, Sally A.; Pfenninger, Werner; Morgan, Harry L., Jr.; Campbell, Richard L.

1987-01-01

The design and testing of Natural Laminar Flow (NLF) airfoils is examined. The NLF airfoil was designed for low speed, having a low profile drag at high chord Reynolds numbers. The success of the low speed NLF airfoil sparked interest in a high speed NLF airfoil applied to a single engine business jet with an unswept wing. Work was also conducted on the two dimensional flap design. The airfoil was decambered by removing the aft loading, however, high design Mach numbers are possible by increasing the aft loading and reducing the camber overall on the airfoil. This approach would also allow for flatter acceleration regions which are more stabilizing for cross flow disturbances. Sweep could then be used to increase the design Mach number to a higher value also. There would be some degradation of high lift by decambering the airfoil overall, and this aspect would have to be considered in a final design.

Remote Transmission at High Speed

NASA Technical Reports Server (NTRS)

2003-01-01

Omni and NASA Test Operations at Stennis entered a Dual-Use Agreement to develop the FOTR-125, a 125 megabit-per-second fiber-optic transceiver that allows accurate digital recordings over a great distance. The transceiver s fiber-optic link can be as long as 25 kilometers. This makes it much longer than the standard coaxial link, which can be no longer than 50 meters.The FOTR-125 utilizes laser diode transmitter modules and integrated receivers for the optical interface. Two transmitters and two receivers are employed at each end of the link with automatic or manual switchover to maximize the reliability of the communications link. NASA uses the transceiver in Stennis High-Speed Data Acquisition System (HSDAS). The HSDAS consists of several identical systems installed on the Center s test stands to process all high-speed data related to its propulsion test programs. These transceivers allow the recorder and HSDAS controls to be located in the Test Control Center in a remote location while the digitizer is located on the test stand.

ACTS High-Speed VSAT Demonstrated

NASA Technical Reports Server (NTRS)

Tran, Quang K.

1999-01-01

The Advanced Communication Technology Satellite (ACTS) developed by NASA has demonstrated the breakthrough technologies of Ka-band transmission, spot-beam antennas, and onboard processing. These technologies have enabled the development of very small and ultrasmall aperture terminals (VSAT s and USAT's), which have capabilities greater than have been possible with conventional satellite technologies. The ACTS High Speed VSAT (HS VSAT) is an effort at the NASA Glenn Research Center at Lewis Field to experimentally demonstrate the maximum user throughput data rate that can be achieved using the technologies developed and implemented on ACTS. This was done by operating the system uplinks as frequency division multiple access (FDMA), essentially assigning all available time division multiple access (TDMA) time slots to a single user on each of two uplink frequencies. Preliminary results show that, using a 1.2-m antenna in this mode, the High Speed VSAT can achieve between 22 and 24 Mbps of the 27.5 Mbps burst rate, for a throughput efficiency of 80 to 88 percent.

Tuning carrier lifetime in InGaN/GaN LEDs via strain compensation for high-speed visible light communication

PubMed Central

Du, Chunhua; Huang, Xin; Jiang, Chunyan; Pu, Xiong; Zhao, Zhenfu; Jing, Liang; Hu, Weiguo; Wang, Zhong Lin

2016-01-01

In recent years, visible light communication (VLC) technology has attracted intensive attention due to its huge potential in superior processing ability and fast data transmission. The transmission rate relies on the modulation bandwidth, which is predominantly determined by the minority-carrier lifetime in III-group nitride semiconductors. In this paper, the carrier dynamic process under a stress field was studied for the first time, and the carrier recombination lifetime was calculated within the framework of quantum perturbation theory. Owing to the intrinsic strain due to the lattice mismatch between InGaN and GaN, the wave functions for the holes and electrons are misaligned in an InGaN/GaN device. By applying an external strain that “cancels” the internal strain, the overlap between the wave functions can be maximized so that the lifetime of the carrier is greatly reduced. As a result, the maximum speed of a single chip was increased from 54 MHz up to 117 MHz in a blue LED chip under 0.14% compressive strain. Finally, a bandwidth contour plot depending on the stress and operating wavelength was calculated to guide VLC chip design and stress optimization. PMID:27841368

Optimization of ultrahigh-speed multiplex PCR for forensic analysis.

PubMed

Gibson-Daw, Georgiana; Crenshaw, Karin; McCord, Bruce

2018-01-01

In this paper, we demonstrate the design and optimization of an ultrafast PCR amplification technique, used with a seven-locus multiplex that is compatible with conventional capillary electrophoresis systems as well as newer microfluidic chip devices. The procedure involves the use of a high-speed polymerase and a rapid cycling protocol to permit multiplex PCR amplification of forensic short tandem repeat loci in 6.5 min. We describe the selection and optimization of master mix reagents such as enzyme, buffer, MgCl 2 , and dNTPs, as well as primer ratios, total volume, and cycle conditions, in order to get the best profile in the shortest time possible. Sensitivity and reproducibility studies are also described. The amplification process utilizes a small high-speed thermocycler and compact laptop, making it portable and potentially useful for rapid, inexpensive on-site genotyping. The seven loci of the multiplex were taken from conventional STR genotyping kits and selected for their size and lack of overlap. Analysis was performed using conventional capillary electrophoresis and microfluidics with fluorescent detection. Overall, this technique provides a more rapid method for rapid sample screening of suspects and victims. Graphical abstract Rapid amplification of forensic DNA using high speed thermal cycling followed by capillary or microfluidic electrophoresis.

Graphene-Boron Nitride Heterostructure Based Optoelectronic Devices for On-Chip Optical Interconnects

NASA Astrophysics Data System (ADS)

Gao, Yuanda

Graphene has emerged as an appealing material for a variety of optoelectronic applications due to its unique electrical and optical characteristics. In this thesis, I will present recent advances in integrating graphene and graphene-boron nitride (BN) heterostructures with confined optical architectures, e.g. planar photonic crystal (PPC) nanocavities and silicon channel waveguides, to make this otherwise weakly absorbing material optically opaque. Based on these integrations, I will further demonstrate the resulting chip-integrated optoelectronic devices for optical interconnects. After transferring a layer of graphene onto PPC nanocavities, spectral selectivity at the resonance frequency and orders-of-magnitude enhancement of optical coupling with graphene have been observed in infrared spectrum. By applying electrostatic potential to graphene, electro-optic modulation of the cavity reflection is possible with contrast in excess of 10 dB. And furthermore, a novel and complex modulator device structure based on the cavity-coupled and BN-encapsulated dual-layer graphene capacitor is demonstrated to operate at a speed of 1.2 GHz. On the other hand, an enhanced broad-spectrum light-graphene interaction coupled with silicon channel waveguides is also demonstrated with ?0.1 dB/?m transmission attenuation due to graphene absorption. A waveguide-integrated graphene photodetector is fabricated and shown 0.1 A/W photoresponsivity and 20 GHz operation speed. An improved version of a similar photodetector using graphene-BN heterostructure exhibits 0.36 A/W photoresponsivity and 42 GHz response speed. The integration of graphene and graphene-BN heterostructures with nanophotonic architectures promises a new generation of compact, energy-efficient, high-speed optoelectronic device concepts for on-chip optical communications that are not yet feasible or very difficult to realize using traditional bulk semiconductors.

Radiated Sound of a High-Speed Water-Jet-Propelled Transportation Vessel.

PubMed

Rudd, Alexis B; Richlen, Michael F; Stimpert, Alison K; Au, Whitlow W L

2016-01-01

The radiated noise from a high-speed water-jet-propelled catamaran was measured for catamaran speeds of 12, 24, and 37 kn. The radiated noise increased with catamaran speed, although the shape of the noise spectrum was similar for all speeds and measuring hydrophone depth. The spectra peaked at ~200 Hz and dropped off continuously at higher frequencies. The radiated noise was 10-20 dB lower than noise from propeller-driven ships at comparable speeds. The combination of low radiated noise and high speed could be a factor in the detection and avoidance of water-jet-propelled ships by baleen whales.

High-speed OCT light sources and systems [Invited

PubMed Central

Klein, Thomas; Huber, Robert

2017-01-01

Imaging speed is one of the most important parameters that define the performance of optical coherence tomography (OCT) systems. During the last two decades, OCT speed has increased by over three orders of magnitude. New developments in wavelength-swept lasers have repeatedly been crucial for this development. In this review, we discuss the historical evolution and current state of the art of high-speed OCT systems, with focus on wavelength swept light sources and swept source OCT systems. PMID:28270988

High-speed flow visualization in hypersonic, transonic, and shock tube flows

NASA Astrophysics Data System (ADS)

Kleine, H.; Olivier, H.

2017-02-01

High-speed flow visualisation has played an important role in the investigations conducted at the Stoßwellenlabor of the RWTH Aachen University for many decades. In addition to applying the techniques of high-speed imaging, this laboratory has been actively developing new or enhanced visualisation techniques and approaches such as various schlieren methods or time-resolved Mach-Zehnder interferometry. The investigated high-speed flows are inherently highly transient, with flow Mach numbers ranging from about M = 0.7 to M = 8. The availability of modern high-speed cameras has allowed us to expand the investigations into problems where reduced reproducibility had so far limited the amount of information that could be extracted from a limited number of flow visualisation records. Following a brief historical overview, some examples of recent studies are given, which represent the breadth of applications in which high-speed imaging has been an essential diagnostic tool to uncover the physics of high-speed flows. Applications include the stability of hypersonic corner flows, the establishment of shock wave systems in transonic airfoil flow, and the complexities of the interactions of shock waves with obstacles of various shapes.

Advanced chip designs and novel cooling techniques for brightness scaling of industrial, high power diode laser bars

NASA Astrophysics Data System (ADS)

Heinemann, S.; McDougall, S. D.; Ryu, G.; Zhao, L.; Liu, X.; Holy, C.; Jiang, C.-L.; Modak, P.; Xiong, Y.; Vethake, T.; Strohmaier, S. G.; Schmidt, B.; Zimer, H.

2018-02-01

The advance of high power semiconductor diode laser technology is driven by the rapidly growing industrial laser market, with such high power solid state laser systems requiring ever more reliable diode sources with higher brightness and efficiency at lower cost. In this paper we report simulation and experimental data demonstrating most recent progress in high brightness semiconductor laser bars for industrial applications. The advancements are in three principle areas: vertical laser chip epitaxy design, lateral laser chip current injection control, and chip cooling technology. With such improvements, we demonstrate disk laser pump laser bars with output power over 250W with 60% efficiency at the operating current. Ion implantation was investigated for improved current confinement. Initial lifetime tests show excellent reliability. For direct diode applications <1 um smile and >96% polarization are additional requirements. Double sided cooling deploying hard solder and optimized laser design enable single emitter performance also for high fill factor bars and allow further power scaling to more than 350W with 65% peak efficiency with less than 8 degrees slow axis divergence and high polarization.

High speed transient sampler

DOEpatents

McEwan, Thomas E.

1995-01-01

A high speed sampler comprises a meandered sample transmission line for transmitting an input signal, a straight strobe transmission line for transmitting a strobe signal, and a plurality of sampling gates along the transmission lines. The sampling gates comprise a four terminal diode bridge having a first strobe resistor connected from a first terminal of the bridge to the positive strobe line, a second strobe resistor coupled from the third terminal of the bridge to the negative strobe line, a tap connected to the second terminal of the bridge and to the sample transmission line, and a sample holding capacitor connected to the fourth terminal of the bridge. The resistance of the first and second strobe resistors is much higher than the signal transmission line impedance in the preferred system. This results in a sampling gate which applies a very small load on the sample transmission line and on the strobe generator. The sample holding capacitor is implemented using a smaller capacitor and a larger capacitor isolated from the smaller capacitor by resistance. The high speed sampler of the present invention is also characterized by other optimizations, including transmission line tap compensation, stepped impedance strobe line, a multi-layer physical layout, and unique strobe generator design. A plurality of banks of such samplers are controlled for concatenated or interleaved sample intervals to achieve long sample lengths or short sample spacing.

High speed curving performance of rail vehicles

DOT National Transportation Integrated Search

2015-03-23

On March 13, 2013, the Federal Railroad Administration (FRA) published a final rule titled Vehicle/Track Interaction Safety Standards; High-Speed and High Cant Deficiency Operations which amended the Track Safety Standards (49 CFR Part213) and ...

Controllable High-Speed Rotation of Nanowires

NASA Astrophysics Data System (ADS)

Fan, D. L.; Zhu, F. Q.; Cammarata, R. C.; Chien, C. L.

2005-06-01

We report a versatile method for executing controllable high-speed rotation of nanowires by ac voltages applied to multiple electrodes. The rotation of the nanowires can be instantly switched on or off with precisely controlled rotation speed (to at least 1800 rpm), definite chirality, and total angle of rotation. We have determined the torque due to the fluidic drag force on nanowire of different lengths. We also demonstrate a micromotor using a rotating nanowire driving a dust particle into circular motion. This method has been used to rotate magnetic and nonmagnetic nanowires as well as carbon nanotubes.

Chip packaging technique

NASA Technical Reports Server (NTRS)

Jayaraj, Kumaraswamy (Inventor); Noll, Thomas E. (Inventor); Lockwood, Harry F. (Inventor)

2001-01-01

A hermetically sealed package for at least one semiconductor chip is provided which is formed of a substrate having electrical interconnects thereon to which the semiconductor chips are selectively bonded, and a lid which preferably functions as a heat sink, with a hermetic seal being formed around the chips between the substrate and the heat sink. The substrate is either formed of or includes a layer of a thermoplastic material having low moisture permeability which material is preferably a liquid crystal polymer (LCP) and is a multiaxially oriented LCP material for preferred embodiments. Where the lid is a heat sink, the heat sink is formed of a material having high thermal conductivity and preferably a coefficient of thermal expansion which substantially matches that of the chip. A hermetic bond is formed between the side of each chip opposite that connected to the substrate and the heat sink. The thermal bond between the substrate and the lid/heat sink may be a pinched seal or may be provided, for example by an LCP frame which is hermetically bonded or sealed on one side to the substrate and on the other side to the lid/heat sink. The chips may operate in the RF or microwave bands with suitable interconnects on the substrate and the chips may also include optical components with optical fibers being sealed into the substrate and aligned with corresponding optical components to transmit light in at least one direction. A plurality of packages may be physically and electrically connected together in a stack to form a 3D array.

A high speed and high gain CMOS receiver chip for a pulsed time-of-flight laser rangefinder

NASA Astrophysics Data System (ADS)

Yu, Jin-jin; Deng, Ruo-han; Yuan, Hong-hui; Chen, Yong-ping

2011-06-01

An integrated receiver channel for a pulsed time-of-flight (TOF) laser rangefinder has been designed. Pulsed TOF laser range finding devices using a laser diode transmitter can achieve millimeter-level distance measurement accuracy in a measurement range of several tens of meters to non-cooperative targets. The amplifier exploits the regulated cascade (RGC) configuration as the input-stage, thus achieving as large effective input trans-conductance as that of Si Bipolar or GaAs MESFET. The RGC input configuration isolates the input parasitic capacitance including photodiode capacitance from the bandwidth determination better than common-gate TIA. To enlarge the bandwidth, inductive peaking technology has been adopted. An active inductor (MOS-L) is used instead of spiral inductor in CMOS process. An R-2R resistor ladder is inserting between per-amplifier and post-amplifier as the variable attenuator for digital gain control purpose. The gain-bandwidth of a basic differential pair with resistive load is not large enough for broad band operation. A circuit solution to improve both gain and bandwidth of an amplifying stage is proposed. Traditional and modified Cherry-Hooper amplifiers are discussed and the cascading of several stages to constitute the post-amplifier is designed. The fully integrated one-chip solution is designed with Cadence IC design platform. The simulation result shows the bandwidth of the trans-impedance amplifier is 215MHz with the presence of a 2pF input capacitor and 5pF load capacitor. And the maximum trans-impedance gain is 136dB. The walk error is less than 1ns in 1:1000 dynamic range. The responsive time is less than 2.2ns.

Modeling Compressibility Effects in High-Speed Turbulent Flows

NASA Technical Reports Server (NTRS)

Sarkar, S.

2004-01-01

Man has strived to make objects fly faster, first from subsonic to supersonic and then to hypersonic speeds. Spacecraft and high-speed missiles routinely fly at hypersonic Mach numbers, M greater than 5. In defense applications, aircraft reach hypersonic speeds at high altitude and so may civilian aircraft in the future. Hypersonic flight, while presenting opportunities, has formidable challenges that have spurred vigorous research and development, mainly by NASA and the Air Force in the USA. Although NASP, the premier hypersonic concept of the eighties and early nineties, did not lead to flight demonstration, much basic research and technology development was possible. There is renewed interest in supersonic and hypersonic flight with the HyTech program of the Air Force and the Hyper-X program at NASA being examples of current thrusts in the field. At high-subsonic to supersonic speeds, fluid compressibility becomes increasingly important in the turbulent boundary layers and shear layers associated with the flow around aerospace vehicles. Changes in thermodynamic variables: density, temperature and pressure, interact strongly with the underlying vortical, turbulent flow. The ensuing changes to the flow may be qualitative such as shocks which have no incompressible counterpart, or quantitative such as the reduction of skin friction with Mach number, large heat transfer rates due to viscous heating, and the dramatic reduction of fuel/oxidant mixing at high convective Mach number. The peculiarities of compressible turbulence, so-called compressibility effects, have been reviewed by Fernholz and Finley. Predictions of aerodynamic performance in high-speed applications require accurate computational modeling of these "compressibility effects" on turbulence. During the course of the project we have made fundamental advances in modeling the pressure-strain correlation and developed a code to evaluate alternate turbulence models in the compressible shear layer.

High-Speed 3D Printing of High-Performance Thermosetting Polymers via Two-Stage Curing.

PubMed

Kuang, Xiao; Zhao, Zeang; Chen, Kaijuan; Fang, Daining; Kang, Guozheng; Qi, Hang Jerry

2018-04-01

Design and direct fabrication of high-performance thermosets and composites via 3D printing are highly desirable in engineering applications. Most 3D printed thermosetting polymers to date suffer from poor mechanical properties and low printing speed. Here, a novel ink for high-speed 3D printing of high-performance epoxy thermosets via a two-stage curing approach is presented. The ink containing photocurable resin and thermally curable epoxy resin is used for the digital light processing (DLP) 3D printing. After printing, the part is thermally cured at elevated temperature to yield an interpenetrating polymer network epoxy composite, whose mechanical properties are comparable to engineering epoxy. The printing speed is accelerated by the continuous liquid interface production assisted DLP 3D printing method, achieving a printing speed as high as 216 mm h -1 . It is also demonstrated that 3D printing structural electronics can be achieved by combining the 3D printed epoxy composites with infilled silver ink in the hollow channels. The new 3D printing method via two-stage curing combines the attributes of outstanding printing speed, high resolution, low volume shrinkage, and excellent mechanical properties, and provides a new avenue to fabricate 3D thermosetting composites with excellent mechanical properties and high efficiency toward high-performance and functional applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Ref Tek Ultra-low Power Seismic Recorder With Low-cost High Speed Internet Telemetry U An Advanced Real-time Seismological Data Acquisition System

NASA Astrophysics Data System (ADS)

Passmore, P.; Zimakov, L.; Rozhkov, M.

The 3rd Generation Seismic Recorder, Model 130-01, has been designed to be easier to use - more compact, lighter in weight, lower power, and requires less maintenance than other recorders. Not only is the hardware optimized for field deployments, soft- ware tools as well have been specially developed to support both field and base station operation. The 130's case is a clamshell design, inherently waterproof, with easy access to all user features on the top of the unit. The 130 has 6 input/output connectors, an LCD display, and a removable lid on top of the case. There are two Channel input connectors on a 6-channel unit (only one on a 3-channel unit), a Terminal connector for setup and control, a Net connector combining Ethernet and Serial PPP for network access, a 12 VDC Power connector, and a GPS receiver connector. The LCD display allows the user to monitor the status of various sub systems within the 130 without having a terminal device attached. For storing large amounts of data the IBM MicrodriveTM is offered. User setup, control and status monitoring is done either with a Personal Digital Assistant (PDA) (Palm OS compatible) using our Palm Field Controller (PFC) software or from a PC/workstation using our REF TEK Network Controller (RNC) GUI interface. StarBand VSAT is the premier two-way, always-on, high-speed satellite Internet ser- vice. StarBand means high-speed Internet without the constraints and congestion of land-based cable or telephone networks. StarBand uses a single satellite dish antenna for receiving and for sending dataUno telephone connection is needed. The hardware ° cost is much less than standard VSAT equipment with double or single hop transmis- sion. REF TEK protocol (RTP) provides end-to-end error-correcting data transmission and command/control. StarBandSs low cost VSAT provides two-way, always-on, high speed satellite Internet data availability. REF TEK and StarBand create the most ad- vanced real-time seismological data acquisition

The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

NASA Astrophysics Data System (ADS)

Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

2008-11-01

Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

High speed multiwire photon camera

NASA Technical Reports Server (NTRS)

Lacy, Jeffrey L. (Inventor)

1991-01-01

An improved multiwire proportional counter camera having particular utility in the field of clinical nuclear medicine imaging. The detector utilizes direct coupled, low impedance, high speed delay lines, the segments of which are capacitor-inductor networks. A pile-up rejection test is provided to reject confused events otherwise caused by multiple ionization events occuring during the readout window.

High speed multiwire photon camera

NASA Technical Reports Server (NTRS)

Lacy, Jeffrey L. (Inventor)

1989-01-01

An improved multiwire proportional counter camera having particular utility in the field of clinical nuclear medicine imaging. The detector utilizes direct coupled, low impedance, high speed delay lines, the segments of which are capacitor-inductor networks. A pile-up rejection test is provided to reject confused events otherwise caused by multiple ionization events occurring during the readout window.

Italian High-speed Airplane Engines

NASA Technical Reports Server (NTRS)

Bona, C F

1940-01-01

This paper presents an account of Italian high-speed engine designs. The tests were performed on the Fiat AS6 engine, and all components of that engine are discussed from cylinders to superchargers as well as the test set-up. The results of the bench tests are given along with the performance of the engines in various races.

On-Chip High-Finesse Fabry-Perot Microcavities for Optical Sensing and Quantum Information.

PubMed

Bitarafan, Mohammad H; DeCorby, Ray G

2017-07-31

For applications in sensing and cavity-based quantum computing and metrology, open-access Fabry-Perot cavities-with an air or vacuum gap between a pair of high reflectance mirrors-offer important advantages compared to other types of microcavities. For example, they are inherently tunable using MEMS-based actuation strategies, and they enable atomic emitters or target analytes to be located at high field regions of the optical mode. Integration of curved-mirror Fabry-Perot cavities on chips containing electronic, optoelectronic, and optomechanical elements is a topic of emerging importance. Micro-fabrication techniques can be used to create mirrors with small radius-of-curvature, which is a prerequisite for cavities to support stable, small-volume modes. We review recent progress towards chip-based implementation of such cavities, and highlight their potential to address applications in sensing and cavity quantum electrodynamics.