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Sample records for circuit asic application

  1. Characteristics and development report for the SA3871 Intent Controller application specific integrated circuit (ASIC)

    SciTech Connect

    Simpson, R.L.; Meyer, B.T.

    1995-08-01

    This report describes the design and development activities that were involved in the SA3871 Intent Controller ASIC. The SA3871 is a digital gate array component developed for the MC4396 Trajectory Sensing Signal Generator for use in the B61-3/4/10 system as well as a possible future B61-MAST system.

  2. CAE (computer-aided engineering) tools' limitations case study: An SSI (small scale integrated) design to an ASIC (application specific integrated circuit)

    SciTech Connect

    Everts, J.

    1989-01-01

    Every computer-aided engineering (CAE) tool has its limitations and shortcomings. Knowing where the pitfalls lie and how to get around them is extremely valuable. This paper takes a look at the problems and limitations encountered using the Daisy Systems suite of digital design tools (on a Logician 386 and a PKK386 MegaLogician, running DNIX 5.02A) to redesign a 169 small scale integrated (SSI) component design into an application specific integrated circuit (ASIC) gate array. Deficiencies were found in the libraries, ACE, MDLS, DTA, MCFS, and the Hotline support. Some solutions and workarounds to these deficiencies are presented.

  3. ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

    NASA Technical Reports Server (NTRS)

    Vasile, Stefan; Lipson, Jerold

    2012-01-01

    The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

  4. Rad-Hard Structured ASIC Body of Knowledge

    NASA Technical Reports Server (NTRS)

    Heidecker, Jason

    2013-01-01

    Structured Application-Specific Integrated Circuit (ASIC) technology is a platform between traditional ASICs and Field-Programmable Gate Arrays (FPGA). The motivation behind structured ASICs is to combine the low nonrecurring engineering costs (NRE) costs of FPGAs with the high performance of ASICs. This report provides an overview of the structured ASIC platforms that are radiation-hardened and intended for space application

  5. Design for ASIC reliability for low-temperature applications

    NASA Technical Reports Server (NTRS)

    Chen, Yuan; Mojaradi, Mohammad; Westergard, Lynett; Billman, Curtis; Cozy, Scott; Burke, Gary; Kolawa, Elizabeth

    2005-01-01

    In this paper, we present a methodology to design for reliability for low temperature applications without requiring process improvement. The developed hot carrier aging lifetime projection model takes into account both the transistor substrate current profile and temperature profile to determine the minimum transistor size needed in order to meet reliability requirements. The methodology is applicable for automotive, military, and space applications, where there can be varying temperature ranges. A case study utilizing this methodology is given to design for reliability into a custom application-specific integrated circuit (ASIC) for a Mars exploration mission.

  6. Estimating Delays In ASIC's

    NASA Technical Reports Server (NTRS)

    Burke, Gary; Nesheiwat, Jeffrey; Su, Ling

    1994-01-01

    Verification is important aspect of process of designing application-specific integrated circuit (ASIC). Design must not only be functionally accurate, but must also maintain correct timing. IFA, Intelligent Front Annotation program, assists in verifying timing of ASIC early in design process. This program speeds design-and-verification cycle by estimating delays before layouts completed. Written in C language.

  7. Design and test of clock distribution circuits for the Macro Pixel ASIC

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.

    2016-07-01

    Clock distribution circuits account for a significant fraction of the power dissipation of the Macro Pixel ASIC (MPA), designed for the pixel layer readout of the so-called Pixel-Strip module in the innermost part of the CMS tracker at the High Luminosity LHC. A test chip including low power clock distribution circuits of the MPA has been designed in a 65 nm CMOS technology and thoroughly tested. This work summarizes the experimental results relevant to the prototype chip, focusing particularly on the power and speed performance and compares such results with those coming from circuit simulations.

  8. An Energy-Efficient ASIC for Wireless Body Sensor Networks in Medical Applications.

    PubMed

    Xiaoyu Zhang; Hanjun Jiang; Lingwei Zhang; Chun Zhang; Zhihua Wang; Xinkai Chen

    2010-02-01

    An energy-efficient application-specific integrated circuit (ASIC) featured with a work-on-demand protocol is designed for wireless body sensor networks (WBSNs) in medical applications. Dedicated for ultra-low-power wireless sensor nodes, the ASIC consists of a low-power microcontroller unit (MCU), a power-management unit (PMU), reconfigurable sensor interfaces, communication ports controlling a wireless transceiver, and an integrated passive radio-frequency (RF) receiver with energy harvesting ability. The MCU, together with the PMU, provides quite flexible communication and power-control modes for energy-efficient operations. The always-on passive RF receiver with an RF energy harvesting block offers the sensor nodes the capability of work-on-demand with zero standby power. Fabricated in standard 0.18-¿m complementary metal-oxide semiconductor technology, the ASIC occupies a die area of 2 mm × 2.5 mm. A wireless body sensor network sensor-node prototype using this ASIC only consumes < 10-nA current under the passive standby mode, and < 10 ¿A under the active standby mode, when supplied by a 3-V battery. PMID:23853305

  9. A Batteryless Sensor ASIC for Implantable Bio-Impedance Applications.

    PubMed

    Rodriguez, Saul; Ollmar, Stig; Waqar, Muhammad; Rusu, Ana

    2016-06-01

    The measurement of the biological tissue's electrical impedance is an active research field that has attracted a lot of attention during the last decades. Bio-impedances are closely related to a large variety of physiological conditions; therefore, they are useful for diagnosis and monitoring in many medical applications. Measuring living tissues, however, is a challenging task that poses countless technical and practical problems, in particular if the tissues need to be measured under the skin. This paper presents a bio-impedance sensor ASIC targeting a battery-free, miniature size, implantable device, which performs accurate 4-point complex impedance extraction in the frequency range from 2 kHz to 2 MHz. The ASIC is fabricated in 150 nm CMOS, has a size of 1.22 mm × 1.22 mm and consumes 165 μA from a 1.8 V power supply. The ASIC is embedded in a prototype which communicates with, and is powered by an external reader device through inductive coupling. The prototype is validated by measuring the impedances of different combinations of discrete components, measuring the electrochemical impedance of physiological solution, and performing ex vivo measurements on animal organs. The proposed ASIC is able to extract complex impedances with around 1 Ω resolution; therefore enabling accurate wireless tissue measurements. PMID:26372646

  10. ASIC design of a digital fuzzy system on chip for medical diagnostic applications.

    PubMed

    Roy Chowdhury, Shubhajit; Roy, Aniruddha; Saha, Hiranmay

    2011-04-01

    The paper presents the ASIC design of a digital fuzzy logic circuit for medical diagnostic applications. The system on chip under consideration uses fuzzifier, memory and defuzzifier for fuzzifying the patient data, storing the membership function values and defuzzifying the membership function values to get the output decision. The proposed circuit uses triangular trapezoidal membership functions for fuzzification patients' data. For minimizing the transistor count, the proposed circuit uses 3T XOR gates and 8T adders for its design. The entire work has been carried out using TSMC 0.35 µm CMOS process. Post layout TSPICE simulation of the whole circuit indicates a delay of 31.27 ns and the average power dissipation of the system on chip is 123.49 mW which indicates a less delay and less power dissipation than the comparable embedded systems reported earlier. PMID:20703567

  11. Test chips and ASIC qualification

    NASA Technical Reports Server (NTRS)

    Buehler, M. G.; Blaes, B. R.; Lin, Y.-S.; Zamani, N.; Lieneweg, U.

    1991-01-01

    A test chip set being developed to aid in the qualification of spaceborne Application Specific Integrated Circuits (ASICs) is described. The chip set consists of a process monitor for process parameter verification, a fault chip for yield analysis, a reliability chip for ASIC failure rate analysis, and total ionizing dose and single event upset chips for radiation effect analysis. The test structures contained in these chips are discussed along with representative test results.

  12. Sidecar Asic at ESO

    NASA Astrophysics Data System (ADS)

    Dorn, Reinhold J.; Eschbaumer, Siegfried; Finger, Gert; Ives, Derek; Meyer, Manfred; Stegmeier, Joerg

    2010-07-01

    Teledyne Imaging Sensors (TIS) has developed a CMOS device known as the SIDECAR application-specific integrated circuit (ASIC). This single chip provides all the functionality of FPA drive electronics to operate visible and infrared imaging detectors with a fully digital interface. A Teledyne 2K ×2K silicon PIN diode array hybridized to a Hawaii-2RG multiplexer, the Hybrid Visible Silicon Imager (HyViSI) was read out with the ESO standard IR detector controller IRACE, which delivers detector limited performance. We have tested the H2RG HyViSI detector with the TIS SIDECAR ASIC in 32 channel readout mode at cryogenic temperatures. The SIDECAR has been evaluated down to 105 Kelvin operating temperature and performance results have been compared to those obtained with external electronics. Furthermore ESO has developed its own interface card to replace the JADE USB card provided by Teledyne. The ASIC controller is now being embedded in the ESO standard VLT hard and software environment. This paper provides an update on the recent development of the new ESO ASIC interface card. We find that the SIDECAR ASIC provides performance equal to external electronics.

  13. Predicting Lifetimes Of CMOS ASIC's From Test Data

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G.; Zamani, Nasser; Zoutendyk, John A.

    1993-01-01

    Concise report discusses recent developments in use of semiempirical mathematical models to predict rates of failure and operating lifetimes of complementary metal oxide/semiconductor (CMOS) application-specific integrated circuits (ASIC's). Each model represents specific mechanism of failure. Once failure mechanisms and models relevant to given ASIC chosen, adjustable parameters in models fitted to life-test data acquired from representative integrated-circuit structures on test coupons fabricated along with ASIC's. Then design parameters of ASIC's incorporated into models, and models yield lifetimes.

  14. Development of a CdTe pixel detector with a window comparator ASIC for high energy X-ray applications

    NASA Astrophysics Data System (ADS)

    Hirono, T.; Toyokawa, H.; Furukawa, Y.; Honma, T.; Ikeda, H.; Kawase, M.; Koganezawa, T.; Ohata, T.; Sato, M.; Sato, G.; Takagaki, M.; Takahashi, T.; Watanabe, S.

    2011-09-01

    We have developed a photon-counting-type CdTe pixel detector (SP8-01). SP8-01 was designed as a prototype of a high-energy X-ray imaging detector for experiments using synchrotron radiation. SP8-01 has a CdTe sensor of 500 μm thickness, which has an absorption efficiency of almost 100% up to 50 keV and 45% even at 100 keV. A full-custom application specific integrated circuit (ASIC) was designed as a readout circuit of SP8-01, which is equipped with a window-type discriminator. The upper discriminator realizes a low-background measurement, because X-ray beams from the monochromator contain higher-order components beside the fundamental X-rays in general. ASIC chips were fabricated with a TSMC 0.25 μm CMOS process, and CdTe sensors were bump-bonded to the ASIC chips by a gold-stud bonding technique. Beam tests were performed at SPring-8. SP8-01 detected X-rays up to 120 keV. The capability of SP8-01 as an imaging detector for high-energy X-ray synchrotron radiation was evaluated with its performance characteristics.

  15. SODR Memory Control Buffer Control ASIC

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.

    1994-01-01

    The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.

  16. ASIC For Complex Fixed-Point Arithmetic

    NASA Technical Reports Server (NTRS)

    Petilli, Stephen G.; Grimm, Michael J.; Olson, Erlend M.

    1995-01-01

    Application-specific integrated circuit (ASIC) performs 24-bit, fixed-point arithmetic operations on arrays of complex-valued input data. High-performance, wide-band arithmetic logic unit (ALU) designed for use in computing fast Fourier transforms (FFTs) and for performing ditigal filtering functions. Other applications include general computations involved in analysis of spectra and digital signal processing.

  17. An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection

    PubMed Central

    Bhaumik, Basabi

    2016-01-01

    A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm2. The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system. PMID:27284458

  18. An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection.

    PubMed

    Jain, Sanjeev Kumar; Bhaumik, Basabi

    2016-03-01

    A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm(2). The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system. PMID:27284458

  19. Command Interface ASIC - Analog Interface ASIC Chip Set

    NASA Technical Reports Server (NTRS)

    Ruiz, Baldes; Jaffe, Burton; Burke, Gary; Lung, Gerald; Pixler, Gregory; Plummer, Joe; Katanyoutanant,, Sunant; Whitaker, William

    2003-01-01

    A command interface application-specific integrated circuit (ASIC) and an analog interface ASIC have been developed as a chip set for remote actuation and monitoring of a collection of switches, which can be used to control generic loads, pyrotechnic devices, and valves in a high-radiation environment. The command interface ASIC (CIA) can be used alone or in combination with the analog interface ASIC (AIA). Designed primarily for incorporation into spacecraft control systems, they are also suitable for use in high-radiation terrestrial environments (e.g., in nuclear power plants and facilities that process radioactive materials). The primary role of the CIA within a spacecraft or other power system is to provide a reconfigurable means of regulating the power bus, actuating all valves, firing all pyrotechnic devices, and controlling the switching of power to all switchable loads. The CIA is a mixed-signal (analog and digital) ASIC that includes an embedded microcontroller with supporting fault-tolerant switch control and monitoring circuitry that is capable of connecting to a redundant set of interintegrated circuit (I(sup 2)C) buses. Commands and telemetry requests are communicated to the CIA. Adherence to the I(sup 2)C bus standard helps to reduce development costs by facilitating the use of previously developed, commercially available components. The AIA is a mixed-signal ASIC that includes the analog circuitry needed to connect the CIA to a custom higher powered version of the I(sup 2)C bus. The higher-powered version is designed to enable operation with bus cables longer than those contemplated in the I(sup 2)C standard. If there are multiple higher-power I(sup 2)C-like buses, then there must an AIA between the CIA and each such bus. The AIA includes two identical interface blocks: one for the side-A I(sup 2)C clock and data buses and the other for the side B buses. All the AIAs on each side are powered from a common power converter module (PCM). Sides A and B

  20. STiC — a mixed mode silicon photomultiplier readout ASIC for time-of-flight applications

    NASA Astrophysics Data System (ADS)

    Harion, T.; Briggl, K.; Chen, H.; Fischer, P.; Gil, A.; Kiworra, V.; Ritzert, M.; Schultz-Coulon, H.-C.; Shen, W.; Stankova, V.

    2014-02-01

    STiC is an application specific integrated circuit (ASIC) for the readout of silicon photomultipliers. The chip has been designed to provide a very high timing resolution for time-of-flight applications in medical imaging and particle physics. It is dedicated in particular to the EndoToFPET-US project, which is developing an endoscopic PET detector combined with ultrasound imaging for early pancreas and prostate cancer detection. This PET system aims to provide a spatial resolution of 1 mm and a time-of-flight resolution of 200 ps FWHM. The analog frontend of STiC can use either a differential or single ended connection to the SiPM. The time and energy information of the detector signal is encoded into two time stamps. A special linearized time-over-threshold method is used to obtain a linear relation between the signal charge and the measured signal width, improving the energy resolution. The trigger signals are digitized by an integrated TDC module with a resolution of less than 20 ps. The TDC data is stored in an internal memory and transfered over a 160 MBit/s serial link using 8/10 bit encoding. First coincidence measurements using a 3.1 × 3.1 × 15 mm3 LYSO crystal and a S10362-33-50 Hamamtsu MPPC show a coincidence time resolution of less than 285 ps. We present details on the chip design as well as first characterization measurements.

  1. Multichannel readout ASIC design flow for high energy physics and cosmic rays experiments

    NASA Astrophysics Data System (ADS)

    Voronin, A.; Malankin, E.

    2016-02-01

    In the large-scale high energy physics and astrophysics experiments multi-channel readout application specific integrated circuits (ASICs) are widely used. The ASICs for such experiments are complicated systems, which usually include both analog and digital building blocks. The complexity and large number of channels in such ASICs require the proper methodological approach to their design. The paper represents the mixed-signal design flow of the ASICs for high energy physics and cosmic rays experiments. This flow was successfully embedded to the development of the read-out ASIC prototype for the muon chambers of the CBM experiment. The approach was approved in UMC CMOS MMRF 180 nm process. The design flow enable to analyse the mixed-signal system operation on the different levels: functional, behavioural, schematic and post layout including parasitic elements. The proposed design flow allows reducing the simulation period and eliminating the functionality mismatches on the very early stage of the design.

  2. ASIC Development for Three-Dimensional Silicon Imaging Array for Cold Neutrons

    SciTech Connect

    Britton, C.L.; Jagadish, U.; Bryan, W.L.

    2004-05-19

    An Integrated Circuit (IC) readout chip with four channels arranged so as to receive input charge from the corners of the chip was designed for use with 5- to 7-mm pixel detectors. This Application Specific IC (ASIC) can be used for cold neutron imaging, for study of structural order in materials using cold neutron scattering or for particle physics experiments. The ASIC is fabricated in a 0.5-{micro}m n-well AMI process. The design of the ASIC and the test measurements made is reported. Noise measurements are also reported.

  3. Thermal Radiometer Signal Processing Using Radiation Hard CMOS Application Specific Integrated Circuits for Use in Harsh Planetary Environments

    NASA Technical Reports Server (NTRS)

    Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

    2015-01-01

    Thermal radiometers such as proposed for the Europa Clipper flyby mission require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-sq cm/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

  4. Thermal Radiometer Signal Processing using Radiation Hard CMOS Application Specific Integrated Circuits for use in Harsh Planetary Environments

    NASA Astrophysics Data System (ADS)

    Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

    2015-10-01

    Thermal radiometers such as proposed for the Europa Clipper flyby mission [1] require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-cm2/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

  5. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    PubMed Central

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e−RMS at maximum gain and negative polarity conditions has been measured at room temperature. PMID:26744545

  6. Monolithical integration of polymer-based microfluidic structures on application-specific integrated circuits

    NASA Astrophysics Data System (ADS)

    Chemnitz, Steffen; Schafer, Heiko; Schumacher, Stephanie; Koziy, Volodymyr; Fischer, Alexander; Meixner, Alfred J.; Ehrhardt, Dietmar; Bohm, Markus

    2003-04-01

    In this paper, a concept for a monolithically integrated chemical lab on microchip is presented. It contains an ASIC (Application Specific Integrated Circuit), an interface to the polymer based microfluidic layer and a Pyrex glass cap. The top metal layer of the ASIC is etched off and replaced by a double layer metallization, more suitable to microfluidic and electrophoresis systems. The metallization consists of an approximately 50 nm gold layer and a 10 nm chromium layer, acting as adhesion promoter. A necessary prerequisite is a planarized ASIC topography. SU-8 is used to serve as microfluidic structure because of its excellent aspect ratio. This polymer layer contains reservoirs, channels, mixers and electrokinetic micro pumps. The typical channel cross section is 10μm"10μm. First experimental results on a microfluidic pump, consisting of pairs of interdigitated electrodes on the bottom of the channel and without any moving parts show a flow of up to 50μm per second for low AC-voltages in the range of 5 V for aqueous fluids. The microfluidic system is irreversibly sealed with a 150μm thick Pyrex glass plate bonded to the SU-8-layer, supported by oxygen plasma. Due to capillary forces and surfaces properties of the walls the system is self-priming. The technologies for the fabrication of the microfluidic system and the preparation of the interface between the lab layer and the ASIC are presented.

  7. In application specific integrated circuit and data acquisition system for digital X-ray imaging

    NASA Astrophysics Data System (ADS)

    Beuville, E.; Cederström, B.; Danielsson, M.; Luo, L.; Nygren, D.; Oltman, E.; Vestlund, J.

    1998-02-01

    We have developed an Application Specific Integrated Circuit (ASIC) and data acquisition system for digital X-ray imaging. The chip consists of 16 parallel channels, each containing preamplifier, shaper, comparator and a 16 bit counter. We have demonstrated noiseless single-photon counting over a threshold of 7.2 keV using Silicon detectors and are presently capable of maximum counting rates of 2 MHz per channel. The ASIC is controlled by a personal computer through a commercial PCI card, which is also used for data acquisition. The content of the 16 bit counters are loaded into a shift register and transferred to the PC at any time at a rate of 20 MHz. The system is non-complicated, low cost and high performance and is optimised for digital X-ray imaging applications.

  8. ASIC-enabled High Resolution Optical Time Domain Reflectometer

    NASA Astrophysics Data System (ADS)

    Skendzic, Sandra

    Fiber optics has become the preferred technology in communication systems because of what it has to offer: high data transmission rates, immunity to electromagnetic interference, and lightweight, flexible cables. An optical time domain reflectometer (OTDR) provides a convenient method of locating and diagnosing faults (e.g. break in a fiber) along a fiber that can obstruct crucial optical pathways. Both the ability to resolve the precise location of the fault and distinguish between two discrete, closely spaced faults are figures of merit. This thesis presents an implementation of a high resolution OTDR through the use of a compact and programmable ASIC (application specific integrated circuit). The integration of many essential OTDR functions on a single chip is advantageous over existing commercial instruments because it enables small, lightweight packaging, and offers low power and cost efficiency. Furthermore, its compactness presents the option of placing multiple ASICs in parallel, which can conceivably ease the characterization of densely populated fiber optic networks. The OTDR ASIC consists of a tunable clock, pattern generator, precise timer, electrical receiver, and signal sampling circuit. During OTDR operation, the chip generates narrow electrical pulse, which can then be converted to optical format when coupled with an external laser diode driver. The ASIC also works with an external photodetector to measure the timing and amplitude of optical reflections in a fiber. It has a 1 cm sampling resolution, which allows for a 2 cm spatial resolution. While this OTDR ASIC has been previously demonstrated for multimode fiber fault diagnostics, this thesis focuses on extending its functionality to single mode fiber. To validate this novel approach to OTDR, this thesis is divided into five chapters: (1) introduction, (2) implementation, (3), performance of ASIC-based OTDR, (4) exploration in optical pre-amplification with a semiconductor optical amplifier, and

  9. Performance of VATA64HDR16 ASIC for medical physics applications based on continuous crystals and SiPMs

    NASA Astrophysics Data System (ADS)

    Barrio, J.; Etxebeste, A.; Lacasta, C.; Muñoz, E.; Oliver, J. F.; Solaz, C.; Llosá, G.

    2015-12-01

    Detectors based on Silicon Photomultipliers (SiPMs) coupled to continuous crystals are being tested in medical physics applications due to their potential high resolution and sensitivity. To cope with the high granularity required for a very good spatial resolution, SiPM matrices with a large amount of elements are needed. To be able to read the information coming from each individual channel, dedicated ASICs are employed. The VATA64HDR16 ASIC is a 64-channel, charge-sensitive amplifier that converts the collected charge into a proportional current or voltage signal. A complete assessment of the suitability of that ASIC for medical physics applications based on continuous crystals and SiPMs has been carried out. The input charge range is linear from 0-2 pC up to 55 pC. The energy resolution obtained at 511 keV is 10% FWHM with a LaBr3 crystal and 16% FWHM with a LYSO crystal. A coincidence timing resolution of 24 ns FWHM is obtained with two LYSO crystals.

  10. An application specific integrated circuit based multi-anode microchannel array readout system

    NASA Technical Reports Server (NTRS)

    Smeins, Larry G.; Stechman, John M.; Cole, Edward H.

    1991-01-01

    Size reduction of two new multi-anode microchannel array (MAMA) readout systems is described. The systems are based on two analog and one digital application specific integrated circuits (ASICs). The new readout systems reduce volume over previous discrete designs by 80 percent while improving electrical performance on virtually every significant parameter. Emphasis is made on the packaging used to achieve the volume reduction. Surface mount technology (SMT) is combined with modular construction for the analog portion of the readout. SMT reliability concerns and the board area impact of MIL SPEC SMT components is addressed. Package selection for the analog ASIC is discussed. Future sytems will require even denser packaging and the volume reduction progression is shown.

  11. A Radiation Hardened by Design CMOS ASIC for Thermopile Readouts

    NASA Technical Reports Server (NTRS)

    Quilligan, G.; Aslam, S.; DuMonthier, J.

    2012-01-01

    A radiation hardened by design (RHBD) mixed-signal application specific integrated circuit (ASIC) has been designed for a thermopile readout for operation in the harsh Jovian orbital environment. The multi-channel digitizer (MCD) ASIC includes 18 low noise amplifier channels which have tunable gain/filtering coefficients, a 16-bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The 18 channels, SDADC and controller were designed to operate with immunity to single event latchup (SEL) and to at least 10 Mrad total ionizing dose (TID). The ASIC also contains a radiation tolerant 16-bit 20 MHz Nyquist ADC for general purpose instrumentation digitizer needs. The ASIC is currently undergoing fabrication in a commercial 180 nm CMOS process. Although this ASIC was designed specifically for the harsh radiation environment of the NASA led JEO mission it is suitable for integration into instrumentation payloads 011 the ESA JUICE mission where the radiation hardness requirements are slightly less stringent.

  12. ASIC for SDD-Based X-ray Spectrometers

    SciTech Connect

    De Geronimo, G.; Fried, J.; Rehak, P.; Ackley, K.; Carini, G.; Chen, W.; Keister, J.; Li, S.; Li, Z.; Pinelli, D.A.; Siddons, D.P.; Vernon, E.; Gaskin, J.A.; Ramsey, B.D.; Tyson, T.A.

    2010-06-16

    We present an application-specific integrated circuit (ASIC) for high-resolution x-ray spectrometers (XRS). The ASIC reads out signals from pixelated silicon drift detectors (SDDs). The pixel does not have an integrated field effect transistor (FET); rather, readout is accomplished by wire-bonding the anodes to the inputs of the ASIC. The ASIC dissipates 32 mW, and offers 16 channels of low-noise charge amplification, high-order shaping with baseline stabilization, discrimination, a novel pile-up rejector, and peak detection with an analog memory. The readout is sparse and based on custom low-power tristatable low-voltage differential signaling (LPT-LVDS). A unit of 64 SDD pixels, read out by four ASICs, covers an area of 12.8 cm{sup 2} and dissipates with the sensor biased about 15 mW/cm{sup 2}. As a tile-based system, the 64-pixel units cover a large detection area. Our preliminary measurements at -44 C show a FWHM of 145 eV at the 5.9 keV peak of a {sup 55}Fe source, and less than 80 eV on a test-pulse line at 200 eV.

  13. ASIC for SDD-Based X-Ray Spectrometers

    SciTech Connect

    G De Geronimo; P Rehak; K Ackley; G Carini; W Chen; J Fried; J Keister; S Li; Z Li; et al.

    2011-12-31

    We present an application-specific integrated circuit (ASIC) for high-resolution x-ray spectrometers (XRS). The ASIC reads out signals from pixelated silicon drift detectors (SDDs). The pixel does not have an integrated field effect transistor (FET); rather, readout is accomplished by wire-bonding the anodes to the inputs of the ASIC. The ASIC dissipates 32 mW, and offers 16 channels of low-noise charge amplification, high-order shaping with baseline stabilization, discrimination, a novel pile-up rejector, and peak detection with an analog memory. The readout is sparse and based on custom low-power tristatable low-voltage differential signaling (LPT-LVDS). A unit of 64 SDD pixels, read out by four ASICs, covers an area of 12.8 cm{sup 2} and dissipates with the sensor biased about 15 mW/cm{sup 2}. As a tile-based system, the 64-pixel units cover a large detection area. Our preliminary measurements at -44 C show a FWHM of 145 eV at the 5.9 keV peak of a {sup 55}Fe source, and less than 80 eV on a test-pulse line at 200 eV.

  14. Low-cost photovoltaic inverters incorporating application-specific integrated circuits

    SciTech Connect

    O`Sullivan, G.A.; O`Sullivan, J.A.

    1993-10-01

    The positive impact of designing a power conditioner control system for photovoltaic applications with an application-specific integrated circuit (ASIC) as the main control element was demonstrated with detailed computer simulations in Phase I of a two phase Small Business Innovative Research Grant issued by the US Department of Energy. Completion of the design, building and testing of three prototypes using different power semiconductors was successfully accomplished in Phase II. The power rating for the residential utility intertied Sunverters Model 753-4-200 is 5 kW. A stand-alone inverter suitable for operation from a photovoltaic array with or without a battery for energy storage was also developed in this effort. A much needed intermediate power level 50-kW three-phase power conditioner, Sunverter Model 759-4-200, was the third product to evolve from the research and development. All designs take advantage of the ASIC and a complementary microprocessor sampled-data control system. The ASIC-controlled power conditioners provide the high reliability, high efficiency, and low cost needed for photovoltaic applications. They cover the power range from the residential level to utility-sized installations.

  15. The Pulse Width Modulator ASIC for Deep Space Missions

    NASA Technical Reports Server (NTRS)

    Carr, Gregory A.; Wester, Gene W.; Lam, Barbara; Bennett, Johnny; Franco, Lauro; Woo, Erika

    2004-01-01

    The Jet Propulsion Laboratory has started the development of a Pulse Width Modulator Application Specific Integrated Circuit (PWMA). This development is leveraging the previous development of the Switch Control ASIC (SCA). The purpose of the development is to provide the control for a selected range of power converter topologies and to meet the stringent environmental requirements of deep space missions. The PWMA will include several power control functions that are not normally included on the off-the-shelf components available today. One key functional requirement is the ability to implement an N + K redundant power converter with the ability to control the charging of a battery. Other applications will be the typical point of load isolated and non-isolated power converters. The purpose the development is not only to provide a much needed flight part, but also to accelerate the engineering process by using a standard cell library from previous ASIC developments. Under previous developments with Boeing and Lockheed Martin, JPL has produced three ASICs. Each ASIC has been implemented by using an analog standard cell library. One such development was the SCA, which is design to provide a floating power switch control. The functional verification of this ASIC has been completed and the cells used have been targeted for the new development of the PWMA. The primary function of the PWMA is to provide the control function of a point of load power converter. The design is an isolated 60 W converter with a 33 V output. In architecting the design, several functions were left up to the power converter design in order to make the ASIC more generic. The ASIC can be used for several power converter topologies and power levels. Some additional features have been added to the ASIC to provide the interfaces for multi-phase topologies and battery control functions. An N+K fault tolerant strategy has been implemented in order to provide the battery control functions. The PWMA has

  16. TOFPET2: a high-performance ASIC for time and amplitude measurements of SiPM signals in time-of-flight applications

    NASA Astrophysics Data System (ADS)

    Di Francesco, A.; Bugalho, R.; Oliveira, L.; Pacher, L.; Rivetti, A.; Rolo, M.; Silva, J. C.; Silva, R.; Varela, J.

    2016-03-01

    We present a readout and digitization ASIC featuring low-noise and low-power for time-of flight (TOF) applications using SiPMs. The circuit is designed in standard CMOS 110 nm technology, has 64 independent channels and is optimized for time-of-flight measurement in Positron Emission Tomography (TOF-PET). The input amplifier is a low impedance current conveyor based on a regulated common-gate topology. Each channel has quad-buffered analogue interpolation TDCs (time binning 20 ps) and charge integration ADCs with linear response at full scale (1500 pC). The signal amplitude can also be derived from the measurement of time-over-threshold (ToT). Simulation results show that for a single photo-electron signal with charge 200 (550) fC generated by a SiPM with 320 pF capacitance the circuit has 24 (30) dB SNR, 75(39) ps r.m.s. resolution, and 4(8) mW power consumption. The event rate is 600 kHz per channel, with up to 2 MHz dark counts rejection.

  17. Digital circuits for computer applications: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

  18. Using advanced microelectronic test chips to qualify ASIC's for space

    NASA Technical Reports Server (NTRS)

    Buehler, M. G.; Blaes, B. R.; Lin, Y-S.

    1990-01-01

    Qualification procedures for complex integrated circuits are being developed under a U.S. government program known as Qualified Manufacturing Lines (QML). This effort is focused on circuits designed by IC manufacturers and has not addressed application specific IC's (ASIC's) designed at system houses. The qualification procedures described here are intended to be responsive to the needs of system houses who design their own ASIC's and have them fabricated at Silicon foundries. A particular focus of this presentation will be the use of the TID (total Ionizing Dose) Chip to evaluate CMOS foundry processes and to provide parameters for circuit simulators. This chip is under development as a standard chip for qualifying the total dose aspects of ASIC's. The benefits of standardization are that the results will be well understood and easy to interpret. Data is presented and compared for 1.6 micron and 3.0 micron CMOS. The data shows that 1.6 micron CMOS is significantly harder than 3.0 micron CMOS. Two failure modes are explored: (1) the radiation-induced degradation of timing delays; and (2) radiation-induced leakage currents.

  19. A miniaturized ASIC-based multichannel scaler instrument

    SciTech Connect

    Ericson, M.N.; Turner, G.W.; McMillan, D.E.; Hoffheins, B.S.; Todd, R.A.; Hiller, J.M.

    1993-12-31

    A miniaturized multichannel scaler instrument has been developed to address size and operational constraints for data acquisition in a portable laser-induced luminescence system. The multichannel scaling (MCS) function is implemented as a programmable application specific integrated circuit (ASIC) with standard interfaces for control and data acquisition. The instrument is microcontroller-based with sufficient computing power for data manipulation and algorithmic processing. The unit includes electronics for laser control, and amplification and pulse height discrimination of PMT pulses. Modification of the instrument should allow use in nuclear, chemical, and spectroscopy related applications including Mossbauer experiments. Interfaces are incorporated allowing both computer-controlled and stand alone operation. Implementation of the MCS function as an ASIC and comparison with conventional implementations are discussed. Full characterization of the MCS is presented including differential non-linearity (DNL), bin dead time, and bandwidth measurements.

  20. Small Microprocessor for ASIC or FPGA Implementation

    NASA Technical Reports Server (NTRS)

    Kleyner, Igor; Katz, Richard; Blair-Smith, Hugh

    2011-01-01

    A small microprocessor, suitable for use in applications in which high reliability is required, was designed to be implemented in either an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). The design is based on commercial microprocessor architecture, making it possible to use available software development tools and thereby to implement the microprocessor at relatively low cost. The design features enhancements, including trapping during execution of illegal instructions. The internal structure of the design yields relatively high performance, with a significant decrease, relative to other microprocessors that perform the same functions, in the number of microcycles needed to execute macroinstructions. The problem meant to be solved in designing this microprocessor was to provide a modest level of computational capability in a general-purpose processor while adding as little as possible to the power demand, size, and weight of a system into which the microprocessor would be incorporated. As designed, this microprocessor consumes very little power and occupies only a small portion of a typical modern ASIC or FPGA. The microprocessor operates at a rate of about 4 million instructions per second with clock frequency of 20 MHz.

  1. Microwave integrated circuits for space applications

    NASA Technical Reports Server (NTRS)

    Leonard, Regis F.; Romanofsky, Robert R.

    1991-01-01

    Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

  2. Automated radiation hard ASIC design tool

    NASA Technical Reports Server (NTRS)

    White, Mike; Bartholet, Bill; Baze, Mark

    1993-01-01

    A commercial based, foundry independent, compiler design tool (ChipCrafter) with custom radiation hardened library cells is described. A unique analysis approach allows low hardness risk for Application Specific IC's (ASIC's). Accomplishments, radiation test results, and applications are described.

  3. ASIC-based design of NMR system health monitor for mission/safety-critical applications.

    PubMed

    Balasubramanian, P

    2016-01-01

    N-modular redundancy (NMR) is a generic fault tolerance scheme that is widely used in safety-critical circuit/system designs to guarantee the correct operation with enhanced reliability. In passive NMR, at least a majority (N + 1)/2 out of N function modules is expected to operate correctly at any time, where N is odd. Apart from a conventional realization of the NMR system, it would be useful to provide a concurrent indication of the system's health so that an appropriate remedial action may be initiated depending upon an application's safety criticality. In this context, this article presents the novel design of a generic NMR system health monitor which features: (i) early fault warning logic, that is activated upon the production of a conflicting result by even one output of any arbitrary function module, and (ii) error signalling logic, which signals an error when the number of faulty function modules unfortunately attains a majority and the system outputs may no more be reliable. Two sample implementations of NMR systems viz. triple modular redundancy and quintuple modular redundancy with the proposed system health monitoring are presented in this work, with a 4-bit ALU used for the function modules. The simulations are performed using a 32/28 nm CMOS process technology. PMID:27330894

  4. Dedicated multichannel readout ASIC coupled with single crystal diamond for dosimeter application

    NASA Astrophysics Data System (ADS)

    Fabbri, A.; Falco, M. D.; De Notaristefani, F.; Galasso, M.; Marinelli, M.; Orsolini Cencelli, V.; Tortora, L.; Verona, C.; Verona Rinati, G.

    2013-02-01

    This paper reports on the tests of a low-noise, multi-channel readout integrated circuit used as a readout electronic front-end for a diamond multi-pixel dosimeter. The system is developed for dose distribution measurement in radiotherapy applications. The first 10-channel prototype chip was designed and fabricated in a 0.18 um CMOS process. Every channel includes a charge integrator with a 10 pF capacitor and a double slope A/D converter. The diamond multi-pixel detector, based on CVD synthetic single crystal diamond Schottky diodes, is made by a 3 × 3 sensor matrix. The overall device has been tested under irradiation with 6 MeV radio therapeutic photon beams at the Policlinico ``Tor Vergata'' (PTV) hospital. Measurements show a 20 fA RMS leakage current from the front-end input stage and a negligible dark current from the diamond detector, a stable temporal response and a good linear behaviour as a function of both dose and dose rate. These characteristics were common to each tested channel.

  5. A High-Performance Deformable Mirror with Integrated Driver ASIC for Space Based Active Optics

    NASA Astrophysics Data System (ADS)

    Shelton, Chris

    Direct imaging of exoplanets is key to fully understanding these systems through spectroscopy and astrometry. The primary impediment to direct imaging of exoplanets is the extremely high brightness ratio between the planet and its parent star. Direct imaging requires a technique for contrast suppression, which include coronagraphs, and nulling interferometers. Deformable mirrors (DMs) are essential to both of these techniques. With space missions in mind, Microscale is developing a novel DM with direct integration of DM and its electronic control functions in a single small envelope. The Application Specific Integrated Circuit (ASIC) is key to the shrinking of the electronic control functions to a size compatible with direct integration with the DM. Through a NASA SBIR project, Microscale, with JPL oversight, has successfully demonstrated a unique deformable mirror (DM) driver ASIC prototype based on an ultra-low power switch architecture. Microscale calls this the Switch-Mode ASIC, or SM-ASIC, and has characterized it for a key set of performance parameters, and has tested its operation with a variety of actuator loads, such as piezo stack and unimorph, and over a wide temperature range. These tests show the SM-ASIC's capability of supporting active optics in correcting aberrations of a telescope in space. Microscale has also developed DMs to go with the SM-ASIC driver. The latest DM version produced uses small piezo stack elements in an 8x8 array, bonded to a novel silicon facesheet structure fabricated monolithically into a polished mirror on one side and mechanical linkage posts that connect to the piezoelectric stack actuators on the other. In this Supporting Technology proposal we propose to further develop the ASIC-DM and have assembled a very capable team to do so. It will be led by JPL, which has considerable expertise with DMs used in Adaptive Optics systems, with high-contrast imaging systems for exoplanet missions, and with designing DM driver

  6. Front End Spectroscopy ASIC for Germanium Detectors

    NASA Astrophysics Data System (ADS)

    Wulf, Eric

    the anode and cathode of the device to allow the depth of the interaction within the crystal to be determined. Dr. De Geronimo has developed similar timing circuits for CZT detector ASICs. Furthermore, the timing circuitry of the ASIC is at the very end of the analog section, simplifying and mitigating risks in the redesign. In the first year, we propose to tweak the gain settings and to add timing to the silicon ASIC to match the requirements of a germanium detector. The design specifications of the ASIC will include advice from our collaborators Dr. Boggs from COSI and Dr. Shih from GRIPS. By using a master ASIC designer to integrate his proven front-end and back-end with only minor modifications, we are maximizing the probability of success. NRL has a commercial cross-strip germanium detector with 30 pF of capacitance per strip, including the flex circuit from the detector to the outside of the cryostat. The COSI and GRIPS detectors have a similar capacitance per strip on the outside of their mechanically cooled cryostat. The second year of the program will be devoted to testing the newly fabricated germanium cross-strip ASIC with the NRL germanium detector. At the end of the second year, NASA will have a TRL 5 ASIC for germanium detectors, allowing future missions, including COSI, GRX, and GRIPS, to operate within their thermal and electrical envelopes. At the end of the third year, a detector on COSI will be instrumented with the new ASIC allowing for a TRL 6 demonstration during the following COSI balloon flight.

  7. Synthesis algorithm of VLSI multipliers for ASIC

    NASA Technical Reports Server (NTRS)

    Chua, O. H.; Eldin, A. G.

    1993-01-01

    Multipliers are critical sub-blocks in ASIC design, especially for digital signal processing and communications applications. A flexible multiplier synthesis tool is developed which is capable of generating multiplier blocks for word size in the range of 4 to 256 bits. A comparison of existing multiplier algorithms is made in terms of speed, silicon area, and suitability for automated synthesis and verification of its VLSI implementation. The algorithm divides the range of supported word sizes into sub-ranges and provides each sub-range with a specific multiplier architecture for optimal speed and area. The algorithm of the synthesis tool and the multiplier architectures are presented. Circuit implementation and the automated synthesis methodology are discussed.

  8. ASICs Approach for the Implementation of a Symmetric Triangular Fuzzy Coprocessor and Its Application to Adaptive Filtering

    NASA Technical Reports Server (NTRS)

    Starks, Scott; Abdel-Hafeez, Saleh; Usevitch, Bryan

    1997-01-01

    This paper discusses the implementation of a fuzzy logic system using an ASICs design approach. The approach is based upon combining the inherent advantages of symmetric triangular membership functions and fuzzy singleton sets to obtain a novel structure for fuzzy logic system application development. The resulting structure utilizes a fuzzy static RAM to store the rule-base and the end-points of the triangular membership functions. This provides advantages over other approaches in which all sampled values of membership functions for all universes must be stored. The fuzzy coprocessor structure implements the fuzzification and defuzzification processes through a two-stage parallel pipeline architecture which is capable of executing complex fuzzy computations in less than 0.55us with an accuracy of more than 95%, thus making it suitable for a wide range of applications. Using the approach presented in this paper, a fuzzy logic rule-base can be directly downloaded via a host processor to an onchip rule-base memory with a size of 64 words. The fuzzy coprocessor's design supports up to 49 rules for seven fuzzy membership functions associated with each of the chip's two input variables. This feature allows designers to create fuzzy logic systems without the need for additional on-board memory. Finally, the paper reports on simulation studies that were conducted for several adaptive filter applications using the least mean squared adaptive algorithm for adjusting the knowledge rule-base.

  9. ASIC Readout System for use with a Silicon Detector Array (SAND)

    NASA Astrophysics Data System (ADS)

    Marsh, Ian; Lesher, Shelly; Tan, Wanpeng; Smith, Mallory; Robbe, Mike; Aprahamian, Ani

    2012-10-01

    Silicon (Si) detectors are widely used throughout the scientific community, particularly in nuclear physics. Modern versions of Si detectors are getting larger and increasingly segmented, requiring many electronic channels to process the signals. NIM and VME modules have traditionally been used to process signals from various types of detectors. Applying this traditional method to a large array of Si-detectors, segmented or otherwise, would be very expensive and in most cases highly impractical. To handle this high density of signals from state-of-the-art Si detector arrays we have explored an Application Specific Integrated Circuit (ASIC) approach in collaboration with University of Washington in St. Louis. This involves ASIC chips developed for simultaneous signal processing with charge sensitive preamplifiers, shaping amplifiers, and constant fraction discriminators built in for 16 channels. One ASIC box is capable of housing 32 of these chips and thus processing signals directly from detectors through a total of 512 channels. Analog energy and timing signals are digitized through a pipeline ADC for the NSCL DAQ software to readout. I was a part of the ND effort to implement such an ASIC system. I conducted energy and timing calibrations as well as linearity, threshold, and resolution tests on the system. In collaboration with Indiana University at Bloomington the ASIC system will be applied to a silicon detector array (SAND) at ND for the study of nuclear astrophysics.

  10. ASICs and neuropeptides.

    PubMed

    Vick, Jonathan S; Askwith, Candice C

    2015-07-01

    The acid sensing ion channels (ASICs) are proton-gated cation channels expressed throughout the nervous system. ASICs are activated during acidic pH fluctuations, and recent work suggests that they are involved in excitatory synaptic transmission. ASICs can also induce neuronal degeneration and death during pathological extracellular acidosis caused by ischemia, autoimmune inflammation, and traumatic injury. Many endogenous neuromodulators target ASICs to affect their biophysical characteristics and contributions to neuronal activity. One of the most unconventional types of modulation occurs with the interaction of ASICs and neuropeptides. Collectively, FMRFamide-related peptides and dynorphins potentiate ASIC activity by decreasing the proton-sensitivity of steady state desensitization independent of G protein-coupled receptor activation. By decreasing the proton-sensitivity of steady state desensitization, the FMRFamide-related peptides and dynorphins permit ASICs to remain active at more acidic basal pH. Unlike the dynorphins, some FMRFamide-related peptides also potentiate ASIC activity by slowing inactivation and increasing the sustained current. Through mechanistic studies, the modulation of ASICs by FMRFamide-related peptides and dynorphins appears to be through distinct interactions with the extracellular domain of ASICs. Dynorphins are expressed throughout the nervous system and can increase neuronal death during prolonged extracellular acidosis, suggesting that the interaction between dynorphins and ASICs may have important consequences for the prevention of neurological injury. The overlap in expression of FMRFamide-related peptides with ASICs in the dorsal horn of the spinal cord suggests that their interaction may have important consequences for the treatment of pain during injury and inflammation. This article is part of the Special Issue entitled 'Acid-Sensing Ion Channels in the Nervous System'. PMID:25592215

  11. ASICS AND NEUROPEPTIDES

    PubMed Central

    Vick, Jonathan S.; Askwith, Candice C.

    2015-01-01

    The acid sensing ion channels (ASICs) are proton-gated cation channels expressed throughout the nervous system. ASICs are activated during acidic pH fluctuations, and recent work suggests that they are involved in excitatory synaptic transmission. ASICs can also induce neuronal degeneration and death during pathological extracellular acidosis caused by ischemia, autoimmune inflammation, and traumatic injury. Many endogenous neuromodulators target ASICs to affect their biophysical characteristics and contributions to neuronal activity. One of the most unconventional types of modulation occurs with the interaction of ASICs and neuropeptides. Collectively, FMRFamide-related peptides and dynorphins potentiate ASIC activity by decreasing the proton-sensitivity of steady state desensitization independent of G protein-coupled receptor activation. By decreasing the proton-sensitivity of steady state desensitization, the FMRFamide-related peptides and dynorphins permit ASICs to remain active at more acidic basal pH. Unlike the dynorphins, some FMRFamide-related peptides also potentiate ASIC activity by slowing inactivation and increasing the sustained current. Through mechanistic studies, the modulation of ASICs by FMRFamide-related peptides and dynorphins appears to be through distinct interactions with the extracellular domain of ASICs. Dynorphins are expressed throughout the nervous system and can increase neuronal death during prolonged extracellular acidosis, suggesting that the interaction between dynorphins and ASICs may have important consequences for the prevention of neurological injury. The overlap in expression of FMRFamide-related peptides with ASICs in the dorsal horn of the spinal cord suggests that their interaction may have important consequences for the treatment of pain during injury and inflammation. PMID:25592215

  12. ASICs and cardiovascular homeostasis.

    PubMed

    Abboud, François M; Benson, Christopher J

    2015-07-01

    In this review we address primarily the role of ASICs in determining sensory signals from arterial baroreceptors, peripheral chemoreceptors, and cardiopulmonary and somatic afferents. Alterations in these sensory signals during acute cardiovascular stresses result in changes in sympathetic and parasympathetic activities that restore cardiovascular homeostasis. In pathological states, however, chronic dysfunctions of these afferents result in serious sympatho-vagal imbalances with significant increases in mortality and morbidity. We identified a role for ASIC2 in the mechano-sensitivity of aortic baroreceptors and of ASIC3 in the pH sensitivity of carotid bodies. In spontaneously hypertensive rats, we reported decreased expression of ASIC2 in nodose ganglia neurons and overexpression of ASIC3 in carotid bodies. This reciprocal expression of ASIC2 and ASIC3 results in reciprocal changes in sensory sensitivity of baro- and chemoreceptors and a consequential synergistic exaggeration sympathetic nerve activity. A similar reciprocal sensory dysautonomia prevails in heart failure and increases the risk of mortality. There is also evidence that ASIC heteromers in skeletal muscle afferents contribute significantly to the exercise pressor reflex. In cardiac muscle afferents of the dorsal root ganglia, they contribute to nociception and to the detrimental sympathetic activation during ischemia. Finally, we report that an inhibitory influence of ASIC2-mediated baroreceptor activity suppresses the sympatho-excitatory reflexes of the chemoreceptors and skeletal muscle afferents, as well as the ASIC1a-mediated excitation of central neurons during fear, threat, or panic. The translational potential of activation of ASIC2 in cardiovascular disease states may be a beneficial sympatho-inhibition and parasympathetic activation. This article is part of the Special Issue entitled 'Acid-Sensing Ion Channels in the Nervous System'. PMID:25592213

  13. ASIC Design and Data Communications for the Boston Retinal Prosthesis

    PubMed Central

    Shire, Douglas B.; Ellersick, William; Kelly, Shawn K.; Doyle, Patrick; Priplata, Attila; Drohan, William; Mendoza, Oscar; Gingerich, Marcus; McKee, Bruce; Wyatt, John L.; Rizzo, Joseph F.

    2016-01-01

    We report on the design and testing of a custom application-specific integrated circuit (ASIC) that has been developed as a key component of the Boston retinal prosthesis. This device has been designed for patients who are blind due to age-related macular degeneration or retinitis pigmentosa. Key safety and communication features of the low-power ASIC are described, as are the highly configurable neural stimulation current waveforms that are delivered to its greater than 256 output electrodes. The ASIC was created using an 0.18 micron Si fabrication process utilizing standard 1.8 volt CMOS transistors as well as 20 volt lightly doped drain FETs. The communication system receives frequency-shift keyed inputs at 6.78 MHz from an implanted secondary coil, and transmits data back to the control unit through a lower-bandwidth channel that employs load-shift keying. The design’s safety is ensured by on-board electrode voltage monitoring, stimulus charge limits, error checking of data transmitted to the implant, and comprehensive self-test and performance monitoring features. Each stimulus cycle is initiated by a transmitted word with a full 32-bit error check code. Taken together, these features allow researchers to safely and wirelessly tailor retinal stimulation and vision recovery for each patient. PMID:23365888

  14. ASIC for High Rate 3D Position Sensitive Detectors

    SciTech Connect

    Vernon, E.; De Geronimo, G.; Ackley, K.; Fried, J.; He, Z.; Herman, C.; Zhang, F.

    2010-06-16

    We report on the development of an application specific integrated circuit (ASIC) for 3D position sensitive detectors (3D PSD). The ASIC is designed to operate with pixelated wide bandgap sensors like Cadmium-Zinc-Telluride (CZT), Mercuric Iodide (Hgl2) and Thallium Bromide (TIBr). It measures the amplitudes and timings associated with an ionizing event on 128 anodes, the anode grid, and the cathode. Each channel provides low-noise charge amplification, high-order shaping with peaking time adjustable from 250 ns to 12 {micro}s, gain adjustable to 20 mV/fC or 120 mV/fC (for a dynamic range of 3.2 MeV and 530 keV in CZT), amplitude discrimination with 5-bit trimming, and positive and negative peak and timing detections. The readout can be full or sparse, based on a flag and single- or multi-cycle token passing. All channels, triggered channels only, or triggered with neighbors can be read out thus increasing the rate capability of the system to more than 10 kcps. The ASIC dissipates 330 mW which corresponds to about 2.5 mW per channel.

  15. Laser applications in integrated circuit packaging

    NASA Astrophysics Data System (ADS)

    Lu, Yongfeng; Song, Wen D.; Ren, ZhongMin; An, Chengwu; Ye, Kaidong D.; Liu, DaMing; Wang, Weijie; Hong, Ming Hui; Chong, Tow Chong

    2002-06-01

    Laser processing has large potential in the packaging of integrated circuits (IC). It can be used in many applications such as laser cleaning of IC mold tools, laser deflash to remove mold flash form heat sinks and lead wires of IC packages, laser singulation of BGA and CSP, laser reflow of solder ball on GBA, laser marking on packages and on SI wafers. During the implementation of all these applications, laser parameters, material issues, throughput, yield, reliability and monitoring techniques have to b taken into account. Monitoring of laser-induced plasma and laser induced acoustic wave has been used to understand and to control the processes involved in these applications.

  16. The GBT-SerDes ASIC prototype

    NASA Astrophysics Data System (ADS)

    Moreira, P.; Baron, S.; Bonacini, S.; Cobanoglu, O.; Faccio, F.; Feger, S.; Francisco, R.; Gui, P.; Li, J.; Marchioro, A.; Paillard, C.; Porret, D.; Wyllie, K.

    2010-11-01

    In the framework of the GigaBit Transceiver project (GBT), a prototype, the GBT-SerDes ASIC, was developed, fabricated and tested. To sustain high radiation doses while operating at 4.8Gb/s, the ASIC was fabricated in a commercial 130 nm CMOS technology employing radiation tolerant techniques and circuits. The transceiver serializes-deserializes the data, Reed-Solomon encodes and decodes the data and scrambles and descrambles the data for transmission over optical fibre links. This paper describes the GBT-SerDes architecture, and presents the test results.

  17. Cryogenic SiGe ASICs for readout and multiplexing of superconducting detector arrays

    NASA Astrophysics Data System (ADS)

    Voisin, F.; Prêle, D.; Bréelle, E.; Piat, M.; Sou, G.; Klisnick, G.; Redon, M.

    2008-07-01

    This paper presents an ultra low noise instrumentation based on cryogenic electronic integrated circuits (ASICs : Application Specific Integrated Circuits). We have designed successively two ASICs in standard BiCMOS SiGe 0.35 μm technology that have proved to be operating at cryogenic temperatures. The main functions of these circuits are the readout and the multiplexing of SQUID/TES arrays. We report the cryogenic operation of a first ASIC version dedicated to the readout of a 2×4 pixel demonstrator array. We particularly emphasize on the development and the test phases of an ultra low noise (0.2 nV/√Hz) cryogenic amplifier designed with two multiplexed inputs. The cryogenic SiGe amplifier coupled to a SQUID in a FLL operating at 4.2 K is also presented. We finally report on the development of a second version of this circuit to readout a 3×8 detectors array with improved noise performances and upgraded functionalities.

  18. Cryogenic SiGe ASICs for readout and multiplexing of superconducting detector arrays

    NASA Astrophysics Data System (ADS)

    Sou, G.; Klisnick, G.; Redon, M.; Voisin, F.; Prêle, D.; Bréelle, E.; Piat, M.

    2009-11-01

    This paper presents an ultra low noise instrumentation based on cryogenic electronic integrated circuits (ASICs: Application Specific Integrated Circuits). We have designed successively two ASICs in standard BiCMOS SiGe 0.35 μm technology that have proved to be operating at cryogenic temperatures. The main functions of these circuits are the readout and the multiplexing of TES/SQUID arrays. We report the cryogenic operation of a first ASIC version dedicated to the readout of a 2 × 4 pixel demonstrator array. We particularly emphasize on the development and the test phases of an ultra low white noise (0.2 nV/sqrtHz) cryogenic amplifier designed with two multiplexed inputs. The cryogenic SiGe amplifier coupled to a SQUID in a FLL operating at 4.2 K is also presented. We finally report on the development of a second version of this circuit to readout a 3 × 8 detectors array with improved noise performances and upgraded functionalities.

  19. Diagnostic applications of nucleic acid circuits.

    PubMed

    Jung, Cheulhee; Ellington, Andrew D

    2014-06-17

    CONSPECTUS: While the field of DNA computing and molecular programming was engendered in large measure as a curiosity-driven exercise, it has taken on increasing importance for analytical applications. This is in large measure because of the modularity of DNA circuitry, which can serve as a programmable intermediate between inputs and outputs. These qualities may make nucleic acid circuits useful for making decisions relevant to diagnostic applications. This is especially true given that nucleic acid circuits can potentially directly interact with and be triggered by diagnostic nucleic acids and other analytes. Chemists are, by and large, unaware of many of these advances, and this Account provides a means of touching on what might seem to be an arcane field. We begin by explaining nucleic acid amplification reactions that can lead to signal amplification, such as catalytic hairpin assembly (CHA) and the hybridization chain reaction (HCR). In these circuits, a single-stranded input acts on kinetically trapped substrates via exposed toeholds and strand exchange reactions, refolding the substrates and allowing them to interact with one another. As multiple duplexes (CHA) or concatemers of increasing length (HCR) are generated, there are opportunities to couple these outputs to different analytical modalities, including transduction to fluorescent, electrochemical, and colorimetric signals. Because both amplification and transduction are at their root dependent on the programmability of Waston-Crick base pairing, nucleic acid circuits can be much more readily tuned and adapted to new applications than can many other biomolecular amplifiers. As an example, robust methods for real-time monitoring of isothermal amplification reactions have been developed recently. Beyond amplification, nucleic acid circuits can include logic gates and thresholding components that allow them to be used for analysis and decision making. Scalable and complex DNA circuits (seesaw gates

  20. A Framework for Robust Multivariable Optimization of Integrated Circuits in Space Applications

    NASA Technical Reports Server (NTRS)

    DuMonthier, Jeffrey; Suarez, George

    2013-01-01

    Application Specific Integrated Circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way which facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as framework of software modules, templates and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation. Templates provide a starting point for both while toolbox functions minimize the code required. Once a test bench has been coded to optimize a particular circuit, it is also used to verify the final design. The combination of test bench and cost function can then serve as a template for similar circuits or be re-used to migrate the design to different processes by re-running it with the

  1. Radio-Frequency Electronics, Circuits and Applications

    NASA Astrophysics Data System (ADS)

    Hagen, Jon B.

    This accessible and comprehensive book provides an introduction to the basic concepts and key circuits of radio frequency systems, covering fundamental principles which apply to all radio devices, from wireless data transceivers on semiconductor chips to high-power broadcast transmitters. Topics covered include filters, amplifiers, oscillators, modulators, low-noise amplifiers, phase-locked loops, and transformers. Applications of radio frequency systems are described in such areas as communications, radio and television broadcasting, radar, and radio astronomy. The book contains many exercises, and assumes only a knowledge of elementary electronics and circuit analysis. It will be an ideal textbook for advanced undergraduate and graduate courses in electrical engineering, as well as an invaluable reference for researchers and professional engineers in this area, or for those moving into the field of wireless communications.

  2. Robust Multivariable Optimization and Performance Simulation for ASIC Design

    NASA Technical Reports Server (NTRS)

    DuMonthier, Jeffrey; Suarez, George

    2013-01-01

    Application-specific-integrated-circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power, and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem, which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques, which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable, are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way that facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as a framework of software modules, templates, and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation.

  3. DS Sentry: an acquisition ASIC for smart, micro-power sensing applications

    NASA Astrophysics Data System (ADS)

    Liobe, John; Fiscella, Mark; Moule, Eric; Balon, Mark; Bocko, Mark; Ignjatovic, Zeljko

    2011-06-01

    Unattended ground monitoring that combines seismic and acoustic information can be a highly valuable tool in intelligence gathering; however there are several prerequisites for this approach to be viable. The first is high sensitivity as well as the ability to discriminate real threats from noise and other spurious signals. By combining ground sensing with acoustic and image monitoring this requirement may be achieved. Moreover, the DS Sentry®provides innate spurious signal rejection by the "active-filtering" technique employed as well as embedding some basic statistical analysis. Another primary requirement is spatial and temporal coverage. The ideal is uninterrupted, long-term monitoring of an area. Therefore, sensors should be densely deployed and consume very little power. Furthermore, sensors must be inexpensive and easily deployed to allow dense placements in critical areas. The ADVIS DS Sentry®, which is a fully-custom integrated circuit that enables smart, micro-power monitoring of dynamic signals, is the foundation of the proposed system. The core premise behind this technology is the use of an ultra-low power front-end for active monitoring of dynamic signals in conjunction with a highresolution, Σ Δ-based analog-to-digital converter, which utilizes a novel noise rejection technique and is only employed when a potential threat has been detected. The DS Sentry® can be integrated with seismic accelerometers and microphones and user-programmed to continuously monitor for signals with specific signatures such as impacts, footsteps, excavation noise, vehicle-induced ground vibrations, or speech, while consuming only microwatts of power. This will enable up to several years of continuous monitoring on a single small battery while concurrently mitigating false threats.

  4. Controller and data acquisition system for SIDECAR ASIC driven HAWAII detectors

    NASA Astrophysics Data System (ADS)

    Ramaprakash, Anamparambu; Burse, Mahesh; Chordia, Pravin; Chillal, Kalpesh; Kohok, Abhay; Mestry, Vilas; Punnadi, Sujit; Sinha, Sakya

    2010-07-01

    SIDECAR is an Application Specific Integrated Circuit (ASIC), which can be used for control and data acquisition from near-IR HAWAII detectors offered by Teledyne Imaging Sensors (TIS), USA. The standard interfaces provided by Teledyne are COM API and socket servers running under MS Windows platform. These interfaces communicate to the ASIC (and the detector) through an intermediate card called JWST ASIC Drive Electronics (JADE2). As part of an ongoing programme of several years, for developing astronomical focal plane array (CCDs, CMOS and Hybrid) controllers and data acquisition systems (CDAQs), IUCAA is currently developing the next generation controllers employing Virtex-5 family FPGA devices. We present here the capabilities which are built into these new CDAQs for handling HAWAII detectors. In our system, the computer which hosts the application programme, user interface and device drivers runs on a Linux platform. It communicates through a hot-pluggable USB interface (with an optional optical fibre extender) to the FPGA-based card which replaces the JADE2. The FPGA board in turn, controls the SIDECAR ASIC and through it a HAWAII-2RG detector, both of which are located in a cryogenic test Dewar set up which is liquid nitrogen cooled. The system can acquire data over 1, 4, or 32 readout channels, with or without binning, at different speeds, can define sub-regions for readout, offers various readout schemes like Fowler sampling, up-theramp etc. In this paper, we present the performance results obtained from a prototype system.

  5. A DES ASIC Suitable for Network Encryption at 10 Gbps and Beyond

    SciTech Connect

    Gass, Karl; Pierson, Lyndon G.; Robertson, Perry J.; Wilcox, D. Craig; Witzke, Edward L.

    1999-04-30

    The Sandia National Laboratories (SNL) Data Encryption Standard (DES) Application Specific Integrated Circuit (ASIC) is the fastest known implementation of the DES algorithm as defined in the Federal Information Processing Standards (FIPS) Publication 46-2. DES is used for protecting data by cryptographic means. The SNL DES ASIC, over 10 times faster than other currently available DES chips, is a high-speed, filly pipelined implementation offering encryption, decryption, unique key input, or algorithm bypassing on each clock cycle. Operating beyond 105 MHz on 64 bit words, this device is capable of data throughputs greater than 6.7 Billion bits per second (tester limited). Simulations predict proper operation up to 9.28 Billion bits per second. In low frequency, low data rate applications, the ASIC consumes less that one milliwatt of power. The device has features for passing control signals synchronized to throughput data. Three SNL DES ASICS may be easily cascaded to provide the much greater security of triple-key, triple-DES.

  6. VLSI circuits and systems for microphotonic applications

    NASA Astrophysics Data System (ADS)

    Lachowicz, S.; Rassau, A.; Kim, C.; Lee, S.-M.

    2005-12-01

    This paper describes various VLSI systems for microphotonic applications. The first project investigates an optimum phase design implementing a multi phase Opto-ULSI processor for multi-function capable optical networks. This research is oriented around the initial development of an 8 phase Opto-ULSI processor that implements a Beam Steering (BS) Opto-ULSI processor (OUP) for integrated intelligent photonic system (IIPS), while investigating the optimal phase characteristics and developing compensation for the nonlinearity of liquid crystal. The second part provides an insight into realisation of a novel 3-D configurable chip based on "sea-of-pixels" architecture, which is highly suitable for applications in multimedia systems as well as for computation of coefficients for generation of holograms required in optical switches. The paper explores strategies for implementation of distributed primitives for arithmetic processing. This entails optimisation of basic cells that would allow using these primitives as part of a 3-D "sea-of-pixel" configurable processing array. The concept of 3-D Soft-Chip Technology (SCT) entails integration of "Soft-Processing Circuits" with "Soft-Configurable Circuits", which effectively manipulates hardware primitives through vertical integration of control and data. Thus the notion of 3-D Soft-Chip emerges as a new design paradigm for content-rich multimedia, telecommunication and photonic-based networking system applications. Combined with the effective manipulation of configurable hardware arithmetic primitives, highly efficient and powerful soft configurable processing systems can be realized.

  7. A wireless capsule system with ASIC for monitoring the physiological signals of the human gastrointestinal tract.

    PubMed

    Xu, Fei; Yan, Guozheng; Zhao, Kai; Lu, Li; Gao, Jinyang; Liu, Gang

    2014-12-01

    This paper presents the design of a wireless capsule system for monitoring the physiological signals of the human gastrointestinal (GI) tract. The primary components of the system include a wireless capsule, a portable data recorder, and a workstation. Temperature, pH, and pressure sensors; an RF transceiver; a controlling and processing application specific integrated circuit (ASIC); and batteries were applied in a wireless capsule. Decreasing capsule size, improving sensor precision, and reducing power needs were the primary challenges; these were resolved by employing micro sensors, optimized architecture, and an ASIC design that include power management, clock management, a programmable gain amplifier (PGA), an A/D converter (ADC), and a serial peripheral interface (SPI) communication unit. The ASIC has been fabricated in 0.18- μm CMOS technology with a die area of 5.0 mm × 5.0 mm. The wireless capsule integrating the ASIC controller measures Φ 11 mm × 26 mm. A data recorder and a workstation were developed, and 20 cases of human experiments were conducted in hospitals. Preprocessing in the workstation can significantly improve the quality of the data, and 76 original features were determined by mathematical statistics. Based on the 13 optimal features achieved in the evaluation of the features, the clustering algorithm can identify the patients who lack GI motility with a recognition rate reaching 83.3%. PMID:25608285

  8. FRONT-END ASIC FOR HIGH RESOLUTION X-RAY SPECTROMETERS.

    SciTech Connect

    DE GERONIMO,G.; CHEN, W.; FRIED, J.; LI, Z.; PINELLI, D.A.; REHAK, P.; VERNON, E.; GASKIN, J.A.; RAMSEY, B.D.; ANELLI, G.

    2007-10-27

    We present an application specific integrated circuit (ASIC) for high-resolution x-ray spectrometers. The ASIC is designed to read out signals from a pixelated silicon drift detector (SDD). Each hexagonal pixel has an area of 15 mmz and an anode capacitance of less than 100 fF. There is no integrated Field Effect transistor (FET) in the pixel, rather, the readout is done by wirebonding the anodes to the inputs of the ASIC. The ASIC provides 14 channels of low-noise charge amplification, high-order shaping with baseline stabilization, and peak detection with analog memory. The readout is sparse and based on low voltage differential signaling. An interposer provides all the interconnections required to bias and operate the system. The channel dissipates 1.6 mW. The complete 14-pixel unit covers an area of 210 mm{sup 2}, dissipates 12 mW cm{sup -2}, and can be tiled to cover an arbitrarily large detection area. We measured a preliminary resolution of 172 eV at -35 C on the 6 keV peak of a {sup 55}Fe source.

  9. The GBT-SCA, a radiation tolerant ASIC for detector control and monitoring applications in HEP experiments

    NASA Astrophysics Data System (ADS)

    Caratelli, A.; Bonacini, S.; Kloukinas, K.; Marchioro, A.; Moreira, P.; De Oliveira, R.; Paillard, C.

    2015-03-01

    The future upgrades of the LHC experiments will increase the beam luminosity leading to a corresponding growth of the amounts of data to be treated by the data acquisition systems. To address these needs, the GBT (Giga-Bit Transceiver optical link [1,2]) architecture was developed to provide the simultaneous transfer of readout data, timing and trigger signals as well as slow control and monitoring data. The GBT-SCA ASIC, part of the GBT chip-set, has the purpose to distribute control and monitoring signals to the on-detector front-end electronics and perform monitoring operations of detector environmental parameters. In order to meet the requirements of different front-end ASICs used in the experiments, it provides various user-configurable interfaces capable to perform simultaneous operations. It is designed employing radiation tolerant design techniques to ensure robustness against SEUs and TID radiation effects and is implemented in a commercial 130 nm CMOS technology. This work presents the GBT-SCA architecture, the ASIC interfaces, the data transfer protocol, and its integration with the GBT optical link.

  10. An Analog Low-Power Frequency Readout ASIC for a SAW Array

    NASA Astrophysics Data System (ADS)

    Chiu, Shih-Wen; Li, Chen-Han; Tang, Kea-Tiong

    2011-11-01

    A polymer coated surface acoustic wave (SAW) array has potential as a gas sensing material for electronic nose (eNose) applications. But the bulky and costly SAW frequency readout instruments such as spectrum analyzers and frequency counters have made SAW based eNose applications unpopular for portable use. In previous research, SAW interface electronics comprising discrete components have been developed to implement a portable eNose. However, the system consumes considerable dynamic power due to SAW device operating at high center frequencies. This work proposes a low-power analog CMOS frequency readout application-specific integrated circuit (ASIC) for potential portable applications.

  11. Burst Mode ASIC-Based Modem

    NASA Technical Reports Server (NTRS)

    1997-01-01

    The NASA Lewis Research Center is sponsoring the Advanced Communication Technology Insertion (ACTION) for Commercial Space Applications program. The goal of the program is to expedite the development of new technology with a clear path towards productization and enhancing the competitiveness of U.S. manufacturers. The industry has made significant investment in developing ASIC-based modem technology for continuous-mode applications and has made investigations into East, reliable acquisition of burst-mode digital communication signals. With rapid advances in analog and digital communications ICs, it is expected that more functions will be integrated onto these parts in the near future. In addition custom ASIC's can also be developed to address the areas not covered by the other IC's. Using the commercial chips and custom ASIC's, lower-cost, compact, reliable, and high-performance modems can be built for demanding satellite communication application. This report outlines a frequency-hop burst modem design based on commercially available chips.

  12. NIRCA ASIC for the readout of focal plane arrays

    NASA Astrophysics Data System (ADS)

    Pâhlsson, Philip; Steenari, David; Øya, Petter; Otnes Berge, Hans Kristian; Meier, Dirk; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar; Johansen, Tor Magnus; Stein, Timo

    2016-05-01

    This work is a continuation of our preliminary tests on NIRCA - the Near Infrared Readout and Controller ASIC [1]. The primary application for NIRCA is future astronomical science and Earth observation missions where NIRCA will be used with mercury cadmium telluride image sensors (HgCdTe, or MCT) [2], [3]. Recently we have completed the ASIC tests in the cryogenic environment down to 77 K. We have verified that NIRCA provides to the readout integrated circuit (ROIC) regulated power, bias voltages, and fully programmable digital sequences with sample control of the analogue to digital converters (ADC). Both analog and digital output from the ROIC can be acquired and image data is 8b/10bencoded and delivered via serial interface. The NIRCA also provides temperature measurement, and monitors several analog and digital input channels. The preliminary work confirms that NIRCA is latch-up immune and able to operate down to 77 K. We have tested the performance of the 12-bit ADC with pre-amplifier to have 10.8 equivalent number of bits (ENOB) at 1.4 Msps and maximum sampling speed at 2 Msps. The 1.8-V and 3.3-V output regulators and the 10-bit DACs show good linearity and work as expected. A programmable sequencer is implemented as a micro-controller with a custom instruction set. Here we describe the special operations of the sequencer with regards to the applications and a novel approach to parallel real-time hardware outputs. The test results of the working prototype ASIC show good functionality and performance from room temperature down to 77 K. The versatility of the chip makes the architecture a possible candidate for other research areas, defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  13. ASIC proteins regulate smooth muscle cell migration.

    PubMed

    Grifoni, Samira C; Jernigan, Nikki L; Hamilton, Gina; Drummond, Heather A

    2008-03-01

    The purpose of the present study was to investigate Acid Sensing Ion Channel (ASIC) protein expression and importance in cellular migration. We recently demonstrated that Epithelial Na(+)Channel (ENaC) proteins are required for vascular smooth muscle cell (VSMC) migration; however, the role of the closely related ASIC proteins has not been addressed. We used RT-PCR and immunolabeling to determine expression of ASIC1, ASIC2, ASIC3 and ASIC4 in A10 cells. We used small interference RNA to silence individual ASIC expression and determine the importance of ASIC proteins in wound healing and chemotaxis (PDGF-bb)-initiated migration. We found ASIC1, ASIC2, and ASIC3, but not ASIC4, expression in A10 cells. ASIC1, ASIC2, and ASIC3 siRNA molecules significantly suppressed expression of their respective proteins compared to non-targeting siRNA (RISC) transfected controls by 63%, 44%, and 55%, respectively. Wound healing was inhibited by 10, 20, and 26% compared to RISC controls following suppression of ASIC1, ASIC2, and ASIC3, respectively. Chemotactic migration was inhibited by 30% and 45%, respectively, following suppression of ASIC1 and ASIC3. ASIC2 suppression produced a small, but significant, increase in chemotactic migration (4%). Our data indicate that ASIC expression is required for normal migration and may suggest a novel role for ASIC proteins in cellular migration. PMID:17936312

  14. XAMPS Detectors Readout ASIC for LCLS

    SciTech Connect

    Dragone, A; Pratte, J.F.; Rehak, P.; Carini, G.A.; Herbst, R.; O'Connor, P.; Siddons, D.P.; /BNL, NSLS

    2008-12-18

    An ASIC for the readout of signals from X-ray Active Matrix Pixel Sensor (XAMPS) detectors to be used at the Linac Coherent Light Source (LCLS) is presented. The X-ray Pump Probe (XPP) instrument, for which the ASIC has been designed, requires a large input dynamic range on the order of 104 photons at 8 keV with a resolution of half a photon FWHM. Due to the size of the pixel and the length of the readout line, large input capacitance is expected, leading to stringent requirement on the noise optimization. Furthermore, the large number of pixels needed for a good position resolution and the fixed LCLS beam period impose limitations on the time available for the single pixel readout. Considering the periodic nature of the LCLS beam, the ASIC developed for this application is a time-variant system providing low-noise charge integration, filtering and correlated double sampling. In order to cope with the large input dynamic range a charge pump scheme implementing a zero-balance measurement method has been introduced. It provides an on chip 3-bit coarse digital conversion of the integrated charge. The residual charge is sampled using correlated double sampling into analog memory and measured with the required resolution. The first 64 channel prototype of the ASIC has been fabricated in TSMC CMOS 0.25 {micro}m technology. In this paper, the ASIC architecture and performances are presented.

  15. Integrated circuit cell library

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

    2005-01-01

    According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

  16. Trigger Data Serializer ASIC chip for the ATLAS New Small Wheel sTGC Detector

    NASA Astrophysics Data System (ADS)

    Meng, Xiangting; Wang, Jinhong; Guan, Liang; Sang, Ziru; Chapman, John; Zhou, Bing; Zhu, Junjie

    2015-04-01

    The small-strip thin-gap chambers (sTGC) will be used as the trigger device for the Phase-I upgrade of the ATLAS new small wheel (nSW) muon detector. An Application-Specific Integrated Circuit (ASIC) chip is needed to collect digital signals from both pad and strip detectors and serialize the outputs to the circuitry located on the rim of the nSW. The large number of input channels (128 differential input channels), short time available to prepare and transmit trigger data (<100 ns), high speed output data rate (4.8 Gbps), harsh radiation environment (about 300 kRad), and low power consumption (<1 W) impose great challenges for the design of this ASIC chip using the IBM 130 nm CMOS process. We will present our design and test results based on the prototype chip we build.

  17. Blind channel estimation for MLSE receiver in high speed optical communications: theory and ASIC implementation.

    PubMed

    Gorshtein, Albert; Levy, Omri; Katz, Gilad; Sadot, Dan

    2013-09-23

    Blind channel estimation is critical for digital signal processing (DSP) compensation of optical fiber communications links. The overall channel consists of deterministic distortions such as chromatic dispersion, as well as random and time varying distortions including polarization mode dispersion and timing jitter. It is critical to obtain robust acquisition and tracking methods for estimating these distortions effects, which, in turn, can be compensated by means of DSP such as Maximum Likelihood Sequence Estimation (MLSE). Here, a novel blind estimation algorithm is developed, accompanied by inclusive mathematical modeling, and followed by extensive set of real time experiments that verify quantitatively its performance and convergence. The developed blind channel estimation is used as the basis of an MLSE receiver. The entire scheme is fully implemented in a 65 nm CMOS Application Specific Integrated Circuit (ASIC). Experimental measurements and results are presented, including Bit Error Rate (BER) measurements, which demonstrate the successful data recovery by the MLSE ASIC under various channel conditions and distances. PMID:24104070

  18. 20 CFR 416.1485 - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 416.1485... Determinations and Decisions Court Remand Cases § 416.1485 Application of circuit court law. The procedures which... court law. (a) General. We will apply a holding in a United States Court of Appeals decision that...

  19. 20 CFR 404.985 - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 404.985... and Decisions Court Remand Cases § 404.985 Application of circuit court law. The procedures which... court law. (a) General. We will apply a holding in a United States Court of Appeals decision that...

  20. 20 CFR 405.515 - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 405.515 Section 405.515 Employees' Benefits SOCIAL SECURITY ADMINISTRATION ADMINISTRATIVE REVIEW PROCESS FOR ADJUDICATING INITIAL DISABILITY CLAIMS Judicial Review § 405.515 Application of circuit court law. We...

  1. Evaluation of the Teledyne SIDECAR ASIC at cryogenic temperature using a visible hybrid H2RG focal plane array in 32 channel readout mode

    NASA Astrophysics Data System (ADS)

    Dorn, Reinhold J.; Eschbaumer, Siegfried; Hall, Donald N. B.; Finger, Gert; Mehrgan, Leander; Meyer, Manfred; Stegmeier, Joerg

    2008-07-01

    Teledyne Imaging Sensors (TIS) has developed a new CMOS device known as the SIDECAR application-specific integrated circuit (ASIC). This single chip provides all the functionality of FPA drive electronics to operate visible and infrared imaging detectors with a fully digital interface. At the last SPIE conference we presented test and performance results of a Teledyne 2K×2K silicon PIN diode array hybridized to a Hawaii-2RG multiplexer, the Hybrid Visible Silicon Imager (HyViSI). This detector was read out with the ESO standard IR detector controller IRACE, which delivers detector limited performance. We have now tested the H2RG HyViSI detector with the new TIS SIDECAR ASIC in 32 channel readout mode at cryogenic temperatures. The SIDECAR has been evaluated down to 105 Kelvin operating temperature and performance results have been compared to those obtained with external electronics. We find that the SIDECAR ASIC provides performance equal to optimized external electronics.

  2. READOUT ASIC FOR 3D POSITION-SENSITIVE DETECTORS.

    SciTech Connect

    DE GERONIMO,G.; VERNON, E.; ACKLEY, K.; DRAGONE, A.; FRIED, J.; OCONNOR, P.; HE, Z.; HERMAN, C.; ZHANG, F.

    2007-10-27

    We describe an application specific integrated circuit (ASIC) for 3D position-sensitive detectors. It was optimized for pixelated CZT sensors, and it measures, corresponding to an ionizing event, the energy and timing of signals from 121 anodes and one cathode. Each channel provides low-noise charge amplification, high-order shaping, along with peak- and timing-detection. The cathode's timing can be measured in three different ways: the first is based on multiple thresholds on the charge amplifier's voltage output; the second uses the threshold crossing of a fast-shaped signal; and the third measures the peak amplitude and timing from a bipolar shaper. With its power of 2 mW per channel the ASIC measures, on a CZT sensor Connected and biased, charges up to 100 fC with an electronic resolution better than 200 e{sup -} rms. Our preliminary spectral measurements applying a simple cathode/mode ratio correction demonstrated a single-pixel resolution of 4.8 keV (0.72 %) at 662 keV, with the electronics and leakage current contributing in total with 2.1 keV.

  3. Replication of Space-Shuttle Computers in FPGAs and ASICs

    NASA Technical Reports Server (NTRS)

    Ferguson, Roscoe C.

    2008-01-01

    A document discusses the replication of the functionality of the onboard space-shuttle general-purpose computers (GPCs) in field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). The purpose of the replication effort is to enable utilization of proven space-shuttle flight software and software-development facilities to the extent possible during development of software for flight computers for a new generation of launch vehicles derived from the space shuttles. The replication involves specifying the instruction set of the central processing unit and the input/output processor (IOP) of the space-shuttle GPC in a hardware description language (HDL). The HDL is synthesized to form a "core" processor in an FPGA or, less preferably, in an ASIC. The core processor can be used to create a flight-control card to be inserted into a new avionics computer. The IOP of the GPC as implemented in the core processor could be designed to support data-bus protocols other than that of a multiplexer interface adapter (MIA) used in the space shuttle. Hence, a computer containing the core processor could be tailored to communicate via the space-shuttle GPC bus and/or one or more other buses.

  4. Front-End ASIC for Liquid Argon TPC

    SciTech Connect

    De Geronimo, G.; Li, S.; D'Andragora, A.; Nambiar, N.; Rescia, S.; Vernon, E.; Chen, H.; Lanni, F.; Makowiecki, D.; Radeka, V.; Thorn, C.; Yu, B.

    2011-06-15

    We present a front-end application-specific integrated circuit (ASIC) for a wire based time-projection-chamber (TPC) operating in liquid Argon (LAr). The LAr TPC will be used for long baseline neutrino oscillation experiments. The ASIC must provide a low-noise readout of the signals induced on the TPC wires, digitization of those signals at 2 MSamples/s, compression, buffering and multiplexing. A resolution of better than 1000 rms electrons at 200 pF input capacitance for an input range of 300 fC is required, along with low power and operation in LAr (at 87 K). We include the characterization of a commercial technology for operation in the cryogenic environment and the first experimental results on the analog front end. The results demonstrate that complementary metal-oxide semiconductor transistors have lower noise and much improved dc characteristics at LAr temperature. Finally, we introduce the concept of '1/f equivalent' to model the low-frequency component of the noise spectral density, for use in the input metal-oxide semiconductor field-effect transistor optimization.

  5. Evaluation of a front-end ASIC for the readout of PMTs over a large dynamic range

    NASA Astrophysics Data System (ADS)

    Wu, Wei-Hao; Zhao, Lei; Liang, Yu; Yu, Li; Liu, Jian-Feng; Liu, Shu-Bin; An, Qi

    2015-12-01

    The Large High Altitude Air Shower Observatory (LHAASO) project has been proposed for the survey and study of cosmic rays. In the LHAASO project, the Water Cherenkov Detector Array (WCDA) is one of the major detectors for searching for gamma ray sources. A Charge-to-Time Convertor (QTC) ASIC (Application Specification Integrated Circuit), fabricated with Global Foundry 0.35 μm CMOS technology, has been developed for readout of photomultiplier tubes (PMTs) in the WCDA. This ASIC provides both time and charge measurement of PMT signals. The input charge is converted to a pulse width based on the Time-Over-Threshold (TOT) technique and linear discharge method; as for time measurement, leading edge discrimination is employed. This paper focuses on the evaluation of this front-end readout ASIC performance. Test results indicate that the time resolution is better than 400 ps and the charge resolution is better than 1% with large input signals and remains better than 15% @1 photoelectron (P.E.), both beyond the application requirement. Moreover, this ASIC has a weak ambient temperature dependence, low input rate dependence and high channel-to-channel isolation.

  6. High performance protection circuit for power electronics applications

    NASA Astrophysics Data System (ADS)

    Tudoran, Cristian D.; Dǎdârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

    2015-12-01

    In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a "sensor" or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

  7. High performance protection circuit for power electronics applications

    SciTech Connect

    Tudoran, Cristian D. Dădârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

    2015-12-23

    In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a “sensor” or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

  8. Simultaneous Disruption of Mouse ASIC1a, ASIC2 and ASIC3 Genes Enhances Cutaneous Mechanosensitivity

    PubMed Central

    Kang, Sinyoung; Jang, Jun Ho; Price, Margaret P.; Gautam, Mamta; Benson, Christopher J.; Gong, Huiyu; Welsh, Michael J.; Brennan, Timothy J.

    2012-01-01

    Three observations have suggested that acid-sensing ion channels (ASICs) might be mammalian cutaneous mechanoreceptors; they are structurally related to Caenorhabditis elegans mechanoreceptors, they are localized in specialized cutaneous mechanosensory structures, and mechanical displacement generates an ASIC-dependent depolarization in some neurons. However, previous studies of mice bearing a single disrupted ASIC gene showed only subtle or no alterations in cutaneous mechanosensitivity. Because functional redundancy of ASIC subunits might explain limited phenotypic alterations, we hypothesized that disrupting multiple ASIC genes would markedly impair cutaneous mechanosensation. We found the opposite. In behavioral studies, mice with simultaneous disruptions of ASIC1a, -2 and -3 genes (triple-knockouts, TKOs) showed increased paw withdrawal frequencies when mechanically stimulated with von Frey filaments. Moreover, in single-fiber nerve recordings of cutaneous afferents, mechanical stimulation generated enhanced activity in A-mechanonociceptors of ASIC TKOs compared to wild-type mice. Responses of all other fiber types did not differ between the two genotypes. These data indicate that ASIC subunits influence cutaneous mechanosensitivity. However, it is unlikely that ASICs directly transduce mechanical stimuli. We speculate that physical and/or functional association of ASICs with other components of the mechanosensory transduction apparatus contributes to normal cutaneous mechanosensation. PMID:22506072

  9. Improved On-Chip Measurement of Delay in an FPGA or ASIC

    NASA Technical Reports Server (NTRS)

    Chen, Yuan; Burke, Gary; Sheldon, Douglas

    2007-01-01

    An improved design has been devised for on-chip-circuitry for measuring the delay through a chain of combinational logic elements in a field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC). In the improved design, the delay chain does not include input and output buffers and is not configured as an oscillator. Instead, the delay chain is made part of the signal chain of an on-chip pulse generator. The duration of the pulse is measured on-chip and taken to equal the delay.

  10. Monolithic readout circuits for RHIC

    SciTech Connect

    O`Connor, P.; Harder, J.

    1991-12-31

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.

  11. ASIC design in the KM3NeT detector

    NASA Astrophysics Data System (ADS)

    Gajanana, D.; Gromov, V.; Timmer, P.

    2013-02-01

    In the KM3NeT project [1], Cherenkov light from the muon interactions with transparent matter around the detector, is used to detect neutrinos. Photo multiplier tubes (PMT) used as photon sensor, are housed in a glass sphere (aka Optical Module) to detect single photons from the Cherenkov light. The PMT needs high operational voltage ( ~ 1.5 kV) and is generated by a Cockroft-Walton (CW) multiplier circuit. The electronics required to control the PMT's and collect the signals is integrated in two ASIC's namely: 1) a front-end mixed signal ASIC (PROMiS) for the readout of the PMT and 2) an analog ASIC (CoCo) to generate pulses for charging the CW circuit and to control the feedback of the CW circuit. In this article, we discuss the two integrated circuits and test results of the complete setup. PROMiS amplifies the input charge, converts it to a pulse width and delivers the information via LVDS signals. These LVDS signals carry accurate information on the Time of arrival ( < 2 ns) and Time over Threshold. A PROM block provides unique identification to the chip. The chip communicates with the control electronics via an I2C bus. This unique combination of the ASIC's results in a very cost and power efficient PMT base design.

  12. Acid-sensing ion channels (ASICs) in mouse skeletal muscle afferents are heteromers composed of ASIC1a, ASIC2, and ASIC3 subunits

    PubMed Central

    Gautam, Mamta; Benson, Christopher J.

    2013-01-01

    Acid-sensing ion channels (ASICs) are expressed in skeletal muscle afferents, in which they sense extracellular acidosis and other metabolites released during ischemia and exercise. ASICs are formed as homotrimers or heterotrimers of several isoforms (ASIC1a, ASIC1b, ASIC2a, ASIC2b, and ASIC3), with each channel displaying distinct properties. To dissect the ASIC composition in muscle afferents, we used whole-cell patch-clamp recordings to study the properties of acid-evoked currents (amplitude, pH sensitivity, the kinetics of desensitization and recovery from desensitization, and pharmacological modulation) in isolated, labeled mouse muscle afferents from wild-type (C57BL/6J) and specific ASIC−/− mice. We found that ASIC-like currents in wild-type muscle afferents displayed fast desensitization, indicating that they are carried by heteromeric channels. Currents from ASIC1a−/− muscle afferents were less pH-sensitive and displayed faster recovery, currents from ASIC2−/− mice showed diminished potentiation by zinc, and currents from ASIC3−/− mice displayed slower desensitization than those from wild-type mice. Finally, ASIC-like currents were absent from triple-null mice lacking ASIC1a, ASIC2a, and ASIC3. We conclude that ASIC1a, ASIC2a, and ASIC3 heteromers are the principle channels in skeletal muscle afferents. These results will help us understand the role of ASICs in exercise physiology and provide a molecular target for potential drug therapies to treat muscle pain.—Gautam, M., Benson, C. J. Acid-sensing ion channels (ASICs) in mouse skeletal muscle afferents are heteromers composed of ASIC1a, ASIC2, and ASIC3 subunits. PMID:23109675

  13. Latest generation of ASICs for photodetector readout

    NASA Astrophysics Data System (ADS)

    Seguin-Moreau, N.

    2013-08-01

    The OMEGA microelectronics group has designed a new generation of multichannel integrated circuits, the "ROC" family, in AustrianMicroSystem (AMS) SiGe 0.35 μm technology to read out signals from various families of photodetectors. The chip named MAROC (standing for Multi Anode ReadOut Chip) has been designed to read out MultiAnode Photomultipliers (MAPMT), Photomultiplier ARray In SiGe ReadOut Chip (PARISROC) to read out Photomultipliers (PMTs) and SiPM Integrated ReadOut Chip (SPIROC) to readout Silicon PhotoMultiplier (SiPM) detectors and which was the first ASIC to do so. The three of them fulfill the stringent requirements of the future photodetectors, in particular in terms of low noise, radiation hardness, large dynamic range, high density and high speed while keeping low power thanks to the SiGe technology. These multi-channel ASICs are real System on Chip (SoC) as they provide charge, time and photon-counting information which are digitized internally. Their complexity and versatility enable innovative frontier detectors and also cover spin off of these detectors in adjacent fields such as medical or material imaging as well as smart detectors. In this presentation, the three ASIC architectures and test results will be described to give a general panorama of the "ROC" chips.

  14. The expression profile of acid-sensing ion channel (ASIC) subunits ASIC1a, ASIC1b, ASIC2a, ASIC2b, and ASIC3 in the esophageal vagal afferent nerve subtypes

    PubMed Central

    Dusenkova, Svetlana; Ru, Fei; Surdenikova, Lenka; Nassenstein, Christina; Hatok, Jozef; Dusenka, Robert; Banovcin, Peter; Kliment, Jan; Tatar, Milos

    2014-01-01

    Acid-sensing ion channels (ASICs) have been implicated in esophageal acid sensing and mechanotransduction. However, insufficient knowledge of ASIC subunit expression profile in esophageal afferent nerves hampers the understanding of their role. This knowledge is essential because ASIC subunits form heteromultimeric channels with distinct functional properties. We hypothesized that the esophageal putative nociceptive C-fiber nerves (transient receptor potential vanilloid 1, TRPV1-positive) express multiple ASIC subunits and that the ASIC expression profile differs between the nodose TRPV1-positive subtype developmentally derived from placodes and the jugular TRPV1-positive subtype derived from neural crest. We performed single cell RT-PCR on the vagal afferent neurons retrogradely labeled from the esophagus. In the guinea pig, nearly all (90%–95%) nodose and jugular esophageal TRPV1-positive neurons expressed ASICs, most often in a combination (65–75%). ASIC1, ASIC2, and ASIC3 were expressed in 65–75%, 55–70%, and 70%, respectively, of both nodose and jugular TRPV1-positive neurons. The ASIC1 splice variants ASIC1a and ASIC1b and the ASIC2 splice variant ASIC2b were similarly expressed in both nodose and jugular TRPV1-positive neurons. However, ASIC2a was found exclusively in the nodose neurons. In contrast to guinea pig, ASIC3 was almost absent from the mouse vagal esophageal TRPV1-positive neurons. However, ASIC3 was similarly expressed in the nonnociceptive TRPV1-negative (tension mechanoreceptors) neurons in both species. We conclude that the majority of esophageal vagal nociceptive neurons express multiple ASIC subunits. The placode-derived nodose neurons selectively express ASIC2a, known to substantially reduce acid sensitivity of ASIC heteromultimers. ASIC3 is expressed in the guinea pig but not in the mouse vagal esophageal TRPV1-positive neurons, indicating species differences in ASIC expression. PMID:25190475

  15. An analogue front-end ASIC prototype designed for PMT signal readout

    NASA Astrophysics Data System (ADS)

    Liu, Jian-Feng; Zhao, Lei; Yu, Li; Liang, Yu; Qin, Jia-Jun; Yang, Yun-Fan; Wu, Wei-Hao; Liu, Shu-Bin; An, Qi

    2016-06-01

    The Water Cherenkov Detector Array (WCDA) is one of the core detectors in the Large High Altitude Air Shower Observatory (LHAASO), and it consists of 3600 photomultiplier tubes (PMTs). Both high resolution time and charge measurement are required over a large dynamic range from 1 photoelectron (P.E.) to 4000 P.E. The prototype of an analogue front-end Application Specific Integrated Circuit (ASIC) fabricated using Global Foundry 0.35 μm CMOS technology is designed to read out the PMT signal in the WCDA. This ASIC employs leading edge discrimination and an (RC)4 shaping structure. Combined with the following Time-to-Digital Converter (TDC) and Analog-to-Digital Converter (ADC), both the arrival time and charge of the PMT signal can be measured. Initial test results indicate that time resolution is better than 350 ps and charge resolution is better than 10% at 1 P.E. and better than 1% with large input signals (300 P.E. to 4000 P.E.). Besides, this ASIC has a good channel-to-channel isolation of more than 84 dB and the temperature dependency of charge measurement is less than 5% in the range 0–50°C. Supported by Knowledge Innovation Program of Chinese Academy of Sciences (KJCX2-YW-N27), National Natural Science Foundation of China (11175174) and CAS Center for Excellence in Particle Physics (CCEPP)

  16. Towards Evolving Electronic Circuits for Autonomous Space Applications

    NASA Technical Reports Server (NTRS)

    Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

    2000-01-01

    The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.

  17. 1998 technology roadmap for integrated circuits used in critical applications

    SciTech Connect

    Dellin, T.A.

    1998-09-01

    Integrated Circuits (ICs) are being extensively used in commercial and government applications that have extreme consequences of failure. The rapid evolution of the commercial microelectronics industry presents serious technical and supplier challenges to this niche critical IC marketplace. This Roadmap was developed in conjunction with the Using ICs in Critical Applications Workshop which was held in Albuquerque, NM, November 11--12, 1997.

  18. LEC GaAs for integrated circuit applications

    NASA Technical Reports Server (NTRS)

    Kirkpatrick, C. G.; Chen, R. T.; Homes, D. E.; Asbeck, P. M.; Elliott, K. R.; Fairman, R. D.; Oliver, J. D.

    1984-01-01

    Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

  19. Acid-sensing ion channels 1a (ASIC1a) inhibit neuromuscular transmission in female mice

    PubMed Central

    Lino, Noelia G.; González-Inchauspe, Carlota M. F.; González, Laura E.; Colettis, Natalia; Vattino, Lucas G.; Wunsch, Amanda M.; Wemmie, John A.; Uchitel, Osvaldo D.

    2013-01-01

    Acid-sensing ion channels (ASIC) open in response to extracellular acidosis. ASIC1a, a particular subtype of these channels, has been described to have a postsynaptic distribution in the brain, being involved not only in ischemia and epilepsy, but also in fear and psychiatric pathologies. High-frequency stimulation of skeletal motor nerve terminals (MNTs) can induce presynaptic pH changes in combination with an acidification of the synaptic cleft, known to contribute to muscle fatigue. Here, we studied the role of ASIC1a channels on neuromuscular transmission. We combined a behavioral wire hanging test with electrophysiology, pharmacological, and immunofluorescence techniques to compare wild-type and ASIC1a lacking mice (ASIC1a −/− knockout). Our results showed that 1) ASIC1a −/− female mice were weaker than wild type, presenting shorter times during the wire hanging test; 2) spontaneous neurotransmitter release was reduced by ASIC1a activation, suggesting a presynaptic location of these channels at individual MNTs; 3) ASIC1a-mediated effects were emulated by extracellular local application of acid saline solutions (pH = 6.0; HEPES/MES-based solution); and 4) immunofluorescence techniques revealed the presence of ASIC1a antigens on MNTs. These results suggest that ASIC1a channels might be involved in controlling neuromuscular transmission, muscle contraction and fatigue in female mice. PMID:24336653

  20. Selective targeting of ASIC3 using artificial miRNAs inhibits primary and secondary hyperalgesia after muscle inflammation

    PubMed Central

    Walder, Roxanne Y.; Gautam, Mamta; Wilson, Steven P.; Benson, Christopher J.; Sluka, Kathleen A.

    2012-01-01

    Acid-sensing ion channels (ASICs) are activated by acidic pH and may play a significant role in the development of hyperalgesia. Earlier studies show ASIC3 is important for induction of hyperalgesia after muscle insult using ASIC3−/− mice. ASIC3−/− mice lack ASIC3 throughout the body, and the distribution and composition of ASICs could be different from wild-type mice. We therefore tested whether knockdown of ASIC3 in primary afferents innervating muscle of adult wild-type mice prevented development of hyper-algesia to muscle inflammation. We cloned and characterized artificial miRNAs (miR-ASIC3) directed against mouse ASIC3 (mASIC3) to downregulate ASIC3 expression in vitro and in vivo. In CHO-K1 cells transfected with mASIC3 cDNA in culture, the miR-ASIC3 constructs inhibited protein expression of mASIC3 and acidic pH-evoked currents and had no effect on protein expression or acidic pH-evoked currents of ASIC1a. When miR-ASIC3 was used in vivo, delivered into the muscle of mice using a herpes simplex viral vector, both muscle and paw mechanical hyperalgesia were reduced after carrageenan-induced muscle inflammation. ASIC3 mRNA in DRG and protein levels in muscle were decreased in vivo by miRASIC3. In CHO-K1 cells co-transfected with ASIC1a and ASIC3, miR-ASIC3 reduced the amplitude of acidic pH-evoked currents, suggesting an overall inhibition in the surface expression of heteromeric ASIC3-containing channels. Our results show, for the first time, that reducing ASIC3 in vivo in primary afferent fibers innervating muscle prevents the development of inflammatory hyperalgesia in wild-type mice, and thus, may have applications in the treatment of musculoskeletal pain in humans. PMID:21843914

  1. Printed circuits and their applications: Which way forward?

    NASA Astrophysics Data System (ADS)

    Cantatore, E.

    2015-09-01

    The continuous advancements in printed electronics make nowadays feasible the design of printed circuits which enable meaningful applications. Examples include ultra-low cost sensors embedded in food packaging, large-area sensing surfaces and biomedical assays. This paper offers an overview of state-of-the-art digital and analog circuit blocks, manufactured with a printed complementary organic TFT technology. An analog to digital converter and an RFID tag implemented exploiting these building blocks are also described. The main remaining drawbacks of the printed technology described are identified, and new approaches to further improve the state of the art, enabling more innovative applications are discussed.

  2. Development of a compact radiation-hardened low-noise front-end readout ASIC for CZT-based hard X-ray imager

    NASA Astrophysics Data System (ADS)

    Gao, W.; Gan, B.; Li, X.; Wei, T.; Gao, D.; Hu, Y.

    2015-04-01

    In this paper, we present the development and performances of a radiation-hardened front-end readout application-specific integrated circuit (ASIC) dedicated to CZT detectors for a hard X-ray imager in space applications. The readout channel consists of a charge sensitive amplifier (CSA), a CR-RC shaper, a fast shaper, a discriminator and a driving buffer. With the additional digital filtering, the readout channel can achieve very low noise performances and low power dissipation. An eight-channel prototype ASIC is designed and fabricated in 0.35 μm CMOS process. The energy range of the detected X-rays is evaluated as 1.45 keV to 281 keV. The gain is larger than 100 mV/fC. The equivalent noise charge (ENC) of the ASIC is 53 e- at zero farad plus 10 e- per picofarad. The power dissipation is less than 4.4 mW/channel. Through the measurement with a CZT detector, the energy resolution is less than 3.45 keV (FWHM) under the irradiation of the radioactive source 241Am. The radiation effect experiments indicate that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad (Si).

  3. Mongoose ASIC microcontroller programming guide

    NASA Astrophysics Data System (ADS)

    Smith, Brian S.

    1993-09-01

    The 'Mongoose' ASIC microcontroller is a radiation-hard implementation of the R3000 microprocessor. This document describes the internals of the microcontroller in a level of detail necessary for someone implementing a software design.

  4. Mongoose ASIC microcontroller programming guide

    NASA Technical Reports Server (NTRS)

    Smith, Brian S.

    1993-01-01

    The 'Mongoose' ASIC microcontroller is a radiation-hard implementation of the R3000 microprocessor. This document describes the internals of the microcontroller in a level of detail necessary for someone implementing a software design.

  5. Design Methodology: ASICs with complex in-pixel processing for Pixel Detectors

    SciTech Connect

    Fahim, Farah

    2014-10-31

    The development of Application Specific Integrated Circuits (ASIC) for pixel detectors with complex in-pixel processing using Computer Aided Design (CAD) tools that are, themselves, mainly developed for the design of conventional digital circuits requires a specialized approach. Mixed signal pixels often require parasitically aware detailed analog front-ends and extremely compact digital back-ends with more than 1000 transistors in small areas below 100μm x 100μm. These pixels are tiled to create large arrays, which have the same clock distribution and data readout speed constraints as in, for example, micro-processors. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout.

  6. MIC: Material and circuit evaluation for millimeter wave applications

    NASA Astrophysics Data System (ADS)

    Arndt, F.; Bornemann, J.; Grauerholz, D.; Vahldieck, R.; Christ, U.; Stolze, H.

    1981-02-01

    Surface roughness, dielectric constant, quality factor, and loss were measured and a literature survey was conducted to determine materials and circuits suitable for microwave application. The best materials found are RT/Duroid, Rexolite, Polyguide, SiOz, and Al2O3. Fin line, dielectric image line, microstrip line, slot line, waveguide coplanar line, and suspended substrate line are suitable circuits, as shown by the performance of 2 high Q fin line filters up to 33.7 GHz, 3 microstrip 3 dB-hybrid couplers up to 28.3 GHz, a fin line mixer up to 40 GHz, and a fin line printed probe coupler for 31.3 GHz. The design theory for high Q fin line filters is given, including the higher order mode propagation. The measured results vefify the theory. Two of the circuits built were successfully vibration tested.

  7. Hierarchical Test Development and Design-For for (a)synchronous Semi-Custom Asics.

    NASA Astrophysics Data System (ADS)

    Leenstra, Jentje

    The research, described in this thesis, deals in particular with several problems, which arise when trying to automate the process of testing low-volume semi-custom ASICs. For low-volume ASICs one of the major problems is the reduction of the test application costs. To reduce the costs of testing low-volume ASICs, the use of a semi -custom test method with associated design-for-testability techniques is proposed. To be able to start the detection and removal of testability problems during the design, a novel automated hierarchical test program development procedure is presented. It is shown how, by generating a test specification for each hierarchical module, the test program can be developed incrementally. As a result, the testability of each module becomes known and it circumvents the need to generate a complete new test program after changes. To reduce the ASIC test time, the hierarchical test development approach supports the synthesis of a reconfigurable scan path. Thereby, our novel scan path architecture circumvents the need to introduce explicit test controllers by simply loading the reconfiguration information through the scan path itself. Since the hierarchical ASIC test development method as well as the semi-custom test method requires that all test vectors can be applied through a synchronous (reconfigurable) scan path, it is also investigate how asynchronous control circuits can be designed in such a way that they are synchronously scan testable. An implementation model is presented, that uses an explicit stale register composed of SR flip-flops. It is shown that these controllers are synchronously testable and can be derived directly from a state diagram description. Finally, the possibility of using a dedicated test generation procedure is illustrated by showing how the test program for modules composed of a data path and a finite state machine controller can be derived by the use of a novel symbolic test assembly procedure. The automated

  8. Rad-Hard Microcontroller for Space Applications

    NASA Astrophysics Data System (ADS)

    Habinc, Sandi; Johansson, Fredrik; Sturesson, Fredrik; Simlastik, Martin; Hjorth, Magnus; Andersson, Jan; Redant, Steven; Sijbers, Wim; Thys, Geert; Monteleone, Claudio

    2015-09-01

    This paper describes a mixed-signal LEON3FT microcontroller ASIC (Application Specific Integrated Circuit) targeting embedded control applications with hard real-time requirements. The prototype device is currently in development at Cobham Gaisler, Sweden, and IMEC, Belgium, in the activity Microcontroller for embedded space applications, initiated and funded by the European Space Agency (ESA).

  9. Applications of the dynamic circuit theory to maglev suspension systems

    SciTech Connect

    He, Jian Liang; Rote, D.M.; Coffey, H.T.

    1993-11-01

    This paper discusses the applications of dynamic circuit theory to electrodynamic suspension EDS systems. In particular, the paper focuses on the loop-shaped coil and the figure-eight-shaped null-flux coil suspension systems. Mathematical models, including very general force expressions that can be used for the development of computer codes, are provided for each of these suspension systems. General applications and advantages of the dynamic circuit model are summarized. The paper emphasizes the transient and dynamic analysis and computer simulation of maglev systems. In general, the method discussed here can be applied to many EDS maglev design concepts. It is also suited for the computation of the performance of maglev propulsion systems. Numerical examples are presented in the paper to demonstrate the capability of the model.

  10. Design and performances of a low-noise and radiation-hardened readout ASIC for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Bo, Gan; Tingcun, Wei; Wu, Gao; Yongcai, Hu

    2016-06-01

    In this paper, we present the design and performances of a low-noise and radiation-hardened front-end readout application specific integrated circuit (ASIC) dedicated to CdZnTe detectors for a hard X-ray imager in space applications. The readout channel is comprised of a charge sensitive amplifier, a CR-RC shaping amplifier, an analog output buffer, a fast shaper, and a discriminator. An 8-channel prototype ASIC is designed and fabricated in TSMC 0.35-μm mixed-signal CMOS technology, the die size of the prototype chip is 2.2 × 2.2 mm2. The input energy range is from 5 to 350 keV. For this 8-channel prototype ASIC, the measured electrical characteristics are as follows: the overall gain of the readout channel is 210 V/pC, the linearity error is less than 2%, the crosstalk is less than 0.36%, The equivalent noise charge of a typical channel is 52.9 e‑ at zero farad plus 8.2 e‑ per picofarad, and the power consumption is less than 2.4 mW/channel. Through the measurement together with a CdZnTe detector, the energy resolution is 5.9% at the 59.5-keV line under the irradiation of the radioactive source 241Am. The radiation effect experiments show that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad(Si). Project supported by the National Key Scientific Instrument and Equipment Development Project (No. 2011YQ040082), the National Natural Science Foundation of China (Nos. 11475136, 11575144, 61176094), and the Shaanxi Natural Science Foundation of China (No. 2015JM1016).

  11. A 58 nW ECG ASIC With Motion-Tolerant Heartbeat Timing Extraction for Wearable Cardiovascular Monitoring.

    PubMed

    Da He, David; Sodini, Charles G

    2015-06-01

    An ASIC for wearable cardiovascular monitoring is implemented using a topology that takes advantage of the electrocardiogram's (ECG) waveform to replace the traditional ECG instrumentation amplifier, ADC, and signal processor with a single chip solution. The ASIC can extract heartbeat timings in the presence of baseline drift, muscle artifact, and signal clipping. The circuit can operate with ECGs ranging from the chest location to remote locations where the ECG magnitude is as low as 30 μV. Besides heartbeat detection, a midpoint estimation method can accurately extract the ECG R-wave timing, enabling the calculations of heart rate variability. With 58 nW of power consumption at 0.8 V supply voltage and 0.76 mm (2) of active die area in standard 0.18 μm CMOS technology, the ECG ASIC is sufficiently low power and compact to be suitable for long term and wearable cardiovascular monitoring applications under stringent battery and size constraints. PMID:25252285

  12. Millimeter-wave and optoelectronic applications of heterostructure integrated circuits

    NASA Technical Reports Server (NTRS)

    Pavlidis, Dimitris

    1991-01-01

    The properties are reviewed of heterostructure devices for microwave-monolithic-integrated circuits (MMICs) and optoelectronic integrated circuits (OICs). Specific devices examined include lattice-matched and pseudomorphic InAlAs/InGaAs high-electron mobility transistors (HEMTs), mixer/multiplier diodes, and heterojunction bipolar transistors (HBTs) developed with a number of materials. MMICs are reviewed that can be employed for amplification, mixing, and signal generation, and receiver/transmitter applications are set forth for OICs based on GaAs and InP heterostructure designs. HEMTs, HBTs, and junction-FETs can be utilized in combination with PIN, MSM, and laser diodes to develop novel communication systems based on technologies that combine microwave and photonic capabilities.

  13. Millimeter wave planar integrated circuit developments for communication applications

    NASA Astrophysics Data System (ADS)

    Chang, K.; Sun, C.

    Millimeter wave communication systems offer certain advantages over lower frequency systems. These advantages are related to wider bandwidth, larger data handling capacity, covert operation, and better immunity to jamming. Newer developments in the area of component technology for systems operating at millimeter wavelengths have utilized planar integrated circuits. Such circuits provide benefits of light weight, small size, and inherent low cost due to ease of high volume manufacturing. The present paper is concerned with a number of key IC components which have been developed. These components are ideally suited for direct application in advanced tactical, radar, and satellite communication systems. Attention is given to a rat-race microstrip balanced mixer, a crossbar stripline balanced mixer, and various subsystems developments.

  14. KLauS: an ASIC for silicon photomultiplier readout and its application in a setup for production testing of scintillating tiles

    NASA Astrophysics Data System (ADS)

    Briggl, K.; Dorn, M.; Hagdorn, R.; Harion, T.; Schultz-Coulon, H. C.; Shen, W.

    2014-02-01

    KLauS is an ASIC produced in the AMS 0.35 μm SiGe process to read out the charge signals from silicon photomultipliers. Developed as an analog front-end for future calorimeters with high granularity as pursued by the AHCAL concept in the CALICE collaboration, the ASIC is designed to measure the charge signal of the sensors in a large dynamic range and with low electronic noise contributions. In order to tune the operation voltage of each sensor individually, an 8-bit DAC to tune the voltage at the input terminal within a range of 2V is implemented. Using an integrated fast comparator with low jitter, the time information can be measured with sub-nanosecond resolution. The low power consumption of the ASIC can be further decreased using power gating techniques. Future versions of KLauS are under development and will incorporate an ADC with a resolution of up to 12-bits and blocks for digital data transmission. The chip is used in a setup for mass testing and characterization of scintillator tiles for the AHCAL test beam program.

  15. Digital circuits using universal logic gates

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  16. FRONT-END ASIC FOR A SILICON COMPTON TELESCOPE.

    SciTech Connect

    DE GERONIMO,G.; FRIED, J.; FROST, E.; PHLIPS, B.; VERNON, E.; WULF, E.A.

    2007-10-27

    We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detector process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.

  17. Integral Battery Power Limiting Circuit for Intrinsically Safe Applications

    NASA Technical Reports Server (NTRS)

    Burns, Bradley M.; Blalock, Norman N.

    2010-01-01

    A circuit topology has been designed to guarantee the output of intrinsically safe power for the operation of electrical devices in a hazardous environment. This design uses a MOSFET (metal oxide semiconductor field-effect transistor) as a switch to connect and disconnect power to a load. A test current is provided through a separate path to the load for monitoring by a comparator against a preset threshold level. The circuit is configured so that the test current will detect a fault in the load and open the switch before the main current can respond. The main current passes through the switch and then an inductor. When a fault occurs in the load, the current through the inductor cannot change immediately, but the voltage drops immediately to safe levels. The comparator detects this drop and opens the switch before the current in the inductor has a chance to respond. This circuit protects both the current and voltage from exceeding safe levels. Typically, this type of protection is accomplished by a fuse or a circuit breaker, but in order for a fuse or a circuit breaker to blow or trip, the current must exceed the safe levels momentarily, which may be just enough time to ignite anything in a hazardous environment. To prevent this from happening, a fuse is typically current-limited by the addition of the resistor to keep the current within safe levels while the fuse reacts. The use of a resistor is acceptable for non-battery applications where the wasted energy and voltage drop across the resistor can be tolerated. The use of the switch and inductor minimizes the wasted energy. For example, a circuit runs from a 3.6-V battery that must be current-limited to 200 mA. If the circuit normally draws 10 mA, then an 18-ohm resistor would drop 180 mV during normal operation, while a typical switch (0.02 ohm) and inductor (0.97 ohm) would only drop 9.9 mV. From a power standpoint, the current-limiting resistor protection circuit wastes about 18 times more power than the

  18. Delay locked loop integrated circuit.

    SciTech Connect

    Brocato, Robert Wesley

    2007-10-01

    This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.

  19. The use of hybrid integrated circuit techniques in biotelemetry applications

    NASA Technical Reports Server (NTRS)

    Fryer, T. B.

    1977-01-01

    A review is presented of some features of hybrid integrated circuits that make their use advantageous in miniature biotelemetry applications. The various techniques for fabricating resistors, capacitors and interconnections by both thin film and thick film technology are discussed. The use of chip capacitors, resistors, and especially standard IC chips on substrates with fired-on interconnection patterns is emphasized. The review is designed primarily to acquaint biotelemetry users and designers with an overview of this fabrication technique so that they can better communicate their needs with an understanding of its limitations and advantages to facilities specializing in hybrid construction.

  20. 3D probe array integrated with a front-end 100-channel neural recording ASIC

    NASA Astrophysics Data System (ADS)

    Cheng, Ming-Yuan; Yao, Lei; Tan, Kwan Ling; Lim, Ruiqi; Li, Peng; Chen, Weiguo

    2014-12-01

    Brain-machine interface technology can improve the lives of spinal cord injury victims and amputees. A neural interface system, consisting of a 3D probe array and a custom low-power (1 mW) 100-channel (100-ch) neural recording application-specific integrated circuit (ASIC), was designed and implemented to monitor neural activity. In this study, a microassembly 3D probe array method using a novel lead transfer technique was proposed to overcome the bonding plane mismatch encountered during orthogonal assembly. The proposed lead transfer technique can be completed using standard micromachining and packaging processes. The ASIC can be stacking-integrated with the probe array, minimizing the form factor of the assembled module. To minimize trauma to brain cells, the profile of the integrated probe array was controlled within 730 μm. The average impedance of the assembled probe was approximately 0.55 MΩ at 1 kHz. To verify the functionality of the integrated neural probe array, bench-top signal acquisitions were performed and discussed.

  1. Driving a CCD with two ASICs: CABAC and ASPIC

    NASA Astrophysics Data System (ADS)

    Juramy, Claire; Antilogus, Pierre; Bailly, Philippe; Baumont, Sylvain; Dhellot, Marc; El Berni, Mowafak; Jeglot, Jimmy; Lebbolo, Hervé; Martin, David; Qureshi, Aftab; Russo, Stefano; Terront, Diego; Tocut, Vanessa; Vallerand, Philippe

    2014-07-01

    We present two lines of ASICs dedicated to the control and readout of CCD sensors. The CABAC (Clocks And Biases ASIC for CCDs) provides all required bias voltages and clocks. The ASPIC (Analog Signal Processing Integrated Circuit) processes 8 CCD output channels: amplification, Correlated Double Sampling, conversion to differential signal. Both chips are highly configurable in order to fulfill a wide range of astronomical CCD readout needs, from fast readout of wide-field imaging arrays to slower speeds and higher gains for spectroscopy. Their sizes and temperature ranges allow to integrate them in-cryostat, close to the sensors, and they offer diagnostic capabilities to assist the integration. In addition to extensive stand-alone tests, these chips are integrated in the LSST REB (Raft Electronics Board), and have been tested driving the E2V prototype CCD for the LSST focal plane.

  2. Data encryption standard ASIC design and development report.

    SciTech Connect

    Robertson, Perry J.; Pierson, Lyndon George; Witzke, Edward L.

    2003-10-01

    This document describes the design, fabrication, and testing of the SNL Data Encryption Standard (DES) ASIC. This device was fabricated in Sandia's Microelectronics Development Laboratory using 0.6 {micro}m CMOS technology. The SNL DES ASIC was modeled using VHDL, then simulated, and synthesized using Synopsys, Inc. software and finally IC layout was performed using Compass Design Automation's CAE tools. IC testing was performed by Sandia's Microelectronic Validation Department using a HP 82000 computer aided test system. The device is a single integrated circuit, pipelined realization of DES encryption and decryption capable of throughputs greater than 6.5 Gb/s. Several enhancements accommodate ATM or IP network operation and performance scaling. This design is the latest step in the evolution of DES modules.

  3. Single event upset test structures for digital CMOS application specific integrated circuits

    SciTech Connect

    Baze, M.P.; Bartholet, W.G.; Braatz, J.C.; Dao, T.A. )

    1993-12-01

    An approach has been developed for the design and utilization of SEU test structures for digital CMOS ASICs. This approach minimizes the number of test structures required by categorizing ASIC library cells according to their SEU response and designing a structure to characterize each response for each category. Critical SEU response parameters extracted from these structures are used to evaluate the SEU hardness of ASIC libraries and predict the hardness of ASIC chips.

  4. Capturing a failure of an ASIC in-situ, using infrared radiometry and image processing software

    NASA Technical Reports Server (NTRS)

    Ruiz, Ronald P.

    2003-01-01

    Failures in electronic devices can sometimes be tricky to locate-especially if they are buried inside radiation-shielded containers designed to work in outer space. Such was the case with a malfunctioning ASIC (Application Specific Integrated Circuit) that was drawing excessive power at a specific temperature during temperature cycle testing. To analyze the failure, infrared radiometry (thermography) was used in combination with image processing software to locate precisely where the power was being dissipated at the moment the failure took place. The IR imaging software was used to make the image of the target and background, appear as unity. As testing proceeded and the failure mode was reached, temperature changes revealed the precise location of the fault. The results gave the design engineers the information they needed to fix the problem. This paper describes the techniques and equipment used to accomplish this failure analysis.

  5. VEGA: A low-power front-end ASIC for large area multi-linear X-ray silicon drift detectors: Design and experimental characterization

    NASA Astrophysics Data System (ADS)

    Ahangarianabhari, Mahdi; Macera, Daniele; Bertuccio, Giuseppe; Malcovati, Piero; Grassi, Marco

    2015-01-01

    We present the design and the first experimental characterization of VEGA, an Application Specific Integrated Circuit (ASIC) designed to read out large area monolithic linear Silicon Drift Detectors (SDD's). VEGA consists of an analog and a digital/mixed-signal section to accomplish all the functionalities and specifications required for high resolution X-ray spectroscopy in the energy range between 500 eV and 50 keV. The analog section includes a charge sensitive preamplifier, a shaper with 3-bit digitally selectable shaping times from 1.6 μs to 6.6 μs and a peak stretcher/sample-and-hold stage. The digital/mixed-signal section includes an amplitude discriminator with coarse and fine threshold level setting, a peak discriminator and a logic circuit to fulfill pile-up rejection, signal sampling, trigger generation, channel reset and the preamplifier and discriminators disabling functionalities. A Serial Peripherical Interface (SPI) is integrated in VEGA for loading and storing all configuration parameters in an internal register within few microseconds. The VEGA ASIC has been designed and manufactured in 0.35 μm CMOS mixed-signal technology in single and 32 channel versions with dimensions of 200 μm×500 μm per channel. A minimum intrinsic Equivalent Noise Charge (ENC) of 12 electrons r.m.s. at 3.6 μs peaking time and room temperature is measured and the linearity error is between -0.9% and +0.6% in the whole input energy range. The total power consumption is 481 μW and 420 μW per channel for the single and 32 channels version, respectively. A comparison with other ASICs for X-ray SDD's shows that VEGA has a suitable low noise and offers high functionality as ADC-ready signal processing but at a power consumption that is a factor of four lower than other similar existing ASICs.

  6. NMDAR-Mediated Hippocampal Neuronal Death is Exacerbated by Activities of ASIC1a

    PubMed Central

    Gao, Su; Yu, Yang; Ma, Zhi-Yuan; Sun, Hui; Zhang, Yong-Li; Wang, Xing-Tao; Wang, Chaoyun; Fan, Wei-Ming; Zheng, Qing-Yin

    2015-01-01

    NMDARs and ASIC1a both exist in central synapses and mediate important physiological and pathological conditions, but the functional relationship between them is unclear. Here we report several novel findings that may shed light on the functional relationship between these two ion channels in the excitatory postsynaptic membrane of mouse hippocampus. Firstly, NMDAR activation induced by either NMDA or OGD led to increased [Ca2+]i and greater apoptotic and necrotic cell deaths in cultured hippocampal neurons; these cell deaths were prevented by application of NMDAR antagonists. Secondly, ASIC1a activation induced by pH 6.0 extracellular solution (ECS) showed similar increases in apoptotic and necrotic cell deaths; these cell deaths were prevented by ASIC1a antagonists, and also by NMDAR antagonists. Since increased [Ca2+]i leads to increased cell deaths and since NMDAR exhibits much greater calcium permeability than ASIC1a, these data suggest that ASIC1a-induced neuronal death is mediated through activation of NMDARs. Thirdly, treatment of hippocampal cultures with both NMDA and acidic ECS induced greater degrees of cell deaths than either NMDA or acidic ECS treatment alone. These results suggest that ASIC1a activation up-regulates NMDAR function. Additional data supporting the functional relationship between ASIC1a and NMDAR are found in our electrophysiology experiments in hippocampal slices, where stimulation of ASIC1a induced a marked increase in NMDAR EPSC amplitude, and inhibition of ASIC1a resulted in a decrease in NMDAR EPSC amplitude. In summary, we present evidence that ASIC1a activity facilitates NMDAR function and exacerbates NMDAR-mediated neuronal death in pathological conditions. These findings are invaluable to the search for novel therapeutic targets in the treatment of brain ischemia. PMID:25947342

  7. A Prototype PZT Matrix Transducer With Low-Power Integrated Receive ASIC for 3-D Transesophageal Echocardiography.

    PubMed

    Chen, Chao; Raghunathan, Shreyas B; Yu, Zili; Shabanimotlagh, Maysam; Chen, Zhao; Chang, Zu-yao; Blaak, Sandra; Prins, Christian; Ponte, Jacco; Noothout, Emile; Vos, Hendrik J; Bosch, Johan G; Verweij, Martin D; de Jong, Nico; Pertijs, Michiel A P

    2016-01-01

    This paper presents the design, fabrication, and experimental evaluation of a prototype lead zirconium titanate (PZT) matrix transducer with an integrated receive ASIC, as a proof of concept for a miniature three-dimensional (3-D) transesophageal echocardiography (TEE) probe. It consists of an array of 9 ×12 piezoelectric elements mounted on the ASIC via an integration scheme that involves direct electrical connections between a bond-pad array on the ASIC and the transducer elements. The ASIC addresses the critical challenge of reducing cable count, and includes front-end amplifiers with adjustable gains and micro-beamformer circuits that locally process and combine echo signals received by the elements of each 3 ×3 subarray. Thus, an order-of-magnitude reduction in the number of receive channels is achieved. Dedicated circuit techniques are employed to meet the strict space and power constraints of TEE probes. The ASIC has been fabricated in a standard 0.18-μm CMOS process and consumes only 0.44 mW/channel. The prototype has been acoustically characterized in a water tank. The ASIC allows the array to be presteered across ±37° while achieving an overall dynamic range of 77 dB. Both the measured characteristics of the individual transducer elements and the performance of the ASIC are in good agreement with expectations, demonstrating the effectiveness of the proposed techniques. PMID:26540683

  8. Advanced polymer systems for optoelectronic integrated circuit applications

    NASA Astrophysics Data System (ADS)

    Eldada, Louay A.; Stengel, Kelly M. T.; Shacklette, Lawrence W.; Norwood, Robert A.; Xu, Chengzeng; Wu, Chengjiu; Yardley, James T.

    1997-01-01

    An advanced versatile low-cost polymeric waveguide technology is proposed for optoelectronic integrated circuit applications. We have developed high-performance organic polymeric materials that can be readily made into both multimode and single-mode optical waveguide structures of controlled numerical aperture (NA) and geometry. These materials are formed from highly crosslinked acrylate monomers with specific linkages that determine properties such as flexibility, toughness, loss, and stability against yellowing and humidity. These monomers are intermiscible, providing for precise adjustment of the refractive index from 1.30 to 1.60. Waveguides are formed photolithographically, with the liquid monomer mixture polymerizing upon illumination in the UV via either mask exposure or laser direct-writing. A wide range of rigid and flexible substrates can be used, including glass, quartz, oxidized silicon, glass-filled epoxy printed circuit board substrate, and flexible polyimide film. We discuss the use of these materials on chips and on multi-chip modules (MCMs), specifically in transceivers where we adaptively produced waveguides on vertical-cavity surface-emitting lasers (VCSELs) embedded in transmitter MCMs and on high- speed photodetector chips in receiver MCMs. Light coupling from and to chips is achieved by cutting 45 degree mirrors using excimer laser ablation. The fabrication of our polymeric structures directly on the modules provides for stability, ruggedness, and hermeticity in packaging.

  9. Laser applications in integrated circuits and photonics packaging

    NASA Astrophysics Data System (ADS)

    Lu, Yong Feng; Li, L. P.; Mendu, K.; Shi, J.

    2004-07-01

    Laser processing has large potential in the packaging of integrated circuits (IC). It can be used in many applications such as laser cleaning of IC mold tools, laser deflash to remove mold flash from heat sinks and lead wires of IC packages, laser singulation of BGA (ball grid array) and CSP (chip scale packages), laser reflow of solder ball on GBA, laser peeling for CSP, laser marking on packages and on Si wafers. Laser nanoimprinting of self-assembled nanoparticles has been recently developed to fabricate hemispherical cavity arrays on semiconductor surfaces. This process has the potential applications in fabrication and packaging of photonic devices such as waveguides and optical interconnections. During the implementation of all these applications, laser parameters, material issues, throughput, yield, reliability and monitoring techniques have to be taken into account. Monitoring of laser-induced plasma and laser induced acoustic wave has been used to understand and to control the processes involved in these applications. Numerical simulations can provide useful information on process analysis and optimization.

  10. Acid-Sensing Ion Channel 2a (ASIC2a) Promotes Surface Trafficking of ASIC2b via Heteromeric Assembly

    PubMed Central

    Kweon, Hae-Jin; Kim, Dong-Il; Bae, Yeonju; Park, Jae-Yong; Suh, Byung-Chang

    2016-01-01

    Acid-sensing ion channels (ASICs) are proton-activated cation channels that play important roles as typical proton sensors during pathophysiological conditions and normal synaptic activities. Among the ASIC subunits, ASIC2a and ASIC2b are alternative splicing products from the same gene, ACCN1. It has been shown that ASIC2 isoforms have differential subcellular distribution: ASIC2a targets the cell surface by itself, while ASIC2b resides in the ER. However, the underlying mechanism for this differential subcellular localization remained to be further elucidated. By constructing ASIC2 chimeras, we found that the first transmembrane (TM1) domain and the proximal post-TM1 domain (17 amino acids) of ASIC2a are critical for membrane targeting of the proteins. We also observed that replacement of corresponding residues in ASIC2b by those of ASIC2a conferred proton-sensitivity as well as surface expression to ASIC2b. We finally confirmed that ASIC2b is delivered to the cell surface from the ER by forming heteromers with ASIC2a, and that the N-terminal region of ASIC2a is additionally required for the ASIC2a-dependent membrane targeting of ASIC2b. Together, our study supports an important role of ASIC2a in membrane targeting of ASIC2b. PMID:27477936

  11. Acid-Sensing Ion Channel 2a (ASIC2a) Promotes Surface Trafficking of ASIC2b via Heteromeric Assembly.

    PubMed

    Kweon, Hae-Jin; Kim, Dong-Il; Bae, Yeonju; Park, Jae-Yong; Suh, Byung-Chang

    2016-01-01

    Acid-sensing ion channels (ASICs) are proton-activated cation channels that play important roles as typical proton sensors during pathophysiological conditions and normal synaptic activities. Among the ASIC subunits, ASIC2a and ASIC2b are alternative splicing products from the same gene, ACCN1. It has been shown that ASIC2 isoforms have differential subcellular distribution: ASIC2a targets the cell surface by itself, while ASIC2b resides in the ER. However, the underlying mechanism for this differential subcellular localization remained to be further elucidated. By constructing ASIC2 chimeras, we found that the first transmembrane (TM1) domain and the proximal post-TM1 domain (17 amino acids) of ASIC2a are critical for membrane targeting of the proteins. We also observed that replacement of corresponding residues in ASIC2b by those of ASIC2a conferred proton-sensitivity as well as surface expression to ASIC2b. We finally confirmed that ASIC2b is delivered to the cell surface from the ER by forming heteromers with ASIC2a, and that the N-terminal region of ASIC2a is additionally required for the ASIC2a-dependent membrane targeting of ASIC2b. Together, our study supports an important role of ASIC2a in membrane targeting of ASIC2b. PMID:27477936

  12. Hybrid planar lightwave circuits for defense and aerospace applications

    NASA Astrophysics Data System (ADS)

    Zhang, Hua; Bidnyk, Serge; Yang, Shiquan; Balakrishnan, Ashok; Pearson, Matt; O'Keefe, Sean

    2010-04-01

    We present innovations in Planar Lightwave Circuits (PLCs) that make them ideally suited for use in advanced defense and aerospace applications. We discuss PLCs that contain no micro-optic components, no moving parts, pose no spark or fire hazard, are extremely small and lightweight, and are capable of transporting and processing a range of optical signals with exceptionally high performance. This PLC platform is designed for on-chip integration of active components such as lasers and detectors, along with transimpedance amplifiers and other electronics. These active components are hybridly integrated with our silica-on-silicon PLCs using fully-automated robotics and image recognition technology. This PLC approach has been successfully applied to the design and fabrication of multi-channel transceivers for aerospace applications. The chips contain hybrid DFB lasers and high-efficiency detectors, each capable of running over 10 Gb/s, with mixed digital and analog traffic multiplexed to a single optical fiber. This highlyintegrated functionality is combined onto a silicon chip smaller than 4 x 10 mm, weighing < 5 grams. These chip-based transceivers have been measured to withstand harsh g-forces, including sinusoidal vibrations with amplitude of 20 g acceleration, followed by mechanical shock of 500 g acceleration. The components operate over a wide range of temperatures, with no device failures after extreme temperature cycling through a range of > 125 degC, and more than 2,000 hours operating at 95 degC ambient air temperature. We believe that these recent advancements in planar lightwave circuits are poised to revolutionize optical communications and interconnects in the aerospace and defense industries.

  13. The read-out ASIC for the Space NUCLEON project

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Voronin, A.; Karmanov, D.; Kudryashov, I.; Podorozhniy, D.; Shumikhin, V.

    2015-04-01

    This paper summarizes the design results for the read-out ASIC for the space NUCLEON project of the Russian Federal Space Agency ROSCOSMOS. The ASIC with a unique high dynamic range (1-40 000 mip) at low power consumption (< 1.5 mW per channel) has been developed. It allows to record signals of relativistic particles and nuclei with charges from Z = 1 up to Z > 50, generated by silicon detectors, having capacitances up to 100 pF. The chip structure includes 32 analog channels, each consisting of a charge sensitive amplifier (CSA) with a p-MOS input transistor (W = 8 mm, L = 0.5 μ m), a shaper (peaking time of 2 us) and a T&H circuit. The ASIC showed a 120 pC dynamic range at a SNR of 2.5 for the particles with minimal ionization energy (1 mip). The chip was fabricated by the 0.35 um CMOS process via Europractice and tested both at lab conditions and in the SPS beam at CERN.

  14. A demonstration of CMOS VLSI circuit prototyping in support of the site facility using the 1.2 micron standard cell library developed by National Security Agency

    NASA Technical Reports Server (NTRS)

    Smith, Edwyn D.

    1991-01-01

    Two silicon CMOS application specific integrated circuits (ASICs), a data generation chip, and a data checker chip were designed. The conversion of the data generator circuitry into a pair of CMOS ASIC chips using the 1.2 micron standard cell library is documented. The logic design of the data checker is discussed. The functions of the control circuitry is described. An accurate estimate of timing relationships is essential to make sure that the logic design performs correctly under practical conditions. Timing and delay information are examined.

  15. AMPLITUDE AND TIME MEASUREMENT ASIC WITH ANALOG DERANDOMIZATION.

    SciTech Connect

    O CONNOR,P.; DE GERONIMO,G.; KANDASAMY,A.

    2002-11-10

    We describe a new ASIC for accurate and efficient processing of high-rate pulse signals from highly segmented detectors. In contrast to conventional approaches, this circuit affords a dramatic reduction in data volume through the use of analog techniques (precision peak detectors and time-to-amplitude converters) together with fast arbitration and sequencing logic to concentrate the data before digitization. In operation the circuit functions like a data-driven analog first-in, first-out (FIFO) memory between the preamplifiers and the ADC. Peak amplitudes of pulses arriving at any one of the 32 inputs are sampled, stored, and queued for readout and digitization through a single output port. Hit timing, pulse risetime, and channel address are also available at the output. Prototype chips have been fabricated in 0.35 micron CMOS and tested. First results indicate proper functionality for pulses down to 30 ns peaking time and input rates up to 1.6 MHz/channel. Amplitude accuracy of the peak detect and hold circuit is 0.3% (absolute). TAC accuracy is within 0.3% of full scale. Power consumption is less than 2 mW/channel. Compared with conventional techniques such as track-and-hold and analog memory, this new ASIC will enable efficient pulse height measurement at 20 to 300 times higher rates.

  16. STAR cluster-finder ASIC

    SciTech Connect

    Botlo, M.; LeVine, M.J.; Scheetz, R.A.

    1997-12-31

    The STAR experiment reads out a TPC and an SVT (silicon vertex tracker), both of which require in-line pedestal subtraction, compression of ADC values from 10-bit to 8-bit, and location of time sequences representing responses to charged-particle tracks. The STAR cluster finder ASIC responds to all of these needs. Pedestal subtraction and compression are performed using lookup tables in attached RAM. We describe its design and implementation, as well as testing methodology and results of tests performed on foundry prototypes.

  17. Application of telecom planar lightwave circuits for homeland security sensing

    NASA Astrophysics Data System (ADS)

    Veldhuis, Gert J.; Elders, Job; van Weerden, Harm; Amersfoort, Martin

    2004-03-01

    Over the past decade, a massive effort has been made in the development of planar lightwave circuits (PLCs) for application in optical telecommunications. Major advances have been made, on both the technological and functional performance front. Highly sophisticated software tools that are used to tailor designs to required functional performance support these developments. In addition extensive know-how in the field of packaging, testing, and failure mode and effects analysis (FMEA) has been built up in the struggle for meeting the stringent Telcordia requirements that apply to telecom products. As an example, silica-on-silicon is now a mature technology available at several industrial foundries around the world, where, on the performance front, the arrayed-waveguide grating (AWG) has evolved into an off-the-shelf product. The field of optical chemical-biological (CB) sensors for homeland security application can greatly benefit from the advances as described above. In this paper we discuss the currently available technologies, device concepts, and modeling tools that have emerged from the telecommunications arena and that can effectively be applied to the field of homeland security. Using this profound telecom knowledge base, standard telecom components can readily be tailored for detecting CB agents. Designs for telecom components aim at complete isolation from the environment to exclude impact of environmental parameters on optical performance. For sensing applications, the optical path must be exposed to the measurand, in this area additional development is required beyond what has already been achieved in telecom development. We have tackled this problem, and are now in a position to apply standard telecom components for CB sensing. As an example, the application of an AWG as a refractometer is demonstrated, and its performance evaluated.

  18. 20 CFR 410.670c - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 410.670c... court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of circuit court law. (a) The Administration will apply a holding in a...

  19. Practical applications of digital integrated circuits. Part 3: Practical sequential theory and synchronous circuits

    NASA Technical Reports Server (NTRS)

    1973-01-01

    Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be noted that the logic theory contained herein applies to all hardware. Discussed here are synchronous binary UP counters, synchronous DOWN and UP/DOWN counters, integrated circuit counters, shift registers, sequential techniques, and designing sequential counting machines.

  20. BAE Systems Radiation Hardened SpaceWire ASIC and Roadmap

    NASA Technical Reports Server (NTRS)

    Berger, Richard; Milliser, Myrna; Kapcio, Paul; Stanley, Dan; Moser, David; Koehler, Jennifer; Rakow, Glenn; Schnurr, Richard

    2006-01-01

    An Application Specific Integrated Circuit (ASIC) that implements the SpaceWire protocol has been developed in a radiation hardened 0.25 micron CMOS, technology. This effort began in March 2003 as a joint development between the NASA Goddard Space Flight Center (GSFC) and BAE Systems. The BAE Systems SpaceWire ASlC is comprised entirely of reusable core elements, many of which are already flight-proven. It incorporates a 4-port SpaceWire router with two local ports, dual PC1 bus interfaces, a microcontroller, 32KB of internal memory, -and a memory controller for additional external memory use. The SpaceWire ASlC is planned for use on both the Geostationary Operational Environmental Satellites (GOES)-R and the Lunar Reconnaissance Orbiter (LRO). Engineering parts have already been delivered to both programs. This paper discusses the SpaceWire protocol and those elements of it that have been built into the current SpaceWire reusable core. There are features within the core that go beyond the current standard that can be enabled or disabled by the user and these will be described. The adaptation of SpaceWire to BAE Systems' On Chip Bus (OCB) for compatibility with the other reusable cores will be discussed. Optional configurations within user systems will be shown. The physical imp!ementation of the design will be described and test results from the hardware will be discussed. Finally, the BAE Systems roadmap for SpaceWire developments will be discussed, including some products already in design as well as longer term plans.

  1. Rethinking ASIC design with next generation lithography and process integration

    NASA Astrophysics Data System (ADS)

    Vaidyanathan, Kaushik; Liu, Renzhi; Liebmann, Lars; Lai, Kafai; Strojwas, Andrzej; Pileggi, Larry

    2013-03-01

    Given the deployment delays for EUV, several next generation lithography (NGL) options are being actively researched. Several cost-effective NGL solutions, such as self-aligned double patterning through sidewall image transfer (SIT) and directed self-assembly (DSA), in conjunction with process integration challenges, mandate grating-like pattern design. As part of the GRATEdd project, we have evaluated the design cost of grating-based design for ASICs (application specific ICs). Based on our observations we have engineered fundamental changes to the primary ASIC design components to make scaling affordable and useful in deeply scaled sub-20 nm technologies: unidirectional-M1 based standard cells, application-specific smart SRAM synthesis, and statistical and self-healing analog design.

  2. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    SciTech Connect

    Bolotnikov, A. E. Ackley, K.; Camarda, G. S.; Cherches, C.; Cui, Y.; De Geronimo, G.; Fried, J.; Hossain, A.; Mahler, G.; Maritato, M.; Roy, U.; Salwen, C.; Vernon, E.; Yang, G.; James, R. B.; Hodges, D.; Lee, W.; Petryk, M.

    2015-07-15

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm{sup 3} detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  3. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras.

    PubMed

    Bolotnikov, A E; Ackley, K; Camarda, G S; Cherches, C; Cui, Y; De Geronimo, G; Fried, J; Hodges, D; Hossain, A; Lee, W; Mahler, G; Maritato, M; Petryk, M; Roy, U; Salwen, C; Vernon, E; Yang, G; James, R B

    2015-07-01

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm(3) detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects. PMID:26233363

  4. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    NASA Astrophysics Data System (ADS)

    Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.; Cherches, C.; Cui, Y.; De Geronimo, G.; Fried, J.; Hodges, D.; Hossain, A.; Lee, W.; Mahler, G.; Maritato, M.; Petryk, M.; Roy, U.; Salwen, C.; Vernon, E.; Yang, G.; James, R. B.

    2015-07-01

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm3 detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  5. Structure, function, and pharmacology of acid-sensing ion channels (ASICs): focus on ASIC1a

    PubMed Central

    Gründer, Stefan; Chen, Xuanmao

    2010-01-01

    Acid-sensing ion channels (ASICs) are H+-gated Na+ channels, which are present in most, if not all, neurons. The typical ASIC current is transient and is elicited by a rapid drop in the extracellular pH. In the human genome, four genes for ASICs are present: asic1 – 4. In this review, we will focus on ASIC1a, one of the key subunits in the central nervous system. We will describe the structure of this channel, a topic that has enormously profited from the recent elucidation of the first crystal structure of an ASIC. We will then relate the ASIC1 structure to current models of the gating mechanism of ASICs. Finally, we will review the pharmacology of ASIC1a. Advances in the pharmacological inhibition of individual ASIC currents have greatly contributed to our current knowledge of the functional roles of this channel in physiology, including learning, memory, and fear conditioning, and in pathophysiological states, including the neurodegeneration accompanying stroke, and axonal degeneration in autoimmune inflammation. PMID:21383888

  6. Science Enabling ASICs and FEEs for the JUICE and JEO Missions

    NASA Technical Reports Server (NTRS)

    Paschalidis, Nicholas; Sittler, Ed; Cooper, John; Christian, Eric; Moore, Tom

    2011-01-01

    A family of science enabling radiation hard Application Specific Integrated Circuits (ASICs), Front End Electronics (FEEs) and Event Processing Systems, with flight heritage on many NASA missions, is presented. These technologies play an important role in the miniaturization of instruments -and spacecraft systems- at the same time increasing performance and reducing power. The technologies target time of flight, position sensing, and energy measurements as well as standard housekeeping and telemetry functions for particle and fields instruments, but find applications in other instrument categories too. More specifically the technologies include: the TOF chip, 1D and 2D Delay Lines with MCP detectors, for high precision fast and low power time of flight and position sensing; the Energy chip for multichannel SSD readout with time over threshold and standard voltage read out for TDC and ADC digitization; Fast multi channel read out chip with commandable thresholds; the TRIO chip for multiplexed ADC and housekeeping etc. It should be mentioned that the ASICs include basic trigger capabilities to enable random event processing in a heavy background of penetrators and UV foreground. Typical instruments include time of flight versus energy and look angle particle analyzers such as: plasma composition, energetic particle, neutral atom imaging as well as fast plasma and deltaE/E ion/electron telescopes. Flight missions include: Cassini/LEMMS, IMAGE/HENA, MESSENGER/EPPS/MLA/X-ray/MLA, STEREO, PLUTO-NH/PEPSSI/LORI, IBEX-Lo, JUNO/JEDI, RBSP/RBSPICE, MMS/HPCA/EPD, SO/SIS. Given the proven capability on heavy radiation missions such as JUNO, MMS and RBSB, as well diverse long duration missions such as MESSENGER, PLUTO and Cassini, it is expected that these technologies will play an important role in the particle and fields (at least) instruments on the upcoming JUICE and JEO missions.

  7. Design and fabrication of an infrared optical pyrometer ASIC as a diagnostic for shock physics experiments

    NASA Astrophysics Data System (ADS)

    Gordon, Jared

    Optical pyrometry is the sensing of thermal radiation emitted from an object using a photoconductive device to convert photons into electrons, and is an important diagnostic tool in shock physics experiments. Data obtained from an optical pyrometer can be used to generate a blackbody curve of the material prior to and after being shocked by a high speed projectile. The sensing element consists of an InGaAs photodiode array, biasing circuitry, and multiple transimpedance amplifiers to boost the weak photocurrent from the noisy dark current into a signal that can eventually be digitized. Once the circuit elements have been defined, more often than not commercial-off-the-shelf (COTS) components are inadequate to satisfy every requirement for the diagnostic, and therefore a custom application specific design has to be considered. This thesis outlines the initial challenges with integrating the photodiode array block with multiple COTS transimpedance amplifiers onto a single chip, and offers a solution to a comparable optical pyrometer that uses the same type of photodiodes in conjunction with a re-designed transimpedance amplifier integrated onto a single chip. The final design includes a thorough analysis of the transimpedance amplifier along with modeling the circuit behavior which entails schematics, simulations, and layout. An alternative circuit is also investigated that incorporates an approach to multiplex the signals from each photodiode onto one data line and not only increases the viable real estate on the chip, but also improves the behavior of the photodiodes as they are subjected to less thermal load. The optical pyrometer application specific integrated circuit (ASIC) for shock physic experiments includes a transimpedance amplifier (TIA) with a 100 kΩ gain operating at bandwidth of 30 MHz, and an input-referred noise RMS current of 50 nA that is capable of driving a 50 Ω load.

  8. ASIC for high-speed-gating and free running operation of SPADs

    NASA Astrophysics Data System (ADS)

    Rochas, Alexis; Guillaume-Gentil, Christophe; Gautier, Jean-Daniel; Pauchard, Alexandre; Ribordy, Gregoire; Zbinden, Hugo; Leblebici, Yusuf; Monat, Laurent

    2007-05-01

    Single photon detection at telecom wavelengths is of importance in many industrial applications ranging from quantum cryptography, quantum optics, optical time domain reflectometry, non-invasive testing of VLSI circuits, eye-safe LIDAR to laser ranging. In practical applications, the combination of an InGaAs/InP APD with an appropriate electronic circuit still stands as the best solution in comparison with emerging technologies such as superconducting single photon detectors, MCP-PMTs for the near IR or up-conversion technique. An ASIC dedicated to the operation of InGaAs/InP APDs in both gated mode and free-running mode is presented. The 1.6mm2 chip is fabricated in a CMOS technology. It combines a gate generator, a voltage limiter, a fast comparator, a precise timing circuit for the gate signal processing and an output stage. A pulse amplitude of up to +7V can be achieved, which allows the operation of commercially available APDs at a single photon detection probability larger than 25% at 1.55μm. The avalanche quenching process is extremely fast, thus reducing the afterpulsing effects. The packaging of the diode in close proximity with the quenching circuit enables high speed gating at frequencies larger than 10MHz. The reduced connection lengths combined with impedance adaptation technique provide excellent gate quality, free of oscillations or bumps. The excess bias voltage is thus constant over the gate width leading to a stable single photon detection probability and timing resolution. The CMOS integration guarantees long-term stability, reliability and compactness.

  9. Short Circuit Analysis of Induction Machines Wind Power Application

    SciTech Connect

    Starke, Michael R; Smith, Travis M; Howard, Dustin; Harley, Ronald

    2012-01-01

    he short circuit behavior of Type I (fixed speed) wind turbine-generators is analyzed in this paper to aid in the protection coordination of wind plants of this type. A simple network consisting of one wind turbine-generator is analyzed for two network faults: a three phase short circuit and a phase A to ground fault. Electromagnetic transient simulations and sequence network calculations are compared for the two fault scenarios. It is found that traditional sequence network calculations give accurate results for the short circuit currents in the balanced fault case, but are inaccurate for the un-faulted phases in the unbalanced fault case. The time-current behavior of the fundamental frequency component of the short circuit currents for both fault cases are described, and found to differ significantly in the unbalanced and balanced fault cases

  10. Development of thermionic integrated circuits for applications in hostile environments

    SciTech Connect

    McCormik, J.B.; Lynn, D.K.; Wilde, D.; Cowan, R.; Hamilton, D.J.; Kerwin, W.; Dooley, R.

    1984-04-10

    This report describes a class of devices known as thermionic integrated circuits (TICs) that are capable of extended operation in ambient temperatures up to 500/sup 0/C and in high radiation environments. The evolution of the TIC concept is discussed. A set of practical design and performance equations is demonstrated. Recent experimental results are discussed in which both devices and simple circuits have successfully operated in 500/sup 0/C environments for extended periods of time.

  11. Development of integrated thermionic circuits for high-temperature applications

    SciTech Connect

    McCormick, J.B.; Wilde, D.; Depp, S.; Hamilton, D.J.; Kerwin, W.

    1981-01-01

    This report describes a class of microminiature, thin film devices known as integrated thermionic circuits (ITC) capable of extended operation in ambient temperatures up to 500/sup 0/C. The evolution of the ITC concept is discussed. A set of practical design and performance equations is demonstrated. Recent experimental results are discussed in which both devices and simple circuits have successfully operated in 500/sup 0/C environments for extended periods of time (greater than 11,000 hours).

  12. Design and Characteristics of a Multichannel Front-End ASIC Using Current-Mode CSA for Small-Animal PET Imaging.

    PubMed

    Ollivier-Henry, N; Wu Gao; Xiaochao Fang; Mbow, N A; Brasse, D; Humbert, B; Hu-Guo, C; Colledani, C; Yann Hu

    2011-02-01

    This paper presents the design and characteristics of a front-end readout application-specific integrated circuit (ASIC) dedicated to a multichannel-plate photodetector coupled to LYSO scintillating crystals. In our configuration, the crystals are oriented in the axial direction readout on both sides by individual photodetector channels allowing the spatial resolution and the detection efficiency to be independent of each other. Both energy signals and timing triggers from the photodetectors are required to be read out by the front-end ASIC. A current-mode charge-sensitive amplifier is proposed for this application. This paper presents performance characteristics of a 10-channel prototype chip designed and fabricated in a 0.35-μm complementary metal-oxide semiconductor process. The main results of simulations and measurements are presented and discussed. The gain of the chip is 13.1 mV/pC while the peak time of a CR-RC pulse shaper is 280 ns. The signal-to-noise ratio is 39 dB and the rms noise is 300 μV/√(Hz). The nonlinearity is less than 3% and the crosstalk is about 0.2%. The power dissipation is less than 15 mW/channel. This prototype will be extended to a 64-channel circuit with integrated time-to-digital converter and analog-to-digital converter together for a high-sensitive small-animal positron emission tomography imaging system. PMID:23850981

  13. High Rate Digital Demodulator ASIC

    NASA Technical Reports Server (NTRS)

    Ghuman, Parminder; Sheikh, Salman; Koubek, Steve; Hoy, Scott; Gray, Andrew

    1998-01-01

    The architecture of High Rate (600 Mega-bits per second) Digital Demodulator (HRDD) ASIC capable of demodulating BPSK and QPSK modulated data is presented in this paper. The advantages of all-digital processing include increased flexibility and reliability with reduced reproduction costs. Conventional serial digital processing would require high processing rates necessitating a hardware implementation in other than CMOS technology such as Gallium Arsenide (GaAs) which has high cost and power requirements. It is more desirable to use CMOS technology with its lower power requirements and higher gate density. However, digital demodulation of high data rates in CMOS requires parallel algorithms to process the sampled data at a rate lower than the data rate. The parallel processing algorithms described here were developed jointly by NASA's Goddard Space Flight Center (GSFC) and the Jet Propulsion Laboratory (JPL). The resulting all-digital receiver has the capability to demodulate BPSK, QPSK, OQPSK, and DQPSK at data rates in excess of 300 Mega-bits per second (Mbps) per channel. This paper will provide an overview of the parallel architecture and features of the HRDR ASIC. In addition, this paper will provide an over-view of the implementation of the hardware architectures used to create flexibility over conventional high rate analog or hybrid receivers. This flexibility includes a wide range of data rates, modulation schemes, and operating environments. In conclusion it will be shown how this high rate digital demodulator can be used with an off-the-shelf A/D and a flexible analog front end, both of which are numerically computer controlled, to produce a very flexible, low cost high rate digital receiver.

  14. Y-Ba-Cu-O superconducting/GaAs semiconducting hybrid circuits for microwave applications

    NASA Technical Reports Server (NTRS)

    Bhasin, K. B.; Toncich, S. S.; Chorey, C. M.; Rohrer, N. J.; Valco, G. J.

    1993-01-01

    A two pole superconducting bandpass filter was combined with a packaged GaAs low noise amplifier, and a superconducting X-band oscillator was designed, fabricated, and tested. Both circuits were compared to normal metal circuits at 77K. The results of these experiments, technical issues, and potential applications are presented.

  15. Design and Application of a Circuit for Measuring Frequency and Duty Cycle of Stimulated Bioelectrical Signal

    NASA Astrophysics Data System (ADS)

    Tang, Li-Ming; Chang, Ben-Kang; Liu, Tie-Bing; Wu, Min; Ling, Gang

    2002-12-01

    To design a new type of circuit for measuring frequency & duty cycle of stimulated bioelectrical signal for the project of 'the map of neuron-threshold in human brain and its clinical application'. This circuit was designed according to the character of stimulated bioelectrical signals. It was tested and improved and then used in the neuron -threshold stimulator. The circuit was found to be very accurate for measuring frequency and the error for measuring duty cycle was below 0.2%. This circuit is well-designed, simple, easy to use, and can be applied in many systems.

  16. Applications of modularized circuit designs in a new hyper-chaotic system circuit implementation

    NASA Astrophysics Data System (ADS)

    Wang, Rui; Sun, Hui; Wang, Jie-Zhi; Wang, Lu; Wang, Yan-Chao

    2015-02-01

    Modularized circuit designs for chaotic systems are introduced in this paper. Especially, a typical improved modularized design strategy is proposed and applied to a new hyper-chaotic system circuit implementation. In this paper, the detailed design procedures are described. Multisim simulations and physical experiments are conducted, and the simulation results are compared with Matlab simulation results for different system parameter pairs. These results are consistent with each other and they verify the existence of the hyper-chaotic attractor for this new hyper-chaotic system. Project supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61403395), the Natural Science Foundation of Tianjin, China (Grant No. 13JCYBJC39000), the Scientific Research Foundation for the Returned Overseas Chinese Scholars, State Education Ministry of China, the Fund from the Tianjin Key Laboratory of Civil Aircraft Airworthiness and Maintenance in Civil Aviation of China (Grant No. 104003020106), the National Basic Research Program of China (Grant No. 2014CB744904), and the Fund for the Scholars of Civil Aviation University of China (Grant No. 2012QD21x).

  17. Micropower circuits for bidirectional wireless telemetry in neural recording applications.

    PubMed

    Neihart, Nathan M; Harrison, Reid R

    2005-11-01

    State-of-the art neural recording systems require electronics allowing for transcutaneous, bidirectional data transfer. As these circuits will be implanted near the brain, they must be small and low power. We have developed micropower integrated circuits for recovering clock and data signals over a transcutaneous power link. The data recovery circuit produces a digital data signal from an ac power waveform that has been amplitude modulated. We have also developed an FM transmitter with the lowest power dissipation reported for biosignal telemetry. The FM transmitter consists of a low-noise biopotential amplifier and a voltage controlled oscillator used to transmit amplified neural signals at a frequency near 433 MHz. All circuits were fabricated in a standard 0.5-microm CMOS VLSI process. The resulting chip is powered through a wireless inductive link. The power consumption of the clock and data recovery circuits is measured to be 129 microW; the power consumption of the transmitter is measured to be 465 microW when using an external surface mount inductor. Using a parasitic antenna less than 2 mm long, a received power level was measured to be -59.73 dBm at a distance of one meter. PMID:16285399

  18. Development of the analog ASIC for multi-channel readout X-ray CCD camera

    NASA Astrophysics Data System (ADS)

    Nakajima, Hiroshi; Matsuura, Daisuke; Idehara, Toshihiro; Anabuki, Naohisa; Tsunemi, Hiroshi; Doty, John P.; Ikeda, Hirokazu; Katayama, Haruyoshi; Kitamura, Hisashi; Uchihori, Yukio

    2011-03-01

    We report on the performance of an analog application-specific integrated circuit (ASIC) developed aiming for the front-end electronics of the X-ray CCD camera system onboard the next X-ray astronomical satellite, ASTRO-H. It has four identical channels that simultaneously process the CCD signals. Distinctive capability of analog-to-digital conversion enables us to construct a CCD camera body that outputs only digital signals. As the result of the front-end electronics test, it works properly with low input noise of ≤30μV at the pixel rate below 100 kHz. The power consumption is sufficiently low of ˜150mW/chip. The input signal range of ±20 mV covers the effective energy range of the typical X-ray photon counting CCD (up to 20 keV). The integrated non-linearity is 0.2% that is similar as those of the conventional CCDs in orbit. We also performed a radiation tolerance test against the total ionizing dose (TID) effect and the single event effect. The irradiation test using 60Co and proton beam showed that the ASIC has the sufficient tolerance against TID up to 200 krad, which absolutely exceeds the expected amount of dose during the period of operating in a low-inclination low-earth orbit. The irradiation of Fe ions with the fluence of 5.2×108 Ion/cm2 resulted in no single event latchup (SEL), although there were some possible single event upsets. The threshold against SEL is higher than 1.68 MeV cm2/mg, which is sufficiently high enough that the SEL event should not be one of major causes of instrument downtime in orbit.

  19. A 290 mV Sub-V(T) ASIC for Real-Time Atrial Fibrillation Detection.

    PubMed

    Andersson, Oskar; Chon, Ki H; Sornmo, Leif; Rodrigues, Joachim Neves

    2015-06-01

    A real-time detector for episodes of atrial fibrillation is fabricated as an application specific integrated circuit (ASIC). The basis for detection is a set of three parameters for characterizing the RR interval series, i.e., turning point ratio, root mean square of successive differences, and Shannon entropy. The developed hardware architecture targets ultra-low voltage operation, suitable for implantable loop recorders with ultra-low energy requirements. Algorithmic and architectural optimizations are performed to minimize area and energy dissipation, with a total area footprint reduction of 44%. The design is fabricated in 65-nm CMOS low-leakage high-threshold technology. Measurements with aggressively scaled supply voltage (VDD) in the subthreshold (sub-VT) region show energy savings of up to 41 X when operating at 1 kHz with a VDD of 300 mV compared to a nominal VDD of 1.2 V. PMID:25343767

  20. Genetic mapping of ASIC4 and contrasting phenotype to ASIC1a in modulating innate fear and anxiety.

    PubMed

    Lin, Shing-Hong; Chien, Ya-Chih; Chiang, Wei-Wei; Liu, Yan-Zhen; Lien, Cheng-Chang; Chen, Chih-Cheng

    2015-06-01

    Although ASIC4 is a member of the acid-sensing ion channel (ASIC) family, we have limited knowledge of its expression and physiological function in vivo. To trace the expression of this ion channel, we generated the ASIC4-knockout/CreERT(2)-knockin (Asic4(Cre) (ERT) (2)) mouse line. After tamoxifen induction in the Asic4(Cre) (ERT)(2)::CAG-STOP(floxed)-Td-tomato double transgenic mice, we mapped the expression of ASIC4 at the cellular level in the central nervous system (CNS). ASIC4 was expressed in many brain regions, including the olfactory bulb, cerebral cortex, striatum, hippocampus, amygdala, thalamus, hypothalamus, brain stem, cerebellum, spinal cord and pituitary gland. Colocalisation studies further revealed that ASIC4 was expressed mainly in three types of cells in the CNS: (i) calretinin (CR)-positive and/or vasoactive intestine peptide (VIP)-positive interneurons; (ii) neural/glial antigen 2 (NG2)-positive glia, also known as oligodendrocyte precursor cells; and (iii) cerebellar granule cells. To probe the possible role of ASIC4, we hypothesised that ASIC4 could modulate the membrane expression of ASIC1a and thus ASIC1a signaling in vivo. We conducted behavioral phenotyping of Asic4(Cre) (ERT)(2) mice by screening many of the known behavioral phenotypes found in Asic1a knockouts and found ASIC4 not involved in shock-evoked fear learning and memory, seizure termination or psychostimulant-induced locomotion/rewarding effects. In contrast, ASIC4 might play an important role in modulating the innate fear response to predator odor and anxious state because ASIC4-mutant mice showed increased freezing response to 2,4,5-trimethylthiazoline and elevated anxiety-like behavior in both the open-field and elevated-plus maze. ASIC4 may modulate fear and anxiety by counteracting ASIC1a activity in the brain. PMID:25828470

  1. Development of an ASIC for the readout and control of near-infrared large array detectors

    NASA Astrophysics Data System (ADS)

    Meier, Dirk; Berge, Hans Kristian Otnes; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Azman, Suleyman; Talebi, Jahanzad; Olsen, Alf; Øya, Petter; Paahlsson, Philip; Gheorghe, Codin; Maehlum, Gunnar

    2014-07-01

    The article describes the near infrared readout and controller ASIC (NIRCA) developed by Integrated Detector Electronics AS (IDEAS). The project aims at future astronomical science and Earth observation missions, where the ASIC will be used with image sensors based on mercury cadmium telluride (HgCdTe, or MCT). NIRCA is designed to operate from cryogenic temperatures (77 K) to higher than room temperature (328 K) and in a high radiation environment (LET > 60 MeVcm2/mg). The ASIC connects to the readout integrated circuit (ROIC) and delivers fully digitized data via serial digital output. The ASIC contains an analogue front-end (AFE) with 4 analogue-to-digital converters (ADCs) and programmable gain amplifiers with offset adjustment. The ADCs have a differential input swing of +/-2 V, 12-bit resolution, and a maximum sample rate of 3 MSps. The ASIC contains a programmable sequencer (microcontroller) to generate up to 40 digital signals for the ROIC and to control the analogue front-end and DACs on the chip. The ASIC has two power supply voltage regulators that provide the ROIC with 1.8 V and 3.3 V, and programmable 10-bit DACs to generate 16 independent reference and bias voltages from 0.3 V to 3 V. In addition NIRCA allows one to read 8 external digital signals, and monitor external and internal analogue signals including onchip temperature. NIRCA can be programmed and controlled via SPI interface for all internal functions and allows data forwarding from and to the ROIC SPI interface.

  2. Packaging printed circuit boards: A production application of interactive graphics

    NASA Technical Reports Server (NTRS)

    Perrill, W. A.

    1975-01-01

    The structure and use of an Interactive Graphics Packaging Program (IGPP), conceived to apply computer graphics to the design of packaging electronic circuits onto printed circuit boards (PCB), were described. The intent was to combine the data storage and manipulative power of the computer with the imaginative, intuitive power of a human designer. The hardware includes a CDC 6400 computer and two CDC 777 terminals with CRT screens, light pens, and keyboards. The program is written in FORTRAN 4 extended with the exception of a few functions coded in COMPASS (assembly language). The IGPP performs four major functions for the designer: (1) data input and display, (2) component placement (automatic or manual), (3) conductor path routing (automatic or manual), and (4) data output. The most complex PCB packaged to date measured 16.5 cm by 19 cm and contained 380 components, two layers of ground planes and four layers of conductors mixed with ground planes.

  3. Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

    NASA Technical Reports Server (NTRS)

    Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

    1987-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

  4. Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

    NASA Technical Reports Server (NTRS)

    Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

    1987-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMICs to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMICs is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

  5. A CMOS ASIC Design for SiPM Arrays.

    PubMed

    Dey, Samrat; Banks, Lushon; Chen, Shaw-Pin; Xu, Wenbin; Lewellen, Thomas K; Miyaoka, Robert S; Rudell, Jacques C

    2011-12-01

    Our lab has previously reported on novel board-level readout electronics for an 8×8 silicon photomultiplier (SiPM) array featuring row/column summation technique to reduce the hardware requirements for signal processing. We are taking the next step by implementing a monolithic CMOS chip which is based on the row-column architecture. In addition, this paper explores the option of using diagonal summation as well as calibration to compensate for temperature and process variations. Further description of a timing pickoff signal which aligns all of the positioning (spatial channels) pulses in the array is described. The ASIC design is targeted to be scalable with the detector size and flexible to accommodate detectors from different vendors. This paper focuses on circuit implementation issues associated with the design of the ASIC to interface our Phase II MiCES FPGA board with a SiPM array. Moreover, a discussion is provided for strategies to eventually integrate all the analog and mixed-signal electronics with the SiPM, on either a single-silicon substrate or multi-chip module (MCM). PMID:24825923

  6. σ-1 Receptor Inhibition of ASIC1a Channels is Dependent on a Pertussis Toxin-Sensitive G-Protein and an AKAP150/Calcineurin Complex.

    PubMed

    Mari, Yelenis; Katnik, Christopher; Cuevas, Javier

    2015-10-01

    ASIC1a channels play a major role in various pathophysiological conditions including depression, anxiety, epilepsy, and neurodegeneration following ischemic stroke. Sigma-1 (σ-1) receptor stimulation depresses the activity of ASIC1a channels in cortical neurons, but the mechanism(s) by which σ-1 receptors exert their influence on ASIC1a remains unknown. Experiments were undertaken to elucidate the signaling cascade linking σ-1 receptors to ASIC1a channels. Immunohistochemical studies showed that σ-1 receptors, ASIC1a and A-kinase anchoring peptide 150 colocalize in the plasma membrane of the cell body and processes of cortical neurons. Fluorometric Ca(2+) imaging experiments showed that disruption of the macromolecular complexes containing AKAP150 diminished the effects of the σ-1 on ASIC1a, as did application of the calcineurin inhibitors, cyclosporin A and FK-506. Moreover, whole-cell patch clamp experiments showed that σ-1 receptors were less effective at decreasing ASIC1a-mediated currents in the presence of the VIVIT peptide, which binds to calcineurin and prevents cellular effects dependent on AKAP150/calcineurin interaction. The coupling of σ-1 to ASIC1a was also disrupted by preincubation of the neurons in the G-protein inhibitor, pertussis toxin (PTX). Taken together, our data reveal that σ-1 receptor block of ASIC1a function is dependent on activation of a PTX-sensitive G-protein and stimulation of AKAP150 bound calcineurin. PMID:24925261

  7. Electrical Devices and Circuits for Low Temperature Space Applications

    NASA Technical Reports Server (NTRS)

    Patterson, R. L.; Hammond, A.; Dickman, J. E.; Gerber, S.; Overton, E.; Elbuluk, M.

    2003-01-01

    The environmental temperature in many NASA missions, such as deep space probes and outer planetary exploration, is significantly below the range for which conventional commercial-off-the-shelf electronics is designed. Presently, spacecraft operating in the cold environment of such deep space missions carry a large number of radioisotope or other heating units in order to maintain the surrounding temperature of the on-board electronics at approximately 20 C. Electronic devices and circuits capable of operation at cryogenic temperatures will not only tolerate the harsh environment of deep space but also will reduce system size and weight by eliminating or reducing the heating units and their associate structures; thereby reducing system development cost as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results from better behavior in the electrical and thermal properties of some semiconductor and dielectric materials at low temperatures. An on-going research and development program on low temperature electronics at the NASA Glenn Research Center focuses on the development of efficient electrical systems and circuits capable of surviving and exploiting the advantages of low temperature environments. An overview of the program will be presented in this paper. A description of the low temperature test facilities along with selected data obtained from in-house component testing will also be discussed. On-going research activities that are being performed in collaboration with various organizations will also be presented.

  8. Circuit for Communication Over Power Lines

    NASA Technical Reports Server (NTRS)

    Krasowski, Michael J.; Prokop, Normal F.; Greer, Lawrence C., III; Nappier, Jennifer

    2011-01-01

    Many distributed systems share common sensors and instruments along with a common power line supplying current to the system. A communication technique and circuit has been developed that allows for the simple inclusion of an instrument, sensor, or actuator node within any system containing a common power bus. Wherever power is available, a node can be added, which can then draw power for itself, its associated sensors, and actuators from the power bus all while communicating with other nodes on the power bus. The technique modulates a DC power bus through capacitive coupling using on-off keying (OOK), and receives and demodulates the signal from the DC power bus through the same capacitive coupling. The circuit acts as serial modem for the physical power line communication. The circuit and technique can be made of commercially available components or included in an application specific integrated circuit (ASIC) design, which allows for the circuit to be included in current designs with additional circuitry or embedded into new designs. This device and technique moves computational, sensing, and actuation abilities closer to the source, and allows for the networking of multiple similar nodes to each other and to a central processor. This technique also allows for reconfigurable systems by adding or removing nodes at any time. It can do so using nothing more than the in situ power wiring of the system.

  9. Regulation of ASIC activity by ASIC4--new insights into ASIC channel function revealed by a yeast two-hybrid assay.

    PubMed

    Donier, Emmanuelle; Rugiero, François; Jacob, Céline; Wood, John N

    2008-07-01

    ASIC4 is a member of the acid-sensing ion channel family that is broadly expressed in the mammalian nervous system, but has no known function. We demonstrate here that transfected ASIC4 is targeted to the plasma membrane in CHO-K1 cells, where it associates with ASIC1a and downregulates exogenous ASIC1a expression. This effect could also be observed on endogenous H+-gated currents in TSA-201 cells and ASIC3 currents in CHO-K1 cells, suggesting a physiological role for ASIC4 in regulating ASIC currents involved in pain mechanisms. Using a yeast two-hybrid assay we found that ASICs interact with proteins involved in diverse functions, including cytoskeletal proteins, enzymes, regulators of endocytosis and G-protein-coupled pathways. ASIC4 is the sole member of this ion channel class to interact strongly with polyubiquitin. The distinct functionally related sets of interacting proteins that bind individual ASICs identified in the yeast two-hybrid screen suggest potential roles for ASICs in a variety of cellular functions. PMID:18662336

  10. ASICs as therapeutic targets for migraine.

    PubMed

    Dussor, Greg

    2015-07-01

    Migraine is the most common neurological disorder and one of the most common chronic pain conditions. Despite its prevalence, the pathophysiology leading to migraine is poorly understood and the identification of new therapeutic targets has been slow. Several processes are currently thought to contribute to migraine including altered activity in the hypothalamus, cortical-spreading depression (CSD), and afferent sensory input from the cranial meninges. Decreased extracellular pH and subsequent activation of acid-sensing ion channels (ASICs) may contribute to each of these processes and may thus play a role in migraine pathophysiology. Although few studies have directly examined a role of ASICs in migraine, studies directly examining a connection have generated promising results including efficacy of ASIC blockers in both preclinical migraine models and in human migraine patients. The purpose of this review is to discuss the pathophysiology thought to contribute to migraine and findings that implicate decreased pH and/or ASICs in these events, as well as propose issues to be resolved in future studies of ASICs and migraine. This article is part of the Special Issue entitled 'Acid-Sensing Ion Channels in the Nervous System'. PMID:25582295

  11. ASICs as therapeutic targets for migraine

    PubMed Central

    2015-01-01

    Migraine is the most common neurological disorder and one of the most common chronic pain conditions. Despite its prevalence, the pathophysiology leading to migraine is poorly understood and the identification of new therapeutic targets has been slow. Several processes are currently thought to contribute to migraine including altered activity in the hypothalamus, cortical-spreading depression (CSD), and afferent sensory input from the cranial meninges. Decreased extracellular pH and subsequent activation of acid-sensing ion channels (ASICs) may contribute to each of these processes and may thus play a role in migraine pathophysiology. Although few studies have directly examined a role of ASICs in migraine, studies directly examining a connection have generated promising results including efficacy of ASIC blockers in both preclinical migraine models and in human migraine patients. The purpose of this review is to discuss the pathophysiology thought to contribute to migraine and findings that implicate decreased pH and/or ASICs in these events, as well as propose issues to be resolved in future studies of ASICs and migraine. PMID:25582295

  12. A DSP implementation of lifting based DWT for image processing applications

    NASA Astrophysics Data System (ADS)

    Gholipour, Morteza; Noubari, Hossein A.; Kamarei, Mahmoud

    2011-10-01

    Discrete Wavelet Transform (DWT) is widely used in signal processing applications. In this paper, we describe hardware implementation of a lifting-based DWT, which is used in image compression. The CDF(2,2) lifting-based wavelet transform is modeled and simulated using MATLAB. Based on DSP methodologies, the signal flow graph and dependence graph are derived. The dependence graph is optimized and used to implement the hardware description of the circuit in Verilog. We have synthesized and implemented the circuit using both Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) design approaches. To confirm the circuit operation, post-synthesis and post-layout simulations were done for FPGA and ASIC designs, respectively.

  13. High temperature superconducting thin film microwave circuits: Fabrication, characterization, and applications

    NASA Technical Reports Server (NTRS)

    Bhasin, K. B.; Warner, J. D.; Romanofsky, R. R.; Heinen, V. O.; Chorey, C. M.

    1990-01-01

    Epitaxial YBa2Cu3O7 films were grown on several microwave substrates. Surface resistance and penetration depth measurements were performed to determine the quality of these films. Here the properties of these films on key microwave substrates are described. The fabrication and characterization of a microwave ring resonator circuit to determine transmission line losses are presented. Lower losses than those observed in gold resonator circuits were observed at temperatures lower than critical transition temperature. Based on these results, potential applications of microwave superconducting circuits such as filters, resonators, oscillators, phase shifters, and antenna elements in space communication systems are identified.

  14. Small circuits for cryptography.

    SciTech Connect

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  15. Circuit-level simulation of transistor lasers and its application to modelling of microwave photonic links

    NASA Astrophysics Data System (ADS)

    Iezekiel, Stavros; Christou, Andreas

    2015-03-01

    Equivalent circuit models of a transistor laser are used to investigate the suitability of this relatively new device for analog microwave photonic links. The three-terminal nature of the device enables transistor-based circuit design techniques to be applied to optoelectronic transmitter design. To this end, we investigate the application of balanced microwave amplifier topologies in order to enable low-noise links to be realized with reduced intermodulation distortion and improved RF impedance matching compared to conventional microwave photonic links.

  16. Mixed application MMIC technologies - Progress in combining RF, digital and photonic circuits

    NASA Technical Reports Server (NTRS)

    Swirhun, S.; Bendett, M.; Sokolov, V.; Bauhahn, P.; Sullivan, C.; Mactaggart, R.; Mukherjee, S.; Hibbs-Brenner, M.; Mondal, J.

    1991-01-01

    Approaches for future 'mixed application' monolithic integrated circuits (ICs) employing optical receive/transmit, RF amplification and modulation and digital control functions are discussed. We focus on compatibility of the photonic component fabrication with conventional RF and digital IC technologies. Recent progress at Honeywell in integrating several parts of the desired RF/digital/photonic circuit integration suite required for construction of a future millimeter-wave optically-controlled phased-array element are illustrated.

  17. Basic structures of integrated photonic circuits for smart biosensor applications

    NASA Astrophysics Data System (ADS)

    Germer, S.; Cherkouk, C.; Rebohle, L.; Helm, M.; Skorupa, W.

    2013-05-01

    The breadth of opportunities for applied technologies for optical sensors ranges from environmental and biochemical control, medical diagnostics to process regulation. Thus the specified usage of the optical sensor system requires a particular design and functionalization. Especially biochemical sensors incorporate electronic and photonic devices for the detection of harmful substances e.g. in drinking water. Here we present recent developments in the integration of a Si-based light emitting device (LED) [1-3, 8] into a photonic circuit for an optical waveguide-based biodetection system. This concept includes the design, fabrication and characterization of the dielectric high contrast waveguide as an important component, beside the LED, in the photonic system circuit. First approaches involve simulations of Si3N4/SiO2-waveguides with the finite element method (FEM) and their fabrication by plasma enhanced chemical vapour deposition (PECVD), optical lithography and reactive ion etching (RIE). In addition, we characterized the deposited layers via ellipsometry and the etched structures by scanning electron microscopy (SEM). The obtained results establish a basis for optimized Si-based LED waveguide butt-coupling with adequate coupling efficiency, low attenuation loss and a high optical power throughput.

  18. Mirrored Modified Howland Circuit for Bioimpedance Applications: Analytical Analysis

    NASA Astrophysics Data System (ADS)

    Bertemes-Filho, P.; Negri, L. H.; Felipe, A.; Vincence, V. C.

    2012-12-01

    Multifrequency Electrical Bioimpedance (MEB) has been widely used as a non-invasive technique for characterizing tissues. Most MEB systems use wideband current sources for injecting current to load and instrumentation amplifiers for measuring the resultant potential. Current sources should present intrinsically high output impedance in a very wide frequency range. The objective of this work is to investigate the performance of the Mirrored Modified Howland Current Source (MMHCS) by comparing the analytical solution with the SPICE simulation. It was implemented four MMHCS circuits by using four different operational amplifiers each one. The output current was set to 1 mAp (peak) in the frequency from 1 Hz to 100 MHz. Both techniques presented similar results at lower frequencies. It can be concluded that the output impedance of the circuit is highly dependent of the open-loop gain of the operation amplifier. The analytical solution showed that it is possible to project a current source by using only theirs output current and impedance equations.

  19. Asynchronous data readout system for multichannel ASIC

    NASA Astrophysics Data System (ADS)

    Ivanov, P. Y.; Atkin, E. V.

    2016-02-01

    The data readout system of multichannel data-driven ASIC, requiring high-speed (320 Mb/s) output data serialization is described. Its structure, based on a limited number of FIFO blocks, provides a lossless data transfer. The solution has been realized as a separate test IP block in the prototyped 8 channel ASIC, intended for the muon chamber of CBM experiment at FAIR. The block was developed for the UMC 0.18 μm MMRF CMOS process and prototyped via Europractice. Main parameters of the chip are given.

  20. Practical applications of digital integrated circuits. Part 2: Minimization techniques, code conversion, flip-flops, and asynchronous circuits

    NASA Technical Reports Server (NTRS)

    1972-01-01

    Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be pointed out that the logic theory contained herein applies to all hardware. Binary numbers, simplification of logic circuits, code conversion circuits, basic flip-flop theory, details about series 54/7400, and asynchronous circuits are discussed.

  1. Plasmonic nanopatch array for optical integrated circuit applications.

    PubMed

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-01-01

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle. PMID:24201454

  2. Plasmonic nanopatch array for optical integrated circuit applications

    PubMed Central

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-01-01

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle. PMID:24201454

  3. An application of carbon nanotubes for integrated circuit interconnects

    NASA Astrophysics Data System (ADS)

    Coiffic, J. C.; Foa Torres, L. E.; Le Poche, H.; Fayolle, M.; Roche, S.; Maitrejean, S.; Roualdes, S.; Ayral, A.

    2008-08-01

    Integrated circuits fabrication is soon reaching strong limitations. Help could come from using carbon nanotubes as conducting wires for interconnects. Although this solution was proposed six years ago, researchers still come up with many obstacles such as localization, low temperature growth on copper, contacting and reproducibility. The integration processes exposed here intend to meet the industrial requirements. Two approaches are then possibly followed. Either using densely packed single wall (SWCNT) (or very tiny multiwall) nanotubes, or filling up the whole interconnect diameter with a single large multiwall (MWCNT) nanotube. In this work, we focus on the integration of multiwall vertical interconnects. Densely packed MWCNTs are grown in via holes by CVD. Alternatively, we have developed a method to obtain a single large nanofibre grown by PECVD (MWCNF) in each via hole. Electrical measurements are performed on CVD and PECVD grown carbon nanotubes. The role of electron-phonon interaction in these devices is also briefly discussed.

  4. Modeling and simulation of carbon nanotube field effect transistor and its circuit application

    NASA Astrophysics Data System (ADS)

    Singh, Amandeep; Saini, Dinesh Kumar; Agarwal, Dinesh; Aggarwal, Sajal; Khosla, Mamta; Raj, Balwinder

    2016-07-01

    The carbon nanotube field effect transistor (CNTFET) is modelled for circuit application. The model is based on the transport mechanism and it directly relates the transport mechanism with the chirality. Also, it does not consider self consistent equations and thus is used to develop the HSPICE compatible circuit model. For validation of the model, it is applied to the top gate CNTFET structure and the MATLAB simulation results are compared with the simulations of a similar structure created in NanoTCAD ViDES. For demonstrating the circuit compatibility of the model, two circuits viz. inverter and SRAM are designed and simulated in HSPICE. Finally, SRAM performance metrics are compared with those of device simulations from Nano TCAD ViDES.

  5. GEMMA and GEMINI, two dedicated mixed-signal ASICs for Triple-GEM detectors readout

    NASA Astrophysics Data System (ADS)

    Pezzotta, A.; Croci, G.; Costantini, A.; De Matteis, M.; Tagnani, D.; Corradi, G.; Murtas, F.; Gorini, G.; Baschirotto, A.

    2016-03-01

    GEMMA and GEMINI, two integrated-circuit front-ends for the Triple-GEM detector are presented. These two ASICs aim to improve detector readout performance in terms of count rate, adaptability, portability and power consumption. GEMMA target is to embed counting, timing and spectroscopic measurements in a single 8-channel device, managing a detector capacitance up to 15 pF. On the other hand, GEMINI is dedicated to counting measurements, embedding 16 channels with a detector capacitance up to 40 pF. Both prototypes, fabricated in 130 nm and 180 nm CMOS respectively, feature an automatic on-chip calibration circuit, compensating for process/temperature variations.

  6. Custom IC/Embedded IP design for histogram in video processing application

    NASA Astrophysics Data System (ADS)

    Pandey, Manoj; Chaturvedi, Richa; Rai, S. K.

    2016-03-01

    Histogram is an integral part of video processing applications. Either of the design methods ASIC or Embedded, histogram computation is an important functional block. This paper proposes the custom Integrated Circuit (IC) as an ASIC and an embedded IP to compute the colored histogram function. Histogram computation has two features: color and spatial. Color feature has been calculated using find_bin and spatial feature is calculated using kernel function. The design is verified using NCSIM Cadence tool, while it is synthesized using RTL compiler. Finally, the embedded IP has interfaced with Kernel based mean shift algorithm in tracking a moving object and implemented on Xilinx Spartan 6 LX150T FPGA.

  7. Application of the DRS4 chip for GHz waveform digitizing circuits

    NASA Astrophysics Data System (ADS)

    Yang, Hai-Bo; Su, Hong; Kong, Jie; Cheng, Ke; Chen, Jin-Da; Du, Cheng-Ming; Zhang, Jing-Zhe

    2015-05-01

    A new fast waveform sampling digitizing circuit based on the domino ring sampler (DRS), a switched capacitor array (SCA) chip, is presented in this paper, which is different from the traditional waveform digitizing circuit constructed with an analog to digital converter (ADC) or time to digital converter. A DRS4 chip is used as a core device in our circuit, which has a fast sampling rate up to five gigabit samples per second (GSPS). Quite satisfactory results are acquired by the preliminary performance test for this circuit board. Eight channels can be provided by one board, which has a 1 V input dynamic range for each channel. The circuit linearity is better than 0.1%, the noise is less than 0.5 mV (root mean square, RMS), and its time resolution is about 50 ps. Several boards can be cascaded to construct a multi-board system. The advantages of high resolution, low cost, low power dissipation, high channel density and small size make the circuit board useful not only for physics experiments, but also for other applications. Supported by National Natural Science Foundation of China (11305233), Specific Fund Research Based on Large-scale Science Instrument Facilities of China (2011YQ12009604)

  8. Acid-sensing ion channels (ASICs) are differentially modulated by anions dependent on their subunit composition

    PubMed Central

    Kusama, Nobuyoshi; Gautam, Mamta; Harding, Anne Marie S.; Snyder, Peter M.

    2013-01-01

    Acid-sensing ion channels (ASICs) are sodium channels gated by extracellular protons. ASIC1a channels possess intersubunit Cl−-binding sites in the extracellular domain, which are highly conserved between ASIC subunits. We previously found that anions modulate ASIC1a gating via these sites. Here we investigated the effect of anion substitution on native ASICs in rat sensory neurons and heterologously expressed ASIC2a and ASIC3 channels by whole cell patch clamp. Similar to ASIC1a, anions modulated the kinetics of desensitization of other ASIC channels. However, unlike ASIC1a, anions also modulated the pH dependence of activation. Moreover, the order of efficacy of different anions to modulate ASIC2a and -3 was very different from that of ASIC1a. More surprising, mutations of conserved residues that form an intersubunit Cl−-binding site in ASIC1a only partially abrogated the effects of anion modulation of ASIC2a and had no effect on anion modulation of ASIC3. The effects of anions on native ASICs in rat dorsal root ganglion neurons mimicked those in heterologously expressed ASIC1a/3 heteromeric channels. Our data show that anions modulate a variety of ASIC properties and are dependent on the subunit composition, and the mechanism of modulation for ASIC2a and -3 is distinct from that of ASIC1a. We speculate that modulation of ASIC gating by Cl− is a novel mechanism to sense shifts in extracellular fluid composition. PMID:23135698

  9. Preliminary validation results of an ASIC for the readout and control of near-infrared large array detectors

    NASA Astrophysics Data System (ADS)

    Pâhlsson, Philip; Meier, Dirk; Otnes Berge, Hans Kristian; Øya, Petter; Steenari, David; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar

    2015-06-01

    In this paper we present initial test results of the Near Infrared Readout and Controller ASIC (NIRCA), designed for large area image sensors under contract from the European Space Agency (ESA) and the Norwegian Space Center. The ASIC is designed to read out image sensors based on mercury cadmium telluride (HgCdTe, or MCT) operating down to 77 K. IDEAS has developed, designed and initiated testing of NIRCA with promising results, showing complete functionality of all ASIC sub-components. The ASIC generates programmable digital signals to clock out the contents of an image array and to amplify, digitize and transfer the resulting pixel charge. The digital signals can be programmed into the ASIC during run-time and allows for windowing and custom readout schemes. The clocked out voltages are amplified by programmable gain amplifiers and digitized by 12-bit, 3-Msps successive approximation register (SAR) analogue-to-digital converters (ADC). Digitized data is encoded using 8-bit to 10-bit encoding and transferred over LVDS to the readout system. The ASIC will give European researchers access to high spectral sensitivity, very low noise and radiation hardened readout electronics for astronomy and Earth observation missions operating at 77 K and room temperature. The versatility of the chip makes the architecture a possible candidate for other research areas, or defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  10. Abnormal Cardiac Autonomic Regulation in Mice Lacking ASIC3

    PubMed Central

    Cheng, Ching-Feng; Kuo, Terry B. J.; Chen, Wei-Nan

    2014-01-01

    Integration of sympathetic and parasympathetic outflow is essential in maintaining normal cardiac autonomic function. Recent studies demonstrate that acid-sensing ion channel 3 (ASIC3) is a sensitive acid sensor for cardiac ischemia and prolonged mild acidification can open ASIC3 and evoke a sustained inward current that fires action potentials in cardiac sensory neurons. However, the physiological role of ASIC3 in cardiac autonomic regulation is not known. In this study, we elucidate the role of ASIC3 in cardiac autonomic function using Asic3−/− mice. Asic3−/− mice showed normal baseline heart rate and lower blood pressure as compared with their wild-type littermates. Heart rate variability analyses revealed imbalanced autonomic regulation, with decreased sympathetic function. Furthermore, Asic3−/− mice demonstrated a blunted response to isoproterenol-induced cardiac tachycardia and prolonged duration to recover to baseline heart rate. Moreover, quantitative RT-PCR analysis of gene expression in sensory ganglia and heart revealed that no gene compensation for muscarinic acetylcholines receptors and beta-adrenalin receptors were found in Asic3−/− mice. In summary, we unraveled an important role of ASIC3 in regulating cardiac autonomic function, whereby loss of ASIC3 alters the normal physiological response to ischemic stimuli, which reveals new implications for therapy in autonomic nervous system-related cardiovascular diseases. PMID:24804235

  11. Abnormal cardiac autonomic regulation in mice lacking ASIC3.

    PubMed

    Cheng, Ching-Feng; Kuo, Terry B J; Chen, Wei-Nan; Lin, Chao-Chieh; Chen, Chih-Cheng

    2014-01-01

    Integration of sympathetic and parasympathetic outflow is essential in maintaining normal cardiac autonomic function. Recent studies demonstrate that acid-sensing ion channel 3 (ASIC3) is a sensitive acid sensor for cardiac ischemia and prolonged mild acidification can open ASIC3 and evoke a sustained inward current that fires action potentials in cardiac sensory neurons. However, the physiological role of ASIC3 in cardiac autonomic regulation is not known. In this study, we elucidate the role of ASIC3 in cardiac autonomic function using Asic3(-/-) mice. Asic3(-/-) mice showed normal baseline heart rate and lower blood pressure as compared with their wild-type littermates. Heart rate variability analyses revealed imbalanced autonomic regulation, with decreased sympathetic function. Furthermore, Asic3(-/-) mice demonstrated a blunted response to isoproterenol-induced cardiac tachycardia and prolonged duration to recover to baseline heart rate. Moreover, quantitative RT-PCR analysis of gene expression in sensory ganglia and heart revealed that no gene compensation for muscarinic acetylcholines receptors and beta-adrenalin receptors were found in Asic3(-/-) mice. In summary, we unraveled an important role of ASIC3 in regulating cardiac autonomic function, whereby loss of ASIC3 alters the normal physiological response to ischemic stimuli, which reveals new implications for therapy in autonomic nervous system-related cardiovascular diseases. PMID:24804235

  12. Single event effect characterization of the mixed-signal ASIC developed for CCD camera in space use

    NASA Astrophysics Data System (ADS)

    Nakajima, Hiroshi; Fujikawa, Mari; Mori, Hideki; Kan, Hiroaki; Ueda, Shutaro; Kosugi, Hiroko; Anabuki, Naohisa; Hayashida, Kiyoshi; Tsunemi, Hiroshi; Doty, John P.; Ikeda, Hirokazu; Kitamura, Hisashi; Uchihori, Yukio

    2013-12-01

    We present the single event effect (SEE) tolerance of a mixed-signal application-specific integrated circuit (ASIC) developed for a charge-coupled device camera onboard a future X-ray astronomical mission. We adopted proton and heavy ion beams at HIMAC/NIRS in Japan. The particles with high linear energy transfer (LET) of 57.9 MeV cm2/mg is used to measure the single event latch-up (SEL) tolerance, which results in a sufficiently low cross-section of σSEL<4.2×10-11 cm2/(Ion×ASIC). The single event upset (SEU) tolerance is estimated with various kinds of species with wide range of energy. Taking into account that a part of the protons creates recoiled heavy ions that have higher LET than that of the incident protons, we derived the probability of SEU event as a function of LET. Then the SEE event rate in a low-earth orbit is estimated considering a simulation result of LET spectrum. SEL rate is below once per 49 years, which satisfies the required latch-up tolerance. The upper limit of the SEU rate is derived to be 1.3×10-3 events/s. Although the SEU events cannot be distinguished from the signals of X-ray photons from astronomical objects, the derived SEU rate is below 1.3% of expected non-X-ray background rate of the detector and hence these events should not be a major component of the instrumental background.

  13. Development and evaluation of an ultra-fast ASIC for future PET scanners using TOF-capable MPPC array detectors

    NASA Astrophysics Data System (ADS)

    Ambe, T.; Ikeda, H.; Kataoka, J.; Matsuda, H.; Kato, T.

    2015-01-01

    We developed a front-end ASIC for future PET scanners with Time-Of-Flight (TOF) capability to be coupled with 4×4 Multi-Pixel Photon Counter (MPPC) arrays. The ASIC is designed based on the open-IP project proposed by JAXA and realized in TSMC 0.35 μm CMOS technology. The circuit comprises 16-channel, low impedance current conveyors for effectively acquiring fast MPPC signals. For precise measurement of the coincidence timing of 511-keV gamma rays, the leading-edge method was used to discriminate the signals. We first tested the time response of the ASIC by illuminating each channel of a MPPC array device 3×3 mm2 in size with a Pico-second Light Pulsar with a light emission peak of 655 nm and pulse duration of 54 ps (FWHM). We obtained 105 ps (FWHM) on average for each channel in time jitter measurements. Moreover, we compensated for the time lag of each channel with inner delay circuits and succeeded in suppressing about a 700-ps lag to only 15 ps. This paper reports TOF measurements using back-to-back 511-keV signals, and suggests that the ASIC can be a promising device for future TOF-PET scanners based on the MPPC array.

  14. System-Level Integrated Circuit (SLIC) development for phased array antenna applications

    NASA Technical Reports Server (NTRS)

    Shalkhauser, K. A.; Raquet, C. A.

    1991-01-01

    A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

  15. System-level integrated circuit (SLIC) development for phased array antenna applications

    NASA Technical Reports Server (NTRS)

    Shalkhauser, K. A.; Raquet, C. A.

    1991-01-01

    A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

  16. Characterization results of the JUNGFRAU full scale readout ASIC

    NASA Astrophysics Data System (ADS)

    Mozzanica, A.; Bergamaschi, A.; Brueckner, M.; Cartier, S.; Dinapoli, R.; Greiffenberg, D.; Jungmann-Smith, J.; Maliakal, D.; Mezza, D.; Ramilli, M.; Ruder, C.; Schaedler, L.; Schmitt, B.; Shi, X.; Tinti, G.

    2016-02-01

    The two-dimensional pixel detector JUNGFRAU is designed for high performance photon science applications at free electron lasers and synchrotron light sources. It is developed for the SwissFEL currently under construction at the Paul Scherrer Institut, Switzerland. The detector is a hybrid pixel detector with a charge integration readout ASIC characterized by single photon sensitivity and a low noise performance over a dynamic range of 104 12 keV photons. Geometrically, a JUNGFRAU readout chip consists of 256×256 pixels of 75×75 μm2. The chips are bump bonded to 320 μm thick silicon sensors. Arrays of 2×4 chips are tiled to form modules of 4×8 cm2 area. Several multi-module systems with up to 16 Mpixels per system will be delivered to the two end stations at SwissFEL. The JUNGFRAU full scale readout ASIC and module design are presented along with characterization results of the first systems. Experiments from fluorescence X-ray, visible light illumination, and synchrotron irradiation are shown. The results include an electronic noise of ~50 electrons r.m.s., which enables single photon detection energies below 2 keV and a noise well below the Poisson statistical limit over the entire dynamic range. First imaging experiments are also shown.

  17. Radiation hardness by design for mixed signal infrared readout circuit applications

    NASA Astrophysics Data System (ADS)

    Gaalema, Stephen; Gates, James; Dobyns, David; Pauls, Greg; Wall, Bruce

    2013-09-01

    Readout integrated circuits (ROICs) to support space-based infrared detection applications often have severe radiation tolerance requirements. Radiation hardness-by-design (RHBD) significantly enhances the radiation tolerance of commercially available CMOS and custom radiation hardened fabrication techniques are not required. The combination of application specific design techniques, enclosed gate architecture nFETs and intrinsic thin oxide radiation hardness of 180 nm process node commercial CMOS allows realization of high performance mixed signal circuits. Black Forest Engineering has used RHBD techniques to develop ROICs with integrated A/D conversion that operate over a wide range of temperatures (40K-300K) to support infrared detection. ROIC radiation tolerance capability for 256x256 LWIR area arrays and 1x128 thermopile linear arrays is presented. The use of 130 nm CMOS for future ROIC RHBD applications is discussed.

  18. Semi-custom integrated circuit amplifier and level discriminator for nuclear and space instruments

    SciTech Connect

    Hahn, S.F.; Cafferty, M.M.

    1990-01-01

    An extra fast current feedback amplifier and a level discriminator are developed employing a dielectrically-isolated bipolar, semi-custom Application Specific Integrated Circuit (ASIC) process. These devices are specifically designed for instruments aboard spacecrafts or in portable packages requiring low power and weight. The amplifier adopts current feedback for a unity-gain bandwidth of 90 MHz while consuming 50 mW. The level discriminator uses a complementary output driver for balanced positive and negative response times. The power consumption of these devices can be programmed by external resistors for optimal speed and power trade-off. 3 refs., 7 figs.

  19. A simple tachometer circuit

    NASA Technical Reports Server (NTRS)

    Dimeff, J.

    1972-01-01

    Electric circuit to measure frequency of repetitive sinusoidal or rectangular wave is presented. Components of electric circuit and method of operation are explained. Application of circuit as tachometer for automobile is discussed.

  20. Molecular and functional characterization of acid-sensing ion channel (ASIC) 1b.

    PubMed

    Bässler, E L; Ngo-Anh, T J; Geisler, H S; Ruppersberg, J P; Gründer, S

    2001-09-01

    Acid-sensing ion channels (ASICs) are activated by extracellular protons and are involved in neurotransmission in the central nervous system, in pain perception, as well as in mechanotransduction. Six different ASIC subunits have been cloned to date, which are encoded by four genes (ASIC1-ASIC4). Proton-gated currents have been described in isolated neurons from sensory ganglia as well as from central nervous system. However, it is largely unclear which of the cloned ASIC subunits underlie these native proton-gated currents. Recently, a splice variant, ASIC-beta, has been described for ASIC1a. In this variant about one-third of the protein is exchanged at the N terminus. Here we show that ASIC-beta has a longer N terminus than previously reported, extending the sequence divergence between ASIC1a and this new variant (ASIC1b). We investigated in detail kinetic and selectivity properties of ASIC1b in comparison to ASIC1a. Kinetics is similar for ASIC1b and ASIC1a. Ca(2+) permeability of ASIC1a is low, whereas ASIC1b is impermeable to Ca(2+). Currents through ASIC1a resemble currents, which have been described in sensory and central neurons, whereas the significance of ASIC1b remains to be established. Moreover, we show that a pre-transmembrane 1 domain controls the permeability to divalent cations in ASIC1, contributing to our understanding of the pore structure of these channels. PMID:11448963

  1. Seizure Termination by Acidosis Depends on ASIC1a

    PubMed Central

    Ziemann, Adam E.; Schnizler, Mikael K.; Albert, Gregory W.; Severson, Meryl A.; Howard, Matthew A.; Welsh, Michael J.; Wemmie, John A.

    2008-01-01

    SUMMARY Most seizures stop spontaneously. However, the molecular mechanisms remain unknown. Earlier observations that seizures reduce brain pH and that acidosis inhibits seizures indicated that acidosis halts epileptic activity. Because acid–sensing ion channel–1a (ASIC1a) shows exquisite sensitivity to extracellular pH and regulates neuron excitability, we hypothesized that acidosis might activate ASIC1a to terminate seizures. Disrupting mouse ASIC1a increased the severity of chemoconvulsant–induced seizures, whereas overexpressing ASIC1a had the opposite effect. ASIC1a did not affect seizure threshold or onset, but shortened seizure duration and prevented progression. CO2 inhalation, long known to lower brain pH and inhibit seizures, also required ASIC1a to interrupt tonic–clonic seizures. Acidosis activated inhibitory interneurons through ASIC1a, suggesting that ASIC1a might limit seizures by increasing inhibitory tone. These findings identify ASIC1a as a key element in seizure termination when brain pH falls. The results suggest a molecular mechanism for how the brain stops seizures and suggest new therapeutic strategies. PMID:18536711

  2. Lignan from Thyme Possesses Inhibitory Effect on ASIC3 Channel Current*

    PubMed Central

    Dubinnyi, Maxim A.; Osmakov, Dmitry I.; Koshelev, Sergey G.; Kozlov, Sergey A.; Andreev, Yaroslav A.; Zakaryan, Naira A.; Dyachenko, Igor A.; Bondarenko, Dmitry A.; Arseniev, Alexander S.; Grishin, Eugene V.

    2012-01-01

    A novel compound was identified in the acidic extract of Thymus armeniacus collected in the Lake Sevan region of Armenia. This compound, named “sevanol,” to our knowledge is the first low molecular weight natural molecule that has a reversible inhibition effect on both the transient and the sustained current of human ASIC3 channels expressed in Xenopus laevis oocytes. Sevanol completely blocked the transient component (IC50 353 ± 23 μm) and partially (∼45%) inhibited the amplitude of the sustained component (IC50 of 234 ± 53 μm). Other types of acid-sensing ion channel (ASIC) channels were intact to sevanol application, except ASIC1a, which showed more than six times less affinity to it as compared with the inhibitory action on the ASIC3 channel. To elucidate the structure of sevanol, the set of NMR spectra in two solvents (d6-DMSO and D2O) was collected, and the complete chemical structure was confirmed by liquid chromatography-mass spectrometry with electrospray ionization (LC-ESI+-MS) fragmentation. This compound is a new lignan built up of epiphyllic acid and two isocitryl esters in positions 9 and 10. In vivo administration of sevanol (1–10 mg/kg) significantly reversed thermal hyperalgesia induced by complete Freund's adjuvant injection and reduced response to acid in a writhing test. Thus, we assume the probable considerable role of sevanol in known analgesic and anti-inflammatory properties of thyme. PMID:22854960

  3. High-accuracy function synthesizer circuit with applications in signal processing

    NASA Astrophysics Data System (ADS)

    Popa, Cosmin

    2012-12-01

    An original low-voltage current-mode high-accuracy function synthesizer circuit will be presented, allowing to implement a multitude of continuous mathematical functions. The dynamic range is strongly extended as a result of the superior-order approximation of the implemented functions. The current-mode operation and the independence of the circuit performances on technological parameters are responsible for an additional improvement of structure accuracy. The advantages of reduced design costs per function represent an immediate consequence of the multiple functions realized by the proposed structure. The approximation error of the original function synthesizer circuit is 0.3% for an extended range of the input signal. The function synthesizer is designed for implementing in 0.18 μm CMOS technology and it is supplied at 1 V. An original application of the proposed function synthesizer circuit is represented by a new fourth-order approximation exponential function generator, having a dynamic range of approximately 33 dB, for an error smaller than 1 dB.

  4. Development of a dedicated readout ASIC for TPC based X-ray polarimeter

    NASA Astrophysics Data System (ADS)

    Zhang, Hongyan; Deng, Zhi; Li, Hong; Liu, Yinong; Feng, Hua

    2016-07-01

    X-ray polarimetry with time projection chambers was firstly proposed by JK Black in 2007 and has been greatly developed since then. It measured two dimensional photoelectron tracks with one dimensional strip and the other dimension was estimated by the drift time from the signal waveforms. A readout ASIC, APV25, originally developed for CMS silicon trackers was used and has shown some limitations such as waveform sampling depth. A dedicated ASIC was developed for TPC based X-ray polarimeters in this paper. It integrated 32 channel circuits and each channel consisted of an analog front-end and a waveform sampler based on switched capacitor array. The analog front-end has a charge sensitive preamplifier with a gain of 25 mV/fC, a CR-RC shaper with a peaking time of 25 ns, a baseline holder and a discriminator for self-triggering. The SCA has a buffer latency of 3.2 μs with 64 cells operating at 20 MSPS. The ASIC was fabricated in a 0.18 μm CMOS process. The equivalent noise charge (ENC) of the analog front-end was measured to be 274.8 e+34.6 e/pF. The effective resolution of the SCA was 8.8 bits at sampling rate up to 50 MSPS. The total power consumption was 2.8 mW per channel. The ASIC was also tested with real TPC detectors and two dimensional photoelectron tracks have been successfully acquired. More tests and analysis on the sensitivity to the polarimetry are undergoing and will be presented in this paper.

  5. Low power smartdust receiver with novel applications and improvements of an RF power harvesting circuit

    NASA Astrophysics Data System (ADS)

    Salter, Thomas Steven, Jr.

    Smartdust is the evolution of wireless sensor networks to cubic centimeter dimensions or less. Smartdust systems have advantages in cost, flexibility, and rapid deployment that make them ideal for many military, medical, and industrial applications. This work addresses the limitations of prior works of research to provide sufficient lifetime and performance for Smartdust sensor networks through the design, fabrication and testing of a novel low power receiver for use in a Smartdust transceiver. Through the novel optimization of a multi-stage LNA design and novel application of a power matched Villard voltage doubler circuit, a 1.0 V, 1.6 mW low power On-Off Key (OOK) receiver operating at 2.2 GHz is fabricated using 0.13 um CMOS technology. To facilitate data transfer in adverse RF propagation environments (1/r3 loss), the chip receives a 1 Mbps data signal with a sensitivity of -90 dBm while consuming just 1.6 nJ/bit. The receiver operates without the addition of any external passives facilitating its application in Smartdust scale (cm 3) wireless sensor networks. This represents an order of magnitude decrease in power consumption over receiver designs of comparable sensitivity. In an effort to further extend the lifetime of the Smartdust transceiver, RF power harvesting is explored as a power source. The small scale of Smartdust sensor networks poses unique challenges in the design of RF power scavenging systems. To meet these challenges, novel design improvements to an RF power scavenging circuit integrated directly onto CMOS are presented. These improvements include a reduction in the threshold voltage of diode connected MOSFET and sources of circuit parasitics that are unique to integrated circuits. Utilizing these improvements, the voltage necessary to drive Smartdust circuitry (1 V) with a greater than 20% RF to DC conversion efficiency was generated from RF energy levels measured in the environment (66 uW). This represents better than double the RF to DC

  6. Micro/nano-scale fabrication of integrated polymer optical wire circuit arrays for optical printed circuit board (O-PCB) application

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, Seung G.; Park, Se G.; Kim, Kyong H.; Kang, Jin K.; Chin, In J.; Kwon, Y. K.; Choi, Young W.

    2005-02-01

    We report on the results of our study on the micro/nano-scale design, fabrication and integration of waveguide arrays for optical printed circuit boards (O-PCBs) and VLSI micro/nano-photonic applications. The O-PCBs are designed to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards or substrates. We have assembled O-PCBs using optical waveguide arrays and circuits made of polymer materials and have examined information handling performances. We also designed power beam splitters and waveguide filters, using nano-scale photonic band-gap crystals, for VLSI photonic integration application. We discuss potential applications of polymer optical waveguide devices and arrays for O-PCB and VLSI micro/nano-photonics for computers, telecommunications, and transportation systems.

  7. The STAR cluster-finder ASIC

    SciTech Connect

    Botlo, M.; LeVine, M.J.; Scheetz, R.A.; Schulz, M.W.; Short, P.; Woods, J.; Crosetto, D.

    1997-12-01

    STAR is a large TPC-based experiment at RHIC, the relativistic heavy ion collider at Brookhaven National Laboratory. The STAR experiment reads out a TPC and an SVT (silicon vertex tracker), both of which require in-line pedestal subtraction, compression of ADC values from 10-bit to 8-bit, and location of time sequences representing responses to charged-particle tracks. The STAR cluster finder ASIC responds to all of these needs. Pedestal subtraction and compression are performed using lookup tables in attached RAM. The authors describe its design and implementation, as well as testing methodology and results of tests performed on foundry prototypes.

  8. The LENA ASIC: Emulating an Obsolete Processor

    NASA Astrophysics Data System (ADS)

    Carayon, J. L.; Mary, L.; Bertrand, J.; Manni, F.

    2013-08-01

    From 10 years, CNES and his partners TAS and Astrium have developed and flown with great success a serie of microsatellites (Demeter, Parasol, Picard etc..), which avionics is based onto a central OBC computer. The OBC is built around a central transputer IMST805 processor, which is now obsolete: the strategic procurement lot done at the beginning of the project is too old now for Quality insurance reasons. The paper describes the LENA ASIC (Logic Emulation for New Architectures) and the approach taken at CNES for the replacement of the Transputer T805 used for Myriade OBC computer to allow production of new microsatellites at a low cost in the next decade.

  9. Optical printed circuit board (O-PCB) for VLSI micro/nano-photonic application

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Kim, K. H.; Kang, J. K.; Chin, I.; Kwon, Y. K.; Choi, Y. W.

    2005-01-01

    We present, in the form of review, the results of our study on the design, fabrication and assembly of optical printed circuit boards (O-PCBs) for VLSI micro/nano-photonic applications. The O-PCBs are designed to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards, substrates or chips, in a manner similar to the electrical printed circuit boards (E-PCBs). We have assembled and constructed O-PCBs using optical waveguide arrays and circuits made of polymer materials and have examined their information handling performances. We also designed power beam splitters and waveguide filters using nano-scale photonic band-gap crystals. We discuss scientific and technological issues concerning the processes of miniaturization, interconnection and integration of polymer optical waveguide devices and arrays for O-PCB and VLSI micro/nano-photonics as applicable to board-to-board, chip-to-chip, and intra-chip integration for computers, telecommunications, and transportation systems.

  10. AIDA: A 16-channel amplifier ASIC to read out the advanced implantation detector array for experiments in nuclear decay spectroscopy

    SciTech Connect

    Braga, D.; Coleman-Smith, P. J.; Davinson, T.; Lazarus, I. H.; Page, R. D.; Thomas, S.

    2011-07-01

    We have designed a read-out ASIC for nuclear decay spectroscopy as part of the AIDA project - the Advanced Implantation Detector Array. AIDA will be installed in experiments at the Facility for Antiproton and Ion Research in GSI, Darmstadt. The AIDA ASIC will measure the signals when unstable nuclei are implanted into the detector, followed by the much smaller signals when the nuclei subsequently decay. Implant energies can be as high as 20 GeV; decay products need to be measured down to 25 keV within just a few microseconds of the initial implants. The ASIC uses two amplifiers per detector channel, one covering the 20 GeV dynamic range, the other selectable over a 20 MeV or 1 GeV range. The amplifiers are linked together by bypass transistors which are normally switched off. The arrival of a large signal causes saturation of the low-energy amplifier and a fluctuation of the input voltage, which activates the link to the high-energy amplifier. The bypass transistors switch on and the input charge is integrated by the high-energy amplifier. The signal is shaped and stored by a peak-hold, then read out on a multiplexed output. Control logic resets the amplifiers and bypass circuit, allowing the low-energy amplifier to measure the subsequent decay signal. We present simulations and test results, demonstrating the AIDA ASIC operation over a wide range of input signals. (authors)

  11. Single superconducting thin film devices for applications in high T/sub c/ materials circuits

    SciTech Connect

    Martens, J.S.; Beyer, J.B.; Nordman, J.E.; Ginley, D.S.; Hohenwarter, G.K.G.; McGinnis, D.P.

    1989-03-01

    The authors have investigated several different devices based on regions of weak superconductivity and multiple parallel links in thin films. Hysteretic symmetric and asymmetric IV curves have been observed. Flux flow was indicated. Device switching properties and the dependence of the flux flow signature in the IV curve on applied magnetic field were explored. Both Nb and high T/sub c/ thin films were used in circuit fabrication. Contrary to vortex flow devices based on Josephson junctions those described here do not possess a tunneling barrier and are made of only a single superconducting layer. Hence they should be applicable to electronic circuits based on high T/sub c/ superconducting materials without the need for tunnel junctions.

  12. Expert System for ASIC Imaging

    NASA Astrophysics Data System (ADS)

    Gupta, Shri N.; Arshak, Khalil I.; McDonnell, Pearse; Boyce, Conor; Duggan, Andrew

    1989-07-01

    With the developments in the techniques of artificial intelligence over the last few years, development of advisory, scheduling and similar class of problems has become very convenient using tools such as PROLOG. In this paper an expert system has been described which helps lithographers and process engineers in several ways. The methodology used is to model each work station according to its input, output and control parameters, combine these work stations in a logical sequence based on past experience and work out process schedule for a job. In addition, all the requirements vis-a-vis a particular job parameters are converted into decision rules. One example is the exposure time, develop time for a wafer with different feature sizes would be different. This expert system has been written in Turbo Prolog. By building up a large number of rules, one can tune the program to any facility and use it for as diverse applications as advisory help, trouble shooting etc. Leitner (1) has described an advisory expert system that is being used at National Semiconductor. This system is quite different from the one being reported in the present paper. The approach is quite different for one. There is stress on job flow and process for another.

  13. A 200 C Universal Gate Driver Integrated Circuit for Extreme Environment Applications

    SciTech Connect

    Tolbert, Leon M; Huque, Mohammad A; Islam, Syed K; Blalock, Benjamin J

    2012-01-01

    High-temperature power converters (dc-dc, dc-ac, etc.) have enormous potential in extreme environment applications, including automotive, aerospace, geothermal, nuclear, and well logging. For successful realization of such high-temperature power conversion modules, the associated control electronics also need to perform at high temperature. This paper presents a silicon-on-insulator (SOI) based high-temperature gate driver integrated circuit (IC) incorporating an on-chip low-power temperature sensor and demonstrating an improved peak output current drive over our previously reported work. This driver IC has been primarily designed for automotive applications, where the underhood temperature can reach 200 C. This new gate driver prototype has been designed and implemented in a 0.8 {micro}m, 2-poly, and 3-metal bipolar CMOS-DMOS (Double-Diffused Metal-Oxide Semiconductor) on SOI process and has been successfully tested for up to 200 C ambient temperature driving a SiC MOSFET and a SiC normally-ON JFET. The salient feature of the proposed universal gate driver is its ability to drive power switches over a wide range of gate turn-ON voltages such as MOSFET (0 to 20 V), normally-OFF JFET (-7 to 3 V), and normally-ON JFET (-20 to 0 V). The measured peak output current capability of the driver is around 5 A and is thus capable of driving several power switches connected in parallel. An ultralow-power on-chip temperature supervisory circuit has also been integrated into the die to safeguard the driver circuit against excessive die temperature ({ge}220 C). This approach utilizes increased diode leakage current at higher temperature to monitor the die temperature. The power consumption of the proposed temperature sensor circuit is below 10 {micro}W for operating temperature up to 200 C.

  14. Recovery Act: High-Temperature Circuit Boards for use in Geothermal Well Monitoring Applications

    SciTech Connect

    Hooker, Matthew; Fabian, Paul

    2013-05-01

    The U.S. Department of Energy is leading the development of alternative energy sources that will ensure the long-term energy independence of our nation. One of the key renewable resources currently being advanced is geothermal energy. To tap into the large potential offered by generating power from the heat of the earth, and for geothermal energy to be more widely used, it will be necessary to drill deeper wells to reach the hot, dry rock located up to 10 km beneath the earth’s surface. In this instance, water will be introduced into the well to create a geothermal reservoir. A geothermal well produced in this manner is referred to as an enhanced geothermal system (EGS). EGS reservoirs are typically at depths of 3 to 10 km, and the temperatures at these depths have become a limiting factor in the application of existing downhole technologies. These high temperatures are especially problematic for electronic systems such as downhole data-logging tools, which are used to map and characterize the fractures and high-permeability regions in underground formations. Information provided by these tools is assessed so that underground formations capable of providing geothermal energy can be identified, and the subsequent drilling operations can be accurately directed to those locations. The mapping of geothermal resources involves the design and fabrication of sensor packages, including the electronic control modules, to quantify downhole conditions (300°C temperature, high pressure, seismic activity, etc.). Because of the extreme depths at which these measurements are performed, it is most desirable to perform the sensor signal processing downhole and then transmit the information to the surface. This approach necessitates the use of high-temperature electronics that can operate in the downhole environment. Downhole signal processing in EGS wells will require the development and demonstration of circuit boards that can withstand the elevated temperatures found at these

  15. Flexible active electrode arrays with ASICs that fit inside the rat's spinal canal.

    PubMed

    Giagka, Vasiliki; Demosthenous, Andreas; Donaldson, Nick

    2015-12-01

    Epidural spinal cord electrical stimulation (ESCS) has been used as a means to facilitate locomotor recovery in spinal cord injured humans. Electrode arrays, instead of conventional pairs of electrodes, are necessary to investigate the effect of ESCS at different sites. These usually require a large number of implanted wires, which could lead to infections. This paper presents the design, fabrication and evaluation of a novel flexible active array for ESCS in rats. Three small (1.7 mm(2)) and thin (100 μm) application specific integrated circuits (ASICs) are embedded in the polydimethylsiloxane-based implant. This arrangement limits the number of communication tracks to three, while ensuring maximum testing versatility by providing independent access to all 12 electrodes in any configuration. Laser-patterned platinum-iridium foil forms the implant's conductive tracks and electrodes. Double rivet bonds were employed for the dice microassembly. The active electrode array can deliver current pulses (up to 1 mA, 100 pulses per second) and supports interleaved stimulation with independent control of the stimulus parameters for each pulse. The stimulation timing and pulse duration are very versatile. The array was electrically characterized through impedance spectroscopy and voltage transient recordings. A prototype was tested for long term mechanical reliability when subjected to continuous bending. The results revealed no track or bond failure. To the best of the authors' knowledge, this is the first time that flexible active electrode arrays with embedded electronics suitable for implantation inside the rat's spinal canal have been proposed, developed and tested in vitro. PMID:26466839

  16. GATING CIRCUITS

    DOEpatents

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  17. Equivalent-circuit modeling of a MEMS phase detector for phase-locked loop applications

    NASA Astrophysics Data System (ADS)

    Han, Juzheng; Liao, Xiaoping

    2016-05-01

    This paper presents an equivalent-circuit model of a MEMS phase detector and deals with its application in phase-locked loops (PLLs). Due to the dc voltage output of the MEMS phase detector, the low-pass filter which is essential in a conventional PLL can be omitted. Thus, the layout area can be miniaturized and the consumed power can be saved. The signal transmission inside the phase detector is realized in circuit model by waveguide modules while the electric-thermal-electric conversion is illustrated in circuit term based on analogies between thermal and electrical variables. Losses are taken into consideration in the modeling. Measurement verifications for the phase detector model are conducted at different input powers 11, 14 and 17 dBm at 10 GHz. The maximum discrepancies between the simulated and measured results are 0.14, 0.42 and 1.13 mV, respectively. A new structure of PLL is constructed by connecting the presented model directly to a VCO module in the simulation platform. It allows to model the transient behaviors of the PLL at both locked and out of lock conditions. The VCO output frequency is revealed to be synchronized with the reference frequency within the hold range. All the modeling and simulation are performed in Advanced Design System (ADS) software.

  18. Monolithically fabricated germanium-on-SOI photodetector and Si CMOS circuit for integrated photonic applications

    NASA Astrophysics Data System (ADS)

    Ang, Kah-Wee; Liow, Tsung-Yang; Yu, Ming-Bin; Fang, Qing; Song, Junfeng; Lo, Guo Q.; Kwong, Dim-Lee

    2010-05-01

    In this paper, we report our design and fabrication approach towards realizing a monolithic integration of Ge photodetector and Si CMOS circuits on common SOI platform for integrated photonic applications. The approach, based on the Ge-on-SOI technology, enables the realization of high sensitivity and low noise photodetector that is capable of performing efficient optical-to-electrical encoding in the near-infrared wavelengths regime. When operated at a bias of -1.0V, a vertical PIN detector achieved a lower Idark of ~0.57μA as compared to a lateral PIN detector, a value that is below the typical ~1μA upper limit acceptable for high speed receiver design. Very high responsivity of ~0.92A/W was obtained in both detector designs for a wavelength of 1550nm, which corresponds to a quantum efficiency of ~73%. Impulse response measurements showed that a vertical PIN photodetector gives rise to a smaller FWHM of ~24.4ps, which corresponds to a -3dB bandwidth of ~11.3GHz where RC time delay is known to be the dominant factor limiting the speed performance. Eye patterns (PRBS 27-1) measurement further confirms the achievement of high speed and low noise photodetection at a bit-rate of 8.5Gb/s. In addition, we evaluate the DC characteristics of the monolithically fabricated Si CMOS inverter circuit. Excellent transfer and output characteristics were achieved by the integrated CMOS inverter circuits in addition to the well behaved logic functions. We also assess the impact of the additional thermal budget introduced by the Ge epitaxy growth on the threshold voltage variation of the short channel CMOS transistors and discuss the issues and potential for the seamless integration of electronic and photonic integrated circuits.

  19. Terahertz applications of integrated circuits based on intrinsic Josephson junctions in high Tc superconductors

    NASA Astrophysics Data System (ADS)

    Wang, Huabing; Wu, Peiheng; Yamashita, Tsutomu

    2001-10-01

    Using a newly developed double-side fabrication method, an IJJ stack plus a bow-tie antenna and chokes were integrated in a slice 200 nm thick and singled out from inside a bulk Bi2Sr2CaCu2O8+x (BSCCO) single crystal. The junctions in the fabricated stack were very uniform, and the number of junctions involved was rather controllable. In addition to this method, which can be used to fabricate integrated circuits based on intrinsic Josephson junctions in high temperature (Tc) superconductors, also reported will be terahertz responses of IJJs, and the possible applications in quantum voltage standard, spectroscopy, and so on.

  20. Performance and applications of gallium-nitride monolithic microwave integrated circuits (GaN MMICs)

    NASA Astrophysics Data System (ADS)

    Scott, Jonathan B.; Parker, Anthony E.

    2007-12-01

    The evolution of wide-bandgap semiconductor transistor technology is placed in historical context with other active device technologies. The relative rapidity of GaN transistor development is noted and is attributed to the great parallel activity in the lighting sector and the historical experience and business model from the III-V compound semiconductor sector. The physical performance expectations for wide-bandgap technologies such as Gallium-Nitride Field-Effect Transistors (GaN FETs) are reviewed. We present some device characteristics. Challenges met in characterising, and prospects for modeling GaN FETs are described. Reliability is identified as the final remaining hurdle facing would-be foundries. Evolutionary and unsurprising applications as well as novel and revolutionary applications are suggested. Novel applications include wholly monolithic switchmode power supplies, simplified tools for ablation and diathermy in tissue, and very wide dynamic range circuits for audio or low phase noise signal generation. We conclude that now is the time to embark on circuit design of MMICs in wide-bandgap technology. The potential for fabless design groups to capitalise upon design IP without strong geopraphic advantage is noted.

  1. Characteristics of a multichannel low-noise front-end ASIC for CZT-based small animal PET imaging

    NASA Astrophysics Data System (ADS)

    Gao, W.; Liu, H.; Gan, B.; Hu, Y.

    2014-05-01

    In this paper, we present the design and characteristics of a novel low-noise front-end readout application-specific integrated circuit dedicated to CdZnTe (CZT) detectors for a small animal PET imaging system. A low-noise readout method based on the charge integration and the delayed peak detection is proposed. An eight-channel front-end readout prototype chip is designed and implemented in a 0.35 μm CMOS process. The die size is 2.3 mm ×2.3 mm. The prototype chip is tested in different methods including electronic test, energy spectrum test and irradiation test. The input range of the ASIC is from 2000e- to 180,000e-, reflecting the energy of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 mV/fC at the shaping time of 1 μs. The best test result of the equivalent noise charge (ENC) is 58.9 e- at zero farad plus 5.4 e- per picofarad. The nonlinearity and the crosstalk are less than 3% and less than 2%, respectively, at the room temperature. The static power dissipation is about 3 mW/channel.

  2. VHiSSI: Experimental Spacefibre Asic

    NASA Astrophysics Data System (ADS)

    Gonzalez Villafranca, Alberto; Ferrer, Albert; McLaren, David; McClements, Chris; Parkes, Steve

    2015-09-01

    SpaceFibreis the next generation data link and network technology being developed by University of Dundee for the European Space Agency. This high-speed technology runs over both copper and fibre optic cables and is backwards compatible with the ubiquitous SpaceWire technology. SpaceFibre provides 12 times the throughput of a SpW link (2.5 Gbps) with current flight qualified technology together with inbuilt QoS and FDIR capabilities. This paper details the first implementation of SpaceFibre in a radiation tolerant device in the frame of the VHiSSI project. The functionality of this ASIC chip is explained and the results of the functional and Total Ionising Dose and Single Event Effect radiation testing are detailed.

  3. Development of a multi-channel readout ASIC for a fast neutron spectrometer based on GEM-TPC

    NASA Astrophysics Data System (ADS)

    He, Li; Deng, Zhi; Liu, Yi-Nong; Li, Yu-Lan

    2014-10-01

    A multi-channel front-end ASIC has been developed for a fast neutron spectrometer based on Gas Electron Multiplier (GEM)-Time Projection Chamber (TPC). Charge Amplifier and Shaping Amplifier for GEM (CASAGEM) integrates 16+1 channels: 16 channels for anodes and 1 channel for cathode. The gain and the shaping time are adjustable from 2 to 40 mV/fC and from 20 to 80 ns, respectively. The prototype ASIC is fabricated in 0.35 μm CMOS process. An evaluation Print Circuit Board (PCB) was also developed for chip tests. In total 20 chips have been tested. The integrated nonlinearity is less than 1%. The equivalent noise electrons is less than 2000e when the input capacitor is 50 pF. The time jitter is less than 1 ns. The design and the test results are presented in the paper.

  4. Acid-sensing ion channels (ASICs) in the taste buds of adult zebrafish.

    PubMed

    Viña, E; Parisi, V; Cabo, R; Laurà, R; López-Velasco, S; López-Muñiz, A; García-Suárez, O; Germanà, A; Vega, J A

    2013-03-01

    In detecting chemical properties of food, different molecules and ion channels are involved including members of the acid-sensing ion channels (ASICs) family. Consistently ASICs are present in sensory cells of taste buds of mammals. In the present study the presence of ASICs (ASIC1, ASIC2, ASIC3 and ASIC4) was investigated in the taste buds of adult zebrafish (zASICs) using Western blot and immunohistochemistry. zASIC1 and zASIC3 were regularly absent from taste buds, whereas faint zASIC2 and robust zASIC4 immunoreactivities were detected in sensory cells. Moreover, zASIC2 also immunolabelled nerves supplying taste buds. The present results demonstrate for the first time the presence of zASICs in taste buds of teleosts, with different patterns to that occurring in mammals, probably due to the function of taste buds in aquatic environment and feeding. Nevertheless, the role of zASICs in taste remains to be demonstrated. PMID:23328442

  5. ASIC2 Subunits Facilitate Expression at the Cell Surface and Confer Regulation by PSD-95

    PubMed Central

    Harding, Anne Marie S.; Kusama, Nobuyoshi; Hattori, Tomonori; Gautam, Mamta; Benson, Christopher J.

    2014-01-01

    Acid-sensing ion channels (ASICs) are Na+ channels activated by changes in pH within the peripheral and central nervous systems. Several different isoforms of ASICs combine to form trimeric channels, and their properties are determined by their subunit composition. ASIC2 subunits are widely expressed throughout the brain, where they heteromultimerize with their partnering subunit, ASIC1a. However, ASIC2 contributes little to the pH sensitivity of the channels, and so its function is not well understood. We found that ASIC2 increased cell surface levels of the channel when it is coexpressed with ASIC1a, and genetic deletion of ASIC2 reduced acid-evoked current amplitude in mouse hippocampal neurons. Additionally, ASIC2a interacted with the neuronal synaptic scaffolding protein PSD-95, and PSD-95 reduced cell surface expression and current amplitude in ASICs that contain ASIC2a. Overexpression of PSD-95 also reduced acid-evoked current amplitude in hippocampal neurons. This result was dependent upon ASIC2 since the effect of PSD-95 was abolished in ASIC2−/− neurons. These results lend support to an emerging role of ASIC2 in the targeting of ASICs to surface membranes, and allows for interaction with PSD-95 to regulate these processes. PMID:24699665

  6. Nanomaterials, Devices and Interface Circuits: Applications for Optoelectronic and Energy Harvesting

    NASA Astrophysics Data System (ADS)

    Purahmad, Mohsen

    developed a model which strongly conciliates some strongly divergent opinions behind operation of the semiconductor piezoelectric nano-generators. In order to develop such a physics-based model, first the electrostatic potential and depletion width in piezoelectric semiconductor NWs are derived by considering a non-depleted region and a surface depleted region and solving the Poisson equation. By determining the piezoelectric induced charge density, in terms of equivalent density of charges, the effect of piezoelectric charges on the surface depletion region and the distributed electric potential in NW have been investigated. The numerical results demonstrate that the ZnO NWs with smaller radii have a larger surface depletion region which results in a stronger surface potential and depletion region perturbation by induced piezoelectric charges. In the last part of our study on piezoelectric energy harvesters the low power interface circuits which are one of the fundamental building blocks of any self-powered devices has been studied. Utilization of piezoelectric energy harvesters to power electronic devices has attracted significant attention recently. However, the power generated by a piezoelectric energy harvester is too small to power an electronic device directly. Hence, a low power, efficient interface circuit between the energy harvester and a storage unit is essential in any piezoelectric energy harvesting system. Here, a new interface circuit topology for piezoelectric energy harvesting applications is proposed and various design factors for circuit-level optimization are discussed. In the proposed interface circuit a peak detector circuit operating in the sub-threshold region with power dissipation around 160 nW together with a delay circuit form the control block, which is one of the more important units of the piezoelectric energy harvesting systems. (Abstract shortened by UMI.)

  7. Development of a Position Decoding ASIC for SPECT using Silicon Photomultiplier

    NASA Astrophysics Data System (ADS)

    Cho, M.; Kim, H.; Lim, K. T.; Cho, G.

    2016-01-01

    Single Photon Emission Computed Tomography(SPECT) is a widely used diagnosis modality for detecting metabolic diseases. In general, SPECT system is consisted of a sensor, a pre-amplifier, position decoding circuits(PDC) and a data acquisition(DAQ) system. Due to such complexity, it is quite costly to assemble SPECT system by putting discrete components together. Moreover, using discrete components would make the system rather bulky. In this work, we designed a channel module ASIC for SPECT system. This system was composed of a transimpedance amplifier(TIA), comparators and digital logics. In this particular module, a TIA was selected as a preamplifier because the decay time and the rise time are shorter than that of other preamplifier topologies. In the proposed module, the amplified pulse from the TIA was split into two separate signals and each signal was then fed into two comparators with different reference levels, e.g., a low and high level. Then an XOR gate combined the comparator outputs and the output of XOR gate was sent to the suceeding digital logic. Furthermore, the output of each component in the module is composed of a signal packet. The packet includes the information on the energy, the time and the position of the incident photon. The energy and position information of a detected radiation can be derived from the output of the D-flipflop(DFF) in the module via time-over-threshold(TOT). The timing information was measured using a delayed rising edge from the low-level referenced comparator. There are several advantages in developing the channel module ASIC. First of all, the ASIC has only digital outputs and thus a correction circuit for analog signal distortion can be neglected. In addition, it is possible to cut down the system production cost because the volume of the system can be reduced due to the compactness of ASIC. The benefits of channel module is not only limited to SPECT but also beneficial to many other radiation detecting systems.

  8. [Acid-Sensing Ion Channels (ASICs) in pain].

    PubMed

    Lingueglia, Eric

    2014-01-01

    The discovery of new drug targets represents a real opportunity for developing fresh strategies against pain. Ion channels are interesting targets because they are directly involved in the detection and the transmission of noxious stimuli by sensory fibres of the peripheral nervous system and by neurons of the spinal cord. Acid-Sensing Ion Channels (ASICs) have emerged as important players in the pain pathway. They are neuronal, voltage-independent depolarizing sodium channels activated by extracellular protons. The ASIC family comprises several subunits that need to associate into homo- or hetero-trimers to form a functional channel. The ASIC1 and ASIC3 isoforms are particularly important in sensory neurons, whereas ASIC1a, alone or in association with ASIC2, is essential in the central nervous system. The potent analgesic effects associated with their inhibition in animals (which can be comparable to those of morphine) and data suggesting a role in human pain illustrate the therapeutic potential of these channels. PMID:24948015

  9. Monolithic Active Pixel Matrix with Binary Counters (MAMBO) ASIC

    SciTech Connect

    Khalid, Farah F.; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond J.; /Fermilab

    2010-11-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12 keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  10. Monolithic active pixel matrix with binary counters (MAMBO III) ASIC

    SciTech Connect

    Khalid, Farah; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond; /Fermilab

    2010-01-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  11. Carbon Nanotube Self-Gating Diode and Application in Integrated Circuits.

    PubMed

    Si, Jia; Liu, Lijun; Wang, Fanglin; Zhang, Zhiyong; Peng, Lian-Mao

    2016-07-26

    A nano self-gating diode (SGD) based on nanoscale semiconducting material is proposed, simulated, and realized on semiconducting carbon nanotubes (CNTs) through a doping-free fabrication process. The relationships between the performance and material/structural parameters of the SGD are explored through numerical simulation and verified by experiment results. Based on these results, performance optimization strategy is outlined, and high performance CNT SGDs are fabricated and demonstrated to surpass other published CNT diodes. In particular the CNT SGD exhibits high rectifier factor of up to 1.4 × 10(6) while retains large on-state current. Benefiting from high yield and stability, CNT SGDs are used for constructing logic and analog integrated circuits. Two kinds of basic digital gates (AND and OR) have been realized on chip through using CNT SGDs and on-chip Ti wire resistances, and a full wave rectifier circuit has been demonstrated through using two CNT SGDs. Although demonstrated here using CNT SGDs, this device structure may in principle be implemented using other semiconducting nanomaterials, to provide ideas and building blocks for electronic applications based on nanoscale materials. PMID:27322134

  12. Improving Design Efficiency for Large-Scale Heterogeneous Circuits

    NASA Astrophysics Data System (ADS)

    Gregerson, Anthony

    Despite increases in logic density, many Big Data applications must still be partitioned across multiple computing devices in order to meet their strict performance requirements. Among the most demanding of these applications is high-energy physics (HEP), which uses complex computing systems consisting of thousands of FPGAs and ASICs to process the sensor data created by experiments at particles accelerators such as the Large Hadron Collider (LHC). Designing such computing systems is challenging due to the scale of the systems, the exceptionally high-throughput and low-latency performance constraints that necessitate application-specific hardware implementations, the requirement that algorithms are efficiently partitioned across many devices, and the possible need to update the implemented algorithms during the lifetime of the system. In this work, we describe our research to develop flexible architectures for implementing such large-scale circuits on FPGAs. In particular, this work is motivated by (but not limited in scope to) high-energy physics algorithms for the Compact Muon Solenoid (CMS) experiment at the LHC. To make efficient use of logic resources in multi-FPGA systems, we introduce Multi-Personality Partitioning, a novel form of the graph partitioning problem, and present partitioning algorithms that can significantly improve resource utilization on heterogeneous devices while also reducing inter-chip connections. To reduce the high communication costs of Big Data applications, we also introduce Information-Aware Partitioning, a partitioning method that analyzes the data content of application-specific circuits, characterizes their entropy, and selects circuit partitions that enable efficient compression of data between chips. We employ our information-aware partitioning method to improve the performance of the hardware validation platform for evaluating new algorithms for the CMS experiment. Together, these research efforts help to improve the efficiency

  13. Heterostructure-based high-speed/high-frequency electronic circuit applications

    NASA Astrophysics Data System (ADS)

    Zampardi, P. J.; Runge, K.; Pierson, R. L.; Higgins, J. A.; Yu, R.; McDermott, B. T.; Pan, N.

    1999-08-01

    With the growth of wireless and lightwave technologies, heterostructure electronic devices are commodity items in the commercial marketplace [Browne J. Power-amplifier MMICs drive commercial circuits. Microwaves & RF, 1998. p. 116-24.]. In particular, HBTs are an attractive device for handset power amplifiers at 900 MHz and 1.9 GHz for CDMA applications [Lum E. GaAs technology rides the wireless wave. Proceedings of the 1997 GaAs IC Symposium, 1997. p. 11-13; "Rockwell Ramps Up". Compound Semiconductor, May/June 1997.]. At higher frequencies, both HBTs and p-HEMTs are expected to dominate the marketplace. For high-speed lightwave circuit applications, heterostructure based products on the market for OC-48 (2.5 Gb/s) and OC-192 (10 Gb/s) are emerging [http://www.nb.rockwell.com/platforms/network_access/nahome.html#5.; http://www.nortel.com/technology/opto/receivers/ptav2.html.]. Chips that operate at 40 Gb/ have been demonstrated in a number of research laboratories [Zampardi PJ, Pierson RL, Runge K, Yu R, Beccue SM, Yu J, Wang KC. hybrid digital/microwave HBTs for >30 Gb/s optical communications. IEDM Technical Digest, 1995. p. 803-6; Swahn T, Lewin T, Mokhtari M, Tenhunen H, Walden R, Stanchina W. 40 Gb/s 3 Volt InP HBT ICs for a fiber optic demonstrator system. Proceedings of the 1996 GaAs IC Symposium, 1996. p. 125-8; Suzuki H, Watanabe K, Ishikawa K, Masuda H, Ouchi K, Tanoue T, Takeyari R. InP/InGaAs HBT ICs for 40 Gbit/s optical transmission systems. Proceedings of the 1997 GaAs IC Symposium, 1997. p. 215-8]. In addition to these two markets, another area where heterostructure devices are having significant impact is for data conversion [Walden RH. Analog-to digital convertor technology comparison. Proceedings of the 1994 GaAs IC Symposium, 1994. p. 217-9; Poulton K, Knudsen K, Corcoran J, Wang KC, Nubling RB, Chang M-CF, Asbeck PM, Huang RT. A 6-b, 4 GSa/s GaAs HBT ADC. IEEE J Solid-State Circuits 1995;30:1109-18; Nary K, Nubling R, Beccue S, Colleran W

  14. Review of hybrid pixel detector readout ASICs for spectroscopic X-ray imaging

    NASA Astrophysics Data System (ADS)

    Ballabriga, R.; Alozy, J.; Campbell, M.; Frojdh, E.; Heijne, E. H. M.; Koenig, T.; Llopart, X.; Marchal, J.; Pennicard, D.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.; Zuber, M.

    2016-01-01

    Semiconductor detector readout chips with pulse processing electronics have made possible spectroscopic X-ray imaging, bringing an improvement in the overall image quality and, in the case of medical imaging, a reduction in the X-ray dose delivered to the patient. In this contribution we review the state of the art in semiconductor-detector readout ASICs for spectroscopic X-ray imaging with emphasis on hybrid pixel detector technology. We discuss how some of the key challenges of the technology (such as dealing with high fluxes, maintaining spectral fidelity, power consumption density) are addressed by the various ASICs. In order to understand the fundamental limits of the technology, the physics of the interaction of radiation with the semiconductor detector and the process of signal induction in the input electrodes of the readout circuit are described. Simulations of the process of signal induction are presented that reveal the importance of making use of the small pixel effect to minimize the impact of the slow motion of holes and hole trapping in the induced signal in high-Z sensor materials. This can contribute to preserve fidelity in the measured spectrum with relatively short values of the shaper peaking time. Simulations also show, on the other hand, the distortion in the energy spectrum due to charge sharing and fluorescence photons when the pixel pitch is decreased. However, using recent measurements from the Medipix3 ASIC, we demonstrate that the spectroscopic information contained in the incoming photon beam can be recovered by the implementation in hardware of an algorithm whereby the signal from a single photon is reconstructed and allocated to the pixel with the largest deposition.

  15. Terahertz imaging technique and application in large scale integrated circuit failure inspection

    NASA Astrophysics Data System (ADS)

    Di, Zhi-gang; Yao, Jian-quan; Jia, Chun-rong; Xu, De-gang; Bing, Pi-bin; Yang, Peng-fei; Zheng, Yi-bo

    2010-11-01

    Terahertz ray, as a new style optic source, usually means the electromagnetic whose frequencies lies in between 0.1THz~10THz, the waveband region of the electromagnetic spectrum lies in the gap between microwaves and infrared ray. With the development of laser techniques, quantum trap techniques and compound semiconductor techniques, many new terahertz techniques have been pioneered, motivated in part by the vast range of possible applications for terahertz imaging, sensing, and spectroscopy. THz imaging technique was introduced, and THz imaging can give us not only the density picture but also the phase information within frequency domain. Consequently, images of suspicious objects such as concealed metallic or metal weapons are much sharper and more readily identified when imaged with THz imaging scanners. On the base of these, the application of THz imaging in nondestructive examination, more concretely in large scale circuit failure inspection was illuminated, and the important techniques of this application were introduced, also future prospects were discussed. With the development of correlative technology of THz, we can draw a conclusion that THz imaging technology will have nice application foreground.

  16. An embedded nonvolatile memory cell with spacer floating gate for power management integrated circuit applications

    NASA Astrophysics Data System (ADS)

    Na, Kee-Yeol; Baek, Ki-Ju; Lee, Gun-Woong; Kim, Yeong-Seuk

    2013-08-01

    This paper describes a simple nonvolatile memory cell with a poly-Si spacer floating gate for power management integrated circuit applications. The proposed memory cell is fabricated using a 0.35 μm double-poly high-voltage CMOS process which includes PIP capacitor, LV (5 V), and HV (20 V) CMOS devices. The floating gates of the proposed cell are buried under a LDD spacer oxide; thus the unit cell can be scaled easily in the channel length direction. In addition, any extra photo masking step is not required for the proposed cell in the applied fabrication process. The proposed cell shows an acceptable threshold voltage window of up to 104 cycles and less than 2% threshold voltage shifts in an 85 °C retention test.

  17. Graphene-based tunable non-foster circuit for VHF applications

    NASA Astrophysics Data System (ADS)

    Tian, Jing; Nagarkoti, Deepak Singh; Rajab, Khalid Z.; Hao, Yang

    2016-06-01

    This paper presents a negative impedance converter (NIC) based on graphene field effect transistors (GFETs) for VHF applications. The NIC is designed following Linvill's open circuit stable (OCS) topology. The DC modelling parameters of GFET are extracted from a device measured by Meric et al. [IEEE Electron Devices Meeting, 23.2.1 (2010)] Estimated parasitics are also taken into account. Simulation results from Keysight Advanced Design System (ADS) show good NIC performance up to 200 MHz and the value of negative capacitance is directly proportional to the capacitive load. In addition, it has been shown that by varying the supply voltage the value of negative capacitance can also be tuned. The NIC stability has been tested up to 2 GHz (10 times the maximum operation frequency) using Nyquist stability criterion to ensure there are no oscillation issues.

  18. Radiation-hardened CMOS integrated circuit development for space nuclear power applications

    NASA Astrophysics Data System (ADS)

    Gover, J. E.; Gregory, B. L.

    Examination of the types of systems required for space nuclear power applications suggests a need for microelectronics technology that can function during and after exposure to radiation levels exceeding 1 x 10 to the 16th neutrons/sq cm and gamma ray doses in excess of 1 x 10 to the 7th rad(Si). Radiation-hardened Complimentary Metal Oxide Silicon and Silicon Nitride Oxide Silicon (SNOS) ICs presently in development at Sandia National Laboratories' Center for Radiation-Hardened Microelectronics satisfy these radiation requirements. Future integrated circuit development will further advance the radiation hardness capabilities while extending the IC technology to 32-bit enhanced microprocessors and 1-Mbyte SNOS EEPROM memories.

  19. DSP filters in FPGAs for image processing applications

    NASA Astrophysics Data System (ADS)

    Taylor, Brad

    1996-10-01

    Real-time video-rate image processing requires orders of magnitude performance beyond the capabilities of general purpose computers. ASICs deliver the required performance, however they have the drawback of fixed functionality. Field programmable gate arrays (FPGAs) are reprogrammable SRAM based ICs capable of real-time image processing. FPGAs deliver the benefits of hardware execution speeds and software programmability. An FPGA program creates a custom data processor, which executes the equivalent of hundreds to thousands of lines of C code on the same clock tick. FPGAs emulate circuits which are normally built as ASICs. Multiple real-time video streams can be processed in Giga Operations' Spectrum Reconfigurable Computing (RC) PlatformTM. The Virtual Bus ArchitectureTM enables the same hardware to be configured into many image processing architectures, including 32-bit pipelines, global busses, rings, and systolic arrays. This allows an efficient mapping of data flows and memory access for many image processing applications and the implementation of many real-time DSP filters, including convolutions, morphological operators, and recoloring and resampling algorithms. FPGAs provide significant price/performance benefits versus ASICs where time to market, cost to market, and technical risk are issues. And FPGA descriptions migrate efficiently and easily into ASICs for downstream cost reduction.

  20. Synchronous and asynchronous multiplexer circuits for medical imaging realized in CMOS 0.18um technology

    NASA Astrophysics Data System (ADS)

    Długosz, R.; Iniewski, K.

    2007-05-01

    Multiplexers are one of the most important elements in readout front-end ASICs for multi-element detectors in medical imaging. The purpose of these ASICs is to detect signals appearing randomly in many channels and to collect the detected data in an ordered fashion (de-randomization) in order to send it to an external ADC. ASIC output stage functionality can be divided into two: pulse detection and multiplexing. The pulse detection block is responsible for detecting maximum values of signals arriving from the shaper, sending a flag signal indicating that the peak signal has been detected and storing the pulse in an analog memory until read by ADC. The multiplexer in turn is responsible for searching for active flags, controlling the channel that has detected the peak signal and performing reset functions after readout. There are several types of multiplexers proposed in this paper, which can be divided into several classes: synchronous, synchronized and asynchronous. Synchronous circuits require availability of the multiphase clock generator, which increases the power dissipation, but simultaneously provide very convenient mechanism that enables unambiguous choice of the active channel. This characteristics leads to 100% effectiveness in data processing and no data loss. Asynchronous multiplexers do not require clock generators and because of that have simpler structure, are faster and more power efficient, especially when data samples occur seldom at the ASIC's inputs. The main problem of the asynchronous solution is when data on two or more inputs occur almost at the same time, shorter than the multiplexer's reaction time. In this situation some data can be lost. In many applications loss of the order of 1% of the data is acceptable, which makes use of asynchronous multiplexers possible. For applications when the lower loss is desirable a new hierarchy mechanism has been introduced. One of proposed solutions is a synchronized binary tree structure, that uses many

  1. Thermocouple-Signal-Conditioning Circuit

    NASA Technical Reports Server (NTRS)

    Simon, Richard A.

    1991-01-01

    Thermocouple-signal-conditioning circuit acting in conjunction with thermocouple, exhibits electrical behavior of voltage in series with resistance. Combination part of input bridge circuit of controller. Circuit configured for either of two specific applications by selection of alternative resistances and supply voltages. Includes alarm circuit detecting open circuit in thermocouple and provides off-scale output to signal malfunctions.

  2. Printed circuit boards as platform for disposable lab-on-a-chip applications

    NASA Astrophysics Data System (ADS)

    Leiterer, Christian; Urban, Matthias; Fritzsche, Wolfgang; Goldys, Ewa; Inglis, David

    2015-12-01

    An increasing demand in performance from electronic devices has resulted in continuous shrinking of electronic components. This shrinkage has demanded that the primary integration platform, the printed circuit board (PCB), follow this same trend. Today, PCB companies offer ~100 micron sized features (depth and width) which mean they are becoming suitable as physical platforms for Lab-on-a-Chip (LOC) and microfluidic applications. Compared to current lithographic based fluidic approaches; PCB technology offers several advantages that are useful for this technology. These include: Being easily designed and changed using free software, robust structures that can often be reused, chip layouts that can be ordered from commercial PCB suppliers at very low cost (1 AUD each in this work), and integration of electrodes at no additional cost. Here we present the application of PCB technology in connection with microfluidics for several biomedical applications. In case of commercialization the costs for each device can be even further decreased to approximately one tenth of its current cost.

  3. Development of arrays of Silicon Drift Detectors and readout ASIC for the SIDDHARTA experiment

    NASA Astrophysics Data System (ADS)

    Quaglia, R.; Schembari, F.; Bellotti, G.; Butt, A. D.; Fiorini, C.; Bombelli, L.; Giacomini, G.; Ficorella, F.; Piemonte, C.; Zorzi, N.

    2016-07-01

    This work deals with the development of new Silicon Drift Detectors (SDDs) and readout electronics for the upgrade of the SIDDHARTA experiment. The detector is based on a SDDs array organized in a 4×2 format with each SDD square shaped with 64 mm2 (8×8) active area. The total active area of the array is therefore 32×16 mm2 while the total area of the detector (including 1 mm border dead area) is 34 × 18mm2. The SIDDHARTA apparatus requires 48 of these modules that are designed and manufactured by Fondazione Bruno Kessler (FBK). The readout electronics is composed by CMOS preamplifiers (CUBEs) and by the new SFERA (SDDs Front-End Readout ASIC) circuit. SFERA is a 16-channels readout ASIC designed in a 0.35 μm CMOS technology, which features in each single readout channel a high order shaping amplifier (9th order Semi-Gaussian complex-conjugate poles) and a high efficiency pile-up rejection logic. The outputs of the channels are connected to an analog multiplexer for the external analog to digital conversion. An on-chip 12-bit SAR ADC is also included. Preliminary measurements of the detectors in the single SDD format are reported. Also measurements of low X-ray energies are reported in order to prove the possible extension to the soft X-ray range.

  4. Onboard calibration circuit for the DAMPE BGO calorimeter front-end electronics

    NASA Astrophysics Data System (ADS)

    Zhang, De-Liang; Feng, Chang-Qing; Zhang, Jun-Bin; Wang, Qi; Ma, Si-Yuan; Shen, Zhong-Tao; Jiang, Di; Gao, Shan-Shan; Zhang, Yun-Long; Guo, Jian-Hua; Liu, Shu-Bin; An, Qi

    2016-05-01

    DAMPE (DArk Matter Particle Explorer) is a scientific satellite which is mainly aimed at indirectly searching for dark matter in space. One critical sub-detector of the DAMPE payload is the BGO (bismuth germanium oxide) calorimeter, which contains 1848 PMT (photomultiplier tube) dynodes and 16 FEE (Front-End Electronics) boards. VA160 and VATA160, two 32-channel low power ASICs (Application Specific Integrated Circuits), are adopted as the key components on the FEEs to perform charge measurement for the PMT signals. In order to monitor the parameter drift which may be caused by temperature variation, aging, or other environmental factors, an onboard calibration circuit is designed for the VA160 and VATA160 ASICs. It is mainly composed of a 12-bit DAC (Digital to Analog Converter), an operational amplifier and an analog switch. Test results showed that a dynamic range of 0–30 pC with a precision of 5 fC (Root Meam Square, RMS) was achieved, which covers the VA160’s input range. It can be used to compensate for the temperature drift and test the trigger function of the FEEs. The calibration circuit has been implemented for the front-end electronics of the BGO Calorimeter and verified by all the environmental tests for both Qualification Model and Flight Model of DAMPE. The DAMPE satellite was launched at the end of 2015 and the calibration circuit will operate periodically in space. Supported by Strategic Priority Research Program on Space Science of Chinese Academy of Sciences (XDA04040202-4), and National Basic Research Program (973 Program) of China (2010CB833002) and National Natural Science Foundation of China (11273070)

  5. Fabrication, electrical characterization, and detection application of graphene-sheet-based electrical circuits

    PubMed Central

    2014-01-01

    The distribution of potential, electric field, and gradient of square of electric field was simulated via a finite element method for dielectrophoresis (DEP) assembly. Then reduced graphene oxide sheets (RGOS)- and graphene oxide sheets (GOS)-based electrical circuits were fabricated via DEP assembly. The mechanically exfoliated graphene sheets (MEGS)-based electrical circuit was also fabricated for comparison. The electrical transport properties of three types of graphene-based electrical circuits were measured. The MEGS-based electrical circuit possesses the best electrical conductivity, and the GOS-based electrical circuit has the poorest electrical conductivity among all three circuits. The three types of electrical circuits were applied for the detection of copper ions (Cu2+). The RGOS-based electrical circuit can detect the Cu2+ when the concentration of Cu2+ was as low as 10 nM in solution. The GOS-based electrical circuit can only detect Cu2+ after chemical reduction. The possible mechanism of electron transfer was proposed for the detection. The facile fabrication method and excellent performance imply the RGOS-based electrical circuit has great potential to be applied to metal ion sensors. PMID:25593547

  6. Fabrication, electrical characterization, and detection application of graphene-sheet-based electrical circuits

    NASA Astrophysics Data System (ADS)

    Peng, Yitian; Lei, Jianping

    2014-11-01

    The distribution of potential, electric field, and gradient of square of electric field was simulated via a finite element method for dielectrophoresis (DEP) assembly. Then reduced graphene oxide sheets (RGOS)- and graphene oxide sheets (GOS)-based electrical circuits were fabricated via DEP assembly. The mechanically exfoliated graphene sheets (MEGS)-based electrical circuit was also fabricated for comparison. The electrical transport properties of three types of graphene-based electrical circuits were measured. The MEGS-based electrical circuit possesses the best electrical conductivity, and the GOS-based electrical circuit has the poorest electrical conductivity among all three circuits. The three types of electrical circuits were applied for the detection of copper ions (Cu2+). The RGOS-based electrical circuit can detect the Cu2+ when the concentration of Cu2+ was as low as 10 nM in solution. The GOS-based electrical circuit can only detect Cu2+ after chemical reduction. The possible mechanism of electron transfer was proposed for the detection. The facile fabrication method and excellent performance imply the RGOS-based electrical circuit has great potential to be applied to metal ion sensors.

  7. Interface-modified random circuit breaker network model applicable to both bipolar and unipolar resistance switching

    NASA Astrophysics Data System (ADS)

    Lee, S. B.; Lee, J. S.; Chang, S. H.; Yoo, H. K.; Kang, B. S.; Kahng, B.; Lee, M.-J.; Kim, C. J.; Noh, T. W.

    2011-01-01

    We observed reversible-type changes between bipolar (BRS) and unipolar resistance switching (URS) in one Pt/SrTiOx/Pt capacitor. To explain both BRS and URS in a unified scheme, we introduce the "interface-modified random circuit breaker network model," in which the bulk medium is represented by a percolating network of circuit breakers. To consider interface effects in BRS, we introduce circuit breakers to investigate resistance states near the interface. This percolation model explains the reversible-type changes in terms of connectivity changes in the circuit breakers and provides insights into many experimental observations of BRS which are under debate by earlier theoretical models.

  8. A readout circuit for wireless passive LC sensors and its application for gastrointestinal monitoring

    NASA Astrophysics Data System (ADS)

    Bao, Kaikai; Chen, Deyong; Shi, Qiang; Liu, Lijuan; Chen, Jian; Li, Jing; Wang, Junbo

    2014-08-01

    A readout circuit is presented for wireless passive LC sensors, where an inductor-capacitor (LC) resonant circuit was combined with a readout coil for resonant frequency detection. The impedance phase of the readout coil shows a ‘dip’ near the sensor’s resonant frequency due to the mutual inductance. Previously, the phase-dip has suffered from limited amplitude in the low-coupling-coefficient condition (especially in the case of implantation), rendering portable detection troublesome. To address this issue, in this study a new differential transduction circuit was proposed where both theoretical analysis and numerical simulations were performed. Compared to conventional transduction circuits (e.g., the I-V circuit and the auto-balancing bridge circuit), the differential circuit was more sensitive to the phase change, enabling more reliable and precise resonant frequency detection. Moreover, the proposed readout circuit was used to detect the gastrointestinal pressure of rabbits with a Ø10 mm × 14 mm LC pressure sensor at an operational distance of up to 60 mm between the LC sensor and the readout circuit. Experimental results recorded a measurement resolution lower than 0.4 kPa and a measurement speed of eight times per second.

  9. Silicon-On-Insulator (SOI) Devices and Mixed-Signal Circuits for Extreme Temperature Applications

    NASA Technical Reports Server (NTRS)

    Patterson, Richard; Hammoud, Ahmad; Elbuluk, Malik

    2008-01-01

    Electronic systems in planetary exploration missions and in aerospace applications are expected to encounter extreme temperatures and wide thermal swings in their operational environments. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of the missions. Electronic parts based on silicon-on-insulator (SOI) technology are known, based on device structure, to provide faster switching, consume less power, and offer better radiation-tolerance compared to their silicon counterparts. They also exhibit reduced current leakage and are often tailored for high temperature operation. However, little is known about their performance at low temperature. The performance of several SOI devices and mixed-signal circuits was determined under extreme temperatures, cold-restart, and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these devices for use in space exploration missions under extreme temperatures. The experimental results obtained on selected SOI devices are presented and discussed in this paper.

  10. Fully Programmable Ring-Resonator-Based Integrated Photonic Circuit for Phase Coherent Applications

    NASA Astrophysics Data System (ADS)

    Agarwal, Anjali; Toliver, Paul; Menendez, Ronald; Etemad, Shahab; Jackel, Janet; Young, Jeffrey; Banwell, Thomas; Little, B. E.; Chu, S. T.; Chen, Wei; Chen, Wenlu; Hryniewicz, J.; Johnson, F.; Gill, D.; King, O.; Davidson, R.; Donovan, K.; Delfyett, Peter J.

    2006-01-01

    A novel ring-resonator-based integrated photonic chip with ultrafine frequency resolution, providing programmable, stable, and accurate optical-phase control is demonstrated. The ability to manipulate the optical phase of the individual frequency components of a signal is a powerful tool for optical communications, signal processing, and RF photonics applications. As a demonstration of the power of these components, we report their use as programmable spectral-phase encoders (SPEs) and decoders for wavelength-division-multiplexing (WDM)-compatible optical code-division multiple access (OCDMA). Most important for the application here, the high resolution of these ring-resonator circuits makes possible the independent control of the optical phase of the individual tightly spaced frequency lines of a mode-locked laser (MLL). This unique approach allows us to limit the coded signal's spectral bandwidth, thereby allowing for high spectral efficiency (compared to other OCDMA systems) and compatibility with existing WDM systems with a rapidly reconfigurable set of codes. A four-user OCDMA system using polarization multiplexing is shown to operate at data rates of 2.5 Gb/s within a 40-GHz transparent optical window with a bit error rate (BER) better than 10-9 and a spectral efficiency of 25%.

  11. System-Level Integrated Circuit (SLIC) Technology Development for Phased Array Antenna Applications

    NASA Technical Reports Server (NTRS)

    Windyka, John A.; Zablocki, Ed G.

    1997-01-01

    This report documents the efforts and progress in developing a 'system-level' integrated circuit, or SLIC, for application in advanced phased array antenna systems. The SLIC combines radio-frequency (RF) microelectronics, digital and analog support circuitry, and photonic interfaces into a single micro-hybrid assembly. Together, these technologies provide not only the amplitude and phase control necessary for electronic beam steering in the phased array, but also add thermally-compensated automatic gain control, health and status feedback, bias regulation, and reduced interconnect complexity. All circuitry is integrated into a compact, multilayer structure configured for use as a two-by-four element phased array module, operating at 20 Gigahertz, using a Microwave High-Density Interconnect (MHDI) process. The resultant hardware is constructed without conventional wirebonds, maintains tight inter-element spacing, and leads toward low-cost mass production. The measured performances and development issues associated with both the two-by-four element module and the constituent elements are presented. Additionally, a section of the report describes alternative architectures and applications supported by the SLIC electronics. Test results show excellent yield and performance of RF circuitry and full automatic gain control for multiple, independent channels. Digital control function, while suffering from lower manufacturing yield, also proved successful.

  12. A low-noise 64-channel front-end readout ASIC for CdZnTe detectors aimed to hard X-ray imaging systems

    NASA Astrophysics Data System (ADS)

    Gan, B.; Wei, T.; Gao, W.; Liu, H.; Hu, Y.

    2016-04-01

    In this paper, we report on the recent development of a 64-channel low-noise front-end readout ASIC for CdZnTe detectors aimed to hard X-ray imaging systems. The readout channel is comprised of a charge sensitive amplifier, a leakage current compensation circuit, a CR-RC shaper, two S-K filters, an inverse proportional amplifier, a peak-detect-and-hold circuit, a discriminator and trigger logic, a time sequence control circuit and a driving buffer. The readout ASIC is implemented in TSMC 0.35 μm mixed-signal CMOS technology, the die size of the prototype chip is 2.7 mm×8.0 mm. The overall gain of the readout channel is 200 mV/fC, the power consumption is less than 8 mW/channel, the linearity error is less than 1%, the inconsistency among the channels is less than 2.86%, and the equivalent noise charge of a typical channel is 66 e- at zero farad plus 14 e- per picofarad. By connecting this readout ASIC to an 8×8 pixel CdZnTe detector, we obtained an energy spectrum, the energy resolution of which is 4.5% at the 59.5 keV line of 241Am source.

  13. Osthole, a herbal compound, alleviates nucleus pulposus-evoked nociceptive responses through the suppression of overexpression of acid-sensing ion channel 3 (ASIC3) in rat dorsal root ganglion

    PubMed Central

    He, Qiu-Lan; Chen, Yuling; Qin, Jian; Mo, Sui-Lin; Wei, Ming; Zhang, Jin-Jun; Li, Mei-Na; Zou, Xue-Nong; Zhou, Shu-Feng; Chen, Xiao-Wu; Sun, Lai-Bao

    2012-01-01

    Summary Background Osthole (Ost), a natural coumarin derivative, has been shown to inhibit many pro-inflammatory mediators and block voltage-gated Na+ channels. During inflammation, acidosis is an important pain inducer which activates nociceptors by gating depolarizing cationic channels, such as acid-sensing ion channel 3 (ASIC3). The aim of this study was to examine the effects of Ost on nucleus pulposus-evoked nociceptive responses and ASIC3 over-expression in the rat dorsal root ganglion, and to investigate the possible mechanism. Material/Methods Radicular pain was generated with application of nucleus pulposus (NP) to nerve root. Mechanical allodynia was evaluated using von Frey filaments with logarithmically incremental rigidity to calculate the 50% probability thresholds for mechanical paw withdrawal. ASIC3 protein expression in dorsal root ganglions (DRGs) was assessed with Western blot and immunohistochemistry. Membrane potential (MP) shift of DRG neurons induced by ASIC3-sensitive acid (pH6.5) was determined by DiBAC4 (3) fluorescence intensity (F.I.). Results The NP-evoked mechanical hyperalgesia model showed allodynia for 3 weeks, and ASIC3 expression was up-regulated in DRG neurons, reaching peak on Day 7. Epidural administration of Ost induced a remarkable and prolonged antinociceptive effect, accompanied by an inhibition of over-expressed ASIC3 protein and of abnormal shift of MP. Amiloride (Ami), an antagonist of ASIC3, strengthened the antinociceptive effect of Ost. Conclusions Up-regulation of ASIC3 expression may be associated with NP-evoked mechanical hyperalgesia. A single epidural injection of Ost decreased ASIC3 expression in DGR neurons and the pain in the NP-evoked mechanical hyperalgesia model. Osthole may be of great benefit for preventing chronic pain status often seen in lumbar disc herniation (LDH). PMID:22648244

  14. Wideband phase modulator works directly on carrier. [application of varactor compensated microwave circuit

    NASA Technical Reports Server (NTRS)

    Rippy, R. R.

    1975-01-01

    Multiplier-induced problems related to undesirable effects of the varactor multiplier on the modulation spectrum are eliminated in a modulator circuit which operates directly at the desired output frequency. The principles of operation of the new circuit are discussed and attention is given to requirements for high-Q components and the possibility of linear frequency deviation.

  15. Mathematical simulation application for research of nonuniform distributed-parameter circuit transients

    NASA Astrophysics Data System (ADS)

    Kuleshova, E. O.; Plyusnin, A. A.; Shandarova, E. B.; Tikhomirova, O. V.

    2016-04-01

    This paper considers the simulation capability of nonuniform distributed-parameter circuit transients by using MatLab Simulink. This approach is capable of determining currents and voltages of nodes for power networks of any configurations and modes. The paper contains results of nonuniform line simulations in idle, short-circuit and load modes.

  16. Acid-sensing ion channel (ASIC) 1a/2a heteromers have a flexible 2:1/1:2 stoichiometry.

    PubMed

    Bartoi, Tudor; Augustinowski, Katrin; Polleichtner, Georg; Gründer, Stefan; Ulbrich, Maximilian H

    2014-06-01

    Acid-sensing ion channels (ASICs) are widely expressed proton-gated Na(+) channels playing a role in tissue acidosis and pain. A trimeric composition of ASICs has been suggested by crystallization. Upon coexpression of ASIC1a and ASIC2a in Xenopus oocytes, we observed the formation of heteromers and their coexistence with homomers by electrophysiology, but could not determine whether heteromeric complexes have a fixed subunit stoichiometry or whether certain stoichiometries are preferred over others. We therefore imaged ASICs labeled with green and red fluorescent proteins on a single-molecule level, counted bleaching steps from GFP and colocalized them with red tandem tetrameric mCherry for many individual complexes. Combinatorial analysis suggests a model of random mixing of ASIC1a and ASIC2a subunits to yield both 2:1 and 1:2 ASIC1a:ASIC2a heteromers together with ASIC1a and ASIC2a homomers. PMID:24847067

  17. Low-noise low-power readout electronics circuit development in standard CMOS technology for 4 K applications

    NASA Astrophysics Data System (ADS)

    Merken, Patrick; Souverijns, Tim; Putzeys, Jan; Creten, Ybe; Van Hoof, Chris

    2006-06-01

    In the framework of the Photodetector Array Camera and Spectrometer (PACS) project IMEC designed the Cold Readout Electronics (CRE) for the Ge:Ga far-infrared detector array. Key specifications for this circuit were high linearity, low power consumption and low noise at an operating temperature of 4.2K. We have implemented this circuit in a standard CMOS technology which guarantees high yield and uniformity, and design portability. A drawback of this approach is the anomalous behavior of CMOS transistors at temperatures below 30-40K. These cryogenic phenomena disturb the normal functionality of commonly used circuits. We were able to overcome these problems and developed a library of digital and analog building blocks based on the modeling of cryogenic behavior, and on adapted design and layout techniques. We will present the design of the 18 channel CRE circuit, its interface with the Ge:Ga sensor, and its electrical performance. We will show how the library that was developed for PACS served as a baseline for the designs used in the Darwin-far-infrared detector array, where a cryogenic 180 channel, 30μm pitch, Readout Integrated Circuit (ROIC) for flip-chip integration was developed. Other designs and topologies for low noise and low power applications will be equally presented.

  18. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    NASA Astrophysics Data System (ADS)

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V‑1 sec‑1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  19. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

    PubMed

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  20. Energy and Timing Measurement with Time-Based Detector Readout for PET Applications: Principle and Validation with Discrete Circuit Components.

    PubMed

    Sun, Xishan; Lan, Allan K; Bircher, Chad; Deng, Zhi; Liu, Yinong; Shao, Yiping

    2011-06-11

    A new signal processing method for PET application has been developed, with discrete circuit components to measure energy and timing of a gamma interaction based solely on digital timing processing without using an amplitude-to-digital convertor (ADC) or a constant fraction discriminator (CFD). A single channel discrete component time-based readout (TBR) circuit was implemented in a PC board. Initial circuit functionality and performance evaluations have been conducted. Accuracy and linearity of signal amplitude measurement were excellent, as measured with test pulses. The measured timing accuracy from test pulses reached to less than 300 ps, a value limited mainly by the timing jitter of the prototype electronics circuit. Both suitable energy and coincidence timing resolutions (~18% and ~1.0 ns) have been achieved with 3 × 3 × 20 mm(3) LYSO scintillator and photomultiplier tube-based detectors. With its relatively simple circuit and low cost, TBR is expected to be a suitable front-end signal readout electronics for compact PET or other radiation detectors requiring the reading of a large number of detector channels and demanding high performance for energy and timing measurement. PMID:21743761

  1. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    PubMed Central

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  2. ASIC3 Channels Integrate Agmatine and Multiple Inflammatory Signals through the Nonproton Ligand Sensing Domain

    PubMed Central

    2010-01-01

    Background Acid-sensing ion channels (ASICs) have long been known to sense extracellular protons and contribute to sensory perception. Peripheral ASIC3 channels represent natural sensors of acidic and inflammatory pain. We recently reported the use of a synthetic compound, 2-guanidine-4-methylquinazoline (GMQ), to identify a novel nonproton sensing domain in the ASIC3 channel, and proposed that, based on its structural similarity with GMQ, the arginine metabolite agmatine (AGM) may be an endogenous nonproton ligand for ASIC3 channels. Results Here, we present further evidence for the physiological correlation between AGM and ASIC3. Among arginine metabolites, only AGM and its analog arcaine (ARC) activated ASIC3 channels at neutral pH in a sustained manner similar to GMQ. In addition to the homomeric ASIC3 channels, AGM also activated heteromeric ASIC3 plus ASIC1b channels, extending its potential physiological relevance. Importantly, the process of activation by AGM was highly sensitive to mild acidosis, hyperosmolarity, arachidonic acid (AA), lactic acid and reduced extracellular Ca2+. AGM-induced ASIC3 channel activation was not through the chelation of extracellular Ca2+ as occurs with increased lactate, but rather through a direct interaction with the newly identified nonproton ligand sensing domain. Finally, AGM cooperated with the multiple inflammatory signals to cause pain-related behaviors in an ASIC3-dependent manner. Conclusions Nonproton ligand sensing domain might represent a novel mechanism for activation or sensitization of ASIC3 channels underlying inflammatory pain-sensing under in vivo conditions. PMID:21143836

  3. Architecture of the multichannel data-driven ASIC

    NASA Astrophysics Data System (ADS)

    Normanov, D. D.; Atkin, E. V.

    2016-02-01

    The development architecture of a multichannel data-driven ASIC is presented. It provides the selection of useful events at an early stage of reading out detector signals. The architecture is based on fast cross-point switches of analog signals, followed by their digitization by a limited set of ADCs and high-speed output data serialization. Such approach reduces the number of subsequent ADCs as well as digital processing channels. That leads to lower power consumption and chip area. The results of a prototype ASIC development, based on this architecture and intended for the CBM experiment at FAIR, are given.

  4. The read-out ASIC for silicon drift detectors

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Ivanov, P.; Krivchenko, A.; Levin, V.; Gusev, A.; Malankin, E.; Normanov, D.; Rotin, A.; Sagdiev, I.; Shumikhin, V.

    2016-02-01

    The paper describes the read-out ASIC for silicon X-ray drift detectors. The ASIC has been designed in CMOS 0.35 μm technology and contains two read-out channels. Each channel includes a preamplifier and shaper. The preamplifier in the first channel has a built-in input transistor, the preamplifier in second channel works with an external JFET, which is built in the detector structure. Preamplifiers have been optimized for operation with detectors with capacitances of 100 fF. The 6-th order shaper has controllable time constants (0.5 - 8 μs).

  5. Design and application of planar inductor-capacitor resonant circuit remote query sensors

    NASA Astrophysics Data System (ADS)

    Ong, Keat Ghee

    The objective of this dissertation is to develop a new remote query sensor technology capable of monitoring different environmental parameters. The sensor presented here is an inductor-capacitor resonant circuit that can be remotely interrogated with a single or pair of antennas via inductance coupling between the sensor and antenna(s). This dissertation describes the operational principle of the sensor technology, mutual inductance coupling, and details a procedure for designing application-specific sensors. The LC sensor is shown to be capable of monitoring environmental parameters such as humidity and pressure, and capable of measuring the complex permittivity of adjacently located materials. The LC sensor has been used to monitor the curing of different epoxies, determine the salt concentration in a solution, and determine the complex permittivity of different live bacteria and yeast cultures. Inherent in the sensor operation is error due to the respective location and orientation between the sensor and antenna(s). Analytic, numerical, and experimental efforts have been used to quantify this error, establishing the operating limits of the technology. Finally this dissertation discusses the possibilities and problems of miniaturizing the sensor technology, and extending the sensor monitoring range as needed.

  6. Si-based light emitter in an integrated photonic circuit for smart biosensor applications

    NASA Astrophysics Data System (ADS)

    Germer, S.; Cherkouk, C.; Rebohle, L.; Helm, M.; Skorupa, W.

    2013-05-01

    The motivation for integrated Silicon-based optoelectronics is the creation of low-cost photonics for mass-market applications. Especially, the growing demand for sensitive biochemical sensors in the environmental control or medicine leads to the development of integrated high resolution sensors. Here we present initial results in the integration and butt-coupling of a Si-based light emitting device (LED) [1-3] to a waveguide into a photonic circuit. Our first approach deals with the design, fabrication and characterization of the dielectric high contrast waveguide as an important component, beside the LED, for the development of a Si-based biodetection system. In this work we demonstrate design examples of Si3N4/SiO2-waveguides, which were calculated using MATLAB, the effective index method (EIM) and the finite element method (FEM), with a 0.45μm thick and 0.7μm wide core which shows a high confinement factor of ~74% and coupling efficiency of ~66% at 1.55μm, respectively. The fabrication was done by plasma enhanced chemical vapour deposition (PECVD), optical lithography and reactive ion etching (RIE). Additionally, we characterized the deposited layers via ellipsometry and the etched structures by scanning electron microscopy (SEM). The obtained results establish principles for Si-based LED butt-coupling to a powerful optical waveguide-based interconnect with effective light absorption and an adequate coupling efficiency.

  7. Role of ASIC1 in the development of chronic hypoxia-induced pulmonary hypertension

    PubMed Central

    Nitta, Carlos H.; Osmond, David A.; Herbert, Lindsay M.; Beasley, Britta F.; Resta, Thomas C.; Walker, Benjimen R.

    2013-01-01

    Chronic hypoxia (CH) associated with respiratory disease results in elevated pulmonary vascular intracellular Ca2+ concentration, which elicits enhanced vasoconstriction and promotes vascular arterial remodeling and thus has important implications in the development of pulmonary hypertension (PH). Store-operated Ca2+ entry (SOCE) contributes to this elevated intracellular Ca2+ concentration and has also been linked to acute hypoxic pulmonary vasoconstriction (HPV). Since our laboratory has recently demonstrated an important role for acid-sensing ion channel 1 (ASIC1) in mediating SOCE, we hypothesized that ASIC1 contributes to both HPV and the development of CH-induced PH. To test this hypothesis, we examined responses to acute hypoxia in isolated lungs and assessed the effects of CH on indexes of PH, arterial remodeling, and vasoconstrictor reactivity in wild-type (ASIC1+/+) and ASIC1 knockout (ASIC1−/−) mice. Restoration of ASIC1 expression in pulmonary arterial smooth muscle cells from ASIC1−/− mice rescued SOCE, confirming the requirement for ASIC1 in this response. HPV responses were blunted in lungs from ASIC1−/− mice. Both SOCE and receptor-mediated Ca2+ entry, along with agonist-dependent vasoconstrictor responses, were diminished in small pulmonary arteries from control ASIC−/− mice compared with ASIC+/+ mice. The effects of CH to augment receptor-mediated vasoconstrictor and SOCE responses in vessels from ASIC1+/+ mice were not observed after CH in ASIC1−/− mice. In addition, ASIC1−/− mice exhibited diminished right ventricular systolic pressure, right ventricular hypertrophy, and arterial remodeling in response to CH compared with ASIC1+/+ mice. Taken together, these data demonstrate an important role for ASIC1 in both HPV and the development of CH-induced PH. PMID:24186095

  8. The eCDR-PLL, a radiation-tolerant ASIC for clock and data recovery and deterministic phase clock synthesis

    NASA Astrophysics Data System (ADS)

    Leitao, P.; Francisco, R.; Llopart, X.; Tavernier, F.; Baron, S.; Bonacini, S.; Moreira, P.

    2015-03-01

    A radiation-tolerant CDR/PLL ASIC has been developed for the upcoming LHC upgrades, featuring clock Frequency Multiplication (FM) and Clock and Data Recovery (CDR), showing deterministic phase and low jitter. Two FM modes have been implemented: either generating 40, 60, 120 and 240 MHz clock outputs for GBT-FPGA applications or providing 40, 80, 160 and 320 MHz clocks for TTC and e-link applications. The CDR operates with 40, 80, 160 or 320 Mbit/s data rates while always generating clocks at 40, 80, 160 and 320 MHz, regardless of the data rate. All the outputs are phase programmable with a resolution of 195 ps or 260 ps, depending on the selected mode. The ASIC has been designed using radiation-tolerant techniques in a 130 nm CMOS technology and operates at a 1.2 V supply voltage.

  9. Application of circuit simulation method for differential modeling of TIM-2 iron uptake and metabolism in mouse kidney cells.

    PubMed

    Xie, Zhijian; Harrison, Scott H; Torti, Suzy V; Torti, Frank M; Han, Jian

    2013-01-01

    Circuit simulation is a powerful methodology to generate differential mathematical models. Due to its highly accurate modeling capability, circuit simulation can be used to investigate interactions between the parts and processes of a cellular system. Circuit simulation has become a core technology for the field of electrical engineering, but its application in biology has not yet been fully realized. As a case study for evaluating the more advanced features of a circuit simulation tool called Advanced Design System (ADS), we collected and modeled laboratory data for iron metabolism in mouse kidney cells for a H ferritin (HFt) receptor, T cell immunoglobulin and mucin domain-2 (TIM-2). The internal controlling parameters of TIM-2 associated iron metabolism were extracted and the ratios of iron movement among cellular compartments were quantified by ADS. The differential model processed by circuit simulation demonstrated a capability to identify variables and predict outcomes that could not be readily measured by in vitro experiments. For example, an initial rate of uptake of iron-loaded HFt (Fe-HFt) was 2.17 pmol per million cells. TIM-2 binding probability with Fe-HFt was 16.6%. An average of 8.5 min was required for the complex of TIM-2 and Fe-HFt to form an endosome. The endosome containing HFt lasted roughly 2 h. At the end of endocytosis, about 28% HFt remained intact and the rest was degraded. Iron released from degraded HFt was in the labile iron pool (LIP) and stimulated the generation of endogenous HFt for new storage. Both experimental data and the model showed that TIM-2 was not involved in the process of iron export. The extracted internal controlling parameters successfully captured the complexity of TIM-2 pathway and the use of circuit simulation-based modeling across a wider range of cellular systems is the next step for validating the significance and utility of this method. PMID:23761763

  10. Linear integrated circuits

    NASA Astrophysics Data System (ADS)

    Young, T.

    This book is intended to be used as a textbook in a one-semester course at a variety of levels. Because of self-study features incorporated, it may also be used by practicing electronic engineers as a formal and thorough introduction to the subject. The distinction between linear and digital integrated circuits is discussed, taking into account digital and linear signal characteristics, linear and digital integrated circuit characteristics, the definitions for linear and digital circuits, applications of digital and linear integrated circuits, aspects of fabrication, packaging, and classification and numbering. Operational amplifiers are considered along with linear integrated circuit (LIC) power requirements and power supplies, voltage and current regulators, linear amplifiers, linear integrated circuit oscillators, wave-shaping circuits, active filters, DA and AD converters, demodulators, comparators, instrument amplifiers, current difference amplifiers, analog circuits and devices, and aspects of troubleshooting.

  11. Triple-Error-Correcting Codec ASIC

    NASA Technical Reports Server (NTRS)

    Jones, Robert E.; Segallis, Greg P.; Boyd, Robert

    1994-01-01

    Coder/decoder constructed on single integrated-circuit chip. Handles data in variety of formats at rates up to 300 Mbps, correcting up to 3 errors per data block of 256 to 512 bits. Helps reduce cost of transmitting data. Useful in many high-data-rate, bandwidth-limited communication systems such as; personal communication networks, cellular telephone networks, satellite communication systems, high-speed computing networks, broadcasting, and high-reliability data-communication links.

  12. PMGA and its application in area and power optimization for ternary FPRM circuit

    NASA Astrophysics Data System (ADS)

    Pengjun, Wang; Kangping, Li; Huihong, Zhang

    2016-01-01

    Based on the research of population migration algorithms (PMAs), a population migration genetic algorithm (PMGA) is proposed, combining a PMA with a genetic algorithm. A scheme of area and power optimization for a ternary FPRM circuit is proposed by using the PMGA. Firstly, according to the ternary FPRM logic function expression, area and power estimation models are established. Secondly, the PMGA is used to search for the best area and power polarity. Finally, 10 MCNC Benchmark circuits are used to verify the effectiveness of the proposed method. The results show that the ternary FPRM circuits optimized by the PMGA saved 13.33% area and 20.00% power on average than the corresponding FPRM circuits optimized by a whole annealing genetic algorithm. Project supported by the Natural Science Foundation of Zhejiang Province (No. LY13F040003), the National Natural Science Foundation of China (Nos. 61234002, 61306041), and the K. C. Wong Magna Fund in Ningbo University.

  13. Acid-sensing ion channel (ASIC) 4 predominantly localizes to an early endosome-related organelle upon heterologous expression

    PubMed Central

    Schwartz, Verena; Friedrich, Katharina; Polleichtner, Georg; Gründer, Stefan

    2015-01-01

    Acid-sensing ion channels (ASICs) are voltage-independent proton-gated amiloride sensitive sodium channels, belonging to the DEG/ENaC gene family. Six different ASICs have been identified (ASIC1a, ASIC1b, ASIC2a, ASIC2b, ASIC3, ASIC4) that are activated by a drop in extracellular pH, either as homo- or heteromers. An exception is ASIC4, which is not activated by protons as a homomer and which does not contribute to functional heteromeric ASICs. Insensitivity of ASIC4 to protons and its comparatively low sequence identity to other ASICs (45%) raises the question whether ASIC4 may have different functions than other ASICs. In this study, we therefore investigated the subcellular localization of ASIC4 in heterologous cell lines, which revealed a surprising accumulation of the channel in early endosome-related vacuoles. Moreover, we identified an unique amino-terminal motif as important for forward-trafficking from the ER/Golgi to the early endosome-related compartment. Collectively, our results show that heterologously expressed ASIC4 predominantly resides in an intracellular endosomal compartment. PMID:26667795

  14. ASIC2 Subunits Target Acid-Sensing Ion Channels to the Synapse via an Association with PSD-95

    PubMed Central

    Zha, Xiang-ming; Costa, Vivian; Harding, Anne Marie S.; Reznikov, Leah; Benson, Christopher J.; Welsh, Michael J.

    2009-01-01

    Acid-sensing ion channel-1a (ASIC1a) mediates H+-gated current to influence normal brain physiology and impact several models of disease. Although ASIC2 subunits are widely expressed in brain and modulate ASIC1a current, their function remains poorly understood. We identified ASIC2a in dendrites, dendritic spines, and brain synaptosomes. This localization largely relied on ASIC2a binding to PSD-95 and matched that of ASIC1a, which does not co-immunoprecipitate with PSD-95. We found that ASIC2 and ASIC1a associated in brain, and through its interaction with PSD-95, ASIC2 increased ASIC1a localization in dendritic spines. Consistent with earlier work showing that acidic pH elevated spine [Ca2+]i by activating ASIC1a, loss of ASIC2 decreased the percentage of spines responding to acid. Moreover, like a reduction of ASIC1a, the number of spine synapses fell in ASIC2-/- neurons. These results indicate that ASIC2 facilitates ASIC1a localization and function in dendritic spines and suggest that the two subunits work in concert to regulate neuronal function. PMID:19571134

  15. Acid-sensing ion channel (ASIC) 4 predominantly localizes to an early endosome-related organelle upon heterologous expression.

    PubMed

    Schwartz, Verena; Friedrich, Katharina; Polleichtner, Georg; Gründer, Stefan

    2015-01-01

    Acid-sensing ion channels (ASICs) are voltage-independent proton-gated amiloride sensitive sodium channels, belonging to the DEG/ENaC gene family. Six different ASICs have been identified (ASIC1a, ASIC1b, ASIC2a, ASIC2b, ASIC3, ASIC4) that are activated by a drop in extracellular pH, either as homo- or heteromers. An exception is ASIC4, which is not activated by protons as a homomer and which does not contribute to functional heteromeric ASICs. Insensitivity of ASIC4 to protons and its comparatively low sequence identity to other ASICs (45%) raises the question whether ASIC4 may have different functions than other ASICs. In this study, we therefore investigated the subcellular localization of ASIC4 in heterologous cell lines, which revealed a surprising accumulation of the channel in early endosome-related vacuoles. Moreover, we identified an unique amino-terminal motif as important for forward-trafficking from the ER/Golgi to the early endosome-related compartment. Collectively, our results show that heterologously expressed ASIC4 predominantly resides in an intracellular endosomal compartment. PMID:26667795

  16. ENaCs and ASICs as therapeutic targets

    PubMed Central

    Qadri, Yawar J.; Rooj, Arun K.

    2012-01-01

    The epithelial Na+ channel (ENaC) and acid-sensitive ion channel (ASIC) branches of the ENaC/degenerin superfamily of cation channels have drawn increasing attention as potential therapeutic targets in a variety of diseases and conditions. Originally thought to be solely expressed in fluid absorptive epithelia and in neurons, it has become apparent that members of this family exhibit nearly ubiquitous expression. Therapeutic opportunities range from hypertension, due to the role of ENaC in maintaining whole body salt and water homeostasis, to anxiety disorders and pain associated with ASIC activity. As a physiologist intrigued by the fundamental mechanics of salt and water transport, it was natural that Dale Benos, to whom this series of reviews is dedicated, should have been at the forefront of research into the amiloride-sensitive sodium channel. The cloning of ENaC and subsequently the ASIC channels has revealed a far wider role for this channel family than was previously imagined. In this review, we will discuss the known and potential roles of ENaC and ASIC subunits in the wide variety of pathologies in which these channels have been implicated. Some of these, such as the role of ENaC in Liddle's syndrome are well established, others less so; however, all are related in that the fundamental defect is due to inappropriate channel activity. PMID:22277752

  17. Evidence for the involvement of ASIC3 in sensory mechanotransduction in proprioceptors.

    PubMed

    Lin, Shing-Hong; Cheng, Yuan-Ren; Banks, Robert W; Min, Ming-Yuan; Bewick, Guy S; Chen, Chih-Cheng

    2016-01-01

    Acid-sensing ion channel 3 (ASIC3) is involved in acid nociception, but its possible role in neurosensory mechanotransduction is disputed. We report here the generation of Asic3-knockout/eGFPf-knockin mice and subsequent characterization of heterogeneous expression of ASIC3 in the dorsal root ganglion (DRG). ASIC3 is expressed in parvalbumin (Pv+) proprioceptor axons innervating muscle spindles. We further generate a floxed allele of Asic3 (Asic3(f/f)) and probe the role of ASIC3 in mechanotransduction in neurite-bearing Pv+ DRG neurons through localized elastic matrix movements and electrophysiology. Targeted knockout of Asic3 disrupts spindle afferent sensitivity to dynamic stimuli and impairs mechanotransduction in Pv+ DRG neurons because of substrate deformation-induced neurite stretching, but not to direct neurite indentation. In behavioural tasks, global knockout (Asic3(-/-)) and Pv-Cre::Asic3(f/f) mice produce similar deficits in grid and balance beam walking tasks. We conclude that, at least in mouse, ASIC3 is a molecular determinant contributing to dynamic mechanosensitivity in proprioceptors. PMID:27161260

  18. Evidence for the involvement of ASIC3 in sensory mechanotransduction in proprioceptors

    PubMed Central

    Lin, Shing-Hong; Cheng, Yuan-Ren; Banks, Robert W.; Min, Ming-Yuan; Bewick, Guy S.; Chen, Chih-Cheng

    2016-01-01

    Acid-sensing ion channel 3 (ASIC3) is involved in acid nociception, but its possible role in neurosensory mechanotransduction is disputed. We report here the generation of Asic3-knockout/eGFPf-knockin mice and subsequent characterization of heterogeneous expression of ASIC3 in the dorsal root ganglion (DRG). ASIC3 is expressed in parvalbumin (Pv+) proprioceptor axons innervating muscle spindles. We further generate a floxed allele of Asic3 (Asic3f/f) and probe the role of ASIC3 in mechanotransduction in neurite-bearing Pv+ DRG neurons through localized elastic matrix movements and electrophysiology. Targeted knockout of Asic3 disrupts spindle afferent sensitivity to dynamic stimuli and impairs mechanotransduction in Pv+ DRG neurons because of substrate deformation-induced neurite stretching, but not to direct neurite indentation. In behavioural tasks, global knockout (Asic3−/−) and Pv-Cre::Asic3f/f mice produce similar deficits in grid and balance beam walking tasks. We conclude that, at least in mouse, ASIC3 is a molecular determinant contributing to dynamic mechanosensitivity in proprioceptors. PMID:27161260

  19. Performance of a Low Noise Front-end ASIC for Si/CdTe Detectors in Compton Gamma-ray Telescope

    SciTech Connect

    Tajima, H

    2004-03-29

    Compton telescopes based on semiconductor technologies are being developed to explore the gamma-ray universe in an energy band 0.1-20 MeV, which is not well covered by the present or near-future gamma-ray telescopes. The key feature of such Compton telescopes is the high energy resolution that is crucial for high angular resolution and high background rejection capability. The energy resolution around 1 keV is required to approach physical limit of the angular resolution due to Doppler broadening. We have developed a low noise front-end ASIC (Application-Specific Integrated Circuit), VA32TA, to realize this goal for the readout of Double-sided Silicon Strip Detector (DSSD) and Cadmium Telluride (CdTe) pixel detector which are essential elements of the semiconductor Compton telescope. We report on the design and test results of the VA32TA. We have reached an energy resolution of 1.3 keV (FWHM) for 60 keV and 122 keV at 0 C with a DSSD and 1.7 keV (FWHM) with a CdTe detector.

  20. Novel Asymmetric Tunnel Source Transistors for Energy Efficient Circuits and Mixed Signal Applications

    NASA Astrophysics Data System (ADS)

    Jhaveri, Ritesh Atul

    Over the history of integrated circuits, a gargantuan increase in speed and performance has been achieved due to the trend of scaling. In recent years, however, many daunting challenges arise as we scale into sub-32nm regime. The building block of the MOSFET device, Silicon, is being pushed to its performance limitation. New materials and design methodologies are being investigated to extract better performance. In this study, we concentrate on two flavors of Novel Source Tunneling Transistors: the Schottky Tunnel Source FET and the Source Pocket band-to-band tunneling FET. Schottky barrier FETs have recently attracted attention as a viable alternative to conventional CMOS transistors for sub-32nm technology nodes. In this study, an asymmetric Schottky Tunnel Source SOI FET (STS-FET) has been proposed. The STS-FET has the source/drain regions replaced with metal/silicide as opposed to highly doped silicon in conventional devices. The main feature of this device is the injection of carriers through gate controlled Schottky barrier tunneling at the source. The optimized device structure shows improved performance as compared to conventional Schottky FETs. The analog performance of the STS-FET was studied and the device was found to be a superior alternative to conventional CMOS transistors. Various process modules were designed and developed. The STS-FET was then fabricated with NiSi technology and successfully demonstrated for 0.11mum gate lengths. The high immunity to short channel effects and the excellent analog performance of the device makes it an attractive candidate for continued scaling into sub 32nm node as well as mixed signal applications. Energy Efficiency is also an important concern for sub-32nm CMOS integrated circuits. Scaling of devices to below 32nm leads to an increase in active power dissipation (CVDD2.f) and off-state power (IOFF·VDD). Hence, new device innovations are being explored to address these problems. In this study, a novel source

  1. Three-dimensional stacked structured ASIC devices and methods of fabrication thereof

    SciTech Connect

    Shinde, Subhash L.; Teifel, John; Flores, Richard S.; Jarecki Jr., Robert L.; Bauer, Todd

    2015-11-19

    A 3D stacked sASIC is provided that includes a plurality of 2D reconfigurable structured structured ASIC (sASIC) levels interconnected through hard-wired arrays of 3D vias. The 2D sASIC levels may contain logic, memory, analog functions, and device input/output pad circuitry. During fabrication, these 2D sASIC levels are stacked on top of each other and fused together with 3D metal vias. Such 3D vias may be fabricated as through-silicon vias (TSVs). They may connect to the back-side of the 2D sASIC level, or they may be connected to top metal pads on the front-side of the 2D sASIC level.

  2. Measuring circuit

    DOEpatents

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  3. Measuring user similarity using electric circuit analysis: application to collaborative filtering.

    PubMed

    Yang, Joonhyuk; Kim, Jinwook; Kim, Wonjoon; Kim, Young Hwan

    2012-01-01

    We propose a new technique of measuring user similarity in collaborative filtering using electric circuit analysis. Electric circuit analysis is used to measure the potential differences between nodes on an electric circuit. In this paper, by applying this method to transaction networks comprising users and items, i.e., user-item matrix, and by using the full information about the relationship structure of users in the perspective of item adoption, we overcome the limitations of one-to-one similarity calculation approach, such as the Pearson correlation, Tanimoto coefficient, and Hamming distance, in collaborative filtering. We found that electric circuit analysis can be successfully incorporated into recommender systems and has the potential to significantly enhance predictability, especially when combined with user-based collaborative filtering. We also propose four types of hybrid algorithms that combine the Pearson correlation method and electric circuit analysis. One of the algorithms exceeds the performance of the traditional collaborative filtering by 37.5% at most. This work opens new opportunities for interdisciplinary research between physics and computer science and the development of new recommendation systems. PMID:23145095

  4. QIE10: a new front-end custom integrated circuit for high-rate experiments

    NASA Astrophysics Data System (ADS)

    Baumbaugh, A.; Dal Monte, L.; Drake, G.; Freeman, J.; Hare, D.; Hernandez Rojas, H.; Hughes, E.; Los, S.; Mendez Mendez, D.; Proudfoot, J.; Shaw, T.; Tully, C.; Vidal, R.; Whitmore, J.; Zimmerman, T.

    2014-01-01

    We present results on a new version of the QIE (Charge Integrator and Encoder), a custom Application Specific Integrated Circuit (ASIC) designed at Fermilab. Developed specifically for the measurement of charge from photo-detectors in high-rate environments, this most recent addition to the QIE family features 3 fC sensitivity, 17-bits of dynamic range with logarithmic response, a Time-to-Digital Converter (TDC) with sub-nanosecond resolution, and internal charge injection. The device is capable of dead-timeless operation at 40 MHz, making it ideal for calorimetry at the Large hadron Collider (LHC). We present bench measurements and integration studies that characterize the performance, radiation tolerance measurements, and plans for deployment in the Atlas and CMS detectors as part of the Phase 1 and Phase 2 upgrades.

  5. Module failure isolation circuit for paralleled inverters. [preventing system failure during power conditioning for spacecraft applications

    NASA Technical Reports Server (NTRS)

    Nagano, S. (Inventor)

    1979-01-01

    A module failure isolation circuit is described which senses and averages the collector current of each paralled inverter power transistor and compares the collector current of each power transistor the average collector current of all power transistors to determine when the sensed collector current of a power transistor in any one inverter falls below a predetermined ratio of the average collector current. The module associated with any transistor that fails to maintain a current level above the predetermined radio of the average collector current is then shut off. A separate circuit detects when there is no load, or a light load, to inhibit operation of the isolation circuit during no load or light load conditions.

  6. Decomposition of unitary matrices for finding quantum circuits: application to molecular Hamiltonians.

    PubMed

    Daskin, Anmer; Kais, Sabre

    2011-04-14

    Constructing appropriate unitary matrix operators for new quantum algorithms and finding the minimum cost gate sequences for the implementation of these unitary operators is of fundamental importance in the field of quantum information and quantum computation. Evolution of quantum circuits faces two major challenges: complex and huge search space and the high costs of simulating quantum circuits on classical computers. Here, we use the group leaders optimization algorithm to decompose a given unitary matrix into a proper-minimum cost quantum gate sequence. We test the method on the known decompositions of Toffoli gate, the amplification step of the Grover search algorithm, the quantum Fourier transform, and the sender part of the quantum teleportation. Using this procedure, we present the circuit designs for the simulation of the unitary propagators of the Hamiltonians for the hydrogen and the water molecules. The approach is general and can be applied to generate the sequence of quantum gates for larger molecular systems. PMID:21495747

  7. Threshold voltage control in dinaphthothienothiophene-based organic transistors by plasma treatment: Toward their application to logic circuits

    NASA Astrophysics Data System (ADS)

    Kitani, Asahi; Kimura, Yoshinari; Kitamura, Masatoshi; Arakawa, Yasuhiko

    2016-03-01

    The threshold voltage in p-channel organic thin-film transistors (TFTs) having dinaphthothienothiophene as a channel material has been investigated toward their applicability to logic circuits. Oxygen plasma treatment of the gate dielectric surface was carried out to control the threshold voltage. The threshold voltage changed in the range from -6.4 to 9.4 V, depending on plasma treatment time and the thickness of the gate dielectric. The surface charge after plasma treatment was estimated from the dependence of the threshold voltage. Operation of logic inverters consisting of TFTs with different threshold voltages was demonstrated as an application of TFTs with controlled threshold voltage.

  8. The application of standardized control and interface circuits to three dc to dc power converters.

    NASA Technical Reports Server (NTRS)

    Yu, Y.; Biess, J. J.; Schoenfeld, A. D.; Lalli, V. R.

    1973-01-01

    Standardized control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the series-switching buck regulator, and the pulse-modulated parallel inverter. The two-loop ASDTIC regulation control concept was implemented by using a common analog control signal processor and a novel digital control signal processor. This resulted in control circuit standardization and superior static and dynamic performance of the three dc-to-dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.

  9. Application of error correcting codes in fault-tolerant logic design for VLSI circuits

    NASA Astrophysics Data System (ADS)

    Lala, P. K.; Martin, H. L.

    1990-05-01

    It is now generally accepted that not all faults in VLSI logic can be represented by the stuck-at-0 and stuck-at-1 models used at the gate level. In order to ensure realistic modeling, faults should be considered at the transistor level, since only at the level the complete circuit structure is known. In other words, test for circuits should be derived based on possible shorts and opens at the transistor level. A stuck-open or stuck-closed transistor can be modeled by replacing the faulty transistor with an open connection or a direct short respectively between the transistor's source and drain.

  10. Evaluation and optimization of short channel ferroelectric MOSFET for low power circuit application with BSIM4 and Landau theory

    NASA Astrophysics Data System (ADS)

    Li, Yang; Lian, Yong; Yao, Kui; Samudra, Ganesh S.

    2015-12-01

    Based on BSIM4 parameters of 45 nm metal gate/high-k CMOS process and Landau theory, gate and output characteristics of short channel ferroelectric MOSFET (FeFET) are evaluated to explore its optimal structure for low power circuit application. Unlike previously reported simulation results of long channel FeFET, our work reveals that its current-voltage performance is quite susceptible to the parasitic capacitance between the gate and drain. As a consequence, there is a large threshold voltage increase with drain voltage and output characteristics hardly get saturated, indicating that short channel FeFET is not suitable for analog circuit applications. One effective way to address the issues is to minimize the gate-to-drain parasitic overlap and fringing field capacitances. With the tool Purdue Emerging Technology Evaluator, the inverter performance consisting of modified FeFETs is also simulated. Compared with intrinsic inverter, its energy consumption per cycle is much lower at any supply voltage VDD and the propagation delay is also smaller at very low VDD. Our work shows that the optimized FeFET structure, designed by mitigating gate-to-drain parasitic, is suitable for both analog and digital low power circuit designs.

  11. Photonic Integrated Circuit (PIC) Device Structures: Background, Fabrication Ecosystem, Relevance to Space Systems Applications, and Discussion of Related Radiation Effects

    NASA Technical Reports Server (NTRS)

    Alt, Shannon

    2016-01-01

    Electronic integrated circuits are considered one of the most significant technological advances of the 20th century, with demonstrated impact in their ability to incorporate successively higher numbers transistors and construct electronic devices onto a single CMOS chip. Photonic integrated circuits (PICs) exist as the optical analog to integrated circuits; however, in place of transistors, PICs consist of numerous scaled optical components, including such "building-block" structures as waveguides, MMIs, lasers, and optical ring resonators. The ability to construct electronic and photonic components on a single microsystems platform offers transformative potential for the development of technologies in fields including communications, biomedical device development, autonomous navigation, and chemical and atmospheric sensing. Developing on-chip systems that provide new avenues for integration and replacement of bulk optical and electro-optic components also reduces size, weight, power and cost (SWaP-C) limitations, which are important in the selection of instrumentation for specific flight projects. The number of applications currently emerging for complex photonics systems-particularly in data communications-warrants additional investigations when considering reliability for space systems development. This Body of Knowledge document seeks to provide an overview of existing integrated photonics architectures; the current state of design, development, and fabrication ecosystems in the United States and Europe; and potential space applications, with emphasis given to associated radiation effects and reliability.

  12. Acid Sensing Ion Channels (ASICs) in NS20Y cells - potential role in neuronal differentiation.

    PubMed

    O'Bryant, Zaven; Leng, Tiandong; Liu, Mingli; Inoue, Koichi; Vann, Kiara T; Xiong, Zhi-Gang

    2016-01-01

    Cultured neuronal cell lines can express properties of mature neurons if properly differentiated. Although the precise mechanisms underlying neuronal differentiation are not fully understood, the expression and activation of ion channels, particularly those of Ca(2+)-permeable channels, have been suggested to play a role. In this study, we explored the presence and characterized the properties of acid-sensing ion channels (ASICs) in NS20Y cells, a neuronal cell line previously used for the study of neuronal differentiation. In addition, the potential role of ASICs in cell differentiation was explored. Reverse Transcription Polymerase Chain Reaction and Western blot revealed the presence of ASIC1 subunits in these cells. Fast drops of extracellular pH activated transient inward currents which were blocked, in a dose dependent manner, by amiloride, a non-selective ASIC blocker, and by Psalmotoxin-1 (PcTX1), a specific inhibitor for homomeric ASIC1a and heteromeric ASIC1a/2b channels. Incubation of cells with PcTX1 significantly reduced the differentiation of NS20Y cells induced by cpt-cAMP, as evidenced by decreased neurite length, dendritic complexity, decreased expression of functional voltage gated Na(+) channels. Consistent with ASIC1a inhibition, ASIC1a knockdown with small interference RNA significantly attenuates cpt-cAMP-induced increase of neurite outgrowth. In summary, we described the presence of functional ASICs in NS20Y cells and demonstrate that ASIC1a plays a role in the differentiation of these cells. PMID:27342076

  13. Extracellular Spermine Exacerbates Ischemic Neuronal Injury through Sensitization of ASIC1a Channels to Extracellular Acidosis

    PubMed Central

    Duan, Bo; Wang, Yi-Zhi; Yang, Tao; Chu, Xiang-Ping; Yu, Ye; Huang, Yu; Cao, Hui; Hansen, Jillian; Simon, Roger P.; Zhu, Michael X.; Xiong, Zhi-Gang; Xu, Tian-Le

    2011-01-01

    Ischemic brain injury is a major problem associated with stroke. It has been increasingly recognized that acid-sensing ion channels (ASICs) contribute significantly to ischemic neuronal damage, but the underlying mechanism has remained elusive. Here, we show that extracellular spermine, one of the endogenous polyamines, exacerbates ischemic neuronal injury through sensitization of ASIC1a channels to extracellular acidosis. Pharmacological blockade of ASIC1a or deletion of the ASIC1 gene greatly reduces the enhancing effect of spermine in ischemic neuronal damage both in cultures of dissociated neurons and in a mouse model of focal ischemia. Mechanistically, spermine profoundly reduces desensitization of ASIC1a by slowing down desensitization in the open state, shifting steady-state desensitization to more acidic pH, and accelerating recovery between repeated periods of acid stimulation. Spermine-mediated potentiation of ASIC1a activity is occluded by PcTX1 (psalmotoxin 1), a specific ASIC1a inhibitor binding to its extracellular domain. Functionally, the enhanced channel activity is accompanied by increased acid-induced neuronal membrane depolarization and cytoplasmic Ca2+ overload, which may partially explain the exacerbated neuronal damage caused by spermine. More importantly, blocking endogenous spermine synthesis significantly attenuates ischemic brain injury mediated by ASIC1a but not that by NMDA receptors. Thus, extracellular spermine contributes significantly to ischemic neuronal injury through enhancing ASIC1a activity. Our data suggest new neuroprotective strategies for stroke patients via inhibition of polyamine synthesis and subsequent spermine–ASIC interaction. PMID:21307247

  14. Analysis of Wave Propagation in Stratified Structures Using Circuit Analogues, with Application to Electromagnetic Absorbers

    ERIC Educational Resources Information Center

    Sjoberg, Daniel

    2008-01-01

    This paper presents an overview of how circuit models can be used for analysing wave propagation in stratified structures. Relatively complex structures can be analysed using models which are accessible to undergraduate students. Homogeneous slabs are modelled as transmission lines, and thin sheets between the slabs are modelled as lumped…

  15. Design Implementation and Testing of a VLSI High Performance ASIC for Extracting the Phase of a Complex Signal

    NASA Astrophysics Data System (ADS)

    Altmeyer, Ronald C.

    2002-09-01

    This thesis documents the research, circuit design, and simulation testing of a VLSI (Very Large Scale Integration) ASIC which extracts phase angle information from a complex sampled signal using the arctangent relationship: (phi=tan/-1 (Q/1). Specifically, the circuit will convert the In-Phase and Quadrature terms into their corresponding phase angle. The design specifications were to implement the design in CMOS (Complementary Metal Oxide Semiconductors) technology with a minimum transistor count and ability to operate at a clock frequency of 700 MHz. Research on the arctangent function was performed to determine mathematical calculation methods and the CORDIC method was chosen to achieve the stated design specifications. MATLAB simulations were used to calculate and verify accuracy and to implement Quine-McClusky logic minimization. T-SPICE netlists were generated and simulations were run to determine transistor and circuit electrical operation and timing. Finally, overall circuit logic functionality of all possible input combinations was completed using a VHDL (VHSIC(Very High Speed Integrated Circuit) Hardware Description Language) simulation program.

  16. PACIFIC: A 64-channel ASIC for scintillating fiber tracking in LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Gascon, D.; Chanal, H.; Comerma, A.; Gomez, S.; Han, X.; Mazorra, J.; Mauricio, J.; Pillet, N.; Yengui, F.; Vandaele, R.

    2015-04-01

    The LHCb detector will be upgraded during the next LHC shutdown in 2018/19 [1]. The tracker system will have a major overhaul. Its components will be replaced with new technologies in order to cope with the increased hit occupancy and radiation environment. Here we describe a detector made of scintillating fibers read out by silicon photomultipliers (SiPM), with a view to its application for this upgrade. This technology has been shown to achieve high efficiency and spatial resolution, but its integration within a LHCb experiment presents new challenges. This article gives an overview of the R&D status of the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC) chip implemented in a 130 nm CMOS technology. The PACIFIC chip is a 64-channel ASIC which can be connected to a SiPM without the need of any external component. It includes analog signal processing and digitization. The first stage is a current conveyor followed by a tunable fast shaper (≈10 ns) and a gated integrator. The digitization is performed using a 3 threshold non-linear flash ADC operating at 40 MHz. The PACIFIC chip has the ability to cope with different SiPM suppliers with a power consumption below 8 mW per channel and it is radiation-tolerant. Lastly, simulation and test results show the proper read out of the SiPMs with the PACIFIC chip.

  17. Implementation of the Timepix ASIC in the Scalable Readout System

    NASA Astrophysics Data System (ADS)

    Lupberger, M.; Desch, K.; Kaminski, J.

    2016-09-01

    We report on the development of electronics hardware, FPGA firmware and software to provide a flexible multi-chip readout of the Timepix ASIC within the framework of the Scalable Readout System (SRS). The system features FPGA-based zero-suppression and the possibility to read out up to 4×8 chips with a single Front End Concentrator (FEC). By operating several FECs in parallel, in principle an arbitrary number of chips can be read out, exploiting the scaling features of SRS. Specifically, we tested the system with a setup consisting of 160 Timepix ASICs, operated as GridPix devices in a large TPC field cage in a 1 T magnetic field at a DESY test beam facility providing an electron beam of up to 6 GeV. We discuss the design choices, the dedicated hardware components, the FPGA firmware as well as the performance of the system in the test beam.

  18. Development of the read-out ASIC for muon chambers

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Bulbakov, I.; Gusev, A.; Malankin, E.; Normanov, D.; Sagdiev, I.; Shumikhin, V.; Shumkin, O.; Ivanov, P.; Vinogradov, S.; Voronin, A.; Samsonov, V.; Ivanov, V.

    2016-02-01

    A front-end prototype ASIC for muon chambers is presented. ASIC was designed and prototyped in the CMOS UMC MMRF 180 nm process via Europractice. The chip includes 8 analog processing channels, each consisting of a preamplifier, two shapers (fast and slow), differential comparator and an area efficient 6 bit SAR ADC with 1.2 mW power consumption at 50 Msps. The chip also includes the threshold DAC and digital serializer. The design has the following features: dynamic range of 100 fC, channel hit rate of 2 MHz, ENC of 1000 e- at 50 pF, power consumption of 10 mW per channel, 6 bit SAR ADC.

  19. ASIC1A in the bed nucleus of the stria terminalis mediates TMT-evoked freezing

    PubMed Central

    Taugher, Rebecca J.; Ghobbeh, Ali; Sowers, Levi P.; Fan, Rong; Wemmie, John A.

    2015-01-01

    Mice display an unconditioned freezing response to TMT, a predator odor isolated from fox feces. Here we found that in addition to freezing, TMT caused mice to decrease breathing rate, perhaps because of the aversive smell. Consistent with this possibility, olfactory bulb lesions attenuated this effect of TMT, as well as freezing. Interestingly, butyric acid, another foul odor, also caused mice to reduce breathing rate. However, unlike TMT, butyric acid did not induce freezing. Thus, although these aversive odors may affect breathing, the unpleasant smell and suppression of breathing by themselves are insufficient to cause freezing. Because the acid-sensing ion channel-1A (ASIC1A) has been previously implicated in TMT-evoked freezing, we tested whether Asic1a disruption also altered breathing. We found that TMT reduced breathing rate in both Asic1a+/+ and Asic1a−/− mice, suggesting that ASIC1A is not required for TMT to inhibit breathing and that the absence of TMT-evoked freezing in the Asic1a−/− mice is not due to an inability to detect TMT. These observations further indicate that ASIC1A must affect TMT freezing in another way. Because the bed nucleus of the stria terminalis (BNST) has been critically implicated in TMT-evoked freezing and robustly expresses ASIC1A, we tested whether ASIC1A in the BNST plays a role in TMT-evoked freezing. We disrupted ASIC1A in the BNST of Asic1aloxP/loxP mice by delivering Cre recombinase to the BNST with an adeno-associated virus (AAV) vector. We found that disrupting ASIC1A in the BNST reduced TMT-evoked freezing relative to control mice in which a virus expressing eGFP was injected. To test whether ASIC1A in the BNST was sufficient to increase TMT-evoked freezing, we used another AAV vector to express ASIC1A in the BNST of Asic1a−/− mice. We found region-restricted expression of ASIC1A in the BNST increased TMT-elicited freezing. Together, these data suggest that the BNST is a key site of ASIC1A action in TMT

  20. 17β-Estradiol Enhances ASIC Activity in Primary Sensory Neurons to Produce Sex Difference in Acidosis-Induced Nociception.

    PubMed

    Qu, Zu-Wei; Liu, Ting-Ting; Ren, Cuixia; Gan, Xiong; Qiu, Chun-Yu; Ren, Ping; Rao, Zhiguo; Hu, Wang-Ping

    2015-12-01

    Sex differences have been reported in a number of pain conditions. Women are more sensitive to most types of painful stimuli than men, and estrogen plays a key role in the sex differences in pain perception. However, it is unclear whether there is a sex difference in acidosis-evoked pain. We report here that both male and female rats exhibit nociceptive behaviors in response to acetic acid, with females being more sensitive than males. Local application of exogenous 17β-estradiol (E2) exacerbated acidosis-evoked nociceptive response in male rats. E2 and estrogen receptor (ER)-α agonist 1,3,5-Tris(4-hydroxyphenyl)-4-propyl-1H-pyrazole, but not ERβ agonist 2,3-bis(4-hydroxyphenyl)-propionitrile, replacement also reversed attenuation of the acetic acid-induced nociceptive response in ovariectomized females. Moreover, E2 can exert a rapid potentiating effect on the functional activity of acid-sensing ion channels (ASICs), which mediated the acidosis-induced events. E2 dose dependently increased the amplitude of ASIC currents with a 42.8 ± 1.6 nM of EC50. E2 shifted the concentration-response curve for proton upward with a 50.1% ± 6.2% increase of the maximal current response to proton. E2 potentiated ASIC currents via an ERα and ERK1/2 signaling pathway. E2 also altered acidosis-evoked membrane excitability of dorsal root ganglia neurons and caused a significant increase in the amplitude of the depolarization and the number of spikes induced by acidic stimuli. E2 potentiation of the functional activity of ASICs revealed a peripheral mechanism underlying this sex difference in acetic acid-induced nociception. PMID:26441237

  1. Ciliated neurons lining the central canal sense both fluid movement and pH through ASIC3.

    PubMed

    Jalalvand, Elham; Robertson, Brita; Wallén, Peter; Grillner, Sten

    2016-01-01

    Cerebrospinal fluid-contacting (CSF-c) cells are found in all vertebrates but their function has remained elusive. We recently identified one type of laterally projecting CSF-c cell in lamprey spinal cord with neuronal properties that expresses GABA and somatostatin. We show here that these CSF-c neurons respond to both mechanical stimulation and to lowered pH. These effects are most likely mediated by ASIC3-channels, since APETx2, a specific antagonist of ASIC3, blocks them both. Furthermore, lowering of pH as well as application of somatostatin will reduce the locomotor burst rate. The somatostatin receptor antagonist counteracts the effects of both a decrease in pH and of somatostatin. Lateral bending movement imposed on the spinal cord, as would occur during natural swimming, activates CSF-c neurons. Taken together, we show that CSF-c neurons act both as mechanoreceptors and as chemoreceptors through ASIC3 channels, and their action may protect against pH-changes resulting from excessive neuronal activity. PMID:26743691

  2. Design and characterization of the ePix10k: a high dynamic range integrating pixel ASIC for LCLS detectors

    NASA Astrophysics Data System (ADS)

    Caragiulo, P.; Dragone, A.; Markovic, B.; Herbst, R.; Nishimura, K.; Reese, B.; Herrmann, S.; Hart, P.; Blaj, G.; Segal, J.; Tomada, A.; Hasi, J.; Carini, G.; Kenney, C.; Haller, G.

    2015-05-01

    ePix10k is a variant of a novel class of integrating pixel ASICs architectures optimized for the processing of signals in second generation LINAC Coherent Light Source (LCLS) X-Ray cameras. The ASIC is optimized for high dynamic range application requiring high spatial resolution and fast frame rates. ePix ASICs are based on a common platform composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog to digital converters per column. The ePix10k variant has 100um×100um pixels arranged in a 176×192 matrix, a resolution of 140e- r.m.s. and a signal range of 3.5pC (10k photons at 8keV). In its final version it will be able to sustain a frame rate of 2kHz. A first prototype has been fabricated and characterized. Performance in terms of noise, linearity, uniformity, cross-talk, together with preliminary measurements with bump bonded sensors are reported here.

  3. Ciliated neurons lining the central canal sense both fluid movement and pH through ASIC3

    PubMed Central

    Jalalvand, Elham; Robertson, Brita; Wallén, Peter; Grillner, Sten

    2016-01-01

    Cerebrospinal fluid-contacting (CSF-c) cells are found in all vertebrates but their function has remained elusive. We recently identified one type of laterally projecting CSF-c cell in lamprey spinal cord with neuronal properties that expresses GABA and somatostatin. We show here that these CSF-c neurons respond to both mechanical stimulation and to lowered pH. These effects are most likely mediated by ASIC3-channels, since APETx2, a specific antagonist of ASIC3, blocks them both. Furthermore, lowering of pH as well as application of somatostatin will reduce the locomotor burst rate. The somatostatin receptor antagonist counteracts the effects of both a decrease in pH and of somatostatin. Lateral bending movement imposed on the spinal cord, as would occur during natural swimming, activates CSF-c neurons. Taken together, we show that CSF-c neurons act both as mechanoreceptors and as chemoreceptors through ASIC3 channels, and their action may protect against pH-changes resulting from excessive neuronal activity. PMID:26743691

  4. Acid-sensing ion channels (ASICs) 2 and 4.2 are expressed in the retina of the adult zebrafish.

    PubMed

    Viña, E; Parisi, V; Sánchez-Ramos, C; Cabo, R; Guerrera, M C; Quirós, L M; Germanà, A; Vega, J A; García-Suárez, O

    2015-05-01

    Acid-sensing ion channels (ASICs) are H(+)-gated, voltage-insensitive cation channels involved in synaptic transmission, mechanosensation and nociception. Different ASICs have been detected in the retina of mammals but it is not known whether they are expressed in adult zebrafish, a commonly used animal model to study the retina in both normal and pathological conditions. We study the expression and distribution of ASIC2 and ASIC4 in the retina of adult zebrafish and its regulation by light using PCR, in situ hybridization, western blot and immunohistochemistry. We detected mRNA encoding zASIC2 and zASIC4.2 but not zASIC4.1. ASIC2, at the mRNA or protein level, was detected in the outer nuclear layer, the outer plexiform layer, the inner plexiform layer, the retinal ganglion cell layer and the optic nerve. ASIC4 was expressed in the photoreceptors layer and to a lesser extent in the retinal ganglion cell layer. Furthermore, the expression of both ASIC2 and ASIC4.2 was down-regulated by light and darkness. These results are the first demonstration that ASIC2 and ASIC4 are expressed in the adult zebrafish retina and suggest that zebrafish could be used as a model organism for studying retinal pathologies involving ASICs. PMID:25585988

  5. Implementation of nanoscale circuits using dual metal gate engineered nanowire MOSFET with high-k dielectrics for low power applications

    NASA Astrophysics Data System (ADS)

    Charles Pravin, J.; Nirmal, D.; Prajoon, P.; Ajayan, J.

    2016-09-01

    This work covers the impact of dual metal gate engineered Junctionless MOSFET with various high-k dielectric in Nanoscale circuits for low power applications. Due to gate engineering in junctionless MOSFET, graded potential is obtained and results in higher electron velocity of about 31% for HfO2 than SiO2 in the channel region, which in turn improves the carrier transport efficiency. The simulation is done using sentaurus TCAD, ON current, OFF current, ION/IOFF ratio, DIBL, gain, transconductance and transconductance generation factor parameters are analysed. When using HfO2, DIBL shows a reduction of 61.5% over SiO2. The transconductance and transconductance generation factor shows an improvement of 44% and 35% respectively. The gain and output resistance also shows considerable improvement with high-k dielectrics. Using this device, inverter circuit is implemented with different high-k dielectric material and delay have been decreased by 4% with HfO2 when compared to SiO2. In addition, a significant reduction in power dissipation of the inverter circuit is obtained with high-k dielectric Dual Metal Surround Gate Junctionless Transistor than SiO2 based device. From the analysis, it is found that HfO2 will be a better alternative for the future nanoscale device.

  6. NUCLEON ASIC and ladder electronics for cosmic ray experiments

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Voronin, A.; Bulatov, V.; Dorokhov, V.; Karmanov, D.; Kovalev, I.; Kudryashov, I.; Podorozhniy, D.; Polkov, D.; Filippov, S.; Shumikhin, V.

    2015-04-01

    The 32-channels ASIC with a unique dynamic range from 1 to 40000 mips, signal to noise ratio not less than 2.5 at a shaper peaking time of 2 μ s and a low power consumption of 1.5 mW/channel has been designed. The transfer function of the charge sensitive amplifier (CSA), having two subranges of various gains, allowed to reach high dynamic range of the readout electronics. The subranges are automatically switched. Two ASICs were installed on a ladder construction which also contains an ADC, a microprocessor and a power supply. The ASIC and the ladder were created for the minicalorimeter of the NUCLEON experiment. The goal of the NUCLEON satellite mission is to measure the elemental (Z from 1 to 30) energy spectra of high-energy (1011-1015 eV) cosmic rays. The ladder has been tested at the SPS. The ladder can also be used for other future HEP and space cosmic ray experiments.

  7. JPIC-Rad-Hard JPEG2000 Image Compression ASIC

    NASA Astrophysics Data System (ADS)

    Zervas, Nikos; Ginosar, Ran; Broyde, Amitai; Alon, Dov

    2010-08-01

    JPIC is a rad-hard high-performance image compression ASIC for the aerospace market. JPIC implements tier 1 of the ISO/IEC 15444-1 JPEG2000 (a.k.a. J2K) image compression standard [1] as well as the post compression rate-distortion algorithm, which is part of tier 2 coding. A modular architecture enables employing a single JPIC or multiple coordinated JPIC units. JPIC is designed to support wide data sources of imager in optical, panchromatic and multi-spectral space and airborne sensors. JPIC has been developed as a collaboration of Alma Technologies S.A. (Greece), MBT/IAI Ltd (Israel) and Ramon Chips Ltd (Israel). MBT IAI defined the system architecture requirements and interfaces, The JPEG2K-E IP core from Alma implements the compression algorithm [2]. Ramon Chips adds SERDES interfaces and host interfaces and integrates the ASIC. MBT has demonstrated the full chip on an FPGA board and created system boards employing multiple JPIC units. The ASIC implementation, based on Ramon Chips' 180nm CMOS RadSafe[TM] RH cell library enables superior radiation hardness.

  8. Gating transitions in the palm domain of ASIC1a.

    PubMed

    Della Vecchia, Margaret C; Rued, Anna C; Carattino, Marcelo D

    2013-02-22

    Acid-sensing ion channels (ASICs) are trimeric cation-selective proton-gated ion channels expressed in the central and peripheral nervous systems. The pore-forming transmembrane helices in these channels are linked by short loops to the palm domain in the extracellular region. Here, we explore the contribution to proton gating and desensitization of Glu-79 and Glu-416 in the palm domain of ASIC1a. Engineered Cys, Lys, and Gln substitutions at these positions shifted apparent proton affinity toward more acidic values. Double mutant cycle analysis indicated that Glu-79 and Glu-416 cooperatively facilitated pore opening in response to extracellular acidification. Channels bearing Cys at position 79 or 416 were irreversibly modified by thiol-reactive reagents in a state-dependent manner. Glu-79 and Glu-416 are located in β-strands 1 and 12, respectively. The covalent modification by (2-(trimethylammonium)ethyl) methanethiosulfonate bromide of Cys at position 79 impacted conformational changes associated with pore closing during desensitization, whereas the modification of Cys at position 416 affected conformational changes associated with proton gating. These results suggest that β-strands 1 and 12 contribute antagonistically to activation and desensitization of ASIC1a. Site-directed mutagenesis experiments indicated that the lower palm domain contracts in response to extracellular acidification. Taken together, our studies suggest that the lower palm domain mediates conformational movements that drive pore opening and closing events. PMID:23300086

  9. Investigation on critical breakdown electric field of hot carbon dioxide for gas circuit breaker applications

    NASA Astrophysics Data System (ADS)

    Sun, Hao; Rong, Mingzhe; Wu, Yi; Chen, Zhexin; Yang, Fei; Murphy, Anthony B.; Zhang, Hantian

    2015-02-01

    Sulfur hexafluoride (SF6) gas is widely used in high-voltage circuit breakers, but due to its high global warming potential, substitutes are being sought. CO2 has been investigated as a candidate based on its arc interruption performance. The hot gas in the circuit breaker after current zero, with a complicated species composition caused by the dissociation and many other reactions, will lead to the electrical breakdown, which is one of the major concerns in assessing the arc interruption performance. Despite this, little research has been reported on the dielectric strength of hot CO2. In this paper, the dielectric properties of hot CO2 related to the dielectric recovery phase of the circuit breaker were investigated in the temperature range from 300 to 4000 K and in the pressure range from 0.01 to 1.0 MPa. Under the assumptions of local thermodynamic equilibrium (LTE) and local chemical equilibrium (LCE), the equilibrium compositions of hot CO2 were obtained based on Gibbs free energy minimization. The cross sections for interactions between electrons and the species are presented. The critical reduced electric field strength of CO2 was determined by balancing electron generation and loss. These were evaluated using the electron energy distribution function (EEDF) derived from the two-term Boltzmann transport equation. The result indicates that unlike SF6 or air, in hot CO2 the reduced critical electric field strength does not change monotonically with increasing heavy-particle temperature from 300 to 4000 K. CO2 has a superior dielectric strength to pure SF6 above 2500 K at 0.5 MPa, which means it has the potential to improve the interruption performance of the circuit breakers, while reducing the global warming effect. Good agreement was found with published experimental results and calculations for CO2 at room temperature, and with previous calculations for hot CO2.

  10. Preparation of graphite conductive paint and its application to the construction of RC circuits on paper

    NASA Astrophysics Data System (ADS)

    Grisales, C.; Herrera, N.; Fajardo, F.

    2016-09-01

    We describe a simple procedure for the preparation of graphite-based conductive paint and determine its basic transport properties when applied, comparing them to those of pencil strokes. Ohm’s law was fulfilled on the applied paint, which makes it an ideal strategy to teach the relations between a resistor’s length, width and resistance. The conductive paint was used in the construction of RC circuits on paper in a simple and didactic format. Using only the paint and a piece of cardboard, a completely functional parallel plate capacitor can be constructed with different plate geometries; in particular, we painted circular and rectangular plates. The charge and discharge cycles of the two RC circuits painted were observed in the oscilloscope. We obtained characteristic times and estimated the value of the dielectric constant of paper, which serves as a dielectric between the plates of the capacitors. We found conductive paint to be a useful and easy method to teach basic electricity and circuit concepts in fundamental courses and lab practices because it allows one to visualise properties such as the dependence of resistance and capacitance with geometric factors using a specific material.

  11. Clinical application of circuit training for subacute stroke patients: a preliminary study.

    PubMed

    Kim, Sun Mi; Han, Eun Young; Kim, Bo Ryun; Hyun, Chul Woong

    2016-01-01

    [Purpose] To investigate how task-oriented circuit training for the recovery motor control of the lower-extremity, balance and walking endurance could be clinically applied to subacute stroke inpatient group therapy. [Subjects and Methods] Twenty subacute stroke patients were randomly assigned to the intervention group (n=10) or the control group (n=10). The intervention consisted of a structured, progressive, inpatient circuit training program focused on mobility and gait training as well as physical fitness training that was performed for 90 minutes, 5 days a week for 4 weeks. The control group received individual physiotherapy of neurodevelopmental treatment for 60 minutes, 5 days a week for 4 weeks. Outcome measures were lower-extremity motor control, balance, gait endurance and activities of daily living before and after 4 weeks. [Results] There were no significant differences at baseline between the two groups. After 4 weeks, both groups showed significant improvements in all outcome measures, but there were no significant differences between the two groups during the invention period. [Conclusion] In spite of the small sample size, these findings suggest that task-oriented circuit training might be used as a cost-effective and alternative method of individual physiotherapy for the motor recovery of lower-extremity, balance and walking endurance of subacute stroke patients. PMID:26957751

  12. Clinical application of circuit training for subacute stroke patients: a preliminary study

    PubMed Central

    Kim, Sun Mi; Han, Eun Young; Kim, Bo Ryun; Hyun, Chul Woong

    2016-01-01

    [Purpose] To investigate how task-oriented circuit training for the recovery motor control of the lower-extremity, balance and walking endurance could be clinically applied to subacute stroke inpatient group therapy. [Subjects and Methods] Twenty subacute stroke patients were randomly assigned to the intervention group (n=10) or the control group (n=10). The intervention consisted of a structured, progressive, inpatient circuit training program focused on mobility and gait training as well as physical fitness training that was performed for 90 minutes, 5 days a week for 4 weeks. The control group received individual physiotherapy of neurodevelopmental treatment for 60 minutes, 5 days a week for 4 weeks. Outcome measures were lower-extremity motor control, balance, gait endurance and activities of daily living before and after 4 weeks. [Results] There were no significant differences at baseline between the two groups. After 4 weeks, both groups showed significant improvements in all outcome measures, but there were no significant differences between the two groups during the invention period. [Conclusion] In spite of the small sample size, these findings suggest that task-oriented circuit training might be used as a cost-effective and alternative method of individual physiotherapy for the motor recovery of lower-extremity, balance and walking endurance of subacute stroke patients. PMID:26957751

  13. Characterization of bandgap reference circuits designed for high energy physics applications

    NASA Astrophysics Data System (ADS)

    Traversi, G.; De Canio, F.; Gaioni, L.; Manghisoni, M.; Mattiazzo, S.; Ratti, L.; Re, V.; Riceputi, E.

    2016-07-01

    The objective of this work is to design a high performance bandgap voltage reference circuit in a standard commercial 65 nm CMOS technology capable of operating in harsh radiation environments. A prototype circuit based on three different devices (diode, bipolar transistor and MOSFET) was fabricated and tested. Measurement results show a temperature variation as low as ±3.4 mV over a temperature range of 170 ° C (-30 °C to 140 °C) and a line regulation at room temperature of 5.2%/V. Measured VREF is 690 mV±15 mV (3σ) for 26 samples on the same wafer. Circuits correctly operate with supply voltages in the range from 1.32 V down to 0.78 V. A reference voltage shift of only 7.6 mV (around 1.1%) was measured after irradiation with 10 keV X-rays up to an integrated dose of 225 Mrad (SiO2).

  14. The Effect of Hydrophobic Monoamines on Acid-Sensing Ion Channels ASIC1B

    PubMed Central

    Nagaeva, E. I.; Potapieva, N. N.; Tikhonov, D. B.

    2015-01-01

    Acid-sensing ion channels (ASICs) are widely distributed in both the central and peripheral nervous systems of vertebrates. The pharmacology of these receptors remains poorly investigated, while the search for new ASIC modulators is very important. Recently, we found that some monoamines, which are blockers of NMDA receptors, inhibit and/or potentiate acid-sensing ion channels, depending on the subunit composition of the channels. The effect of 9-aminoacridine, IEM-1921, IEM-2117, and memantine both on native receptors and on recombinant ASIC1a, ASIC2a, and ASIC3 homomers was studied. In the present study, we have investigated the effect of these four compounds on homomeric ASIC1b channels. Experiments were performed on recombinant receptors expressed in CHO cells using the whole-cell patch clamp technique. Only two compounds, 9-aminoacridine and memantine, inhibited ASIC1b channels. IEM-1921 and IEM-2117 were inactive even at a 1000 μM concentration. In most aspects, the effect of the compounds on ASIC1b was similar to their effect on ASIC1a. The distinguishing feature of homomeric ASIC1b channels is a steep activation-dependence, indicating cooperative activation by protons. In our experiments, the curve of the concentration dependence of ASIC1b inhibition by 9-aminoacridine also had a slope (Hill coefficient) of 3.8, unlike ASIC1a homomers, for which the Hill coefficient was close to 1. This finding indicates that the inhibitory effect of 9-aminoacridine is associated with changes in the activation properties of acid-sensing ion channels. PMID:26085950

  15. Application of the leak-before-break concept to the primary circuit piping of the Leningrad NPP

    SciTech Connect

    Eperin, A.P.; Zakharzhevsky, Yu.O.; Arzhaev, A.I.

    1997-04-01

    A two-year Finnish-Russian cooperation program has been initiated in 1995 to demonstrate the applicability of the leak-before-break concept (LBB) to the primary circuit piping of the Leningrad NPP. The program includes J-R curve testing of authentic pipe materials at full operating temperature, screening and computational LBB analyses complying with the USNRC Standard Review Plan 3.6.3, and exchange of LBB-related information with emphasis on NDE. Domestic computer codes are mainly used, and all tests and analyses are independently carried out by each party. The results are believed to apply generally to RBMK type plants of the first generation.

  16. New Generation Power System for Space Applications

    NASA Technical Reports Server (NTRS)

    Jones, Loren; Carr, Greg; Deligiannis, Frank; Lam, Barbara; Nelson, Ron; Pantaleon, Jose; Ruiz, Ian; Treicler, John; Wester, Gene; Sauers, Jim; Giampoli, Paul; Haskell, Russ; Mulvey, Jim; Repp, John

    2004-01-01

    The Deep Space Avionics (DSA) Project is developing a new generation of power system building blocks. Using application specific integrated circuits (ASICs) and power switching modules a scalable power system can be constructed for use on multiple deep space missions including future missions to Mars, comets, Jupiter and its moons. The key developments of the DSA power system effort are five power ASICs and a mod ule for power switching. These components enable a modular and scalab le design approach, which can result in a wide variety of power syste m architectures to meet diverse mission requirements and environments . Each component is radiation hardened to one megarad) total dose. The power switching module can be used for power distribution to regular spacecraft loads, to propulsion valves and actuation of pyrotechnic devices. The number of switching elements per load, pyrotechnic firin gs and valve drivers can be scaled depending on mission needs. Teleme try data is available from the switch module via an I2C data bus. The DSA power system components enable power management and distribution for a variety of power buses and power system architectures employing different types of energy storage and power sources. This paper will describe each power ASIC#s key performance characteristics as well a s recent prototype test results. The power switching module test results will be discussed and will demonstrate its versatility as a multip urpose switch. Finally, the combination of these components will illu strate some of the possible power system architectures achievable fro m small single string systems to large fully redundant systems.

  17. Methods of fabricating applique circuits

    DOEpatents

    Dimos, Duane B.; Garino, Terry J.

    1999-09-14

    Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

  18. Amiloride suppresses pilocarpine-induced seizures via ASICs other than NHE in rats

    PubMed Central

    Liang, Jing-Jing; Huang, Li-Fang; Chen, Xu-Ming; Pan, Song-Qing; Lu, Zu-Neng; Xiao, Zhe-Man

    2015-01-01

    Background and Purpose: Although recent studies have indicated that acid-sensing ion channels (ASICs) may play an important role in suppressing status epilepticus (SE) in rats, the precise mechanism is unclear. We attempted to investigate the antiepileptic effect of amiloride in SE rats and its mechanism. Methods: Rats with seizures induced by Li-pilocarpine were randomly divided into four groups, phosphate buffer saline (PBS) group, amiloride group, levetiracetam group and acidic liquid group, respectively. The electroencephalogram (EEG) of each group was recorded. Then rats treated with different drugs (2 h after amiloride or PBS injection or 1 h after PBS injection) and a normal control group was selected for reverse transcription-polymerase chain reaction (RT-PCR). The expression of ASIC1a, ASIC3 and sodium-hydrogen exchanger (NHE) in each group was detected. Results: Amiloride reduced the frequency of discharge in 60~90 min after injection significantly. In acidic liquid group, the epileptic discharge was increased in 0~30 min. Moreover, the expression of ASIC1a, ASIC3 and NHE was obviously increased in the SE groups. Compared with SE groups, the expression of ASIC1a and ASIC3 mRNA in amiloride group decreased significantly. While NHE mRNA expression in the SE groups showed no significant difference. Conclusion: Amiloride inhibited pilocarpine-induced SE and the anti-epileptic mechanism was associated with deactivation of the ASIC1a and ASIC3 instead of NHE in rats. PMID:26823770

  19. Acid-sensing ion channel 2 (asic 2) and trkb interrelationships within the intervertebral disc

    PubMed Central

    Cuesta, Antonio; Viña, Eliseo; Cabo, Roberto; Vázquez, Gorka; Cobo, Ramón; García-Suárez, Olivia; García-Cosamalón, José; Vega, José A

    2015-01-01

    The cells of the intervertebral disc (IVD) have an unusual acidic and hyperosmotic microenvironment. They express acid-sensing ion channels (ASICs), gated by extracellular protons and mechanical forces, as well as neurotrophins and their signalling receptors. In the nervous tissues some neurotrophins regulate the expression of ASICs. The expression of ASIC2 and TrkB in human normal and degenerated IVD was assessed using quantitative-PCR, Western blot, and immunohistochemistry. Moreover, we investigated immunohistochemically the expression of ASIC2 in the IVD of TrkB-deficient mice. ASIC2 and TrkB mRNAs were found in normal human IVD and both increased significantly in degenerated IVD. ASIC2 and TrkB proteins were also found co-localized in a variable percentage of cells, being significantly higher in degenerated IVD than in controls. The murine IVD displayed ASIC2 immunoreactivity which was absent in the IVD of TrkB-deficient mice. Present results demonstrate the occurrence of ASIC2 and TrkB in the human IVD, and the increased expression of both in pathological IVD suggest their involvement in IVD degeneration. These data also suggest that TrkB-ligands might be involved in the regulation of ASIC2 expression, and therefore in mechanisms by which the IVD cells accommodate to low pH and hypertonicity. PMID:26617738

  20. Identification of a novel protein complex containing ASIC1a and GABAA receptors and their interregulation.

    PubMed

    Zhao, Dongbo; Ning, Nannan; Lei, Zhen; Sun, Hua; Wei, Chuanfei; Chen, Dawei; Li, Jingxin

    2014-01-01

    Acid-sensing ion channels (ASICs) belong to the family of the epithelial sodium channel/degenerin (ENaC/DEG) and are activated by extracellular protons. They are widely distributed within both the central and peripheral nervous systems. ASICs were modified by the activation of γ-aminobutyric acid receptors (GABAA), a ligand-gated chloride channels, in hippocampal neurons. In contrast, the activity of GABAA receptors were also modulated by extracellular pH. However so far, the mechanisms underlying this intermodulation remain obscure. We hypothesized that these two receptors-GABAA receptors and ASICs channels might form a novel protein complex and functionally interact with each other. In the study reported here, we found that ASICs were modified by the activation of GABAA receptors either in HEK293 cells following transient co-transfection of GABAA and ASIC1a or in primary cultured dorsal root ganglia (DRG) neurons. Conversely, activation of ASIC1a also modifies the GABAA receptor-channel kinetics. Immunoassays showed that both GABAA and ASIC1a proteins were co-immunoprecipitated mutually either in HEK293 cells co-transfected with GABAA and ASIC1a or in primary cultured DRG neurons. Our results indicate that putative GABAA and ASIC1a channels functionally interact with each other, possibly via an inter-molecular association by forming a novel protein complex. PMID:24923912

  1. Hardware implementation of Lorenz circuit systems for secure chaotic communication applications.

    PubMed

    Chen, Hsin-Chieh; Liau, Ben-Yi; Hou, Yi-You

    2013-01-01

    This paper presents the synchronization between the master and slave Lorenz chaotic systems by slide mode controller (SMC)-based technique. A proportional-integral (PI) switching surface is proposed to simplify the task of assigning the performance of the closed-loop error system in sliding mode. Then, extending the concept of equivalent control and using some basic electronic components, a secure communication system is constructed. Experimental results show the feasibility of synchronizing two Lorenz circuits via the proposed SMC.  PMID:23429512

  2. Development of Carbon Nanotube Resonant-Circuit Sensors for Gas Sensing Applications

    NASA Astrophysics Data System (ADS)

    Chopra, S.; Pham, A.; Gaillard, J.; Rao, A. M.

    2002-03-01

    We present the design and development of highly sensitive and ultra-fast responsive electromagnetic resonant sensors for monitoring the presence of ammonia gas. The sensor consists of a circular disk electromagnetic resonant circuit coated with single and multi-walled carbon nanotubes (SWNT &MWNT) that are highly sensitive to adsorbed gas molecules. Upon exposure to ammonia, the electrical resonant frequency of the sensor exhibits a dramatic shift of 4.375 MHz. The recovery and response time of these sensors is ~15 minutes. This technology is suitable for designing remote sensors to monitor gases inside sealed opaque packages and environmental conditions that do not allow physical wire connections.

  3. The application of a polypyrrole precoat for the metallization of printed circuit boards

    SciTech Connect

    Gottesfeld, S.; Uribe, F.A.; Armes, P. )

    1992-01-01

    This paper describes a printed circuit board metallization process starting with the formation of a percent of polypyrrole (PPY) on the board, followed by the direct electrodeposition of copper onto the polypyrrole-coated substrate. The polypyrrole film is applied to the insulating substrate by a single chemical polymerization step from an aqueous solution. The sheet resistance of the polypyrrole precoat is typically of the order of a few hundred {Omega}/{open square} which is a sufficiently low resistance to enable direct metal electrodeposition onto the PPY-coated substrate.

  4. Numerical solution of stiff systems of ordinary differential equations with applications to electronic circuits

    NASA Technical Reports Server (NTRS)

    Rosenbaum, J. S.

    1971-01-01

    Systems of ordinary differential equations in which the magnitudes of the eigenvalues (or time constants) vary greatly are commonly called stiff. Such systems of equations arise in nuclear reactor kinetics, the flow of chemically reacting gas, dynamics, control theory, circuit analysis and other fields. The research reported develops an A-stable numerical integration technique for solving stiff systems of ordinary differential equations. The method, which is called the generalized trapezoidal rule, is a modification of the trapezoidal rule. However, the method is computationally more efficient than the trapezoidal rule when the solution of the almost-discontinuous segments is being calculated.

  5. ASIC3 deficiency increases inflammation but decreases pain behavior in arthritis

    PubMed Central

    Sluka, Kathleen A.; Rasmussen, Lynn A.; Edgar, Meghan M.; O’Donnell, James M.; Walder, RoxanneY.; Kolker, Sandra J.; Boyle, David L; Firestein, Gary S.

    2013-01-01

    Objective Through its location on nociceptors, acid sensing ion channel 3 (ASIC3) is activated by decreases in pH and plays a significant role in musculoskeletal pain. We recently showed that decreases in pH activate ASIC3 located on fibroblast-like synoviocytes (FLS). Since FLS are key cells in the inflammatory process we tested if ASIC3-deficient mice with arthritis have altered inflammation and pain relative to controls. Methods Arthritis was induced by injection of a cocktail of anti-type II collagen antibodies induced collagen antibodyarthritis (CAIA). Inflammation and pain parameters in ASIC3−/− and ASIC3+/+ mice were assessed. Disease severity was measured with clinical arthritis scores, joint diameters, histological analysis of joints, and qPCR for synovial gene expression. Pain behaviors were measured by examining withdrawal thresholds of the joint and paw and by measuring physical activity levels in mice. Cell death was assessed with a Live/Dead assay in FLS in response to decreases in pH. Results Surprisingly, ASIC3−/− mice with CAIA demonstrated significantly increased joint inflammation, joint destruction and expression of IL-6, MMP-3 and MMP-13 in joint tissue compared to ASIC3+/+ mice. ASIC3+/+ FLS show enhanced cell death when exposed to pH 6.0 in the presence of interleukin-1β that is abolished in ASIC3−/− FLS. Despite enhanced disease severity, ASIC3−/− mice do not develop mechanical hypersensitivity of the paw and show greater levels of physical activity. Conclusion These data are consistent with the hypothesis that ASIC3 plays a protective role in inflammatory arthritis conditions by limiting inflammation through enhanced synoviocyte cell death to reduce disease severity and produce pain to reduce joint use. PMID:23335302

  6. ADDER CIRCUIT

    DOEpatents

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  7. Scalable Sensor Data Processor: A Multi-Core Payload Data Processor ASIC

    NASA Astrophysics Data System (ADS)

    Berrojo, L.; Moreno, R.; Regada, R.; Garcia, E.; Trautner, R.; Rauwerda, G.; Sunesen, K.; He, Y.; Redant, S.; Thys, G.; Andersson, J.; Habinc, S.

    2015-09-01

    The Scalable Sensor Data Processor (SSDP) project, under ESA contract and with TAS-E as prime contractor, targets the development of a multi-core ASIC for payload data processing to be used, among other terrestrial and space application areas, in future scientific and exploration missions with harsh radiation environments. The SSDP is a mixed-signal heterogeneous multi-core System-on-Chip (SoC). It combines GPP and NoC-based DSP subsystems with on-chip ADCs and several standard space I/Fs to make a flexible, configurable and scalable device. The NoC comprises two state-of-the-art fixed point Xentium® DSP processors, providing the device with high data processing capabilities.

  8. Application of Printed Circuit Board Technology to FT-ICR MS Analyzer Cell Construction and Prototyping

    SciTech Connect

    Leach, Franklin E.; Norheim, Randolph V.; Anderson, Gordon A.; Pasa-Tolic, Ljiljana

    2014-12-01

    Although Fourier transform ion cyclotron resonance mass spectrometry (FT-ICRMS) remains themass spectrometry platform that provides the highest levels of performance for mass accuracy and resolving power, there is room for improvement in analyzer cell design as the ideal quadrupolar trapping potential has yet to be generated for a broadband MS experiment. To this end, analyzer cell designs have improved since the field’s inception, yet few research groups participate in this area because of the high cost of instrumentation efforts. As a step towards reducing this barrier to participation and allowing for more designs to be physically tested, we introduce a method of FT-ICR analyzer cell prototyping utilizing printed circuit boards at modest vacuum conditions. This method allows for inexpensive devices to be readily fabricated and tested over short intervals and should open the field to laboratories lacking or unable to access high performance machine shop facilities because of the required financial investment.

  9. Application of Printed Circuit Board Technology to FT-ICR MS Analyzer Cell Construction and Prototyping

    NASA Astrophysics Data System (ADS)

    Leach, Franklin E.; Norheim, Randolph; Anderson, Gordon; Pasa-Tolic, Ljiljana

    2014-12-01

    Although Fourier transform ion cyclotron resonance mass spectrometry (FT-ICR MS) remains the mass spectrometry platform that provides the highest levels of performance for mass accuracy and resolving power, there is room for improvement in analyzer cell design as the ideal quadrupolar trapping potential has yet to be generated for a broadband MS experiment. To this end, analyzer cell designs have improved since the field's inception, yet few research groups participate in this area because of the high cost of instrumentation efforts. As a step towards reducing this barrier to participation and allowing for more designs to be physically tested, we introduce a method of FT-ICR analyzer cell prototyping utilizing printed circuit boards at modest vacuum conditions. This method allows for inexpensive devices to be readily fabricated and tested over short intervals and should open the field to laboratories lacking or unable to access high performance machine shop facilities because of the required financial investment.

  10. VeloPix: the pixel ASIC for the LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Poikela, T.; De Gaspari, M.; Plosila, J.; Westerlund, T.; Ballabriga, R.; Buytaert, J.; Campbell, M.; Llopart, X.; Wyllie, K.; Gromov, V.; van Beuzekom, M.; Zivkovic, V.

    2015-01-01

    The LHCb Vertex Detector (VELO) will be upgraded in 2018 along with the other subsystems of LHCb in order to enable full readout at 40 MHz, with the data fed directly to the software triggering algorithms. The upgraded VELO is a lightweight hybrid pixel detector operating in vacuum in close proximity to the LHC beams. The readout will be provided by a dedicated front-end ASIC, dubbed VeloPix, matched to the LHCb readout requirements and the 55 × 55 μm VELO pixel dimensions. The chip is closely related to the Timepix3, from the Medipix family of ASICs. The principal challenge that the chip has to meet is a hit rate of up to 900 Mhits/s, resulting in a required output bandwidth of more than 16 Gbit/s. The occupancy across the chip is also very non-uniform, and the radiation levels reach an integrated 400 Mrad over the lifetime of the detector.VeloPix is a binary pixel readout chip with a data driven readout, designed in 130 nm CMOS technology. The pixels are combined into groups of 2 × 4 super pixels, enabling a shared logic and a reduction of bandwidth due to combined address and time stamp information. The pixel hits are combined with other simultaneous hits in the same super pixel, time stamped, and immediately driven off-chip. The analog front-end must be sufficiently fast to accurately time stamp the data, with a small enough dead time to minimize data loss in the most occupied regions of the chip. The data is driven off chip with a custom designed high speed serialiser. The current status of the ASIC design, the chip architecture and the simulations will be described.

  11. ASIC-dependent LTP at multiple glutamatergic synapses in amygdala network is required for fear memory

    PubMed Central

    Chiang, Po-Han; Chien, Ta-Chun; Chen, Chih-Cheng; Yanagawa, Yuchio; Lien, Cheng-Chang

    2015-01-01

    Genetic variants in the human ortholog of acid-sensing ion channel-1a subunit (ASIC1a) gene are associated with panic disorder and amygdala dysfunction. Both fear learning and activity-induced long-term potentiation (LTP) of cortico-basolateral amygdala (BLA) synapses are impaired in ASIC1a-null mice, suggesting a critical role of ASICs in fear memory formation. In this study, we found that ASICs were differentially expressed within the amygdala neuronal population, and the extent of LTP at various glutamatergic synapses correlated with the level of ASIC expression in postsynaptic neurons. Importantly, selective deletion of ASIC1a in GABAergic cells, including amygdala output neurons, eliminated LTP in these cells and reduced fear learning to the same extent as that found when ASIC1a was selectively abolished in BLA glutamatergic neurons. Thus, fear learning requires ASIC-dependent LTP at multiple amygdala synapses, including both cortico-BLA input synapses and intra-amygdala synapses on output neurons. PMID:25988357

  12. ASIC3 Is Required for Development of Fatigue-Induced Hyperalgesia.

    PubMed

    Gregory, Nicholas S; Brito, Renan G; Fusaro, Maria Cláudia G Oliveira; Sluka, Kathleen A

    2016-03-01

    An acute bout of exercise can exacerbate pain, hindering participation in regular exercise and daily activities. The mechanisms underlying pain in response to acute exercise are poorly understood. We hypothesized that proton accumulation during muscle fatigue activates acid-sensing ion channel 3 (ASIC3) on muscle nociceptors to produce hyperalgesia. We investigated the role of ASIC3 using genetic and pharmacological approaches in a model of fatigue-enhanced hyperalgesia. This model uses two injections of pH 5.0 saline into muscle in combination with an electrically induced fatigue of the same muscle just prior to the second injection of acid to induce mechanical hyperalgesia. We show a significant decrease in muscle force and decrease in muscle pH after 6 min of electrical stimulation. Genetic deletion of ASIC3 using knockout mice and pharmacological blockade of ASIC3 with APETx2 in muscle prevents the fatigue-enhanced hyperalgesia. However, ASIC3(-/-) mice and APETx2 have no effect on the fatigue response. Genetic deletion of ASIC3 in primary afferents innervating muscle using an HSV-1 expressing microRNA (miRNA) to ASIC3 surprisingly had no effect on the development of the hyperalgesia. Muscle fatigue increased the number of macrophages in muscle, and removal of macrophages from muscle with clodronate liposomes prevented the development of fatigue-enhanced hyperalgesia. Thus, these data suggest that fatigue reduces pH in muscle that subsequently activates ASIC3 on macrophages to enhance hyperalgesia to muscle insult. PMID:25577172

  13. A technique for evaluating the application of the pin-level stuck-at fault model to VLSI circuits

    NASA Technical Reports Server (NTRS)

    Palumbo, Daniel L.; Finelli, George B.

    1987-01-01

    Accurate fault models are required to conduct the experiments defined in validation methodologies for highly reliable fault-tolerant computers (e.g., computers with a probability of failure of 10 to the -9 for a 10-hour mission). Described is a technique by which a researcher can evaluate the capability of the pin-level stuck-at fault model to simulate true error behavior symptoms in very large scale integrated (VLSI) digital circuits. The technique is based on a statistical comparison of the error behavior resulting from faults applied at the pin-level of and internal to a VLSI circuit. As an example of an application of the technique, the error behavior of a microprocessor simulation subjected to internal stuck-at faults is compared with the error behavior which results from pin-level stuck-at faults. The error behavior is characterized by the time between errors and the duration of errors. Based on this example data, the pin-level stuck-at fault model is found to deliver less than ideal performance. However, with respect to the class of faults which cause a system crash, the pin-level, stuck-at fault model is found to provide a good modeling capability.

  14. Towards Practical Application of Paper based Printed Circuits: Capillarity Effectively Enhances Conductivity of the Thermoplastic Electrically Conductive Adhesives

    NASA Astrophysics Data System (ADS)

    Wu, Haoyi; Chiang, Sum Wai; Lin, Wei; Yang, Cheng; Li, Zhuo; Liu, Jingping; Cui, Xiaoya; Kang, Feiyu; Wong, Ching Ping

    2014-09-01

    Direct printing nanoparticle-based conductive inks onto paper substrates has encountered difficulties e.g. the nanoparticles are prone to penetrate into the pores of the paper and become partially segmented, and the necessary low-temperature-sintering process is harmful to the dimension-stability of paper. Here we prototyped the paper-based circuit substrate in combination with printed thermoplastic electrically conductive adhesives (ECA), which takes the advantage of the capillarity of paper and thus both the conductivity and mechanical robustness of the printed circuitsweredrastically improved without sintering process. For instance, the electrical resistivity of the ECA specimen on a pulp paper (6 × 10-5Ω.cm, with 50 wt% loading of Ag) was only 14% of that on PET film than that on PET film. This improvement has been found directly related to the sizing degree of paper, in agreement with the effective medium approximation simulation results in this work. The thermoplastic nature also enables excellent mechanical strength of the printed ECA to resist repeated folding. Considering the generality of the process and the wide acceptance of ECA technique in the modern electronic packages, this method may find vast applications in e.g. circuit boards, capacitive touch pads, and radio frequency identification antennas, which have been prototyped in the manuscript.

  15. Towards Practical Application of Paper based Printed Circuits: Capillarity Effectively Enhances Conductivity of the Thermoplastic Electrically Conductive Adhesives

    PubMed Central

    Wu, Haoyi; Chiang, Sum Wai; Lin, Wei; Yang, Cheng; Li, Zhuo; Liu, Jingping; Cui, Xiaoya; Kang, Feiyu; Wong, Ching Ping

    2014-01-01

    Direct printing nanoparticle-based conductive inks onto paper substrates has encountered difficulties e.g. the nanoparticles are prone to penetrate into the pores of the paper and become partially segmented, and the necessary low-temperature-sintering process is harmful to the dimension-stability of paper. Here we prototyped the paper-based circuit substrate in combination with printed thermoplastic electrically conductive adhesives (ECA), which takes the advantage of the capillarity of paper and thus both the conductivity and mechanical robustness of the printed circuitsweredrastically improved without sintering process. For instance, the electrical resistivity of the ECA specimen on a pulp paper (6 × 10−5Ω·cm, with 50 wt% loading of Ag) was only 14% of that on PET film than that on PET film. This improvement has been found directly related to the sizing degree of paper, in agreement with the effective medium approximation simulation results in this work. The thermoplastic nature also enables excellent mechanical strength of the printed ECA to resist repeated folding. Considering the generality of the process and the wide acceptance of ECA technique in the modern electronic packages, this method may find vast applications in e.g. circuit boards, capacitive touch pads, and radio frequency identification antennas, which have been prototyped in the manuscript. PMID:25182052

  16. The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    NASA Astrophysics Data System (ADS)

    Kluge, A.; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    2013-12-01

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300 μm2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms.

  17. Single event effect hardness for the front-end ASICs in the DAMPE satellite BGO calorimeter

    NASA Astrophysics Data System (ADS)

    Gao, Shan-Shan; Jiang, Di; Feng, Chang-Qing; Xi, Kai; Liu, Shu-Bin; An, Qi

    2016-01-01

    The Dark Matter Particle Explorer (DAMPE) is a Chinese scientific satellite designed for cosmic ray studies with a primary scientific goal of indirect detection of dark matter particles. As a crucial sub-detector, the BGO calorimeter measures the energy spectrum of cosmic rays in the energy range from 5 GeV to 10 TeV. In order to implement high-density front-end electronics (FEE) with the ability to measure 1848 signals from 616 photomultiplier tubes on the strictly constrained satellite platform, two kinds of 32-channel front-end ASICs, VA160 and VATA160, are customized. However, a space mission period of more than 3 years makes single event effects (SEEs) become threats to reliability. In order to evaluate SEE sensitivities of these chips and verify the effectiveness of mitigation methods, a series of laser-induced and heavy ion-induced SEE tests were performed. Benefiting from the single event latch-up (SEL) protection circuit for power supply, the triple module redundancy (TMR) technology for the configuration registers and the optimized sequential design for the data acquisition process, 52 VA160 chips and 32 VATA160 chips have been applied in the flight model of the BGO calorimeter with radiation hardness assurance. Supported by Strategic Priority Research Program on Space Science of the Chinese Academy of Sciences (XDA04040202-4) and Fundamental Research Funds for the Central Universities (WK2030040048)

  18. A 15 GSa/s, 1.5 GHz bandwidth waveform digitizing ASIC

    NASA Astrophysics Data System (ADS)

    Oberla, Eric; Genat, Jean-Francois; Grabas, Hervé; Frisch, Henry; Nishimura, Kurtis; Varner, Gary

    2014-01-01

    The PSEC4 custom integrated circuit was designed for the recording of fast waveforms for use in large-area time-of-flight detector systems. The ASIC has been fabricated using the IBM-8RF 0.13 μm CMOS process. On each of the six analog channels, PSEC4 employs a switched capacitor array (SCA) of 256 samples deep, a ramp-compare ADC with 10.5 bits of DC dynamic range, and a serial data readout with the capability of region-of-interest windowing to reduce dead time. The sampling rate can be adjusted between 4 and 15 Gigasamples/second (GSa/s) on all channels and is servo-controlled on-chip with a low-jitter delay-locked loop (DLL). The input signals are passively coupled on-chip with a -3 dB analog bandwidth of 1.5 GHz. The power consumption in quiescent sampling mode is less than 50 mW/chip; at a sustained trigger and a readout rate of 50 kHz the chip draws 100 mW. After fixed-pattern pedestal subtraction, the uncorrected integral non-linearity is 0.15% over a 750 mV dynamic range. With a linearity correction, a full 1 V signal voltage range is available. The sampling timebase has a fixed-pattern non-linearity with an RMS of 13%, which can be corrected for precision waveform feature extraction and timing.

  19. Alteration of ASIC1 expression in clear cell renal cell carcinoma

    PubMed Central

    Li, Yan; Xu, Guoxiong; Huang, Kai; Wang, Jun; Zhang, Jihong; Liu, Jikai; Wang, Zhanyu; Chen, Gang

    2015-01-01

    Background Acidic extracellular pH is a major feature of tumor tissue. Acid-sensing ion channels (ASICs) represent an H+-gated subgroup of the degenerin/epithelial Na+ channel family and are activated by acidic microenvironment. Little is known about the expression and clinical significance of ASICs in solid tumors. The purpose of this study was to examine the expression of ASIC1 in human clear cell renal cell carcinoma (CCRCC) and to determine if the expression of ASIC1 is associated with clinicopathological features. Methods The expression of ASIC1 in CCRCC tissues at the mRNA and protein levels was determined by real-time quantitative polymerase chain reaction and Western blot analysis, respectively. A tissue microarray was used to assess the expression of ASIC1 protein in tumor tissue and matched adjacent normal tissues from 75 patients with CCRCC. Results ASIC1 expression was detected in normal renal and CCRCC samples. The expressions of ASIC1 protein and mRNA were significantly decreased in the CCRCC tissues compared with matched normal renal tissues (P<0.05). The staining density measurement showed that the expression of ASIC1 was significantly decreased in stage I (P=0.037), stage II (P=0.026), and stage III (P=0.026), grades I–II CCRCC (P=0.004), and CCRCC from male patients (P=0.00002). However, no significant difference was observed for ASIC1 expression between CCRCC and normal tissue in patients with stage IV CCRCC (P=0.236), patients with grades III–IV CCRCC (P=0.314), and female patients (P=0.095). Spearman correlations demonstrated that ASIC1 expression did not correlate to tumor stage (correlation coefficient [CC =0.168], P=0.149) and the age of patients (CC −0.147, P=0.688) but showed a positive correlation to higher tumor grades (CC =0.270, P=0.018). Conclusion ASIC1 is downregulated in CCRCC. ASIC1 expression may be potentially used as a novel biomarker and even a CCRCC therapeutic target. Further efforts will be made to clarify the

  20. Acid-sensing ion channel (ASIC) 4 gene: physical mapping, genomic organisation, and evaluation as a candidate for paroxysmal dystonia.

    PubMed

    Gründer, S; Geisler, H S; Rainier, S; Fink, J K

    2001-09-01

    Acid-sensing ion channels (ASICs) are protongated Na(+) channels. They have been implicated with synaptic transmission, pain perception as well as mechanoperception. ASIC4 is the most recent member of this gene family. It shows expression throughout the central nervous system with strongest expression in pituitary gland. ASIC4 is inactive by itself and its function is unknown. Mutations in ion channel subunits, which are homologues of ASICs lead to neurodegeneration in Caenorhabditis elegans. It has, therefore, been speculated that similar mutations in ASICs may be responsible for neurodegeneration in humans. Here, we show that ASIC4 maps to the long arm of chromosome 2 in close proximity to the locus for paroxysmal dystonic choreoathetosis (PDC), a movement disorder with unknown cause. Ion channel genes have been shown to cause several other paroxysmal neurologic disorders and are important candidate genes for PDC. We established the genomic organisation of the ASIC4 gene and screened a PDC pedigree for mutations in the coding region. Although we identified three polymorphisms in the Cterminal part of the ASIC4 protein, these were not present in each affected subject in the PDC kindred we analysed. Therefore, although the ASIC4 gene is physically mapped to the PDC locus, our data indicates that ASIC4 gene mutation is not the cause of PDC. It remains to be established if mutations in ASIC4 or other ASIC subunits may cause neurological disorders. PMID:11571555

  1. The Human Acid-Sensing Ion Channel ASIC1a: Evidence for a Homotetrameric Assembly State at the Cell Surface

    PubMed Central

    Gautschi, Ivan; Schild, Laurent

    2015-01-01

    The chicken acid-sensing ion channel ASIC1 has been crystallized as a homotrimer. We address here the oligomeric state of the functional ASIC1 in situ at the cell surface. The oligomeric states of functional ASIC1a and mutants with additional cysteines introduced in the extracellular pore vestibule were resolved on SDS-PAGE. The functional ASIC1 complexes were stabilized at the cell surface of Xenopus laevis oocytes or CHO cells either using the sulfhydryl crosslinker BMOE, or sodium tetrathionate (NaTT). Under these different crosslinking conditions ASIC1a migrates as four distinct oligomeric states that correspond by mass to multiples of a single ASIC1a subunit. The relative importance of each of the four ASIC1a oligomers was critically dependent on the availability of cysteines in the transmembrane domain for crosslinking, consistent with the presence of ASIC1a homo-oligomers. The expression of ASIC1a monomers, trimeric or tetrameric concatemeric cDNA constructs resulted in functional channels. The resulting ASIC1a complexes are resolved as a predominant tetramer over the other oligomeric forms, after stabilization with BMOE or NaTT and SDS-PAGE/western blot analysis. Our data identify a major ASIC1a homotetramer at the surface membrane of the cell expressing functional ASIC1a channel. PMID:26252376

  2. Restrictive Expression of Acid-Sensing Ion Channel 5 (Asic5) in Unipolar Brush Cells of the Vestibulocerebellum

    PubMed Central

    Wang, Bin; Stockand, James D.

    2014-01-01

    Acid-sensing ion channels (Asic) are ligand-gated ion channels in the Degenerin/Epithelial Na+ channel (Deg/ENaC) family. Asic proteins are richly expressed in mammalian neurons. Mammals express five Asic genes: Asic1-5. The gene product of Asic5 is an orphan member of the family about which little is known. To investigate Asic5 expression, we created an Asic5 reporter mouse. We find that Asic5 is chiefly expressed in the brain in the cerebellum, specifically in the ventral uvula and nodulus of the vestibulocerebellum. Here, Asic5 is restrictively expressed in a subset of interneurons in the granular layer. The locale, distinctive shape and immunohistochemical properties of these Asic5-expressing interneurons identify them as unipolar brush cells (UBC). Asic5 is richly expressed in a subset of UBCs that also express the metabotropic glutamate receptor 1α (mGluR1α) but not those that express calretinin. Results from single cell RT-PCR and electrophysiological examination of these cells are consistent with this identity. Such observations are consistent with Asic5 playing a key role in the physiology of UBCs and in the function of the vestibulocerebellum. PMID:24663811

  3. Zebrafish acid-sensing ion channel (ASIC) 4, characterization of homo- and heteromeric channels, and identification of regions important for activation by H+.

    PubMed

    Chen, Xuanmao; Polleichtner, Georg; Kadurin, Ivan; Gründer, Stefan

    2007-10-19

    There are four genes for acid-sensing ion channels (ASICs) in the genome of mammalian species. Whereas ASIC1 to ASIC3 form functional H+-gated Na+ channels, ASIC4 is not gated by H+, and its function is unknown. Zebrafish has two ASIC4 paralogs: zASIC4.1 and zASIC4.2. Whereas zASIC4.1 is gated by extracellular H+, zASIC4.2 is not. This differential response to H+ makes zASIC4 paralogs a good model to study the properties of this ion channel. In this study, we found that surface expression of homomeric zASIC4.2 is higher than that of zASIC4.1. Surface expression of zASIC4.1 was much increased by formation of heteromeric channels, suggesting that zASIC4.1 contributes to heteromeric ASICs in zebrafish neurons. Robust surface expression of H+-insensitive zASIC4.2 suggests that zASIC4.2 functions as a homomer and is gated by an as yet unknown stimulus, different from H+. Moreover, we identified a small region just distal to the first transmembrane domain that is crucial for the differential H+ response of the two paralogs. This post-TM1 domain may have a general role in gating of members of this gene family. PMID:17686779

  4. ASIC3 Contributes to the Blunted Muscle Metaboreflex in Heart Failure

    PubMed Central

    Xing, Jihong; Lu, Jian; Li, Jianhua

    2014-01-01

    Introduction During exercise, the sympathetic nervous system is activated and blood pressure and heart rate increase. In heart failure (HF), the muscle metaboreceptor contribution to sympathetic outflow is attenuated and the mechanoreceptor contribution is accentuated. Previous studies suggest that lactic acid stimulates acid sensing channel subtype 3 (ASIC3), inducing a neurally mediated pressor response. Thus, we hypothesized that the pressor response to ASIC3 stimulation is smaller in HF rats due to attenuation in expression and function of ASIC3 in sensory nerves. Methods Lactic acid was injected into the arterial blood supply of the hindlimb to stimulate ASIC3 in muscle afferent nerves and evoke the muscle metaboreceptor response in control rats and HF rats. Also, western blot analysis was employed to examine expression of ASIC3 in dorsal root ganglion (DRG) and patch clamp to examine current response with ASIC3 activation. Results Lactic acid (4 µmol/kg) increased mean arterial pressure by 28±5 mmHg in controls (n=6) but only by 16±3 mmHg (P<0.05 vs. control) in HF (n=8). In addition, HF decreased the protein levels of ASIC3 in DRG (optical density: 1.03±0.02 in control vs. 0.79±0.03 in HF, P<0.05; n=6 in each group). The peak current amplitude of dorsal DRG neuron in response to ASIC3 stimulation is smaller in HF rats than that in control rats. Conclusions Compared with controls, cardiovascular responses to lactic acid administered into the hindlimb muscles are blunted in HF rats owing to attenuated ASIC3. This suggests that ASIC3 plays a role in engagement in the attenuated metaboreceptor component of the exercise pressor reflex in HF. PMID:24983337

  5. Development of a cadmium telluride pixel detector for astrophysical applications

    NASA Astrophysics Data System (ADS)

    Miyasaka, Hiromasa; Harrison, Fiona A.; Cook, Walter R.; Mao, Peter H.; Rana, Vikram R.; Ishikawa, Shin-Nosuke; Ushio, Masayoshi; Aono, Hiroyuki; Watanabe, Shin; Sato, Goro; Kokubun, Motohide; Takahashi, Tadayuki

    2009-08-01

    We are developing imaging Cadmium Telluride (CdTe) pixel detectors optimized for astrophysical hard X-ray applications. Our hybrid detector consist of a CdTe crystal 1mm thick and 2cm × 2cm in area with segmented anode contacts directly bonded to a custom low-noise application specific integrated circuit (ASIC). The CdTe sensor, fabricated by ACRORAD (Okinawa, Japan), has Schottky blocking contacts on a 605 micron pitch in a 32 × 32 array, providing low leakage current and enabling readout of the anode side. The detector is bonded using epoxy-gold stud interconnects to a custom low noise, low power ASIC circuit developed by Caltech's Space Radiation Laboratory. We have achieved very good energy resolution over a wide energy range (0.62keV FWHM @ 60keV, 10.8keV FWHM @ 662keV). We observe polarization effects at room temperature, but they are suppressed if we operate the detector at or below 0°C degree. These detectors have potential application for future missions such as the International X-ray Observatory (IXO).

  6. A CMOS readout circuit for microstrip detectors

    NASA Astrophysics Data System (ADS)

    Nasri, B.; Fiorini, C.

    2015-03-01

    In this work, we present the design and the results of a CMOS analog channel for silicon microstrips detectors. The readout circuit was initially conceived for the outer layers of the SuperB silicon vertex tracker (SVT), but can serve more generally other microstrip-based detection systems. The strip detectors considered show a very high stray capacitance and high series resistance. Therefore, the noise optimization was the first priority design concern. A necessary compromise on the best peaking time to achieve an acceptable noise level together with efficiency and timing accuracy has been investigated. The ASIC is composed by a preamplifier, shaping amplifier and a Time over Threshold (T.o.T) block for the digitalization of the signals. The chosen shaping function is the third-order semi-Gaussian function implemented with complex poles. An inverter stage is employed in the analog channel in order to operate with signals delivered from both p and n strips. The circuit includes the possibility to select the peaking time of the shaper output from four values: 250 ns, 375 ns, 500 ns and 750 ns. In this way, the noise performances and the signal occupancy can be optimized according to the real background during the experiment. The ASIC prototype has been fabricated in the 130 nm IBM technology which is considered intrinsically radiation hard. The results of the experimental characterization of a produced prototype are satisfactorily matched with simulation.

  7. Tailored benzoxazines as novel resin systems for printed circuit boards in high temperature e-mobility applications

    SciTech Connect

    Troeger, K. Darka, R. Khanpour Neumeyer, T. Altstaedt, V.

    2014-05-15

    This study focuses on the development of Bisphenol-F-benzoxazine resins blended with different ratios of a trifunctional epoxy resin suitable as matrix for substrates for high temperature printed circuit board (HT-PCB) applications. With the benzoxazine blends glass transition temperatures of more than 190 °C could be achieved in combination with a coefficient of thermal expansion in thickness direction (z-CTE) of less than 60 ppm/K without adding any fillers. This shows the high potential of the benzoxazine-epoxy blend systems as substrate materials for HT-PCBs. To understand the thermal behavior of the different formulations, the apparent crosslink density was calculated based on data from Dynamic Mechanical Analysis. Laminates in laboratory scale were prepared and characterized to demonstrate the transformation of the neat resin properties into real electronic substrate properties. The produced laminates exhibit a z-CTE below 40 ppm/K.

  8. Silicon/III-V laser with super-compact diffraction grating for WDM applications in electronic-photonic integrated circuits.

    PubMed

    Wang, Yadong; Wei, Yongqiang; Huang, Yingyan; Tu, Yongming; Ng, Doris; Lee, Cheewei; Zheng, Yunan; Liu, Boyang; Ho, Seng-Tiong

    2011-01-31

    We have demonstrated a heterogeneously integrated III-V-on-Silicon laser based on an ultra-large-angle super-compact grating (SCG). The SCG enables single-wavelength operation due to its high-spectral-resolution aberration-free design, enabling wavelength division multiplexing (WDM) applications in Electronic-Photonic Integrated Circuits (EPICs). The SCG based Si/III-V laser is realized by fabricating the SCG on silicon-on-insulator (SOI) substrate. Optical gain is provided by electrically pumped heterogeneous integrated III-V material on silicon. Single-wavelength lasing at 1550 nm with an output power of over 2 mW and a lasing threshold of around 150 mA were achieved. PMID:21369017

  9. Application of glass-nonmetals of waste printed circuit boards to produce phenolic moulding compound.

    PubMed

    Guo, Jie; Rao, Qunli; Xu, Zhenming

    2008-05-01

    The aim of this study was to investigate the feasibility of using glass-nonmetals, a byproduct of recycling waste printed circuit boards (PCBs), to replace wood flour in production of phenolic moulding compound (PMC). Glass-nonmetals were attained by two-step crushing and corona electrostatic separating processes. Glass-nonmetals with particle size shorter than 0.07 mm were in the form of single fibers and resin powder, with the biggest portion (up to 34.6 wt%). Properties of PMC with glass-nonmetals (PMCGN) were compared with reference PMC and the national standard of PMC (PF2C3). When the adding content of glass-nonmetals was 40 wt%, PMCGN exhibited flexural strength of 82 MPa, notched impact strength of 2.4 kJ/m(2), heat deflection temperature of 175 degrees C, and dielectric strength of 4.8 MV/m, all of which met the national standard. Scanning electron microscopy (SEM) showed strong interfacial bonding between glass fibers and the phenolic resin. All the results showed that the use of glass-nonmetals as filler in PMC represented a promising method for resolving the environmental pollutions and reducing the cost of PMC, thus attaining both environmental and economic benefits. PMID:17949900

  10. Application of physical electric circuit modeling to characterize Li-ion battery electrochemical processes

    NASA Astrophysics Data System (ADS)

    Greenleaf, M.; Li, H.; Zheng, J. P.

    2014-12-01

    A physical electric circuit model (PECM) was used to identify several electrochemical processes occurring in two commercial Li-ion batteries of different cathode materials (LixFePO4 and LixCoO2) via electrochemical impedance spectroscopy (EIS). Through defining these electrochemical processes in these two cells, it was determined that the charge transfer resistance (or exchange current density) observed via EIS was due to the cathodic exchange current densities in both the LixFePO4 and LixCoO2 full cells. In discussing the ionic diffusion of the examined cells, the anode of one cell and the cathode of the other were primarily responsible for the observed diffusion of the full cells. Lastly, the measured double layer capacitance was determined to be represented in EIS scans by the anodes of both full cells. The diffusion coefficient was calculated using Fick's1st Law estimation, and from this coefficient, the particle size was calculated and evaluated against scanning electron microscopy (SEM).

  11. Implementation of a Synchronized Oscillator Circuit for Fast Sensing and Labeling of Image Objects

    PubMed Central

    Kowalski, Jacek; Strzelecki, Michal; Kim, Hyongsuk

    2011-01-01

    We present an application-specific integrated circuit (ASIC) CMOS chip that implements a synchronized oscillator cellular neural network with a matrix size of 32 × 32 for object sensing and labeling in binary images. Networks of synchronized oscillators are a recently developed tool for image segmentation and analysis. Its parallel network operation is based on a “temporary correlation” theory that attempts to describe scene recognition as if performed by the human brain. The synchronized oscillations of neuron groups attract a person’s attention if he or she is focused on a coherent stimulus (image object). For more than one perceived stimulus, these synchronized patterns switch in time between different neuron groups, thus forming temporal maps that code several features of the analyzed scene. In this paper, a new oscillator circuit based on a mathematical model is proposed, and the network architecture and chip functional blocks are presented and discussed. The proposed chip is implemented in AMIS 0.35 μm C035M-D 5M/1P technology. An application of the proposed network chip for the segmentation of insulin-producing pancreatic islets in magnetic resonance liver images is presented. PMID:22163803

  12. ASIC for calorimetric measurements in the astrophysical experiment NUCLEON

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Voronin, A.; Karmanov, D.; Kudryashov, I.; Kovalev, I.; Shumikhin, V.

    2016-02-01

    A satellite with the NUCLEON apparatus was launched in Dec. 2014. The space NUCLEON project of ROSCOSMOS is designed to investigate cosmic ray nuclei energy spectra from 100 GeV to 1000 TeV as well as cosmic ray electron spectra from 20 GeV to 3 TeV. The method of energy determination by means of a silicon instrument for measuring the particle charge of cosmic rays and the calorimetric system were developed. The main parameters, that determine the quality of calorimetric systems are linearity of transfer characteristic and the dynamic range of input signals, which should reach 30 000 MIPs (minimum ionizing particles). The ASIC, satisfying these requirements, consisting of 32 channels with a unique dynamic range from 1 to 40000 MIPs, signal to noise ratio not less than 2.5 at a shaper peaking time of 2 μs and a low power consumption of 1.5 mW/channel has been designed. The first results of the ASIC functionality in space are presented.

  13. Automated yield forecasting in a high product mix ASIC facility

    NASA Astrophysics Data System (ADS)

    Barber, Duane; Giewont, Mark; Hanson, Jeff; Shen, Jun

    2005-05-01

    Yield forecasting is a key component in running a successful semiconductor fab. It is also a significant challenge for facilities such as ASIC houses, which fabricate a wide range of devices using multiple technologies. Yield forecasting takes on increased significance in these environments, with new products introduced frequently and many products running only in small numbers. An accurate yield prediction system can greatly accelerate the process of identifying design bugs, test program issues and process integration problems. To this end, we have constructed a forecasting model geared for our ASIC manufacturing line. The model will accommodate an arbitrary number of design and/or process elements, each with an associated defectivity term. In addition, we have automated the generation of the yield forecast through passively linking to the already existing EDA design tools and scripts used by LSI Logic. Once the model is constructed, an automated query engine can extract the design and process parameters for any requested device, insert the data into the forecasting model, and deliver the resulting yield prediction. The actual yield for any lot or group of lots may thus be compared to the forecast, greatly assisting yield enhancement activities. This is especially useful for prototype lots and low-volume devices, for which it eliminates a great deal of manual computation and searching of design files. Using the model in conjunction with the query engine, any deviations from expected yield performance are generated automatically, quickly and efficiently highlighting opportunities for improvement.

  14. Programmable Differential Delay Circuit With Fine Delay Adjustment

    DOEpatents

    DeRyckere, John F.; Jenkins, Philip Nord; Cornett, Frank Nolan

    2002-07-09

    Circuitry that provides additional delay to early arriving signals such that all data signals arrive at a receiving latch with same path delay. The delay of a forwarded clock reference is also controlled such that the capturing clock edge will be optimally positioned near quadrature (depending on latch setup/hold requirements). The circuitry continuously adapts to data and clock path delay changes and digital filtering of phase measurements reduce errors brought on by jittering data edges. The circuitry utilizes only the minimum amount of delay necessary to achieve objective thereby limiting any unintended jitter. Particularly, this programmable differential delay circuit with fine delay adjustment is designed to allow the skew between ASICS to be minimized. This includes skew between data bits, between data bits and clocks as well as minimizing the overall skew in a channel between ASICS.

  15. Oxidant regulated inter-subunit disulfide bond formation between ASIC1a subunits

    PubMed Central

    Zha, Xiang-ming; Wang, Runping; Collier, Dan M.; Snyder, Peter M.; Wemmie, John A.; Welsh, Michael J.

    2009-01-01

    The acid-sensing ion channel-1a (ASIC1a) is composed of 3 subunits and is activated by a decrease in extracellular pH. It plays an important role in diseases associated with a reduced pH and production of oxidants. Previous work showed that oxidants reduce ASIC1a currents. However, the effects on channel structure and composition are unknown. We found that ASIC1a formed inter-subunit disulfide bonds and the oxidant H2O2 increased this link between subunits. Cys-495 in the ASIC1a C terminus was particularly important for inter-subunit disulfide bond formation, although other C-terminal cysteines contributed. Inter-subunit disulfide bonds also produced some ASIC1a complexes larger than trimers. Inter-subunit disulfide bond formation reduced the proportion of ASIC1a located on the cell surface and contributed to the H2O2-induced decrease in H+-gated current. These results indicate that channel function is controlled by disulfide bond formation between intracellular residues on distinct ASIC1a subunits. They also suggest a mechanism by which the redox state can dynamically regulate membrane protein activity by forming intracellular bridges. PMID:19218436

  16. Tissue acidosis induces neuronal necroptosis via ASIC1a channel independent of its ionic conduction

    PubMed Central

    Wang, Yi-Zhi; Wang, Jing-Jing; Huang, Yu; Liu, Fan; Zeng, Wei-Zheng; Li, Ying; Xiong, Zhi-Gang; Zhu, Michael X; Xu, Tian-Le

    2015-01-01

    Acidotoxicity is common among neurological disorders, such as ischemic stroke. Traditionally, Ca2+ influx via homomeric acid-sensing ion channel 1a (ASIC1a) was considered to be the leading cause of ischemic acidotoxicity. Here we show that extracellular protons trigger a novel form of neuronal necroptosis via ASIC1a, but independent of its ion-conducting function. We identified serine/threonine kinase receptor interaction protein 1 (RIP1) as a critical component of this form of neuronal necroptosis. Acid stimulation recruits RIP1 to the ASIC1a C-terminus, causing RIP1 phosphorylation and subsequent neuronal death. In a mouse model of focal ischemia, middle cerebral artery occlusion causes ASIC1a-RIP1 association and RIP1 phosphorylation in affected brain areas. Deletion of the Asic1a gene significantly prevents RIP1 phosphorylation and brain damage, suggesting ASIC1a-mediated RIP1 activation has an important role in ischemic neuronal injury. Our findings indicate that extracellular protons function as a novel endogenous ligand that triggers neuronal necroptosis during ischemia via ASIC1a independent of its channel function. DOI: http://dx.doi.org/10.7554/eLife.05682.001 PMID:26523449

  17. Transient Performance Improvement Circuit (TPIC)s for DC-DC converter applications

    NASA Astrophysics Data System (ADS)

    Lim, Sungkeun

    of the slow inductor current slew rate which is determined by the input voltage, output voltage, and the inductance. The remaining inductor current in the power delivery path will charge the output capacitors and develop a voltage across the ESR. As a result, large output voltage spikes occur during load current transients. Due to their limited control bandwidth, traditional VRs can not sufficiently respond rapidly to certain load transients. As a result, a large output voltage spike can occur during load transients, hence requiring a large amount of bulk capacitance to decouple the VR from the load [2]. If the remaining inductor current is removed from the power stage or the inductor current slew rate is changed, the output voltage spikes can be clamped, allowing the output capacitance to be reduced. A new design methodology for a Transient Performance Improvement Circuit(TPIC) based on controlling the output impedance of a regulator is presented. The TPIC works in parallel with a voltage regulator (VR)'s ceramic capacitors to achieve faster voltage regulation without the need for a large bulk capacitance, and can serve as a replacement for bulk capacitors. The specific function of the TPIC is to mimic the behavior of the bulk capacitance in a traditional VRM by sinking and sourcing large currents during transients, allowing the VR to respond quickly to current transients without the need for a large bulk capacitance. This will allow fast transient response without the need for a large bulk capacitor. The main challenge in applying the TPIC is creating a design which will not interfere with VR operation. A TPIC for a 4 Switch Buck-Boost (4SBB) converter is presented which functions by con- trolling the inductor current slew rate during load current transients. By increasing the inductor current slew rate, the remaining inductor current can be removed from the 4SBB power delivery path and the output voltage spike can be clamped. A second TPIC is presented which is

  18. Subtype-specific Modulation of Acid-sensing Ion Channel (ASIC) Function by 2-Guanidine-4-methylquinazoline*

    PubMed Central

    Alijevic, Omar; Kellenberger, Stephan

    2012-01-01

    Acid-sensing ion channels (ASICs) are neuronal Na+-selective channels that are transiently activated by extracellular acidification. ASICs are involved in fear and anxiety, learning, neurodegeneration after ischemic stroke, and pain sensation. The small molecule 2-guanidine-4-methylquinazoline (GMQ) was recently shown to open ASIC3 at physiological pH. We have investigated the mechanisms underlying this effect and the possibility that GMQ may alter the function of other ASICs besides ASIC3. GMQ shifts the pH dependence of activation to more acidic pH in ASIC1a and ASIC1b, whereas in ASIC3 this shift goes in the opposite direction and is accompanied by a decrease in its steepness. GMQ also induces an acidic shift of the pH dependence of inactivation of ASIC1a, -1b, -2a, and -3. As a consequence, the activation and inactivation curves of ASIC3 but not other ASICs overlap in the presence of GMQ at pH 7.4, thereby creating a window current. At concentrations >1 mm, GMQ decreases maximal peak currents by reducing the unitary current amplitude. Mutation of residue Glu-79 in the palm domain of ASIC3, previously shown to be critical for channel opening by GMQ, disrupted the GMQ effects on inactivation but not activation. This suggests that this residue is involved in the consequences of GMQ binding rather than in the binding interaction itself. This study describes the mechanisms underlying the effects of a novel class of ligands that modulate the function of all ASICs as well as activate ASIC3 at physiological pH. PMID:22948146

  19. Direct visualization of the trimeric structure of the ASIC1a channel, using AFM imaging

    SciTech Connect

    Carnally, Stewart M.; Dev, Harveer S.; Stewart, Andrew P.; Barrera, Nelson P.; Van Bemmelen, Miguel X.; Schild, Laurent; Henderson, Robert M.; Edwardson, J.Michael

    2008-08-08

    There has been confusion about the subunit stoichiometry of the degenerin family of ion channels. Recently, a crystal structure of acid-sensing ion channel (ASIC) 1a revealed that it assembles as a trimer. Here, we used atomic force microscopy (AFM) to image unprocessed ASIC1a bound to mica. We detected a mixture of subunit monomers, dimers and trimers. In some cases, triple-subunit clusters were clearly visible, confirming the trimeric structure of the channel, and indicating that the trimer sometimes disaggregated after adhesion to the mica surface. This AFM-based technique will now enable us to determine the subunit arrangement within heteromeric ASICs.

  20. Development of Multi-window ASIC for High-Flux X-Ray Inspection Systems.

    SciTech Connect

    O'Connor, Paul

    2007-01-25

    The BNL Microelectronics group has designed a series of custom ASICs in CMOS technol­ogy for use with Cadmium-Zink-Telluride (CdZnTe) radiation detectors, primarily in the field of nuclear spectroscopy. An increased demand for CdZnTe based detection systems that can operate in high flux X-ray inspection equipment makes it necessary to develop a new type of signal processing ASIC, one which can achieve moderate energy resolution at very high count rate. This work covers the development of a high-rate, low power ASIC that classifies events into one of five energy windows at rates up to 2 MHz/channel.

  1. Bioinspired Polarization Imaging Sensors: From Circuits and Optics to Signal Processing Algorithms and Biomedical Applications

    PubMed Central

    York, Timothy; Powell, Samuel B.; Gao, Shengkui; Kahan, Lindsey; Charanya, Tauseef; Saha, Debajit; Roberts, Nicholas W.; Cronin, Thomas W.; Marshall, Justin; Achilefu, Samuel; Lake, Spencer P.; Raman, Baranidharan; Gruev, Viktor

    2015-01-01

    In this paper, we present recent work on bioinspired polarization imaging sensors and their applications in biomedicine. In particular, we focus on three different aspects of these sensors. First, we describe the electro–optical challenges in realizing a bioinspired polarization imager, and in particular, we provide a detailed description of a recent low-power complementary metal–oxide–semiconductor (CMOS) polarization imager. Second, we focus on signal processing algorithms tailored for this new class of bioinspired polarization imaging sensors, such as calibration and interpolation. Third, the emergence of these sensors has enabled rapid progress in characterizing polarization signals and environmental parameters in nature, as well as several biomedical areas, such as label-free optical neural recording, dynamic tissue strength analysis, and early diagnosis of flat cancerous lesions in a murine colorectal tumor model. We highlight results obtained from these three areas and discuss future applications for these sensors. PMID:26538682

  2. Heterogeneous photonic integrated circuits and their applications in computing, networking, and imaging

    NASA Astrophysics Data System (ADS)

    Yoo, S. J. Ben

    2014-03-01

    We discuss heterogeneous integrations and their impacts on computing, networking, and imaging applications. We will review photonic integration technologies including silicon, InP, GaAs, SiO2, Si3N4, and magneto-optical materials such as YIG and BIG. We will address new architectures, new capabilities, and performance enhancement brought into computing, networking, and imaging architectures through heterogeneous photonic integration.

  3. Sensor readout detector circuit

    DOEpatents

    Chu, D.D.; Thelen, D.C. Jr.

    1998-08-11

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

  4. Sensor readout detector circuit

    DOEpatents

    Chu, Dahlon D.; Thelen, Jr., Donald C.

    1998-01-01

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

  5. MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  6. A compact equivalent circuit for the dark current-voltage characteristics of nonideal solar cells

    NASA Astrophysics Data System (ADS)

    Pallarès, J.; Cabré, R.; Marsal, L. F.; Schropp, R. E. I.

    2006-10-01

    This paper presents a compact electrical equivalent circuit which describes the dark current-voltage characteristics of nonideal p-n junction solar cells in a wide range of temperatures. The model clearly separates the voltage drop in the junction and bulk regions. It is based on the combination of two exponential mechanisms, shunt and series resistances and space-charge limited current. In order to increase the accuracy of the parameter extraction process, both ln(I-V ) and its derivative plots are fitted simultaneously. From the temperature dependence of the extracted parameters, the conduction mechanisms governing the I-V characteristics can be obtained without assuming dominating terms. In addition, the extracted parameters can be related to other electrical magnitudes obtained from such independent measurements as capacitance-voltage measurements (diffusion potential) and illuminated current-voltage characteristics (series resistance and open-circuit voltage). To exemplify the application, a p+ a-SiC :H/n c-Si solar cell is studied and a number of major physical aspects derived from the analysis of the fitting values are discussed.

  7. TOFPET 2: A high-performance circuit for PET time-of-flight

    NASA Astrophysics Data System (ADS)

    Di Francesco, Agostino; Bugalho, Ricardo; Oliveira, Luis; Rivetti, Angelo; Rolo, Manuel; Silva, Jose C.; Varela, Joao

    2016-07-01

    We present a readout and digitization ASIC featuring low-noise and low-power for time-of flight (TOF) applications using SiPMs. The circuit is designed in standard CMOS 110 nm technology, has 64 independent channels and is optimized for time-of-flight measurement in Positron Emission Tomography (TOF-PET). The input amplifier is a low impedance current conveyor based on a regulated common-gate topology. Each channel has quad-buffered analogue interpolation TDCs (time binning 20 ps) and charge integration ADCs with linear response at full scale (1500 pC). The signal amplitude can also be derived from the measurement of time-over-threshold (ToT). Simulation results show that for a single photo-electron signal with charge 200 (550) fC generated by a SiPM with (320 pF) capacitance the circuit has 24 (30) dB SNR, 75 (39) ps r.m.s. resolution, and 4 (8) mW power consumption. The event rate is 600 kHz per channel, with up to 2 MHz dark counts rejection.

  8. Compact Si photonic multimode interference-based optical circuit for mode division multiplexing applications

    NASA Astrophysics Data System (ADS)

    El-Sabban, Salwa; Khalil, Diaa

    2016-07-01

    A design for a compact Si photonic two mode demultiplexer for mode division multiplexing (MDM) applications is presented. The design uses the self-imaging in multimode interference structures to achieve MDM with an insertion loss less than 0.5 dB and a cross talk better than 20 dB over the C band. The imaging is achieved within a length that is half the length reported in the literature, and its overall dimensions are 42 μm×3 μm. The minimum cross talk is affected by the structure geometry. The tolerance of the design to variations in the dimensions is also studied.

  9. SEMICONDUCTOR INTEGRATED CIRCUITS: A high-performance low-power CMOS AGC for GPS application

    NASA Astrophysics Data System (ADS)

    Qianqian, Lei; Qiming, Xu; Zhiming, Chen; Yin, Shi; Min, Lin; Hailong, Jia

    2010-02-01

    A wide tuning range, low power CMOS automatic gain control (AGC) with a simple architecture is proposed. The proposed AGC is composed of a variable gain amplifier (VGA), a comparator and a charge pump, and the dB-linear gain is controlled by the charge pump. The AGC was implemented in a 0.18 μm CMOS technology. The dynamic range of the VGA is more than 55 dB, the bandwidth is 30 MHz, and the gain error is lower than ±1.5 dB over the full temperature and gain ranges. It is designed for GPS application and is fed from a single 1.8 V power supply. The AGC power consumption is less than 5 mW, and the area of the AGC is 700 × 450 μm2.

  10. MM-wave integrated circuits and their applications to communication and automotive systems

    NASA Astrophysics Data System (ADS)

    Quentin, P.; Dourlens, C.; Camiade, M.; Pons, D.

    1999-08-01

    After a short presentation of the market outlook of the commercial applications of millimetre-wave systems, we present three examples of a successful development of MMIC chip-sets: one chip-set for a full duplex Ka-band transceiver for a multipoint communication system; one chip-set for a 40 GHz MVDS subscriber terminal and, finally, one chip-set for a 76.5 GHz car radar system for ACC. In all three cases, a full MMIC architecture is used. In our view, this is the only solution to allow the high yield and high volume fabrication of the RF front-end modules at the very low costs which are required for market development.

  11. InGaAs/InP heterojunction bipolar transistors for ultra-low power circuit applications

    SciTech Connect

    Chang, P.C.; Baca, A.G.; Hafich, M.J.; Ashby, C.I.

    1998-08-01

    For many modern day portable electronic applications, low power high speed devices have become very desirable. Very high values of f{sub T} and f{sub MAX} have been reported with InGaAs/InP heterojunction bipolar transistors (HBTs), but only under high bias and high current level operating conditions. An InGaAs/InP ultra-lowpower HBT with f{sub MAX} greater than 10 GHz operating at less than 20 {micro}A has been reported for the first time in this work. The results are obtained on a 2.5 x 5 {micro}m{sup 2} device, corresponding to less than 150 A/cm{sup 2} of current density. These are the lowest current levels at which f{sub MAX} {ge} 10 GHz has been reported.

  12. TRIPPING CIRCUIT

    DOEpatents

    Lees, G.W.; McCormick, E.D.

    1962-05-22

    A tripping circuit employing a magnetic amplifier for tripping a reactor in response to power level, period, or instrument failure is described. A reference winding and signal winding are wound in opposite directions on the core. Current from an ion chamber passes through both windings. If the current increases at too fast a rate, a shunt circuit bypasses one or the windings and the amplifier output reverses polarity. (AEC)

  13. Integrated coherent matter wave circuits

    NASA Astrophysics Data System (ADS)

    Ryu, C.; Boshier, M. G.

    2015-09-01

    An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. Here we report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through their electric polarizability. The source of coherent matter waves is a Bose-Einstein condensate (BEC). We launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.

  14. Novel application of the nonmetallic fraction of the recycled printed circuit boards as a toxic heavy metal adsorbent.

    PubMed

    Hadi, Pejman; Gao, Ping; Barford, John P; McKay, Gordon

    2013-05-15

    Printed circuit boards (PCBs) constitute one of the major sources of toxicity in landfill areas throughout the world. Hence, PCB recycling and separation of its metallic and nonmetallic components has been considered a major ecological breakthrough. Many studies focus on the metallic fraction of the PCBs due to its economic benefits whereas the nonmetallic powder (NMP) has been left isolated. In this work, the feasibility of using NMP as an adsorbent to remove charged toxic heavy metal ions have been studied and its efficiency has been compared with two widely-used commercial adsorbents. The results indicated that the virgin NMP material has no adsorption capacity, while the application of an activation stage to modify the NMP process has a significant effect on its porosity and thus adsorption capacity. The Cu and Pb removal capacity of the activated sample (A-NMP) at a pH level of 4 was 3 mmol and 3.4 mmol per gram of the adsorbent, respectively, which was considerably higher than the commercial ones. PMID:23523907

  15. Application of Derrick Corporation's stack sizer technology for slimes reduction in 6 inch clean coal hydrocyclone circuits

    SciTech Connect

    Brodzik, P.

    2009-04-15

    The article discusses the successful introduction of Derrick Corporation's Stack Sizer technology for removing minus 200 mesh slimes from 6-inch coal hydrocyclone underflow prior to froth flotation or dewatering by screen bowl centrifuges. In 2006, the James River Coal Company selected the Stack Sizer fitted with Derrick 150 micron and 100 micron urethane screen panels for removal of the minus 100 mesh high ash clay fraction from the clean coal spiral product circuits. After this application proved successful, Derrick Corporation introduced new 75 micron urethane screen panels for use on the Stack Sizer. Evaluation of feed slurry to flotation cells and screen bowl centrifuges showed significant amounts of minus 75 micron that could potentially be removed by efficient screening technology. Removal of the minus 75 micron fraction was sought to reduce ash and moisture content of the final clean coal product. Full-scale lab tests confirmed that the Stack Sizer fitted with Derrick 75 micron urethane screen panels consistently reduced the minus 75 micron percentage in coal slurry from 6-inch clean coal hydrocyclone underflow that is approximately 15 to 20% solid by-weight and 30 to 60% minus 75 micron to a clean coal fraction that is approximately 13 to 16% minus 75 micron. As a result total ash is reduced from approximately 36 to 38% in the hydrocyclone underflow to 14 to 16% in the oversize product fraction form the Stack Sizers. 1 fig., 2 tabs., 5 photos.

  16. Powering an Implantable Minipump with a Multi-layered Printed Circuit Coil for Drug Infusion Applications in Rodents

    PubMed Central

    Givrad, Tina K.; Maarek, Jean-Michel I.; Moore, William H.; Holschneider, Daniel P.

    2014-01-01

    We report the use of a multi-layer printed coil circuit for powering (36–94 mW) an implantable microbolus infusion pump (MIP) that can be activated remotely for use in drug infusion in nontethered, freely moving small animals. This implantable device provides a unique experimental tool with applications in the fields of animal behavior, pharmacology, physiology, and functional brain imaging. Two different designs are described: a battery-less pump usable when the animal is inside a home-cage surrounded by a primary inductive coil and a pump powered by a rechargeable battery that can be used for studies outside the homecage. The use of printed coils for powering of small devices by inductive power transfer presents significant advantages over similar approaches using hand-wound coils in terms of ease of manufacturing and uniformity of design. The high efficiency of a class-E oscillator allowed powering of the minipumps without the need for close physical contact of the primary and secondary coils, as is currently the case for most devices powered by inductive power transfer. PMID:20033778

  17. Physical and electrical characterization of HfO2 metal-insulator-metal capacitors for Si analog circuit applications

    NASA Astrophysics Data System (ADS)

    Hu, Hang; Zhu, Chunxiang; Lu, Y. F.; Wu, Y. H.; Liew, T.; Li, M. F.; Cho, B. J.; Choi, W. K.; Yakovlev, N.

    2003-07-01

    Thin films of HfO2 high-k dielectric have been prepared by pulsed-laser deposition at various substrate temperatures and pressures. X-ray diffraction, atomic force microscopy, secondary ion mass spectroscopy and ellipsometry were used to characterize the deposited films. Experimental results show that substrate temperature has little effect on the stoichiometry, while deposition pressure plays an important role in determining the ratio of Hf and O. It is also found that the optical properties of the HfO2 thin films have strong dependence on both the deposition temperature and pressure. The electrical properties of HfO2 metal-insulator-metal (MIM) capacitors were investigated at various deposition temperatures. It is shown that the HfO2 (56 nm) MIM capacitor fabricated at 200 °C shows an overall high performance, such as a high capacitance density of ˜3.0 fF/μm2, a low leakage current of 2×10-9 A/cm2 at 3 V, low-voltage coefficients of capacitance, and good-frequency dispersion properties. All of these indicate that the HfO2 MIM capacitors are very suitable for use in Si analog circuit applications.

  18. A 256 channel 8-Bit current digitizer ASIC for the Belle-II PXD

    NASA Astrophysics Data System (ADS)

    Knopf, J.; Fischer, P.; Kreidl, C.; Peric, I.

    2011-01-01

    The international DEPFET collaboration is developing a silicon pixel vertex detector (PXD), based on monolithic arrays of DEPFET transistors, for the future physics experiment Belle-II at the SuperKEKB particle accelerator in Japan. The matrix elements are read out in a 'rolling shutter mode', i.e. rows are selected consecutively and all columns are read out in each cycle of < 100 ns. One of the major parts in the front-end electronics chain is the DEPFET Current Digitizer ASIC (DCDB). It is now in a close-to-final state. The chip provides 256 channels of analog-to-digital converters with a resolution of six to eight bits. Each converter features an individual dynamic offset correction circuit as well as programmable gain and bandwidth. Several operation modes using single sampling or double correlated sampling are possible. A large synthesized digital block is used for decoding and derandomization of the conversion results. The data is put out on eight 8-bit links, operating at a speed of 400 MHz. Additionally, a JTAG compatible interface is implemented for configuration and debugging purpose. Significant effort was made to reduce the power consumption of the DCDB, since both, voltage drop on the internal power buses and heat sources in the Belle-II experiment are a concern. The chip was realized on a 3.2mm × 5mm die using the UMC 180nm CMOS technology in a multi-project wafer run, provided by EuroPractice. An extra redistribution metal layer with bump bond pads is used, allowing for flipping the chip onto the final all-silicon DEPFET sensor module. Several tests have been performed in order to prove the chip's operation and its quality in terms of noise. The results are presented.

  19. CAD-II: the second version current-mode readout ASIC for high-resolution timing measurements

    NASA Astrophysics Data System (ADS)

    Yuan, Z. X.; Deng, Z.; Wang, Y.; Liu, Y. N.

    2016-07-01

    This paper presents the second version of a fully current-mode front-end ASIC, CAD (Current Amplifier and Discriminator), for MRPC detectors for TOF applications. Several upgrades have been made in this new version, including: 1). Using differential input stages with input impedance down to 30 Ω and LVDS compatible outputs; 2). Much higher current gain and bandwidth of 4.5 A/A and 380 MHz 3). Fabricated in 0.18 μ m CMOS process instead of 0.35 μ m CMOS technology used in CAD-I. The detailed design of the ASIC will be described as well as the measurement results. The single-ended input impedance could be as low as 32 Ω and the power consumption was measured to be 15 mW per channel. Input referred RMS noise current was about 0.56 μ A. The threshold could be set as low as 4.5 μ A referred to input, corresponding to 9 fC for the typical MRPC detector signal with 2 ns width. Sub-10 ps resolution has been measured for input signal above 200 μ A.

  20. ASICs Do Not Play a Role in Maintaining Hyperalgesia Induced by Repeated Intramuscular Acid Injections

    PubMed Central

    Gautam, Mamta; Benson, Christopher J.; Ranier, Jon D.; Light, Alan R.; Sluka, Kathleen A.

    2012-01-01

    Repeated intramuscular acid injections produce long-lasting mechanical hyperalgesia that depends on activation of ASICs. The present study investigated if pH-activated currents in sensory neurons innervating muscle were altered in response to repeated acid injections, and if blockade of ASICs reverses existing hyperalgesia. In muscle sensory neurons, the mean acid-evoked current amplitudes and the biophysical properties of the ASIC-like currents were unchanged following acidic saline injections when compared to neutral pH saline injections or uninjected controls. Moreover, increased mechanical sensitivity of the muscle and paw after the second acid injection was unaffected by local blockade of ASICs (A-317567) in the muscle. As a control, electron microscopic analysis showed that the tibial nerve was undamaged after acid injections. Our previous studies demonstrated that ASICs are important in the development of hyperalgesia to repeated acid injections. However, the current data suggest that ASICs are not involved in maintaining hyperalgesia to repeated intramuscular acid injections. PMID:22191025

  1. Acid-sensing ion channels (ASICs): therapeutic targets for neurological diseases and their regulation

    PubMed Central

    Kweon, Hae-Jin; Suh, Byung-Chang

    2013-01-01

    Extracellular acidification occurs not only in pathological conditions such as inflammation and brain ischemia, but also in normal physiological conditions such as synaptic transmission. Acid-sensing ion channels (ASICs) can detect a broad range of physiological pH changes during pathological and synaptic cellular activities. ASICs are voltage-independent, proton-gated cation channels widely expressed throughout the central and peripheral nervous system. Activation of ASICs is involved in pain perception, synaptic plasticity, learning and memory, fear, ischemic neuronal injury, seizure termination, neuronal degeneration, and mechanosensation. Therefore, ASICs emerge as potential therapeutic targets for manipulating pain and neurological diseases. The activity of these channels can be regulated by many factors such as lactate, Zn2+, and Phe-Met-Arg-Phe amide (FMRFamide)-like neuropeptides by interacting with the channel’s large extracellular loop. ASICs are also modulated by G protein-coupled receptors such as CB1 cannabinoid receptors and 5-HT2. This review focuses on the physiological roles of ASICs and the molecular mechanisms by which these channels are regulated. [BMB Reports 2013; 46(6): 295-304] PMID:23790972

  2. Atomic Level Characterization of the Nonproton Ligand-sensing Domain of ASIC3 Channels*

    PubMed Central

    Yu, Ye; Li, Wei-Guang; Chen, Zhi; Cao, Hui; Yang, Huaiyu; Jiang, Hualiang; Xu, Tian-Le

    2011-01-01

    Acid-sensing ion channels (ASICs) are known to be primarily activated by extracellular protons. Recently, we characterized a novel nonproton ligand (2-guanidine-4-methylquinazoline, GMQ), which activates the ASIC3 channel subtype at neutral pH. Using an interactive computational-experimental approach, here we extend our investigation to delineate the architecture of the GMQ-sensing domain in the ASIC3 channels. We first established a GMQ binding mode and revealed that residues Glu-423, Glu-79, Leu-77, Arg-376, Gln-271, and Gln-269 play key roles in forming the GMQ-sensing domain. We then verified the GMQ binding mode using ab initio calculation and mutagenesis and demonstrated the critical role of the above GMQ-binding residues in the interplay among GMQ, proton, and Ca2+ in regulating the function of ASIC3. Additionally, we showed that the same residues involved in coordinating GMQ responses are also critical for activation of the ASIC3E79C mutant by thiol-reactive compound DTNB. Thus, a range of complementary techniques provide independent evidence for the structural details of the GMQ-sensing domain at atomic level, laying the foundation for further investigations of endogenous nonproton ligands and gating mechanisms of the ASIC3 channels. PMID:21586569

  3. Novel Low Loss Wide-Band Multi-Port Integrated Circuit Technology for RF/Microwave Applications

    NASA Technical Reports Server (NTRS)

    Simons, Rainee N.; Goverdhanam, Kavita; Katehi, Linda P. B.; Burke, Thomas P. (Technical Monitor)

    2001-01-01

    In this paper, novel low loss, wide-band coplanar stripline technology for radio frequency (RF)/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth, and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semi-conductor devices and microelectromechanical systems (MEMS).

  4. Electronic control circuits: A compilation

    NASA Technical Reports Server (NTRS)

    1973-01-01

    A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

  5. Exploitation of prokaryotic expression systems based on the salicylate-dependent control circuit encompassing nahR/Psal::xylS2 for biotechnological applications

    PubMed Central

    Becker, Pablo D; Royo, Jose L

    2010-01-01

    Expression vectors appear to be an indispensable tool for both biological studies and biotechnological applications. Controlling gene overexpression becomes a critical issue when protein production is desired. In addition to several aspects regarding toxicity or plasmid instability, tight control of gene expression is an essential factor in biotechnological processes. Thus, the search for better-controlled circuits is an important issue among biotechnologists. Traditionally, expression systems involve a single regulatory protein operating over a target promoter. However, these circuits are limited on their induction ratios (e.g., by their restriction in the maximal expression capacity, by their leakiness under non-induced conditions). Due to these limitations, regulatory cascades, which are far more efficient, are necessary for biotechnological applications. Thus, regulatory circuits with two modules operating in cascade offer a significant advantage. In this review, we describe the regulatory cascade based on two salicylate-responsive transcriptional regulators of Pseudomonas putida (nahR/Psal::xylS2), its properties, and contribution to a tighter control over heterologous gene expression in different applications. Nowadays, heterologous expression has been proven to be an indispensable tool for tackling basic biological questions, as well as for developing biotechnological applications. As the nature of the protein of interest becomes more complex, biotechnologists find that a tight control of gene expression is a key factor which conditions the success of the downstream purification process, as well as the interpretation of the results in other type of studies. Fortunately, different expression systems can be found in the market, each of them with their own pros and cons. In this review we discuss the exploitation of prokaryotic expression systems based on a promising expression system, the salicylate-dependent control circuit encompassing nahR/Psal::xylS2, as

  6. Transmission lines implementation on HDI flex circuits for the CMS tracker upgrade

    NASA Astrophysics Data System (ADS)

    Blanchot, G.; De Canio, F.; Gadek, T.; Honma, A.; Kovacs, M.; Rose, P.; Traversi, G.

    2016-01-01

    The upgrade of the CMS tracker at the HL-LHC relies on hybrid modules built on high density interconnecting flexible circuits. They contain several flip chip readout ASICs having high speed digital ports required for configuration and data readout, implemented as customized Scalable Low-Voltage Signalling (SLVS) differential pairs. This paper presents the connectivity requirements on the CMS tracker hybrids; it compares several transmission line implementations in terms of board area, achievable impedances and expected crosstalk. The properties obtained by means of simulations are compared with measurements made on a dedicated test circuit. The different transmission line implementations are also tested using a custom 65nm SLVS driver and receiver prototype ASIC.

  7. MULTIPLIER CIRCUIT

    DOEpatents

    Chase, R.L.

    1963-05-01

    An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

  8. PICK1/calcineurin suppress ASIC1-mediated Ca2+ entry in rat pulmonary arterial smooth muscle cells.

    PubMed

    Herbert, Lindsay M; Nitta, Carlos H; Yellowhair, Tracylyn R; Browning, Carly; Gonzalez Bosc, Laura V; Resta, Thomas C; Jernigan, Nikki L

    2016-03-01

    Acid-sensing ion channel 1 (ASIC1) contributes to Ca(2+) influx and contraction in pulmonary arterial smooth muscle cells (PASMC). ASIC1 binds the PDZ (PSD-95/Dlg/ZO-1) domain of the protein interacting with C kinase 1 (PICK1), and this interaction is important for the subcellular localization and/or activity of ASIC1. Therefore, we first hypothesized that PICK1 facilitates ASIC1-dependent Ca(2+) influx in PASMC by promoting plasma membrane localization. Using Duolink to determine protein-protein interactions and a biotinylation assay to assess membrane localization, we demonstrated that the PICK1 PDZ domain inhibitor FSC231 diminished the colocalization of PICK1 and ASIC1 but did not limit ASIC1 plasma membrane localization. Although stimulation of store-operated Ca(2+) entry (SOCE) greatly enhanced colocalization between ASIC1 and PICK1, both FSC231 and shRNA knockdown of PICK1 largely augmented SOCE. These data suggest PICK1 imparts a basal inhibitory effect on ASIC1 Ca(2+) entry in PASMC and led to an alternative hypothesis that PICK1 facilitates the interaction between ASIC1 and negative intracellular modulators, namely PKC and/or the calcium-calmodulin-activated phosphatase calcineurin. FSC231 limited PKC-mediated inhibition of SOCE, supporting a potential role for PICK1 in this response. Additionally, we found PICK1 inhibits ASIC1-mediated SOCE through an effect of calcineurin to dephosphorylate the channel. Furthermore, it appears PICK1/calcineurin-mediated regulation of SOCE opposes PKA phosphorylation and activation of ASIC1. Together our data suggest PKA and PICK1/calcineurin differentially regulate ASIC1-mediated SOCE and these modulatory complexes are important in determining downstream Ca(2+) signaling. PMID:26702130

  9. Integration of polymer-based optical waveguide arrays and micro/nano-photonic devices for optical printed circuit board (O-PCB) application

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, Seung Gol; O, Beom Hoan; Park, Se-Geun; Kim, Kyong Heon; Kang, Jin Ku; Choi, Young Wan

    2005-03-01

    We report, in the form of review, on the results of our study on the fabrication and assembly of polymer-based optical waveguide arrays and micro/nano-photonic devices for optical printed circuit boards (O-PCBs) application. The O-PCBs are designed to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards, substrates or chips. We have assembled and constructed O-PCBs using optical waveguide arrays and circuits made of polymer materials and have examined their information handling performances. We also designed power beam splitters and waveguide filters using nano-scale photonic band-gap crystals. We discuss scientific and technological issues concerning the processes of miniaturization, interconnection and integration of polymer optical waveguide devices and arrays for the O-PCBs as applicable to board-to-board, chip-to-chip, and intra-chip integration for computers, telecommunications, and transportation systems.

  10. Electronic design with integrated circuits

    NASA Astrophysics Data System (ADS)

    Comer, D. J.

    The book is concerned with the application of integrated circuits and presents the material actually needed by the system designer to do an effective job. The operational amplifier (op amp) is discussed, taking into account the electronic amplifier, the basic op amp, the practical op amp, analog applications, and digital applications. Digital components are considered along with combinational logic, digital subsystems, the microprocessor, special circuits, communications, and integrated circuit building blocks. Attention is given to logic gates, logic families, multivibrators, the digital computer, digital methods, communicating with a computer, computer organization, register and timing circuits for data transfer, arithmetic circuits, memories, the microprocessor chip, the control unit, communicating with the microprocessor, examples of microprocessor architecture, programming a microprocessor, the voltage-controlled oscillator, the phase-locked loop, analog-to-digital conversion, amplitude modulation, frequency modulation, pulse and digital transmission, the semiconductor diode, the bipolar transistor, and the field-effect transistor.

  11. Wein bridge oscillator circuit

    NASA Technical Reports Server (NTRS)

    Lipoma, P. C.

    1971-01-01

    Circuit with minimum number of components provides stable outputs of 2 to 8 volts at frequencies of .001 to 100 kHz. Oscillator exhibits low power consumption, portability, simplicity, and drive capability, it has application as loudspeaker tester and audible alarm, as well as in laboratory and test generators.

  12. Mice lacking Asic3 show reduced anxiety-like behavior on the elevated plus maze and reduced aggression.

    PubMed

    Wu, W-L; Lin, Y-W; Min, M-Y; Chen, C-C

    2010-08-01

    Sensing external stimulation is crucial for central processing in the brain and subsequent behavioral expression. Although sensory alteration or deprivation may result in behavioral changes, most studies related to the control of behavior have focused on central mechanisms. Here we created a sensory deficit model of mice lacking acid-sensing ion channel 3 (Asic3(-/-)) to probe behavioral alterations. ASIC3 is predominately distributed in the peripheral nervous system. RT-PCR and immunohistochemistry used to examine the expression of Asic3 in the mouse brain showed near-background mRNA and protein levels of ASIC3 throughout the whole brain, except for the sensory mesencephalic trigeminal nucleus. Consistent with the expression results, Asic3 knockout had no effect on synaptic plasticity of the hippocampus and the behavioral tasks of motor function, learning and memory. In anxiety behavior tasks, Asic3(-/-) mice spent more time in the open arms of an elevated plus maze than did their wild-type littermates. Asic3(-/-) mice also displayed less aggressiveness toward intruders but more stereotypic repetitive behaviors during resident-intruder testing than did wild-type littermates. Therefore, loss of ASIC3 produced behavioral changes in anxiety and aggression in mice, which suggests that ASIC3-dependent sensory activities might relate to the central process of emotion modulation. PMID:20497234

  13. Circuit Training.

    ERIC Educational Resources Information Center

    Nelson, Jane B.

    1998-01-01

    Describes a research-based activity for high school physics students in which they build an LC circuit and find its resonant frequency of oscillation using an oscilloscope. Includes a diagram of the apparatus and an explanation of the procedures. (DDR)

  14. VeloPix ASIC development for LHCb VELO upgrade

    NASA Astrophysics Data System (ADS)

    van Beuzekom, M.; Buytaert, J.; Campbell, M.; Collins, P.; Gromov, V.; Kluit, R.; Llopart, X.; Poikela, T.; Wyllie, K.; Zivkovic, V.

    2013-12-01

    The upgrade of the LHCb experiment, planned for 2018, will transform the readout of the entire experiment to a triggerless system operating at 40 MHz. All data reduction algorithms will be run in a high level software farm, and will have access to event information from all subdetectors. This approach will give great power and flexibility in accessing the physics channels of interest in the future, in particular the identification of flavour tagged events with displaced vertices. The data acquisition and front end electronics systems require significant modification to cope with the enormous throughput of data. For the silicon vertex locator (VELO) a dedicated development is underway for a new ASIC, VeloPix, which will be a derivative of the Timepix/Medipix family of chips. The chip will be radiation hard and be able to cope with pixel hit rates of above 500 MHz, highly non-uniformly distributed over the 2 cm2 chip area. The chip will incorporate local intelligence in the pixels for time-over-threshold measurements, time-stamping and sparse readout. It must in addition be low power, radiation hard, and immune to single event upsets. In order to cope with the datarates and use the pixel area most effectively, an on-chip data compression scheme will integrated. This paper will describe the requirements of the LHCb VELO upgrade, and give an overview of the digital architecture being developed specifically for the readout chip.

  15. Fabrication and integration of micro/nano-scale optical wire circuit arrays and devices for high-speed and compact optical printed circuit board (O-PCB) and VLSI photonic applications

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Kim, K. H.; Kang, J. K.; Choi, Y. W.; Song, S. H.

    2005-09-01

    We report on the design, fabrication and integration of micro/nano-scale optical wire circuit arrays and devices for high-speed, compact, light-weight, low power optical printed circuit boards (O-PCBs) and VLSI photonic applications. The optical wires are formed in the form of waveguides by thermal embossing and ultraviolet (UV) radiated embossing of polymer materials. The photonic devices include vertically coupled surface emitting laser (VCSEL) microlasers, microlenses, 45-degree reflection couplers, directional couplers, arrayed waveguide grating structures, multimode interference (MMI) devices and photodetectors. These devices are optically interconnected and integrated for O-PCB assembly and VLSI micro/nano-photonics. The O-PCBs are to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards or substrates. We report on the result of the optical transmission performances of these assembled O-PCBs. For the design, fabrication, and VLSI integration of nano-scale photonic devices, we used photonic crystal structures and plasmonic metallic waveguide structures. We examined the bandwidth, power dissipation, thermal stability, weight, and the miniaturization and density of optical wires and the O-PCB module. Characteristics of these devices are also described.

  16. The RS685012 Polymorphism of ACCN2, the Human Ortholog of Murine Acid-Sensing Ion Channel (ASIC1) Gene, is Highly Represented in Patients with Panic Disorder.

    PubMed

    Gugliandolo, Agnese; Gangemi, Chiara; Caccamo, Daniela; Currò, Monica; Pandolfo, Gianluca; Quattrone, Diego; Crucitti, Manuela; Zoccali, Rocco Antonio; Bruno, Antonio; Muscatello, Maria Rosaria Anna

    2016-03-01

    Panic disorder (PD) is a disabling anxiety disorder that is characterized by unexpected, recurrent panic attacks, associated with fear of dying and worrying about possible future attacks or other behavioral changes as a consequence of the attacks. The acid-sensing ion channels (ASICs) are a family of proton-sensing channels expressed throughout the nervous system. Their activity is linked to a variety of behaviors including fear, anxiety, pain, depression, learning, and memory. The human analog of ASIC1a is the amiloride-sensitive cation channel 2 (ACCN2). Adenosine A2A receptors are suggested to play an important role in different brain circuits and pathways involved in anxiety reactions. In this work we aimed to evaluate the distribution of ACCN2 rs685012 and ADORA2A rs2298383 polymorphisms in PD patients compared with healthy subjects. We found no association between ADORA2A polymorphism and PD. Instead, the C mutated allele for ACCN2 rs685012 polymorphism was significantly more frequent in patients than in controls. On the contrary, the TT homozygous wild-type genotype and also the ACCN2 TT/ADORA2A CT diplotype were significantly more represented in controls. These results are suggestive for a role of ACCN2 rs685012 polymorphism in PD development in Caucasian people. PMID:26589317

  17. Scalable, efficient ASICS for the square kilometre array: From A/D conversion to central correlation

    NASA Astrophysics Data System (ADS)

    Schmatz, M. L.; Jongerius, R.; Dittmann, G.; Anghel, A.; Engbersen, T.; van Lunteren, J.; Buchmann, P.

    2014-05-01

    The Square Kilometre Array (SKA) is a future radio telescope, currently being designed by the worldwide radio-astronomy community. During the first of two construction phases, more than 250,000 antennas will be deployed, clustered in aperture-array stations. The antennas will generate 2.5 Pb/s of data, which needs to be processed in real time. For the processing stages from A/D conversion to central correlation, we propose an ASIC solution using only three chip architectures. The architecture is scalable - additional chips support additional antennas or beams - and versatile - it can relocate its receiver band within a range of a few MHz up to 4GHz. This flexibility makes it applicable to both SKA phases 1 and 2. The proposed chips implement an antenna and station processor for 289 antennas with a power consumption on the order of 600W and a correlator, including corner turn, for 911 stations on the order of 90 kW.

  18. Functional and pharmacological characterization of two different ASIC1a/2a heteromers reveals their sensitivity to the spider toxin PcTx1.

    PubMed

    Joeres, Niko; Augustinowski, Katrin; Neuhof, Andreas; Assmann, Marc; Gründer, Stefan

    2016-01-01

    Acid Sensing Ion Channels (ASICs) detect extracellular proton signals and are involved in synaptic transmission and pain sensation. ASIC subunits assemble into homo- and heteromeric channels composed of three subunits. Single molecule imaging revealed that heteromers composed of ASIC1a and ASIC2a, which are widely expressed in the central nervous system, have a flexible 2:1/1:2 stoichiometry. It was hitherto not possible, however, to functionally differentiate these two heteromers. To have a homogenous population of ASIC1a/2a heteromers with either 2:1 or 1:2 stoichiometry, we covalently linked subunits in the desired configuration and characterized their functional properties in Xenopus oocytes. We show that the two heteromers have slightly different proton affinity, with an additional ASIC1a subunit increasing apparent affinity. Moreover, we found that zinc, which potentiates ASIC2a-containing ASICs but not homomeric ASIC1a, potentiates both heteromers. Finally, we show that PcTx1, which binds at subunit-subunit interfaces of homomeric ASIC1a, inhibits both heteromers suggesting that ASIC2a can also contribute to a PcTx1 binding site. Using this functional fingerprint, we show that rat cortical neurons predominantly express the ASIC1a/2a heteromer with a 2:1 stoichiometry. Collectively, our results reveal the contribution of individual subunits to the functional properties of ASIC1a/2a heteromers. PMID:27277303

  19. Functional and pharmacological characterization of two different ASIC1a/2a heteromers reveals their sensitivity to the spider toxin PcTx1

    PubMed Central

    Joeres, Niko; Augustinowski, Katrin; Neuhof, Andreas; Assmann, Marc; Gründer, Stefan

    2016-01-01

    Acid Sensing Ion Channels (ASICs) detect extracellular proton signals and are involved in synaptic transmission and pain sensation. ASIC subunits assemble into homo- and heteromeric channels composed of three subunits. Single molecule imaging revealed that heteromers composed of ASIC1a and ASIC2a, which are widely expressed in the central nervous system, have a flexible 2:1/1:2 stoichiometry. It was hitherto not possible, however, to functionally differentiate these two heteromers. To have a homogenous population of ASIC1a/2a heteromers with either 2:1 or 1:2 stoichiometry, we covalently linked subunits in the desired configuration and characterized their functional properties in Xenopus oocytes. We show that the two heteromers have slightly different proton affinity, with an additional ASIC1a subunit increasing apparent affinity. Moreover, we found that zinc, which potentiates ASIC2a-containing ASICs but not homomeric ASIC1a, potentiates both heteromers. Finally, we show that PcTx1, which binds at subunit-subunit interfaces of homomeric ASIC1a, inhibits both heteromers suggesting that ASIC2a can also contribute to a PcTx1 binding site. Using this functional fingerprint, we show that rat cortical neurons predominantly express the ASIC1a/2a heteromer with a 2:1 stoichiometry. Collectively, our results reveal the contribution of individual subunits to the functional properties of ASIC1a/2a heteromers. PMID:27277303

  20. Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

    NASA Astrophysics Data System (ADS)

    Ceresa, D.; Marchioro, A.; Kloukinas, K.; Kaplon, J.; Bialas, W.; Re, V.; Traversi, G.; Gaioni, L.; Ratti, L.

    2014-11-01

    The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level 1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720 pixels and 1920 strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method is presented with particular attention on the cluster reduction, position encoding and momentum discrimination logic. Concerning the architectural studies, a software test bench capable of reading physics Monte-Carlo generated events has been developed and used to validate the MPA design and to evaluate the MPA performance. The MPA-Light is scheduled to be submitted for fabrication this year and will include the full analog functions and a part of the digital logic of the final version in order to qualify the chosen VLSI technology for the analog front-end, the module assembly and the low voltage digital supply.

  1. A power management system for energy harvesting and wireless sensor networks application based on a novel charge pump circuit

    NASA Astrophysics Data System (ADS)

    Aloulou, R.; De Peslouan, P.-O. Lucas; Mnif, H.; Alicalapa, F.; Luk, J. D. Lan Sun; Loulou, M.

    2016-05-01

    Energy Harvesting circuits are developed as an alternative solution to supply energy to autonomous sensor nodes in Wireless Sensor Networks. In this context, this paper presents a micro-power management system for multi energy sources based on a novel design of charge pump circuit to allow the total autonomy of self-powered sensors. This work proposes a low-voltage and high performance charge pump (CP) suitable for implementation in standard complementary metal oxide semiconductor (CMOS) technologies. The CP design was implemented using Cadence Virtuoso with AMS 0.35μm CMOS technology parameters. Its active area is 0.112 mm2. Consistent results were obtained between the measured findings of the chip testing and the simulation results. The circuit can operate with an 800 mV supply and generate a boosted output voltage of 2.835 V with 1 MHz as frequency.

  2. ELECTRONIC PHASE CONTROL CIRCUIT

    DOEpatents

    Salisbury, J.D.; Klein, W.W.; Hansen, C.F.

    1959-04-21

    An electronic circuit is described for controlling the phase of radio frequency energy applied to a multicavity linear accelerator. In one application of the circuit two cavities are excited from a single radio frequency source, with one cavity directly coupled to the source and the other cavity coupled through a delay line of special construction. A phase detector provides a bipolar d-c output signal proportional to the difference in phase between the voltage in the two cavities. This d-c signal controls a bias supply which provides a d-c output for varying the capacitnce of voltage sensitive capacitors in the delay line. The over-all operation of the circuit is completely electronic, overcoming the time response limitations of the electromechanical control systems, and the relative phase relationship of the radio frequency voltages in the two caviiies is continuously controlled to effect particle acceleration.

  3. Cysteine 149 in the extracellular finger domain of ASIC1b subunit is critical for zinc-mediated inhibition

    PubMed Central

    JIANG, Q.; INOUE, K; WU, X.; PAPASIAN, C.J.; WANG, J. Q.; XIONG, Z.G.; CHU, X.P.

    2012-01-01

    Acid-sensing ion channel 1b (ASIC1b) is a proton-gated Na+ channel mostly expressed in peripheral sensory neurons. To date, the functional significance of ASIC1b in these cells is unclear due to the lack of a specific inhibitor/blocker. A better understanding of the regulation of ASIC1b may provide a clue for future investigation of its functional importance. One important regulator of acid-sensing ion channels (ASICs) is zinc. In this study, we examined the detailed zinc inhibition of ASIC1b currents and specific amino acid(s) involved in the inhibition. In CHO cells expressing rat ASIC1b subunit, pretreatment with zinc concentration-dependently inhibited the ASIC1b currents triggered by pH dropping from 7.4 to 6.0 with a half-maximum inhibitory concentration of 26 μM. The inhibition of ASIC1b currents by pre-applied zinc was independent of pH, voltage, or extracellular Ca2+. Further, we showed that the effect of zinc is dependent on the extracellular cysteine, but not histidine residue. Mutating cysteine 149, but not cysteine 58 or cysteine 162, located in the extracellular domain of the ASIC1b subunit abolished the zinc inhibition. These findings suggest that cysteine 149 in the extracellular finger domain of ASIC1b subunit is critical for zinc-mediated inhibition and provide the basis for future mechanistic studies addressing the functional significance of zinc inhibition of ASIC1b. PMID:21767613

  4. Proposal of preliminary device model and scaling scheme of cross-current tetrode SOI MOSFET aiming at low-energy circuit applications

    NASA Astrophysics Data System (ADS)

    Omura, Yasuhisa; Yu, Azuma; Yoshioka, Yoshimasa; Fukuchi, Kyota; Ino, Daishi

    2011-10-01

    This paper describes a preliminary attempt with a semi-analytical model and a scaling scheme of the cross-current tetrode (XCT) silicon-on-insulator (SOI) MOSFET aiming at low energy-dissipation circuit applications. The channel-current model for XCT MOSFET is separated into an intrinsic MOSFET part and a parasitic junction-gate field-effect transistor (JFET) part. Models for MOSFET and JFET are proposed by taking the potential coupling between MOSFET and JFET. The later part of the paper introduces experiments on the original SOI nMOSFET and XCT nMOSFET. This paper stresses the fundamental operations and features of the XCT device structure. Calculation results of I- V characteristics from the semi-analytical model are compared with the measurement values. It is shown that the proposed model reproduces the measured values successfully. In addition, design guidelines for XCT devices and scaling issues are discussed from the viewpoint of performance control aiming at low energy-dissipation circuit applications. Finally, preliminary circuit simulation results of XCT CMOS devices are revealed to demonstrate the definite low-energy performance.

  5. The RD27 muon trigger co-incidence array demonstrator ASIC

    SciTech Connect

    Bindra, R.; Claxton, B.; Dowdell, J.

    1996-06-01

    One aim of the RD27 project is to perform design and R and D work leading to a first level muon trigger for an experiment at the Large Hadron Collider (LHC) at CERN. This paper describes the design, implementation and testing of an ASIC for a trigger demonstrator system. The trigger system is implemented using a set of seven chambers. The low momentum trigger requires hits in three out of the four inner chambers. The high momentum trigger requires a low momentum trigger and hits in two of three outer chambers. This scheme allows for chamber inefficiencies for real muons and reduces the trigger rate from neutron and photon-induced background in the detectors. The core of the ASIC is an eight by twenty-four input double co-incidence array allowing two momentum cuts to be applied. The ASIC has multiple inputs per axis and includes the multiplicity logic. The design of the ASIC is flexible enough to demonstrate fully combinatorial operation, fully pipelined operation, or any combination of the two. The ASIC has been fabricated using a 34K gate, 0.5{micro}m CMOS gate array from Fujitsu. Testing confirms it can be pipelined at above 100MHz or fully combinatorial with a measured maximum propagation delay of 7.4ns, varying by up to 2ns depending on input pattern.

  6. Miniaturised optical sensors for industrial applications

    NASA Astrophysics Data System (ADS)

    Jakobsen, M. L.; Hanson, S. G.

    2010-04-01

    When addressing optical sensors for use in e.g. industry, compactness, robustness and performance are essentials. Adhering to these demands, we have developed a suit of compact optical sensors for the specific purposes of measuring angular velocity and linear translations of rigid objects. The technology is based on compact and low-cost laser sources such as Vertical Cavity Surface Emitting Lasers (VCSELs). The methods characterise the object motion by speckle translation in the near field (imaging) or far field (optical Fourier transform) by optical spatial filtering velocimetry. The volume of the two optical solutions is less than 1 cm3, including the application specific integrated circuit (ASIC), which processes the data and interfaces a PC/Laptop directly via a USB driver. The sensors are designed for working distances of 2 and 12 mm for near field and far field, respectively. We will consider the requirements for the optical designs in order to optimize the two sensor concepts for their respective purpose. For the angular velocity sensor the phase curvature of the illuminating beam is important in order to avoid parasitic contributions from any linear (transverse, in-plane) translations. The linear translation sensor is based on an imaging system. Therefore, the optical solution requires some kind of a beam-combining device because the VCSEL and the photodetectors being located in separate areas on the ASIC. We will present these two optical sensor designs and measurements for evaluation of their performance.

  7. Method of boundary testing of the electric circuits and its application for calculating electric tolerances. [electric equipment tests

    NASA Technical Reports Server (NTRS)

    Redkina, N. P.

    1974-01-01

    Boundary testing of electric circuits includes preliminary and limiting tests. Preliminary tests permit determination of the critical parameters causing the greatest deviation of the output parameter of the system. The boundary tests offer the possibility of determining the limits of the fitness of the system with simultaneous variation of its critical parameters.

  8. PIXIE III: a very large area photon-counting CMOS pixel ASIC for sharp X-ray spectral imaging

    NASA Astrophysics Data System (ADS)

    Bellazzini, R.; Brez, A.; Spandre, G.; Minuti, M.; Pinchera, M.; Delogu, P.; de Ruvo, P. L.; Vincenzi, A.

    2015-01-01

    PIXIE III is the third generation of very large area (32 × 25 mm2) pixel ASICs developed by Pixirad Imaging Counters s.r.l. to be used in combination with suitable X-ray sensor materials (Silicon, CdTe, GaAs) in hybrid assemblies using flip-chip bonding. A Pixirad unit module based on PIXIE III shows several advances compared to what has been available up to now. It has a very broad energy range (from 2 to 100 keV before full pulse saturation), high speed (100 ns peaking time), high frame rate (larger than 500 fps), dead-time-free operation, good energy resolution (around 2 keV at 20 keV), high photo-peak fraction and sharp spectral separation between the color images. In this paper the results obtained with PIXIE III both in a test bench set-up as well in X-ray imaging applications are discussed.

  9. Novel Compact Ultra-Wideband Bandpass Filter by Application of Short-Circuited Stubs and Stepped-Impedance-Resonator

    NASA Astrophysics Data System (ADS)

    Chen, Chun-Ping; Ma, Zhewang; Anada, Tetsuo

    To realize the compact ultra-wideband (UWB) bandpass filters, a novel filter prototype with two short-circuited stubs loaded at both sides of a stepped-impedance resonator (SIR) via the parallel coupled lines is proposed based on a distributed filter synthesis theory. The equivalent circuit of this filter is established, while the corresponding 7-pole Chebyshev-type transfer function is derived for filter synthesis. Then, a distributed-circuit-based technique was presented to synthesize the elements' values of this filter. As an example, a FCC UWB filter with the fractional bandwidth (FWB) @ -10dB up to 110% was designed using the proposed prototype and then re-modeled by commercial microwave circuit simulator to verify the correctness and accuracy of the synthesis theory. Furthermore, in terms of EM simulator, the filter was further-optimized and experimentally-realized by using microstrip line. Good agreements between the measurement results and theoretical ones validate the effectiveness of our technique. In addition, compared with the conventional SIR-type UWB filter without short-circuited stubs, the new one significantly improves the selectivity and out-of-band characteristics (especially in lower one -45dB@1-2GHz) to satisfy the FCC's spectrum mask. The designed filter also exhibits very compact size, quite low insertion loss, steep skirts, flat group delay and the easily-fabricatable structure (the coupling gap dimension in this filter is 0.15mm) as well. Moreover, it should be noted that, in terms of the presented design technique, the proposed filter prototype can be also used to easily realize the UWB filters with other FBW even greater than 110%.

  10. Atomic force microscopy imaging reveals the formation of ASIC/ENaC cross-clade ion channels

    SciTech Connect

    Jeggle, Pia; Smith, Ewan St. J.; Stewart, Andrew P.; Haerteis, Silke; Korbmacher, Christoph; Edwardson, J. Michael

    2015-08-14

    ASIC and ENaC are co-expressed in various cell types, and there is evidence for a close association between them. Here, we used atomic force microscopy (AFM) to determine whether ASIC1a and ENaC subunits are able to form cross-clade hybrid ion channels. ASIC1a and ENaC could be co-isolated from detergent extracts of tsA 201 cells co-expressing the two subunits. Isolated proteins were incubated with antibodies against ENaC and Fab fragments against ASIC1a. AFM imaging revealed proteins that were decorated by both an antibody and a Fab fragment with an angle of ∼120° between them, indicating the formation of ASIC1a/ENaC heterotrimers. - Highlights: • There is evidence for a close association between ASIC and ENaC. • We used AFM to test whether ASIC1a and ENaC subunits form cross-clade ion channels. • Isolated proteins were incubated with subunit-specific antibodies and Fab fragments. • Some proteins were doubly decorated at ∼120° by an antibody and a Fab fragment. • Our results indicate the formation of ASIC1a/ENaC heterotrimers.

  11. A Low-Power ASIC Signal Processor for a Vestibular Prosthesis.

    PubMed

    Töreyin, Hakan; Bhatti, Pamela T

    2016-06-01

    A low-power ASIC signal processor for a vestibular prosthesis (VP) is reported. Fabricated with TI 0.35 μm CMOS technology and designed to interface with implanted inertial sensors, the digitally assisted analog signal processor operates extensively in the CMOS subthreshold region. During its operation the ASIC encodes head motion signals captured by the inertial sensors as electrical pulses ultimately targeted for in-vivo stimulation of vestibular nerve fibers. To achieve this, the ASIC implements a coordinate system transformation to correct for misalignment between natural sensors and implanted inertial sensors. It also mimics the frequency response characteristics and frequency encoding mappings of angular and linear head motions observed at the peripheral sense organs, semicircular canals and otolith. Overall the design occupies an area of 6.22 mm (2) and consumes 1.24 mW when supplied with ± 1.6 V. PMID:26800546

  12. LARC-SI Flatwire Twin Conduction Circuits

    NASA Technical Reports Server (NTRS)

    1995-01-01

    Eight 2-line, L-shaped gold flex circuits have been imprinted on 1-mil LARC-SI. Each circuit was embedded in a space-applications trapezoidal truss made of carbon fiber reinforced resin composite (with protruding ends) to facilitate electrical connection of electronic devices mounted on the truss. LARC-SI is an advanced polymer highly suitable for multi layered electrical circuits.

  13. A 10 cm × 10 cm CdTe Spectroscopic Imaging Detector based on the HEXITEC ASIC

    NASA Astrophysics Data System (ADS)

    Wilson, M. D.; Dummott, L.; Duarte, D. D.; Green, F. H.; Pani, S.; Schneider, A.; Scuffham, J. W.; Seller, P.; Veale, M. C.

    2015-10-01

    The 250 μ m pitch 80x80 pixel HEXITEC detector systems have shown that spectroscopic imaging with an energy resolution of <1 keV FWHM per pixel can be readily achieved in the range of 5-200 keV with Al-pixel CdTe biased to -500 V. This level of spectroscopic imaging has a variety of applications but the ability to produce large area detectors remains a barrier to the adoption of this technology. The limited size of ASICs and defect free CdTe wafers dictates that building large area monolithic detectors is not presently a viable option. A 3-side buttable detector module has been developed to cover large areas with arrays of smaller detectors. The detector modules are 20.35 × 20.45 mm with CdTe bump bonded to the HEXITEC ASIC with coverage up to the edge of the module on three sides. The fourth side has a space of 3 mm to allow I/O wire bonds to be made between the ASIC and the edge of a PCB that routes the signals to a connector underneath the active area of the module. The detector modules have been assembled in rows of five modules with a dead space of 170 μ m between each module. Five rows of modules have been assembled in a staggered height array where the wire bonds of one row of modules are covered by the active detector area of a neighboring row. A data acquisition system has been developed to digitise, store and output the 24 Gbit/s data that is generated by the array. The maximum bias magnitude that could be applied to the CdTe detectors from the common voltage source was limited by the worst performing detector module. In this array of detectors a bias of -400 V was used and the detector modules had 93 % of pixels with better than 1.2 keV FWHM at 59.5 keV. An example of K-edge enhanced imaging for mammography was demonstrated. Subtracting images from the events directly above and below the K-edge of the Iodine contrast agent was able to extract the Iodine information from the image of a breast phantom and improve the contrast of the images. This is just

  14. Fabrication and integration of micro/nano-scale polymer optical waveguides and devices for optical printed circuit board (O-PCB) application

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, Seung Gol; O, Beom Hoan; Park, Se Geun; Kim, Kyong Heon; Kang, Jin Ku; Chin, I.; Kwon, Y. K.; Choi, Young Wan

    2005-04-01

    We report on the results of our study on the design, fabrication and integration of micro/nano-scale waveguide arrays and devices for applications for a modular system that we newly proposed and call "optical printed circuit board (O-PCB)," which we envision to use as a platform for VLSI micro/nano-photonic applications. The O-PCBs are designed to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards or substrates. We have designed and assembled O-PCBs using polymer-based optical waveguide arrays and circuits. We describe the procedures for the synthesis of polymers, procedures of forming masters and stamps, and procedures of forming waveguides using embossing techniques. We also describe the procedures of design, fabrication and construction of O-PCBs and describe the procedures for light coupling between light sources, detectors, waveguides and other functional devices. We also describe design of power beam splitters and waveguide filters using photonic band-gap crystals for VLSI photonic integration application. We also discuss the characteristics of the assembled O-PCBs and discuss their potential applications.

  15. Flexible video conference system based on ASICs and DSPs

    NASA Astrophysics Data System (ADS)

    Hu, Qiang; Yu, Songyu

    1995-02-01

    In this paper, a video conference system we developed recently is presented. In this system the video codec is compatible with CCITT H.261, the audio codec is compatible with G.711 and G.722, the channel interface circuit is designed according to CCITT H.221. In this paper emphasis is given to the video codec, which is both flexible and robust. The video codec is based on LSI LOGIC Corporation's L64700 series video compression chipset. The main function blocks of H.261, such as DCT, motion estimation, VLC, VLD, are performed by this chipset, but the chipset is a nude chipset, no peripheral function, such as memory interface, is integrated into it, this results in great difficulty to implement the system. To implement the frame buffer controller, a DSP-TMS 320c25 and a group of GALs is used, SRAM is used as a current and previous frame buffer, the DSP is not only the controller of the frame buffer, it's also the controller of the whole video codec. Because of the use of the DSP, the architecture of the video codec is very flexible, many system parameters can be reconfigured for different applications. The architecture of the whole video codec is a streamline structure. In H.261, BCH(511,493) coding is recommended to work against random errors in transmission, but if burst error occurs, it causes serious result. To solve this problem, an interleaving method is used, that means the BCH code is interleaved before it's transmitted, in the receiver it is interleaved again and the bit stream is in the original order, but the error bits are distributed into several BCH words, and the BCH decoder is able to correct it. Considering that extreme conditions may occur, a function block is implemented which is somewhat like a watchdog, it assures that the receiver can recover from errors no matter what serious error occurs in transmission. In developing the video conference system, a new synchronization problem must be solved, the monitor on the receiver can't be easily

  16. Design and performance of a custom ASIC digitizer for wire chamber readout in 65 nm CMOS technology

    NASA Astrophysics Data System (ADS)

    Lee, M. J.; Brown, D. N.; Chang, J. K.; Ding, D.; Gnani, D.; Grace, C. R.; Jones, J. A.; Kolomensky, Y. G.; von der Lippe, H.; Mcvittie, P. J.; Stettler, M. W.; Walder, J.-P.

    2015-06-01

    We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measure the absolute TDC resolution between 74 ps and 480 ps, growing with the absolute delay, and a relative time resolution of 19 ps. Resolution outliers due to cross-talk between clock signals and supply or reference voltages are seen. After calibration, the ADC displays good linearity and noise performance, with an effective number of bits of 6.9. Under normal operating conditions the circuit consumes 32 mW per channel. Potential design improvements to address the resolution drift and tails are discussed.

  17. Circuit Connectors

    NASA Technical Reports Server (NTRS)

    1979-01-01

    The U-shaped wire devices in the upper photo are Digi-Klipsm; aids to compact packaging of electrical and electronic devices. They serve as connectors linking the circuitry of one circuit board with another in multi-board systems. Digi-Klips were originally developed for Goddard Space Flight Center to meet a need for lightweight, reliable connectors to replace hand-wired connections formerly used in spacecraft. They are made of beryllium copper wire, noted for its excellent conductivity and its spring-like properties, which assure solid electrical contact over a long period of time.

  18. A multichannel time-to-digital converter ASIC with better than 3 ps RMS time resolution

    NASA Astrophysics Data System (ADS)

    Perktold, L.; Christiansen, J.

    2014-01-01

    The development of a new multichannel, fine-time resolution time-to-digital converter (TDC) ASIC is currently under development at CERN. A prototype TDC has been designed, fabricated and successfully verified with demonstrated time resolutions of better than 3 ps-rms. Least-significant-bit (LSB) sizes as small as 5 ps with a differential-non-linearity (DNL) of better than ±0.9 LSB and integral-non-linearity (INL) of better than ±1.3 LSB respectively have been achieved. The contribution describes the implemented architecture and presents measurement results of a prototype ASIC implemented in a commercial 130 nm technology.

  19. Channel control ASIC for the CMS hadron calorimeter front end readout module

    SciTech Connect

    Ray Yarema et al.

    2002-09-26

    The Channel Control ASIC (CCA) is used along with a custom Charge Integrator and Encoder (QIE) ASIC to digitize signals from the hybrid photo diodes (HPDs) and photomultiplier tubes (PMTs) in the CMS hadron calorimeter. The CCA sits between the QIE and the data acquisition system. All digital signals to and from the QIE pass through the CCA chip. One CCA chip interfaces with two QIE channels. The CCA provides individually delayed clocks to each of the QIE chips in addition to various control signals. The QIE sends digitized PMT or HPD signals and time slice information to the CCA, which sends the data to the data acquisition system through an optical link.

  20. Development and experimental study of the readout ASIC for muon chambers of the CBM experiment

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Ivanov, V.; Ivanov, P.; Khanzadeev, A.; Malankin, E.; Normanov, D.; Roshchin, E.; Samsonov, V.; Shumikhin, V.; Voronin, A.

    2016-01-01

    The measurement results of the front-end ASIC for the GEM detector read-out are presented. The MUCH ASIC v2 was designed and prototyped via Europractice by means of the 0.18 um CMOS MMRF process of UMC (Taiwan). The parameters of the analog channels, including the CSA, fast and slow shapers, discriminators, were measured. The channels provide a sufficient dynamic range of 100 fC, low power consumption of 10 mW per channel and ENC of 1550 el at a 50 pF detector capacitance.

  1. PETA4: a multi-channel TDC/ADC ASIC for SiPM readout

    NASA Astrophysics Data System (ADS)

    Sacco, I.; Fischer, P.; Ritzert, M.

    2013-12-01

    The PETA4 ASIC is the latest member of a family of chips targeted mainly at the readout of Silicon Photomultipliers in PET, with possible use in other detector applications. PETA4 houses 36 channels on a 5 × 5mm2 die and is fabricated in the UMC 180nm technology. It uses bump bonds with a convenient pitch of ≈ 270μm to allow the construction of very compact modules at moderate substrate cost. The chip requires nearly no external components by integrating everything (PLL loop filter, bandgap reference, bias DACs,...) on chip. Power consumption is <= 40mW per channel, depending on digital speed and bias settings. Every channel has two independent frontends: an established differential amplifier which has shown to be insensitive to pickup in the target application of PET/MRI, and a single-ended frontend with very low input impedance (Zin ≈ 7Ω) for high channel count operation. A fast discriminator with tunable threshold and a noise of <= 300μV self-triggers time stamping with a bin width of 50ps as well as an integrator with programmable integration time. The amplitude signal is converted by a ≈ 9-bit SAR ADC. After conversion, events with sufficient amplitude are queued for serial readout. The previous chip version PETA3 has achieved a CRT time resolution of ≈ 200ps when reading out scintillation light from a 3 × 3×5mm3 LYSO crystal coupled at room temperature to a 3 × 3mm2 SiPM from FBK. Energy resolution for LYSO is ≈ 12.5%FWHM. LYSO crystals of 1.3mm size could be clearly identified with SiPMs of 4 × 4mm2 when using a light spreader. The architecture of PETA4 and its performance in the lab and with SiPMs will be presented.

  2. Investigation on critical breakdown electric field of hot sulfur hexafluoride/carbon tetrafluoride mixtures for high voltage circuit breaker applications

    NASA Astrophysics Data System (ADS)

    Wang, Weizong; Murphy, Anthony B.; Rong, Mingzhe; Looe, Hui M.; Spencer, Joseph W.

    2013-09-01

    Sulfur hexafluoride (SF6) gas, widely used in high-voltage circuit breakers, has a high global warming potential and hence substitutes are being sought. The use of a mixture of carbon tetrafluoride (CF4) and SF6 is examined here. It is known that this reduces the breakdown voltage at room temperature. However, the electrical breakdown in a circuit breaker after arc interruption occurs in a hot gas environment, with a complicated species composition because of the occurrence of dissociation and other reactions. The likelihood of breakdown depends on the electron interactions with all these species. The critical reduced electric field strength (the field at which breakdown can occur, relative to the number density) of hot SF6/CF4 mixtures corresponding to the dielectric recovery phase of a high voltage circuit breaker is calculated in the temperature range from 300 K to 3500 K. The equilibrium compositions of hot SF6/CF4 mixtures under different mixing fractions were determined based on Gibbs free energy minimization. Full sets of improved cross sections for interactions between electrons and the species present are presented. The critical reduced electric field strength of these mixtures was obtained by balancing electron generation and loss mechanisms. These were evaluated using the electron energy distribution function derived from the Boltzmann transport equation under the two-term approximation. The result indicates that critical electric field strength decreases with increasing heavy-particle temperature from 1500 to 3500 K. Good agreement was found between calculations for pure hot SF6 and pure hot CF4 and experimental results and previous calculations. The addition of CF4 to SF6 was found to increase the critical reduced electric field strength for temperatures above 1500 K, indicating the potential of replacing SF6 by SF6/CF4 mixtures in high-voltage circuit breakers.

  3. SU-E-E-08: Applications of the Quantization of Coupled Circuits in Radiation Physics (design of Klystron, Bremsstrahlung, Synchrotron)

    SciTech Connect

    Ulmer, W

    2015-06-15

    Purpose: During the past decade the quantization of coupled/forced electromagnetic circuits with or without Ohm’s resistance has gained the subject of some fundamental studies, since even problems of quantum electrodynamics can be solved in an elegant manner, e.g. the creation of quantized electromagnetic fields. In this communication, we shall use these principles to describe optimization procedures in the design of klystrons, synchrotron irradiation and high energy bremsstrahlung. Methods: The base is the Hamiltonian of an electromagnetic circuit and the extension to coupled circuits, which allow the study of symmetries and perturbed symmetries in a very apparent way (SU2, SU3, SU4). The introduction resistance and forced oscillators for the emission and absorption in such coupled systems provides characteristic resonance conditions, and atomic orbitals can be described by that. The extension to virtual orbitals leads to creation of bremsstrahlung, if the incident electron (velocity v nearly c) is described by a current, which is associated with its inductivitance and the virtual orbital to the charge distribution (capacitance). Coupled systems with forced oscillators can be used to amplify drastically the resonance frequencies to describe klystrons and synchrotron radiation. Results: The cross-section formula for bremsstrahlung given by the propagator method of Feynman can readily be derived. The design of klystrons and synchrotrons inclusive the radiation outcome can be described and optimized by the determination of the mutual magnetic couplings between the oscillators induced by the currents. Conclusions: The presented methods of quantization of circuits inclusive resistance provide rather a straightforward way to understand complex technical processes such as creation of bremsstrahlung or creation of radiation by klystrons and synchrotrons. They can either be used for optimization procedures and, last but not least, for pedagogical purposes with regard to

  4. LOGIC CIRCUIT

    DOEpatents

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  5. External cavity based single mode Fabry-Pérot laser diode and its application towards all-optical digital circuits

    NASA Astrophysics Data System (ADS)

    Nakarmi, Bikash; Zhang, Xuping; Won, Yong Hyub

    2012-11-01

    We have proposed a novel approach of realizing all-optical logic gates and combinational circuit using external cavity based single mode Fabry-Pérot laser diodes (SMFP-LDs). Different techniques and critical parameters for injection locking the any one of the modes of SMFP-LDs are discussed. Taking consideration of wavelength detuning and input injected power, we have proposed and demonstrated multi-input injection locking, supporting beam injection locking with the conventional injection locking which are used for demonstrating different logic gates (NAND, AND, XNOR, XOR, NOT, NOR) and digital circuits (Half adder and Comparator). Since we have used SMFP-LDs, there is no requirement of additional probe beam and associated components as required by other optical technologies making the realization simple in configuration, cost effective and power efficient. Clear output waveforms, eye diagrams, risingfalling times and BER are presented to verify the proposed method. All-optical logic units and digital circuit are demonstrated at the data rate of 10 Gbps with the waveform of NRZ signal waveform and measured eye diagram and BER of the PRBS of 231-1 signal. The maximum power penalty among all demonstrated units is below 1.4 dB at the BER of 10-9.

  6. Neuromorphic silicon neuron circuits.

    PubMed

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin-Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  7. Neuromorphic Silicon Neuron Circuits

    PubMed Central

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  8. Ultra-large Angle Curved Reflectors and Their Applications to Passive and Active Photonic Integrated Circuit Devices

    NASA Astrophysics Data System (ADS)

    Hou, Zhenyu

    Nanoscale optical components such as waveguides, resonators are the building blocks of integrated optical networks. With the advent of nano-fabrication technologies we are able to realize such components in strongly confined sub-micron dimensions. A photonic integrated circuit (PIC) that contains these components integrates multiple photonic functions on a single chip. Traditionally, functionality of PIC is realized via modification of waveguide structure. on the contrary, reflective components such as curved reflectors propagate light in two dimensional free space thence have many advantages over their refractive counterparts such as tighter space requirement, more flexibility, and lower loss. In this work, we propose curved reflector as an essential component to realize multiple integrated functions in PICs. These functions include spot size conversion, beam turning, waveguide crossing, etc. Waveguide taper, bended waveguide, direct waveguide crossing are the conventional counterparts to realize such functions. In particular, we proposed and realized photonic integrated interconnections using curved reflectors and curved reflector semiconductor optical amplifier (CR-SOA). In this thesis, theoretically analysis of curved reflectors is introduced and discussed in depth. Gaussian beam analysis, in particular, Hermite-Gaussian beam analysis is used to explain light propagation and distortion in interaction with curved reflectors. Theoretical formulation of beam propagation in presence of curved reflector is verified with Finite-Difference Time-Domain (FDTD) method. General design strategies of curved reflectors are proposed. Multiple applications of curved reflector in passive and active devices are introduced. Distortions induced in light beams by curved reflectors, its original, theoretical description, and compensation methods are discussed in details as well. Photonic integrated interconnection based on silicon-on-insulator (SOI) platform and curved reflector

  9. Monolithic Optoelectronic Integrated Circuit

    NASA Technical Reports Server (NTRS)

    Bhasin, Kul B.; Walters, Wayne; Gustafsen, Jerry; Bendett, Mark

    1990-01-01

    Monolithic optoelectronic integrated circuit (OEIC) receives single digitally modulated input light signal via optical fiber and converts it into 16-channel electrical output signal. Potentially useful in any system in which digital data must be transmitted serially at high rates, then decoded into and used in parallel format at destination. Applications include transmission and decoding of control signals to phase shifters in phased-array antennas and also communication of data between computers and peripheral equipment in local-area networks.

  10. MULTICHANNEL ENERGY AND TIMING MEASUREMENTS WITH THE PEAK DETECTOR/DERANDOMIZER ASIC.

    SciTech Connect

    O'CONNOR,P.; DE GERONIMO,G.; GROSHOLZ,J.; KANDASAMY,A.; JUNNARKAR,S.; FRIED,J.

    2004-10-16

    The Peak Detector/Derandomizer ASIC (PDD) provides threshold discrimination, peak detection, time-to-amplitude conversion, analog memory, sparsification, and multiplexing for 32 channels of analog pulse data. In this work the spectroscopic capabilities of the chip (high resolution and high rate) are demonstrated along with correlated measurements of pulse risetime. Imaging and coincidence detection using the PDD chip will also be illustrated.

  11. Electrical Characterization of Metal Insulator Metal Capacitors with Atomic-Layer-Deposited HfO2 Dielectrics for Radio Frequency Integrated Circuit Application

    NASA Astrophysics Data System (ADS)

    Huang, Yu-Jian; Huang, Yue; Ding, Shi-Jin; Zhang, Wei; Liu, Ran

    2007-10-01

    Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited HfO2 dielectric and TaN electrodes are investigated for rf integrated circuit applications. For 12 nm HfO2, the fabricated capacitor exhibits a high capacitance density of 15.5 fF/μm2 at 100 kHz, a small leakage current density of 6.4×10-9 A/cm2 at 1.8 V and 125°C, a breakdown electric field of 2.6 MV/cm as well as voltage coefficients of capacitance (VCCs) of 2110 ppm/V2 and -824 ppm/V at 100 kHz. Further, it is deduced that the conduction mechanism in the high field range is dominated by the Poole-Frenkel emission, and the conduction mechanism in the low field range is possibly related to trap-assisted tunnelling. Finally, comparison of various HfO2 MIM capacitors is present, suggesting that the present MIM capacitor is a promising candidate for future rf integrated circuit application.

  12. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  13. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, W.J.

    1981-11-10

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

  14. Graph-Based Symbolic Technique and Its Application in the Frequency Response Bound Analysis of Analog Integrated Circuits

    PubMed Central

    Tlelo-Cuautle, E.; Rodriguez-Chavez, S.; Palma-Rodriguez, A. A.

    2014-01-01

    A new graph-based symbolic technique (GBST) for deriving exact analytical expressions like the transfer function H(s) of an analog integrated circuit (IC), is introduced herein. The derived H(s) of a given analog IC is used to compute the frequency response bounds (maximum and minimum) associated to the magnitude and phase of H(s), subject to some ranges of process variational parameters, and by performing nonlinear constrained optimization. Our simulations demonstrate the usefulness of the new GBST for deriving the exact symbolic expression for H(s), and the last section highlights the good agreement between the frequency response bounds computed by our variational analysis approach versus traditional Monte Carlo simulations. As a conclusion, performing variational analysis using our proposed GBST for computing the frequency response bounds of analog ICs, shows a gain in computing time of 100x for a differential circuit topology and 50x for a 3-stage amplifier, compared to traditional Monte Carlo simulations. PMID:25136650

  15. Development of Radiation-Tolerant, Low Mass, High Bandwidth Flexible Printed Circuit Cables for Particle Detection Applications

    NASA Astrophysics Data System (ADS)

    McFadden, Neil

    2016-03-01

    Design options for meter long flexible printed circuit cables required for low mass ultra-high speed signal transmission in the high radiation environment at the High Luminosity run of the Large Hadron Collider (LHC) are described. Two dielectric materials were considered in this study, Kapton and a Kapton/Teflon mixture. The design geometry is a differential embedded microstrip with nominal 100 Ω impedance. Minimal mass and maximal radiation hardness are pre-eminent considerations. The long flexible printed circuit cables are characterized in bit error rate tests (BERT), attenuation versus frequency, mechanical response to stress and temperature change, and RLC decomposition. These tests are performed before and after irradiation with 1 MeV neutrons to 2x1016/cm 2 and 800 MeV protons to 2x1016 1 MeV-neq/cm2. A 1.0 m Kapton cable, with bandwidth of 6.22 gigabits per second, 0.03% of a radiation length, and no radiation induced mechanical or electrical degradation is obtained.

  16. Sheath expansion and plasma dynamics in the presence of electrode evaporation: Application to a vacuum circuit breaker

    SciTech Connect

    Sarrailh, P.; Garrigues, L.; Hagelaar, G. J. M.; Boeuf, J. P.; Sandolache, G.; Rowe, S.

    2009-09-01

    During the postarc dielectric recovery phase in a vacuum circuit breaker, a cathode sheath forms and expels the plasma from the electrode gap. The success or failure of current breaking depends on how efficiently the plasma is expelled from the electrode gap. The sheath expansion in the postarc phase can be compared to sheath expansion in plasma immersion ion implantation except that collisions between charged particles and atoms generated by electrode evaporation may become important in a vacuum circuit breaker. In this paper, we show that electrode evaporation plays a significant role in the dynamics of the sheath expansion in this context not only because charged particle transport is no longer collisionless but also because the neutral flow due to evaporation and temperature gradients may push the plasma toward one of the electrodes. Using a hybrid model of the nonequilibrium postarc plasma and cathode sheath coupled with a direct simulation Monte Carlo method to describe collisions between heavy species, we present a parametric study of the sheath and plasma dynamics and of the time needed for the sheath to expel the plasma from the gap for different values of plasma density and electrode temperatures at the beginning of the postarc phase. This work constitutes a preliminary step toward understanding and quantifying the risk of current breaking failure of a vacuum arc.

  17. All Spin Digital Circuits

    NASA Astrophysics Data System (ADS)

    Behin-Aein, Behtash; Datta, Deepanjan; Salahuddin, Sayeef; Datta, Supriyo

    2009-03-01

    Switching of a magnetic free layer using spin polarized current has been demonstrated in Magnetic Tunnel Junction (MTJ) devices. Currently MTJ's are being studied for memory and microwave oscillator applications. The purpose of this talk is to explore a modified MTJ where a clock pulse via the fixed layer facilities the switching of the free layer in accordance with a weak bias provided by an input magnet in the form of a spin current. Based on the Landau-Lifshitz-Gilbert equation (LLG) augmented with spin torque functions, we show the switching energy and the switching time of the free layer which indicates the possibility of very low power digital logic applications. Ordinary digital circuits store information in the form of capacitor charges that communicate through electrical interconnects. The purpose of this paper is to show that modified MTJ's can be the basis for all spin digital circuits. Our primary objective is to stimulate proof of concept experiments that could usher in a whole new set of devices suitable for spintronic circuits.

  18. GAS PHOTOTUBE CIRCUIT

    DOEpatents

    Richardson, J.H.

    1958-03-01

    This patent pertains to electronic circuits for measuring the intensity of light and is especially concerned with measurement between preset light thresholds. Such a circuit has application in connection with devices for reading-out information stored on punch cards or tapes where the cards and tapes are translucent. By the novel arrangement of this invention thc sensitivity of a gas phototube is maintained at a low value when the light intensity is below a first threshold level. If the light level rises above the first threshold level, the tube is rendered highly sensitive and an output signal will vary in proportion to the light intensity change. When the light level decreases below a second threshold level, the gas phototube is automatically rendered highly insensitive. Each of these threshold points is adjustable.

  19. ASIC1-mediated calcium entry stimulates NFATc3 nuclear translocation via PICK1 coupling in pulmonary arterial smooth muscle cells.

    PubMed

    Gonzalez Bosc, Laura V; Plomaritas, Danielle R; Herbert, Lindsay M; Giermakowska, Wieslawa; Browning, Carly; Jernigan, Nikki L

    2016-07-01

    The development of chronic hypoxia (CH)-induced pulmonary hypertension is associated with increased pulmonary arterial smooth muscle cell (PASMC) Ca(2+) influx through acid-sensing ion channel-1 (ASIC1) and activation of the Ca(2+)/calcineurin-dependent transcription factor known as nuclear factor of activated T-cells isoform c3 (NFATc3). Whether Ca(2+) influx through ASIC1 contributes to NFATc3 activation in the pulmonary vasculature is unknown. Furthermore, both ASIC1 and calcineurin have been shown to interact with the scaffolding protein known as protein interacting with C kinase-1 (PICK1). In the present study, we tested the hypothesis that ASIC1 contributes to NFATc3 nuclear translocation in PASMC in a PICK1-dependent manner. Using both ASIC1 knockout (ASIC1(-/-)) mice and pharmacological inhibition of ASIC1, we demonstrate that ASIC1 contributes to CH-induced (1 wk at 380 mmHg) and endothelin-1 (ET-1)-induced (10(-7) M) Ca(2+) responses and NFATc3 nuclear import in PASMC. The interaction between ASIC1/PICK1/calcineurin was shown using a Duolink in situ Proximity Ligation Assay. Inhibition of PICK1 by using FSC231 abolished ET-1-induced and ionomycin-induced NFATc3 nuclear import, but it did not alter ET-1-mediated Ca(2+) responses, suggesting that PICK1 acts downstream of Ca(2+) influx. The key findings of the present work are that 1) Ca(2+) influx through ASIC1 mediates CH- and ET-1-induced NFATc3 nuclear import and 2) the scaffolding protein PICK1 is necessary for NFATc3 nuclear import. Together, these data provide an essential link between CH-induced ASIC1-mediated Ca(2+) influx and activation of the NFATc3 transcription factor. Identification of this ASIC1/PICK1/NFATc3 signaling complex increases our understanding of the mechanisms contributing to the vascular remodeling and increased vascular contractility that are associated with CH-induced pulmonary hypertension. PMID:27190058

  20. Electronic circuits: A compilation. [for electronic equipment in telecommunication

    NASA Technical Reports Server (NTRS)

    1976-01-01

    A compilation containing articles on newly developed electronic circuits and systems is presented. It is divided into two sections: (1) section 1 on circuits and techniques of particular interest in communications technology, and (2) section 2 on circuits designed for a variety of specific applications. The latest patent information available is also given. Circuit diagrams are shown.

  1. Design, fabrication, and integration of micro/nano-scale optical waveguide arrays and devices for optical printed circuit board (O-PCB) and VLSI micro/nano-photonic application

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, S. G.; O, B. H.; Kim, K. H.; Kang, J. K.; Kwon, Y. K.; Chin, I.-J.; Choi, Y. W.; Song, S. H.

    2005-09-01

    We present a review of our work on the micro/nano-scale design, fabrication and integration of optical waveguide arrays and devices for applications in a newly-conceived optical module system that we call "optical printed circuit board" (O-PCBs) and VLSI micro/nano-photonic integrated circuit. The O-PCBs consist of planar circuits and arrays of waveguides and devices of various dimensions and characteristics to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards. The VLSI micro/nano-photonic integrated circuits perform similar functions on a chip scale. O-PCBs consist of planar circuits and arrays of waveguides and devices of various dimensions and characteristics to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards. Fundamentally it contrasts with the electrical printed circuit board (E-PCB), which is designed to perform transporting, processing and distributing electrical signals. We have assembled O-PCBs using optical waveguide arrays and circuits made of polymer materials and have examined information handling performances when they are interconnected with the micro-laser arrays, detector arrays and optoelectronic devices. For VLSI nano-scale photonic inte-gration and applications, we designed power splitters and waveguide filters using photonic band-gap crystals and plasmonic waveguide structures. We discuss scientific issues and technological issues concerning the minia-turization, interconnection, and integration of micro/nano-photonic devices and circuits and discuss potential utilities of O-PCBs and VLSI micro/nano-photonics for applications in computers, telecommunication systems, transportation systems, and bio-sensing microsystems.

  2. Photomultiplier blanking circuit

    NASA Technical Reports Server (NTRS)

    Mcclenahan, J. O.

    1972-01-01

    Circuit for protecting photomultiplier equipment from current surges which occur when exposed to brilliant illumination is discussed. Components of circuit and details of operation are provided. Circuit diagram to show action of blanking pulse on zener diode is included.

  3. Monitoring of bacteria growth using a wireless, remote query resonant-circuit sensor: application to environmental sensing

    NASA Technical Reports Server (NTRS)

    Ong, K. G.; Wang, J.; Singh, R. S.; Bachas, L. G.; Grimes, C. A.; Daunert, S. (Principal Investigator)

    2001-01-01

    A new technique is presented for in-vivo remote query measurement of the complex permittivity spectra of a biological culture solution. A sensor comprised of a printed inductor-capacitor resonant-circuit is placed within the culture solution of interest, with the impedance spectrum of the sensor measured using a remotely located loop antenna; the complex permittivity spectra of the culture is calculated from the measured impedance spectrum. The remote query nature of the sensor platform enables, for example, the in-vivo real-time monitoring of bacteria or yeast growth from within sealed opaque containers. The wireless monitoring technique does not require a specific alignment between sensor and antenna. Results are presented for studies conducted on laboratory strains of Bacillus subtilis, Escherichia coli JM109, Pseudomonas putida and Saccharomyces cerevisiae.

  4. Monitoring of bacteria growth using a wireless, remote query resonant-circuit sensor: application to environmental sensing.

    PubMed

    Ong, K G; Wang, J; Singh, R S; Bachas, L G; Grimes, C A

    2001-06-01

    A new technique is presented for in-vivo remote query measurement of the complex permittivity spectra of a biological culture solution. A sensor comprised of a printed inductor-capacitor resonant-circuit is placed within the culture solution of interest, with the impedance spectrum of the sensor measured using a remotely located loop antenna; the complex permittivity spectra of the culture is calculated from the measured impedance spectrum. The remote query nature of the sensor platform enables, for example, the in-vivo real-time monitoring of bacteria or yeast growth from within sealed opaque containers. The wireless monitoring technique does not require a specific alignment between sensor and antenna. Results are presented for studies conducted on laboratory strains of Bacillus subtilis, Escherichia coli JM109, Pseudomonas putida and Saccharomyces cerevisiae. PMID:11390218

  5. Energy dispersive CdTe and CdZnTe detectors for spectral clinical CT and NDT applications

    PubMed Central

    Barber, W. C.; Wessel, J. C.; Nygard, E.; Iwanczyk, J. S.

    2014-01-01

    We are developing room temperature compound semiconductor detectors for applications in energy-resolved high-flux single x-ray photon-counting spectral computed tomography (CT), including functional imaging with nanoparticle contrast agents for medical applications and non destructive testing (NDT) for security applications. Energy-resolved photon-counting can provide reduced patient dose through optimal energy weighting for a particular imaging task in CT, functional contrast enhancement through spectroscopic imaging of metal nanoparticles in CT, and compositional analysis through multiple basis function material decomposition in CT and NDT. These applications produce high input count rates from an x-ray generator delivered to the detector. Therefore, in order to achieve energy-resolved single photon counting in these applications, a high output count rate (OCR) for an energy-dispersive detector must be achieved at the required spatial resolution and across the required dynamic range for the application. The required performance in terms of the OCR, spatial resolution, and dynamic range must be obtained with sufficient field of view (FOV) for the application thus requiring the tiling of pixel arrays and scanning techniques. Room temperature cadmium telluride (CdTe) and cadmium zinc telluride (CdZnTe) compound semiconductors, operating as direct conversion x-ray sensors, can provide the required speed when connected to application specific integrated circuits (ASICs) operating at fast peaking times with multiple fixed thresholds per pixel provided the sensors are designed for rapid signal formation across the x-ray energy ranges of the application at the required energy and spatial resolutions, and at a sufficiently high detective quantum efficiency (DQE). We have developed high-flux energy-resolved photon-counting x-ray imaging array sensors using pixellated CdTe and CdZnTe semiconductors optimized for clinical CT and security NDT. We have also fabricated high

  6. Energy dispersive CdTe and CdZnTe detectors for spectral clinical CT and NDT applications

    NASA Astrophysics Data System (ADS)

    Barber, W. C.; Wessel, J. C.; Nygard, E.; Iwanczyk, J. S.

    2015-06-01

    We are developing room temperature compound semiconductor detectors for applications in energy-resolved high-flux single x-ray photon-counting spectral computed tomography (CT), including functional imaging with nanoparticle contrast agents for medical applications and non-destructive testing (NDT) for security applications. Energy-resolved photon-counting can provide reduced patient dose through optimal energy weighting for a particular imaging task in CT, functional contrast enhancement through spectroscopic imaging of metal nanoparticles in CT, and compositional analysis through multiple basis function material decomposition in CT and NDT. These applications produce high input count rates from an x-ray generator delivered to the detector. Therefore, in order to achieve energy-resolved single photon counting in these applications, a high output count rate (OCR) for an energy-dispersive detector must be achieved at the required spatial resolution and across the required dynamic range for the application. The required performance in terms of the OCR, spatial resolution, and dynamic range must be obtained with sufficient field of view (FOV) for the application thus requiring the tiling of pixel arrays and scanning techniques. Room temperature cadmium telluride (CdTe) and cadmium zinc telluride (CdZnTe) compound semiconductors, operating as direct conversion x-ray sensors, can provide the required speed when connected to application specific integrated circuits (ASICs) operating at fast peaking times with multiple fixed thresholds per pixel provided the sensors are designed for rapid signal formation across the x-ray energy ranges of the application at the required energy and spatial resolutions, and at a sufficiently high detective quantum efficiency (DQE). We have developed high-flux energy-resolved photon-counting x-ray imaging array sensors using pixellated CdTe and CdZnTe semiconductors optimized for clinical CT and security NDT. We have also fabricated high

  7. Study of high speed quenching circuits in photon counting imaging lidar system

    NASA Astrophysics Data System (ADS)

    Zheng, Xiangyang; Ding, Yuxing; Huang, Genghua; Shu, Rong

    2015-10-01

    Detection theory of single photon avalanche diodes(SPADs),which are applied in photon counting imaging light detection and ranging(LIDAR)system, is analyzed in detail in this paper. Four types of common quenching circuits based on SPADs, namely passive quenching, active quenching, gate-control quenching, and hybrid quenching circuits are studied. Furthermore,operational principle and performance characteristics of each of these four types of quenching circuits are fully discussed. Besides, an improved hybrid quenching circuit prone to be integrated with ASIC technology is brought up. Analysis shows that this new circuit can quench and reset SPADs with high speed, meeting the demands for qualities of quenching circuits in photon counting imaging LIDAR system. Also, results of theoretical study indicate that some performance indexes like response rate, quenching speed and dead time are satisfactory. Above all, this quenching circuit is simpler in structure and its cost is much smaller compared with common quenching circuits known to us in papers published so far. As a result, the prospect of this new circuit is probably good after more efforts are taken to integrate it with photon counting imaging LIDAR.

  8. Principles of Genetic Circuit Design

    PubMed Central

    Brophy, Jennifer A.N.; Voigt, Christopher A.

    2014-01-01

    Cells are able to navigate environments, communicate, and build complex patterns by initiating gene expression in response to specific signals. Engineers need to harness this capability to program cells to perform tasks or build chemicals and materials that match the complexity seen in nature. This review describes new tools that aid the construction of genetic circuits. We show how circuit dynamics can be influenced by the choice of regulators and changed with expression “tuning knobs.” We collate the failure modes encountered when assembling circuits, quantify their impact on performance, and review mitigation efforts. Finally, we discuss the constraints that arise from operating within a living cell. Collectively, better tools, well-characterized parts, and a comprehensive understanding of how to compose circuits are leading to a breakthrough in the ability to program living cells for advanced applications, from living therapeutics to the atomic manufacturing of functional materials. PMID:24781324

  9. pH-evoked dural afferent signaling is mediated by ASIC3 and is sensitized by mast cell mediators

    PubMed Central

    Yan, Jin; Wei, Xiaomei; Bischoff, Christina; Edelmayer, Rebecca M.; Dussor, Gregory

    2013-01-01

    Background Prior studies have shown that decreased meningeal pH activates dural afferents via opening of acid-sensing ion channels (ASICs) suggesting one pathophysiological mechanism for the generation of headaches. The studies described here further examined the ASIC subtype mediating pH-induced dural-afferent activation and examined whether sensitization influences pH responses. Objective Given the potential importance of meningeal mast cells to headache, the goal of this study was to evaluate dural afferent responses to pH following sensitization with mast cell mediators. Methods Cutaneous allodynia was measured in rats following stimulation of the dura with decreased pH alone or in combination with mast cell mediators. Trigeminal ganglion neurons retrogradely-labeled from the dura were stained with an ASIC3 antibody using immunohistochemistry. Currents and action potentials evoked by changes in pH alone or in combination with mast cell mediators were measured in retrogradely-labeled dural afferents using patch-clamp electrophysiology. Results pH-sensitive dural afferents generated currents in response to the ASIC3 activator 2-guanidine-4-methylquinazoline (GMQ), approximately 80% of these neurons express ASIC3 protein, and pH-evoked behavioral responses were inhibited by the ASIC3 blocker APETx2. Following exposure to mast cell mediators, dural afferents exhibited increased pH-evoked excitability and cutaneous allodynia was observed at higher pH than with pH stimuli alone. Conclusion These data indicate that the predominant ASIC subtype responding to decreased meningeal pH is ASIC3. Additionally, they demonstrate that in the presence of inflammation, dural afferents respond to even smaller decreases in pH providing further support for the ability of small pH changes within the meninges to initiate afferent input leading to headache. PMID:23808707

  10. Differential Regulation of Proton-Sensitive Ion Channels by Phospholipids: A Comparative Study between ASICs and TRPV1

    PubMed Central

    Kweon, Hae-Jin; Yu, Soo-Young; Kim, Dong-Il; Suh, Byung-Chang

    2015-01-01

    Protons are released in pain-generating pathological conditions such as inflammation, ischemic stroke, infection, and cancer. During normal synaptic activities, protons are thought to play a role in neurotransmission processes. Acid-sensing ion channels (ASICs) are typical proton sensors in the central nervous system (CNS) and the peripheral nervous system (PNS). In addition to ASICs, capsaicin- and heat-activated transient receptor potential vanilloid 1 (TRPV1) channels can also mediate proton-mediated pain signaling. In spite of their importance in perception of pH fluctuations, the regulatory mechanisms of these proton-sensitive ion channels still need to be further investigated. Here, we compared regulation of ASICs and TRPV1 by membrane phosphoinositides, which are general cofactors of many receptors and ion channels. We observed that ASICs do not require membrane phosphatidylinositol 4-phosphate (PI(4)P) or phosphatidylinositol 4,5-bisphosphate (PI(4,5)P2) for their function. However, TRPV1 currents were inhibited by simultaneous breakdown of PI(4)P and PI(4,5)P2. By using a novel chimeric protein, CF-PTEN, that can specifically dephosphorylate at the D3 position of phosphatidylinositol 3,4,5-trisphosphate (PI(3,4,5)P3), we also observed that neither ASICs nor TRPV1 activities were altered by depletion of PI(3,4,5)P3 in intact cells. Finally, we compared the effects of arachidonic acid (AA) on two proton-sensitive ion channels. We observed that AA potentiates the currents of both ASICs and TRPV1, but that they have different recovery aspects. In conclusion, ASICs and TRPV1 have different sensitivities toward membrane phospholipids, such as PI(4)P, PI(4,5)P2, and AA, although they have common roles as proton sensors. Further investigation about the complementary roles and respective contributions of ASICs and TRPV1 in proton-mediated signaling is necessary. PMID:25781982

  11. Photonic Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Merritt, Scott; Krainak, Michael

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  12. Photonic Integrated Circuits Based on Plasmonics and Quantum Dot Materials: Properties, Compensation of Optical Losses and Applications

    NASA Astrophysics Data System (ADS)

    Thylen, Lars

    2010-03-01

    Nanophotonics and plasmonics have received much attention recently, fuelled by a general interest in nanotechnology but also by rapid advances in integrated photonics, mainly brought about by using silicon, with larger refractive index difference than previously employed [L. Thylen et al, J. Zhejiang Univ. SCIENCE 2006 7(12)]. Plasmonics offers a possibility for devices with field sizes much smaller than the wavelength of light in aa host medium. But the tighter the field confinement, the greater are generally the optical losses, determined by the imaginary part of epsilon. This remains a critical issue. Dissipative losses impede the ubiquitous usefulness of nanophotonics light wave circuits. Recently, optical gain in quantum dots for reducing or compensate losses was analyzed [A Bratkovsky et al, Applied Physics Letters 93, 193106 (2008)]. However, the concomitant effects of the high (but not unreachable) gain required for this are high power dissipation and signal to noise ratio degradation. Power dissipation is primarily due to the losses of the metal structures and Auger recombination in the quantum dots. A general and square chip size independent expression for the information capacity of a lossless (by amplification) plasmonic chip is given, using the allowed values for integrated electronics power dissipation. In conclusion, with amplification and with current understanding, it appears possible to sizewise come close to CMOS dimensions for isolated integrated photonic devices, but not in integration density. This is due to power dissipation in currently employed negative epsilon materials.

  13. Chemical inertness of UV-cured optical elastomers within the printed circuit board manufacturing process for embedded waveguide applications

    NASA Astrophysics Data System (ADS)

    Kruse, Kevin; Walczak, Karl; Thomas, Nicholas; Swatowski, Brandon; Demars, Casey; Middlebrook, Christopher

    2014-03-01

    Embedding polymer optical waveguides (WGs) into printed circuit boards (PCBs) for intra-board or board-to-board high speed data communications requires polymer materials that are compatible and inert when exposed to common PCB manufacturing processes. Ensuring both WG functionality after chemical exposure and maintaining PCB manufacturing integrities within the production process is crucial for successful implementation. The PCB manufacturing flow is analyzed to expose major requirements that would be required for the successful implementation of polymer materials for embedded WG development. Chemical testing and analysis were performed on Dow Corning ® OE-4140 UV-Cured Optical Elastomer Core and Dow Corning® OE-4141 UV-Cured Optical Elastomer Cladding which are designed for low loss embedded optical WGs. Contamination testing was conducted to demonstrate polymer compatibility in both cured and uncured form. Various PCB chemicals were treated with uncured polymer material and tested for effective contamination. Fully polymerized multimode WGs were fabricated and exposed to PCB chemicals at temperatures and durations comparable to PCB manufacturing conditions. Chemical analysis shows that the chosen polymer is compatible and inert with most common PCB manufacturing processes.

  14. Protein-Level Fluctuation Correlation at the Microcolony Level and Its Application to the Vibrio harveyi Quorum-Sensing Circuit

    PubMed Central

    Wang, Yufang; Tu, Kimberly C.; Ong, N.P.; Bassler, Bonnie L.; Wingreen, Ned S.

    2011-01-01

    Gene expression is stochastic, and noise that arises from the stochastic nature of biochemical reactions propagates through active regulatory links. Thus, correlations in gene-expression noise can provide information about regulatory links. We present what to our knowledge is a new approach to measure and interpret such correlated fluctuations at the level of single microcolonies, which derive from single cells. We demonstrated this approach mathematically using stochastic modeling, and applied it to experimental time-lapse fluorescence microscopy data. Specifically, we investigated the relationships among LuxO, LuxR, and the small regulatory RNA qrr4 in the model quorum-sensing bacterium Vibrio harveyi. Our results show that LuxR positively regulates the qrr4 promoter. Under our conditions, we find that qrr regulation weakly depends on total LuxO levels and that LuxO autorepression is saturated. We also find evidence that the fluctuations in LuxO levels are dominated by intrinsic noise. We furthermore propose LuxO and LuxR interact at all autoinducer levels via an unknown mechanism. Of importance, our new method of evaluating correlations at the microcolony level is unaffected by partition noise at cell division. Moreover, the method is first-order accurate and requires less effort for data analysis than single-cell-based approaches. This new correlation approach can be applied to other systems to aid analysis of gene regulatory circuits. PMID:21689539

  15. Novel Application of Glass Fibers Recovered From Waste Printed Circuit Boards as Sound and Thermal Insulation Material

    NASA Astrophysics Data System (ADS)

    Sun, Zhixing; Shen, Zhigang; Ma, Shulin; Zhang, Xiaojing

    2013-10-01

    The aim of this study is to investigate the feasibility of using glass fibers, a recycled material from waste printed circuit boards (WPCB), as sound absorption and thermal insulation material. Glass fibers were obtained through a fluidized-bed recycling process. Acoustic properties of the recovered glass fibers (RGF) were measured and compared with some commercial sound absorbing materials, such as expanded perlite (EP), expanded vermiculite (EV), and commercial glass fiber. Results show that RGF have good sound absorption ability over the whole tested frequency range (100-6400 Hz). The average sound absorption coefficient of RGF is 0.86, which is prior to those of EP (0.81) and EV (0.73). Noise reduction coefficient analysis indicates that the absorption ability of RGF can meet the requirement of II rating for sound absorbing material according to national standard. The thermal insulation results show that RGF has a fair low thermal conductivity (0.046 W/m K), which is comparable to those of some insulation materials (i.e., EV, EP, and rock wool). Besides, an empirical dependence of thermal conductivity on material temperature was determined for RGF. All the results showed that the reuse of RGF for sound and thermal insulation material provided a promising way for recycling WPCB and obtaining high beneficial products.

  16. Radiation hardness tests and characterization of the CLARO-CMOS, a low power and fast single-photon counting ASIC in 0.35 micron CMOS technology

    NASA Astrophysics Data System (ADS)

    Fiorini, M.; Andreotti, M.; Baldini, W.; Calabrese, R.; Carniti, P.; Cassina, L.; Cotta Ramusino, A.; Giachero, A.; Gotti, C.; Luppi, E.; Maino, M.; Malaguti, R.; Pessina, G.; Tomassetti, L.

    2014-12-01

    The CLARO-CMOS is a prototype ASIC that allows fast photon counting with 5 ns peaking time, a recovery time to baseline smaller than 25 ns, and a power consumption of less than 1 mW per channel. This chip is capable of single-photon counting with multi-anode photomultipliers and finds applications also in the read-out of silicon photomultipliers and microchannel plates. The prototype is realized in AMS 0.35 micron CMOS technology. In the LHCb RICH environment, assuming 10 years of operation at the nominal luminosity expected after the upgrade in Long Shutdown 2 (LS2), the ASIC must withstand a total fluence of about 6×1012 1 MeV neq /cm2 and a total ionizing dose of 400 krad. A systematic evaluation of the radiation effects on the CLARO-CMOS performance is therefore crucial to ensure long term stability of the electronics front-end. The results of multi-step irradiation tests with neutrons and X-rays up to the fluence of 1014 cm-2 and a dose of 4 Mrad, respectively, are presented, including measurement of single event effects during irradiation and chip performance evaluation before and after each irradiation step.

  17. Characterization of the ePix100 prototype: a front-end ASIC for second-generation LCLS integrating hybrid pixel detectors

    NASA Astrophysics Data System (ADS)

    Caragiulo, P.; Dragone, A.; Markovic, B.; Herbst, R.; Nishimura, K.; Reese, B.; Herrmann, S.; Hart, P.; Blaj, G.; Segal, J.; Tomada, A.; Hasi, J.; Carini, G.; Kenney, C.; Haller, G.

    2014-09-01

    ePix100 is the first variant of a novel class of integrating pixel ASICs architectures optimized for the processing of signals in second generation LINAC Coherent Light Source (LCLS) X-Ray cameras. ePix100 is optimized for ultra-low noise application requiring high spatial resolution. ePix ASICs are based on a common platform composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog to digital converters per column. The ePix100 variant has 50μmx50μm pixels arranged in a 352x384 matrix, a resolution of 50e- r.m.s. and a signal range of 35fC (100 photons at 8keV). In its final version it will be able to sustain a frame rate of 1kHz. A first prototype has been fabricated and characterized and the measurement results are reported here.

  18. An ASIC memory buffer controller for a high speed disk system

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.; Campbell, Steve

    1993-01-01

    The need for large capacity, high speed mass memory storage devices has become increasingly evident at NASA during the past decade. High performance mass storage systems are crucial to present and future NASA systems. Spaceborne data storage system requirements have grown in response to the increasing amounts of data generated and processed by orbiting scientific experiments. Predictions indicate increases in the volume of data by orders of magnitude during the next decade. Current predictions are for storage capacities on the order of terabits (Tb), with data rates exceeding one gigabit per second (Gbps). As part of the design effort for a state of the art mass storage system, NASA Langley has designed a 144 CMOS ASIC to support high speed data transfers. This paper discusses the system architecture, ASIC design and some of the lessons learned in the development process.

  19. [Polypeptide toxin from sea anemone inhibiting proton-sensitive channel ASIC3].

    PubMed

    Kozlov, S A; Osmakov, D I; Andreev, Ia A; Koshelev, S G; Gladkikh, I N; Monastyrnaia, M M; Kozlovskaia, E P; Grishin, E V

    2012-01-01

    Polypeptide toxin pi-AnmTX Hcr 1b-1 with a molecular weight 4537 Da was isolated from the whole body extract of sea anemone by a multistage liquid chromatography. The BLAST search algorithm revealed homology of the novel toxin amino acid sequence to the group of the known sea anemone toxins including BDS and APETx with similarity less then 50%. The toxin pi-AnmTX Hcr 1b-1 inhibited the amplitude of the fast component of integral ASIC3 current in electrophysiological studies on receptors expressed in Xenopus laevis oocytes. The calculated IC50 value was 5.5 +/- 1.0 microM. Among the known polypeptide toxins interacted with ASICs channels, the micro-AnmTX Hcr 1b-1 toxin is the least potent inhibitor that in our opinion correlates with a small amount of charged amino acid residues in its structure. PMID:23547468

  20. MIL-STD-1553 remote terminal design using ASIC megacell technology

    NASA Astrophysics Data System (ADS)

    Jordan, Anthony F.

    In the early development of MIL-STD-1553, board level implementations of remote terminals, bus controllers, and monitors were the norm. As technology progressed, hybrid solutions followed by monolithic solutions became the preferred solution of avionics design engineers implementing MIL-STD-1553 interfaces. Recent advances in ASIC technology allows the integration of complete MIL-STD-1553 interface into a silicon substrate along with a host microprocessor, memory, and support logic. The benefits of such a solution include reduced board space, increased flexibility, and higher reliability. A device with similar attributes was designed by Rockwell International, Rocketdyne Division, and manufactured by United Technologies Microelectronics Center (UTMC) for use on Space Station Freedom. This paper outlines the development and functionality of the ASIC device.

  1. PARISROC, an autonomous front-end ASIC for triggerless acquisition in next generation neutrino experiments

    NASA Astrophysics Data System (ADS)

    Conforti Di Lorenzo, S.; Campagne, J. E.; Drouet, S.; Dulucq, F.; El Berni, M.; Genolini, B.; de La Taille, C.; Martin-Chassard, G.; Seguin Moreau, N.; Wanlin, E.; Xiangbo, Y.

    2012-12-01

    PARISROC (Photomultiplier ARray Integrated in SiGe ReadOut Chip) is a complete readout chip in AustriaMicroSystems (AMS) SiGe 0.35 μm technology designed to read array of 16 Photomultipliers (PMTs). The ASIC is realized in the context of the PMm2 (square meter PhotoMultiplier) project that has proposed a new system of “smart photo-detectors” composed by sensor and read-out electronics dedicated to next generation neutrino experiments. The future water Cherenkov detectors will take place in megaton size water tanks then with a large surface of photo-detection. We propose to segment the large surface in arrays with a single front-end electronics and only the useful data send in surface to be stocked and analyzed. This paper describes the second version of the ASIC and illustrates the chip principle of operation and the main characteristics thank to a series of measurements. It is a 16-channel ASIC with channels that work independently, in triggerless mode and all managed by a common digital part. Then main innovation is that all the channels are handled independently by the digital part so that only channels that have triggered are digitized. Then the data are transferred to the internal memory and sent out in a data driven way. The ASIC allows charge and time measurement. We measured a charge measurement range starting from 160 fC (1 photoelectron-p.e., at PMT gain of 106) to 100 pC (around 600 p.e.) at 1% of linearity; time tagging at 1 ns thanks to a 24-bit counter at 10 MHz and a Time to Digital Converter (TDC) on a 100 ns ramp.

  2. Open Circuit Resonant (SansEC) Sensor Technology for Lightning Mitigation and Damage Detection and Diagnosis for Composite Aircraft Applications

    NASA Technical Reports Server (NTRS)

    Szatkowski, George N.; Dudley, Kenneth L.; Smith, Laura J.; Wang, Chuantong; Ticatch, Larry A.

    2014-01-01

    Traditional methods to protect composite aircraft from lightning strike damage rely on a conductive layer embedded on or within the surface of the aircraft composite skin. This method is effective at preventing major direct effect damage and minimizes indirect effects to aircraft systems from lightning strike attachment, but provides no additional benefit for the added parasitic weight from the conductive layer. When a known lightning strike occurs, the points of attachment and detachment on the aircraft surface are visually inspected and checked for damage by maintenance personnel to ensure continued safe flight operations. A new multi-functional lightning strike protection (LSP) method has been developed to provide aircraft lightning strike protection, damage detection and diagnosis for composite aircraft surfaces. The method incorporates a SansEC sensor array on the aircraft exterior surfaces forming a "Smart skin" surface for aircraft lightning zones certified to withstand strikes up to 100 kiloamperes peak current. SansEC sensors are open-circuit devices comprised of conductive trace spiral patterns sans (without) electrical connections. The SansEC sensor is an electromagnetic resonator having specific resonant parameters (frequency, amplitude, bandwidth & phase) which when electromagnetically coupled with a composite substrate will indicate the electrical impedance of the composite through a change in its resonant response. Any measureable shift in the resonant characteristics can be an indication of damage to the composite caused by a lightning strike or from other means. The SansEC sensor method is intended to diagnose damage for both in-situ health monitoring or ground inspections. In this paper, the theoretical mathematical framework is established for the use of open circuit sensors to perform damage detection and diagnosis on carbon fiber composites. Both computational and experimental analyses were conducted to validate this new method and system for

  3. Properties and application of a multichannel integrated circuit for low-artifact, patterned electrical stimulation of neural tissue

    NASA Astrophysics Data System (ADS)

    Hottowy, Paweł; Skoczeń, Andrzej; Gunning, Deborah E.; Kachiguine, Sergei; Mathieson, Keith; Sher, Alexander; Wiącek, Piotr; Litke, Alan M.; Dąbrowski, Władysław

    2012-12-01

    Objective. Modern multielectrode array (MEA) systems can record the neuronal activity from thousands of electrodes, but their ability to provide spatio-temporal patterns of electrical stimulation is very limited. Furthermore, the stimulus-related artifacts significantly limit the ability to record the neuronal responses to the stimulation. To address these issues, we designed a multichannel integrated circuit for a patterned MEA-based electrical stimulation and evaluated its performance in experiments with isolated mouse and rat retina. Approach. The Stimchip includes 64 independent stimulation channels. Each channel comprises an internal digital-to-analogue converter that can be configured as a current or voltage source. The shape of the stimulation waveform is defined independently for each channel by the real-time data stream. In addition, each channel is equipped with circuitry for reduction of the stimulus artifact. Main results. Using a high-density MEA stimulation/recording system, we effectively stimulated individual retinal ganglion cells (RGCs) and recorded the neuronal responses with minimal distortion, even on the stimulating electrodes. We independently stimulated a population of RGCs in rat retina, and using a complex spatio-temporal pattern of electrical stimulation pulses, we replicated visually evoked spiking activity of a subset of these cells with high fidelity. Significance. Compared with current state-of-the-art MEA systems, the Stimchip is able to stimulate neuronal cells with much more complex sequences of electrical pulses and with significantly reduced artifacts. This opens up new possibilities for studies of neuronal responses to electrical stimulation, both in the context of neuroscience research and in the development of neuroprosthetic devices.

  4. Properties and application of a multichannel integrated circuit for low-artifact, patterned electrical stimulation of neural tissue

    PubMed Central

    Hottowy, Paweł; Skoczeń, Andrzej; Gunning, Deborah E.; Kachiguine, Sergei; Mathieson, Keith; Sher, Alexander; Wiącek, Piotr; Litke, Alan M.; Dąbrowski, Władysław

    2012-01-01

    Objective Modern multielectrode array (MEA) systems can record the neuronal activity from thousands of electrodes, but their ability to provide spatio-temporal patterns of electrical stimulation is very limited. Furthermore, the stimulus-related artifacts significantly limit the ability to record the neuronal responses to the stimulation. To address these issues, we designed a multichannel integrated circuit for patterned MEA-based electrical stimulation and evaluated its performance in experiments with isolated mouse and rat retina. Approach The Stimchip includes 64 independent stimulation channels. Each channel comprises an internal digital-to-analog converter that can be configured as a current or voltage source. The shape of the stimulation waveform is defined independently for each channel by the real-time data stream. In addition, each channel is equipped with circuitry for reduction of the stimulus artifact. Main results Using a high-density MEA stimulation/recording system, we effectively stimulated individual retinal ganglion cells (RGCs) and recorded the neuronal responses with minimal distortion, even on the stimulating electrodes. We independently stimulated a population of RGCs in rat retina and, using a complex spatio-temporal pattern of electrical stimulation pulses, we replicated visually-evoked spiking activity of a subset of these cells with high fidelity. Significance Compared with current state-of-the-art MEA systems, the Stimchip is able to stimulate neuronal cells with much more complex sequences of electrical pulses and with significantly reduced artifacts. This opens up new possibilities for studies of neuronal responses to electrical stimulation, both in the context of neuroscience research and in the development of neuroprosthetic devices. PMID:23160018

  5. Cost optimization in low volume VLSI circuits

    NASA Technical Reports Server (NTRS)

    Cook, K. B., Jr.; Kerns, D. V., Jr.

    1982-01-01

    The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.

  6. α-Dendrotoxin inhibits the ASIC current in dorsal root ganglion neurons from rat.

    PubMed

    Báez, Adriana; Salceda, Emilio; Fló, Martín; Graña, Martín; Fernández, Cecilia; Vega, Rosario; Soto, Enrique

    2015-10-01

    Dendrotoxins are a group of peptide toxins purified from the venom of several mamba snakes. α-Dendrotoxin (α-DTx, from the Eastern green mamba Dendroaspis angusticeps) is a well-known blocker of voltage-gated K(+) channels and specifically of K(v)1.1, K(v)1.2 and K(v)1.6. In this work we show that α-DTx inhibited the ASIC currents in DRG neurons (IC50=0.8 μM) when continuously perfused during 25 s (including a 5 s pulse to pH 6.1), but not when co-applied with the pH drop. Additionally, we show that α-DTx abolished a transient component of the outward current that, in some experiments, appeared immediately after the end of the acid pulse. Our data indicate that α-DTx inhibits ASICs in the high nM range while some Kv are inhibited in the low nM range. The α-DTx selectivity and its potential interaction with ASICs should be taken in consideration when DTx is used in the high nM range. PMID:26314509

  7. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    NASA Astrophysics Data System (ADS)

    Ciciriello, F.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, C.; Matarrese, G.; Ranieri, A.

    2016-07-01

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e- for a detector capacitance of 10 pF. © 2001 Elsevier Science. All rights reserved

  8. Chemical synthesis, 3D structure, and ASIC binding site of the toxin mambalgin-2.

    PubMed

    Schroeder, Christina I; Rash, Lachlan D; Vila-Farrés, Xavier; Rosengren, K Johan; Mobli, Mehdi; King, Glenn F; Alewood, Paul F; Craik, David J; Durek, Thomas

    2014-01-20

    Mambalgins are a novel class of snake venom components that exert potent analgesic effects mediated through the inhibition of acid-sensing ion channels (ASICs). The 57-residue polypeptide mambalgin-2 (Ma-2) was synthesized by using a combination of solid-phase peptide synthesis and native chemical ligation. The structure of the synthetic toxin, determined using homonuclear NMR, revealed an unusual three-finger toxin fold reminiscent of functionally unrelated snake toxins. Electrophysiological analysis of Ma-2 on wild-type and mutant ASIC1a receptors allowed us to identify α-helix 5, which borders on the functionally critical acidic pocket of the channel, as a major part of the Ma-2 binding site. This region is also crucial for the interaction of ASIC1a with the spider toxin PcTx1, thus suggesting that the binding sites for these toxins substantially overlap. This work lays the foundation for structure-activity relationship (SAR) studies and further development of this promising analgesic peptide. PMID:24323786

  9. Development of Formulations for a-SiC and Manganese CMP and Post-CMP Cleaning of Cobalt

    NASA Astrophysics Data System (ADS)

    Lagudu, Uma Rames Krishna

    We have investigated the chemical mechanical polishing (CMP) of amorphous SiC (a-SiC) and Mn and Post CMP cleaning of cobalt for various device applications. During the manufacture of copper interconnects using the damascene process the polishing of copper is followed by the polishing of the barrier material (Co, Mn, Ru and their alloys) and its post CMP cleaning. This is followed by the a-SiC hard mask CMP. Silicon carbide thin films, though of widespread use in microelectronic engineering, are difficult to process by CMP because of their hardness and chemical inertness. The earlier part of the SiC work discusses the development of slurries based on silica abrasives that resulted in high a-SiC removal rates (RRs). The ionic strength of the silica dispersion was found to play a significant role in enhancing material removal rate, while also providing very good post-polish surface-smoothness. For example, the addition of 50 mM potassium nitrate to a pH 8 aqueous slurry consisting of 10 wt % of silica abrasives and 1.47 M hydrogen peroxide increased the RR from about 150 nm/h to about 2100 nm/h. The role of ionic strength in obtaining such high RRs was investigated using surface zeta-potentials measurements and X-ray photoelectron spectroscopy (XPS). Evidently, hydrogen peroxide promoted the oxidation of Si and C to form weakly adhered species that were subsequently removed by the abrasive action of the silica particles. The effect of potassium nitrate in increasing material removal is attributed to the reduction in the electrostatic repulsion between the abrasive particles and the SiC surface because of screening of surface charges by the added electrolyte. We also show that transition metal compounds when used as additives to silica dispersions enhance a-SiC removal rates (RRs). Silica slurries containing potassium permanganate gave RRs as high as 2000 nm/h at pH 4. Addition of copper sulfate to this slurry further enhanced the RRs to ˜3500 nm/h at pH 6

  10. Human ASIC3 channel dynamically adapts its activity to sense the extracellular pH in both acidic and alkaline directions

    PubMed Central

    Delaunay, Anne; Gasull, Xavier; Salinas, Miguel; Noël, Jacques; Friend, Valérie; Lingueglia, Eric; Deval, Emmanuel

    2012-01-01

    In rodent sensory neurons, acid-sensing ion channel 3 (ASIC3) has recently emerged as a particularly important sensor of nonadaptive pain associated with tissue acidosis. However, little is known about the human ASIC3 channel, which includes three splice variants differing in their C-terminal domain (hASIC3a, hASIC3b, and hASIC3c). hASIC3a transcripts represent the main mRNAs expressed in both peripheral and central neuronal tissues (dorsal root ganglia [DRG], spinal cord, and brain), where a small proportion of hASIC3c transcripts is also detected. We show that hASIC3 channels (hASIC3a, hASIC3b, or hASIC3c) are able to directly sense extracellular pH changes not only during acidification (up to pH 5.0), but also during alkalization (up to pH 8.0), an original and inducible property yet unknown. When the external pH decreases, hASIC3 display a transient acid mode with brief activation that is relevant to the classical ASIC currents, as previously described. On the other hand, an external pH increase activates a sustained alkaline mode leading to a constitutive activity at resting pH. Both modes are inhibited by the APETx2 toxin, an ASIC3-type channel inhibitor. The alkaline sensitivity of hASIC3 is an intrinsic property of the channel, which is supported by the extracellular loop and involves two arginines (R68 and R83) only present in the human clone. hASIC3 is thus able to sense the extracellular pH in both directions and therefore to dynamically adapt its activity between pH 5.0 and 8.0, a property likely to participate in the fine tuning of neuronal membrane potential and to neuron sensitization in various pH environments. PMID:22829666

  11. No-warp potted circuits

    NASA Technical Reports Server (NTRS)

    Robinson, W. W.

    1979-01-01

    Sponge inserts compensate for potting-compound expansion and relieve thermal stresses on circuit boards. Technique quality of production runs on PC boards intended for applications in environments less severe than those for aerospace equipment. Pads reduce weight of modules because they weigh far less than potting compound they displace.

  12. High temperature superconducting digital circuits and subsystems

    SciTech Connect

    Martens, J.S.; Pance, A.; Whiteley, S.R.; Char, K.; Johansson, M.F.; Lee, L.; Hietala, V.M.; Wendt, J.R.; Hou, S.Y.; Phillips, J.

    1993-10-01

    The advances in the fabrication of high temperature superconducting devices have enabled the demonstration of high performance and useful digital circuits and subsystems. The yield and uniformity of the devices is sufficient for circuit fabrication at the medium scale integration (MSI) level with performance not seen before at 77 K. The circuits demonstrated to date include simple gates, counters, analog to digital converters, and shift registers. All of these are mid-sized building blocks for potential applications in commercial and military systems. The processes used for these circuits and blocks will be discussed along with observed performance data.

  13. Q-switched laser prelase detection circuit

    NASA Technical Reports Server (NTRS)

    Lockard, George E.

    1991-01-01

    A compact electronic circuit was developed to detect prelasing in Q-swithed pulsed laser systems and once detected to shut down the laser before the next laser pulse occurs. The circuit is small, compact, and uses a minimum of components which makes it quite economical, thus readily lending itself to commercial applications. It can easily be incorporated into virtually any Q-switched laser system or reliability of a laser system by reducing a source of possible costly optical damage. The circuit operation and instrument requirements necessary to incorporate the circuit into a laser system are discussed.

  14. Automatic generation of signal processing integrated circuits

    SciTech Connect

    Pope, S.P.

    1985-01-01

    A system for the automated design of signal processing integrated circuits is described in this thesis. The system is based on a library of circuit cells, and a software package that can configure the cells into complete integrated circuits. The architecture of the cell library is optimized for low and medium bandwidth digital signal processing applications. Circuits designed with the system use a multiprocessor architecture. Input to the system is a design file written in a specialized programming language. Software emulation from the design file is used to verify performance. A two-pass silicon compiler is used to translate the design file into a mask-level description of an integrated circuit. A major goal of the project is to make the system useable by those with little or no formal training in integrated circuits. A second goal is to reduce the time and cost associated with performing an integrated circuit design, while still producing designs which are reasonably efficient in their use of the technology. Development of the system was guided by basic research on appropriate architectures and circuit constructs for signal processors. As part of this research an integrated circuit was designed which performs speech analysis and synthesis. This vocoder circuit is intended for use in low-bit-rate digital speech transmission systems.

  15. Prototype of a front-end readout ASIC designed for the Water Cherenkov Detector Array in LHAASO

    NASA Astrophysics Data System (ADS)

    Zhao, L.; Wu, W.; Liu, J.; Liang, Y.; Qin, J.; Yu, L.; Liu, S.; An, Q.

    2015-03-01

    The Large High Altitude Air Shower Observatory is in the R&D phase, in which the Water Cherenkov Detector Array is an important part. The signals of Photo-Multiplier Tubes would vary from single photo electron to 4000 photo electrons, and both high precision charge and time measurement is required. To simplify the signal processing chain, the charge-to-time conversion method is employed. A prototype of the front-end readout ASIC is designed and fabricated in Chartered 0.35 μ m CMOS technology, which integrates time disctrimination and converts the input charge information to pulse widths. With Time-to-Digital Converters, both time and charge can be digitized at the same time. We have conducted initial tests on this chip, and the results indicate that a time resolution better than 0.5 ns is achieved over the full dynamic range (1 ~ 4000 photo electrons, corresponding to 0.75 ~ 3000 pC with the threshold of 0.188 pC); the charge resolution is better than 1% with large input amplitudes (500 ~ 4000 photo electrons), and remains better than 15% with a 1 photo electron input amplitude, which is beyond the application requirement.

  16. MULTI-ELECTRODE TUBE PULSE MEMORY CIRCUIT

    DOEpatents

    Gundlach, J.C.; Reeves, J.B.

    1958-05-20

    Control circuits are described for pulse memory devices for scalers and the like, and more particularly to a driving or energizing circuit for a polycathode gaseous discharge tube having an elongated anode and a successive series of cathodes spaced opposite the anode along its length. The circuit is so arranged as to utilize an arc discharge between the anode and a cathode to count a series of pulses. Upon application of an input pulse the discharge is made to occur between the anode and the next successive cathode, and an output pulse is produced when a particular subsequent cathode is reached. The circuit means for transfering the discharge by altering the anode potential and potential of the cathodes and interconnecting the cathodes constitutes the novel aspects of the invention. A low response time and reduced number of circuit components are the practical advantages of the described circuit.

  17. A wireless 64-channel ECoG recording electronic for implantable monitoring and BCI applications: WIMAGINE.

    PubMed

    Charvet, G; Foerster, M; Chatalic, G; Michea, A; Porcherot, J; Bonnet, S; Filipe, S; Audebert, P; Robinet, S; Josselin, V; Reverdy, J; D'Errico, R; Sauter, F; Mestais, C; Benabid, A L

    2012-01-01

    A wireless, low power, 64-channel data acquisition system named WIMAGINE has been designed for ElectroCorticoGram (ECoG) recording. This system is based on a custom integrated circuit (ASIC) for amplification and digitization on 64 channels. It allows the RF transmission (in the MICS band) of 32 ECoG recording channels (among 64 channels available) sampled at 1 kHz per channel with a 12-bit resolution. The device is powered wirelessly through an inductive link at 13.56 MHz able to provide 100mW (30mA at 3.3V). This integration is a first step towards an implantable device for brain activity monitoring and Brain-Computer Interface (BCI) applications. The main features of the WIMAGINE platform and its architecture will be presented, as well as its performances and in vivo studies. PMID:23366009

  18. Charge regulation circuit

    DOEpatents

    Ball, Don G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply in the range of 0.01%. The charge regulation circuit is utilized in a preferred embodiment in providing regulated voltage for controlling the operation of a laser.

  19. Simple Cell Balance Circuit

    NASA Technical Reports Server (NTRS)

    Johnson, Steven D.; Byers, Jerry W.; Martin, James A.

    2012-01-01

    A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

  20. Vertically Integrated Circuits at Fermilab

    SciTech Connect

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  1. Coxsackievirus and Adenovirus Receptor (CAR) Mediates Trafficking of Acid-Sensing Ion Channel 3 (ASIC3) via PSD-95

    PubMed Central

    Excoffon, Katherine J.D.A.; Kolawole, Abimbola O.; Kusama, Nobuyoshi; Gansemer, Nicholas D.; Sharma, Priyanka; Hruska-Hageman, Alesia M.; Petroff, Elena; Benson, Christopher J.

    2012-01-01

    We have previously shown that the Coxsackievirus and adenovirus receptor (CAR) can interact with post-synaptic density 95 (PSD-95) and localize PSD-95 to cell-cell junctions. We have also shown that activity of the acid-sensing ion channel (ASIC3), a H+-gated cation channel that plays a role in mechanosensation and pain signaling, is negatively modulated by PSD-95 through a PDZ-based interaction. We asked whether CAR and ASIC3 simultaneously interact with PSD-95, and if so, whether co-expression of these proteins alters their cellular distribution and localization. Results indicate that CAR and ASIC3 co-immunoprecipitate only when co-expressed with PSD-95. CAR also brings both PSD-95 and ASIC3 to the junctions of heterologous cells. Moreover, CAR rescues PSD-95-mediated inhibition of ASIC3 currents. These data suggest that, in addition to activity as a viral receptor and adhesion molecule, CAR can play a role in trafficking proteins, including ion channels, in a PDZ-based scaffolding complex. PMID:22809504

  2. Electrical Circuits and Water Analogies

    ERIC Educational Resources Information Center

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  3. A Low Cost Single Chip VDL Compatible Transceiver ASIC

    NASA Technical Reports Server (NTRS)

    Becker, Robert

    2004-01-01

    Recent trends in commercial communications system components have focussed almost exclusively on cellular telephone technology. As many of the traditional sources of receiver components have discontinued non-cellular telephone products, the designers of avionics and other low volume radio applications find themselves increasingly unable to find highly integrated components. This is particularly true for low power, low cost applications which cannot afford the lavish current consumption of the software defined radio approach increasingly taken by certified device manufacturers. In this paper, we describe a low power transceiver chip targeting applications from low VHF to low UHF frequencies typical of avionics systems. The chip encompasses a selectable single or double conversion design for the receiver and a low power IF upconversion transmitter. All local oscillators are synthesized and integrated into the chip. An on-chip I-Q modulator and demodulator provide baseband modulation and demodulation capability allowing the use of low power, fixed point signal processing components for signal demodulation. The goal of this program is to demonstrate a low cost VDL mode-3 transceiver using this chip to receive text weather information sent using 4-slot TDMA with no support for voice. The data will be sent from an experimental ground station. This work is funded by NASA Glenn Research Center.

  4. Sense circuit arrangement

    NASA Technical Reports Server (NTRS)

    Bohning, Oliver D. (Inventor)

    1976-01-01

    A unique, two-node sense circuit is disclosed. The circuit includes a bridge comprised of resistance elements and a differential amplifier. The two-node circuit is suitably adapted to be arranged in an array comprised of a plurality of discrete bridge-amplifiers which can be selectively energized. The circuit is arranged so as to form a configuration with minimum power utilization and a reduced number of components and interconnections therebetween.

  5. Bioluminescent bioreporter integrated circuits (BBICs)

    NASA Astrophysics Data System (ADS)

    Simpson, Michael L.; Sayler, Gary S.; Nivens, David; Ripp, Steve; Paulus, Michael J.; Jellison, Gerald E.

    1998-07-01

    As the workhorse of the integrated circuit (IC) industry, the capabilities of CMOS have been expanded well beyond the original applications. The full spectrum of analog circuits from switched-capacitor filters to microwave circuit blocks, and from general-purpose operational amplifiers to sub- nanosecond analog timing circuits for nuclear physics experiments have been implemented in CMOS. This technology has also made in-roads into the growing area of monolithic sensors with devices such as active-pixel sensors and other electro-optical detection devices. While many of the processes used for MEMS fabrication are not compatible with the CMOS IC process, depositing a sensor material onto a previously fabricated CMOS circuit can create a very useful category of sensors. In this work we report a chemical sensor composed of bioluminescent bioreporters (genetically engineered bacteria) deposited onto a micro-luminometer fabricated in a standard CMOS IC process. The bioreporter used for this work emitted 490-nm light when exposed to toluene. This luminescence was detected by the micro- luminometer giving an indication of the concentration of toluene. Other bioluminescent bioreporters sensitive to explosives, mercury, and other organic chemicals and heavy metals have been reported. These could be incorporated (individually or in combination) with the micro-luminometer reported here to form a variety of chemical sensors.

  6. Decoupling with Random Quantum Circuits

    NASA Astrophysics Data System (ADS)

    Brown, Winton; Fawzi, Omar

    2015-12-01

    Decoupling has become a central concept in quantum information theory, with applications including proving coding theorems, randomness extraction and the study of conditions for reaching thermal equilibrium. However, our understanding of the dynamics that lead to decoupling is limited. In fact, the only families of transformations that are known to lead to decoupling are (approximate) unitary two-designs, i.e., measures over the unitary group that behave like the Haar measure as far as the first two moments are concerned. Such families include for example random quantum circuits with O( n 2) gates, where n is the number of qubits in the system under consideration. In fact, all known constructions of decoupling circuits use Ω( n 2) gates. Here, we prove that random quantum circuits with O( n log2 n) gates satisfy an essentially optimal decoupling theorem. In addition, these circuits can be implemented in depth O(log3 n). This proves that decoupling can happen in a time that scales polylogarithmically in the number of particles in the system, provided all the particles are allowed to interact. Our proof does not proceed by showing that such circuits are approximate two-designs in the usual sense, but rather we directly analyze the decoupling property.

  7. Electrical Circuit Simulation Code

    Energy Science and Technology Software Center (ESTSC)

    2001-08-09

    Massively-Parallel Electrical Circuit Simulation Code. CHILESPICE is a massively-arallel distributed-memory electrical circuit simulation tool that contains many enhanced radiation, time-based, and thermal features and models. Large scale electronic circuit simulation. Shared memory, parallel processing, enhance convergence. Sandia specific device models.

  8. Piezoelectric drive circuit

    DOEpatents

    Treu, C.A. Jr.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

  9. Piezoelectric drive circuit

    DOEpatents

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  10. SEMICONDUCTOR INTEGRATED CIRCUITS: Noise-canceling and IP3 improved CMOS RF front-end for DRM/DAB/DVB-H applications

    NASA Astrophysics Data System (ADS)

    Keping, Wang; Zhigong, Wang; Xuemei, Lei

    2010-02-01

    A CMOS RF (radio frequency) front-end for digital radio broadcasting applications is presented that contains a wideband LNA, I/Q-mixers and VGAs, supporting other various wireless communication standards in the ultra-wide frequency band from 200 kHz to 2 GHz as well. Improvement of the NF (noise figure) and IP3 (third-order intermodulation distortion) is attained without significant degradation of other performances like voltage gain and power consumption. The NF is minimized by noise-canceling technology, and the IP3 is improved by using differential multiple gate transistors (DMGTR). The dB-in-linear VGA (variable gain amplifier) exploits a single PMOS to achieve exponential gain control. The circuit is fabricated in 0.18-μm CMOS technology. The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz. The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz. The DSB NF at maximum gain is 3.1-6.1 dB. The IIP3 at middle gain is -4.7 to 0.2 dBm. It consumes a DC power of only 36 mW at 1.8 V supply.

  11. High density Al2O3/TaN-based metal insulator metal capacitors in application to radio frequency integrated circuits

    NASA Astrophysics Data System (ADS)

    Ding, Shi-Jin; Huang, Yu-Jian; Huang, Yue; Pan, Shao-Hui; Zhang, Wei; Wang, Li-Kang

    2007-09-01

    Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically. The capacitors exhibit a high density of about 6.05 fF/μm2, a small leakage current of 4.8×10-8 A/cm2 at 3V, a high breakdown electric field of 8.61MV/cm as well as acceptable voltage coefficients of capacitance (VCCs) of 795 ppm/V2 and 268ppm/V at 1 MHz. The observed properties should be attributed to high-quality Al2O3 film and chemically stable TaN electrodes. Further, a logarithmically linear relationship between quadratic VCC and frequency is observed due to the change of relaxation time with carrier mobility in the dielectric. The conduction mechanism in the high field ranges is dominated by the Poole-Frenkel emission, and the leakage current in the low field ranges is likely to be associated with trap-assisted tunnelling. Meanwhile, the Al2O3 dielectric presents charge trapping under low voltage stresses, and defect generation under high voltage stresses, and it has a hard-breakdown performance.

  12. A 0.18 micrometer CMOS Thermopile Readout ASIC Immune to 50 MRAD Total Ionizing Dose (SI) and Single Event Latchup to 174MeV-cm(exp 2)/mg

    NASA Technical Reports Server (NTRS)

    Quilligan, Gerard T.; Aslam, Shahid; Lakew, Brook; DuMonthier, Jeffery J.; Katz, Richard B.; Kleyner, Igor

    2014-01-01

    Radiation hardened by design (RHBD) techniques allow commercial CMOS circuits to operate in high total ionizing dose and particle fluence environments. Our radiation hard multi-channel digitizer (MCD) ASIC (Figure 1) is a versatile analog system on a chip (SoC) fabricated in 180nm CMOS. It provides 18 chopper stabilized amplifier channels, a 16- bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The MCD was evaluated at Goddard Space Flight Center and Texas A&M University's radiation effects facilities and found to be immune to single event latchup (SEL) and total ionizing dose (TID) at 174 MeV-cm(exp 2)/mg and 50 Mrad (Si) respectively.

  13. PACIFIC: the readout ASIC for the SciFi Tracker of the upgraded LHCb detector

    NASA Astrophysics Data System (ADS)

    Mazorra, J.; Chanal, H.; Comerma, A.; Gascón, D.; Gómez, S.; Han, X.; Pillet, N.; Vandaele, R.

    2016-02-01

    The LHCb detector will be upgraded during the Long Shutdown 2 (LS2) of the LHC in order to cope with higher instantaneous luminosities and will switch to a 40 MHz readout rate using a trigger-less software based system. All front-end electronics will be replaced and several sub-detectors must be redesigned to cope with the higher detector occupancy and radiation damage. The current tracking detectors downstream of the LHCb dipole magnet will be replaced by the Scintillating Fibre (SciFi) Tracker. The SciFi Tracker will use scintillating fibres read out by Silicon Photomultipliers (SiPMs). State-of-the-art multi-channel SiPM arrays are being developed and a custom ASIC, called the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC), will be used to digitise the signals from the SiPMs. This article presents an overview of the R&D for the PACIFIC. It is a 64-channel ASIC implemented in 130 nm CMOS technology, aiming at a radiation tolerant design with a power consumption below 10 mW per channel. It interfaces directly with the SiPM anode through a current mode input, and provides a configurable non-linear 2-bit per channel digital output. The SiPM signal is acquired by a current conveyor and processed with a fast shaper and a gated integrator. The digitization is performed using a three threshold non-linear flash ADC operating at 40 MHz. Simulation and test results show the PACIFIC chip prototypes functioning well.

  14. CIRCUITS FOR CURRENT MEASUREMENTS

    DOEpatents

    Cox, R.J.

    1958-11-01

    Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

  15. A four channel time-to-digital converter ASIC with in-built calibration and SPI interface

    NASA Astrophysics Data System (ADS)

    Hari Prasad, K.; Sukhwani, Menka; Saxena, Pooja; Chandratre, V. B.; Pithawa, C. K.

    2014-02-01

    A design of high resolution, wide dynamic range Time-to-Digital Converter (TDC) ASIC, implemented in 0.35 μm commercial CMOS technology is presented. The ASIC features four channel TDC with an in-built calibration and Serial Peripheral Interconnect (SPI) slave interface. The TDC is based on the vernier ring oscillator method in order to achieve both high resolution and wide dynamic range. This TDC ASIC is tested and found to have resolution of 127 ps (LSB), dynamic range of 1.8 μs and precision (σ) of 74 ps. The measured values of differential non-linearity (DNL) and integral non-linearity (INL) are 350 ps and 300 ps respectively.

  16. Performance and Calibration of H2RG Detectors and SIDECAR ASICs for the RATIR Camera

    NASA Technical Reports Server (NTRS)

    Fox, Ori D.; Kutyrev, Alexander S.; Rapchun, David A.; Klein, Christopher R.; Butler, Nathaniel R.; Bloom, Josh; de Diego, Jos A.; Simn Farah, Alejandro D.; Gehrels, Neil A.; Georgiev, Leonid; Gonzlez-Hernandez, J. Jess; Lee, William H.; Loose, Markus; Lotkin, Gennadiy; Moseley, Samuel H.; Prochaska, J. Xavier; Ramirez-Ruiz, Enrico; Richer, Michael G.; Robinson, Frederick D.; Romn-Zuniga, Carols; Samuel, Mathew V.; Sparr, Leroy M.; Watson, Alan M.

    2012-01-01

    The Reionization And Transient Infra,.Red (RATIR) camera has been built for rapid Gamma,.Ray Burst (GRE) followup and will provide simultaneous optical and infrared photometric capabilities. The infrared portion of this camera incorporates two Teledyne HgCdTe HAWAII-2RG detectors, controlled by Teledyne's SIDECAR ASICs. While other ground-based systems have used the SIDECAR before, this system also utilizes Teledyne's JADE2 interface card and IDE development environment. Together, this setup comprises Teledyne's Development Kit, which is a bundled solution that can be efficiently integrated into future ground-based systems. In this presentation, we characterize the system's read noise, dark current, and conversion gain.

  17. A 64ch readout module for PPD/MPPC/SiPM using EASIROC ASIC

    NASA Astrophysics Data System (ADS)

    Nakamura, Isamu; Ishijima, N.; Hanagaki, K.; Yoshimura, K.; Nakai, Y.; Ueno, K.

    2015-07-01

    A readout module for PPD/MPPC/GAPD/SiPM is developed using EASIROC ASIC. The module can handle 64 PPDs and has on-board bias power supply, ADC for energy measurement, 1 ns TDC on FPGA as well as 64ch Logic output for external trigger. Controls and data transfer are through SiTCP technology implemented in FPGA. The module has NIM format for convenience, but can be operated without crate with 5 V AC/DC converter. Basic performance of production module was tested and the results are presented in the poster.

  18. Front end ASIC for AGIPD, a high dynamic range fast detector for the European XFEL

    NASA Astrophysics Data System (ADS)

    Allahgholi, A.; Becker, J.; Bianco, L.; Delfs, A.; Dinapoli, R.; Ariño-Estrada, G.; Goettlicher, P.; Graafsma, H.; Greiffenberg, D.; Hirsemann, H.; Jack, S.; Klanner, R.; Klyuev, A.; Krueger, H.; Lange, S.; Marras, A.; Mezza, D.; Mozzanica, A.; Poehlsen, J.; Rah, S.; Xia, Q.; Schmitt, B.; Schwandt, J.; Sheviakov, I.; Shi, X.; Smoljanin, S.; Trunk, U.; Zhang, J.; Zimmer, M.

    2016-01-01

    The Adaptive Gain Integrating Pixel Detector (AGIPD) is a hybrid pixel X-ray detector for the European-XFEL. One of the detector's important parts is the radiation tolerant front end ASIC fulfilling the European-XFEL requirements: high dynamic range—from sensitivity to single 12.5keV-photons up to 104 photons. It is implemented using the dynamic gain switching technique with three possible gains of the charge sensitive preamplifier. Each pixel can store up to 352 images in memory operated in random-access mode at >=4.5 MHz frame rate. An external vetoing may be applied to overwrite unwanted frames.

  19. Characterization of a Serializer ASIC Chip for the Upgrade of the ATLAS Muon Detector

    NASA Astrophysics Data System (ADS)

    Wang, Jinhong; Guan, Liang; Sang, Ziru; Chapman, J. W.; Dai, Tiesheng; Zhou, Bing; Zhu, Junjie

    2015-12-01

    We report on the design of a serializer ASIC to be used in the ATLAS forward muon detector for trigger data transmission. We discuss the performance of a prototype chip covering power dissipation, latency and stable operating line rate. Tests show that the serializer is capable of running at least at 5.76 Gbps with a bit error ratio below 1x10^{-15}, and a power consumption of 200 mW running at 4.8 Gbps. The latency between the start of loading 30 bits into the serializer to the transmission of the first bit from the serializer is measured to be about 6 ns.

  20. Development of the read-out ASIC for muon chambers of the CBM experiment

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Ivanov, V.; Ivanov, P.; Malankin, E.; Normanov, D.; Osipov, D.; Samsonov, V.; Shumikhin, V.; Voronin, A.

    2015-04-01

    A front-end ASIC for GEM detectors readout in the CBM experiment is presented. The design has the following features: dynamic range of 100 fC, channel hit rate of 2 MHz, ENC of 1000 e- at 50 pF, power comsumption of 10 mW per channel, 6 bit SAR ADC. The chip includes 8 analog processing chains, each consisting of preamplifier, two shapers (fast and slow), differential comparator and an area efficient 6 bit SAR ADC with 1.2 mW power consunption at 50 Msps. The chip also includes the threshold DAC and the digital part.