Operational Characteristics of an SCR-Based Pulse Generating Circuit

DTIC Science & Technology

2014-12-01

of OUTC can further be explained by the RC time constants involved in the charging and discharging of OUTC during each pulse . When the SCR is...CHARACTERISTICS OF AN SCR-BASED PULSE GENERATING CIRCUIT by Wing Chien Christopher Chang December 2014 Thesis Advisor: Gamani Karunasiri Co...COVERED December 20 14 Master ’s Thesis 4. TITLE AND SUBTITLE 5. FUNDING NUMBERS OPERATIONAL CHARACTERISTICS OF AN SCR-BASED PULSE GENERATING CIRCUIT 6

Generation of electromagnetic energy in a magnetic cumulation generator with the use of inductively coupled circuits with a variable coupling coefficient

NASA Astrophysics Data System (ADS)

Gilev, S. D.; Prokopiev, V. S.

2017-07-01

A method of generation of electromagnetic energy and magnetic flux in a magnetic cumulation generator is proposed. The method is based on dynamic variation of the circuit coupling coefficient. This circuit is compared with other available circuits of magnetic energy generation with the help of magnetic cumulation (classical magnetic cumulation generator, generator with transformer coupling, and generator with a dynamic transformer). It is demonstrated that the proposed method allows obtaining high values of magnetic energy. The proposed circuit is found to be more effective than the known transformer circuit. Experiments on electromagnetic energy generation are performed, which demonstrate the efficiency of the proposed method.

Real-time fast physical random number generator with a photonic integrated circuit.

PubMed

Ugajin, Kazusa; Terashima, Yuta; Iwakawa, Kento; Uchida, Atsushi; Harayama, Takahisa; Yoshimura, Kazuyuki; Inubushi, Masanobu

2017-03-20

Random number generators are essential for applications in information security and numerical simulations. Most optical-chaos-based random number generators produce random bit sequences by offline post-processing with large optical components. We demonstrate a real-time hardware implementation of a fast physical random number generator with a photonic integrated circuit and a field programmable gate array (FPGA) electronic board. We generate 1-Tbit random bit sequences and evaluate their statistical randomness using NIST Special Publication 800-22 and TestU01. All of the BigCrush tests in TestU01 are passed using 410-Gbit random bit sequences. A maximum real-time generation rate of 21.1 Gb/s is achieved for random bit sequences in binary format stored in a computer, which can be directly used for applications involving secret keys in cryptography and random seeds in large-scale numerical simulations.

Reduced circuit implementation of encoder and syndrome generator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Trager, Barry M; Winograd, Shmuel

An error correction method and system includes an Encoder and Syndrome-generator that operate in parallel to reduce the amount of circuitry used to compute check symbols and syndromes for error correcting codes. The system and method computes the contributions to the syndromes and check symbols 1 bit at a time instead of 1 symbol at a time. As a result, the even syndromes can be computed as powers of the odd syndromes. Further, the system assigns symbol addresses so that there are, for an example GF(2.sup.8) which has 72 symbols, three (3) blocks of addresses which differ by a cubemore » root of unity to allow the data symbols to be combined for reducing size and complexity of odd syndrome circuits. Further, the implementation circuit for generating check symbols is derived from syndrome circuit using the inverse of the part of the syndrome matrix for check locations.« less

E-learning platform for automated testing of electronic circuits using signature analysis method

NASA Astrophysics Data System (ADS)

Gherghina, Cǎtǎlina; Bacivarov, Angelica; Bacivarov, Ioan C.; Petricǎ, Gabriel

2016-12-01

Dependability of electronic circuits can be ensured only through testing of circuit modules. This is done by generating test vectors and their application to the circuit. Testability should be viewed as a concerted effort to ensure maximum efficiency throughout the product life cycle, from conception and design stage, through production to repairs during products operating. In this paper, is presented the platform developed by authors for training for testability in electronics, in general and in using signature analysis method, in particular. The platform allows highlighting the two approaches in the field namely analog and digital signature of circuits. As a part of this e-learning platform, it has been developed a database for signatures of different electronic components meant to put into the spotlight different techniques implying fault detection, and from this there were also self-repairing techniques of the systems with this kind of components. An approach for realizing self-testing circuits based on MATLAB environment and using signature analysis method is proposed. This paper analyses the benefits of signature analysis method and simulates signature analyzer performance based on the use of pseudo-random sequences, too.

Flip-flop resolving time test circuit

NASA Technical Reports Server (NTRS)

Rosenberger, F.; Chaney, T. J.

1982-01-01

Integrated circuit (IC) flip-flop resolving time parameters are measured by wafer probing, without need of dicing or bonding, throught the incorporation of test structures on an IC together with the flip-flop to be measured. Several delays that are fabricated as part of the test circuit, including a voltage-controlled delay with a resolution of a few picosecs, are calibrated as part of the test procedure by integrating them into, and out of, the delay path of a ring oscillator. Each of the delay values is calculated by subtracting the period of the ring oscillator with the delay omitted from the period with the delay included. The delay measurement technique is sufficiently general for other applications. The technique is illustrated for the case of the flip-flop parameters of a 5-micron feature size NMOS circuit.

The neural circuits that generate tics in Tourette's syndrome.

PubMed

Wang, Zhishun; Maia, Tiago V; Marsh, Rachel; Colibazzi, Tiziano; Gerber, Andrew; Peterson, Bradley S

2011-12-01

The purpose of this study was to examine neural activity and connectivity within cortico-striato-thalamo-cortical circuits and to reveal circuit-based neural mechanisms that govern tic generation in Tourette's syndrome. Functional magnetic resonance imaging data were acquired from 13 individuals with Tourette's syndrome and 21 healthy comparison subjects during spontaneous or simulated tics. Independent component analysis with hierarchical partner matching was used to isolate neural activity within functionally distinct regions of cortico-striato-thalamo-cortical circuits. Granger causality was used to investigate causal interactions among these regions. The Tourette's syndrome group exhibited stronger neural activity and interregional causality than healthy comparison subjects throughout all portions of the motor pathway, including the sensorimotor cortex, putamen, pallidum, and substantia nigra. Activity in these areas correlated positively with the severity of tic symptoms. Activity within the Tourette's syndrome group was stronger during spontaneous tics than during voluntary tics in the somatosensory and posterior parietal cortices, putamen, and amygdala/hippocampus complex, suggesting that activity in these regions may represent features of the premonitory urges that generate spontaneous tic behaviors. In contrast, activity was weaker in the Tourette's syndrome group than in the healthy comparison group within portions of cortico-striato-thalamo-cortical circuits that exert top-down control over motor pathways (the caudate and anterior cingulate cortex), and progressively less activity in these regions accompanied more severe tic symptoms, suggesting that faulty activity in these circuits may result in their failure to control tic behaviors or the premonitory urges that generate them. Our findings, taken together, suggest that tics are caused by the combined effects of excessive activity in motor pathways and reduced activation in control portions of cortico

Addressable-Matrix Integrated-Circuit Test Structure

NASA Technical Reports Server (NTRS)

Sayah, Hoshyar R.; Buehler, Martin G.

1991-01-01

Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.

30 CFR 57.6407 - Circuit testing.

Code of Federal Regulations, 2010 CFR

2010-07-01

... connection of electric detonator series; and (4) Total blasting circuit resistance prior to connection to the... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 57.6407 Section 57.6407... SAFETY AND HEALTH SAFETY AND HEALTH STANDARDS-UNDERGROUND METAL AND NONMETAL MINES Explosives Electric...

Capabilities and Testing of the Fission Surface Power Primary Test Circuit (FSP-PTC)

NASA Technical Reports Server (NTRS)

Garber, Anne E.

2007-01-01

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, is currently undergoing testing in the Early Flight Fission Test Facility (EFF-TF). Sodium potassium (NaK), which was used in the SNAP-10A fission reactor, was selected as the primary coolant. Basic circuit components include: simulated reactor core, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, liquid metal flowmeter, load/drain reservoir, expansion reservoir, test section, and instrumentation. Operation of the circuit is based around a 37-pin partial-array core (pin and flow path dimensions are the same as those in a full core), designed to operate at 33 kWt. NaK flow rates of greater than 1 kg/sec may be achieved, depending upon the power applied to the EM pump. The heat exchanger provides for the removal of thermal energy from the circuit, simulating the presence of an energy conversion system. The presence of the test section increases the versatility of the circuit. A second liquid metal pump, an energy conversion system, and highly instrumented thermal simulators are all being considered for inclusion within the test section. This paper summarizes the capabilities and ongoing testing of the Fission Surface Power Primary Test Circuit (FSP-PTC).

Electrical short circuit and current overload tests on aircraft wiring

NASA Technical Reports Server (NTRS)

Cahill, Patricia

1995-01-01

The findings of electrical short circuit and current overload tests performed on commercial aircraft wiring are presented. A series of bench-scale tests were conducted to evaluate circuit breaker response to overcurrent and to determine if the wire showed any visible signs of thermal degradation due to overcurrent. Three types of wire used in commercial aircraft were evaluated: MIL-W-22759/34 (150 C rated), MIL-W-81381/12 (200 C rated), and BMS 1360 (260 C rated). A second series of tests evaluated circuit breaker response to short circuits and ticking faults. These tests were also meant to determine if the three test wires behaved differently under these conditions and if a short circuit or ticking fault could start a fire. It is concluded that circuit breakers provided reliable overcurrent protection. Circuit breakers may not protect wire from ticking faults but can protect wire from direct shorts. These tests indicated that the appearance of a wire subjected to a current that totally degrades the insulation looks identical to a wire subjected to a fire; however the 'fire exposed' conductor was more brittle than the conductor degraded by overcurrent. Preliminary testing indicates that direct short circuits are not likely to start a fire. Preliminary testing indicated that direct short circuits do not erode insulation and conductor to the extent that ticking faults did. Circuit breakers may not safeguard against the ignition of flammable materials by ticking faults. The flammability of materials near ticking faults is far more important than the rating of the wire insulation material.

Generation of optical vortices in an integrated optical circuit

NASA Astrophysics Data System (ADS)

Tudor, Rebeca; Kusko, Mihai; Kusko, Cristian

2017-09-01

In this work, the generation of optical vortices in an optical integrated circuit is numerically demonstrated. The optical vortices with topological charge m = ±1 are obtained by the coherent superposition of the first order modes present in a waveguide with a rectangular cross section, where the phase delay between these two propagating modes is Δφ = ±π/2. The optical integrated circuit consists of an input waveguide continued with a y-splitter. The left and the right arms of the splitter form two coupling regions K1 and K2 with a multimode output waveguide. In each coupling region, the fundamental modes present in the arms of the splitter are selectively coupled into the output waveguide horizontal and vertical first order modes, respectively. We showed by employing the beam propagation method simulations that the fine tuning of the geometrical parameters of the optical circuit makes possible the generation of optical vortices in both transverse electric (TE) and transverse magnetic (TM) modes. Also, we demonstrated that by placing a thermo-optical element on one of the y-splitter arms, it is possible to switch the topological charge of the generated vortex from m = 1 to m = -1.

49 CFR 236.577 - Test, acknowledgement, and cut-in circuits.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Test, acknowledgement, and cut-in circuits. 236.577 Section 236.577 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL..., acknowledgement, and cut-in circuits. Test, acknowledgement, and cut-in circuits shall be tested at least once...

Lithium Circuit Test Section Design and Fabrication

NASA Technical Reports Server (NTRS)

Godfroy, Thomas; Garber, Anne

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper will discuss the overall system design and build and the component testing findings.

Lithium Circuit Test Section Design and Fabrication

NASA Astrophysics Data System (ADS)

Godfroy, Thomas; Garber, Anne; Martin, James

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper discusses the overall system design and build and the component testing findings.

Device for testing continuity and/or short circuits in a cable

NASA Technical Reports Server (NTRS)

Hayhurst, Arthur R. (Inventor)

1995-01-01

A device for testing current paths is attachable to a conductor. The device automatically checks the current paths of the conductor for continuity of a center conductor, continuity of a shield and a short circuit between the shield and the center conductor. The device includes a pair of connectors and a circuit to provide for testing of the conductive paths of the cable. The pair of connectors electrically connects the conductive paths of a cable to be tested with the circuit paths of the circuit. The circuit paths in the circuit include indicators to simultaneously indicate the results of the testing.

42 CFR 84.93 - Gas flow test; open-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Gas flow test; open-circuit apparatus. 84.93...-Contained Breathing Apparatus § 84.93 Gas flow test; open-circuit apparatus. (a) A static-flow test will be performed on all open-circuit apparatus. (b) The flow from the apparatus shall be greater than 200 liters...

42 CFR 84.93 - Gas flow test; open-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Gas flow test; open-circuit apparatus. 84.93...-Contained Breathing Apparatus § 84.93 Gas flow test; open-circuit apparatus. (a) A static-flow test will be performed on all open-circuit apparatus. (b) The flow from the apparatus shall be greater than 200 liters...

46 CFR 111.12-5 - Construction and testing of generators.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 46 Shipping 4 2011-10-01 2011-10-01 false Construction and testing of generators. 111.12-5 Section 111.12-5 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) ELECTRICAL ENGINEERING ELECTRIC SYSTEMS-GENERAL REQUIREMENTS Generator Construction and Circuits § 111.12-5 Construction and...

46 CFR 111.12-5 - Construction and testing of generators.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 46 Shipping 4 2014-10-01 2014-10-01 false Construction and testing of generators. 111.12-5 Section 111.12-5 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) ELECTRICAL ENGINEERING ELECTRIC SYSTEMS-GENERAL REQUIREMENTS Generator Construction and Circuits § 111.12-5 Construction and...

46 CFR 111.12-5 - Construction and testing of generators.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 46 Shipping 4 2012-10-01 2012-10-01 false Construction and testing of generators. 111.12-5 Section 111.12-5 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) ELECTRICAL ENGINEERING ELECTRIC SYSTEMS-GENERAL REQUIREMENTS Generator Construction and Circuits § 111.12-5 Construction and...

46 CFR 111.12-5 - Construction and testing of generators.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 46 Shipping 4 2013-10-01 2013-10-01 false Construction and testing of generators. 111.12-5 Section 111.12-5 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) ELECTRICAL ENGINEERING ELECTRIC SYSTEMS-GENERAL REQUIREMENTS Generator Construction and Circuits § 111.12-5 Construction and...

46 CFR 111.12-5 - Construction and testing of generators.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 46 Shipping 4 2010-10-01 2010-10-01 false Construction and testing of generators. 111.12-5 Section 111.12-5 Shipping COAST GUARD, DEPARTMENT OF HOMELAND SECURITY (CONTINUED) ELECTRICAL ENGINEERING ELECTRIC SYSTEMS-GENERAL REQUIREMENTS Generator Construction and Circuits § 111.12-5 Construction and...

Elements configuration of the open lead test circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fukuzaki, Yumi, E-mail: 14514@sr.kagawa-nct.ac.jp; Ono, Akira

In the field of electronics, small electronic devices are widely utilized because they are easy to carry. The devices have various functions by user’s request. Therefore, the lead’s pitch or the ball’s pitch have been narrowed and high-density printed circuit board has been used in the devices. Use of the ICs which have narrow lead pitch makes normal connection difficult. When logic circuits in the devices are fabricated with the state-of-the-art technology, some faults have occurred more frequently. It can be divided into types of open faults and short faults. We have proposed a new test method using a testmore » circuit in the past. This paper propose elements configuration of the test circuit.« less

Documentation of Stainless Steel Lithium Circuit Test Section Design

NASA Technical Reports Server (NTRS)

Godfroy, T. J.; Martin, J. J.; Stewart, E. T.; Rhys, N. O.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005.

Test Structures For Bumpy Integrated Circuits

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Sayah, Hoshyar R.

1989-01-01

Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

Test Generation Algorithm for Fault Detection of Analog Circuits Based on Extreme Learning Machine

PubMed Central

Zhou, Jingyu; Tian, Shulin; Yang, Chenglin; Ren, Xuelong

2014-01-01

This paper proposes a novel test generation algorithm based on extreme learning machine (ELM), and such algorithm is cost-effective and low-risk for analog device under test (DUT). This method uses test patterns derived from the test generation algorithm to stimulate DUT, and then samples output responses of the DUT for fault classification and detection. The novel ELM-based test generation algorithm proposed in this paper contains mainly three aspects of innovation. Firstly, this algorithm saves time efficiently by classifying response space with ELM. Secondly, this algorithm can avoid reduced test precision efficiently in case of reduction of the number of impulse-response samples. Thirdly, a new process of test signal generator and a test structure in test generation algorithm are presented, and both of them are very simple. Finally, the abovementioned improvement and functioning are confirmed in experiments. PMID:25610458

42 CFR 84.96 - Service time test; closed-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Service time test; closed-circuit apparatus. 84.96...-Contained Breathing Apparatus § 84.96 Service time test; closed-circuit apparatus. (a) The closed-circuit apparatus will be classified according to the length of time it supplies adequate breathing gas to the...

42 CFR 84.96 - Service time test; closed-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Service time test; closed-circuit apparatus. 84.96...-Contained Breathing Apparatus § 84.96 Service time test; closed-circuit apparatus. (a) The closed-circuit apparatus will be classified according to the length of time it supplies adequate breathing gas to the...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be measured with a breathing machine as described in § 84.88. (b) The open-circuit apparatus will be...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be measured with a breathing machine as described in § 84.88. (b) The open-circuit apparatus will be...

An electronic circuit for sensing malfunctions in test instrumentation

NASA Technical Reports Server (NTRS)

Miller, W. M., Jr.

1969-01-01

Monitoring device differentiates between malfunctions occurring in the system undergoing test and malfunctions within the test instrumentation itself. Electronic circuits in the monitor use transistors to commutate silicon controlled rectifiers by removing the drive voltage, display circuits are then used to monitor multiple discrete lines.

Apparatus for and method of testing an electrical ground fault circuit interrupt device

DOEpatents

Andrews, L.B.

1998-08-18

An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined. 17 figs.

Apparatus for and method of testing an electrical ground fault circuit interrupt device

DOEpatents

Andrews, Lowell B.

1998-01-01

An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined.

Design and implementation of therapeutic ultrasound generating circuit for dental tissue formation and tooth-root healing.

PubMed

Woon Tiong Ang; Scurtescu, C; Wing Hoy; El-Bialy, T; Ying Yin Tsui; Jie Chen

2010-02-01

Biological tissue healing has recently attracted a great deal of research interest in various medical fields. Trauma to teeth, deep and root caries, and orthodontic treatment can all lead to various degrees of root resorption. In our previous study, we showed that low-intensity pulsed ultrasound (LIPUS) enhances the growth of lower incisor apices and accelerates their rate of eruption in rabbits by inducing dental tissue growth. We also performed clinical studies and demonstrated that LIPUS facilitates the healing of orthodontically induced teeth-root resorption in humans. However, the available LIPUS devices are too large to be used comfortably inside the mouth. In this paper, the design and implementation of a low-power LIPUS generator is presented. The generator is the core of the final intraoral device for preventing tooth root loss and enhancing tooth root tissue healing. The generator consists of a power-supply subsystem, an ultrasonic transducer, an impedance-matching circuit, and an integrated circuit composed of a digital controller circuitry and the associated driver circuit. Most of our efforts focus on the design of the impedance-matching circuit and the integrated system-on-chip circuit. The chip was designed and fabricated using 0.8- ¿m high-voltage technology from Dalsa Semiconductor, Inc. The power supply subsystem and its impedance-matching network are implemented using discrete components. The LIPUS generator was tested and verified to function as designed and is capable of producing ultrasound power up to 100 mW in the vicinity of the transducer's resonance frequency at 1.5 MHz. The power efficiency of the circuitry, excluding the power supply subsystem, is estimated at 70%. The final products will be tailored to the exact size of teeth or biological tissue, which is needed to be used for stimulating dental tissue (dentine and cementum) healing.

Generating single microwave photons in a circuit.

PubMed

Houck, A A; Schuster, D I; Gambetta, J M; Schreier, J A; Johnson, B R; Chow, J M; Frunzio, L; Majer, J; Devoret, M H; Girvin, S M; Schoelkopf, R J

2007-09-20

Microwaves have widespread use in classical communication technologies, from long-distance broadcasts to short-distance signals within a computer chip. Like all forms of light, microwaves, even those guided by the wires of an integrated circuit, consist of discrete photons. To enable quantum communication between distant parts of a quantum computer, the signals must also be quantum, consisting of single photons, for example. However, conventional sources can generate only classical light, not single photons. One way to realize a single-photon source is to collect the fluorescence of a single atom. Early experiments measured the quantum nature of continuous radiation, and further advances allowed triggered sources of photons on demand. To allow efficient photon collection, emitters are typically placed inside optical or microwave cavities, but these sources are difficult to employ for quantum communication on wires within an integrated circuit. Here we demonstrate an on-chip, on-demand single-photon source, where the microwave photons are injected into a wire with high efficiency and spectral purity. This is accomplished in a circuit quantum electrodynamics architecture, with a microwave transmission line cavity that enhances the spontaneous emission of a single superconducting qubit. When the qubit spontaneously emits, the generated photon acts as a flying qubit, transmitting the quantum information across a chip. We perform tomography of both the qubit and the emitted photons, clearly showing that both the quantum phase and amplitude are transferred during the emission. Both the average power and voltage of the photon source are characterized to verify performance of the system. This single-photon source is an important addition to a rapidly growing toolbox for quantum optics on a chip.

Test results for SEU and SEL immune memory circuits

NASA Technical Reports Server (NTRS)

Wiseman, D.; Canaris, J.; Whitaker, S.; Gambles, J.; Arave, K.; Arave, L.

1993-01-01

Test results for three SEU logic/circuit hardened CMOS memory circuits verify upset and latch-up immunity for two configurations to be in excess of 120 MeV cm(exp 2)/mg using a commercial, non-radiation hardened CMOS process. Test chips from three separate fabrication runs in two different process were evaluated.

Modifications and Modelling of the Fission Surface Power Primary Test Circuit (FSP-PTC)

NASA Technical Reports Server (NTRS)

Garber, Ann E.

2008-01-01

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, underwent a range of tests at MSFC in early 2007. During this period, system transient responses and the performance of the liquid metal pump were evaluated. In May of 2007, the circuit was drained and cleaned to prepare for multiple modifications: the addition of larger upper and lower reservoirs, the installation of an annular linear induction pump (ALIP), and the inclusion of the Single Flow Cell Test Apparatus (SFCTA) in the test section. Performance of the ALIP, provided by Idaho National Laboratory (INL), will be evaluated when testing resumes. The SFCTA, which will be tested simultaneously, will provide data on alkali metal flow behavior through the simulated core channels and assist in the development of a second generation thermal simulator. Additionally, data from the first round of testing has been used to refine the working system model, developed using the Generalized Fluid System Simulation Program (GFSSP). This paper covers the modifications of the FSP-PTC and the updated GFSSP system model.

The Neural Circuits that Generate Tics in Gilles de la Tourette Syndrome

PubMed Central

Wang, Zhishun; Maia, Tiago V.; Marsh, Rachel; Colibazzi, Tiziano; Gerber, Andrew; Peterson, Bradley S.

2014-01-01

Objective To study neural activity and connectivity within cortico-striato-thalamo-cortical circuits and to reveal circuit-based neural mechanisms that govern tic generation in Tourette syndrome. Method We acquired fMRI data from 13 participants with Tourette syndrome and 21 controls during spontaneous or simulated tics. We used independent component analysis with hierarchical partner matching to isolate neural activity within functionally distinct regions of cortico-striato-thalamo-cortical circuits. We used Granger causality to investigate causal interactions among these regions. Results We found that the Tourette group exhibited stronger neural activity and interregional causality than controls throughout all portions of the motor pathway including sensorimotor cortex, putamen, pallidum, and substania nigra. Activity in these areas correlated positively with the severity of tic symptoms. Activity within the Tourette group was stronger during spontaneous tics than during voluntary tics in somatosensory and posterior parietal cortices, putamen, and amygdala/hippocampus complex, suggesting that activity in these regions may represent features of the premonitory urges that generate spontaneous tic behaviors. In contrast, activity was weaker in the Tourette group than in controls within portions of cortico-striato-thalamo-cortical circuits that exert top-down control over motor pathways (caudate and anterior cingulate cortex), and progressively less activity in these regions accompanied more severe tic symptoms, suggesting that faulty activity in these circuits may fail to control tic behaviors or the premonitory urges that generate them. Conclusions Our findings taken together suggest that tics are caused by the combined effects of excessive activity in motor pathways and reduced activation in control portions of cortico-striato-thalamo-cortical circuits. PMID:21955933

Documentation of Stainless Steel Lithium Circuit Test Section Design. Suppl

NASA Technical Reports Server (NTRS)

Godfroy, Thomas J. (Compiler); Martin, James J.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005. This supplement contains drawings, analysis, and calculations

A test technique for measuring lightning-induced voltages on aircraft electrical circuits

NASA Technical Reports Server (NTRS)

Walko, L. C.

1974-01-01

The development of a test technique used for the measurement of lightning-induced voltages in the electrical circuits of a complete aircraft is described. The resultant technique utilizes a portable device known as a transient analyzer capable of generating unidirectional current impulses similar to lightning current surges, but at a lower current level. A linear relationship between the magnitude of lightning current and the magnitude of induced voltage permitted the scaling up of measured induced values to full threat levels. The test technique was found to be practical when used on a complete aircraft.

Laser system for testing radiation imaging detector circuits

NASA Astrophysics Data System (ADS)

Zubrzycka, Weronika; Kasinski, Krzysztof

2015-09-01

Performance and functionality of radiation imaging detector circuits in charge and position measurement systems need to meet tight requirements. It is therefore necessary to thoroughly test sensors as well as read-out electronics. The major disadvantages of using radioactive sources or particle beams for testing are high financial expenses and limited accessibility. As an alternative short pulses of well-focused laser beam are often used for preliminary tests. There are number of laser-based devices available on the market, but very often their applicability in this field is limited. This paper describes concept, design and validation of laser system for testing silicon sensor based radiation imaging detector circuits. The emphasis is put on keeping overall costs low while achieving all required goals: mobility, flexible parameters, remote control and possibility of carrying out automated tests. The main part of the developed device is an optical pick-up unit (OPU) used in optical disc drives. The hardware includes FPGA-controlled circuits for laser positioning in 2 dimensions (horizontal and vertical), precision timing (frequency and number) and amplitude (diode current) of short ns-scale (3.2 ns) light pulses. The system is controlled via USB interface by a dedicated LabVIEW-based application enabling full manual or semi-automated test procedures.

Development and Simulation of Increased Generation on a Secondary Circuit of a Microgrid

NASA Astrophysics Data System (ADS)

Reyes, Karina

As fossil fuels are depleted and their environmental impacts remain, other sources of energy must be considered to generate power. Renewable sources, for example, are emerging to play a major role in this regard. In parallel, electric vehicle (EV) charging is evolving as a major load demand. To meet reliability and resiliency goals demanded by the electricity market, interest in microgrids are growing as a distributed energy resource (DER). In this thesis, the effects of intermittent renewable power generation and random EV charging on secondary microgrid circuits are analyzed in the presence of a controllable battery in order to characterize and better understand the dynamics associated with intermittent power production and random load demands in the context of the microgrid paradigm. For two reasons, a secondary circuit on the University of California, Irvine (UCI) Microgrid serves as the case study. First, the secondary circuit (UC-9) is heavily loaded and an integral component of a highly characterized and metered microgrid. Second, a unique "next-generation" distributed energy resource has been deployed at the end of the circuit that integrates photovoltaic power generation, battery storage, and EV charging. In order to analyze this system and evaluate the impact of the DER on the secondary circuit, a model was developed to provide a real-time load flow analysis. The research develops a power management system applicable to similarly integrated systems. The model is verified by metered data obtained from a network of high resolution electric meters and estimated load data for the buildings that have unknown demand. An increase in voltage is observed when the amount of photovoltaic power generation is increased. To mitigate this effect, a constant power factor is set. Should the real power change dramatically, the reactive power is changed to mitigate voltage fluctuations.

Traveling-Wave Tube Cold-Test Circuit Optimization Using CST MICROWAVE STUDIO

NASA Technical Reports Server (NTRS)

Chevalier, Christine T.; Kory, Carol L.; Wilson, Jeffrey D.; Wintucky, Edwin G.; Dayton, James A., Jr.

2003-01-01

The internal optimizer of CST MICROWAVE STUDIO (MWS) was used along with an application-specific Visual Basic for Applications (VBA) script to develop a method to optimize traveling-wave tube (TWT) cold-test circuit performance. The optimization procedure allows simultaneous optimization of circuit specifications including on-axis interaction impedance, bandwidth or geometric limitations. The application of Microwave Studio to TWT cold-test circuit optimization is described.

Split-cross-bridge resistor for testing for proper fabrication of integrated circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G. (Inventor)

1985-01-01

An electrical testing structure and method is described whereby a test structure is fabricated on a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels each a line width wide, corresponding to the line width of the wafer circuit components, and with the two channels separated by a space equal to the line spacing of the wafer circuit components. The testing structure has associated voltage and current contact pads arranged in a two by four array for conveniently passing currents through the test structure and measuring voltages at appropriate points to calculate the sheet resistance, line width, line spacing, and line pitch of the circuit components on the wafer electrically.

Induced over voltage test on transformers using enhanced Z-source inverter based circuit

NASA Astrophysics Data System (ADS)

Peter, Geno; Sherine, Anli

2017-09-01

The normal life of a transformer is well above 25 years. The economical operation of the distribution system has its roots in the equipments being used. The economy being such, that it is financially advantageous to replace transformers with more than 15 years of service in the second perennial market. Testing of transformer is required, as its an indication of the extent to which a transformer can comply with the customers specified requirements and the respective standards (IEC 60076-3). In this paper, induced over voltage testing on transformers using enhanced Z source inverter is discussed. Power electronic circuits are now essential for a whole array of industrial electronic products. The bulky motor generator set, which is used to generate the required frequency to conduct the induced over voltage testing of transformers is nowadays replaced by static frequency converter. First conventional Z-source inverter, and second an enhanced Z source inverter is being used to generate the required voltage and frequency to test the transformer for induced over voltage test, and its characteristics is analysed.

30 CFR 77.800-1 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

..., examination, and maintenance of circuit breakers; procedures. (a) Circuit breakers and their auxiliary devices protecting high-voltage circuits to portable or mobile equipment shall be tested and examined at least once... circuit breaker and its auxiliary devices, and such repairs or adjustments as are indicated by such tests...

42 CFR 84.94 - Gas flow test; closed-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Gas flow test; closed-circuit apparatus. 84.94...-Contained Breathing Apparatus § 84.94 Gas flow test; closed-circuit apparatus. (a) Where oxygen is supplied... rated service time of the apparatus. (b) Where constant flow is used in conjunction with demand flow...

42 CFR 84.94 - Gas flow test; closed-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Gas flow test; closed-circuit apparatus. 84.94...-Contained Breathing Apparatus § 84.94 Gas flow test; closed-circuit apparatus. (a) Where oxygen is supplied... rated service time of the apparatus. (b) Where constant flow is used in conjunction with demand flow...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2013 CFR

2013-10-01

... classified according to the length of time it supplies air or oxygen to the breathing machine. (c) The... 42 Public Health 1 2013-10-01 2013-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2012 CFR

2012-10-01

... classified according to the length of time it supplies air or oxygen to the breathing machine. (c) The... 42 Public Health 1 2012-10-01 2012-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2014 CFR

2014-10-01

... classified according to the length of time it supplies air or oxygen to the breathing machine. (c) The... 42 Public Health 1 2014-10-01 2014-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be...

SiNOI and AlGaAs-on-SOI nonlinear circuits for continuum generation in Si photonics

NASA Astrophysics Data System (ADS)

El Dirani, Houssein; Monat, Christelle; Brision, Stéphane; Olivier, Nicolas; Jany, Christophe; Letartre, Xavier; Pu, Minhao; Girouard, Peter D.; Hagedorn Frandsen, Lars; Semenova, Elizaveta; Katsuo Oxenløwe, Leif; Yvind, Kresten; Sciancalepore, Corrado

2018-02-01

In this communication, we report on the design, fabrication, and testing of Silicon Nitride on Insulator (SiNOI) and Aluminum-Gallium-Arsenide (AlGaAs) on silicon-on-insulator (SOI) nonlinear photonic circuits for continuum generation in Silicon (Si) photonics. As recently demonstrated, the generation of frequency continua and supercontinua can be used to overcome the intrinsic limitations of nowadays silicon photonics notably concerning the heterogeneous integration of III-V on SOI lasers for datacom and telecom applications. By using the Kerr nonlinearity of monolithic silicon nitride and heterointegrated GaAs-based alloys on SOI, the generation of tens or even hundreds of new optical frequencies can be obtained in dispersion tailored waveguides, thus providing an all-optical alternative to the heterointegration of hundreds of standalone III-V on Si lasers. In our work, we present paths to energy-efficient continua generation on silicon photonics circuits. Notably, we demonstrate spectral broadening covering the full C-band via Kerrbased self-phase modulation in SiNOI nanowires featuring full process compatibility with Si photonic devices. Moreover, AlGaAs waveguides are heterointegrated on SOI in order to dramatically reduce (x1/10) thresholds in optical parametric oscillation and in the power required for supercontinuum generation under pulsed pumping. The manufacturing techniques allowing the monolithic co-integration of nonlinear functionalities on existing CMOS-compatible Si photonics for both active and passive components will be shown. Experimental evidence based on self-phase modulation show SiNOI and AlGaAs nanowires capable of generating wide-spanning frequency continua in the C-Band. This will pave the way for low-threshold power-efficient Kerr-based comb- and continuum- sources featuring compatibility with Si photonic integrated circuits (Si-PICs).

Initial Testing of the Stainless Steel NaK-Cooled Circuit (SNaKC)

NASA Technical Reports Server (NTRS)

Garber, Anne; Godfroy, Thomas

2007-01-01

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, is currently undergoing testing in the Early Flight Fission Test Facility (EFF-TF). Sodium potassium (NaK) was selected as the primary coolant. Basic circuit components include: simulated reactor core, NaK to gas heat exchanger, electromagnetic liquid metal pump, liquid metal flowmeter, load/drain reservoir, expansion reservoir, test section, and instrumentation. Operation of the circuit is based around the 37-pin partial-array core (pin and flow path dimensions are the same as those in a full core), designed to operate at 33 kWt. This presentation addresses the construction, fill and initial testing of the Stainless Steel NaK-Cooled Circuit (SNaKC).

Description and test results of a variable speed, constant frequency generating system

NASA Astrophysics Data System (ADS)

Brady, F. J.

1985-12-01

The variable-speed, constant frequency generating system developed for the Mod-0 wind turbine is presented. This report describes the system as it existed at the conclusion of the project. The cycloconverter control circuit is described including the addition of field-oriented control. The laboratory test and actual wind turbine test results are included.

Modifications to the Fission Surface Power Primary Test Circuit (FSP-PTC)

NASA Technical Reports Server (NTRS)

Garber, Anne E.

2008-01-01

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, underwent a range of tests at MSFC in early 2007. During this period, system transient responses and the performance of the liquid metal pump were evaluated. In May of 2007, the circuit was drained and cleaned to prepare for multiple modifications: the addition of larger upper and lower reservoirs, the installation of an annular linear induction pump (ALIP), and the inclusion of a closeable orifice in the test section. Modifications are now complete and testing has resumed. Performance of the ALIp, provided by Idaho National Laboratory (INL), is the subject of the first round ofexperimentation. This paper provides a summary of the tests conducted on the original circuit, details the physical changes that have since been made to it, and describes the current test program.

Analog cosmological particle generation in a superconducting circuit

NASA Astrophysics Data System (ADS)

Tian, Zehua; Jing, Jiliang; Dragan, Andrzej

2017-06-01

We propose the use of a waveguidelike transmission line based on direct-current superconducting quantum interference devices (dc-SQUID) and demonstrate that the node flux in this transmission line behaves in the same way as quantum fields in an expanding (or contracting) universe. We show how to detect the analog cosmological particle generation and analyze its feasibility with current circuit quantum electrodynamics (cQED) technology. Our setup in principle paves a new way for the exploration of analog quantum gravitational effects.

37. SAR2, SHOWING OIL CIRCUIT BREAKERS (ABOVE) AND GENERATOR FIELD ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

37. SAR-2, SHOWING OIL CIRCUIT BREAKERS (ABOVE) AND GENERATOR FIELD COIL CONTROL RHEOSTATS (BELOW). SCE negative no. 10331, November 1, 1923. Photograph by G. Haven Bishop. - Santa Ana River Hydroelectric System, SAR-2 Powerhouse, Redlands, San Bernardino County, CA

BETA: Behavioral testability analyzer and its application to high-level test generation and synthesis for testability. Ph.D. Thesis

NASA Technical Reports Server (NTRS)

Chen, Chung-Hsing

1992-01-01

In this thesis, a behavioral-level testability analysis approach is presented. This approach is based on analyzing the circuit behavioral description (similar to a C program) to estimate its testability by identifying controllable and observable circuit nodes. This information can be used by a test generator to gain better access to internal circuit nodes and to reduce its search space. The results of the testability analyzer can also be used to select test points or partial scan flip-flops in the early design phase. Based on selection criteria, a novel Synthesis for Testability approach call Test Statement Insertion (TSI) is proposed, which modifies the circuit behavioral description directly. Test Statement Insertion can also be used to modify circuit structural description to improve its testability. As a result, Synthesis for Testability methodology can be combined with an existing behavioral synthesis tool to produce more testable circuits.

30 CFR 75.800-3 - Testing, examination and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

... High-Voltage Distribution § 75.800-3 Testing, examination and maintenance of circuit breakers; procedures. (a) Circuit breakers and their auxiliary devices protecting underground high-voltage circuits...

30 CFR 75.800-4 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2010 CFR

2010-07-01

... Underground High-Voltage Distribution § 75.800-4 Testing, examination, and maintenance of circuit breakers... adjustment of all circuit breakers protecting high-voltage circuits which enter any underground area of the...

Testing Fixture For Microwave Integrated Circuits

NASA Technical Reports Server (NTRS)

Romanofsky, Robert; Shalkhauser, Kurt

1989-01-01

Testing fixture facilitates radio-frequency characterization of microwave and millimeter-wave integrated circuits. Includes base onto which two cosine-tapered ridge waveguide-to-microstrip transitions fastened. Length and profile of taper determined analytically to provide maximum bandwidth and minimum insertion loss. Each cosine taper provides transformation from high impedance of waveguide to characteristic impedance of microstrip. Used in conjunction with automatic network analyzer to provide user with deembedded scattering parameters of device under test. Operates from 26.5 to 40.0 GHz, but operation extends to much higher frequencies.

Approximate circuits for increased reliability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hamlet, Jason R.; Mayo, Jackson R.

2015-08-18

Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the referencemore » circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.« less

Design of parity generator and checker circuit using electro-optic effect of Mach-Zehnder interferometers

NASA Astrophysics Data System (ADS)

Kumar, Santosh; Chanderkanta; Amphawan, Angela

2016-04-01

Parity is an extra bit which is used to add in digital information to detect error at the receiver end. It can be even and odd parity. In case of even parity, the number of one's will be even included the parity and reverse in the case of odd parity. The circuit which is used to generate the parity at the transmitter side, called the parity generator and the circuit which is used to detect the parity at receiver side is called as parity checker. In this paper, an even and odd parity generator and checker circuits are designed using electro-optic effect inside lithium niobate based Mach-Zehnder Interferometers (MZIs). The MZIs structures collectively show powerful capability in switching an input optical signal to a desired output port from a collection of output ports. The paper constitutes a mathematical description of the proposed device and thereafter simulation using MATLAB. The study is verified using beam propagation method (BPM).

Accurate Cold-Test Model of Helical TWT Slow-Wave Circuits

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Dayton, James A., Jr.

1997-01-01

Recently, a method has been established to accurately calculate cold-test data for helical slow-wave structures using the three-dimensional electromagnetic computer code, MAFIA. Cold-test parameters have been calculated for several helical traveling-wave tube (TWT) slow-wave circuits possessing various support rod configurations, and results are presented here showing excellent agreement with experiment. The helical models include tape thickness, dielectric support shapes and material properties consistent with the actual circuits. The cold-test data from this helical model can be used as input into large-signal helical TWT interaction codes making it possible, for the first time, to design a complete TWT via computer simulation.

Three-phase short circuit calculation method based on pre-computed surface for doubly fed induction generator

NASA Astrophysics Data System (ADS)

Ma, J.; Liu, Q.

2018-02-01

This paper presents an improved short circuit calculation method, based on pre-computed surface to determine the short circuit current of a distribution system with multiple doubly fed induction generators (DFIGs). The short circuit current, injected into power grid by DFIG, is determined by low voltage ride through (LVRT) control and protection under grid fault. However, the existing methods are difficult to calculate the short circuit current of DFIG in engineering practice due to its complexity. A short circuit calculation method, based on pre-computed surface, was proposed by developing the surface of short circuit current changing with the calculating impedance and the open circuit voltage. And the short circuit currents were derived by taking into account the rotor excitation and crowbar activation time. Finally, the pre-computed surfaces of short circuit current at different time were established, and the procedure of DFIG short circuit calculation considering its LVRT was designed. The correctness of proposed method was verified by simulation.

Assembly and Thermal Hydraulic Test of a Stainless Steel Sodium-Potassium Circuit

NASA Technical Reports Server (NTRS)

Garber, A.; Godfroy, T.; Webster, K.

2007-01-01

Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system was originally built for use with lithium, but due to a shift in focus, it was redesigned for use with a eutectic mixture of sodium potassium (NaK). Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a full design) was selected for fabrication and test. This paper summarizes the first fill and checkout testing of the Stainless Steel NaK-Cooled Circuit (SNaKC).

Radiation Testing and Evaluation Issues for Modern Integrated Circuits

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lew M.

2005-01-01

Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

30 CFR 75.800-3 - Testing, examination and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2014 CFR

2014-07-01

... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Testing, examination and maintenance of circuit breakers; procedures. 75.800-3 Section 75.800-3 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... High-Voltage Distribution § 75.800-3 Testing, examination and maintenance of circuit breakers...

Testing of the anemometer circuit: Data report

NASA Technical Reports Server (NTRS)

Moen, Michael J.

1992-01-01

The following text discusses results from the electronic step testing and the beginning of velocity step testing in the shock tube. It should be kept in mind that frequency response is always measured as the time from the beginning of the event to the minimum (positive inflection) of the 'bucket' that immediately follows the response. This report is not a complete account of the results from square wave testing. Some data is still in the process of being analyzed and efforts are being made to fit the data to both Freymuth's third order theory and modelled responses from SPICE circuit simulation software.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, David M.

1996-01-01

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

Series and parallel arc-fault circuit interrupter tests.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Johnson, Jay Dean; Fresquez, Armando J.; Gudgel, Bob

2013-07-01

While the 2011 National Electrical Codeª (NEC) only requires series arc-fault protection, some arc-fault circuit interrupter (AFCI) manufacturers are designing products to detect and mitigate both series and parallel arc-faults. Sandia National Laboratories (SNL) has extensively investigated the electrical differences of series and parallel arc-faults and has offered possible classification and mitigation solutions. As part of this effort, Sandia National Laboratories has collaborated with MidNite Solar to create and test a 24-string combiner box with an AFCI which detects, differentiates, and de-energizes series and parallel arc-faults. In the case of the MidNite AFCI prototype, series arc-faults are mitigated by openingmore » the PV strings, whereas parallel arc-faults are mitigated by shorting the array. A range of different experimental series and parallel arc-fault tests with the MidNite combiner box were performed at the Distributed Energy Technologies Laboratory (DETL) at SNL in Albuquerque, NM. In all the tests, the prototype de-energized the arc-faults in the time period required by the arc-fault circuit interrupt testing standard, UL 1699B. The experimental tests confirm series and parallel arc-faults can be successfully mitigated with a combiner box-integrated solution.« less

Architectures and Design for Next-Generation Hybrid Circuit/Packet Networks

NASA Astrophysics Data System (ADS)

Vadrevu, Sree Krishna Chaitanya

Internet traffic is increasing rapidly at an annual growth rate of 35% with aggregate traffic exceeding several Exabyte's per month. The traffic is also becoming heterogeneous in bandwidth and quality-of-service (QoS) requirements with growing popularity of cloud computing, video-on-demand (VoD), e-science, etc. Hybrid circuit/packet networks which can jointly support circuit and packet services along with the adoption of high-bit-rate transmission systems form an attractive solution to address the traffic growth. 10 Gbps and 40 Gbps transmission systems are widely deployed in telecom backbone networks such as Comcast, AT&T, etc., and network operators are considering migration to 100 Gbps and beyond. This dissertation proposes robust architectures, capacity migration strategies, and novel service frameworks for next-generation hybrid circuit/packet architectures. In this dissertation, we study two types of hybrid circuit/packet networks: a) IP-over-WDM networks, in which the packet (IP) network is overlaid on top of the circuit (optical WDM) network and b) Hybrid networks in which the circuit and packet networks are deployed side by side such as US DoE's ESnet. We investigate techniques to dynamically migrate capacity between the circuit and packet sections by exploiting traffic variations over a day, and our methods show that significant bandwidth savings can be obtained with improved reliability of services. Specifically, we investigate how idle backup circuit capacity can be used to support packet services in IP-over-WDM networks, and similarly, excess capacity in packet network to support circuit services in ESnet. Control schemes that enable our mechanisms are also discussed. In IP-over-WDM networks, with upcoming 100 Gbps and beyond, dedicated protection will induce significant under-utilization of backup resources. We investigate design strategies to loan idle circuit backup capacity to support IP/packet services. However, failure of backup circuits will

Periodic binary sequence generators: VLSI circuits considerations

NASA Technical Reports Server (NTRS)

Perlman, M.

1984-01-01

Feedback shift registers are efficient periodic binary sequence generators. Polynomials of degree r over a Galois field characteristic 2(GF(2)) characterize the behavior of shift registers with linear logic feedback. The algorithmic determination of the trinomial of lowest degree, when it exists, that contains a given irreducible polynomial over GF(2) as a factor is presented. This corresponds to embedding the behavior of an r-stage shift register with linear logic feedback into that of an n-stage shift register with a single two-input modulo 2 summer (i.e., Exclusive-OR gate) in its feedback. This leads to Very Large Scale Integrated (VLSI) circuit architecture of maximal regularity (i.e., identical cells) with intercell communications serialized to a maximal degree.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, D.M.

1996-11-05

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

Quantum Approaches to Logic Circuit Synthesis and Testing

DTIC Science & Technology

2006-06-01

with n qubits using Octave (Oct), MATLAB (MAT), Blitz++ (B++) and QuIDDPro (QP) with Oracle Design 1. 42 Table 4: Simulating Grover’s...algorithm with n qubits using Octave (Oct), MATLAB (MAT), Blitz++ (B++) and QuIDDPro (QP) with Oracle Design 2. 43 Table 5: Number of Grover iterations...to accurately characterize the effects of gate and systematic error in a quantum circuit that generates remotely entangled EPR pairs. An

Variable cooling circuit for thermoelectric generator and engine and method of control

DOEpatents

Prior, Gregory P

2012-10-30

An apparatus is provided that includes an engine, an exhaust system, and a thermoelectric generator (TEG) operatively connected to the exhaust system and configured to allow exhaust gas flow therethrough. A first radiator is operatively connected to the engine. An openable and closable engine valve is configured to open to permit coolant to circulate through the engine and the first radiator when coolant temperature is greater than a predetermined minimum coolant temperature. A first and a second valve are controllable to route cooling fluid from the TEG to the engine through coolant passages under a first set of operating conditions to establish a first cooling circuit, and from the TEG to a second radiator through at least some other coolant passages under a second set of operating conditions to establish a second cooling circuit. A method of controlling a cooling circuit is also provided.

Testing of Diode-Clamping in an Inductive Pulsed Plasma Thruster Circuit

NASA Technical Reports Server (NTRS)

Toftul, Alexandra; Polzin, Kurt A.; Martin, Adam K.; Hudgins, Jerry L.

2014-01-01

Testing of a 5.5 kV silicon (Si) diode and 5.8 kV prototype silicon carbide (SiC) diode in an inductive pulsed plasma thruster (IPPT) circuit was performed to obtain a comparison of the resulting circuit recapture efficiency,eta(sub r), defined as the percentage of the initial charge energy remaining on the capacitor bank after the diode interrupts the current. The diode was placed in a pulsed circuit in series with a silicon controlled rectifier (SCR) switch, and the voltages across different components and current waveforms were collected over a range of capacitor charge voltages. Reverse recovery parameters, including turn-off time and peak reverse recovery current, were measured and capacitor voltage waveforms were used to determine the recapture efficiency for each case. The Si fast recovery diode in the circuit was shown to yield a recapture efficiency of up to 20% for the conditions tested, while the SiC diode further increased recapture efficiency to nearly 30%. The data presented show that fast recovery diodes operate on a timescale that permits them to clamp the discharge quickly after the first half cycle, supporting the idea that diode-clamping in IPPT circuit reduces energy dissipation that occurs after the first half cycle

30 CFR 75.900-3 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

... current circuits serving three-phase alternating current equipment and their auxiliary devices shall be... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-3 Testing, examination, and...

30 CFR 75.900-3 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2011 CFR

2011-07-01

... current circuits serving three-phase alternating current equipment and their auxiliary devices shall be... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-3 Testing, examination, and...

Remote control circuit breaker evaluation testing. [for space shuttles

NASA Technical Reports Server (NTRS)

Bemko, L. M.

1974-01-01

Engineering evaluation tests were performed on several models/types of remote control circuit breakers marketed in an attempt to gain some insight into their potential suitability for use on the space shuttle vehicle. Tests included the measurement of several electrical and operational performance parameters under laboratory ambient, space simulation, acceleration and vibration environmental conditions.

One-step generation of continuous-variable quadripartite cluster states in a circuit QED system

NASA Astrophysics Data System (ADS)

Yang, Zhi-peng; Li, Zhen; Ma, Sheng-li; Li, Fu-li

2017-07-01

We propose a dissipative scheme for one-step generation of continuous-variable quadripartite cluster states in a circuit QED setup consisting of four superconducting coplanar waveguide resonators and a gap-tunable superconducting flux qubit. With external driving fields to adjust the desired qubit-resonator and resonator-resonator interactions, we show that continuous-variable quadripartite cluster states of the four resonators can be generated with the assistance of energy relaxation of the qubit. By comparison with the previous proposals, the distinct advantage of our scheme is that only one step of quantum operation is needed to realize the quantum state engineering. This makes our scheme simpler and more feasible in experiment. Our result may have useful application for implementing quantum computation in solid-state circuit QED systems.

30 CFR 75.900-4 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2011 CFR

2011-07-01

... circuits serving three-phase alternating current equipment used in the mine. Such record shall be kept in a... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-4 Testing, examination, and...

30 CFR 75.900-4 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2010 CFR

2010-07-01

... circuits serving three-phase alternating current equipment used in the mine. Such record shall be kept in a... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-4 Testing, examination, and...

A miniature microcontroller curve tracing circuit for space flight testing transistors.

PubMed

Prokop, N; Greer, L; Krasowski, M; Flatico, J; Spina, D

2015-02-01

This paper describes a novel miniature microcontroller based curve tracing circuit, which was designed to monitor the environmental effects on Silicon Carbide Junction Field Effect Transistor (SiC JFET) device performance, while exposed to the low earth orbit environment onboard the International Space Station (ISS) as a resident experiment on the 7th Materials on the International Space Station Experiment (MISSE7). Specifically, the microcontroller circuit was designed to operate autonomously and was flown on the external structure of the ISS for over a year. This curve tracing circuit is capable of measuring current vs. voltage (I-V) characteristics of transistors and diodes. The circuit is current limited for low current devices and is specifically designed to test high temperature, high drain-to-source resistance SiC JFETs. The results of each I-V data set are transmitted serially to an external telemetered communication interface. This paper discusses the circuit architecture, its design, and presents example results.

Continuous generation and stabilization of Schrödinger cat states in a quantum circuit

NASA Astrophysics Data System (ADS)

Roy, A.; Leghtas, Z.; Stone, A. D.; Devoret, M. H.; Mirrahimi, M.

2015-03-01

While dissipation is widely considered as being harmful for quantum coherence, it can, when properly engineered, lead to the stabilization of non-trivial pure quantum states. Deterministic generation of non-classical states like Schrödinger cat states is one of the key ingredients in performing universal quantum computation. We theoretically propose a scheme, adapted to superconducting quantum circuits, for continuous generation and stabilization of these states in a cavity using dissipation engineering. We first generate these states inside a high-Q cavity by engineering its dissipation with a bath that only exchanges photons in pairs. We then stabilize these transient states against single-photon decay using a second engineered bath. The single-photon stabilization is autonomous, and exploits the photon-number-dependent frequency-splitting due to Kerr interactions in the strongly dispersive regime of circuit QED. We present analytical and numerical results demonstrating the robustness of the scheme and its amenability to immediate experimental implementation. Work supported by ARO.

Evaluation of test equipment for the detection of contamination on electronic circuits

NASA Astrophysics Data System (ADS)

Bergendahl, C. G.; Dunn, B. D.

1984-08-01

The reproducibility, sensitivity and ease of operation of test equipment for the detection of ionizable contaminants on the surface of printed circuit assemblies were assessed. The characteristics of the test equipment are described. Soldering fluxes were chosen as contaminants and were applied in controlled amounts to printed-circuit board assemblies possessing two different component populations. Results show that the relationship between equipment readings varies with flux type. Each kind of test equipment gives a good measure of board cleanliness, although reservations exist concerning the interpretation of such results. A test method for the analysis of total (organic and inorganic) halides in solder fluxes is presented.

Magnetic circuit modifications in resonant vibration harvesters

NASA Astrophysics Data System (ADS)

Szabo, Zoltan; Fiala, Pavel; Dohnal, Premysl

2018-01-01

The paper discusses the conclusions obtained from a research centered on a vibration-powered milli- or micro generator (MG) operating as a harvester to yield the maximum amount of energy transferred by the vibration of an independent system. The investigation expands on the results proposed within papers that theoretically define the properties characterizing the basic configurations of a generator based on applied Faraday's law of induction. We compared two basic principles of circuit closing in a magnetic circuit that, fully or partially, utilizes a ferromagnetic material, and a large number of generator design solutions were examined and tested. In the given context, the article brings a compact survey of the rules facilitating energy transformation and the designing of harvesters.

Combining a Toggle Switch and a Repressilator within the AC-DC Circuit Generates Distinct Dynamical Behaviors.

PubMed

Perez-Carrasco, Ruben; Barnes, Chris P; Schaerli, Yolanda; Isalan, Mark; Briscoe, James; Page, Karen M

2018-04-25

Although the structure of a genetically encoded regulatory circuit is an important determinant of its function, the relationship between circuit topology and the dynamical behaviors it can exhibit is not well understood. Here, we explore the range of behaviors available to the AC-DC circuit. This circuit consists of three genes connected as a combination of a toggle switch and a repressilator. Using dynamical systems theory, we show that the AC-DC circuit exhibits both oscillations and bistability within the same region of parameter space; this generates emergent behaviors not available to either the toggle switch or the repressilator alone. The AC-DC circuit can switch on oscillations via two distinct mechanisms, one of which induces coherence into ensembles of oscillators. In addition, we show that in the presence of noise, the AC-DC circuit can behave as an excitable system capable of spatial signal propagation or coherence resonance. Together, these results demonstrate how combinations of simple motifs can exhibit multiple complex behaviors. Copyright © 2018 The Author(s). Published by Elsevier Inc. All rights reserved.

Circuit For Current-vs.-Voltage Tests Of Semiconductors

NASA Technical Reports Server (NTRS)

Huston, Steven W.

1991-01-01

Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2006-12-12

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2004-05-18

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Life test of a nickel cadmium battery with a protection/reconditioning circuit

NASA Technical Reports Server (NTRS)

Lanier, J. R., Jr.; Bush, J. R., Jr.

1981-01-01

Results are discussed for a Ni-Cd battery test over a period of 8 years, 2 months and 44,213 simulated low Earth orbits. The battery cells were protected against overdischarge and reversal at discharge rates up to 25 amperes (1.25C) by a battery protection and reconditioning circuit. The circuit performed flawlessly during the test, and proved its value, both as a battery reconditioner and a cell protection device. Battery cell failures are also discussed. The test demonstrated the viability of using Ni-Cd batteries at depth-of-discharge up to 25 percent for over 5 years in a low Earth orbit.

Field-circuit analysis and measurements of a single-phase self-excited induction generator

NASA Astrophysics Data System (ADS)

Makowski, Krzysztof; Leicht, Aleksander

2017-12-01

The paper deals with a single-phase induction machine operating as a stand-alone self-excited single-phase induction generator for generation of electrical energy from renewable energy sources. By changing number of turns and size of wires in the auxiliary stator winding, an improvement of performance characteristics of the generator were obtained as regards no-load and load voltage of the stator windings as well as stator winding currents of the generator. Field-circuit simulation models of the generator were developed using Flux2D software package for the generator with shunt capacitor in the main stator winding. The obtained results have been validated experimentally at the laboratory setup using the single-phase capacitor induction motor of 1.1 kW rated power and 230 V voltage as a base model of the generator.

Multiplexing Superconducting Qubit Circuit for Single Microwave Photon Generation

NASA Astrophysics Data System (ADS)

George, R. E.; Senior, J.; Saira, O.-P.; Pekola, J. P.; de Graaf, S. E.; Lindström, T.; Pashkin, Yu A.

2017-10-01

We report on a device that integrates eight superconducting transmon qubits in λ /4 superconducting coplanar waveguide resonators fed from a common feedline. Using this multiplexing architecture, each resonator and qubit can be addressed individually, thus reducing the required hardware resources and allowing their individual characterisation by spectroscopic methods. The measured device parameters agree with the designed values, and the resonators and qubits exhibit excellent coherence properties and strong coupling, with the qubit relaxation rate dominated by the Purcell effect when brought in resonance with the resonator. Our analysis shows that the circuit is suitable for generation of single microwave photons on demand with an efficiency exceeding 80%.

ADDER CIRCUIT

DOEpatents

Jacobsohn, D.H.; Merrill, L.C.

1959-01-20

An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

A New Test Method of Circuit Breaker Spring Telescopic Characteristics Based Image Processing

NASA Astrophysics Data System (ADS)

Huang, Huimin; Wang, Feifeng; Lu, Yufeng; Xia, Xiaofei; Su, Yi

2018-06-01

This paper applied computer vision technology to the fatigue condition monitoring of springs, and a new telescopic characteristics test method is proposed for circuit breaker operating mechanism spring based on image processing technology. High-speed camera is utilized to capture spring movement image sequences when high voltage circuit breaker operated. Then the image-matching method is used to obtain the deformation-time curve and speed-time curve, and the spring expansion and deformation parameters are extracted from it, which will lay a foundation for subsequent spring force analysis and matching state evaluation. After performing simulation tests at the experimental site, this image analyzing method could solve the complex problems of traditional mechanical sensor installation and monitoring online, status assessment of the circuit breaker spring.

Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

Testing interconnected VLSI circuits in the Big Viterbi Decoder

NASA Technical Reports Server (NTRS)

Onyszchuk, I. M.

1991-01-01

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Results of closed cycle MHD power generation test with a helium-cesium working fluid

NASA Technical Reports Server (NTRS)

Sovie, R. J.

1977-01-01

The cross sectional dimensions of the MHD channel in the NASA Lewis closed loop facility were reduced to 3.8 x 11.4 cm. Tests were run in this channel using a helium-cesium working fluid at stagnation pressures of 160,000 n/M2, stagnation temperatures of 2000-2060 K and an entrance Mach number of 0.36. In these tests Faraday open circuit voltages of 200 V were measured which correspond to a Faraday field of 1750 V/M. Power generation tests were run for different groups of electrode configurations and channel lengths. Hall fields up to 1450 V/M were generated. Power extraction per electrode of 183 W and power densities of 1.7 MW/M3 were obtained. A total power output of 2 kW was generated for tests with 14 electrodes. The power densities obtained in this channel represent a factor of 3 improvement over those previously reported for the M = 0.2 channel.

Automated ILA design for synchronous sequential circuits

NASA Technical Reports Server (NTRS)

Liu, M. N.; Liu, K. Z.; Maki, G. K.; Whitaker, S. R.

1991-01-01

An iterative logic array (ILA) architecture for synchronous sequential circuits is presented. This technique utilizes linear algebra to produce the design equations. The ILA realization of synchronous sequential logic can be fully automated with a computer program. A programmable design procedure is proposed to fullfill the design task and layout generation. A software algorithm in the C language has been developed and tested to generate 1 micron CMOS layouts using the Hewlett-Packard FUNGEN module generator shell.

Universal nondestructive mm-wave integrated circuit test fixture

NASA Technical Reports Server (NTRS)

Romanofsky, Robert R. (Inventor); Shalkhauser, Kurt A. (Inventor)

1990-01-01

Monolithic microwave integrated circuit (MMIC) test includes a bias module having spring-loaded contacts which electrically engage pads on a chip carrier disposed in a recess of a base member. RF energy is applied to and passed from the chip carrier by chamfered edges of ridges in the waveguide passages of housings which are removably attached to the base member. Thru, Delay, and Short calibration standards having dimensions identical to those of the chip carrier assure accuracy and reliability of the test. The MMIC chip fits in an opening in the chip carrier with the boundaries of the MMIC lying on movable reference planes thereby establishing accuracy and flexibility.

Noise isolation system for high-speed circuits

DOEpatents

McNeilly, D.R.

1983-12-29

A noise isolation circuit is provided that consists of a dual function bypass which confines high-speed switching noise to the component or circuit which generates it and isolates the component or circuit from high-frequency noise transients which may be present on the ground and power supply busses. A local circuit ground is provided which is coupled to the system ground by sufficient impedance to force the dissipation of the noise signal in the local circuit or component generating the noise. The dual function bypass network couples high-frequency noise signals generated in the local component or circuit through a capacitor to the local ground while isolating the component or circuit from noise signals which may be present on the power supply busses or system ground. The network is an effective noise isolating system and is applicable to both high-speed analog and digital circuits.

Noise isolation system for high-speed circuits

DOEpatents

McNeilly, David R.

1986-01-01

A noise isolation circuit is provided that consists of a dual function bypass which confines high-speed switching noise to the component or circuit which generates it and isolates the component or circuit from high-frequency noise transients which may be present on the ground and power supply busses. A local circuit ground is provided which is coupled to the system ground by sufficient impedance to force the dissipation of the noise signal in the local circuit or component generating the noise. The dual function bypass network couples high-frequency noise signals generated in the local component or circuit through a capacitor to the local ground while isolating the component or circuit from noise signals which may be present on the power supply busses or system ground. The network is an effective noise isolating system and is applicable to both high-speed analog and digital circuits.

Method of boundary testing of the electric circuits and its application for calculating electric tolerances. [electric equipment tests

NASA Technical Reports Server (NTRS)

Redkina, N. P.

1974-01-01

Boundary testing of electric circuits includes preliminary and limiting tests. Preliminary tests permit determination of the critical parameters causing the greatest deviation of the output parameter of the system. The boundary tests offer the possibility of determining the limits of the fitness of the system with simultaneous variation of its critical parameters.

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 C

NASA Technical Reports Server (NTRS)

Spry, David; Neudeck, Phil; Chen, Liangyu; Chang, Carl; Lukco, Dorothy; Beheim, Glenn M

2016-01-01

We have reported SiC integrated circuits (IC's) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 C [1, 2]. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 C [3]. However, this thermal ramp was not ended until a peak temperature of 880 C (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology. Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 C. In one test, the temperature was ramped and then held at 727 C, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 C before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 C (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 C.

A PC-based generator of surface ECG potentials for computer electrocardiograph testing.

PubMed

Franchi, D; Palagi, G; Bedini, R

1994-02-01

The system is composed of an electronic circuit, connected to a PC, whose outputs, starting from ECGs digitally collected by commercial interpretative electrocardiographs, simulate virtual patients' limb and chest electrode potentials. Appropriate software manages the D/A conversion and lines up the original short-term signal in a ring buffer to generate continuous ECG traces. The device also permits the addition of artifacts and/or baseline wanders/shifts on each lead separately. The system has been accurately tested and statistical indexes have been computed to quantify the reproduction accuracy analyzing, in the generated signal, both the errors induced on the fiducial point measurements and the capability to retain the diagnostic significance. The device integrated with an annotated ECG data base constitutes a reliable and powerful system to be used in the quality assurance testing of computer electrocardiographs.

Investigation of DC hybrid circuit breaker based on high-speed switch and arc generator

NASA Astrophysics Data System (ADS)

Wu, Yifei; Rong, Mingzhe; Wu, Yi; Yang, Fei; Li, Mei; Zhong, Jianying; Han, Guohui; Niu, Chunping; Hu, Yang

2015-02-01

A new design of DC hybrid circuit breaker based on high-speed switch (HSS) and arc generator (AG), which can drastically profit from low heat loss in normal state and fast current breaking under fault state, is presented and analyzed in this paper. AG is designed according to the magnetic pinch effect of liquid metal. By utilizing the arc voltage generated across AG, the fault current is rapidly commutated from HSS into parallel connected branch. As a consequence, the arcless open of HSS is achieved. The post-arc conducting resume time (Δ tc) of AG and the commutation original voltage (Uc), two key factors in the commutation process, are investigated experimentally. Particularly, influences of the liquid metal channel diameter (Φ) of AG, fault current rate of rise (di/dt) and Uc on Δ tc are focused on. Furthermore, a suitable Uc is determined during the current commutation process, aiming at the reliable arcless open of HSS and short breaking time. Finally, the fault current breaking test is carried out for the current peak value of 11.8 kA, and the validity of the design is confirmed by the experimental results.

Investigation of DC hybrid circuit breaker based on high-speed switch and arc generator.

PubMed

Wu, Yifei; Rong, Mingzhe; Wu, Yi; Yang, Fei; Li, Mei; Zhong, Jianying; Han, Guohui; Niu, Chunping; Hu, Yang

2015-02-01

A new design of DC hybrid circuit breaker based on high-speed switch (HSS) and arc generator (AG), which can drastically profit from low heat loss in normal state and fast current breaking under fault state, is presented and analyzed in this paper. AG is designed according to the magnetic pinch effect of liquid metal. By utilizing the arc voltage generated across AG, the fault current is rapidly commutated from HSS into parallel connected branch. As a consequence, the arcless open of HSS is achieved. The post-arc conducting resume time (Δ tc) of AG and the commutation original voltage (Uc), two key factors in the commutation process, are investigated experimentally. Particularly, influences of the liquid metal channel diameter (Φ) of AG, fault current rate of rise (di/dt) and Uc on Δ tc are focused on. Furthermore, a suitable Uc is determined during the current commutation process, aiming at the reliable arcless open of HSS and short breaking time. Finally, the fault current breaking test is carried out for the current peak value of 11.8 kA, and the validity of the design is confirmed by the experimental results.

Compiling quantum circuits to realistic hardware architectures using temporal planners

NASA Astrophysics Data System (ADS)

Venturelli, Davide; Do, Minh; Rieffel, Eleanor; Frank, Jeremy

2018-04-01

To run quantum algorithms on emerging gate-model quantum hardware, quantum circuits must be compiled to take into account constraints on the hardware. For near-term hardware, with only limited means to mitigate decoherence, it is critical to minimize the duration of the circuit. We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus on compiling to superconducting hardware architectures with nearest neighbor constraints. Our initial experiments focus on compiling Quantum Alternating Operator Ansatz (QAOA) circuits whose high number of commuting gates allow great flexibility in the order in which the gates can be applied. That freedom makes it more challenging to find optimal compilations but also means there is a greater potential win from more optimized compilation than for less flexible circuits. We map this quantum circuit compilation problem to a temporal planning problem, and generated a test suite of compilation problems for QAOA circuits of various sizes to a realistic hardware architecture. We report compilation results from several state-of-the-art temporal planners on this test set. This early empirical evaluation demonstrates that temporal planning is a viable approach to quantum circuit compilation.

Results of closed cycle MHD power generation tests with a helium-cesium working fluid

NASA Technical Reports Server (NTRS)

Sovie, R. J.

1977-01-01

The cross-sectional dimensions of the MHD channel in the NASA Lewis closed loop facility have been reduced to 3.8 x 11.4 cm. Tests were run in this channel using a helium-cesium working fluid at stagnation pressures of 1.6 x 10 to the 5th N/sq m, stagnation temperatures of 2000-2060 K and an entrance Mach number of 0.36. In these tests Faraday open circuit voltages of 200 V were measured which correspond to a Faraday field of 1750 V/m. Power generation tests were run for different groups of electrode configurations and channel lengths. Hall fields up to 1450 V/m were generated. Power extraction per electrode of 183 W and power densities of 1.7 MW/cu m have been obtained. A total power output of 2 kW was generated for tests with 14 electrodes. The power densities obtained in this channel represent a factor of 3 improvement over those reported for the m = 0.2 channel at the last EAM Symposium.

Starter/generator testing

NASA Astrophysics Data System (ADS)

Anon

1994-10-01

Sundstrand Aerospace and GE Aircraft Engines have studied the switched reluctance machine for use as an integral starter/generator for future aircraft engines. They have conducted an initial, low-power testing of the starter/generator, which is based on power inverters using IGBT-technology semiconductors, to verify its feasibility in the externally mounted version of the integral starter/generator. This preliminary testing of the 250-kW starter/generator reveals favorable results.

DEVELOPMENT, TESTING, AND DEMONSTRATION OF AN OPTIMAL FINE COAL CLEANING CIRCUIT

DOE Office of Scientific and Technical Information (OSTI.GOV)

Steven R. Hadley; R. Mike Mishra; Michael Placha

1999-01-27

The objective of this project was to improve the efficiency of the fine coal froth flotation circuit in commercial coal preparation plants. The plant selected for this project, Cyprus Emerald Coal Preparation Plant, cleans 1200-1400 tph of Pittsburgh seam raw coal and uses conventional flotation cells to clean the minus 100-mesh size fraction. The amount of coal in this size fraction is approximately 80 tph with an average ash content of 35%. The project was carried out in two phases. In Phase I, four advanced flotation cells, i.e., a Jameson cell, an Outokumpu HG tank cell, an open column, andmore » a packed column cell, were subjected to bench-scale testing and demonstration. In Phase II, two of these flotation cells, the Jameson cell and the packed column, were subjected to in-plant, proof-of-concept (POC) pilot plant testing both individually and in two-stage combination in order to ascertain whether a two-stage circuit results in lower levelized production costs. The bench-scale results indicated that the Jameson cell and packed column cell would be amenable to the single- and two-stage flotation approach. POC tests using these cells determined that single-stage coal matter recovery (CMR) of 85% was possible with a product ash content of 5.5-7%. Two-stage operation resulted in a coal recovery of 90% with a clean coal ash content of 6-7.5%. This compares favorably with the plant flotation circuit recovery of 80% at a clean coal ash of 11%.« less

Insulation co-ordination aspects for power stations with generator circuit-breakers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sanders, M.; Koeppl, G.; Kreuzer, J.

1995-07-01

The generator circuit-breaker (gen. c.b.) located between the generator and the step-up transformer, is now being applied world-wide. It has become a recognized electrical component of power stations which is largely due to economical advantages and increased power station availability. Technical protection considerations for power stations have always been the reason for discussion and the object of improvement. With the use of a gen. c.b., some points of view need to be considered anew. Not only the protection system in case of fault conditions will be influenced, but also the insulation co-ordination philosophy. Below the results of some calculations concerningmore » expected overvoltages are presented. These calculations are based on a transformer rated 264/15.5kV, 220 MVA. But the results are transferable to other power plants. Some measurements carried out on a transformer of the same rating complement the calculations. The findings may contribute to an improvement in insulation co-ordination and protection of the electrical system generator--step-up transformer.« less

Apparatus and method for defect testing of integrated circuits

DOEpatents

Cole, Jr., Edward I.; Soden, Jerry M.

2000-01-01

An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V.sub.DD, to an IC under test and measures a transient voltage component, V.sub.DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V.sub.DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V.sub.DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.

The Vite Model: A Neural Command Circuit for Generating Arm and Articulator Trajectories,

DTIC Science & Technology

1988-03-01

Principles of Learning, Perception, Development , Cognition , and Motor Control. Boston: Reidel Press, (1982). Grossberg, S . and Kuperstein, M., Neural...AD-RI92 705 THE YITE MODEL: A NEURAL COMMAND CIRCUIT FO R .# GENERATING ARM AND ARTUCULA..(U) BOSTON UNJY MA CENTER FOR ADAPTIVE SYSTEMS S GROSSUERO...and Articulator Trajectories 6 EFRIGOG EOTNME 7. AUTHOR( s ) 5. CONTRACT OR GRANT NUMBER( s ) Stephen Grossberg XM- F49620-86-C-0O37 Daniel Bullock 9. S

Design of an improved RCD buffer circuit for full bridge circuit

NASA Astrophysics Data System (ADS)

Yang, Wenyan; Wei, Xueye; Du, Yongbo; Hu, Liang; Zhang, Liwei; Zhang, Ou

2017-05-01

In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubber circuit with the improved RCD snubber circuit. By comparing and analyzing, it is proved that the improved buffer circuit can absorb surge voltage. Finally, experiments are demonstrated to validate that the correctness of the RC formula and the improved RCD snubber circuit.

Gap Junction-Mediated Signaling from Motor Neurons Regulates Motor Generation in the Central Circuits of Larval Drosophila.

PubMed

Matsunaga, Teruyuki; Kohsaka, Hiroshi; Nose, Akinao

2017-02-22

In this study, we used the peristaltic crawling of Drosophila larvae as a model to study how motor patterns are regulated by central circuits. We built an experimental system that allows simultaneous application of optogenetics and calcium imaging to the isolated ventral nerve cord (VNC). We then investigated the effects of manipulating local activity of motor neurons (MNs) on fictive locomotion observed as waves of MN activity propagating along neuromeres. Optical inhibition of MNs with halorhodopsin3 in a middle segment (A4, A5, or A6), but not other segments, dramatically decreased the frequency of the motor waves. Conversely, local activation of MNs with channelrhodopsin2 in a posterior segment (A6 or A7) increased the frequency of the motor waves. Since peripheral nerves mediating sensory feedback were severed in the VNC preparation, these results indicate that MNs send signals to the central circuits to regulate motor pattern generation. Our results also indicate segmental specificity in the roles of MNs in motor control. The effects of the local MN activity manipulation were lost in shaking-B 2 ( shakB 2 ) or ogre 2 , gap-junction mutations in Drosophila , or upon acute application of the gap junction blocker carbenoxolone, implicating electrical synapses in the signaling from MNs. Cell-type-specific RNAi suggested shakB and ogre function in MNs and interneurons, respectively, during the signaling. Our results not only reveal an unexpected role for MNs in motor pattern regulation, but also introduce a powerful experimental system that enables examination of the input-output relationship among the component neurons in this system. SIGNIFICANCE STATEMENT Motor neurons are generally considered passive players in motor pattern generation, simply relaying information from upstream interneuronal circuits to the target muscles. This study shows instead that MNs play active roles in the control of motor generation by conveying information via gap junctions to the

4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

NASA Technical Reports Server (NTRS)

Spry, D. J.; Neudeck, P. G.; Chen, L.; Chang, C. W.; Lukco, D.; Beheim, G. M.

2015-01-01

Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

A Parallel Genetic Algorithm for Automated Electronic Circuit Design

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris; Norvig, Peter (Technical Monitor)

2000-01-01

We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.

Test Bench for Coupling and Shielding Magnetic Fields

NASA Astrophysics Data System (ADS)

Jordan, J.; Esteve, V.; Dede, E.; Sanchis, E.; Maset, E.; Ferreres, A.; Ejea, J. B.; Cases, C.

2016-05-01

This paper describes a test bench for training purposes, which uses a magnetic field generator to couple this magnetic field to a victim circuit. It can be very useful to test for magnetic susceptibility as well. The magnetic field generator consists of a board, which generates a variable current that flows into a printed circuit board with spiral tracks (noise generator). The victim circuit consists of a coaxial cable concentric with the spiral tracks and its generated magnetic field. The coaxial cable is part of a circuit which conducts a signal produced by a signal generator and a resistive load. In the paper three cases are studied. First, the transmitted signal from the signal generator uses the central conductor of the coaxial cable and the shield is floating. Second, the shield is short circuited at its ends (and thus forming a loop). Third, when connecting the shield in series with the inner conductor and therefore having the current flowing into the coax via the inner conductor and returning via the shield.

Precision Tests of a Quantum Hall Effect Device DC Equivalent Circuit Using Double-Series and Triple-Series Connections

PubMed Central

Jeffery, A.; Elmquist, R. E.; Cage, M. E.

1995-01-01

Precision tests verify the dc equivalent circuit used by Ricketts and Kemeny to describe a quantum Hall effect device in terms of electrical circuit elements. The tests employ the use of cryogenic current comparators and the double-series and triple-series connection techniques of Delahaye. Verification of the dc equivalent circuit in double-series and triple-series connections is a necessary step in developing the ac quantum Hall effect as an intrinsic standard of resistance. PMID:29151768

Comparison of extrinsic and intrinsic neuromodulation in two central pattern generator circuits in invertebrates.

PubMed

Katz, P S

1998-05-01

There are many sources of modulatory input to CPGs and other types of neuronal circuits. These inputs can change the properties of cells and synapses and dramatically alter the production of motor patterns. Sometimes this enables the production of motor patterns by the circuit. At other times, the modulation allows alternate motor patterns to be produced by a single circuit. Modulatory neurones have fast as well as slow actions. In some cases, such as with GPR, the two types of effects are due to the release of co-transmitters. In other cases, such as with the DSIs, a single substance can act at different receptors to cause fast and slow postsynaptic actions. The effect of a neuromodulatory neurone is determined by the type of receptor on the target neurone. Thus a single modulatory neurone evokes a suite of actions in a circuit and thereby produces a co-ordinated output. Extrinsic and intrinsic sources of neuromodulation have different sets of constraints acting upon them. For example, extrinsic neuromodulation can easily be used for motor pattern selection; a different pattern is produced depending upon which modulatory inputs are active. However, intrinsic neuromodulation is not well suited to that task. Instead, it is useful for self-organizing properties and experience-dependent effects. One clear conclusion from this work and other work in the field is that neuromodulation by neurones intrinsic and extrinsic to CPGs is not uncommon (Katz, 1995; Katz & Frost, 1996). It is part of the normal process of motor pattern generation. As such, it needs to be considered when discussing mechanisms for neuronal circuit actions.

Automatic circuit interrupter

NASA Technical Reports Server (NTRS)

Dwinell, W. S.

1979-01-01

In technique, voice circuits connecting crew's cabin to launch station through umbilical connector disconnect automatically unused, or deadened portion of circuits immediately after vehicle is launched, eliminating possibility that unused wiring interferes with voice communications inside vehicle or need for manual cutoff switch and its associated wiring. Technique is applied to other types of electrical actuation circuits, also launch of mapped vehicles, such as balloons, submarines, test sleds, and test chambers-all requiring assistance of ground crew.

A model-based exploration of the role of pattern generating circuits during locomotor adaptation.

PubMed

Marjaninejad, Ali; Finley, James M

2016-08-01

In this study, we used a model-based approach to explore the potential contributions of central pattern generating circuits (CPGs) during adaptation to external perturbations during locomotion. We constructed a neuromechanical modeled of locomotion using a reduced-phase CPG controller and an inverted pendulum mechanical model. Two different forms of locomotor adaptation were examined in this study: split-belt treadmill adaptation and adaptation to a unilateral, elastic force field. For each simulation, we first examined the effects of phase resetting and varying the model's initial conditions on the resulting adaptation. After evaluating the effect of phase resetting on the adaptation of step length symmetry, we examined the extent to which the results from these simple models could explain previous experimental observations. We found that adaptation of step length symmetry during split-belt treadmill walking could be reproduced using our model, but this model failed to replicate patterns of adaptation observed in response to force field perturbations. Given that spinal animal models can adapt to both of these types of perturbations, our findings suggest that there may be distinct features of pattern generating circuits that mediate each form of adaptation.

Concept For Generation Of Long Pseudorandom Sequences

NASA Technical Reports Server (NTRS)

Wang, C. C.

1990-01-01

Conceptual very-large-scale integrated (VLSI) digital circuit performs exponentiation in finite field. Algorithm that generates unusually long sequences of pseudorandom numbers executed by digital processor that includes such circuits. Concepts particularly advantageous for such applications as spread-spectrum communications, cryptography, and generation of ranging codes, synthetic noise, and test data, where usually desirable to make pseudorandom sequences as long as possible.

Temperature-Dependent Short-Circuit Capability of Silicon Carbide Power MOSFETs

DOE PAGES

Wang, Zhiqiang; Shi, Xiaojie; Tolbert, Leon M.; ...

2016-02-01

Our paper presents a comprehensive short-circuit ruggedness evaluation and numerical investigation of up-to-date commercial silicon carbide (SiC) MOSFETs. The short-circuit capability of three types of commercial 1200-V SiC MOSFETs is tested under various conditions, with case temperatures from 25 to 200 degrees C and dc bus voltages from 400 to 750 V. It is found that the commercial SiC MOSFETs can withstand short-circuit current for only several microseconds with a dc bus voltage of 750 V and case temperature of 200 degrees C. Moreover, the experimental short-circuit behaviors are compared, and analyzed through numerical thermal dynamic simulation. Specifically, an electrothermalmore » model is built to estimate the device internal temperature distribution, considering the temperature-dependent thermal properties of SiC material. Based on the temperature information, a leakage current model is derived to calculate the main leakage current components (i.e., thermal, diffusion, and avalanche generation currents). Finally, numerical results show that the short-circuit failure mechanisms of SiC MOSFETs can be thermal generation current induced thermal runaway or high-temperature-related gate oxide damage.« less

Nonequilibrium Quantum Simulation in Circuit QED

NASA Astrophysics Data System (ADS)

Raftery, James John

Superconducting circuits have become a leading architecture for quantum computing and quantum simulation. In particular, the circuit QED framework leverages high coherence qubits and microwave resonators to construct systems realizing quantum optics models with exquisite precision. For example, the Jaynes-Cummings model has been the focus of significant theoretical interest as a means of generating photon-photon interactions. Lattices of such strongly correlated photons are an exciting new test bed for exploring non-equilibrium condensed matter physics such as dissipative phase transitions of light. This thesis covers a series of experiments which establish circuit QED as a powerful tool for exploring condensed matter physics with photons. The first experiment explores the use of ultra high speed arbitrary waveform generators for the direct digital synthesis of complex microwave waveforms. This new technique dramatically simplifies the classical control chain for quantum experiments and enables high bandwidth driving schemes expected to be essential for generating interesting steady-states and dynamical behavior. The last two experiments explore the rich physics of interacting photons, with an emphasis on small systems where a high degree of control is possible. The first experiment realizes a two-site system called the Jaynes-Cummings dimer, which undergoes a self-trapping transition where the strong photon-photon interactions block photon hopping between sites. The observation of this dynamical phase transition and the related dissipation-induced transition are key results of this thesis. The final experiment augments the Jaynes-Cummings dimer by redesigning the circuit to include in-situ control over photon hopping between sites using a tunable coupler. This enables the study of the dimer's localization transition in the steady-state regime.

Polymorphic Electronic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

The plastic scintillator detector calibration circuit for DAMPE

NASA Astrophysics Data System (ADS)

Yang, Haibo; Kong, Jie; Zhao, Hongyun; Su, Hong

2016-07-01

The Dark Matter Particle Explorer (DAMPE) is being constructed as a scientific satellite to observe high energy cosmic rays in space. Plastic scintillator detector array (PSD), developed by Institute of Modern Physics, Chinese Academy of Sciences (IMPCAS), is one of the most important parts in the payload of DAMPE which is mainly used for the study of dark matter. As an anti-coincidence detector, and a charged-particle identification detector, the PSD has a total of 360 electronic readout channels, which are distributed at four sides of PSD using four identical front end electronics (FEE). Each FEE reads out 90 charge signals output by the detector. A special calibration circuit is designed in FEE. FPGA is used for on-line control, enabling the calibration circuit to generate the pulse signal with known charge. The generated signal is then sent to the FEE for calibration and self-test. This circuit mainly consists of DAC, operation amplifier, analog switch, capacitance and resistance. By using controllable step pulse, the charge can be coupled to the charge measuring chip using the small capacitance. In order to fulfill the system's objective of large dynamic range, the FEE is required to have good linearity. Thus, the charge-controllable signal is needed to do sweep test on all channels in order to obtain the non-linear parameters for off-line correction. On the other hand, the FEE will run on the satellite for three years. The changes of the operational environment and the aging of devices will lead to parameter variation of the FEE, highlighting the need for regular calibration. The calibration signal generation circuit also has a compact structure and the ability to work normally, with the PSD system's voltage resolution being higher than 0.6%.

Rapidly reconfigurable high-fidelity optical arbitrary waveform generation in heterogeneous photonic integrated circuits.

PubMed

Feng, Shaoqi; Qin, Chuan; Shang, Kuanping; Pathak, Shibnath; Lai, Weicheng; Guan, Binbin; Clements, Matthew; Su, Tiehui; Liu, Guangyao; Lu, Hongbo; Scott, Ryan P; Ben Yoo, S J

2017-04-17

This paper demonstrates rapidly reconfigurable, high-fidelity optical arbitrary waveform generation (OAWG) in a heterogeneous photonic integrated circuit (PIC). The heterogeneous PIC combines advantages of high-speed indium phosphide (InP) modulators and low-loss, high-contrast silicon nitride (Si₃N₄) arrayed waveguide gratings (AWGs) so that high-fidelity optical waveform syntheses with rapid waveform updates are possible. The generated optical waveforms spanned a 160 GHz spectral bandwidth starting from an optical frequency comb consisting of eight comb lines separated by 20 GHz channel spacing. The Error Vector Magnitude (EVM) values of the generated waveforms were approximately 16.4%. The OAWG module can rapidly and arbitrarily reconfigure waveforms upon every pulse arriving at 2 ns repetition time. The result of this work indicates the feasibility of truly dynamic optical arbitrary waveform generation where the reconfiguration rate or the modulator bandwidth must exceed the channel spacing of the AWG and the optical frequency comb.

The Generating Mechanism of Non-Sustained Disruptive Discharges in Vacuum Interrupters

NASA Astrophysics Data System (ADS)

Hara, Daisuke; Taki, Masayuki; Tanaka, Hitoshi; Okawa, Mikio; Yanabu, Satoru

To develop vacuum circuit breaker (VCB) for higher voltage application, it may be important to understand generating mechanism and its influence of non-sustained disruptive discharges (NSDD) to the systems. So, we carried out the tests using equivalent testing circuit and observed the contacts after testing, For the test, by using commercial vacuum circuit interrupters, AC voltages of 50Hz was applied between contacts for 4 seconds after current interruption, and measured generating frequencies of NSDD vs. the voltages and vs. currents. Typical contact material used in the commercial switching equipment, such as AgWC, CuW, CuCr were tested and compared. Then CuCr's of different composition and manufacturing process are investigated. And CuCr-50 (manufactured by melting process) showed the best performance in all tests. We point out that surface condition may affect the generation of NSDD and also conditioning effect is very important.

Module generation for self-testing integrated systems

NASA Astrophysics Data System (ADS)

Vanriessen, Ronald Pieter

Hardware used for self test in VLSI (Very Large Scale Integrated) systems is reviewed, and an architecture to control the test hardware in an integrated system is presented. Because of the increase of test times, the use of self test techniques has become practically and economically viable for VLSI systems. Beside the reduction in test times and costs, self test also provides testing at operational speeds. Therefore, a suitable combination of scan path and macrospecific (self) tests is required to reduce test times and costs. An expert system that can be used in a silicon compilation environment is presented. The approach requires a minimum of testability knowledge from a system designer. A user friendly interface was described for specifying and modifying testability requirements by a testability expert. A reason directed backtracking mechanism is used to solve selection failures. Both the hierarchical testable architecture and the design for testability expert system are used in a self test compiler. The definition of a self test compiler was given. A self test compiler is a software tool that selects an appropriate test method for every macro in a design. The hardware to control a macro test will be included in the design automatically. As an example, the integration of the self-test compiler in a silicon compilation system PIRAMID was described. The design of a demonstrator circuit by self test compiler is described. This circuit consists of two self testable macros. Control of the self test hardware is carried out via the test access port of the boundary scan standard.

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 Degrees Centigrade

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Chang, Carl W.; Lukco, Dorothy; Beheim, Glenn M.

2016-01-01

We have reported SiC integrated circuits (ICs) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 degrees Centigrade. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 degrees Centigrade. However, this thermal ramp was not ended until a peak temperature of 880 degrees Centigrade (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology.Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 degrees Centigrade. In one test, the temperature was ramped and then held at 727 degrees Centigrade, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 degrees Centigrade before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 degrees Centigrade (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 degrees Centigrade.

Development of a Three-Tier Test to Assess Misconceptions about Simple Electric Circuits

ERIC Educational Resources Information Center

Pesman, Haki; Eryilmaz, Ali

2010-01-01

The authors aimed to propose a valid and reliable diagnostic instrument by developing a three-tier test on simple electric circuits. Based on findings from the interviews, open-ended questions, and the related literature, the test was developed and administered to 124 high school students. In addition to some qualitative techniques for…

Design of low loss helix circuits for interference fitted and brazed circuits

NASA Technical Reports Server (NTRS)

Jacquez, A.

1983-01-01

The RF loss properties and thermal capability of brazed helix circuits and interference fitted circuits were evaluated. The objective was to produce design circuits with minimum RF loss and maximum heat transfer. These circuits were to be designed to operate at 10 kV and at 20 GHz using a gamma a approximately equal to 1.0. This represents a circuit diameter of only 0.75 millimeters. The fabrication of this size circuit and the 0.48 millimeter high support rods required considerable refinements in the assembly techniques and fixtures used on lower frequency circuits. The transition from the helices to the waveguide was designed and the circuits were matched from 20 to 40 GHz since the helix design is a broad band circuit and at a gamma a of 1.0 will operate over this band. The loss measurement was a transmission measurement and therefore had two such transitions. This resulting double-ended match required tuning elements to achieve the broad band match and external E-H tuners at each end to optimize the match for each frequency where the loss measurement was made. The test method used was a substitution method where the test fixture was replaced by a calibrated attenuator.

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Cut-out circuits. 234.269 Section 234.269..., Inspection, and Testing Inspections and Tests § 234.269 Cut-out circuits. Each cut-out circuit shall be... of this section, a cut-out circuit is any circuit which overrides the operation of automatic warning...

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Cut-out circuits. 234.269 Section 234.269..., Inspection, and Testing Inspections and Tests § 234.269 Cut-out circuits. Each cut-out circuit shall be... of this section, a cut-out circuit is any circuit which overrides the operation of automatic warning...

Circuit for monitoring temperature of high-voltage equipment

DOEpatents

Jacobs, Martin E.

1976-01-01

This invention relates to an improved circuit for measuring temperature in a region at high electric potential and generating a read-out of the same in a region at lower potential. The circuit is specially designed to combine high sensitivity, stability, and accuracy. A major portion of the circuit situated in the high-potential region can take the form of an integrated circuit. The preferred form of the circuit includes an input section which is situated in the high-potential region and comprises a temperature-compensated thermocouple circuit for sensing temperature, an oscillator circuit for generating a train of ramp voltages whose rise time varies inversely with the thermocouple output, a comparator and switching circuit for converting the oscillator output to pulses whose frequency is proportional to the thermocouple output, and a light-emitting diode which is energized by these pulses. An optical coupling transmits the light pulses generated by the diode to an output section of the circuit, situated in a region at ground. The output section comprises means for converting the transmitted pulses to electrical pulses of corresponding frequency, means for amplifying the electrical pulses, and means for displaying the frequency of the same. The preferred embodiment of the overall circuit is designed so that the frequency of the output signal in hertz and tenths of hertz is equal to the sensed temperature in degrees and tenths of degrees.

Built-in-test by signature inspection (bitsi)

DOEpatents

Bergeson, Gary C.; Morneau, Richard A.

1991-01-01

A system and method for fault detection for electronic circuits. A stimulus generator sends a signal to the input of the circuit under test. Signature inspection logic compares the resultant signal from test nodes on the circuit to an expected signal. If the signals do not match, the signature inspection logic sends a signal to the control logic for indication of fault detection in the circuit. A data input multiplexer between the test nodes of the circuit under test and the signature inspection logic can provide for identification of the specific node at fault by the signature inspection logic. Control logic responsive to the signature inspection logic conveys information about fault detection for use in determining the condition of the circuit. When used in conjunction with a system test controller, the built-in test by signature inspection system and method can be used to poll a plurality of circuits automatically and continuous for faults and record the results of such polling in the system test controller.

An Engineering Methodology for Implementing and Testing VLSI (Very Large Scale Integrated) Circuits

DTIC Science & Technology

1989-03-01

the pad frame and associated routing, conducted additional testing. and submitted the finished design effort to MOSIS for manufacturing. Throughout...register bank TSTCON Allows the XNOR circuitry to enter the TEST register bank PADIN Test signal to check operation of the input pad VCC Power connection...MOSSIM II simulation program. but the design offered little observability within the circuit. The initial design used 35 pins of a 40 pin pad frame

Continuous generation and stabilization of mesoscopic field superposition states in a quantum circuit

NASA Astrophysics Data System (ADS)

Roy, Ananda; Leghtas, Zaki; Stone, A. Douglas; Devoret, Michel; Mirrahimi, Mazyar

2015-01-01

While dissipation is widely considered to be harmful for quantum coherence, it can, when properly engineered, lead to the stabilization of nontrivial pure quantum states. We propose a scheme for continuous generation and stabilization of Schrödinger cat states in a cavity using dissipation engineering. We first generate nonclassical photon states with definite parity by means of a two-photon drive and dissipation, and then stabilize these transient states against single-photon decay. The single-photon stabilization is autonomous, and is implemented through a second engineered bath, which exploits the photon-number-dependent frequency splitting due to Kerr interactions in the strongly dispersive regime of circuit QED. Starting with the Hamiltonian of the baths plus cavity, we derive an effective model of only the cavity photon states along with analytic expressions for relevant physical quantities, such as the stabilization rate. The deterministic generation of such cat states is one of the key ingredients in performing universal quantum computation.

Creative Test Generators

ERIC Educational Resources Information Center

Vickers, F. D.

1973-01-01

A brief description of a test generating program which generates questions concerning the Fortran programming language in a random but guided fashion and without resorting to an item bank.'' (Author/AK)

Online Tester for a Symbol Generator

NASA Technical Reports Server (NTRS)

Juday, D.; Mcconaugy, K.

1985-01-01

About 95 percent of faults detected. Programable instrument periodically checks for failures in system that generates alphanumerical and other symbol voltages for cathode-ray-tube displays. Symbol-generator tester compares gated test-point voltages with predetermined voltage limits while circuit under test performs commanded operation. A go/no-go indication given, depending on whether test voltage is or is not within its specification. Tester in plug-in modular form, temporarily wired to generator test points, or permanently wired to these points.

Effects of ion channel noise on neural circuits: an application to the respiratory pattern generator to investigate breathing variability.

PubMed

Yu, Haitao; Dhingra, Rishi R; Dick, Thomas E; Galán, Roberto F

2017-01-01

Neural activity generally displays irregular firing patterns even in circuits with apparently regular outputs, such as motor pattern generators, in which the output frequency fluctuates randomly around a mean value. This "circuit noise" is inherited from the random firing of single neurons, which emerges from stochastic ion channel gating (channel noise), spontaneous neurotransmitter release, and its diffusion and binding to synaptic receptors. Here we demonstrate how to expand conductance-based network models that are originally deterministic to include realistic, physiological noise, focusing on stochastic ion channel gating. We illustrate this procedure with a well-established conductance-based model of the respiratory pattern generator, which allows us to investigate how channel noise affects neural dynamics at the circuit level and, in particular, to understand the relationship between the respiratory pattern and its breath-to-breath variability. We show that as the channel number increases, the duration of inspiration and expiration varies, and so does the coefficient of variation of the breath-to-breath interval, which attains a minimum when the mean duration of expiration slightly exceeds that of inspiration. For small channel numbers, the variability of the expiratory phase dominates over that of the inspiratory phase, and vice versa for large channel numbers. Among the four different cell types in the respiratory pattern generator, pacemaker cells exhibit the highest sensitivity to channel noise. The model shows that suppressing input from the pons leads to longer inspiratory phases, a reduction in breathing frequency, and larger breath-to-breath variability, whereas enhanced input from the raphe nucleus increases breathing frequency without changing its pattern. A major source of noise in neuronal circuits is the "flickering" of ion currents passing through the neurons' membranes (channel noise), which cannot be suppressed experimentally. Computational

Circuit design of an EMCCD camera

NASA Astrophysics Data System (ADS)

Li, Binhua; Song, Qian; Jin, Jianhui; He, Chun

2012-07-01

EMCCDs have been used in the astronomical observations in many ways. Recently we develop a camera using an EMCCD TX285. The CCD chip is cooled to -100°C in an LN2 dewar. The camera controller consists of a driving board, a control board and a temperature control board. Power supplies and driving clocks of the CCD are provided by the driving board, the timing generator is located in the control board. The timing generator and an embedded Nios II CPU are implemented in an FPGA. Moreover the ADC and the data transfer circuit are also in the control board, and controlled by the FPGA. The data transfer between the image workstation and the camera is done through a Camera Link frame grabber. The software of image acquisition is built using VC++ and Sapera LT. This paper describes the camera structure, the main components and circuit design for video signal processing channel, clock driver, FPGA and Camera Link interfaces, temperature metering and control system. Some testing results are presented.

Electrical Circuit Tester

DOEpatents

Love, Frank

2006-04-18

An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

Circuit with a Switch for Charging a Battery in a Battery Capacitor Circuit

NASA Technical Reports Server (NTRS)

Stuart, Thomas A. (Inventor); Ashtiani, Cyrus N. (Inventor)

2008-01-01

A circuit for charging a battery combined with a capacitor includes a power supply adapted to be connected to the capacitor, and the battery. The circuit includes an electronic switch connected to the power supply. The electronic switch is responsive to switch between a conducting state to allow current and a non-conducting state to prevent current flow. The circuit includes a control device connected to the switch and is operable to generate a control signal to continuously switch the electronic switch between the conducting and non-conducting states to charge the battery.

42 CFR 84.97 - Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable...

Code of Federal Regulations, 2010 CFR

2010-10-01

... closed-circuit apparatus; maximum allowable limits. 84.97 Section 84.97 Public Health PUBLIC HEALTH... ACTIVITIES APPROVAL OF RESPIRATORY PROTECTIVE DEVICES Self-Contained Breathing Apparatus § 84.97 Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable limits. (a) Open...

42 CFR 84.97 - Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable...

Code of Federal Regulations, 2011 CFR

2011-10-01

... closed-circuit apparatus; maximum allowable limits. 84.97 Section 84.97 Public Health PUBLIC HEALTH... ACTIVITIES APPROVAL OF RESPIRATORY PROTECTIVE DEVICES Self-Contained Breathing Apparatus § 84.97 Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable limits. (a) Open...

X-ray effects on pacemaker type circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blamires, N.G.; Myatt, J.

1982-03-01

Queries have been raised concerning the potential hazards of X-ray irradiation on patients using the new generation of heart pacemakers based on digital circuitry. The present study was undertaken to provide some answers to these queries. The work was conducted in two parts. First, a literature search was done and, second, circuits using current state of the art digital technology were irradiated with X-rays. Watch circuits were chosen because of their availability and built-in facilities by which their function could be tested. Doses up to 330 rads were administered to them using energies of 46, 114, and 141 KeV. Themore » conclusion drawn from both parts of the study was that X-rays used for diagnostic purposes were unlikely to affect the performance of this type of circuit in any way. It was accepted that for therapeutic purposes doses far in excess of this are administered and circuit malfunctions are likely to occur. To assess the probability of a digital pacemaker malfunctioning, samples of that particular type would have to be irradiated at the relevant dose.« less

Solid state remote circuit selector switch

NASA Technical Reports Server (NTRS)

Peterson, V. S.

1970-01-01

Remote switching circuit utilizes voltage logic to switch on desired circuit. Circuit controls rotating multi-range pressure transducers in jet engine testing and can be used in coded remote circuit activator where sequence of switching has to occur in defined length of time to prevent false or undesired circuit activation.

Double-layer rotor magnetic shield performance analysis in high temperature superconducting synchronous generators under short circuit fault conditions

NASA Astrophysics Data System (ADS)

Hekmati, Arsalan; Aliahmadi, Mehdi

2016-12-01

High temperature superconducting, HTS, synchronous machines benefit from a rotor magnetic shield in order to protect superconducting coils against asynchronous magnetic fields. This magnetic shield, however, suffers from exerted Lorentz forces generated in light of induced eddy currents during transient conditions, e.g. stator windings short-circuit fault. In addition, to the exerted electromagnetic forces, eddy current losses and the associated effects on the cryogenic system are the other consequences of shielding HTS coils. This study aims at investigating the Rotor Magnetic Shield, RMS, performance in HTS synchronous generators under stator winding short-circuit fault conditions. The induced eddy currents in different circumferential positions of the rotor magnetic shield along with associated Joule heating losses would be studied using 2-D time-stepping Finite Element Analysis, FEA. The investigation of Lorentz forces exerted on the magnetic shield during transient conditions has also been performed in this paper. The obtained results show that double line-to-ground fault is of the most importance among different types of short-circuit faults. It was revealed that when it comes to the design of the rotor magnetic shields, in addition to the eddy current distribution and the associated ohmic losses, two phase-to-ground fault should be taken into account since the produced electromagnetic forces in the time of fault conditions are more severe during double line-to-ground fault.

Development and Analysis of Cold Trap for Use in Fission Surface Power-Primary Test Circuit

NASA Technical Reports Server (NTRS)

Wolfe, T. M.; Dervan, C. A.; Pearson, J. B.; Godfroy, T. J.

2012-01-01

The design and analysis of a cold trap proposed for use in the purification of circulated eutectic sodium potassium (NaK-78) loops is presented. The cold trap is designed to be incorporated into the Fission Surface Power-Primary Test Circuit (FSP-PTC), which incorporates a pumped NaK loop to simulate in-space nuclear reactor-based technology using non-nuclear test methodology as developed by the Early Flight Fission-Test Facility. The FSP-PTC provides a test circuit for the development of fission surface power technology. This system operates at temperatures that would be similar to those found in a reactor (500-800 K). By dropping the operating temperature of a specified percentage of NaK flow through a bypass containing a forced circulation cold trap, the NaK purity level can be increased by precipitating oxides from the NaK and capturing them within the cold trap. This would prevent recirculation of these oxides back through the system, which may help prevent corrosion.

MHDL CAD tool with fault circuit handling

NASA Astrophysics Data System (ADS)

Espinosa Flores-Verdad, Guillermo; Altamirano Robles, Leopoldo; Osorio Roque, Leticia

2003-04-01

Behavioral modeling and simulation, with Analog Hardware and Mixed Signal Description High Level Languages (MHDLs), have generated the development of diverse simulation tools that allow handling the requirements of the modern designs. These systems have million of transistors embedded and they are radically diverse between them. This tendency of simulation tools is exemplified by the development of languages for modeling and simulation, whose applications are the re-use of complete systems, construction of virtual prototypes, realization of test and synthesis. This paper presents the general architecture of a Mixed Hardware Description Language, based on the standard 1076.1-1999 IEEE VHDL Analog and Mixed-Signal Extensions known as VHDL-AMS. This architecture is novel by consider the modeling and simulation of faults. The main modules of the CAD tool are briefly described in order to establish the information flow and its transformations, starting from the description of a circuit model, going throw the lexical analysis, mathematical models generation and the simulation core, ending at the collection of the circuit behavior as simulation"s data. In addition, the incorporated mechanisms to the simulation core are explained in order to realize the handling of faults into the circuit models. Currently, the CAD tool works with algebraic and differential descriptions for the circuit models, nevertheless the language design is open to be able to handle different model types: Fuzzy Models, Differentials Equations, Transfer Functions and Tables. This applies for fault models too, in this sense the CAD tool considers the inclusion of mutants and saboteurs. To exemplified the results obtained until now, the simulated behavior of a circuit is shown when it is fault free and when it has been modified by the inclusion of a fault as a mutant or a saboteur. The obtained results allow the realization of a virtual diagnosis for mixed circuits. This language works in a UNIX system

Triple effect absorption chiller utilizing two refrigeration circuits

DOEpatents

DeVault, Robert C.

1988-01-01

A triple effect absorption method and apparatus having a high coefficient of performance. Two single effect absorption circuits are combined with heat exchange occurring between a condenser and absorber of a high temperature circuit, and a generator of a low temperature circuit. The evaporators of both the high and low temperature circuits provide cooling to an external heat load.

Functional identification of spike-processing neural circuits.

PubMed

Lazar, Aurel A; Slutskiy, Yevgeniy B

2014-02-01

We introduce a novel approach for a complete functional identification of biophysical spike-processing neural circuits. The circuits considered accept multidimensional spike trains as their input and comprise a multitude of temporal receptive fields and conductance-based models of action potential generation. Each temporal receptive field describes the spatiotemporal contribution of all synapses between any two neurons and incorporates the (passive) processing carried out by the dendritic tree. The aggregate dendritic current produced by a multitude of temporal receptive fields is encoded into a sequence of action potentials by a spike generator modeled as a nonlinear dynamical system. Our approach builds on the observation that during any experiment, an entire neural circuit, including its receptive fields and biophysical spike generators, is projected onto the space of stimuli used to identify the circuit. Employing the reproducing kernel Hilbert space (RKHS) of trigonometric polynomials to describe input stimuli, we quantitatively describe the relationship between underlying circuit parameters and their projections. We also derive experimental conditions under which these projections converge to the true parameters. In doing so, we achieve the mathematical tractability needed to characterize the biophysical spike generator and identify the multitude of receptive fields. The algorithms obviate the need to repeat experiments in order to compute the neurons' rate of response, rendering our methodology of interest to both experimental and theoretical neuroscientists.

Testing and Qualifying Linear Integrated Circuits for Radiation Degradation in Space

NASA Technical Reports Server (NTRS)

Johnston, Allan H.; Rax, Bernard G.

2006-01-01

This paper discusses mechanisms and circuit-related factors that affect the degradation of linear integrated circuits from radiation in space. For some circuits there is sufficient degradation to affect performance at total dose levels below 4 krad(Si) because the circuit design techniques require higher gain for the pnp transistors that are the most sensitive to radiation. Qualification methods are recommended that include displacement damage as well as ionization damage.

Off-line, built-in test techniques for VLSI circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Sievers, M. W.

1982-01-01

It is shown that the use of redundant on-chip circuitry improves the testability of an entire VLSI circuit. In the study described here, five techniques applied to a two-bit ripple carry adder are compared. The techniques considered are self-oscillation, self-comparison, partition, scan path, and built-in logic block observer. It is noted that both classical stuck-at faults and nonclassical faults, such as bridging faults (shorts), stuck-on x faults where x may be 0, 1, or vary between the two, and parasitic flip-flop faults occur in IC structures. To simplify the analysis of the testing techniques, however, a stuck-at fault model is assumed.

Nulling Hall-Effect Current-Measuring Circuit

NASA Technical Reports Server (NTRS)

Sullender, Craig C.; Vazquez, Juan M.; Berru, Robert I.

1993-01-01

Circuit measures electrical current via combination of Hall-effect-sensing and magnetic-field-nulling techniques. Known current generated by feedback circuit adjusted until it causes cancellation or near cancellation of magnetic field produced in toroidal ferrite core by current measured. Remaining magnetic field measured by Hall-effect sensor. Circuit puts out analog signal and digital signal proportional to current measured. Accuracy of measurement does not depend on linearity of sensing components.

Optoelectronic cross-injection locking of a dual-wavelength photonic integrated circuit for low-phase-noise millimeter-wave generation.

PubMed

Kervella, Gaël; Van Dijk, Frederic; Pillet, Grégoire; Lamponi, Marco; Chtioui, Mourad; Morvan, Loïc; Alouini, Mehdi

2015-08-01

We report on the stabilization of a 90-GHz millimeter-wave signal generated from a fully integrated photonic circuit. The chip consists of two DFB single-mode lasers whose optical signals are combined on a fast photodiode to generate a largely tunable heterodyne beat note. We generate an optical comb from each laser with a microwave synthesizer, and by self-injecting the resulting signal, we mutually correlate the phase noise of each DFB and stabilize the beatnote on a multiple of the frequency delivered by the synthesizer. The performances achieved beat note linewidth below 30 Hz.

Ionization tube simmer current circuit

DOEpatents

Steinkraus, Jr., Robert F.

1994-01-01

A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current.

Electroshock protection circuit

NASA Technical Reports Server (NTRS)

Heskett, H.; Meincer, J.; Inglis, A. L.

1973-01-01

Circuit was developed to prevent accidental shock through electrodes used to test subjects as part of Skylab program. This circuit is placed between electrical apparatus and electrode that is attached to patient's body. Thus, patient is effectively protected from dangerous electrical shock that might be caused by failure in electrical apparatus.

Design and test of a capacitance detection circuit based on a transimpedance amplifier

NASA Astrophysics Data System (ADS)

Linfeng, Mu; Wendong, Zhang; Changde, He; Rui, Zhang; Jinlong, Song; Chenyang, Xue

2015-07-01

This paper presents a transimpedance amplifier (TIA) capacitance detection circuit aimed at detecting micro-capacitance, which is caused by ultrasonic stimulation applied to the capacitive micro-machined ultrasonic transducer (CMUT). In the capacitance interface, a TIA is adopted to amplify the received signal with a center frequency of 400 kHz, and finally detect ultrasound pressure. The circuit has a strong anti-stray property and this paper also studies the calculation of compensation capacity in detail. To ensure high resolution, noise analysis is conducted. After optimization, the detected minimum ultrasound pressure is 2.1 Pa, which is two orders of magnitude higher than the former. The test results showed that the circuit was sensitive to changes in ultrasound pressure and the distance between the CMUT and stumbling block, which also successfully demonstrates the functionality of the developed TIA of the analog-front-end receiver. Project supported by the National Natural Science Foundation of China (No. 61127008) and the Subsidized Program of the National High Technology Research and Development Program of China (No. 2011AA040404).

A rule-based software test data generator

NASA Technical Reports Server (NTRS)

Deason, William H.; Brown, David B.; Chang, Kai-Hsiung; Cross, James H., II

1991-01-01

Rule-based software test data generation is proposed as an alternative to either path/predicate analysis or random data generation. A prototype rule-based test data generator for Ada programs is constructed and compared to a random test data generator. Four Ada procedures are used in the comparison. Approximately 2000 rule-based test cases and 100,000 randomly generated test cases are automatically generated and executed. The success of the two methods is compared using standard coverage metrics. Simple statistical tests showing that even the primitive rule-based test data generation prototype is significantly better than random data generation are performed. This result demonstrates that rule-based test data generation is feasible and shows great promise in assisting test engineers, especially when the rule base is developed further.

Nuclear sensor signal processing circuit

DOEpatents

Kallenbach, Gene A [Bosque Farms, NM; Noda, Frank T [Albuquerque, NM; Mitchell, Dean J [Tijeras, NM; Etzkin, Joshua L [Albuquerque, NM

2007-02-20

An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.

Simulation Analysis of DC and Switching Impulse Superposition Circuit

NASA Astrophysics Data System (ADS)

Zhang, Chenmeng; Xie, Shijun; Zhang, Yu; Mao, Yuxiang

2018-03-01

Surge capacitors running between the natural bus and the ground are affected by DC and impulse superposition voltage during operation in the converter station. This paper analyses the simulation aging circuit of surge capacitors by PSCAD electromagnetic transient simulation software. This paper also analyses the effect of the DC voltage to the waveform of the impulse voltage generation. The effect of coupling capacitor to the test voltage waveform is also studied. Testing results prove that the DC voltage has little effect on the waveform of the output of the surge voltage generator, and the value of the coupling capacitor has little effect on the voltage waveform of the sample. Simulation results show that surge capacitor DC and impulse superimposed aging test is feasible.

A Parallel Genetic Algorithm for Automated Electronic Circuit Design

NASA Technical Reports Server (NTRS)

Long, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris

2000-01-01

Parallelized versions of genetic algorithms (GAs) are popular primarily for three reasons: the GA is an inherently parallel algorithm, typical GA applications are very compute intensive, and powerful computing platforms, especially Beowulf-style computing clusters, are becoming more affordable and easier to implement. In addition, the low communication bandwidth required allows the use of inexpensive networking hardware such as standard office ethernet. In this paper we describe a parallel GA and its use in automated high-level circuit design. Genetic algorithms are a type of trial-and-error search technique that are guided by principles of Darwinian evolution. Just as the genetic material of two living organisms can intermix to produce offspring that are better adapted to their environment, GAs expose genetic material, frequently strings of 1s and Os, to the forces of artificial evolution: selection, mutation, recombination, etc. GAs start with a pool of randomly-generated candidate solutions which are then tested and scored with respect to their utility. Solutions are then bred by probabilistically selecting high quality parents and recombining their genetic representations to produce offspring solutions. Offspring are typically subjected to a small amount of random mutation. After a pool of offspring is produced, this process iterates until a satisfactory solution is found or an iteration limit is reached. Genetic algorithms have been applied to a wide variety of problems in many fields, including chemistry, biology, and many engineering disciplines. There are many styles of parallelism used in implementing parallel GAs. One such method is called the master-slave or processor farm approach. In this technique, slave nodes are used solely to compute fitness evaluations (the most time consuming part). The master processor collects fitness scores from the nodes and performs the genetic operators (selection, reproduction, variation, etc.). Because of dependency

Fabrication and In vivo Thrombogenicity Testing of Nitric Oxide Generating Artificial Lungs

PubMed Central

Amoako, Kagya A; Montoya, Patrick J; Major, Terry C; Suhaib, Ahmed B; Handa, Hitesh; Brant, David O; Meyerhoff, Mark E; Bartlett, Robert H; Cook, Keith E

2013-01-01

Hollow fiber artificial lungs are increasingly being used for long-term applications. However, clot formation limits their use to 1-2 weeks. This study investigated the effect of nitric oxide generating (NOgen) hollow fibers on artificial lung thrombogenicity. Silicone hollow fibers were fabricated to incorporate 50 nm copper particles as a catalyst for NO generation from the blood. Fibers with and without (control) these particles were incorporated into artificial lungs with a 0.1 m2 surface area and inserted in circuits coated tip-to-tip with the NOgen material. Circuits (N=5/each) were attached to rabbits in a pumpless, arterio-venous configuration and run for 4 hrs at an activated clotting time of 350-400s. Three control circuits clotted completely, while none of the NOgen circuits failed. Accordingly, blood flows were significantly higher in the NOgen group (95.9 ± 11.7, p < 0.01) compared to the controls (35.2 ± 19.7) (ml/min), and resistance was significantly higher in the control group after 4 hours (15.38 ± 9.65, p<0.001) than in NOgen (0.09 ± 0.03) (mmHg/mL/min). On the other hand, platelet counts and plasma fibrinogen concentration expressed as percent of baseline in control group (63.7 ± 5.7%, 77.2 ± 5.6% [p<0.05]) were greater than those in the NOgen group (60.4 ± 5.1%, 63.2 ± 3.7%). Plasma copper levels in the NOgen group were 2.8 times baseline at 4 hours (132.8 ± 4.5 μg/dl) and unchanged in the controls. This work demonstrates that NO generating gas exchange fibers could be a potentially effective way to control coagulation inside artificial lungs. PMID:23613156

Ionization tube simmer current circuit

DOEpatents

Steinkraus, R.F. Jr.

1994-12-13

A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current. 6 figures.

Binary selectable detector holdoff circuit: Design, testing, and application. [to laser radar data acquisition system

NASA Technical Reports Server (NTRS)

Kadrmas, K. A.

1973-01-01

A very high speed switching circuit, part of a laser radar data acquisition system, has been designed and tested. The primary function of this circuit was to provide computer controlled switching of photodiode detector preamplifier power supply voltages, typically less than plus or minus 20 volts, in approximately 10 nanoseconds. Thus, in actual use, detector and/or detector preamplifier damage can be avoided as a result of sudden extremely large values of backscattered radiation being detected, such as might be due to short range, very thin atmospheric dust layers. Switching of the power supply voltages was chosen over direct switching the photodiode detector input to the preamplifier, based on system noise considerations. Also, the circuit provides a synchronized trigger pulse output for triggering devices such as the Biomation Model 8100 100 MHz analog to digital converter.

Wireless Data Transmission at Terahertz Carrier Waves Generated from a Hybrid InP-Polymer Dual Tunable DBR Laser Photonic Integrated Circuit.

PubMed

Carpintero, Guillermo; Hisatake, Shintaro; de Felipe, David; Guzman, Robinson; Nagatsuma, Tadao; Keil, Norbert

2018-02-14

We report for the first time the successful wavelength stabilization of two hybrid integrated InP/Polymer DBR lasers through optical injection. The two InP/Polymer DBR lasers are integrated into a photonic integrated circuit, providing an ideal source for millimeter and Terahertz wave generation by optical heterodyne technique. These lasers offer the widest tuning range of the carrier wave demonstrated to date up into the Terahertz range, about 20 nm (2.5 THz) on a single photonic integrated circuit. We demonstrate the application of this source to generate a carrier wave at 330 GHz to establish a wireless data transmission link at a data rate up to 18 Gbit/s. Using a coherent detection scheme we increase the sensitivity by more than 10 dB over direct detection.

On-Chip AC self-test controller

DOEpatents

Flanagan, John D [Rhinebeck, NY; Herring, Jay R [Poughkeepsie, NY; Lo, Tin-Chee [Fishkill, NY

2009-09-29

A system for performing AC self-test on an integrated circuit that includes a system clock for normal operation is provided. The system includes the system clock, self-test circuitry, a first and second test register to capture and launch test data in response to a sequence of data pulses, and a logic circuit to be tested. The self-test circuitry includes an AC self-test controller and a clock splitter. The clock splitter generates the sequence of data pulses including a long data capture pulse followed by an at speed data launch pulse and an at speed data capture pulse followed by a long data launch pulse. The at speed data launch pulse and the at speed data capture pulse are generated for a common cycle of the system clock.

Cell short circuit, preshort signature

NASA Technical Reports Server (NTRS)

Lurie, C.

1980-01-01

Short-circuit events observed in ground test simulations of DSCS-3 battery in-orbit operations are analyzed. Voltage signatures appearing in the data preceding the short-circuit event are evaluated. The ground test simulation is briefly described along with performance during reconditioning discharges. Results suggest that a characteristic signature develops prior to a shorting event.

High voltage pulse generator

DOEpatents

Fasching, George E.

1977-03-08

An improved high-voltage pulse generator has been provided which is especially useful in ultrasonic testing of rock core samples. An N number of capacitors are charged in parallel to V volts and at the proper instance are coupled in series to produce a high-voltage pulse of N times V volts. Rapid switching of the capacitors from the paralleled charging configuration to the series discharging configuration is accomplished by using silicon-controlled rectifiers which are chain self-triggered following the initial triggering of a first one of the rectifiers connected between the first and second of the plurality of charging capacitors. A timing and triggering circuit is provided to properly synchronize triggering pulses to the first SCR at a time when the charging voltage is not being applied to the parallel-connected charging capacitors. Alternate circuits are provided for controlling the application of the charging voltage from a charging circuit to be applied to the parallel capacitors which provides a selection of at least two different intervals in which the charging voltage is turned "off" to allow the SCR's connecting the capacitors in series to turn "off" before recharging begins. The high-voltage pulse-generating circuit including the N capacitors and corresponding SCR's which connect the capacitors in series when triggered "on" further includes diodes and series-connected inductors between the parallel-connected charging capacitors which allow sufficiently fast charging of the capacitors for a high pulse repetition rate and yet allow considerable control of the decay time of the high-voltage pulses from the pulse-generating circuit.

Controllable high-fidelity quantum state transfer and entanglement generation in circuit QED

PubMed Central

Xu, Peng; Yang, Xu-Chen; Mei, Feng; Xue, Zheng-Yuan

2016-01-01

We propose a scheme to realize controllable quantum state transfer and entanglement generation among transmon qubits in the typical circuit QED setup based on adiabatic passage. Through designing the time-dependent driven pulses applied on the transmon qubits, we find that fast quantum sate transfer can be achieved between arbitrary two qubits and quantum entanglement among the qubits also can also be engineered. Furthermore, we numerically analyzed the influence of the decoherence on our scheme with the current experimental accessible systematical parameters. The result shows that our scheme is very robust against both the cavity decay and qubit relaxation, the fidelities of the state transfer and entanglement preparation process could be very high. In addition, our scheme is also shown to be insensitive to the inhomogeneous of qubit-resonator coupling strengths. PMID:26804326

Controllable high-fidelity quantum state transfer and entanglement generation in circuit QED.

PubMed

Xu, Peng; Yang, Xu-Chen; Mei, Feng; Xue, Zheng-Yuan

2016-01-25

We propose a scheme to realize controllable quantum state transfer and entanglement generation among transmon qubits in the typical circuit QED setup based on adiabatic passage. Through designing the time-dependent driven pulses applied on the transmon qubits, we find that fast quantum sate transfer can be achieved between arbitrary two qubits and quantum entanglement among the qubits also can also be engineered. Furthermore, we numerically analyzed the influence of the decoherence on our scheme with the current experimental accessible systematical parameters. The result shows that our scheme is very robust against both the cavity decay and qubit relaxation, the fidelities of the state transfer and entanglement preparation process could be very high. In addition, our scheme is also shown to be insensitive to the inhomogeneous of qubit-resonator coupling strengths.

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect...

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect...

A Power Conditioning Stage Based on Analog-Circuit MPPT Control and a Superbuck Converter for Thermoelectric Generators in Spacecraft Power Systems

NASA Astrophysics Data System (ADS)

Sun, Kai; Wu, Hongfei; Cai, Yan; Xing, Yan

2014-06-01

A thermoelectric generator (TEG) is a very important kind of power supply for spacecraft, especially for deep-space missions, due to its long lifetime and high reliability. To develop a practical TEG power supply for spacecraft, a power conditioning stage is indispensable, being employed to convert the varying output voltage of the TEG modules to a definite voltage for feeding batteries or loads. To enhance the system reliability, a power conditioning stage based on analog-circuit maximum-power-point tracking (MPPT) control and a superbuck converter is proposed in this paper. The input of this power conditioning stage is connected to the output of the TEG modules, and the output of this stage is connected to the battery and loads. The superbuck converter is employed as the main circuit, featuring low input current ripples and high conversion efficiency. Since for spacecraft power systems reliable operation is the key target for control circuits, a reset-set flip-flop-based analog circuit is used as the basic control circuit to implement MPPT, being much simpler than digital control circuits and offering higher reliability. Experiments have verified the feasibility and effectiveness of the proposed power conditioning stage. The results show the advantages of the proposed stage, such as maximum utilization of TEG power, small input ripples, and good stability.

Intrinsic neuromodulation: altering neuronal circuits from within.

PubMed

Katz, P S; Frost, W N

1996-02-01

There are two sources of neuromodulation for neuronal circuits: extrinsic inputs and intrinsic components of the circuits themselves. Extrinsic neuromodulation is known to be pervasive in nervous systems, but intrinsic neuromodulation is less recognized, despite the fact that it has now been demonstrated in sensory and neuromuscular circuits and in central pattern generators. By its nature, intrinsic neuromodulation produces local changes in neuronal computation, whereas extrinsic neuromodulation can cause global changes, often affecting many circuits simultaneously. Studies in a number of systems are defining the different properties of these two forms of neuromodulation.

Generator Set Environmental and Stability Testing

DTIC Science & Technology

2015-03-01

UNCLASSIFIED GENERATOR SET ENVIRONMENTAL AND STABILITY TESTING INTERIM REPORT TFLRF No. 460 by Gregory A. Hansen Edwin A...it to the originator. UNCLASSIFIED GENERATOR SET ENVIRONMENTAL AND STABILITY TESTING INTERIM REPORT TFLRF No. 460 by...TITLE AND SUBTITLE Generator Set Environmental and Stability Testing 5a. CONTRACT NUMBER W56HZV-09-C-0100 5b. GRANT NUMBER 5c. PROGRAM

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 49 Transportation 4 2013-10-01 2013-10-01 false Control circuits. 234.203 Section 234.203... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect the safe operation of a highway-rail grade crossing warning...

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 49 Transportation 4 2014-10-01 2014-10-01 false Control circuits. 234.203 Section 234.203... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect the safe operation of a highway-rail grade crossing warning...

Mechanisms of Hierarchical Reinforcement Learning in Corticostriatal Circuits 1: Computational Analysis

PubMed Central

Badre, David

2012-01-01

Growing evidence suggests that the prefrontal cortex (PFC) is organized hierarchically, with more anterior regions having increasingly abstract representations. How does this organization support hierarchical cognitive control and the rapid discovery of abstract action rules? We present computational models at different levels of description. A neural circuit model simulates interacting corticostriatal circuits organized hierarchically. In each circuit, the basal ganglia gate frontal actions, with some striatal units gating the inputs to PFC and others gating the outputs to influence response selection. Learning at all of these levels is accomplished via dopaminergic reward prediction error signals in each corticostriatal circuit. This functionality allows the system to exhibit conditional if–then hypothesis testing and to learn rapidly in environments with hierarchical structure. We also develop a hybrid Bayesian-reinforcement learning mixture of experts (MoE) model, which can estimate the most likely hypothesis state of individual participants based on their observed sequence of choices and rewards. This model yields accurate probabilistic estimates about which hypotheses are attended by manipulating attentional states in the generative neural model and recovering them with the MoE model. This 2-pronged modeling approach leads to multiple quantitative predictions that are tested with functional magnetic resonance imaging in the companion paper. PMID:21693490

A programmable heater control circuit for spacecraft

NASA Technical Reports Server (NTRS)

Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

1994-01-01

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Super NiCd Open-Circuit Storage and Low Earth Orbit (LEO) Life Test Evaluation

NASA Technical Reports Server (NTRS)

Baer, Jean Marie; Hwang, Warren C.; Ang, Valerie J.; Hayden, Jeff; Rao, Gopalakrishna; Day, John H. (Technical Monitor)

2002-01-01

This presentation discusses Air Force tests performed on super NiCd cells to measure their performance under conditions simulating Low Earth Orbit (LEO) conditions. Super NiCd cells offer potential advantages over existing NiCd cell designs including advanced cell design with improved separator material and electrode making processes, but handling and storage requires active charging. These tests conclude that the super NiCd cells support generic Air Force qualifications for conventional LEO missions (up to five years duration) and that handling and storage may not actually require active charging as previously assumed. Topics covered include: Test Plan, Initial Characterization Tests, Open-Circuit Storage Tests, and post storage capacities.

Nuclear code case development of printed-circuit heat exchangers with thermal and mechanical performance testing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aakre, Shaun R.; Jentz, Ian W.; Anderson, Mark H.

The U.S. Department of Energy has agreed to fund a three-year integrated research project to close technical gaps involved with compact heat exchangers to be used in nuclear applications. This paper introduces the goals of the project, the research institutions, and industrial partners working in collaboration to develop a draft Boiler and Pressure Vessel Code Case for this technology. Heat exchanger testing, as well as non-destructive and destructive evaluation, will be performed by researchers across the country to understand the performance of compact heat exchangers. Testing will be performed using coolants and conditions proposed for Gen IV Reactor designs. Preliminarymore » observations of the mechanical failure mechanisms of the heat exchangers using destructive and non-destructive methods is presented. Unit-cell finite element models assembled to help predict the mechanical behavior of these high-temperature components are discussed as well. Performance testing methodology is laid out in this paper along with preliminary modeling results, an introduction to x-ray and neutron inspection techniques, and results from a recent pressurization test of a printed-circuit heat exchanger. The operational and quality assurance knowledge gained from these models and validation tests will be useful to developers of supercritical CO 2 systems, which commonly employ printed-circuit heat exchangers.« less

High density electronic circuit and process for making

DOEpatents

Morgan, William P.

1999-01-01

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing.

Electronic circuit delivers pulse of high interval stability

NASA Technical Reports Server (NTRS)

Fisher, B.

1966-01-01

Circuit generates a pulse of high interval stability with a complexity level considerably below systems of comparable stability. This circuit is being used as a linear frequency discriminator in the signal conditioner of the Apollo command module.

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2013 CFR

2013-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2014 CFR

2014-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2011 CFR

2011-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2012 CFR

2012-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

Dynamics, Analysis and Implementation of a Multiscroll Memristor-Based Chaotic Circuit

NASA Astrophysics Data System (ADS)

Alombah, N. Henry; Fotsin, Hilaire; Ngouonkadi, E. B. Megam; Nguazon, Tekou

This article introduces a novel four-dimensional autonomous multiscroll chaotic circuit which is derived from the actual simplest memristor-based chaotic circuit. A fourth circuit element — another inductor — is introduced to generate the complex behavior observed. A systematic study of the chaotic behavior is performed with the help of some nonlinear tools such as Lyapunov exponents, phase portraits, and bifurcation diagrams. Multiple scroll attractors are observed in Matlab, Pspice environments and also experimentally. We also observe the phenomenon of antimonotonicity, periodic and chaotic bubbles, multiple periodic-doubling bifurcations, Hopf bifurcations, crises and the phenomenon of intermittency. The chaotic dynamics of this circuit is realized by laboratory experiments, Pspice simulations, numerical and analytical investigations. It is observed that the results from the three environments agree to a great extent. This topology is likely convenient to be used to intentionally generate chaos in memristor-based chaotic circuit applications, given the fact that multiscroll chaotic systems have found important applications as broadband signal generators, pseudorandom number generators for communication engineering and also in biometric authentication.

ELECTRICAL CIRCUITS USING COLD-CATHODE TRIODE VALVES

DOEpatents

Goulding, F.S.

1957-11-26

An electrical circuit which may be utilized as a pulse generator or voltage stabilizer is presented. The circuit employs a cold-cathode triode valve arranged to oscillate between its on and off stages by the use of selected resistance-capacitance time constant components in the plate and trigger grid circuits. The magnitude of the d-c voltage applied to the trigger grid circuit effectively controls the repetition rate of the output pulses. In the voltage stabilizer arrangement the d-c control voltage is a portion of the supply voltage and the rectified output voltage is substantially constant.

High density electronic circuit and process for making

DOEpatents

Morgan, W.P.

1999-06-29

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits are disclosed. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing. 8 figs.

The circuit parameters measurement of the SABALAN-I plasma focus facility and comparison with Lee Model

NASA Astrophysics Data System (ADS)

Karimi, F. S.; Saviz, S.; Ghoranneviss, M.; Salem, M. K.; Aghamir, F. M.

The circuit parameters are investigated in a Mather-type plasma focus device. The experiments are performed in the SABALAN-I plasma focus facility (2 kJ, 20 kV, 10 μF). A 12-turn Rogowski coil is built and used to measure the time derivative of discharge current (dI/dt). The high pressure test has been performed in this work, as alternative technique to short circuit test to determine the machine circuit parameters and calibration factor of the Rogowski coil. The operating parameters are calculated by two methods and the results show that the relative error of determined parameters by method I, are very low in comparison to method II. Thus the method I produces more accurate results than method II. The high pressure test is operated with this assumption that no plasma motion and the circuit parameters may be estimated using R-L-C theory given that C0 is known. However, for a plasma focus, even at highest permissible pressure it is found that there is significant motion, so that estimated circuit parameters not accurate. So the Lee Model code is used in short circuit mode to generate the computed current trace for fitting to the current waveform was integrated from current derivative signal taken with Rogowski coil. Hence, the dynamics of plasma is accounted for into the estimation and the static bank parameters are determined accurately.

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

NASA Technical Reports Server (NTRS)

Woo, D. S.

1982-01-01

The procedure used to generate MEBES masks and produce test wafers from the 10X Mann 1600 Pattern Generator Tape using existing CAD utility programs and the MEBES machine in the RCA Solid State Technology Center are described. The test vehicle used is the MSFC-designed SC102 Solar House Timing Circuit. When transforming the Mann 1600 tapes into MEBES tapes, extreme care is required in order to obtain accurate minimum linewidths when working with two different coding systems because the minimum grid sizes may be different for the two systems. The minimum grid sizes are 0.025 mil for MSFC Mann 1600 and 0.02 mil for MEBES. Some snapping to the next grid is therefore inevitable, and the results of this snapping effect are significant when submicron lines are present. However, no problem was noticed in the SC102 circuit because its minimum linewidth is 0.3 mil (7.6 microns). MEBES masks were fabricated and wafers were processed using the silicon-gate CMOS/SOS and aluminum-gate COS/MOS processing.

A Better Way to Drive "RLC" Circuits

ERIC Educational Resources Information Center

Aguilar, Horacio Munguia

2009-01-01

An electronic circuit for controlling "RLC" experiments is shown. This arrangement does not employ a function generator, which makes it more suitable when a wide range of "R," "L" and "C" values is required and a relatively high current is involved. This circuit can be used for driven and undriven DC…

AUTOMOTIVE DIESEL MAINTENANCE 2. UNIT XV, UNDERSTANDING DC GENERATOR PRINCIPLES (PART II).

ERIC Educational Resources Information Center

Human Engineering Inst., Cleveland, OH.

THIS MODULE OF A 25-MODULE COURSE IS DESIGNED TO DEVELOP AN UNDERSTANDING OF MAINTENANCE PROCEDURES FOR DIRECT CURRENT GENERATORS USED ON DIESEL POWERED EQUIPMENT. TOPICS ARE SPECIAL GENERATOR CIRCUITS, GENERATOR TESTING, AND GENERATOR POLARITY. THE MODULE CONSISTS OF A SELF-INSTRUCTIONAL PROGRAMED TRAINING FILM "DC GENERATORS II--GENERATOR…

Faster Evolution of More Multifunctional Logic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo

2005-01-01

A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.

Test aspects of the JPL Viterbi decoder

NASA Technical Reports Server (NTRS)

Breuer, M. A.

1989-01-01

The generation of test vectors and design-for-test aspects of the Jet Propulsion Laboratory (JPL) Very Large Scale Integration (VLSI) Viterbi decoder chip is discussed. Each processor integrated circuit (IC) contains over 20,000 gates. To achieve a high degree of testability, a scan architecture is employed. The logic has been partitioned so that very few test vectors are required to test the entire chip. In addition, since several blocks of logic are replicated numerous times on this chip, test vectors need only be generated for each block, rather than for the entire circuit. These unique blocks of logic have been identified and test sets generated for them. The approach employed for testing was to use pseudo-exhaustive test vectors whenever feasible. That is, each cone of logid is tested exhaustively. Using this approach, no detailed logic design or fault model is required. All faults which modify the function of a block of combinational logic are detected, such as all irredundant single and multiple stuck-at faults.

Experimental Testing of a Van De Graaff Generator as an Electromagnetic Pulse Generator

DTIC Science & Technology

2016-07-01

EXPERIMENTAL TESTING OF A VAN DE GRAAFF GENERATOR AS AN ELECTROMAGNETIC PULSE GENERATOR THESIS...protection in the United States AFIT-ENP-MS-16-S-075 EXPERIMENTAL TESTING OF A VAN DE GRAAFF GENERATOR AS AN ELECTROMAGNETIC PULSE GENERATOR...RELEASE; DISTRIBUTION UNLIMITED. AFIT-ENP-MS-16-S-075 EXPERIMENTAL TESTING OF A VAN DE GRAAFF GENERATOR AS AN ELECTROMAGNETIC PULSE GENERATOR

Differential biofilms characteristics of Shewanella decolorationis microbial fuel cells under open and closed circuit conditions.

PubMed

Yang, Yonggang; Sun, Guoping; Guo, Jun; Xu, Meiying

2011-07-01

Biofilms formation capacities of Shewanella species in microbial fuel cells (MFCs) and their roles in current generation have been documented to be species-dependent. Understandings of the biofilms growth and metabolism are essential to optimize the current generation of MFCs. Shewanella decolorationis S12 was used in both closed-circuit and open-circuit MFCs in this study. The anodic S. decolorationis S12 biofilms could generate fivefold more current than the planktonic cells, playing a dominant role in current generation. Anodic biofilms viability was sustained at 98 ± 1.2% in closed-circuit while biofilms viability in open-circuit decreased to 72 ± 7% within 96 h. The unviable domain in open-circuit MFCs biofilms majorly located at the inner layer of biofilm. The decreased biofilms viability in open-circuit MFCs could be recovered by switching into closed-circuit, indicating that the current-generating anode in MFCs could serve as a favorable electron acceptor and provide sufficient energy to support cell growth and metabolism inside biofilms. Copyright © 2011 Elsevier Ltd. All rights reserved.

Single Day Construction of Multigene Circuits with 3G Assembly.

PubMed

Halleran, Andrew D; Swaminathan, Anandh; Murray, Richard M

2018-05-18

The ability to rapidly design, build, and test prototypes is of key importance to every engineering discipline. DNA assembly often serves as a rate limiting step of the prototyping cycle for synthetic biology. Recently developed DNA assembly methods such as isothermal assembly and type IIS restriction enzyme systems take different approaches to accelerate DNA construction. We introduce a hybrid method, Golden Gate-Gibson (3G), that takes advantage of modular part libraries introduced by type IIS restriction enzyme systems and isothermal assembly's ability to build large DNA constructs in single pot reactions. Our method is highly efficient and rapid, facilitating construction of entire multigene circuits in a single day. Additionally, 3G allows generation of variant libraries enabling efficient screening of different possible circuit constructions. We characterize the efficiency and accuracy of 3G assembly for various construct sizes, and demonstrate 3G by characterizing variants of an inducible cell-lysis circuit.

Evolutionary mechanisms that generate morphology and neural-circuit diversity of the cerebellum.

PubMed

Hibi, Masahiko; Matsuda, Koji; Takeuchi, Miki; Shimizu, Takashi; Murakami, Yasunori

2017-05-01

The cerebellum is derived from the dorsal part of the anterior-most hindbrain. The vertebrate cerebellum contains glutamatergic granule cells (GCs) and gamma-aminobutyric acid (GABA)ergic Purkinje cells (PCs). These cerebellar neurons are generated from neuronal progenitors or neural stem cells by mechanisms that are conserved among vertebrates. However, vertebrate cerebella are widely diverse with respect to their gross morphology and neural circuits. The cerebellum of cyclostomes, the basal vertebrates, has a negligible structure. Cartilaginous fishes have a cerebellum containing GCs, PCs, and deep cerebellar nuclei (DCNs), which include projection neurons. Ray-finned fish lack DCNs but have projection neurons termed eurydendroid cells (ECs) in the vicinity of the PCs. Among ray-finned fishes, the cerebellum of teleost zebrafish has a simple lobular structure, whereas that of weakly electric mormyrid fish is large and foliated. Amniotes, which include mammals, independently evolved a large, foliated cerebellum, which contains massive numbers of GCs and has functional connections with the dorsal telencephalon (neocortex). Recent studies of cyclostomes and cartilaginous fish suggest that the genetic program for cerebellum development was already encoded in the genome of ancestral vertebrates. In this review, we discuss how alterations of the genetic and cellular programs generated diversity of the cerebellum during evolution. © 2017 Japanese Society of Developmental Biologists.

Determining distinct circuit in complete graphs using permutation

NASA Astrophysics Data System (ADS)

Karim, Sharmila; Ibrahim, Haslinda; Darus, Maizon Mohd

2017-11-01

A Half Butterfly Method (HBM) is a method introduced to construct the distinct circuits in complete graphs where used the concept of isomorphism. The Half Butterfly Method was applied in the field of combinatorics such as in listing permutations of n elements. However the method of determining distinct circuit using HBM for n > 4 is become tedious. Thus, in this paper, we present the method of generating distinct circuit using permutation.

Automatic Design of Digital Synthetic Gene Circuits

PubMed Central

Marchisio, Mario A.; Stelling, Jörg

2011-01-01

De novo computational design of synthetic gene circuits that achieve well-defined target functions is a hard task. Existing, brute-force approaches run optimization algorithms on the structure and on the kinetic parameter values of the network. However, more direct rational methods for automatic circuit design are lacking. Focusing on digital synthetic gene circuits, we developed a methodology and a corresponding tool for in silico automatic design. For a given truth table that specifies a circuit's input–output relations, our algorithm generates and ranks several possible circuit schemes without the need for any optimization. Logic behavior is reproduced by the action of regulatory factors and chemicals on the promoters and on the ribosome binding sites of biological Boolean gates. Simulations of circuits with up to four inputs show a faithful and unequivocal truth table representation, even under parametric perturbations and stochastic noise. A comparison with already implemented circuits, in addition, reveals the potential for simpler designs with the same function. Therefore, we expect the method to help both in devising new circuits and in simplifying existing solutions. PMID:21399700

Magnetic Circuit Model of PM Motor-Generator to Predict Radial Forces

NASA Technical Reports Server (NTRS)

McLallin, Kerry (Technical Monitor); Kascak, Peter E.; Dever, Timothy P.; Jansen, Ralph H.

2004-01-01

A magnetic circuit model is developed for a PM motor for flywheel applications. A sample motor is designed and modeled. Motor configuration and selection of materials is discussed, and the choice of winding configuration is described. A magnetic circuit model is described, which includes the stator back iron, rotor yoke, permanent magnets, air gaps and the stator teeth. Iterative solution of this model yields flux linkages, back EMF, torque, power, and radial force at the rotor caused by eccentricity. Calculated radial forces are then used to determine motor negative stiffness.

Area-efficient physically unclonable function circuit architecture

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gurrieri, Thomas; Hamlet, Jason; Bauer, Todd

Generating a physically a physically unclonable function ("PUF") circuit value includes comparing each of first identification components in a first bank to each of second identification components in a second bank. A given first identification component in the first bank is not compared to another first identification component in the first bank and a given second identification component in the second bank is not compared to another second identification component in the second bank. A digital bit value is generated for each comparison made while comparing each of the first identification components to each of the second identification components. Amore » PUF circuit value is generated from the digital bit values from each comparison made.« less

Tester Detects Steady-Short Or Intermittent-Open Circuits

NASA Technical Reports Server (NTRS)

Anderson, Bobby L.

1990-01-01

Momentary open circuits or steady short circuits trigger buzzer. Simple, portable, lightweight testing circuit sounds long-duration alarm when it detects steady short circuit or momentary open circuit in coaxial cable or other two-conductor transmission line. Tester sensitive to discontinuities lasting 10 microseconds or longer. Used extensively for detecting intermittent open shorts in accelerometer and extensometer cables. Also used as ordinary buzzer-type continuity checker to detect steady short or open circuits.

Test Generator for MATLAB Simulations

NASA Technical Reports Server (NTRS)

Henry, Joel

2011-01-01

MATLAB Automated Test Tool, version 3.0 (MATT 3.0) is a software package that provides automated tools that reduce the time needed for extensive testing of simulation models that have been constructed in the MATLAB programming language by use of the Simulink and Real-Time Workshop programs. MATT 3.0 runs on top of the MATLAB engine application-program interface to communicate with the Simulink engine. MATT 3.0 automatically generates source code from the models, generates custom input data for testing both the models and the source code, and generates graphs and other presentations that facilitate comparison of the outputs of the models and the source code for the same input data. Context-sensitive and fully searchable help is provided in HyperText Markup Language (HTML) format.

Variable-pulse switching circuit accurately controls solenoid-valve actuations

NASA Technical Reports Server (NTRS)

Gillett, J. D.

1967-01-01

Solid state circuit generating adjustable square wave pulses of sufficient power operates a 28 volt dc solenoid valve at precise time intervals. This circuit is used for precise time control of fluid flow in combustion experiments.

Intrinsic and extrinsic neuromodulation of motor circuits.

PubMed

Katz, P S

1995-12-01

Neuromodulation of motor circuits by extrinsic inputs provides enormous flexibility in the production of behavior. Recent work has shown that neurons intrinsic to central pattern-generating circuits can evoke neuromodulatory effects in addition to their neurotransmitting actions. Modulatory neurons often elicit a multitude of different effects attributable to actions at different receptors and/or through the release of co-transmitters. Differences in neuromodulation between species can account for differences in behavior. Modulation of neuromodulation may provide an additional level of flexibility to motor circuits.

Scram signal generator

DOEpatents

Johanson, Edward W.; Simms, Richard

1981-01-01

A scram signal generating circuit for nuclear reactor installations monitors a flow signal representing the flow rate of the liquid sodium coolant which is circulated through the reactor, and initiates reactor shutdown for a rapid variation in the flow signal, indicative of fuel motion. The scram signal generating circuit includes a long-term drift compensation circuit which processes the flow signal and generates an output signal representing the flow rate of the coolant. The output signal remains substantially unchanged for small variations in the flow signal, attributable to long term drift in the flow rate, but a rapid change in the flow signal, indicative of a fast flow variation, causes a corresponding change in the output signal. A comparator circuit compares the output signal with a reference signal, representing a given percentage of the steady state flow rate of the coolant, and generates a scram signal to initiate reactor shutdown when the output signal equals the reference signal.

Scram signal generator

DOEpatents

Johanson, E.W.; Simms, R.

A scram signal generating circuit for nuclear reactor installations monitors a flow signal representing the flow rate of the liquid sodium coolant which is circulated through the reactor, and initiates reactor shutdown for a rapid variation in the flow signal, indicative of fuel motion. The scram signal generating circuit includes a long-term drift compensation circuit which processes the flow signal and generates an output signal representing the flow rate of the coolant. The output signal remains substantially unchanged for small variations in the flow signal, attributable to long term drift in the flow rate, but a rapid change in the flow signal, indicative of a fast flow variation, causes a corresponding change in the output signal. A comparator circuit compares the output signal with a reference signal, representing a given percentage of the steady state flow rate of the coolant, and generates a scram signal to initiate reactor shutdown when the output signal equals the reference signal.

Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2013 CFR

2013-10-01

... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Inspections and Tests § 234.269 Cut-out... overrides the operation of automatic warning systems. This includes both switch cut-out circuits and devices... 49 Transportation 4 2013-10-01 2013-10-01 false Cut-out circuits. 234.269 Section 234.269...

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2014 CFR

2014-10-01

... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Inspections and Tests § 234.269 Cut-out... overrides the operation of automatic warning systems. This includes both switch cut-out circuits and devices... 49 Transportation 4 2014-10-01 2014-10-01 false Cut-out circuits. 234.269 Section 234.269...

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2012 CFR

2012-10-01

... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Inspections and Tests § 234.269 Cut-out... overrides the operation of automatic warning systems. This includes both switch cut-out circuits and devices... 49 Transportation 4 2012-10-01 2012-10-01 false Cut-out circuits. 234.269 Section 234.269...

Infant phantom head circuit board for EEG head phantom and pediatric brain simulation

NASA Astrophysics Data System (ADS)

Almohsen, Safa

The infant's skull differs from an adult skull because of the characteristic features of the human skull during early development. The fontanels and the conductivity of the infant skull influence surface currents, generated by neurons, which underlie electroencephalography (EEG) signals. An electric circuit was built to power a set of simulated neural sources for an infant brain activity simulator. Also, in the simulator, three phantom tissues were created using saline solution plus Agarose gel to mimic the conductivity of each layer in the head [scalp, skull brain]. The conductivity measurement was accomplished by two different techniques: using the four points' measurement technique, and a conductivity meter. Test results showed that the optimized phantom tissues had appropriate conductivities to simulate each tissue layer to fabricate a physical head phantom. In this case, the best results should be achieved by testing the electrical neural circuit with the sample physical model to generate simulated EEG data and use that to solve both the forward and the inverse problems for the purpose of localizing the neural sources in the head phantom.

62. VIEW LOOKING NORTHWEST AT THE OIL FILLED CIRCUIT BREAKER ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

62. VIEW LOOKING NORTHWEST AT THE OIL FILLED CIRCUIT BREAKER FOR GENERATOR NUMBER 1. CIRCUIT BREAKERS ARE AUTOMATED SWITCHES WHICH DISCONNECT THE GENERATORS FROM THE LINE WHEN SHORT CIRCUITS OCCUR. WHEN CIRCUITS INVOLVING HIGH CURRENTS AND VOLTAGES ARE BROKEN, THE AIR SURROUNDING MECHANICAL PARTS OF THE SWITCH BECOMES IONIZED AND CONTINUES TO CONDUCT ELECTRIC POWER ACROSS ANY GAP IN THE SWITCH CONTACTS. TO PREVENT THIS AND INSURE A POSITIVE INTERRUPTION OF CURRENT, THE SWITCH CONTACTS ARE IMMERSED IN A CONTAINER OF OIL. THE OIL DOES NOT SUPPORT THE FORMATION OF AN ARC AND EFFECTIVELY CUTS OFF THE CURRENT WHEN THE SWITCH CONTACTS ARE OPENED. - New York, New Haven & Hartford Railroad, Cos Cob Power Plant, Sound Shore Drive, Greenwich, Fairfield County, CT

Simulation of TunneLadder traveling-wave tube cold-test characteristics: Implementation of the three-dimensional, electromagnetic circuit analysis code micro-SOS

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Wilson, Jeffrey D.

1993-01-01

The three-dimensional, electromagnetic circuit analysis code, Micro-SOS, can be used to reduce expensive time-consuming experimental 'cold-testing' of traveling-wave tube (TWT) circuits. The frequency-phase dispersion characteristics and beam interaction impedance of a TunneLadder traveling-wave tube slow-wave structure were simulated using the code. When reasonable dimensional adjustments are made, computer results agree closely with experimental data. Modifications to the circuit geometry that would make the TunneLadder TWT easier to fabricate for higher frequency operation are explored.

Performance of the electrical generator cell by the ferrous alloys of printed circuit board scrap and Iron Metal 1020

NASA Astrophysics Data System (ADS)

Sahan, Y.; Sudarsono, S.; Silviana, E.; Chairul; Wisrayetti

2018-04-01

Galvani cell is one of thealternative energy. This cell can be used as an electric resources. In this research, the generator cell was designed and builds to generate the electric. The generator cell consisted of the iron metal 1020 were used as anode, the ferrous alloys of printed circuit board scrapwas then used as chatode, and NaCl solution as an electrolyte. The aim of this research is to estimate the performance of this generator cell by using variation of NaCl concentration (i.e. 1%, 3%, 5%, 7%, and 9%) with the electrodes pair ( 1 and 8 pairs). The performance of the cell was measured with a multi tester equipment and a LED bulb (5-watt 3Volt). The Results shown that the generator cell can produce the electric power of 3.679 Volt maximally by using NaCl 9% and 8 electrode pairs applied for this condition.

Programmable Low-Voltage Circuit Breaker and Tester

NASA Technical Reports Server (NTRS)

Greenfield, Terry

2008-01-01

An instrumentation system that would comprise a remotely controllable and programmable low-voltage circuit breaker plus several electric-circuit-testing subsystems has been conceived, originally for use aboard a spacecraft during all phases of operation from pre-launch testing through launch, ascent, orbit, descent, and landing. The system could also be adapted to similar use aboard aircraft. In comparison with remotely controllable circuit breakers heretofore commercially available, this system would be smaller, less massive, and capable of performing more functions, as needed for aerospace applications.

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 49 Transportation 4 2012-10-01 2012-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 49 Transportation 4 2013-10-01 2013-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 49 Transportation 4 2014-10-01 2014-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

Signal Waveform Generator Performance Test

DOT National Transportation Integrated Search

1992-01-01

A signal waveform generator (SWG) was tested to determine its suitability for use in testing crash test data acquisition systems. The outputs of the SWG were recorded by a precise, high speed data acquisitions card plugged into the option card slot o...

Dynamical Systems in Circuit Designer's Eyes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Odyniec, M.

Examples of nonlinear circuit design are given. Focus of the design process is on theory and engineering methods (as opposed to numerical analysis). Modeling is related to measurements It is seen that the phase plane is still very useful with proper models Harmonic balance/describing function offers powerful insight (via the combination of simulation with circuit and ODE theory). Measurement and simulation capabilities increased, especially harmonics measurements (since sinusoids are easy to generate)

Selection of wires and circuit protective devices for STS Orbiter vehicle payload electrical circuits

NASA Technical Reports Server (NTRS)

Gaston, Darilyn M.

1991-01-01

Electrical designers of Orbiter payloads face the challenge of determining proper circuit protection/wire size parameters to satisfy Orbiter engineering and safety requirements. This document is the result of a program undertaken to review test data from all available aerospace sources and perform additional testing to eliminate extrapolation errors. The resulting compilation of data was used to develop guidelines for the selection of wire sizes and circuit protection ratings. The purpose is to provide guidance to the engineering to ensure a design which meets Orbiter standards and which should be applicable to any aerospace design.

Optimal Test Design with Rule-Based Item Generation

ERIC Educational Resources Information Center

Geerlings, Hanneke; van der Linden, Wim J.; Glas, Cees A. W.

2013-01-01

Optimal test-design methods are applied to rule-based item generation. Three different cases of automated test design are presented: (a) test assembly from a pool of pregenerated, calibrated items; (b) test generation on the fly from a pool of calibrated item families; and (c) test generation on the fly directly from calibrated features defining…

A Readout Integrated Circuit (ROIC) employing self-adaptive background current compensation technique for Infrared Focal Plane Array (IRFPA)

NASA Astrophysics Data System (ADS)

Zhou, Tong; Zhao, Jian; He, Yong; Jiang, Bo; Su, Yan

2018-05-01

A novel self-adaptive background current compensation circuit applied to infrared focal plane array is proposed in this paper, which can compensate the background current generated in different conditions. Designed double-threshold detection strategy is to estimate and eliminate the background currents, which could significantly reduce the hardware overhead and improve the uniformity among different pixels. In addition, the circuit is well compatible to various categories of infrared thermo-sensitive materials. The testing results of a 4 × 4 experimental chip showed that the proposed circuit achieves high precision, wide application and high intelligence. Tape-out of the 320 × 240 readout circuit, as well as the bonding, encapsulation and imaging verification of uncooled infrared focal plane array, have also been completed.

Josephson Circuits as Vector Quantum Spins

NASA Astrophysics Data System (ADS)

Samach, Gabriel; Kerman, Andrew J.

While superconducting circuits based on Josephson junction technology can be engineered to represent spins in the quantum transverse-field Ising model, no circuit architecture to date has succeeded in emulating the vector quantum spin models of interest for next-generation quantum annealers and quantum simulators. Here, we present novel Josephson circuits which may provide these capabilities. We discuss our rigorous quantum-mechanical simulations of these circuits, as well as the larger architectures they may enable. This research was funded by the Office of the Director of National Intelligence (ODNI) and the Intelligence Advanced Research Projects Activity (IARPA) under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

Solid state circuit controls direction, speed, and braking of dc motor

NASA Technical Reports Server (NTRS)

Hanna, M. F.

1966-01-01

Full-wave bridge rectifier circuit controls the direction, speed, and braking of a dc motor. Gating in the circuit of Silicon Controlled Rectifiers /SCRS/ controls output polarity and braking is provided by an SCR that is gated to short circuit the reverse voltage generated by reversal of motor rotation.

ELECTROMAGNETIC AND ELECTROSTATIC GENERATORS: ANNOTATED BIBLIOGRAPHY.

DTIC Science & Technology

generator with split poles, ultrasonic-frequency generator, unipolar generator, single-phase micromotors , synchronous motor, asynchronous motor...asymmetrical rotor, magnetic circuit, dc micromotors , circuit for the automatic control of synchronized induction motors, induction torque micromotors , electric

Logic circuits based on molecular spider systems.

PubMed

Mo, Dandan; Lakin, Matthew R; Stefanovic, Darko

2016-08-01

Spatial locality brings the advantages of computation speed-up and sequence reuse to molecular computing. In particular, molecular walkers that undergo localized reactions are of interest for implementing logic computations at the nanoscale. We use molecular spider walkers to implement logic circuits. We develop an extended multi-spider model with a dynamic environment wherein signal transmission is triggered via localized reactions, and use this model to implement three basic gates (AND, OR, NOT) and a cascading mechanism. We develop an algorithm to automatically generate the layout of the circuit. We use a kinetic Monte Carlo algorithm to simulate circuit computations, and we analyze circuit complexity: our design scales linearly with formula size and has a logarithmic time complexity. Copyright © 2016 Elsevier Ireland Ltd. All rights reserved.

ADJUSTABLE DOUBLE PULSE GENERATOR

DOEpatents

Gratian, J.W.; Gratian, A.C.

1961-08-01

>A modulator pulse source having adjustable pulse width and adjustable pulse spacing is described. The generator consists of a cross coupled multivibrator having adjustable time constant circuitry in each leg, an adjustable differentiating circuit in the output of each leg, a mixing and rectifying circuit for combining the differentiated pulses and generating in its output a resultant sequence of negative pulses, and a final amplifying circuit for inverting and square-topping the pulses. (AEC)

High performance protection circuit for power electronics applications

NASA Astrophysics Data System (ADS)

Tudoran, Cristian D.; Dǎdârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

2015-12-01

In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a "sensor" or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

Full circuit calculation for electromagnetic pulse transmission in a high current facility

NASA Astrophysics Data System (ADS)

Zou, Wenkang; Guo, Fan; Chen, Lin; Song, Shengyi; Wang, Meng; Xie, Weiping; Deng, Jianjun

2014-11-01

We describe herein for the first time a full circuit model for electromagnetic pulse transmission in the Primary Test Stand (PTS)—the first TW class pulsed power driver in China. The PTS is designed to generate 8-10 MA current into a z -pinch load in nearly 90 ns rise time for inertial confinement fusion and other high energy density physics research. The PTS facility has four conical magnetic insulation transmission lines, in which electron current loss exists during the establishment of magnetic insulation. At the same time, equivalent resistance of switches and equivalent inductance of pinch changes with time. However, none of these models are included in a commercially developed circuit code so far. Therefore, in order to characterize the electromagnetic transmission process in the PTS, a full circuit model, in which switch resistance, magnetic insulation transmission line current loss and a time-dependent load can be taken into account, was developed. Circuit topology and an equivalent circuit model of the facility were introduced. Pulse transmission calculation of shot 0057 was demonstrated with the corresponding code FAST (full-circuit analysis and simulation tool) by setting controllable parameters the same as in the experiment. Preliminary full circuit simulation results for electromagnetic pulse transmission to the load are presented. Although divergences exist between calculated and experimentally obtained waveforms before the vacuum section, consistency with load current is satisfactory, especially at the rising edge.

Compensated count-rate circuit for radiation survey meter

DOEpatents

Todd, Richard A.

1981-01-01

A count-rate compensating circuit is provided which may be used in a portable Geiger-Mueller (G-M) survey meter to ideally compensate for counting loss errors in the G-M tube detector. In a G-M survey meter, wherein the pulse rate from the G-M tube is converted into a pulse rate current applied to a current meter calibrated to indicate dose rate, the compensated circuit generates and controls a reference voltage in response to the rate of pulses from the detector. This reference voltage is gated to the current-generating circuit at a rate identical to the rate of pulses coming from the detector so that the current flowing through the meter is varied in accordance with both the frequency and amplitude of the reference voltage pulses applied thereto so that the count rate is compensated ideally to indicate a true count rate within 1% up to a 50% duty cycle for the detector. A positive feedback circuit is used to control the reference voltage so that the meter output tracks true count rate indicative of the radiation dose rate.

Compensated count-rate circuit for radiation survey meter

DOEpatents

Todd, R.A.

1980-05-12

A count-rate compensating circuit is provided which may be used in a portable Geiger-Mueller (G-M) survey meter to ideally compensate for couting loss errors in the G-M tube detector. In a G-M survey meter, wherein the pulse rate from the G-M tube is converted into a pulse rate current applied to a current meter calibrated to indicate dose rate, the compensation circuit generates and controls a reference voltage in response to the rate of pulses from the detector. This reference voltage is gated to the current-generating circuit at a rate identical to the rate of pulses coming from the detector so that the current flowing through the meter is varied in accordance with both the frequency and amplitude of the reference voltage pulses applied thereto so that the count rate is compensated ideally to indicate a true count rate within 1% up to a 50% duty cycle for the detector. A positive feedback circuit is used to control the reference voltage so that the meter output tracks true count rate indicative of the radiation dose rate.

Double buffer circuit for the characterization of piezoelectric nanogenerators based on ZnO nanowires

NASA Astrophysics Data System (ADS)

Nadaud, Kevin; Morini, François; Dahiya, Abhishek S.; Justeau, Camille; Boubenia, Sarah; Rajeev, Kiron P.; Alquier, Daniel; Poulin-Vittrant, Guylaine

2018-02-01

The accurate and precise measurements of voltage and current output generated by a nanogenerator (NG) are crucial to design the rectifying/harvesting circuit and to evaluate correctly the amount of energy provided by a NG. High internal impedance of the NGs (several MΩ) is the main limiting factor for designing circuits to measure the open circuit voltage. In this paper, we present the influence of the characterization circuit used to measure the generated voltage of piezoelectric NGs. The proposed circuit consists of a differential amplifier which permits us to measure the voltage provided by the NG without applying any parasitic bias to it. The proposed circuit is compared to a commercial electrometer and a homemade buffer circuit based on a voltage follower circuit to show its interest. For the proposed double buffer circuit, no asymmetric behavior has been noticed contrary to the measurements made using a simple buffer circuit and a Keithley electrometer. The proposed double buffer circuit is thus suitable to measure the NG voltage in a transparent way, as an ideal voltage probe should do.

Energy-efficient neuron, synapse and STDP integrated circuits.

PubMed

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

30 CFR 57.6402 - Deenergized circuits near detonators.

Code of Federal Regulations, 2010 CFR

2010-07-01

... Electric Blasting-Surface and Underground § 57.6402 Deenergized circuits near detonators. Electrical distribution circuits within 50 feet of electric detonators at the blast site shall be deenergized. Such circuits need not be deenergized between 25 to 50 feet of the electric detonators if stray current tests...

Integrated circuit failure analysis by low-energy charge-induced voltage alteration

DOEpatents

Cole, Jr., Edward I.

1996-01-01

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs.

Delineating the Diversity of Spinal Interneurons in Locomotor Circuits.

PubMed

Gosgnach, Simon; Bikoff, Jay B; Dougherty, Kimberly J; El Manira, Abdeljabbar; Lanuza, Guillermo M; Zhang, Ying

2017-11-08

Locomotion is common to all animals and is essential for survival. Neural circuits located in the spinal cord have been shown to be necessary and sufficient for the generation and control of the basic locomotor rhythm by activating muscles on either side of the body in a specific sequence. Activity in these neural circuits determines the speed, gait pattern, and direction of movement, so the specific locomotor pattern generated relies on the diversity of the neurons within spinal locomotor circuits. Here, we review findings demonstrating that developmental genetics can be used to identify populations of neurons that comprise these circuits and focus on recent work indicating that many of these populations can be further subdivided into distinct subtypes, with each likely to play complementary functions during locomotion. Finally, we discuss data describing the manner in which these populations interact with each other to produce efficient, task-dependent locomotion. Copyright © 2017 the authors 0270-6474/17/3710835-07$15.00/0.

Ground and CHAMP observations of field-aligned current circuits generated by lower atmospheric disturbances and expectations to the SWARM to clarify their three dimensional structure

NASA Astrophysics Data System (ADS)

Iyemori, Toshihiko; Nakanishi, Kunihito; Aoyama, Tadashi; Lühr, Hermann

2014-05-01

Acoustic gravity waves propagated to the ionosphere cause dynamo currents in the ionosphere. They divert along geomagnetic field lines of force to another hemisphere accompanying electric field and then flow in the ionosphere of another hemisphere by the electric field forming closed current circuits. The oscillating current circuits with the period of acoustic waves generate magnetic variations on the ground, and they are observed as long period geomagnetic pulsations. This effect has been detected during big earthquakes, strong typhoons, tornados etc. On a low-altitude satellite orbit, the spatial distribution (i.e., structure) of the current circuits along the satellite orbit should be detected as temporal magnetic oscillations, and the effect is confirmed by a CHAMP data analysis. On the spatial structure, in particular, in the longitudinal direction, it has been difficult to examine by a single satellite or from ground magnetic observations. The SWARM satellites will provide an unique opportunity to clarify the three dimensional structure of the field-aligned current circuits.

Readout Circuits for Noise Compensation in ISFET Sensory System

NASA Astrophysics Data System (ADS)

Das, M. P.; Bhuyan, M.; Talukdar, C.

2015-12-01

This paper presents two different noise reduction techniques for ion sensitive field effect transistor (ISFET) readout configuration and their comparison. The proposed circuit configurations are immune to the noise generated from the ISFET sensory system and particularly to the low frequency pH dependent 1/ f electrochemical noise. The methods used under this study are compensation of noise by differential OPAMP based and Wheatstone bridge circuit, where two identical commercial ISFET sensors were used. The statistical and frequency analysis of the data generated by this two methods were compared for different pH value ranging from pH 2 to 10 at room temperature, and it is found that the readout circuits are able to compensate the noise to a great extent.

PULSE GENERATOR

DOEpatents

Roeschke, C.W.

1957-09-24

An improvement in pulse generators is described by which there are produced pulses of a duration from about 1 to 10 microseconds with a truly flat top and extremely rapid rise and fall. The pulses are produced by triggering from a separate input or by modifying the current to operate as a free-running pulse generator. In its broad aspect, the disclosed pulse generator comprises a first tube with an anode capacitor and grid circuit which controls the firing; a second tube series connected in the cathode circuit of the first tube such that discharge of the first tube places a voltage across it as the leading edge of the desired pulse; and an integrator circuit from the plate across the grid of the second tube to control the discharge time of the second tube, determining the pulse length.

Power supply circuit for an ion engine sequentially operated power inverters

NASA Technical Reports Server (NTRS)

Cardwell, Jr., Gilbert I. (Inventor)

2000-01-01

A power supply circuit for an ion engine suitable for a spacecraft has a voltage bus having input line and a return line. The power supply circuit includes a pulse width modulation circuit. A plurality of bridge inverter circuits is coupled to the bus and the pulse width modulation circuit. The pulse width modulation circuit generates operating signals having a variable duty cycle. Each bridge inverter has a primary winding and a secondary winding. Each secondary winding is coupled to a rectifier bridge. Each secondary winding is coupled in series with another of the plurality of rectifier bridges.

21 CFR 882.1430 - Electroencephalograph test signal generator.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Electroencephalograph test signal generator. 882.1430 Section 882.1430 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN... Electroencephalograph test signal generator. (a) Identification. An electroencephalograph test signal generator is a...

21 CFR 882.1430 - Electroencephalograph test signal generator.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Electroencephalograph test signal generator. 882.1430 Section 882.1430 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN... Electroencephalograph test signal generator. (a) Identification. An electroencephalograph test signal generator is a...

Design and testing of a low impedance transceiver circuit for nitrogen-14 nuclear quadrupole resonance.

PubMed

Sato-Akaba, Hideo

2014-01-01

A low impedance transceiver circuit consisting of a transmit-receive switch circuit, a class-D amplifier and a transimpedance amplifier (TIA) was newly designed and tested for a nitrogen-14 NQR. An NQR signal at 1.37MHz from imidazole was successfully observed with the dead time of ~85µs under the high Q transmission (Q~120) and reception (Q~140). The noise performance of the low impedance TIA with an NQR probe was comparable with a commercial low noise 50Ω amplifier (voltage input noise: 0.25 nV/Hz) which was also connected to the probe. The protection voltage for the pre-amplifier using the low impedance transceiver was ~10 times smaller than that for the pre-amplifier using a 50Ω conventional transceiver, which is suitable for NQR remote sensing applications. Copyright © 2014 Elsevier Inc. All rights reserved.

High performance protection circuit for power electronics applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tudoran, Cristian D., E-mail: cristian.tudoran@itim-cj.ro; Dădârlat, Dorin N.; Toşa, Nicoleta

2015-12-23

In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a “sensor” or it can interrupt the power supply for protection, in this case functioning as anmore » external, independent protection circuit.« less

Commutation circuit for an HVDC circuit breaker

DOEpatents

Premerlani, William J.

1981-01-01

A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

Commutation circuit for an HVDC circuit breaker

DOEpatents

Premerlani, W.J.

1981-11-10

A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

Marx Generator Charged via Biperiodic Resonant Cascaded Transformers

NASA Astrophysics Data System (ADS)

Potter, Rudolf H.

In this work, a novel method for charging solid state Marx generators is described for the first time. We first review the utility of modulators for powering high power microwave devices. The principal of operation of the Marx generator is then described starting with the classic topology and leading to solid state topologies. The concept of a generalized Marx generator is introduced and several methods of charging are discussed. A resonant cascaded transformers topology emerges from this discussion. Resonant modes are discussed and the topology is refined to take advantage of the pi/2 mode leading to the circuit that is the focus of this work. We begin our analysis of this circuit by considering the corresponding infinite biperiodic system and derive the characteristic dispersion relation. Motivation for closing the stopband is discussed and benefits of the pi/2 mode are noted. We proceed next to derive the matrix equation for the corresponding lossless system of coupled oscillators. To test and verify the analytic work, a five cell benchtop prototype of the charging system is built and its resonant modes are determined empirically. Capacitors in odd numbered resonators are each connected to the input of a voltage doubler circuit and high voltage dc is generated. A MOSFET is added to the output of each doubler circuit and pulsed output is demonstrated. A SPICE simulation of the physical circuit is created. The mode frequencies from the simulation are in good agreement with those measured and calculated. A practical high-power design is considered for the E2V/Teledyne MG7095 magnetron and simulated in SPICE.

Nonlinearity characterization of temperature sensing systems for integrated circuit testing by intermodulation products monitoring.

PubMed

Altet, J; Mateo, D; Perpiñà, X; Grauby, S; Dilhaire, S; Jordà, X

2011-09-01

This work presents an alternative characterization strategy to quantify the nonlinear behavior of temperature sensing systems. The proposed approach relies on measuring the temperature under thermal sinusoidal steady state and observing the intermodulation products that are generated within the sensing system itself due to its nonlinear temperature-output voltage characteristics. From such intermodulation products, second-order interception points can be calculated as a figure of merit of the measuring system nonlinear behavior. In this scenario, the present work first shows a theoretical analysis. Second, it reports the experimental results obtained with three thermal sensing techniques used in integrated circuits. © 2011 American Institute of Physics

Toward next-generation optical networks: a network operator perspective based on experimental tests and economic analysis

NASA Astrophysics Data System (ADS)

Xiao, Xiaojun; Du, Chunsheng; Zhou, Rongsheng

2004-04-01

As a result of data traffic"s exponential growth, network is currently evolving from fixed circuit switched services to dynamic packet switched services, which has brought unprecedented changes to the existing transport infrastructure. It is generally agreed that automatic switched optical network (ASON) is one of the promising solutions for the next generation optical networks. In this paper, we present the results of our experimental tests and economic analysis on ASON. The intention of this paper is to present our perspective, in terms of evolution strategy toward ASON, on next generation optical networks. It is shown through experimental tests that the performance of current Pre-standard ASON enabled equipments satisfies the basic requirements of network operators and is ready for initial deployment. The results of the economic analysis show that network operators can be benefit from the deployment of ASON from three sides. Firstly, ASON can reduce the CAPEX for network expanding by integrating multiple ADM & DCS into one box. Secondly, ASON can reduce the OPEX for network operation by introducing automatic resource control scheme. Finally, ASON can increase margin revenue by providing new optical network services such as Bandwidth on Demand, optical VPN etc. Finally, the evolution strategy is proposed as our perspective toward next generation optical networks. We hope the evolution strategy introduced may be helpful for the network operators to gracefully migrate their fixed ring based legacy networks to next generation dynamic mesh based network.

MYSID TWO-GENERATION TEST GUIDELINE

EPA Science Inventory

McKenney, Charles L., Jr. In press. Mysid Two-Generation Test Guideline. OECD Expert Group on Invertebrate Testing for Endocrine Disruptors, Organisation for Economic Co-operation and Development, Paris, France. 17 p. (ERL,GB 1215).

This guideline describes a two-generati...

NREL/NASA Internal Short-Circuit Instigator in Lithium Ion Cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Keyser, Matthew; Long, Dirk; Pesaran, Ahmad

Lithium-ion cells provide the highest specific energy (>280 Wh/kg) and energy density (>600 Wh/L) rechargeable battery building block to date with the longest life. Electrode/electrolyte thermal instability and flammability of the electrolyte of Li-ion cells make them prone to catastrophic thermal runaway under some rare internal short circuit conditions. Despite extensive QC/QA, standardized industry safety testing, and over 18 years of manufacturing experience, major recalls have taken place and incidents still occur. Many safety incidents that take place in the field originate due to an internal short that was not detectable or predictable at the point of manufacture. The Internalmore » Short-Circuit Instigator can be used to study types of separators, non-flammable electrolytes, electrolyte additives, fusible tabs, propagation studies, and gas generation within a cell.« less

Configurable test bed design for nanosats to qualify commercial and customized integrated circuits

NASA Astrophysics Data System (ADS)

Guareschi, W.; Azambuja, J.; Kastensmidt, F.; Reis, R.; Durao, O.; Schuch, N.; Dessbesel, G.

The use of small satellites has increased substantially in recent years due to the reduced cost of their development and launch, as well to the flexibility offered by commercial components. The test bed is a platform that allows components to be evaluated and tested in space. It is a flexible platform, which can be adjusted to a wide quantity of components and interfaces. This work proposes the design and implementation of a test bed suitable for test and evaluation of commercial circuits used in nanosatellites. The development of such a platform allows developers to reduce the efforts in the integration of components and therefore speed up the overall system development time. The proposed test bed is a configurable platform implemented using a Field Programmable Gate Array (FPGA) that controls the communication protocols and connections to the devices under test. The Flash-based ProASIC3E FPGA from Microsemi is used as a control system. This adaptive system enables the control of new payloads and softcores for test and validation in space. Thus, the integration can be easily performed through configuration parameters. It is intended for modularity. Each component connected to the test bed can have a specific interface programmed using a hardware description language (HDL). The data of each component is stored in embedded memories. Each component has its own memory space. The size of the allocated memory can be also configured. The data transfer priority can be set and packaging can be added to the logic, when needed. Communication with peripheral devices and with the Onboard Computer (OBC) is done through the pre-implemented protocols, such as I2C (Inter-Integrated Circuit), SPI (Serial Peripheral Interface) and external memory control. In loco primary tests demonstrated the control system's functionality. The commercial ProASIC3E FPGA family is not space-flight qualified, but tests have been made under Total Ionizing Dose (TID) showing its robustness up to 25 kr

Energy saving in ac generators

NASA Technical Reports Server (NTRS)

Nola, F. J.

1980-01-01

Circuit cuts no-load losses, without sacrificing full-load power. Phase-contro circuit includes gate-controlled semiconductor switch that cuts off applied voltage for most of ac cycle if generator idling. Switch "on" time increases when generator is in operation.

40 CFR 53.42 - Generation of test atmospheres for wind tunnel tests.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 40 Protection of Environment 5 2010-07-01 2010-07-01 false Generation of test atmospheres for wind... Testing Performance Characteristics of Methods for PM10 § 53.42 Generation of test atmospheres for wind... particle delivery system shall consist of a blower system and a wind tunnel having a test section of...

40 CFR 53.42 - Generation of test atmospheres for wind tunnel tests.

Code of Federal Regulations, 2011 CFR

2011-07-01

... 40 Protection of Environment 5 2011-07-01 2011-07-01 false Generation of test atmospheres for wind... Testing Performance Characteristics of Methods for PM10 § 53.42 Generation of test atmospheres for wind... particle delivery system shall consist of a blower system and a wind tunnel having a test section of...

Integrated circuit failure analysis by low-energy charge-induced voltage alteration

DOEpatents

Cole, E.I. Jr.

1996-06-04

A scanning electron microscope apparatus and method are described for detecting and imaging open-circuit defects in an integrated circuit (IC). The invention uses a low-energy high-current focused electron beam that is scanned over a device surface of the IC to generate a charge-induced voltage alteration (CIVA) signal at the location of any open-circuit defects. The low-energy CIVA signal may be used to generate an image of the IC showing the location of any open-circuit defects. A low electron beam energy is used to prevent electrical breakdown in any passivation layers in the IC and to minimize radiation damage to the IC. The invention has uses for IC failure analysis, for production-line inspection of ICs, and for qualification of ICs. 5 figs.

A multi-channel isolated power supply in non-equipotential circuit

NASA Astrophysics Data System (ADS)

Li, Xiang; Zhao, Bo-Wen; Zhang, Yan-Chi; Xie, Da

2018-04-01

A multi-channel isolation power supply is designed for the problems of different MOSFET or IGBT in the non-equipotential circuit in this paper. It mainly includes the square wave generation circuit, the high-frequency transformer and the three-terminal stabilized circuit. The first part is used to generate the 24V square wave, and as the input of the magnetic ring transformer. In the second part, the magnetic ring transformer consists of one input and three outputs to realize multi-channel isolation output. The third part can output different potential and realize non-equal potential function through the three-terminal stabilized chip. In addition, the multi-channel isolation power source proposed in this paper is Small size, high reliability and low price, and it is convenient for power electronic switches that operate on multiple different potentials. Therefore, the research on power supply of power electronic circuit has practical significance.

Formal methods for test case generation

NASA Technical Reports Server (NTRS)

Rushby, John (Inventor); De Moura, Leonardo Mendonga (Inventor); Hamon, Gregoire (Inventor)

2011-01-01

The invention relates to the use of model checkers to generate efficient test sets for hardware and software systems. The method provides for extending existing tests to reach new coverage targets; searching *to* some or all of the uncovered targets in parallel; searching in parallel *from* some or all of the states reached in previous tests; and slicing the model relative to the current set of coverage targets. The invention provides efficient test case generation and test set formation. Deep regions of the state space can be reached within allotted time and memory. The approach has been applied to use of the model checkers of SRI's SAL system and to model-based designs developed in Stateflow. Stateflow models achieving complete state and transition coverage in a single test case are reported.

40 CFR 53.22 - Generation of test atmospheres.

Code of Federal Regulations, 2012 CFR

2012-07-01

... 40 Protection of Environment 6 2012-07-01 2012-07-01 false Generation of test atmospheres. 53.22... Characteristics of Automated Methods for SO2, CO, O3, and NO2 § 53.22 Generation of test atmospheres. (a) Table B-2 to subpart B of part 53 specifies preferred methods for generating test atmospheres and suggested...

40 CFR 53.22 - Generation of test atmospheres.

Code of Federal Regulations, 2014 CFR

2014-07-01

... 40 Protection of Environment 6 2014-07-01 2014-07-01 false Generation of test atmospheres. 53.22... Characteristics of Automated Methods for SO2, CO, O3, and NO2 § 53.22 Generation of test atmospheres. (a) Table B-2 to subpart B of part 53 specifies preferred methods for generating test atmospheres and suggested...

40 CFR 53.22 - Generation of test atmospheres.

Code of Federal Regulations, 2013 CFR

2013-07-01

... 40 Protection of Environment 6 2013-07-01 2013-07-01 false Generation of test atmospheres. 53.22... Characteristics of Automated Methods for SO2, CO, O3, and NO2 § 53.22 Generation of test atmospheres. (a) Table B-2 to subpart B of part 53 specifies preferred methods for generating test atmospheres and suggested...

30 CFR 77.900-1 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2011 CFR

2011-07-01

... protecting low- and medium-voltage circuits serving portable or mobile three-phase alternating current... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

30 CFR 77.900-1 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

... protecting low- and medium-voltage circuits serving portable or mobile three-phase alternating current... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

30 CFR 75.800 - High-voltage circuits; circuit breakers.

Code of Federal Regulations, 2010 CFR

2010-07-01

... shall be equipped with devices to provide protection against under-voltage grounded phase, short circuit... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. [Statutory Provisions] High-voltage circuits entering...

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 47 Telecommunication 5 2013-10-01 2013-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 47 Telecommunication 5 2012-10-01 2012-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 47 Telecommunication 5 2014-10-01 2014-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 47 Telecommunication 5 2010-10-01 2010-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

30 CFR 77.900-2 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2011 CFR

2011-07-01

... protecting low- and medium-voltage circuits serving three-phase alternating current equipment and such record... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

30 CFR 77.900-2 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2010 CFR

2010-07-01

... protecting low- and medium-voltage circuits serving three-phase alternating current equipment and such record... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

How MAP kinase modules function as robust, yet adaptable, circuits.

PubMed

Tian, Tianhai; Harding, Angus

2014-01-01

Genetic and biochemical studies have revealed that the diversity of cell types and developmental patterns evident within the animal kingdom is generated by a handful of conserved, core modules. Core biological modules must be robust, able to maintain functionality despite perturbations, and yet sufficiently adaptable for random mutations to generate phenotypic variation during evolution. Understanding how robust, adaptable modules have influenced the evolution of eukaryotes will inform both evolutionary and synthetic biology. One such system is the MAP kinase module, which consists of a 3-tiered kinase circuit configuration that has been evolutionarily conserved from yeast to man. MAP kinase signal transduction pathways are used across eukaryotic phyla to drive biological functions that are crucial for life. Here we ask the fundamental question, why do MAPK modules follow a conserved 3-tiered topology rather than some other number? Using computational simulations, we identify a fundamental 2-tiered circuit topology that can be readily reconfigured by feedback loops and scaffolds to generate diverse signal outputs. When this 2-kinase circuit is connected to proximal input kinases, a 3-tiered modular configuration is created that is both robust and adaptable, providing a biological circuit that can regulate multiple phenotypes and maintain functionality in an uncertain world. We propose that the 3-tiered signal transduction module has been conserved through positive selection, because it facilitated the generation of phenotypic variation during eukaryotic evolution.

Universal discrete Fourier optics RF photonic integrated circuit architecture.

PubMed

Hall, Trevor J; Hasan, Mehedi

2016-04-04

This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO_3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

Measuring circuit

DOEpatents

Sun, Shan C.; Chaprnka, Anthony G.

1977-01-11

An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

40 CFR 86.1333-2010 - Transient test cycle generation.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 40 Protection of Environment 19 2010-07-01 2010-07-01 false Transient test cycle generation. 86... (CONTINUED) Emission Regulations for New Otto-Cycle and Diesel Heavy-Duty Engines; Gaseous and Particulate Exhaust Test Procedures § 86.1333-2010 Transient test cycle generation. (a) Generating transient test...

Device, system and method for a sensing electrical circuit

NASA Technical Reports Server (NTRS)

Vranish, John M. (Inventor)

2009-01-01

The invention relates to a driven ground electrical circuit. A driven ground is a current-measuring ground termination to an electrical circuit with the current measured as a vector with amplification. The driven ground module may include an electric potential source V.sub.S driving an electric current through an impedance (load Z) to a driven ground. Voltage from the source V.sub.S excites the minus terminal of an operational amplifier inside the driven ground which, in turn, may react by generating an equal and opposite voltage to drive the net potential to approximately zero (effectively ground). A driven ground may also be a means of passing information via the current passing through one grounded circuit to another electronic circuit as input. It may ground one circuit, amplify the information carried in its current and pass this information on as input to the next circuit.

Analysis Impact of Distributed Generation Injection to Profile of Voltage and Short-Circuit Fault in 20 kV Distribution Network System

NASA Astrophysics Data System (ADS)

Mulyadi, Y.; Sucita, T.; Rahmawan, M. D.

2018-01-01

This study was a case study in PT. PLN (Ltd.) APJ Bandung area with the subject taken was the installation of distributed generation (DG) on 20-kV distribution channels. The purpose of this study is to find out the effect of DG to the changes in voltage profile and three-phase short circuit fault in the 20-kV distribution system with load conditions considered to be balanced. The reason for this research is to know how far DG can improve the voltage profile of the channel and to what degree DG can increase the three-phase short circuit fault on each bus. The method used in this study was comparing the simulation results of power flow and short-circuit fault using ETAP Power System software with manual calculations. The result obtained from the power current simulation before the installation of DG voltage was the drop at the end of the channel at 2.515%. Meanwhile, the three-phase short-circuit current fault before the DG installation at the beginning of the channel was 13.43 kA. After the installation of DG with injection of 50%, DG power obtained voltage drop at the end of the channel was 1.715% and the current fault at the beginning network was 14.05 kA. In addition, with injection of 90%, DG power obtained voltage drop at the end of the channel was 1.06% and the current fault at the beginning network was 14.13%.

Robustness to Faults Promotes Evolvability: Insights from Evolving Digital Circuits

PubMed Central

Nolfi, Stefano

2016-01-01

We demonstrate how the need to cope with operational faults enables evolving circuits to find more fit solutions. The analysis of the results obtained in different experimental conditions indicates that, in absence of faults, evolution tends to select circuits that are small and have low phenotypic variability and evolvability. The need to face operation faults, instead, drives evolution toward the selection of larger circuits that are truly robust with respect to genetic variations and that have a greater level of phenotypic variability and evolvability. Overall our results indicate that the need to cope with operation faults leads to the selection of circuits that have a greater probability to generate better circuits as a result of genetic variation with respect to a control condition in which circuits are not subjected to faults. PMID:27409589

Towards Evolving Electronic Circuits for Autonomous Space Applications

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

2000-01-01

The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.

Model-Driven Test Generation of Distributed Systems

NASA Technical Reports Server (NTRS)

Easwaran, Arvind; Hall, Brendan; Schweiker, Kevin

2012-01-01

This report describes a novel test generation technique for distributed systems. Utilizing formal models and formal verification tools, spe cifically the Symbolic Analysis Laboratory (SAL) tool-suite from SRI, we present techniques to generate concurrent test vectors for distrib uted systems. These are initially explored within an informal test validation context and later extended to achieve full MC/DC coverage of the TTEthernet protocol operating within a system-centric context.

A self-testing dynamic RAM chip

NASA Astrophysics Data System (ADS)

You, Y.; Hayes, J. P.

1985-02-01

A novel approach to making very large dynamic RAM chips self-testing is presented. It is based on two main concepts: on-chip generation of regular test sequences with very high fault coverage, and concurrent testing of storage-cell arrays to reduce overall testing time. The failure modes of a typical 64 K RAM employing one-transistor cells are analyzed to identify their test requirements. A comprehensive test generation algorithm that can be implemented with minimal modification to a standard cell layout is derived. The self-checking peripheral circuits necessary to implement this testing algorithm are described, and the self-testing RAM is briefly evaluated.

Generating Circuit Tests by Exploiting Designed Behavior

DTIC Science & Technology

1988-12-01

is the classic example. ’The primary expert I have talked with is Gordon Robinson of GenRad Inc. I have studied Gor- don’s problem-solving methods on ...Associate Professor of Management Science Thesis Supervisor Accepted by Arthur C. Smith, Chairman Committee on Graduate StudentsOTIC ~M2 7 Un7 ON ...STATEMENT (of tie abstract entered In Block 20, It different fre Report) IS. SUPPLEMENTARY NOTES None 19. KEY WORDS (Continue on reverse aide it

A TRMM/GPM retrieval of the total mean generator current for the global electric circuit

NASA Astrophysics Data System (ADS)

Peterson, Michael; Deierling, Wiebke; Liu, Chuntao; Mach, Douglas; Kalb, Christina

2017-09-01

A specialized satellite version of the passive microwave electric field retrieval algorithm (Peterson et al., 2015) is applied to observations from the Tropical Rainfall Measuring Mission (TRMM) and Global Precipitation Measurement (GPM) satellites to estimate the generator current for the Global Electric Circuit (GEC) and compute its temporal variability. By integrating retrieved Wilson currents from electrified clouds across the globe, we estimate a total mean current of between 1.4 kA (assuming the 7% fraction of electrified clouds producing downward currents measured by the ER-2 is representative) to 1.6 kA (assuming all electrified clouds contribute to the GEC). These current estimates come from all types of convective weather without preference, including Electrified Shower Clouds (ESCs). The diurnal distribution of the retrieved generator current is in excellent agreement with the Carnegie curve (RMS difference: 1.7%). The temporal variability of the total mean generator current ranges from 110% on semi-annual timescales (29% on an annual timescale) to 7.5% on decadal timescales with notable responses to the Madden-Julian Oscillation and El Nino Southern Oscillation. The geographical distribution of current includes significant contributions from oceanic regions in addition to the land-based tropical chimneys. The relative importance of the Americas and Asia chimneys compared to Africa is consistent with the best modern ground-based observations and further highlights the importance of ESCs for the GEC.

Basic dynamics from a pulse-coupled network of autonomous integrate-and-fire chaotic circuits.

PubMed

Nakano, H; Saito, T

2002-01-01

This paper studies basic dynamics from a novel pulse-coupled network (PCN). The unit element of the PCN is an integrate-and-fire circuit (IFC) that exhibits chaos. We an give an iff condition for the chaos generation. Using two IFC, we construct a master-slave PCN. It exhibits interesting chaos synchronous phenomena and their breakdown phenomena. We give basic classification of the phenomena and their existence regions can be elucidated in the parameter space. We then construct a ring-type PCN and elucidate that the PCN exhibits interesting grouping phenomena based on the chaos synchronization patterns. Using a simple test circuit, some of typical phenomena can be verified in the laboratory.

30 CFR 77.800 - High-voltage circuits; circuit breakers.

Code of Federal Regulations, 2010 CFR

2010-07-01

... devices to provide protection against under voltage, grounded phase, short circuit and overcurrent. High... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High...

Architecture of enteric neural circuits involved in intestinal motility.

PubMed

Costa, M; Brookes, S H

2008-08-01

This short review describes the conceptual development in the search for the enteric neural circuits with the initial identifications of the classes of enteric neurons on the bases of their morphology, neurochemistry, biophysical properties, projections and connectivity. The discovery of the presence of multiple neurochemicals in the same nerve cells in specific combinations led to the concept of "chemical coding" and of "plurichemical transmission". The proposal that enteric reflexes are largely responsible for the propulsion of contents led to investigations of polarised reflex pathways and how these may be activated to generate the coordinated propulsive behaviour of the intestine. The research over the past decades attempted to integrate information of chemical neuroanatomy with functional studies, with the development of methods combining anatomical, functional and pharmacological techniques. This multidisciplinary strategy led to a full accounting of all functional classes of enteric neurons in the guinea-pig, and advanced wiring diagrams of the enteric neural circuits have been proposed. In parallel, investigations of the actual behaviour of the intestine during physiological motor activity have advanced with the development of spatio-temporal analysis from video recordings. The relation between neural pathways, their activities and the generation of patterns of motor activity remain largely unexplained. The enteric neural circuits appear not set in rigid programs but respond to different physico-chemical contents in an adaptable way (neuromechanical hypothesis). The generation of the complex repertoire of motor patterns results from the interplay of myogenic and neuromechanical mechanisms with spontaneous generation of migratory motor activity by enteric circuits.

Triboelectric generators and sensors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Zhong Lin; Wang, Sihong; Zhu, Guang

2017-10-17

A triboelectric power system includes a triboelectric generator, a rechargeable energy storage unit and a power management circuit. The rechargeable energy storage unit is associated to the triboelectric generator. The power management circuit is configured to receive an input current from the triboelectric generator and to deliver an output current corresponding to the input current to the rechargeable battery so that the output current has a current direction and a voltage that will recharge the rechargeable battery.

Project Circuits in a Basic Electric Circuits Course

ERIC Educational Resources Information Center

Becker, James P.; Plumb, Carolyn; Revia, Richard A.

2014-01-01

The use of project circuits (a photoplethysmograph circuit and a simple audio amplifier), introduced in a sophomore-level electric circuits course utilizing active learning and inquiry-based methods, is described. The development of the project circuits was initiated to promote enhanced engagement and deeper understanding of course content among…

F-1 Gas Generator test

NASA Image and Video Library

2015-09-03

THE GAS GENERATOR TO AN F-1 ENGINE, THE MOST POWERFUL ROCKET ENGINE EVER BUILT, IS TEST-FIRED AT NASA'S MARSHALL SPACE FLIGHT CENTER IN HUNTSVILLE, ALABAMA, ON SEPT. 3. ALTHOUGH THE ENGINE WAS ORIGINALLY BUILT TO POWER THE SATURN V ROCKETS DURING AMERICA'S MISSIONS TO THE MOON, THIS TEST ARTICLE HAD NEW PARTS CREATED USING ADDITIVE MANUFACTURING, OR 3-D PRINTING, TO TEST THE VIABILITY OF THE TECHNOLOGY FOR BUILDING NEW ENGINE DESIGNS.

Electronic circuits

NASA Technical Reports Server (NTRS)

1976-01-01

Twenty-nine circuits and circuit techniques developed for communications and instrumentation technology are described. Topics include pulse-code modulation, phase-locked loops, data coding, data recording, detection circuits, logic circuits, oscillators, and amplifiers.

Multimodal chemosensory circuits controlling male courtship in Drosophila

PubMed Central

Clowney, E. Josephine; Iguchi, Shinya; Bussell, Jennifer J.; Scheer, Elias; Ruta, Vanessa

2015-01-01

Summary Throughout the animal kingdom, internal states generate long-lasting and self-perpetuating chains of behavior. In Drosophila, males instinctively pursue females with a lengthy and elaborate courtship ritual triggered by activation of sexually dimorphic P1 interneurons. Gustatory pheromones are thought to activate P1 neurons but the circuit mechanisms that dictate their sensory responses to gate entry into courtship remain unknown. Here, we use circuit mapping and in vivo functional imaging techniques to trace gustatory and olfactory pheromone circuits to their point of convergence onto P1 neurons and reveal how their combined input underlies selective tuning to appropriate sexual partners. We identify inhibition, even in response to courtship-promoting pheromones, as a key circuit element that tunes and tempers P1 neuron activity. Our results suggest a circuit mechanism in which balanced excitation and inhibition underlie discrimination of prospective mates and stringently regulate the transition to courtship in Drosophila. PMID:26279475

Computer-Aided Design of Low-Noise Microwave Circuits

NASA Astrophysics Data System (ADS)

Wedge, Scott William

1991-02-01

Devoid of most natural and manmade noise, microwave frequencies have detection sensitivities limited by internally generated receiver noise. Low-noise amplifiers are therefore critical components in radio astronomical antennas, communications links, radar systems, and even home satellite dishes. A general technique to accurately predict the noise performance of microwave circuits has been lacking. Current noise analysis methods have been limited to specific circuit topologies or neglect correlation, a strong effect in microwave devices. Presented here are generalized methods, developed for computer-aided design implementation, for the analysis of linear noisy microwave circuits comprised of arbitrarily interconnected components. Included are descriptions of efficient algorithms for the simultaneous analysis of noisy and deterministic circuit parameters based on a wave variable approach. The methods are therefore particularly suited to microwave and millimeter-wave circuits. Noise contributions from lossy passive components and active components with electronic noise are considered. Also presented is a new technique for the measurement of device noise characteristics that offers several advantages over current measurement methods.

Multimodal Chemosensory Circuits Controlling Male Courtship in Drosophila.

PubMed

Clowney, E Josephine; Iguchi, Shinya; Bussell, Jennifer J; Scheer, Elias; Ruta, Vanessa

2015-09-02

Throughout the animal kingdom, internal states generate long-lasting and self-perpetuating chains of behavior. In Drosophila, males instinctively pursue females with a lengthy and elaborate courtship ritual triggered by activation of sexually dimorphic P1 interneurons. Gustatory pheromones are thought to activate P1 neurons but the circuit mechanisms that dictate their sensory responses to gate entry into courtship remain unknown. Here, we use circuit mapping and in vivo functional imaging techniques to trace gustatory and olfactory pheromone circuits to their point of convergence onto P1 neurons and reveal how their combined input underlies selective tuning to appropriate sexual partners. We identify inhibition, even in response to courtship-promoting pheromones, as a key circuit element that tunes and tempers P1 neuron activity. Our results suggest a circuit mechanism in which balanced excitation and inhibition underlie discrimination of prospective mates and stringently regulate the transition to courtship in Drosophila. Copyright © 2015 Elsevier Inc. All rights reserved.

Variability-aware compact modeling and statistical circuit validation on SRAM test array

NASA Astrophysics Data System (ADS)

Qiao, Ying; Spanos, Costas J.

2016-03-01

Variability modeling at the compact transistor model level can enable statistically optimized designs in view of limitations imposed by the fabrication technology. In this work we propose a variability-aware compact model characterization methodology based on stepwise parameter selection. Transistor I-V measurements are obtained from bit transistor accessible SRAM test array fabricated using a collaborating foundry's 28nm FDSOI technology. Our in-house customized Monte Carlo simulation bench can incorporate these statistical compact models; and simulation results on SRAM writability performance are very close to measurements in distribution estimation. Our proposed statistical compact model parameter extraction methodology also has the potential of predicting non-Gaussian behavior in statistical circuit performances through mixtures of Gaussian distributions.

40 CFR 53.22 - Generation of test atmospheres.

Code of Federal Regulations, 2010 CFR

2010-07-01

... test concentration shall be verified. (b) The test atmosphere delivery system shall be designed and... 40 Protection of Environment 5 2010-07-01 2010-07-01 false Generation of test atmospheres. 53.22... Characteristics of Automated Methods SO2, CO, O3, and NO2 § 53.22 Generation of test atmospheres. (a) Table B-2...

40 CFR 53.22 - Generation of test atmospheres.

Code of Federal Regulations, 2011 CFR

2011-07-01

... test concentration shall be verified. (b) The test atmosphere delivery system shall be designed and... 40 Protection of Environment 5 2011-07-01 2011-07-01 false Generation of test atmospheres. 53.22... Characteristics of Automated Methods SO2, CO, O3, and NO2 § 53.22 Generation of test atmospheres. (a) Table B-2...

Simple Cell Balance Circuit

NASA Technical Reports Server (NTRS)

Johnson, Steven D.; Byers, Jerry W.; Martin, James A.

2012-01-01

A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

Developing 300°C Ceramic Circuit Boards

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normann, Randy A

2015-02-15

This paper covers the development of a geothermal ceramic circuit board technology using 3D traces in a machinable ceramic. Test results showing the circuit board to be operational to at least 550°C. Discussion on producing this type of board is outlined along with areas needing improvement.

Waveform generation in the EETS

NASA Astrophysics Data System (ADS)

Wilshire, J. P.

1985-05-01

Design decisions and analysis for the waveform generation portion of an electrical equipment test set are discussed. This test set is unlike conventional ATE in that it is portable and designed to operate in forward area sites for the USMC. It is also unique in that it provides for functional testing for 32 electronic units from the AV-88 Harrier II aircraft. Specific requirements for the waveform generator are discussed, including a wide frequency range, high resolution and accuracy, and low total harmonic distortion. Several approaches to meet these requirements are considered and a specific concept is presented in detail, which consists of a digitally produced waveform that feeds a deglitched analog conversion circuit. Rigorous mathematical analysis is presented to prove that this concept meets the requirements. Finally, design alternatives and enhancements are considered.

How MAP kinase modules function as robust, yet adaptable, circuits

PubMed Central

Tian, Tianhai; Harding, Angus

2014-01-01

Genetic and biochemical studies have revealed that the diversity of cell types and developmental patterns evident within the animal kingdom is generated by a handful of conserved, core modules. Core biological modules must be robust, able to maintain functionality despite perturbations, and yet sufficiently adaptable for random mutations to generate phenotypic variation during evolution. Understanding how robust, adaptable modules have influenced the evolution of eukaryotes will inform both evolutionary and synthetic biology. One such system is the MAP kinase module, which consists of a 3-tiered kinase circuit configuration that has been evolutionarily conserved from yeast to man. MAP kinase signal transduction pathways are used across eukaryotic phyla to drive biological functions that are crucial for life. Here we ask the fundamental question, why do MAPK modules follow a conserved 3-tiered topology rather than some other number? Using computational simulations, we identify a fundamental 2-tiered circuit topology that can be readily reconfigured by feedback loops and scaffolds to generate diverse signal outputs. When this 2-kinase circuit is connected to proximal input kinases, a 3-tiered modular configuration is created that is both robust and adaptable, providing a biological circuit that can regulate multiple phenotypes and maintain functionality in an uncertain world. We propose that the 3-tiered signal transduction module has been conserved through positive selection, because it facilitated the generation of phenotypic variation during eukaryotic evolution. PMID:25483189

Integrated testing system FiTest for diagnosis of PCBA

NASA Astrophysics Data System (ADS)

Bogdan, Arkadiusz; Lesniak, Adam

2016-12-01

This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

Generating Test Templates via Automated Theorem Proving

NASA Technical Reports Server (NTRS)

Kancherla, Mani Prasad

1997-01-01

Testing can be used during the software development process to maintain fidelity between evolving specifications, program designs, and code implementations. We use a form of specification-based testing that employs the use of an automated theorem prover to generate test templates. A similar approach was developed using a model checker on state-intensive systems. This method applies to systems with functional rather than state-based behaviors. This approach allows for the use of incomplete specifications to aid in generation of tests for potential failure cases. We illustrate the technique on the cannonical triangle testing problem and discuss its use on analysis of a spacecraft scheduling system.

Sleep Drive Is Encoded by Neural Plastic Changes in a Dedicated Circuit.

PubMed

Liu, Sha; Liu, Qili; Tabuchi, Masashi; Wu, Mark N

2016-06-02

Prolonged wakefulness leads to an increased pressure for sleep, but how this homeostatic drive is generated and subsequently persists is unclear. Here, from a neural circuit screen in Drosophila, we identify a subset of ellipsoid body (EB) neurons whose activation generates sleep drive. Patch-clamp analysis indicates these EB neurons are highly sensitive to sleep loss, switching from spiking to burst-firing modes. Functional imaging and translational profiling experiments reveal that elevated sleep need triggers reversible increases in cytosolic Ca(2+) levels, NMDA receptor expression, and structural markers of synaptic strength, suggesting these EB neurons undergo "sleep-need"-dependent plasticity. Strikingly, the synaptic plasticity of these EB neurons is both necessary and sufficient for generating sleep drive, indicating that sleep pressure is encoded by plastic changes within this circuit. These studies define an integrator circuit for sleep homeostasis and provide a mechanism explaining the generation and persistence of sleep drive. Copyright © 2016 Elsevier Inc. All rights reserved.

Internal short circuit and accelerated rate calorimetry tests of lithium-ion cells: Considerations for methane-air intrinsic safety and explosion proof/flameproof protection methods.

PubMed

Dubaniewicz, Thomas H; DuCarme, Joseph P

2016-09-01

Researchers with the National Institute for Occupational Safety and Health (NIOSH) studied the potential for lithium-ion cell thermal runaway from an internal short circuit in equipment for use in underground coal mines. In this third phase of the study, researchers compared plastic wedge crush-induced internal short circuit tests of selected lithium-ion cells within methane (CH 4 )-air mixtures with accelerated rate calorimetry tests of similar cells. Plastic wedge crush test results with metal oxide lithium-ion cells extracted from intrinsically safe evaluated equipment were mixed, with one cell model igniting the chamber atmosphere while another cell model did not. The two cells models exhibited different internal short circuit behaviors. A lithium iron phosphate (LiFePO 4 ) cell model was tolerant to crush-induced internal short circuits within CH 4 -air, tested under manufacturer recommended charging conditions. Accelerating rate calorimetry tests with similar cells within a nitrogen purged 353-mL chamber produced ignitions that exceeded explosion proof and flameproof enclosure minimum internal pressure design criteria. Ignition pressures within a 20-L chamber with 6.5% CH 4 -air were relatively low, with much larger head space volume and less adiabatic test conditions. The literature indicates that sizeable lithium thionyl chloride (LiSOCl 2 ) primary (non rechargeable) cell ignitions can be especially violent and toxic. Because ignition of an explosive atmosphere is expected within explosion proof or flameproof enclosures, there is a need to consider the potential for an internal explosive atmosphere ignition in combination with a lithium or lithium-ion battery thermal runaway process, and the resulting effects on the enclosure.

From synapses to behavior: development of a sensory-motor circuit in the leech.

PubMed

Marin-Burgin, Antonia; Kristan, William B; French, Kathleen A

2008-05-01

The development of neuronal circuits has been advanced greatly by the use of imaging techniques that reveal the activity of neurons during the period when they are constructing synapses and forming circuits. This review focuses on experiments performed in leech embryos to characterize the development of a neuronal circuit that produces a simple segmental behavior called "local bending." The experiments combined electrophysiology, anatomy, and FRET-based voltage-sensitive dyes (VSDs). The VSDs offered two major advantages in these experiments: they allowed us to record simultaneously the activity of many neurons, and unlike other imaging techniques, they revealed inhibition as well as excitation. The results indicated that connections within the circuit are formed in a predictable sequence: initially neurons in the circuit are connected by electrical synapses, forming a network that itself generates an embryonic behavior and prefigures the adult circuit; later chemical synapses, including inhibitory connections, appear, "sculpting" the circuit to generate a different, mature behavior. In this developmental process, some of the electrical connections are completely replaced by chemical synapses, others are maintained into adulthood, and still others persist and share their targets with chemical synaptic connections.

Creating single-copy genetic circuits

PubMed Central

Lee, Jeong Wook; Gyorgy, Andras; Cameron, D. Ewen; Pyenson, Nora; Choi, Kyeong Rok; Way, Jeffrey C.; Silver, Pamela A.; Del Vecchio, Domitilla; Collins, James J.

2017-01-01

SUMMARY Synthetic biology is increasingly used to develop sophisticated living devices for basic and applied research. Many of these genetic devices are engineered using multi-copy plasmids, but as the field progresses from proof-of-principle demonstrations to practical applications, it is important to develop single-copy synthetic modules that minimize consumption of cellular resources and can be stably maintained as genomic integrants. Here we use empirical design, mathematical modeling and iterative construction and testing to build single-copy, bistable toggle switches with improved performance and reduced metabolic load that can be stably integrated into the host genome. Deterministic and stochastic models led us to focus on basal transcription to optimize circuit performance and helped to explain the resulting circuit robustness across a large range of component expression levels. The design parameters developed here provide important guidance for future efforts to convert functional multi-copy gene circuits into optimized single-copy circuits for practical, real-world use. PMID:27425413

Algorithms and architecture for multiprocessor based circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deutsch, J.T.

Accurate electrical simulation is critical to the design of high performance integrated circuits. Logic simulators can verify function and give first-order timing information. Switch level simulators are more effective at dealing with charge sharing than standard logic simulators, but cannot provide accurate timing information or discover DC problems. Delay estimation techniques and cell level simulation can be used in constrained design methods, but must be tuned for each application, and circuit simulation must still be used to generate the cell models. None of these methods has the guaranteed accuracy that many circuit designers desire, and none can provide detailed waveformmore » information. Detailed electrical-level simulation can predict circuit performance if devices and parasitics are modeled accurately. However, the computational requirements of conventional circuit simulators make it impractical to simulate current large circuits. In this dissertation, the implementation of Iterated Timing Analysis (ITA), a relaxation-based technique for accurate circuit simulation, on a special-purpose multiprocessor is presented. The ITA method is an SOR-Newton, relaxation-based method which uses event-driven analysis and selective trace to exploit the temporal sparsity of the electrical network. Because event-driven selective trace techniques are employed, this algorithm lends itself to implementation on a data-driven computer.« less

Circuits Protect Against Incorrect Power Connections

NASA Technical Reports Server (NTRS)

Delombard, Richard

1992-01-01

Simple circuits prevent application of incorrectly polarized or excessive voltages. Connected temporarily or permanently at power-connecting terminals. Devised to protect electrical and electronic equipment installed in spacecraft and subjected to variety of tests in different facilities prior to installation. Basic concept of protective circuits also applied easily to many kinds of electrical and electronic equipment that must be protected against incorrect power connections.

Mechanisms of Left-Right Coordination in Mammalian Locomotor Pattern Generation Circuits: A Mathematical Modeling View

PubMed Central

Talpalar, Adolfo E.; Rybak, Ilya A.

2015-01-01

The locomotor gait in limbed animals is defined by the left-right leg coordination and locomotor speed. Coordination between left and right neural activities in the spinal cord controlling left and right legs is provided by commissural interneurons (CINs). Several CIN types have been genetically identified, including the excitatory V3 and excitatory and inhibitory V0 types. Recent studies demonstrated that genetic elimination of all V0 CINs caused switching from a normal left-right alternating activity to a left-right synchronized “hopping” pattern. Furthermore, ablation of only the inhibitory V0 CINs (V0D subtype) resulted in a lack of left-right alternation at low locomotor frequencies and retaining this alternation at high frequencies, whereas selective ablation of the excitatory V0 neurons (V0V subtype) maintained the left–right alternation at low frequencies and switched to a hopping pattern at high frequencies. To analyze these findings, we developed a simplified mathematical model of neural circuits consisting of four pacemaker neurons representing left and right, flexor and extensor rhythm-generating centers interacting via commissural pathways representing V3, V0D, and V0V CINs. The locomotor frequency was controlled by a parameter defining the excitation of neurons and commissural pathways mimicking the effects of N-methyl-D-aspartate on locomotor frequency in isolated rodent spinal cord preparations. The model demonstrated a typical left-right alternating pattern under control conditions, switching to a hopping activity at any frequency after removing both V0 connections, a synchronized pattern at low frequencies with alternation at high frequencies after removing only V0D connections, and an alternating pattern at low frequencies with hopping at high frequencies after removing only V0V connections. We used bifurcation theory and fast-slow decomposition methods to analyze network behavior in the above regimes and transitions between them. The model

Theory of nonclassical photonic states in driven-dissipative circuit quantum electrodynamics

NASA Astrophysics Data System (ADS)

Elliott, Matthew

Superconducting circuits provide an architecture upon which cavity quantum electrodynamics (QED) can be implemented at microwave frequencies in a highly tunable environment. Known as circuit QED, these systems can achieve larger nonlinearities, stronger coupling and greater controllability than can be achieved in cavity QED, all in a customisable, solid state device, making this technology an exciting test bed for both quantum optics and quantum information processing. These new parameter regimes open up new avenues for quantum technology, while also allowing older quantum optics results to finally be tested. In particular is is now possible to experimentally produce nonclassical states, such as squeezed and Schrodinger cat states, relatively simply in these devices. Using open quantum systems methods, in this thesis we investigate four problems which involve the use of nonclassical states in circuit QED. First we investigate the effects of a Kerr nonlinearity on the ability to preserve transported squeezed states in a superconducting cavity, and whether this setup permits us to generate, and perform tomography, of a highly squeezed field using a qubit, with possible applications in the characterisation of sources of squeezed microwaves. Second, we present a novel scheme for the amplification of cat states using a coupled qubit and external microwave drives, inspired by the stimulated Raman adiabatic passage. This scheme differs from similar techniques in circuit QED in that it is deterministic and therefore compatible with a protocol for stabilising cat states without the need for complex dissipation engineering. Next we use solutions of Fokker-Planck equations to study the exact steady-state response of two nonlinear systems: a transmon qubit coupled to a readout resonator, where we find good agreement with experiments and see simultaneous bistability of the cavity and transmon; and a parametrically driven nonlinear resonator, where we compare the classical and

Formalization, equivalence and generalization of basic resonance electrical circuits

NASA Astrophysics Data System (ADS)

Penev, Dimitar; Arnaudov, Dimitar; Hinov, Nikolay

2017-12-01

In the work are presented basic resonance circuits, which are used in resonance energy converters. The following resonant circuits are considered: serial, serial with parallel load parallel capacitor, parallel and parallel with serial loaded inductance. For the circuits under consideration, expressions are generated for the frequencies of own oscillations and for the equivalence of the active power emitted in the load. Mathematical expressions are graphically constructed and verified using computer simulations. The results obtained are used in the model based design of resonant energy converters with DC or AC output. This guaranteed the output indicators of power electronic devices.

Compact fluid cooled power converter supporting multiple circuit boards

DOEpatents

Radosevich, Lawrence D.; Meyer, Andreas A.; Beihoff, Bruce C.; Kannenberg, Daniel G.

2005-03-08

A support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support, in conjunction with other packaging features may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

RF lockout circuit for electronic locking system

NASA Astrophysics Data System (ADS)

Becker, Earl M., Jr.; Miller, Allen

1991-02-01

An electronics lockout circuit was invented that includes an antenna adapted to receive radio frequency signals from a transmitter, and a radio frequency detector circuit which converts the radio frequency signals into a first direct current voltage indicative of the relative strength of the field resulting from the radio frequency signals. The first direct current voltage is supplied to a trigger circuit which compares this direct current voltage to an adjustable direct current reference voltage. This provides a second direct current voltage at the output whenever the amplitude of the first direct current voltage exceeds the amplitude of the reference voltage provided by the comparator circuit. This is supplied to a disconnect relay circuit which, upon receiving a signal from the electronic control unit of an electronic combination lock during the time period at which the second direct current voltage is present, isolates the door strike coil of a security door from the electronic control unit. This prevents signals falsely generated by the electronic control unit because of radio frequency signals in the vicinity of the electronic control unit energizing the door strike coil and accidentally opening a security door.

Multifunction waveform generator for EM receiver testing

NASA Astrophysics Data System (ADS)

Chen, Kai; Jin, Sheng; Deng, Ming

2018-01-01

In many electromagnetic (EM) methods - such as magnetotelluric, spectral-induced polarization (SIP), time-domain-induced polarization (TDIP), and controlled-source audio magnetotelluric (CSAMT) methods - it is important to evaluate and test the EM receivers during their development stage. To assess the performance of the developed EM receivers, controlled synthetic data that simulate the observed signals in different modes are required. In CSAMT and SIP mode testing, the waveform generator should use the GPS time as the reference for repeating schedule. Based on our testing, the frequency range, frequency precision, and time synchronization of the currently available function waveform generators on the market are deficient. This paper presents a multifunction waveform generator with three waveforms: (1) a wideband, low-noise electromagnetic field signal to be used for magnetotelluric, audio-magnetotelluric, and long-period magnetotelluric studies; (2) a repeating frequency sweep square waveform for CSAMT and SIP studies; and (3) a positive-zero-negative-zero signal that contains primary and secondary fields for TDIP studies. In this paper, we provide the principles of the above three waveforms along with a hardware design for the generator. Furthermore, testing of the EM receiver was conducted with the waveform generator, and the results of the experiment were compared with those calculated from the simulation and theory in the frequency band of interest.

High temperature circuit breaker

NASA Technical Reports Server (NTRS)

Edwards, R. N.; Travis, E. F.

1970-01-01

Alternating current circuit breaker is suitable for reliable long-term service at 1000 deg F in the vacuum conditions of outer space. Construction materials are resistant to nuclear radiation and vacuum welding. Service test conditions and results are given.

Eddy-current system for the vibration-testing of blades

DOEpatents

Jacobs, Martin E.

1977-01-01

This invention is an improved system for the vibration-testing of cantilevered non-ferrous articles by inducing eddy currents therein. The principal advantage of the system is that relatively little heat is generated in the article being vibrated. Thus, a more accurate measurement of the fatigue characteristics of the article is obtained. Furthermore, the generation of relatively little heat in the blade permits tests to be conducted in low-pressure atmospheres simulating certain actual processes environments. Heat-generation in the vibrated article is minimized by utilizing eddy currents which are generated by an electromagnet whose magnetic field varies but does not change polarity. The typical winding for the electromagnet is excited with pulsating d.c. That is, the winding is alternately charged by connecting it across a d.c. power supply and then discharged by connecting it across a circuit for receiving current generated in the winding by self-induction. Preferably, the discharge circuit is designed so that the waveform of the discharging current approximates that of the charging current.

Implementing quantum optics with parametrically driven superconducting circuits

NASA Astrophysics Data System (ADS)

Aumentado, Jose

Parametric coupling has received much attention, in part because it forms the core of many low-noise amplifiers in superconducting quantum information experiments. However, parametric coupling in superconducting circuits is, as a general rule, simple to generate and forms the basis of a methodology for interacting microwave fields at different frequencies. In the quantum regime, this has important consequences, allowing relative novices to do experiments in superconducting circuits today that were previously heroic efforts in quantum optics and cavity-QED. In this talk, I'll give an overview of some of our work demonstrating parametric coupling within the context of circuit-QED as well as some of the possibilities this concept creates in our field.

Method of preforming and assembling superconducting circuit elements

NASA Astrophysics Data System (ADS)

Haertling, Gene H.; Buckley, John D.

1991-03-01

The invention is a method of preforming and pretesting rigid and discrete superconductor circuit elements to optimize the superconductivity development of the preformed circuit element prior to its assembly, and encapsulation on a substrate and final environmental testing of the assembled ceramic superconductive elements.

VARIABLE TIME-INTERVAL GENERATOR

DOEpatents

Gross, J.E.

1959-10-31

This patent relates to a pulse generator and more particularly to a time interval generator wherein the time interval between pulses is precisely determined. The variable time generator comprises two oscillators with one having a variable frequency output and the other a fixed frequency output. A frequency divider is connected to the variable oscillator for dividing its frequency by a selected factor and a counter is used for counting the periods of the fixed oscillator occurring during a cycle of the divided frequency of the variable oscillator. This defines the period of the variable oscillator in terms of that of the fixed oscillator. A circuit is provided for selecting as a time interval a predetermined number of periods of the variable oscillator. The output of the generator consists of a first pulse produced by a trigger circuit at the start of the time interval and a second pulse marking the end of the time interval produced by the same trigger circuit.

Cancellation Circuit for Transmit-Receive Isolation

DTIC Science & Technology

2010-09-01

non -ideal hardware, and the performance of the circuit is limited. One of the major problems is the leakage from the circulator. The leakage disrupts...cancellation circuit was investigated by a series of simulations using Agilent ADS (Agilent Advanced Design System), and hardware tests were conducted to...developed in the WDDPA application, allowing coherent processing of the data from all elements. There are limitations encountered due to non -ideal

A mobile test facility based on a magnetic cumulative generator to study the stability of the power plants under impact of lightning currents

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shurupov, A. V.; Zavalova, V. E., E-mail: zavalova@fites.ru; Kozlov, A. V.

The report presents the results of the development and field testing of a mobile test facility based on a helical magnetic cumulative generator (MCGTF). The system is designed for full-scale modeling of lightning currents to study the safety of power plants of any type, including nuclear power plants. Advanced technologies of high-energy physics for solving both engineering and applied problems underlie this pilot project. The energy from the magnetic cumulative generator (MCG) is transferred to a high-impedance load with high efficiency of more than 50% using pulse transformer coupling. Modeling of the dynamics of the MEG that operates in amore » circuit with lumped parameters allows one to apply the law of inductance output during operation of the MCG, thus providing the required front of the current pulse in the load without using any switches. The results of field testing of the MCGTF are presented for both the ground loop and the model load. The ground loop generates a load resistance of 2–4 Ω. In the tests, the ohmic resistance of the model load is 10 Ω. It is shown that the current pulse parameters recorded in the resistive-inductive load are close to the calculated values.« less

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2015-01-01

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype ICs with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3-and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient.

Driver Circuit For High-Power MOSFET's

NASA Technical Reports Server (NTRS)

Letzer, Kevin A.

1991-01-01

Driver circuit generates rapid-voltage-transition pulses needed to switch high-power metal oxide/semiconductor field-effect transistor (MOSFET) modules rapidly between full "on" and full "off". Rapid switching reduces time of overlap between appreciable current through and appreciable voltage across such modules, thereby increasing power efficiency.

Broad Beam and Ion Microprobe Studies of Single-Event Upsets in High Speed 0.18micron Silicon Germanium Heterojunction Bipolar Transistors and Circuits

NASA Technical Reports Server (NTRS)

Reed, Robert A.; Marshall, Paul W.; Pickel, Jim; Carts, Martin A.; Irwin, TIm; Niu, Guofu; Cressler, John; Krithivasan, Ramkumar; Fritz, Karl; Riggs, Pam

2003-01-01

SiGe based technology is widely recognized for its tremendous potential to impact the high speed microelectronic industry, and therefore the space industry, by monolithic incorporation of low power complementary logic with extremely high speed SiGe Heterojunction Bipolar Transistor (HBT) logic. A variety of studies have examined the ionizing dose, displacement damage and single event characteristics, and are reported. Accessibility to SiGe through an increasing number of manufacturers adds to the importance of understanding its intrinsic radiation characteristics, and in particular the single event effect (SEE) characteristics of the high bandwidth HBT based circuits. IBM is now manufacturing in its 3rd generation of their commercial SiGe processes, and access is currently available to the first two generations (known as and 6HP) through the MOSIS shared mask services with anticipated future release of the latest (7HP) process. The 5 HP process is described and is characterized by a emitter spacing of 0.5 micron and a cutoff frequency ff of 50 GHz, whereas the fully scaled 7HP HBT employs a 0.18 micron emitter and has an fT of 120 GHz. Previous investigations have the examined SEE response of 5 HP HBT circuits through both circuit testing and modeling. Charge collection modeling studies in the 5 H P process have also been conducted, but to date no measurements have been reported of charge collection in any SiGe HBT structures. Nor have circuit models for charge collection been developed in any version other than the 5 HP HBT structure. Our investigation reports the first indications of both charge collection and circuit response in IBM s 7HP-based SiGe process. We compare broad beam heavy ion SEU test results in a fully function Pseudo-Random Number (PRN) sequence generator up to frequencies of 12 Gbps versus effective LET, and also report proton test results in the same circuit. In addition, we examine the charge collection characteristics of individual 7HP HBT

Mechanically Flexible and High-Performance CMOS Logic Circuits.

PubMed

Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

2015-10-13

Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal-oxide-semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices.

Integrated Circuit Immunity

NASA Technical Reports Server (NTRS)

Sketoe, J. G.; Clark, Anthony

2000-01-01

This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.

Random number generators tested on quantum Monte Carlo simulations.

PubMed

Hongo, Kenta; Maezono, Ryo; Miura, Kenichi

2010-08-01

We have tested and compared several (pseudo) random number generators (RNGs) applied to a practical application, ground state energy calculations of molecules using variational and diffusion Monte Carlo metheds. A new multiple recursive generator with 8th-order recursion (MRG8) and the Mersenne twister generator (MT19937) are tested and compared with the RANLUX generator with five luxury levels (RANLUX-[0-4]). Both MRG8 and MT19937 are proven to give the same total energy as that evaluated with RANLUX-4 (highest luxury level) within the statistical error bars with less computational cost to generate the sequence. We also tested the notorious implementation of linear congruential generator (LCG), RANDU, for comparison. (c) 2010 Wiley Periodicals, Inc.

Secondary School Students' Misconceptions about Simple Electric Circuits

ERIC Educational Resources Information Center

Küçüközer, Hüseyin; Kocakülah, Sabri

2007-01-01

The aim of this study is to reveal secondary school students' misconceptions about simple electric circuits and to define whether specific misconceptions peculiar to Turkish students exist within those identified. Data were obtained with a conceptual understanding test for simple electric circuits and semi-structured interviews. Conceptual…

A nickel-cadmium battery reconditioning circuit

NASA Technical Reports Server (NTRS)

Lanier, R.

1977-01-01

The circuit presented is simple and small enough to be included in a typical battery charge/power control assembly, yet provides the advantage of a complete ground-type battery reconditioning discharge. Test results on the circuit when used to recondition two 24 cell, 20 A-h nickel-cadmium batteries are given. These results show that a battery reconditioned with this circuit returns to greater than 90 percent of its original capacity (greater than nameplate capacity) and follows a typical new battery degradation curve even after over 20,000 simulated orbital cycles for a 4 year period. Applications of the circuit are considered along with recommendations relative to its use. Its application in low voltage (22 to 36 Vdc) power systems and in high voltage (100 to 150 Vdc) power systems is discussed. The implications are that the high voltage systems have a greater need for battery reconditioning than their low voltage counterparts, and that using these circuit techniques, the expected life of a battery in low Earth orbit can be up to 5 years.

INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Efficient One-Step Generation of Cluster State with Charge Qubits in Circuit QED

NASA Astrophysics Data System (ADS)

Wang, Yi-Min; Li, Cheng-Zu

2010-01-01

We propose theoretical schemes to generate highly entangled cluster state with superconducting qubits in a circuit QED architecture. Charge qubits are located inside a superconducting transmission line, which serves as a quantum data bus. We show that large clusters state can be efficiently generated in just one step with the long-range Ising-like unitary operators. The quantum operations which are generally realized by two coupling mechanisms: either voltage coupling or current coupling, depend only on global geometric features and are insensitive not only to the thermal state of the transmission line but also to certain random operation errors. Thus high-fidelity one-way quantum computation can be achieved.

GaAs circuits for monolithic optical controller

NASA Technical Reports Server (NTRS)

Gustafson, G.; Bendett, M.; Carney, J.; Mactaggart, R.; Palmquist, S.

1988-01-01

GaAs circuits for use in a fully monolithic 1 Gb/s optical controller have been developed and tested. The circuits include photodetectors, transimpedance amplifiers and 1:16 demultiplexers that can directly control the phase of MMIC phase shifters. The entire chip contains approximately 300 self-aligned gate E/D-mode MESFETs. The MESFETs have one micron-wide gate and the E-mode FETs typically have transconductance of 200 ms/mm. Results of simulations and tests are reported. Also, the design and layout of the fully monolithic chip is discussed.

Circuit compliance compensation in lung protective ventilation.

PubMed

Masselli, Grazia Maria Pia; Silvestri, Sergio; Sciuto, Salvatore Andrea; Cappa, Paolo

2006-01-01

Lung protective ventilation utilizes low tidal volumes to ventilate patients with severe lung pathologies. The compensation of breathing circuit effects, i.e. those induced by compressible volume of the circuit, results particularly critical in the calculation of the actual tidal volume delivered to patient's respiratory system which in turns is responsible of the level of permissive hypercapnia. The present work analyzes the applicability of the equation for circuit compressible volume compensation in the case of pressure and volume controlled lung protective ventilation. Experimental tests conducted in-vitro show that the actual tidal volume can be reliably estimated if the compliance of the breathing circuit is measured with the same parameters and ventilation technique that will be utilized in lung protective ventilation. Differences between volume and pressure controlled ventilation are also quantitatively assessed showing that pressure controlled ventilation allows a more reliable compensation of breathing circuit compressible volume.

Tunable electromagnetically induced transparency in integrated silicon photonics circuit.

PubMed

Li, Ang; Bogaerts, Wim

2017-12-11

We comprehensively simulate and experimentally demonstrate a novel approach to generate tunable electromagnetically induced transparency (EIT) in a fully integrated silicon photonics circuit. It can also generate tunable fast and slow light. The circuit is a single ring resonator with two integrated tunable reflectors inside, which form an embedded Fabry-Perot (FP) cavity inside the ring cavity. The mode of the FP cavity can be controlled by tuning the reflections using integrated thermo-optic tuners. Under correct tuning conditions, the interaction of the FP mode and the ring resonance mode will generate a Fano resonance and an EIT response. The extinction ratio and bandwidth of the EIT can be tuned by controlling the reflectors. Measured group delay proves that both fast light and slow light can be generated under different tuning conditions. A maximum group delay of 1100 ps is observed because of EIT. Pulse advance around 1200 ps is also demonstrated.

A Global Electric Circuit on Mars

NASA Technical Reports Server (NTRS)

Delory, G. T.; Farrell, W. M.; Desch, M. D.

2001-01-01

We describe conditions on the surface of Mars conducive to the formation of a martian global electric circuit, in a direct analogy to the terrestrial case where atmospheric currents and electric fields are generated worldwide through the charging in thunderstorms. Additional information is contained in the original extended abstract.

Inexpensive but accurate driving circuits for quartz crystal microbalances

NASA Astrophysics Data System (ADS)

Bruschi, L.; Delfitto, G.; Mistura, G.

1999-01-01

The quartz crystal microbalance (QCM) is a common technique which finds a wide variety of applications in many different areas like adsorption, catalysis, analytical chemistry, biochemistry, etc., and more generally as a sensor in the investigation of viscoelastic films. In this article we describe some driving circuits of the quartz which we have realized and tested in our laboratory. These can be assembled with standard components which can be easily found. Their performance, in some cases, is as good as that of the much more expensive frequency modulation technique employed in very precise QCM measurements and which requires high-quality commercial radiofrequency generators and amplifiers.

High voltage pulse generator. [Patent application

DOEpatents

Fasching, G.E.

1975-06-12

An improved high-voltage pulse generator is described which is especially useful in ultrasonic testing of rock core samples. An N number of capacitors are charged in parallel to V volts and at the proper instance are coupled in series to produce a high-voltage pulse of N times V volts. Rapid switching of the capacitors from the paralleled charging configuration to the series discharging configuration is accomplished by using silicon-controlled rectifiers which are chain self-triggered following the initial triggering of the first rectifier connected between the first and second capacitors. A timing and triggering circuit is provided to properly synchronize triggering pulses to the first SCR at a time when the charging voltage is not being applied to the parallel-connected charging capacitors. The output voltage can be readily increased by adding additional charging networks. The circuit allows the peak level of the output to be easily varied over a wide range by using a variable autotransformer in the charging circuit.

A Vibration-Based MEMS Piezoelectric Energy Harvester and Power Conditioning Circuit

PubMed Central

Yu, Hua; Zhou, Jielin; Deng, Licheng; Wen, Zhiyu

2014-01-01

This paper presents a micro-electro-mechanical system (MEMS) piezoelectric power generator array for vibration energy harvesting. A complete design flow of the vibration-based energy harvester using the finite element method (FEM) is proposed. The modal analysis is selected to calculate the resonant frequency of the harvester, and harmonic analysis is performed to investigate the influence of the geometric parameters on the output voltage. Based on simulation results, a MEMS Pb(Zr,Ti)O3 (PZT) cantilever array with an integrated large Si proof mass is designed and fabricated to improve output voltage and power. Test results show that the fabricated generator, with five cantilever beams (with unit dimensions of about 3 × 2.4 × 0.05 mm3) and an individual integrated Si mass dimension of about 8 × 12.4 × 0.5 mm3, produces a output power of 66.75 μW, or a power density of 5.19 μW·mm−3·g−2 with an optimal resistive load of 220 kΩ from 5 m/s2 vibration acceleration at its resonant frequency of 234.5 Hz. In view of high internal impedance characteristic of the PZT generator, an efficient autonomous power conditioning circuit, with the function of impedance matching, energy storage and voltage regulation, is then presented, finding that the efficiency of the energy storage is greatly improved and up to 64.95%. The proposed self-supplied energy generator with power conditioning circuit could provide a very promising complete power supply solution for wireless sensor node loads. PMID:24556670

A vibration-based MEMS piezoelectric energy harvester and power conditioning circuit.

PubMed

Yu, Hua; Zhou, Jielin; Deng, Licheng; Wen, Zhiyu

2014-02-19

This paper presents a micro-electro-mechanical system (MEMS) piezoelectric power generator array for vibration energy harvesting. A complete design flow of the vibration-based energy harvester using the finite element method (FEM) is proposed. The modal analysis is selected to calculate the resonant frequency of the harvester, and harmonic analysis is performed to investigate the influence of the geometric parameters on the output voltage. Based on simulation results, a MEMS Pb(Zr,Ti)O3 (PZT) cantilever array with an integrated large Si proof mass is designed and fabricated to improve output voltage and power. Test results show that the fabricated generator, with five cantilever beams (with unit dimensions of about 3 × 2.4 × 0.05 mm3) and an individual integrated Si mass dimension of about 8 × 12.4 × 0.5 mm3, produces a output power of 66.75 μW, or a power density of 5.19 μW∙mm-3∙g-2 with an optimal resistive load of 220 kΩ from 5 m/s2 vibration acceleration at its resonant frequency of 234.5 Hz. In view of high internal impedance characteristic of the PZT generator, an efficient autonomous power conditioning circuit, with the function of impedance matching, energy storage and voltage regulation, is then presented, finding that the efficiency of the energy storage is greatly improved and up to 64.95%. The proposed self-supplied energy generator with power conditioning circuit could provide a very promising complete power supply solution for wireless sensor node loads.

Investigations of detail design issues for the high speed acoustic wind tunnel using a 60th scale model tunnel. Part 2: Tests with the closed circuit

NASA Technical Reports Server (NTRS)

Barna, P. Stephen

1991-01-01

This report summarizes the tests on the 1:60 scale model of the High Speed Acoustic Wind Tunnel (HSAWT) performed during the period June - August 1991. Throughout the testing the tunnel was operated in the 'closed circuit mode,' that is when the airflow was set up by an axial flow fan, which was located inside the tunnel circuit and was directly driven by a motor. The tests were first performed with the closed test section and were subsequently repeated with the open test section, the latter operating with the nozzle-diffuser at its optimum setting. On this subject, reference is made to the report (1) issued January 1991, under contract 17-GFY900125, which summarizes the result obtained with the tunnel operating in the 'open circuit mode.' The tests confirmed the viability of the tunnel design, and the flow distributions in most of the tunnel components were considered acceptable. There were found, however, some locations where the flow distribution requires improvement. This applies to the flow upstream of the fan where the flow was found skewed, thus affecting the flow downstream. As a result of this, the flow appeared separated at the end of the large diffuser at the outer side. All tests were performed at NASA LaRC.

From Whole-Brain Data to Functional Circuit Models: The Zebrafish Optomotor Response.

PubMed

Naumann, Eva A; Fitzgerald, James E; Dunn, Timothy W; Rihel, Jason; Sompolinsky, Haim; Engert, Florian

2016-11-03

Detailed descriptions of brain-scale sensorimotor circuits underlying vertebrate behavior remain elusive. Recent advances in zebrafish neuroscience offer new opportunities to dissect such circuits via whole-brain imaging, behavioral analysis, functional perturbations, and network modeling. Here, we harness these tools to generate a brain-scale circuit model of the optomotor response, an orienting behavior evoked by visual motion. We show that such motion is processed by diverse neural response types distributed across multiple brain regions. To transform sensory input into action, these regions sequentially integrate eye- and direction-specific sensory streams, refine representations via interhemispheric inhibition, and demix locomotor instructions to independently drive turning and forward swimming. While experiments revealed many neural response types throughout the brain, modeling identified the dimensions of functional connectivity most critical for the behavior. We thus reveal how distributed neurons collaborate to generate behavior and illustrate a paradigm for distilling functional circuit models from whole-brain data. Copyright © 2016 Elsevier Inc. All rights reserved.

Network architectures and circuit function: testing alternative hypotheses in multifunctional networks.

PubMed

Leonard, J L

2000-05-01

Understanding how species-typical movement patterns are organized in the nervous system is a central question in neurobiology. The current explanations involve 'alphabet' models in which an individual neuron may participate in the circuit for several behaviors but each behavior is specified by a specific neural circuit. However, not all of the well-studied model systems fit the 'alphabet' model. The 'equation' model provides an alternative possibility, whereby a system of parallel motor neurons, each with a unique (but overlapping) field of innervation, can account for the production of stereotyped behavior patterns by variable circuits. That is, it is possible for such patterns to arise as emergent properties of a generalized neural network in the absence of feedback, a simple version of a 'self-organizing' behavioral system. Comparison of systems of identified neurons suggest that the 'alphabet' model may account for most observations where CPGs act to organize motor patterns. Other well-known model systems, involving architectures corresponding to feed-forward neural networks with a hidden layer, may organize patterned behavior in a manner consistent with the 'equation' model. Such architectures are found in the Mauthner and reticulospinal circuits, 'escape' locomotion in cockroaches, CNS control of Aplysia gill, and may also be important in the coordination of sensory information and motor systems in insect mushroom bodies and the vertebrate hippocampus. The hidden layer of such networks may serve as an 'internal representation' of the behavioral state and/or body position of the animal, allowing the animal to fine-tune oriented, or particularly context-sensitive, movements to the prevalent conditions. Experiments designed to distinguish between the two models in cases where they make mutually exclusive predictions provide an opportunity to elucidate the neural mechanisms by which behavior is organized in vivo and in vitro. Copyright 2000 S. Karger AG, Basel

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

NASA Technical Reports Server (NTRS)

Woo, D. S.

1977-01-01

Progress in developing the application of ion implantation techniques to silicon gate CMOS/SOS processing is described. All of the conventional doping techniques such as in situ doping of the epi-film and diffusion by means of doped oxides are replaced by ion implantation. Various devices and process parameters are characterized to generate an optimum process by the use of an existing SOS test array. As a result, excellent circuit performance is achieved. A general description of the all ion implantation process is presented.

On-Demand Cell Internal Short Circuit Device

NASA Technical Reports Server (NTRS)

Darcy, Eric; Keyser, Matthew

2014-01-01

A device implantable in Li-ion cells that can generate a hard internal short circuit on-demand by exposing the cell to 60?C has been demonstrated to be valuable for expanding our understanding of cell responses. The device provides a negligible impact to cell performance and enables the instigation of the 4 general categories of cell internal shorts to determine relative severity and cell design susceptibility. Tests with a 18650 cell design indicates that the anode active material short to the aluminum cathode current collector tends to be more catastrophic than the 3 other types of internal shorts. Advanced safety features (such as shutdown separators) to prevent or mitigate the severity of cell internal shorts can be verified with this device. The hard short success rate achieved to date in 18650 cells is about 80%, which is sufficient for using these cells in battery assemblies for field-failure-relevant, cell-cell thermal runaway propagation verification tests

Peak holding circuit for extremely narrow pulses

NASA Technical Reports Server (NTRS)

Oneill, R. W. (Inventor)

1975-01-01

An improved pulse stretching circuit comprising: a high speed wide-band amplifier connected in a fast charge integrator configuration; a holding circuit including a capacitor connected in parallel with a discharging network which employs a resistor and an FET; and an output buffer amplifier. Input pulses of very short duration are applied to the integrator charging the capacitor to a value proportional to the input pulse amplitude. After a predetermined period of time, conventional circuitry generates a dump pulse which is applied to the gate of the FET making a low resistance path to ground which discharges the capacitor. When the dump pulse terminates, the circuit is ready to accept another pulse to be stretched. The very short input pulses are thus stretched in width so that they may be analyzed by conventional pulse height analyzers.

Test Input Generation for Red-Black Trees using Abstraction

NASA Technical Reports Server (NTRS)

Visser, Willem; Pasareanu, Corina S.; Pelanek, Radek

2005-01-01

We consider the problem of test input generation for code that manipulates complex data structures. Test inputs are sequences of method calls from the data structure interface. We describe test input generation techniques that rely on state matching to avoid generation of redundant tests. Exhaustive techniques use explicit state model checking to explore all the possible test sequences up to predefined input sizes. Lossy techniques rely on abstraction mappings to compute and store abstract versions of the concrete states; they explore under-approximations of all the possible test sequences. We have implemented the techniques on top of the Java PathFinder model checker and we evaluate them using a Java implementation of red-black trees.

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2015-01-01

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.

Circuit for measuring time differences among events

DOEpatents

Romrell, Delwin M.

1977-01-01

An electronic circuit has a plurality of input terminals. Application of a first input signal to any one of the terminals initiates a timing sequence. Later inputs to the same terminal are ignored but a later input to any other terminal of the plurality generates a signal which can be used to measure the time difference between the later input and the first input signal. Also, such time differences may be measured between the first input signal and an input signal to any other terminal of the plurality or the circuit may be reset at any time by an external reset signal.

LC-circuit calorimetry

NASA Astrophysics Data System (ADS)

Bossen, O.; Schilling, A.

2011-09-01

We present a new type of calorimeter in which we couple an unknown heat capacity with the aid of Peltier elements to an electrical circuit. The use of an electrical inductance and an amplifier in the circuit allows us to achieve autonomous oscillations, and the measurement of the corresponding resonance frequency makes it possible to accurately measure the heat capacity with an intrinsic statistical uncertainty that decreases as ˜ t_m^{ -3/2} with measuring time tm, as opposed to a corresponding uncertainty ˜ t_m^{-1/2} in the conventional alternating current method to measure heat capacities. We have built a demonstration experiment to show the feasibility of the new technique, and we have tested it on a gadolinium sample at its transition to the ferromagnetic state.

Circuit reliability boosted by soldering pins of disconnect plugs to sockets

NASA Technical Reports Server (NTRS)

Pierce, W. B.

1964-01-01

Where disconnect pins must be used for wiring and testing a circuit, improved system reliability is obtained by making a permanent joint between pins and sockets of the disconnect plug. After the circuit has been tested, contact points may be fused through soldering, brazing, or welding.

21 CFR 874.1120 - Electronic noise generator for audiometric testing.

Code of Federal Regulations, 2011 CFR

2011-04-01

... 21 Food and Drugs 8 2011-04-01 2011-04-01 false Electronic noise generator for audiometric testing... noise generator for audiometric testing. (a) Identification. An electronic noise generator for.... It is intended to introduce a masking noise into the non-test ear during an audiometric evaluation...

21 CFR 874.1120 - Electronic noise generator for audiometric testing.

Code of Federal Regulations, 2010 CFR

2010-04-01

... 21 Food and Drugs 8 2010-04-01 2010-04-01 false Electronic noise generator for audiometric testing... noise generator for audiometric testing. (a) Identification. An electronic noise generator for.... It is intended to introduce a masking noise into the non-test ear during an audiometric evaluation...

Color Coding of Circuit Quantities in Introductory Circuit Analysis Instruction

ERIC Educational Resources Information Center

Reisslein, Jana; Johnson, Amy M.; Reisslein, Martin

2015-01-01

Learning the analysis of electrical circuits represented by circuit diagrams is often challenging for novice students. An open research question in electrical circuit analysis instruction is whether color coding of the mathematical symbols (variables) that denote electrical quantities can improve circuit analysis learning. The present study…

Quantum Optics with Superconducting Circuits: From Single Photons to Schrodinger Cats

DOE Office of Scientific and Technical Information (OSTI.GOV)

Schoelkopf, Rob

Over the last decade and a half, superconducting circuits have advanced to the point where we can generate and detect highly-entangled states, and perform universal quantum gates. Meanwhile, the coherence properties of these systems have improved more than 10,000-fold. I will describe recent experiments, such as the latest advance in coherence using a three-dimensional implementation of qubits interacting with microwave cavities, called “3D circuit QED.” The control and strong interactions possible in superconducting circuits make it possible to generate non-classical states of light, including large superpositions known as “Schrodinger cat” states. This field has many interesting prospects both for applicationsmore » in quantum information processing, and fundamental investigations of the boundary between the macroscopic classical world and the microscopic world of the quantum.« less

Construction and Analysis of Electronic circuits

NASA Technical Reports Server (NTRS)

Thomas, Ashley N.

2004-01-01

The Aviation Environmental Technical Branch produces many various types of aeronautical research that benefits the NASA mission for space exploration and in turn, produces new technology for our nation. One of the present goals of the Aviation Environmental Technical Branch is to create better engines for airplanes by testing supersonic jet propulsion and safe fuel combustion. During the summer of 2004, I was hired by Vincent Sattenvhite Chief executive of the Aviation Environmental Technical Branch to Assist Yves Lamothe with a fuel igniter circuit. Yves Lamothe is an electrical engineer who is currently working on safe fuel combustion testing. This testing is planned to determine the minimum ignition energy for fuel and air vapors of current and alternative fuels under simulated flight conditions. An air temperature bath will provide simulated flight profile temperatures and the heat fluxes to the test chamber. I was assigned with Yves to help complete the igniter circuit which consists of a 36k voltage supply an oscilloscope, and a high voltage transistor switch. During my tenure in the L.E.C.I.R.P. program I studied the basics of electricity and circuitry along with two other projects that I completed. In the beginning of my internship, I devote all of my time to research the aspects of circuitry so that I would be prepared for the projects that I was assigned to do. I read about lessons on; the basic physical concepts of electronics, Electrical units, Basic dc circuits, direct current circuit analysis, resistance and cell batteries, various types of magnetism , Alternating current basics, inductance, and power supplies. I received work sheets and math equations from my Mentor so that I could be able to apply these concepts into my work. After I complete my studies, I went on to construct a LED chaser circuit which displays a series of light patterns using a 555 timer. I incorporated a switch and motion detector into the circuit to create basic alarm system

Design and implementation of a simple acousto optic dual control circuit

NASA Astrophysics Data System (ADS)

Li, Biqing; Li, Zhao

2017-04-01

This page proposed a simple light control circuit which designed by using power supply circuit, sonic circuits, electric circuit and delay circuit four parts. The main chip for CD4011, have inside of the four and to complete the sonic or circuit, electric, delay logic circuit. During the day, no matter how much a pedestrian voice, is ever shine light bulb. Dark night, circuit in a body to make the microphone as long as testing noise, and will automatically be bright for pedestrians lighting, several minutes after the automatic and put out, effective energy saving. Applicable scope and the working principle of the circuit principle diagram and given device parameters selection, power saving effect is obvious, at the same time greatly reduce the maintenance quantity, saving money, use effect is good.

A neural circuit for gamma-band coherence across the retinotopic map in mouse visual cortex

PubMed Central

Hakim, Richard; Shamardani, Kiarash

2018-01-01

Cortical gamma oscillations have been implicated in a variety of cognitive, behavioral, and circuit-level phenomena. However, the circuit mechanisms of gamma-band generation and synchronization across cortical space remain uncertain. Using optogenetic patterned illumination in acute brain slices of mouse visual cortex, we define a circuit composed of layer 2/3 (L2/3) pyramidal cells and somatostatin (SOM) interneurons that phase-locks ensembles across the retinotopic map. The network oscillations generated here emerge from non-periodic stimuli, and are stimulus size-dependent, coherent across cortical space, narrow band (30 Hz), and depend on SOM neuron but not parvalbumin (PV) neuron activity; similar to visually induced gamma oscillations observed in vivo. Gamma oscillations generated in separate cortical locations exhibited high coherence as far apart as 850 μm, and lateral gamma entrainment depended on SOM neuron activity. These data identify a circuit that is sufficient to mediate long-range gamma-band coherence in the primary visual cortex. PMID:29480803

Dynamic performance of maximum power point tracking circuits using sinusoidal extremum seeking control for photovoltaic generation

NASA Astrophysics Data System (ADS)

Leyva, R.; Artillan, P.; Cabal, C.; Estibals, B.; Alonso, C.

2011-04-01

The article studies the dynamic performance of a family of maximum power point tracking circuits used for photovoltaic generation. It revisits the sinusoidal extremum seeking control (ESC) technique which can be considered as a particular subgroup of the Perturb and Observe algorithms. The sinusoidal ESC technique consists of adding a small sinusoidal disturbance to the input and processing the perturbed output to drive the operating point at its maximum. The output processing involves a synchronous multiplication and a filtering stage. The filter instance determines the dynamic performance of the MPPT based on sinusoidal ESC principle. The approach uses the well-known root-locus method to give insight about damping degree and settlement time of maximum-seeking waveforms. This article shows the transient waveforms in three different filter instances to illustrate the approach. Finally, an experimental prototype corroborates the dynamic analysis.

Mechanically Flexible and High-Performance CMOS Logic Circuits

PubMed Central

Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

2015-01-01

Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal–oxide–semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices. PMID:26459882

40 CFR 86.1333-90 - Transient test cycle generation.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 40 Protection of Environment 19 2010-07-01 2010-07-01 false Transient test cycle generation. 86...) Emission Regulations for New Otto-Cycle and Diesel Heavy-Duty Engines; Gaseous and Particulate Exhaust Test Procedures § 86.1333-90 Transient test cycle generation. (a) The heavy-duty transient engine cycles for Otto...

Model Based Analysis and Test Generation for Flight Software

NASA Technical Reports Server (NTRS)

Pasareanu, Corina S.; Schumann, Johann M.; Mehlitz, Peter C.; Lowry, Mike R.; Karsai, Gabor; Nine, Harmon; Neema, Sandeep

2009-01-01

We describe a framework for model-based analysis and test case generation in the context of a heterogeneous model-based development paradigm that uses and combines Math- Works and UML 2.0 models and the associated code generation tools. This paradigm poses novel challenges to analysis and test case generation that, to the best of our knowledge, have not been addressed before. The framework is based on a common intermediate representation for different modeling formalisms and leverages and extends model checking and symbolic execution tools for model analysis and test case generation, respectively. We discuss the application of our framework to software models for a NASA flight mission.

Connecting Time and Frequency in the RC Circuit

NASA Astrophysics Data System (ADS)

Moya, A. A.

2017-04-01

Charging and discharging processes of a capacitor through a resistor, as well as the concept of impedance in alternating current circuits, are topics covered in introductory physics courses. The experimental study of the charge and discharge of a capacitor through a resistor is a well-established lab exercise that is used to introduce concepts such as exponential increase or decrease and time constant. Determining the time constant of the RC circuit has important practical applications because, for example, it can be used to measure unknown values of resistance or capacitance. The transient experiment can be done by using a voltmeter and stopwatch, signal generator and oscilloscope, or even low-cost data acquisition systems such as Arduino. An equivalent topic when studying alternating current circuits arises from the characterization of the impedance of the series or parallel combination of the capacitor and the resistor as a function of frequency. Determining the time constant of the RC circuit by means of impedance measurements for different frequencies is a known experimental technique that can be done using not only LCR meters but also basic instrumentation in the physics lab such as a signal generator, frequency counter, and multimeter. However, lab exercises dealing with RC circuits in alternating current usually focus on their use as filters, and the potential applications in the field of the electrical characterization of material systems are ignored. In this work, we describe a simple exercise showing how the time constant of the RC circuit can easily be determined in the introductory physics lab by means of impedance measurements as a function of frequency. This exercise allows students to learn experimental techniques that find application to characterize the time constants of the charge transport processes in material systems. Moreover, comparison of the time constants obtained from transient and frequency analysis allows us to relate the time and

Dynamic test input generation for multiple-fault isolation

NASA Technical Reports Server (NTRS)

Schaefer, Phil

1990-01-01

Recent work is Causal Reasoning has provided practical techniques for multiple fault diagnosis. These techniques provide a hypothesis/measurement diagnosis cycle. Using probabilistic methods, they choose the best measurements to make, then update fault hypotheses in response. For many applications such as computers and spacecraft, few measurement points may be accessible, or values may change quickly as the system under diagnosis operates. In these cases, a hypothesis/measurement cycle is insufficient. A technique is presented for a hypothesis/test-input/measurement diagnosis cycle. In contrast to generating tests a priori for determining device functionality, it dynamically generates tests in response to current knowledge about fault probabilities. It is shown how the mathematics previously used for measurement specification can be applied to the test input generation process. An example from an efficient implementation called Multi-Purpose Causal (MPC) is presented.

Inter-progenitor pool wiring: An evolutionarily conserved strategy that expands neural circuit diversity.

PubMed

Suzuki, Takumi; Sato, Makoto

2017-11-15

Diversification of neuronal types is key to establishing functional variations in neural circuits. The first critical step to generate neuronal diversity is to organize the compartmental domains of developing brains into spatially distinct neural progenitor pools. Neural progenitors in each pool then generate a unique set of diverse neurons through specific spatiotemporal specification processes. In this review article, we focus on an additional mechanism, 'inter-progenitor pool wiring', that further expands the diversity of neural circuits. After diverse types of neurons are generated in one progenitor pool, a fraction of these neurons start migrating toward a remote brain region containing neurons that originate from another progenitor pool. Finally, neurons of different origins are intermingled and eventually form complex but precise neural circuits. The developing cerebral cortex of mammalian brains is one of the best examples of inter-progenitor pool wiring. However, Drosophila visual system development has revealed similar mechanisms in invertebrate brains, suggesting that inter-progenitor pool wiring is an evolutionarily conserved strategy that expands neural circuit diversity. Here, we will discuss how inter-progenitor pool wiring is accomplished in mammalian and fly brain systems. Copyright © 2017 Elsevier Inc. All rights reserved.

Testing to Characterize the Advanced Stirling Radioisotope Generator Engineering Unit

NASA Technical Reports Server (NTRS)

Lewandowski, Edward; Schreiber, Jeffrey

2010-01-01

The Advanced Stirling Radioisotope Generator (ASRG), a high efficiency generator, is being considered for space missions. Lockheed Martin designed and fabricated an engineering unit (EU), the ASRG EU, under contract to the Department of Energy. This unit is currently undergoing extended operation testing at the NASA Glenn Research Center to generate performance data and validate life and reliability predictions for the generator and the Stirling convertors. It has also undergone performance tests to characterize generator operation while varying control parameters and system inputs. This paper summarizes and explains test results in the context of designing operating strategies for the generator during a space mission and notes expected differences between the EU performance and future generators.

A triple hybrid micropower generator with simultaneous multi-mode energy harvesting

NASA Astrophysics Data System (ADS)

Uluşan, H.; Chamanian, S.; Pathirana, W. P. M. R.; Zorlu, Ö.; Muhtaroğlu, A.; Külah, H.

2018-01-01

This study presents a triple hybrid energy harvesting system that combines harvested power from thermoelectric (TE), vibration-based electromagnetic (EM) and piezoelectric (PZT) harvesters into a single DC supply. A power management circuit is designed and implemented in 180 nm standard CMOS technology based on the distinct requirements of each harvester, and is terminated with a Schottky diode to avoid reverse current flow. The system topology hence supports simultaneous power generation and delivery from low and high frequency vibrations as well as temperature differences in the environment. The ultra-low DC voltage harvested from TE generator is boosted with a cross-coupled charge-pump driven by an LC oscillator with fully-integrated center-tapped differential inductors. The EM harvester output was rectified with a self-powered and low drop-out AC/DC doubler circuit. The PZT interface electronics benefits from peak-to-peak cycle of the harvested voltage through a negative voltage converter followed by synchronous power extraction and DC-to-DC conversion through internal switches, and an external inductor. The hybrid system was tested with a wearable in-house EM energy harvester placed wrist of a jogger, a commercial low volume PZT harvester, and DC supply as the TE generator output. The system generates more than 1.2 V output for load resistances higher than 50 kΩ, which corresponds to 24 μW to power wearable sensors. Simultaneous multi-mode operation achieves higher voltage and power compared to stand-alone harvesting circuits, and generates up to 110 μW of output power. This is the first hybrid harvester circuit that simultaneously extracts energy from three independent sources, and delivers a single DC output.

Nanosecond pulsed electric fields (nsPEFs) low cost generator design using power MOSFET and Cockcroft-Walton multiplier circuit as high voltage DC source

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sulaeman, M. Y.; Widita, R.

2014-09-30

Purpose: Non-ionizing radiation therapy for cancer using pulsed electric field with high intensity field has become an interesting field new research topic. A new method using nanosecond pulsed electric fields (nsPEFs) offers a novel means to treat cancer. Not like the conventional electroporation, nsPEFs able to create nanopores in all membranes of the cell, including membrane in cell organelles, like mitochondria and nucleus. NsPEFs will promote cell death in several cell types, including cancer cell by apoptosis mechanism. NsPEFs will use pulse with intensity of electric field higher than conventional electroporation, between 20–100 kV/cm and with shorter duration of pulsemore » than conventional electroporation. NsPEFs requires a generator to produce high voltage pulse and to achieve high intensity electric field with proper pulse width. However, manufacturing cost for creating generator that generates a high voltage with short duration for nsPEFs purposes is highly expensive. Hence, the aim of this research is to obtain the low cost generator design that is able to produce a high voltage pulse with nanosecond width and will be used for nsPEFs purposes. Method: Cockcroft-Walton multiplier circuit will boost the input of 220 volt AC into high voltage DC around 1500 volt and it will be combined by a series of power MOSFET as a fast switch to obtain a high voltage with nanosecond pulse width. The motivation using Cockcroft-Walton multiplier is to acquire a low-cost high voltage DC generator; it will use capacitors and diodes arranged like a step. Power MOSFET connected in series is used as voltage divider to share the high voltage in order not to damage them. Results: This design is expected to acquire a low-cost generator that can achieve the high voltage pulse in amount of −1.5 kV with falltime 3 ns and risetime 15 ns into a 50Ω load that will be used for nsPEFs purposes. Further detailed on the circuit design will be explained at presentation.« less

Feasibility Test of a Liquid Film Thickness Sensor on a Flexible Printed Circuit Board Using a Three-Electrode Conductance Method

PubMed Central

Lee, Kyu Byung; Kim, Jong Rok; Park, Goon Cherl; Cho, Hyoung Kyu

2016-01-01

Liquid film thickness measurements under temperature-varying conditions in a two-phase flow are of great importance to refining our understanding of two-phase flows. In order to overcome the limitations of the conventional electrical means of measuring the thickness of a liquid film, this study proposes a three-electrode conductance method, with the device fabricated on a flexible printed circuit board (FPCB). The three-electrode conductance method offers the advantage of applicability under conditions with varying temperatures in principle, while the FPCB has the advantage of usability on curved surfaces and in relatively high-temperature conditions in comparison with sensors based on a printed circuit board (PCB). Two types of prototype sensors were fabricated on an FPCB and the feasibility of both was confirmed in a calibration test conducted at different temperatures. With the calibrated sensor, liquid film thickness measurements were conducted via a falling liquid film flow experiment, and the working performance was tested. PMID:28036000

Testing of printed circuit board solder joints by optical correlation

NASA Technical Reports Server (NTRS)

Espy, P. N.

1975-01-01

An optical correlation technique for the nondestructive evaluation of printed circuit board solder joints was evaluated. Reliable indications of induced stress levels in solder joint lead wires are achievable. Definite relations between the inherent strength of a solder joint, with its associated ability to survive stress, are demonstrable.

An Efficient Functional Test Generation Method For Processors Using Genetic Algorithms

NASA Astrophysics Data System (ADS)

Hudec, Ján; Gramatová, Elena

2015-07-01

The paper presents a new functional test generation method for processors testing based on genetic algorithms and evolutionary strategies. The tests are generated over an instruction set architecture and a processor description. Such functional tests belong to the software-oriented testing. Quality of the tests is evaluated by code coverage of the processor description using simulation. The presented test generation method uses VHDL models of processors and the professional simulator ModelSim. The rules, parameters and fitness functions were defined for various genetic algorithms used in automatic test generation. Functionality and effectiveness were evaluated using the RISC type processor DP32.

Unit: Electric Circuits, Inspection Pack, National Trial Print.

ERIC Educational Resources Information Center

Australian Science Education Project, Toorak, Victoria.

As a part of the unit materials in the series produced by the Australian Science Education Project, this teacher edition is primarily composed of a core relating to simple circuits, a test form, and options. Options are given under the headings: Your Invention; "How Long Does a Call Last?"; One, Two, Three Wires; Parallel Circuits; More…

Joule-Thief Circuit Performance for Electricity Energy Saving of Emergency Lamps

NASA Astrophysics Data System (ADS)

Nuryanto Budisusila, Eka; Arifin, Bustanul

2017-04-01

The alternative energy such as battery as power source is required as energy source failures. The other need is outdoor lighting. The electrical power source is expected to be a power saving, optimum and has long life operating. The Joule-Thief circuit is one of solution method for energy saving by using raised electromagnetic force on cored coil when there is back-current. This circuit has a transistor operated as a switch to cut voltage and current flowing along the coils. The present of current causing magnetic induction and generates energy. Experimental prototype was designed by using battery 1.5V to activate Light Emitting Diode or LED as load. The LED was connected in parallel or serial circuit configuration. The result show that the joule-thief circuit able to supply LED circuits up to 40 LEDs.

A circuit for saccadic suppression in the primate brain

PubMed Central

Cavanaugh, James; McAlonan, Kerry; Wurtz, Robert H.

2017-01-01

Saccades should cause us to see a blur as the eyes sweep across a visual scene. Specific brain mechanisms prevent this by producing suppression during saccades. Neuronal correlates of such suppression were first established in the visual superficial layers of the superior colliculus (SC) and subsequently have been observed in cortical visual areas, including the middle temporal visual area (MT). In this study, we investigated suppression in a recently identified circuit linking visual SC (SCs) to MT through the inferior pulvinar (PI). We examined responses to visual stimuli presented just before saccades to reveal a neuronal correlate of suppression driven by a copy of the saccade command, referred to as a corollary discharge. We found that visual responses were similarly suppressed in SCs, PI, and MT. Within each region, suppression of visual responses occurred with saccades into both visual hemifields, but only in the contralateral hemifield did this suppression consistently begin before the saccade (~100 ms). The consistency of the signal along the circuit led us to hypothesize that the suppression in MT was influenced by input from the SC. We tested this hypothesis in one monkey by inactivating neurons within the SC and found evidence that suppression in MT depends on corollary discharge signals from motor SC (SCi). Combining these results with recent findings in rodents, we propose a complete circuit originating with corollary discharge signals in SCi that produces suppression in visual SCs, PI, and ultimately, MT cortex. NEW & NOTEWORTHY A fundamental puzzle in visual neuroscience is that we frequently make rapid eye movements (saccades) but seldom perceive the visual blur accompanying each movement. We investigated neuronal correlates of this saccadic suppression by recording from and perturbing a recently identified circuit from brainstem to cortex. We found suppression at each stage, with evidence that it was driven by an internally generated signal. We

Resonant circuit which provides dual-frequency excitation for rapid cycling of an electromagnet

DOEpatents

Praeg, W.F.

1982-03-09

Disclosed is a novel ring-magnet control circuit that permits synchrotron repetition rates much higher than the frequency of the sinusoidal guide field of the ring magnet during particle acceleration. The control circuit generates sinusoidal excitation currents of different frequencies in the half waves. During radio-frequency acceleration of the synchrotron, the control circuit operates with a lower frequency sine wave and, thereafter, the electromagnets are reset with a higher-frequency half sine wave.

Thermally-induced voltage alteration for integrated circuit analysis

DOEpatents

Cole, Jr., Edward I.

2000-01-01

A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

Evaluating waste printed circuit boards recycling: Opportunities and challenges, a mini review.

PubMed

Awasthi, Abhishek Kumar; Zlamparet, Gabriel Ionut; Zeng, Xianlai; Li, Jinhui

2017-04-01

Rapid generation of waste printed circuit boards has become a very serious issue worldwide. Numerous techniques have been developed in the last decade to resolve the pollution from waste printed circuit boards, and also recover valuable metals from the waste printed circuit boards stream on a large-scale. However, these techniques have their own certain specific drawbacks that need to be rectified properly. In this review article, these recycling technologies are evaluated based on a strength, weaknesses, opportunities and threats analysis. Furthermore, it is warranted that, the substantial research is required to improve the current technologies for waste printed circuit boards recycling in the outlook of large-scale applications.

Compact sub-nanosecond pulse seed source with diode laser driven by a high-speed circuit

NASA Astrophysics Data System (ADS)

Wang, Xiaoqian; Wang, Bo; Wang, Junhua; Cheng, Wenyong

2018-06-01

A compact sub-nanosecond pulse seed source with 1550 nm diode laser (DL) was obtained by employing a high-speed circuit. The circuit mainly consisted of a short pulse generator and a short pulse driver. The short pulse generator, making up of a complex programmable logic device (CPLD), a level translator, two programmable delay chips and an AND gate chip, output a triggering signal to control metal-oxide-semiconductor field-effect transistor (MOSFET) switch of the short pulse driver. The MOSFET switch with fast rising time and falling time both shorter than 1 ns drove the DL to emit short optical pulses. Performances of the pulse seed source were tested. The results showed that continuously adjustable repetition frequency ranging from 500 kHz to 100 MHz and pulse duration in the range of 538 ps to 10 ns were obtained, respectively. 537 μW output was obtained at the highest repetition frequency of 100 MHz with the shortest pulse duration of 538 ps. These seed pulses were injected into an fiber amplifier, and no optical pulse distortions were found.

Improved test methods for determining lightning-induced voltages in aircraft

NASA Technical Reports Server (NTRS)

Crouch, K. E.; Plumer, J. A.

1980-01-01

A lumped parameter transmission line with a surge impedance matching that of the aircraft and its return lines was evaluated as a replacement for earlier current generators. Various test circuit parameters were evaluated using a 1/10 scale relative geometric model. Induced voltage response was evaluated by taking measurements on the NASA-Dryden Digital Fly by Wire F-8 aircraft. Return conductor arrangements as well as other circuit changes were also evaluated, with all induced voltage measurements being made on the same circuit for comparison purposes. The lumped parameter transmission line generates a concave front current wave with the peak di/dt near the peak of the current wave which is more representative of lightning. However, the induced voltage measurements when scaled by appropriate scale factors (peak current or di/dt) resulting from both techniques yield comparable results.

A power management system for energy harvesting and wireless sensor networks application based on a novel charge pump circuit

NASA Astrophysics Data System (ADS)

Aloulou, R.; De Peslouan, P.-O. Lucas; Mnif, H.; Alicalapa, F.; Luk, J. D. Lan Sun; Loulou, M.

2016-05-01

Energy Harvesting circuits are developed as an alternative solution to supply energy to autonomous sensor nodes in Wireless Sensor Networks. In this context, this paper presents a micro-power management system for multi energy sources based on a novel design of charge pump circuit to allow the total autonomy of self-powered sensors. This work proposes a low-voltage and high performance charge pump (CP) suitable for implementation in standard complementary metal oxide semiconductor (CMOS) technologies. The CP design was implemented using Cadence Virtuoso with AMS 0.35μm CMOS technology parameters. Its active area is 0.112 mm2. Consistent results were obtained between the measured findings of the chip testing and the simulation results. The circuit can operate with an 800 mV supply and generate a boosted output voltage of 2.835 V with 1 MHz as frequency.

4 Hz oscillations synchronize prefrontal-amygdala circuits during fear behaviour

PubMed Central

Karalis, Nikolaos; Dejean, Cyril; Chaudun, Fabrice; Khoder, Suzana; Rozeske, Robert R.; Wurtz, Hélène; Bagur, Sophie; Benchenane, Karim; Sirota, Anton; Courtin, Julien; Herry, Cyril

2016-01-01

Fear expression relies on the coordinated activity of prefrontal and amygdala circuits, yet the mechanisms allowing long-range network synchronization during fear remain unknown. Using a combination of extracellular recordings, pharmacological, and optogenetic manipulations we report that freezing, a behavioural expression of fear, temporally coincides with the development of sustained, internally generated 4 Hz oscillations within prefrontal-amygdala circuits. 4 Hz oscillations predict freezing onset and offset and synchronize prefrontal-amygdala circuits. Optogenetic induction of prefrontal 4 Hz oscillations coordinates prefrontal-amygdala activity and elicits fear behaviour. These results unravel a novel sustained oscillatory mechanism mediating prefrontal-amygdala coupling during fear behaviour. PMID:26878674

Novel Circuits for Energizing Manganin Stress Gauges

NASA Astrophysics Data System (ADS)

Tasker, Douglas

2015-06-01

This paper describes the design, manufacture and testing of novel MOSFET pulsed constant current supplies for low impedance Manganin stress gauges. The design emphasis has been on high accuracy, low noise, simple, low cost, disposable supplies that can be used to energize multiple gauges in explosive or shock experiments. Manganin gauges used to measure stresses in detonating explosive experiments have typical resistances of 50 m Ω and are energized with pulsed currents of 50 A. Conventional pulsed current supplies for these gauges are high voltage devices with outputs as high as 500 V. Common problems with the use of high voltage supplies at explosive firing sites are: erroneous signals caused by ground loops; overdrive of oscilloscopes on gauge failure; gauge signal crosstalk; cost; and errors due to finite and changing source impedances. To correct these issues a novel MOSFET circuit was designed and will be described. It is an 18-V circuit, powered by 9-V alkaline batteries, and features an optically isolated trigger, and single-point grounding. These circuits have been successfully tested at the Los Alamos National Laboratory and selected explosive tests will be described together with their results. LA-UR-15-20613.

Ultra-short pulse generator

DOEpatents

McEwan, Thomas E.

1993-01-01

An inexpensive pulse generating circuit is disclosed that generates ultra-short, 200 picosecond, and high voltage 100 kW, pulses suitable for wideband radar and other wideband applications. The circuit implements a nonlinear transmission line with series inductors and variable capacitors coupled to ground made from reverse biased diodes to sharpen and increase the amplitude of a high-voltage power MOSFET driver input pulse until it causes non-destructive transit time breakdown in a final avalanche shockwave diode, which increases and sharpens the pulse even more.

Brain reflections: A circuit-based framework for understanding information processing and cognitive control.

PubMed

Gratton, Gabriele

2018-03-01

Here, I propose a view of the architecture of the human information processing system, and of how it can be adapted to changing task demands (which is the hallmark of cognitive control). This view is informed by an interpretation of brain activity as reflecting the excitability level of neural representations, encoding not only stimuli and temporal contexts, but also action plans and task goals. The proposed cognitive architecture includes three types of circuits: open circuits, involved in feed-forward processing such as that connecting stimuli with responses and characterized by brief, transient brain activity; and two types of closed circuits, positive feedback circuits (characterized by sustained, high-frequency oscillatory activity), which help select and maintain representations, and negative feedback circuits (characterized by brief, low-frequency oscillatory bursts), which are instead associated with changes in representations. Feed-forward activity is primarily responsible for the spread of activation along the information processing system. Oscillatory activity, instead, controls this spread. Sustained oscillatory activity due to both local cortical circuits (gamma) and longer corticothalamic circuits (alpha and beta) allows for the selection of individuated representations. Through the interaction of these circuits, it also allows for the preservation of representations across different temporal spans (sensory and working memory) and their spread across the brain. In contrast, brief bursts of oscillatory activity, generated by novel and/or conflicting information, lead to the interruption of sustained oscillatory activity and promote the generation of new representations. I discuss how this framework can account for a number of psychological and behavioral phenomena. © 2017 Society for Psychophysiological Research.

A design of driving circuit for star sensor imaging camera

NASA Astrophysics Data System (ADS)

Li, Da-wei; Yang, Xiao-xu; Han, Jun-feng; Liu, Zhao-hui

2016-01-01

The star sensor is a high-precision attitude sensitive measuring instruments, which determine spacecraft attitude by detecting different positions on the celestial sphere. Imaging camera is an important portion of star sensor. The purpose of this study is to design a driving circuit based on Kodak CCD sensor. The design of driving circuit based on Kodak KAI-04022 is discussed, and the timing of this CCD sensor is analyzed. By the driving circuit testing laboratory and imaging experiments, it is found that the driving circuits can meet the requirements of Kodak CCD sensor.

Performance results of a digital test signal generator

NASA Technical Reports Server (NTRS)

Gutierrez-Luaces, B. O.; Marina, M.; Parham, B.

1993-01-01

Performance results of a digital test signal-generator hardware-demonstration unit are reported. Capabilities available include baseband and intermediate frequency (IF) spectrum generation, for which test results are provided. Repeatability in the setting of a given signal-to-noise ratio (SNR) when a baseband or an IF spectrum is being generated ranges from 0.01 dB at high SNR's or high data rates to 0.3 dB at low data rates or low SNR's. Baseband symbol SNR and carrier SNR (Pc/No) accuracies of 0.1 dB were verified with the built-in statistics circuitry. At low SNR's that accuracy remains to be fully verified. These results were confirmed with measurements from a demodulator synchronizer assembly for the baseband spectrum generation, and with a digital receiver (Pioneer 10 receiver) for the IF spectrum generation.

Computer-Based Arithmetic Test Generation

ERIC Educational Resources Information Center

Trocchi, Robert F.

1973-01-01

The computer can be a welcome partner in the instructional process, but only if there is man-machine interaction. Man should not compromise system design because of available hardware; the computer must fit the system design for the result to represent an acceptable solution to instructional technology. The Arithmetic Test Generator system fits…

Quantum circuit dynamics via path integrals: Is there a classical action for discrete-time paths?

NASA Astrophysics Data System (ADS)

Penney, Mark D.; Enshan Koh, Dax; Spekkens, Robert W.

2017-07-01

It is straightforward to compute the transition amplitudes of a quantum circuit using the sum-over-paths methodology when the gates in the circuit are balanced, where a balanced gate is one for which all non-zero transition amplitudes are of equal magnitude. Here we consider the question of whether, for such circuits, the relative phases of different discrete-time paths through the configuration space can be defined in terms of a classical action, as they are for continuous-time paths. We show how to do so for certain kinds of quantum circuits, namely, Clifford circuits where the elementary systems are continuous-variable systems or discrete systems of odd-prime dimension. These types of circuit are distinguished by having phase-space representations that serve to define their classical counterparts. For discrete systems, the phase-space coordinates are also discrete variables. We show that for each gate in the generating set, one can associate a symplectomorphism on the phase-space and to each of these one can associate a generating function, defined on two copies of the configuration space. For discrete systems, the latter association is achieved using tools from algebraic geometry. Finally, we show that if the action functional for a discrete-time path through a sequence of gates is defined using the sum of the corresponding generating functions, then it yields the correct relative phases for the path-sum expression. These results are likely to be relevant for quantizing physical theories where time is fundamentally discrete, characterizing the classical limit of discrete-time quantum dynamics, and proving complexity results for quantum circuits.

VLSI circuits implementing computational models of neocortical circuits.

PubMed

Wijekoon, Jayawan H B; Dudek, Piotr

2012-09-15

This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. Copyright © 2012 Elsevier B.V. All rights reserved.

Design, Fabrication and Integration of a NaK-Cooled Circuit

NASA Technical Reports Server (NTRS)

Garber, Anne; Godfroy, Thomas

2006-01-01

The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed for use with a eutectic mixture of sodium potassium (NaK), was redesigned to for use with lithium. Due to a shi$ in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature circuit include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a fill design) was selected for fabrication and test. This paper summarizes the integration and preparations for the fill of the pumped liquid metal NaK flow circuit.

A device for testing cables

NASA Technical Reports Server (NTRS)

Hayhurst, Arthur Ray (Inventor)

1993-01-01

A device for testing current paths is attachable to a conductor. The device automatically checks the current paths of the conductor for continuity of a center conductor, continuity of a shield, and a short circuit between the shield and the center conductor. The device includes a pair of connectors and a circuit to provide for testing of the conductive paths of a cable to be tested with the circuit paths of the circuit. The circuit paths in the circuit include indicators to simultaneously indicate the results of the testing.

Note: A calibration method to determine the lumped-circuit parameters of a magnetic probe.

PubMed

Li, Fuming; Chen, Zhipeng; Zhu, Lizhi; Liu, Hai; Wang, Zhijiang; Zhuang, Ge

2016-06-01

This paper describes a novel method to determine the lumped-circuit parameters of a magnetic inductive probe for calibration by using Helmholtz coils with high frequency power supply (frequency range: 10 kHz-400 kHz). The whole calibration circuit system can be separated into two parts: "generator" circuit and "receiver" circuit. By implementing the Fourier transform, two analytical lumped-circuit models, with respect to these separated circuits, are constructed to obtain the transfer function between each other. Herein, the precise lumped-circuit parameters (including the resistance, inductance, and capacitance) of the magnetic probe can be determined by fitting the experimental data to the transfer function. Regarding the fitting results, the finite impedance of magnetic probe can be used to analyze the transmission of a high-frequency signal between magnetic probes, cables, and acquisition system.

Pulse transmission receiver with higher-order time derivative pulse generator

DOEpatents

Dress, Jr., William B.; Smith, Stephen F.

2003-08-12

Systems and methods for pulse-transmission low-power communication modes are disclosed. A pulse transmission receiver includes: a front-end amplification/processing circuit; a synchronization circuit coupled to the front-end amplification/processing circuit; a clock coupled to the synchronization circuit; a trigger signal generator coupled to the clock; and at least one higher-order time derivative pulse generator coupled to the trigger signal generator. The systems and methods significantly reduce lower-frequency emissions from pulse transmission spread-spectrum communication modes, which reduces potentially harmful interference to existing radio frequency services and users and also simultaneously permit transmission of multiple data bits by utilizing specific pulse shapes.

Enabling complex genetic circuits to respond to extrinsic environmental signals.

PubMed

Hoynes-O'Connor, Allison; Shopera, Tatenda; Hinman, Kristina; Creamer, John Philip; Moon, Tae Seok

2017-07-01

Genetic circuits have the potential to improve a broad range of metabolic engineering processes and address a variety of medical and environmental challenges. However, in order to engineer genetic circuits that can meet the needs of these real-world applications, genetic sensors that respond to relevant extrinsic and intrinsic signals must be implemented in complex genetic circuits. In this work, we construct the first AND and NAND gates that respond to temperature and pH, two signals that have relevance in a variety of real-world applications. A previously identified pH-responsive promoter and a temperature-responsive promoter were extracted from the E. coli genome, characterized, and modified to suit the needs of the genetic circuits. These promoters were combined with components of the type III secretion system in Salmonella typhimurium and used to construct a set of AND gates with up to 23-fold change. Next, an antisense RNA was integrated into the circuit architecture to invert the logic of the AND gate and generate a set of NAND gates with up to 1168-fold change. These circuits provide the first demonstration of complex pH- and temperature-responsive genetic circuits, and lay the groundwork for the use of similar circuits in real-world applications. Biotechnol. Bioeng. 2017;114: 1626-1631. © 2017 Wiley Periodicals, Inc. © 2017 Wiley Periodicals, Inc.

A SERIES OF SUPPRESSIVE SIGNALS WITHIN THE DROSOPHILA CIRCADIAN NEURAL CIRCUIT GENERATES SEQUENTIAL DAILY OUTPUTS

PubMed Central

Liang, Xitong; Holy, Timothy E; Taghert, Paul H

2017-01-01

Summary We studied the Drosophila circadian neural circuit using whole brain imaging in vivo. Five major groups of pacemaker neurons display synchronized molecular clocks, yet each exhibits a distinct phase of daily Ca2+ activation. Light and neuropeptide PDF from morning cells (s-LNv) together delay the phase of the evening (LNd) group by ~12 h; PDF alone delays the phase of the DN3 group, by ~17 h. Neuropeptide sNPF, released from s-LNv and LNd pacemakers, produces latenight Ca2+ activation in the DN1 group. The circuit also features negative feedback by PDF to truncate the s-LNv Ca2+ wave and terminate PDF release. Both PDF and sNPF suppress basal Ca2+ levels in target pacemakers with long durations by cell autonomous actions. Thus, light and neuropeptides act dynamically at distinct hubs of the circuit to produce multiple suppressive events that create the proper tempo and sequence of circadian pacemaker neuronal activities. PMID:28552314