Science.gov

Sample records for coding circuits

  1. Electrical Circuit Simulation Code

    Energy Science and Technology Software Center (ESTSC)

    2001-08-09

    Massively-Parallel Electrical Circuit Simulation Code. CHILESPICE is a massively-arallel distributed-memory electrical circuit simulation tool that contains many enhanced radiation, time-based, and thermal features and models. Large scale electronic circuit simulation. Shared memory, parallel processing, enhance convergence. Sandia specific device models.

  2. Multiplier Architecture for Coding Circuits

    NASA Technical Reports Server (NTRS)

    Wang, C. C.; Truong, T. K.; Shao, H. M.; Deutsch, L. J.

    1986-01-01

    Multipliers based on new algorithm for Galois-field (GF) arithmetic regular and expandable. Pipeline structures used for computing both multiplications and inverses. Designs suitable for implementation in very-large-scale integrated (VLSI) circuits. This general type of inverter and multiplier architecture especially useful in performing finite-field arithmetic of Reed-Solomon error-correcting codes and of some cryptographic algorithms.

  3. 49 CFR 236.727 - Circuit, track; coded.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, track; coded. 236.727 Section 236.727 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track; coded. A track circuit in which the energy is varied or interrupted periodically....

  4. Practical applications of digital integrated circuits. Part 2: Minimization techniques, code conversion, flip-flops, and asynchronous circuits

    NASA Technical Reports Server (NTRS)

    1972-01-01

    Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be pointed out that the logic theory contained herein applies to all hardware. Binary numbers, simplification of logic circuits, code conversion circuits, basic flip-flop theory, details about series 54/7400, and asynchronous circuits are discussed.

  5. User`s guide and physics manual for the SCATPlus circuit code

    SciTech Connect

    Yapuncich, M.L.; Deninger, W.J.; Gribble, R.F.

    1994-05-09

    ScatPlus is a user friendly circuit code and an expandable library of circuit models for electrical components and devices; it can be used to predict the transient behavior in electric circuits. The heart of ScatPlus is the transient circuit solver SCAT written in 1986 by R.F. Gribble. This manual includes system requirements, physics manual, ScatPlus component library, tutorial, ScatPlus screen, menus and toolbar, ScatPlus tool bar, procedures.

  6. Quantum circuit for optimal eavesdropping in quantum key distribution using phase-time coding

    SciTech Connect

    Kronberg, D. A.; Molotkov, S. N.

    2010-07-15

    A quantum circuit is constructed for optimal eavesdropping on quantum key distribution proto- cols using phase-time coding, and its physical implementation based on linear and nonlinear fiber-optic components is proposed.

  7. A direct sequence spread spectrum code acquisition circuit for wireless sensor networks

    NASA Astrophysics Data System (ADS)

    Ghaisari, Jafar; Ferdosi, Arash

    2011-06-01

    Narrow band (NB), spread spectrum (SS), and ultra wide band (UWB) are three physical layer bandwidth types used in wireless sensor networks (WSN). SS and UWB technologies have many advantages over NB, which make them preferable for WSN. Synchronisation of different nodes in a WSN is an important task that is necessary to improve cooperation and lifetime of nodes. Code acquisition is the main step of a node's time synchronisation. In this article, a pseudo noise code generator and a code acquisition circuit are proposed, designed and tested using direct sequence SS technique. To investigate the properties of the designed circuits, simulations are carried out via Xilinx Foundation Series software in the real mode. The results demonstrate excellent performance of the proposed algorithms and circuits in all realistic conditions. The code acquisition circuit proposed an adaptive testing window for single dwell serial search method. The code acquisition circuit is a clock phase free approach, thus the clock coherency step is cancelled. Moreover, clock phase difference between transmitter and receiver nodes does not mostly affect the acquisition and thus synchronisation time.

  8. Self-checking sequential circuit design using m-out-of-n codes

    NASA Astrophysics Data System (ADS)

    Busaba, F. Y.; Lala, P. K.

    1993-01-01

    A technique for designing sequential circuits which are totally self-checking for single stuck at faults is presented. This technique uses m-out-of-n codes for state assignments and for output encoding. The next stage logic and the output logic are implemented such that any stuck-at-fault will either create a single bit error or unidirectional multibit error at the output. The technique has been applied to MCNC benchmark circuits and the overhead is estimated.

  9. Direction-Selective Circuits Shape Noise to Ensure a Precise Population Code.

    PubMed

    Zylberberg, Joel; Cafaro, Jon; Turner, Maxwell H; Shea-Brown, Eric; Rieke, Fred

    2016-01-20

    Neural responses are noisy, and circuit structure can correlate this noise across neurons. Theoretical studies show that noise correlations can have diverse effects on population coding, but these studies rarely explore stimulus dependence of noise correlations. Here, we show that noise correlations in responses of ON-OFF direction-selective retinal ganglion cells are strongly stimulus dependent, and we uncover the circuit mechanisms producing this stimulus dependence. A population model based on these mechanistic studies shows that stimulus-dependent noise correlations improve the encoding of motion direction 2-fold compared to independent noise. This work demonstrates a mechanism by which a neural circuit effectively shapes its signal and noise in concert, minimizing corruption of signal by noise. Finally, we generalize our findings beyond direction coding in the retina and show that stimulus-dependent correlations will generally enhance information coding in populations of diversely tuned neurons. PMID:26796691

  10. Development of a numerical computer code and circuit element models for simulation of firing systems

    SciTech Connect

    Carpenter, K.H. . Dept. of Electrical and Computer Engineering)

    1990-07-02

    Numerical simulation of firing systems requires both the appropriate circuit analysis framework and the special element models required by the application. We have modified the SPICE circuit analysis code (version 2G.6), developed originally at the Electronic Research Laboratory of the University of California, Berkeley, to allow it to be used on MSDOS-based, personal computers and to give it two additional circuit elements needed by firing systems--fuses and saturating inductances. An interactive editor and a batch driver have been written to ease the use of the SPICE program by system designers, and the interactive graphical post processor, NUTMEG, supplied by U. C. Berkeley with SPICE version 3B1, has been interfaced to the output from the modified SPICE. Documentation and installation aids have been provided to make the total software system accessible to PC users. Sample problems show that the resulting code is in agreement with the FIRESET code on which the fuse model was based (with some modifications to the dynamics of scaling fuse parameters). In order to allow for more complex simulations of firing systems, studies have been made of additional special circuit elements--switches and ferrite cored inductances. A simple switch model has been investigated which promises to give at least a first approximation to the physical effects of a non ideal switch, and which can be added to the existing SPICE circuits without changing the SPICE code itself. The effect of fast rise time pulses on ferrites has been studied experimentally in order to provide a base for future modeling and incorporation of the dynamic effects of changes in core magnetization into the SPICE code. This report contains detailed accounts of the work on these topics performed during the period it covers, and has appendices listing all source code written documentation produced.

  11. SPOCK: A SPICE based circuit code for modeling pulsed power machines

    SciTech Connect

    Ingermanson, R.; Parks, D.

    1996-12-31

    SPICE is an industry standard electrical circuit simulation code developed by the University of California at Berkeley over the last twenty years. The authors have developed a number of new SPICE devices of interest to the pulsed power community: plasma opening switches, plasma radiation sources, bremsstrahlung diodes, magnetically insulated transmission lines, explosively driven flux compressors. These new devices are integrated into SPICE using S-Cubed`s MIRIAD technology to create a user-friendly circuit code that runs on Unix workstations or under Windows NT or Windows 95. The new circuit code is called SPOCK--``S-Cubed Power Optimizing Circuit Kit.`` SPOCK allows the user to easily run optimization studies by setting up runs in which any circuit parameters can be systematically varied. Results can be plotted as 1-D line plots, 2-D contour plots, or 3-D ``bedsheet`` plots. The authors demonstrate SPOCK`s capabilities on a color laptop computer, performing realtime analysis of typical configurations of such machines as HAWK and ACE4.

  12. Simultaneous potential and circuit solution for 1D bounded plasma particle simulation codes

    SciTech Connect

    Verboncoeur, J.P.; Vahedi, V.; Birdsall, C.K. ); Alves, M.V. , S.J. dos Campos )

    1993-02-01

    A general second-order accurate method for solving the combined potential and circuit equations in a one-dimensional electrostatic bounded plasma PIC simulation is presented. The boundary conditions include surface charge on the electrodes, which are connected to a series RLC circuit with driving terms V(t) or l(t). The solution is obtained for planar, cylindrical, and spherical electrodes. The result is a tridiagonal matrix which is readily solved using well-known methods. The method is implemented in the codes PDPL (plasma device planar 1 D), PDC1 (cylindrical), and PDS1 (spherical).

  13. Simultaneous potential and circuit solution for bounded plasma particle simulation codes

    SciTech Connect

    Verboncoeur, J.P.; Alves, M.V.; Vahedi, V.

    1990-08-07

    A second-order accurate method for solving the combined potential and circuit equations in an electrostatic bounded plasma PIC simulation is presented. The boundary conditions include surface charge on the electrodes, which are connected to a series RLC circuit with driving terms V(t) and I(t). The solution is obtained for planar, cylindrical, and spherical electrodes. The result is a tridiagonal matrix which is readily solved using well-known methods. The method is implemented in the codes PDP1 (Plasma Device Planar 1D), PDC1 (Cylindrical), and PDS1 (Spherical). 11 refs., 10 figs.

  14. Superconducting quantum circuits at the surface code threshold for fault tolerance.

    PubMed

    Barends, R; Kelly, J; Megrant, A; Veitia, A; Sank, D; Jeffrey, E; White, T C; Mutus, J; Fowler, A G; Campbell, B; Chen, Y; Chen, Z; Chiaro, B; Dunsworth, A; Neill, C; O'Malley, P; Roushan, P; Vainsencher, A; Wenner, J; Korotkov, A N; Cleland, A N; Martinis, John M

    2014-04-24

    A quantum computer can solve hard problems, such as prime factoring, database searching and quantum simulation, at the cost of needing to protect fragile quantum states from error. Quantum error correction provides this protection by distributing a logical state among many physical quantum bits (qubits) by means of quantum entanglement. Superconductivity is a useful phenomenon in this regard, because it allows the construction of large quantum circuits and is compatible with microfabrication. For superconducting qubits, the surface code approach to quantum computing is a natural choice for error correction, because it uses only nearest-neighbour coupling and rapidly cycled entangling gates. The gate fidelity requirements are modest: the per-step fidelity threshold is only about 99 per cent. Here we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92 per cent and a two-qubit gate fidelity of up to 99.4 per cent. This places Josephson quantum computing at the fault-tolerance threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger-Horne-Zeilinger state using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits. PMID:24759412

  15. Traveling-wave-tube simulation: The IBC (Interactive Beam-Circuit) code

    SciTech Connect

    Morey, I.J.; Birdsall, C.K.

    1989-09-26

    Interactive Beam-Circuit (IBC) is a one-dimensional many particle simulation code which has been developed to run interactively on a PC or Workstation, and displaying most of the important physics of a traveling-wave-tube. The code is a substantial departure from previous efforts, since it follows all of the particles in the tube, rather than just those in one wavelength, as commonly done. This step allows for nonperiodic inputs in time, a nonuniform line and a large set of spatial diagnostics. The primary aim is to complement a microwave tube lecture course, although past experience has shown that such codes readily become research tools. Simple finite difference methods are used to model the fields of the coupled slow-wave transmission line. The coupling between the beam and the transmission line is based upon the finite difference equations of Brillouin. The space-charge effects are included, in a manner similar to that used by Hess; the original part is use of particle-in-cell techniques to model the space-charge fields. 11 refs., 11 figs.

  16. Spatial information outflow from the hippocampal circuit: distributed spatial coding and phase precession in the subiculum

    PubMed Central

    Kim, Steve M.; Ganguli, Surya; Frank, Loren M.

    2012-01-01

    Hippocampal place cells convey spatial information through a combination of spatially-selective firing and theta phase precession. The way in which this information influences regions like the subiculum that receive input from the hippocampus remains unclear. The subiculum receives direct inputs from area CA1 of the hippocampus and sends divergent output projections to many other parts of the brain, so we examined the firing patterns of rat subicular neurons. We found a substantial transformation in the subicular code for space from sparse to dense firing rate representations along a proximal-distal anatomical gradient: neurons in the proximal subiculum are more similar to canonical, sparsely firing hippocampal place cells, whereas neurons in the distal subiculum have higher firing rates and more distributed spatial firing patterns. Using information theory, we found that the more distributed spatial representation in the subiculum carries, on average, more information about spatial location and context than the sparse spatial representation in CA1. Remarkably, despite the disparate firing rate properties of subicular neurons, we found that neurons at all proximal-distal locations exhibit robust theta phase precession, with similar spiking oscillation frequencies as neurons in area CA1. Our findings suggest that the subiculum is specialized to compress sparse hippocampal spatial codes into highly informative distributed codes suitable for efficient communication to other brain regions. Moreover, despite this substantial compression, the subiculum maintains finer scale temporal properties that may allow it to participate in oscillatory phase coding and spike timing-dependent plasticity in coordination with other regions of the hippocampal circuit. PMID:22915100

  17. Self-stabilization techniques for intermediate power level in stacked-Vdd integrated circuits using DC-balanced coding methods

    NASA Astrophysics Data System (ADS)

    Kohara, Yusuke; Kubo, Naoya; Nishiyama, Tomofumi; Koizuka, Taiki; Alimudin, Mohammad; Rahmat, Amirul; Okamura, Hitoshi; Yamanokuchi, Tomoyuki; Nakamura, Kazuyuki

    2016-04-01

    Two new parallel bus coding methods for generating a DC-balanced code with additional bits are proposed to achieve the self-stabilization of the intermediate power level in Stacked-Vdd integrated circuits. They contribute to producing a uniform switching current in parallel inputs and outputs (I/Os). Type I coding minimizes the difference in the number of switchings between the upper and lower CMOS I/Os by 8B/10B coding followed by toggle conversion. Type II coding, in which the multi-value running disparity control feature is integrated into the bus-invert coding, requires only one redundant bit for any wider bus. Their DC-balanced feature and the stability effect of the intermediate power level in the Stacked-Vdd structure were experimentally confirmed from the measurement results obtained from the developed test chips.

  18. Application of error correcting codes in fault-tolerant logic design for VLSI circuits

    NASA Astrophysics Data System (ADS)

    Lala, P. K.; Martin, H. L.

    1990-05-01

    It is now generally accepted that not all faults in VLSI logic can be represented by the stuck-at-0 and stuck-at-1 models used at the gate level. In order to ensure realistic modeling, faults should be considered at the transistor level, since only at the level the complete circuit structure is known. In other words, test for circuits should be derived based on possible shorts and opens at the transistor level. A stuck-open or stuck-closed transistor can be modeled by replacing the faulty transistor with an open connection or a direct short respectively between the transistor's source and drain.

  19. Simulation of TunneLadder traveling-wave tube cold-test characteristics: Implementation of the three-dimensional, electromagnetic circuit analysis code micro-SOS

    NASA Technical Reports Server (NTRS)

    Kory, Carol L.; Wilson, Jeffrey D.

    1993-01-01

    The three-dimensional, electromagnetic circuit analysis code, Micro-SOS, can be used to reduce expensive time-consuming experimental 'cold-testing' of traveling-wave tube (TWT) circuits. The frequency-phase dispersion characteristics and beam interaction impedance of a TunneLadder traveling-wave tube slow-wave structure were simulated using the code. When reasonable dimensional adjustments are made, computer results agree closely with experimental data. Modifications to the circuit geometry that would make the TunneLadder TWT easier to fabricate for higher frequency operation are explored.

  20. A phase code for memory could arise from circuit mechanisms in entorhinal cortex

    PubMed Central

    Hasselmo, Michael E.; Brandon, Mark P.; Yoshida, Motoharu; Giocomo, Lisa M.; Heys, James G.; Fransen, Erik; Newman, Ehren L.; Zilli, Eric A.

    2009-01-01

    Neurophysiological data reveals intrinsic cellular properties that suggest how entorhinal cortical neurons could code memory by the phase of their firing. Potential cellular mechanisms for this phase coding in models of entorhinal function are reviewed. This mechanism for phase coding provides a substrate for modeling the responses of entorhinal grid cells, as well as the replay of neural spiking activity during waking and sleep. Efforts to implement these abstract models in more detailed biophysical compartmental simulations raise specific issues that could be addressed in larger scale population models incorporating mechanisms of inhibition. PMID:19656654

  1. Electrical and Optical Activation of Mesoscale Neural Circuits with Implications for Coding

    PubMed Central

    Millard, Daniel C.; Whitmire, Clarissa J.; Gollnick, Clare A.; Rozell, Christopher J.

    2015-01-01

    Artificial activation of neural circuitry through electrical microstimulation and optogenetic techniques is important for both scientific discovery of circuit function and for engineered approaches to alleviate various disorders of the nervous system. However, evidence suggests that neural activity generated by artificial stimuli differs dramatically from normal circuit function, in terms of both the local neuronal population activity at the site of activation and the propagation to downstream brain structures. The precise nature of these differences and the implications for information processing remain unknown. Here, we used voltage-sensitive dye imaging of primary somatosensory cortex in the anesthetized rat in response to deflections of the facial vibrissae and electrical or optogenetic stimulation of thalamic neurons that project directly to the somatosensory cortex. Although the different inputs produced responses that were similar in terms of the average cortical activation, the variability of the cortical response was strikingly different for artificial versus sensory inputs. Furthermore, electrical microstimulation resulted in highly unnatural spatial activation of cortex, whereas optical input resulted in spatial cortical activation that was similar to that induced by sensory inputs. A thalamocortical network model suggested that observed differences could be explained by differences in the way in which artificial and natural inputs modulate the magnitude and synchrony of population activity. Finally, the variability structure in the response for each case strongly influenced the optimal inputs for driving the pathway from the perspective of an ideal observer of cortical activation when considered in the context of information transmission. SIGNIFICANCE STATEMENT Artificial activation of neural circuitry through electrical microstimulation and optogenetic techniques is important for both scientific discovery and clinical translation. However, neural

  2. Dynamic Divisive Normalization Predicts Time-Varying Value Coding in Decision-Related Circuits

    PubMed Central

    LoFaro, Thomas; Webb, Ryan; Glimcher, Paul W.

    2014-01-01

    Normalization is a widespread neural computation, mediating divisive gain control in sensory processing and implementing a context-dependent value code in decision-related frontal and parietal cortices. Although decision-making is a dynamic process with complex temporal characteristics, most models of normalization are time-independent and little is known about the dynamic interaction of normalization and choice. Here, we show that a simple differential equation model of normalization explains the characteristic phasic-sustained pattern of cortical decision activity and predicts specific normalization dynamics: value coding during initial transients, time-varying value modulation, and delayed onset of contextual information. Empirically, we observe these predicted dynamics in saccade-related neurons in monkey lateral intraparietal cortex. Furthermore, such models naturally incorporate a time-weighted average of past activity, implementing an intrinsic reference-dependence in value coding. These results suggest that a single network mechanism can explain both transient and sustained decision activity, emphasizing the importance of a dynamic view of normalization in neural coding. PMID:25429145

  3. Dynamic divisive normalization predicts time-varying value coding in decision-related circuits.

    PubMed

    Louie, Kenway; LoFaro, Thomas; Webb, Ryan; Glimcher, Paul W

    2014-11-26

    Normalization is a widespread neural computation, mediating divisive gain control in sensory processing and implementing a context-dependent value code in decision-related frontal and parietal cortices. Although decision-making is a dynamic process with complex temporal characteristics, most models of normalization are time-independent and little is known about the dynamic interaction of normalization and choice. Here, we show that a simple differential equation model of normalization explains the characteristic phasic-sustained pattern of cortical decision activity and predicts specific normalization dynamics: value coding during initial transients, time-varying value modulation, and delayed onset of contextual information. Empirically, we observe these predicted dynamics in saccade-related neurons in monkey lateral intraparietal cortex. Furthermore, such models naturally incorporate a time-weighted average of past activity, implementing an intrinsic reference-dependence in value coding. These results suggest that a single network mechanism can explain both transient and sustained decision activity, emphasizing the importance of a dynamic view of normalization in neural coding. PMID:25429145

  4. Heat removal (wetting, heat transfer, T/H, secondary circuit, code validation etc.)

    SciTech Connect

    Dury, T.; Siman-Tov, M.

    1996-06-01

    This working group provided a comprehensive list of feasibility and uncertainty issues. Most of the issues seem to fall into the `needed but can be worked out` category. They feel these can be worked out as the project develops. A few issues can be considered critical or feasibility issues (that must be proven to be feasible). Those include: (1) Thermal shock and its mitigation (>1 MW); how to inject the He bubbles (if used) - back pressure into He lines - mercury traces in He lines; how to maintain proper bubble distribution and size (static and dynamic; if used); vibrations and fatigue (dynamic); possibility of cavitation from thermal shock. (2) Wetting and/or non-wetting of mercury on containment walls with or without gases and its effect on heat transfer (and materials). (3) Prediction capabilities in the CFD code; bubbles behavior in mercury (if used) - cross stream turbulence (ESS only) - wetting/non-wetting effects. (4) Cooling of beam `windows`; concentration of local heat deposition at center, especially if beam is of parabolic profile.

  5. Cellular and Circuit Mechanisms Maintain Low Spike Co-Variability and Enhance Population Coding in Somatosensory Cortex

    PubMed Central

    Ly, Cheng; Middleton, Jason W.; Doiron, Brent

    2012-01-01

    The responses of cortical neurons are highly variable across repeated presentations of a stimulus. Understanding this variability is critical for theories of both sensory and motor processing, since response variance affects the accuracy of neural codes. Despite this influence, the cellular and circuit mechanisms that shape the trial-to-trial variability of population responses remain poorly understood. We used a combination of experimental and computational techniques to uncover the mechanisms underlying response variability of populations of pyramidal (E) cells in layer 2/3 of rat whisker barrel cortex. Spike trains recorded from pairs of E-cells during either spontaneous activity or whisker deflected responses show similarly low levels of spiking co-variability, despite large differences in network activation between the two states. We developed network models that show how spike threshold non-linearities dilute E-cell spiking co-variability during spontaneous activity and low velocity whisker deflections. In contrast, during high velocity whisker deflections, cancelation mechanisms mediated by feedforward inhibition maintain low E-cell pairwise co-variability. Thus, the combination of these two mechanisms ensure low E-cell population variability over a wide range of whisker deflection velocities. Finally, we show how this active decorrelation of population variability leads to a drastic increase in the population information about whisker velocity. The prevalence of spiking non-linearities and feedforward inhibition in the nervous system suggests that the mechanisms for low network variability presented in our study may generalize throughout the brain. PMID:22408615

  6. Effects of Secondary Circuit Modeling on Results of Pressurized Water Reactor Main Steam Line Break Benchmark Calculations with New Coupled Code TRAB-3D/SMABRE

    SciTech Connect

    Daavittila, Antti; Haemaelaeinen, Anitta; Kyrki-Rajamaeki, Riitta

    2003-05-15

    All of the three exercises of the Organization for Economic Cooperation and Development/Nuclear Regulatory Commission pressurized water reactor main steam line break (PWR MSLB) benchmark were calculated at VTT, the Technical Research Centre of Finland. For the first exercise, the plant simulation with point-kinetic neutronics, the thermal-hydraulics code SMABRE was used. The second exercise was calculated with the three-dimensional reactor dynamics code TRAB-3D, and the third exercise with the combination TRAB-3D/SMABRE. VTT has over ten years' experience of coupling neutronic and thermal-hydraulic codes, but this benchmark was the first time these two codes, both developed at VTT, were coupled together. The coupled code system is fast and efficient; the total computation time of the 100-s transient in the third exercise was 16 min on a modern UNIX workstation. The results of all the exercises are similar to those of the other participants. In order to demonstrate the effect of secondary circuit modeling on the results, three different cases were calculated. In case 1 there is no phase separation in the steam lines and no flow reversal in the aspirator. In case 2 the flow reversal in the aspirator is allowed, but there is no phase separation in the steam lines. Finally, in case 3 the drift-flux model is used for the phase separation in the steam lines, but the aspirator flow reversal is not allowed. With these two modeling variations, it is possible to cover a remarkably broad range of results. The maximum power level reached after the reactor trip varies from 534 to 904 MW, the range of the time of the power maximum being close to 30 s. Compared to the total calculated transient time of 100 s, the effect of the secondary side modeling is extremely important.

  7. TWO-PHASE FLOW STUDIES IN NUCLEAR POWER PLANT PRIMARY CIRCUITS USING THE THREE-DIMENSIONAL THERMAL-HYDRAULIC CODE BAGIRA.

    SciTech Connect

    KOHURT, P. , KALINICHENKO, S.D.; KROSHILIN, A.E.; KROSHILIN, V.E.; SMIRNOV, A.V.

    2006-06-04

    In this paper we present recent results of the application of the thermal-hydraulic code BAGIRA to the analysis of complex two-phase flows in nuclear power plants primary loops. In particular, we performed benchmark numerical simulation of an integral LOCA experiment performed on a test facility modeling the primary circuit of VVER-1000. In addition, we have also analyzed the flow patterns in the VVER-1000 steam generator vessel for stationary and transient operation regimes. For both of these experiments we have compared the numerical results with measured data. Finally, we demonstrate the capabilities of BAGIRA by modeling a hypothetical severe accident for a VVER-1000 type nuclear reactor. The numerical analysis, which modeled all stages of the hypothetical severe accident up to the complete ablation of the reactor cavity bottom, shows the importance of multi-dimensional flow effects.

  8. Measuring circuit

    DOEpatents

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  9. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization. PMID:27034378

  10. Hybrid temperature-monitoring circuit

    NASA Technical Reports Server (NTRS)

    Rinard, G. A.; Steffen, D. A.; Sturm, R. E.

    1979-01-01

    Hybrid circuit developed for use in hand-held vital signs monitor converts resistance of thermistor probe to 3 1/2 digit BCD (binary-coded-decimal) temperature readout. If used alone circuit can form 'stand alone' temperature monitor or can transmit temperature data via telemetry to data acquisition systems.

  11. ADDER CIRCUIT

    DOEpatents

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  12. GATING CIRCUITS

    DOEpatents

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  13. MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  14. TRIPPING CIRCUIT

    DOEpatents

    Lees, G.W.; McCormick, E.D.

    1962-05-22

    A tripping circuit employing a magnetic amplifier for tripping a reactor in response to power level, period, or instrument failure is described. A reference winding and signal winding are wound in opposite directions on the core. Current from an ion chamber passes through both windings. If the current increases at too fast a rate, a shunt circuit bypasses one or the windings and the amplifier output reverses polarity. (AEC)

  15. MULTIPLIER CIRCUIT

    DOEpatents

    Chase, R.L.

    1963-05-01

    An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

  16. Circuit Training.

    ERIC Educational Resources Information Center

    Nelson, Jane B.

    1998-01-01

    Describes a research-based activity for high school physics students in which they build an LC circuit and find its resonant frequency of oscillation using an oscilloscope. Includes a diagram of the apparatus and an explanation of the procedures. (DDR)

  17. Circuit Connectors

    NASA Technical Reports Server (NTRS)

    1979-01-01

    The U-shaped wire devices in the upper photo are Digi-Klipsm; aids to compact packaging of electrical and electronic devices. They serve as connectors linking the circuitry of one circuit board with another in multi-board systems. Digi-Klips were originally developed for Goddard Space Flight Center to meet a need for lightweight, reliable connectors to replace hand-wired connections formerly used in spacecraft. They are made of beryllium copper wire, noted for its excellent conductivity and its spring-like properties, which assure solid electrical contact over a long period of time.

  18. LOGIC CIRCUIT

    DOEpatents

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  19. Thermionic integrated circuit program: Final report

    SciTech Connect

    Wilde, D.K.; Lynn, D.K.; Hamilton, D.

    1988-05-01

    This report describes the development of an operational amplifier using radiation hardened Thermionic Integrated Circuits (TICs). The report is written as a tutorial to cover all aspects of the fabrication process and circuit development as well as the process and circuit modifications required to meet the integration requirements of the operational amplifier. Recent experimental results are discussed in which both devices and test circuit data are compared to theoretical computer code predictions. The development of compatible high-temperature thin-film resistors is also presented. Because the project is being terminated prior to the completion of the amplifier, suggestions are made for additional advance development.

  20. Circuit design tool. User's manual, revision 2

    NASA Technical Reports Server (NTRS)

    Miyake, Keith M.; Smith, Donald E.

    1992-01-01

    The CAM chip design was produced in a UNIX software environment using a design tool that supports definition of digital electronic modules, composition of these modules into higher level circuits, and event-driven simulation of these circuits. Our design tool provides an interface whose goals include straightforward but flexible primitive module definition and circuit composition, efficient simulation, and a debugging environment that facilitates design verification and alteration. The tool provides a set of primitive modules which can be composed into higher level circuits. Each module is a C-language subroutine that uses a set of interface protocols understood by the design tool. Primitives can be altered simply by recoding their C-code image; in addition new primitives can be added allowing higher level circuits to be described in C-code rather than as a composition of primitive modules--this feature can greatly enhance the speed of simulation.

  1. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  2. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, W.J.

    1981-11-10

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

  3. A simple tachometer circuit

    NASA Technical Reports Server (NTRS)

    Dimeff, J.

    1972-01-01

    Electric circuit to measure frequency of repetitive sinusoidal or rectangular wave is presented. Components of electric circuit and method of operation are explained. Application of circuit as tachometer for automobile is discussed.

  4. Photomultiplier blanking circuit

    NASA Technical Reports Server (NTRS)

    Mcclenahan, J. O.

    1972-01-01

    Circuit for protecting photomultiplier equipment from current surges which occur when exposed to brilliant illumination is discussed. Components of circuit and details of operation are provided. Circuit diagram to show action of blanking pulse on zener diode is included.

  5. Decoupling with Random Quantum Circuits

    NASA Astrophysics Data System (ADS)

    Brown, Winton; Fawzi, Omar

    2015-12-01

    Decoupling has become a central concept in quantum information theory, with applications including proving coding theorems, randomness extraction and the study of conditions for reaching thermal equilibrium. However, our understanding of the dynamics that lead to decoupling is limited. In fact, the only families of transformations that are known to lead to decoupling are (approximate) unitary two-designs, i.e., measures over the unitary group that behave like the Haar measure as far as the first two moments are concerned. Such families include for example random quantum circuits with O( n 2) gates, where n is the number of qubits in the system under consideration. In fact, all known constructions of decoupling circuits use Ω( n 2) gates. Here, we prove that random quantum circuits with O( n log2 n) gates satisfy an essentially optimal decoupling theorem. In addition, these circuits can be implemented in depth O(log3 n). This proves that decoupling can happen in a time that scales polylogarithmically in the number of particles in the system, provided all the particles are allowed to interact. Our proof does not proceed by showing that such circuits are approximate two-designs in the usual sense, but rather we directly analyze the decoupling property.

  6. Charge regulation circuit

    DOEpatents

    Ball, Don G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply in the range of 0.01%. The charge regulation circuit is utilized in a preferred embodiment in providing regulated voltage for controlling the operation of a laser.

  7. Linear integrated circuits

    NASA Astrophysics Data System (ADS)

    Young, T.

    This book is intended to be used as a textbook in a one-semester course at a variety of levels. Because of self-study features incorporated, it may also be used by practicing electronic engineers as a formal and thorough introduction to the subject. The distinction between linear and digital integrated circuits is discussed, taking into account digital and linear signal characteristics, linear and digital integrated circuit characteristics, the definitions for linear and digital circuits, applications of digital and linear integrated circuits, aspects of fabrication, packaging, and classification and numbering. Operational amplifiers are considered along with linear integrated circuit (LIC) power requirements and power supplies, voltage and current regulators, linear amplifiers, linear integrated circuit oscillators, wave-shaping circuits, active filters, DA and AD converters, demodulators, comparators, instrument amplifiers, current difference amplifiers, analog circuits and devices, and aspects of troubleshooting.

  8. Electrical Circuits and Water Analogies

    ERIC Educational Resources Information Center

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  9. Sense circuit arrangement

    NASA Technical Reports Server (NTRS)

    Bohning, Oliver D. (Inventor)

    1976-01-01

    A unique, two-node sense circuit is disclosed. The circuit includes a bridge comprised of resistance elements and a differential amplifier. The two-node circuit is suitably adapted to be arranged in an array comprised of a plurality of discrete bridge-amplifiers which can be selectively energized. The circuit is arranged so as to form a configuration with minimum power utilization and a reduced number of components and interconnections therebetween.

  10. Parallel algorithm strategies for circuit simulation.

    SciTech Connect

    Thornquist, Heidi K.; Schiek, Richard Louis; Keiter, Eric Richard

    2010-01-01

    Circuit simulation tools (e.g., SPICE) have become invaluable in the development and design of electronic circuits. However, they have been pushed to their performance limits in addressing circuit design challenges that come from the technology drivers of smaller feature scales and higher integration. Improving the performance of circuit simulation tools through exploiting new opportunities in widely-available multi-processor architectures is a logical next step. Unfortunately, not all traditional simulation applications are inherently parallel, and quickly adapting mature application codes (even codes designed to parallel applications) to new parallel paradigms can be prohibitively difficult. In general, performance is influenced by many choices: hardware platform, runtime environment, languages and compilers used, algorithm choice and implementation, and more. In this complicated environment, the use of mini-applications small self-contained proxies for real applications is an excellent approach for rapidly exploring the parameter space of all these choices. In this report we present a multi-core performance study of Xyce, a transistor-level circuit simulation tool, and describe the future development of a mini-application for circuit simulation.

  11. Piezoelectric drive circuit

    DOEpatents

    Treu, C.A. Jr.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

  12. Piezoelectric drive circuit

    DOEpatents

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  13. CIRCUITS FOR CURRENT MEASUREMENTS

    DOEpatents

    Cox, R.J.

    1958-11-01

    Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

  14. Doubled Color Codes

    NASA Astrophysics Data System (ADS)

    Bravyi, Sergey

    Combining protection from noise and computational universality is one of the biggest challenges in the fault-tolerant quantum computing. Topological stabilizer codes such as the 2D surface code can tolerate a high level of noise but implementing logical gates, especially non-Clifford ones, requires a prohibitively large overhead due to the need of state distillation. In this talk I will describe a new family of 2D quantum error correcting codes that enable a transversal implementation of all logical gates required for the universal quantum computing. Transversal logical gates (TLG) are encoded operations that can be realized by applying some single-qubit rotation to each physical qubit. TLG are highly desirable since they introduce no overhead and do not spread errors. It has been known before that a quantum code can have only a finite number of TLGs which rules out computational universality. Our scheme circumvents this no-go result by combining TLGs of two different quantum codes using the gauge-fixing method pioneered by Paetznick and Reichardt. The first code, closely related to the 2D color code, enables a transversal implementation of all single-qubit Clifford gates such as the Hadamard gate and the π / 2 phase shift. The second code that we call a doubled color code provides a transversal T-gate, where T is the π / 4 phase shift. The Clifford+T gate set is known to be computationally universal. The two codes can be laid out on the honeycomb lattice with two qubits per site such that the code conversion requires parity measurements for six-qubit Pauli operators supported on faces of the lattice. I will also describe numerical simulations of logical Clifford+T circuits encoded by the distance-3 doubled color code. Based on a joint work with Andrew Cross.

  15. Source circuit design considerations

    NASA Astrophysics Data System (ADS)

    Noel, G. T.

    1983-11-01

    The cost of several circuit configurations for large (5MW) array fields were investigated to assess the relative costs of high and low voltage configurations. Three source circuit NOC voltages were evaluated: 400V (ungrounded), 800V (+ or 400V center grounded), and 2000V (+ or - 1000V center grounded). Four source circuit configurations were considered for each of the three NOC voltages. The configurations correspond to source circuit currents of 15, 30, 45, and 60 amperes, respectively. Conceptual layouts for 5MW building blocks for each of the above configurations were developed. The designs were optimized to minimize BOS electrical and structural costs. Only the BOS electrical costs were evaluated. The designs were broken down into the following elements for cost: (1) basic source circuit intermodule wiring, bypass diodes and associated hardware, source circuit to J-Box wiring, etc; (2) J-Box blocking diodes, varistors, heat sinks, and housing; (3) disconnects source circuit disconnects, fuses, and housing; (4) bus cabling J-Box to PCU interface wiring, and trenching; (5) interface bus bar, group disconnects, and fuses; and (6) fault detection shunts, signal wire, electronics, and alarm. It is concluded that high voltage low current circuits are not economical, at higher currents high and low voltage circuit costs approach each other, high voltage circuits are not likely to offer near term advantage, and development work/manufacturer stimulation is needed to develop low cost high voltage hardware.

  16. Source circuit design considerations

    NASA Technical Reports Server (NTRS)

    Noel, G. T.

    1983-01-01

    The cost of several circuit configurations for large (5MW) array fields were investigated to assess the relative costs of high and low voltage configurations. Three source circuit NOC voltages were evaluated: 400V (ungrounded), 800V (+ or 400V center grounded), and 2000V (+ or - 1000V center grounded). Four source circuit configurations were considered for each of the three NOC voltages. The configurations correspond to source circuit currents of 15, 30, 45, and 60 amperes, respectively. Conceptual layouts for 5MW building blocks for each of the above configurations were developed. The designs were optimized to minimize BOS electrical and structural costs. Only the BOS electrical costs were evaluated. The designs were broken down into the following elements for cost: (1) basic source circuit intermodule wiring, bypass diodes and associated hardware, source circuit to J-Box wiring, etc; (2) J-Box blocking diodes, varistors, heat sinks, and housing; (3) disconnects source circuit disconnects, fuses, and housing; (4) bus cabling J-Box to PCU interface wiring, and trenching; (5) interface bus bar, group disconnects, and fuses; and (6) fault detection shunts, signal wire, electronics, and alarm. It is concluded that high voltage low current circuits are not economical, at higher currents high and low voltage circuit costs approach each other, high voltage circuits are not likely to offer near term advantage, and development work/manufacturer stimulation is needed to develop low cost high voltage hardware.

  17. Clinical coding. Code breakers.

    PubMed

    Mathieson, Steve

    2005-02-24

    --The advent of payment by results has seen the role of the clinical coder pushed to the fore in England. --Examinations for a clinical coding qualification began in 1999. In 2004, approximately 200 people took the qualification. --Trusts are attracting people to the role by offering training from scratch or through modern apprenticeships. PMID:15768716

  18. Sensor Authentication: Embedded Processor Code

    SciTech Connect

    Svoboda, John

    2012-09-25

    Described is the c code running on the embedded Microchip 32bit PIC32MX575F256H located on the INL developed noise analysis circuit board. The code performs the following functions: Controls the noise analysis circuit board preamplifier voltage gains of 1, 10, 100, 000 Initializes the analog to digital conversion hardware, input channel selection, Fast Fourier Transform (FFT) function, USB communications interface, and internal memory allocations Initiates high resolution 4096 point 200 kHz data acquisition Computes complex 2048 point FFT and FFT magnitude. Services Host command set Transfers raw data to Host Transfers FFT result to host Communication error checking

  19. Shift register generators and applications to coding

    NASA Technical Reports Server (NTRS)

    Morakis, J. C.

    1968-01-01

    The most important properties of shift register generated sequences are exposed. The application of shift registers as multiplication and division circuits leads to the generation of some error correcting and detecting codes.

  20. [Shunt and short circuit].

    PubMed

    Rangel-Abundis, Alberto

    2006-01-01

    Shunt and short circuit are antonyms. In French, the term shunt has been adopted to denote the alternative pathway of blood flow. However, in French, as well as in Spanish, the word short circuit (court-circuit and cortocircuito) is synonymous with shunt, giving rise to a linguistic and scientific inconsistency. Scientific because shunt and short circuit made reference to a phenomenon that occurs in the field of the physics. Because shunt and short circuit are antonyms, it is necessary to clarify that shunt is an alternative pathway of flow from a net of high resistance to a net of low resistance, maintaining the stream. Short circuit is the interruption of the flow, because a high resistance impeaches the flood. This concept is applied to electrical and cardiovascular physiology, as well as to the metabolic pathways. PMID:17257492

  1. Automatic circuit interrupter

    NASA Technical Reports Server (NTRS)

    Dwinell, W. S.

    1979-01-01

    In technique, voice circuits connecting crew's cabin to launch station through umbilical connector disconnect automatically unused, or deadened portion of circuits immediately after vehicle is launched, eliminating possibility that unused wiring interferes with voice communications inside vehicle or need for manual cutoff switch and its associated wiring. Technique is applied to other types of electrical actuation circuits, also launch of mapped vehicles, such as balloons, submarines, test sleds, and test chambers-all requiring assistance of ground crew.

  2. Regenerative feedback resonant circuit

    DOEpatents

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  3. Remote reset circuit

    DOEpatents

    Gritzo, R.E.

    1985-09-12

    A remote reset circuit acts as a stand-along monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients. 4 figs.

  4. Remote reset circuit

    DOEpatents

    Gritzo, Russell E.

    1987-01-01

    A remote reset circuit acts as a stand-alone monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients.

  5. Printed circuit board industry.

    PubMed

    LaDou, Joseph

    2006-05-01

    The printed circuit board is the platform upon which microelectronic components such as semiconductor chips and capacitors are mounted. It provides the electrical interconnections between components and is found in virtually all electronics products. Once considered low technology, the printed circuit board is evolving into a high-technology product. Printed circuit board manufacturing is highly complicated, requiring large equipment investments and over 50 process steps. Many of the high-speed, miniaturized printed circuit boards are now manufactured in cleanrooms with the same health and safety problems posed by other microelectronics manufacturing. Asia produces three-fourths of the world's printed circuit boards. In Asian countries, glycol ethers are the major solvents used in the printed circuit board industry. Large quantities of hazardous chemicals such as formaldehyde, dimethylformamide, and lead are used by the printed circuit board industry. For decades, chemically intensive and often sloppy manufacturing processes exposed tens of thousands of workers to a large number of chemicals that are now known to be reproductive toxicants and carcinogens. The printed circuit board industry has exposed workers to high doses of toxic metals, solvents, acids, and photolithographic chemicals. Only recently has there been any serious effort to diminish the quantity of lead distributed worldwide by the printed circuit board industry. Billions of electronics products have been discarded in every region of the world. This paper summarizes recent regulatory and enforcement efforts. PMID:16580876

  6. Spring Break: A Lesson in Circuits. "This Old House" College Style.

    ERIC Educational Resources Information Center

    Duch, Barbara

    2001-01-01

    Introduces students to the topics of electricity and circuits within the context of house wiring. Explores the properties of series and parallel circuits, researches local wiring codes, calculates the current used by appliances based on their power ratings, and designs circuits in a typical kitchen. (Author/ASK)

  7. Liquid detection circuit

    DOEpatents

    Regan, Thomas O.

    1987-01-01

    Herein is a circuit which is capable of detecting the presence of liquids, especially cryogenic liquids, and whose sensor will not overheat in a vacuum. The circuit parameters, however, can be adjusted to work with any liquid over a wide range of temperatures.

  8. Understanding Simple Circuits

    ERIC Educational Resources Information Center

    Mant, Jenny; Wilson, Helen

    2007-01-01

    Many envisage electricity as the "power" to "do things." They know that electricity needs "circuits" and that something is "flowing" in the circuits, but they are not sure what or why. Words such as "current" and "voltage" are part of electricity but their meaning, and the difference between them, is not always clear. In this article, the authors…

  9. A Virtual Circuits Lab

    ERIC Educational Resources Information Center

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  10. Parasitic suppressing circuit

    NASA Technical Reports Server (NTRS)

    Fowler, J. T.; Raposa, F. L. (Inventor)

    1973-01-01

    A circuit for suppressing parasitic oscillations across an inductor operating in a resonant mode is described. The circuit includes a switch means and resistive means connected serially across the inductor. A unidirectional resistive-capacitive network is also connected across the inductor and to the switch means to automatically render the switch means conducting when inductive current through the inductor ceases to flow.

  11. Amplifier improvement circuit

    NASA Technical Reports Server (NTRS)

    Sturman, J.

    1968-01-01

    Stable input stage was designed for the use with a integrated circuit operational amplifier to provide improved performance as an instrumentation-type amplifier. The circuit provides high input impedance, stable gain, good common mode rejection, very low drift, and low output impedance.

  12. Computer circuit card puller

    NASA Technical Reports Server (NTRS)

    Sawyer, R. V.; Szuwalski, B. (Inventor)

    1981-01-01

    The invention generally relates to hand tools, and more particularly to an improved device for facilitating removal of printed circuit cards from a card rack characterized by longitudinal side rails arranged in a mutually spaced parallelism and a plurality of printed circuit cards extended between the rails of the rack.

  13. Completing a Simple Circuit.

    ERIC Educational Resources Information Center

    Slater, Timothy F.; Adams, Jeffrey P.; Brown, Thomas R.

    2000-01-01

    Students have problems successfully arranging an electric circuit to make the bulb produce light. Investigates the percentage of students able to complete a circuit with a given apparatus, and the effects of prior experience on student success. Recommends hands-on activities at the elementary and secondary school levels. (Contains 14 references.)…

  14. Multiplier less high-speed squaring circuit for binary numbers

    NASA Astrophysics Data System (ADS)

    Sethi, Kabiraj; Panda, Rutuparna

    2015-03-01

    The squaring operation is important in many applications in signal processing, cryptography etc. In general, squaring circuits reported in the literature use fast multipliers. A novel idea of a squaring circuit without using multipliers is proposed in this paper. Ancient Indian method used for squaring decimal numbers is extended here for binary numbers. The key to our success is that no multiplier is used. Instead, one squaring circuit is used. The hardware architecture of the proposed squaring circuit is presented. The design is coded in VHDL and synthesised and simulated in Xilinx ISE Design Suite 10.1 (Xilinx Inc., San Jose, CA, USA). It is implemented in Xilinx Vertex 4vls15sf363-12 device (Xilinx Inc.). The results in terms of time delay and area is compared with both modified Booth's algorithm and squaring circuit using Vedic multipliers. Our proposed squaring circuit seems to have better performance in terms of both speed and area.

  15. Thermocouple-Signal-Conditioning Circuit

    NASA Technical Reports Server (NTRS)

    Simon, Richard A.

    1991-01-01

    Thermocouple-signal-conditioning circuit acting in conjunction with thermocouple, exhibits electrical behavior of voltage in series with resistance. Combination part of input bridge circuit of controller. Circuit configured for either of two specific applications by selection of alternative resistances and supply voltages. Includes alarm circuit detecting open circuit in thermocouple and provides off-scale output to signal malfunctions.

  16. Compensated gain control circuit for buck regulator command charge circuit

    DOEpatents

    Barrett, David M.

    1996-01-01

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

  17. Compensated gain control circuit for buck regulator command charge circuit

    DOEpatents

    Barrett, D.M.

    1996-11-05

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

  18. Sensor readout detector circuit

    DOEpatents

    Chu, D.D.; Thelen, D.C. Jr.

    1998-08-11

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

  19. Sensor readout detector circuit

    DOEpatents

    Chu, Dahlon D.; Thelen, Jr., Donald C.

    1998-01-01

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

  20. Polymorphic Electronic Circuits

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian

    2004-01-01

    Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

  1. Approximate circuits for increased reliability

    SciTech Connect

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  2. Approximate circuits for increased reliability

    SciTech Connect

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  3. DIFFERENTIAL FAULT SENSING CIRCUIT

    DOEpatents

    Roberts, J.H.

    1961-09-01

    A differential fault sensing circuit is designed for detecting arcing in high-voltage vacuum tubes arranged in parallel. A circuit is provided which senses differences in voltages appearing between corresponding elements likely to fault. Sensitivity of the circuit is adjusted to some level above which arcing will cause detectable differences in voltage. For particular corresponding elements, a group of pulse transformers are connected in parallel with diodes connected across the secondaries thereof so that only voltage excursions are transmitted to a thyratron which is biased to the sensitivity level mentioned.

  4. Gallium Arsenide Domino Circuit

    NASA Technical Reports Server (NTRS)

    Yang, Long; Long, Stephen I.

    1990-01-01

    Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.

  5. Atemporal diagrams for quantum circuits

    SciTech Connect

    Griffiths, Robert B.; Wu Shengjun; Yu Li; Cohen, Scott M.

    2006-05-15

    A system of diagrams is introduced that allows the representation of various elements of a quantum circuit, including measurements, in a form which makes no reference to time (hence 'atemporal'). It can be used to relate quantum dynamical properties to those of entangled states (map-state duality), and suggests useful analogies, such as the inverse of an entangled ket. Diagrams clarify the role of channel kets, transition operators, dynamical operators (matrices), and Kraus rank for noisy quantum channels. Positive (semidefinite) operators are represented by diagrams with a symmetry that aids in understanding their connection with completely positive maps. The diagrams are used to analyze standard teleportation and dense coding, and for a careful study of unambiguous (conclusive) teleportation. A simple diagrammatic argument shows that a Kraus rank of 3 is impossible for a one-qubit channel modeled using a one-qubit environment in a mixed state.

  6. Pulse code modulated signal synchronizer

    NASA Technical Reports Server (NTRS)

    Kobayashi, H. S. (Inventor)

    1974-01-01

    A bit synchronizer for a split phase PCM transmission is reported that includes three loop circuits which receive incoming phase coded PCM signals. In the first loop, called a Q-loop, a generated, phase coded, PCM signal is multiplied with the incoming signals, and the frequency and phase of the generated signal are nulled to that of the incoming subcarrier signal. In the second loop, called a B-loop, a circuit multiplies a generated signal with incoming signals to null the phase of the generated signal in a bit phase locked relationship to the incoming signal. In a third loop, called the I-loop, a phase coded PCM signal is multiplied with the incoming signals for decoding the bit information from the PCM signal. A counter means is used for timing of the generated signals and timing of sample intervals for each bit period.

  7. Power supply conditioning circuit

    NASA Technical Reports Server (NTRS)

    Primas, Lori E. (Inventor); Loveland, Rohan C. (Inventor)

    1988-01-01

    A conditioning circuit is provided with a constant current diode in series with a zener diode, the former having a high dynamic impedance and the latter a low dynamic impedance. The constant current diode can receive an input voltage with PARD. In conjunction with the zener diode fixed to a ground, a voltage divider is provided which can give an output voltage whose PARD was significantly reduced. The conditioning circuit is effective down to dc.

  8. Speech coding

    NASA Astrophysics Data System (ADS)

    Gersho, Allen

    1990-05-01

    Recent advances in algorithms and techniques for speech coding now permit high quality voice reproduction at remarkably low bit rates. The advent of powerful single-ship signal processors has made it cost effective to implement these new and sophisticated speech coding algorithms for many important applications in voice communication and storage. Some of the main ideas underlying the algorithms of major interest today are reviewed. The concept of removing redundancy by linear prediction is reviewed, first in the context of predictive quantization or DPCM. Then linear predictive coding, adaptive predictive coding, and vector quantization are discussed. The concepts of excitation coding via analysis-by-synthesis, vector sum excitation codebooks, and adaptive postfiltering are explained. The main idea of vector excitation coding (VXC) or code excited linear prediction (CELP) are presented. Finally low-delay VXC coding and phonetic segmentation for VXC are described.

  9. Error coding simulations

    NASA Technical Reports Server (NTRS)

    Noble, Viveca K.

    1993-01-01

    There are various elements such as radio frequency interference (RFI) which may induce errors in data being transmitted via a satellite communication link. When a transmission is affected by interference or other error-causing elements, the transmitted data becomes indecipherable. It becomes necessary to implement techniques to recover from these disturbances. The objective of this research is to develop software which simulates error control circuits and evaluate the performance of these modules in various bit error rate environments. The results of the evaluation provide the engineer with information which helps determine the optimal error control scheme. The Consultative Committee for Space Data Systems (CCSDS) recommends the use of Reed-Solomon (RS) and convolutional encoders and Viterbi and RS decoders for error correction. The use of forward error correction techniques greatly reduces the received signal to noise needed for a certain desired bit error rate. The use of concatenated coding, e.g. inner convolutional code and outer RS code, provides even greater coding gain. The 16-bit cyclic redundancy check (CRC) code is recommended by CCSDS for error detection.

  10. Error coding simulations

    NASA Astrophysics Data System (ADS)

    Noble, Viveca K.

    1993-11-01

    There are various elements such as radio frequency interference (RFI) which may induce errors in data being transmitted via a satellite communication link. When a transmission is affected by interference or other error-causing elements, the transmitted data becomes indecipherable. It becomes necessary to implement techniques to recover from these disturbances. The objective of this research is to develop software which simulates error control circuits and evaluate the performance of these modules in various bit error rate environments. The results of the evaluation provide the engineer with information which helps determine the optimal error control scheme. The Consultative Committee for Space Data Systems (CCSDS) recommends the use of Reed-Solomon (RS) and convolutional encoders and Viterbi and RS decoders for error correction. The use of forward error correction techniques greatly reduces the received signal to noise needed for a certain desired bit error rate. The use of concatenated coding, e.g. inner convolutional code and outer RS code, provides even greater coding gain. The 16-bit cyclic redundancy check (CRC) code is recommended by CCSDS for error detection.

  11. Uplink Coding

    NASA Technical Reports Server (NTRS)

    Pollara, Fabrizio; Hamkins, Jon; Dolinar, Sam; Andrews, Ken; Divsalar, Dariush

    2006-01-01

    This viewgraph presentation reviews uplink coding. The purpose and goals of the briefing are (1) Show a plan for using uplink coding and describe benefits (2) Define possible solutions and their applicability to different types of uplink, including emergency uplink (3) Concur with our conclusions so we can embark on a plan to use proposed uplink system (4) Identify the need for the development of appropriate technology and infusion in the DSN (5) Gain advocacy to implement uplink coding in flight projects Action Item EMB04-1-14 -- Show a plan for using uplink coding, including showing where it is useful or not (include discussion of emergency uplink coding).

  12. Circuit simulation: some humbling thoughts

    SciTech Connect

    Wendt, Manfred; /Fermilab

    2006-01-01

    A short, very personal note on circuit simulation is presented. It does neither include theoretical background on circuit simulation, nor offers an overview of available software, but just gives some general remarks for a discussion on circuit simulator needs in context to the design and development of accelerator beam instrumentation circuits and systems.

  13. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, V.M.; Martens, J.S.; Zipperian, T.E.

    1995-02-14

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs) are disclosed. Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics. 8 figs.

  14. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, Vincent M.; Martens, Jon S.; Zipperian, Thomas E.

    1995-01-01

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.

  15. Encoding of fear learning and memory in distributed neuronal circuits.

    PubMed

    Herry, Cyril; Johansen, Joshua P

    2014-12-01

    How sensory information is transformed by learning into adaptive behaviors is a fundamental question in neuroscience. Studies of auditory fear conditioning have revealed much about the formation and expression of emotional memories and have provided important insights into this question. Classical work focused on the amygdala as a central structure for fear conditioning. Recent advances, however, have identified new circuits and neural coding strategies mediating fear learning and the expression of fear behaviors. One area of research has identified key brain regions and neuronal coding mechanisms that regulate the formation, specificity and strength of fear memories. Other work has discovered critical circuits and neuronal dynamics by which fear memories are expressed through a medial prefrontal cortex pathway and coordinated activity across interconnected brain regions. Here we review these recent advances alongside prior work to provide a working model of the extended circuits and neuronal coding mechanisms mediating fear learning and memory. PMID:25413091

  16. Coding For Compression Of Low-Entropy Data

    NASA Technical Reports Server (NTRS)

    Yeh, Pen-Shu

    1994-01-01

    Improved method of encoding digital data provides for efficient lossless compression of partially or even mostly redundant data from low-information-content source. Method of coding implemented in relatively simple, high-speed arithmetic and logic circuits. Also increases coding efficiency beyond that of established Huffman coding method in that average number of bits per code symbol can be less than 1, which is the lower bound for Huffman code.

  17. ELECTRONIC TRIGGER CIRCUIT

    DOEpatents

    Russell, J.A.G.

    1958-01-01

    An electronic trigger circuit is described of the type where an output pulse is obtained only after an input voltage has cqualed or exceeded a selected reference voltage. In general, the invention comprises a source of direct current reference voltage in series with an impedance and a diode rectifying element. An input pulse of preselected amplitude causes the diode to conduct and develop a signal across the impedance. The signal is delivered to an amplifier where an output pulse is produced and part of the output is fed back in a positive manner to the diode so that the amplifier produces a steep wave front trigger pulsc at the output. The trigger point of the described circuit is not subject to variation due to the aging, etc., of multi-electrode tabes, since the diode circuit essentially determines the trigger point.

  18. Picosecond Imaging Circuit Analysis

    NASA Astrophysics Data System (ADS)

    Kash, Jeffrey A.

    1998-03-01

    With ever-increasing complexity, probing the internal operation of a silicon IC becomes more challenging. Present methods of internal probing are becoming obsolete. We have discovered that a very weak picosecond pulse of light is emitted by each FET in a CMOS circuit whenever the circuit changes logic state. This pulsed emission can be simultaneously imaged and time resolved, using a technique we have named Picosecond Imaging Circuit Analysis (PICA). With a suitable imaging detector, PICA allows time resolved measurement on thousands of devices simultaneously. Computer videos made from measurements on real IC's will be shown. These videos, along with a more quantitative evaluation of the light emission, permit the complete operation of an IC to be measured in a non-invasive way with picosecond time resolution.

  19. ELECTRONIC MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-08-25

    An electronic multiplier circuit is described in which an output voltage having an amplitude proportional to the product or quotient of the input signals is accomplished in a novel manner which facilitates simplicity of circuit construction and a high degree of accuracy in accomplishing the multiplying and dividing function. The circuit broadly comprises a multiplier tube in which the plate current is proportional to the voltage applied to a first control grid multiplied by the difference between voltage applied to a second control grid and the voltage applied to the first control grid. Means are provided to apply a first signal to be multiplied to the first control grid together with means for applying the sum of the first signal to be multiplied and a second signal to be multiplied to the second control grid whereby the plate current of the multiplier tube is proportional to the product of the first and second signals to be multiplied.

  20. ELECTRONIC PHASE CONTROL CIRCUIT

    DOEpatents

    Salisbury, J.D.; Klein, W.W.; Hansen, C.F.

    1959-04-21

    An electronic circuit is described for controlling the phase of radio frequency energy applied to a multicavity linear accelerator. In one application of the circuit two cavities are excited from a single radio frequency source, with one cavity directly coupled to the source and the other cavity coupled through a delay line of special construction. A phase detector provides a bipolar d-c output signal proportional to the difference in phase between the voltage in the two cavities. This d-c signal controls a bias supply which provides a d-c output for varying the capacitnce of voltage sensitive capacitors in the delay line. The over-all operation of the circuit is completely electronic, overcoming the time response limitations of the electromechanical control systems, and the relative phase relationship of the radio frequency voltages in the two caviiies is continuously controlled to effect particle acceleration.

  1. Logsum Using Garbled Circuits

    PubMed Central

    Portêlo, José; Raj, Bhiksha; Trancoso, Isabel

    2015-01-01

    Secure multiparty computation allows for a set of users to evaluate a particular function over their inputs without revealing the information they possess to each other. Theoretically, this can be achieved using fully homomorphic encryption systems, but so far they remain in the realm of computational impracticability. An alternative is to consider secure function evaluation using homomorphic public-key cryptosystems or Garbled Circuits, the latter being a popular trend in recent times due to important breakthroughs. We propose a technique for computing the logsum operation using Garbled Circuits. This technique relies on replacing the logsum operation with an equivalent piecewise linear approximation, taking advantage of recent advances in efficient methods for both designing and implementing Garbled Circuits. We elaborate on how all the required blocks should be assembled in order to obtain small errors regarding the original logsum operation and very fast execution times. PMID:25811740

  2. Electrical Circuit Tester

    DOEpatents

    Love, Frank

    2006-04-18

    An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

  3. Inrush Current Control Circuit

    NASA Technical Reports Server (NTRS)

    Cole, Steven W. (Inventor)

    2002-01-01

    An inrush current control circuit having an input terminal connected to a DC power supply and an output terminal connected to a load capacitor limits the inrush current that charges up the load capacitor during power up of a system. When the DC power supply applies a DC voltage to the input terminal, the inrush current control circuit produces a voltage ramp at the load capacitor instead of an abrupt DC voltage. The voltage ramp results in a constant low level current to charge up the load capacitor, greatly reducing the current drain on the DC power supply.

  4. Micromachined Silicon Waveguide Circuits

    NASA Technical Reports Server (NTRS)

    McGrath, W. R.

    1995-01-01

    Rectangular waveguides are commonly used as circuit elements in remote-sensing heterodyne receivers at millimeter wavelengths. The advantages of waveguides are low loss and mechanical tunability. However, conventional machining techniques for waveguide components operating above a few hundred GHz are complicated and costly. Waveguides micromachined from silicon however would have several important advantages including low-cost; small size for very high frequency (submillimeter wave) operation; high dimensional accuracy (important for high-Q circuits); atomically smooth walls, thereby reducing rf losses; and the ability to integrate active and passive devices directly in the waveguide on thin membranes, thereby solving the traditional problem of mounting thin substrates.

  5. Small circuits for cryptography.

    SciTech Connect

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  6. The development of circuit models for ZR.

    SciTech Connect

    Harjes, Henry Charles III; Corley, J.

    2005-06-01

    Summary from only given. The capabilities of the Z accelerator will be significantly enhanced by the Z Refurbishment (ZR) project [McDaniel DH, 2002]. The performance of a single ZR module is currently being characterized in the pre-production engineering evaluation test bed, Z20 [Lehr, JM, 2003]. Z20 is thoroughly diagnosed so that electrical performance of the module can be established. Circuit models of Z20 have been developed and validated in both Screamer [1985] and Bertha [1989] circuit codes. For the purposes of predicting ZR performance, a full ZR circuit model has also been developed in Bertha. The full ZR model (using operating parameters demonstrated on Z20) indicates that the required 26 MA, 100 ns implosion time, output load current pulse will be achieved on ZR. In this paper, the electrical characterization of Z20 and development of the single module circuit models will be discussed in detail. The full ZR model will also be discussed and the results of several system studies conducted to predict ZR performance will be presented.

  7. A Step Circuit Program.

    ERIC Educational Resources Information Center

    Herman, Susan

    1995-01-01

    Aerobics instructors can use step aerobics to motivate students. One creative method is to add the step to the circuit workout. By incorporating the step, aerobic instructors can accommodate various fitness levels. The article explains necessary equipment and procedures, describing sample stations for cardiorespiratory fitness, muscular strength,…

  8. Circuit breaker lockout device

    DOEpatents

    Kozlowski, L.J.; Shirey, L.A.

    1992-11-24

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker. 2 figs.

  9. Circuit breaker lockout device

    DOEpatents

    Kozlowski, Lawrence J.; Shirey, Lawrence A.

    1992-01-01

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker.

  10. Bioluminescent bioreporter integrated circuit

    DOEpatents

    Simpson, Michael L.; Sayler, Gary S.; Paulus, Michael J.

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  11. The Global Circuit.

    ERIC Educational Resources Information Center

    Lansford, Henry

    1983-01-01

    Discusses the nature of and research related to a theory explaining the earth's electric budget. The theory suggests a global electric circuit completed by a positive current flowing up into thunderstorm clouds, from clouds to ionosphere, distributed around the globe, and down to earth through the lower atmosphere in fair-weather regions. (JN)

  12. Integrated circuit reliability testing

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G. (Inventor); Sayah, Hoshyar R. (Inventor)

    1990-01-01

    A technique is described for use in determining the reliability of microscopic conductors deposited on an uneven surface of an integrated circuit device. A wafer containing integrated circuit chips is formed with a test area having regions of different heights. At the time the conductors are formed on the chip areas of the wafer, an elongated serpentine assay conductor is deposited on the test area so the assay conductor extends over multiple steps between regions of different heights. Also, a first test conductor is deposited in the test area upon a uniform region of first height, and a second test conductor is deposited in the test area upon a uniform region of second height. The occurrence of high resistances at the steps between regions of different height is indicated by deriving the measured length of the serpentine conductor using the resistance measured between the ends of the serpentine conductor, and comparing that to the design length of the serpentine conductor. The percentage by which the measured length exceeds the design length, at which the integrated circuit will be discarded, depends on the required reliability of the integrated circuit.

  13. Integrated circuit reliability testing

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G. (Inventor); Sayah, Hoshyar R. (Inventor)

    1988-01-01

    A technique is described for use in determining the reliability of microscopic conductors deposited on an uneven surface of an integrated circuit device. A wafer containing integrated circuit chips is formed with a test area having regions of different heights. At the time the conductors are formed on the chip areas of the wafer, an elongated serpentine assay conductor is deposited on the test area so the assay conductor extends over multiple steps between regions of different heights. Also, a first test conductor is deposited in the test area upon a uniform region of first height, and a second test conductor is deposited in the test area upon a uniform region of second height. The occurrence of high resistances at the steps between regions of different height is indicated by deriving the measured length of the serpentine conductor using the resistance measured between the ends of the serpentine conductor, and comparing that to the design length of the serpentine conductor. The percentage by which the measured length exceeds the design length, at which the integrated circuit will be discarded, depends on the required reliability of the integrated circuit.

  14. Wein bridge oscillator circuit

    NASA Technical Reports Server (NTRS)

    Lipoma, P. C.

    1971-01-01

    Circuit with minimum number of components provides stable outputs of 2 to 8 volts at frequencies of .001 to 100 kHz. Oscillator exhibits low power consumption, portability, simplicity, and drive capability, it has application as loudspeaker tester and audible alarm, as well as in laboratory and test generators.

  15. A coherent RC circuit

    NASA Astrophysics Data System (ADS)

    Gabelli, J.; Fève, G.; Berroir, J.-M.; Plaçais, B.

    2012-12-01

    We review the first experiment on dynamic transport in a phase-coherent quantum conductor. In our discussion, we highlight the use of time-dependent transport as a means of gaining insight into charge relaxation on a mesoscopic scale. For this purpose, we studied the ac conductance of a model quantum conductor, i.e. the quantum RC circuit. Prior to our experimental work, Büttiker et al (1993 Phys. Lett. A 180 364-9) first worked on dynamic mesoscopic transport in the 1990s. They predicted that the mesoscopic RC circuit can be described by a quantum capacitance related to the density of states in the capacitor and a constant charge-relaxation resistance equal to half of the resistance quantum h/2e2, when a single mode is transmitted between the capacitance and a reservoir. By applying a microwave excitation to a gate located on top of a coherent submicronic quantum dot that is coupled to a reservoir, we validate this theoretical prediction on the ac conductance of the quantum RC circuit. Our study demonstrates that the ac conductance is directly related to the dwell time of electrons in the capacitor. Thereby, we observed a counterintuitive behavior of a quantum origin: as the transmission of the single conducting mode decreases, the resistance of the quantum RC circuit remains constant while the capacitance oscillates.

  16. Electrifying Inquiry: Electrical Circuits

    ERIC Educational Resources Information Center

    Godbey, Susan; Barnett, Jessica; Webster, Lois

    2005-01-01

    An activity involving parallel electrical circuits was modified to incorporate an open inquiry approach. Both the original and revised versions of the activity were tested in the middle school classroom. We present a comparison of the two versions of the activity in terms of facilitating learning and engaging students' interests.

  17. Energy management circuit

    SciTech Connect

    Corless, R. W.

    1985-10-15

    An energy management circuit for use in a telephone or other device which includes an electronic memory is disclosed. The invention provides a capacitive keep alive power supply to maintain said memory in an active condition during extended periods when the device is disconnected from a line power source, as in a telephone on-hook condition. A large capacitor charge is maintained within a predetermined voltage range during such disconnect conditions by a resistively coupled trickle charge power source. A comparator is operated to monitor capacitor charge and to produce a control signal when the voltage at the capacitor falls below a selected memory keep alive level. The control signal operates a switch to bypass the trickle charge circuit. The switch couples line power directly to the capacitor to charge the capacitor to a voltage sufficient to maintain memory contents intact. A switch inhibit circuit is provided to prevent trickle charge bypass during an inadequate or excessive line voltage condition. A sleep timer circuit is also provided to conserve energy required to operate the present invention by allowing the invention to operate periodically and only for short intervals.

  18. Automatic sweep circuit

    DOEpatents

    Keefe, Donald J.

    1980-01-01

    An automatically sweeping circuit for searching for an evoked response in an output signal in time with respect to a trigger input. Digital counters are used to activate a detector at precise intervals, and monitoring is repeated for statistical accuracy. If the response is not found then a different time window is examined until the signal is found.

  19. "Printed-circuit" rectenna

    NASA Technical Reports Server (NTRS)

    Dickinson, R. M.

    1977-01-01

    Rectifying antenna is less bulky structure for absorbing transmitted microwave power and converting it into electrical current. Printed-circuit approach, using microstrip technology and circularly polarized antenna, makes polarization orientation unimportant and allows much smaller arrays for given performance. Innovation is particularly useful with proposed electric vehicles powered by beam microwaves.

  20. Computer Code

    NASA Technical Reports Server (NTRS)

    1985-01-01

    COSMIC MINIVER, a computer code developed by NASA for analyzing aerodynamic heating and heat transfer on the Space Shuttle, has been used by Marquardt Company to analyze heat transfer on Navy/Air Force missile bodies. The code analyzes heat transfer by four different methods which can be compared for accuracy. MINIVER saved Marquardt three months in computer time and $15,000.

  1. Sensor Authentication: Embedded Processor Code

    Energy Science and Technology Software Center (ESTSC)

    2012-09-25

    Described is the c code running on the embedded Microchip 32bit PIC32MX575F256H located on the INL developed noise analysis circuit board. The code performs the following functions: Controls the noise analysis circuit board preamplifier voltage gains of 1, 10, 100, 000 Initializes the analog to digital conversion hardware, input channel selection, Fast Fourier Transform (FFT) function, USB communications interface, and internal memory allocations Initiates high resolution 4096 point 200 kHz data acquisition Computes complex 2048more » point FFT and FFT magnitude. Services Host command set Transfers raw data to Host Transfers FFT result to host Communication error checking« less

  2. Coding and transformations in the olfactory system.

    PubMed

    Uchida, Naoshige; Poo, Cindy; Haddad, Rafi

    2014-01-01

    How is sensory information represented in the brain? A long-standing debate in neural coding is whether and how timing of spikes conveys information to downstream neurons. Although we know that neurons in the olfactory bulb (OB) exhibit rich temporal dynamics, the functional relevance of temporal coding remains hotly debated. Recent recording experiments in awake behaving animals have elucidated highly organized temporal structures of activity in the OB. In addition, the analysis of neural circuits in the piriform cortex (PC) demonstrated the importance of not only OB afferent inputs but also intrinsic PC neural circuits in shaping odor responses. Furthermore, new experiments involving stimulation of the OB with specific temporal patterns allowed for testing the relevance of temporal codes. Together, these studies suggest that the relative timing of neuronal activity in the OB conveys odor information and that neural circuits in the PC possess various mechanisms to decode temporal patterns of OB input. PMID:24905594

  3. DNA codes

    SciTech Connect

    Torney, D. C.

    2001-01-01

    We have begun to characterize a variety of codes, motivated by potential implementation as (quaternary) DNA n-sequences, with letters denoted A, C The first codes we studied are the most reminiscent of conventional group codes. For these codes, Hamming similarity was generalized so that the score for matched letters takes more than one value, depending upon which letters are matched [2]. These codes consist of n-sequences satisfying an upper bound on the similarities, summed over the letter positions, of distinct codewords. We chose similarity 2 for matches of letters A and T and 3 for matches of the letters C and G, providing a rough approximation to double-strand bond energies in DNA. An inherent novelty of DNA codes is 'reverse complementation'. The latter may be defined, as follows, not only for alphabets of size four, but, more generally, for any even-size alphabet. All that is required is a matching of the letters of the alphabet: a partition into pairs. Then, the reverse complement of a codeword is obtained by reversing the order of its letters and replacing each letter by its match. For DNA, the matching is AT/CG because these are the Watson-Crick bonding pairs. Reversal arises because two DNA sequences form a double strand with opposite relative orientations. Thus, as will be described in detail, because in vitro decoding involves the formation of double-stranded DNA from two codewords, it is reasonable to assume - for universal applicability - that the reverse complement of any codeword is also a codeword. In particular, self-reverse complementary codewords are expressly forbidden in reverse-complement codes. Thus, an appropriate distance between all pairs of codewords must, when large, effectively prohibit binding between the respective codewords: to form a double strand. Only reverse-complement pairs of codewords should be able to bind. For most applications, a DNA code is to be bi-partitioned, such that the reverse-complementary pairs are separated

  4. Driver Code for Adaptive Optics

    NASA Technical Reports Server (NTRS)

    Rao, Shanti

    2007-01-01

    A special-purpose computer code for a deformable-mirror adaptive-optics control system transmits pixel-registered control from (1) a personal computer running software that generates the control data to (2) a circuit board with 128 digital-to-analog converters (DACs) that generate voltages to drive the deformable-mirror actuators. This program reads control-voltage codes from a text file, then sends them, via the computer s parallel port, to a circuit board with four AD5535 (or equivalent) chips. Whereas a similar prior computer program was capable of transmitting data to only one chip at a time, this program can send data to four chips simultaneously. This program is in the form of C-language code that can be compiled and linked into an adaptive-optics software system. The program as supplied includes source code for integration into the adaptive-optics software, documentation, and a component that provides a demonstration of loading DAC codes from a text file. On a standard Windows desktop computer, the software can update 128 channels in 10 ms. On Real-Time Linux with a digital I/O card, the software can update 1024 channels (8 boards in parallel) every 8 ms.

  5. SLINGSHOT - a Coilgun Design Code

    SciTech Connect

    MARDER, BARRY M.

    2001-09-01

    The Sandia coilgun [1,2,3,4,5] is an inductive electromagnetic launcher. It consists of a sequence of powered, multi-turn coils surrounding a flyway of circular cross-section through which a conducting armature passes. When the armature is properly positioned with respect to a coil, a charged capacitor is switched into the coil circuit. The rising coil currents induce a current in the armature, producing a repulsive accelerating force. The basic numerical tool for modeling the coilgun is the SLINGSHOT code, an expanded, user-friendly successor to WARP-10 [6]. SLINGSHOT computes the currents in the coils and armature, finds the forces produced by those currents, and moves the armature through the array of coils. In this approach, the cylindrically symmetric coils and armature are subdivided into concentric hoops with rectangular cross-section, in each of which the current is assumed to be uniform. The ensemble of hoops are treated as coupled circuits. The specific heats and resistivities of the hoops are found as functions of temperature and used to determine the resistive heating. The code calculates the resistances and inductances for all hoops, and the mutual inductances for all hoop pairs. Using these, it computes the hoop currents from their circuit equations, finds the forces from the products of these currents and the mutual inductance gradient, and moves the armature. Treating the problem as a set of coupled circuits is a fast and accurate approach compared to solving the field equations. Its use, however, is restricted to problems in which the symmetry dictates the current paths. This paper is divided into three parts. The first presents a demonstration of the code. The second describes the input and output. The third part describes the physical models and numerical methods used in the code. It is assumed that the reader is familiar with coilguns.

  6. Resistor Combinations for Parallel Circuits.

    ERIC Educational Resources Information Center

    McTernan, James P.

    1978-01-01

    To help simplify both teaching and learning of parallel circuits, a high school electricity/electronics teacher presents and illustrates the use of tables of values for parallel resistive circuits in which total resistances are whole numbers. (MF)

  7. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    NASA Technical Reports Server (NTRS)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  8. Methods of fabricating applique circuits

    DOEpatents

    Dimos, Duane B.; Garino, Terry J.

    1999-09-14

    Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

  9. High voltage MOSFET switching circuit

    DOEpatents

    McEwan, Thomas E.

    1994-01-01

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

  10. High voltage MOSFET switching circuit

    DOEpatents

    McEwan, T.E.

    1994-07-26

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET. 2 figs.

  11. Ladder-Type Circuits Revisited

    ERIC Educational Resources Information Center

    Yoon, Sung Hyun

    2007-01-01

    Ladder-type circuits where a given unit is repeated infinitely many times are dealt with in many textbooks on electromagnetism as examples of filter circuits. Determining the impedance of such circuits seems to be regarded as simple, which may be due to the fact that the invariance of the infinite system under the operation of adding one more unit…

  12. Power supply conditioning circuit

    NASA Technical Reports Server (NTRS)

    Primas, L. E.; Loveland, R.

    1987-01-01

    A power supply conditioning circuit that can reduce Periodic and Random Deviations (PARD) on the output voltages of dc power supplies to -150 dBV from dc to several KHz with no measurable periodic deviations is described. The PARD for a typical commercial low noise power supply is -74 dBV for frequencies above 20 Hz and is often much worse at frequencies below 20 Hz. The power supply conditioning circuit described here relies on the large differences in the dynamic impedances of a constant current diode and a zener diode to establish a dc voltage with low PARD. Power supplies with low PARD are especially important in circuitry involving ultrastable frequencies for the Deep Space Network.

  13. LC-circuit calorimetry

    SciTech Connect

    Bossen, O.; Schilling, A.

    2011-09-15

    We present a new type of calorimeter in which we couple an unknown heat capacity with the aid of Peltier elements to an electrical circuit. The use of an electrical inductance and an amplifier in the circuit allows us to achieve autonomous oscillations, and the measurement of the corresponding resonance frequency makes it possible to accurately measure the heat capacity with an intrinsic statistical uncertainty that decreases as {approx}t{sub m}{sup -3/2} with measuring time t{sub m}, as opposed to a corresponding uncertainty {approx}t{sub m}{sup -1/2} in the conventional alternating current method to measure heat capacities. We have built a demonstration experiment to show the feasibility of the new technique, and we have tested it on a gadolinium sample at its transition to the ferromagnetic state.

  14. Neuromorphic silicon neuron circuits.

    PubMed

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin-Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  15. PHASE DIFFERENTIAL INDICATING CIRCUIT

    DOEpatents

    Kirsten, F.A.

    1962-01-01

    An electronic circuit for totalizing the net phase difference between two alternating current signals is designed which responds to both increasing and decreasing phase changes. A phase comparator provldes an output pulse for each 360 deg of phase difference occurring, there being a negative pulse for phase shtft in one direction and a positive pulse for a phase shift in the opposite direction. A counting circuit utilizing glow discharge tubes receives the negative and positive pulses at a single input terminal and provides a running net total, pulses of one polarity dded and pulses of the opposite polarity being subtracted. The glow discharge tubes may be decaded to increase the total count capacity. (AEC)

  16. Neuromorphic Silicon Neuron Circuits

    PubMed Central

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  17. GAS PHOTOTUBE CIRCUIT

    DOEpatents

    Richardson, J.H.

    1958-03-01

    This patent pertains to electronic circuits for measuring the intensity of light and is especially concerned with measurement between preset light thresholds. Such a circuit has application in connection with devices for reading-out information stored on punch cards or tapes where the cards and tapes are translucent. By the novel arrangement of this invention thc sensitivity of a gas phototube is maintained at a low value when the light intensity is below a first threshold level. If the light level rises above the first threshold level, the tube is rendered highly sensitive and an output signal will vary in proportion to the light intensity change. When the light level decreases below a second threshold level, the gas phototube is automatically rendered highly insensitive. Each of these threshold points is adjustable.

  18. PARTICLE BEAM TRACKING CIRCUIT

    DOEpatents

    Anderson, O.A.

    1959-05-01

    >A particle-beam tracking and correcting circuit is described. Beam induction electrodes are placed on either side of the beam, and potentials induced by the beam are compared in a voltage comparator or discriminator. This comparison produces an error signal which modifies the fm curve at the voltage applied to the drift tube, thereby returning the orbit to the preferred position. The arrangement serves also to synchronize accelerating frequency and magnetic field growth. (T.R.H.)

  19. Integrated Circuit Immunity

    NASA Technical Reports Server (NTRS)

    Sketoe, J. G.; Clark, Anthony

    2000-01-01

    This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.

  20. Monolithic Optoelectronic Integrated Circuit

    NASA Technical Reports Server (NTRS)

    Bhasin, Kul B.; Walters, Wayne; Gustafsen, Jerry; Bendett, Mark

    1990-01-01

    Monolithic optoelectronic integrated circuit (OEIC) receives single digitally modulated input light signal via optical fiber and converts it into 16-channel electrical output signal. Potentially useful in any system in which digital data must be transmitted serially at high rates, then decoded into and used in parallel format at destination. Applications include transmission and decoding of control signals to phase shifters in phased-array antennas and also communication of data between computers and peripheral equipment in local-area networks.

  1. Driven superconducting quantum circuits

    NASA Astrophysics Data System (ADS)

    Nakamura, Yasunobu

    2014-03-01

    Driven nonlinear quantum systems show rich phenomena in various fields of physics. Among them, superconducting quantum circuits have very attractive features such as well-controlled quantum states with design flexibility, strong nonlinearity of Josephson junctions, strong coupling to electromagnetic driving fields, little internal dissipation, and tailored coupling to the electromagnetic environment. We have investigated properties and functionalities of driven superconducting quantum circuits. A transmon qubit coupled to a transmission line shows nearly perfect spatial mode matching between the incident and scattered microwave field in the 1D mode. Dressed states under a driving field are studied there and also in a semi-infinite 1D mode terminated by a resonator containing a flux qubit. An effective Λ-type three-level system is realized under an appropriate driving condition. It allows ``impedance-matched'' perfect absorption of incident probe photons and down conversion into another frequency mode. Finally, the weak signal from the qubit is read out using a Josephson parametric amplifier/oscillator which is another nonlinear circuit driven by a strong pump field. This work was partly supported by the Funding Program for World-Leading Innovative R&D on Science and Technology (FIRST), Project for Developing Innovation Systems of MEXT, MEXT KAKENHI ``Quantum Cybernetics,'' and the NICT Commissioned Research.

  2. All Spin Digital Circuits

    NASA Astrophysics Data System (ADS)

    Behin-Aein, Behtash; Datta, Deepanjan; Salahuddin, Sayeef; Datta, Supriyo

    2009-03-01

    Switching of a magnetic free layer using spin polarized current has been demonstrated in Magnetic Tunnel Junction (MTJ) devices. Currently MTJ's are being studied for memory and microwave oscillator applications. The purpose of this talk is to explore a modified MTJ where a clock pulse via the fixed layer facilities the switching of the free layer in accordance with a weak bias provided by an input magnet in the form of a spin current. Based on the Landau-Lifshitz-Gilbert equation (LLG) augmented with spin torque functions, we show the switching energy and the switching time of the free layer which indicates the possibility of very low power digital logic applications. Ordinary digital circuits store information in the form of capacitor charges that communicate through electrical interconnects. The purpose of this paper is to show that modified MTJ's can be the basis for all spin digital circuits. Our primary objective is to stimulate proof of concept experiments that could usher in a whole new set of devices suitable for spintronic circuits.

  3. Optical Circuit Switched Protocol

    NASA Technical Reports Server (NTRS)

    Monacos, Steve P. (Inventor)

    2000-01-01

    The present invention is a system and method embodied in an optical circuit switched protocol for the transmission of data through a network. The optical circuit switched protocol is an all-optical circuit switched network and includes novel optical switching nodes for transmitting optical data packets within a network. Each optical switching node comprises a detector for receiving the header, header detection logic for translating the header into routing information and eliminating the header, and a controller for receiving the routing information and configuring an all optical path within the node. The all optical path located within the node is solely an optical path without having electronic storage of the data and without having optical delay of the data. Since electronic storage of the header is not necessary and the initial header is eliminated by the first detector of the first switching node. multiple identical headers are sent throughout the network so that subsequent switching nodes can receive and read the header for setting up an optical data path.

  4. Fundamental Atomtronic Circuit Elements

    NASA Astrophysics Data System (ADS)

    Lee, Jeffrey; McIlvain, Brian; Lobb, Christopher; Hill, Wendell T., III

    2012-06-01

    Recent experiments with neutral superfluid gases have shown that it is possible to create atomtronic circuits analogous to existing superconducting circuits. The goals of these experiments are to create complex systems such as Josephson junctions. In addition, there are theoretical models for active atomtronic components analogous to diodes, transistors and oscillators. In order for any of these devices to function, an understanding of the more fundamental atomtronic elements is needed. Here we describe the first experimental realization of these more fundamental elements. We have created an atomtronic capacitor that is discharged through a resistance and inductance. We will discuss a theoretical description of the system that allows us to determine values for the capacitance, resistance and inductance. The resistance is shown to be analogous to the Sharvin resistance, and the inductance analogous to kinetic inductance in electronics. This atomtronic circuit is implemented with a thermal sample of laser cooled rubidium atoms. The atoms are confined using what we call free-space atom chips, a novel optical dipole trap produced using a generalized phase-contrast imaging technique. We will also discuss progress toward implementing this atomtronic system in a degenerate Bose gas.

  5. Inkjet deposited circuit components

    NASA Astrophysics Data System (ADS)

    Bidoki, S. M.; Nouri, J.; Heidari, A. A.

    2010-05-01

    All-printed electronics as a means of achieving ultra-low-cost electronic circuits has attracted great interest in recent years. Inkjet printing is one of the most promising techniques by which the circuit components can be ultimately drawn (i.e. printed) onto the substrate in one step. Here, the inkjet printing technique was used to chemically deposit silver nanoparticles (10-200 nm) simply by ejection of silver nitrate and reducing solutions onto different substrates such as paper, PET plastic film and textile fabrics. The silver patterns were tested for their functionality to work as circuit components like conductor, resistor, capacitor and inductor. Different levels of conductivity were achieved simply by changing the printing sequence, inks ratio and concentration. The highest level of conductivity achieved by an office thermal inkjet printer (300 dpi) was 5.54 × 105 S m-1 on paper. Inkjet deposited capacitors could exhibit a capacitance of more than 1.5 nF (parallel plate 45 × 45 mm2) and induction coils displayed an inductance of around 400 µH (planar coil 10 cm in diameter). Comparison of electronic performance of inkjet deposited components to the performance of conventionally etched items makes the technique highly promising for fabricating different printed electronic devices.

  6. Automatic Parametric Testing Of Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Jennings, Glenn A.; Pina, Cesar A.

    1989-01-01

    Computer program for parametric testing saves time and effort in research and development of integrated circuits. Software system automatically assembles various types of test structures and lays them out on silicon chip, generates sequency of test instructions, and interprets test data. Employs self-programming software; needs minimum of human intervention. Adapted to needs of different laboratories and readily accommodates new test structures. Program codes designed to be adaptable to most computers and test equipment now in use. Written in high-level languages to enhance transportability.

  7. Decoder for 3-D color codes

    NASA Astrophysics Data System (ADS)

    Hsu, Kung-Chuan; Brun, Todd

    Transversal circuits are important components of fault-tolerant quantum computation. Several classes of quantum error-correcting codes are known to have transversal implementations of any logical Clifford operation. However, to achieve universal quantum computation, it would be helpful to have high-performance error-correcting codes that have a transversal implementation of some logical non-Clifford operation. The 3-D color codes are a class of topological codes that permit transversal implementation of the logical π / 8 -gate. The decoding problem of a 3-D color code can be understood as a graph-matching problem on a three-dimensional lattice. Whether this class of codes will be useful in terms of performance is still an open question. We investigate the decoding problem of 3-D color codes and analyze the performance of some possible decoders.

  8. 2D bifurcations and Newtonian properties of memristive Chua's circuits

    NASA Astrophysics Data System (ADS)

    Marszalek, W.; Podhaisky, H.

    2016-01-01

    Two interesting properties of Chua's circuits are presented. First, two-parameter bifurcation diagrams of Chua's oscillatory circuits with memristors are presented. To obtain various 2D bifurcation images a substantial numerical effort, possibly with parallel computations, is needed. The numerical algorithm is described first and its numerical code for 2D bifurcation image creation is available for free downloading. Several color 2D images and the corresponding 1D greyscale bifurcation diagrams are included. Secondly, Chua's circuits are linked to Newton's law φ ''= F(t,φ,φ')/m with φ=\\text{flux} , constant m > 0, and the force term F(t,φ,φ') containing memory terms. Finally, the jounce scalar equations for Chua's circuits are also discussed.

  9. Parallel image compression circuit for high-speed cameras

    NASA Astrophysics Data System (ADS)

    Nishikawa, Yukinari; Kawahito, Shoji; Inoue, Toru

    2005-02-01

    In this paper, we propose 32 parallel image compression circuits for high-speed cameras. The proposed compression circuits are based on a 4 x 4-point 2-dimensional DCT using a DA method, zigzag scanning of 4 blocks of the 2-D DCT coefficients and a 1-dimensional Huffman coding. The compression engine is designed with FPGAs, and the hardware complexity is compared with JPEG algorithm. It is found that the proposed compression circuits require much less hardware, leading to a compact high-speed implementation of the image compression circuits using parallel processing architecture. The PSNR of the reconstructed image using the proposed encoding method is better than that of JPEG at the region of low compression ratio.

  10. Improved Classical Simulation of Quantum Circuits Dominated by Clifford Gates

    NASA Astrophysics Data System (ADS)

    Bravyi, Sergey; Gosset, David

    2016-06-01

    We present a new algorithm for classical simulation of quantum circuits over the Clifford+T gate set. The runtime of the algorithm is polynomial in the number of qubits and the number of Clifford gates in the circuit but exponential in the number of T gates. The exponential scaling is sufficiently mild that the algorithm can be used in practice to simulate medium-sized quantum circuits dominated by Clifford gates. The first demonstrations of fault-tolerant quantum circuits based on 2D topological codes are likely to be dominated by Clifford gates due to a high implementation cost associated with logical T gates. Thus our algorithm may serve as a verification tool for near-term quantum computers which cannot in practice be simulated by other means. To demonstrate the power of the new method, we performed a classical simulation of a hidden shift quantum algorithm with 40 qubits, a few hundred Clifford gates, and nearly 50 T gates.

  11. Coating Circuit Boards With Silicone

    NASA Technical Reports Server (NTRS)

    Gaudiano, S.

    1986-01-01

    Techniques appropriate to boards containing CMOS circuits detailed. Document presents procedure for applying thin conformal coating to such electronic assemblies as printed-circuit boards and wire-wrapped boards. Coating is from 1 to 7 mils (25 to 178 micrometers) thick and composed of room-temperature-vulcanizing (RTV) silicone. Specifies materials, equipment, spraying method, and quality requirements. Takes into account special needs of circuits made with complementary metal-oxide/semiconductor (CMOS) devices on circuit boards. Special attention given to preventing damage by electrostatic discharge, to which CMOS circuits especially sensitive.

  12. Power system with an integrated lubrication circuit

    SciTech Connect

    Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  13. Integrated coherent matter wave circuits

    NASA Astrophysics Data System (ADS)

    Ryu, C.; Boshier, M. G.

    2015-09-01

    An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. Here we report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through their electric polarizability. The source of coherent matter waves is a Bose-Einstein condensate (BEC). We launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry.

  14. Memristor based startup circuit for self biased circuits

    NASA Astrophysics Data System (ADS)

    Das, Mangal; Singh, Amit Kumar; Rathi, Amit; Singhal, Sonal

    2016-04-01

    This paper presents the design of a Memristor based startup circuit for self biased circuits. Memristor has many advantages over conventional CMOS devices such as low leakage current at nanometer scale, easy to manufacture. In this work the switching characteristics of memristor is utilized. First the theoretical equations describing the switching behavior of memristor are investigated. To prove the switching capability of Memristor, a startup circuit based on memristor is proposed which uses series combination of Memristor and capacitor. Proposed circuit is compared with the previously reported MOSFET based startup circuits. Comparison of different circuits was done to validate the results. Simulation results show that memristor based circuit can attain on (I = 12.94 µA) to off state (I = 1 .2 µA) in 25 ns while the MOSFET based startup circuits take on (I = 14.19 µA) to off state (I = 1.4 µA) in more than 90 ns. The benefit comes in terms of area because the number of components used in the circuit are lesser than the conventional startup circuits.

  15. Speech coding

    SciTech Connect

    Ravishankar, C., Hughes Network Systems, Germantown, MD

    1998-05-08

    Speech is the predominant means of communication between human beings and since the invention of the telephone by Alexander Graham Bell in 1876, speech services have remained to be the core service in almost all telecommunication systems. Original analog methods of telephony had the disadvantage of speech signal getting corrupted by noise, cross-talk and distortion Long haul transmissions which use repeaters to compensate for the loss in signal strength on transmission links also increase the associated noise and distortion. On the other hand digital transmission is relatively immune to noise, cross-talk and distortion primarily because of the capability to faithfully regenerate digital signal at each repeater purely based on a binary decision. Hence end-to-end performance of the digital link essentially becomes independent of the length and operating frequency bands of the link Hence from a transmission point of view digital transmission has been the preferred approach due to its higher immunity to noise. The need to carry digital speech became extremely important from a service provision point of view as well. Modem requirements have introduced the need for robust, flexible and secure services that can carry a multitude of signal types (such as voice, data and video) without a fundamental change in infrastructure. Such a requirement could not have been easily met without the advent of digital transmission systems, thereby requiring speech to be coded digitally. The term Speech Coding is often referred to techniques that represent or code speech signals either directly as a waveform or as a set of parameters by analyzing the speech signal. In either case, the codes are transmitted to the distant end where speech is reconstructed or synthesized using the received set of codes. A more generic term that is applicable to these techniques that is often interchangeably used with speech coding is the term voice coding. This term is more generic in the sense that the

  16. Implementing fault tolerance in a superconducting quantum circuit

    NASA Astrophysics Data System (ADS)

    Barends, Rami

    2015-03-01

    The surface code error correction scheme is appealing for superconducting circuits as the fundamental operations have been demonstrated at the fault-tolerant threshold. Here, we present experimental results on the repetition code, a one-dimensional primitive of the surface code which can detect bit-flip errors, implemented on a device consisting of nine Xmon transmon qubits. We discuss the basic mechanics of error detection, show preservation of a Greenberger-Horne-Zeilinger state, and show suppression of environmentally-induced error.

  17. Integrated circuit cell library

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

    2005-01-01

    According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

  18. Biophotonic integrated circuits

    NASA Astrophysics Data System (ADS)

    Cohen, Daniel A.; Nolde, Jill A.; Wang, Chad S.; Skogen, Erik J.; Rivlin, A.; Coldren, Larry A.

    2004-12-01

    Biosensors rely on optical techniques to obtain high sensitivity and speed, but almost all biochips still require external light sources, optics, and detectors, which limits the widespread use of these devices. The optoelectronics technology base now allows monolithic integration of versatile optical sources, novel sensing geometries, filters, spectrometers, and detectors, enabling highly integrated chip-scale sensors. We discuss biophotonic integrated circuits built on both GaAs and InP substrates, incorporating widely tunable lasers, novel evanescent field sensing waveguides, heterodyne spectrometers, and waveguide photodetectors, suitable for high sensitivity transduction of affinity assays.

  19. Digital Optical Circuit Technology

    NASA Technical Reports Server (NTRS)

    Dove, B. L. (Editor)

    1985-01-01

    The Proceedings for the 48th Meeting of the AGARD Avionics Panel contain the 18 papers presented a Technical Evaluation Report, and discussions that followed the presentations of papers. Seven papers were presented in the session devoted to optical bistability. Optical logic was addressed by three papers. The session on sources, modulators and demodulators presented three papers. Five papers were given in the final session on all optical systems. The purpose of this Specialists' Meeting was to present the research and development status of digital optical circuit technology and to examine its relevance in the broad context of digital processing, communication, radar, avionics and flight control systems implementation.

  20. Photonic Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Merritt, Scott; Krainak, Michael

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  1. Dynamic pulse difference circuit

    DOEpatents

    Erickson, Gerald L.

    1978-01-01

    A digital electronic circuit of especial use for subtracting background activity pulses in gamma spectrometry comprises an up-down counter connected to count up with signal-channel pulses and to count down with background-channel pulses. A detector responsive to the count position of the up-down counter provides a signal when the up-down counter has completed one scaling sequence cycle of counts in the up direction. In an alternate embodiment, a detector responsive to the count position of the up-down counter provides a signal upon overflow of the counter.

  2. Base drive circuit

    DOEpatents

    Lange, A.C.

    1995-04-04

    An improved base drive circuit having a level shifter for providing bistable input signals to a pair of non-linear delays. The non-linear delays provide gate control to a corresponding pair of field effect transistors through a corresponding pair of buffer components. The non-linear delays provide delayed turn-on for each of the field effect transistors while an associated pair of transistors shunt the non-linear delays during turn-off of the associated field effect transistor. 2 figures.

  3. Base drive circuit

    DOEpatents

    Lange, Arnold C.

    1995-01-01

    An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).

  4. Seeing Circuits Assemble

    PubMed Central

    Lichtman, Jeff W.; Smith, Stephen J.

    2009-01-01

    Developmental neurobiology has been greatly invigorated by a recent string of breakthroughs in molecular biology and optical physics that permit direct in vivo observation of neural circuit assembly. The imaging done thus far suggests that as brains are built, a significant amount of unbuilding is also occurring. We offer the view that this tumult is the result of the intersecting behaviors of the many single-celled creatures (i.e., neurons, glia, and progenitors) that inhabit brains. New tools will certainly be needed if we wish to monitor the myriad cooperative and competitive interactions at play in the cellular society that builds brains. PMID:18995818

  5. Itch Mechanisms and Circuits

    PubMed Central

    Han, Liang; Dong, Xinzhong

    2014-01-01

    The itch-scratch reflex serves as a protective mechanism in everyday life. However, chronic persistent itching can be devastating. Despite the clinical importance of the itch sensation, its mechanism remains elusive. In the past decade, substantial progress has been made to uncover the mystery of itching. Here, we review the molecules, cells, and circuits known to mediate the itch sensation, which, coupled with advances in understanding the pathophysiology of chronic itching conditions, will hopefully contribute to the development of new anti-itch therapies. PMID:24819620

  6. Optically controllable molecular logic circuits

    NASA Astrophysics Data System (ADS)

    Nishimura, Takahiro; Fujii, Ryo; Ogura, Yusuke; Tanida, Jun

    2015-07-01

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  7. Optically controllable molecular logic circuits

    SciTech Connect

    Nishimura, Takahiro Fujii, Ryo; Ogura, Yusuke; Tanida, Jun

    2015-07-06

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  8. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    DOEpatents

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  9. Noise in biological circuits

    SciTech Connect

    Simpson, Michael L; Allen, Michael S.; Cox, Chris D.; Dar, Roy D.; Karig, David K; McCollum, James M.; Cooke, John F

    2009-01-01

    Noise biology focuses on the sources, processing, and biological consequences of the inherent stochastic fluctuations in molecular transitions or interactions that control cellular behavior. These fluctuations are especially pronounced in small systems where the magnitudes of the fluctuations approach or exceed the mean value of the molecular population. Noise biology is an essential component of nanomedicine where the communication of information is across a boundary that separates small synthetic and biological systems that are bound by their size to reside in environments of large fluctuations. Here we review the fundamentals of the computational, analytical, and experimental approaches to noise biology. We review results that show that the competition between the benefits of low noise and those of low population has resulted in the evolution of genetic system architectures that produce an uneven distribution of stochasticity across the molecular components of cells and, in some cases, use noise to drive biological function. We review the exact and approximate approaches to gene circuit noise analysis and simulation, and reviewmany of the key experimental results obtained using flow cytometry and time-lapse fluorescent microscopy. In addition, we consider the probative value of noise with a discussion of using measured noise properties to elucidate the structure and function of the underlying gene circuit. We conclude with a discussion of the frontiers of and significant future challenges for noise biology.

  10. Quasi-Linear Circuit

    NASA Technical Reports Server (NTRS)

    Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth

    2013-01-01

    This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output

  11. Jitter compensation circuit

    DOEpatents

    Sullivan, J.S.; Ball, D.G.

    1997-09-09

    The instantaneous V{sub co} signal on a charging capacitor is sampled and the charge voltage on capacitor C{sub o} is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V{sub co} signal is split between a gain stage (G = 0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V{sub co} signal is applied to the negative input of a differential amplifier gain stage (G = 10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V{sub co} signal from the instantaneous value of sampled V{sub co} signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V{sub co} values squared divided by the total volt-second product of the magnetic compression circuit. 11 figs.

  12. Jitter compensation circuit

    DOEpatents

    Sullivan, James S.; Ball, Don G.

    1997-01-01

    The instantaneous V.sub.co signal on a charging capacitor is sampled and the charge voltage on capacitor C.sub.o is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V.sub. co signal is split between a gain stage (G=0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V.sub.co signal is applied to the negative input of a differential amplifier gain stage (G=10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V.sub.co signal from the instantaneous value of sampled V.sub.co signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V.sub.co values squared divided by the total volt-second product of the magnetic compression circuit.

  13. Time in Cortical Circuits

    PubMed Central

    Shadlen, Michael N.; Jazayeri, Mehrdad; Nobre, Anna C.; Buonomano, Dean V.

    2015-01-01

    Time is central to cognition. However, the neural basis for time-dependent cognition remains poorly understood. We explore how the temporal features of neural activity in cortical circuits and their capacity for plasticity can contribute to time-dependent cognition over short time scales. This neural activity is linked to cognition that operates in the present or anticipates events or stimuli in the near future. We focus on deliberation and planning in the context of decision making as a cognitive process that integrates information across time. We progress to consider how temporal expectations of the future modulate perception. We propose that understanding the neural basis for how the brain tells time and operates in time will be necessary to develop general models of cognition. SIGNIFICANCE STATEMENT Time is central to cognition. However, the neural basis for time-dependent cognition remains poorly understood. We explore how the temporal features of neural activity in cortical circuits and their capacity for plasticity can contribute to time-dependent cognition over short time scales. We propose that understanding the neural basis for how the brain tells time and operates in time will be necessary to develop general models of cognition. PMID:26468192

  14. Simple Cell Balance Circuit

    NASA Technical Reports Server (NTRS)

    Johnson, Steven D.; Byers, Jerry W.; Martin, James A.

    2012-01-01

    A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

  15. QR Codes

    ERIC Educational Resources Information Center

    Lai, Hsin-Chih; Chang, Chun-Yen; Li, Wen-Shiane; Fan, Yu-Lin; Wu, Ying-Tien

    2013-01-01

    This study presents an m-learning method that incorporates Integrated Quick Response (QR) codes. This learning method not only achieves the objectives of outdoor education, but it also increases applications of Cognitive Theory of Multimedia Learning (CTML) (Mayer, 2001) in m-learning for practical use in a diverse range of outdoor locations. When…

  16. Identification coding schemes for modulated reflectance systems

    DOEpatents

    Coates, Don M.; Briles, Scott D.; Neagley, Daniel L.; Platts, David; Clark, David D.

    2006-08-22

    An identifying coding apparatus employing modulated reflectance technology involving a base station emitting a RF signal, with a tag, located remotely from the base station, and containing at least one antenna and predetermined other passive circuit components, receiving the RF signal and reflecting back to the base station a modulated signal indicative of characteristics related to the tag.

  17. A bit serial sequential circuit

    NASA Technical Reports Server (NTRS)

    Hu, S.; Whitaker, S.

    1990-01-01

    Normally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.

  18. Automated Design of Quantum Circuits

    NASA Technical Reports Server (NTRS)

    Williams, Colin P.; Gray, Alexander G.

    2000-01-01

    In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.

  19. Audio distribution and Monitoring Circuit

    NASA Technical Reports Server (NTRS)

    Kirkland, J. M.

    1983-01-01

    Versatile circuit accepts and distributes TV audio signals. Three-meter audio distribution and monitoring circuit provides flexibility in monitoring, mixing, and distributing audio inputs and outputs at various signal and impedance levels. Program material is simultaneously monitored on three channels, or single-channel version built to monitor transmitted or received signal levels, drive speakers, interface to building communications, and drive long-line circuits.

  20. Power-Supply-Conditioning Circuit

    NASA Technical Reports Server (NTRS)

    Primas, L. E.; Loveland, R. C.

    1989-01-01

    Fluctuations of voltage suppressed in power supplies for precise radio-frequency circuits. Circuit suppresses both periodic and random deviations of dc supply voltage from desired steady level. Highly-stable feedback voltage regulator, conditioner intended in conjunction with conventional power-supply circuit to provide constant voltage to atomic frequency standard or other precise oscillator. Without conditioners, outputs of most commercial power supplies contain fluctuations causing unacceptably-large phase and amplitude modulation of precise oscillators.

  1. Source-circuit design overview

    NASA Technical Reports Server (NTRS)

    Ross, R. G., Jr.

    1983-01-01

    The source circuit is the fundamental electrical building block of a large central-station array; it consists of a series-parallel network of solar cells that develops full system voltage. The array field is generally made up of a large number of parallel source circuits. Source-circuit electrical configuration is driven by a number of design considerations, which must be considered simultaneously. Array fault tolerance and hot spot heating endurance are examined in detail.

  2. Electronic control circuits: A compilation

    NASA Technical Reports Server (NTRS)

    1973-01-01

    A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

  3. Four-junction superconducting circuit

    NASA Astrophysics Data System (ADS)

    Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J. Q.

    2016-06-01

    We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit.

  4. Magnetic compression laser driving circuit

    DOEpatents

    Ball, D.G.; Birx, D.; Cook, E.G.

    1993-01-05

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  5. Magnetic compression laser driving circuit

    DOEpatents

    Ball, Don G.; Birx, Dan; Cook, Edward G.

    1993-01-01

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 Kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 Kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  6. Four-junction superconducting circuit.

    PubMed

    Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J Q

    2016-01-01

    We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit. PMID:27356619

  7. PRECISION TIME-DELAY CIRCUIT

    DOEpatents

    Creveling, R.

    1959-03-17

    A tine-delay circuit which produces a delay time in d. The circuit a capacitor, an te back resistance, connected serially with the anode of the diode going to ground. At the start of the time delay a negative stepfunction is applied to the series circuit and initiates a half-cycle transient oscillatory voltage terminated by a transient oscillatory voltage of substantially higher frequency. The output of the delay circuit is taken at the junction of the inductor and diode where a sudden voltage rise appears after the initiation of the higher frequency transient oscillations.

  8. Four-junction superconducting circuit

    PubMed Central

    Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J. Q.

    2016-01-01

    We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit. PMID:27356619

  9. Add/Compare/Select Circuit For Rapid Decoding

    NASA Technical Reports Server (NTRS)

    Budinger, James M.; Becker, Neal D.; Johnson, Peter N.

    1993-01-01

    Prototype decoding system operates at 200 Mb/s. ACS (add/compare/select) gate array is highly integrated emitter-coupled-logic circuit implementing arithmetic operations essential to Viterbi decoding of convolutionally encoded data signals. Principal advantage of circuit is speed. Operates as single unit performing eight additions and finds minimum of eight sums, or operates as two independent units, each performing four additions and finding minimum of four sums. Flexibility enables application to variety of different codes. Includes built-in self-testing circuitry, enabling unit to be tested at full speed with help of only simple test fixture.

  10. A Circuit to Demonstrate Phase Relationships in "RLC" Circuits

    ERIC Educational Resources Information Center

    Sokol, P. E.; Warren, G.; Zheng, B.; Smith, P.

    2013-01-01

    We have developed a circuit to demonstrate the phase relationships between resistive and reactive elements in series "RLC" circuits. We utilize a differential amplifier to allow the phases of the three elements and the current to be simultaneously displayed on an inexpensive four channel oscilloscope. We have included a novel circuit…

  11. Photoconductive circuit element reflectometer

    DOEpatents

    Rauscher, C.

    1987-12-07

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a determinable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line. 4 figs.

  12. Photoconductive circuit element reflectometer

    DOEpatents

    Rauscher, Christen

    1990-01-01

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a variable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line.

  13. ELECTRONIC PULSE SCALING CIRCUITS

    DOEpatents

    Cooke-Yarborough, E.H.

    1958-11-18

    Electronic pulse scaling circults of the klnd comprlsing a serles of bi- stable elements connected ln sequence, usually in the form of a rlng so as to be cycllcally repetitive at the highest scallng factor, are described. The scaling circuit comprises a ring system of bi-stable elements each arranged on turn-off to cause, a succeeding element of the ring to be turned-on, and one being arranged on turn-off to cause a further element of the ring to be turned-on. In addition, separate means are provided for applying a turn-off pulse to all the elements simultaneously, and for resetting the elements to a starting condition at the end of each cycle.

  14. Laser diode protection circuit

    SciTech Connect

    Burgyan, L.; Hand, W.L.

    1990-05-08

    This patent describes a method for protecting a laser diode included within an electro-optical circuit. It comprises: the laser diode, a DC bias supply for supplying forward conduction current to the laser diode to cause it to emit light energy at a predetermined quiescent operating point, and an RF amplifier means for supplying an RF amplitude of an analog modulating signal to the laser diode for modulating the intensity of the emitted light energy about the quiescent operating point thereof, the method including providing a very high impedance to the laser diode during its nominal operating conditions about the quiescent point and, sensing an instantaneous amplitude of the RF amplitude modulating signal to detect amplitude surges therein, and responding to the sensing means by removing forward conduction current from the laser diode during the sense amplitude surges int he RF amplitude of the analog modulating signal, thereby causing the laser diode to reduce emission of light energy to a safe level.

  15. Modeling cortical circuits.

    SciTech Connect

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  16. ELECTRONIC INTEGRATING CIRCUIT

    DOEpatents

    Englemann, R.H.

    1963-08-20

    An electronic integrating circuit using a transistor with a capacitor connected between the emitter and collector through which the capacitor discharges at a rate proportional to the input current at the base is described. Means are provided for biasing the base with an operating bias and for applying a voltage pulse to the capacitor for charging to an initial voltage. A current dividing diode is connected between the base and emitter of the transistor, and signal input terminal means are coupled to the juncture of the capacitor and emitter and to the base of the transistor. At the end of the integration period, the residual voltage on said capacitor is less by an amount proportional to the integral of the input signal. Either continuous or intermittent periods of integration are provided. (AEC)

  17. VLSI circuits implementing computational models of neocortical circuits.

    PubMed

    Wijekoon, Jayawan H B; Dudek, Piotr

    2012-09-15

    This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. PMID:22342970

  18. Compact Circuit Preprocesses Accelerometer Output

    NASA Technical Reports Server (NTRS)

    Bozeman, Richard J., Jr.

    1993-01-01

    Compact electronic circuit transfers dc power to, and preprocesses ac output of, accelerometer and associated preamplifier. Incorporated into accelerometer case during initial fabrication or retrofit onto commercial accelerometer. Made of commercial integrated circuits and other conventional components; made smaller by use of micrologic and surface-mount technology.

  19. Sequential Polarity-Reversing Circuit

    NASA Technical Reports Server (NTRS)

    Labaw, Clayton C.

    1994-01-01

    Proposed circuit reverses polarity of electric power supplied to bidirectional dc motor, reversible electro-mechanical actuator, or other device operating in direction depending on polarity. Circuit reverses polarity each time power turned on, without need for additional polarity-reversing or direction signals and circuitry to process them.

  20. Postirradiation Effects In Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Shaw, David C.; Barnes, Charles E.

    1993-01-01

    Two reports discuss postirradiation effects in integrated circuits. Presents examples of postirradiation measurements of performances of integrated circuits of five different types: dual complementary metal oxide/semiconductor (CMOS) flip-flop; CMOS analog multiplier; two CMOS multiplying digital-to-analog converters; electrically erasable programmable read-only memory; and semiconductor/oxide/semiconductor octal buffer driver.

  1. Demonstrations with an "LCR" Circuit

    ERIC Educational Resources Information Center

    Kraftmakher, Yaakov

    2011-01-01

    The "LCR" circuit is an important topic in the course of electricity and magnetism. Papers in this field consider mainly the forced oscillations and resonance. Our aim is to show how to demonstrate the free and self-excited oscillations in an "LCR" circuit. (Contains 4 figures.)

  2. Dive In to Aquatic Circuits.

    ERIC Educational Resources Information Center

    Goldfarb, Joseph M.

    1995-01-01

    The article presents a method for swimming teachers and coaches to stave off workout boredom in their students by using a circuit in the pool. After explaining how to set up a training circuit, the article describes sample stations and notes important safety precautions. (SM)

  3. Pharmacokinetics and "RC" Circuit Concepts

    ERIC Educational Resources Information Center

    De Cock, Mieke; Janssen, Paul

    2013-01-01

    Most introductory physics courses include a chapter on "RC" circuits in which the differential equations for the charging and discharging of a capacitor are derived. A number of papers in this journal describe lab experiments dealing with the measurement of different parameters in such "RC" circuits. In this contribution, we…

  4. Time domain analog circuit simulation

    NASA Astrophysics Data System (ADS)

    Fijnvandraat, J. G.; Houben, S. H. M. J.; Ter Maten, E. J. W.; Peters, J. M. F.

    2006-01-01

    Recent developments of new methods for simulating electric circuits are described. Emphasis is put on methods that fit existing datastructures for backward differentiation formulae methods. These methods can be modified to apply to hierarchically organized datastructures, which allows for efficient simulation of large designs of circuits in the electronics industry.

  5. Digital circuits using universal logic gates

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  6. Demultiplexer circuit for neural stimulation

    DOEpatents

    Wessendorf, Kurt O; Okandan, Murat; Pearson, Sean

    2012-10-09

    A demultiplexer circuit is disclosed which can be used with a conventional neural stimulator to extend the number of electrodes which can be activated. The demultiplexer circuit, which is formed on a semiconductor substrate containing a power supply that provides all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. This addressing information is used to program one or more 1:2.sup.N demultiplexers in the demultiplexer circuit which then route neural stimulation signals from the neural stimulator to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array to be increased by a factor of 2.sup.N with N generally being in a range of 2-4.

  7. Twin reservoir heat transfer circuit

    SciTech Connect

    Urch, J.F.

    1986-09-23

    This patent describes a heat transfer means comprising circuitry defining a closed flow path for working fluid; a primary circuit forming part of the path and having two ends at one of which the working fluid is at a high pressure and at the other of which the working fluid is at a low pressure. The circuitry defines a fluid supply reservoir and a fluid collection reservoir disposed respectively at the two ends; ejector means in the primary circuit; a drive fluid inlet, and exhaust outlet and a suction inlet provided on the ejector means. Also included are a branch circuit bridging a section of the primary circuit and an outlet end of the branch circuit connected to the suction inlet of the ejector means.

  8. Genetic Dissection of Neural Circuits

    PubMed Central

    Luo, Liqun; Callaway, Edward M.; Svoboda, Karel

    2009-01-01

    Understanding the principles of information processing in neural circuits requires systematic characterization of the participating cell types and their connections, and the ability to measure and perturb their activity. Genetic approaches promise to bring experimental access to complex neural systems, including genetic stalwarts such as the fly and mouse, but also to nongenetic systems such as primates. Together with anatomical and physiological methods, cell-type-specific expression of protein markers and sensors and transducers will be critical to construct circuit diagrams and to measure the activity of genetically defined neurons. Inactivation and activation of genetically defined cell types will establish causal relationships between activity in specific groups of neurons, circuit function, and animal behavior. Genetic analysis thus promises to reveal the logic of the neural circuits in complex brains that guide behaviors. Here we review progress in the genetic analysis of neural circuits and discuss directions for future research and development. PMID:18341986

  9. Electronic design with integrated circuits

    NASA Astrophysics Data System (ADS)

    Comer, D. J.

    The book is concerned with the application of integrated circuits and presents the material actually needed by the system designer to do an effective job. The operational amplifier (op amp) is discussed, taking into account the electronic amplifier, the basic op amp, the practical op amp, analog applications, and digital applications. Digital components are considered along with combinational logic, digital subsystems, the microprocessor, special circuits, communications, and integrated circuit building blocks. Attention is given to logic gates, logic families, multivibrators, the digital computer, digital methods, communicating with a computer, computer organization, register and timing circuits for data transfer, arithmetic circuits, memories, the microprocessor chip, the control unit, communicating with the microprocessor, examples of microprocessor architecture, programming a microprocessor, the voltage-controlled oscillator, the phase-locked loop, analog-to-digital conversion, amplitude modulation, frequency modulation, pulse and digital transmission, the semiconductor diode, the bipolar transistor, and the field-effect transistor.

  10. An Electronics Course Emphasizing Circuit Design

    ERIC Educational Resources Information Center

    Bergeson, Haven E.

    1975-01-01

    Describes a one-quarter introductory electronics course in which the students use a variety of inexpensive integrated circuits to design and construct a large number of useful circuits. Presents the subject matter of the course in three parts: linear circuits, digital circuits, and more complex circuits. (GS)

  11. 49 CFR 236.728 - Circuit, trap.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, trap. 236.728 Section 236.728... Circuit, trap. A term applied to a circuit used where it is desirable to provide a track circuit but where it is impracticable to maintain a track circuit....

  12. Gate drive latching circuit for an auxiliary resonant commutation circuit

    NASA Technical Reports Server (NTRS)

    Delgado, Eladio Clemente (Inventor); Kheraluwala, Mustansir Hussainy (Inventor)

    1999-01-01

    A gate drive latching circuit for an auxiliary resonant commutation circuit for a power switching inverter includes a current monitor circuit providing a current signal to a pair of analog comparators to implement latching of one of a pair of auxiliary switching devices which are used to provide commutation current for commutating switching inverters in the circuit. Each of the pair of comparators feeds a latching circuit which responds to an active one of the comparators for latching the associated gate drive circuit for one of the pair of auxiliary commutating switches. An initial firing signal is applied to each of the commutating switches to gate each into conduction and the resulting current is monitored to determine current direction and therefore the one of the switches which is carrying current. The comparator provides a latching signal to the one of the auxiliary power switches which is actually conducting current and latches that particular power switch into an on state for the duration of current through the device. The latching circuit is so designed that the only time one of the auxiliary switching devices can be latched on is during the duration of an initial firing command signal.

  13. A circuit to demonstrate phase relationships in RLC circuits

    NASA Astrophysics Data System (ADS)

    Sokol, P. E.; Warren, G.; Zheng, B.; Smith, P.

    2013-05-01

    We have developed a circuit to demonstrate the phase relationships between resistive and reactive elements in series RLC circuits. We utilize a differential amplifier to allow the phases of the three elements and the current to be simultaneously displayed on an inexpensive four channel oscilloscope. We have included a novel circuit that provides a visual indication of the magnitude and direction of the voltage or current using LEDs. This allows the phase relationships to be demonstrated directly using the very intuitive measurement of the brightness of a light.

  14. Circuit Simulations of a 1 MV LTD for radiography.

    SciTech Connect

    Portillo, Salvador; Johnson, David L.; Leckbee, Joshua J.; Rose, David Vincent; Kim, Alexandre A.; Ziska, Derek Raymond; Chavez, Raymond; Molina, Isidro; Maenchen, John Eric

    2005-07-01

    A 1 MV linear transformer driver (LTD), capable of driving a radiographic diode load, has been built and tested. A circuit model of this accelerator has been developed using the BERTHA circuit simulation code. Simulations are compared to data from power-flow experiments utilizing a large area electron-beam diode load. Results show that the simulation model performs well in modeling the baseline operation of the accelerator. In addition, the circuit model has been used to predict several possible fault modes. Simulations of switch prefires, main capacitor failure, vacuum insulator flashover, and core saturation have been used to estimate the probability of inducing further failures and the impact on the load voltage and current.

  15. Reduced circuit implementation of encoder and syndrome generator

    SciTech Connect

    Trager, Barry M; Winograd, Shmuel

    2014-05-27

    An error correction method and system includes an Encoder and Syndrome-generator that operate in parallel to reduce the amount of circuitry used to compute check symbols and syndromes for error correcting codes. The system and method computes the contributions to the syndromes and check symbols 1 bit at a time instead of 1 symbol at a time. As a result, the even syndromes can be computed as powers of the odd syndromes. Further, the system assigns symbol addresses so that there are, for an example GF(2.sup.8) which has 72 symbols, three (3) blocks of addresses which differ by a cube root of unity to allow the data symbols to be combined for reducing size and complexity of odd syndrome circuits. Further, the implementation circuit for generating check symbols is derived from syndrome circuit using the inverse of the part of the syndrome matrix for check locations.

  16. Piezo-optomechanical circuits

    NASA Astrophysics Data System (ADS)

    Coimbatore Balram, Krishna; Davanco, Marcelo; Ilic, B. Robert; Srinivasan, Kartik

    Coherent links between the optical, radio frequency (RF), and mechanical domains are critical for applications ranging from quantum state transfer between the RF and optical domains to signal processing in the acoustic domain for microwave photonics. We develop such a piezo optomechanical circuit platform in GaAs, in which localized and interacting 1550 nm photons and 2.4 GHz phonons are combined with photonic and phononic waveguides. GaAs allows us to exploit the photoelastic effect to engineer cavities with strong optomechanical coupling (g0/2 π ~ 1.1 MHz) and the piezoelectric effect to couple RF fields to mechanical motion through surface acoustic waves, which are routed on-chip using phononic crystal waveguides. This platform enables optical readout of electrically-injected mechanical states with an average coherent intracavity phonon number as small as ~0.05 and the ability to drive mechanical motion with equal facility through either the optical or electrical channel. This is used to demonstrate a novel acoustic wave interference effect in which optically-driven motion is completely cancelled by electrically-driven motion, and vice versa. As an application of this, we present time-domain measurements of optically-controlled acoustic pulse propagation. Secondary Affiliation is Maryland Nanocenter, University of Maryland, College Park, MD.

  17. Nanofluidic Transistor Circuits

    NASA Astrophysics Data System (ADS)

    Chang, Hsueh-Chia; Cheng, Li-Jing; Yan, Yu; Slouka, Zdenek; Senapati, Satyajyoti

    2012-02-01

    Non-equilibrium ion/fluid transport physics across on-chip membranes/nanopores is used to construct rectifying, hysteretic, oscillatory, excitatory and inhibitory nanofluidic elements. Analogs to linear resistors, capacitors, inductors and constant-phase elements were reported earlier (Chang and Yossifon, BMF 2009). Nonlinear rectifier is designed by introducing intra-membrane conductivity gradient and by asymmetric external depletion with a reverse rectification (Yossifon and Chang, PRL, PRE, Europhys Lett 2009-2011). Gating phenomenon is introduced by functionalizing polyelectrolytes whose conformation is field/pH sensitive (Wang, Chang and Zhu, Macromolecules 2010). Surface ion depletion can drive Rubinstein's microvortex instability (Chang, Yossifon and Demekhin, Annual Rev of Fluid Mech, 2012) or Onsager-Wien's water dissociation phenomenon, leading to two distinct overlimiting I-V features. Bipolar membranes exhibit an S-hysteresis due to water dissociation (Cheng and Chang, BMF 2011). Coupling the hysteretic diode with some linear elements result in autonomous ion current oscillations, which undergo classical transitions to chaos. Our integrated nanofluidic circuits are used for molecular sensing, protein separation/concentration, electrospray etc.

  18. PHOTOSENSITIVE RELAY CONTROL CIRCUIT

    DOEpatents

    Martin, C.F.

    1958-01-14

    adapted for the measurement of the time required for an oscillating member to pass through a preselected number of oscillations, after being damped to a certain maximum amplitude of oscillation. A mirror is attached to the moving member and directs light successively to a photocell which is part of a trigger unit and to first and second photocells which are part of a starter unit, as the member swings to its maximum amplitude. The starter and trigger units comprise thyratrons and relays so interconnected that the trigger circuit, although generating a counter pulse, does not register a count in the counter when the light traverses both photocells of the starter unit. When the amplitude of oscillation of the member decreases to where the second photocell is not transversed, the triggei pulse is received by the counter. The counter taen operates to register the desired number of oscillations and initiates and terminates a timer for measuring the time irterval for the preselected number of oscillations.

  19. Speech coding research at Bell Laboratories

    NASA Astrophysics Data System (ADS)

    Atal, Bishnu S.

    2001-05-01

    The field of speech coding is now over 70 years old. It started from the desire to transmit voice signals over telegraph cables. The availability of digital computers in the mid 1960s made it possible to test complex speech coding algorithms rapidly. The introduction of linear predictive coding (LPC) started a new era in speech coding. The fundamental philosophy of speech coding went through a major shift, resulting in a new generation of low bit rate speech coders, such as multi-pulse and code-excited LPC. The semiconductor revolution produced faster and faster DSP chips and made linear predictive coding practical. Code-excited LPC has become the method of choice for low bit rate speech coding applications and is used in most voice transmission standards for cell phones. Digital speech communication is rapidly evolving from circuit-switched to packet-switched networks to provide integrated transmission of voice, data, and video signals. The new communication environment is also moving the focus of speech coding research from compression to low cost, reliable, and secure transmission of voice signals on digital networks, and provides the motivation for creating a new class of speech coders suitable for future applications.

  20. Variational integrators for electric circuits

    SciTech Connect

    Ober-Blöbaum, Sina; Tao, Molei; Cheng, Mulin; Owhadi, Houman; Marsden, Jerrold E.

    2013-06-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.

  1. Performance analysis of electrical circuits /PANE/

    NASA Technical Reports Server (NTRS)

    Johnson, K. L.; Steinberg, L. L.

    1968-01-01

    Automated statistical and worst case computer program has been designed to perform dc and ac steady circuit analyses. The program determines the worst case circuit performance by solving circuit equations.

  2. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... Controller, circuit. A device for opening and closing electric circuits. ... 49 Transportation 4 2014-10-01 2014-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD...

  3. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... Controller, circuit. A device for opening and closing electric circuits. ... 49 Transportation 4 2013-10-01 2013-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD...

  4. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... Controller, circuit. A device for opening and closing electric circuits. ... 49 Transportation 4 2010-10-01 2010-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD...

  5. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... Controller, circuit. A device for opening and closing electric circuits. ... 49 Transportation 4 2011-10-01 2011-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD...

  6. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... Controller, circuit. A device for opening and closing electric circuits. ... 49 Transportation 4 2012-10-01 2012-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD...

  7. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...

  8. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... with devices to provide protection against under-voltage grounded phase, short circuit, and overcurrent. ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground...

  9. Framed 4-graphs: Euler tours, Gauss circuits and rotating circuits

    SciTech Connect

    Il'yutko, Denis P

    2011-09-30

    We consider connected finite 4-valent graphs with the structure of opposite edges at each vertex (framed 4-graphs). For any of such graphs there exist Euler tours, in travelling along which at each vertex we turn from an edge to a nonopposite one (rotating circuits); and at the same time, it is not true that for any such graph there exists an Euler tour passing from an edge to the opposite one at each vertex (a Gauss circuit). The main result of the work is an explicit formula connecting the adjacency matrices of the Gauss circuit and an arbitrary Euler tour. This formula immediately gives us a criterion for the existence of a Gauss circuit on a given framed 4-graph. It turns out that the results are also valid for all symmetric matrices (not just for matrices realisable by a chord diagram). Bibliography: 24 titles.

  10. Framed 4-graphs: Euler tours, Gauss circuits and rotating circuits

    NASA Astrophysics Data System (ADS)

    Il'yutko, Denis P.

    2011-09-01

    We consider connected finite 4-valent graphs with the structure of opposite edges at each vertex (framed 4-graphs). For any of such graphs there exist Euler tours, in travelling along which at each vertex we turn from an edge to a nonopposite one (rotating circuits); and at the same time, it is not true that for any such graph there exists an Euler tour passing from an edge to the opposite one at each vertex (a Gauss circuit). The main result of the work is an explicit formula connecting the adjacency matrices of the Gauss circuit and an arbitrary Euler tour. This formula immediately gives us a criterion for the existence of a Gauss circuit on a given framed 4-graph. It turns out that the results are also valid for all symmetric matrices (not just for matrices realisable by a chord diagram). Bibliography: 24 titles.

  11. Integrated circuits, and design and manufacture thereof

    SciTech Connect

    Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

    2006-04-18

    A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

  12. Searching Circuit For A Servoloop

    NASA Technical Reports Server (NTRS)

    Sigman, E. H.

    1988-01-01

    Feedback error voltage forced into range of stability. Circuit connected in series with error-voltage line of feedback loop. When loop operates normally in stable region, searching circuit does not disturb operation, and error-voltage output of loop filter is control voltage. When servo unlocks and error-voltage output of loop filter wanders into unstable range, searching circuit forces control voltage to sweep through stable region repeatedly until lock recovered. Consists of two halves identical except polarities of some parts in each half opposite of corresponding parts in other half.

  13. Ladder supported ring bar circuit

    NASA Technical Reports Server (NTRS)

    Kosmahl, H. G. (Inventor)

    1983-01-01

    An improved slow wave circuit especially useful in backward wave oscillators includes a slow wave circuit in a waveguide. The slow wave circuit is comprised of rings disposed between and attached to respective stubs. The stubs are attached to opposing sidewalls of the waveguide. To the end that opposed, interacting magnetic fields will be established to provide a very high coupling impedance for the slow wave structure, axially orientated bars are connected between rings in alternate spaces and adjacent to the attachment points of stubs. Similarly, axial bars are connected between rings in the spaces which do not include bars and at points adjacent to the attachment of bars.

  14. Counterpulse railgun energy recovery circuit

    DOEpatents

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  15. Overpulse railgun energy recovery circuit

    DOEpatents

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  16. Engineering stabilizer measurements in circuit QED: II

    NASA Astrophysics Data System (ADS)

    Blumoff, Jacob; Chou, Kevin; Reagor, M.; Axline, C.; Brierly, R.; Nigg, S.; Reinhold, P.; Heeres, R.; Wang, C.; Sliwa, K.; Narla, A.; Hatridge, M.; Jiang, L.; Devoret, M. H.; Girvin, S. M.; Schoelkopf, R. J.

    Quantum error correction based on stabilizer codes has emerged as an attractive approach towards building a practical quantum information processor. One requirement for such a device is the ability to perform hardware efficient measurements on registers of qubits. We demonstrate a new protocol to realize such multi-qubit measurements. A key feature of our approach is that it enables arbitrary stabilizer measurements to be selected in software, and requires a relatively small number of buses, ancillae, and control lines. This allows for a minimally complex sample realizing a simple dispersive hamiltonian while maintaining a high degree of decoupling between our fixed-tuned qubits. We experimentally implement these measurements in 3D circuit QED using transmon qubits coupled to a common bus resonator. In the second of two talks, we present a full characterization of the algorithm describing the outcome dependent projections via quantum process tomography. We acknowledge funding from ARO.

  17. Engineering stabilizer measurements in circuit QED: I

    NASA Astrophysics Data System (ADS)

    Chou, Kevin; Blumoff, Jacob; Reagor, M.; Axline, C.; Brierley, R.; Nigg, S.; Reinhold, P.; Heeres, R.; Wang, C.; Sliwa, K.; Narla, A.; Hatridge, M.; Jiang, L.; Devoret, M. H.; Girvin, S. M.; Schoekopf, R. J.

    Quantum error correction based on stabilizer codes has emerged as an attractive approach towards building a practical quantum information processor. One requirement for such a device is the ability to perform hardware efficient measurements on registers of qubits. We demonstrate a new protocol to realize such multi-qubit measurements. A key feature of our approach is that it enables arbitrary stabilizer measurements to be selected in software, and requires a relatively small number of buses, ancillae, and control lines. This allows for a minimally complex sample realizing a simple dispersive hamiltonian while maintaining a high degree of decoupling between our fixed-tuned qubits. We experimentally implement these measurements in 3D circuit QED using transmon qubits coupled to a common bus resonator. In this first of two talks, we introduce our 3D cQED system and describe the protocol for measuring n-qubit parities of a three qubit register. We acknowledge funding from ARO.

  18. Noise consideration in RSFQ circuits

    NASA Astrophysics Data System (ADS)

    Kaplunenko, V.

    2002-08-01

    Recently we reported a direct time jitter measurement, obtained using a ring-like Josephson transmission line (JTL). The jitter value of 0.2 ps/ n ( n--number of junctions in JTL) was obtained for the circuit that was fabricated using the 1 kA/cm 2 Hypres process. In this paper, we report the following investigation of the noise impact on rapid single flux quantum circuits in general, and particularly on two types of clock recovery circuits. The study explains the previously obtained results and shows that a wide frequency band clock recovery unit can be made using 50-junctions and a low-yield high-temperature superconductor technology and operating at 50 K. This approach would relatively easily enable us to implement such a circuit using the packaging of Conductus' commercial products for the wireless industry, which include a cryo-cooler, low noise amplifiers, and a high-frequency interface.

  19. Leveling circuits and crustal movements

    NASA Technical Reports Server (NTRS)

    Chi, S. C.; Reilinger, R. E.; Brown, L. D.; Oliver, J. E.

    1980-01-01

    An investigation of further possible vertical crustal movements in the Western United States made with circuit microclosure analysis is presented. The San Andreas fault in Cal., the Nevada seismic zone in Nev., and the Sierra Nevada in Calif. were studied based on supposition that in areas undergoing crustal movement the misclosure for a particular circuit should have the smallest value when the circuit is formed from the most temporarily homogeneous survey data; it should have larger, predictable values when the circuit is closed with surveys conducted at other times. Leveling surveys along the San Andreas fault and the Nevada seismic zone are discussed, noting the possibility of regional tilting in the Great Basin between 1934 and 1955, and of elevation changes in the Northern Nevada Range using results of leveling surveys between Roseville, Cal. and Reno, Nev.

  20. Midbrain circuits for defensive behaviour.

    PubMed

    Tovote, Philip; Esposito, Maria Soledad; Botta, Paolo; Chaudun, Fabrice; Fadok, Jonathan P; Markovic, Milica; Wolff, Steffen B E; Ramakrishnan, Charu; Fenno, Lief; Deisseroth, Karl; Herry, Cyril; Arber, Silvia; Lüthi, Andreas

    2016-06-01

    Survival in threatening situations depends on the selection and rapid execution of an appropriate active or passive defensive response, yet the underlying brain circuitry is not understood. Here we use circuit-based optogenetic, in vivo and in vitro electrophysiological, and neuroanatomical tracing methods to define midbrain periaqueductal grey circuits for specific defensive behaviours. We identify an inhibitory pathway from the central nucleus of the amygdala to the ventrolateral periaqueductal grey that produces freezing by disinhibition of ventrolateral periaqueductal grey excitatory outputs to pre-motor targets in the magnocellular nucleus of the medulla. In addition, we provide evidence for anatomical and functional interaction of this freezing pathway with long-range and local circuits mediating flight. Our data define the neuronal circuitry underlying the execution of freezing, an evolutionarily conserved defensive behaviour, which is expressed by many species including fish, rodents and primates. In humans, dysregulation of this 'survival circuit' has been implicated in anxiety-related disorders. PMID:27279213

  1. Automated Design of Quantum Circuits

    NASA Technical Reports Server (NTRS)

    Williams, C.; Gray, G.

    1998-01-01

    In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations.

  2. Student Conceptions of Simple Circuits.

    ERIC Educational Resources Information Center

    Fredette, Norman; Lochhead, John

    1980-01-01

    Investigates some conceptual difficulties which college students have with regard to simple direct current circuits. The clinical interview technique was used with 57 students in a freshman level engineering course. (HM)

  3. Principles of Genetic Circuit Design

    PubMed Central

    Brophy, Jennifer A.N.; Voigt, Christopher A.

    2014-01-01

    Cells are able to navigate environments, communicate, and build complex patterns by initiating gene expression in response to specific signals. Engineers need to harness this capability to program cells to perform tasks or build chemicals and materials that match the complexity seen in nature. This review describes new tools that aid the construction of genetic circuits. We show how circuit dynamics can be influenced by the choice of regulators and changed with expression “tuning knobs.” We collate the failure modes encountered when assembling circuits, quantify their impact on performance, and review mitigation efforts. Finally, we discuss the constraints that arise from operating within a living cell. Collectively, better tools, well-characterized parts, and a comprehensive understanding of how to compose circuits are leading to a breakthrough in the ability to program living cells for advanced applications, from living therapeutics to the atomic manufacturing of functional materials. PMID:24781324

  4. Focal plane infrared readout circuit

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor)

    2002-01-01

    An infrared imager, such as a spectrometer, includes multiple infrared photodetectors and readout circuits for reading out signals from the photodetectors. Each readout circuit includes a buffered direct injection input circuit including a differential amplifier with active feedback provided through an injection transistor. The differential amplifier includes a pair of input transistors, a pair of cascode transistors and a current mirror load. Photocurrent from a photodetector can be injected onto an integration capacitor in the readout circuit with high injection efficiency at high speed. A high speed, low noise, wide dynamic range linear infrared multiplexer array for reading out infrared detectors with large capacitances can be achieved even when short exposure times are used. The effect of image lag can be reduced.

  5. Quantum Circuits for Measuring Levin-Wen Operators

    NASA Astrophysics Data System (ADS)

    Bonesteel, Nick; Divincenzo, David

    2012-02-01

    We give explicit quantum circuits (expressed in terms of Toffoli gates, CNOTs and single qubit rotations) which can be used to perform quantum non-demolition measurements of the commuting set of vertex and plaquette operators that appear in the Levin-Wen model [1] for the case of doubled Fibonacci anyons. Such measurements can be viewed as syndrome measurements for the quantum error correcting code defined by the ground states of the Levin-Wen model --- a scenario envisioned in [2]. A key component in our construction is a quantum circuit F that acts on 5 qubits at a time and carries out a so-called F-move, a unitary operation whose form is essentially fixed by a self-consistency condition known as the pentagon equation. In addition to our measurement circuits we also give an explicit 7 qubit circuit which can be used to verify that F satisfies the full pentagon equation as well as a simpler 2 qubit circuit which verifies the essential nontrivial content of this equation. [1] M.A. Levin and X.-G. Wen, Phys. Rev. B 71 045110 (2005). [2] R. Koenig, G. Kuperberg, and B.W. Reichardt, Ann. Phys 325, 2707 (2010).

  6. Detector verifier for circuit analyzers

    NASA Technical Reports Server (NTRS)

    Pope, D. L.; Wooters, R. L.

    1980-01-01

    Economical tool checks operation of automatic circuit analyzer. Each loop is addressed directly from analyzer console by switching internal analyzer bridge to resistance equal that of connecting cable plus specified limiting test value. Procedure verifies whether detected faults in circuit under test are actually due to analyzer malfunction. Standard-length universal test cables make it possible to shift detector tool from cable to cable without resistance compensation.

  7. Reverse engineering of integrated circuits

    DOEpatents

    Chisholm, Gregory H.; Eckmann, Steven T.; Lain, Christopher M.; Veroff, Robert L.

    2003-01-01

    Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

  8. Codes with special correlation.

    NASA Technical Reports Server (NTRS)

    Baumert, L. D.

    1964-01-01

    Uniform binary codes with special correlation including transorthogonality and simplex code, Hadamard matrices and difference sets uniform binary codes with special correlation including transorthogonality and simplex code, Hadamard matrices and difference sets

  9. Receiver Gain Modulation Circuit

    NASA Technical Reports Server (NTRS)

    Jones, Hollis; Racette, Paul; Walker, David; Gu, Dazhen

    2011-01-01

    A receiver gain modulation circuit (RGMC) was developed that modulates the power gain of the output of a radiometer receiver with a test signal. As the radiometer receiver switches between calibration noise references, the test signal is mixed with the calibrated noise and thus produces an ensemble set of measurements from which ensemble statistical analysis can be used to extract statistical information about the test signal. The RGMC is an enabling technology of the ensemble detector. As a key component for achieving ensemble detection and analysis, the RGMC has broad aeronautical and space applications. The RGMC can be used to test and develop new calibration algorithms, for example, to detect gain anomalies, and/or correct for slow drifts that affect climate-quality measurements over an accelerated time scale. A generalized approach to analyzing radiometer system designs yields a mathematical treatment of noise reference measurements in calibration algorithms. By treating the measurements from the different noise references as ensemble samples of the receiver state, i.e. receiver gain, a quantitative description of the non-stationary properties of the underlying receiver fluctuations can be derived. Excellent agreement has been obtained between model calculations and radiometric measurements. The mathematical formulation is equivalent to modulating the gain of a stable receiver with an externally generated signal and is the basis for ensemble detection and analysis (EDA). The concept of generating ensemble data sets using an ensemble detector is similar to the ensemble data sets generated as part of ensemble empirical mode decomposition (EEMD) with exception of a key distinguishing factor. EEMD adds noise to the signal under study whereas EDA mixes the signal with calibrated noise. It is mixing with calibrated noise that permits the measurement of temporal-functional variability of uncertainty in the underlying process. The RGMC permits the evaluation of EDA by

  10. Error-correction coding

    NASA Technical Reports Server (NTRS)

    Hinds, Erold W. (Principal Investigator)

    1996-01-01

    This report describes the progress made towards the completion of a specific task on error-correcting coding. The proposed research consisted of investigating the use of modulation block codes as the inner code of a concatenated coding system in order to improve the overall space link communications performance. The study proposed to identify and analyze candidate codes that will complement the performance of the overall coding system which uses the interleaved RS (255,223) code as the outer code.