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Sample records for complementary metal-oxide-semiconductor biosensor

  1. Complementary metal oxide semiconductor-compatible silicon nanowire biofield-effect transistors as affinity biosensors.

    PubMed

    Duan, Xuexin; Rajan, Nitin K; Izadi, Mohammad Hadi; Reed, Mark A

    2013-11-01

    Affinity biosensors use biorecognition elements and transducers to convert a biochemical event into a recordable signal. They provides the molecule binding information, which includes the dynamics of biomolecular association and dissociation, and the equilibrium association constant. Complementary metal oxide semiconductor-compatible silicon (Si) nanowires configured as a field-effect transistor (NW FET) have shown significant advantages for real-time, label-free and highly sensitive detection of a wide range of biomolecules. Most research has focused on reducing the detection limit of Si-NW FETs but has provided less information about the real binding parameters of the biomolecular interactions. Recently, Si-NW FETs have been demonstrated as affinity biosensors to quantify biomolecular binding affinities and kinetics. They open new applications for NW FETs in the nanomedicine field and will bring such sensor technology a step closer to commercial point-of-care applications. This article summarizes the recent advances in bioaffinity measurement using Si-NW FETs, with an emphasis on the different approaches used to address the issues of sensor calibration, regeneration, binding kinetic measurements, limit of detection, sensor surface modification, biomolecule charge screening, reference electrode integration and nonspecific molecular binding. PMID:24156488

  2. Real-time, multiplexed electrochemical DNA detection using an active complementary metal-oxide-semiconductor biosensor array with integrated sensor electronics.

    PubMed

    Levine, Peter M; Gong, Ping; Levicky, Rastislav; Shepard, Kenneth L

    2009-03-15

    Optical biosensing based on fluorescence detection has arguably become the standard technique for quantifying extents of hybridization between surface-immobilized probes and fluorophore-labeled analyte targets in DNA microarrays. However, electrochemical detection techniques are emerging which could eliminate the need for physically bulky optical instrumentation, enabling the design of portable devices for point-of-care applications. Unlike fluorescence detection, which can function well using a passive substrate (one without integrated electronics), multiplexed electrochemical detection requires an electronically active substrate to analyze each array site and benefits from the addition of integrated electronic instrumentation to further reduce platform size and eliminate the electromagnetic interference that can result from bringing non-amplified signals off chip. We report on an active electrochemical biosensor array, constructed with a standard complementary metal-oxide-semiconductor (CMOS) technology, to perform quantitative DNA hybridization detection on chip using targets conjugated with ferrocene redox labels. A 4 x 4 array of gold working electrodes and integrated potentiostat electronics, consisting of control amplifiers and current-input analog-to-digital converters, on a custom-designed 5 mm x 3 mm CMOS chip drive redox reactions using cyclic voltammetry, sense DNA binding, and transmit digital data off chip for analysis. We demonstrate multiplexed and specific detection of DNA targets as well as real-time monitoring of hybridization, a task that is difficult, if not impossible, with traditional fluorescence-based microarrays. PMID:19054661

  3. High-temperature Complementary Metal Oxide Semiconductors (CMOS)

    NASA Technical Reports Server (NTRS)

    Mcbrayer, J. D.

    1981-01-01

    The results of an investigation into the possibility of using complementary metal oxide semiconductor (CMOS) technology for high temperature electronics are presented. A CMOS test chip was specifically developed as the test bed. This test chip incorporates CMOS transistors that have no gate protection diodes; these diodes are the major cause of leakage in commercial devices.

  4. The MSFC complementary metal oxide semiconductor (including multilevel interconnect metallization) process handbook

    NASA Technical Reports Server (NTRS)

    Bouldin, D. L.; Eastes, R. W.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.

    1979-01-01

    The fabrication techniques for creation of complementary metal oxide semiconductor integrated circuits at George C. Marshall Space Flight Center are described. Examples of C-MOS integrated circuits manufactured at MSFC are presented with functional descriptions of each. Typical electrical characteristics of both p-channel metal oxide semiconductor and n-channel metal oxide semiconductor discrete devices under given conditions are provided. Procedures design, mask making, packaging, and testing are included.

  5. Single-photon imaging in complementary metal oxide semiconductor processes

    PubMed Central

    Charbon, E.

    2014-01-01

    This paper describes the basics of single-photon counting in complementary metal oxide semiconductors, through single-photon avalanche diodes (SPADs), and the making of miniaturized pixels with photon-counting capability based on SPADs. Some applications, which may take advantage of SPAD image sensors, are outlined, such as fluorescence-based microscopy, three-dimensional time-of-flight imaging and biomedical imaging, to name just a few. The paper focuses on architectures that are best suited to those applications and the trade-offs they generate. In this context, architectures are described that efficiently collect the output of single pixels when designed in large arrays. Off-chip readout circuit requirements are described for a variety of applications in physics, medicine and the life sciences. Owing to the dynamic nature of SPADs, designs featuring a large number of SPADs require careful analysis of the target application for an optimal use of silicon real estate and of limited readout bandwidth. The paper also describes the main trade-offs involved in architecting such chips and the solutions adopted with focus on scalability and miniaturization. PMID:24567470

  6. Single-photon imaging in complementary metal oxide semiconductor processes.

    PubMed

    Charbon, E

    2014-03-28

    This paper describes the basics of single-photon counting in complementary metal oxide semiconductors, through single-photon avalanche diodes (SPADs), and the making of miniaturized pixels with photon-counting capability based on SPADs. Some applications, which may take advantage of SPAD image sensors, are outlined, such as fluorescence-based microscopy, three-dimensional time-of-flight imaging and biomedical imaging, to name just a few. The paper focuses on architectures that are best suited to those applications and the trade-offs they generate. In this context, architectures are described that efficiently collect the output of single pixels when designed in large arrays. Off-chip readout circuit requirements are described for a variety of applications in physics, medicine and the life sciences. Owing to the dynamic nature of SPADs, designs featuring a large number of SPADs require careful analysis of the target application for an optimal use of silicon real estate and of limited readout bandwidth. The paper also describes the main trade-offs involved in architecting such chips and the solutions adopted with focus on scalability and miniaturization. PMID:24567470

  7. Printable Ultrathin Metal Oxide Semiconductor-Based Conformal Biosensors.

    PubMed

    Rim, You Seung; Bae, Sang-Hoon; Chen, Huajun; Yang, Jonathan L; Kim, Jaemyung; Andrews, Anne M; Weiss, Paul S; Yang, Yang; Tseng, Hsian-Rong

    2015-12-22

    Conformal bioelectronics enable wearable, noninvasive, and health-monitoring platforms. We demonstrate a simple and straightforward method for producing thin, sensitive In2O3-based conformal biosensors based on field-effect transistors using facile solution-based processing. One-step coating via aqueous In2O3 solution resulted in ultrathin (3.5 nm), high-density, uniform films over large areas. Conformal In2O3-based biosensors on ultrathin polyimide films displayed good device performance, low mechanical stress, and highly conformal contact determined using polydimethylsiloxane artificial skin having complex curvilinear surfaces or an artificial eye. Immobilized In2O3 field-effect transistors with self-assembled monolayers of NH2-terminated silanes functioned as pH sensors. Functionalization with glucose oxidase enabled d-glucose detection at physiologically relevant levels. The conformal ultrathin field-effect transistor biosensors developed here offer new opportunities for future wearable human technologies. PMID:26498319

  8. Retinal Stimulation on Rabbit Using Complementary Metal Oxide Semiconductor Based Multichip Flexible Stimulator toward Retinal Prosthesis

    NASA Astrophysics Data System (ADS)

    Tokuda, Takashi; Asano, Ryosuke; Sugitani, Sachie; Taniyama, Mari; Terasawa, Yasuo; Nunoshita, Masahiro; Nakauchi, Kazuaki; Fujikado, Takashi; Tano, Yasuo; Ohta, Jun

    2008-04-01

    The Functionality of a complementary metal oxide semiconductor (CMOS) LSI-based, multichip flexible retinal stimulator was demonstrated in retinal stimulation experiments on rabbits. A 1×4-configured multichip stimulator was fabricated for application to experiments on animals. An experimental procedure including surgical operations was developed, and retinal stimulation was performed with the fabricated multichip stimulator. Neural responses on the visual cortex were successfully evoked by the fabricated stimulator. The stimulator is confirmed to be applicable to acute animal experiments.

  9. DNA detection using a complementary metal-oxide semiconductor ring oscillator circuit

    NASA Astrophysics Data System (ADS)

    Kocanda, Martin; Abdel-Motaleb, Ibrahim

    2010-10-01

    A DNA detection scheme has been implemented that utilizes a simple complementary metal-oxide semiconductor (CMOS) ring oscillator circuit. The detector oscillates at a fundamental frequency when using a nonhybridized single-strand DNA probe layer. Upon hybridization with a complimentary DNA strand, the oscillator output exhibits an increased frequency shift, indicating a genetic match. The probe assembly consists of a p-GaAs substrate containing a pulsed laser deposition-applied barium strontium titanate layer and an overlying sodium dodecyl sulfate lipid layer that serves to anchor a functionalized oligonucleotide probe. The oscillator circuit consisting of cascaded discrete complimentary n-channel and p-channel metal-oxide-semiconductor field-effect transistors was implemented using passive components arranged in a T-network to provide the associated fundamental time constant.

  10. Complementary metal-oxide-semiconductor compatible 1060 nm photodetector with ultrahigh gain under low bias.

    PubMed

    Hall, David; Li, Baoxia; Liu, Yu-Hsin; Yan, Lujiang; Lo, Yu-Hwa

    2015-10-01

    Falling on the tail of the absorption spectrum of silicon, 1060 nm Si detectors often suffer from low responsivity unless an exceedingly thick absorption layer is used, a design that requires high operation voltage and high purity epitaxial or substrate material. We report an all-silicon 1060 nm detector with ultrahigh gain to allow for low operation voltage (<4  V) and thin (200 nm) effective absorption layer, using the recently discovered cycling excitation process. With 1% external quantum efficiency, a responsivity of 93 A/W was demonstrated in a p/n junction device compatible with the complementary metal-oxide-semiconductor process. PMID:26421551

  11. Ultrasensitive mass sensor fully integrated with complementary metal-oxide-semiconductor circuitry

    SciTech Connect

    Forsen, E.; Abadal, G.; Ghatnekar-Nilsson, S.; Teva, J.; Verd, J.; Sandberg, R.; Svendsen, W.; Perez-Murano, F.; Esteve, J.; Figueras, E.; Campabadal, F.; Montelius, L.; Barniol, N.; Boisen, A.

    2005-07-25

    Nanomechanical resonators have been monolithically integrated on preprocessed complementary metal-oxide-semiconductor (CMOS) chips. Fabricated resonator systems have been designed to have resonance frequencies up to 1.5 MHz. The systems have been characterized in ambient air and vacuum conditions and display ultrasensitive mass detection in air. A mass sensitivity of 4 ag/Hz has been determined in air by placing a single glycerine drop, having a measured weight of 57 fg, at the apex of a cantilever and subsequently measuring a frequency shift of 14.8 kHz. CMOS integration enables electrostatic excitation, capacitive detection, and amplification of the resonance signal directly on the chip.

  12. III-V Nanowire Complementary Metal-Oxide Semiconductor Transistors Monolithically Integrated on Si.

    PubMed

    Svensson, Johannes; Dey, Anil W; Jacobsson, Daniel; Wernersson, Lars-Erik

    2015-12-01

    III-V semiconductors have attractive transport properties suitable for low-power, high-speed complementary metal-oxide-semiconductor (CMOS) implementation, but major challenges related to cointegration of III-V n- and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) on low-cost Si substrates have so far hindered their use for large scale logic circuits. By using a novel approach to grow both InAs and InAs/GaSb vertical nanowires of equal length simultaneously in one single growth step, we here demonstrate n- and p-type III-V MOSFETs monolithically integrated on a Si substrate with high I(on)/I(off) ratios using a dual channel, single gate-stack design processed simultaneously for both types of transistors. In addition, we demonstrate fundamental CMOS logic gates, such as inverters and NAND gates, which illustrate the viability of our approach for large scale III-V MOSFET circuits on Si. PMID:26595174

  13. Hybrid Integration of Graphene Analog and Silicon Complementary Metal-Oxide-Semiconductor Digital Circuits.

    PubMed

    Hong, Seul Ki; Kim, Choong Sun; Hwang, Wan Sik; Cho, Byung Jin

    2016-07-26

    We demonstrate a hybrid integration of a graphene-based analog circuit and a silicon-based digital circuit in order to exploit the strengths of both graphene and silicon devices. This mixed signal circuit integration was achieved using a three-dimensional (3-D) integration technique where a graphene FET multimode phase shifter is fabricated on top of a silicon complementary metal-oxide-semiconductor field-effect transistor (CMOS FET) ring oscillator. The process integration scheme presented here is compatible with the conventional silicon CMOS process, and thus the graphene circuit can successfully be integrated on current semiconductor technology platforms for various applications. This 3-D integration technique allows us to take advantage of graphene's excellent inherent properties and the maturity of current silicon CMOS technology for future electronics. PMID:27403730

  14. DNA-decorated carbon-nanotube-based chemical sensors on complementary metal oxide semiconductor circuitry

    NASA Astrophysics Data System (ADS)

    Chen, Chia-Ling; Yang, Chih-Feng; Agarwal, Vinay; Kim, Taehoon; Sonkusale, Sameer; Busnaina, Ahmed; Chen, Michelle; Dokmeci, Mehmet R.

    2010-03-01

    We present integration of single-stranded DNA (ss-DNA)-decorated single-walled carbon nanotubes (SWNTs) onto complementary metal oxide semiconductor (CMOS) circuitry as nanoscale chemical sensors. SWNTs were assembled onto CMOS circuitry via a low voltage dielectrophoretic (DEP) process. Besides, bare SWNTs are reported to be sensitive to various chemicals, and functionalization of SWNTs with biomolecular complexes further enhances the sensing specificity and sensitivity. After decorating ss-DNA on SWNTs, we have found that the sensing response of the gas sensor was enhanced (up to ~ 300% and ~ 250% for methanol vapor and isopropanol alcohol vapor, respectively) compared with bare SWNTs. The SWNTs coupled with ss-DNA and their integration on CMOS circuitry demonstrates a step towards realizing ultra-sensitive electronic nose applications.

  15. DNA-decorated carbon-nanotube-based chemical sensors on complementary metal oxide semiconductor circuitry.

    PubMed

    Chen, Chia-Ling; Yang, Chih-Feng; Agarwal, Vinay; Kim, Taehoon; Sonkusale, Sameer; Busnaina, Ahmed; Chen, Michelle; Dokmeci, Mehmet R

    2010-03-01

    We present integration of single-stranded DNA (ss-DNA)-decorated single-walled carbon nanotubes (SWNTs) onto complementary metal oxide semiconductor (CMOS) circuitry as nanoscale chemical sensors. SWNTs were assembled onto CMOS circuitry via a low voltage dielectrophoretic (DEP) process. Besides, bare SWNTs are reported to be sensitive to various chemicals, and functionalization of SWNTs with biomolecular complexes further enhances the sensing specificity and sensitivity. After decorating ss-DNA on SWNTs, we have found that the sensing response of the gas sensor was enhanced (up to approximately 300% and approximately 250% for methanol vapor and isopropanol alcohol vapor, respectively) compared with bare SWNTs. The SWNTs coupled with ss-DNA and their integration on CMOS circuitry demonstrates a step towards realizing ultra-sensitive electronic nose applications. PMID:20139486

  16. Flexible complementary metal oxide semiconductor microelectrode arrays with applications in single cell characterization

    NASA Astrophysics Data System (ADS)

    Pajouhi, H.; Jou, A. Y.; Jain, R.; Ziabari, A.; Shakouri, A.; Savran, C. A.; Mohammadi, S.

    2015-11-01

    A highly flexible microelectrode array with an embedded complementary metal oxide semiconductor (CMOS) instrumentation amplifier suitable for sensing surfaces of biological entities is developed. The array is based on ultrathin CMOS islands that are thermally isolated from each other and are interconnected by meandered nano-scale wires that can adapt to cellular surfaces with micro-scale curvatures. CMOS temperature sensors are placed in the islands and are optimally biased to have high temperature sensitivity. While no live cell thermometry is conducted, a measured temperature sensitivity of 0.15 °C in the temperature range of 35 to 40 °C is achieved by utilizing a low noise CMOS lock-in amplifier implemented in the same technology. The monolithic nature of CMOS sensors and amplifier circuits and their versatile flexible interconnecting wires overcome the sensitivity and yield limitations of microelectrode arrays fabricated in competing technologies.

  17. High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

    PubMed

    Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

    2015-08-12

    Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials. PMID:26192468

  18. Energy harvesting thermoelectric generators manufactured using the complementary metal oxide semiconductor process.

    PubMed

    Yang, Ming-Zhi; Wu, Chyan-Chyi; Dai, Ching-Liang; Tsai, Wen-Jung

    2013-01-01

    This paper presents the fabrication and characterization of energy harvesting thermoelectric micro generators using the commercial complementary metal oxide semiconductor (CMOS) process. The micro generator consists of 33 thermocouples in series. Thermocouple materials are p-type and n-type polysilicon since they have a large Seebeck coefficient difference. The output power of the micro generator depends on the temperature difference in the hot and cold parts of the thermocouples. In order to increase this temperature difference, the hot part of the thermocouples is suspended to reduce heat-sinking. The micro generator needs a post-CMOS process to release the suspended structures of hot part, which the post-process includes an anisotropic dry etching to etch the sacrificial oxide layer and an isotropic dry etching to remove the silicon substrate. Experiments show that the output power of the micro generator is 9.4 mW at a temperature difference of 15 K. PMID:23396193

  19. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    NASA Astrophysics Data System (ADS)

    Torres Sevilla, G. A.; Almuslem, A. S.; Gumus, A.; Hussain, A. M.; Cruz, M. E.; Hussain, M. M.

    2016-02-01

    Thinned silicon based complementary metal oxide semiconductor (CMOS) electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOS inverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible silicon CMOS inverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

  20. Modeling of Total Ionizing Dose Effects in Advanced Complementary Metal-Oxide-Semiconductor Technologies

    NASA Astrophysics Data System (ADS)

    Sanchez Esqueda, Ivan

    2011-12-01

    The increased use of commercial complementary metal-oxide-semiconductor (CMOS) technologies in harsh radiation environments has resulted in a new approach to radiation effects mitigation. This approach utilizes simulation to support the design of integrated circuits (ICs) to meet targeted tolerance specifications. Modeling the deleterious impact of ionizing radiation on ICs fabricated in advanced CMOS technologies requires understanding and analyzing the basic mechanisms that result in buildup of radiation-induced defects in specific sensitive regions. Extensive experimental studies have demonstrated that the sensitive regions are shallow trench isolation (STI) oxides. Nevertheless, very little work has been done to model the physical mechanisms that result in the buildup of radiation-induced defects and the radiation response of devices fabricated in these technologies. A comprehensive study of the physical mechanisms contributing to the buildup of radiation-induced oxide trapped charges and the generation of interface traps in advanced CMOS devices is presented in this dissertation. The basic mechanisms contributing to the buildup of radiation-induced defects are explored using a physical model that utilizes kinetic equations that captures total ionizing dose (TID) and dose rate effects in silicon dioxide (SiO2). These mechanisms are formulated into analytical models that calculate oxide trapped charge density (Not) and interface trap density (Nit) in sensitive regions of deep-submicron devices. Experiments performed on field-oxide-field-effect-transistors (FOXFETs) and metal-oxide-semiconductor (MOS) capacitors permit investigating TID effects and provide a comparison for the radiation response of advanced CMOS devices. When used in conjunction with closed-form expressions for surface potential, the analytical models enable an accurate description of radiation-induced degradation of transistor electrical characteristics. In this dissertation, the incorporation

  1. Progress in complementary metal-oxide-semiconductor silicon photonics and optoelectronic integrated circuits

    NASA Astrophysics Data System (ADS)

    Hongda, Chen; Zan, Zhang; Beiju, Huang; Luhong, Mao; Zanyun, Zhang

    2015-12-01

    Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits (OEICs) based on a complementary metal-oxide-semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems. Project supported by the National Basic Research Program of China (No. 2011CBA00608), the National Natural Science Foundation of China (Nos. 61178051, 61321063, 61335010, 61178048, 61275169), and the National High Technology Research and Development Program of China (Nos. 2013AA013602, 2013AA031903, 2013AA032204).

  2. Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

    PubMed

    Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

    2009-12-15

    Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits. PMID:19940239

  3. Laser Doppler blood flow complementary metal oxide semiconductor imaging sensor with analog on-chip processing

    SciTech Connect

    Gu Quan; Hayes-Gill, Barrie R.; Morgan, Stephen P

    2008-04-20

    A 4x4 pixel array with analog on-chip processing has been fabricated within a 0.35 {mu}m complementary metal oxide semiconductor process as a prototype sensor for laser Doppler blood flow imaging. At each pixel the bandpass and frequency weighted filters necessary for processing laser Doppler blood flow signals have been designed and fabricated. Because of the space constraints of implementing an accurate {omega}{sup 0.5} filter at the pixel level, this has been approximated using the ''roll off'' of a high-pass filter with a cutoff frequency set at 10 kHz. The sensor has been characterized using a modulated laser source. Fixed pattern noise is present that is demonstrated to be repeatable across the array and can be calibrated. Preliminary blood flow results on a finger before and after occlusion demonstrate that the sensor array provides the potential for a system that can be scaled to a larger number of pixels for blood flow imaging.

  4. Enhancing the far-ultraviolet sensitivity of silicon complementary metal oxide semiconductor imaging arrays

    NASA Astrophysics Data System (ADS)

    Retherford, Kurt D.; Bai, Yibin; Ryu, Kevin K.; Gregory, James A.; Welander, Paul B.; Davis, Michael W.; Greathouse, Thomas K.; Winters, Gregory S.; Suntharalingam, Vyshnavi; Beletic, James W.

    2015-10-01

    We report our progress toward optimizing backside-illuminated silicon P-type intrinsic N-type complementary metal oxide semiconductor devices developed by Teledyne Imaging Sensors (TIS) for far-ultraviolet (UV) planetary science applications. This project was motivated by initial measurements at Southwest Research Institute of the far-UV responsivity of backside-illuminated silicon PIN photodiode test structures, which revealed a promising QE in the 100 to 200 nm range. Our effort to advance the capabilities of thinned silicon wafers capitalizes on recent innovations in molecular beam epitaxy (MBE) doping processes. Key achievements to date include the following: (1) representative silicon test wafers were fabricated by TIS, and set up for MBE processing at MIT Lincoln Laboratory; (2) preliminary far-UV detector QE simulation runs were completed to aid MBE layer design; (3) detector fabrication was completed through the pre-MBE step; and (4) initial testing of the MBE doping process was performed on monitoring wafers, with detailed quality assessments.

  5. Organic-on-silicon complementary metal-oxide-semiconductor colour image sensors.

    PubMed

    Lim, Seon-Jeong; Leem, Dong-Seok; Park, Kyung-Bae; Kim, Kyu-Sik; Sul, Sangchul; Na, Kyoungwon; Lee, Gae Hwang; Heo, Chul-Joon; Lee, Kwang-Hee; Bulliard, Xavier; Satoh, Ryu-Ichi; Yagi, Tadao; Ro, Takkyun; Im, Dongmo; Jung, Jungkyu; Lee, Myungwon; Lee, Tae-Yon; Han, Moon Gyu; Jin, Yong Wan; Lee, Sangyoon

    2015-01-01

    Complementary metal-oxide-semiconductor (CMOS) colour image sensors are representative examples of light-detection devices. To achieve extremely high resolutions, the pixel sizes of the CMOS image sensors must be reduced to less than a micron, which in turn significantly limits the number of photons that can be captured by each pixel using silicon (Si)-based technology (i.e., this reduction in pixel size results in a loss of sensitivity). Here, we demonstrate a novel and efficient method of increasing the sensitivity and resolution of the CMOS image sensors by superposing an organic photodiode (OPD) onto a CMOS circuit with Si photodiodes, which consequently doubles the light-input surface area of each pixel. To realise this concept, we developed organic semiconductor materials with absorption properties selective to green light and successfully fabricated highly efficient green-light-sensitive OPDs without colour filters. We found that such a top light-receiving OPD, which is selective to specific green wavelengths, demonstrates great potential when combined with a newly designed Si-based CMOS circuit containing only blue and red colour filters. To demonstrate the effectiveness of this state-of-the-art hybrid colour image sensor, we acquired a real full-colour image using a camera that contained the organic-on-Si hybrid CMOS colour image sensor. PMID:25578322

  6. Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump

    NASA Astrophysics Data System (ADS)

    Naoya Watanabe,; Isao Tsunoda,; Takayuki Takao,; Koichiro Tanaka,; Tanemasa Asano,

    2010-04-01

    We fabricated a back-side illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor in which a very-thin BSI photodiode array chip was stacked on a CMOS read-out circuit chip by compliant bumps. Cone-shaped bumps made of Au were prepared as the compliant bumps. The base diameter was 10-12 μm and the height was 9-10 μm. To fabricate the BSI CMOS image sensor, we developed a novel thin-chip assembly process. The key features of the process are as follows: preparation of a photodiode array wafer and a CMOS read-out circuit wafer, Au cone bump formation, bonding to support glass, thinning of the photodiode array wafer to 21 μm, through silicon via (TSV) formation using Cu electroplating, formation of back-side electrodes, transfer of the photodiode array wafer to a polymer support tape, dicing of the photodiode array wafer, separation of support tape, formation of Ni-Au bumps, dicing of CMOS read-out circuit wafer, and three-dimensional (3D) chip-stacking. The BSI CMOS image sensor thus fabricated has the following specifications: number of active pixels is 16,384 (128 × 128), photodiode size is approximately 18 μm square, photodiode pitch is 24 μm, and fill factor is approximately 55%. No defects were observed in the obtained image frames.

  7. Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump

    NASA Astrophysics Data System (ADS)

    Watanabe, Naoya; Tsunoda, Isao; Takao, Takayuki; Tanaka, Koichiro; Asano, Tanemasa

    2010-04-01

    We fabricated a back-side illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor in which a very-thin BSI photodiode array chip was stacked on a CMOS read-out circuit chip by compliant bumps. Cone-shaped bumps made of Au were prepared as the compliant bumps. The base diameter was 10-12 µm and the height was 9-10 µm. To fabricate the BSI CMOS image sensor, we developed a novel thin-chip assembly process. The key features of the process are as follows: preparation of a photodiode array wafer and a CMOS read-out circuit wafer, Au cone bump formation, bonding to support glass, thinning of the photodiode array wafer to 21 µm, through silicon via (TSV) formation using Cu electroplating, formation of back-side electrodes, transfer of the photodiode array wafer to a polymer support tape, dicing of the photodiode array wafer, separation of support tape, formation of Ni-Au bumps, dicing of CMOS read-out circuit wafer, and three-dimensional (3D) chip-stacking. The BSI CMOS image sensor thus fabricated has the following specifications: number of active pixels is 16,384 (128 ×128), photodiode size is approximately 18 µm square, photodiode pitch is 24 µm, and fill factor is approximately 55%. No defects were observed in the obtained image frames.

  8. Testability of VLSI (Very Large Scale Integration) leakage faults in CMOS (Complementary Metal Oxide Semiconductor)

    NASA Astrophysics Data System (ADS)

    Malaiya, Y. K.; Su, S. Y. H.

    1983-09-01

    With the advent of VLSI (Very Large Scale Integration), the importance of CMOS (Complementary Metal Oxide Semiconductor) technology has increased. CMOS offers some very significant advantages over NMOS, and has emerged very competitive. Therefore, testability of CMOS devices is of considerable importance. CMOS devices exhibit some failure modes which are not adequately represented by the classical stuck-at fault model. A new fault model is introduced here to represent such faults. Leakage faults are specifically examined in this report, such faults increase the static supply current (which is ordinarily quite low) substantially. A leakage testing experiment consists of applying different vectors to the circuit, and in each case measuring the static supply current. This experimentally obtained data is then analyzed to obtain fault-related information. Leakage testing offers extra testability without any additional pins. It can detect some faults which cannot be detected by the conventional testing. Test generation for several basic CMOS structures is considered. Correspondence between leakage testing and conventional testing is studied. Two methods for analyzing experimental data are presented. Available experimental data was analyzed to obtain statistical information.

  9. Multichannel, time-resolved picosecond laser ultrasound imaging and spectroscopy with custom complementary metal-oxide-semiconductor detector

    SciTech Connect

    Smith, Richard J.; Light, Roger A.; Johnston, Nicholas S.; Pitter, Mark C.; Somekh, Mike G.; Sharples, Steve D.

    2010-02-15

    This paper presents a multichannel, time-resolved picosecond laser ultrasound system that uses a custom complementary metal-oxide-semiconductor linear array detector. This novel sensor allows parallel phase-sensitive detection of very low contrast modulated signals with performance in each channel comparable to that of a discrete photodiode and a lock-in amplifier. Application of the instrument is demonstrated by parallelizing spatial measurements to produce two-dimensional thickness maps on a layered sample, and spectroscopic parallelization is demonstrated by presenting the measured Brillouin oscillations from a gallium arsenide wafer. This paper demonstrates the significant advantages of our approach to pump probe systems, especially picosecond ultrasonics.

  10. Chip-scale fluorescence microscope based on a silo-filter complementary metal-oxide semiconductor image sensor.

    PubMed

    Ah Lee, Seung; Ou, Xiaoze; Lee, J Eugene; Yang, Changhuei

    2013-06-01

    We demonstrate a silo-filter (SF) complementary metal-oxide semiconductor (CMOS) image sensor for a chip-scale fluorescence microscope. The extruded pixel design with metal walls between neighboring pixels guides fluorescence emission through the thick absorptive filter to the photodiode of a pixel. Our prototype device achieves 13 μm resolution over a wide field of view (4.8 mm × 4.4 mm). We demonstrate bright-field and fluorescence longitudinal imaging of living cells in a compact, low-cost configuration. PMID:23722754

  11. Novel Implantation Method to Improve Machine-Model Electrostatic Discharge Robustness of Stacked N-Channel Metal-Oxide Semiconductors (NMOS) in Sub-Quarter-Micron Complementary Metal-Oxide Semiconductors (CMOS) Technology

    NASA Astrophysics Data System (ADS)

    Ker, Ming-Dou; Hsu, Hsin-Chyh; Peng, Jeng-Jie

    2002-11-01

    A novel ion implantation method for electrostatic discharge protection, often called as ESD implantation, is proposed to significantly improve machine-model (MM) ESD robustness of N-channel metal-oxide semiconductors (NMOS) device in stacked configuration (stacked NMOS). By using this ESD implantation method, the ESD current is discharged far away from the surface channel of NMOS, therefore the stacked NMOS in the mixed-voltage I/O interface can sustain a much higher ESD level, especially under the MM ESD stress. The MM ESD robustness of the stacked NMOS with a device dimension of W/L=300 μm/0.5 μm for each NMOS has been successfully improved from the original 358 V to become 491 V in a 0.25-μm complementary metal-oxide semiconductors (CMOS) process.

  12. Complementary Metal Oxide Semiconductor-Compatible Back-Side-Illuminated Photodiode for Optoelectronic Integrated Circuit Devices

    NASA Astrophysics Data System (ADS)

    Shin, Sang-Baie; Sekiguchi, Hiroto; Okada, Hiroshi; Wakahara, Akihiro

    2013-04-01

    In this study, the prototype optoelectronic integrated circuits (OEICs) operating with optical input signals were designed and fabricated. A back-side-illuminated (BSI) photodiode was designed and demonstrated by a newly proposed practical method, utilizing micro-electromechanical systems (MEMS) and postcomplement metal oxide semiconductor (CMOS) processes. Additional fabrication processes for the BSI photodiode were proposed and described in detail in this paper. The operational amplifier for amplification of the optical current by the BSI photodiode as the transimpedance amplifier was designed and fabricated. And the pulse width modulation (PWM) wave generator was implemented for modulating optical signals as the prototype OEIC device. The maximum quantum efficiency of 28.4% was obtained from the fabricated BSI photodiode. Output signals of PWM were successfully controlled by the generated optical current of the BSI photodiode.

  13. Ratiometric, filter-free optical sensor based on a complementary metal oxide semiconductor buried double junction photodiode.

    PubMed

    Yung, Ka Yi; Zhan, Zhiyong; Titus, Albert H; Baker, Gary A; Bright, Frank V

    2015-07-16

    We report a complementary metal oxide semiconductor integrated circuit (CMOS IC) with a buried double junction (BDJ) photodiode that (i) provides a real-time output signal that is related to the intensity ratio at two emission wavelengths and (ii) simultaneously eliminates the need for an optical filter to block Rayleigh scatter. We demonstrate the BDJ platform performance for gaseous NH3 and aqueous pH detection. We also compare the BDJ performance to parallel results obtained by using a slew scanned fluorimeter (SSF). The BDJ results are functionally equivalent to the SSF results without the need for any wavelength filtering or monochromators and the BDJ platform is not prone to errors associated with source intensity fluctuations or sensor signal drift. PMID:26073812

  14. Complementary Metal Oxide Semiconductor Based Multimodal Sensor for In vivo Brain Function Imaging with a Function for Simultaneous Cell Stimulation

    NASA Astrophysics Data System (ADS)

    Tagawa, Ayato; Mitani, Masahiro; Minami, Hiroki; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Ohta, Jun

    2010-04-01

    We have developed a multimodal complementary metal oxide semiconductor (CMOS) sensor device embedded with Au electrodes for fluorescent imaging and cell stimulation in the deep brain of mice. The Au electrodes were placed on the pixel array of the image sensor. Windows over the photodiodes were opened in the electrode area for simultaneous fluorescent imaging and cell stimulation in the same area of the brain tissue. The sensor chip was shaped like a shank and was packaged by two packaging methods for high strength or minimal invasion. The experimental results showed that the 90 ×90 µm2 Au electrodes with windows were capable of injecting theta burst stimulation (TBS)-like current pulses at 0.2-1 mA in a saline solution. We successfully demonstrated that fluorescent imaging and TBS-like current injection can be simultaneously performed in the electrode area of a brain phantom.

  15. Complementary Metal Oxide Semiconductor Based Multimodal Sensor for In vivo Brain Function Imaging with a Function for Simultaneous Cell Stimulation

    NASA Astrophysics Data System (ADS)

    Ayato Tagawa,; Masahiro Mitani,; Hiroki Minami,; Toshihiko Noda,; Kiyotaka Sasagawa,; Takashi Tokuda,; Jun Ohta,

    2010-04-01

    We have developed a multimodal complementary metal oxide semiconductor (CMOS) sensor device embedded with Au electrodes for fluorescent imaging and cell stimulation in the deep brain of mice. The Au electrodes were placed on the pixel array of the image sensor. Windows over the photodiodes were opened in the electrode area for simultaneous fluorescent imaging and cell stimulation in the same area of the brain tissue. The sensor chip was shaped like a shank and was packaged by two packaging methods for high strength or minimal invasion. The experimental results showed that the 90 × 90 μm2 Au electrodes with windows were capable of injecting theta burst stimulation (TBS)-like current pulses at 0.2-1 mA in a saline solution. We successfully demonstrated that fluorescent imaging and TBS-like current injection can be simultaneously performed in the electrode area of a brain phantom.

  16. Complementary Metal-Oxide-Semiconductor Integrated Carbon Nanotube Arrays: Toward Wide-Bandwidth Single-Molecule Sensing Systems.

    PubMed

    Warren, Steven B; Vernick, Sefi; Romano, Ethan; Shepard, Kenneth L

    2016-04-13

    There is strong interest in realizing genomic molecular diagnostic platforms that are label-free, electronic, and single-molecule. One attractive transducer for such efforts is the single-molecule field-effect transistor (smFET), capable of detecting a single electronic charge and realized with a point-functionalized exposed-gate one-dimensional carbon nanotube field-effect device. In this work, smFETs are integrated directly onto a custom complementary metal-oxide-semiconductor chip, which results in an array of up to 6000 devices delivering a measurement bandwidth of 1 MHz. In a first exploitation of these high-bandwidth measurement capabilities, point functionalization through electrochemical oxidation of the devices is observed with microsecond temporal resolution, which reveals complex reaction pathways with resolvable scattering signatures. High-rate random telegraph noise is detected in certain oxidized devices, further illustrating the measurement capabilities of the platform. PMID:26999579

  17. Integrated Bio-Imaging Sensor Array with Complementary Metal-Oxide-Semiconductor Cascode Source-Drain Follower

    NASA Astrophysics Data System (ADS)

    Hirokazu Matsumoto,; Junichi Tsukada,; Hiroaki Ozawa,; Shigeyasu Uno,; Kazuo Nakazato,; Nao Terasaki,; Noritaka Yamamoto,; Takashi Hiraga,; Masako Iwai,; Masae Konno,; Kohsuke Ito,; Yasunori Inoue,

    2010-04-01

    A new bio-imaging sensor with photosystem I (PSI) of Thermosynechococcus elongatus and complementary metal-oxide-semiconductor (CMOS) circuits is demonstrated. Photons are converted into electrons by PSI, and electrons are detected as an electric signal by a CMOS integrated circuit. For a sensor circuit, a 4 × 4 sensor array with a CMOS source-drain follower is designed and fabricated by a standard CMOS process. An extended-gate electrode and an SU-8 passivation layer are formed on a CMOS chip by a post-CMOS process, and PSI is electrostatically fixed on the electrode. A 3× 4 image of the pattern of light illuminated on a chip is taken with the sensor array, where four cells are used as reference cells.

  18. Integrated Bio-Imaging Sensor Array with Complementary Metal-Oxide-Semiconductor Cascode Source-Drain Follower

    NASA Astrophysics Data System (ADS)

    Matsumoto, Hirokazu; Tsukada, Junichi; Ozawa, Hiroaki; Uno, Shigeyasu; Nakazato, Kazuo; Terasaki, Nao; Yamamoto, Noritaka; Hiraga, Takashi; Iwai, Masako; Konno, Masae; Ito, Kohsuke; Inoue, Yasunori

    2010-04-01

    A new bio-imaging sensor with photosystem I (PSI) of Thermosynechococcus elongatus and complementary metal-oxide-semiconductor (CMOS) circuits is demonstrated. Photons are converted into electrons by PSI, and electrons are detected as an electric signal by a CMOS integrated circuit. For a sensor circuit, a 4 ×4 sensor array with a CMOS source-drain follower is designed and fabricated by a standard CMOS process. An extended-gate electrode and an SU-8 passivation layer are formed on a CMOS chip by a post-CMOS process, and PSI is electrostatically fixed on the electrode. A 3×4 image of the pattern of light illuminated on a chip is taken with the sensor array, where four cells are used as reference cells.

  19. A complementary metal-oxide-semiconductor compatible monocantilever 12-point probe for conductivity measurements on the nanoscale

    NASA Astrophysics Data System (ADS)

    Gammelgaard, L.; Bøggild, P.; Wells, J. W.; Handrup, K.; Hofmann, Ph.; Balslev, M. B.; Hansen, J. E.; Petersen, P. R. E.

    2008-09-01

    We present a complementary metal-oxide-semiconductor compatible, nanoscale 12-point-probe based on TiW electrodes placed on a SiO2 monocantilever. Probes are mass fabricated on Si wafers by a combination of electron beam and UV lithography, realizing TiW electrode tips with a width down to 250nm and a probe pitch of 500nm. In-air four-point measurements have been performed on indium tin oxide, ruthenium, and titanium-tungsten, showing good agreement with values obtained by other four-point probes. In-vacuum four-point resistance measurements have been performed on clean Bi(111) using different probe spacings. The results show the expected behavior for bulk Bi, indicating that the contribution of electronic surface states to the transport properties is very small.

  20. Highly sensitive sensors for alkali metal ions based on complementary-metal-oxide-semiconductor-compatible silicon nanowires

    NASA Astrophysics Data System (ADS)

    Zhang, Guo-Jun; Agarwal, Ajay; Buddharaju, Kavitha D.; Singh, Navab; Gao, Zhiqiang

    2007-06-01

    Highly sensitive sensors for alkali metal ions based on complementary-metal-oxide- semiconductor-compatible silicon nanowires (SiNWs) with crown ethers covalently immobilized on their surface are presented. A densely packed organic monolayer terminated with amine groups is introduced to the SiNW surface via hydrosilylation. Amine-modified crown ethers, acting as sensing elements, are then immobilized onto the SiNWs through a cross-linking reaction with the monolayer. The crown ether-functionalized SiNWs recognize Na+ and K+ according to their complexation ability to the crown ethers. The SiNW sensors are highly selective and capable of achieving an ultralow detection limit down to 50nM, over three orders of magnitude lower than that of conventional crown ether-based ion-selective electrodes.

  1. Performance characterization of microtomography with complementary metal-oxide-semiconductor detectors for computer-aided defect inspection

    SciTech Connect

    Kim, Ho Kyung; Yun, Seungman; Han, Jong Chul; Youn, Hanbean; Cho, Min Kook; Lim, Chang Hwy; Heo, Sung Kyn; Shon, Cheol-Soon; Kim, Seong-Sik; Cho, Bong Hae; Achterkirchen, Thorsten Graeve

    2009-05-01

    We developed a computer-aided defect inspection system based on computed tomography (CT). The system consists of a homemade small cone-beam CT (CBCT) system and a graphical toolbox, which is used to extract a computer-aided design (CAD) model from the CT data. In the small CBCT system, the x-ray imaging detector is based on a complementary metal-oxide-semiconductor photodiode array in conjunction with a scintillator. Imaging performance of the detector was evaluated in terms of modulation-transfer function, noise-power spectrum, and detective quantum efficiency. The tomographic imaging performance of the small CBCT system was evaluated in terms of signal-to-noise ratio and contrast-to-noise ratio. The graphical toolbox to support defect inspection incorporates various functional tools such as volume rendering, segmentation, triangular-mesh data generation, and data reduction. All the tools have been integrated in a graphical-user interface form. The developed system can provide rapid visual inspection as well as quantitative evaluation of defects by comparing the extracted CAD file with the original file, if available, of an object. The performance of the developed system is demonstrated with experimental CT volume data.

  2. An optical relay approach to very low cost hybrid polymer-complementary metal-oxide semiconductor electrophoresis instrumentation.

    PubMed

    Hall, Gordon H; Sloan, David L; Ma, Tianchi; Couse, Madeline H; Martel, Stephane; Elliott, Duncan G; Glerum, D Moira; Backhouse, Christopher J

    2014-07-01

    Electrophoresis is an integral part of many molecular diagnostics protocols and an inexpensive implementation would greatly facilitate point-of-care (POC) applications. However, the high instrumentation cost presents a substantial barrier, much of it associated with fluorescence detection. The cost of such systems could be substantially reduced by placing the fluidic channel and photodiode directly above the detector in order to collect a larger portion of the fluorescent light. In future, this could be achieved through the integration and monolithic fabrication of photoresist microchannels on complementary metal-oxide semiconductor microelectronics (CMOS). However, the development of such a device is expensive due to high non-recurring engineering costs. To facilitate that development, we present a system that utilises an optical relay to integrate low-cost polymeric microfluidics with a CMOS chip that provides a photodiode, analog-digital conversion and a standard serial communication interface. This system embodies an intermediate level of microelectronic integration, and significantly decreases development costs. With a limit of detection of 1.3±0.4nM of fluorescently end-labeled deoxyribonucleic acid (DNA), it is suitable for diagnostic applications. PMID:24856905

  3. Label-free electrical detection of cardiac biomarker with complementary metal-oxide semiconductor-compatible silicon nanowire sensor arrays.

    PubMed

    Chua, Jay Huiyi; Chee, Ru-Ern; Agarwal, Ajay; Wong, She Mein; Zhang, Guo-Jun

    2009-08-01

    Arrays of highly ordered silicon nanowire (SiNW) clusters are fabricated using complementary metal-oxide semiconductor (CMOS) field effect transistor-compatible technology, and the ultrasensitive, label-free, electrical detection of cardiac biomarker in real time using the array sensor is presented. The successful detection of human cardiac troponin-T (cTnT) has been demonstrated in an assay buffer solution of concentration down to 1 fg/mL, as well as in an undiluted human serum environment of concentration as low as 30 fg/mL. The high specificity, selectivity, and swift response time of the SiNWs to the presence of ultralow concentrations of a target protein in a biological analyte solution, even in the presence of a high total protein concentration, paves the way for the development of a medical diagnostic system for point-of-care application that is able to provide an early and accurate indication of cardiac cellular necrosis. PMID:20337397

  4. A low-voltage complementary metal-oxide semiconductor adapter circuit suitable for input rail-to-rail operation

    NASA Astrophysics Data System (ADS)

    Tadić, Nikša; Zogović, Milena; Banjević, Mirjana; Zimmermann, Horst

    2010-11-01

    In this article, a low-voltage complementary metal-oxide semiconductor (CMOS) input signal adapter (ISA) suitable for input rail-to-rail operation of various types of analogue basic building blocks is presented. The adapter acts as a pre-stage with infinite input resistance and linear transfer characteristics. Its input signal is translated into the region fitting the operating range of the following stage. The generality of the proposed method is proven through the application of the ISA in different types of analogue basic building blocks designed in 0.5 μm CMOS technology. They are the following: below-negative-rail-to-above-positive-rail voltage-controlled transconductor, quasi rail-to-rail voltage-controlled resistor (VCR), rail-to-rail operational amplifier (OA) and quasi rail-to-rail second generation current conveyor. The proposed negative resistance quasi rail-to-rail VCR and rail-to-rail OA have been used in a Sallen and Key band-pass filter. All of these analogue basic building blocks and their applications in the form of the Sallen and Key band-pass filter operate from a single supply of 1.5 V. Simulation results confirm the predictions of the analysis performed.

  5. Exploiting sub-20-nm complementary metal-oxide semiconductor technology challenges to design affordable systems-on-chip

    NASA Astrophysics Data System (ADS)

    Vaidyanathan, Kaushik; Zhu, Qiuling; Liebmann, Lars; Lai, Kafai; Wu, Stephen; Liu, Renzhi; Liu, Yandong; Strojwas, Andzrej; Pileggi, Larry

    2015-01-01

    For the past four decades, cost and features have driven complementary metal-oxide semiconductor (CMOS) scaling. Severe lithography and material limitations seen below the 20-nm node, however, are challenging the fundamental premise of affordable CMOS scaling. Just continuing to co-optimize leaf cell circuit and layout designs with process technology does not enable us to exploit the challenges of sub-20-nm CMOS. For affordable scaling, it is imperative to work past sub-20-nm technology impediments while exploiting its features. To this end, we propose to broaden the scope of design technology co-optimization (DTCO) to be more holistic by including microarchitecture design and computer-aided design, along with circuits, layout, and process technology. Furthermore, we undertook such a holistic DTCO for all critical design elements such as embedded memory, standard cell logic, analog components, and physical synthesis in a 14-nm process. Measurements results from experimental designs in a representative 14-nm process from IBM demonstrate the efficacy of the proposed approach.

  6. Monolithically integrated avalanche photodiode receiver in 0.35 μm bipolar complementary metal oxide semiconductor

    NASA Astrophysics Data System (ADS)

    Jukić, Tomislav; Steindl, Bernhard; Enne, Reinhard; Zimmermann, Horst

    2015-11-01

    We present the first optoelectronic integrated bipolar complementary metal oxide semiconductor (BiCMOS) receiver chip with an avalanche photodiode (APD). A large 200-μm-diameter APD connected to a high-speed transimpedance amplifier designed for a 2-Gbps optical wireless communication system is proposed. The complete chip was realized in a 0.35-μm silicon BiCMOS technology. Due to the thick intrinsic zone and multiplication gain, the responsivity of the APD reaches a value of up to 120 A/W for a wavelength of 675 nm. Furthermore, the capacitance of the APD is <500 fF for reverse bias voltages above 18 V. The receiver has a supply voltage of 3.3 V with a current consumption of 76 mA. The delivered 50-Ω single-ended output swing is 550 mVpp and the overall transimpedance is 260 kΩ with 1.02-GHz bandwidth. The achieved data rate is 2 Gbps with a sensitivity of -30.3 dBm at a bit error rate <10-9.

  7. Ultrasonic fingerprint sensor using a piezoelectric micromachined ultrasonic transducer array integrated with complementary metal oxide semiconductor electronics

    SciTech Connect

    Lu, Y.; Fung, S.; Wang, Q.; Horsley, D. A.; Tang, H.; Boser, B. E.; Tsai, J. M.; Daneman, M.

    2015-06-29

    This paper presents an ultrasonic fingerprint sensor based on a 24 × 8 array of 22 MHz piezoelectric micromachined ultrasonic transducers (PMUTs) with 100 μm pitch, fully integrated with 180 nm complementary metal oxide semiconductor (CMOS) circuitry through eutectic wafer bonding. Each PMUT is directly bonded to a dedicated CMOS receive amplifier, minimizing electrical parasitics and eliminating the need for through-silicon vias. The array frequency response and vibration mode-shape were characterized using laser Doppler vibrometry and verified via finite element method simulation. The array's acoustic output was measured using a hydrophone to be ∼14 kPa with a 28 V input, in reasonable agreement with predication from analytical calculation. Pulse-echo imaging of a 1D steel grating is demonstrated using electronic scanning of a 20 × 8 sub-array, resulting in 300 mV maximum received amplitude and 5:1 contrast ratio. Because the small size of this array limits the maximum image size, mechanical scanning was used to image a 2D polydimethylsiloxane fingerprint phantom (10 mm × 8 mm) at a 1.2 mm distance from the array.

  8. Effects of Low-k Stack Structure on Performance of Complementary Metal Oxide Semiconductor Devices and Chip Package Interaction Failure

    NASA Astrophysics Data System (ADS)

    Tagami, Masayoshi; Inoue, Naoya; Ueki, Makoto; Narihiro, Mitsuru; Tada, Munehiro; Yamamoto, Hironori; Ito, Fuminori; Furutake, Naoya; Saito, Shinobu; Onodera, Takahiro; Takeuchi, Tsuneo; Hayashi, Yoshihiro

    2012-09-01

    Low capacitance and highly reliable Cu dual-damascene (DD) interconnects have been developed with self-organized “seamless low-k SiOCH stacks” (SEALS) structure. A carbon-rich sub-nano porous SiOCH (k=2.5) was directly stacked on an oxygen-rich porous SiOCH (k=2.7) in the SEALS structure, without a hard-mask (HM) and etch-stop (ES) layer of SiO2. The effective k-value (keff) of the Cu DD interconnect including the SiCN capping layer (k=4.9) was reduced to 2.9 compared to 3.4 on a conventional hybrid structure with SiO2-HM and ES, which had been used in 65-nm-node mass production. The interconnect delay of a 45-nm-node complementary metal oxide semiconductor (CMOS) ring oscillator (RO) was reduced by 15% referring to that of the conventional hybrid structure. Interconnect reliabilities, such as the interline time dependent dielectric breakdown (TDDB) and thermal cycles, were unchanged from those of the conventional hybrid interconnects. No failure was detected for chip package interaction (CPI) during reliability tests in a plastic ball grid array (PBGA) package. SEALS is a promising structure for scaled down ultra large scale integrations (ULSIs) for highly reliable and high speed operation, and low power consumption.

  9. A Three-Stage Inverter-Based Stacked Power Amplifier in 65 nm Complementary Metal Oxide Semiconductor Process

    NASA Astrophysics Data System (ADS)

    Kiumarsi, Hamid; Mizuochi, Yutaka; Ito, Hiroyuki; Ishihara, Noboru; Masu, Kazuya

    2012-02-01

    A three-stage inverter-based stacked power amplifier (PA) in complementary metal oxide semiconductor (CMOS) process is proposed to overcome low breakdown voltage problem of scaled CMOS technologies. Unlike previous reported stacked PAs which radio frequency choke (RFC) was inevitable, we proposed stacked nMOS and pMOS transistors which effectively eliminates use of RFC. By properly setting self-biased circuits' and transistors' parameters, output impedance could reach up to 50 Ω which together with not employing the RFC makes this topology very appealing for the scalable PA realization. As a proof of concept, a three-stage PA using 65 nm CMOS technology is implemented. With a 6 V power supply for the third stage, the fabricated PA shows a small-signal gain of 36 dB, a saturated output power of 16 dBm and a maximum power added efficiency of 10% at 1 GHz. Using a 7.5 V of power supply, saturated output power reaches 18 dBm. To the best of our knowledge, this is the first reported inverter-based stacked PA.

  10. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit.

    PubMed

    Nakazato, Kazuo

    2014-03-28

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor. PMID:24567475

  11. An in-depth noise model for giant magnetoresistance current sensors for circuit design and complementary metal-oxide-semiconductor integration

    NASA Astrophysics Data System (ADS)

    Roldán, A.; Roldán, J. B.; Reig, C.; Cardoso, S.; Cardoso, F.; Ferreira, R.; Freitas, P. P.

    2014-05-01

    Full instrumentation bridges based on spin valve of giant magnetoresistance and magnetic tunnel junction devices have been microfabricated and experimentally characterized from the DC and noise viewpoint. A more realistic model of these devices was obtained in this work, an electrical and thermal model previously developed have been improved in such a way that noise effects are also included. We have implemented the model in a circuit simulator and reproduced the experimental measurements accurately. This provides a more realistic and complete tool for circuit design where magnetoresistive elements are combined with well-known complementary metal-oxide-semiconductor modules.

  12. Electrical Characteristics of Low-Temperature Polycrystalline Silicon Complementary Metal-Oxide-Semiconductor Thin-Film Transistors with Six-Step Photomask Structure

    NASA Astrophysics Data System (ADS)

    Lee, Sang-Jin; Park, Jae-Hoon; Oh, Kum-Mi; Lee, Seok-Woo; Lee, Kyung-Eon; Shin, Woo-Sup; Jun, Myung-chul; Yang, Yong-Suk; Hwang, Yong-Kee

    2011-06-01

    We propose two types of six-step photomask, complementary metal-oxide-semiconductor (CMOS), thin-film transistor (TFT) PCT device structures in order to simplify their fabrication process compared with that of conventional, low-temperature, polycrystalline silicon (LTPS) CMOS TFT devices. The initial charge transfer characteristics of both types of six-step PCT are equivalent to those of the conventional nine-step PCT. Both types of six-step PCT are comparable to the conventional nine-step mask lightly doped drain (LDD) device in terms of the dc device lifetime of over 10 years at Vds=5 V for line inversion driving, which is the normally recognized duration time for semiconducting devices.

  13. Ramp Slope Built-in-Self-Calibration Scheme for Single-Slope Column Analog-to-Digital Converter Complementary Metal-Oxide-Semiconductor Image Sensor

    NASA Astrophysics Data System (ADS)

    Ham, Seogheon; Jung, Wunki; Lee, Dongmyung; Lee, Yonghee; Han, Gunhee

    2006-02-01

    The conversion gain of a single-slope analog-to-digital converter (ADC) suffers from the process and frequency variations. This ADC gain variation eventually limits the performance of image signal processing (ISP) in a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS). This paper proposes a ramp slope built-in-self-calibration (BISC) scheme for a CIS. The CIS with the proposed BISC was fabricated with a 0.35-μm CMOS process. The measurement results show that the proposed architecture effectively calibrates the ramp slope against the process and the clock frequency variation. The silicon area overhead is less than 0.7% of the full chip area.

  14. Thick detection zone single-photon avalanche diode fabricated in 0.35 μm complementary metal-oxide semiconductors

    NASA Astrophysics Data System (ADS)

    Steindl, Bernhard; Enne, Reinhard; Zimmermann, Horst

    2015-05-01

    An avalanche photodiode (APD) fabricated in 0.35 μm high-voltage complementary metal-oxide semiconductor (CMOS) technology, which was originally optimized for linear mode applications, is characterized in Geiger mode operation. This work shows that the used design concept is also suitable for single-photon detection applications and achieves a photon detection efficiency of 22.1% at 785 nm due to a thick detection zone and 3.5 V excess bias. At this operation point, the single-photon APD achieves good results regarding afterpulsing probability (3.4%) and dark count rate (46 kHz) with respect to the large active diameter of 86 μm.

  15. 1.2-17.6 GHz Ring-Oscillator-Based Phase-Locked Loop with Injection Locking in 65 nm Complementary Metal Oxide Semiconductor

    NASA Astrophysics Data System (ADS)

    Lee, Sang-yeop; Ito, Hiroyuki; Amakawa, Shuhei; Tanoi, Satoru; Ishihara, Noboru; Masu, Kazuya

    2012-02-01

    A wide-frequency-range phase-locked loop (PLL) with subharmonic injection locking is proposed. The PLL is equipped with a wide tunable ring-type voltage-controlled oscillator (ring VCO), frequency dividers, and a doubler in order to the widen injection-locked tuning range (ILTR). In addition, high-frequency injection signals are used to improve phase noise, which is supposed to be generated by a reference PLL. The proposed circuit is fabricated by using a 65 nm Si complementary metal oxide semiconductor (CMOS) process. The measured frequency tuning range is from 1.2 to 17.6 GHz with a frequency doubler and dividers. The phase noise at 14.4 GHz (=32×450 MHz) with injection locking was -109 dBc/Hz, which shows a 21-dB reduction compared with that in the case without injection locking.

  16. 0.1 V 13 GHz Transformer-Based Quadrature Voltage-Controlled Oscillator with a Capacitor Coupling Technique in 90 nm Complementary Metal Oxide Semiconductor

    NASA Astrophysics Data System (ADS)

    Kamimura, Tatsuya; Lee, Sang-yeop; Tanoi, Satoru; Ito, Hiroyuki; Ishihara, Noboru; Masu, Kazuya

    2012-04-01

    A low power-supply voltage and high-frequency quadrature voltage-controlled oscillator (QVCO) using a combination of capacitor coupling and transformer feedback techniques is presented. The capacitor coupling technique can boost the transconductance of the LC-VCO core and coupling transconductance of QVCO at high frequency. Also, this technique can improve the quality factor of the QVCO at high frequency with low power-supply voltage, compared with the conventional QVCO. In addition, the capacitor coupling QVCO with transformer feedback can improve the quality factor of QVCO. Using this topology, the QVCO is able to operate at over 10 GHz with lower power-supply voltage. Implemented in the 90 nm complementary metal oxide semiconductor (CMOS) process, the proposed QVCO measures 1-MHz-offset phase noise of -94 dBc/Hz at 13 GHz while consuming 0.68 mW from a 0.1 V power-supply.

  17. Channel Strain in Advanced Complementary Metal-Oxide-Semiconductor Field Effect Transistors Measured Using Nano-Beam Electron Diffraction

    NASA Astrophysics Data System (ADS)

    Toda, Akio; Nakamura, Hidetatsu; Fukai, Toshinori; Ikarashi, Nobuyuki

    2008-04-01

    Using high-precision nano-beam electron diffraction (NBD), we clarified the influences of stress liner and the stress of shallow trench isolation on channel strain in advanced metal-oxide-semiconductor field effect transistors (MOSFETs). For systematic strain measurements, we improved the precision of NBD by observing large reciprocal lattice vectors under appropriate diffraction conditions. The absolute value of the channel strain increases by stress liner as gate length decreases, although the drive current increase due to stress liner saturates at a shorter channel length. The normal strain in the gate length direction is inversely proportional to the distance from the gate electrode to the shallow trench isolation (STI). Furthermore, the relationship between measured channel strain induced by STI and drive current change was shown. The drive current of n- and p-MOSFET changes about 5% with 2×10-3 channel strain variation. This result suggests that reducing the shallow trench isolation stress is effective for controlling the drive current change, depending on the active region layout. We conclude that the experimental measurement of channel strain is necessary for device and circuit design.

  18. Random Interface-Traps-Induced Electrical Characteristic Fluctuation in 16-nm-Gate High-κ/Metal Gate Complementary Metal-Oxide-Semiconductor Device and Inverter Circuit

    NASA Astrophysics Data System (ADS)

    Li, Yiming; Cheng, Hui-Wen

    2012-04-01

    This work estimates electrical and transfer-characteristic fluctuations in 16-nm-gate high-κ/metal gate (HKMG) metal-oxide-semiconductor field effect transistor (MOSFET) devices and inverter circuit induced by random interface traps (ITs) at high-κ/silicon interface. Randomly generated devices with two-dimensional (2D) ITs at HfO2/Si interface are incorporated into quantum-mechanically corrected 3D device simulation. Device characteristics, as influenced by different degrees of fluctuation, are discussed in relation to random ITs near source and drain ends. Owing to a decreasing penetration of electric field from drain to source, the drain induced barrier lowering (DIBL) of the edvice decreases when the number of ITs increases. In contrast to random-dopant fluctuation, the screening effect of device's inversion layer cannot effectively screen potential's variation; thus, devices still have noticeable fluctuation of gate capacitance (CG) under high gate bias. The cutoff frequency decreases as increasing the number of ITs owing to the decreasing transconductance and increasing CG. Decreasing on-state current and increasing CG further result in increasing intrinsic gate delay time (τ) when the number of ITs increases. The fluctuation magnitude of DIBL, cutoff frequency, and τ above is increased as the number of ITs increases. Even for cases with the same number of random ITs, noise margins (NMs) of the 16-nm-gate complementary metal-oxide-semiconductor inverter circuit are still quite different due to the different distribution of random ITs. The NMs of inverter circuit increase as the number of random ITs increases; however, the NMs' fluctuations are increased due to the more sources of fluctuation at HfO2/Si interface of HKMG devices.

  19. Real time in vivo imaging and measurement of serine protease activity in the mouse hippocampus using a dedicated complementary metal-oxide semiconductor imaging device.

    PubMed

    Ng, David C; Tamura, Hideki; Tokuda, Takashi; Yamamoto, Akio; Matsuo, Masamichi; Nunoshita, Masahiro; Ishikawa, Yasuyuki; Shiosaka, Sadao; Ohta, Jun

    2006-09-30

    The aim of the present study is to demonstrate the application of complementary metal-oxide semiconductor (CMOS) imaging technology for studying the mouse brain. By using a dedicated CMOS image sensor, we have successfully imaged and measured brain serine protease activity in vivo, in real-time, and for an extended period of time. We have developed a biofluorescence imaging device by packaging the CMOS image sensor which enabled on-chip imaging configuration. In this configuration, no optics are required whereby an excitation filter is applied onto the sensor to replace the filter cube block found in conventional fluorescence microscopes. The fully packaged device measures 350 microm thick x 2.7 mm wide, consists of an array of 176 x 144 pixels, and is small enough for measurement inside a single hemisphere of the mouse brain, while still providing sufficient imaging resolution. In the experiment, intraperitoneally injected kainic acid induced upregulation of serine protease activity in the brain. These events were captured in real time by imaging and measuring the fluorescence from a fluorogenic substrate that detected this activity. The entire device, which weighs less than 1% of the body weight of the mouse, holds promise for studying freely moving animals. PMID:16542733

  20. Note: A disposable x-ray camera based on mass produced complementary metal-oxide-semiconductor sensors and single-board computers

    NASA Astrophysics Data System (ADS)

    Hoidn, Oliver R.; Seidler, Gerald T.

    2015-08-01

    We have integrated mass-produced commercial complementary metal-oxide-semiconductor (CMOS) image sensors and off-the-shelf single-board computers into an x-ray camera platform optimized for acquisition of x-ray spectra and radiographs at energies of 2-6 keV. The CMOS sensor and single-board computer are complemented by custom mounting and interface hardware that can be easily acquired from rapid prototyping services. For single-pixel detection events, i.e., events where the deposited energy from one photon is substantially localized in a single pixel, we establish ˜20% quantum efficiency at 2.6 keV with ˜190 eV resolution and a 100 kHz maximum detection rate. The detector platform's useful intrinsic energy resolution, 5-μm pixel size, ease of use, and obvious potential for parallelization make it a promising candidate for many applications at synchrotron facilities, in laser-heating plasma physics studies, and in laboratory-based x-ray spectrometry.

  1. Note: A disposable x-ray camera based on mass produced complementary metal-oxide-semiconductor sensors and single-board computers.

    PubMed

    Hoidn, Oliver R; Seidler, Gerald T

    2015-08-01

    We have integrated mass-produced commercial complementary metal-oxide-semiconductor (CMOS) image sensors and off-the-shelf single-board computers into an x-ray camera platform optimized for acquisition of x-ray spectra and radiographs at energies of 2-6 keV. The CMOS sensor and single-board computer are complemented by custom mounting and interface hardware that can be easily acquired from rapid prototyping services. For single-pixel detection events, i.e., events where the deposited energy from one photon is substantially localized in a single pixel, we establish ∼20% quantum efficiency at 2.6 keV with ∼190 eV resolution and a 100 kHz maximum detection rate. The detector platform's useful intrinsic energy resolution, 5-μm pixel size, ease of use, and obvious potential for parallelization make it a promising candidate for many applications at synchrotron facilities, in laser-heating plasma physics studies, and in laboratory-based x-ray spectrometry. PMID:26329247

  2. Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

    PubMed

    Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

    2016-02-23

    We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices. PMID:26768020

  3. A 128 × 128 Pixel Complementary Metal Oxide Semiconductor Image Sensor with an Improved Pixel Architecture for Detecting Modulated Light Signals

    NASA Astrophysics Data System (ADS)

    Yamamoto, Koji; Oya, Yu; Kagawa, Keiichiro; Nunoshita, Masahiro; Ohta, Jun; Watanabe, Kunihiro

    A complementary metal oxide semiconductor (CMOS) image sensor for the detection of modulated light under background illumination has been developed. When an object is illuminated by a modulated light source under background illumination the sensor enables the object alone to be captured. This paper describes improvements in pixel architecture for reducing fixed pattern noise (FPN) and improving the sensitivity of the image sensor. The improved 128 × 128 pixel CMOS image sensor with a column parallel analog-to-digital converter (ADC) circuit was fabricated using 0.35-mm CMOS technology. The resulting captured images are shown and the properties of improved pixel architecture are described. The image sensor has FPN of 1/28 that of the previous image sensor and an improved pixel architecture comprising a common in-pixel amp and a correlated double sampling (CDS) circuit. The use of a split photogate increases the sensitivity of the image sensor to 1.3 times that of the previous image sensor.

  4. A 3.5-4.5 GHz Complementary Metal-Oxide-Semiconductor Ultrawideband Receiver Frontend Low-Noise Amplifier with On-Chip Integrated Antenna for Interchip Communication

    NASA Astrophysics Data System (ADS)

    Azhari, Afreen; Kimoto, Kentaro; Sasaki, Nobuo; Kikkawa, Takamaro

    2010-04-01

    Chip-to-chip ultrawideband (UWB) wireless interconnections are essential for reducing resistance capacitance (RC) delay in wired interconnections and three-dimensional (3D) highly integrated packaging. In this study, we demonstrated a wireless interchip signal transmission between two on-chip meander antennas on printed circuit board (PCB) for 1 to 20 mm transmission distances where the low power gain of each antenna due to a lossy Si substrate has been amplified by a low-noise amplifier (LNA). The measured result shows that the LNA produces 26 dB of improvement in antenna power gain at 4.5 GHz on a lossy Si substrate. Moreover, a Gaussian monocycle pulse with a center frequency of 2.75 GHz was also received by an on-chip antenna and amplified by the LNA. The LNA was integrated with an on-chip antenna on a Si substrate with a resistivity of 10 Ω·cm using 180 nm complementary metal-oxide-semiconductor (CMOS) technology. The investigated system is required for future single chip transceiver front ends, integrated with an on-chip antenna for 3D mounting on a printed circuit (PC) board.

  5. Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

    PubMed

    Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

    2015-10-01

    We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs. PMID:26348408

  6. Note: A disposable x-ray camera based on mass produced complementary metal-oxide-semiconductor sensors and single-board computers

    SciTech Connect

    Hoidn, Oliver R.; Seidler, Gerald T.

    2015-08-15

    We have integrated mass-produced commercial complementary metal-oxide-semiconductor (CMOS) image sensors and off-the-shelf single-board computers into an x-ray camera platform optimized for acquisition of x-ray spectra and radiographs at energies of 2–6 keV. The CMOS sensor and single-board computer are complemented by custom mounting and interface hardware that can be easily acquired from rapid prototyping services. For single-pixel detection events, i.e., events where the deposited energy from one photon is substantially localized in a single pixel, we establish ∼20% quantum efficiency at 2.6 keV with ∼190 eV resolution and a 100 kHz maximum detection rate. The detector platform’s useful intrinsic energy resolution, 5-μm pixel size, ease of use, and obvious potential for parallelization make it a promising candidate for many applications at synchrotron facilities, in laser-heating plasma physics studies, and in laboratory-based x-ray spectrometry.

  7. Advocating Noise as an Agent for Ultra-Low Energy Computing: Probabilistic Complementary Metal-Oxide-Semiconductor Devices and Their Characteristics

    NASA Astrophysics Data System (ADS)

    Korkmaz, Pinar; Akgul, Bilge E. S.; Palem, Krishna V.; Chakrapani, Lakshmi N.

    2006-04-01

    Noise immunity and low-energy computing have become limiting factors in the semiconductor roadmap as transistor feature sizes shrink. The subject of our study is the probabilistic switch, implemented in the complementary metal-oxide-semiconductor (CMOS) domain, referred to as a probabilistic CMOS (PCMOS) switch, whose behavior is rendered probabilistic by noise. In conducting this study, we are motivated by the possibility of using such probabilistic switches to realize ultra-low energy computing. Based on PCMOS switches realized using 0.5 and 0.25 μm processes, we present detailed analytical models, subsequently verified through HSpice simulations. We consider the thermal noise and power supply noise as our sources for probabilistic behavior. Through one interesting aspect of the study, we characterize the effects of the noise sampling frequency and the output sampling frequency on probabilistic behavior. Finally, we briefly outline the opportunity that such probabilistic switches offer to ultra low-energy computing through the concept of a probabilistic system-on-a-chip (PSoC) architecture (that is based on PCMOS switches); such architectures can achieve significant energy savings and performance improvements at the application level.

  8. The relaxation of intrinsic compressive stress in complementary metal-oxide-semiconductor transistors by additional N ion implantation treatment with atomic force microscope-Raman stress extraction

    NASA Astrophysics Data System (ADS)

    Liao, M.-H.; Chen, C.-H.; Chang, L.-C.; Yang, C.; Kao, S.-C.

    2012-05-01

    Based on the stress extraction and measurement by atomic force microscope-Raman technique with the nanometer level space resolution, the high compressive stress about 550 MPa on the Si active region (OD) is observed for the current complementary metal-oxide-semiconductor (CMOS) transistor. During the thermal budget for the standard manufacture process of the current CMOS transistor, the difference of thermal expansion coefficients between Si and Shallow Trench Isolation (STI) oxide results in this high compressive stress in Si OD and further degrades the electron carrier mobility seriously. In order to relax this intrinsic processed compressive stress in Si OD and try to recover this performance loss, the novel process is proposed in this work in addition to the usage of one-side pad SiN layer. With this novel process of additional N-ion implantation (IMP) treatment in STI oxide, it can be found that the less compressive stress about 438 MPa in Si OD can be achieved by the smaller difference of thermal expansion coefficients between Si and N-doped SiO2 STI oxide. The formation of Si-N bonding in N-doped SiO2 STI region can be monitored by Fourier transform infrared spectroscopy spectra and thermal expansion coefficients for Si, SiO2, and SiN are 2.6 ppm/K, 0.4 ppm/K, and 2.87 ppm/K, respectively. The effective relaxation of intrinsic processed compressive stress in Si OD about 112 MPa (from 550 MPa to 438 MPa) by this proposed additional N IMP treatment contributes ˜14% electron carrier mobility enhancement/recovery. The experimental electrical data agree well with the theoretical piezoelectricity calculation for the strained-Si theory.

  9. Optimization of SiGe selective epitaxy for source/drain engineering in 22 nm node complementary metal-oxide semiconductor (CMOS)

    NASA Astrophysics Data System (ADS)

    Wang, G. L.; Moeen, M.; Abedin, A.; Kolahdouz, M.; Luo, J.; Qin, C. L.; Zhu, H. L.; Yan, J.; Yin, H. Z.; Li, J. F.; Zhao, C.; Radamson, H. H.

    2013-09-01

    SiGe has been widely used for source/drain (S/D) engineering in pMOSFETs to enhance channel mobility. In this study, selective Si1-xGex growth (0.25 ≤ x ≤ 0.35) with boron concentration of 1-3 × 1020 cm-3 in the process for 22 nm node complementary metal-oxide semiconductor (CMOS) has been investigated and optimized. The growth parameters were carefully tuned to achieve deposition of high quality and highly strained material. The thermal budget was decreased to 800 °C to suppress dopant diffusion, to minimize Si loss in S/D recesses, and to preserve the S/D recess shape. Two layers of Si1-xGex were deposited: a bottom layer with high Ge content (x = 0.35) which filled the recess and a cap layer with low Ge content (x = 0.25) which was elevated in the S/D regions. The elevated SiGe cap layer was intended to be consumed during the Ni-silicidation process in order to avoid strain reduction in the channel region arising from strain relaxation in SiGe S/D. In this study, a kinetic gas model was also applied to predict the pattern dependency of the growth and to determine the epi-profile in different transistor arrays. The input parameters include growth temperature, partial pressures of reactant gases, and chip layout. By using this model, the number of test wafers for epitaxy experiments can be decreased significantly. When the epitaxy process parameters can be readily predicted by the model for epi-profile control in an advanced chip design, fast and cost-effective process development can be achieved.

  10. Fluorescence-suppressed time-resolved Raman spectroscopy of pharmaceuticals using complementary metal-oxide semiconductor (CMOS) single-photon avalanche diode (SPAD) detector.

    PubMed

    Rojalin, Tatu; Kurki, Lauri; Laaksonen, Timo; Viitala, Tapani; Kostamovaara, Juha; Gordon, Keith C; Galvis, Leonardo; Wachsmann-Hogiu, Sebastian; Strachan, Clare J; Yliperttula, Marjo

    2016-01-01

    In this work, we utilize a short-wavelength, 532-nm picosecond pulsed laser coupled with a time-gated complementary metal-oxide semiconductor (CMOS) single-photon avalanche diode (SPAD) detector to acquire Raman spectra of several drugs of interest. With this approach, we are able to reveal previously unseen Raman features and suppress the fluorescence background of these drugs. Compared to traditional Raman setups, the present time-resolved technique has two major improvements. First, it is possible to overcome the strong fluorescence background that usually interferes with the much weaker Raman spectra. Second, using the high photon energy excitation light source, we are able to generate a stronger Raman signal compared to traditional instruments. In addition, observations in the time domain can be performed, thus enabling new capabilities in the field of Raman and fluorescence spectroscopy. With this system, we demonstrate for the first time the possibility of recording fluorescence-suppressed Raman spectra of solid, amorphous and crystalline, and non-photoluminescent and photoluminescent drugs such as caffeine, ranitidine hydrochloride, and indomethacin (amorphous and crystalline forms). The raw data acquired by utilizing only the picosecond pulsed laser and a CMOS SPAD detector could be used for identifying the compounds directly without any data processing. Moreover, to validate the accuracy of this time-resolved technique, we present density functional theory (DFT) calculations for a widely used gastric acid inhibitor, ranitidine hydrochloride. The obtained time-resolved Raman peaks were identified based on the calculations and existing literature. Raman spectra using non-time-resolved setups with continuous-wave 785- and 532-nm excitation lasers were used as reference data. Overall, this demonstration of time-resolved Raman and fluorescence measurements with a CMOS SPAD detector shows promise in diverse areas, including fundamental chemical research, the

  11. Design and implementation of a 1-V transformer magnetic feedback low-noise amplifier (LNA) at 5-6 GHz, in a 90 nm complementary metal-oxide-semiconductor (CMOS) process

    NASA Astrophysics Data System (ADS)

    Kytonaki, Eleni-Sotiria; Simitsakis, Paschalis; Bazigos, Antonios; Papananos, Yannis

    2011-02-01

    In this study, a low-noise amplifier (LNA) suitable for low-voltage operation is presented. The LNA operates at a frequency range between 5 and 6 GHz. Its topology exploits magnetic feedback to achieve high reverse isolation and low noise performance without a significant degradation of the gain and linearity of the circuit. The design has been fabricated, considering full electrostatic discharge protection, in a modern 90 nm complementary metal-oxide-semiconductor process. The measured performance, at 5.4 GHz, shows a reverse isolation of -17.3 dB, a gain of 10.4 dB, a noise figure of 0.98 dB and an input intercept point of 1.4 dBm. The circuit dissipates 12.5 mW from a 1 V supply, while it occupies 0.162 mm2 of the die area.

  12. New Source Heterojunction Structures with Relaxed/Strained Semiconductors for Quasi-Ballistic Complementary Metal-Oxide-Semiconductor Transistors: Relaxation Technique of Strained Substrates and Design of Sub-10 nm Devices

    NASA Astrophysics Data System (ADS)

    Tomohisa Mizuno,; Naoki Mizoguchi,; Kotaro Tanimoto,; Tomoaki Yamauchi,; Mitsuo Hasegawa,; Toshiyuki Sameshima,; Tsutomu Tezuka,

    2010-04-01

    We have studied new abrupt-source-relaxed/strained semiconductor-heterojunction structures for quasi-ballistic complementary metal-oxide-semiconductor (CMOS) devices, by locally controlling the strain of a single strained semiconductor. Appling O+ ion implantation recoil energy to the strained semiconductor/buried oxide interface, Raman analysis of the strained layers indicates that we have successfully relaxed both strained-Si-on-insulator (SSOI) substrates for n-MOS and SiGe-on-insulator (SGOI) substrates for p-MOS without polycrystallizing the semiconductor layers, by optimizing O+ ion implantation conditions. As a result, it is considered that the source conduction and valence band offsets Δ EC and Δ EV can be realized by the energy difference in the source Si/channel-strained Si and the source-relaxed SiGe/channel-strained SiGe layers, respectively. The device simulator, considering the tunneling effects at the source heterojunction, shows that the transconductance of sub-10 nm source heterojunction MOS transistors (SHOT) continues to increase with increasing Δ EC. Therefore, SHOT structures with the novel source heterojunction are very promising for future quasi-ballistic CMOS devices.

  13. A Modified Capacitance-Voltage Method Used for Leff Extraction and Process Monitoring in Advanced 0.15 μm Complementary Metal-Oxide-Semiconductor Technology and Beyond

    NASA Astrophysics Data System (ADS)

    Huang, Heng-Sheng; Shiu, Jen-Shiuan; Lin, Shyh-Jye; Chou, Jih-Wen; Lee, Ryan; Chen, Coming; Hong, Gary

    2001-03-01

    In this paper, an alternative approach for the extraction of effective channel length, Leff, using a modified capacitance-voltage (C-V) method [the capacitance-ratio (C-R) method], which considers depletion effect compensation is proposed. In general, we define Leff=Lmask-Δ L, where Δ L is the sum of the polysilicon gate lithography bias and two times the overlap length of the polysilicon gate and source/drain (S/D) extension (Δ L=Lpb+2Lovlap). Using the modified C-V method, more consistent and reasonable Leff data can be extracted as compared to those obtained using the newest current-voltage (I-V) method (shift and ratio method). In using the proposed C-R method, we can electrically measure the exact Lpb and Lovlap numbers that can both be used as process monitor parameters. The within-wafer uniformities of Leff (or Δ L), Lpb and Lovlap have also been checked among devices of various sizes. After the Leff is extracted, a stable S/D resistance Rsd, with Vg independence, is determined and verified using the I-V method. The parasitic capacitance Cgd is another extracted parameter that is as important as Rsd in SPICE modeling for RF complementary metal-oxide-semiconductor (CMOS) applications.

  14. Metal oxide semiconductor thin-film transistors for flexible electronics

    NASA Astrophysics Data System (ADS)

    Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

    2016-06-01

    The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular

  15. Demonstration of Y1Ba2Cu3O(7-delta) and complementary metal-oxide-semiconductor device fabrication on the same sapphire substrate

    NASA Technical Reports Server (NTRS)

    Burns, M. J.; De La Houssaye, P. R.; Russell, S. D.; Garcia, G. A.; Clayton, S. R.; Ruby, W. S.; Lee, L. P.

    1993-01-01

    We report the first fabrication of active semiconductor and high-temperature superconducting devices on the same substrate. Test structures of complementary MOS transistors were fabricated on the same sapphire substrate as test structures of Y1Ba2Cu3O(7-delta) flux-flow transistors, and separately, Y1Ba2Cu3O(7-delta) superconducting quantum interference devices utilizing both biepitaxial and step-edge Josephson junctions. Both semiconductor and superconductor devices were operated at 77 K. The cofabrication of devices using these disparate yet complementary electronic technologies on the same substrate opens the door for the fabrication of true semiconductive/superconductive hybrid integrated circuits capable of exploiting the best features of each of these technologies.

  16. A 5.4-9.2 GHz 19.5 dB Complementary Metal-Oxide-Semiconductor Ultrawide-Band Receiver Front-End Low-Noise Amplifier

    NASA Astrophysics Data System (ADS)

    Azhari, Afreen; Kubota, Shinichi; Toya, Akihiro; Sasaki, Nobuo; Kikkawa, Takamaro

    2011-04-01

    In this work, we present an ultrawide-band (UWB) complementary metal-oxide-semiconductor (CMOS) low-noise amplifier (LNA) for wireless communication in the upper UWB band, that is, from 5.4-9.2 GHz bandwidth with a wide-band 50 Ω input matching network in front of the LNA. A three-stage cascode-topology-based LNA with high-transconductance MOS transistors, was employed to improve the voltage gain up to 23 dB at 7.5 GHz, with 4.5-9.2 GHz 3 dB bandwidth. The maximum output power S21 was 19.5 dB at 7.3 GHz, with 5.4-9.2 GHz 3 dB bandwidth. The input matching circuit was designed with a reduced number of passive elements, resulting in an input reflection coefficient S11 of less than -10 dB from 4.5-9.2 GHz. The noise figure of the LNA was as low as 3.5 dB and the input-referred third-order intercept point (IIP3) was -8 dBm. The LNA has output reflection coefficient S22 of less than -10 dB from 5-7 GHz and a good reverse isolation, that is, S12 of < -45 dB in the entire UWB, due to a cascode topology. The LNA was fabricated using 180 nm CMOS technology, which consumes 56 mW power at 1.8 V power supply. In this paper, we also demonstrate a wireless communication of 7 GHz Gaussian monocycle pulse (GMP) by horn antennas and the LNA from 20 cm transmission distance.

  17. Metal oxide semiconductors for solar energy harvesting

    NASA Astrophysics Data System (ADS)

    Thimsen, Elijah James

    The correlation between energy consumption and human development illustrates the importance of this societal resource. We will consume more energy in the future. In light of issues with the status quo, such as climate change, long-term supply and security, solar energy is an attractive source. It is plentiful, virtually inexhaustible, and can provide more than enough energy to power society. However, the issue with producing electricity and fuels from solar energy is that it is expensive, primarily from the materials (silicon) used in building the cells. Metal oxide semiconductors are an attractive class of materials that are extremely low cost and can be produced at the scale needed to meet widespread demand. An industrially attractive thin film synthesis process based on aerosol deposition was developed that relies on self-assembly to afford rational control over critical materials parameters such as film morphology and nanostructure. The film morphology and nanostructure were found to have dramatic effects on the performance of TiO2-based photovoltaic dye-sensitized solar cells. Taking a cue from nature, to overcome the spatial and temporal mismatch between the supply of sunlight and demand for energy consumption, it is desirable to produce solar fuels such as hydrogen from photoelectrochemical water splitting. The source of water is important---seawater is attractive. The fundamental reaction mechanism for TiO2-based cells is discussed in the context of seawater splitting. There are two primary issues with producing hydrogen by photoelectrochemical water splitting using metal-oxide semiconductors: visible light activity and spontaneous activity. To address the light absorption issue, a combined theory-experiment approach was taken to understand the fundamental role of chemical composition in determining the visible light absorption properties of mixed metal-oxide semiconductors. To address the spontaneous activity issue, self-biasing all oxide p/n bulk

  18. Nanoscale Metal Oxide Semiconductors for Gas Sensing

    NASA Technical Reports Server (NTRS)

    Hunter, Gary W.; Evans, Laura; Xu, Jennifer C.; VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.

    2011-01-01

    A report describes the fabrication and testing of nanoscale metal oxide semiconductors (MOSs) for gas and chemical sensing. This document examines the relationship between processing approaches and resulting sensor behavior. This is a core question related to a range of applications of nanotechnology and a number of different synthesis methods are discussed: thermal evaporation- condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed, providing a processing overview to developers of nanotechnology- based systems. The results of a significant amount of testing and comparison are also described. A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. The TECsynthesized single-crystal nanowires offer uniform crystal surfaces, resistance to sintering, and their synthesis may be done apart from the substrate. The TECproduced nanowire response is very low, even at the operating temperature of 200 C. In contrast, the electrospun polycrystalline nanofiber response is high, suggesting that junction potentials are superior to a continuous surface depletion layer as a transduction mechanism for chemisorption. Using a catalyst deposited upon the surface in the form of nanoparticles yields dramatic gains in sensitivity for both nanostructured, one-dimensional forms. For the nanowire materials, the response magnitude and response rate uniformly increase with increasing operating temperature. Such changes are interpreted in terms of accelerated surface diffusional processes, yielding greater access to chemisorbed oxygen species and faster dissociative chemisorption, respectively. Regardless of operating temperature, sensitivity of the nanofibers is a factor of 10 to 100 greater than that of nanowires with the same catalyst for the same test condition. In summary, nanostructure appears critical to governing the reactivity, as measured by electrical

  19. Metal oxide semiconductor structure using oxygen-terminated diamond

    NASA Astrophysics Data System (ADS)

    Chicot, G.; Maréchal, A.; Motte, R.; Muret, P.; Gheeraert, E.; Pernot, J.

    2013-06-01

    Metal-oxide-semiconductor structures with aluminum oxide as insulator and p-type (100) mono-crystalline diamond as semiconductor have been fabricated and investigated by capacitance versus voltage and current versus voltage measurements. The aluminum oxide dielectric was deposited using low temperature atomic layer deposition on an oxygenated diamond surface. The capacitance voltage measurements demonstrate that accumulation, depletion, and deep depletion regimes can be controlled by the bias voltage, opening the route for diamond metal-oxide-semiconductor field effect transistor. A band diagram is proposed and discussed.

  20. Metal-oxide-semiconductor photocapacitor for sensing surface plasmon polaritons

    NASA Astrophysics Data System (ADS)

    Khalilzade-Rezaie, Farnood; Peale, Robert E.; Panjwani, Deep; Smith, Christian W.; Nath, Janardan; Lodge, Michael; Ishigami, Masa; Nader, Nima; Vangala, Shiva; Yannuzzi, Mark; Cleary, Justin W.

    2015-09-01

    An electronic detector of surface plasmon polaritons (SPP) is reported. SPPs optically excited on a metal surface using a prism coupler are detected by using a close-coupled metal-oxide-semiconductor capacitor. Semitransparent metal and graphene gates function similarly. We report the dependence of the photoresponse on substrate carrier type, carrier concentration, and back-contact biasing.

  1. CMOS array design automation techniques. [metal oxide semiconductors

    NASA Technical Reports Server (NTRS)

    Ramondetta, P.; Feller, A.; Noto, R.; Lombardi, T.

    1975-01-01

    A low cost, quick turnaround technique for generating custom metal oxide semiconductor arrays using the standard cell approach was developed, implemented, tested and validated. Basic cell design topology and guidelines are defined based on an extensive analysis that includes circuit, layout, process, array topology and required performance considerations particularly high circuit speed.

  2. Multilevel metallization method for fabricating a metal oxide semiconductor device

    NASA Technical Reports Server (NTRS)

    Hollis, B. R., Jr.; Feltner, W. R.; Bouldin, D. L.; Routh, D. E. (Inventor)

    1978-01-01

    An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

  3. Integrated photo-responsive metal oxide semiconductor circuit

    NASA Technical Reports Server (NTRS)

    Jhabvala, Murzban D. (Inventor); Dargo, David R. (Inventor); Lyons, John C. (Inventor)

    1987-01-01

    An infrared photoresponsive element (RD) is monolithically integrated into a source follower circuit of a metal oxide semiconductor device by depositing a layer of a lead chalcogenide as a photoresistive element forming an ohmic bridge between two metallization strips serving as electrodes of the circuit. Voltage from the circuit varies in response to illumination of the layer by infrared radiation.

  4. Large Lateral Photovoltaic Effect in Metal-(Oxide-) Semiconductor Structures

    PubMed Central

    Yu, Chongqi; Wang, Hui

    2010-01-01

    The lateral photovoltaic effect (LPE) can be used in position-sensitive detectors to detect very small displacements due to its output of lateral photovoltage changing linearly with light spot position. In this review, we will summarize some of our recent works regarding LPE in metal-semiconductor and metal-oxide-semiconductor structures, and give a theoretical model of LPE in these two structures. PMID:22163463

  5. New Performance Indicators of Metal-Oxide-Semiconductor Field-Effect Transistors for High-Frequency Power-Conscious Design

    NASA Astrophysics Data System (ADS)

    Katayama, Kosuke; Fujishima, Minoru

    2012-02-01

    With the progress of complementary metal-oxide-semiconductor (CMOS) process technology, it is possible to apply CMOS devices to millimeter-wave amplifier design. However, the power consumption of the system becomes higher in proportion to its target frequency. Moreover, CMOS devices are biased at a point where the device achieves the highest gain and consumes much power. In order to reduce the power consumption without any compromise, we introduce two types of indicator. One works towards achieving the highest gain with the lowest power consumption. The other works towards achieving the highest linearity with consideration of the power consumption. In this work, we have shown the effectiveness of those indicators by applying measured data of the fabricated metal-oxide-semiconductor field-effect transistors (MOSFETs) to cascade common-source amplifiers.

  6. Structural and optical properties of silicon metal-oxide-semiconductor light-emitting devices

    NASA Astrophysics Data System (ADS)

    Xu, Kaikai; Zhang, Zhengyuan; Zhang, Zhengping

    2016-01-01

    A silicon p-channel metal oxide semiconductor field-effect transistor (Si-PMOSFET) that is fully compatible with the standard complementary metal oxide semiconductor process is investigated based on the phenomenon of optical radiation observed in the reverse-biased p-n junction in the Si-PMOSFET device. The device can be used either as a two-terminal silicon diode light-emitting device (Si-diode LED) or as a three-terminal silicon gate-controlled diode light-emitting device (Si gate-controlled diode LED). It is seen that the three-terminal operating mode could provide much higher power transfer efficiency than the two-terminal operating mode. A new solution based on the concept of a theoretical quantum efficiency model combined with calculated results is proposed for interpreting the evidence of light intensity reduction at high operating voltages. The Si-LED that can be easily integrated into CMOS fabrication process is an important step toward optical interconnects.

  7. GaN Metal Oxide Semiconductor Field Effect Transistors

    SciTech Connect

    Ren, F.; Pearton, S.J.; Abernathy, C.R.; Baca, A.; Cheng, P.; Shul, R.J.; Chu, S.N.G.; Hong, M.; Lothian, J.R.; Schurman, M.J.

    1999-03-02

    A GaN based depletion mode metal oxide semiconductor field effect transistor (MOSFET) was demonstrated using Ga{sub 2}O{sub 3}(Gd{sub 2}O{sub 3}) as the gate dielectric. The MOS gate reverse breakdown voltage was > 35V which was significantly improved from 17V of Pt Schottky gate on the same material. A maximum extrinsic transconductance of 15 mS/mm was obtained at V{sub ds} = 30 V and device performance was limited by the contact resistance. A unity current gain cut-off frequency, f{sub {tau}}, and maximum frequency of oscillation, f{sub max} of 3.1 and 10.3 GHz, respectively, were measured at V{sub ds} = 25 V and V{sub gs} = {minus}20 V.

  8. Waveguide biosensor with integrated detector array for tuberculosis testing

    NASA Astrophysics Data System (ADS)

    Yan, Rongjin; Lynn, N. Scott; Kingry, Luke C.; Yi, Zhangjing; Slayden, Richard A.; Dandy, David S.; Lear, Kevin L.

    2011-01-01

    A label-free immunoassay using a local evanescent array coupled (LEAC) biosensor is reported. Complementary metal oxide semiconductor chips with integrated photoconductor arrays are used to detect an antibody to a M. tuberculosis protein antigen, HspX. The metrology limits of the LEAC sensor using dc and ac measurement systems correspond to average film thicknesses of 28 and 14 pm, respectively. Limits of detection are 87 and 108 pm, respectively, for mouse immunoglobulin G antibody patterning and antigen detection.

  9. Characterization of silicon carbide metal oxide semiconductor capacitors

    NASA Astrophysics Data System (ADS)

    Marinella, Matthew J.

    Only a few years after the invention of the transistor, William Shockley considered silicon carbide (SiC) an excellent material for high temperature semiconductor devices. Over a half century later, SiC technology is nearly mature enough that it may be considered for use in commercial electronic devices. Furthermore, since SiC has the ability to grow thermal silicon dioxide, significant research has been directed toward the creation of a commercial SiC metal oxide semiconductor field effect transistor (MOSFET). However, a number of significant hurdles still must be overcome before SiC devices can become commercially competitive, including the relatively high cost and low quality of materials. Another significant problem is the lack of understanding of factors which limit the minority carrier lifetime. The primary purpose of this work was to use the pulsed metal oxide semiconductor capacitor (MOS-C) technique to measure generation lifetime in SiC materials. It was found that many nonidealities corrupt the results obtained by this technique. One very interesting nonideality was negative bias temperature instability (NBTI), which has also been widely studied by the silicon industry in recent years. Methods to understand and minimize the effect of these nonidealities were developed. Furthermore, these methods allowed for further study of the oxide properties, such as leakage current. Even after accounting for nonidealities, generation lifetimes showed several peculiarities, such as a variation of as much as a factor of 1000 within a square cm area. In addition, the ratio of generation to recombination lifetime is less than unity, which is not predicted by classic theory, nor typically observed in silicon devices. Possible explanations are put forth to explain these observations. In addition, to further investigate these abnormalities, Schottky diodes were fabricated and characterized. When applied to the SiC MOS capacitor, the pulsed MOS-C technique involves

  10. Plasmonic nanostructured metal-oxide-semiconductor reflection modulators.

    PubMed

    Olivieri, Anthony; Chen, Chengkun; Hassan, Sa'ad; Lisicka-Skrzek, Ewa; Tait, R Niall; Berini, Pierre

    2015-04-01

    We propose a plasmonic surface that produces an electrically controlled reflectance as a high-speed intensity modulator. The device is conceived as a metal-oxide-semiconductor capacitor on silicon with its metal structured as a thin patch bearing a contiguous nanoscale grating. The metal structure serves multiple functions as a driving electrode and as a grating coupler for perpendicularly incident p-polarized light to surface plasmons supported by the patch. Modulation is produced by charging and discharging the capacitor and exploiting the carrier refraction effect in silicon along with the high sensitivity of strongly confined surface plasmons to index perturbations. The area of the modulator is set by the area of the incident beam, leading to a very compact device for a strongly focused beam (∼2.5 μm in diameter). Theoretically, the modulator can operate over a broad electrical bandwidth (tens of gigahertz) with a modulation depth of 3 to 6%, a loss of 3 to 4 dB, and an optical bandwidth of about 50 nm. About 1000 modulators can be integrated over a 50 mm(2) area producing an aggregate electro-optic modulation rate in excess of 1 Tb/s. We demonstrate experimentally modulators operating at telecommunications wavelengths, fabricated as nanostructured Au/HfO2/p-Si capacitors. The modulators break conceptually from waveguide-based devices and belong to the same class of devices as surface photodetectors and vertical cavity surface-emitting lasers. PMID:25730698

  11. Scalability of Schottky barrier metal-oxide-semiconductor transistors

    NASA Astrophysics Data System (ADS)

    Jang, Moongyu

    2016-05-01

    In this paper, the general characteristics and the scalability of Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are introduced and reviewed. The most important factors, i.e., interface-trap density, lifetime and Schottky barrier height of erbium-silicided Schottky diode are estimated using equivalent circuit method. The extracted interface trap density, lifetime and Schottky barrier height for hole are estimated as 1.5 × 1013 traps/cm2, 3.75 ms and 0.76 eV, respectively. The interface traps are efficiently cured by N2 annealing. Based on the diode characteristics, various sizes of erbium-silicided/platinum-silicided n/p-type SB-MOSFETs are manufactured and analyzed. The manufactured SB-MOSFETs show enhanced drain induced barrier lowering (DIBL) characteristics due to the existence of Schottky barrier between source and channel. DIBL and subthreshold swing characteristics are comparable with the ultimate scaling limit of double gate MOSFETs which shows the possible application of SB-MOSFETs in nanoscale regime.

  12. A comparison of imaging methods for use in an array biosensor

    NASA Technical Reports Server (NTRS)

    Golden, Joel P.; Ligler, Frances S.

    2002-01-01

    An array biosensor has been developed which uses an actively-cooled, charge-coupled device (CCD) imager. In an effort to save money and space, a complementary metal-oxide semiconductor (CMOS) camera and photodiode were tested as replacements for the cooled CCD imager. Different concentrations of CY5 fluorescent dye in glycerol were imaged using the three different detection systems with the same imaging optics. Signal discrimination above noise was compared for each of the three systems.

  13. Experimental Study on Improving Unclamped Inductive Switching Characteristics of the New Power Metal Oxide Semiconductor Field Effect Transistor Employing Deep Body Contact

    NASA Astrophysics Data System (ADS)

    Ji, In‑Hwan; Choi, Young‑Hwan; Kim, Soo‑Seong; Choi, Yearn‑Ik; Han, Min‑Koo

    2006-04-01

    A new power metal oxide semiconductor field effect transistor (MOSFET) with deep body contact (DBC), which improves the avalanche energy capability, is proposed and verified by experimental results. For the experiment, a 60 V, 1 A power MOSFET employing DBC has been fabricated using a complementary metal oxide semiconductor (CMOS) compatible deep Si trench process. Previous simulations show that DBC alters the direction of the current flow from the edge to the bottom of the p-body under unclamped inductive switching (UIS) conditions. DBC also suppresses the activation of the parasitic bipolar transistor due to the reduction of the current density beneath the n+ source. Experimental results show that the ruggedness of the proposed power MOSFET is improved without sacrificing any other electrical characteristics and increasing device area.

  14. Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal-Oxide-Semiconductor Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Huang, Yao-Tsung; Wu, San-Lein; Lin, Hau-Yu; Kuo, Cheng-Wen; Chang, Shoou-Jinn; Hong, De-Gong; Wu, Chung-Yi; Huang, Cheng-Tung; Cheng, Osbert

    2011-04-01

    We report an improved densification annealing process for sub atmospheric chemical vapor deposition (SACVD)-based shallow trench isolation (STI) to enhance n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) performance for 40 nm node and beyond. Experimental results show that this improved STI densification process leads to lower compressive stress in the small active area compared with the standard STI process. This is beneficial to electron mobility and leads to an enhancement of on-current (ION). Moreover, comparable drain induced barrier lowering (DIBL) and subthreshold swing (SS) characteristics for both devices indicate that the improved densification process would no significant influences on process variations or dopant diffusions. Hence, the improved STI process can be adopted in 40 nm complementary metal-oxide-semiconductor (CMOS) technology and beyond.

  15. Metal Schottky Source/Drain Technology for Ultrathin Silicon-on-Thin-Box Metal Oxide Semiconductor Field Effect Transistors

    NASA Astrophysics Data System (ADS)

    Shima, Akio; Sugii, Nobuyuki; Mise, Nobuyuki; Hisamoto, Digh; Takeda, Ken-ichi; Torii, Kazuyoshi

    2011-04-01

    This paper reports novel, non-epitaxial raised source/drain (S/D) approaches to decrease the parasitic external resistance in complementary metal-oxide-semiconductor field-effect transistors (CMOSFETs) fabricated on ultrathin silicon on insulator (UTSOI). This technique utilizes a metal Schottky S/D process with dopant segregation. Selectively formed NiSi2 with dopant segregation fabricated by laser-spike annealing (LSA) significantly lowered effective Shottky-barrier height and, thereby, lowered contact resistance (ρc). Satisfying the requirements of UTSOI MOSFETs in the 32-nm node for low stand-by power (LSTP) application, external parasitic resistance was reduced to 140 (NMOS) and 350 (PMOS) Ω µm. Our results show that ρc is an important component of parasitic resistance in terms of improving device performance of UTSOI MOSFETs.

  16. High temperature behavior of multi-region direct current current-voltage spectroscopy and relationship with shallow-trench-isolation-based high-voltage laterally diffused metal-oxide-semiconductor field-effect-transistors reliability

    NASA Astrophysics Data System (ADS)

    He, Yandong; Zhang, Ganggang; Zhang, Xing

    2014-01-01

    With the process compatibility with the mainstream standard complementary metal-oxide-semiconductor (CMOS), shallow trench isolation (STI) based laterally diffused metal-oxide-semiconductor (LDMOS) devices have become popular for its better tradeoff between breakdown voltage and performance, especially for smart power applications. A multi-region direct current current-voltage (MR-DCIV) technique with spectroscopic features was demonstrated to map the interface state generation in the channel, accumulation and STI drift regions. High temperature behavior of MR-DCIV spectroscopy was analyzed and a physical model was verified. Degradation of STI-based LDMOS transistors under high temperature reverse bias (HTRB) stress is experimentally studied by MR-DCIV spectroscopy. The impact of interface state location on device electrical characteristics was investigated. Our results show that the major contribution to HTRB degradation, in term of the on-resistance degradation, was attributed to interface state generation under STI drift region.

  17. Vox/Eox-Driven Breakdown of Ultrathin SiON Gate Dielectrics in p-Type Metal Oxide Semiconductor Field Effect Transistors under Low-Voltage Inversion Stress

    NASA Astrophysics Data System (ADS)

    Tsujikawa, Shimpei; Shiga, Katsuya; Umeda, Hiroshi; Yugami, Jiro

    2007-01-01

    The breakdown mechanism of ultrathin SiON gate dielectrics in p-type metal oxide semiconductor field effect transistors having p+gates (p+gate-pMOSFETs) has been studied. Systematic study with varying gate doping concentrations has revealed that, in the case of p+gate-pMOSFET in inversion mode, gate dielectric breakdown under stress voltage lower than -4 V is driven by oxide voltage (Vox) or oxide field (Eox), while the breakdown under stress voltage higher than -4 V is driven by gate voltage (Vg). The Vox/Eox-driven breakdown observed under low stress voltage is quite important to the reliability of low-voltage complementary metal oxide semiconductor (CMOS). By studying the mechanism of the breakdown, it has been clarified that the breakdown is not induced by electron current. The concept that the breakdown is due to same mechanism as the negative bias temperature instability (NBTI), namely the interfacial hydrogen release driven by Eox, has been shown to be possible. However, direct tunneling of holes driven by Vox has also been found to be a possible driving force of the breakdown. Although a decisive conclusion concerning the mechanism issue has not yet been obtained, the key factor that governs the breakdown has been shown to be Vox or Eox.

  18. Metal-oxide-semiconductor field effect transistor humidity sensor using surface conductance

    NASA Astrophysics Data System (ADS)

    Song, Seok-Ho; Yang, Hyun-Ho; Han, Chang-Hoon; Ko, Seung-Deok; Lee, Seok-Hee; Yoon, Jun-Bo

    2012-03-01

    This letter presents a metal-oxide-semiconductor field effect transistor based humidity sensor which does not use any specific materials to sense the relative humidity. We simply make use of the low pressure chemical vapor deposited (LPCVD) silicon dioxide's surface conductance change. When the gate is biased and then floated, the electrical charge in the gate is dissipated through the LPCVD silicon dioxide's surface to the surrounding ground with a time constant depending on the surface conductance which, in turn, varies with humidity. With this method, extremely high sensitivity was achieved—the charge dissipation speed increased thousand times as the relative humidity increased.

  19. Anomalous quantum efficiency for photoconduction and its power dependence in metal oxide semiconductor nanowires

    NASA Astrophysics Data System (ADS)

    Chen, R. S.; Wang, W. C.; Lu, M. L.; Chen, Y. F.; Lin, H. C.; Chen, K. H.; Chen, L. C.

    2013-07-01

    The quantum efficiency and carrier lifetime that decide the photoconduction (PC) efficiencies in the metal oxide semiconductor nanowires (NWs) have been investigated. The experimental result surprisingly shows that the SnO2, TiO2, WO3, and ZnO NWs reveal extraordinary quantum efficiencies in common, which are over one to three orders of magnitude lower than the theoretical expectation. The surface depletion region (SDR)-controlled photoconductivity is proposed to explain the anomalous quantum efficiency and its power dependence. The inherent difference between the metal oxide nanostructures such as carrier lifetime, carrier concentration, and dielectric constant leading to the distinct PC performance and behavior are also discussed.The quantum efficiency and carrier lifetime that decide the photoconduction (PC) efficiencies in the metal oxide semiconductor nanowires (NWs) have been investigated. The experimental result surprisingly shows that the SnO2, TiO2, WO3, and ZnO NWs reveal extraordinary quantum efficiencies in common, which are over one to three orders of magnitude lower than the theoretical expectation. The surface depletion region (SDR)-controlled photoconductivity is proposed to explain the anomalous quantum efficiency and its power dependence. The inherent difference between the metal oxide nanostructures such as carrier lifetime, carrier concentration, and dielectric constant leading to the distinct PC performance and behavior are also discussed. Electronic supplementary information (ESI) available. See DOI: 10.1039/c3nr01635h

  20. A Novel Sub-20 V Contact Gate Metal Oxide Semiconductor Field Effect Transistor with Fully Complementary Metal Oxide Semiconductor Compatible Process

    NASA Astrophysics Data System (ADS)

    Lee, Te Liang; Tsang Tsai, Ming; King, Ya Chin; Lin, Chrong Jung

    2013-04-01

    In this paper, a novel sub-20 V device which is called contact gate MOSFET (CGMOS) with fully CMOS logic compatible process is proposed and demonstrated. Comparing with lateral double diffusion MOSFET (LDMOS), CGMOS uses P substrate instead of N minus layer as drift region in logic process, and a contact on resistance protection oxide (RPO) layers to form an extra gate on the drain side of the channel region to provide a better gate control and reduce the surface field. This new device significantly rises up the breakdown voltage to 18 V with specific on-resistance 8.8 mΩ.mm2 in a small high voltage (HV) MOSFET area. Since there is no extra mask for creating the drift region or additional step for the wire bonding, CGMOS makes the integration of high voltage and logic circuits much simpler and area-saving.

  1. Note: Complementary metal-oxide-semiconductor high voltage pulse generation circuits

    NASA Astrophysics Data System (ADS)

    Sun, Jiwei; Wang, Pingshan

    2013-10-01

    We present two types of on-chip pulse generation circuits. The first is based on CMOS pulse-forming-lines (PFLs). It includes a four-stage charge pump, a four-stacked-MOSFET switch and a 5 mm long PFL. The circuit is implemented in a 0.13 μm CMOS process. Pulses of ˜1.8 V amplitude with ˜135 ps duration on a 50 Ω load are obtained. The obtained voltage is higher than 1.6 V, the rated operating voltage of the process. The second is a high-voltage Marx generator which also uses stacked MOSFETs as high voltage switches. The output voltage is 11.68 V, which is higher than the highest breakdown voltage (˜10 V) of the CMOS process. These results significantly extend high-voltage pulse generation capabilities of CMOS technologies.

  2. Millimeter wave complementary metal-oxide-semiconductor on-chip hexagonal ferrite circulator

    NASA Astrophysics Data System (ADS)

    Chao, Liu; Fu, Enjin; Koomson, Valencia J.; Afsar, Mohammed N.

    2014-05-01

    Hexagonal ferrites, such as BaFe12O19 and SrFe12O19, have strong uniaxial anisotropic magnetic field and remanent magnetism. By employing these properties, magnetic devices, such as phase shifter, isolator and circulator, can work up to tens of GHz frequency range without strong external magnetic field or even self-biasing. As the monolithic microwave integrated circuit extends to higher millimeter wave frequencies, the demand for high performance integrated passive magnetic components is more and more eminent. The micro- and nano-sized hexagonal ferrite can be conveniently utilized to fabricate magnetic components integrated in CMOS circuits via post processing. A nano-ferrite circulator working at 60 GHz is designed, fabricated, and integrated into the CMOS front end for the first time.

  3. Millimeter wave complementary metal-oxide-semiconductor on-chip hexagonal nano-ferrite circulator

    NASA Astrophysics Data System (ADS)

    Chao, Liu; Oukacha, Hassan; Fu, Enjin; Koomson, Valencia Joyner; Afsar, Mohammed N.

    2015-05-01

    Hexagonal ferrites such as M-type BaFe12O19 and SrFe12O19 have strong uniaxial anisotropic magnetic field and remanent magnetism. The nano-sized ferrite powder exhibits high compatibility and processability in composite material. New magnetic devices using the M-type ferrite materials can work in the tens of GHz frequency range from microwave to millimeter wave without the application of strong external magnetic field. The micro- and nano-sized hexagonal ferrite can be conveniently utilized to fabricate magnetic components integrated in CMOS integrated circuits as thin as several micrometers. The micro-fabrication method of such nano ferrite device is presented in this paper. A circulator working at 60 GHz is designed and integrated into the commercial CMOS process. The circulator exhibits distinct circulation properties in the frequency range from 56 GHz to 58 GHz.

  4. Integrated Nanopore Detectors in a Standard Complementary Metal-Oxide-Semiconductor Process

    NASA Astrophysics Data System (ADS)

    Uddin, Ashfaque; Chen, Chin-Hsuan; Yemenicioglu, Sukru; Milaninia, Kaveh; Corigliano, Ellie; Varma, Madoo; Theogarajan, Luke

    2012-02-01

    High-bandwidth and low-noise nanopore sensor and detection electronics are crucial in achieving single-DNA base resolution. A potential way to accomplish this goal is to integrate solid-state nanopores within a CMOS platform, in close proximity to the biasing electrodes and custom-designed amplifier electronics. Here we report the development of solid-state nanopore devices in a commercial CMOS potentiostat chip implemented in On-Semiconductor's 0.5 micron technology. By using post-CMOS micromachining, a free-standing oxide membrane and electrodes are fabricated utilizing the N+ polysilicon/oxide/N+ polysilicon capacitor structure available in the aforementioned process. Nanopores with sub-5 nm diameter are drilled in the membrane using a Transmission Electron Microscope. The integrity of pores is validated by measuring current-voltage and noise characteristics. DNA translocation experiments are also performed utilizing these on-chip pores. In addition, electrical tests performed on the CMOS potentiostat circuitry show that the post-CMOS micromachining process does not have any detrimental effect on the CMOS circuitry.

  5. Note: Complementary metal-oxide-semiconductor high voltage pulse generation circuits.

    PubMed

    Sun, Jiwei; Wang, Pingshan

    2013-10-01

    We present two types of on-chip pulse generation circuits. The first is based on CMOS pulse-forming-lines (PFLs). It includes a four-stage charge pump, a four-stacked-MOSFET switch and a 5 mm long PFL. The circuit is implemented in a 0.13 μm CMOS process. Pulses of ~1.8 V amplitude with ~135 ps duration on a 50 Ω load are obtained. The obtained voltage is higher than 1.6 V, the rated operating voltage of the process. The second is a high-voltage Marx generator which also uses stacked MOSFETs as high voltage switches. The output voltage is 11.68 V, which is higher than the highest breakdown voltage (~10 V) of the CMOS process. These results significantly extend high-voltage pulse generation capabilities of CMOS technologies. PMID:24182184

  6. Characterization study of an intensified complementary metal-oxide-semiconductor active pixel sensor

    NASA Astrophysics Data System (ADS)

    Griffiths, J. A.; Chen, D.; Turchetta, R.; Royle, G. J.

    2011-03-01

    An intensified CMOS active pixel sensor (APS) has been constructed for operation in low-light-level applications: a high-gain, fast-light decay image intensifier has been coupled via a fiber optic stud to a prototype "VANILLA" APS, developed by the UK based MI3 consortium. The sensor is capable of high frame rates and sparse readout. This paper presents a study of the performance parameters of the intensified VANILLA APS system over a range of image intensifier gain levels when uniformly illuminated with 520 nm green light. Mean-variance analysis shows the APS saturating around 3050 Digital Units (DU), with the maximum variance increasing with increasing image intensifier gain. The system's quantum efficiency varies in an exponential manner from 260 at an intensifier gain of 7.45 × 103 to 1.6 at a gain of 3.93 × 101. The usable dynamic range of the system is 60 dB for intensifier gains below 1.8 × 103, dropping to around 40 dB at high gains. The conclusion is that the system shows suitability for the desired application.

  7. Experimental investigation of a shielded complementary Metal-Oxide Semiconductor (MOS) structure

    NASA Technical Reports Server (NTRS)

    Lin, H. C.; Halsor, J. L.

    1974-01-01

    A shielded integrated complimentary MOS transistor structure is described which is used to prevent field inversion in the region not occupied by the gates and which permits the use of a thinner field oxide, reduces the chip area, and has provision for simplified multilayer connections. The structure is used in the design of a static shift register and results in a 20% reduction in area.

  8. Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

    PubMed Central

    Wang, Zhenwei; Al-Jawhari, Hala A.; Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wei, Nini; Hedhili, M. N.; Alshareef, H. N.

    2015-01-01

    In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field. PMID:25892711

  9. Modeling of n-InAs metal oxide semiconductor capacitors with high-κ gate dielectric

    NASA Astrophysics Data System (ADS)

    Babadi, A. S.; Lind, E.; Wernersson, L. E.

    2014-12-01

    A qualitative analysis on capacitance-voltage and conductance data for high-κ/InAs capacitors is presented. Our measured data were evaluated with a full equivalent circuit model, including both majority and minority carriers, as well as interface and border traps, formulated for narrow band gap metal-oxide-semiconductor capacitors. By careful determination of interface trap densities, distribution of border traps across the oxide thickness, and taking into account the bulk semiconductor response, it is shown that the trap response has a strong effect on the measured capacitances. Due to the narrow bandgap of InAs, there can be a large surface concentration of electrons and holes even in depletion, so a full charge treatment is necessary.

  10. Optimal design of an electret microphone metal-oxide-semiconductor field-effect transistor preamplifier.

    PubMed

    van der Donk, A G; Bergveld, P

    1992-04-01

    A theoretical noise analysis of the combination of a capacitive microphone and a preamplifier containing a metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-value resistive bias element is given. It is found that the output signal-to-noise ratio for a source follower and for a common-source circuit is almost the same. It is also shown that the output noise can be reduced by making the microphone capacitance as well as the bias resistor as large as possible, and furthermore by keeping the parasitic gate capacitances as low as possible and finally by using an optimum value for the gate area of the MOSFET. The main noise source is the thermal noise of the gate leakage resistance of the MOSFET. It is also shown that short-channel MOSFETs produce more thermal channel noise than longer channel devices. PMID:1597614

  11. Coaxial metal-oxide-semiconductor (MOS) Au/Ga2O3/GaN nanowires.

    PubMed

    Hsieh, Chin-Hua; Chang, Mu-Tung; Chien, Yu-Jen; Chou, Li-Jen; Chen, Lih-Juann; Chen, Chii-Dong

    2008-10-01

    Coaxial metal-oxide-semiconductor (MOS) Au-Ga2O3-GaN heterostructure nanowires were successfully fabricated by an in situ two-step process. The Au-Ga2O3 core-shell nanowires were first synthesized by the reaction of Ga powder, a mediated Au thin layer, and a SiO2 substrate at 800 degrees C. Subsequently, these core-shell nanowires were nitridized in ambient ammonia to form a GaN coating layer at 600 degrees C. The GaN shell is a single crystal, an atomic flat interface between the oxide and semiconductor that ensures that the high quality of the MOS device is achieved. These novel 1D nitride-based MOS nanowires may have promise as building blocks to the future nitride-based vertical nanodevices. PMID:18778107

  12. Drift-diffusion equation for ballistic transport in nanoscale metal-oxide-semiconductor field effect transistors

    NASA Astrophysics Data System (ADS)

    Rhew, Jung-Hoon; Lundstrom, Mark S.

    2002-11-01

    We develop a drift-diffusion equation that describes ballistic transport in a nanoscale metal-oxide-semiconductor field effect transistor (MOSFET). We treat injection from different contacts separately, and describe each injection with a set of extended McKelvey one-flux equations [Phys. Rev. 123, 51 (1961); 125, 1570 (1962)] that include hierarchy closure approximations appropriate for high-field ballistic transport and degenerate carrier statistics. We then reexpress the extended one-flux equations in a drift-diffusion form with a properly defined Einstein relationship. The results obtained for a nanoscale MOSFET show excellent agreement with the solution of the ballistic Boltzmann transport equation with no fitting parameters. These results show that a macroscopic transport model based on the moments of the Boltzmann transport equation can describe ballistic transport.

  13. Design issues for lateral double-diffused metal-oxide-semiconductor with higher breakdown voltage.

    PubMed

    Sung, Kunsik; Won, Taeyoung

    2013-05-01

    In this paper, we discuss a new High-Side nLDMOSFET whose breakdown voltage is over 100 V while meeting the thermal budget for the conventional process. The proposed n-channel lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) has a feature in that the structure comprises a gap of 5 microm between the DEEP N-WELL and the center of the source, the surface of which is implanted by the NADJUST-layer for high breakdown voltage and simultaneously the low specific on-resistance. The computer simulation of the proposed High-Side nLDMOS exhibits BVdss of 126 V and R(ON,sp) of as low as 2.50 m(omega) x cm2. The NBL, which plays a significant role as a blocking layer against the punch-through seems to function as a hurdle for increasing the breakdown voltage. PMID:23858840

  14. Effect of Temperature on GaGdO/GaN Metal Oxide Semiconductor Field Effect Transistors

    SciTech Connect

    Abernathy, C.R.; Baca, A.; Chu, S.N.G.; Hong, M.; Lothian, J.R.; Marcus, M.A.; Pearton, S.J.; Ren, F.; Schurman, M.J.

    1998-10-14

    GaGdO was deposited on GaN for use as a gate dielectric in order to fabricate a depletion metal oxide semiconductor field effect transistor (MOSFET). This is the fmt demonstration of such a device in the III-Nitride system. Analysis of the effect of temperature on the device shows that gate leakage is significantly reduced at elevated temperature relative to a conventional metal semiconductor field effeet transistor (MESFET) fabricated on the same GaN layer. MOSFET device operation in fact improved upon heating to 400 C. Modeling of the effeet of temperature on contact resistance suggests that the improvement is due to a reduction in the parasitic resistances present in the device.

  15. Modeling of quasi-ballistic transport in nanowire metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Lee, Yeonghun; Kakushima, Kuniyuki; Natori, Kenji; Iwai, Hiroshi

    2015-10-01

    We developed a semi-analytical quasi-ballistic transport model for the nanowire metal-oxide-semiconductor field-effect transistors, dealing with finite lengths of source, channel, and drain. For the modeling, we used a combination of one-flux scattering matrices and analytical solutions of Boltzmann transport equations. The developed model was in quantitatively good agreement with numerical results, and well represented intermediate-scaled devices. In addition, we illustrated that the finite source seriously affect the distribution function of the carriers injected from the source, and the finite drain does for the backscattering into the channel from the drain. Finally, our model and results would help to understand physical aspects regarding quasi-ballistic transport in nanoscale devices.

  16. Field-induced activation of metal oxide semiconductor for low temperature flexible transparent electronic device applications

    NASA Astrophysics Data System (ADS)

    Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony; Haglund, Amada; Ward, Thomas Zac; Mandrus, David; Rack, Philip

    Amorphous metal-oxide semiconductors have been extensively studied as an active channel material in thin film transistors due to their high carrier mobility, and excellent large-area uniformity. Here, we report the athermal activation of amorphous indium gallium zinc oxide semiconductor channels by an electric field-induced oxygen migration via gating through an ionic liquid. Using field-induced activation, a transparent flexible thin film transistor is demonstrated on a polyamide substrate with transistor characteristics having a current ON-OFF ratio exceeding 108, and saturation field effect mobility of 8.32 cm2/(V.s) without a post-deposition thermal treatment. This study demonstrates the potential of field-induced activation as an athermal alternative to traditional post-deposition thermal annealing for metal oxide electronic devices suitable for transparent and flexible polymer substrates. Materials Science and Technology Division, ORBL, Oak Ridge, TN 37831, USA.

  17. Photoconduction efficiencies of metal oxide semiconductor nanowires: The material's inherent properties

    NASA Astrophysics Data System (ADS)

    Chen, R. S.; Wang, W. C.; Chan, C. H.; Lu, M. L.; Chen, Y. F.; Lin, H. C.; Chen, K. H.; Chen, L. C.

    2013-11-01

    The photoconduction (PC) efficiencies of various single-crystalline metal oxide semiconductor nanowires (NWs) have been investigated and compared based on the materials' inherent properties. The defined PC efficiency (normalized gain) of SnO2 NWs is over one to five orders of magnitude higher than that of its highly efficient counterparts such as ZnO, TiO2, WO3, and GaN. The inherent property of the material allowed the photoconductive gain of an SnO2 single-NW photodetector to easily reach 8 × 108 at a low bias of 3.0 V and a low light intensity of 0.05 Wm-2, which is the optimal reported value so far for the single-NW photodetectors. The probable physical origins, such as charged surface state density and surface band bending, that caused the differences in PC efficiencies and carrier lifetimes are also discussed.

  18. Anomalous quantum efficiency for photoconduction and its power dependence in metal oxide semiconductor nanowires.

    PubMed

    Chen, R S; Wang, W C; Lu, M L; Chen, Y F; Lin, H C; Chen, K H; Chen, L C

    2013-08-01

    The quantum efficiency and carrier lifetime that decide the photoconduction (PC) efficiencies in the metal oxide semiconductor nanowires (NWs) have been investigated. The experimental result surprisingly shows that the SnO2, TiO2, WO3, and ZnO NWs reveal extraordinary quantum efficiencies in common, which are over one to three orders of magnitude lower than the theoretical expectation. The surface depletion region (SDR)-controlled photoconductivity is proposed to explain the anomalous quantum efficiency and its power dependence. The inherent difference between the metal oxide nanostructures such as carrier lifetime, carrier concentration, and dielectric constant leading to the distinct PC performance and behavior are also discussed. PMID:23779084

  19. Charge sensed Pauli blockade in a metal-oxide-semiconductor lateral double quantum dot.

    PubMed

    Nguyen, Khoi T; Lilly, Michael P; Nielsen, Erik; Bishop, Nathan; Rahman, Rajib; Young, Ralph; Wendt, Joel; Dominguez, Jason; Pluym, Tammy; Stevens, Jeffery; Lu, Tzu-Ming; Muller, Richard; Carroll, Malcolm S

    2013-01-01

    We report Pauli blockade in a multielectron silicon metal-oxide-semiconductor double quantum dot with an integrated charge sensor. The current is rectified up to a blockade energy of 0.18 ± 0.03 meV. The blockade energy is analogous to singlet-triplet splitting in a two electron double quantum dot. Built-in imbalances of tunnel rates in the MOS DQD obfuscate some edges of the bias triangles. A method to extract the bias triangles is described, and a numeric rate-equation simulation is used to understand the effect of tunneling imbalances and finite temperature on charge stability (honeycomb) diagram, in particular the identification of missing and shifting edges. A bound on relaxation time of the triplet-like state is also obtained from this measurement. PMID:24199677

  20. High and low threshold P-channel metal oxide semiconductor process and description of microelectronics facility

    NASA Technical Reports Server (NTRS)

    Bouldin, D. L.; Feltner, W. R.; Hollis, B. R.; Routh, D. E.

    1976-01-01

    The fabrication techniques and detail procedures for creating P-channel Metal-Oxide-Semiconductor (P-MOS) integrated circuits at George C. Marshall Space Flight Center (MSFC) are described. Examples of P-MOS integrated circuits fabricated at MSFC together with functional descriptions of each are given. Typical electrical characteristics of high and low threshold P-MOS discrete devices under given conditions are provided. A general description of MSFC design, mask making, packaging, and testing procedures is included. The capabilities described in this report are being utilized in: (1) research and development of new technology, (2) education of individuals in the various disciplines and technologies of the field of microelectronics, and (3) fabrication of many types of specially designed integrated circuits which are not commercially feasible in small quantities for in-house research and development programs.

  1. Modeling of n-InAs metal oxide semiconductor capacitors with high-κ gate dielectric

    SciTech Connect

    Babadi, A. S. Lind, E.; Wernersson, L. E.

    2014-12-07

    A qualitative analysis on capacitance-voltage and conductance data for high-κ/InAs capacitors is presented. Our measured data were evaluated with a full equivalent circuit model, including both majority and minority carriers, as well as interface and border traps, formulated for narrow band gap metal-oxide-semiconductor capacitors. By careful determination of interface trap densities, distribution of border traps across the oxide thickness, and taking into account the bulk semiconductor response, it is shown that the trap response has a strong effect on the measured capacitances. Due to the narrow bandgap of InAs, there can be a large surface concentration of electrons and holes even in depletion, so a full charge treatment is necessary.

  2. Control of Nanostructures and Interfaces of Metal Oxide Semiconductors for Quantum-Dots-Sensitized Solar Cells.

    PubMed

    Tian, Jianjun; Cao, Guozhong

    2015-05-21

    Nanostructured metal oxide semiconductors (MOS), such as TiO2 and ZnO, have been regarded as an attractive material for the quantum dots sensitized solar cells (QDSCs), owing to their large specific surface area for loading a large amount of quantum dots (QDs) and strong scattering effect for capturing a sufficient fraction of photons. However, the large surface area of such nanostructures also provides easy pathways for charge recombination, and surface defects and connections between adjacent nanoparticles may retard effective charge injection and charge transport, leading to a loss of power conversion efficiency. Introduction of the surface modification for MOS or QDs has been thought an effective approach to improve the performance of QDSC. In this paper, the recent advances in the control of nanostructures and interfaces in QDSCs and prospects for the further development with higher power conversion efficiency (PCE) have been discussed. PMID:26263261

  3. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

    NASA Astrophysics Data System (ADS)

    Kao, Wei-Chieh

    Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

  4. Rapid Bacterial Detection via an All-Electronic CMOS Biosensor.

    PubMed

    Nikkhoo, Nasim; Cumby, Nichole; Gulak, P Glenn; Maxwell, Karen L

    2016-01-01

    The timely and accurate diagnosis of infectious diseases is one of the greatest challenges currently facing modern medicine. The development of innovative techniques for the rapid and accurate identification of bacterial pathogens in point-of-care facilities using low-cost, portable instruments is essential. We have developed a novel all-electronic biosensor that is able to identify bacteria in less than ten minutes. This technology exploits bacteriocins, protein toxins naturally produced by bacteria, as the selective biological detection element. The bacteriocins are integrated with an array of potassium-selective sensors in Complementary Metal Oxide Semiconductor technology to provide an inexpensive bacterial biosensor. An electronic platform connects the CMOS sensor to a computer for processing and real-time visualization. We have used this technology to successfully identify both Gram-positive and Gram-negative bacteria commonly found in human infections. PMID:27618185

  5. on the two-state inversion capacitance at varied frequencies of metal-oxide-semiconductor capacitor

    NASA Astrophysics Data System (ADS)

    Chen, Tzu-Yu; Hwu, Jenn-Gwo

    2014-09-01

    Two-state inversion capacitances of a metal-oxide-semiconductor capacitor (MOSCAP) at varied AC frequencies after negative/positive constant voltage stress (negative/positive CVS) treatments are investigated. When the device was biased into inversion, a low/high inversion-capacitance state (set state/reset state) was achieved after the negative/positive CVS treatments with/without a few trapped electrons in the ultrathin SiO2 layer. The inversion capacitances of set states were frequency independent, whereas those of reset states increased with the decreasing frequencies. It is different from the general characteristics of an MOSCAP whose inversion capacitances disperse at low frequencies. For this observed finding of the two-state inversion capacitances at varied frequencies, a mechanism of trapped-electrons-induced screening effect on the inversion electrons is proposed. The number of the trapped electrons in the SiO2 layer affects the number of the inversion electrons, and thus dominates the values of the inversion capacitances. Besides, simulation curves of the inversion capacitances of set states are demonstrated. They are fitted well with the experimental data utilizing the mechanism we proposed. This work investigates further into the influence of the trapped electrons in the ultrathin SiO2 layer on the inversion capacitance response.

  6. Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping.

    PubMed

    Rossi, Alessandro; Tanttu, Tuomo; Hudson, Fay E; Sun, Yuxin; Möttönen, Mikko; Dzurak, Andrew S

    2015-01-01

    As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization. PMID:26067215

  7. Electrical properties of inalp native oxides for metal-oxide-semiconductor device applications

    SciTech Connect

    Cao, Y.; Zhang, J.; Li, X.; Kosel, T.H.; Fay, P.; Hall, D.C.; Zhang, X.B.; Dupuis, R.D.; Jasinski, J.B.; Liliental-Weber, Z.

    2004-09-01

    Data are presented on the insulating properties and capacitance-voltage (CV) characteristics of metal-oxide-semiconductor (MOS) device-thickness (below approx. 100 nm) native oxides formed by wet thermal oxidation of thin InAlP epilayers lattice matched to GaAs. Low leakage current densities of J=1.4 x 10-9 A/cm2 and J=8.7 x 10-11 A/cm2 are observed at an applied field of 1 MV/cm for MOS capacitors fabricated with 17 nm and 48 nm oxides, respectively. TEM images show that the In-rich interfacial particles which exist in 110 nm oxides are absent in 17 nm oxide films. Quasi-static capacitance-voltage measurements of MOS capacitors fabricated on both n-type and p-type GaAs show that the InAlP oxide-GaAs interface is sufficiently free of traps to support inversion, indicating an unpinned Fermi level. These data suggest that InAlP native oxides may be a viable insulator for GaAs MOS device applications.

  8. Hydrogen Doped Metal Oxide Semiconductors with Exceptional and Tunable Localized Surface Plasmon Resonances.

    PubMed

    Cheng, Hefeng; Wen, Meicheng; Ma, Xiangchao; Kuwahara, Yasutaka; Mori, Kohsuke; Dai, Ying; Huang, Baibiao; Yamashita, Hiromi

    2016-07-27

    Heavily doped semiconductors have recently emerged as a remarkable class of plasmonic alternative to conventional noble metals; however, controlled manipulation of their surface plasmon bands toward short wavelengths, especially in the visible light spectrum, still remains a challenge. Here we demonstrate that hydrogen doped given MoO3 and WO3 via a facile H-spillover approach, namely, hydrogen bronzes, exhibit strong localized surface plasmon resonances in the visible light region. Through variation of their stoichiometric compositions, tunable plasmon resonances could be observed in a wide range, which hinge upon the reduction temperatures, metal species, the nature and the size of metal oxide supports in the synthetic H2 reduction process as well as oxidation treatment in the postsynthetic process. Density functional theory calculations unravel that the intercalation of hydrogen atoms into the given host structures yields appreciable delocalized electrons, enabling their plasmonic properties. The plasmonic hybrids show potentials in heterogeneous catalysis, in which visible light irradiation enhanced catalytic performance toward p-nitrophenol reduction relative to dark condition. Our findings provide direct evidence for achieving plasmon resonances in hydrogen doped metal oxide semiconductors, and may allow large-scale applications with low-price and earth-abundant elements. PMID:27384437

  9. Metal-oxide-semiconductor-compatible ultra-long-range surface plasmon modes

    NASA Astrophysics Data System (ADS)

    Durfee, C. G.; Furtak, T. E.; Collins, R. T.; Hollingsworth, R. E.

    2008-06-01

    Long-range surface plasmons traveling on thin metal films have demonstrated promising potential in subwavelength waveguide applications. In work toward device applications that can leverage existing silicon microelectronics technology, it is of interest to explore the propagation of surface plasmons in a metal-oxide-semiconductor geometry. In such a structure, there is a high refractive index contrast between the semiconductor (n ≈3.5 for silicon) and the insulating oxide (typically n ≈1.5-2.5). However, the introduction of dielectrics with disparate refractive indices is known to strongly affect the guiding properties of surface plasmons. In this paper, we analyze the implications of high index contrast in 1D layered surface plasmon structures. We show that it is possible to introduce a thin dielectric layer with a low refractive index positioned next to the metal without adversely affecting the guiding quality. In fact, such a configuration can dramatically increase the propagation length of the conventional long-range mode. While this study is directed at silicon-compatible waveguides working at telecommunications wavelengths, this configuration has general implications for surface plasmon structure design using other materials and operating at alternative wavelengths.

  10. Experimental characterization of a metal-oxide-semiconductor field-effect transistor-based Coulter counter.

    PubMed

    Sridhar, Manoj; Xu, Dongyan; Kang, Yuejun; Hmelo, Anthony B; Feldman, Leonard C; Li, Dongqing; Li, Deyu

    2008-05-15

    We report the detailed characterization of an ultrasensitive microfluidic device used to detect the translocation of small particles through a sensing microchannel. The device connects a fluidic circuit to the gate of a metal-oxide-semiconductor field-effect transistor (MOSFET) and detects particles by monitoring the MOSFET drain current modulation instead of the modulation in the ionic current through the sensing channel. The minimum volume ratio of the particle to the sensing channel detected is 0.006%, which is about ten times smaller than the lowest detected volume ratio previously reported in the literature. This volume ratio is detected at a noise level of about 0.6% of the baseline MOSFET drain current, clearly showing the amplification effects from the fluidic circuits and the MOSFETs. We characterize the device sensitivity as a function of the MOSFET gate potential and show that its sensitivity is higher when the MOSFET is operating below its threshold gate voltage than when it is operating above the threshold voltage. In addition, we demonstrate that the device sensitivity linearly increases with the applied electrical bias across the fluidic circuit. Finally, we show that polystyrene beads and glass beads with similar sizes can be distinguished from each other based on their different translocation times, and the size distribution of microbeads can be obtained with accuracy comparable to that of direct scanning electron microscopy measurements. PMID:19479001

  11. Silicon carbide: A unique platform for metal-oxide-semiconductor physics

    SciTech Connect

    Liu, Gang; Tuttle, Blair R.; Dhar, Sarit

    2015-06-15

    A sustainable energy future requires power electronics that can enable significantly higher efficiencies in the generation, distribution, and usage of electrical energy. Silicon carbide (4H-SiC) is one of the most technologically advanced wide bandgap semiconductor that can outperform conventional silicon in terms of power handling, maximum operating temperature, and power conversion efficiency in power modules. While SiC Schottky diode is a mature technology, SiC power Metal Oxide Semiconductor Field Effect Transistors are relatively novel and there is large room for performance improvement. Specifically, major initiatives are under way to improve the inversion channel mobility and gate oxide stability in order to further reduce the on-resistance and enhance the gate reliability. Both problems relate to the defects near the SiO{sub 2}/SiC interface, which have been the focus of intensive studies for more than a decade. Here we review research on the SiC MOS physics and technology, including its brief history, the state-of-art, and the latest progress in this field. We focus on the two main scientific problems, namely, low channel mobility and bias temperature instability. The possible mechanisms behind these issues are discussed at the device physics level as well as the atomic scale, with the support of published physical analysis and theoretical studies results. Some of the most exciting recent progress in interface engineering for improving the channel mobility and fundamental understanding of channel transport is reviewed.

  12. Study of indium antimonide metal-oxide-semiconductor structure prepared by direct photochemical-vapor deposition

    NASA Astrophysics Data System (ADS)

    Su, Y. K.; Liaw, U. H.

    1994-10-01

    Silicon dioxide (SiO2) insulator layers on indium antimonide (InSb) have been prepared by direct phtochemical-vapor deposition at low temperature below 200 C using 2537 A UV light. Ellipsometric studies prove that the refractive index and deposition rate of the photo-oxide films depend on the substrate temperature and gas ratio. The films evaluated by Auger electron spectroscopy (AES) depth profile showed that composition atoms were distributed uniformly throughout the oxide film. The AES analysis found the dominant components of the oxide film are silicon and oxygen. Fourier transform infrared spectroscopy absorption shows that the grown film has strong Si-O bonds with few Si-H bonds. The chemical x-ray photoelectron spectroscopy depth profile shows that the constituents of the semiconductors' outdiffusion into the oxide are few. Metal-oxide-semiconductor (MOS) capacitors were constructed on InSb substrates. Capacitance voltage (C-V) characteristics of the MOS capacitors were measured at 77 K. The interface-state density is of the order of 10(exp 11)/sq cm/eV, and distributed in a very good U shape within the midgap. C-V curves showed almost no hysteresis and smaller flatband voltage. The current-voltage curve shows the leakage current is about 1 nA at 0.8 V, and the breakdown voltage is about 0.8 MV/cm.

  13. Study of indium antimonide metal-oxide-semiconductor structure prepared by direct photochemical-vapor deposition

    NASA Astrophysics Data System (ADS)

    Su, Y. K.; Liaw, U. H.

    1994-10-01

    Silicon dioxide (SiO2) insulator layers on indium antimonide (InSb) have been prepared by direct photochemical-vapor deposition at low temperature below 200 °C using 2537 Å UV light. Ellipsometric studies prove that the refractive index and deposition rate of the photo-oxide films depend on the substrate temperature and gas ratio. The films evaluated by Auger electron spectroscopy (AES) depth profile showed that composition atoms were distributed uniformly throughout the oxide film. The AES analysis found the dominant components of the oxide film are silicon and oxygen. Fourier transform infrared spectroscopy absorption shows that the grown film has strong Si—O bonds with few Si—H bonds. The chemical x-ray photoelectron spectroscopy depth profile shows that the constituents of the semiconductors' outdiffusion into the oxide are few. Metal-oxide-semiconductor (MOS) capacitors were constructed on InSb substrates. Capacitance voltage (C-V) characteristics of the MOS capacitors were measured at 77 K. The interface-state density is of the order of 1011 cm-2 eV-1, and distributed in a very good U shape within the midgap. C-V curves showed almost no hysteresis and smaller flatband voltage. The current-voltage curve shows the leakage current is about 1 nA at 0.8 V, and the breakdown voltage is about 0.8 MV/cm.

  14. Electrode dependent interfacial layer variation in metal-oxide-semiconductor capacitor

    NASA Astrophysics Data System (ADS)

    Park, I.-S.; Jung, Y. C.; Lee, M.; Seong, S.; Ahn, J.

    2014-03-01

    The interfacial layer between oxide and semiconductor in metal-oxide-semiconductor (MOS) capacitors depends on the metal electrode material. The metal/HfO2/Si and metal/HfO2/Ge capacitor were made using an atomic layer deposited HfO2 dielectric films and Mo, Ru, and Pt electrodes above Si substrate and Ti, Ru, and Pt electrodes above Ge substrate. The measured saturation capacitance was varied with electrode and evaluated to capacitance equivalent thickness (CET). In Si-based MOS capacitor, the CET value of the capacitor with Pt electrode is larger than those with Mo and Ru electrode. In addition, the CET is 27.4 A, 38.2 A, and 30.8 A for Ti, Ru, and Pt electrode, respectively, for Ge-based MOS capacitors. The CET variation with electrode is attributed the variation of dielectric constant of HfO2 dielectric and the difference of interfacial layer. The CET variation is well in agreement with the interfacial layer thickness taken by a transmission electron microscopy. The thickness variation of interfacial layer results from the oxygen gettering ability of the electrode even though they are apart.

  15. Origin of microwave noise from an n-channel metal-oxide-semiconductor field effect transistor

    NASA Astrophysics Data System (ADS)

    Pantisano, Luigi; Cheung, K. P.

    2002-12-01

    The physics of noise is a complex subject. It is often difficult to clearly identify the physical origin of the observed noise. Electronic noise at microwave frequencies is technologically very important and has been extensively studied. While it is well known that many physical phenomena give rise to output current fluctuations (i.e., noise) in a metal-oxide-semiconductor field effect transistor (MOSFET), few physical phenomena have a time constant that can contribute in the microwave range. Current physical models of MOSFET microwave noise are all based on thermal agitation of electrons (thermal noise). However, what is the correct temperature (lattice or electron) to use in the noise calculation is an ongoing debate in the literature. All the modeling efforts have been using noise measured from pristine devices as a test for validity. In this work, we studied the n-MOSFET microwave noise as a function of electrical stress induced degradation. Our experiments thus introduced a new dimension in the noise behavior study. The results of our experiments cannot be explained by any of the current existing models. All existing models discounted flicker noise as being too small at microwave frequency. Our experimental results compel us to reexamine the validity of this common assumption. While we are not quite able to prove conclusively, our evidences are clearly leaning toward defect-induced fluctuation (flicker noise) as the origin of microwave noise in a n-MOSFET

  16. Inversion channel diamond metal-oxide-semiconductor field-effect transistor with normally off characteristics

    PubMed Central

    Matsumoto, Tsubasa; Kato, Hiromitsu; Oyama, Kazuhiro; Makino, Toshiharu; Ogura, Masahiko; Takeuchi, Daisuke; Inokuma, Takao; Tokuda, Norio; Yamasaki, Satoshi

    2016-01-01

    We fabricated inversion channel diamond metal-oxide-semiconductor field-effect transistors (MOSFETs) with normally off characteristics. At present, Si MOSFETs and insulated gate bipolar transistors (IGBTs) with inversion channels are widely used because of their high controllability of electric power and high tolerance. Although a diamond semiconductor is considered to be a material with a strong potential for application in next-generation power devices, diamond MOSFETs with an inversion channel have not yet been reported. We precisely controlled the MOS interface for diamond by wet annealing and fabricated p-channel and planar-type MOSFETs with phosphorus-doped n-type body on diamond (111) substrate. The gate oxide of Al2O3 was deposited onto the n-type diamond body by atomic layer deposition at 300 °C. The drain current was controlled by the negative gate voltage, indicating that an inversion channel with a p-type character was formed at a high-quality n-type diamond body/Al2O3 interface. The maximum drain current density and the field-effect mobility of a diamond MOSFET with a gate electrode length of 5 μm were 1.6 mA/mm and 8.0 cm2/Vs, respectively, at room temperature. PMID:27545201

  17. The response of metal-oxide-semiconductor devices irradiated at high temperatures

    NASA Astrophysics Data System (ADS)

    Schwank, James R.; Sexton, Fred W.; Fleetwood, Daniel M.; Rodgers, M. S.; Hughes, Kenneth L.

    To study the combined effects of high temperature and radiation on metal-oxide-semiconductor (MOS) integrated circuits (ICs), we have performed a series of experiments to characterize the response of MOS 16k static random access memories (SRAMs) irradiated at temperatures from 298 to 398 K. The irradiations were performed at dose rates approaching those of a spacebased nuclear reactor (approx. = 0.03 rad/s). Over the temperature range investigated, the failure dose of 16k SRAMs was found to decrease with increasing temperature due to complex interactions between radiation and temperature. Neither the failure mechanism nor the failure dose could be predicted from separate or independent measurements of room-temperature irradiation data and IC response preirradiation as a function of temperature. These results show that over the temperature range 298 to 398 K one cannot depend on elevated temperatures to extend the lifetime of ICs in a radiation environment. Extensive qualification tests must be performed if ICs on a space nuclear power platform are to exposed to high radiation levels in this temperature range. At temperatures much higher than 400 K, however, defect annealing can significantly increase the radiation tolerance of MOS circuits.

  18. The response of metal-oxide-semiconductor devices irradiated at high temperatures

    NASA Astrophysics Data System (ADS)

    Schwank, James R.; Sexton, Fred W.; Fleetwood, Daniel M.; Rodgers, M. Steven; Hughes, Kenneth L.

    To study the combined effects of high temperature and radiation on metal-oxide-semiconductor (MOS) integrated circuits (ICs), we have performed a series of experiments to characterize the response of MOS 16k static random access memories (SRAMs) irradiated at temperatures from 298 to 398 K. The irradiations were performed at dose rates approaching those of a spacebased nuclear reactor (approx. = 0.03 rad/s). Over the temperature range investigated, the failure dose of 16k SRAMs was found to decrease with increasing temperature due to complex interactions between radiation and temperature. Neither the failure mechanism nor the failure dose could be predicted from separate or independent measurements of room-temperature irradiation data and IC response preirradiation as a function of temperature. These results show that over the temperature range 298 to 398 K one cannot depend on elevated temperatures to extend the lifetime of ICs in a radiation environment. Extensive qualification tests must be performed if ICs on a space nuclear power platform are to be exposed to high radiation levels in this temperature range. At temperatures much higher than 400 K, however, defect annealing can significantly increase the radiation tolerance of MOS circuits.

  19. Hydrocarbon dissociation on palladium studied with a hydrogen sensitive Pd-metal-oxide-semiconductor structure

    NASA Astrophysics Data System (ADS)

    Dannetun, H.; Lundström, I.; Petersson, L.-G.

    1988-01-01

    The polycrystalline Pd surface of a hydrogen sensitive palladium-silicon dioxide-silicon [Pd-MOS (metal-oxide-semiconductor)] structure has been exposed to small unsaturated hydrocarbons in the temperature range 300-500 K. Apart from the hydrogen response of the Pd-MOS structure also work function (ΔΦ) and electron energy-loss studies were performed. At 500 K the hydrocarbons dissociate completely upon adsorption and produce a surface with atomically adsorbed carbon. The Pd-MOS structure can be used to observe both the dehydrogenation of the hydrocarbon molecules and the process of carbon adsorbing on the palladium surface. The sticking coefficient at this temperature for all hydrocarbons is close to unity. Furthermore, the hydrogen sensitivity of the structure is not drastically reduced by the adsorbed carbon. If the hydrocarbon adsorption is performed at 300 K there is still, at least on the initially clean surface, a large dehydrogenation. The dissociation is, however, not at all complete and there are considerable amounts of hydrocarbon species adsorbed for each gas. The induced work function shifts due to the different hydrocarbons vary from -1.0 to -1.7 eV. The hydrogen sensitivity of the Pd-MOS structure is reduced for growing hydrocarbon coverages and disappears completely for work function shifts of -1.7 eV.

  20. A metal-oxide-semiconductor radiation dosimeter with a thick and defect-rich oxide layer

    NASA Astrophysics Data System (ADS)

    Liu, Hongrui; Yang, Yuhao; Zhang, Jinwen

    2016-04-01

    Enhancing the density of defects in the oxide layer is the main factor in improving the sensitivity of a metal-oxide-semiconductor (MOS) radiation dosimeter. This paper reports a novel MOS dosimeter with a very thick and defect-rich oxide layer fabricated by MEMS technology. The category of defects in SiO2 and their possible effect on the radiation dose sensing was analyzed. Then, we proposed combining deep-reactive-ion etching, thermal oxidation and low pressure chemical vapor deposition to realize an oxide layer containing multiple and large interfaces which can increase defects significantly. The trench-and-beam structure of silicon was considered in detail. The fabrication process was developed for obtaining a thick and compact MEMS-made SiO2. Our devices were irradiated by γ-rays of 60Co at 2 Gy per minute for 2 h and a thermally stimulated current (TSC) method was used to determine the readout of the dosimeters. Results show that there is a peak current of about 450 nA, indicating a total TSC charge of 158 μC and sensitivity of 1.1 μC mm-3·Gy, which is 40 times the sensitivity of previous MOS dosimeters.

  1. Ionic Liquid Activation of Amorphous Metal-Oxide Semiconductors for Flexible Transparent Electronic Devices

    DOE PAGESBeta

    Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; Ovchinnikova, Olga S.; Haglund, Amanda V.; Dai, Sheng; Ward, Thomas Zac; Mandrus, David; Rack, Philip D.

    2016-02-09

    To begin this abstract, amorphous metal-oxide semiconductors offer the high carrier mobilities and excellent large-area uniformity required for high performance, transparent, flexible electronic devices; however, a critical bottleneck to their widespread implementation is the need to activate these materials at high temperatures which are not compatible with flexible polymer substrates. The highly controllable activation of amorphous indium gallium zinc oxide semiconductor channels using ionic liquid gating at room temperature is reported. Activation is controlled by electric field-induced oxygen migration across the ionic liquid-semiconductor interface. In addition to activation of unannealed devices, it is shown that threshold voltages of a transistormore » can be linearly tuned between the enhancement and depletion modes. Finally, the first ever example of transparent flexible thin film metal oxide transistor on a polyamide substrate created using this simple technique is demonstrated. Finally, this study demonstrates the potential of field-induced activation as a promising alternative to traditional postdeposition thermal annealing which opens the door to wide scale implementation into flexible electronic applications.« less

  2. Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

    PubMed Central

    Rossi, Alessandro; Tanttu, Tuomo; Hudson, Fay E.; Sun, Yuxin; Möttönen, Mikko; Dzurak, Andrew S.

    2015-01-01

    As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization. PMID:26067215

  3. Inversion channel diamond metal-oxide-semiconductor field-effect transistor with normally off characteristics.

    PubMed

    Matsumoto, Tsubasa; Kato, Hiromitsu; Oyama, Kazuhiro; Makino, Toshiharu; Ogura, Masahiko; Takeuchi, Daisuke; Inokuma, Takao; Tokuda, Norio; Yamasaki, Satoshi

    2016-01-01

    We fabricated inversion channel diamond metal-oxide-semiconductor field-effect transistors (MOSFETs) with normally off characteristics. At present, Si MOSFETs and insulated gate bipolar transistors (IGBTs) with inversion channels are widely used because of their high controllability of electric power and high tolerance. Although a diamond semiconductor is considered to be a material with a strong potential for application in next-generation power devices, diamond MOSFETs with an inversion channel have not yet been reported. We precisely controlled the MOS interface for diamond by wet annealing and fabricated p-channel and planar-type MOSFETs with phosphorus-doped n-type body on diamond (111) substrate. The gate oxide of Al2O3 was deposited onto the n-type diamond body by atomic layer deposition at 300 °C. The drain current was controlled by the negative gate voltage, indicating that an inversion channel with a p-type character was formed at a high-quality n-type diamond body/Al2O3 interface. The maximum drain current density and the field-effect mobility of a diamond MOSFET with a gate electrode length of 5 μm were 1.6 mA/mm and 8.0 cm(2)/Vs, respectively, at room temperature. PMID:27545201

  4. 3-D perpendicular assembly of single walled carbon nanotubes for complimentary metal oxide semiconductor interconnects.

    PubMed

    Kim, Tae-Hoon; Yilmaz, Cihan; Somu, Sivasubramanian; Busnaina, Ahmed

    2014-05-01

    Due to their superior electrical properties such as high current density and ballistic transport, carbon nanotubes (CNT) are considered as a potential candidate for future Very Large Scale Integration (VLSI) interconnects. However, direct incorporation of CNTs into Complimentary Metal Oxide Semiconductor (CMOS) architecture by conventional chemical vapor deposition (CVD) growth method is problematic since it requires high temperatures that might damage insulators and doped semiconductors in the underlying CMOS circuits. In this paper, we present a directed assembly method to assemble aligned CNTs into pre-patterned vias and perpendicular to the substrate. A dynamic electric field with a static offset is applied to provide the force needed for directing the SWNT assembly. It is also shown that by adjusting assembly parameters the density of the assembled CNTs can be significantly enhanced. This highly scalable directed assembly method is conducted at room temperature and pressure and is accomplished in a few minutes. I-V characterization of the assembled CNTs was conducted using a Zyvex nanomanipulator in a scanning electron microscope (SEM) and the measured value of the resistance is found to be 270 komega s. PMID:24734611

  5. Silicon carbide: A unique platform for metal-oxide-semiconductor physics

    NASA Astrophysics Data System (ADS)

    Liu, Gang; Tuttle, Blair R.; Dhar, Sarit

    2015-06-01

    A sustainable energy future requires power electronics that can enable significantly higher efficiencies in the generation, distribution, and usage of electrical energy. Silicon carbide (4H-SiC) is one of the most technologically advanced wide bandgap semiconductor that can outperform conventional silicon in terms of power handling, maximum operating temperature, and power conversion efficiency in power modules. While SiC Schottky diode is a mature technology, SiC power Metal Oxide Semiconductor Field Effect Transistors are relatively novel and there is large room for performance improvement. Specifically, major initiatives are under way to improve the inversion channel mobility and gate oxide stability in order to further reduce the on-resistance and enhance the gate reliability. Both problems relate to the defects near the SiO2/SiC interface, which have been the focus of intensive studies for more than a decade. Here we review research on the SiC MOS physics and technology, including its brief history, the state-of-art, and the latest progress in this field. We focus on the two main scientific problems, namely, low channel mobility and bias temperature instability. The possible mechanisms behind these issues are discussed at the device physics level as well as the atomic scale, with the support of published physical analysis and theoretical studies results. Some of the most exciting recent progress in interface engineering for improving the channel mobility and fundamental understanding of channel transport is reviewed.

  6. Infrared rectification in a nanoantenna-coupled metal-oxide-semiconductor tunnel diode.

    PubMed

    Davids, Paul S; Jarecki, Robert L; Starbuck, Andrew; Burckel, D Bruce; Kadlec, Emil A; Ribaudo, Troy; Shaner, Eric A; Peters, David W

    2015-12-01

    Direct rectification of electromagnetic radiation is a well-established method for wireless power conversion in the microwave region of the spectrum, for which conversion efficiencies in excess of 84% have been demonstrated. Scaling to the infrared or optical part of the spectrum requires ultrafast rectification that can only be obtained by direct tunnelling. Many research groups have looked to plasmonics to overcome antenna-scaling limits and to increase the confinement. Recently, surface plasmons on heavily doped Si surfaces were investigated as a way of extending surface-mode confinement to the thermal infrared region. Here we combine a nanostructured metallic surface with a heavily doped Si infrared-reflective ground plane designed to confine infrared radiation in an active electronic direct-conversion device. The interplay of strong infrared photon-phonon coupling and electromagnetic confinement in nanoscale devices is demonstrated to have a large impact on ultrafast electronic tunnelling in metal-oxide-semiconductor (MOS) structures. Infrared dispersion of SiO2 near a longitudinal optical (LO) phonon mode gives large transverse-field confinement in a nanometre-scale oxide-tunnel gap as the wavelength-dependent permittivity changes from 1 to 0, which leads to enhanced electromagnetic fields at material interfaces and a rectified displacement current that provides a direct conversion of infrared radiation into electric current. The spectral and electrical signatures of the nanoantenna-coupled tunnel diodes are examined under broadband blackbody and quantum-cascade laser (QCL) illumination. In the region near the LO phonon resonance, we obtained a measured photoresponsivity of 2.7 mA W(-1) cm(-2) at -0.1 V. PMID:26414194

  7. Infrared rectification in a nanoantenna-coupled metal-oxide-semiconductor tunnel diode

    NASA Astrophysics Data System (ADS)

    Davids, Paul S.; Jarecki, Robert L.; Starbuck, Andrew; Burckel, D. Bruce; Kadlec, Emil A.; Ribaudo, Troy; Shaner, Eric A.; Peters, David W.

    2015-12-01

    Direct rectification of electromagnetic radiation is a well-established method for wireless power conversion in the microwave region of the spectrum, for which conversion efficiencies in excess of 84% have been demonstrated. Scaling to the infrared or optical part of the spectrum requires ultrafast rectification that can only be obtained by direct tunnelling. Many research groups have looked to plasmonics to overcome antenna-scaling limits and to increase the confinement. Recently, surface plasmons on heavily doped Si surfaces were investigated as a way of extending surface-mode confinement to the thermal infrared region. Here we combine a nanostructured metallic surface with a heavily doped Si infrared-reflective ground plane designed to confine infrared radiation in an active electronic direct-conversion device. The interplay of strong infrared photon-phonon coupling and electromagnetic confinement in nanoscale devices is demonstrated to have a large impact on ultrafast electronic tunnelling in metal-oxide-semiconductor (MOS) structures. Infrared dispersion of SiO2 near a longitudinal optical (LO) phonon mode gives large transverse-field confinement in a nanometre-scale oxide-tunnel gap as the wavelength-dependent permittivity changes from 1 to 0, which leads to enhanced electromagnetic fields at material interfaces and a rectified displacement current that provides a direct conversion of infrared radiation into electric current. The spectral and electrical signatures of the nanoantenna-coupled tunnel diodes are examined under broadband blackbody and quantum-cascade laser (QCL) illumination. In the region near the LO phonon resonance, we obtained a measured photoresponsivity of 2.7 mA W-1 cm-2 at -0.1 V.

  8. Investigation of Hot Carrier Degradation in Shallow-Trench-Isolation-Based High-Voltage Laterally Diffused Metal-Oxide-Semiconductor Field-Effect Transistors by a Novel Direct Current Current-Voltage Technique

    NASA Astrophysics Data System (ADS)

    He, Yandong; Zhang, Ganggang

    2012-04-01

    Shallow trench isolation (STI) based laterally diffused metal-oxide-semiconductor (LDMOS) devices have become popular with its better tradeoff between breakdown voltage and on-resistance and its compatibility with the standard complementary metal-oxide-semiconductor (CMOS) process. A novel direct current current-voltage (DCIV) technique demonstrated with multiple sharp peak signals is proposed to characterize interface state generation in the channel and in the STI drift regions separately. Degradation of STI-based LDMOS transistors in various hot-carrier stress modes is investigated experimentally by proposed technique. A two-dimensional numerical device simulation is performed to obtain insight into the proposed technique and device degradation characteristics under hot-carrier stress conditions. The impact of interface state location on device electrical characteristics is analyzed from measurement and simulation. Our results show that the maximum Isub stress becomes the worst hot-carrier degradation mode in term of the on-resistance degradation, which is attributed to interface state generation under STI drift region.

  9. Gate length and temperature dependence of negative differential transconductance in silicon quantum well metal-oxide-semiconductor field-effect transistors

    SciTech Connect

    Naquin, Clint; Lee, Mark; Edwards, Hal; Mathur, Guru; Chatterjee, Tathagata; Maggio, Ken

    2015-09-28

    Introducing quantum transport into silicon transistors in a manner compatible with industrial fabrication has the potential to transform the performance horizons of large scale integrated silicon devices and circuits. Explicit quantum transport as evidenced by negative differential transconductances (NDTCs) has been observed in a set of quantum well (QW) transistors fabricated using industrial silicon complementary metal-oxide-semiconductor processing. Detailed gate length and temperature dependence characteristics of the NDTCs in these devices have been measured. The QW potential was formed via lateral ion implantation doping on a commercial 45 nm technology node process line, and measurements of the transfer characteristics show NDTCs up to room temperature. Gate length dependence of NDTCs shows a correlation of the interface channel length with the number of NDTCs formed as well as with the gate voltage (V{sub G}) spacing between NDTCs. The V{sub G} spacing between multiple NDTCs suggests a quasi-parabolic QW potential profile. The temperature dependence is consistent with partial freeze-out of carrier concentration against a degenerately doped background.

  10. Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

    NASA Astrophysics Data System (ADS)

    Tripathi, Udbhav; Kaur, Ramneek

    2016-05-01

    Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

  11. C-V measurements of micron diameter metal-oxide-semiconductor capacitors using a scanning-electron-microscope-based nanoprobe.

    PubMed

    Zheng, T; Jia, H; Wallace, R M; Gnade, B E

    2007-10-01

    The C-V electrical characterization of microstructures on a standard probe station is limited by the magnification of the imaging system and the precision of the probe manipulators. To overcome these limitations, we examine the combination of in situ electrical probing and a dual column scanning electron microscope/focused ion beam system. The imaging parameters and probing procedures are carefully chosen to reduce e-beam damage to the metal oxide semiconductor capacitor device under test. Estimation of shunt capacitance is critical when making femtofarad level measurements. C-V measurements of micron size metal-oxide-silicon capacitors are demonstrated. PMID:17979444

  12. Plasmonic nanohole arrays on Si-Ge heterostructures: an approach for integrated biosensors

    NASA Astrophysics Data System (ADS)

    Augel, L.; Fischer, I. A.; Dunbar, L. A.; Bechler, S.; Berrier, A.; Etezadi, D.; Hornung, F.; Kostecki, K.; Ozdemir, C. I.; Soler, M.; Altug, H.; Schulze, J.

    2016-03-01

    Nanohole array surface plasmon resonance (SPR) sensors offer a promising platform for high-throughput label-free biosensing. Integrating nanohole arrays with group-IV semiconductor photodetectors could enable low-cost and disposable biosensors compatible to Si-based complementary metal oxide semiconductor (CMOS) technology that can be combined with integrated circuitry for continuous monitoring of biosamples and fast sensor data processing. Such an integrated biosensor could be realized by structuring a nanohole array in the contact metal layer of a photodetector. We used Fouriertransform infrared spectroscopy to investigate nanohole arrays in a 100 nm Al film deposited on top of a vertical Si-Ge photodiode structure grown by molecular beam epitaxy (MBE). We find that the presence of a protein bilayer, constitute of protein AG and Immunoglobulin G (IgG), leads to a wavelength-dependent absorptance enhancement of ~ 8 %.

  13. HfO2-based InP n-channel metal-oxide-semiconductor field-effect transistors and metal-oxide-semiconductor capacitors using a germanium interfacial passivation layer

    NASA Astrophysics Data System (ADS)

    Kim, Hyoung-Sub; Ok, I.; Zhang, M.; Zhu, F.; Park, S.; Yum, J.; Zhao, H.; Lee, Jack C.; Majhi, Prashant

    2008-09-01

    In this letter, we present our experimental results of HfO2-based n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) and metal-oxide-semiconductor capacitors (MOSCAPs) on indium phosphide (InP) substrates using a thin germanium (Ge) interfacial passivation layer (IPL). We found that MOSCAPs on n-InP substrates showed good C-V characteristics such as a small capacitance equivalent thickness (14Å ), a small frequency dispersion (<10% and <200mV), and a low dielectric leakage current (˜5×10-4A/cm2 at Vg=1.5V), whereas MOSCAPs on p-InP exhibited poor characteristics, implying severe Fermi level pinning. It was also found that InP was more vulnerable to a high temperature process such that C-V curves showed a characteristic "bump" and inversion capacitance at relatively high frequencies. From n-channel MOSFETs on a semi-insulating InP substrate using Ge IPL, HfO2, and TaN gate electrodes, excellent electrical characteristics such as a large transconductance (9.3mS /mm) and large drain currents (12.3mA/mm at Vd=2V and Vg=Vth+2V) were achieved, which are comparable to other works.

  14. A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands

    NASA Astrophysics Data System (ADS)

    Ren, Min; Li, Ze-Hong; Liu, Xiao-Long; Xie, Jia-Xiong; Deng, Guang-Min; Zhang, Bo

    2011-12-01

    A novel planar vertical double-diffused metal-oxide-semiconductor (VDMOS) structure with an ultra-low specific on-resistance (Ron,sp), whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region, is proposed. The theoretical limit of its Ron,sp is deduced, the influence of structure parameters on the breakdown voltage (BV) and Ron,sp are investigated, and the optimized results with BV of 83 V and Ron,sp of 54 mΩ·mm2 are obtained. Simulations show that the inhomogeneous-floating-islands metal-oxide-semiconductor field-effect transistor (MOSFET) has a superior “Ron,sp/BV" trade-off to the conventional VDMOS (a 38% reduction of Ron,sp with the same BV) and the homogeneous-floating-islands MOSFET (a 10% reduction of Ron,sp with the same BV). The inhomogeneous-floating-islands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET. Its reverse recovery peak current, reverse recovery time and reverse recovery charge are about 50, 80 and 40% of those of the superjunction MOSFET, respectively.

  15. Metal-oxide-semiconductor field-effect-transistors on indium phosphide using HfO2 and silicon passivation layer with equivalent oxide thickness of 18 A˚

    NASA Astrophysics Data System (ADS)

    Chen, Yen-Ting; Zhao, Han; Yum, Jung Hwan; Wang, Yanzhen; Lee, Jack C.

    2009-05-01

    In this letter, we demonstrate the electrical properties of metal-oxide-semiconductor capacitors and metal-oxide-semiconductor field-effect transistors (MOSFETs) on InP using atomic layer deposited HfO2 gate dielectric and a thin silicon interface passivation layer (Si IPL). Compared with single HfO2, the use of Si IPL results in better interface quality with InP substrate, as illustrated by smaller frequency dispersion and reduced hysteresis. MOSFETs with Si IPL show much higher drive current and transconductance, improved subthreshold swing, interface-trap density and gate leakage current with equivalent oxide thickness scaling down to 18 Å.

  16. Drift region doping effects on characteristics and reliability of high-voltage n-type metal-oxide-semiconductor transistors

    NASA Astrophysics Data System (ADS)

    Chen, Jone F.; Chang, Chun-Po; Liu, Yu Ming; Tsai, Yan-Lin; Hsu, Hao-Tang; Chen, Chih-Yuan; Hwang, Hann-Ping

    2016-01-01

    In this study, off-state breakdown voltage (VBD) and hot-carrier-induced degradation in high-voltage n-type metal-oxide-semiconductor transistors with various BF2 implantation doses in the n- drift region are investigated. Results show that a higher BF2 implantation dose results in a higher VBD but leads to a greater hot-carrier-induced device degradation. Experimental data and technology computer-aided design simulations suggest that the higher VBD is due to the suppression of gate-induced drain current. On the other hand, the greater hot-carrier-induced device degradation can be explained by a lower net donor concentration and a different current-flow path, which is closer to the Si-SiO2 interface.

  17. A model for the frequency dispersion of the high-k metal-oxide-semiconductor capacitance in accumulation

    NASA Astrophysics Data System (ADS)

    Yao, B.; Fang, Z. B.; Zhu, Y. Y.; Ji, T.; He, G.

    2012-05-01

    High-frequency capacitance-voltage measurements have been made on metal-oxide-semiconductor capacitors by using single crystalline Er2O3 high-k gate dielectrics. Based on our analysis, it has been found that frequency dispersion of Er2O3 capacitance in accumulation decreases consistently with the increase of the frequency. A correction model is proposed to explain these frequency dispersion phenomena and the capacitance-frequency equations are obtained from the impedance expression of the equivalent circuit. Based on the simulated capacitance-frequency, it can be concluded that frequency dispersion of Er2O3 capacitance in accumulation originates from the existence of the parasitic resistances, the series resistances, and the formed SiOx interfacial layer.

  18. SOI metal-oxide-semiconductor field-effect transistor photon detector based on single-hole counting.

    PubMed

    Du, Wei; Inokawa, Hiroshi; Satoh, Hiroaki; Ono, Atsushi

    2011-08-01

    In this Letter, a scaled-down silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) is characterized as a photon detector, where photogenerated individual holes are trapped below the negatively biased gate and modulate stepwise the electron current flowing in the bottom channel induced by the positive substrate bias. The output waveforms exhibit clear separation of current levels corresponding to different numbers of trapped holes. Considering this capability of single-hole counting, a small dark count of less than 0.02 s(-1) at room temperature, and low operation voltage of 1 V, SOI MOSFET could be a unique photon-number-resolving detector if the small quantum efficiency were improved. PMID:21808317

  19. A Low-Leakage Epitaxial High-κ Gate Oxide for Germanium Metal-Oxide-Semiconductor Devices.

    PubMed

    Hu, Chengqing; McDaniel, Martin D; Jiang, Aiting; Posadas, Agham; Demkov, Alexander A; Ekerdt, John G; Yu, Edward T

    2016-03-01

    Germanium (Ge)-based metal-oxide-semiconductor field-effect transistors are a promising candidate for high performance, low power electronics at the 7 nm technology node and beyond. However, the availability of high quality gate oxide/Ge interfaces that provide low leakage current density and equivalent oxide thickness (EOT), robust scalability, and acceptable interface state density (Dit) has emerged as one of the most challenging hurdles in the development of such devices. Here we demonstrate and present detailed electrical characterization of a high-κ epitaxial oxide gate stack based on crystalline SrHfO3 grown on Ge (001) by atomic layer deposition. Metal-oxide-Ge capacitor structures show extremely low gate leakage, small and scalable EOT, and good and reducible Dit. Detailed growth strategies and postgrowth annealing schemes are demonstrated to reduce Dit. The physical mechanisms behind these phenomena are studied and suggest approaches for further reduction of Dit. PMID:26859048

  20. Slow and fast traps in metal-oxide-semiconductor capacitors fabricated on recessed AlGaN/GaN heterostructures

    NASA Astrophysics Data System (ADS)

    Fiorenza, Patrick; Greco, Giuseppe; Iucolano, Ferdinando; Patti, Alfonso; Roccaforte, Fabrizio

    2015-04-01

    In this letter, slow and fast trap states in metal-oxide-semiconductor (MOS) capacitors fabricated on recessed AlGaN/GaN heterostructures were studied by frequency dependent conductance measurements. In particular, the comparison of devices before and after annealing in forming gas allowed to ascribe the fast states (with characteristic response time in the range of 5-50 μs) to SiO2/GaN "interface traps," and the slow states (50-100 μs) to "border traps" located few nanometers inside the SiO2 layer. These results can be important to predict and optimize the threshold voltage stability of hybrid MOS-based transistors on GaN.

  1. Response of a metal-oxide-semiconductor field-effect transistor to a cosmic-ray ion track

    NASA Technical Reports Server (NTRS)

    Benumof, Reuben; Zoutendyk, John

    1987-01-01

    A cosmic-ray ion track passing perpendicularly through the oxide layer of an enhancement-mode metal-oxide-semiconductor field-effect transistor (MOSFET) forms a conducting path, the resistance of which is proportional to the stopping power of the cosmic ion and independent of the cross-sectional area of the ion track. The voltage across the oxide capacitance may drop below the threshold voltage if the gate bias is sufficiently low or if the external resistance in the gate-source circuit is sufficiently high. The first of a pair of MOSFETs forming a flip-flop circuit may thus be turned off, and the second transitor may turn on, providing it has a sufficiently short delay time, thereby completing a single-event upset.

  2. Hydrogen-terminated diamond vertical-type metal oxide semiconductor field-effect transistors with a trench gate

    NASA Astrophysics Data System (ADS)

    Inaba, Masafumi; Muta, Tsubasa; Kobayashi, Mikinori; Saito, Toshiki; Shibata, Masanobu; Matsumura, Daisuke; Kudo, Takuya; Hiraiwa, Atsushi; Kawarada, Hiroshi

    2016-07-01

    The hydrogen-terminated diamond surface (C-H diamond) has a two-dimensional hole gas (2DHG) layer independent of the crystal orientation. A 2DHG layer is ubiquitously formed on the C-H diamond surface covered by atomic-layer-deposited-Al2O3. Using Al2O3 as a gate oxide, C-H diamond metal oxide semiconductor field-effect transistors (MOSFETs) operate in a trench gate structure where the diamond side-wall acts as a channel. MOSFETs with a side-wall channel exhibit equivalent performance to the lateral C-H diamond MOSFET without a side-wall channel. Here, a vertical-type MOSFET with a drain on the bottom is demonstrated in diamond with channel current modulation by the gate and pinch off.

  3. Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors.

    PubMed

    Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min

    2014-10-20

    In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication. PMID:25607316

  4. Anomalous degradation of low-field mobility in short-channel metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Natori, Kenji; Iwai, Hiroshi; Kakushima, Kuniyuki

    2015-12-01

    The anomalous degradation of the low-field mobility observed in short-channel metal-oxide-semiconductor field-effect transistors is analyzed by collating various reported data in experiments and simulations. It is inferred that the degradation is not caused by the channel scattering of the carriers. The origin is proposed to be the backscattering of channel carriers on injection into the drain. The expression of the low-field mobility, including the backscattering effect, is derived. The inverse of the low-field mobility is a linear function of the inverse of channel length, the expression of which reproduces that empirically derived by Bidal's group. By fitting the expression to simulated as well as experimental data, we can estimate the value of parameters related to the channel scattering and also to the backscattering from the drain. We find that these values are in reasonable magnitude.

  5. Extraction of Channel Length Independent Series Resistance for Deeply Scaled Metal-Oxide-Semiconductor Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Ma, Li-Juan; Ji, Xiao-Li; Chen, Yuan-Cong; Xia, Hao-Guang; Zhu, Chen-Xin; Guo, Qiang; Yan, Feng

    2014-09-01

    The recently developed four Rsd extraction methods from a single device, involving the constant-mobility method, the direct Id—Vgs method, the conductance method and the Y-function method, are evaluated on 32 nm n-channel metal-oxide-semiconductor field-effect transistors (nMOSFETs). It is found that Rsd achieved from the constant-mobility method exhibits the channel length independent characteristics. The L-dependent Rsd extracted from the other three methods is proven to be associated with the gate-voltage-induced mobility degradation in the extraction procedures. Based on L-dependent behaviors of Rsd, a new method is proposed for accurate series resistance extraction on deeply scaled MOSFETs.

  6. Interface states and internal photoemission in p-type GaAs metal-oxide-semiconductor surfaces

    NASA Technical Reports Server (NTRS)

    Kashkarov, P. K.; Kazior, T. E.; Lagowski, J.; Gatos, H. C.

    1983-01-01

    An interface photodischarge study of p-type GaAs metal-oxide-semiconductor (MOS) structures revealed the presence of deep interface states and shallow donors and acceptors which were previously observed in n-type GaAs MOS through sub-band-gap photoionization transitions. For higher photon energies, internal photoemission was observed, i.e., injection of electrons to the conduction band of the oxide from either the metal (Au) or from the GaAs valence band; the threshold energies were found to be 3.25 and 3.7 + or - 0.1 eV, respectively. The measured photoemission current exhibited a thermal activation energy of about 0.06 eV, which is consistent with a hopping mechanism of electron transport in the oxide.

  7. Ultraviolet-visible electroluminescence from metal-oxide-semiconductor devices with CeO{sub 2} films on silicon

    SciTech Connect

    Lv, Chunyan; Zhu, Chen; Wang, Canxing; Li, Dongsheng; Ma, Xiangyang Yang, Deren

    2015-03-15

    We report on ultraviolet-visible (UV-Vis) electroluminescence (EL) from metal-oxide-semiconductor (MOS) devices with the CeO{sub 2} films annealed at low temperatures. At the same injection current, the UV-Vis EL from the MOS device with the 550 °C-annealed CeO{sub 2} film is much stronger than that from the counterpart with the 450 °C-annealed CeO{sub 2} film. This is due to that the 550 °C-annealed CeO{sub 2} film contains more Ce{sup 3+} ions and oxygen vacancies. It is tentatively proposed that the recombination of the electrons in multiple oxygen-vacancy–related energy levels with the holes in Ce 4f{sup 1} energy band pertaining to Ce{sup 3+} ions leads to the UV-Vis EL.

  8. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    SciTech Connect

    Spathis, C. Birbas, A.; Georgakopoulou, K.

    2015-08-15

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

  9. Charge-flow structures as polymeric early-warning fire alarm devices. M.S. Thesis; [metal oxide semiconductors

    NASA Technical Reports Server (NTRS)

    Sechen, C. M.; Senturia, S. D.

    1977-01-01

    The charge-flow transistor (CFT) and its applications for fire detection and gas sensing were investigated. The utility of various thin film polymers as possible sensing materials was determined. One polymer, PAPA, showed promise as a relative humidity sensor; two others, PFI and PSB, were found to be particularly suitable for fire detection. The behavior of the charge-flow capacitor, which is basically a parallel-plate capacitor with a polymer-filled gap in the metallic tip electrode, was successfully modeled as an RC transmission line. Prototype charge-flow transistors were fabricated and tested. The effective threshold voltage of this metal oxide semiconductor was found to be dependent on whether surface or bulk conduction in the thin film was dominant. Fire tests with a PFI-coated CFT indicate good sensitivity to smouldering fires.

  10. Model for the field effect from layers of biological macromolecules on the gates of metal-oxide-semiconductor transistors

    NASA Astrophysics Data System (ADS)

    Landheer, D.; Aers, G.; McKinnon, W. R.; Deen, M. J.; Ranuarez, J. C.

    2005-08-01

    The potential diagram for field-effect transistors used to detect charged biological macromolecules in an electrolyte is presented for the case where an insulating cover layer is used over a conventional eletrolyte-insulator metal-oxide-semiconductor (EIMOS) structure to tether or bind the biological molecules to a floating gate. The layer of macromolecules is modeled using the Poisson-Boltzmann equation for an ion-permeable membrane. Expressions are derived for the charges and potentials in the EIMOS and electrolyte-insulator-semiconductor structures, including the membrane and electrolyte. Exact solutions for the potentials and charges are calculated using numerical algorithms. Simple expressions for the response are presented for low solution potentials when the Donnan potential is approached in the bulk of the membrane. The implications of the model for the small-signal equivalent circuit and the noise analysis of these structures are discussed.

  11. Energy-band diagram configuration of Al2O3/oxygen-terminated p-diamond metal-oxide-semiconductor

    NASA Astrophysics Data System (ADS)

    Maréchal, A.; Aoukar, M.; Vallée, C.; Rivière, C.; Eon, D.; Pernot, J.; Gheeraert, E.

    2015-10-01

    Diamond metal-oxide-semiconductor capacitors were prepared using atomic layer deposition at 250 °C of Al2O3 on oxygen-terminated boron doped (001) diamond. Their electrical properties were investigated in terms of capacitance and current versus voltage measurements. Performing X-ray photoelectron spectroscopy based on the measured core level energies and valence band maxima, the interfacial energy band diagram configuration of the Al2O3/O-diamond is established. The band diagram alignment is concluded to be of type I with valence band offset Δ E v of 1.34 ± 0.2 eV and conduction band offset Δ E c of 0.56 ± 0.2 eV considering an Al2O3 energy band gap of 7.4 eV. The agreement with electrical measurement and the ability to perform a MOS transistor are discussed.

  12. The physical origin of dispersion in accumulation in InGaAs based metal oxide semiconductor gate stacks

    NASA Astrophysics Data System (ADS)

    Krylov, Igor; Ritter, Dan; Eizenberg, Moshe

    2015-05-01

    Dispersion in accumulation is a widely observed phenomenon in technologically important InGaAs gate stacks. Two principal different interface defects were proposed as the physical origin of this phenomenon—disorder induced gap states and border traps. While the gap states are located at the semiconductor side of the interface, the border traps are related to the dielectric side. The study of Al2O3, HfO2, and an intermediate composition of HfxAlyO deposited on InGaAs enabled us to find a correlation between the dispersion and the dielectric/InGaAs band offset. At the same time, no change in the dispersion was observed after applying an effective pre-deposition treatment which results in significant reduction of the interface states. Both observations prove that border traps are the physical origin of the dispersion in accumulation in InGaAs based metal-oxide-semiconductor gate stacks.

  13. GaSb p-channel metal-oxide-semiconductor field-effect transistor and its temperature dependent characteristics

    NASA Astrophysics Data System (ADS)

    Zhao, Lian-Feng; Tan, Zhen; Wang, Jing; Xu, Jun

    2015-01-01

    GaSb p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with an atomic layer deposited Al2O3 gate dielectric and a self-aligned Si-implanted source/drain are experimentally demonstrated. Temperature dependent electrical characteristics are investigated. Different electrical behaviors are observed in two temperature regions, and the underlying mechanisms are discussed. It is found that the reverse-bias pn junction leakage of the drain/substrate is the main component of the off-state drain leakage current, which is generation-current dominated in the low temperature regions and is diffusion-current dominated in the high temperature regions. Methods to further reduce the off-state drain leakage current are given. Project supported by the National Basic Research Program of China (Grant No. 2011CBA00602) and the National Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. 2011ZX02708-002).

  14. Anisotropy of piezoresistance in n-channel inversion layers of metal-oxide-semiconductor transistors on (001)Si

    NASA Astrophysics Data System (ADS)

    Maruyama, T.; Zaima, S.; Koide, Y.; Kanda, Y.; Yasuda, Y.

    1990-12-01

    The crystallographic orientation dependence of piezoresistance of n-channel inversion layers in metal-oxide-semiconductor field-effect transistors on p-type (001)Si has been studied by using a diaphragm at room temperature. The experimental results have been compared with self-consistent calculations based on a surface quantization effect. The main feature of the crystallographic orientation dependence can be explained by an electron repopulation effect induced by applied strain and an effective mass anisotropy. It can be found that the difference between longitudinal and transverse piezoresistance in the devices nearly along the [110] directions is mainly due to an orthorhombic distortion of Si, and the shear deformation coefficients Ξu is determined to be 5.8 eV from comparing the experimental results with the calculated ones. An expression of the shear piezoresistance component π44 is also derived.

  15. A compact quantum correction model for symmetric double gate metal-oxide-semiconductor field-effect transistor

    SciTech Connect

    Cho, Edward Namkyu; Shin, Yong Hyeon; Yun, Ilgu

    2014-11-07

    A compact quantum correction model for a symmetric double gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is investigated. The compact quantum correction model is proposed from the concepts of the threshold voltage shift (ΔV{sub TH}{sup QM}) and the gate capacitance (C{sub g}) degradation. First of all, ΔV{sub TH}{sup QM} induced by quantum mechanical (QM) effects is modeled. The C{sub g} degradation is then modeled by introducing the inversion layer centroid. With ΔV{sub TH}{sup QM} and the C{sub g} degradation, the QM effects are implemented in previously reported classical model and a comparison between the proposed quantum correction model and numerical simulation results is presented. Based on the results, the proposed quantum correction model can be applicable to the compact model of DG MOSFET.

  16. GaN-Based Trench Gate Metal Oxide Semiconductor Field-Effect Transistor Fabricated with Novel Wet Etching

    NASA Astrophysics Data System (ADS)

    Kodama, Masahito; Sugimoto, Masahiro; Hayashi, Eiko; Soejima, Narumasa; Ishiguro, Osamu; Kanechika, Masakazu; Itoh, Kenji; Ueda, Hiroyuki; Uesugi, Tsutomu; Kachi, Tetsu

    2008-02-01

    A novel method for fabricating trench structures on GaN was developed. A smooth non-polar (1100) plane was obtained by wet etching using tetramethylammonium hydroxide (TMAH) as the etchant. A U-shape trench with the (1100) plane side walls was formed with dry etching and the TMAH wet etching. A U-shape trench gate metal oxide semiconductor field-effect transistor (MOSFET) was also fabricated using the novel etching technology. This device has the excellent normally-off operation of drain current-gate voltage characteristics with the threshold voltage of 10 V. The drain breakdown voltage of 180 V was obtained. The results indicate that the trench gate structure can be applied to GaN-based transistors.

  17. Experimental study on vertical scaling of InAs-on-insulator metal-oxide-semiconductor field-effect transistors

    SciTech Connect

    Kim, SangHyeon E-mail: sh-kim@kist.re.kr; Yokoyama, Masafumi; Nakane, Ryosho; Takenaka, Mitsuru; Takagi, Shinichi; Ichikawa, Osamu; Osada, Takenori; Hata, Masahiko

    2014-06-30

    We have investigated effects of the vertical scaling on electrical properties in extremely thin-body InAs-on-insulator (-OI) metal-oxide-semiconductor field-effect transistors (MOSFETs). It is found that the body thickness (T{sub body}) scaling provides better short channel effect (SCE) control, whereas the T{sub body} scaling also causes the reduction of the mobility limited by channel thickness fluctuation (δT{sub body}) scattering (μ{sub fluctuation}). Also, in order to achieve better SCEs control, the thickness of InAs channel layer (T{sub channel}) scaling is more favorable than the thickness of MOS interface buffer layer (T{sub buffer}) scaling from a viewpoint of a balance between SCEs control and μ{sub fluctuation} reduction. These results indicate necessity of quantum well channel structure in InAs-OI MOSFETs and these should be considered in future transistor design.

  18. Impedance analysis of Al{sub 2}O{sub 3}/H-terminated diamond metal-oxide-semiconductor structures

    SciTech Connect

    Liao, Meiyong; Liu, Jiangwei; Imura, Masataka; Koide, Yasuo; Sang, Liwen; Coathup, David; Li, Jiangling; Ye, Haitao

    2015-02-23

    Impedance spectroscopy (IS) analysis is carried out to investigate the electrical properties of the metal-oxide-semiconductor (MOS) structure fabricated on hydrogen-terminated single crystal diamond. The low-temperature atomic layer deposition Al{sub 2}O{sub 3} is employed as the insulator in the MOS structure. By numerically analysing the impedance of the MOS structure at various biases, the equivalent circuit of the diamond MOS structure is derived, which is composed of two parallel capacitive and resistance pairs, in series connection with both resistance and inductance. The two capacitive components are resulted from the insulator, the hydrogenated-diamond surface, and their interface. The physical parameters such as the insulator capacitance are obtained, circumventing the series resistance and inductance effect. By comparing the IS and capacitance-voltage measurements, the frequency dispersion of the capacitance-voltage characteristic is discussed.

  19. Electrical Characterization of Metal-Oxide-Semiconductor Memory Devices with High-Density Self-Assembled Tungsten Nanodots

    NASA Astrophysics Data System (ADS)

    Pei, Yan-Li; Fukushima, Takafumi; Tanaka, Tetsu; Koyanagi, Mitsumasa

    2008-04-01

    Tungsten nanodots (W-NDs) with an ultrahigh density of 1×1013/cm2 and a small size of around of 1.5-2 nm were successfully formed by self-assembled nanodot deposition (SAND). A metal-oxide-semiconductor (MOS) memory device was also fabricated with a W-ND layer placed between tunneling SiO2 and block SiO2. Using this device, the effects of annealing on the capacitance characteristics were investigated in detail. After 900 °C post deposition annealing (PDA), an extremely large memory window of about 9.2 V was obtained, indicating that the device is a strong contender for future nonvolatile memory (NVM) applications. The program/erase speed and retention characteristics were also evaluated. The oxidation of tungsten by oxygen from the cosputtered silicon oxide was confirmed by X-ray photoelectron spectroscopy (XPS) measurement. It is considered to degrade the retention characteristics of MOS memory devices.

  20. An ultrasensitive method of real time pH monitoring with complementary metal oxide semiconductor image sensor.

    PubMed

    Devadhasan, Jasmine Pramila; Kim, Sanghyo

    2015-02-01

    CMOS sensors are becoming a powerful tool in the biological and chemical field. In this work, we introduce a new approach on quantifying various pH solutions with a CMOS image sensor. The CMOS image sensor based pH measurement produces high-accuracy analysis, making it a truly portable and user friendly system. pH indicator blended hydrogel matrix was fabricated as a thin film to the accurate color development. A distinct color change of red, green and blue (RGB) develops in the hydrogel film by applying various pH solutions (pH 1-14). The semi-quantitative pH evolution was acquired by visual read out. Further, CMOS image sensor absorbs the RGB color intensity of the film and hue value converted into digital numbers with the aid of an analog-to-digital converter (ADC) to determine the pH ranges of solutions. Chromaticity diagram and Euclidean distance represent the RGB color space and differentiation of pH ranges, respectively. This technique is applicable to sense the various toxic chemicals and chemical vapors by situ sensing. Ultimately, the entire approach can be integrated into smartphone and operable with the user friendly manner. PMID:25597802

  1. Soft breakdown characteristics of ultralow-k time-dependent dielectric breakdown for advanced complementary metal-oxide semiconductor technologies

    NASA Astrophysics Data System (ADS)

    Chen, Fen; Shinosky, Michael

    2010-09-01

    During technology development, the study of ultralow-k (ULK) time-dependent dielectric breakdown (TDDB) is important for assuring robust reliability. As the technology advances, the increase in ULK leakage current noise level and reversible current change induced by soft breakdown (SBD) during stress has been observed. In this paper, the physical origin of SBD and reversible breakdown, and its correlation to conventional hard breakdowns (HBDs) were extensively studied. Based on constant voltage stress (CVS) and constant current stress (CCS) results, it was concluded that SBD in ULK is an intrinsic characteristic for ULK material, and all first breakdown events most likely are soft instead of hard. Therefore, a unified understanding of SBD and HBD for low-k TDDB was established. Furthermore, the post-SBD and HBD breakdown conduction characteristics were explored and their impacts on circuit operation were discussed. Based on current limited constant voltage stress studies, it was found that the power dissipation, not the stored energy, determined the severity of ULK dielectric breakdown, and the postbreakdown conduction properties. A percolation-threshold controlled, variable-range-hopping (VRH) model was proposed to explain all postbreakdown aspects of SBD and HBD of ULK material.

  2. Thin Film Complementary Metal Oxide Semiconductor (CMOS) Device Using a Single-Step Deposition of the Channel Layer

    PubMed Central

    Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wang, Zhenwei; Hedhili, M. N.; Wang, Q. X.; Alshareef, H. N.

    2014-01-01

    We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n- and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350°C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications. PMID:24728223

  3. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    SciTech Connect

    Jovanović, B. E-mail: lionel.torres@lirmm.fr; Brum, R. M.; Torres, L.

    2014-04-07

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  4. Modeling the dark current histogram induced by gold contamination in complementary-metal-oxide-semiconductor image sensors

    SciTech Connect

    Domengie, F. Morin, P.; Bauza, D.

    2015-07-14

    We propose a model for dark current induced by metallic contamination in a CMOS image sensor. Based on Shockley-Read-Hall kinetics, the expression of dark current proposed accounts for the electric field enhanced emission factor due to the Poole-Frenkel barrier lowering and phonon-assisted tunneling mechanisms. To that aim, we considered the distribution of the electric field magnitude and metal atoms in the depth of the pixel. Poisson statistics were used to estimate the random distribution of metal atoms in each pixel for a given contamination dose. Then, we performed a Monte-Carlo-based simulation for each pixel to set the number of metal atoms the pixel contained and the enhancement factor each atom underwent, and obtained a histogram of the number of pixels versus dark current for the full sensor. Excellent agreement with the dark current histogram measured on an ion-implanted gold-contaminated imager has been achieved, in particular, for the description of the distribution tails due to the pixel regions in which the contaminant atoms undergo a large electric field. The agreement remains very good when increasing the temperature by 15 °C. We demonstrated that the amplification of the dark current generated for the typical electric fields encountered in the CMOS image sensors, which depends on the nature of the metal contaminant, may become very large at high electric field. The electron and hole emissions and the resulting enhancement factor are described as a function of the trap characteristics, electric field, and temperature.

  5. Characterization of near-terahertz complementary metal-oxide semiconductor circuits using a Fourier-transform interferometer

    SciTech Connect

    Arenas, D. J.; Shim, Dongha; Koukis, D. I.; Seok, Eunyoung; Tanner, D. B.; O, Kenneth K.

    2011-10-24

    Optical methods for measuring of the emission spectra of oscillator circuits operating in the 400-600 GHz range are described. The emitted power from patch antennas included in the circuits is measured by placing the circuit in the source chamber of a Fourier-transform interferometric spectrometer. The results show that this optical technique is useful for measuring circuits pushing the frontier in operating frequency. The technique also allows the characterization of the circuit by measuring the power radiated in the fundamental and in the harmonics. This capability is useful for oscillator architectures designed to cancel the fundamental and use higher harmonics. The radiated power was measured using two techniques: direct measurement of the power by placing the device in front of a bolometer of known responsivity, and by comparison to the estimated power from blackbody sources. The latter technique showed that these circuits have higher emission than blackbody sources at the operating frequencies, and, therefore, offer potential spectroscopy applications.

  6. Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer.

    PubMed

    Nayak, Pradipta K; Caraveo-Frescas, J A; Wang, Zhenwei; Hedhili, M N; Wang, Q X; Alshareef, H N

    2014-01-01

    We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n- and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350 °C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications. PMID:24728223

  7. Modeling the dark current histogram induced by gold contamination in complementary-metal-oxide-semiconductor image sensors

    NASA Astrophysics Data System (ADS)

    Domengie, F.; Morin, P.; Bauza, D.

    2015-07-01

    We propose a model for dark current induced by metallic contamination in a CMOS image sensor. Based on Shockley-Read-Hall kinetics, the expression of dark current proposed accounts for the electric field enhanced emission factor due to the Poole-Frenkel barrier lowering and phonon-assisted tunneling mechanisms. To that aim, we considered the distribution of the electric field magnitude and metal atoms in the depth of the pixel. Poisson statistics were used to estimate the random distribution of metal atoms in each pixel for a given contamination dose. Then, we performed a Monte-Carlo-based simulation for each pixel to set the number of metal atoms the pixel contained and the enhancement factor each atom underwent, and obtained a histogram of the number of pixels versus dark current for the full sensor. Excellent agreement with the dark current histogram measured on an ion-implanted gold-contaminated imager has been achieved, in particular, for the description of the distribution tails due to the pixel regions in which the contaminant atoms undergo a large electric field. The agreement remains very good when increasing the temperature by 15 °C. We demonstrated that the amplification of the dark current generated for the typical electric fields encountered in the CMOS image sensors, which depends on the nature of the metal contaminant, may become very large at high electric field. The electron and hole emissions and the resulting enhancement factor are described as a function of the trap characteristics, electric field, and temperature.

  8. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    NASA Astrophysics Data System (ADS)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-04-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  9. Image stacking approach to increase sensitivity of fluorescence detection using a low cost complementary metal-oxide-semiconductor (CMOS) webcam.

    PubMed

    Balsam, Joshua; Bruck, Hugh Alan; Kostov, Yordan; Rasooly, Avraham

    2012-01-01

    Optical technologies are important for biological analysis. Current biomedical optical analyses rely on high-cost, high-sensitivity optical detectors such as photomultipliers, avalanched photodiodes or cooled CCD cameras. In contrast, Webcams, mobile phones and other popular consumer electronics use lower-sensitivity, lower-cost optical components such as photodiodes or CMOS sensors. In order for consumer electronics devices, such as webcams, to be useful for biomedical analysis, they must have increased sensitivity. We combined two strategies to increase the sensitivity of CMOS-based fluorescence detector. We captured hundreds of low sensitivity images using a Webcam in video mode, instead of a single image typically used in cooled CCD devices.We then used a computational approach consisting of an image stacking algorithm to remove the noise by combining all of the images into a single image. While video mode is widely used for dynamic scene imaging (e.g. movies or time-lapse photography), it is not used to capture a single static image, which removes noise and increases sensitivity by more than thirty fold. The portable, battery-operated Webcam-based fluorometer system developed here consists of five modules: (1) a low cost CMOS Webcam to monitor light emission, (2) a plate to perform assays, (3) filters and multi-wavelength LED illuminator for fluorophore excitation, (4) a portable computer to acquire and analyze images, and (5) image stacking software for image enhancement. The samples consisted of various concentrations of fluorescein, ranging from 30 μM to 1000 μM, in a 36-well miniature plate. In the single frame mode, the fluorometer's limit-of-detection (LOD) for fluorescein is ∼1000 μM, which is relatively insensitive. However, when used in video mode combined with image stacking enhancement, the LOD is dramatically reduced to 30 μM, sensitivity which is similar to that of state-of-the-art ELISA plate photomultiplier-based readers. Numerous medical diagnostics assays rely on optical and fluorescence readers. Our novel combination of detection technologies, which is new to biodetection may enable the development of new low cost optical detectors based on an inexpensive Webcam (<$10). It has the potential to form the basis for high sensitivity, low cost medical diagnostics in resource-poor settings. PMID:23990697

  10. Design and evaluation of basic standard encryption algorithm modules using nanosized complementary metal oxide semiconductor molecular circuits

    NASA Astrophysics Data System (ADS)

    Masoumi, Massoud; Raissi, Farshid; Ahmadian, Mahmoud; Keshavarzi, Parviz

    2006-01-01

    We are proposing that the recently proposed semiconductor-nanowire-molecular architecture (CMOL) is an optimum platform to realize encryption algorithms. The basic modules for the advanced encryption standard algorithm (Rijndael) have been designed using CMOL architecture. The performance of this design has been evaluated with respect to chip area and speed. It is observed that CMOL provides considerable improvement over implementation with regular CMOS architecture even with a 20% defect rate. Pseudo-optimum gate placement and routing are provided for Rijndael building blocks and the possibility of designing high speed, attack tolerant and long key encryptions are discussed.

  11. Characterization of near-terahertz complementary metal-oxide semiconductor circuits using a Fourier-transform interferometer.

    PubMed

    Arenas, D J; Shim, Dongha; Koukis, D I; Seok, Eunyoung; Tanner, D B; O, Kenneth K

    2011-10-01

    Optical methods for measuring of the emission spectra of oscillator circuits operating in the 400-600 GHz range are described. The emitted power from patch antennas included in the circuits is measured by placing the circuit in the source chamber of a Fourier-transform interferometric spectrometer. The results show that this optical technique is useful for measuring circuits pushing the frontier in operating frequency. The technique also allows the characterization of the circuit by measuring the power radiated in the fundamental and in the harmonics. This capability is useful for oscillator architectures designed to cancel the fundamental and use higher harmonics. The radiated power was measured using two techniques: direct measurement of the power by placing the device in front of a bolometer of known responsivity, and by comparison to the estimated power from blackbody sources. The latter technique showed that these circuits have higher emission than blackbody sources at the operating frequencies, and, therefore, offer potential spectroscopy applications. PMID:22047279

  12. Characterization of near-terahertz complementary metal-oxide semiconductor circuits using a Fourier-transform interferometer

    DOE PAGESBeta

    Arenas, D. J.; Shim, Dongha; Koukis, D. I.; Seok, Eunyoung; Tanner, D. B.; O, Kenneth K.

    2011-10-24

    Optical methods for measuring of the emission spectra of oscillator circuits operating in the 400-600 GHz range are described. The emitted power from patch antennas included in the circuits is measured by placing the circuit in the source chamber of a Fourier-transform interferometric spectrometer. The results show that this optical technique is useful for measuring circuits pushing the frontier in operating frequency. The technique also allows the characterization of the circuit by measuring the power radiated in the fundamental and in the harmonics. This capability is useful for oscillator architectures designed to cancel the fundamental and use higher harmonics. Themore » radiated power was measured using two techniques: direct measurement of the power by placing the device in front of a bolometer of known responsivity, and by comparison to the estimated power from blackbody sources. The latter technique showed that these circuits have higher emission than blackbody sources at the operating frequencies, and, therefore, offer potential spectroscopy applications.« less

  13. Biodegradable elastomers and silicon nanomembranes/nanoribbons for stretchable, transient electronics, and biosensors.

    PubMed

    Hwang, Suk-Won; Lee, Chi Hwan; Cheng, Huanyu; Jeong, Jae-Woong; Kang, Seung-Kyun; Kim, Jae-Hwan; Shin, Jiho; Yang, Jian; Liu, Zhuangjian; Ameer, Guillermo A; Huang, Yonggang; Rogers, John A

    2015-05-13

    Transient electronics represents an emerging class of technology that exploits materials and/or device constructs that are capable of physically disappearing or disintegrating in a controlled manner at programmed rates or times. Inorganic semiconductor nanomaterials such as silicon nanomembranes/nanoribbons provide attractive choices for active elements in transistors, diodes and other essential components of overall systems that dissolve completely by hydrolysis in biofluids or groundwater. We describe here materials, mechanics, and design layouts to achieve this type of technology in stretchable configurations with biodegradable elastomers for substrate/encapsulation layers. Experimental and theoretical results illuminate the mechanical properties under large strain deformation. Circuit characterization of complementary metal-oxide-semiconductor inverters and individual transistors under various levels of applied loads validates the design strategies. Examples of biosensors demonstrate possibilities for stretchable, transient devices in biomedical applications. PMID:25706246

  14. Low-Temperature Solution Processing of Amorphous Metal Oxide Semiconductors for High-Performance Thin-Film Transistors

    NASA Astrophysics Data System (ADS)

    Hennek, Jonathan W.

    The growing field of large-area flexible electronics presents the need for amorphous materials with electrical performances superior to amorphous hydrogenated silicon (a-Si:H). Metal oxide semiconductors show great promise in thin film transistors (TFTs) due to their high electron mobility (micro, 1--100 cm2V-1s-1), mechanical flexibility, and electrical stability. However, most oxide semiconductor fabrication still relies on expensive, inflexible and energy intensive vacuum deposition methods. To overcome these limitations, my thesis work has focused on developing low-temperature solution processing routes to functional metal oxide materials. In Chapter 2, we demonstrate an optimized "ink" and printing process for inkjet patterning of amorphous indium gallium zinc oxide (a-IGZO) and investigate the effects of device structure on derived electron mobility. Bottom-gate top-contact (BGTC) TFTs are fabricated and shown to exhibit electron mobilities comparable to a-Si:H. Furthermore, a record micro of 2.5 cm 2V-1s-1 is demonstrated for bottom-gate bottom-contact (BGBC) TFTs. The mechanism underlying such impressive performance is investigated using transmission line techniques, and it is shown that the semiconductor-source/drain electrode interface contact resistance is nearly an order of magnitude lower for BGBC transistors versus BGTC devices. In Chapter 3, we report the implementation of amorphous indium yttrium oxide (a-IYO) as a TFT semiconductor for the first time. Amorphous and polycrystalline IYO films are grown via a low-temperature solution process utilizing exothermic "combustion" precursors. Precursor transformation and the IYO films are analyzed by DTA, TGA, XRD, AFM, XPS, and optical transmission, revealing efficient conversion to the metal-oxide lattice, and smooth, transparent films. a-IYO TFTs fabricated with a hybrid nanodielectric exhibit impressive electron mobilities of 7.3 cm2V-1s-1 (Tanneal = 300 °C) and 5.0 cm2V-1s -1 (Tanneal = 250 °C) for 2

  15. Electroluminescence from metal-oxide-semiconductor devices with erbium-doped CeO{sub 2} films on silicon

    SciTech Connect

    Lv, Chunyan; Zhu, Chen; Wang, Canxing; Gao, Yuhan; Ma, Xiangyang Yang, Deren

    2015-04-06

    We report on erbium (Er)-related electroluminescence (EL) in the visible and near-infrared (NIR) from metal-oxide-semiconductor (MOS) devices with Er-doped CeO{sub 2} (CeO{sub 2}:Er) films on silicon. The onset voltage of such EL under either forward or reverse bias is smaller than 10 V. Moreover, the EL quenching can be avoidable for the CeO{sub 2}:Er-based MOS devices. Analysis on the current-voltage characteristic of the device indicates that the electron transportation at the EL-enabling voltages under either forward or reverse bias is dominated by trap-assisted tunneling mechanism. Namely, electrons in n{sup +}-Si/ITO can tunnel into the conduction band of CeO{sub 2} host via defect states at sufficiently high forward/reverse bias voltages. Then, a fraction of such electrons are accelerated by electric field to become hot electrons, which impact-excite the Er{sup 3+} ions, thus leading to characteristic emissions. It is believed that this work has laid the foundation for developing viable silicon-based emitters using CeO{sub 2}:Er films.

  16. Quantum Mechanical Effects on the Threshold Voltage of Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Hu, Guang-Xi; Liu, Ran; Qiu, Zhi-Jun; Wang, Ling-Li; Tang, Ting-Ao

    2010-03-01

    A model for a metal-oxide-semiconductor field-effect transistor (MOSFET) with a double gate (DG) is developed. Quantum mechanical effects on the threshold voltage (VTH) are modeled and investigated analytically. The analytic model shows how VTH is increased with quantum mechanical effect. The model is applicable to both symmetric DG (SDG) and asymmetric DG (ADG) nMOSFETs, and is also applicable to both doped and undoped DG nMOSFETs. The analytic results are verified by comparing with the results obtained from simulations using Schred, and good agreement is observed. The VTH of an ADG nMOSFET will shift more than that of an SDG nMOSFET, and the VTH of a DG transistor with (110)-silicon (Si) orientation will shift more than that of a DG transistor with (100)-Si orientation. When the silicon thickness tsi < 3 nm, the VTH shift will be significant, and one should be careful in the use of an extremely thin silicon body. When the body doping density (NA) is not high (<1018 cm-3), the VTH shift is almost the same for different NA. When NA > 1018 cm-3, the higher the NA, the more the VTH shift.

  17. Capacitance-voltage characteristics of Si and Ge nanomembrane based flexible metal-oxide-semiconductor devices under bending conditions

    NASA Astrophysics Data System (ADS)

    Cho, Minkyu; Seo, Jung-Hun; Park, Dong-Wook; Zhou, Weidong; Ma, Zhenqiang

    2016-06-01

    Metal-oxide-semiconductor (MOS) device is the basic building block for field effect transistors (FET). The majority of thin-film transistors (TFTs) are FETs. When MOSFET are mechanically bent, the MOS structure will be inevitably subject to mechanical strain. In this paper, flexible MOS devices using single crystalline Silicon (Si) and Germanium (Ge) nanomembranes (NM) with SiO2, SiO, and Al2O3 dielectric layers are fabricated on a plastic substrate. The relationships between semiconductor nanomembranes and various oxide materials are carefully investigated under tensile/compressive strain. The flatband voltage, threshold voltage, and effective charge density in various MOS combinations revealed that Si NM-SiO2 configuration shows the best interface charge behavior, while Ge NM-Al2O3 shows the worst. This investigation of flexible MOS devices can help us understand the impact of charges in the active region of the flexible TFTs and capacitance changes under the tensile/compressive strains on the change in electrical characteristics in flexible NM based TFTs.

  18. Theoretical Study of Triboelectric-Potential Gated/Driven Metal-Oxide-Semiconductor Field-Effect Transistor.

    PubMed

    Peng, Wenbo; Yu, Ruomeng; He, Yongning; Wang, Zhong Lin

    2016-04-26

    Triboelectric nanogenerator has drawn considerable attentions as a potential candidate for harvesting mechanical energies in our daily life. By utilizing the triboelectric potential generated through the coupling of contact electrification and electrostatic induction, the "tribotronics" has been introduced to tune/control the charge carrier transport behavior of silicon-based metal-oxide-semiconductor field-effect transistor (MOSFET). Here, we perform a theoretical study of the performances of tribotronic MOSFET gated by triboelectric potential in two working modes through finite element analysis. The drain-source current dependence on contact-electrification generated triboelectric charges, gap separation distance, and externally applied bias are investigated. The in-depth physical mechanism of the tribotronic MOSFET operations is thoroughly illustrated by calculating and analyzing the charge transfer process, voltage relationship to gap separation distance, and electric potential distribution. Moreover, a tribotronic MOSFET working concept is proposed, simulated and studied for performing self-powered FET and logic operations. This work provides a deep understanding of working mechanisms and design guidance of tribotronic MOSFET for potential applications in micro/nanoelectromechanical systems (MEMS/NEMS), human-machine interface, flexible electronics, and self-powered active sensors. PMID:27077327

  19. A theoretical and experimental evaluation of surface roughness variation in trigate metal oxide semiconductor field effect transistors

    NASA Astrophysics Data System (ADS)

    Hsieh, E. R.; Chung, Steve S.

    2016-05-01

    A gate current variation measurement method is proposed to examine the surface roughness of metal oxide semiconductor field effect transistors (MOSFETs). This gate current variation is demonstrated on the trigate structure MOSFETs. It was found that the standard deviation of oxide-thickness is proportional to the inverse of square-root of device areas, and its slope is defined as the effective surface roughness variation. In particular, for the transistors with varying fin height, this surface roughness effect aggravates with the increasing fin height. More importantly, the gate leakage at off-state, i.e., Vg = 0 V, is strongly dependent on the gate dielectric surface roughness and dominates the drain current variations. This gate leakage may serve as a quality measure of a low power and energy efficient integrated circuit, especially for the transistor with 3-dimensional gate structure. The present results provide us better understandings on an additional source of Vth fluctuations, i.e., the surface roughness variation, in addition to the random dopant fluctuation, that we are usually not noticed. In particular, this study also provides us a simple easy-to-use method for the monitoring of oxide quality in the volume production of trigate MOSFETs.

  20. Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

    NASA Astrophysics Data System (ADS)

    Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

    2015-10-01

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

  1. Possible unified model for the Hooge parameter in inversion-layer-channel metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Omura, Yasuhisa

    2013-06-01

    This paper proposes a possible unified model for the Hooge parameter by considering the impact of transport dimensionality on the Hooge parameter behavior of various inversion-layer-channel metal-oxide-semiconductor field-effect transistors. Past experiments show that the Hooge parameter has a couple of peculiar behaviors. Based on a phenomenological consideration, the original mobility-based model for the Hooge parameter is shown to provide only a partial understanding of the results. It is also observed that, in contrast to past models, the interpretation of some aspects of the Hooge parameter strongly depends on how the two fluctuation modes, the carrier-density fluctuation and the mobility fluctuation, correlate. The phenomenological model proposed here gives a fundamental physical basis that allows important aspects of the Hooge parameter to be interpreted; the model also introduces three basic parameters (the Hooge parameter elements for the carrier-density fluctuation, the mobility fluctuation, and the cross-correlation component). Theoretical expressions for the three basic Hooge parameters are given by merging the fundamental Hooge model, Handel's theory, statistical physics, and quantum-mechanical transport physics. The gate voltage dependence of the Hooge parameter can be explained reasonably well by stating that the screening length rules the dielectric function and that the mobility fluctuation and carrier density fluctuation are correlated. Finally, the theoretical models are examined against the results of past experiments.

  2. Analytic Circuit Model of Ballistic Nanowire Metal-Oxide-Semiconductor Field-Effect Transistor for Transient Analysis

    NASA Astrophysics Data System (ADS)

    Numata, Tatsuhiro; Uno, Shigeyasu; Kamakura, Yoshinari; Mori, Nobuya; Nakazato, Kazuo

    2013-04-01

    A fully analytic and explicit model of device properties in the ballistic transport in gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed, which enables circuit simulations. The electrostatic potential distribution in the wire cross section is approximated by a parabolic function. Using the applied potential, the energy levels of electrons are analytically obtained in terms of a single unknown parameter by perturbation theory. Ballistic current is obtained in terms of an unknown parameter using the analytic expression of the electron energy level and the current equation for ballistic transport. We analytically derive the parameter with a one-of-a-kind approximate methodology. With the obtained parameter, the fully analytic and explicit model of device properties such as energy levels, ballistic current, and effective capacitance is derived with satisfactory accuracy compared with the numerical simulation results. Finally, we perform a transient simulation using a circuit simulator, introducing our model to it as a Verilog-A script.

  3. A silicon metal-oxide-semiconductor field-effect transistor Hall bar for scanning Hall probe microscopy.

    PubMed

    Yamaguchi, Akinobu; Saito, Hiromasa; Shimizu, Masayoshi; Miyajima, Hideki; Matsumoto, Satoru; Nakamura, Yoshiharu; Hirohata, Atsufumi

    2008-08-01

    We demonstrate successful operation of a scanning Hall probe microscope with a few micron-size resolution by using a silicon metal-oxide semiconductor field-effect transistor (Si-MOSFET) Hall bar, which is designed to improve not only the mechanical strength but also the temperature stability. The Si-MOSFET micro-Hall probe is cheaper than the current micro-Hall probes and is found to be as sensitive as a micro-Hall probe with GaAs/AlGaAs heterostructure or an epitaxial InSb two-dimensional electron gas. This was used to magnetically image the surface of a Sm(2)Co(17) permanent magnet during the magnetization reversal process as a function of an external magnetic field below 1.5 T. This revealed firm evidence of the presence of the inverse magnetic seed as theoretically predicted earlier. Magnetically pinned centers, with a typical size 80 mum, are observed to persist even under a high magnetic field, clearly indicating the robustness of the Si Hall probe against the field application as well as the repetition of the measurement. PMID:19044353

  4. Effect of proton irradiation energy on AlGaN/GaN metal-oxide semiconductor high electron mobility transistors

    DOE PAGESBeta

    Ahn, S.; Dong, C.; Zhu, W.; Kim, B. -j.; Hwang, Ya-Hsi; Ren, F.; Pearton, S. J.; Yang, Gwangseok; Kim, J.; Patrick, Erin; et al

    2015-08-18

    The effects of proton irradiation energy on dc characteristics of AlGaN/GaN metal-oxide semiconductor high electron mobility transistors (MOSHEMTs) using Al2O3 as the gate dielectric were studied. Al2O3/AlGaN/GaN MOSHEMTs were irradiated with a fixed proton dose of 5 × 1015 cm-2 at different energies of 5, 10, or 15 MeV. More degradation of the device dc characteristics was observed for lower irradiation energy due to the larger amount of nonionizing energy loss in the active region of the MOSHEMTs under these conditions. The reductions in saturation current were 95.3%, 68.3%, and 59.8% and reductions in maximum transconductance were 88%, 54.4%, andmore » 40.7% after 5, 10, and 15 MeV proton irradiation, respectively. Both forward and reverse gate leakage current were reduced more than one order of magnitude after irradiation. The carrier removal rates for the irradiation energies employed in this study were in the range of 127–289 cm-1. These are similar to the values reported for conventional metal-gate high-electron mobility transistors under the same conditions and show that the gate dielectric does not affect the response to proton irradiation for these energies.« less

  5. Electroluminescence from metal-oxide-semiconductor devices with erbium-doped CeO2 films on silicon

    NASA Astrophysics Data System (ADS)

    Lv, Chunyan; Zhu, Chen; Wang, Canxing; Gao, Yuhan; Ma, Xiangyang; Yang, Deren

    2015-04-01

    We report on erbium (Er)-related electroluminescence (EL) in the visible and near-infrared (NIR) from metal-oxide-semiconductor (MOS) devices with Er-doped CeO2 (CeO2:Er) films on silicon. The onset voltage of such EL under either forward or reverse bias is smaller than 10 V. Moreover, the EL quenching can be avoidable for the CeO2:Er-based MOS devices. Analysis on the current-voltage characteristic of the device indicates that the electron transportation at the EL-enabling voltages under either forward or reverse bias is dominated by trap-assisted tunneling mechanism. Namely, electrons in n+-Si/ITO can tunnel into the conduction band of CeO2 host via defect states at sufficiently high forward/reverse bias voltages. Then, a fraction of such electrons are accelerated by electric field to become hot electrons, which impact-excite the Er3+ ions, thus leading to characteristic emissions. It is believed that this work has laid the foundation for developing viable silicon-based emitters using CeO2:Er films.

  6. Characteristics of drain-modulated generation current in n-type metal-oxide-semiconductor field-effect transistor

    NASA Astrophysics Data System (ADS)

    Chen, Hai-Feng; Guo, Li-Xin; Zheng, Pu-Yang; Dong, Zhao; Zhang, Qian

    2015-07-01

    Drain-modulated generation current IDMG induced by interface traps in an n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) is investigated. The formation of IDMG ascribes to the change of the Si surface potential φ s. This change makes the channel suffer transformation from the inversion state, depletion I state to depletion II state. The simulation result agrees with the experiment in the inversion and depletion I states. In the depletion II state, the theoretical curve goes into saturation, while the experimental curve drops quickly as VD increases. The reason for this unconformity is that the drain-to-gate voltage VDG lessens φ s around the drain corner and controls the falling edge of the IDMG curve. The experiments of gate-modulated generation and recombination currents are also applied to verify the reasonability of the mechanism. Based on this mechanism, a theoretical model of the IDMG falling edge is set up in which IDMG has an exponential attenuation relation with VDG. Finally, the critical fitting coefficient t of the experimental curves is extracted. It is found that t = 80 mV = 3kT/q. This result fully shows the accuracy of the above mechanism. Project supported by the National Natural Science Foundation of China (Grant No. 61306131) and the Research Project of Education Department of Shaanxi Province, China (Grant No. 2013JK1095).

  7. On trapping mechanisms at oxide-traps in Al2O3/GaN metal-oxide-semiconductor capacitors

    NASA Astrophysics Data System (ADS)

    Bisi, D.; Chan, S. H.; Liu, X.; Yeluri, R.; Keller, S.; Meneghini, M.; Meneghesso, G.; Zanoni, E.; Mishra, U. K.

    2016-03-01

    By means of combined current-voltage and capacitance-voltage sweep and transient measurements, we present the effects of forward-bias stress and charge trapping mechanisms at oxide traps in Al2O3/GaN metal-oxide-semiconductor capacitors grown in-situ by metalorganic chemical vapor deposition. Two main current-voltage regimes have been identified: a low-field regime characterized by low gate-current and low flat-band voltage instabilities, and a high-field regime triggered for oxide field greater than 3.3 MV/cm and characterized by the onset of parasitic leakage current and positive flat-band shift. In the low-voltage regime, gate current transients convey stress/relaxation kinetics based on a power-law, suggesting that tunneling trapping mechanisms occur at near-interface traps aligned with the GaN conduction-band minimum. In the high-voltage regime, devices experience parasitic conduction mechanisms and enhanced charge-trapping at oxide-traps revealed by very slow recovery transients.

  8. Effects of forming gas anneal on ultrathin InGaAs nanowire metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Si, Mengwei; Gu, Jiangjiang J.; Wang, Xinwei; Shao, Jiayi; Li, Xuefei; Manfra, Michael J.; Gordon, Roy G.; Ye, Peide D.

    2013-03-01

    InGaAs gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs) with 6 nm nanowire thickness have been experimentally demonstrated at sub-80 nm channel length. The effects of forming gas anneal (FGA) on the performance of these devices have been systematically studied. The 30 min 400 °C FGA (4% H2/96% N2) is found to improve the quality of the Al2O3/InGaAs interface, resulting in a subthreshold slope reduction over 20 mV/dec (from 117 mV/dec in average to 93 mV/dec). Moreover, the improvement of interface quality also has positive impact on the on-state device performance. A scaling metrics study has been carried out for FGA treated devices with channel lengths down to 20 nm, indicating excellent gate electrostatic control. With the FGA passivation and the ultra-thin nanowire structure, InGaAs MOSFETs are promising for future logic applications.

  9. Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors

    NASA Astrophysics Data System (ADS)

    Lee, Minjoo L.; Fitzgerald, Eugene A.; Bulsara, Mayank T.; Currie, Matthew T.; Lochtefeld, Anthony

    2005-01-01

    This article reviews the history and current progress in high-mobility strained Si, SiGe, and Ge channel metal-oxide-semiconductor field-effect transistors (MOSFETs). We start by providing a chronological overview of important milestones and discoveries that have allowed heterostructures grown on Si substrates to transition from purely academic research in the 1980's and 1990's to the commercial development that is taking place today. We next provide a topical review of the various types of strain-engineered MOSFETs that can be integrated onto relaxed Si1-xGex, including surface-channel strained Si n- and p-MOSFETs, as well as double-heterostructure MOSFETs which combine a strained Si surface channel with a Ge-rich buried channel. In all cases, we will focus on the connections between layer structure, band structure, and MOS mobility characteristics. Although the surface and starting substrate are composed of pure Si, the use of strained Si still creates new challenges, and we shall also review the literature on short-channel device performance and process integration of strained Si. The review concludes with a global summary of the mobility enhancements available in the SiGe materials system and a discussion of implications for future technology generations.

  10. Ballistic graphene nanoribbon metal-oxide-semiconductor field-effect transistors: A full real-space quantum transport simulation

    NASA Astrophysics Data System (ADS)

    Liang, Gengchiau; Neophytou, Neophytos; Lundstrom, Mark S.; Nikonov, Dmitri E.

    2007-09-01

    A real-space quantum transport simulator for graphene nanoribbon (GNR) metal-oxide-semiconductor field-effect transistors (MOSFETs) has been developed and used to examine the ballistic performance of GNR MOSFETs. This study focuses on the impact of quantum effects on these devices and on the effect of different type of contacts. We found that two-dimensional (2D) semi-infinite graphene contacts produce metal-induced-gap states (MIGS) in the GNR channel. These states enhance quantum tunneling, particularly in short channel devices, they cause Fermi level pinning and degrade the device performance in both the ON-state and OFF-state. Devices with infinitely long contacts having the same width as the channel do not indicate MIGS. Even without MIGS quantum tunneling effects such as band-to-band tunneling still play an important role in the device characteristics and dominate the OFF-state current. This is accurately captured in our nonequilibrium Greens' function quantum simulations. We show that both narrow (1.4 nm width) and wider (1.8 nm width) GNRs with 12.5 nm channel length have the potential to outperform ultrascaled Si devices in terms of drive current capabilities and electrostatic control. Although their subthreshold swings under forward bias are better than in Si transistors, tunneling currents are important and prevent the achievement of the theoretical limit of 60 mV/dec.

  11. A Customized Metal Oxide Semiconductor-Based Gas Sensor Array for Onion Quality Evaluation: System Development and Characterization

    PubMed Central

    Konduru, Tharun; Rains, Glen C.; Li, Changying

    2015-01-01

    A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS) sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone), acetonitrile (nitrile), ethyl acetate (ester), and ethanol (alcohol). The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm) of methlypropyl sulfide and two concentrations (145 and 1452 ppm) of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage. PMID:25587975

  12. A customized metal oxide semiconductor-based gas sensor array for onion quality evaluation: system development and characterization.

    PubMed

    Konduru, Tharun; Rains, Glen C; Li, Changying

    2015-01-01

    A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS) sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone), acetonitrile (nitrile), ethyl acetate (ester), and ethanol (alcohol). The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm) of methlypropyl sulfide and two concentrations (145 and 1452 ppm) of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage. PMID:25587975

  13. High-frequency performances of superjunction laterally diffused metal-oxide-semiconductor transistors for RF power applications

    NASA Astrophysics Data System (ADS)

    Chen, Bo-Yuan; Chen, Kun-Ming; Chiu, Chia-Sung; Huang, Guo-Wei; Chang, Edward Yi

    2016-04-01

    This paper presents the dc and high-frequency performances of laterally diffused metal-oxide-semiconductor (LDMOS) transistors with superjunction (SJ) structures. The SJ-LDMOS transistors were fabricated using a 0.5-µm CMOS process. By utilizing a modified SJ/RESURF layout (Type I) or a tapered SJ layout (Type II) in our devices, better high-frequency performances and higher breakdown voltages are achieved compared with conventional SJ counterpart, owing to the suppression of the substrate-assisted depletion effect and the reduction of the drain resistance. For Type I device with an optimal SJ layout dimension, the cutoff frequency and the breakdown voltage are 3.7 GHz and 68 V, respectively. For Type II device with a smallest p-pillar width near the drain, they can be enhanced further and reach to 4.9 GHz and 83 V. These experimental results suggest that the SJ-LDMOS can be used in the RF power amplifiers.

  14. Nonvolatile and tunable switching of lateral photo-voltage triggered by laser and electric pulse in metal dusted metal-oxide-semiconductor structures.

    PubMed

    Zhou, Peiqi; Gan, Zhikai; Huang, Xu; Mei, Chunlian; Huang, Meizhen; Xia, Yuxing; Wang, Hui

    2016-01-01

    Owing to the innate stabilization of built-in potential in p-n junction or metal-oxide-semiconductor structure, the sensitivity and linearity of most lateral photovoltaic effect (LPE) devices is always fixed after fabrication. Here we report a nonvolatile and tunable switching effect of lateral photo-voltage (LPV) in Cu dusted ultrathin metal-oxide-semiconductor structure. With the stimulation of electric pulse and local illumination, the sensitivity and linearity of LPV can be adjusted up and down in a nonvolatile manner. This phenomenon is attributed to a controllable change of the Schottky barrier formed between the metal layer and silicon substrate, including the consequent change of film resistivity. This work may widely improve the performance of existing LPE-based devices and suggest new applications for LPE in other areas. PMID:27535351

  15. Nonvolatile and tunable switching of lateral photo-voltage triggered by laser and electric pulse in metal dusted metal-oxide-semiconductor structures

    PubMed Central

    Zhou, Peiqi; Gan, Zhikai; Huang, Xu; Mei, Chunlian; Huang, Meizhen; Xia, Yuxing; Wang, Hui

    2016-01-01

    Owing to the innate stabilization of built-in potential in p–n junction or metal-oxide-semiconductor structure, the sensitivity and linearity of most lateral photovoltaic effect (LPE) devices is always fixed after fabrication. Here we report a nonvolatile and tunable switching effect of lateral photo-voltage (LPV) in Cu dusted ultrathin metal-oxide-semiconductor structure. With the stimulation of electric pulse and local illumination, the sensitivity and linearity of LPV can be adjusted up and down in a nonvolatile manner. This phenomenon is attributed to a controllable change of the Schottky barrier formed between the metal layer and silicon substrate, including the consequent change of film resistivity. This work may widely improve the performance of existing LPE-based devices and suggest new applications for LPE in other areas. PMID:27535351

  16. Universal Relationship between Substrate Current and History Effect in Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Amakawa, Shuhei; Toda, Asato; Ohyama, Katsuroh; Higashiguchi, Naoya; Hori, Daisuke; Shintaku, Yasuhiro; Miyake, Masataka; Miura-Mattausch, Mitiko

    2011-04-01

    This paper presents an experimentally found device-size-independent universal relationship between the settling time of floating-body silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) and the substrate current in body-tied devices. Such a relationship could enable one to characterize dynamic properties of SOI MOSFETs through DC measurements and would be useful for physical compact modeling of history effects.

  17. Real-time, continuous, fluorescence sensing in a freely-moving subject with an implanted hybrid VCSEL/CMOS biosensor

    PubMed Central

    O’Sullivan, Thomas D.; Heitz, Roxana T.; Parashurama, Natesh; Barkin, David B.; Wooley, Bruce A.; Gambhir, Sanjiv S.; Harris, James S.; Levi, Ofer

    2013-01-01

    Performance improvements in instrumentation for optical imaging have contributed greatly to molecular imaging in living subjects. In order to advance molecular imaging in freely moving, untethered subjects, we designed a miniature vertical-cavity surface-emitting laser (VCSEL)-based biosensor measuring 1cm3 and weighing 0.7g that accurately detects both fluorophore and tumor-targeted molecular probes in small animals. We integrated a critical enabling component, a complementary metal-oxide semiconductor (CMOS) read-out integrated circuit, which digitized the fluorescence signal to achieve autofluorescence-limited sensitivity. After surgical implantation of the lightweight sensor for two weeks, we obtained continuous and dynamic fluorophore measurements while the subject was un-anesthetized and mobile. The technology demonstrated here represents a critical step in the path toward untethered optical sensing using an integrated optoelectronic implant. PMID:24009996

  18. Real-time, continuous, fluorescence sensing in a freely-moving subject with an implanted hybrid VCSEL/CMOS biosensor.

    PubMed

    O'Sullivan, Thomas D; Heitz, Roxana T; Parashurama, Natesh; Barkin, David B; Wooley, Bruce A; Gambhir, Sanjiv S; Harris, James S; Levi, Ofer

    2013-01-01

    Performance improvements in instrumentation for optical imaging have contributed greatly to molecular imaging in living subjects. In order to advance molecular imaging in freely moving, untethered subjects, we designed a miniature vertical-cavity surface-emitting laser (VCSEL)-based biosensor measuring 1cm(3) and weighing 0.7g that accurately detects both fluorophore and tumor-targeted molecular probes in small animals. We integrated a critical enabling component, a complementary metal-oxide semiconductor (CMOS) read-out integrated circuit, which digitized the fluorescence signal to achieve autofluorescence-limited sensitivity. After surgical implantation of the lightweight sensor for two weeks, we obtained continuous and dynamic fluorophore measurements while the subject was un-anesthetized and mobile. The technology demonstrated here represents a critical step in the path toward untethered optical sensing using an integrated optoelectronic implant. PMID:24009996

  19. Metal-oxide-semiconductor diodes containing C60 fullerenes for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Beckmeier, Daniel; Baumgärtner, Hermann

    2013-01-01

    For non-volatile memories, silicon-oxide-nitride-oxide-silicon or floating gate structures are used to store information by charging and discharging electronic states reversibly. In this article, we propose to replace the floating gate by C60 molecules. This would allow more defined programming voltages because of the discrete molecular energy levels and a higher resistance to tunneling oxide defects because of the weak electrical connection between the single molecules. Such C60 MOS diode structures are produced and their electrical properties are analyzed regarding current transport and charging mechanism of the molecules. To create the MOS structures, C60 molecules (5% of a monolayer) are evaporated onto a part of a clean silicon wafer and covered by amorphous silicon in situ in an ultra high vacuum system. Then the wafer is oxidized in wet atmosphere at just 710 °C through the C60 layer. The goal is to produce a clean oxide above and under the molecules without destroying them. Aluminum gate contacts are defined on top of these layers to perform complementary capacitance voltage (CV) and current voltage (IV) measurements. First, the gate voltage is swept to analyze the injection current, then CV measurements are performed after each sweep to analyze the charge state of the C60 layer and the oxide quality. Reference diodes without C60 on the same wafer show an identical Fowler-Nordheim (FN) tunneling behavior for currents injected from silicon or from aluminum, respectively. In the CV curves, no pronounced flatband voltage shift is observable. In diodes with C60, for negative gate voltages, a classical FN tunneling is observed and compared to theory. The electron injection from silicon shows a different tunneling current behavior. It starts at a lower electric field and has a smaller slope then a FN current would have. It is identified as a trap-assisted tunneling (TAT) current caused by oxidation-induced traps under the C60 layer. It is modeled by an

  20. Verification of the plan dosimetry for high dose rate brachytherapy using metal-oxide-semiconductor field effect transistor detectors

    SciTech Connect

    Qi Zhenyu; Deng Xiaowu; Huang Shaomin; Lu Jie; Lerch, Michael; Cutajar, Dean; Rosenfeld, Anatoly

    2007-06-15

    The feasibility of a recently designed metal-oxide-semiconductor field effect transistor (MOSFET) dosimetry system for dose verification of high dose rate (HDR) brachytherapy treatment planning was investigated. MOSFET detectors were calibrated with a 0.6 cm{sup 3} NE-2571 Farmer-type ionization chamber in water. Key characteristics of the MOSFET detectors, such as the energy dependence, that will affect phantom measurements with HDR {sup 192}Ir sources were measured. The MOSFET detector was then applied to verify the dosimetric accuracy of HDR brachytherapy treatments in a custom-made water phantom. Three MOSFET detectors were calibrated independently, with the calibration factors ranging from 0.187 to 0.215 cGy/mV. A distance dependent energy response was observed, significant within 2 cm from the source. The new MOSFET detector has a good reproducibility (<3%), small angular effect (<2%), and good dose linearity (R{sup 2}=1). It was observed that the MOSFET detectors had a linear response to dose until the threshold voltage reached approximately 24 V for {sup 192}Ir source measurements. Further comparison of phantom measurements using MOSFET detectors with dose calculations by a commercial treatment planning system for computed tomography-based brachytherapy treatment plans showed that the mean relative deviation was 2.2{+-}0.2% for dose points 1 cm away from the source and 2.0{+-}0.1% for dose points located 2 cm away. The percentage deviations between the measured doses and the planned doses were below 5% for all the measurements. The MOSFET detector, with its advantages of small physical size and ease of use, is a reliable tool for quality assurance of HDR brachytherapy. The phantom verification method described here is universal and can be applied to other HDR brachytherapy treatments.

  1. Design of nanophotonic, hot-electron solar-blind ultraviolet detectors with a metal-oxide-semiconductor structure

    NASA Astrophysics Data System (ADS)

    Wang, Zhiyuan; Wang, Xiaoxin; Liu, Jifeng

    2014-12-01

    Solar-blind ultraviolet (UV) detection refers to photon detection specifically in the wavelength range of 200 nm-320 nm. Without background noises from solar radiation, it has broad applications from homeland security to environmental monitoring. The most commonly used solid state devices for this application are wide band gap (WBG) semiconductor photodetectors (Eg > 3.5 eV). However, WBG semiconductors are difficult to grow and integrate with Si readout integrated circuits (ROICs). In this paper, we design a nanophotonic metal-oxide-semiconductor structure on Si for solar-blind UV detectors. Instead of using semiconductors as the active absorber, we use Sn nano-grating structures to absorb UV photons and generate hot electrons for internal photoemission across the Sn/SiO2 interfacial barrier, thereby generating photocurrent between the metal and the n-type Si region upon UV excitation. Moreover, the transported hot electron has an excess kinetic energy >3 eV, large enough to induce impact ionization and generate another free electron in the conduction band of n-Si. This process doubles the quantum efficiency. On the other hand, the large metal/oxide interfacial energy barrier (>3.5 eV) also enables solar-blind UV detection by blocking the less energetic electrons excited by visible photons. With optimized design, ˜75% UV absorption and hot electron excitation can be achieved within the mean free path of ˜20 nm from the metal/oxide interface. This feature greatly enhances hot electron transport across the interfacial barrier to generate photocurrent. The simple geometry of the Sn nano-gratings and the MOS structure make it easy to fabricate and integrate with Si ROICs compared to existing solar-blind UV detection schemes. The presented device structure also breaks through the conventional notion that photon absorption by metal is always a loss in solid-state photodetectors, and it can potentially be extended to other active metal photonic devices.

  2. Metal-oxide-semiconductor capacitors and Schottky diodes studied with scanning microwave microscopy at 18 GHz

    SciTech Connect

    Kasper, M.; Gramse, G.; Hoffmann, J.; Gaquiere, C.; Feger, R.; Stelzer, A.; Smoliner, J.; Kienberger, F.

    2014-11-14

    We measured the DC and RF impedance characteristics of micrometric metal-oxide-semiconductor (MOS) capacitors and Schottky diodes using scanning microwave microscopy (SMM). The SMM consisting of an atomic force microscopy (AFM) interfaced with a vector network analyser (VNA) was used to measure the reflection S11 coefficient of the metallic MOS and Schottky contact pads at 18 GHz as a function of the tip bias voltage. By controlling the SMM biasing conditions, the AFM tip was used to bias the Schottky contacts between reverse and forward mode. In reverse bias direction, the Schottky contacts showed mostly a change in the imaginary part of the admittance while in forward bias direction the change was mostly in the real part of the admittance. Reference MOS capacitors which are next to the Schottky diodes on the same sample were used to calibrate the SMM S11 data and convert it into capacitance values. Calibrated capacitance between 1–10 fF and 1/C{sup 2} spectroscopy curves were acquired on the different Schottky diodes as a function of the DC bias voltage following a linear behavior. Additionally, measurements were done directly with the AFM-tip in contact with the silicon substrate forming a nanoscale Schottky contact. Similar capacitance-voltage curves were obtained but with smaller values (30–300 aF) due to the corresponding smaller AFM-tip diameter. Calibrated capacitance images of both the MOS and Schottky contacts were acquired with nanoscale resolution at different tip-bias voltages.

  3. High-Resolution p-Type Metal Oxide Semiconductor Nanowire Array as an Ultrasensitive Sensor for Volatile Organic Compounds.

    PubMed

    Cho, Soo-Yeon; Yoo, Hae-Wook; Kim, Ju Ye; Jung, Woo-Bin; Jin, Ming Liang; Kim, Jong-Seon; Jeon, Hwan-Jin; Jung, Hee-Tae

    2016-07-13

    The development of high-performance volatile organic compound (VOC) sensor based on a p-type metal oxide semiconductor (MOS) is one of the important topics in gas sensor research because of its unique sensing characteristics, namely, rapid recovery kinetics, low temperature dependence, high humidity or thermal stability, and high potential for p-n junction applications. Despite intensive efforts made in this area, the applications of such sensors are hindered because of drawbacks related to the low sensitivity and slow response or long recovery time of p-type MOSs. In this study, the VOC sensing performance of a p-type MOS was significantly enhanced by forming a patterned p-type polycrystalline MOS with an ultrathin, high-aspect-ratio (∼25) structure (∼14 nm thickness) composed of ultrasmall grains (∼5 nm size). A high-resolution polycrystalline p-type MOS nanowire array with a grain size of ∼5 nm was fabricated by secondary sputtering via Ar(+) bombardment. Various p-type nanowire arrays of CuO, NiO, and Cr2O3 were easily fabricated by simply changing the sputtering material. The VOC sensor thus fabricated exhibited higher sensitivity (ΔR/Ra = 30 at 1 ppm hexane using NiO channels), as well as faster response or shorter recovery time (∼30 s) than that of previously reported p-type MOS sensors. This result is attributed to the high resolution and small grain size of p-type MOSs, which lead to overlap of fully charged zones; as a result, electrical properties are predominantly determined by surface states. Our new approach may be used as a route for producing high-resolution MOSs with particle sizes of ∼5 nm within a highly ordered, tall nanowire array structure. PMID:27304752

  4. P-Channel Lateral Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistor with Split N-Type Buried Layer for High Breakdown Voltage and Low Specific On-Resistance

    NASA Astrophysics Data System (ADS)

    Liaw, Chorng-Wei; Chang, Ching-Hung; Lin, Ming-Jang; King, Ya-Ching; Hsu, Charles Ching-Hsiang; Lin, Chrong Jung

    2007-07-01

    Many high voltage complementary metal-oxide-semiconductor (HV-CMOS) processes are modified from a standard 5 V CMOS process by adding an N-type heavily doped layer under the P-well of a HV-PMOS drain terminal to isolate a high voltage P-well from a grounded P-substrate. The limitation of breakdown voltage is dominated by P-well concentration and junction depth. For designing a certain breakdown voltage (\\mathit{BV}dss) for a HV-PMOS, the original 5 V CMOS P-well concentration should be decreased, which could degrade 5 V CMOS characteristics, such as NMOS punch through and latch-up immunity. In this study, we demonstrate a novel HV-PMOS based on a split N-type buried layer (NBL), which provides a high \\mathit{BV}dss in a HV-CMOS process. The newly proposed device with NBL split under the P-well of a drain electrode increases \\mathit{BV}dss without degrading specific on-resistance (Ron,sp) and any added process complexity. From this result, P-well concentration could be increased to improve both 5 V NMOS characteristics and HV-PMOS Ron,sp.

  5. Stress Characterization of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) using Raman Spectroscopy and the Finite Element Method.

    PubMed

    Yoshikawa, Masanobu; Kosaka, Kenichi; Seki, Hirohumi; Kimoto, Tsunenobu

    2016-07-01

    We measured the depolarized and polarized Raman spectra of a 4H-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) and found that compressive stress of approximately 20 MPa occurs under the source and gate electrodes and tensile stress of approximately 10 MPa occurs between the source and gate electrodes. The experimental result was in close agreement with the result obtained by calculation using the finite element method (FEM). A combination of Raman spectroscopy and FEM provides much data on the stresses in 4H-SiC MOSFET. PMID:27165155

  6. Ballistic performance comparison of monolayer transition metal dichalcogenide MX2 (M = Mo, W; X = S, Se, Te) metal-oxide-semiconductor field effect transistors

    NASA Astrophysics Data System (ADS)

    Chang, Jiwon; Register, Leonard F.; Banerjee, Sanjay K.

    2014-02-01

    We study the transport properties of monolayer MX2 (M = Mo, W; X = S, Se, Te) n- and p-channel metal-oxide-semiconductor field effect transistors (MOSFETs) using full-band ballistic non-equilibrium Green's function simulations with an atomistic tight-binding Hamiltonian with hopping potentials obtained from density functional theory. We discuss the subthreshold slope, drain-induced barrier lowering (DIBL), as well as gate-induced drain leakage (GIDL) for different monolayer MX2 MOSFETs. We also report the possibility of negative differential resistance behavior in the output characteristics of nanoscale monolayer MX2 MOSFETs.

  7. Detailed investigation of InSb p-channel metal-oxide-semiconductor field effect transistor prepared by photo-enhanced chemical vapor deposition

    NASA Astrophysics Data System (ADS)

    Liu, Biing-Der; Lee, Si-Chen; Sun, Tai-Ping; Yang, Sheng-Jenn

    1995-05-01

    The InSb metal-oxide-semiconductor field effect transistor (MOSFET) with three different channel lengths 5, 15, and 30 micron were fabricated successfully. The SiO2 prepared by photo-enhanced chemical vapor deposition was used both as the gate insulator and the source/drain passivation layer to reduce the source/drain pn junction surface leakage current. The common-source current-voltage characteristics show a breakdown voltage exceeding 2 V indicating an excellent pn junction reverse characteristics. The capacitance-voltage and the transferred current versus gate voltage characteristics are discussed in detail to explain the geometry effect on the device performance.

  8. On the mobility of n-channel metal-oxide-semiconductor transistors prepared by low-pressure rapid thermal chemical vapor deposition

    NASA Astrophysics Data System (ADS)

    McLarty, P. K.; Misra, V.; Hill, W.; Wortman, J. J.; Hauser, J. R.; Morfouli, P.; Ouisse, T.

    1995-01-01

    The factors affecting the channel mobility of metal-oxide-semiconductor transistors fabricated using as-deposited rapid thermal chemical vapor deposition (RTCVD) of silicon dioxide are investigated and compared to thermal silicon dioxide at various temperatures. The results indicate that the observed differences in the mobility values of thermal and rapid thermal chemical vapor deposed oxides at channel concentrations where Coulombic scattering is important is due to increased oxide trapping in the RTCVD films. It was also observed that the rapid thermal chemical vapor deposited oxides exhibited slightly larger mobility degradation rates at high fields when compared to thermal oxides.

  9. A model for radiation-induced off-state leakage current in N-channel metal-oxide-semiconductor transistors with shallow trench isolation

    NASA Astrophysics Data System (ADS)

    Wang, Sihao; Pei, Yunpeng; Huang, Ru; Wang, Wenhua; Liu, Wen; Xue, Shoubin; An, Xia; Tian, Jingquan; Wang, Yangyuan

    2010-01-01

    A radiation-induced leakage current model in deep submicron bulk silicon N-channel metal-oxide-semiconductor field effect transistor (NMOSFET) is proposed in this paper for circuit simulations. The model takes into account the impact of the substrate doping concentration, the angle of shallow trench isolation (STI) region, and the junction depth of source/drain, which can predict the off-state leakage current of the NMOSFET with STI region irradiated at different radiation doses. The model is verified by comparing with the experimental results. The model can be easily implemented into the circuit simulator to evaluate the impact of total ionizing dose effect on the performance of circuit.

  10. Determination of Fowler-Nordheim tunneling parameters in Metal-Oxide-Semiconductor structure including oxide field correction using a vertical optimization method

    NASA Astrophysics Data System (ADS)

    Toumi, S.; Ouennoughi, Z.; Strenger, K. C.; Frey, L.

    2016-08-01

    Current conduction mechanisms through a Metal-Oxide-Semiconductor structure are characterized via Fowler-Nordheim (FN) plots. The extraction of the FN parameters like the electron/hole effective mass in oxide mox and in semiconductor msc, the barrier height at the semiconductor-oxide interface ϕB, and the correction oxide voltage Vcorr for a MOS structure is made using a vertical optimization process on the current density without any assumption about ϕB or mox. An excellent agreement is obtained between the FN plots calculated with the FN parameters extracted using a vertical optimization process with the experimental one.

  11. Measurement of conduction band deformation potential constants using gate direct tunneling current in n-type metal oxide semiconductor field effect transistors under mechanical stress

    NASA Astrophysics Data System (ADS)

    Lim, Ji-Song; Yang, Xiaodong; Nishida, Toshikazu; Thompson, Scott E.

    2006-08-01

    An experimental method to determine both the hydrostatic and shear deformation potential constants is introduced. The technique is based on the change in the gate tunneling currents of Si-metal oxide semiconductor field effect transistors (MOSFETs) under externally applied mechanical stress and has been applied to industrial n-type MOSFETs. The conduction band hydrostatic and shear deformation potential constants (Ξd and Ξu) are extracted to be 1.0±0.1 and 9.6±1.0eV, respectively, which is consistent with recent theoretical works.

  12. Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

    SciTech Connect

    Liu, Siyang; Zhang, Chunwei; Sun, Weifeng; Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu

    2014-04-14

    Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic.

  13. ADMET biosensors: up-to-date issues and strategies.

    PubMed

    Fang, Yan; Offenhaeusser, Andrease

    2004-12-01

    This insight review introduces the new concepts, theories, technology, instruments, frontier issues, and key strategies of ADMET (absorption, distribution, metabolism, elimination, and toxicity) biosensors, from the fermi to the quantum levels. Information about ADMET, originating from one author's invention, a patented pharmacotherapy for rescuing cardio-cerebral vascular stunning and regulating vascular endothelial growth-factor signaling at the post-genomic level, can be detected by a new generation of ADMET biosensor. This is a single-cell/single-molecule field-effect transistor (FET) hybrid system, where single molecules or single cells are assembled at the FET surface in a high density array manner via complementary metal-oxide-semiconductor (CMOS)-compatible technologies. Within a given nanometer distance, ADMET-mediated oxidation-reduction (redox) potentials, electrochemistry responses, and electron transfer processes can be simultaneously and directly probed by the gates of field-effect transistor arrays. The nanometer details of the functional coupling principles and characterization technologies of DNA single-molecule/single-cell FETs, as well as the design of lab-on-a-chip instruments, are indicated. Four frontier issues and key strategies are elucidated in detail. This can lead to innovative technology for high-throughout screening of labs-on-chips to resolve the pharmaceutical industry's current bottleneck via novel, FET-based drug discovery and single-molecule/single-cell screening methods, which can bring about a pharmaceutical industry revolution in the 21st century. PMID:15567991

  14. Damage free Ar ion plasma surface treatment on In0.53Ga0.47As-on-silicon metal-oxide-semiconductor device

    NASA Astrophysics Data System (ADS)

    Koh, Donghyi; Shin, Seung Heon; Ahn, Jaehyun; Sonde, Sushant; Kwon, Hyuk-Min; Orzali, Tommaso; Kim, Dae-Hyun; Kim, Tae-Woo; Banerjee, Sanjay K.

    2015-11-01

    In this paper, we investigated the effect of in-situ Ar ion plasma surface pre-treatment in order to improve the interface properties of In0.53Ga0.47As for high-κ top-gate oxide deposition. X-ray photoelectron spectroscopy (XPS) and metal-oxide-semiconductor capacitors (MOSCAPs) demonstrate that Ar ion treatment removes the native oxide on In0.53Ga0.47As. The XPS spectra of Ar treated In0.53Ga0.47As show a decrease in the AsOx and GaOx signal intensities, and the MOSCAPs show higher accumulation capacitance (Cacc), along with reduced frequency dispersion. In addition, Ar treatment is found to suppress the interface trap density (Dit), which thereby led to a reduction in the threshold voltage (Vth) degradation during constant voltage stress and relaxation. These results outline the potential of surface treatment for III-V channel metal-oxide-semiconductor devices and application to non-planar device process.

  15. CMOS-compatible, label-free silicon-nanowire biosensors to detect cardiac troponin I for acute myocardial infarction diagnosis.

    PubMed

    Kong, Tao; Su, Ruigong; Zhang, Beibei; Zhang, Qi; Cheng, Guosheng

    2012-04-15

    A label-free biosensor for electrical detection of cardiac troponin I (cTnI), a highly sensitive and selective biomarker of acute myocardial infarction (AMI), is demonstrated using silicon nanowire (SiNW) based field-effect transistors (FETs). The FET devices were fabricated by a complementary metal oxide semiconductor (CMOS) compatible top-down approach to define the SiNW followed by tetramethylammonium hydroxide (TMAH) wet etching. Electrical characterizations of the SiNW FET revealed an ambipolar conduction characteristic with an on/off ratio of 10(5)-10(6). CTnI monoclonal antibodies were then covalently immobilized on the SiNW surfaces. By integrating with a homemade biosensor measurement system, the biosensor exhibited rapid and sensitive response to cTnI proteins. The current response showed a nature of logarithm relationship against the cTnI concentration from 46 ng/mL down to 0.092 ng/mL. Moreover, an anti-interference capability of the fabricated biosensor was also assessed. By utilizing the top-down fabrication method, this work provides an efficient way for the cTnI proteins detection with an enormous potential of mass-production, which definitely facilitate the practical applications. PMID:22386490

  16. An electrically detected magnetic resonance study of performance limiting defects in SiC metal oxide semiconductor field effect transistors

    NASA Astrophysics Data System (ADS)

    Cochrane, C. J.; Lenahan, P. M.; Lelis, A. J.

    2011-01-01

    In this study, we utilize electrically detected magnetic resonance (EDMR) techniques and electrical measurements to study defects in SiC based metal oxide semiconductor field effect transistors (MOSFETs). We compare results on a series of SiC MOSFETs prepared with significantly different processing parameters. The EDMR is detected through spin dependent recombination (SDR) in most cases. However, in some devices at a fairly high negative bias, the EDMR likely also involves spin dependent trap-assisted tunneling (SDT) between defects on both sides of the SiC/SiO2 interface. At least three different defects have been detected in the magnetic resonance measurements. The defects observed include two at the SiC/SiO2 interface or on the SiC side of the SiC/SiO2 interface: one is very likely a vacancy center with a distribution which extends into the bulk of the SiC and the other is likely a "dangling bond" defect. A third defect, located on the SiO2 side of the SiC/SiO2 interface, has a spectrum very similar to that previously reported for an oxygen deficient silicon coupled to a hydrogen atom. In nearly all cases, we observe a strong dominating single line EDMR spectrum with an isotropic g≈2.0027. In some samples, this strong central line is accompanied by two pairs of considerably weaker side peaks which we link to hyperfine interactions with nearby Si and C atoms. The pattern is physically reasonable for a silicon vacancy in SiC. We therefore tentatively assign it to a silicon vacancy or silicon vacancy associated defect in the SiC. In one set of devices with very high interface trap density we observe another dominating spectrum with g∥=2.0026 and g⊥=2.0010 with the symmetry axis coincident with the [0001] and nearly the SiC/SiO2 interface normal. We ascribe this EDMR spectrum to a "dangling bond" defect. A third EDMR spectrum shows up in some devices at a fairly large negative gate bias. The phase of this spectrum is quite consistently opposite to that of the

  17. Carrier-density-wave transport and local internal electric field measurements in biased metal-oxide-semiconductor n-Si devices using contactless laser photo-carrier radiometry

    NASA Astrophysics Data System (ADS)

    Mandelis, Andreas; Pawlak, Micha; Shaughnessy, Derrick

    2004-11-01

    Laser infrared photo-carrier radiometry was used with an n-type Si metal-oxide-semiconductor (MOS) diode and with a Si-SiO2 structure with a transparent electrode and under external bias. Application of three-dimensional PCR theory yielded values of the minority carrier (hole) transport properties in the presence of the thus created local internal electric field at fixed frequencies. Furthermore, the internal electric field at fixed applied voltage was calculated. Under the combination of increased temperature and voltage, the sub-interface position of the carrier-density-wave centroid was found to depend on a trade-off between increased recombination lifetime and decreased ambipolar (conductivity) mobility. The ability of PCR to measure local internal electric fields by combining applied bias sweeps and frequency scans appears to pave the way towards the contactless reconstruction of depth profiles of these fields in active devices.

  18. Analysis of Channel Stress Induced by NiPt-Silicide in Metal-Oxide-Semiconductor Field-Effect Transistor and Its Generation Mechanism

    NASA Astrophysics Data System (ADS)

    Mizuo, Mariko; Yamaguchi, Tadashi; Kudo, Shuichi; Hirose, Yukinori; Kimura, Hiroshi; Tsuchimoto, Jun-ichi; Hattori, Nobuyoshi

    2013-09-01

    Channel stress induced by NiPt-silicide films in metal-oxide-semiconductor field-effect transistors (MOSFETs) was demonstrated using UV-Raman spectroscopy, and its generation mechanism was revealed. It was possible to accurately measure the channel stress with the Raman test structure. The channel stress depends on the source/drain doping type and the second silicide annealing method. In order to discuss the channel stress generation mechanism, NiPt-silicide microstructure analyses were performed using X-ray diffraction analysis and scanning transmission electron microscopy. The channel stress generation mechanism can be elucidated by the following two factors: the change in the NiSi lattice spacing, which depends on the annealing temperature, and the NiSi crystal orientation. The analyses of these factors are important for controlling channel stress in stress engineering for high-performance transistors.

  19. GaN metal-oxide-semiconductor field-effect transistors on AlGaN/GaN heterostructure with recessed gate

    NASA Astrophysics Data System (ADS)

    Wang, Qingpeng; Ao, Jin-Ping; Wang, Pangpang; Jiang, Ying; Li, Liuan; Kawaharada, Kazuya; Liu, Yang

    2015-04-01

    GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure with a recess gate were fabricated and characterized. The device showed good pinch-off characteristics and a maximum field-effect mobility of 145.2 cm2·V-1·s-1. The effects of etching gas of Cl2 and SiCl4 were investigated in the gate recess process. SiCl4-etched devices showed higher channel mobility and lower threshold voltage. Atomic force microscope measurement was done to investigate the etching profile with different etching protection mask. Compared with photoresist, SiO2-masked sample showed lower surface roughness and better profile with stepper sidewall and weaker trenching effect resulting in higher channel mobility in the MOSFET.

  20. A high performance In0.53Ga0.47As metal-oxide-semiconductor field effect transistor with silicon interface passivation layer

    NASA Astrophysics Data System (ADS)

    Zhu, Feng; Zhao, Han; Ok, I.; Kim, H. S.; Yum, J.; Lee, Jack C.; Goel, Niti; Tsai, W.; Gaspe, C. K.; Santos, M. B.

    2009-01-01

    In this letter, we demonstrate a high performance In0.53Ga0.47As channel n-type metal-oxide-semiconductor field effect transistor with silicon interface passivation layer (IPL) and HfO2 gate oxide. Owing to the effectiveness of Si IPL on improving the interface quality, good device characteristics have been obtained, including the peak transconductance of 7.7 mS/mm (Lg=5 μm and Vd=50 mV), drive current of 158 mA/mm (Lg=5 μm, Vgs=Vth+2 V, and Vd=2.5 V), and the peak effective channel mobility of 1034 cm2/V s. As an important factor on device design, the impact of silicon IPL thickness on the transistor characteristics has been investigated.

  1. Interface engineering with an MOCVD grown ZnO interface passivation layer for ZrO 2-GaAs metal-oxide-semiconductor devices

    NASA Astrophysics Data System (ADS)

    Kundu, Souvik; Shripathi, T.; Banerji, P.

    2011-12-01

    This work deals with the fabrication of a GaAs metal-oxide-semiconductor device with an unpinned interface environment. An ultrathin ( ˜2 nm) interface passivation layer (IPL) of ZnO on GaAs was grown by metal organic chemical vapor deposition to control the interface trap densities and to prevent the Fermi level pinning before high-k deposition. X-ray photoelectron spectroscopy and high resolution transmission electron microscopy results show that an ultra thin layer of ZnO IPL can effectively suppress the oxides formation and minimize the Fermi level pinning at the interface between the GaAs and ZrO 2. By incorporating ZnO IPL, GaAs MOS devices with improved capacitance-voltage and reduced gate leakage current were achieved. The charge trapping behavior of the ZrO 2/ZnO gate stack under constant voltage stressing exhibits an improved interface quality and high dielectric reliability.

  2. INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Quantum-Mechanical Study on Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

    NASA Astrophysics Data System (ADS)

    Hu, Guang-Xi; Wang, Ling-Li; Liu, Ran; Tang, Ting-Ao; Qiu, Zhi-Jun

    2010-10-01

    As the channel length of metal-oxide-semiconductor field-effect transistors (MOSFETs) scales into the nanometer regime, quantum mechanical effects are becoming more and more significant. In this work, a model for the surrounding-gate (SG) nMOSFET is developed. The Schrödinger equation is solved analytically. Some of the solutions are verified via results obtained from simulations. It is found that the percentage of the electrons with lighter conductivity mass increases as the silicon body radius decreases, or as the gate voltage reduces, or as the temperature decreases. The centroid of inversion-layer is driven away from the silicon-oxide interface towards the silicon body, therefore the carriers will suffer less scattering from the interface and the electrons effective mobility of the SG nMOSFETs will be enhanced.

  3. Effects of HCl treatment and predeposition vacuum annealing on Al2O3/GaSb/GaAs metal-oxide-semiconductor structures

    NASA Astrophysics Data System (ADS)

    Gotow, Takahiro; Fujikawa, Sachie; Fujishiro, Hiroki I.; Ogura, Mutsuo; Yasuda, Tetsuji; Maeda, Tatsuro

    2015-02-01

    The effects of HCl treatment and predeposition vacuum annealing (VA) on n-type GaSb/GaAs metal-oxide-semiconductor (MOS) structures with the atomic layer deposition (ALD) of Al2O3 dielectrics are studied. We obtained MOS structures with good Fermi level modulation by HCl treatment prior to the deposition of Al2O3. From X-ray photoelectron spectroscopy (XPS) analysis, we found that the Ga2O3 content increases during the Al2O3 deposition, whereas the amounts of Sb components are reduced. The excess growth of Ga2O3 is inhibited by the reductions in the amounts of Sb components by the HCl treatment. Further reductions in the amounts of Sb components are observed following predeposition VA, indicating a lower density of states (Dit). However, the frequency dispersion in the capacitance-voltage (C-V) characteristics increases with predeposition VA at higher temperatures.

  4. Performance enhancement of multiple-gate ZnO metal-oxide-semiconductor field-effect transistors fabricated using self-aligned and laser interference photolithography techniques

    PubMed Central

    2014-01-01

    The simple self-aligned photolithography technique and laser interference photolithography technique were proposed and utilized to fabricate multiple-gate ZnO metal-oxide-semiconductor field-effect transistors (MOSFETs). Since the multiple-gate structure could improve the electrical field distribution along the ZnO channel, the performance of the ZnO MOSFETs could be enhanced. The performance of the multiple-gate ZnO MOSFETs was better than that of the conventional single-gate ZnO MOSFETs. The higher the drain-source saturation current (12.41 mA/mm), the higher the transconductance (5.35 mS/mm) and the lower the anomalous off-current (5.7 μA/mm) for the multiple-gate ZnO MOSFETs were obtained. PMID:24948884

  5. Magnetically modulated laser-induced resistance effect observed in Metal-Oxide-Semiconductor structure of Cr/SiO(2)/Si.

    PubMed

    Xie, Xin; Liu, Shuai; Huang, Meizhen; Wang, Hui

    2015-09-21

    In this study, we report our finding of laser-induced resistance effect in metal-oxide-semiconductor (MOS) structure of Cr/SiO(2)/Si. Under the irradiation of a laser beam, the effect shows a large linear resistance change ratio of 92% with a spatial sensitivity of 0.79 MΩ/mm. In particular, by the application of an external magnetic field perpendicular to the Cr film, the resistance change ratio is increased to 110%. This effect is attributed to the Lorentz force acting on the photo-generated carriers in the inversion layer of MOS structures. The work suggests an approach for the development of new type magnetically modulated photoelectric devices. PMID:26406634

  6. Simulation Study of Intrinsic Parameter Fluctuations in Variable-Body-Factor Silicon-on-Thin-Box Metal Oxide Semiconductor Field Effect Transistors

    NASA Astrophysics Data System (ADS)

    Yang, Yunxiang; Du, Gang; Han, Ruqi; Liu, Xiaoyan

    2011-04-01

    The effects of intrinsic parameter fluctuations, including line-edge-roughness (LER), silicon-body thickness variation (STV) and work-function variation (WFV), in 20-nm-gate variable-γ silicon-on-thin-box (SOTB) metal oxide semiconductor field effect transistors (MOSFETs) have been investigated and compared with those of the conventional SOTB. Results show that the variable-γ SOTB offers not only an enhanced Ion but also a reduced Ion fluctuation with a small increase in the active-state Ioff fluctuation. The Vth-roll-off value in the variable-γ SOTB can be reduced by adopting a reverse-biased side gate to optimize the short channel effect, but the variability of the DIBL effect is enlarged. It is expected that a thinner silicon body can be used to reduce the dominant variability sources.

  7. Investigation on edge fringing effect and oxide thickness dependence of inversion current in metal-oxide-semiconductor tunneling diodes with comb-shaped electrodes

    SciTech Connect

    Lin, Chien-Chih; Hsu, Pei-Lun; Lin, Li; Hwu, Jenn-Gwo

    2014-03-28

    A particular edge-dependent inversion current behavior of metal-oxide-semiconductor (MOS) tunneling diodes was investigated utilizing square and comb-shaped electrodes. The inversion tunneling current exhibits the strong dependence on the tooth size of comb-shaped electrodes and oxide thickness. Detailed illustrations of current conduction mechanism are developed by simulation and experimental measurement results. It is found that the electron diffusion current and Schottky barrier height lowering for hole tunneling current both contribute on inversion current conduction. In MOS tunneling photodiode applications, the photoresponse can be improved by decreasing SiO{sub 2} thickness and using comb-shaped electrodes with smaller tooth spacing. Meantime, the high and steady photosensitivity can also be approached by introducing HfO{sub 2} into dielectric stacks.

  8. P-Channel InGaN/GaN heterostructure metal-oxide-semiconductor field effect transistor based on polarization-induced two-dimensional hole gas

    NASA Astrophysics Data System (ADS)

    Zhang, Kexiong; Sumiya, Masatomo; Liao, Meiyong; Koide, Yasuo; Sang, Liwen

    2016-03-01

    The concept of p-channel InGaN/GaN heterostructure field effect transistor (FET) using a two-dimensional hole gas (2DHG) induced by polarization effect is demonstrated. The existence of 2DHG near the lower interface of InGaN/GaN heterostructure is verified by theoretical simulation and capacitance-voltage profiling. The metal-oxide-semiconductor FET (MOSFET) with Al2O3 gate dielectric shows a drain-source current density of 0.51 mA/mm at the gate voltage of ‑2 V and drain bias of ‑15 V, an ON/OFF ratio of two orders of magnitude and effective hole mobility of 10 cm2/Vs at room temperature. The normal operation of MOSFET without freeze-out at 8 K further proves that the p-channel behavior is originated from the polarization-induced 2DHG.

  9. Mobility enhancement of strained GaSb p-channel metal-oxide-semiconductor field-effect transistors with biaxial compressive strain

    NASA Astrophysics Data System (ADS)

    Yan-Wen, Chen; Zhen, Tan; Lian-Feng, Zhao; Jing, Wang; Yi-Zhou, Liu; Chen, Si; Fang, Yuan; Wen-Hui, Duan; Jun, Xu

    2016-03-01

    Various biaxial compressive strained GaSb p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) are experimentally and theoretically investigated. The biaxial compressive strained GaSb MOSFETs show a high peak mobility of 638 cm2/V·s, which is 3.86 times of the extracted mobility of the fabricated GaSb MOSFETs without strain. Meanwhile, first principles calculations show that the hole effective mass of GaSb depends on the biaxial compressive strain. The biaxial compressive strain brings a remarkable enhancement of the hole mobility caused by a significant reduction in the hole effective mass due to the modulation of the valence bands. Project supported by the National Basic Research Program of China (Grant No. 2011CBA00602) and the National Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. 2011ZX02708-002).

  10. P-Channel InGaN/GaN heterostructure metal-oxide-semiconductor field effect transistor based on polarization-induced two-dimensional hole gas.

    PubMed

    Zhang, Kexiong; Sumiya, Masatomo; Liao, Meiyong; Koide, Yasuo; Sang, Liwen

    2016-01-01

    The concept of p-channel InGaN/GaN heterostructure field effect transistor (FET) using a two-dimensional hole gas (2DHG) induced by polarization effect is demonstrated. The existence of 2DHG near the lower interface of InGaN/GaN heterostructure is verified by theoretical simulation and capacitance-voltage profiling. The metal-oxide-semiconductor FET (MOSFET) with Al2O3 gate dielectric shows a drain-source current density of 0.51 mA/mm at the gate voltage of -2 V and drain bias of -15 V, an ON/OFF ratio of two orders of magnitude and effective hole mobility of 10 cm(2)/Vs at room temperature. The normal operation of MOSFET without freeze-out at 8 K further proves that the p-channel behavior is originated from the polarization-induced 2DHG. PMID:27021054