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Sample records for high speed cmos

  1. A CMOS high speed imaging system design based on FPGA

    NASA Astrophysics Data System (ADS)

    Tang, Hong; Wang, Huawei; Cao, Jianzhong; Qiao, Mingrui

    2015-10-01

    CMOS sensors have more advantages than traditional CCD sensors. The imaging system based on CMOS has become a hot spot in research and development. In order to achieve the real-time data acquisition and high-speed transmission, we design a high-speed CMOS imaging system on account of FPGA. The core control chip of this system is XC6SL75T and we take advantages of CameraLink interface and AM41V4 CMOS image sensors to transmit and acquire image data. AM41V4 is a 4 Megapixel High speed 500 frames per second CMOS image sensor with global shutter and 4/3" optical format. The sensor uses column parallel A/D converters to digitize the images. The CameraLink interface adopts DS90CR287 and it can convert 28 bits of LVCMOS/LVTTL data into four LVDS data stream. The reflected light of objects is photographed by the CMOS detectors. CMOS sensors convert the light to electronic signals and then send them to FPGA. FPGA processes data it received and transmits them to upper computer which has acquisition cards through CameraLink interface configured as full models. Then PC will store, visualize and process images later. The structure and principle of the system are both explained in this paper and this paper introduces the hardware and software design of the system. FPGA introduces the driven clock of CMOS. The data in CMOS is converted to LVDS signals and then transmitted to the data acquisition cards. After simulation, the paper presents a row transfer timing sequence of CMOS. The system realized real-time image acquisition and external controls.

  2. High-speed multicolour photometry with CMOS cameras

    NASA Astrophysics Data System (ADS)

    Pokhvala, S. M.; Zhilyaev, B. E.; Reshetnyk, V. M.

    2012-11-01

    We present the results of testing the commercial digital camera Nikon D90 with a CMOS sensor for high-speed photometry with a small telescope Celestron 11'' at the Peak Terskol Observatory. CMOS sensor allows to perform photometry in 3 filters simultaneously that gives a great advantage compared with monochrome CCD detectors. The Bayer BGR colour system of CMOS sensors is close to the Johnson BVR system. The results of testing show that one can carry out photometric measurements with CMOS cameras for stars with the V-magnitude up to ≃14^{m} with the precision of 0.01^{m}. Stars with the V-magnitude up to ˜10 can be shot at 24 frames per second in the video mode.

  3. Envelope tracking CMOS power amplifier with high-speed CMOS envelope amplifier for mobile handsets

    NASA Astrophysics Data System (ADS)

    Yoshida, Eiji; Sakai, Yasufumi; Oishi, Kazuaki; Yamazaki, Hiroshi; Mori, Toshihiko; Yamaura, Shinji; Suto, Kazuo; Tanaka, Tetsu

    2014-01-01

    A high-efficiency CMOS power amplifier (PA) based on envelope tracking (ET) has been reported for a wideband code division multiple access (W-CDMA) and long term evolution (LTE) application. By adopting a high-speed CMOS envelope amplifier with current direction sensing, a 5% improvement in total power-added efficiency (PAE) and a 11 dB decrease in adjacent channel leakage ratio (ACLR) are achieved with a W-CDMA signal. Moreover, the proposed PA achieves a PAE of 25.4% for a 10 MHz LTE signal at an output power (Pout) of 25.6 dBm and a gain of 24 dB.

  4. A high speed CMOS A/D converter

    NASA Technical Reports Server (NTRS)

    Wiseman, Don R.; Whitaker, Sterling R.

    1992-01-01

    This paper presents a high speed analog-to-digital (A/D) converter. The converter is a 7 bit flash converter with one half LSB accuracy. Typical parts will function at approximately 200 MHz. The converter uses a novel comparator circuit that is shown to out perform more traditional comparators, and thus increases the speed of the converter. The comparator is a clocked, precharged circuit that offers very fast operation with a minimal offset voltage (2 mv). The converter was designed using a standard 1 micron digital CMOS process and is 2,244 microns by 3,972 microns.

  5. Precision of FLEET Velocimetry Using High-speed CMOS Camera Systems

    NASA Technical Reports Server (NTRS)

    Peters, Christopher J.; Danehy, Paul M.; Bathel, Brett F.; Jiang, Naibo; Calvert, Nathan D.; Miles, Richard B.

    2015-01-01

    Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 micro sec, precisions of 0.5 m/s in air and 0.2 m/s in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision High Speed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

  6. Precision of FLEET Velocimetry Using High-Speed CMOS Camera Systems

    NASA Technical Reports Server (NTRS)

    Peters, Christopher J.; Danehy, Paul M.; Bathel, Brett F.; Jiang, Naibo; Calvert, Nathan D.; Miles, Richard B.

    2015-01-01

    Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 microseconds, precisions of 0.5 meters per second in air and 0.2 meters per second in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision HighSpeed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

  7. A CMOS image sensor using high-speed lock-in pixels for stimulated Raman scattering

    NASA Astrophysics Data System (ADS)

    Lioe, DeXing; Mars, Kamel; Takasawa, Taishi; Yasutomi, Keita; Kagawa, Keiichiro; Hashimoto, Mamoru; Kawahito, Shoji

    2016-03-01

    A CMOS image sensor using high-speed lock-in pixels for stimulated Raman scattering (SRS) spectroscopy is presented in this paper. The effective SRS signal from the stimulated emission of SRS mechanism is very small in contrast to the offset of a probing laser source, which is in the ratio of 10-4 to 10-5. In order to extract this signal, the common offset component is removed, and the small difference component is sampled using switched-capacitor integrator with a fully differential amplifier. The sampling is performed over many integration cycles to achieve appropriate amplification. The lock-in pixels utilizes high-speed lateral electric field charge modulator (LEFM) to demodulate the SRS signal which is modulated at high-frequency of 20MHz. A prototype chip is implemented using 0.11μm CMOS image sensor technology.

  8. A 10-bit column-parallel cyclic ADC for high-speed CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Ye, Han; Quanliang, Li; Cong, Shi; Nanjian, Wu

    2013-08-01

    This paper presents a high-speed column-parallel cyclic analog-to-digital converter (ADC) for a CMOS image sensor. A correlated double sampling (CDS) circuit is integrated in the ADC, which avoids a stand-alone CDS circuit block. An offset cancellation technique is also introduced, which reduces the column fixed-pattern noise (FPN) effectively. One single channel ADC with an area less than 0.02 mm2 was implemented in a 0.13 μm CMOS image sensor process. The resolution of the proposed ADC is 10-bit, and the conversion rate is 1.6 MS/s. The measured differential nonlinearity and integral nonlinearity are 0.89 LSB and 6.2 LSB together with CDS, respectively. The power consumption from 3.3 V supply is only 0.66 mW. An array of 48 10-bit column-parallel cyclic ADCs was integrated into an array of CMOS image sensor pixels. The measured results indicated that the ADC circuit is suitable for high-speed CMOS image sensors.

  9. A High-Speed CMOS Image Sensor with Global Electronic Shutter Pixels Using Pinned Diodes

    NASA Astrophysics Data System (ADS)

    Yasutomi, Keita; Tamura, Toshihiro; Furuta, Masanori; Itoh, Shinya; Kawahito, Shoji

    This paper describes a high-speed CMOS image sensor with a new type of global electronic shutter pixel. A global electronic shutter is necessary for imaging fast-moving objects without motion blur or distortion. The proposed pixel has two potential wells with pinned diode structure for two-stage charge transfer that enables a global electronic shuttering and reset noise canceling. A prototype high-speed image sensor fabricated in 0.18μm standard CMOS image sensor process consists of the proposed pixel array, 12-bit column-parallel cyclic ADC arrays and 192-channel digital outputs. The sensor achieves a good linearity at low-light intensity, demonstrating the perfect charge transfer between two pinned diodes. The input referred noise of the proposed pixel is measured to be 6.3 e-.

  10. High-speed CMOS image sensor for high-throughput lensless microfluidic imaging system

    NASA Astrophysics Data System (ADS)

    Yan, Mei; Huang, Xiwei; Jia, Qixiang; Nadipalli, Revanth; Wang, Tongxi; Shang, Yang; Yu, Hao; Je, Minkyu; Yeo, Kiatseng

    2012-03-01

    The integration of CMOS image sensor and microfluidics becomes a promising technology for point-of-care (POC) diagnosis. However, commercial image sensors usually have limited speed and low-light sensitivity. One high-speed and high-sensitivity CMOS image sensor chip is introduced in this paper, targeted for high-throughput microfluidic imaging system. Firstly, high speed image sensor architecture is introduced with design of column-parallel single-slope analog-todigital converter (ADC) with digital correlated double sampling (CDS). The frame rate can be achieved to 2400 frames/second (fps) with resolution of 128×96 for high-throughput microfluidic imaging. Secondly, the designed system has superior low-light sensitivity, which is achieved by large pixel size (10μm×10μm, 56% fill factor). Pixel peak signalnoise- ratio (SNR) reaches to 50dB with 10dB improvement compared to the commercial pixel (2.2μm×2.2μm). The degradation of pixel resolution is compensated by super-resolution image processing algorithm. By reconstructing single image with multiple low-resolution frames, we can equivalently achieve 2μm resolution with physical 10μm pixel. Thirdly, the system-on-chip (SoC) integration results in a real-time controlled intelligent imaging system without expensive data storage and time-consuming computer analysis. This initial sensor prototype with timing-control makes it possible to develop high-throughput lensless microfluidic imaging system for POC diagnosis.

  11. High-speed bipolar phototransistors in a 180 nm CMOS process

    PubMed Central

    Kostov, P.; Gaberl, W.; Zimmermann, H.

    2013-01-01

    Several high-speed pnp phototransistors built in a standard 180 nm CMOS process are presented. The phototransistors were implemented in sizes of 40×40 μm2 and 100×100 μm2. Different base and emitter areas lead to different characteristics of the phototransistors. As starting material a p+ wafer with a p− epitaxial layer on top was used. The phototransistors were optically characterized at wavelengths of 410, 675 and 850 nm. Bandwidths up to 92 MHz and dynamic responsivities up to 2.95 A/W were achieved. Evaluating the results, we can say that the presented phototransistors are well suited for high speed photosensitive optical applications where inherent amplification is needed. Further on, the standard silicon CMOS implementation opens the possibility for cheap integration of integrated optoelectronic circuits. Possible applications for the presented phototransistors are low cost high speed image sensors, opto-couplers, etc. PMID:23847388

  12. High-speed bipolar phototransistors in a 180 nm CMOS process.

    PubMed

    Kostov, P; Gaberl, W; Zimmermann, H

    2013-03-01

    Several high-speed pnp phototransistors built in a standard 180 nm CMOS process are presented. The phototransistors were implemented in sizes of 40×40 μm(2) and 100×100 μm(2). Different base and emitter areas lead to different characteristics of the phototransistors. As starting material a p(+) wafer with a p(-) epitaxial layer on top was used. The phototransistors were optically characterized at wavelengths of 410, 675 and 850 nm. Bandwidths up to 92 MHz and dynamic responsivities up to 2.95 A/W were achieved. Evaluating the results, we can say that the presented phototransistors are well suited for high speed photosensitive optical applications where inherent amplification is needed. Further on, the standard silicon CMOS implementation opens the possibility for cheap integration of integrated optoelectronic circuits. Possible applications for the presented phototransistors are low cost high speed image sensors, opto-couplers, etc. PMID:23847388

  13. A high speed, low power consumption LVDS interface for CMOS pixel sensors

    NASA Astrophysics Data System (ADS)

    Shi, Zhan; Tang, Zhenan; Tian, Yong; Pham, Hung; Valin, Isabelle; Jaaskelainen, Kimmo

    2015-01-01

    The use of CMOS Pixel Sensors (CPSs) offers a promising approach to the design of vertex detectors in High Energy Physics (HEP) experiments. As the CPS equipping the upgraded Solenoidal Tracker at RHIC (STAR) pixel detector, ULTIMATE perfectly illustrates the potential of CPSs for HEP applications. However, further development of CPSs with respect to readout speed is required to fulfill the readout time requirement of the next generation HEP detectors, such as the upgrade of A Large Ion Collider Experiment (ALICE) Inner Tracking System (ITS), the International Linear Collider (ILC), and the Compressed Baryonic Matter (CBM) vertex detectors. One actual limitation of CPSs is related to the speed of the Low-Voltage Differential Signaling (LVDS) circuitry implementing the interface between the sensor and the Data Acquisition (DAQ) system. To improve the transmission rate while keeping the power consumption at a low level, a source termination technique and a special current comparator were adopted for the LVDS driver and receiver, respectively. Moreover, hardening techniques are used. The circuitry was designed and submitted for fabrication in a 0.18-μm CMOS Image Sensor (CIS) process at the end of 2011. The test results indicated that the LVDS driver and receiver can operate properly at the data rate of 1.2 Gb/s with power consumption of 19.6 mW.

  14. A low-power column-parallel ADC for high-speed CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Han, Ye; Li, Quanliang; Shi, Cong; Liu, Liyuan; Wu, Nanjian

    2013-08-01

    This paper presents a 10-bit low-power column-parallel cyclic analog-to-digital converter (ADC) used for high-speed CMOS image sensor (CIS). An opamp sharing technique is used to save power and area. Correlated double sampling (CDS) circuit and programmable gain amplifier (PGA) are integrated in the ADC, which avoids stand-alone circuit blocks. An offset cancellation technique is also introduced, which reduces the column fixed-pattern noise (FPN) effectively. One single channel ADC with an area less than 0.03mm2 was implemented in a 0.18μm 1P4M CMOS image sensor process. The resolution of the proposed ADC is 10-bit, and the conversion rate is 2MS/s. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.62 LSB and 2.1 LSB together with CDS, respectively. The power consumption from 1.8V supply is only 0.36mW.

  15. A new high speed thermal imaging concept based on a logarithmic CMOS imager technology

    NASA Astrophysics Data System (ADS)

    Hutter, Franz X.; Brosch, Daniel; Burghartz, Joachim N.; Graf, Heinz-Gerd; Strobel, Markus

    2008-04-01

    HDRC (high dynamic range CMOS) allows for more than 120 dB signal range in image processing. Scene details with both very high and extremely low radiant flux may thus appear within the same image. Color constancy over the entire signal range and good high speed performance are further aspects of this logarithmic imager technology. These features qualify HDRC cameras for thermography, since the signal range of Planck's temperature radiation in a two dimensional array is comparable to HDRC's intensity range. Especially in material welding and laser cutting processes, in high power light sources and in high temperature material processing, fast monitoring of the spacial and dynamic temperature distributions present a challenge to conventional thermal imaging and thus call for innovative concepts. A particular challenge is in the compensation of the emissivity of the radiating surface. Here, we present a new concept based on a modified HDRC VGA color camera, allowing for visualization and measurement of temperatures from about 800 °C up to 2300 °C. The modifications include an optical filter for minimizing UV and IR straylight and a notch filter for clipping off the green optical range in order to separate the blue and red RGB regions. An enhanced and adapted software provides a division of the neighboured red and blue pixel signals by means of simply subtracting the HDRC signals. As a result the local temperature information of the visualized scene spot is independent of emissivity. This is, to our knowledge, the first demonstration of a high speed thermal imager to date.

  16. High-speed laser Doppler perfusion imaging using an integrating CMOS image sensor.

    PubMed

    Serov, Alexandre; Lasser, Theo

    2005-08-22

    This paper describes the design and the performance of a new high-speed laser Doppler imaging system for monitoring blood flow over an area of tissue. The new imager delivers high-resolution flow images (256x256 pixels) every 2 to 10 seconds, depending on the number of points in the acquired time-domain signal (32-512 points). This new imaging modality utilizes a digital integrating CMOS image sensor to detect Doppler signals in a plurality of points over the area illuminated by a divergent laser beam of a uniform intensity profile. The integrating property of the detector improves the signal-to-noise ratio of the measurements, which results in high-quality flow images. We made a series of measurements in vitro to test the performance of the system in terms of bandwidth, SNR, etc. Subsequently we give some examples of flow-related images measured on human skin, thus demonstrating the performance of the imager in vivo. The perspectives for future implementations of the imager for clinical and physiological applications are discussed. PMID:19498655

  17. A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors

    PubMed Central

    Gao, Zhiyuan; Yang, Congjie; Xu, Jiangtao; Nie, Kaiming

    2015-01-01

    This paper presents a dynamic range (DR) enhanced readout technique with a two-step time-to-digital converter (TDC) for high speed linear CMOS image sensors. A multi-capacitor and self-regulated capacitive trans-impedance amplifier (CTIA) structure is employed to extend the dynamic range. The gain of the CTIA is auto adjusted by switching different capacitors to the integration node asynchronously according to the output voltage. A column-parallel ADC based on a two-step TDC is utilized to improve the conversion rate. The conversion is divided into coarse phase and fine phase. An error calibration scheme is also proposed to correct quantization errors caused by propagation delay skew within −Tclk~+Tclk. A linear CMOS image sensor pixel array is designed in the 0.13 μm CMOS process to verify this DR-enhanced high speed readout technique. The post simulation results indicate that the dynamic range of readout circuit is 99.02 dB and the ADC achieves 60.22 dB SNDR and 9.71 bit ENOB at a conversion rate of 2 MS/s after calibration, with 14.04 dB and 2.4 bit improvement, compared with SNDR and ENOB of that without calibration. PMID:26561819

  18. A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors.

    PubMed

    Gao, Zhiyuan; Yang, Congjie; Xu, Jiangtao; Nie, Kaiming

    2015-01-01

    This paper presents a dynamic range (DR) enhanced readout technique with a two-step time-to-digital converter (TDC) for high speed linear CMOS image sensors. A multi-capacitor and self-regulated capacitive trans-impedance amplifier (CTIA) structure is employed to extend the dynamic range. The gain of the CTIA is auto adjusted by switching different capacitors to the integration node asynchronously according to the output voltage. A column-parallel ADC based on a two-step TDC is utilized to improve the conversion rate. The conversion is divided into coarse phase and fine phase. An error calibration scheme is also proposed to correct quantization errors caused by propagation delay skew within -T(clk)~+T(clk). A linear CMOS image sensor pixel array is designed in the 0.13 μm CMOS process to verify this DR-enhanced high speed readout technique. The post simulation results indicate that the dynamic range of readout circuit is 99.02 dB and the ADC achieves 60.22 dB SNDR and 9.71 bit ENOB at a conversion rate of 2 MS/s after calibration, with 14.04 dB and 2.4 bit improvement, compared with SNDR and ENOB of that without calibration. PMID:26561819

  19. High-Speed Scanning Interferometer Using CMOS Image Sensor and FPGA Based on Multifrequency Phase-Tracking Detection

    NASA Technical Reports Server (NTRS)

    Ohara, Tetsuo

    2012-01-01

    A sub-aperture stitching optical interferometer can provide a cost-effective solution for an in situ metrology tool for large optics; however, the currently available technologies are not suitable for high-speed and real-time continuous scan. NanoWave s SPPE (Scanning Probe Position Encoder) has been proven to exhibit excellent stability and sub-nanometer precision with a large dynamic range. This same technology can transform many optical interferometers into real-time subnanometer precision tools with only minor modification. The proposed field-programmable gate array (FPGA) signal processing concept, coupled with a new-generation, high-speed, mega-pixel CMOS (complementary metal-oxide semiconductor) image sensor, enables high speed (>1 m/s) and real-time continuous surface profiling that is insensitive to variation of pixel sensitivity and/or optical transmission/reflection. This is especially useful for large optics surface profiling.

  20. Novel CMOS time-delay integration using single-photon counting for high-speed industrial and aerospace applications

    NASA Astrophysics Data System (ADS)

    El-Desouki, Munir M.; Al-Azem, Badeea

    2014-03-01

    Time-delay integration (TDI) is a popular imaging technique that is used in many applications such as machine vision, dental scanning and satellite earth observation. One of the main advantages of using TDI imagers is the increased effective integration time that is achieved while maintaining high frame-rates. Another use for TDI imagers is with moving objects, such as the earth's surface or industrial machine vision applications, where integration time is limited in order to avoid motion blurs. Such technique may even find its way in mobile and consumer based imaging applications where the reduction in pixel size can limit the performance during low-light and high speed applications. Until recently, TDI was only used with charge-coupled devices (CCDs) mainly due to their charge transfer characteristics. CCDs however, are power consuming and slow when compared to CMOS technology and are no longer favorable for mobile applications. In this work, we report on novel single-photon counting based TDI technique that is implemented in standard CMOS technology allowing for complete camera-on-a-chip solution. The imager was fabricated in a standard CMOS 150 nm 5-metal digital process from LFoundry.

  1. LGSD/NGSD: high speed optical CMOS imagers for E-ELT adaptive optics

    NASA Astrophysics Data System (ADS)

    Downing, Mark; Kolb, Johann; Balard, Philippe; Dierickx, Bart; Defernez, Arnaud; Feautrier, Philippe; Finger, Gert; Fryer, Martin; Gach, Jean-Luc; Guillaume, Christian; Hubin, Norbert; Jerram, Paul; Jorden, Paul; Meyer, Manfred; Payne, Andrew; Pike, Andrew; Reyes, Javier; Simpson, Robert; Stadler, Eric; Stent, Jeremy; Swift, Nick

    2014-07-01

    The success of the next generation of instruments for ELT class telescopes will depend upon improving the image quality by exploiting sophisticated Adaptive Optics (AO) systems. One of the critical components of the AO systems for the E-ELT has been identified as the optical Laser/Natural Guide Star WFS detector. The combination of large format, 1760×1680 pixels to finely sample the wavefront and the spot elongation of laser guide stars, fast frame rate of 700 frames per second (fps), low read noise (< 3e-), and high QE (> 90%) makes the development of this device extremely challenging. Design studies concluded that a highly integrated Backside Illuminated CMOS Imager built on High Resistivity silicon as the most likely technology to succeed. Two generations of the CMOS Imager are being developed: a) the already designed and manufactured NGSD (Natural Guide Star Detector), a quarter-sized pioneering device of 880×840 pixels capable of meeting first light needs of the E-ELT; b) the LGSD (Laser Guide Star Detector), the larger full size device. The detailed design is presented including the approach of using massive parallelism (70,400 ADCs) to achieve the low read noise at high pixel rates of ~3 Gpixel/s and the 88 channel LVDS 220Mbps serial interface to get the data off-chip. To enable read noise closer to the goal of 1e- to be achieved, a split wafer run has allowed the NGSD to be manufactured in the more speculative, but much lower read noise, Ultra Low Threshold Transistors in the unit cell. The NGSD has come out of production, it has been thinned to 12μm, backside processed and packaged in a custom 370pin Ceramic PGA (Pin Grid Array). First results of tests performed both at e2v and ESO are presented.

  2. A Comparative Study of Heavy Ion and Proton Induced Bit Error Sensitivity and Complex Burst Error Modes in Commercially Available High Speed SiGe BiCMOS

    NASA Technical Reports Server (NTRS)

    Marshall, Paul; Carts, Marty; Campbell, Art; Reed, Robert; Ladbury, Ray; Seidleck, Christina; Currie, Steve; Riggs, Pam; Fritz, Karl; Randall, Barb

    2004-01-01

    A viewgraph presentation that reviews recent SiGe bit error test data for different commercially available high speed SiGe BiCMOS chips that were subjected to various levels of heavy ion and proton radiation. Results for the tested chips at different operating speeds are displayed in line graphs.

  3. High speed wide field CMOS camera for Transneptunian Automatic Occultation Survey

    NASA Astrophysics Data System (ADS)

    Wang, Shiang-Yu; Geary, John C.; Amato, Stephen M.; Hu, Yen-Sang; Ling, Hung-Hsu; Huang, Pin-Jie; Furesz, Gabor; Chen, Hsin-Yo; Chang, Yin-Chang; Szentgyorgyi, Andrew; Lehner, Matthew; Norton, Timothy

    2014-08-01

    The Transneptunian Automated Occultation Survey (TAOS II) is a three robotic telescope project to detect the stellar occultation events generated by Trans Neptunian Objects (TNOs). TAOS II project aims to monitor about 10000 stars simultaneously at 20Hz to enable statistically significant event rate. The TAOS II camera is designed to cover the 1.7 degree diameter field of view (FoV) of the 1.3m telescope with 10 mosaic 4.5kx2k CMOS sensors. The new CMOS sensor has a back illumination thinned structure and high sensitivity to provide similar performance to that of the backillumination thinned CCDs. The sensor provides two parallel and eight serial decoders so the region of interests can be addressed and read out separately through different output channels efficiently. The pixel scale is about 0.6"/pix with the 16μm pixels. The sensors, mounted on a single Invar plate, are cooled to the operation temperature of about 200K by a cryogenic cooler. The Invar plate is connected to the dewar body through a supporting ring with three G10 bipods. The deformation of the cold plate is less than 10μm to ensure the sensor surface is always within ±40μm of focus range. The control electronics consists of analog part and a Xilinx FPGA based digital circuit. For each field star, 8×8 pixels box will be readout. The pixel rate for each channel is about 1Mpix/s and the total pixel rate for each camera is about 80Mpix/s. The FPGA module will calculate the total flux and also the centroid coordinates for every field star in each exposure.

  4. High Speed, Radiation Hard CMOS Pixel Sensors for Transmission Electron Microscopy

    NASA Astrophysics Data System (ADS)

    Contarato, Devis; Denes, Peter; Doering, Dionisio; Joseph, John; Krieger, Brad

    CMOS monolithic active pixel sensors are currently being established as the technology of choice for new generation digital imaging systems in Transmission Electron Microscopy (TEM). A careful sensor design that couples μm-level pixel pitches with high frame rate readout and radiation hardness to very high electron doses enables the fabrication of direct electron detectors that are quickly revolutionizing high-resolution TEM imaging in material science and molecular biology. This paper will review the principal characteristics of this novel technology and its advantages over conventional, optically-coupled cameras, and retrace the sensor development driven by the Transmission Electron Aberration corrected Microscope (TEAM) project at the LBNL National Center for Electron Microscopy (NCEM), illustrating in particular the imaging capabilities enabled by single electron detection at high frame rate. Further, the presentation will report on the translation of the TEAM technology to a finer feature size process, resulting in a sensor with higher spatial resolution and superior radiation tolerance currently serving as the baseline for a commercial camera system.

  5. A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier.

    PubMed

    Lioe, De Xing; Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

    2016-01-01

    A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF) and switched-capacitor (SC) integrator with a fully CMOS differential amplifier. AC (modulated) components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated) components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise) components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10(-)⁵ is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed. PMID:27089339

  6. A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier

    PubMed Central

    Lioe, De Xing; Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

    2016-01-01

    A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF) and switched-capacitor (SC) integrator with a fully CMOS differential amplifier. AC (modulated) components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated) components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise) components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10−5 is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed. PMID:27089339

  7. A High Speed CMOS Image Sensor with a Novel Digital Correlated Double Sampling and a Differential Difference Amplifier

    PubMed Central

    Kim, Daehyeok; Bae, Jaeyoung; Song, Minkyu

    2015-01-01

    In order to increase the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, the fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is because a single-slope analog-to-digital converter (ADC) has been normally adopted in the conventional digital CDS with the reset ramp and signal ramp. Thus, the operating speed of a digital CDS is much slower than that of an analog CDS. In order to improve the operating speed, we propose a novel digital CDS based on a differential difference amplifier (DDA) that compares the reset signal and the pixel signal using only one ramp. The prototype CIS has been fabricated with 0.13 µm CIS technology and it has the VGA resolution of 640 × 480. The measured conversion time is 16 µs, and a high frame rate of 131 fps is achieved at the VGA resolution. PMID:25738765

  8. A high speed CMOS image sensor with a novel digital correlated double sampling and a differential difference amplifier.

    PubMed

    Kim, Daehyeok; Bae, Jaeyoung; Song, Minkyu

    2015-01-01

    In order to increase the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, the fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is because a single-slope analog-to-digital converter (ADC) has been normally adopted in the conventional digital CDS with the reset ramp and signal ramp. Thus, the operating speed of a digital CDS is much slower than that of an analog CDS. In order to improve the operating speed, we propose a novel digital CDS based on a differential difference amplifier (DDA) that compares the reset signal and the pixel signal using only one ramp. The prototype CIS has been fabricated with 0.13 µm CIS technology and it has the VGA resolution of 640 × 480. The measured conversion time is 16 µs, and a high frame rate of 131 fps is achieved at the VGA resolution. PMID:25738765

  9. High-speed modulator with interleaved junctions in zero-change CMOS photonics

    NASA Astrophysics Data System (ADS)

    Alloatti, L.; Cheian, D.; Ram, R. J.

    2016-03-01

    A microring depletion modulator is demonstrated with T-shaped lateral p-n junctions used to realize efficient modulation while maximizing the RC limited bandwidth. The device having a 3 dB bandwidth of 13 GHz has been fabricated in a standard 45 nm microelectronics CMOS process. The cavity has a linewidth of 17 GHz and an average wavelength-shift of 9 pm/V in reverse-bias conditions.

  10. Optimal high speed CMOS inverter design using craziness based Particle Swarm Optimization Algorithm

    NASA Astrophysics Data System (ADS)

    De, Bishnu P.; Kar, Rajib; Mandal, Durbadal; Ghoshal, Sakti P.

    2015-07-01

    The inverter is the most fundamental logic gate that performs a Boolean operation on a single input variable. In this paper, an optimal design of CMOS inverter using an improved version of particle swarm optimization technique called Craziness based Particle Swarm Optimization (CRPSO) is proposed. CRPSO is very simple in concept, easy to implement and computationally efficient algorithm with two main advantages: it has fast, nearglobal convergence, and it uses nearly robust control parameters. The performance of PSO depends on its control parameters and may be influenced by premature convergence and stagnation problems. To overcome these problems the PSO algorithm has been modiffed to CRPSO in this paper and is used for CMOS inverter design. In birds' flocking or ffsh schooling, a bird or a ffsh often changes direction suddenly. In the proposed technique, the sudden change of velocity is modelled by a direction reversal factor associated with the previous velocity and a "craziness" velocity factor associated with another direction reversal factor. The second condition is introduced depending on a predeffned craziness probability to maintain the diversity of particles. The performance of CRPSO is compared with real code.gnetic algorithm (RGA), and conventional PSO reported in the recent literature. CRPSO based design results are also compared with the PSPICE based results. The simulation results show that the CRPSO is superior to the other algorithms for the examples considered and can be efficiently used for the CMOS inverter design.

  11. PNP PIN bipolar phototransistors for high-speed applications built in a 180 nm CMOS process

    PubMed Central

    Kostov, P.; Gaberl, W.; Hofbauer, M.; Zimmermann, H.

    2012-01-01

    This work reports on three speed optimized pnp bipolar phototransistors build in a standard 180 nm CMOS process using a special starting wafer. The starting wafer consists of a low doped p epitaxial layer on top of the p substrate. This low doped p epitaxial layer leads to a thick space-charge region between base and collector and thus to a high −3 dB bandwidth at low collector–emitter voltages. For a further increase of the bandwidth the presented phototransistors were designed with small emitter areas resulting in a small base-emitter capacitance. The three presented phototransistors were implemented in sizes of 40 × 40 μm2 and 100 × 100 μm2. Optical DC and AC measurements at 410 nm, 675 nm and 850 nm were done for phototransistor characterization. Due to the speed optimized design and the layer structure of the phototransistors, bandwidths up to 76.9 MHz and dynamic responsivities up to 2.89 A/W were achieved. Furthermore simulations of the electric field strength and space-charge regions were done. PMID:23482349

  12. High speed CMOS imager with motion artifact supression and anti-blooming

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Wrigley, Chris (Inventor); Yang, Guang (Inventor); Yadid-Pecht, Orly (Inventor)

    2001-01-01

    An image sensor includes pixels formed on a semiconductor substrate. Each pixel includes a photoactive region in the semiconductor substrate, a sense node, and a power supply node. A first electrode is disposed near a surface of the semiconductor substrate. A bias signal on the first electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the sense node. A second electrode is disposed near the surface of the semiconductor substrate. A bias signal on the second electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the power supply node. The image sensor includes a controller that causes bias signals to be provided to the electrodes so that photocharges generated in the photoactive region are accumulated in the photoactive region during a pixel integration period, the accumulated photocharges are transferred to the sense node during a charge transfer period, and photocharges generated in the photoactive region are transferred to the power supply node during a third period without passing through the sense node. The imager can operate at high shutter speeds with simultaneous integration of pixels in the array. High quality images can be produced free from motion artifacts. High quantum efficiency, good blooming control, low dark current, low noise and low image lag can be obtained.

  13. High-speed low-voltage CMOS line driver for SerDes applications

    NASA Astrophysics Data System (ADS)

    Rogers, M.; Hayatleh, K.; Lidgey, F. J.; Joy, A.

    2013-04-01

    The challenge facing SerDes (Serialiser De-Serialiser) designers is common with all current communications technologies. Industry advances show a trend to increase speed, reduce power and improve efficiency. In this article a novel line driver that can operate at speeds of up to 40 Gbps with a power supply of 1 V and a power consumption of 4.54 mW/Gb/s is presented. Pre-distortion on the front-end is used to maintain signal integrity.

  14. Experimental Comparison of the High-Speed Imaging Performance of an EM-CCD and sCMOS Camera in a Dynamic Live-Cell Imaging Test Case

    PubMed Central

    Beier, Hope T.; Ibey, Bennett L.

    2014-01-01

    The study of living cells may require advanced imaging techniques to track weak and rapidly changing signals. Fundamental to this need is the recent advancement in camera technology. Two camera types, specifically sCMOS and EM-CCD, promise both high signal-to-noise and high speed (>100 fps), leaving researchers with a critical decision when determining the best technology for their application. In this article, we compare two cameras using a live-cell imaging test case in which small changes in cellular fluorescence must be rapidly detected with high spatial resolution. The EM-CCD maintained an advantage of being able to acquire discernible images with a lower number of photons due to its EM-enhancement. However, if high-resolution images at speeds approaching or exceeding 1000 fps are desired, the flexibility of the full-frame imaging capabilities of sCMOS is superior. PMID:24404178

  15. A 12-bit high-speed column-parallel two-step single-slope analog-to-digital converter (ADC) for CMOS image sensors.

    PubMed

    Lyu, Tao; Yao, Suying; Nie, Kaiming; Xu, Jiangtao

    2014-01-01

    A 12-bit high-speed column-parallel two-step single-slope (SS) analog-to-digital converter (ADC) for CMOS image sensors is proposed. The proposed ADC employs a single ramp voltage and multiple reference voltages, and the conversion is divided into coarse phase and fine phase to improve the conversion rate. An error calibration scheme is proposed to correct errors caused by offsets among the reference voltages. The digital-to-analog converter (DAC) used for the ramp generator is based on the split-capacitor array with an attenuation capacitor. Analysis of the DAC's linearity performance versus capacitor mismatch and parasitic capacitance is presented. A prototype 1024 × 32 Time Delay Integration (TDI) CMOS image sensor with the proposed ADC architecture has been fabricated in a standard 0.18 μm CMOS process. The proposed ADC has average power consumption of 128 μW and a conventional rate 6 times higher than the conventional SS ADC. A high-quality image, captured at the line rate of 15.5 k lines/s, shows that the proposed ADC is suitable for high-speed CMOS image sensors. PMID:25407903

  16. A high-speed CMOS image sensor with column-parallel single capacitor CDSs and single-slope ADCs

    NASA Astrophysics Data System (ADS)

    Li, Quanliang; Shi, Cong; Wu, Nanjian

    2011-08-01

    This paper presents a high speed CMOS image sensor (CIS) with column-parallel single capacitor correlated double samplings (CDSs), programmable gain amplifiers (PGAs) and single-slope analog-to-digital converters (ADCs). The single capacitor CDS circuit has only one capacitor so that the area CDS circuit is small. In order to attain appropriate image contrast under different light conditions, the signal range can be adjusted by PGA. Single-slope ADC has smaller chip area than others ADCs and is suitable for column-parallel CIS architectures. A prototype sensor of 256x256 pixels was realized in a 0.13μm 1P3M CIS process. Its pixel circuit is 4T active pixel sensor (APS) and pixel size is 10x10μm2. Total chip area is 4x4mm2. The prototype achieves the full frame rate in excess of 250 frames per second, the sensitivity of 10.7V/lx•s, the conversion gain of 55.6μV/e and the column-to- column fixed-pattern noise (FPN) 0.41%.

  17. Binary CMOS image sensor with a gate/body-tied MOSFET-type photodetector for high-speed operation

    NASA Astrophysics Data System (ADS)

    Choi, Byoung-Soo; Jo, Sung-Hyun; Bae, Myunghan; Kim, Sang-Hwan; Shin, Jang-Kyoo

    2016-05-01

    In this paper, a binary complementary metal oxide semiconductor (CMOS) image sensor with a gate/body-tied (GBT) metal oxide semiconductor field effect transistor (MOSFET)-type photodetector is presented. The sensitivity of the GBT MOSFET-type photodetector, which was fabricated using the standard CMOS 0.35-μm process, is higher than the sensitivity of the p-n junction photodiode, because the output signal of the photodetector is amplified by the MOSFET. A binary image sensor becomes more efficient when using this photodetector. Lower power consumptions and higher speeds of operation are possible, compared to the conventional image sensors using multi-bit analog to digital converters (ADCs). The frame rate of the proposed image sensor is over 2000 frames per second, which is higher than those of the conventional CMOS image sensors. The output signal of an active pixel sensor is applied to a comparator and compared with a reference level. The 1-bit output data of the binary process is determined by this level. To obtain a video signal, the 1-bit output data is stored in the memory and is read out by horizontal scanning. The proposed chip is composed of a GBT pixel array (144 × 100), binary-process circuit, vertical scanner, horizontal scanner, and readout circuit. The operation mode can be selected from between binary mode and multi-bit mode.

  18. A high-speed, low-noise CMOS 16-channel charge-sensitivepreamplifier ASIC for APD-based PET detectors

    SciTech Connect

    Weng, M.; Mandelli, E.; Moses, W.W.; Derenzo, S.E.

    2002-12-02

    A high-speed, low-noise 16-channel amplifier IC has beenfabricated in the HP 0.5 mm CMOS process. It is a prototype for use witha PET detector which uses a 4x4 avalanche photodiode (APD) array having 3pF of capacitance and 75 nA of leakage current per pixel. Thepreamplifier must have a fast rise time (a few ns) in order to generatean accurate timing signal, low noise in order to accurately measure theenergy of the incident gamma radiation, and high density in order to readout 2-D arrays of small (2 mm) pixels. A single channel consists of acharge-sensitive preamplifier followed by a pad-driving buffer. Thepreamplifier is reset by an NMOS transistor in the triode region which iscontrolled by an externally supplied current. The IC has 16 differentgain settings which range from 2.085 mV/fC to 10.695 mV/fC. The gain isdetermined by four switched capacitors in the feedback loop. The switchstate is set by two digital input lines which control a 64-bit shiftregister on the IC. A preamplifier 10-90 percent rise time as low as 2.7ns with no external input load and 3.6 ns with a load of 5.8 pF wasachieved. For the maximum gain setting and 5.8 pF of input load, theamplifier had 400 electrons of RMS noise at a peaking time of 0.7 us. TheIC is powered by a +3.3 V supply drawing 60 mA.

  19. Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 µm CMOS Process

    PubMed Central

    Rahman, Labonnah Farzana; Reaz, Mamun Bin Ibne; Yin, Chia Chieu; Ali, Mohammad Alauddin Mohammad; Marufuzzaman, Mohammad

    2014-01-01

    The cross-coupled circuit mechanism based dynamic latch comparator is presented in this research. The comparator is designed using differential input stages with regenerative S-R latch to achieve lower offset, lower power, higher speed and higher resolution. In order to decrease circuit complexity, a comparator should maintain power, speed, resolution and offset-voltage properly. Simulations show that this novel dynamic latch comparator designed in 0.18 µm CMOS technology achieves 3.44 mV resolution with 8 bit precision at a frequency of 50 MHz while dissipating 158.5 µW from 1.8 V supply and 88.05 µA average current. Moreover, the proposed design propagates as fast as 4.2 nS with energy efficiency of 0.7 fJ/conversion-step. Additionally, the core circuit layout only occupies 0.008 mm2. PMID:25299266

  20. High-voltage CMOS detectors

    NASA Astrophysics Data System (ADS)

    Ehrler, F.; Blanco, R.; Leys, R.; Perić, I.

    2016-07-01

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented.

  1. A 12-bit compact column-parallel SAR ADC with dynamic power control technique for high-speed CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Quanliang, Li; Liyuan, Liu; Ye, Han; Zhongxiang, Cao; Nanjian, Wu

    2014-10-01

    This paper presents a 12-bit column-parallel successive approximation register analog-to-digital converter (SAR ADC) for high-speed CMOS image sensors. A segmented binary-weighted switched capacitor digital-to-analog converter (CDAC) and a staggered structure MOM unit capacitor is used to reduce the ADC area and to make its layout fit double pixel pitches. An electrical field shielding layout method is proposed to eliminate the parasitic capacitance on the top plate of the unit capacitor. A dynamic power control technique is proposed to reduce the power consumption of a single channel during readout. An off-chip foreground digital calibration is adopted to compensate for the nonlinearity due to the mismatch of unit capacitors among the CDAC. The prototype SAR ADC is fabricated in a 0.18 μm 1P5M CIS process. A single SAR ADC occupies 20 × 2020 μm2. Sampling at 833 kS/s, the measured differential nonlinearity, integral nonlinearity and effective number of bits of SAR ADC with calibration are 0.9/-1 LSB, 1/-1.1 LSB and 11.24 bits, respectively; the power consumption is only 0.26 mW under a 1.8-V supply and decreases linearly as the frame rate decreases.

  2. Observations of in situ deep-sea marine bioluminescence with a high-speed, high-resolution sCMOS camera

    NASA Astrophysics Data System (ADS)

    Phillips, Brennan T.; Gruber, David F.; Vasan, Ganesh; Roman, Christopher N.; Pieribone, Vincent A.; Sparks, John S.

    2016-05-01

    Observing and measuring marine bioluminescence in situ presents unique challenges, characterized by the difficult task of approaching and imaging weakly illuminated bodies in a three-dimensional environment. To address this problem, a scientific complementary-metal-oxide-semiconductor (sCMOS) microscopy camera was outfitted for deep-sea imaging of marine bioluminescence. This system was deployed on multiple platforms (manned submersible, remotely operated vehicle, and towed body) in three oceanic regions (Western Tropical Pacific, Eastern Equatorial Pacific, and Northwestern Atlantic) to depths up to 2500 m. Using light stimulation, bioluminescent responses were recorded at high frame rates and in high resolution, offering unprecedented low-light imagery of deep-sea bioluminescence in situ. The kinematics of light production in several zooplankton groups was observed, and luminescent responses at different depths were quantified as intensity vs. time. These initial results signify a clear advancement in the bioluminescent imaging methods available for observation and experimentation in the deep-sea.

  3. Video-rate fluorescence lifetime imaging camera with CMOS single-photon avalanche diode arrays and high-speed imaging algorithm.

    PubMed

    Li, David D-U; Arlt, Jochen; Tyndall, David; Walker, Richard; Richardson, Justin; Stoppa, David; Charbon, Edoardo; Henderson, Robert K

    2011-09-01

    A high-speed and hardware-only algorithm using a center of mass method has been proposed for single-detector fluorescence lifetime sensing applications. This algorithm is now implemented on a field programmable gate array to provide fast lifetime estimates from a 32 × 32 low dark count 0.13 μm complementary metal-oxide-semiconductor single-photon avalanche diode (SPAD) plus time-to-digital converter array. A simple look-up table is included to enhance the lifetime resolvability range and photon economics, making it comparable to the commonly used least-square method and maximum-likelihood estimation based software. To demonstrate its performance, a widefield microscope was adapted to accommodate the SPAD array and image different test samples. Fluorescence lifetime imaging microscopy on fluorescent beads in Rhodamine 6G at a frame rate of 50 fps is also shown. PMID:21950926

  4. High-temperature Complementary Metal Oxide Semiconductors (CMOS)

    NASA Technical Reports Server (NTRS)

    Mcbrayer, J. D.

    1981-01-01

    The results of an investigation into the possibility of using complementary metal oxide semiconductor (CMOS) technology for high temperature electronics are presented. A CMOS test chip was specifically developed as the test bed. This test chip incorporates CMOS transistors that have no gate protection diodes; these diodes are the major cause of leakage in commercial devices.

  5. Monolithic integration of high bandwidth waveguide coupled Ge photodiode in a photonic BiCMOS process

    NASA Astrophysics Data System (ADS)

    Lischke, S.; Knoll, D.; Zimmermann, L.

    2015-03-01

    Monolithic integration of photonic functionality in the frontend-of-line (FEOL) of an advanced microelectronics technology is a key step towards future communication applications. This combines photonic components such as waveguides, couplers, modulators, and photo detectors with high-speed electronics plus shortest possible interconnects crucial for high-speed performance. Integration of photonics into CMOS FEOL is therefore in development for quite some time reaching 90nm node recently [1]. However, an alternative to CMOS is high-performance BiCMOS, offering significant advantages for integrated photonics-electronics applications with regard to cost and RF performance. We already presented results of FEOL integration of photonic components in a high-performance SiGe:C BiCMOS baseline to establish a novel, photonic BiCMOS process. Process cornerstone is a local-SOI approach which allows us to fabricate SOI-based, thus low-loss photonic components in a bulk BiCMOS environment [2]. A monolithically integrated 10Gbit/sec Silicon modulator with driver was shown here [3]. A monolithically integrated 25Gbps receiver was presented in [4], consisting of 200GHz bipolar transistors and CMOS devices, low-loss waveguides, couplers, and highspeed Ge photo diodes showing 3-dB bandwidth of 35GHz, internal responsivity of more than 0.6A/W at λ= 1.55μm, and ~ 50nA dark current at 1V. However, the BiCMOS-given thermal steps cause a significant smearing of the Germanium photo diodes doping profile, limiting the photo diode performance. Therefore, we introduced implantation of non-doping elements to overcome such limiting factors, resulting in photo diode bandwidths of more than 50GHz even under the effect of thermal steps necessary when the diodes are integrated in a high performance BiCMOS process.

  6. High speed handpieces

    PubMed Central

    Bhandary, Nayan; Desai, Asavari; Shetty, Y Bharath

    2014-01-01

    High speed instruments are versatile instruments used by clinicians of all specialties of dentistry. It is important for clinicians to understand the types of high speed handpieces available and the mechanism of working. The centers for disease control and prevention have issued guidelines time and again for disinfection and sterilization of high speed handpieces. This article presents the recent developments in the design of the high speed handpieces. With a view to prevent hospital associated infections significant importance has been given to disinfection, sterilization & maintenance of high speed handpieces. How to cite the article: Bhandary N, Desai A, Shetty YB. High speed handpieces. J Int Oral Health 2014;6(1):130-2. PMID:24653618

  7. Theoretical performance analysis for CMOS based high resolution detectors.

    PubMed

    Jain, Amit; Bednarek, Daniel R; Rudin, Stephen

    2013-03-01

    High resolution imaging capabilities are essential for accurately guiding successful endovascular interventional procedures. Present x-ray imaging detectors are not always adequate due to their inherent limitations. The newly-developed high-resolution micro-angiographic fluoroscope (MAF-CCD) detector has demonstrated excellent clinical image quality; however, further improvement in performance and physical design may be possible using CMOS sensors. We have thus calculated the theoretical performance of two proposed CMOS detectors which may be used as a successor to the MAF. The proposed detectors have a 300 μm thick HL-type CsI phosphor, a 50 μm-pixel CMOS sensor with and without a variable gain light image intensifier (LII), and are designated MAF-CMOS-LII and MAF-CMOS, respectively. For the performance evaluation, linear cascade modeling was used. The detector imaging chains were divided into individual stages characterized by one of the basic processes (quantum gain, binomial selection, stochastic and deterministic blurring, additive noise). Ranges of readout noise and exposure were used to calculate the detectors' MTF and DQE. The MAF-CMOS showed slightly better MTF than the MAF-CMOS-LII, but the MAF-CMOS-LII showed far better DQE, especially for lower exposures. The proposed detectors can have improved MTF and DQE compared with the present high resolution MAF detector. The performance of the MAF-CMOS is excellent for the angiography exposure range; however it is limited at fluoroscopic levels due to additive instrumentation noise. The MAF-CMOS-LII, having the advantage of the variable LII gain, can overcome the noise limitation and hence may perform exceptionally for the full range of required exposures; however, it is more complex and hence more expensive. PMID:24353390

  8. High Speed data acquisition

    SciTech Connect

    Cooper, Peter S.

    1998-02-01

    A general introduction to high Speed data acquisition system techniques in modern particle physics experiments is given. Examples are drawn from the SELEX(E781) high statistics charmed baryon production and decay experiment now taking data at Fermilab.

  9. Delta Doping High Purity CCDs and CMOS for LSST

    NASA Technical Reports Server (NTRS)

    Blacksberg, Jordana; Nikzad, Shouleh; Hoenk, Michael; Elliott, S. Tom; Bebek, Chris; Holland, Steve; Kolbe, Bill

    2006-01-01

    A viewgraph presentation describing delta doping high purity CCD's and CMOS for LSST is shown. The topics include: 1) Overview of JPL s versatile back-surface process for CCDs and CMOS; 2) Application to SNAP and ORION missions; 3) Delta doping as a back-surface electrode for fully depleted LBNL CCDs; 4) Delta doping high purity CCDs for SNAP and ORION; 5) JPL CMP thinning process development; and 6) Antireflection coating process development.

  10. High Speed Research Program

    NASA Technical Reports Server (NTRS)

    Anderson, Robert E.; Corsiglia, Victor R.; Schmitz, Frederic H. (Technical Monitor)

    1994-01-01

    An overview of the NASA High Speed Research Program will be presented from a NASA Headquarters perspective. The presentation will include the objectives of the program and an outline of major programmatic issues.

  11. High-performance VGA-resolution digital color CMOS imager

    NASA Astrophysics Data System (ADS)

    Agwani, Suhail; Domer, Steve; Rubacha, Ray; Stanley, Scott

    1999-04-01

    This paper discusses the performance of a new VGA resolution color CMOS imager developed by Motorola on a 0.5micrometers /3.3V CMOS process. This fully integrated, high performance imager has on chip timing, control, and analog signal processing chain for digital imaging applications. The picture elements are based on 7.8micrometers active CMOS pixels that use pinned photodiodes for higher quantum efficiency and low noise performance. The image processing engine includes a bank of programmable gain amplifiers, line rate clamping for dark offset removal, real time auto white balancing, per column gain and offset calibration, and a 10 bit pipelined RSD analog to digital converter with a programmable input range. Post ADC signal processing includes features such as bad pixel replacement based on user defined thresholds levels, 10 to 8 bit companding and 5 tap FIR filtering. The sensor can be programmed via a standard I2C interface that runs on 3.3V clocks. Programmable features include variable frame rates using a constant frequency master clock, electronic exposure control, continuous or single frame capture, progressive or interlace scanning modes. Each pixel is individually addressable allowing region of interest imaging and image subsampling. The sensor operates with master clock frequencies of up to 13.5MHz resulting in 30FPS. A total programmable gain of 27dB is available. The sensor power dissipation is 400mW at full speed of operation. The low noise design yields a measured 'system on a chip' dynamic range of 50dB thus giving over 8 true bits of resolution. Extremely high conversion gain result in an excellent peak sensitivity of 22V/(mu) J/cm2 or 3.3V/lux-sec. This monolithic image capture and processing engine represent a compete imaging solution making it a true 'camera on a chip'. Yet in its operation it remains extremely easy to use requiring only one clock and a 3.3V power supply. Given the available features and performance levels, this sensor will be

  12. High Speed Civil Transport

    NASA Technical Reports Server (NTRS)

    1997-01-01

    This computer generated animation depicts a conceptual simulation of the flight of a High Speed Civil Transport (HSCT). As envisioned, the HSCT is a next-generation supersonic (faster than the speed of sound) passenger jet that would fly 300 passengers at more than 1,500 miles per hour -- more than twice the speed of sound. It will cross the Pacific or Atlantic in less than half the time of modern subsonic jets, and at a ticket price less than 20 percent above comparable, slower flights.

  13. High speed civil transport

    NASA Technical Reports Server (NTRS)

    Mcknight, R. L.

    1992-01-01

    The design requirements of the High Speed Civil Transport (HSCT) are discussed. The following design concerns are presented: (1) environmental impact (emissions and noise); (2) critical components (the high temperature combustor and the lightweight exhaust nozzle); and (3) advanced materials (high temperature ceramic matrix composites (CMC's)/intermetallic matrix composites (IMC's)/metal matrix composites (MMC's)).

  14. A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip

    NASA Astrophysics Data System (ADS)

    Lattuca, A.; Mazza, G.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Mager, M.; Sielewicz, K. Marek; Marin Tobon, C. Augusto; Marras, D.; Martinengo, P.; Mugnier, H.; Musa, L.; Pham, T. Hung; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. Willem; Yang, P.

    2016-01-01

    This work presents the 600 MHz clock multiplier PLL and the pseudo-LVDS driver which are two essential components of the Data Transmission Unit (DTU), a fast serial link for the 1.2 Gb/s data transmission of the ALICE inner detector front-end chip (ALPIDE). The PLL multiplies the 40 MHz input clock in order to obtain the 600 MHz and the 200 MHz clock for a fast serializer which works in Double Data Rate mode. The outputs of the serializer feed the pseudo-LVDS driver inputs which transmits the data from the pixel chip to the patch panel with a limited number of signal lines. The driver drives a 5.3 m-6.5 m long differential transmission line by steering a maximum of 5 mA of current at the target speed. To overcome bandwidth limitations coming from the long cables the pre-emphasis can be applied to the output. Currents for the main and pre-emphasis driver can individually be adjusted using on-chip digital-to-analog converters. The circuits will be integrated in the pixel chip and are designed in the same 0.18 μm CMOS technology and will operate from the same 1.8 V supply. Design and test results of both circuits are presented.

  15. High Speed data acquisition

    SciTech Connect

    Cooper, P.S.

    1998-02-01

    A general introduction to high Speed data acquisition system techniques in modern particle physics experiments is given. Examples are drawn from the SELEX(E781) high statistics charmed baryon production and decay experiment now taking data at Fermilab. {copyright} {ital 1998 American Institute of Physics.}

  16. High speed door assembly

    DOEpatents

    Shapiro, Carolyn

    1993-01-01

    A high speed door assembly, comprising an actuator cylinder and piston rods, a pressure supply cylinder and fittings, an electrically detonated explosive bolt, a honeycomb structured door, a honeycomb structured decelerator, and a structural steel frame encasing the assembly to close over a 3 foot diameter opening within 50 milliseconds of actuation, to contain hazardous materials and vapors within a test fixture.

  17. High speed door assembly

    DOEpatents

    Shapiro, C.

    1993-04-27

    A high speed door assembly is described, comprising an actuator cylinder and piston rods, a pressure supply cylinder and fittings, an electrically detonated explosive bolt, a honeycomb structured door, a honeycomb structured decelerator, and a structural steel frame encasing the assembly to close over a 3 foot diameter opening within 50 milliseconds of actuation, to contain hazardous materials and vapors within a test fixture.

  18. High-performance monolithic CMOS detectors for space applications

    NASA Astrophysics Data System (ADS)

    Saint-Pe, Olivier; Tulet, Michel; Davancens, Robert; Larnaudie, Franck; Vignon, Bruno; Magnan, Pierre; Farre, Jean A.; Corbiere, Franck; Martin-Gonthier, Philippe

    2001-12-01

    During the last 10 years, research about CMOS image sensors (also called APS - Active Pixel Sensors) has been intensively carried out, in order to offer an alternative to CCDs as image sensors. This is particularly the case for space applications as CMOS image sensors feature characteristics which are obviously of interest for flight hardware: parallel or semi-parallel architecture, on chip control and processing electronics, low power dissipation, high level of radiation tolerance... Many image sensor companies, institutes and laboratories have demonstrated the compatibility of CMOS image sensors with consumer applications: micro-cameras, video-conferencing, digital- still cameras. And recent designs have shown that APS is getting closer to the CCD in terms of performance level. However, he large majority of the existing products do not offer the specific features which are required for many space applications. ASTRIUM and SUPAERO/CIMI have decided to work together in view of developing CMOS image sensors dedicated to space business. After a brief presentation of the team organization for space image sensor design and production, the latest results of a high performances 512 X 512 pixels CMOS device characterization are presented with emphasis on the achieved electro-optical performance. Finally, the on going and short-term coming activities of the team are discussed.

  19. High Speed Vortex Flows

    NASA Technical Reports Server (NTRS)

    Wood, Richard M.; Wilcox, Floyd J., Jr.; Bauer, Steven X. S.; Allen, Jerry M.

    2000-01-01

    A review of the research conducted at the National Aeronautics and Space Administration (NASA), Langley Research Center (LaRC) into high-speed vortex flows during the 1970s, 1980s, and 1990s is presented. The data reviewed is for flat plates, cavities, bodies, missiles, wings, and aircraft. These data are presented and discussed relative to the design of future vehicles. Also presented is a brief historical review of the extensive body of high-speed vortex flow research from the 1940s to the present in order to provide perspective of the NASA LaRC's high-speed research results. Data are presented which show the types of vortex structures which occur at supersonic speeds and the impact of these flow structures to vehicle performance and control is discussed. The data presented shows the presence of both small- and large scale vortex structures for a variety of vehicles, from missiles to transports. For cavities, the data show very complex multiple vortex structures exist at all combinations of cavity depth to length ratios and Mach number. The data for missiles show the existence of very strong interference effects between body and/or fin vortices and the downstream fins. It was shown that these vortex flow interference effects could be both positive and negative. Data are shown which highlights the effect that leading-edge sweep, leading-edge bluntness, wing thickness, location of maximum thickness, and camber has on the aerodynamics of and flow over delta wings. The observed flow fields for delta wings (i.e. separation bubble, classical vortex, vortex with shock, etc.) are discussed in the context of' aircraft design. And data have been shown that indicate that aerodynamic performance improvements are available by considering vortex flows as a primary design feature. Finally a discussing of a design approach for wings which utilize vortex flows for improved aerodynamic performance at supersonic speed is presented.

  20. High speed door assembly

    SciTech Connect

    Shapiro, C.

    1991-12-31

    This invention is comprised of a high speed door assembly, comprising an actuator cylinder and piston rods, a pressure supply cylinder and fittings, an electrically detonated explosive bolt, a honeycomb structured door, a honeycomb structured decelerator, and a structural steel frame encasing the assembly to close over a 3 foot diameter opening within 50 milliseconds of actuation, to contain hazardous materials and vapors within a test fixture.

  1. PALM and STORM: Into large fields and high-throughput microscopy with sCMOS detectors.

    PubMed

    Almada, Pedro; Culley, Siân; Henriques, Ricardo

    2015-10-15

    Single Molecule Localization Microscopy (SMLM) techniques such as Photo-Activation Localization Microscopy (PALM) and Stochastic Optical Reconstruction Microscopy (STORM) enable fluorescence microscopy super-resolution: the overcoming of the resolution barrier imposed by the diffraction of light. These techniques are based on acquiring hundreds or thousands of images of single molecules, locating them and reconstructing a higher-resolution image from the high-precision localizations. These methods generally imply a considerable trade-off between imaging speed and resolution, limiting their applicability to high-throughput workflows. Recent advancements in scientific Complementary Metal-Oxide Semiconductor (sCMOS) camera sensors and localization algorithms reduce the temporal requirements for SMLM, pushing it toward high-throughput microscopy. Here we outline the decisions researchers face when considering how to adapt hardware on a new system for sCMOS sensors with high-throughput in mind. PMID:26079924

  2. High speed civil transport

    NASA Technical Reports Server (NTRS)

    Bogardus, Scott; Loper, Brent; Nauman, Chris; Page, Jeff; Parris, Rusty; Steinbach, Greg

    1990-01-01

    The design process of the High Speed Civil Transport (HSCT) combines existing technology with the expectation of future technology to create a Mach 3.0 transport. The HSCT was designed to have a range in excess of 6000 nautical miles and carry up to 300 passengers. This range will allow the HSCT to service the economically expanding Pacific Basin region. Effort was made in the design to enable the aircraft to use conventional airports with standard 12,000 foot runways. With a takeoff thrust of 250,000 pounds, the four supersonic through-flow engines will accelerate the HSCT to a cruise speed of Mach 3.0. The 679,000 pound (at takeoff) HSCT is designed to cruise at an altitude of 70,000 feet, flying above most atmospheric disturbances.

  3. High speed flywheel

    DOEpatents

    McGrath, Stephen V.

    1991-01-01

    A flywheel for operation at high speeds utilizes two or more ringlike coments arranged in a spaced concentric relationship for rotation about an axis and an expansion device interposed between the components for accommodating radial growth of the components resulting from flywheel operation. The expansion device engages both of the ringlike components, and the structure of the expansion device ensures that it maintains its engagement with the components. In addition to its expansion-accommodating capacity, the expansion device also maintains flywheel stiffness during flywheel operation.

  4. Mechanically Flexible and High-Performance CMOS Logic Circuits.

    PubMed

    Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

    2015-01-01

    Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal-oxide-semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices. PMID:26459882

  5. Mechanically Flexible and High-Performance CMOS Logic Circuits

    PubMed Central

    Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

    2015-01-01

    Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal–oxide–semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices. PMID:26459882

  6. High speed transient sampler

    DOEpatents

    McEwan, Thomas E.

    1995-01-01

    A high speed sampler comprises a meandered sample transmission line for transmitting an input signal, a straight strobe transmission line for transmitting a strobe signal, and a plurality of sampling gates along the transmission lines. The sampling gates comprise a four terminal diode bridge having a first strobe resistor connected from a first terminal of the bridge to the positive strobe line, a second strobe resistor coupled from the third terminal of the bridge to the negative strobe line, a tap connected to the second terminal of the bridge and to the sample transmission line, and a sample holding capacitor connected to the fourth terminal of the bridge. The resistance of the first and second strobe resistors is much higher than the signal transmission line impedance in the preferred system. This results in a sampling gate which applies a very small load on the sample transmission line and on the strobe generator. The sample holding capacitor is implemented using a smaller capacitor and a larger capacitor isolated from the smaller capacitor by resistance. The high speed sampler of the present invention is also characterized by other optimizations, including transmission line tap compensation, stepped impedance strobe line, a multi-layer physical layout, and unique strobe generator design. A plurality of banks of such samplers are controlled for concatenated or interleaved sample intervals to achieve long sample lengths or short sample spacing.

  7. High speed transient sampler

    DOEpatents

    McEwan, T.E.

    1995-11-28

    A high speed sampler comprises a meandered sample transmission line for transmitting an input signal, a straight strobe transmission line for transmitting a strobe signal, and a plurality of sampling gates along the transmission lines. The sampling gates comprise a four terminal diode bridge having a first strobe resistor connected from a first terminal of the bridge to the positive strobe line, a second strobe resistor coupled from the third terminal of the bridge to the negative strobe line, a tap connected to the second terminal of the bridge and to the sample transmission line, and a sample holding capacitor connected to the fourth terminal of the bridge. The resistance of the first and second strobe resistors is much higher than the signal transmission line impedance in the preferred system. This results in a sampling gate which applies a very small load on the sample transmission line and on the strobe generator. The sample holding capacitor is implemented using a smaller capacitor and a larger capacitor isolated from the smaller capacitor by resistance. The high speed sampler of the present invention is also characterized by other optimizations, including transmission line tap compensation, stepped impedance strobe line, a multi-layer physical layout, and unique strobe generator design. A plurality of banks of such samplers are controlled for concatenated or interleaved sample intervals to achieve long sample lengths or short sample spacing. 17 figs.

  8. High-Voltage-Input Level Translator Using Standard CMOS

    NASA Technical Reports Server (NTRS)

    Yager, Jeremy A.; Mojarradi, Mohammad M.; Vo, Tuan A.; Blalock, Benjamin J.

    2011-01-01

    proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors

  9. High speed nozzles task

    NASA Technical Reports Server (NTRS)

    Hamed, Awatef

    1995-01-01

    Supersonic cruise exhaust nozzles for advanced applications are optimized for a high nozzle pressure ratio (NPR) at design supersonic cruise Mach number and altitude. The performance of these nozzles with large expansion ratios are severely degraded for operations at subsonic speeds near sea level for NPR significantly less than the design values. The prediction of over-expanded 2DCD nozzles performance is critical to evaluating the internal losses and to the optimization of the integrated vehicle and propulsion system performance. The reported research work was aimed at validating and assessing existing computational methods and turbulence models for predicting the flow characteristics and nozzle performance at over-expanded conditions. Flow simulations in 2DCD nozzles were performed using five different turbulence models. The results are compared with the experimental data for the wall pressure distribution and thrust and flow coefficients at over-expanded static conditions.

  10. HIGH SPEED CAMERA

    DOEpatents

    Rogers, B.T. Jr.; Davis, W.C.

    1957-12-17

    This patent relates to high speed cameras having resolution times of less than one-tenth microseconds suitable for filming distinct sequences of a very fast event such as an explosion. This camera consists of a rotating mirror with reflecting surfaces on both sides, a narrow mirror acting as a slit in a focal plane shutter, various other mirror and lens systems as well as an innage recording surface. The combination of the rotating mirrors and the slit mirror causes discrete, narrow, separate pictures to fall upon the film plane, thereby forming a moving image increment of the photographed event. Placing a reflecting surface on each side of the rotating mirror cancels the image velocity that one side of the rotating mirror would impart, so as a camera having this short a resolution time is thereby possible.

  11. High speed packet switching

    NASA Technical Reports Server (NTRS)

    1991-01-01

    This document constitutes the final report prepared by Proteon, Inc. of Westborough, Massachusetts under contract NAS 5-30629 entitled High-Speed Packet Switching (SBIR 87-1, Phase 2) prepared for NASA-Greenbelt, Maryland. The primary goal of this research project is to use the results of the SBIR Phase 1 effort to develop a sound, expandable hardware and software router architecture capable of forwarding 25,000 packets per second through the router and passing 300 megabits per second on the router's internal busses. The work being delivered under this contract received its funding from three different sources: the SNIPE/RIG contract (Contract Number F30602-89-C-0014, CDRL Sequence Number A002), the SBIR contract, and Proteon. The SNIPE/RIG and SBIR contracts had many overlapping requirements, which allowed the research done under SNIPE/RIG to be applied to SBIR. Proteon funded all of the work to develop new router interfaces other than FDDI, in addition to funding the productization of the router itself. The router being delivered under SBIR will be a fully product-quality machine. The work done during this contract produced many significant findings and results, summarized here and explained in detail in later sections of this report. The SNIPE/RIG contract was completed. That contract had many overlapping requirements with the SBIR contract, and resulted in the successful demonstration and delivery of a high speed router. The development that took place during the SNIPE/RIG contract produced findings that included the choice of processor and an understanding of the issues surrounding inter processor communications in a multiprocessor environment. Many significant speed enhancements to the router software were made during that time. Under the SBIR contract (and with help from Proteon-funded work), it was found that a single processor router achieved a throughput significantly higher than originally anticipated. For this reason, a single processor router was

  12. A 1-V TSPC Dual Modulus Prescaler with Speed Scalability Using Forward Body Biasing in 0.18µm CMOS

    NASA Astrophysics Data System (ADS)

    Shin, Hyunchol

    The operating speed scalability is demonstrated by using the forward body biasing method for a 1-V 0.18-µm CMOS true single-phase clocking (TSPC) dual-modulus prescaler. With the forward body bias voltage varying between 0 and 0.4V, the maximum operating speed changes by about 40-50% and the maximum input sensitivity frequency changes by about 400%. This speed scalability is achieved with less than 0.5-dB phase noise degradation. This demonstration indicates that the forward body biasing method is instrumental to build a cost-saving power-efficient 1-V 0.18-µm CMOS radio for low-power WBAN and WSN applications.

  13. A 128 x 128 CMOS Active Pixel Image Sensor for Highly Integrated Imaging Systems

    NASA Technical Reports Server (NTRS)

    Mendis, Sunetra K.; Kemeny, Sabrina E.; Fossum, Eric R.

    1993-01-01

    A new CMOS-based image sensor that is intrinsically compatible with on-chip CMOS circuitry is reported. The new CMOS active pixel image sensor achieves low noise, high sensitivity, X-Y addressability, and has simple timing requirements. The image sensor was fabricated using a 2 micrometer p-well CMOS process, and consists of a 128 x 128 array of 40 micrometer x 40 micrometer pixels. The CMOS image sensor technology enables highly integrated smart image sensors, and makes the design, incorporation and fabrication of such sensors widely accessible to the integrated circuit community.

  14. Monolithic CMOS-MEMS integration for high-g accelerometers

    NASA Astrophysics Data System (ADS)

    Narasimhan, Vinayak; Li, Holden; Tan, Chuan Seng

    2014-10-01

    This paper highlights work-in-progress towards the conceptualization, simulation, fabrication and initial testing of a silicon-germanium (SiGe) integrated CMOS-MEMS high-g accelerometer for military, munition, fuze and shock measurement applications. Developed on IMEC's SiGe MEMS platform, the MEMS offers a dynamic range of 5,000 g and a bandwidth of 12 kHz. The low noise readout circuit adopts a chopper-stabilization technique implementing the CMOS through the TSMC 0.18 µm process. The device structure employs a fully differential split comb-drive set up with two sets of stators and a rotor all driven separately. Dummy structures acting as protective over-range stops were designed to protect the active components when under impacts well above the designed dynamic range.

  15. Fully depleted, thick, monolithic CMOS pixels with high quantum efficiency

    NASA Astrophysics Data System (ADS)

    Clarke, A.; Stefanov, K.; Johnston, N.; Holland, A.

    2015-04-01

    The Centre for Electronic Imaging (CEI) has an active programme of evaluating and designing Complementary Metal-Oxide Semiconductor (CMOS) image sensors with high quantum efficiency, for applications in near-infrared and X-ray photon detection. This paper describes the performance characterisation of CMOS devices made on a high resistivity 50 μ m thick p-type substrate with a particular focus on determining the depletion depth and the quantum efficiency. The test devices contain 8 × 8 pixel arrays using CCD-style charge collection, which are manufactured in a low voltage CMOS process by ESPROS Photonics Corporation (EPC). Measurements include determining under which operating conditions the devices become fully depleted. By projecting a spot using a microscope optic and a LED and biasing the devices over a range of voltages, the depletion depth will change, causing the amount of charge collected in the projected spot to change. We determine if the device is fully depleted by measuring the signal collected from the projected spot. The analysis of spot size and shape is still under development.

  16. High speed civil transport

    NASA Technical Reports Server (NTRS)

    1991-01-01

    This report discusses the design and marketability of a next generation supersonic transport. Apogee Aeronautics Corporation has designated its High Speed Civil Transport (HSCT): Supercruiser HS-8. Since the beginning of the Concorde era, the general consensus has been that the proper time for the introduction of a next generation Supersonic Transport (SST) would depend upon the technical advances made in the areas of propulsion (reduction in emissions) and material composites (stronger, lighter materials). It is believed by many in the aerospace industry that these beforementioned technical advances lie on the horizon. With this being the case, this is the proper time to begin the design phase for the next generation HSCT. The design objective for a HSCT was to develop an aircraft that would be capable of transporting at least 250 passengers with baggage at a distance of 5500 nmi. The supersonic Mach number is currently unspecified. In addition, the design had to be marketable, cost effective, and certifiable. To achieve this goal, technical advances in the current SST's must be made, especially in the areas of aerodynamics and propulsion. As a result of these required aerodynamic advances, several different supersonic design concepts were reviewed.

  17. High resolution, high bandwidth global shutter CMOS area scan sensors

    NASA Astrophysics Data System (ADS)

    Faramarzpour, Naser; Sonder, Matthias; Li, Binqiao

    2013-10-01

    Global shuttering, sometimes also known as electronic shuttering, enables the use of CMOS sensors in a vast range of applications. Teledyne DALSA Global shutter sensors are able to integrate light synchronously across millions of pixels with microsecond accuracy. Teledyne DALSA offers 5 transistor global shutter pixels in variety of resolutions, pitches and noise and full-well combinations. One of the recent generations of these pixels is implemented in 12 mega pixel area scan device at 6 um pitch and that images up to 70 frames per second with 58 dB dynamic range. These square pixels include microlens and optional color filters. These sensors also offer exposure control, anti-blooming and high dynamic range operation by introduction of a drain and a PPD reset gate to the pixel. The state of the art sense node design of Teledyne DALSA's 5T pixel offers exceptional shutter rejection ratio. The architecture is consistent with the requirements to use stitching to achieve very large area scan devices. Parallel or serial digital output is provided on these sensors using on-chip, column-wise analog to digital converters. Flexible ADC bit depth combined with windowing (adjustable region of interest, ROI) allows these sensors to run with variety of resolution/bandwidth combinations. The low power, state of the art LVDS I/O technology allows for overall power consumptions of less than 2W at full performance conditions.

  18. Ultra-fast high-resolution hybrid and monolithic CMOS imagers in multi-frame radiography

    NASA Astrophysics Data System (ADS)

    Kwiatkowski, Kris; Douence, Vincent; Bai, Yibin; Nedrow, Paul; Mariam, Fesseha; Merrill, Frank; Morris, Christopher L.; Saunders, Andy

    2014-09-01

    A new burst-mode, 10-frame, hybrid Si-sensor/CMOS-ROIC FPA chip has been recently fabricated at Teledyne Imaging Sensors. The intended primary use of the sensor is in the multi-frame 800 MeV proton radiography at LANL. The basic part of the hybrid is a large (48×49 mm2) stitched CMOS chip of 1100×1100 pixel count, with a minimum shutter speed of 50 ns. The performance parameters of this chip are compared to the first generation 3-frame 0.5-Mpixel custom hybrid imager. The 3-frame cameras have been in continuous use for many years, in a variety of static and dynamic experiments at LANSCE. The cameras can operate with a per-frame adjustable integration time of ~ 120ns-to- 1s, and inter-frame time of 250ns to 2s. Given the 80 ms total readout time, the original and the new imagers can be externally synchronized to 0.1-to-5 Hz, 50-ns wide proton beam pulses, and record up to ~1000-frame radiographic movies typ. of 3-to-30 minute duration. The performance of the global electronic shutter is discussed and compared to that of a high-resolution commercial front-illuminated monolithic CMOS imager.

  19. High total dose effects on CMOS/SOI technology

    SciTech Connect

    Flament, O.; Dupont-Nivet, E.; Leray, J.L.; Pere, J.F.; Delagnes, E. ); Auberton-Herve, A.J.; Giffard, B. ); Borel, G.; Ouisse, T. )

    1992-06-01

    This paper reports that, CMOS silicon on insulator technology has shown its ability to process hardened components which remain functional after irradiation with a total dose of several tens of Megarads. New tests on elementary transistors and 29101 microprocessor have been made at doses up to 100 Mrad (SiO{sub 2}) and above. Results of irradiation at these total doses are presented for different biases, together with the post-irradiation behavior of the components. All the observations show that new parameters must be taken into account for hardness insurance at a high level of total dose.

  20. A CMOS In-Pixel CTIA High Sensitivity Fluorescence Imager

    PubMed Central

    Murari, Kartikeya; Etienne-Cummings, Ralph; Thakor, Nitish; Cauwenberghs, Gert

    2012-01-01

    Traditionally, charge coupled device (CCD) based image sensors have held sway over the field of biomedical imaging. Complementary metal oxide semiconductor (CMOS) based imagers so far lack sensitivity leading to poor low-light imaging. Certain applications including our work on animal-mountable systems for imaging in awake and unrestrained rodents require the high sensitivity and image quality of CCDs and the low power consumption, flexibility and compactness of CMOS imagers. We present a 132×124 high sensitivity imager array with a 20.1 μm pixel pitch fabricated in a standard 0.5 μ CMOS process. The chip incorporates n-well/p-sub photodiodes, capacitive transimpedance amplifier (CTIA) based in-pixel amplification, pixel scanners and delta differencing circuits. The 5-transistor all-nMOS pixel interfaces with peripheral pMOS transistors for column-parallel CTIA. At 70 fps, the array has a minimum detectable signal of 4 nW/cm2 at a wavelength of 450 nm while consuming 718 μA from a 3.3 V supply. Peak signal to noise ratio (SNR) was 44 dB at an incident intensity of 1 μW/cm2. Implementing 4×4 binning allowed the frame rate to be increased to 675 fps. Alternately, sensitivity could be increased to detect about 0.8 nW/cm2 while maintaining 70 fps. The chip was used to image single cell fluorescence at 28 fps with an average SNR of 32 dB. For comparison, a cooled CCD camera imaged the same cell at 20 fps with an average SNR of 33.2 dB under the same illumination while consuming over a watt. PMID:23136624

  1. High-Speed Electrochemical Imaging.

    PubMed

    Momotenko, Dmitry; Byers, Joshua C; McKelvey, Kim; Kang, Minkyung; Unwin, Patrick R

    2015-09-22

    The design, development, and application of high-speed scanning electrochemical probe microscopy is reported. The approach allows the acquisition of a series of high-resolution images (typically 1000 pixels μm(-2)) at rates approaching 4 seconds per frame, while collecting up to 8000 image pixels per second, about 1000 times faster than typical imaging speeds used up to now. The focus is on scanning electrochemical cell microscopy (SECCM), but the principles and practicalities are applicable to many electrochemical imaging methods. The versatility of the high-speed scan concept is demonstrated at a variety of substrates, including imaging the electroactivity of a patterned self-assembled monolayer on gold, visualization of chemical reactions occurring at single wall carbon nanotubes, and probing nanoscale electrocatalysts for water splitting. These studies provide movies of spatial variations of electrochemical fluxes as a function of potential and a platform for the further development of high speed scanning with other electrochemical imaging techniques. PMID:26267455

  2. SEAL FOR HIGH SPEED CENTRIFUGE

    DOEpatents

    Skarstrom, C.W.

    1957-12-17

    A seal is described for a high speed centrifuge wherein the centrifugal force of rotation acts on the gasket to form a tight seal. The cylindrical rotating bowl of the centrifuge contains a closure member resting on a shoulder in the bowl wall having a lower surface containing bands of gasket material, parallel and adjacent to the cylinder wall. As the centrifuge speed increases, centrifugal force acts on the bands of gasket material forcing them in to a sealing contact against the cylinder wall. This arrangememt forms a simple and effective seal for high speed centrifuges, replacing more costly methods such as welding a closure in place.

  3. Gated high speed optical detector

    NASA Technical Reports Server (NTRS)

    Green, S. I.; Carson, L. M.; Neal, G. W.

    1973-01-01

    The design, fabrication, and test of two gated, high speed optical detectors for use in high speed digital laser communication links are discussed. The optical detectors used a dynamic crossed field photomultiplier and electronics including dc bias and RF drive circuits, automatic remote synchronization circuits, automatic gain control circuits, and threshold detection circuits. The equipment is used to detect binary encoded signals from a mode locked neodynium laser.

  4. A high-speed, high fan-in dynamic comparator with low transistor count

    NASA Astrophysics Data System (ADS)

    Wey, I.-Chyn; He, Tz-Cheng; Chow, Hwang-Cherng; Sun, Pie-Hsien; Peng, Chien-Chang

    2014-05-01

    In this article, we proposed a high-speed, high fan-in dynamic CMOS comparator with low transistor count. Our approach is to construct the dynamic comparator based on the prior superiority of dynamic CMOS comparator and to further enhance its operating speed. Constructing the comparator with dynamic CMOS architecture, we can save 63.2% transistor count as compared with the conventional static CMOS design. The main contribution to accelerate the speed of dynamic comparator is to solve the problem of 'weak 0' existing in the PMOS of pull-down network. Instead, as an alternate to PMOS in the pull-down network, we use NMOS combined with an additional inverter in the front of the NMOS input gate. In this way, we can perform the same function as PMOS, but transmitting with both 'good 1' and 'good 0'. As a result, the proposed dynamic comparator can operate with lower propagation delay in the pull-down network. Finally, the proposed 64-bit dynamic comparator circuit can operate correctly under a clock frequency of 450 MHz with 0.18 µm technology while the prior circuit can only operate under 250 MHz at the same time.

  5. High responsivity CMOS imager pixel implemented in SOI technology

    NASA Technical Reports Server (NTRS)

    Zheng, X.; Wrigley, C.; Yang, G.; Pain, B.

    2000-01-01

    Availability of mature sub-micron CMOS technology and the advent of the new low noise active pixel sensor (APS) concept have enabled the development of low power, miniature, single-chip, CMOS digital imagers in the decade of the 1990's.

  6. High speed optical networks

    NASA Astrophysics Data System (ADS)

    Frankel, Michael Y.; Livas, Jeff

    2005-02-01

    This overview will discuss core network technology and cost trade-offs inherent in choosing between "analog" architectures with high optical transparency, and ones heavily dependent on frequent "digital" signal regeneration. The exact balance will be related to the specific technology choices in each area outlined above, as well as the network needs such as node geographic spread, physical connectivity patterns, and demand loading. Over the course of a decade, optical networks have evolved from simple single-channel SONET regenerator-based links to multi-span multi-channel optically amplified ultra-long haul systems, fueled by high demand for bandwidth at reduced cost. In general, the cost of a well-designed high capacity system is dominated by the number of optical to electrical (OE) and electrical to optical (EO) conversions required. As the reach and channel capacity of the transport systems continued to increase, it became necessary to improve the granularity of the demand connections by introducing (optical add/drop multiplexers) OADMs. Thus, if a node requires only small demand connectivity, most of the optical channels are expressed through without regeneration (OEO). The network costs are correspondingly reduced, partially balanced by the increased cost of the OADM nodes. Lately, the industry has been aggressively pursuing a natural extension of this philosophy towards all-optical "analog" core networks, with each demand touching electrical digital circuitry only at the in/egress nodes. This is expected to produce a substantial elimination of OEO costs, increase in network capacity, and a notionally simpler operation and service turn-up. At the same time, such optical "analog" network requires a large amount of complicated hardware and software for monitoring and manipulating high bit rate optical signals. New and more complex modulation formats that provide resiliency to both optical noise and nonlinear propagation effects are important for extended

  7. Superplane! High Speed Civil Transport

    NASA Technical Reports Server (NTRS)

    1998-01-01

    The High Speed Civil Transport (HSCT). This light-hearted promotional piece explains what the HSCT 'Superplane' is and what advantages it will have over current aircraft. As envisioned, the HSCT is a next-generation supersonic (faster than the speed of sound) passenger jet that would fly 300 passengers at more than 1,500 miles per hour -- more than twice the speed of sound. It will cross the Pacific or Atlantic in less than half the time of modern subsonic jets, and at a ticket price less than 20 percent above comparable, slower flights

  8. Flexible high speed CODEC

    NASA Technical Reports Server (NTRS)

    Wernlund, James V.

    1993-01-01

    HARRIS, under contract with NASA Lewis, has developed a hard decision BCH (Bose-Chaudhuri-Hocquenghem) triple error correcting block CODEC ASIC, that can be used in either a bursted or continuous mode. the ASIC contains both encoder and decoder functions, programmable lock thresholds, and PSK related functions. The CODEC provides up to 4 dB of coding gain for data rates up to 300 Mbps. The overhead is selectable from 7/8 to 15/16 resulting in minimal band spreading, for a given BER. Many of the internal calculations are brought out enabling the CODEC to be incorporated in more complex designs. The ASIC has been tested in BPSK, QPSK and 16-ary PSK link simulators and found to perform to within 0.1 dB of theory for BER's of 10(exp -2) to 10(exp -9). The ASIC itself, being a hard decision CODEC, is not limited to PSK modulation formats. Unlike most hard decision CODEC's, the HARRIS CODEC doesn't upgrade BER performance significantly at high BER's but rather becomes transparent.

  9. Flexible high speed CODEC

    NASA Astrophysics Data System (ADS)

    Wernlund, James V.

    1993-02-01

    HARRIS, under contract with NASA Lewis, has developed a hard decision BCH (Bose-Chaudhuri-Hocquenghem) triple error correcting block CODEC ASIC, that can be used in either a bursted or continuous mode. the ASIC contains both encoder and decoder functions, programmable lock thresholds, and PSK related functions. The CODEC provides up to 4 dB of coding gain for data rates up to 300 Mbps. The overhead is selectable from 7/8 to 15/16 resulting in minimal band spreading, for a given BER. Many of the internal calculations are brought out enabling the CODEC to be incorporated in more complex designs. The ASIC has been tested in BPSK, QPSK and 16-ary PSK link simulators and found to perform to within 0.1 dB of theory for BER's of 10(exp -2) to 10(exp -9). The ASIC itself, being a hard decision CODEC, is not limited to PSK modulation formats. Unlike most hard decision CODEC's, the HARRIS CODEC doesn't upgrade BER performance significantly at high BER's but rather becomes transparent.

  10. A 4MP high-dynamic-range, low-noise CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Ma, Cheng; Liu, Yang; Li, Jing; Zhou, Quan; Chang, Yuchun; Wang, Xinyang

    2015-03-01

    In this paper we present a 4 Megapixel high dynamic range, low dark noise and dark current CMOS image sensor, which is ideal for high-end scientific and surveillance applications. The pixel design is based on a 4-T PPD structure. During the readout of the pixel array, signals are first amplified, and then feed to a low- power column-parallel ADC array which is already presented in [1]. Measurement results show that the sensor achieves a dynamic range of 96dB, a dark noise of 1.47e- at 24fps speed. The dark current is 0.15e-/pixel/s at -20oC.

  11. Design of a high performance CMOS charge pump for phase-locked loop synthesizers

    NASA Astrophysics Data System (ADS)

    Zhiqun, Li; Shuangshuang, Zheng; Ningbing, Hou

    2011-07-01

    A new high performance charge pump circuit is designed and realized in 0.18 μm CMOS process. A wide input ranged rail-to-rail operational amplifier and self-biasing cascode current mirror are used to enable the charge pump current to be well matched in a wide output voltage range. Furthermore, a method of adding a precharging current source is proposed to increase the initial charge current, which will speed up the settling time of CPPLLs. Test results show that the current mismatching can be less than 0.4% in the output voltage range of 0.4 to 1.7 V, with a charge pump current of 100 μA and a precharging current of 70 μA. The average power consumption of the charge pump in the locked condition is around 0.9 mW under a 1.8 V supply voltage.

  12. Nonlinear optical signal processing in high figure of merit CMOS compatible platforms

    NASA Astrophysics Data System (ADS)

    Moss, D. J.; Morandotti, R.

    2015-05-01

    Photonic integrated circuits that exploit nonlinear optics in order to generate and process signals all-optically have achieved performance far superior to that possible electronically - particularly with respect to speed. Although silicon-on-insulator has been the leading platform for nonlinear optics for some time, its high two-photon absorption at telecommunications wavelengths poses a fundamental limitation. We review the recent achievements based in new CMOS-compatible platforms that are better suited than SOI for nonlinear optics, focusing on amorphous silicon and Hydex glass. We highlight their potential as well as the challenges to achieving practical solutions for many key applications. These material systems have opened up many new capabilities such as on-chip optical frequency comb generation and ultrafast optical pulse generation and measurement.

  13. High-speed stereoscopy of aurora

    NASA Astrophysics Data System (ADS)

    Kataoka, R.; Fukuda, Y.; Uchida, H. A.; Yamada, H.; Miyoshi, Y.; Ebihara, Y.; Dahlgren, H.; Hampton, D.

    2016-01-01

    We performed 100 fps stereoscopic imaging of aurora for the first time. Two identical sCMOS cameras equipped with narrow field-of-view lenses (15° by 15°) were directed at magnetic zenith with the north-south base distance of 8.1 km. Here we show the best example that a rapidly pulsating diffuse patch and a streaming discrete arc were observed at the same time with different parallaxes, and the emission altitudes were estimated as 85-95 km and > 100 km, respectively. The estimated emission altitudes are consistent with those estimated in previous studies, and it is suggested that high-speed stereoscopy is useful to directly measure the emission altitudes of various types of rapidly varying aurora. It is also found that variation of emission altitude is gradual (e.g., 10 km increase over 5 s) for pulsating patches and is fast (e.g., 10 km increase within 0.5 s) for streaming arcs.

  14. High speed multiwire photon camera

    NASA Technical Reports Server (NTRS)

    Lacy, Jeffrey L. (Inventor)

    1991-01-01

    An improved multiwire proportional counter camera having particular utility in the field of clinical nuclear medicine imaging. The detector utilizes direct coupled, low impedance, high speed delay lines, the segments of which are capacitor-inductor networks. A pile-up rejection test is provided to reject confused events otherwise caused by multiple ionization events occuring during the readout window.

  15. High speed multiwire photon camera

    NASA Technical Reports Server (NTRS)

    Lacy, Jeffrey L. (Inventor)

    1989-01-01

    An improved multiwire proportional counter camera having particular utility in the field of clinical nuclear medicine imaging. The detector utilizes direct coupled, low impedance, high speed delay lines, the segments of which are capacitor-inductor networks. A pile-up rejection test is provided to reject confused events otherwise caused by multiple ionization events occurring during the readout window.

  16. High speed laser tomography system.

    PubMed

    Samsonov, D; Elsaesser, A; Edwards, A; Thomas, H M; Morfill, G E

    2008-03-01

    A high speed laser tomography system was developed capable of acquiring three-dimensional (3D) images of optically thin clouds of moving micron-sized particles. It operates by parallel-shifting an illuminating laser sheet with a pair of galvanometer-driven mirrors and synchronously recording two-dimensional (2D) images of thin slices of the imaged volume. The maximum scanning speed achieved was 120,000 slices/s, sequences of 24 volume scans (up to 256 slices each) have been obtained. The 2D slices were stacked to form 3D images of the volume, then the positions of the particles were identified and followed in the consecutive scans. The system was used to image a complex plasma with particles moving at speeds up to cm/s. PMID:18377040

  17. Integrated, nonvolatile, high-speed analog random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

    1994-01-01

    This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

  18. Correct CMOS IC defect models for quality testing

    NASA Technical Reports Server (NTRS)

    Soden, Jerry M.; Hawkins, Charles F.

    1993-01-01

    Leading edge, high reliability, and low escape CMOS IC test practices have now virtually removed the stuck-at fault model and replaced it with more defect-orientated models. Quiescent power supply current testing (I(sub DDQ)) combined with strategic use of high speed test patterns is the recommended approach to zero defect and high reliability testing goals. This paper reviews the reasons for the change in CMOS IC test practices and outlines an improved CMOS IC test methodology.

  19. Results of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype

    NASA Astrophysics Data System (ADS)

    Benoit, M.; Bilbao de Mendizabal, J.; Casse, G.; Chen, H.; Chen, K.; Di Bello, F. A.; Ferrere, D.; Golling, T.; Gonzalez-Sevilla, S.; Iacobucci, G.; Lanni, F.; Liu, H.; Meloni, F.; Meng, L.; Miucci, A.; Muenstermann, D.; Nessi, M.; Perić, I.; Rimoldi, M.; Ristic, B.; Barrero Pinto, M. Vicente; Vossebeld, J.; Weber, M.; Wu, W.; Xu, L.

    2016-07-01

    Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

  20. High-content analysis of single cells directly assembled on CMOS sensor based on color imaging.

    PubMed

    Tanaka, Tsuyoshi; Saeki, Tatsuya; Sunaga, Yoshihiko; Matsunaga, Tadashi

    2010-12-15

    A complementary metal oxide semiconductor (CMOS) image sensor was applied to high-content analysis of single cells which were assembled closely or directly onto the CMOS sensor surface. The direct assembling of cell groups on CMOS sensor surface allows large-field (6.66 mm×5.32 mm in entire active area of CMOS sensor) imaging within a second. Trypan blue-stained and non-stained cells in the same field area on the CMOS sensor were successfully distinguished as white- and blue-colored images under white LED light irradiation. Furthermore, the chemiluminescent signals of each cell were successfully visualized as blue-colored images on CMOS sensor only when HeLa cells were placed directly on the micro-lens array of the CMOS sensor. Our proposed approach will be a promising technique for real-time and high-content analysis of single cells in a large-field area based on color imaging. PMID:20728336

  1. Hardware-based image processing for high-speed inspection of grains

    Technology Transfer Automated Retrieval System (TEKTRAN)

    A high-speed, low-cost, image-based sorting device was developed to detect and separate grains with slight color differences and small defects on grains The device directly combines a complementary metal–oxide–semiconductor (CMOS) color image sensor with a field-programmable gate array (FPGA) which...

  2. High-speed sorting of grains by color and surface texture

    Technology Transfer Automated Retrieval System (TEKTRAN)

    A high-speed, low-cost, image-based sorting device was developed to detect and separate grains with different colors/textures. The device directly combines a complementary metal–oxide–semiconductor (CMOS) color image sensor with a field-programmable gate array (FPGA) that was programmed to execute ...

  3. High speed COMS image acquisition and transmission system based on USB

    NASA Astrophysics Data System (ADS)

    Cui, Yundong; Jiang, Jie; Zhang, Guangjun

    2008-10-01

    A high speed CMOS image acquisition and transmission system, which is composed of CMOS image sensor IBIS5-A-1300, USB 2.0 interface chip EZ-USB FX2 and FPGA (Field Programmable Gate Array), is designed and developed. The design of IBIS5-A-1300 driving timing, USB interface chip timing, firmware and application program are introduced. Experiments show that the system possesses the advantage of high resolution and high frame rate, supports single frame acquisition and video preview and fits the criterion of USB2.0 and the demand of real-time data transmission.

  4. Experiments on high speed ejectors

    NASA Technical Reports Server (NTRS)

    Wu, J. J.

    1986-01-01

    Experimental studies were conducted to investigate the flow and the performance of thrust augmenting ejectors for flight Mach numbers in the range of 0.5 to 0.8, primary air stagnation pressures up to 107 psig (738 kPa), and primary air stagnation temperatures up to 1250 F (677 C). The experiment verified the existence of the second solution ejector flow, where the flow after complete mixing is supersonic. Thrust augmentation in excess of 1.2 was demonstrated for both hot and cold primary jets. The experimental ejector performed better than the corresponding theoretical optimal first solution ejector, where the mixed flow is subsonic. Further studies are required to realize the full potential of the second solution ejector. The research program was started by the Flight Dynamics Research Corporation (FDRC) to investigate the characteristic of a high speed ejector which augments thrust of a jet at high flight speeds.

  5. Small Scale High Speed Turbomachinery

    NASA Technical Reports Server (NTRS)

    London, Adam P. (Inventor); Droppers, Lloyd J. (Inventor); Lehman, Matthew K. (Inventor); Mehra, Amitav (Inventor)

    2015-01-01

    A small scale, high speed turbomachine is described, as well as a process for manufacturing the turbomachine. The turbomachine is manufactured by diffusion bonding stacked sheets of metal foil, each of which has been pre-formed to correspond to a cross section of the turbomachine structure. The turbomachines include rotating elements as well as static structures. Using this process, turbomachines may be manufactured with rotating elements that have outer diameters of less than four inches in size, and/or blading heights of less than 0.1 inches. The rotating elements of the turbomachines are capable of rotating at speeds in excess of 150 feet per second. In addition, cooling features may be added internally to blading to facilitate cooling in high temperature operations.

  6. Design considerations for a new, high resolution Micro-Angiographic Fluoroscope based on a CMOS sensor (MAF-CMOS)

    PubMed Central

    Loughran, Brendan; Swetadri Vasan, S. N.; Singh, Vivek; Ionita, Ciprian N.; Jain, Amit; Bednarek, Daniel R.; Titus, Albert; Rudin, Stephen

    2013-01-01

    The detectors that are used for endovascular image-guided interventions (EIGI), particularly for neurovascular interventions, do not provide clinicians with adequate visualization to ensure the best possible treatment outcomes. Developing an improved x-ray imaging detector requires the determination of estimated clinical x-ray entrance exposures to the detector. The range of exposures to the detector in clinical studies was found for the three modes of operation: fluoroscopic mode, high frame-rate digital angiographic mode (HD fluoroscopic mode), and DSA mode. Using these estimated detector exposure ranges and available CMOS detector technical specifications, design requirements were developed to pursue a quantum limited, high resolution, dynamic x-ray detector based on a CMOS sensor with 50 μm pixel size. For the proposed MAF-CMOS, the estimated charge collected within the full exposure range was found to be within the estimated full well capacity of the pixels. Expected instrumentation noise for the proposed detector was estimated to be 50–1,300 electrons. Adding a gain stage such as a light image intensifier would minimize the effect of the estimated instrumentation noise on total image noise but may not be necessary to ensure quantum limited detector operation at low exposure levels. A recursive temporal filter may decrease the effective total noise by 2 to 3 times, allowing for the improved signal to noise ratios at the lowest estimated exposures despite consequent loss in temporal resolution. This work can serve as a guide for further development of dynamic x-ray imaging prototypes or improvements for existing dynamic x-ray imaging systems. PMID:24353389

  7. Design considerations for a new, high resolution Micro-Angiographic Fluoroscope based on a CMOS sensor (MAF-CMOS).

    PubMed

    Loughran, Brendan; Swetadri Vasan, S N; Singh, Vivek; Ionita, Ciprian N; Jain, Amit; Bednarek, Daniel R; Titus, Albert; Rudin, Stephen

    2013-03-01

    The detectors that are used for endovascular image-guided interventions (EIGI), particularly for neurovascular interventions, do not provide clinicians with adequate visualization to ensure the best possible treatment outcomes. Developing an improved x-ray imaging detector requires the determination of estimated clinical x-ray entrance exposures to the detector. The range of exposures to the detector in clinical studies was found for the three modes of operation: fluoroscopic mode, high frame-rate digital angiographic mode (HD fluoroscopic mode), and DSA mode. Using these estimated detector exposure ranges and available CMOS detector technical specifications, design requirements were developed to pursue a quantum limited, high resolution, dynamic x-ray detector based on a CMOS sensor with 50 μm pixel size. For the proposed MAF-CMOS, the estimated charge collected within the full exposure range was found to be within the estimated full well capacity of the pixels. Expected instrumentation noise for the proposed detector was estimated to be 50-1,300 electrons. Adding a gain stage such as a light image intensifier would minimize the effect of the estimated instrumentation noise on total image noise but may not be necessary to ensure quantum limited detector operation at low exposure levels. A recursive temporal filter may decrease the effective total noise by 2 to 3 times, allowing for the improved signal to noise ratios at the lowest estimated exposures despite consequent loss in temporal resolution. This work can serve as a guide for further development of dynamic x-ray imaging prototypes or improvements for existing dynamic x-ray imaging systems. PMID:24353389

  8. Design considerations for a new high resolution Micro-Angiographic Fluoroscope based on a CMOS sensor (MAF-CMOS)

    NASA Astrophysics Data System (ADS)

    Loughran, Brendan; Swetadri Vasan, S. N.; Singh, Vivek; Ionita, Ciprian N.; Jain, Amit; Bednarek, Daniel R.; Titus, Albert H.; Rudin, Stephen

    2013-03-01

    The detectors that are used for endovascular image-guided interventions (EIGI), particularly for neurovascular interventions, do not provide clinicians with adequate visualization to ensure the best possible treatment outcomes. Developing an improved x-ray imaging detector requires the determination of estimated clinical x-ray entrance exposures to the detector. The range of exposures to the detector in clinical studies was found for the three modes of operation: fluoroscopic mode, high frame-rate digital angiographic mode (HD fluoroscopic mode), and DSA mode. Using these estimated detector exposure ranges and available CMOS detector technical specifications, design requirements were developed to pursue a quantum limited, high resolution, dynamic x-ray detector based on a CMOS sensor with 50 μm pixel size. For the proposed MAF-CMOS, the estimated charge collected within the full exposure range was found to be within the estimated full well capacity of the pixels. Expected instrumentation noise for the proposed detector was estimated to be 50-1,300 electrons. Adding a gain stage such as a light image intensifier would minimize the effect of the estimated instrumentation noise on total image noise but may not be necessary to ensure quantum limited detector operation at low exposure levels. A recursive temporal filter may decrease the effective total noise by 2 to 3 times, allowing for the improved signal to noise ratios at the lowest estimated exposures despite consequent loss in temporal resolution. This work can serve as a guide for further development of dynamic x-ray imaging prototypes or improvements for existing dynamic x-ray imaging systems.

  9. Faster Is Better: High-Speed Modems.

    ERIC Educational Resources Information Center

    Roth, Cliff

    1995-01-01

    Discusses using high-speed modems to access the Internet. Examines internal and external modems, data speeds, compression and error reduction, faxing and voice capabilities, and software features. Considers ISDN (Integrated Services Digital Network) as the future replacement of high-speed modems. Sidebars present high-speed modem product…

  10. High-Speed TCP Testing

    NASA Technical Reports Server (NTRS)

    Brooks, David E.; Gassman, Holly; Beering, Dave R.; Welch, Arun; Hoder, Douglas J.; Ivancic, William D.

    1999-01-01

    Transmission Control Protocol (TCP) is the underlying protocol used within the Internet for reliable information transfer. As such, there is great interest to have all implementations of TCP efficiently interoperate. This is particularly important for links exhibiting long bandwidth-delay products. The tools exist to perform TCP analysis at low rates and low delays. However, for extremely high-rate and lone-delay links such as 622 Mbps over geosynchronous satellites, new tools and testing techniques are required. This paper describes the tools and techniques used to analyze and debug various TCP implementations over high-speed, long-delay links.

  11. A single shot TDC with 4.8 ps resolution in 40 nm CMOS for high energy physics applications

    NASA Astrophysics Data System (ADS)

    Prinzie, J.; Steyaert, M.; Leroux, P.

    2015-01-01

    A robust TDC with 4.8 ps bin width has been designed for harsh environments and high energy physics applications. The circuit uses resistive interpolation DLL with a novel dual phase detector architecture. This architecture improves startup- and recovery speed from single event strikes without control voltage ripple trade-off and requires no off-line calibrations. A 0.43 LSB DNL has been measured at a power consumption of 4.2 mW with an extended frequency range from 0.8 GHz to 2.4 GHz. The TDC has been processed in 40 nm CMOS technology.

  12. Quiet High-Speed Fan

    NASA Technical Reports Server (NTRS)

    Lieber, Lysbeth; Repp, Russ; Weir, Donald S.

    1996-01-01

    A calibration of the acoustic and aerodynamic prediction methods was performed and a baseline fan definition was established and evaluated to support the quiet high speed fan program. A computational fluid dynamic analysis of the NASA QF-12 Fan rotor, using the DAWES flow simulation program was performed to demonstrate and verify the causes of the relatively poor aerodynamic performance observed during the fan test. In addition, the rotor flowfield characteristics were qualitatively compared to the acoustic measurements to identify the key acoustic characteristics of the flow. The V072 turbofan source noise prediction code was used to generate noise predictions for the TFE731-60 fan at three operating conditions and compared to experimental data. V072 results were also used in the Acoustic Radiation Code to generate far field noise for the TFE731-60 nacelle at three speed points for the blade passage tone. A full 3-D viscous flow simulation of the current production TFE731-60 fan rotor was performed with the DAWES flow analysis program. The DAWES analysis was used to estimate the onset of multiple pure tone noise, based on predictions of inlet shock position as a function of the rotor tip speed. Finally, the TFE731-60 fan rotor wake structure predicted by the DAWES program was used to define a redesigned stator with the leading edge configured to minimize the acoustic effects of rotor wake / stator interaction, without appreciably degrading performance.

  13. High-speed phosphor thermometry.

    PubMed

    Fuhrmann, N; Baum, E; Brübach, J; Dreizler, A

    2011-10-01

    Phosphor thermometry is a semi-invasive surface temperature measurement technique utilising the luminescence properties of doped ceramic materials. Typically, these phosphor materials are coated onto the object of interest and are excited by a short UV laser pulse. Up to now, primarily Q-switched laser systems with repetition rates of 10 Hz were employed for excitation. Accordingly, this diagnostic tool was not applicable to resolve correlated temperature transients at time scales shorter than 100 ms. This contribution reports on the first realisation of a high-speed phosphor thermometry system employing a highly repetitive laser in the kHz regime and a fast decaying phosphor. A suitable material was characterised regarding its temperature lifetime characteristic and its measurement precision. Additionally, the influence of laser power on the phosphor coating was investigated in terms of heating effects. A demonstration of this high-speed technique has been conducted inside the thermally highly transient system of an optically accessible internal combustion engine. Temperatures have been measured with a repetition rate of 6 kHz corresponding to one sample per crank angle degree at 1000 rpm. PMID:22047319

  14. Flexible high-speed CODEC

    NASA Technical Reports Server (NTRS)

    Segallis, Greg P.; Wernlund, Jim V.; Corry, Glen

    1993-01-01

    This report is prepared by Harris Government Communication Systems Division for NASA Lewis Research Center under contract NAS3-25087. It is written in accordance with SOW section 4.0 (d) as detailed in section 2.6. The purpose of this document is to provide a summary of the program, performance results and analysis, and a technical assessment. The purpose of this program was to develop a flexible, high-speed CODEC that provides substantial coding gain while maintaining bandwidth efficiency for use in both continuous and bursted data environments for a variety of applications.

  15. High speed quantitative digital microscopy

    NASA Technical Reports Server (NTRS)

    Castleman, K. R.; Price, K. H.; Eskenazi, R.; Ovadya, M. M.; Navon, M. A.

    1984-01-01

    Modern digital image processing hardware makes possible quantitative analysis of microscope images at high speed. This paper describes an application to automatic screening for cervical cancer. The system uses twelve MC6809 microprocessors arranged in a pipeline multiprocessor configuration. Each processor executes one part of the algorithm on each cell image as it passes through the pipeline. Each processor communicates with its upstream and downstream neighbors via shared two-port memory. Thus no time is devoted to input-output operations as such. This configuration is expected to be at least ten times faster than previous systems.

  16. A high speed sequential decoder

    NASA Technical Reports Server (NTRS)

    Lum, H., Jr.

    1972-01-01

    The performance and theory of operation for the High Speed Hard Decision Sequential Decoder are delineated. The decoder is a forward error correction system which is capable of accepting data from binary-phase-shift-keyed and quadriphase-shift-keyed modems at input data rates up to 30 megabits per second. Test results show that the decoder is capable of maintaining a composite error rate of 0.00001 at an input E sub b/N sub o of 5.6 db. This performance has been obtained with minimum circuit complexity.

  17. Towards a 10 μs, thin and high resolution pixelated CMOS sensor system for future vertex detectors

    NASA Astrophysics Data System (ADS)

    De Masi, R.; Amar-Youcef, S.; Baudot, J.; Bertolone, G.; Brogna, A.; Chon-Sen, N.; Claus, G.; Colledani, C.; Degerli, Y.; Deveaux, M.; Dorokhov, A.; Doziére, G.; Dulinski, W.; Gelin, M.; Goffe, M.; Fontaine, J. C.; Hu-Guo, Ch.; Himmi, A.; Jaaskelainen, K.; Koziel, M.; Morel, F.; Müntz, C.; Orsini, F.; Santos, C.; Schrader, C.; Specht, M.; Stroth, J.; Valin, I.; Voutsinas, G.; Wagner, F. M.; Winter, M.

    2011-02-01

    The physics goals of many high energy experiments require a precise determination of decay vertices, imposing severe constraints on vertex detectors (readout speed, granularity, material budget,…). The IPHC-IRFU collaboration developed a sensor architecture to comply with these requirements. The first full scale CMOS sensor was realised and equips the reference planes of the EUDET beam telescope. Its architecture is being adapted to the needs of the STAR (RHIC) and CBM (FAIR) experiments. It is a promising candidate for the ILC experiments and the ALICE detector upgrade (LHC). A substantial improvement to the CMOS sensor performances, especially in terms of radiation hardness, should come from a new fabrication technology with depleted sensitive volume. A prototype sensor was fabricated to explore the benefits of the technology. The crucial system integration issue is also currently being addressed. In 2009 the PLUME collaboration was set up to investigate the feasibility and performances of a light double sided ladder equipped with CMOS sensors, aimed primarily for the ILC vertex detector but also of interest for other applications such as the CBM vertex detector.

  18. Development of High Speed Digital Camera: EXILIM EX-F1

    NASA Astrophysics Data System (ADS)

    Nojima, Osamu

    The EX-F1 is a high speed digital camera featuring a revolutionary improvement in burst shooting speed that is expected to create entirely new markets. This model incorporates a high speed CMOS sensor and a high speed LSI processor. With this model, CASIO has achieved an ultra-high speed 60 frames per second (fps) burst rate for still images, together with 1,200 fps high speed movie that captures movements which cannot even be seen by human eyes. Moreover, this model can record movies at full High-Definition. After launching it into the market, it was able to get a lot of high appraisals as an innovation camera. We will introduce the concept, features and technologies about the EX-F1.

  19. Remote Transmission at High Speed

    NASA Technical Reports Server (NTRS)

    2003-01-01

    Omni and NASA Test Operations at Stennis entered a Dual-Use Agreement to develop the FOTR-125, a 125 megabit-per-second fiber-optic transceiver that allows accurate digital recordings over a great distance. The transceiver s fiber-optic link can be as long as 25 kilometers. This makes it much longer than the standard coaxial link, which can be no longer than 50 meters.The FOTR-125 utilizes laser diode transmitter modules and integrated receivers for the optical interface. Two transmitters and two receivers are employed at each end of the link with automatic or manual switchover to maximize the reliability of the communications link. NASA uses the transceiver in Stennis High-Speed Data Acquisition System (HSDAS). The HSDAS consists of several identical systems installed on the Center s test stands to process all high-speed data related to its propulsion test programs. These transceivers allow the recorder and HSDAS controls to be located in the Test Control Center in a remote location while the digitizer is located on the test stand.

  20. High speed hybrid active system

    NASA Astrophysics Data System (ADS)

    Gonzalez, Ignacio F.; Chang, Fu-Kuo; Qing, Peter X.; Kumar, Amrita; Zhang, David

    2005-05-01

    A novel piezoelectric/fiber-optic system is developed for long-term health monitoring of aerospace vehicles and structures. The hybrid diagnostic system uses the piezoelectric actuators to input a controlled excitation to the structure and the fiber optic sensors to capture the corresponding structural response. The aim of the system is to detect changes in structures such as those found in aerospace applications (damage, cracks, aging, etc.). This system involves the use of fiber Bragg gratings, which may be either bonded to the surface of the material or embedded within it in order to detect the linear strain component produced by the excitation waves generate by an arbitrary waveform generator. Interrogation of the Bragg gratings is carried out using a high speed fiber grating demodulation unit and a high speed data acquisition card to provide actuation input. With data collection and information processing; is able to determine the condition of the structure. The demands on a system suitable for detecting ultrasonic acoustic waves are different than for the more common strain and temperature systems. On the one hand, the frequency is much higher, with typical values for ultrasonic frequencies used in non-destructive testing ranging from 100 kHz up to several MHz. On the other hand, the related strain levels are much lower, normally in the μstrain range. Fiber-optic solutions for this problem do exist and are particularly attractive for ultrasonic sensing as the sensors offer broadband detection capability.

  1. A Synchronization Algorithm and Implementation for High-Speed Block Codes Applications. Part 4

    NASA Technical Reports Server (NTRS)

    Lin, Shu; Zhang, Yu; Nakamura, Eric B.; Uehara, Gregory T.

    1998-01-01

    Block codes have trellis structures and decoders amenable to high speed CMOS VLSI implementation. For a given CMOS technology, these structures enable operating speeds higher than those achievable using convolutional codes for only modest reductions in coding gain. As a result, block codes have tremendous potential for satellite trunk and other future high-speed communication applications. This paper describes a new approach for implementation of the synchronization function for block codes. The approach utilizes the output of the Viterbi decoder and therefore employs the strength of the decoder. Its operation requires no knowledge of the signal-to-noise ratio of the received signal, has a simple implementation, adds no overhead to the transmitted data, and has been shown to be effective in simulation for received SNR greater than 2 dB.

  2. High-Speed Schlieren Movies of Decelerators at Supersonic Speeds

    NASA Technical Reports Server (NTRS)

    1960-01-01

    High-Speed Schlieren Movies of Decelerators at Supersonic Speeds. Tests were conducted on several types of porous parachutes, a paraglider, and a simulated retrorocket. Mach numbers ranged from 1.8-3.0, porosity from 20-80 percent, and camera speeds from 1680-3000 feet per second (fps) in trials with porous parachutes. Trials of reefed parachutes were conducted at Mach number 2.0 and reefing of 12-33 percent at camera speeds of 600 fps. A flexible parachute with an inflatable ring in the periphery of the canopy was tested at Reynolds number 750,000 per foot, Mach number 2.85, porosity of 28 percent, and camera speed of 36oo fps. A vortex-ring parachute was tested at Mach number 2.2 and camera speed of 3000 fps. The paraglider, with a sweepback of 45 degrees at an angle of attack of 45 degrees was tested at Mach number 2.65, drag coefficient of 0.200, and lift coefficient of 0.278 at a camera speed of 600 fps. A cold air jet exhausting upstream from the center of a bluff body was used to simulate a retrorocket. The free-stream Mach number was 2.0, free-stream dynamic pressure was 620 lb/sq ft, jet-exit static pressure ratio was 10.9, and camera speed was 600 fps. [Entire movie available on DVD from CASI as Doc ID 20070030973. Contact help@sti.nasa.gov

  3. High-speed data search

    NASA Technical Reports Server (NTRS)

    Driscoll, James N.

    1994-01-01

    The high-speed data search system developed for KSC incorporates existing and emerging information retrieval technology to help a user intelligently and rapidly locate information found in large textual databases. This technology includes: natural language input; statistical ranking of retrieved information; an artificial intelligence concept called semantics, where 'surface level' knowledge found in text is used to improve the ranking of retrieved information; and relevance feedback, where user judgements about viewed information are used to automatically modify the search for further information. Semantics and relevance feedback are features of the system which are not available commercially. The system further demonstrates focus on paragraphs of information to decide relevance; and it can be used (without modification) to intelligently search all kinds of document collections, such as collections of legal documents medical documents, news stories, patents, and so forth. The purpose of this paper is to demonstrate the usefulness of statistical ranking, our semantic improvement, and relevance feedback.

  4. Flexible High Speed Codec (FHSC)

    NASA Technical Reports Server (NTRS)

    Segallis, G. P.; Wernlund, J. V.

    1991-01-01

    The ongoing NASA/Harris Flexible High Speed Codec (FHSC) program is described. The program objectives are to design and build an encoder decoder that allows operation in either burst or continuous modes at data rates of up to 300 megabits per second. The decoder handles both hard and soft decision decoding and can switch between modes on a burst by burst basis. Bandspreading is low since the code rate is greater than or equal to 7/8. The encoder and a hard decision decoder fit on a single application specific integrated circuit (ASIC) chip. A soft decision applique is implemented using 300 K emitter coupled logic (ECL) which can be easily translated to an ECL gate array.

  5. High-Speed Optical Spectroscopy

    NASA Astrophysics Data System (ADS)

    Marsh, T. R.

    The large surveys and sensitive instruments of modern astronomy are turning ever more examples of variable objects, many of which are extending the parameter space to testing theories of stellar evolution and accretion. Future projects such as the Laser Interferometer Space Antenna (LISA) and the Large Synoptic Survey Telescope (LSST) will only add more challenging candidates to this list. Understanding such objects often requires fast spectroscopy, but the trend for ever larger detectors makes this difficult. In this contribution I outline the science made possible by high-speed spectroscopy, and consider how a combination of the well-known progress in computer technology combined with recent advances in CCD detectors may finally enable it to become a standard tool of astrophysics.

  6. Preliminary study of high-speed machining

    SciTech Connect

    Jordan, R.E.

    1980-07-01

    The feasibility of a high speed machining process has been established for application to Bendix aluminum products, based upon information gained through visits to existing high speed machining facilities and by the completion of a representative Bendix part using this process. The need for an experimental high speed machining capability at Bendix for further process evaluation is established.

  7. High speed sampler and demultiplexer

    DOEpatents

    McEwan, Thomas E.

    1995-01-01

    A high speed sampling demultiplexer based on a plurality of sampler banks, each bank comprising a sample transmission line for transmitting an input signal, a strobe transmission line for transmitting a strobe signal, and a plurality of sampling gates at respective positions along the sample transmission line for sampling the input signal in response to the strobe signal. Strobe control circuitry is coupled to the plurality of banks, and supplies a sequence of bank strobe signals to the strobe transmission lines in each of the plurality of banks, and includes circuits for controlling the timing of the bank strobe signals among the banks of samplers. Input circuitry is included for supplying the input signal to be sampled to the plurality of sample transmission lines in the respective banks. The strobe control circuitry can repetitively strobe the plurality of banks of samplers such that the banks of samplers are cycled to create a long sample length. Second tier demultiplexing circuitry is coupled to each of the samplers in the plurality of banks. The second tier demultiplexing circuitry senses the sample taken by the corresponding sampler each time the bank in which the sampler is found is strobed. A plurality of such samples can be stored by the second tier demultiplexing circuitry for later processing. Repetitive sampling with the high speed transient sampler induces an effect known as "strobe kickout". The sample transmission lines include structures which reduce strobe kickout to acceptable levels, generally 60 dB below the signal, by absorbing the kickout pulses before the next sampling repetition.

  8. High speed sampler and demultiplexer

    DOEpatents

    McEwan, T.E.

    1995-12-26

    A high speed sampling demultiplexer based on a plurality of sampler banks, each bank comprising a sample transmission line for transmitting an input signal, a strobe transmission line for transmitting a strobe signal, and a plurality of sampling gates at respective positions along the sample transmission line for sampling the input signal in response to the strobe signal. Strobe control circuitry is coupled to the plurality of banks, and supplies a sequence of bank strobe signals to the strobe transmission lines in each of the plurality of banks, and includes circuits for controlling the timing of the bank strobe signals among the banks of samplers. Input circuitry is included for supplying the input signal to be sampled to the plurality of sample transmission lines in the respective banks. The strobe control circuitry can repetitively strobe the plurality of banks of samplers such that the banks of samplers are cycled to create a long sample length. Second tier demultiplexing circuitry is coupled to each of the samplers in the plurality of banks. The second tier demultiplexing circuitry senses the sample taken by the corresponding sampler each time the bank in which the sampler is found is strobed. A plurality of such samples can be stored by the second tier demultiplexing circuitry for later processing. Repetitive sampling with the high speed transient sampler induces an effect known as ``strobe kickout``. The sample transmission lines include structures which reduce strobe kickout to acceptable levels, generally 60 dB below the signal, by absorbing the kickout pulses before the next sampling repetition. 16 figs.

  9. CMOS compatible high-Q photonic crystal nanocavity fabricated with photolithography on silicon photonic platform

    PubMed Central

    Ooka, Yuta; Tetsumoto, Tomohiro; Fushimi, Akihiro; Yoshiki, Wataru; Tanabe, Takasumi

    2015-01-01

    Progress on the fabrication of ultrahigh-Q photonic-crystal nanocavities (PhC-NCs) has revealed the prospect for new applications including silicon Raman lasers that require a strong confinement of light. Among various PhC-NCs, the highest Q has been recorded with silicon. On the other hand, microcavity is one of the basic building blocks in silicon photonics. However, the fusion between PhC-NCs and silicon photonics has yet to be exploited, since PhC-NCs are usually fabricated with electron-beam lithography and require an air-bridge structure. Here we show that a 2D-PhC-NC fabricated with deep-UV photolithography on a silica-clad silicon-on-insulator (SOI) structure will exhibit a high-Q of 2.2 × 105 with a mode-volume of ~1.7(λ/n)3. This is the highest Q demonstrated with photolithography. We also show that this device exhibits an efficient thermal diffusion and enables high-speed switching. The demonstration of the photolithographic fabrication of high-Q silica-clad PhC-NCs will open possibility for mass-manufacturing and boost the fusion between silicon photonics and CMOS devices. PMID:26086849

  10. CMOS compatible high-Q photonic crystal nanocavity fabricated with photolithography on silicon photonic platform.

    PubMed

    Ooka, Yuta; Tetsumoto, Tomohiro; Fushimi, Akihiro; Yoshiki, Wataru; Tanabe, Takasumi

    2015-01-01

    Progress on the fabrication of ultrahigh-Q photonic-crystal nanocavities (PhC-NCs) has revealed the prospect for new applications including silicon Raman lasers that require a strong confinement of light. Among various PhC-NCs, the highest Q has been recorded with silicon. On the other hand, microcavity is one of the basic building blocks in silicon photonics. However, the fusion between PhC-NCs and silicon photonics has yet to be exploited, since PhC-NCs are usually fabricated with electron-beam lithography and require an air-bridge structure. Here we show that a 2D-PhC-NC fabricated with deep-UV photolithography on a silica-clad silicon-on-insulator (SOI) structure will exhibit a high-Q of 2.2 × 10(5) with a mode-volume of ~ 1.7(λ/n)(3). This is the highest Q demonstrated with photolithography. We also show that this device exhibits an efficient thermal diffusion and enables high-speed switching. The demonstration of the photolithographic fabrication of high-Q silica-clad PhC-NCs will open possibility for mass-manufacturing and boost the fusion between silicon photonics and CMOS devices. PMID:26086849

  11. Prototyping of an HV-CMOS demonstrator for the High Luminosity-LHC upgrade

    NASA Astrophysics Data System (ADS)

    Vilella, E.; Benoit, M.; Casanova, R.; Casse, G.; Ferrere, D.; Iacobucci, G.; Peric, I.; Vossebeld, J.

    2016-01-01

    HV-CMOS sensors can offer important advantages in terms of material budget, granularity and cost for large area tracking systems in high energy physics experiments. This article presents the design and simulated results of an HV-CMOS pixel demonstrator for the High Luminosity-LHC. The pixel demonstrator has been designed in the 0.35 μm HV-CMOS process from ams AG and submitted for fabrication through an engineering run. To improve the response of the sensor, different wafers with moderate to high substrate resistivities are used to fabricate the design. The prototype consists of four large analog and standalone matrices with several pixel flavours, which are all compatible for readout with the FE-I4 ASIC. Details about the matrices and the pixel flavours are provided in this article.

  12. Development of low read noise high conversion gain CMOS image sensor for photon counting level imaging

    NASA Astrophysics Data System (ADS)

    Seo, Min-Woong; Kawahito, Shoji; Kagawa, Keiichiro; Yasutomi, Keita

    2016-05-01

    A CMOS image sensor with deep sub-electron read noise and high pixel conversion gain has been developed. Its performance is recognized through image outputs from an area image sensor, confirming the capability of photoelectroncounting- level imaging. To achieve high conversion gain, the proposed pixel has special structures to reduce the parasitic capacitances around FD node. As a result, the pixel conversion gain is increased due to the optimized FD node capacitance, and the noise performance is also improved by removing two noise sources from power supply. For the first time, high contrast images from the reset-gate-less CMOS image sensor, with less than 0.3e- rms noise level, have been generated at an extremely low light level of a few electrons per pixel. In addition, the photon-counting capability of the developed CMOS imager is demonstrated by a measurement, photoelectron-counting histogram (PCH).

  13. ADVANCED HIGH SPEED PROGRAMMABLE PREFORMING

    SciTech Connect

    Norris Jr, Robert E; Lomax, Ronny D; Xiong, Fue; Dahl, Jeffrey S; Blanchard, Patrick J

    2010-01-01

    Polymer-matrix composites offer greater stiffness and strength per unit weight than conventional materials resulting in new opportunities for lightweighting of automotive and heavy vehicles. Other benefits include design flexibility, less corrosion susceptibility, and the ability to tailor properties to specific load requirements. However, widespread implementation of structural composites requires lower-cost manufacturing processes than those that are currently available. Advanced, directed-fiber preforming processes have demonstrated exceptional value for rapid preforming of large, glass-reinforced, automotive composite structures. This is due to process flexibility and inherently low material scrap rate. Hence directed fiber performing processes offer a low cost manufacturing methodology for producing preforms for a variety of structural automotive components. This paper describes work conducted at the Oak Ridge National Laboratory (ORNL), focused on the development and demonstration of a high speed chopper gun to enhance throughput capabilities. ORNL and the Automotive Composites Consortium (ACC) revised the design of a standard chopper gun to expand the operational envelope, enabling delivery of up to 20kg/min. A prototype unit was fabricated and used to demonstrate continuous chopping of multiple roving at high output over extended periods. In addition fiber handling system modifications were completed to sustain the high output the modified chopper affords. These hardware upgrades are documented along with results of process characterization and capabilities assessment.

  14. Use of CMOS imagers to measure high fluxes of charged particles

    NASA Astrophysics Data System (ADS)

    Servoli, L.; Tucceri, P.

    2016-03-01

    The measurement of high flux charged particle beams, specifically at medical accelerators and with small fields, poses several challenges. In this work we propose a single particle counting method based on CMOS imagers optimized for visible light collection, exploiting their very high spatial segmentation (> 3 106 pixels/cm2) and almost full efficiency detection capability. An algorithm to measure the charged particle flux with a precision of ~ 1% for fluxes up to 40 MHz/cm2 has been developed, using a non-linear calibration algorithm, and several CMOS imagers with different characteristics have been compared to find their limits on flux measurement.

  15. High speed imager test station

    DOEpatents

    Yates, George J.; Albright, Kevin L.; Turko, Bojan T.

    1995-01-01

    A test station enables the performance of a solid state imager (herein called a focal plane array or FPA) to be determined at high image frame rates. A programmable waveform generator is adapted to generate clock pulses at determinable rates for clock light-induced charges from a FPA. The FPA is mounted on an imager header board for placing the imager in operable proximity to level shifters for receiving the clock pulses and outputting pulses effective to clock charge from the pixels forming the FPA. Each of the clock level shifters is driven by leading and trailing edge portions of the clock pulses to reduce power dissipation in the FPA. Analog circuits receive output charge pulses clocked from the FPA pixels. The analog circuits condition the charge pulses to cancel noise in the pulses and to determine and hold a peak value of the charge for digitizing. A high speed digitizer receives the peak signal value and outputs a digital representation of each one of the charge pulses. A video system then displays an image associated with the digital representation of the output charge pulses clocked from the FPA. In one embodiment, the FPA image is formatted to a standard video format for display on conventional video equipment.

  16. High speed imager test station

    DOEpatents

    Yates, G.J.; Albright, K.L.; Turko, B.T.

    1995-11-14

    A test station enables the performance of a solid state imager (herein called a focal plane array or FPA) to be determined at high image frame rates. A programmable waveform generator is adapted to generate clock pulses at determinable rates for clock light-induced charges from a FPA. The FPA is mounted on an imager header board for placing the imager in operable proximity to level shifters for receiving the clock pulses and outputting pulses effective to clock charge from the pixels forming the FPA. Each of the clock level shifters is driven by leading and trailing edge portions of the clock pulses to reduce power dissipation in the FPA. Analog circuits receive output charge pulses clocked from the FPA pixels. The analog circuits condition the charge pulses to cancel noise in the pulses and to determine and hold a peak value of the charge for digitizing. A high speed digitizer receives the peak signal value and outputs a digital representation of each one of the charge pulses. A video system then displays an image associated with the digital representation of the output charge pulses clocked from the FPA. In one embodiment, the FPA image is formatted to a standard video format for display on conventional video equipment. 12 figs.

  17. High-stage analog accumulator for TDI CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Jianxin, Li; Fujun, Huang; Yong, Zong; Jing, Gao

    2016-02-01

    The impact of the parasitic phenomenon on the performance of the analog accumulator in TDI CMOS image sensor is analyzed and resolved. A 128-stage optimized accumulator based on 0.18-μm one-poly four-metal 3.3 V CMOS technology is designed and simulated. A charge injection effect from the top plate sampling is employed to compensate the un-eliminated parasitics based on the accumulator with a decoupling switch, and then a calibration circuit is designed to restrain the mismatch and Process, Voltage and Temperature (PVT) variations. The post layout simulation indicates that the improved SNR of the accumulator upgrades from 17.835 to 21.067 dB, while an ideal value is 21.072 dB. In addition, the linearity of the accumulator is 99.62%. The simulation results of two extreme cases and Monte Carlo show that the mismatch and PVT variations are restrained by the calibration circuit. Furthermore, it is promising to design a higher stage accumulator based on the proposed structure. Project supported by the National Natural Science Foundation of China (Nos. 61404090, 61434004).

  18. A high frame rate, 16 million pixels, radiation hard CMOS sensor

    NASA Astrophysics Data System (ADS)

    Guerrini, N.; Turchetta, R.; Van Hoften, G.; Henderson, R.; McMullan, G.; Faruqi, A. R.

    2011-03-01

    CMOS sensors provide the possibility of designing detectors for a large variety of applications with all the benefits and flexibility of the widely used CMOS process. In this paper we describe a novel CMOS sensor designed for transmission electron microscopy. The overall design consists of a large 61 × 63 mm2 silicon area containing 16 million pixels arranged in a 4K × 4K array, with radiation hard geometry. All this is combined with a very fast readout, the possibility of region of interest (ROI) readout, pixel binning with consequent frame rate increase and a dynamic range close to 12 bits. The high frame rate has been achieved using 32 parallel analogue outputs each one operating at up to 20 MHz. Binning of pixels can be controlled externally and the flexibility of the design allows several possibilities, such as 2 × 2 or 4 × 4 binning. Other binning configurations where the number of rows and the number of columns are not equal, such as 2 × 1 or 2 × 4, are also possible. Having control of the CMOS design allowed us to optimise the pixel design, in particular with regard to its radiation hardness, and to make optimum choices in the design of other regions of the final sensor. An early prototype was also designed with a variety of geometries in order to optimise the readout structure and these are presented. The sensor was manufactured in a 0.35 μm standard CMOS process.

  19. High-speed, electronically shuttered solid-state imager technology (invited)

    NASA Astrophysics Data System (ADS)

    Reich, R. K.; Rathman, D. D.; O'Mara, D. M.; Young, D. J.; Loomis, A. H.; Kohler, E. J.; Osgood, R. M.; Murphy, R. A.; Rose, M.; Berger, R.; Watson, S. A.; Ulibarri, M. D.; Perry, T.; Kosicki, B. B.

    2003-03-01

    Electronically shuttered solid-state imagers are being developed for high-speed imaging applications. A 5 cm×5 cm, 512×512-element, multiframe charge-coupled device (CCD) imager has been fabricated for the Los Alamos National Laboratory DARHT facility that collects four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity, the imager uses an electronic shutter technology designed for back-illuminated CCDs. The design concept and test results are described for the burst-frame-rate imager. Also discussed is an evolving solid-state imager technology that has interesting characteristics for creating large-format x-ray detectors with short integration times (100 ps to 1 ns). Proposed device architectures use CMOS technology for high speed sampling (tens of picoseconds transistor switching times). Techniques for parallel clock distribution, that triggers the sampling of x-ray photoelectrons, will be described that exploit features of CMOS technology.

  20. High-speed pressure clamp.

    PubMed

    Besch, Stephen R; Suchyna, Thomas; Sachs, Frederick

    2002-10-01

    We built a high-speed, pneumatic pressure clamp to stimulate patch-clamped membranes mechanically. The key control element is a newly designed differential valve that uses a single, nickel-plated piezoelectric bending element to control both pressure and vacuum. To minimize response time, the valve body was designed with minimum dead volume. The result is improved response time and stability with a threefold decrease in actuation latency. Tight valve clearances minimize the steady-state air flow, permitting us to use small resonant-piston pumps to supply pressure and vacuum. To protect the valve from water contamination in the event of a broken pipette, an optical sensor detects water entering the valve and increases pressure rapidly to clear the system. The open-loop time constant for pressure is 2.5 ms for a 100-mmHg step, and the closed-loop settling time is 500-600 micros. Valve actuation latency is 120 micros. The system performance is illustrated for mechanically induced changes in patch capacitance. PMID:12397401

  1. High speed all optical networks

    NASA Technical Reports Server (NTRS)

    Chlamtac, Imrich; Ganz, Aura

    1990-01-01

    An inherent problem of conventional point-to-point wide area network (WAN) architectures is that they cannot translate optical transmission bandwidth into comparable user available throughput due to the limiting electronic processing speed of the switching nodes. The first solution to wavelength division multiplexing (WDM) based WAN networks that overcomes this limitation is presented. The proposed Lightnet architecture takes into account the idiosyncrasies of WDM switching/transmission leading to an efficient and pragmatic solution. The Lightnet architecture trades the ample WDM bandwidth for a reduction in the number of processing stages and a simplification of each switching stage, leading to drastically increased effective network throughputs. The principle of the Lightnet architecture is the construction and use of virtual topology networks, embedded in the original network in the wavelength domain. For this construction Lightnets utilize the new concept of lightpaths which constitute the links of the virtual topology. Lightpaths are all-optical, multihop, paths in the network that allow data to be switched through intermediate nodes using high throughput passive optical switches. The use of the virtual topologies and the associated switching design introduce a number of new ideas, which are discussed in detail.

  2. High-speed Wind Tunnels

    NASA Technical Reports Server (NTRS)

    Ackeret, J

    1936-01-01

    Wind tunnel construction and design is discussed especially in relation to subsonic and supersonic speeds. Reynolds Numbers and the theory of compressible flows are also taken into consideration in designing new tunnels.

  3. A very high speed lossless compression/decompression chip set

    NASA Technical Reports Server (NTRS)

    Venbrux, Jack; Liu, Norley; Liu, Kathy; Vincent, Peter; Merrell, Randy

    1991-01-01

    A chip is described that will perform lossless compression and decompression using the Rice Algorithm. The chip set is designed to compress and decompress source data in real time for many applications. The encoder is designed to code at 20 M samples/second at MIL specifications. That corresponds to 280 Mbits/second at maximum quantization or approximately 500 Mbits/second under nominal conditions. The decoder is designed to decode at 10 M samples/second at industrial specifications. A wide range of quantization levels is allowed (4...14 bits) and both nearest neighbor prediction and external prediction are supported. When the pre and post processors are bypassed, the chip set performs high speed entropy coding and decoding. This frees the chip set from being tied to one modeling technique or specific application. Both the encoder and decoder are being fabricated in a 1.0 micron CMOS process that has been tested to survive 1 megarad of total radiation dosage. The CMOS chips are small, only 5 mm on a side, and both are estimated to consume less than 1/4 of a Watt of power while operating at maximum frequency.

  4. Lincoln Laboratory high-speed solid-state imager technology

    NASA Astrophysics Data System (ADS)

    Reich, R. K.; Rathman, D. D.; O'Mara, D. M.; Young, D. J.; Loomis, A. H.; Osgood, R. M.; Murphy, R. A.; Rose, M.; Berger, R.; Tyrrell, B. M.; Watson, S. A.; Ulibarri, M. D.; Perry, T.; Weber, F.; Robey, H.

    2007-01-01

    Massachusetts Institute of Technology, Lincoln Laboratory (MIT LL) has been developing both continuous and burst solid-state focal-plane-array technology for a variety of high-speed imaging applications. For continuous imaging, a 128 × 128-pixel charge coupled device (CCD) has been fabricated with multiple output ports for operating rates greater than 10,000 frames per second with readout noise of less than 10 e- rms. An electronic shutter has been integrated into the pixels of the back-illuminated (BI) CCD imagers that give snapshot exposure times of less than 10 ns. For burst imaging, a 5 cm × 5 cm, 512 × 512-element, multi-frame CCD imager that collects four sequential image frames at megahertz rates has been developed for the Los Alamos National Laboratory Dual Axis Radiographic Hydrodynamic Test (DARHT) facility. To operate at fast frame rates with high sensitivity, the imager uses the same electronic shutter technology as the continuously framing 128 × 128 CCD imager. The design concept and test results are described for the burst-frame-rate imager. Also discussed is an evolving solid-state imager technology that has interesting characteristics for creating large-format x-ray detectors with ultra-short exposure times (100 to 300 ps). The detector will consist of CMOS readouts for high speed sampling (tens of picoseconds transistor switching times) that are bump bonded to deep-depletion silicon photodiodes. A 64 × 64-pixel CMOS test chip has been designed, fabricated and characterized to investigate the feasibility of making large-format detectors with short, simultaneous exposure times.

  5. High-Q CMOS-integrated photonic crystal microcavity devices

    PubMed Central

    Mehta, Karan K.; Orcutt, Jason S.; Tehar-Zahav, Ofer; Sternberg, Zvi; Bafrali, Reha; Meade, Roy; Ram, Rajeev J.

    2014-01-01

    Integrated optical resonators are necessary or beneficial in realizations of various functions in scaled photonic platforms, including filtering, modulation, and detection in classical communication systems, optical sensing, as well as addressing and control of solid state emitters for quantum technologies. Although photonic crystal (PhC) microresonators can be advantageous to the more commonly used microring devices due to the former's low mode volumes, fabrication of PhC cavities has typically relied on electron-beam lithography, which precludes integration with large-scale and reproducible CMOS fabrication. Here, we demonstrate wavelength-scale polycrystalline silicon (pSi) PhC microresonators with Qs up to 60,000 fabricated within a bulk CMOS process. Quasi-1D resonators in lateral p-i-n structures allow for resonant defect-state photodetection in all-silicon devices, exhibiting voltage-dependent quantum efficiencies in the range of a few 10 s of %, few-GHz bandwidths, and low dark currents, in devices with loaded Qs in the range of 4,300–9,300; one device, for example, exhibited a loaded Q of 4,300, 25% quantum efficiency (corresponding to a responsivity of 0.31 A/W), 3 GHz bandwidth, and 30 nA dark current at a reverse bias of 30 V. This work demonstrates the possibility for practical integration of PhC microresonators with active electro-optic capability into large-scale silicon photonic systems. PMID:24518161

  6. High-speed detection of DNA translocation in nanopipettes.

    PubMed

    Fraccari, Raquel L; Ciccarella, Pietro; Bahrami, Azadeh; Carminati, Marco; Ferrari, Giorgio; Albrecht, Tim

    2016-04-14

    We present a high-speed electrical detection scheme based on a custom-designed CMOS amplifier which allows the analysis of DNA translocation in glass nanopipettes on a microsecond timescale. Translocation of different DNA lengths in KCl electrolyte provides a scaling factor of the DNA translocation time equal to p = 1.22, which is different from values observed previously with nanopipettes in LiCl electrolyte or with nanopores. Based on a theoretical model involving electrophoresis, hydrodynamics and surface friction, we show that the experimentally observed range of p-values may be the result of, or at least be affected by DNA adsorption and friction between the DNA and the substrate surface. PMID:26985713

  7. High-speed camera with internal real-time image processing

    NASA Astrophysics Data System (ADS)

    Paindavoine, M.; Mosqueron, R.; Dubois, J.; Clerc, C.; Grapin, J. C.; Tomasini, F.

    2005-08-01

    High-speed video cameras are powerful tools for investigating for instance the dynamics of fluids or the movements of mechanical parts in manufacturing processes. In the past years, the use of CMOS sensors instead of CCDs have made possible the development of high-speed video cameras offering digital outputs, readout flexibility and lower manufacturing costs. In this field, we designed a new fast CMOS camera with a 1280×1024 pixels resolution at 500 fps. In order to transmit from the camera only useful information from the fast images, we studied some specific algorithms like edge detection, wavelet analysis, image compression and object tracking. These image processing algorithms have been implemented into a FPGA embedded inside the camera. This FPGA technology allows us to process fast images in real time.

  8. High-speed detection of DNA translocation in nanopipettes

    NASA Astrophysics Data System (ADS)

    Fraccari, Raquel L.; Ciccarella, Pietro; Bahrami, Azadeh; Carminati, Marco; Ferrari, Giorgio; Albrecht, Tim

    2016-03-01

    We present a high-speed electrical detection scheme based on a custom-designed CMOS amplifier which allows the analysis of DNA translocation in glass nanopipettes on a microsecond timescale. Translocation of different DNA lengths in KCl electrolyte provides a scaling factor of the DNA translocation time equal to p = 1.22, which is different from values observed previously with nanopipettes in LiCl electrolyte or with nanopores. Based on a theoretical model involving electrophoresis, hydrodynamics and surface friction, we show that the experimentally observed range of p-values may be the result of, or at least be affected by DNA adsorption and friction between the DNA and the substrate surface.We present a high-speed electrical detection scheme based on a custom-designed CMOS amplifier which allows the analysis of DNA translocation in glass nanopipettes on a microsecond timescale. Translocation of different DNA lengths in KCl electrolyte provides a scaling factor of the DNA translocation time equal to p = 1.22, which is different from values observed previously with nanopipettes in LiCl electrolyte or with nanopores. Based on a theoretical model involving electrophoresis, hydrodynamics and surface friction, we show that the experimentally observed range of p-values may be the result of, or at least be affected by DNA adsorption and friction between the DNA and the substrate surface. Electronic supplementary information (ESI) available: Gel electrophoresis confirming lengths and purity of DNA samples, comparison between Axopatch 200B and custom-built setup, comprehensive low-noise amplifier characterization, representative I-V curves of nanopipettes used, typical scatter plots of τ vs. peak amplitude for the four LDNA's used, table of most probable τ values, a comparison between different fitting models for the DNA translocation time distribution, further details on the stochastic numerical simulation of the scaling statistics and the derivation of the extended

  9. Review of high speed communications photomultiplier detectors

    NASA Technical Reports Server (NTRS)

    Enck, R. S.; Abraham, W. G.

    1978-01-01

    Four types of newly developed high speed photomultipliers are discussed: all electrostatic; static crossed field; dynamic crossed field; and hybrid (EBS). Design, construction, and performance parameters of each class are presented along with limitations of each class of device and prognosis for its future in high speed light detection. The particular advantage of these devices lies in high speed applications using low photon flux, large cathode areas, and broadband optical detection.

  10. High speed imaging - An important industrial tool

    NASA Technical Reports Server (NTRS)

    Moore, Alton; Pinelli, Thomas E.

    1986-01-01

    High-speed photography, which is a rapid sequence of photographs that allow an event to be analyzed through the stoppage of motion or the production of slow-motion effects, is examined. In high-speed photography 16, 35, and 70 mm film and framing rates between 64-12,000 frames per second are utilized to measure such factors as angles, velocities, failure points, and deflections. The use of dual timing lamps in high-speed photography and the difficulties encountered with exposure and programming the camera and event are discussed. The application of video cameras to the recording of high-speed events is described.

  11. High speed imaging - An important industrial tool

    NASA Astrophysics Data System (ADS)

    Moore, Alton; Pinelli, Thomas E.

    1986-05-01

    High-speed photography, which is a rapid sequence of photographs that allow an event to be analyzed through the stoppage of motion or the production of slow-motion effects, is examined. In high-speed photography 16, 35, and 70 mm film and framing rates between 64-12,000 frames per second are utilized to measure such factors as angles, velocities, failure points, and deflections. The use of dual timing lamps in high-speed photography and the difficulties encountered with exposure and programming the camera and event are discussed. The application of video cameras to the recording of high-speed events is described.

  12. A high frequency active voltage doubler in standard CMOS using offset-controlled comparators for inductive power transmission.

    PubMed

    Lee, Hyung-Min; Ghovanloo, Maysam

    2013-06-01

    In this paper, we present a fully integrated active voltage doubler in CMOS technology using offset-controlled high speed comparators for extending the range of inductive power transmission to implantable microelectronic devices (IMD) and radio-frequency identification (RFID) tags. This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and requires lower input voltage than active rectifiers, leading to reliable and efficient operation with weakly coupled inductive links. The offset-controlled functions in the comparators compensate for turn-on and turn-off delays to not only maximize the forward charging current to the load but also minimize the back current, optimizing PCE in the high frequency (HF) band. We fabricated the active voltage doubler in a 0.5-μm 3M2P std . CMOS process, occupying 0.144 mm(2) of chip area. With 1.46 V peak AC input at 13.56 MHz, the active voltage doubler provides 2.4 V DC output across a 1 kΩ load, achieving the highest PCE = 79% ever reported at this frequency. In addition, the built-in start-up circuit ensures a reliable operation at lower voltages. PMID:23853321

  13. A High Frequency Active Voltage Doubler in Standard CMOS Using Offset-Controlled Comparators for Inductive Power Transmission

    PubMed Central

    Lee, Hyung-Min; Ghovanloo, Maysam

    2014-01-01

    In this paper, we present a fully integrated active voltage doubler in CMOS technology using offset-controlled high speed comparators for extending the range of inductive power transmission to implantable microelectronic devices (IMD) and radio-frequency identification (RFID) tags. This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and requires lower input voltage than active rectifiers, leading to reliable and efficient operation with weakly coupled inductive links. The offset-controlled functions in the comparators compensate for turn-on and turn-off delays to not only maximize the forward charging current to the load but also minimize the back current, optimizing PCE in the high frequency (HF) band. We fabricated the active voltage doubler in a 0.5-μm 3M2P std. CMOS process, occupying 0.144 mm2 of chip area. With 1.46 V peak AC input at 13.56 MHz, the active voltage doubler provides 2.4 V DC output across a 1 kΩ load, achieving the highest PCE = 79% ever reported at this frequency. In addition, the built-in start-up circuit ensures a reliable operation at lower voltages. PMID:23853321

  14. High-Speed Ring Bus

    NASA Technical Reports Server (NTRS)

    Wysocky, Terry; Kopf, Edward, Jr.; Katanyoutananti, Sunant; Steiner, Carl; Balian, Harry

    2010-01-01

    The high-speed ring bus at the Jet Propulsion Laboratory (JPL) allows for future growth trends in spacecraft seen with future scientific missions. This innovation constitutes an enhancement of the 1393 bus as documented in the Institute of Electrical and Electronics Engineers (IEEE) 1393-1999 standard for a spaceborne fiber-optic data bus. It allows for high-bandwidth and time synchronization of all nodes on the ring. The JPL ring bus allows for interconnection of active units with autonomous operation and increased fault handling at high bandwidths. It minimizes the flight software interface with an intelligent physical layer design that has few states to manage as well as simplified testability. The design will soon be documented in the AS-1393 standard (Serial Hi-Rel Ring Network for Aerospace Applications). The framework is designed for "Class A" spacecraft operation and provides redundant data paths. It is based on "fault containment regions" and "redundant functional regions (RFR)" and has a method for allocating cables that completely supports the redundancy in spacecraft design, allowing for a complete RFR to fail. This design reduces the mass of the bus by incorporating both the Control Unit and the Data Unit in the same hardware. The standard uses ATM (asynchronous transfer mode) packets, standardized by ITU-T, ANSI, ETSI, and the ATM Forum. The IEEE-1393 standard uses the UNI form of the packet and provides no protection for the data portion of the cell. The JPL design adds optional formatting to this data portion. This design extends fault protection beyond that of the interconnect. This includes adding protection to the data portion that is contained within the Bus Interface Units (BIUs) and by adding to the signal interface between the Data Host and the JPL 1393 Ring Bus. Data transfer on the ring bus does not involve a master or initiator. Following bus protocol, any BIU may transmit data on the ring whenever it has data received from its host. There

  15. A review on high-resolution CMOS delay lines: towards sub-picosecond jitter performance.

    PubMed

    Abdulrazzaq, Bilal I; Abdul Halin, Izhal; Kawahito, Shoji; Sidek, Roslina M; Shafie, Suhaidi; Yunus, Nurul Amziah Md

    2016-01-01

    A review on CMOS delay lines with a focus on the most frequently used techniques for high-resolution delay step is presented. The primary types, specifications, delay circuits, and operating principles are presented. The delay circuits reported in this paper are used for delaying digital inputs and clock signals. The most common analog and digitally-controlled delay elements topologies are presented, focusing on the main delay-tuning strategies. IC variables, namely, process, supply voltage, temperature, and noise sources that affect delay resolution through timing jitter are discussed. The design specifications of these delay elements are also discussed and compared for the common delay line circuits. As a result, the main findings of this paper are highlighting and discussing the followings: the most efficient high-resolution delay line techniques, the trade-off challenge found between CMOS delay lines designed using either analog or digitally-controlled delay elements, the trade-off challenge between delay resolution and delay range and the proposed solutions for this challenge, and how CMOS technology scaling can affect the performance of CMOS delay lines. Moreover, the current trends and efforts used in order to generate output delayed signal with low jitter in the sub-picosecond range are presented. PMID:27104122

  16. High speed nano-metrology

    SciTech Connect

    Humphris, Andrew D. L.; Zhao Bin; Catto, David; Kohli, Priyanka; Howard-Knight, Jeremy P.; Hobbs, Jamie K.

    2011-04-15

    For manufacturing at the nanometre scale a method for rapid and accurate measurement of the resultant functional devices is required. Although atomic force microscopy (AFM) has the requisite spatial resolution, it is severely limited in scan speed, the resolution and repeatability of vertical and lateral measurements being degraded when speed is increased. Here we present a new approach to AFM that makes a direct and feedback-independent measurement of surface height using a laser interferometer focused onto the back of the AFM tip. Combining this direct height measurement with a passive, feedback-free method for maintaining tip-sample contact removes the constraint on scan speed that comes from the bandwidth of the z-feedback loop. Conventional laser reflection detection is used for feedback control, which now plays the role of minimising tip-sample forces, rather than producing the sample topography. Using the system in conjunction with a rapid scanner, true height images are obtained with areas up to (36 x 36) {mu}m{sup 2} at 1 image/second, suitable for in-line applications.

  17. Design and Fabrication of High-Efficiency CMOS/CCD Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2007-01-01

    An architecture for back-illuminated complementary metal oxide/semiconductor (CMOS) and charge-coupled-device (CCD) ultraviolet/visible/near infrared- light image sensors, and a method of fabrication to implement the architecture, are undergoing development. The architecture and method are expected to enable realization of the full potential of back-illuminated CMOS/CCD imagers to perform with high efficiency, high sensitivity, excellent angular response, and in-pixel signal processing. The architecture and method are compatible with next-generation CMOS dielectric-forming and metallization techniques, and the process flow of the method is compatible with process flows typical of the manufacture of very-large-scale integrated (VLSI) circuits. The architecture and method overcome all obstacles that have hitherto prevented high-yield, low-cost fabrication of back-illuminated CMOS/CCD imagers by use of standard VLSI fabrication tools and techniques. It is not possible to discuss the obstacles in detail within the space available for this article. Briefly, the obstacles are posed by the problems of generating light-absorbing layers having desired uniform and accurate thicknesses, passivation of surfaces, forming structures for efficient collection of charge carriers, and wafer-scale thinning (in contradistinction to diescale thinning). A basic element of the present architecture and method - the element that, more than any other, makes it possible to overcome the obstacles - is the use of an alternative starting material: Instead of starting with a conventional bulk-CMOS wafer that consists of a p-doped epitaxial silicon layer grown on a heavily-p-doped silicon substrate, one starts with a special silicon-on-insulator (SOI) wafer that consists of a thermal oxide buried between a lightly p- or n-doped, thick silicon layer and a device silicon layer of appropriate thickness and doping. The thick silicon layer is used as a handle: that is, as a mechanical support for the

  18. Aerodynamic Characteristics of Airfoils at High Speeds

    NASA Technical Reports Server (NTRS)

    Briggs, L J; Hull, G F; Dryden, H L

    1925-01-01

    This report deals with an experimental investigation of the aerodynamical characteristics of airfoils at high speeds. Lift, drag, and center of pressure measurements were made on six airfoils of the type used by the air service in propeller design, at speeds ranging from 550 to 1,000 feet per second. The results show a definite limit to the speed at which airfoils may efficiently be used to produce lift, the lift coefficient decreasing and the drag coefficient increasing as the speed approaches the speed of sound. The change in lift coefficient is large for thick airfoil sections (camber ratio 0.14 to 0.20) and for high angles of attack. The change is not marked for thin sections (camber ratio 0.10) at low angles of attack, for the speed range employed. At high speeds the center of pressure moves back toward the trailing edge of the airfoil as the speed increases. The results indicate that the use of tip speeds approaching the speed of sound for propellers of customary design involves a serious loss in efficiency.

  19. X-ray characterization of CMOS imaging detector with high resolution for fluoroscopic imaging application

    NASA Astrophysics Data System (ADS)

    Cha, Bo Kyung; Kim, Cho Rong; Jeon, Seongchae; Kim, Ryun Kyung; Seo, Chang-Woo; Yang, Keedong; Heo, Duchang; Lee, Tae-Bum; Shin, Min-Seok; Kim, Jong-Boo; Kwon, Oh-Kyung

    2013-12-01

    This paper introduces complementary metal-oxide semiconductor (CMOS) active pixel sensor (APS)-based X-ray imaging detectors with high spatial resolution for medical imaging application. In this study, our proposed X-ray CMOS imaging sensor has been fabricated by using a 0.35 μm 1 Poly 4 Metal CMOS process. The pixel size is 100 μm×100 μm and the pixel array format is 24×96 pixels, which provide a field-of-view (FOV) of 9.6 mm×2.4 mm. The 14.3-bit extend counting analog-to digital converter (ADC) with built-in binning mode was used to reduce the area and simultaneously improve the image resolution. Both thallium-doped CsI (CsI:Tl) and Gd2O2S:Tb scintillator screens were used as converters for incident X-rays to visible light photons. The optical property and X-ray imaging characterization such as X-ray to light response as a function of incident X-ray exposure dose, spatial resolution and X-ray images of objects were measured under different X-ray energy conditions. The measured results suggest that our developed CMOS-based X-ray imaging detector has the potential for fluoroscopic imaging and cone-beam computed tomography (CBCT) imaging applications.

  20. High-Speed Photography with Computer Control.

    ERIC Educational Resources Information Center

    Winters, Loren M.

    1991-01-01

    Describes the use of a microcomputer as an intervalometer for the control and timing of several flash units to photograph high-speed events. Applies this technology to study the oscillations of a stretched rubber band, the deceleration of high-speed projectiles in water, the splashes of milk drops, and the bursts of popcorn kernels. (MDH)

  1. High Speed Video for Airborne Instrumentation Application

    NASA Technical Reports Server (NTRS)

    Tseng, Ting; Reaves, Matthew; Mauldin, Kendall

    2006-01-01

    A flight-worthy high speed color video system has been developed. Extensive system development and ground and environmental. testing hes yielded a flight qualified High Speed Video System (HSVS), This HSVS was initially used on the F-15B #836 for the Lifting Insulating Foam Trajectory (LIFT) project.

  2. Reducing Heating In High-Speed Cinematography

    NASA Technical Reports Server (NTRS)

    Slater, Howard A.

    1989-01-01

    Infrared-absorbing and infrared-reflecting glass filters simple and effective means for reducing rise in temperature during high-speed motion-picture photography. "Hot-mirror" and "cold-mirror" configurations, employed in projection of images, helps prevent excessive heating of scenes by powerful lamps used in high-speed photography.

  3. High speed flow past wings

    NASA Technical Reports Server (NTRS)

    Norstrud, H.

    1973-01-01

    The analytical solution to the transonic small perturbation equation which describes steady compressible flow past finite wings at subsonic speeds can be expressed as a nonlinear integral equation with the perturbation velocity potential as the unknown function. This known formulation is substituted by a system of nonlinear algebraic equations to which various methods are applicable for its solution. Due to the presence of mathematical discontinuities in the flow solutions, however, a main computational difficulty was to ensure uniqueness of the solutions when local velocities on the wing exceeded the speed of sound. For continuous solutions this was achieved by embedding the algebraic system in an one-parameter operator homotopy in order to apply the method of parametric differentiation. The solution to the initial system of equations appears then as a solution to a Cauchy problem where the initial condition is related to the accompanying incompressible flow solution. In using this technique, however, a continuous dependence of the solution development on the initial data is lost when the solution reaches the minimum bifurcation point. A steepest descent iteration technique was therefore, added to the computational scheme for the calculation of discontinuous flow solutions. Results for purely subsonic flows and supersonic flows with and without compression shocks are given and compared with other available theoretical solutions.

  4. Region-of-interest cone beam computed tomography (ROI CBCT) with a high resolution CMOS detector

    NASA Astrophysics Data System (ADS)

    Jain, A.; Takemoto, H.; Silver, M. D.; Nagesh, S. V. S.; Ionita, C. N.; Bednarek, D. R.; Rudin, S.

    2015-03-01

    Cone beam computed tomography (CBCT) systems with rotational gantries that have standard flat panel detectors (FPD) are widely used for the 3D rendering of vascular structures using Feldkamp cone beam reconstruction algorithms. One of the inherent limitations of these systems is limited resolution (<3 lp/mm). There are systems available with higher resolution but their small FOV limits them to small animal imaging only. In this work, we report on region-of-interest (ROI) CBCT with a high resolution CMOS detector (75 μm pixels, 600 μm HR-CsI) mounted with motorized detector changer on a commercial FPD-based C-arm angiography gantry (194 μm pixels, 600 μm HL-CsI). A cylindrical CT phantom and neuro stents were imaged with both detectors. For each detector a total of 209 images were acquired in a rotational protocol. The technique parameters chosen for the FPD by the imaging system were used for the CMOS detector. The anti-scatter grid was removed and the incident scatter was kept the same for both detectors with identical collimator settings. The FPD images were reconstructed for the 10 cm x10 cm FOV and the CMOS images were reconstructed for a 3.84 cm x 3.84 cm FOV. Although the reconstructed images from the CMOS detector demonstrated comparable contrast to the FPD images, the reconstructed 3D images of the neuro stent clearly showed that the CMOS detector improved delineation of smaller objects such as the stent struts (~70 μm) compared to the FPD. Further development and the potential for substantial clinical impact are suggested.

  5. High Precision Bright-Star Astrometry with the USNO Astrometric CMOS Hybrid Camera System

    NASA Astrophysics Data System (ADS)

    Secrest, Nathan; Dudik, Rachel; Berghea, Ciprian; Hennessy, Greg; Dorland, Bryan

    2015-08-01

    While GAIA will provide excellent positional measurements of hundreds of millions of stars between 5 < mag < 20, an ongoing challenge in the field of high-precision differential astrometry is the positional accuracy of very bright stars (mag < 5), due to the enormous dynamic range between bright stars of interest, such as those in the Hipparcos catalog, and their background field stars, which are especially important for differential astrometry. Over the past few years, we have been testing the USNO Astrometric CMOS Hybrid Camera System (UAHC), which utilizes an H4RG-10 detector in windowing mode, as a possible solution to the NOFS USNO Bright Star Astrometric Database (UBAD). In this work, we discuss the results of an astrometric analysis of single-epoch Hipparcos data taken with the UAHC from the 1.55m Kaj Strand Astrometric Reflector at NOFS from June 27-30, 2014. We discuss the calibration of this data, as well as an astrometric analysis pipeline we developed that will enable multi-epoch differential and absolute astrometry with the UAHC. We find that while the overall differential astrometric stability of data taken with the UAHC is good (5-10 mas single-measurement precision) and comparable to other ground-based astrometric camera systems, bright stars in the detector window suffer from several systematic effects, such as insufficient window geometry and centroiding failures due to read-out artifacts—both of which can be significantly improved with modifications to the electronics, read-out speed and microcode.

  6. Active control system for high speed windmills

    DOEpatents

    Avery, D.E.

    1988-01-12

    A pump stroke is matched to the operating speed of a high speed windmill. The windmill drives a hydraulic pump for a control. Changes in speed of a wind driven shaft open supply and exhaust valves to opposite ends of a hydraulic actuator to lengthen and shorten an oscillating arm thereby lengthening and shortening the stroke of an output pump. Diminishing wind to a stall speed causes the valves to operate the hydraulic cylinder to shorten the oscillating arm to zero. A pressure accumulator in the hydraulic system provides the force necessary to supply the hydraulic fluid under pressure to drive the actuator into and out of the zero position in response to the windmill shaft speed approaching and exceeding windmill stall speed. 4 figs.

  7. Active control system for high speed windmills

    DOEpatents

    Avery, Don E.

    1988-01-01

    A pump stroke is matched to the operating speed of a high speed windmill. The windmill drives a hydraulic pump for a control. Changes in speed of a wind driven shaft open supply and exhaust valves to opposite ends of a hydraulic actuator to lengthen and shorten an oscillating arm thereby lengthening and shortening the stroke of an output pump. Diminishing wind to a stall speed causes the valves to operate the hydraulic cylinder to shorten the oscillating arm to zero. A pressure accumulator in the hydraulic system provides the force necessary to supply the hydraulic fluid under pressure to drive the actuator into and out of the zero position in response to the windmill shaft speed approaching and exceeding windmill stall speed.

  8. Design of high speed LVDS transceiver ICs

    NASA Astrophysics Data System (ADS)

    Jian, Xu; Zhigong, Wang; Xiaokang, Niu

    2010-07-01

    The design of low-power LVDS (low voltage differential signaling) transceiver ICs is presented. The LVDS transmitter integrates a common-mode feedback control on chip, while a specially designed pre-charge circuit is proposed to improve the speed of the circuit, making the highest data rate up to 622 Mb/s. For the LVDS receiver design, the performance degradation issues are solved when handling the large input common mode voltages of the conventional LVDS receivers. In addition, the LVDS receiver also supports the failsafe function. The transceiver chips were verified with the CSMC 0.5-μm CMOS process. The measured results showed that, for the LVDS transmitter with the pre-charge technique proposed, the maximum data rate is higher than 622 Mb/s. The power consumption is 6 mA with a 5-V power supply. The LVDS receiver can work properly with a larger input common mode voltage (0.1-2.4 V) but a differential input voltage as low as 100 mV. The power consumption is only 1.2 mA with a 5-V supply at the highest data rate of 400 Mb/s. The chip set meets the TIA/EIA-644-A standards and shows its potential prospects in LVDS transmission systems.

  9. High-performance CMOS image sensors at BAE SYSTEMS Imaging Solutions

    NASA Astrophysics Data System (ADS)

    Vu, Paul; Fowler, Boyd; Liu, Chiao; Mims, Steve; Balicki, Janusz; Bartkovjak, Peter; Do, Hung; Li, Wang

    2012-07-01

    In this paper, we present an overview of high-performance CMOS image sensor products developed at BAE SYSTEMS Imaging Solutions designed to satisfy the increasingly challenging technical requirements for image sensors used in advanced scientific, industrial, and low light imaging applications. We discuss the design and present the test results of a family of image sensors tailored for high imaging performance and capable of delivering sub-electron readout noise, high dynamic range, low power, high frame rates, and high sensitivity. We briefly review the performance of the CIS2051, a 5.5-Mpixel image sensor, which represents our first commercial CMOS image sensor product that demonstrates the potential of our technology, then we present the performance characteristics of the CIS1021, a full HD format CMOS image sensor capable of delivering sub-electron read noise performance at 50 fps frame rate at full HD resolution. We also review the performance of the CIS1042, a 4-Mpixel image sensor which offers better than 70% QE @ 600nm combined with better than 91dB intra scene dynamic range and about 1 e- read noise at 100 fps frame rate at full resolution.

  10. Lubrication and cooling for high speed gears

    NASA Technical Reports Server (NTRS)

    Townsend, D. P.

    1985-01-01

    The problems and failures occurring with the operation of high speed gears are discussed. The gearing losses associated with high speed gearing such as tooth mesh friction, bearing friction, churning, and windage are discussed with various ways shown to help reduce these losses and thereby improve efficiency. Several different methods of oil jet lubrication for high speed gearing are given such as into mesh, out of mesh, and radial jet lubrication. The experiments and analytical results for the various methods of oil jet lubrication are shown with the strengths and weaknesses of each method discussed. The analytical and experimental results of gear lubrication and cooling at various test conditions are presented. These results show the very definite need of improved methods of gear cooling at high speed and high load conditions.

  11. Speed control with end cushion for high speed air cylinder

    DOEpatents

    Stevens, Wayne W.; Solbrig, Charles W.

    1991-01-01

    A high speed air cylinder in which the longitudinal movement of the piston within the air cylinder tube is controlled by pressurizing the air cylinder tube on the accelerating side of the piston and releasing pressure at a controlled rate on the decelerating side of the piston. The invention also includes a method for determining the pressure required on both the accelerating and decelerating sides of the piston to move the piston with a given load through a predetermined distance at the desired velocity, bringing the piston to rest safely without piston bounce at the end of its complete stroke.

  12. Damping Bearings In High-Speed Turbomachines

    NASA Technical Reports Server (NTRS)

    Von Pragenau, George L.

    1994-01-01

    Paper presents comparison of damping bearings with traditional ball, roller, and hydrostatic bearings in high-speed cryogenic turbopumps. Concept of damping bearings described in "Damping Seals and Bearings for a Turbomachine" (MFS-28345).

  13. Study of high speed photography measuring instrument

    NASA Astrophysics Data System (ADS)

    Zhang, Zhijun; Sun, Jiyu; Wu, Keyong

    2007-01-01

    High speed photograph measuring instrument is mainly used to measure and track the exterior ballistics, which can measure the flying position of the missile in the initial phase and trajectory. A new high speed photograph measuring instrument is presented in this paper. High speed photography measuring system records the parameters of object real-time, and then acquires the flying position and trajectory data of the missile in the initial phase. The detection distance of high speed photography is more than 4.5km, and the least detection distance is 450m, under the condition of well-balanced angular velocity and angular acceleration, program pilot track error less than 5'. This instrument also can measure and record the flying trail and trajectory parameters of plane's aero naval missile.

  14. Analysis of neuronal cells of dissociated primary culture on high-density CMOS electrode array.

    PubMed

    Matsuda, Eiko; Mita, Takeshi; Hubert, Julien; Bakkum, Douglas; Frey, Urs; Hierlemann, Andreas; Takahashi, Hirokazu; Ikegami, Takashi

    2013-01-01

    Spontaneous development of neuronal cells was recorded around 4-34 days in vitro (DIV) with high-density CMOS array, which enables detailed study of the spatio-temporal activity of neuronal culture. We used the CMOS array to characterize the evolution of the inter-spike interval (ISI) distribution from putative single neurons, and estimate the network structure based on transfer entropy analysis, where each node corresponds to a single neuron. We observed that the ISI distributions gradually obeyed the power law with maturation of the network. The amount of information transferred between neurons increased at the early stage of development, but decreased as the network matured. These results suggest that both ISI and transfer entropy were very useful for characterizing the dynamic development of cultured neural cells over a few weeks. PMID:24109870

  15. Emulation of high-frequency substrate noise generation in CMOS digital circuits

    NASA Astrophysics Data System (ADS)

    Shimazaki, Shunsuke; Taga, Shota; Makita, Tetsuya; Azuma, Naoya; Miura, Noriyuki; Nagata, Makoto

    2014-01-01

    A noise emulator is based on the capacitor charging modeling and generates power and substrate noises expected in a CMOS digital integrated circuit. An off-chip near-magnetic-field sensor indirectly characterizes the distribution of clock timing and the adjustability of skews within on-chip digital circuits. An on-chip noise monitor captures power and substrate noise waveforms and evaluates noise frequency components in a wide frequency bandwidth. A 65 nm CMOS prototype demonstrated power and substrate noise generation in a variety of operating scenarios of digital integrated circuits. Power noise generation emulated at 125 MHz exhibits the enhancements of high-order harmonic components after deskewing at a timing resolution of 37.8 ps, as is specifically seen in more than 10 dB enlargement of the substrate noise component at 2.1 GHz.

  16. A High Vacuum High Speed Ion Pump

    DOE R&D Accomplishments Database

    Foster, J. S. Jr.; Lawrence, E. O.; Lofgren, E. J.

    1952-08-27

    A vacuum pump based on the properties of a magnetically collimated electric discharge is described. It has a speed in the range 3000 to 7000 liters a second and a base pressure in the order of 10{sup -6} mm. (auth)

  17. Mixed material integration for high-speed applications

    NASA Astrophysics Data System (ADS)

    Krishnamurthy, Nicole Andrea

    A great demand for portable and highly integrated high speed electronic components and systems has recently surfaced as a result of the vast expansion of personal communications and other wireless applications. As more and more applications in personal communications require frequencies between 1 and 100 GHz, a reduction in the cost of III-V technology is necessary for a wide distribution of wireless products in the consumer market. III-V technology provides improved and unique functionality compared with silicon CMOS integrated circuit (IC) technology, yet current III-V technologies cannot meet all the demands of low cost, high levels of integration, low power, and performance because of high material costs and low yield compared with the current silicon technology. In this thesis, thin film mixed material integration is investigated as a method to increase functionality at lower cost. InP active devices are removed from the growth substrate and integrated onto other host substrates such as silicon via substrate removal. Characterization of these devices is performed. Also, thin film passive components via deposition on free standing polyimide are evaluated for lower cost and increased design freedom. By optimizing the passives and III-V active components separately and then integrating the two opens a new realm in mixed material integration.

  18. Superplane!High Speed Civil Transport

    NASA Technical Reports Server (NTRS)

    1998-01-01

    The High Speed Civil Transport (HSCT). This light-hearted promotional piece explains what the HSCT 'Superplane' is and what advantages it will have over current aircraft. As envisioned, the HSCT is a next-generation supersonic (faster than the speed of sound) passenger jet that would fly 300 passengers at more than 1,500 miles per hour -- more than twice the speed of sound. It will cross the Pacific or Atlantic in less than half the time of modern subsonic jets, and at a ticket price less than 20 percent above comparable, slower flights

  19. Propulsion concepts for high speed aircraft

    NASA Technical Reports Server (NTRS)

    Stull, F. D.; Jones, R. A.; Zima, W. P.

    1975-01-01

    A wide variety of potentially useful and effective airbreathing aircraft have been postulated to operate at speeds in excess of Mach 3.0 by NASA and the USAF. These systems include hydrogen-fueled transports of interest for very long ranges and airbreathing launch vehicles which are aircraft-type first stage candidates for future space shuttle systems. Other high speed airbreathing systems for possible future military applications include advanced reconnaissance and fighter/interceptor type aircraft and strategic systems. This paper presents (1) a chronology of Air Force technical activity on future propulsion concepts, (2) a status report on NASA research on scramjet technology for future systems which may require speeds above Mach 5, and (3) a description of a research vehicle by which advanced propulsion technology and other technologies related to high speed can be demonstrated.

  20. High speed switching in gases

    SciTech Connect

    Cassell, R.E.; Villa, F.

    1989-02-01

    A fast, efficient and reliable switch is the basic ingredient of a pulse power accelerator. Two switches have been proposed so far: the solid state switch, and the vacuum photodiode switch. The solid state version has been tested to some extent, albeit at low (few kilovolts) level, with risetime around 10 ps in the radial line transformer configuration. The vacuum photodiode is being investigated by Fisher and Rao at Brookhaven National Laboratory. Common to both switches is the need of a short laser pulse; near infrared for the solid state switch, and ultraviolet for the vacuum photodiode switch. Another common feature is the poor energy gain of these switches: the gain being the ratio between the electrical energy switched and the laser energy needed to drive the switch. For the solid state switch, calculations and experimental data show that the energy gain cannot exceed a value between 5 and 10. For the vacuum photodiode, the situation is somewhat similar, unless very high quantum efficiency, rugged photocathodes can be found. A closing switch also can be used to produce short pulses of rf at frequencies related to its closing time, using a well-known device called the frozen wave generator. For a risetime of the order of 30 ps, one could produce several Gigawatts of rf at Xband at very low cost. 12 refs., 12 figs.

  1. Speckle noise reduction in high speed polarization sensitive spectral domain optical coherence tomography

    NASA Astrophysics Data System (ADS)

    Götzinger, Erich; Pircher, Michael; Baumann, Bernhard; Schmoll, Tilman; Sattmann, Harald; Leitgeb, Rainer A.; Hitzenberger, Christoph K.

    2011-07-01

    We present a high speed polarization sensitive spectral domain optical coherence tomography system based on polarization maintaining fibers and two high speed CMOS line scan cameras capable of retinal imaging with up to 128 k A-lines/s. This high imaging speed strongly reduces motion artifacts and therefore averaging of several B-scans is possible, which strongly reduces speckle noise and improves image quality. We present several methods for averaging retardation and optic axis orientation, the best one providing a 5 fold noise reduction. Furthermore, a novel scheme of calculating images of degree of polarization uniformity is presented. We quantitatively compare the noise reduction depending on the number of averaged frames and discuss the limits of frame numbers that can usefully be averaged.

  2. A high speed direct digital frequency synthesizer based on multi-channel structure

    NASA Astrophysics Data System (ADS)

    Ling, Yuan; Qiang, Zhang; Yin, Shi

    2015-06-01

    This paper presents a direct digital frequency synthesizer (DDFS) for high speed application based on multi-channel structure. This DDFS has phase resolution of 32 bits and magnitude resolution of 12 bits. In order to ensure the high speed and high resolution at the same time, the multi-channel sampling technique is used and a 12 bits linear digital-to-analog converter is implemented. The chip is fabricated in TSMC 130 nm CMOS technology with active area of 0.89 × 0.98 mm2 and total power consumption of 300 mW at a single 1.2 V supply voltage. The maximum operating speed is up to 2.0 GHz at room temperature.

  3. Machine Vision Techniques For High Speed Videography

    NASA Astrophysics Data System (ADS)

    Hunter, David B.

    1984-11-01

    The priority associated with U.S. efforts to increase productivity has led to, among other things, the development of Machine Vision systems for use in manufacturing automation requirements. Many such systems combine solid state television cameras and data processing equipment to facilitate high speed, on-line inspection and real time dimensional measurement of parts and assemblies. These parts are often randomly oriented and spaced on a conveyor belt under continuous motion. Television imagery of high speed events has historically been achieved by use of pulsed (strobe) illumination or high speed shutter techniques synchronized with a camera's vertical blanking to separate write and read cycle operation. Lack of synchronization between part position and camera scanning in most on-line applications precludes use of this vertical interval illumination technique. Alternatively, many Machine Vision cameras incorporate special techniques for asynchronous, stop-motion imaging. Such cameras are capable of imaging parts asynchronously at rates approaching 60 hertz while remaining compatible with standard video recording units. Techniques for asynchronous, stop-motion imaging have not been incorporated in cameras used for High Speed Videography. Imaging of these events has alternatively been obtained through the utilization of special, high frame rate cameras to minimize motion during the frame interval. High frame rate cameras must undoubtedly be utilized for recording of high speed events occurring at high repetition rates. However, such cameras require very specialized, and often expensive, video recording equipment. It seems, therefore, that Machine Vision cameras with capability for asynchronous, stop-motion imaging represent a viable approach for cost effective video recording of high speed events occurring at repetition rates up to 60 hertz.

  4. Aerodynamic design on high-speed trains

    NASA Astrophysics Data System (ADS)

    Ding, San-San; Li, Qiang; Tian, Ai-Qin; Du, Jian; Liu, Jia-Li

    2016-01-01

    Compared with the traditional train, the operational speed of the high-speed train has largely improved, and the dynamic environment of the train has changed from one of mechanical domination to one of aerodynamic domination. The aerodynamic problem has become the key technological challenge of high-speed trains and significantly affects the economy, environment, safety, and comfort. In this paper, the relationships among the aerodynamic design principle, aerodynamic performance indexes, and design variables are first studied, and the research methods of train aerodynamics are proposed, including numerical simulation, a reduced-scale test, and a full-scale test. Technological schemes of train aerodynamics involve the optimization design of the streamlined head and the smooth design of the body surface. Optimization design of the streamlined head includes conception design, project design, numerical simulation, and a reduced-scale test. Smooth design of the body surface is mainly used for the key parts, such as electric-current collecting system, wheel truck compartment, and windshield. The aerodynamic design method established in this paper has been successfully applied to various high-speed trains (CRH380A, CRH380AM, CRH6, CRH2G, and the Standard electric multiple unit (EMU)) that have met expected design objectives. The research results can provide an effective guideline for the aerodynamic design of high-speed trains.

  5. Aerodynamic design on high-speed trains

    NASA Astrophysics Data System (ADS)

    Ding, San-San; Li, Qiang; Tian, Ai-Qin; Du, Jian; Liu, Jia-Li

    2016-04-01

    Compared with the traditional train, the operational speed of the high-speed train has largely improved, and the dynamic environment of the train has changed from one of mechanical domination to one of aerodynamic domination. The aerodynamic problem has become the key technological challenge of high-speed trains and significantly affects the economy, environment, safety, and comfort. In this paper, the relationships among the aerodynamic design principle, aerodynamic performance indexes, and design variables are first studied, and the research methods of train aerodynamics are proposed, including numerical simulation, a reduced-scale test, and a full-scale test. Technological schemes of train aerodynamics involve the optimization design of the streamlined head and the smooth design of the body surface. Optimization design of the streamlined head includes conception design, project design, numerical simulation, and a reduced-scale test. Smooth design of the body surface is mainly used for the key parts, such as electric-current collecting system, wheel truck compartment, and windshield. The aerodynamic design method established in this paper has been successfully applied to various high-speed trains (CRH380A, CRH380AM, CRH6, CRH2G, and the Standard electric multiple unit (EMU)) that have met expected design objectives. The research results can provide an effective guideline for the aerodynamic design of high-speed trains.

  6. High speed hydrogen/graphite interaction

    NASA Technical Reports Server (NTRS)

    Kelly, A. J.; Hamman, R.; Sharma, O. P.; Harrje, D. T.

    1974-01-01

    Various aspects of a research program on high speed hydrogen/graphite interaction are presented. Major areas discussed are: (1) theoretical predictions of hydrogen/graphite erosion rates; (2) high temperature, nonequilibrium hydrogen flow in a nozzle; and (3) molecular beam studies of hydrogen/graphite erosion.

  7. High Speed Digital Camera Technology Review

    NASA Technical Reports Server (NTRS)

    Clements, Sandra D.

    2009-01-01

    A High Speed Digital Camera Technology Review (HSD Review) is being conducted to evaluate the state-of-the-shelf in this rapidly progressing industry. Five HSD cameras supplied by four camera manufacturers participated in a Field Test during the Space Shuttle Discovery STS-128 launch. Each camera was also subjected to Bench Tests in the ASRC Imaging Development Laboratory. Evaluation of the data from the Field and Bench Tests is underway. Representatives from the imaging communities at NASA / KSC and the Optical Systems Group are participating as reviewers. A High Speed Digital Video Camera Draft Specification was updated to address Shuttle engineering imagery requirements based on findings from this HSD Review. This draft specification will serve as the template for a High Speed Digital Video Camera Specification to be developed for the wider OSG imaging community under OSG Task OS-33.

  8. CMOS solid-state photomultipliers for high energy resolution calorimeters

    NASA Astrophysics Data System (ADS)

    Johnson, Erik B.; Stapels, Christopher J.; Chen, Xiao Jie; Whitney, Chad; Chapman, Eric C.; Alberghini, Guy; Rines, Rich; Augustine, Frank; Miskimen, Rory; Lydon, Don; Christian, James

    2011-09-01

    High-energy, gamma-ray calorimetry typically employs large scintillation crystals coupled to photomultiplier tubes. These calorimeters are segmented to the limits associated with the costs of the crystals, photomultiplier tubes, and support electronics. A cost-effective means for construction of a calorimeter system is to use solid-state photomultipliers (SSPM) with front-end electronics, which is at least half the cost, but the SSPM must provide the necessary energy resolution defined by the physics goals. One experiment with plans to exploit this advantage is an upgrade to the PRIMEX experiment at Jefferson Laboratories. We have developed a large-area SSPM (1 cm × 1 cm) for readout of large scintillation crystals. As PbWO4 has excellent properties (small Molière radius and radiation hard) for high-energy gamma-rays (>1 GeV) but low light yields (~150 photons/MeV at 0 °C), evaluation of the SSPM and support readout electronics with LaBr3 provides a measure of the device performance. Using the known detection efficiency and dark current of the SSPM, an excess noise factor associated with after pulsing and cross talk is determined. The contribution to the energy resolution from the detector module is calculated as <1% for gamma rays greater than ~2.5 GeV (0.7% at 4.5 GeV).

  9. Architecture for High Speed Learning of Neural Network using Genetic Algorithm

    NASA Astrophysics Data System (ADS)

    Yoshikawa, Masaya; Terai, Hidekazu

    This paper discusses the architecture for high speed learning of Neural Network (NN) using Genetic Algorithm (GA). The proposed architecture prevents local minimum by using the GA characteristic of holding several individual populations for a population-based search and achieves high speed processing adopting dedicated hardware. To keep general purpose equal software processing, the proposed architecture can be flexible genetic operations on GA and is introduced both Sigmoid function and Heaviside function on NN. Furthermore, the proposed architecture is not optimized only the pipeline at evaluation phase on NN, but also optimized hierarchic pipelines on the whole at evolutionary phase. We have done the simulation, verification and logic synthesis using library of 0.35μm CMOS standard cell. Simulation results evaluating the proposed architecture show to achieve 22 times speed on average compared with software processing.

  10. Aerodynamics of High-Speed Trains

    NASA Astrophysics Data System (ADS)

    Schetz, Joseph A.

    This review highlights the differences between the aerodynamics of high-speed trains and other types of transportation vehicles. The emphasis is on modern, high-speed trains, including magnetic levitation (Maglev) trains. Some of the key differences are derived from the fact that trains operate near the ground or a track, have much greater length-to-diameter ratios than other vehicles, pass close to each other and to trackside structures, are more subject to crosswinds, and operate in tunnels with entry and exit events. The coverage includes experimental techniques and results and analytical and numerical methods, concentrating on the most recent information available.

  11. Congestion control of high-speed networks

    NASA Astrophysics Data System (ADS)

    1993-06-01

    We report on four areas of activity in the past six months. These areas include the following: (1) work on the control of integrated video and image traffic, both at the access to a network and within a high-speed network; (2) more general/game theoretic models for flow control in networks; (3) work on fault management for high-speed heterogeneous networks to improve survivability; and (4) work on all-optical (lightwave) networks of the future, designed to take advantage of the enormous bandwidth capability available at optical frequencies.

  12. Small, high-speed dataflow processor

    SciTech Connect

    Leler, W.

    1983-01-01

    Dataflow processors show much promise for high-speed computation at reasonable cost, but they are not without problems. The author discusses a processor design which combines ideas from dynamic dataflow architecture with those from reduced instruction set computers and proven large computers with parallel internal structures. The resulting processor includes a number of innovations, including operand destinations, killer tokens, I/O streams and closed-loop computation, which result in a small, relatively inexpensive processor capable of high-speed computation. The expected application areas of the processor include interactive computer graphics, signal processing, and artificial intelligence. 6 references.

  13. Spectrum acquisition of detonation based on CMOS

    NASA Astrophysics Data System (ADS)

    Li, Yan; Bai, Yonglin; Wang, Bo; Liu, Baiyu; Xue, Yingdong; Zhang, Wei; Gou, Yongsheng; Bai, Xiaohong; Qin, Junjun; Xian, Ouyang

    2010-10-01

    The detection of high-speed dynamic spectrum is the main method to acquire transient information. In order to obtain the large amount spectral data in real-time during the process of detonation, a CMOS-based system with high-speed spectrum data acquisition is designed. The hardware platform of the system is based on FPGA, and the unique characteristic of CMOS image sensors in the rolling shutter model is used simultaneously. Using FPGA as the master control chip of the system, not only provides the time sequence for CIS, but also controls the storage and transmission of the spectral data. In the experiment of spectral data acquisition, the acquired information is transmitted to the host computer through the CameraLink bus. The dynamic spectral curve is obtained after the subsequent processing. The experimental results demonstrate that this system is feasible in the acquisition and storage of high-speed dynamic spectrum information during the process of detonation.

  14. DAC 22 High Speed Civil Transport Model

    NASA Technical Reports Server (NTRS)

    1992-01-01

    Between tests, NASA research engineer Dave Hahne inspects a tenth-scale model of a supersonic transport model in the 30- by 60-Foot Tunnel at NASA Langley Research Center, Hampton, Virginia. The model is being used in support of NASA's High-Speed Research (HSR) program. Langley researchers are applying advance aerodynamic design methods to develop a wing leading-edge flap system which significantly improves low-speed fuel efficiency and reduces noise generated during takeoff operation. Langley is NASA's lead center for the agency's HSR program, aimed at developing technology to help U.S. industry compete in the rapidly expanding trans-oceanic transport market. A U.S. high-speed civil transport is expected to fly in about the year 2010. As envisioned, it would fly 300 passengers across the Pacific in about four hours at Mach 2.4 (approximately 1,600 mph/1950 kph) for a modest increase over business class fares.

  15. High-speed optical packet processing technologies based on novel optoelectronic devices

    NASA Astrophysics Data System (ADS)

    Takenouchi, Hirokazu; Takahashi, Ryo; Takahata, Kiyoto; Nakahara, Tatsushi; Suzuki, Hiroyuki

    2004-10-01

    To cope with the explosive growth of IP traffic, we must increase both the link capacity between nodes and the node throughput. These requirements have stimulated research on photonic networks that use optical technologies. Optical packet switching (OPS) is an attractive solution because it maximizes the use of the network bandwidth. The key functions in achieving such networks include synchronization, label processing, compression/decompression, regeneration, and buffering for high-speed asynchronous optical packets. However, it is impractical to implement such functions by using all-optical approaches. We have proposed a new optoelectronic system composed of a packet-by-packet optical clock-pulse generator (OCG), an all-optical serial-to-parallel converter (SPC), a photonic parallel-to-serial converter (PSC), and CMOS circuitry. The OCG provides a single optical pulse synchronized with the incoming packet, and the SPC carries out a parallel conversion of the incoming packet. The parallel converted data are processed in the smart CMOS circuit, and reconstructed into an optical packet by the photonic PSC. Our system makes it possible to carry out various functions for high-speed asynchronous optical packets. This paper reviews our recent work on high-speed optical packet processing technologies such as buffering, packet compression/decompression, and label swapping, which are key technologies for constructing future OPS networks.

  16. High Speed and Slow Motion: The Technology of Modern High Speed Cameras

    ERIC Educational Resources Information Center

    Vollmer, Michael; Mollmann, Klaus-Peter

    2011-01-01

    The enormous progress in the fields of microsystem technology, microelectronics and computer science has led to the development of powerful high speed cameras. Recently a number of such cameras became available as low cost consumer products which can also be used for the teaching of physics. The technology of high speed cameras is discussed,…

  17. High-Speed Schlieren Movies of Decelerators at Supersonic Speeds

    NASA Technical Reports Server (NTRS)

    1960-01-01

    Tests were conducted on several types of porous parachutes, a paraglider, and a simulated retrorocket. Mach numbers ranged from 1.8-3.0, porosity from 20-80 percent, and camera speeds from 1680-3000 feet per second (fps) in trials with porous parachutes. Trials of reefed parachutes were conducted at Mach number 2.0 and reefing of 12-33 percent at camera speeds of 600 fps. A flexible parachute with an inflatable ring in the periphery of the canopy was tested at Reynolds number 750,000 per foot, Mach number 2.85, porosity of 28 percent, and camera speed of 36oo fps. A vortex-ring parachute was tested at Mach number 2.2 and camera speed of 3000 fps. The paraglider, with a sweepback of 45 degrees at an angle of attack of 45 degrees was tested at Mach number 2.65, drag coefficient of 0.200, and lift coefficient of 0.278 at a camera speed of 600 fps. A cold air jet exhausting upstream from the center of a bluff body was used to simulate a retrorocket. The free-stream Mach number was 2.0, free-stream dynamic pressure was 620 lb/sq ft, jet-exit static pressure ratio was 10.9, and camera speed was 600 fps.

  18. Post-CMOS compatible high-throughput fabrication of AlN-based piezoelectric microcantilevers

    NASA Astrophysics Data System (ADS)

    Pérez-Campos, A.; Iriarte, G. F.; Hernando-Garcia, J.; Calle, F.

    2015-02-01

    A post-complementary metal oxide semiconductor (CMOS) compatible microfabrication process of piezoelectric cantilevers has been developed. The fabrication process is suitable for standard silicon technology and provides low-cost and high-throughput manufacturing. This work reports design, fabrication and characterization of piezoelectric cantilevers based on aluminum nitride (AlN) thin films synthesized at room temperature. The proposed microcantilever system is a sandwich structure composed of chromium (Cr) electrodes and a sputtered AlN film. The key issue for cantilever fabrication is the growth at room temperature of the AlN layer by reactive sputtering, making possible the innovative compatibility of piezoelectric MEMS devices with CMOS circuits already processed. AlN and Cr have been etched by inductively coupled plasma (ICP) dry etching using a BCl3-Cl2-Ar plasma chemistry. As part of the novelty of the post-CMOS micromachining process presented here, a silicon Si (1 0 0) wafer has been used as substrate as well as the sacrificial layer used to release the microcantilevers. In order to achieve this, the Si surface underneath the structure has been wet etched using an HNA (hydrofluoric acid + nitric acid + acetic acid) based solution. X-ray diffraction (XRD) characterization indicated the high crystalline quality of the AlN film. An atomic force microscope (AFM) has been used to determine the Cr electrode surface roughness. The morphology of the fabricated devices has been studied by scanning electron microscope (SEM). The cantilevers have been piezoelectrically actuated and their out-of-plane vibration modes were detected by vibrometry.

  19. Italian High-speed Airplane Engines

    NASA Technical Reports Server (NTRS)

    Bona, C F

    1940-01-01

    This paper presents an account of Italian high-speed engine designs. The tests were performed on the Fiat AS6 engine, and all components of that engine are discussed from cylinders to superchargers as well as the test set-up. The results of the bench tests are given along with the performance of the engines in various races.

  20. High-speed fiber grating pressure sensors

    NASA Astrophysics Data System (ADS)

    Udd, Eric; Rodriguez, George; Sandberg, Richard L.

    2014-06-01

    Fiber grating pressure sensors have been used to support pressure measurements associated with burn, deflagration and detonation of energetic materials. This paper provides an overview of this technology and serves as a companion paper to the application of this technology to measuring pressure during high speed impacts.

  1. High-speed data word monitor

    NASA Technical Reports Server (NTRS)

    Wirth, M. N.

    1975-01-01

    Small, portable, self-contained device provides high-speed display of bit pattern or any selected portion of transmission, can suppress filler patterns so that display is not updated, and can freeze display so that specific event may be observed in detail.

  2. High Speed SPM of Functional Materials

    SciTech Connect

    Huey, Bryan D.

    2015-08-14

    The development and optimization of applications comprising functional materials necessitates a thorough understanding of their static and dynamic properties and performance at the nanoscale. Leveraging High Speed SPM and concepts enabled by it, efficient measurements and maps with nanoscale and nanosecond temporal resolution are uniquely feasible. This includes recent enhancements for topographic, conductivity, ferroelectric, and piezoelectric properties as originally proposed, as well as newly developed methods or improvements to AFM-based mechanical, friction, thermal, and photoconductivity measurements. The results of this work reveal fundamental mechanisms of operation, and suggest new approaches for improving the ultimate speed and/or efficiency, of data storage systems, magnetic-electric sensors, and solar cells.

  3. Some problems of high speed travel

    PubMed Central

    Reader, D. C.

    1975-01-01

    Some aspects of high speed flight are examined to investigate whether increase in speed implies any lowering of safety standards. The problem of circadian dysrhythmia is discussed and methods of attenuating its effects are explained and some new hypnotic drugs are mentioned. The risk of decompression has been quantified and predictions have been made for risks in commercial service. Cosmic radiation in supersonic aircraft is unlikely to limit commercial operation or significantly increase risks to passengers and crew. The supersonic boom is likely to limit the terrain over which supersonic aircraft can operate and regulations covering engine noise on the ground could restrict some flights. PMID:1208294

  4. Technology needs for high speed rotorcraft (2)

    NASA Technical Reports Server (NTRS)

    Scott, Mark W.

    1991-01-01

    An analytical study was conducted to identify rotorcraft concepts best capable of combining a cruise speed of 350 to 450 knots with helicopter-like low speed attributes, and to define the technology advancements needed to make them viable by the year 2000. A systematic approach was used to compare the relative attributes and mission gross weights for a wide range of concepts, resulting in a downselect to the most promising concept/mission pairs. For transport missions, tilt-wing and variable diameter tilt-rotor (VDTR) concepts were found to be superior. For a military scout/attack role, the VDTR was best, although a shrouded rotor concept could provide a highly agile, low observable alternative if its weight empty fraction could be reduced. A design speed of 375 to 425 knots was found to be the maximum desirable for transport missions, with higher speed producing rapidly diminishing benefits in productivity. The key technologies that require advancement to make the tilt-wing and VDTR concepts viable are in the areas of wing and proprotor aerodynamics, efficient structural design, flight controls, refinement of the geared flap pitch control system, expansion of the speed/descent envelope, and the structural and aerodynamic tradeoffs of wing thickness and forward sweep. For the shrouded rotor, weight reduction is essential, particularly with respect to the mechanism for covering the rotor in cruise.

  5. Sensor study for high speed autonomous operations

    NASA Astrophysics Data System (ADS)

    Schneider, Anne; La Celle, Zachary; Lacaze, Alberto; Murphy, Karl; Del Giorno, Mark; Close, Ryan

    2015-06-01

    As robotic ground systems advance in capabilities and begin to fulfill new roles in both civilian and military life, the limitation of slow operational speed has become a hindrance to the wide-spread adoption of these systems. For example, military convoys are reluctant to employ autonomous vehicles when these systems slow their movement from 60 miles per hour down to 40. However, these autonomous systems must operate at these lower speeds due to the limitations of the sensors they employ. Robotic Research, with its extensive experience in ground autonomy and associated problems therein, in conjunction with CERDEC/Night Vision and Electronic Sensors Directorate (NVESD), has performed a study to specify system and detection requirements; determined how current autonomy sensors perform in various scenarios; and analyzed how sensors should be employed to increase operational speeds of ground vehicles. The sensors evaluated in this study include the state of the art in LADAR/LIDAR, Radar, Electro-Optical, and Infrared sensors, and have been analyzed at high speeds to study their effectiveness in detecting and accounting for obstacles and other perception challenges. By creating a common set of testing benchmarks, and by testing in a wide range of real-world conditions, Robotic Research has evaluated where sensors can be successfully employed today; where sensors fall short; and which technologies should be examined and developed further. This study is the first step to achieve the overarching goal of doubling ground vehicle speeds on any given terrain.

  6. Safety issues in high speed machining

    NASA Astrophysics Data System (ADS)

    1994-05-01

    There are several risks related to High-Speed Milling, but they have not been systematically determined or studied so far. Increased loads by high centrifugal forces may result in dramatic hazards. Flying tools or fragments from a tool with high kinetic energy may damage surrounding people, machines and devices. In the project, mechanical risks were evaluated, theoretic values for kinetic energies of rotating tools were calculated, possible damages of the flying objects were determined and terms to eliminate the risks were considered. The noise levels of the High-Speed Machining center owned by the Helsinki University of Technology (HUT) and the Technical Research Center of Finland (VTT) in practical machining situation were measured and the results were compared to those after basic preventive measures were taken.

  7. High speed printing with polygon scan heads

    NASA Astrophysics Data System (ADS)

    Stutz, Glenn

    2016-03-01

    To reduce and in many cases eliminate the costs associated with high volume printing of consumer and industrial products, this paper investigates and validates the use of the new generation of high speed pulse on demand (POD) lasers in concert with high speed (HS) polygon scan heads (PSH). Associated costs include consumables such as printing ink and nozzles, provisioning labor, maintenance and repair expense as well as reduction of printing lines due to high through put. Targets that are applicable and investigated include direct printing on plastics, printing on paper/cardboard as well as printing on labels. Market segments would include consumer products (CPG), medical and pharmaceutical products, universal ID (UID), and industrial products. In regards to the POD lasers employed, the wavelengths include UV(355nm), Green (532nm) and IR (1064nm) operating within the repetition range of 180 to 250 KHz.

  8. Novel source follower transistor structure without lightly doped drain for high performance CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Song, Hyeong-Sub; Kwon, Sung-Kyu; Jeon, So-Ra; Oh, Dong-Jun; Lee, Ga-Won; Lee, Hi-Deok

    2016-08-01

    To realize high-resolution pixels in the CMOS image sensor, it is necessary to reduce low-frequency noise, particularly random telegraph signal (RTS) noise of the source-follower transistor (SFT). To achieve less relative variation of drain noise current, ΔI D/I D, a metal–oxide–semiconductor field-effect transistor structure without the lightly doped drain (LDD) for the SFT transistor is proposed. Then, a comparison of RTS noise characteristics between the proposed SFT structure without LDD and the conventional SFT structure with LDD was conducted. Although the RTS noise occurrence probability of the proposed SFT structure without LDD is somewhat greater than that of the conventional SFT structure with LDD, the amplitude of relative variation of drain noise current of the proposed SFT structure is significantly less than that of the conventional SFT. Despite changes in several factors in the proposed SFT, such as effective channel length, trap depth profile in gate oxide, and random dopant fluctuation (RDF), it is believed that the change of trap depth profile is a primary factor for the improved RTS characteristic. Therefore, the proposed SFT is highly desirable for the high-resolution CMOS image sensor.

  9. CMOS Amperometric ADC With High Sensitivity, Dynamic Range and Power Efficiency for Air Quality Monitoring.

    PubMed

    Li, Haitao; Boling, C Sam; Mason, Andrew J

    2016-08-01

    Airborne pollutants are a leading cause of illness and mortality globally. Electrochemical gas sensors show great promise for personal air quality monitoring to address this worldwide health crisis. However, implementing miniaturized arrays of such sensors demands high performance instrumentation circuits that simultaneously meet challenging power, area, sensitivity, noise and dynamic range goals. This paper presents a new multi-channel CMOS amperometric ADC featuring pixel-level architecture for gas sensor arrays. The circuit combines digital modulation of input currents and an incremental Σ∆ ADC to achieve wide dynamic range and high sensitivity with very high power efficiency and compact size. Fabricated in 0.5 [Formula: see text] CMOS, the circuit was measured to have 164 dB cross-scale dynamic range, 100 fA sensitivity while consuming only 241 [Formula: see text] and 0.157 [Formula: see text] active area per channel. Electrochemical experiments with liquid and gas targets demonstrate the circuit's real-time response to a wide range of analyte concentrations. PMID:27352395

  10. Data Capture Technique for High Speed Signaling

    DOEpatents

    Barrett, Wayne Melvin; Chen, Dong; Coteus, Paul William; Gara, Alan Gene; Jackson, Rory; Kopcsay, Gerard Vincent; Nathanson, Ben Jesse; Vranas, Paylos Michael; Takken, Todd E.

    2008-08-26

    A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.

  11. High-speed civil transport study

    NASA Technical Reports Server (NTRS)

    1989-01-01

    A system study of the potential for a high-speed commercial transport has addressed technological, economic, and environmental constraints. Market projections indicate a need for fleets of transports with supersonic or greater cruise speeds by the year 2000 to 2005. The associated design requirements called for a vehicle to carry 250 to 300 passengers over a range of 5,000 to 6,000 nautical miles. The study was initially unconstrained in terms of vehicle characteristic, such as cruise speed, propulsion systems, fuels, or structural materials. Analyses led to a focus on the most promising vehicle concepts. These were concepts that used a kerosene-type fuel and cruised at Mach numbers between 2.0 to 3.2. Further systems study identified the impact of environmental constraints (for community noise, sonic boom, and engine emissions) on economic attractiveness and technological needs. Results showed that current technology cannot produce a viable high-speed civil transport; significant advances are required to reduce takeoff gross weight and allow for both economic attractiveness and environmental accepatability. Specific technological requirements were identified to meet these needs.

  12. High-speed civil transport study. Summary

    NASA Technical Reports Server (NTRS)

    1989-01-01

    A system of study of the potential for a high speed commercial transport aircraft addressed technology, economic, and environmental constraints. Market projections indicated a need for fleets of transport with supersonic or greater cruise speeds by the years 2000 to 2005. The associated design requirements called for a vehicle to carry 250 to 300 passengers over a range of 5000 to 6000 nautical miles. The study was initially unconstrained in terms of vehicle characteristics, such as cruise speed, propulsion systems, fuels, or structural materials. Analyses led to a focus on the most promising vehicle concepts. These were concepts that used a kerosene type fuel and cruised at Mach numbers between 2.0 to 3.2. Further systems study identified the impact of environmental constraints (for community noise, sonic boom, and engine emissions) on economic attractiveness and technological needs. Results showed that current technology cannot produce a viable high speed civil transport. Significant advances are needed to take off gross weight and allow for both economic attractiveness and environment acceptability. Specific technological requirements were identified to meet these needs.

  13. High dynamic range CMOS image sensor with pixel level ADC and in-situ image enhancement

    NASA Astrophysics Data System (ADS)

    Harton, Austin V.; Ahmed, Mohamed I.; Beuhler, Allyson; Castro, Francisco; Dawson, Linda M.; Herold, Barry W.; Kujawa, Gregory; Lee, King F.; Mareachen, Russell D.; Scaminaci, Tony J.

    2005-03-01

    We describe a CMOS image sensor with pixel level analog to digital conversion (ADC) having high dynamic range (>100db) and the capability of performing many image processing functions at the pixel level during image capture. The sensor has a 102x98 pixel array and is implemented in a 0.18um CMOS process technology. Each pixel is 15.5um x15.5um with 15% fill factor and is comprised of a comparator, two 10 bit memory registers and control logic. A digital to analog converter and system processor are located off-chip. The photodetector produces a photocurrent yielding a photo-voltage proportional to the impinging light intensity. Once the photo-voltage is less than a predetermined global reference voltage; a global code value is latched into the pixel data buffer. This process prevents voltage saturation resulting in high dynamic range imaging. Upon completion of image capture, a digital representation of the image exists at the pixel array, thereby, allowing image data to be accessed in a parallel fashion from the focal plane array. It is demonstrated that by appropriate variation of the global reference voltage with time, it is possible to perform, during image capture, thresholding and image enhancement operations, such as, contrast stretching in a parallel manner.

  14. High Speed Research Program Sonic Fatigue

    NASA Technical Reports Server (NTRS)

    Rizzi, Stephen A. (Technical Monitor); Beier, Theodor H.; Heaton, Paul

    2005-01-01

    The objective of this sonic fatigue summary is to provide major findings and technical results of studies, initiated in 1994, to assess sonic fatigue behavior of structure that is being considered for the High Speed Civil Transport (HSCT). High Speed Research (HSR) program objectives in the area of sonic fatigue were to predict inlet, exhaust and boundary layer acoustic loads; measure high cycle fatigue data for materials developed during the HSR program; develop advanced sonic fatigue calculation methods to reduce required conservatism in airframe designs; develop damping techniques for sonic fatigue reduction where weight effective; develop wing and fuselage sonic fatigue design requirements; and perform sonic fatigue analyses on HSCT structural concepts to provide guidance to design teams. All goals were partially achieved, but none were completed due to the premature conclusion of the HSR program. A summary of major program findings and recommendations for continued effort are included in the report.

  15. CAOS-CMOS camera.

    PubMed

    Riza, Nabeel A; La Torre, Juan Pablo; Amin, M Junaid

    2016-06-13

    Proposed and experimentally demonstrated is the CAOS-CMOS camera design that combines the coded access optical sensor (CAOS) imager platform with the CMOS multi-pixel optical sensor. The unique CAOS-CMOS camera engages the classic CMOS sensor light staring mode with the time-frequency-space agile pixel CAOS imager mode within one programmable optical unit to realize a high dynamic range imager for extreme light contrast conditions. The experimentally demonstrated CAOS-CMOS camera is built using a digital micromirror device, a silicon point-photo-detector with a variable gain amplifier, and a silicon CMOS sensor with a maximum rated 51.3 dB dynamic range. White light imaging of three different brightness simultaneously viewed targets, that is not possible by the CMOS sensor, is achieved by the CAOS-CMOS camera demonstrating an 82.06 dB dynamic range. Applications for the camera include industrial machine vision, welding, laser analysis, automotive, night vision, surveillance and multispectral military systems. PMID:27410361

  16. Architectures and applications of high-speed vision

    NASA Astrophysics Data System (ADS)

    Watanabe, Yoshihiro; Oku, Hiromasa; Ishikawa, Masatoshi

    2014-11-01

    With the progress made in high-speed imaging technology, image processing systems that can process images at high frame rates, as well as their applications, are expected. In this article, we examine architectures for high-speed vision systems, and also dynamic image control, which can realize high-speed active optical systems. In addition, we also give an overview of some applications in which high-speed vision is used, including man-machine interfaces, image sensing, interactive displays, high-speed three-dimensional sensing, high-speed digital archiving, microvisual feedback, and high-speed intelligent robots.

  17. An ASIC memory buffer controller for a high speed disk system

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.; Campbell, Steve

    1993-01-01

    The need for large capacity, high speed mass memory storage devices has become increasingly evident at NASA during the past decade. High performance mass storage systems are crucial to present and future NASA systems. Spaceborne data storage system requirements have grown in response to the increasing amounts of data generated and processed by orbiting scientific experiments. Predictions indicate increases in the volume of data by orders of magnitude during the next decade. Current predictions are for storage capacities on the order of terabits (Tb), with data rates exceeding one gigabit per second (Gbps). As part of the design effort for a state of the art mass storage system, NASA Langley has designed a 144 CMOS ASIC to support high speed data transfers. This paper discusses the system architecture, ASIC design and some of the lessons learned in the development process.

  18. High-speed broadband tunable lasers

    NASA Astrophysics Data System (ADS)

    Adams, Laura E.; Nykolak, Gerald; Bethea, Clyde G.; Tanbun-Ek, Tawee; People, Roosevelt; Sergent, A. M.; Sciortino, Paul F., Jr.; Fullowan, Thomas R.

    1997-12-01

    New enabling technologies are needed for optical communication systems to accommodate rapidly growing traffic demands. Wavelength conversion and high-speed optical packet switching/routing will be key technology components for realizing more flexible and efficient optical networks. Lasers capable of wide-band, high-speed wavelength tuning will be essential to support these advanced functions. Also, many applications will require high launch powers in order to access an increasing number of users, nodes, or base stations. Hence, laser transmitters capable of suppressing stimulated Brillouin scattering (SBS) would be highly desirable. We have developed an ultrafast, broadband tunable laser, based on an electroabsorption modulator laser (EML), which exhibits wavelength switching speeds as fast as 56 ps. Here, we report system performance results on wavelength conversion high-speed optical packet switching, and SBS suppression using this device. We have tested multiple wavelength conversion sequences and demonstrated penalty-free transmission through two cascaded wavelength conversion stages including 200 km of standard non-DS fiber. When used to perform packet switching at 2.5 Gb/s, the tunable laser allows switching between optical packets on 4 wavelength channels in less than 1 bit period, thereby requiring no significant guardband. The modulated data packets have been transmitted through 200 km of non-DSF and yield open eye diagrams. The tunable laser has also been used to perform SBS suppression. We have measured SBS thresholds of approximately 25 dBm on 4 separate WDM channels. The required modulation signal is very small, 95 mVpp, and the residual AM is only approximately 1%.

  19. Survey Of High Speed Test Techniques

    NASA Astrophysics Data System (ADS)

    Gheewala, Tushar

    1988-02-01

    The emerging technologies for the characterization and production testing of high-speed devices and integrated circuits are reviewed. The continuing progress in the field of semiconductor technologies will, in the near future, demand test techniques to test 10ps to lOOps gate delays, 10 GHz to 100 GHz analog functions and 10,000 to 100,000 gates on a single chip. Clearly, no single test technique would provide a cost-effective answer to all the above demands. A divide-and-conquer approach based on a judicial selection of parametric, functional and high-speed tests will be required. In addition, design-for-test methods need to be pursued which will include on-chip test electronics as well as circuit techniques that minimize the circuit performance sensitivity to allowable process variations. The electron and laser beam based test technologies look very promising and may provide the much needed solutions to not only the high-speed test problem but also to the need for high levels of fault coverage during functional testing.

  20. The NASA High-Speed Research Program

    NASA Technical Reports Server (NTRS)

    Beam, Sherilee F.

    1992-01-01

    Since its inception, one of NASA's commitments has been to develop the technology to advance aeronautics. As such, a new High-Speed Research Program was activated to develop the technology for industry to build a High-Speed Civil Transport - a second generation Supersonic Transport (SST). The baseline for this program is the British Concorde, a major technological achievement for its time, but an aircraft which is now both technologically and economically outdated. Therefore, a second generation SST must satisfy environmental concerns and still be economically viable. In order to do this, it must have no significant effect on the ozone layer, meet Federal Air Regulation 36, Stage 3 for community noise, and have no perceptible sonic boom over populated areas. These three concerns are the focus of the research efforts in Phase 1 of the program and are the specific areas covered in the technical video report.

  1. Pulse Detonation Engines for High Speed Flight

    NASA Technical Reports Server (NTRS)

    Povinelli, Louis A.

    2002-01-01

    Revolutionary concepts in propulsion are required in order to achieve high-speed cruise capability in the atmosphere and for low cost reliable systems for earth to orbit missions. One of the advanced concepts under study is the air-breathing pulse detonation engine. Additional work remains in order to establish the role and performance of a PDE in flight applications, either as a stand-alone device or as part of a combined cycle system. In this paper, we shall offer a few remarks on some of these remaining issues, i.e., combined cycle systems, nozzles and exhaust systems and thrust per unit frontal area limitations. Currently, an intensive experimental and numerical effort is underway in order to quantify the propulsion performance characteristics of this device. In this paper, we shall highlight our recent efforts to elucidate the propulsion potential of pulse detonation engines and their possible application to high-speed or hypersonic systems.

  2. High-speed tensile test instrument

    NASA Astrophysics Data System (ADS)

    Mott, P. H.; Twigg, J. N.; Roland, D. F.; Schrader, H. S.; Pathak, J. A.; Roland, C. M.

    2007-04-01

    A novel high-speed tensile test instrument is described, capable of measuring the mechanical response of elastomers at strain rates ranging from 10 to 1600 s-1 for strains through failure. The device employs a drop weight that engages levers to stretch a sample on a horizontal track. To improve dynamic equilibrium, a common problem in high speed testing, equal and opposite loading was applied to each end of the sample. Demonstrative results are reported for two elastomers at strain rates to 588 s-1 with maximum strains of 4.3. At the higher strain rates, there is a substantial inertial contribution to the measured force, an effect unaccounted for in prior works using the drop weight technique. The strain rates were essentially constant over most of the strain range and fill a three-decade gap in the data from existing methods.

  3. High-speed massively parallel scanning

    DOEpatents

    Decker, Derek E.

    2010-07-06

    A new technique for recording a series of images of a high-speed event (such as, but not limited to: ballistics, explosives, laser induced changes in materials, etc.) is presented. Such technique(s) makes use of a lenslet array to take image picture elements (pixels) and concentrate light from each pixel into a spot that is much smaller than the pixel. This array of spots illuminates a detector region (e.g., film, as one embodiment) which is scanned transverse to the light, creating tracks of exposed regions. Each track is a time history of the light intensity for a single pixel. By appropriately configuring the array of concentrated spots with respect to the scanning direction of the detection material, different tracks fit between pixels and sufficient lengths are possible which can be of interest in several high-speed imaging applications.

  4. A high efficiency PWM CMOS class-D audio power amplifier

    NASA Astrophysics Data System (ADS)

    Zhangming, Zhu; Lianxi, Liu; Yintang, Yang; Han, Lei

    2009-02-01

    Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 μm CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 μA. The active area of the class-D audio power amplifier is about 1.47 × 1.52 mm2. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.

  5. Manufacture and characterization of high Q-factor inductors based on CMOS-MEMS techniques.

    PubMed

    Yang, Ming-Zhi; Dai, Ching-Liang; Hong, Jin-Yu

    2011-01-01

    A high Q-factor (quality-factor) spiral inductor fabricated by the CMOS (complementary metal oxide semiconductor) process and a post-process was investigated. The spiral inductor is manufactured on a silicon substrate. A post-process is used to remove the underlying silicon substrate in order to reduce the substrate loss and to enhance the Q-factor of the inductor. The post-process adopts RIE (reactive ion etching) to etch the sacrificial oxide layer, and then TMAH (tetramethylammonium hydroxide) is employed to remove the silicon substrate for obtaining the suspended spiral inductor. The advantage of this post-processing method is its compatibility with the CMOS process. The performance of the spiral inductor is measured by an Agilent 8510C network analyzer and a Cascade probe station. Experimental results show that the Q-factor and inductance of the spiral inductor are 15 at 15 GHz and 1.8 nH at 1 GHz, respectively. PMID:22163726

  6. Manufacture and Characterization of High Q-Factor Inductors Based on CMOS-MEMS Techniques

    PubMed Central

    Yang, Ming-Zhi; Dai, Ching-Liang; Hong, Jin-Yu

    2011-01-01

    A high Q-factor (quality-factor) spiral inductor fabricated by the CMOS (complementary metal oxide semiconductor) process and a post-process was investigated. The spiral inductor is manufactured on a silicon substrate. A post-process is used to remove the underlying silicon substrate in order to reduce the substrate loss and to enhance the Q-factor of the inductor. The post-process adopts RIE (reactive ion etching) to etch the sacrificial oxide layer, and then TMAH (tetramethylammonium hydroxide) is employed to remove the silicon substrate for obtaining the suspended spiral inductor. The advantage of this post-processing method is its compatibility with the CMOS process. The performance of the spiral inductor is measured by an Agilent 8510C network analyzer and a Cascade probe station. Experimental results show that the Q-factor and inductance of the spiral inductor are 15 at 15 GHz and 1.8 nH at 1 GHz, respectively. PMID:22163726

  7. Turbulence modeling for high speed compressible flows

    NASA Technical Reports Server (NTRS)

    Chandra, Suresh

    1993-01-01

    The following grant objectives were delineated in the proposal to NASA: to offer course work in computational fluid dynamics (CFD) and related areas to enable mechanical engineering students at North Carolina A&T State University (N.C. A&TSU) to pursue M.S. studies in CFD, and to enable students and faculty to engage in research in high speed compressible flows. Since no CFD-related activity existed at N.C. A&TSU before the start of the NASA grant period, training of students in the CFD area and initiation of research in high speed compressible flows were proposed as the key aspects of the project. To that end, graduate level courses in CFD, boundary layer theory, and fluid dynamics were offered. This effort included initiating a CFD course for graduate students. Also, research work was performed on studying compressibility effects in high speed flows. Specifically, a modified compressible dissipation model, which included a fourth order turbulent Mach number term, was incorporated into the SPARK code and verified for the air-air mixing layer case. The results obtained for this case were compared with a wide variety of experimental data to discern the trends in the mixing layer growth rates with varying convective Mach numbers. Comparison of the predictions of the study with the results of several analytical models was also carried out. The details of the research study are described in the publication entitled 'Compressibility Effects in Modeling Turbulent High Speed Mixing Layers,' which is attached to this report.

  8. Turbulence modeling for high speed compressible flows

    NASA Astrophysics Data System (ADS)

    Chandra, Suresh

    1993-08-01

    The following grant objectives were delineated in the proposal to NASA: to offer course work in computational fluid dynamics (CFD) and related areas to enable mechanical engineering students at North Carolina A&T State University (N.C. A&TSU) to pursue M.S. studies in CFD, and to enable students and faculty to engage in research in high speed compressible flows. Since no CFD-related activity existed at N.C. A&TSU before the start of the NASA grant period, training of students in the CFD area and initiation of research in high speed compressible flows were proposed as the key aspects of the project. To that end, graduate level courses in CFD, boundary layer theory, and fluid dynamics were offered. This effort included initiating a CFD course for graduate students. Also, research work was performed on studying compressibility effects in high speed flows. Specifically, a modified compressible dissipation model, which included a fourth order turbulent Mach number term, was incorporated into the SPARK code and verified for the air-air mixing layer case. The results obtained for this case were compared with a wide variety of experimental data to discern the trends in the mixing layer growth rates with varying convective Mach numbers. Comparison of the predictions of the study with the results of several analytical models was also carried out. The details of the research study are described in the publication entitled 'Compressibility Effects in Modeling Turbulent High Speed Mixing Layers,' which is attached to this report.

  9. Development of high-speed video cameras

    NASA Astrophysics Data System (ADS)

    Etoh, Takeharu G.; Takehara, Kohsei; Okinaka, Tomoo; Takano, Yasuhide; Ruckelshausen, Arno; Poggemann, Dirk

    2001-04-01

    Presented in this paper is an outline of the R and D activities on high-speed video cameras, which have been done in Kinki University since more than ten years ago, and are currently proceeded as an international cooperative project with University of Applied Sciences Osnabruck and other organizations. Extensive marketing researches have been done, (1) on user's requirements on high-speed multi-framing and video cameras by questionnaires and hearings, and (2) on current availability of the cameras of this sort by search of journals and websites. Both of them support necessity of development of a high-speed video camera of more than 1 million fps. A video camera of 4,500 fps with parallel readout was developed in 1991. A video camera with triple sensors was developed in 1996. The sensor is the same one as developed for the previous camera. The frame rate is 50 million fps for triple-framing and 4,500 fps for triple-light-wave framing, including color image capturing. Idea on a video camera of 1 million fps with an ISIS, In-situ Storage Image Sensor, was proposed in 1993 at first, and has been continuously improved. A test sensor was developed in early 2000, and successfully captured images at 62,500 fps. Currently, design of a prototype ISIS is going on, and, hopefully, will be fabricated in near future. Epoch-making cameras in history of development of high-speed video cameras by other persons are also briefly reviewed.

  10. High-speed pitch angle sorter

    NASA Technical Reports Server (NTRS)

    Keller, John W.; Torbert, R. B.; Vandiver, James

    1991-01-01

    A high-speed method was developed to compress the two-dimensional angular distribution of space particles gathered by space plasma instrumentation into the angle distribution, where the pitch angle is polar angle with respect to the ambient magnetic field. The pitch angle sorter can handle rates of up to 2 MHz and it is designed to accommodate high angular resolution plasma analyzers that are placed on a rotating spacecraft. This compression is achieved by relying on digitally encoded lookup tables to eliminate all arithmetic operations while applying the high symmetry of this compression to reduce the amount of digital memory.

  11. MM-122: High speed civil transport

    NASA Technical Reports Server (NTRS)

    Demarest, Bill; Anders, Kurt; Manchec, John; Yang, Eric; Overgaard, Dan; Kalkwarf, Mike

    1992-01-01

    The rapidly expanding Pacific Rim market along with other growing markets indicates that the future market potential for a high speed civil transport is great indeed. The MM-122 is the answer to the international market desire for a state of the art, long range, high speed civil transport. It will carry 250 passengers a distance of 5200 nm at over twice the speed of sound. The MM-122 is designed to incorporate the latest technologies in the areas of control systems, propulsions, aerodynamics, and materials. The MM-122 will accomplish these goals using the following design parameters. First, a double delta wing planform with highly swept canards and an appropriately area ruled fuselage will be incorporated to accomplish desired aerodynamic characteristics. Propulsion will be provided by four low bypass variable cycle turbofan engines. A quad-redundant fly-by-wire flight control system will be incorporated to provide appropriate static stability and level 1 handling qualities. Finally, the latest in conventional metallic and modern composite materials will be used to provide desired weight and performance characteristics. The MM-122 incorporates the latest in technology and cost minimization techniques to provide a viable solution to this future market potential.

  12. Testing of high speed network components

    SciTech Connect

    Wing, W.R.

    1997-06-30

    At the time of the start of this project, a battle was being fought between the computer networking technologies and telephone networking technologies. The telecommunications industry wanted to standardize on Asynchronous Transfer Mode (ATM) as the technology of choice for carrying all cross-country traffic. The computer industry wanted to use Packet Transfer Mode (PTM). The project had several goals, some unspoken. At the highest, most obvious level, the project goals were to test the high-speed components being developed by the computer technology industry. However, in addition, both industrial partners were having trouble finding markets for the high-speed networking technology they were developing and deploying. Thus, a part of the project was to demonstrate applications developed at Oak Ridge which would stretch the limits of the network, and thus demonstrate the utility of high-speed networks. Finally, an unspoken goal of the computer technology industry was to convince the telecommunications industry that packet switching was superior to cell switching. Conversely, the telecommunications industry hoped to see the computer technology industry`s packet switch fail to perform in a real-world test. Project was terminated early due to failure of one of the CRADA partners to deliver needed component.

  13. Technology needs for high speed rotorcraft (3)

    NASA Technical Reports Server (NTRS)

    Detore, Jack; Conway, Scott

    1991-01-01

    The spectrum of vertical takeoff and landing (VTOL) type aircraft is examined to determine which aircraft are most likely to achieve high subsonic cruise speeds and have hover qualities similar to a helicopter. Two civil mission profiles are considered: a 600-n.mi. mission for a 15- and a 30-passenger payload. Applying current technology, only the 15- and 30-passenger tiltfold aircraft are capable of attaining the 450-knot design goal. The two tiltfold aircraft at 450 knots and a 30-passenger tiltrotor at 375 knots were further developed for the Task II technology analysis. A program called High-Speed Total Envelope Proprotor (HI-STEP) is recommended to meet several of these issues based on the tiltrotor concept. A program called Tiltfold System (TFS) is recommended based on the tiltrotor concept. A task is identified to resolve the best design speed from productivity and demand considerations based on the technology that emerges from the recommended programs. HI-STEP's goals are to investigate propulsive efficiency, maneuver loads, and aeroelastic stability. Programs currently in progress that may meet the other technology needs include the Integrated High Performance Turbine Engine Technology (IHPTET) (NASA Lewis) and the Advanced Structural Concepts Program funded through NASA Langley.

  14. Large area CMOS bio-pixel array for compact high sensitive multiplex biosensing.

    PubMed

    Sandeau, Laure; Vuillaume, Cassandre; Contié, Sylvain; Grinenval, Eva; Belloni, Federico; Rigneault, Hervé; Owens, Roisin M; Fournet, Margaret Brennan

    2015-02-01

    A novel CMOS bio-pixel array which integrates assay substrate and assay readout is demonstrated for multiplex and multireplicate detection of a triplicate of cytokines with single digit pg ml(-1) sensitivities. Uniquely designed large area bio-pixels enable individual assays to be dedicated to and addressed by single pixels. A capability to simultaneously measure a large number of targets is provided by the 128 available pixels. Chemiluminescent assays are carried out directly on the pixel surface which also detects the emitted chemiluminescent photons, facilitating a highly compact sensor and reader format. The high sensitivity of the bio-pixel array is enabled by the high refractive index of silicon based pixels. This in turn generates a strong supercritical angle luminescence response significantly increasing the efficiency of the photon collection over conventional farfield modalities. PMID:25490928

  15. All aboard for high-speed rail

    SciTech Connect

    Herman, D.

    1996-09-01

    A sleek, bullet-nosed train whizzing across the countryside is a fairly common sight in many nations. Since the Train a Grande Vitesse (TGV)--the record-setting ``train with great speed``--was introduced in France in 1981, Germany, Japan, and other countries have joined the high-speed club. In addition, the Eurostar passenger train, which travels between Great Britain and France through the Channel Tunnel, can move at 186 miles per hour once it reaches French tracks. Despite the technology`s growth elsewhere, rapid rail travel has not been seen on US shores beyond a few test runs by various manufacturers. Before the end of the century, however, American train spotters will finally be able to see some very fast trains here too. In March, Washington, DC-based Amtrak announced the purchase of 18 American Flyer high-speed train sets for the Northeast Corridor, which stretches from Boston through new York to the nation`s capital. Furthermore, Florida will get its own system by 2004, and other states are now taking a look at the technology. The American Flyer--designed by Montreal-based Bombardier and TGV manufacturer GEC Alsthom Transport in Paris--should venture onto US rails by 1999. Traveling at up to 150 miles per hour, the American Flyer will cut the New York-Boston run from 4 1/2 hours to 3 hours and reduce New York-Washington trip time from 3 hours to less than 2 3/4. Amtrak hopes the new trains and better times will earn it a greater share of travelers from air shuttles and perhaps from Interstate 95. This article describes how technologies that tilt railcars and propel the world`s fastest trains will be merged into one train set for the American Flyer, Amtrak`s first trip along high-speed rails.

  16. High dynamic range CMOS-based mammography detector for FFDM and DBT

    NASA Astrophysics Data System (ADS)

    Peters, Inge M.; Smit, Chiel; Miller, James J.; Lomako, Andrey

    2016-03-01

    Digital Breast Tomosynthesis (DBT) requires excellent image quality in a dynamic mode at very low dose levels while Full Field Digital Mammography (FFDM) is a static imaging modality that requires high saturation dose levels. These opposing requirements can only be met by a dynamic detector with a high dynamic range. This paper will discuss a wafer-scale CMOS-based mammography detector with 49.5 μm pixels and a CsI scintillator. Excellent image quality is obtained for FFDM as well as DBT applications, comparing favorably with a-Se detectors that dominate the X-ray mammography market today. The typical dynamic range of a mammography detector is not high enough to accommodate both the low noise and the high saturation dose requirements for DBT and FFDM applications, respectively. An approach based on gain switching does not provide the signal-to-noise benefits in the low-dose DBT conditions. The solution to this is to add frame summing functionality to the detector. In one X-ray pulse several image frames will be acquired and summed. The requirements to implement this into a detector are low noise levels, high frame rates and low lag performance, all of which are unique characteristics of CMOS detectors. Results are presented to prove that excellent image quality is achieved, using a single detector for both DBT as well as FFDM dose conditions. This method of frame summing gave the opportunity to optimize the detector noise and saturation level for DBT applications, to achieve high DQE level at low dose, without compromising the FFDM performance.

  17. High-speed rolling deflectometer data evaluation

    NASA Astrophysics Data System (ADS)

    Andren, Peter

    1999-01-01

    The high-speed rolling deflectometer is one of the result of almost twenty year of research in pavement condition using laser technique. The latest research vehicle is the laser Road Deflection Tester, built in the mid-nineties using experiences from a prototype truck from the early nineties. Apart from the laser range finders used for finding used for finding the deflection, the truck is also equipped with optical speedometers for both longitudinal and transversal speed, accelerometers and force transducers on the rear wheel axle and a gyro for assessing the deviation. Presently, only the laser range finders are being used as the rest of the sensors has not been calibrated in a satisfying way. During the spring and summer of 1998 a first test program was carried out, and about twenty different roads were studied as a first step towards a more thorough investigation on a road network level. The results from this first major test with the high-speed rolling deflectometer are very promising and, even though many questions remains to be answered, the method has most certainly a strong potential. A general view of some different ways to evaluate the data, as well as more thorough evaluation of some specific roads, will be presented in this paper.

  18. Cryogenic, high speed, turbopump bearing cooling requirements

    NASA Technical Reports Server (NTRS)

    Dolan, Fred J.; Gibson, Howard G.; Cannon, James L.; Cody, Joe C.

    1988-01-01

    Although the Space Shuttle Main Engine (SSME) has repeatedly demonstrated the capability to perform during launch, the High Pressure Oxidizer Turbopump (HPOTP) main shaft bearings have not met their 7.5 hour life requirement. A tester is being employed to provide the capability of subjecting full scale bearings and seals to speeds, loads, propellants, temperatures, and pressures which simulate engine operating conditions. The tester design permits much more elaborate instrumentation and diagnostics than could be accommodated in an SSME turbopump. Tests were made to demonstrate the facilities; and the devices' capabilities, to verify the instruments in its operating environment and to establish a performance baseline for the flight type SSME HPOTP Turbine Bearing design. Bearing performance data from tests are being utilized to generate: (1) a high speed, cryogenic turbopump bearing computer mechanical model, and (2) a much improved, very detailed thermal model to better understand bearing internal operating conditions. Parametric tests were also made to determine the effects of speed, axial loads, coolant flow rate, and surface finish degradation on bearing performance.

  19. Pressure Distribution Over Airfoils at High Speeds

    NASA Technical Reports Server (NTRS)

    Briggs, L J; Dryden, H L

    1927-01-01

    This report deals with the pressure distribution over airfoils at high speeds, and describes an extension of an investigation of the aerodynamic characteristics of certain airfoils which was presented in NACA Technical Report no. 207. The results presented in report no. 207 have been confirmed and extended to higher speeds through a more extensive and systematic series of tests. Observations were also made of the air flow near the surface of the airfoils, and the large changes in lift coefficients were shown to be associated with a sudden breaking away of the flow from the upper surface. The tests were made on models of 1-inch chord and comparison with the earlier measurements on models of 3-inch chord shows that the sudden change in the lift coefficient is due to compressibility and not to a change in the Reynolds number. The Reynolds number still has a large effect, however, on the drag coefficient. The pressure distribution observations furnish the propeller designer with data on the load distribution at high speeds, and also give a better picture of the air-flow changes.

  20. A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders

    NASA Astrophysics Data System (ADS)

    Lee, Seungbeom; Lee, Hanho

    This paper presents a novel high-speed low-complexity pipelined degree-computationless modified Euclidean (pDCME) algorithm architecture for high-speed RS decoders. The pDCME algorithm allows elimination of the degree-computation so as to reduce hardware complexity and obtain high-speed processing. A high-speed RS decoder based on the pDCME algorithm has been designed and implemented with 0.13-μm CMOS standard cell technology in a supply voltage of 1.1V. The proposed RS decoder operates at a clock frequency of 660MHz and has a throughput of 5.3Gb/s. The proposed architecture requires approximately 15% fewer gate counts and a simpler control logic than architectures based on the popular modified Euclidean algorithm.

  1. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 μm process with a high resistivity epitaxial layer

    NASA Astrophysics Data System (ADS)

    Senyukov, S.; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35 μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz 0.18 μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 1013neq /cm2 was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz 0.18 μm CMOS process for the ALICE ITS upgrade.

  2. Experimental Studies on High Speed Air Intakes

    NASA Astrophysics Data System (ADS)

    Panigrahy, Amit Kumar; Muruganandam, T. M.

    All high speed air breathing engines require an inlet to decelerate air from free stream velocity to a lower velocity conducive to combustion. The inlet is designed to capture and deliver the required mass flow to combustion chamber with minimum pressure loss, along with minimum flow distortion. Inlet buzz can occur due to several reasons, such as large internal area contraction ratio, serious shock-boundary layer interactions, and high back pressure. Inlet buzz is detrimental to thrust and can even cause structural damage. Thus a detailed back pressure and over contraction based study of inlet behavior is needed.

  3. An Analog Gamma Correction Scheme for High Dynamic Range CMOS Logarithmic Image Sensors

    PubMed Central

    Cao, Yuan; Pan, Xiaofang; Zhao, Xiaojin; Wu, Huisi

    2014-01-01

    In this paper, a novel analog gamma correction scheme with a logarithmic image sensor dedicated to minimize the quantization noise of the high dynamic applications is presented. The proposed implementation exploits a non-linear voltage-controlled-oscillator (VCO) based analog-to-digital converter (ADC) to perform the gamma correction during the analog-to-digital conversion. As a result, the quantization noise does not increase while the same high dynamic range of logarithmic image sensor is preserved. Moreover, by combining the gamma correction with the analog-to-digital conversion, the silicon area and overall power consumption can be greatly reduced. The proposed gamma correction scheme is validated by the reported simulation results and the experimental results measured for our designed test structure, which is fabricated with 0.35 μm standard complementary-metal-oxide-semiconductor (CMOS) process. PMID:25517692

  4. An analog gamma correction scheme for high dynamic range CMOS logarithmic image sensors.

    PubMed

    Cao, Yuan; Pan, Xiaofang; Zhao, Xiaojin; Wu, Huisi

    2014-01-01

    In this paper, a novel analog gamma correction scheme with a logarithmic image sensor dedicated to minimize the quantization noise of the high dynamic applications is presented. The proposed implementation exploits a non-linear voltage-controlled-oscillator (VCO) based analog-to-digital converter (ADC) to perform the gamma correction during the analog-to-digital conversion. As a result, the quantization noise does not increase while the same high dynamic range of logarithmic image sensor is preserved. Moreover, by combining the gamma correction with the analog-to-digital conversion, the silicon area and overall power consumption can be greatly reduced. The proposed gamma correction scheme is validated by the reported simulation results and the experimental results measured for our designed test structure, which is fabricated with 0.35 μm standard complementary-metal-oxide-semiconductor (CMOS) process. PMID:25517692

  5. A low-power CMOS WIA-PA transceiver with a high sensitivity GFSK demodulator

    NASA Astrophysics Data System (ADS)

    Tao, Yang; Yu, Jiang; Shengyou, Liu; Guiliang, Guo; Yuepeng, Yan

    2015-06-01

    This paper presents a low power, high sensitivity Gaussian frequency shift keying (GFSK) demodulator with a flexible frequency offset canceling method for wireless networks for industrial automation process automation (WIA-PA) transceiver fabricated in 0.18 μm CMOS technology. The receiver uses a low-IF (1.5 MHz) architecture, and the transmitter uses a sigma delta PLL based modulation with Gaussian low-pass filter for low power consumption. The active area of the demodulator is 0.14 mm2. Measurement results show that the proposed demodulator operates without harmonic distortion, deals with ± 180 kHz frequency offset, needs SNR only 18.5 dB at 0.1% bit-error rate (BER), and consumes no more than 0.26 mA from a 1.8 V power supply. Project supported by the National High Technology Research and Development Program of China (No. 2011AA040102).

  6. High speed SLVS transmitter and receiver

    NASA Astrophysics Data System (ADS)

    Bulbakov, I. S.; Atkin, E. V.; Voronin, A. G.

    2016-02-01

    Design of SLVS chip-to-chip communication transmitter/receiver IP block in 180 nm UMC MMRF CMOS process is presented. This block has been developed for study a data transmission over PCBs and/or electrical cables (lines) of few meters length at rates up to 320 Mb/s. Schematic for on-chip tests is also presented. This blocks are used for communication between front-end ASICs and DAQ system.

  7. High-Speed, High-Resolution Time-to-Digital Conversion

    NASA Technical Reports Server (NTRS)

    Katz, Richard; Kleyner, Igor; Garcia, Rafael

    2013-01-01

    This innovation is a series of time-tag pulses from a photomultiplier tube, featuring short time interval between pulses (e.g., 2.5 ns). Using the previous art, dead time between pulses is too long, or too much hardware is required, including a very-high-speed demultiplexer. A faster method is needed. The goal of this work is to provide circuits to time-tag pulses that arrive at a high rate using the hardwired logic in an FPGA - specifically the carry chain - to create what is (in effect) an analog delay line. High-speed pulses travel down the chain in a "wave." For instance, a pulse train has been demonstrated from a 1- GHz source reliably traveling down the carry chain. The size of the carry chain is over 10 ns in the time domain. Thus, multiple pulses will travel down the carry chain in a wave simultaneously. A register clocked by a low-skew clock takes a "snapshot" of the wave. Relatively simple logic can extract the pulses from the snapshot picture by detecting the transitions between logic states. The propagation delay of CMOS (complementary metal oxide semiconductor) logic circuits will differ and/or change as a result of temperature, voltage, age, radiation, and manufacturing variances. The time-to-digital conversion circuits can be calibrated with test signals, or the changes can be nulled by a separate on-die calibration channel, in a closed loop circuit.

  8. High speed GaN micro-light-emitting diode arrays for data communications

    NASA Astrophysics Data System (ADS)

    Watson, Scott; McKendry, Jonathan J. D.; Zhang, Shuailong; Massoubre, David; Rae, Bruce R.; Green, Richard P.; Gu, Erdan; Henderson, Robert K.; Kelly, A. E.; Dawson, Martin D.

    2012-10-01

    Micro light-emitting diode (micro-LED) arrays based on an AlInGaN structure have attracted much interest recently as light sources for data communications. Visible light communication (VLC), over free space or plastic optical fibre (POF), has become a very important technique in the role of data transmission. The micro-LEDs which are reported here contain pixels ranging in diameter from 14 to 84μm and can be driven directly using a high speed probe or via complementary metal-oxide semiconductor (CMOS) technology. The CMOS arrays allow for easy, computer control of individual pixels within arrays containing up to 16×16 elements. The micro-LEDs best suited for data transmission have peak emissions of 450nm or 520nm, however various other wavelengths across the visible spectrum can also be used. Optical modulation bandwidths of over 400MHz have been achieved as well as error-free (defined as an error rate of <1x10-10) data transmission using on-off keying (OOK) non-return-to-zero (NRZ) modulation at data rates of over 500Mbit/s over free space. Also, as a step towards a more practical multi-emitter data transmitter, the frequency response of a micro-LED integrated with CMOS circuitry was measured and found to be up to 185MHz. Despite the reduction in bandwidth compared to the bare measurements using a high speed probe, a good compromise is achieved from the additional control available to select each pixel. It has been shown that modulating more than one pixel simultaneously can increase the data rate. As work continues in this area, the aim will be to further increase the data transmission rate by modulating more pixels on a single device to transmit multiple parallel data channels simultaneously.

  9. High-Speed, high-power, switching transistor

    NASA Technical Reports Server (NTRS)

    Carnahan, D.; Ohu, C. K.; Hower, P. L.

    1979-01-01

    Silicon transistor rate for 200 angstroms at 400 to 600 volts combines switching speed of transistors with ruggedness, power capacity of thyristor. Transistor introduces unique combination of increased power-handling capability, unusally low saturation and switching losses, and submicrosecond switching speeds. Potential applications include high power switching regulators, linear amplifiers, chopper controls for high frequency electrical vehicle drives, VLF transmitters, RF induction heaters, kitchen cooking ranges, and electronic scalpels for medical surgery.

  10. High-speed Civil Transport Aircraft Emissions

    NASA Technical Reports Server (NTRS)

    Miake-Lye, Richard C.; Matulaitis, J. A.; Krause, F. H.; Dodds, Willard J.; Albers, Martin; Hourmouziadis, J.; Hasel, K. L.; Lohmann, R. P.; Stander, C.; Gerstle, John H.

    1992-01-01

    Estimates are given for the emissions from a proposed high speed civil transport (HSCT). This advanced technology supersonic aircraft would fly in the lower stratosphere at a speed of roughly Mach 1.6 to 3.2 (470 to 950 m/sec or 920 to 1850 knots). Because it would fly in the stratosphere at an altitude in the range of 15 to 23 km commensurate with its design speed, its exhaust effluents could perturb the chemical balance in the upper atmosphere. The first step in determining the nature and magnitude of any chemical changes in the atmosphere resulting from these proposed aircraft is to identify and quantify the chemically important species they emit. Relevant earlier work is summarized, dating back to the Climatic Impact Assessment Program of the early 1970s and current propulsion research efforts. Estimates are provided of the chemical composition of an HSCT's exhaust, and these emission indices are presented. Other aircraft emissions that are not due to combustion processes are also summarized; these emissions are found to be much smaller than the exhaust emissions. Future advances in propulsion technology, in experimental measurement techniques, and in understanding upper atmospheric chemistry may affect these estimates of the amounts of trace exhaust species or their relative importance.

  11. Exhaust emissions from high speed passenger ferries

    NASA Astrophysics Data System (ADS)

    Cooper, D. A.

    Exhaust emission measurements have been carried out on-board three high-speed passenger ferries (A, B and C) during normal service routes. Ship A was powered by conventional, medium-speed, marine diesel engines, Ship B by gas turbine engines and Ship C conventional, medium-speed, marine diesel engines equipped with selective catalytic reduction (SCR) systems for NO x abatement. All ships had similar auxiliary engines (marine diesels) for generating electric power on-board. Real-world emission factors of NOx, SO2, CO, CO 2, NMVOC, CH4, N2O, NH3, PM and PAH at steady-state engine loads and for complete voyages were determined together with an estimate of annual emissions. In general, Ship B using gas turbines showed favourable NO x, PM and PAH emissions but at the expense of higher fuel consumption and CO 2 emissions. Ship C with the SCR had the lowest NO x emissions but highest NH 3 emissions especially during harbour approaches and stops. The greatest PM and PAH specific emissions were measured from auxiliary engines operating at low engine loads during harbour stops. Since all ships used a low-sulphur gas oil, SO 2 emissions were relatively low in all cases.

  12. Three-Dimensional Image Cytometer Based on Widefield Structured Light Microscopy and High-Speed Remote Depth Scanning

    PubMed Central

    Choi, Heejin; Wadduwage, Dushan N.; Tu, Ting Yuan; Matsudaira, Paul; So, Peter T. C.

    2014-01-01

    A high throughput 3D image cytometer have been developed that improves imaging speed by an order of magnitude over current technologies. This imaging speed improvement was realized by combining several key components. First, a depth-resolved image can be rapidly generated using a structured light reconstruction algorithm that requires only two wide field images, one with uniform illumination and the other with structured illumination. Second, depth scanning is implemented using the high speed remote depth scanning. Finally, the large field of view, high NA objective lens and the high pixelation, high frame rate sCMOS camera enable high resolution, high sensitivity imaging of a large cell population. This system can image at 800 cell/sec in 3D at submicron resolution corresponding to imaging 1 million cells in 20 min. The statistical accuracy of this instrument is verified by quantitatively measuring rare cell populations with ratio ranging from 1:1 to 1:105. PMID:25352187

  13. Fibre-optic coupling to high-resolution CCD and CMOS image sensors

    NASA Astrophysics Data System (ADS)

    van Silfhout, R. G.; Kachatkou, A. S.

    2008-12-01

    We describe a simple method of gluing fibre-optic faceplates to complementary metal oxide semiconductor (CMOS) active pixel and charge coupled device (CCD) image sensors and report on their performance. Cross-sectional cuts reveal that the bonding layer has a thickness close to the diameter of the individual fibres and is uniform over the whole sensor area. Our method requires no special tools or alignment equipment and gives reproducible and high-quality results. The method maintains a uniform bond layer thickness even if sensor dies are mounted at slight angles with their package. These fibre-coupled sensors are of particular interest to X-ray imaging applications but also provide a solution for compact optical imaging systems.

  14. Two-phase low-power analogue CMOS peak detector with high dynamic range

    NASA Astrophysics Data System (ADS)

    Malankin, E.

    2016-02-01

    A low-power two-phase peak detector with wide dynamic range was developed. The PD was designed on the basis ofthe CMOS UMC 180 nm process. This block is considered as a part of the read-out electronics of the CBM experiment at upcoming FAIR accelerator (Germany). Peak detector has the following advantages: wide dynamic range of 5 - 1000 mV, low power consumption of 500 µW. The designed PD meets the requirements to the muon chamber read-out electronics of the CBM experiment. Due to the area efficiency (100×90 μm2) and low power consumption it can be used in different applications for high-energy physics read-out electronics.

  15. High Voltage CMOS control interface for astronomy—Grade charged coupled devices

    NASA Astrophysics Data System (ADS)

    Martin, E.; Varner, G.; Koga, A.; Ruckman, L.; Onaka, P.; Tonry, J.; Lee, A.

    2008-08-01

    The Pan-STARRS telescope consists of an array of smaller mirrors viewed by a Giga-pixel arrays of CCDs. These focal planes employ Orthogonal Transfer CCDs (OTCCDs) to allow on-chip image stabilization. Each OTCCD has advanced logic features that are controlled externally. A CMOS Interface Device for High Voltage has been developed to provide the appropiate voltage signal levels from a readout and control system designated STARGRASP. OTCCD chip output levels range from -3.3V to 16.7V, with two different output drive strengths required depending on load capacitance (50pF and 1000pF), with 24mA of drive and a rise time on the order of 100ns. Additional testing Wilkinson ADC structures have been included in this chip to evaluate future functional additions for a next version of the chip.

  16. The Hubble Space Telescope high speed photometer

    NASA Technical Reports Server (NTRS)

    Vancitters, G. W., Jr.; Bless, R. C.; Dolan, J. F.; Elliot, J. L.; Robinson, E. L.; White, R. L.

    1988-01-01

    The Hubble Space Telescope will provide the opportunity to perform precise astronomical photometry above the disturbing effects of the atmosphere. The High Speed Photometer is designed to provide the observatory with a stable, precise photometer with wide dynamic range, broad wavelenth coverage, time resolution in the microsecond region, and polarimetric capability. Here, the scientific requirements for the instrument are examined, the unique design features of the photometer are explored, and the improvements to be expected over the performance of ground-based instruments are projected.

  17. High Speed Solid State Circuit Breaker

    NASA Technical Reports Server (NTRS)

    Podlesak, Thomas F.

    1993-01-01

    The U.S. Army Research Laboratory, Fort Monmouth, NJ, has developed and is installing two 3.3 MW high speed solid state circuit breakers at the Army's Pulse Power Center. These circuit breakers will interrupt 4160V three phase power mains in no more than 300 microseconds, two orders of magnitude faster than conventional mechanical contact type circuit breakers. These circuit breakers utilize Gate Turnoff Thyristors (GTO's) and are currently utility type devices using air cooling in an air conditioned enclosure. Future refinements include liquid cooling, either water or two phase organic coolant, and more advanced semiconductors. Each of these refinements promises a more compact, more reliable unit.

  18. High-speed multispectral confocal biomedical imaging

    PubMed Central

    Carver, Gary E.; Locknar, Sarah A.; Morrison, William A.; Krishnan Ramanujan, V.; Farkas, Daniel L.

    2014-01-01

    Abstract. A new approach for generating high-speed multispectral confocal images has been developed. The central concept is that spectra can be acquired for each pixel in a confocal spatial scan by using a fast spectrometer based on optical fiber delay lines. This approach merges fast spectroscopy with standard spatial scanning to create datacubes in real time. The spectrometer is based on a serial array of reflecting spectral elements, delay lines between these elements, and a single element detector. The spatial, spectral, and temporal resolution of the instrument is described and illustrated by multispectral images of laser-induced autofluorescence in biological tissues. PMID:24658777

  19. High-speed Digital Baseband Mixer

    NASA Technical Reports Server (NTRS)

    Chan, F. P.; Quirk, M. P.; Jurgens, R. F.

    1985-01-01

    The feasibility of designing a digital, complex, baseband mixer with a 50 MHz sampling rate is explored. The baseband filter must provide passbands with linear phase response to minimize intersymbol interference. The effects of signal quantization, filter coefficient quantization, dynamic range, filter response characteristics, and the performance of the mixer when used for cross correlation and autocorrelation pulse detection techniques are discussed. This filter was designed for use in the high speed data acquisition system (HSDAS), an advanced experimental system in the Deep Space Network.

  20. Experimental and theoretical performance analysis for a CMOS-based high resolution image detector

    NASA Astrophysics Data System (ADS)

    Jain, Amit; Bednarek, Daniel R.; Rudin, Stephen

    2014-03-01

    Increasing complexity of endovascular interventional procedures requires superior x-ray imaging quality. Present stateof- the-art x-ray imaging detectors may not be adequate due to their inherent noise and resolution limitations. With recent developments, CMOS based detectors are presenting an option to fulfill the need for better image quality. For this work, a new CMOS detector has been analyzed experimentally and theoretically in terms of sensitivity, MTF and DQE. The detector (Dexela Model 1207, Perkin-Elmer Co., London, UK) features 14-bit image acquisition, a CsI phosphor, 75 μm pixels and an active area of 12 cm x 7 cm with over 30 fps frame rate. This detector has two modes of operations with two different full-well capacities: high and low sensitivity. The sensitivity and instrumentation noise equivalent exposure (INEE) were calculated for both modes. The detector modulation-transfer function (MTF), noise-power spectra (NPS) and detective quantum efficiency (DQE) were measured using an RQA5 spectrum. For the theoretical performance evaluation, a linear cascade model with an added aliasing stage was used. The detector showed excellent linearity in both modes. The sensitivity and the INEE of the detector were found to be 31.55 DN/μR and 0.55 μR in high sensitivity mode, while they were 9.87 DN/μR and 2.77 μR in low sensitivity mode. The theoretical and experimental values for the MTF and DQE showed close agreement with good DQE even at fluoroscopic exposure levels. In summary, the Dexela detector's imaging performance in terms of sensitivity, linear system metrics, and INEE demonstrates that it can overcome the noise and resolution limitations of present state-of-the-art x-ray detectors.

  1. Study of high-speed civil transports

    NASA Technical Reports Server (NTRS)

    1989-01-01

    A systems study to identify the economic potential for a high-speed commercial transport (HSCT) has considered technology, market characteristics, airport infrastructure, and environmental issues. Market forecasts indicate a need for HSCT service in the 2000/2010 time frame conditioned on economic viability and environmental acceptability. Design requirements focused on a 300 passenger, 3 class service, and 6500 nautical mile range based on the accelerated growth of the Pacific region. Compatibility with existing airports was an assumed requirement. Mach numbers between 2 and 25 were examined in conjunction with the appropriate propulsion systems, fuels, structural materials, and thermal management systems. Aircraft productivity was a key parameter with aircraft worth, in comparison to aircraft price, being the airline-oriented figure of merit. Aircraft screening led to determination that Mach 3.2 (TSJF) would have superior characteristics to Mach 5.0 (LNG) and the recommendation that the next generation high-speed commercial transport aircraft use a kerosene fuel. The sensitivity of aircraft performance and economics to environmental constraints (e.g., sonic boom, engine emissions, and airport/community noise) was identified together with key technologies. In all, current technology is not adequate to produce viable HSCTs for the world marketplace. Technology advancements must be accomplished to meet environmental requirements (these requirements are as yet undetermined for sonic boom and engine emissions). High priority is assigned to aircraft gross weight reduction which benefits both economics and environmental aspects. Specific technology requirements are identified and national economic benefits are projected.

  2. High Speed Research - External Vision System (EVS)

    NASA Technical Reports Server (NTRS)

    1998-01-01

    Imagine flying a supersonic passenger jet (like the Concorde) at 1500 mph with no front windows in the cockpit - it may one day be a reality, as seen in this animation still. NASA engineers are working to develop technology that would replace the forward cockpit windows in future supersonic passenger jets with large sensor displays. These displays would use video images, enhanced by computer-generated graphics, to take the place of the view out the front windows. The envisioned eXternal Visibility System (XVS) would guide pilots to an airport, warn them of other aircraft near their path, and provide additional visual aides for airport approaches, landings and takeoffs. Currently, supersonic transports like the Anglo-French Concorde droop the front of the jet (the 'nose') downward to allow the pilots to see forward during takeoffs and landings. By enhancing the pilots' vision with high-resolution video displays, future supersonic transport designers could eliminate the heavy and expensive, mechanically-drooped nose. A future U.S. supersonic passenger jet, as envisioned by NASA's High-Speed Research (HSR) program, would carry 300 passengers more than 5000 nautical miles per hour more than 1500 miles per hour (more than twice the speed of sound). Traveling from Los Angeles to Tokyo would take only four hours, with an anticipated fare increase of only 20 percent over current ticket prices for substantially slower subsonic flights. Animation by Joey Ponthieux, Computer Sciences Corporation, Inc.

  3. ACTS High-Speed VSAT Demonstrated

    NASA Technical Reports Server (NTRS)

    Tran, Quang K.

    1999-01-01

    The Advanced Communication Technology Satellite (ACTS) developed by NASA has demonstrated the breakthrough technologies of Ka-band transmission, spot-beam antennas, and onboard processing. These technologies have enabled the development of very small and ultrasmall aperture terminals (VSAT s and USAT's), which have capabilities greater than have been possible with conventional satellite technologies. The ACTS High Speed VSAT (HS VSAT) is an effort at the NASA Glenn Research Center at Lewis Field to experimentally demonstrate the maximum user throughput data rate that can be achieved using the technologies developed and implemented on ACTS. This was done by operating the system uplinks as frequency division multiple access (FDMA), essentially assigning all available time division multiple access (TDMA) time slots to a single user on each of two uplink frequencies. Preliminary results show that, using a 1.2-m antenna in this mode, the High Speed VSAT can achieve between 22 and 24 Mbps of the 27.5 Mbps burst rate, for a throughput efficiency of 80 to 88 percent.

  4. High-speed optogenetic circuit mapping

    NASA Astrophysics Data System (ADS)

    Augustine, George J.; Chen, Susu; Gill, Harin; Katarya, Malvika; Kim, Jinsook; Kudolo, John; Lee, Li M.; Lee, Hyunjeong; Lo, Shun Qiang; Nakajima, Ryuichi; Park, Min-Yoon; Tan, Gregory; Tang, Yanxia; Teo, Peggy; Tsuda, Sachiko; Wen, Lei; Yoon, Su-In

    2013-03-01

    Scanning small spots of laser light allows mapping of synaptic circuits in brain slices from transgenic mice expressing channelrhodopsin-2 (ChR2). These light spots photostimulate presynaptic neurons expressing ChR2, while postsynaptic responses can be monitored in neurons that do not express ChR2. Correlating the location of the light spot with the amplitude of the postsynaptic response elicited at that location yields maps of the spatial organization of the synaptic circuits. This approach yields maps within minutes, which is several orders of magnitude faster than can be achieved with conventional paired electrophysiological methods. We have applied this high-speed technique to map local circuits in many brain regions. In cerebral cortex, we observed that maps of excitatory inputs to pyramidal cells were qualitatively different from those measured for interneurons within the same layers of the cortex. In cerebellum, we have used this approach to quantify the convergence of molecular layer interneurons on to Purkinje cells. The number of converging interneurons is reduced by treatment with gap junction blockers, indicating that electrical synapses between interneurons contribute substantially to the spatial convergence. Remarkably, gap junction blockers affect convergence in sagittal cerebellar slices but not in coronal slices, indicating sagittal polarization of electrical coupling between interneurons. By measuring limb movement or other forms of behavioral output, this approach also can be used in vivo to map brain circuits non-invasively. In summary, ChR2-mediated high-speed mapping promises to revolutionize our understanding of brain circuitry.

  5. High Speed Telescopic Imaging of Sprites

    NASA Astrophysics Data System (ADS)

    McHarg, M. G.; Stenbaek-Nielsen, H. C.; Kanmae, T.; Haaland, R. K.

    2010-12-01

    A total of 21 sprite events were recorded at Langmuir Laboratory, New Mexico, during the nights of 14 and 15 July 2010 with a 500 mm focal length Takahashi Sky 90 telescope. The camera used was a Phantom 7.3 with a VideoScope image intensifier. The images were 512x256 pixels for a field of view of 1.3x0.6 degrees. The data were recorded at 16,000 frames per second (62 μs between images) and an integration time of 20 μs per image. Co-aligned with the telescope was a second similar high-speed camera, but with an 85 mm Nikon lens; this camera recorded at 10,000 frames per second with 100 μs exposure. The image format was also 512x256 pixels for a field of view of 7.3x3.7 degrees. The 21 events recorded include all basic sprite elements: Elve, sprite halos, C-sprites, carrot sprites, and large jellyfish sprites. We compare and contrast the spatial details seen in the different types of sprites, including streamer head size and the number of streamers subsequent to streamer head splitting. Telescopic high speed image of streamer tip splitting in sprites recorded at 07:06:09 UT on 15 July 2010.

  6. Design and image-quality performance of high resolution CMOS-based X-ray imaging detectors for digital mammography

    NASA Astrophysics Data System (ADS)

    Cha, B. K.; Kim, J. Y.; Kim, Y. J.; Yun, S.; Cho, G.; Kim, H. K.; Seo, C.-W.; Jeon, S.; Huh, Y.

    2012-04-01

    In digital X-ray imaging systems, X-ray imaging detectors based on scintillating screens with electronic devices such as charge-coupled devices (CCDs), thin-film transistors (TFT), complementary metal oxide semiconductor (CMOS) flat panel imagers have been introduced for general radiography, dental, mammography and non-destructive testing (NDT) applications. Recently, a large-area CMOS active-pixel sensor (APS) in combination with scintillation films has been widely used in a variety of digital X-ray imaging applications. We employed a scintillator-based CMOS APS image sensor for high-resolution mammography. In this work, both powder-type Gd2O2S:Tb and a columnar structured CsI:Tl scintillation screens with various thicknesses were fabricated and used as materials to convert X-ray into visible light. These scintillating screens were directly coupled to a CMOS flat panel imager with a 25 × 50 mm2 active area and a 48 μm pixel pitch for high spatial resolution acquisition. We used a W/Al mammographic X-ray source with a 30 kVp energy condition. The imaging characterization of the X-ray detector was measured and analyzed in terms of linearity in incident X-ray dose, modulation transfer function (MTF), noise-power spectrum (NPS) and detective quantum efficiency (DQE).

  7. High Speed Research: Propulsion Project Accomplishments

    NASA Technical Reports Server (NTRS)

    Shaw, Robert J.

    1998-01-01

    This past year has been one of great accomplishment for the propulsion element of NASA's High Speed Research (HSR) Program. The HSR Program is a NASA/industry partnership to develop the high-risk/high-payoff airframe and propulsion technologies applicable to a second-generation supersonic commercial transport, or High Speed Civil Transport (HSCT). The propulsion element, which also involves industry partners, is managed by the NASA Lewis Research Center. These technologies will contribute greatly to U.S. industry's ability to make an informed product launch decision for an HSCT vehicle. Specific NASA Lewis accomplishments in 1997 include: 1. Small-scale combustor sector tests conducted in Lewis' Engine Research Building contributed to the evolution of approaches to developing a combustor with ultralow NOx emissions. 2. Components were tested in Lewis' CE-9 facility (in Lewis' Engine Research Building) to assess the performance of candidate ceramic matrix composite (CMC) materials in this realistic combustion environment. Test results were promising, and acceptable levels of structural durability were demonstrated for the ceramic matrix composite material tested. Ceramic matrix composites continue to show great promise for use in HSCT combustor liners. 3. Engine emissions tests in Lewis' Propulsion Systems Laboratory provided insight into other classes of emissions (e.g., particulates and aerosols) which will be important to control in HSCT propulsion system designs. 4. Small-scale nozzle tests conducted in Lewis' Aero-Acoustic Propulsion Laboratory are contributing to the design of a low-noise, high-performance mixer/ejector nozzle configuration for HSCT engines. Over 18,000 hours of durability testing were completed in Lewis' materials laboratories to evaluate superalloy and g-titanium aluminide performance for HSCT nozzle applications. A two-dimensional supersonic inlet concept was tested in Lewis' 10- by 10-Foot Supersonic Wind Tunnel. The extensive database and

  8. Advances in high speed jet aeroacoustics

    NASA Technical Reports Server (NTRS)

    Seiner, J. M.

    1984-01-01

    This paper provides an assessment from an experimental point of view of the present understanding of high speed jet noise primarily as it pertains to shock containing supersonic jet plumes. The nature of this assessment involves an examination of the complex flow and related acoustic field associated with this problem. A certain emphasis is placed on prediction of the near acoustic field to satisfy a motivation driven by a new set of guiding principles, namely the high performance tactical fighter and second generation space transportation vehicles. The review concludes that after weighing all the experimental evidence, only after consideration of the role of large scale coherent structure is adopted can a consistent unifying theme be achieved to physically interpret and properly predict noise generation by the fundamental mechanisms.

  9. High Speed Data Bus Active Coupler

    NASA Astrophysics Data System (ADS)

    Herrmann, James J.

    The author discusses the HSDB (high speed data bus) active coupler which provides a typical 13-dB power margin for HSDB systems installed in military aircraft. This high-power margin ensures reliable HSDB operation through fiber-optic component degradation. The active coupler performs optical amplification and signal reshaping functions such that an incoming signal is modified only in amplitude. Signal distortion and jitter are removed by a retiming ASIC (application-specific integrated circuit). The active coupler is modular in design, and plug-in growth for a 38 x 38 user interface is available. The active coupler achieves better than -27 dBm sensitivity at 5 x 10 exp -11 bit error rate and outputs -8 to -12 dBm optical power. The active coupler unit weighs only 6.25 lbs and has a predicted mean time between failure of over 21,000 h.

  10. High-Speed Atomic Force Microscopy

    NASA Astrophysics Data System (ADS)

    Ando, Toshio; Uchihashi, Takayuki; Kodera, Noriyuki

    2012-08-01

    The technology of high-speed atomic force microscopy (HS-AFM) has reached maturity. HS-AFM enables us to directly visualize the structure and dynamics of biological molecules in physiological solutions at subsecond to sub-100 ms temporal resolution. By this microscopy, dynamically acting molecules such as myosin V walking on an actin filament and bacteriorhodopsin in response to light are successfully visualized. High-resolution molecular movies reveal the dynamic behavior of molecules in action in great detail. Inferences no longer have to be made from static snapshots of molecular structures and from the dynamic behavior of optical markers attached to biomolecules. In this review, we first describe theoretical considerations for the highest possible imaging rate, then summarize techniques involved in HS-AFM and highlight recent imaging studies. Finally, we briefly discuss future challenges to explore.

  11. Intelligence: The Speed and Accuracy Tradeoff in High Aptitude Individuals.

    ERIC Educational Resources Information Center

    Lajoie, Suzanne P.; Shore, Bruce M.

    1986-01-01

    The relative contributions of mental speed and accuracy to Primary Mental Ability (PMA) IQ prediction were studied in 52 high ability grade 10 students. Both speed and accuracy independently predicted IQ, but not speed over and above accuracy. Accuracy was demonstrated to be universally advantageous in IQ performance, but speed varied according to…

  12. Using a High-Speed Camera to Measure the Speed of Sound

    ERIC Educational Resources Information Center

    Hack, William Nathan; Baird, William H.

    2012-01-01

    The speed of sound is a physical property that can be measured easily in the lab. However, finding an inexpensive and intuitive way for students to determine this speed has been more involved. The introduction of affordable consumer-grade high-speed cameras (such as the Exilim EX-FC100) makes conceptually simple experiments feasible. Since the…

  13. High-speed ACR/NEMA interface

    NASA Astrophysics Data System (ADS)

    Reijns, Gerard L.; Santilli, D.; Schellingerhout, G.; Jochem, A. J.; Ottes, Fenno P.; van Aken, I. W.

    1990-08-01

    The design and implementation of a standard high speed ACR-NEMA communications interface is described. The upper layers e.g. the Presentation layer, Session layer and part of the Transport/Network layer have been implemented in software. In order to reach the speed requirement of 8M byte/sec. the lower layers e.g. part of the Transport/Network layer and Data Link layer have been implemented in hardware. We have developed and built an interface for an IBM personal computer P5/2 model 50, working under the operating system OS/2. The PS/2, model 50 has been equipped with a fast micro-channel bus, which enables a large throughput. The operating systern OS/2 has a multitasking capability, which enables concurrent programming. In order to minimize the delays, we used this multitasking facility to create a number of parallel operating "threads". The Transport/Network layer functions have been implemented using a receive thread, two send threads and a device driver with three hardware registers. The time to transfer a packet by DMA, to initiate the DMA logic and to execute the required Kernal functions have each been measured and figures are shown. The Data Link layer provides for storage of two packets in two separate random access memories (RAM's). These two RAM's enable a pipelined operation, which minimizes the delay in the Data Link layer.

  14. The Ignitor High Speed Pellet Injector^*

    NASA Astrophysics Data System (ADS)

    Bombarda, F.; Migliori, S.; Frattolillo, A.; Baylor, L. R.; Caughman, J. B. O.; Combs, S. K.; Fehling, D.; Foust, C.; McJill, J. M.; Roveta, G.

    2007-11-01

    A joint ENEA-Frascati and ORNL program for the development of a four barrel, two-stage pellet injector for the Ignitor experiment is in progress. At 4 km/s, pellets can penetrate close to the plasma center when injected from the low field side even for the plasma temperatures expected at ignition. Recent activities carried out at ORNL include improvements to the cryostat, the addition of miniature adjustable heaters in the the freezing zone, and of four close-coupled valves for rapid evacuation of gas after a shot. The LabView application software was successfully used to control the simultaneous formation of D2 pellets, from 2.1 to 4.6 mm in diameter, that were launched at low speed. ORNL developed, specifically for this application, the light gate and microwave cavity mass detector diagnostics that provide in-flight measurements of the pellet mass and speed, together with its picture. The ENEA two-stage propelling system, now ready for shipping to ORNL, makes use of special pulse shaping valves, while fast valves prevent the propulsion gas from reaching the plasma chamber. Novel experiments, e.g. to create high pressure plasmas in existing devices using this innovative facility, have been envisioned and are being simulated. ^*Sponsored in part by ENEA of Italy and by the U.S. D.O.E.

  15. High-Speed RaPToRS

    NASA Astrophysics Data System (ADS)

    Henchen, Robert; Esham, Benjamin; Becker, William; Pogozelski, Edward; Padalino, Stephen; Sangster, Thomas; Glebov, Vladimir

    2008-11-01

    The High-Speed Rapid Pneumatic Transport of Radioactive Samples (HS-RaPToRS) system, designed to quickly and safely move radioactive materials, was assembled and tested at the Mercury facility of the Naval Research Laboratory (NRL) in Washington D.C. A sample, which is placed inside a four-inch-diameter carrier, is activated before being transported through a PVC tube via airflow. The carrier travels from the reaction chamber to the end station where it pneumatically brakes prior to the gate. A magnetic latch releases the gate when the carrier arrives and comes to rest. The airflow, optical carrier-monitoring devices, and end gate are controlled manually or automatically with LabView software. The installation and testing of the RaPToRS system at NRL was successfully completed with transport times of less than 3 seconds. The speed of the carrier averaged 16 m/s. Prospective facilities for similar systems include the Laboratory for Laser Energetics and the National Ignition Facility.

  16. High speed civil transport aerodynamic optimization

    NASA Technical Reports Server (NTRS)

    Ryan, James S.

    1994-01-01

    This is a report of work in support of the Computational Aerosciences (CAS) element of the Federal HPCC program. Specifically, CFD and aerodynamic optimization are being performed on parallel computers. The long-range goal of this work is to facilitate teraflops-rate multidisciplinary optimization of aerospace vehicles. This year's work is targeted for application to the High Speed Civil Transport (HSCT), one of four CAS grand challenges identified in the HPCC FY 1995 Blue Book. This vehicle is to be a passenger aircraft, with the promise of cutting overseas flight time by more than half. To meet fuel economy, operational costs, environmental impact, noise production, and range requirements, improved design tools are required, and these tools must eventually integrate optimization, external aerodynamics, propulsion, structures, heat transfer, controls, and perhaps other disciplines. The fundamental goal of this project is to contribute to improved design tools for U.S. industry, and thus to the nation's economic competitiveness.

  17. HIGH SPEED KERR CELL FRAMING CAMERA

    DOEpatents

    Goss, W.C.; Gilley, L.F.

    1964-01-01

    The present invention relates to a high speed camera utilizing a Kerr cell shutter and a novel optical delay system having no moving parts. The camera can selectively photograph at least 6 frames within 9 x 10/sup -8/ seconds during any such time interval of an occurring event. The invention utilizes particularly an optical system which views and transmits 6 images of an event to a multi-channeled optical delay relay system. The delay relay system has optical paths of successively increased length in whole multiples of the first channel optical path length, into which optical paths the 6 images are transmitted. The successively delayed images are accepted from the exit of the delay relay system by an optical image focusing means, which in turn directs the images into a Kerr cell shutter disposed to intercept the image paths. A camera is disposed to simultaneously view and record the 6 images during a single exposure of the Kerr cell shutter. (AEC)

  18. Neutron and high speed photogrammetric arcjet diagnosis

    NASA Technical Reports Server (NTRS)

    Stewart, P. A. E.; Rogers, J. D.; Fowler, P. H.; Deininger, W. D.; Taylor, A. D.

    1989-01-01

    Two methods for real time internal diagnostics of arcjet engines are described. One method uses cold, thermal, or epithermal neutrons. Cold neutrons are used to detect the presence and location of hydrogenous propellants. Thermal neutrons are used to delineate the edge contours of anode and cathode surfaces and to measure stress/strain. Epithermal neutrons are used to measure temperatures on arcjet surfaces, bulk material temperatures, and point temperatures in bulk materials. It is found that this method, with an exposure time of 10 min, produces at temperature accuracy for W or Re of + or - 2.5 C. The other method uses visible-light high-speed photogrammetry to obtain images of the transient behavior of the arc during start-up and to relate this behavior to electrial supply characteristics such as voltage, current, and ripple.

  19. Technology needs for high-speed rotorcraft

    NASA Technical Reports Server (NTRS)

    Rutherford, John; Orourke, Matthew; Martin, Christopher; Lovenguth, Marc; Mitchell, Clark

    1991-01-01

    A study to determine the technology development required for high-speed rotorcraft development was conducted. The study begins with an initial assessment of six concepts capable of flight at, or greater than 450 knots with helicopter-like hover efficiency (disk loading less than 50 pfs). These concepts were sized and evaluated based on measures of effectiveness and operational considerations. Additionally, an initial assessment of the impact of technology advances on the vehicles attributes was made. From these initial concepts a tilt wing and rotor/wing concepts were selected for further evaluation. A more detailed examination of conversion and technology trade studies were conducted on these two vehicles, each sized for a different mission.

  20. High-speed electrical motor evaluation

    SciTech Connect

    Not Available

    1989-02-03

    Under this task, MTI conducted a general review of state-of-the-art high-speed motors. The purpose of this review was to assess the operating parameters, limitations and performance of existing motor designs, and to establish commercial sources for a motor compatible with the requirements of the Brayton-cycle system. After the motor requirements were established, a list of motor types, manufacturers and designs capable of achieving the requisite performance was compiled. This list was based on an in-house evaluation of designs. Following the establishment of these options, a technical evaluation of the designs selected was conducted. In parallel with their evaluations, MTI focused on the establishment of commercial sources.

  1. Merging of high speed argon plasma jets

    SciTech Connect

    Case, A.; Messer, S.; Brockington, S.; Wu, L.; Witherspoon, F. D.; Elton, R.

    2013-01-15

    Formation of an imploding plasma liner for the plasma liner experiment (PLX) requires individual plasma jets to merge into a quasi-spherical shell of plasma converging on the origin. Understanding dynamics of the merging process requires knowledge of the plasma phenomena involved. We present results from the study of the merging of three plasma jets in three dimensional geometry. The experiments were performed using HyperV Technologies Corp. 1 cm Minirailguns with a preionized argon plasma armature. The vacuum chamber partially reproduces the port geometry of the PLX chamber. Diagnostics include fast imaging, spectroscopy, interferometry, fast pressure probes, B-dot probes, and high speed spatially resolved photodiodes, permitting measurements of plasma density, temperature, velocity, stagnation pressure, magnetic field, and density gradients. These experimental results are compared with simulation results from the LSP 3D hybrid PIC code.

  2. The Silicon Photomultiplier for High Speed Photometry

    NASA Astrophysics Data System (ADS)

    Vander Haagen, Gary A.

    2011-05-01

    The Silicon Photomultiplier (SPM) offers sensitivity comparable to conventional photomultipliers with the added advantage of small size, low operating voltages, and robust tolerance to excess/ambient light. A Peltier cooled SPM running at -30°C was used in conjunction with wideband electronics and a 17-inch Astrograph to collect photometric data without a reference star. High speed photometric trials were conducted on eclipsing binary AW UMa demonstrating fast data rate capability. Data shows the SPM exhibits excellent sensitivity, acceptable signal to noise, and bandwidth with sampling times as short as 1 millisecond for brighter targets. Automated digital data acquisition is discussed along with digital signal processing techniques for noise reduction, spectral analysis, and data mining. The SPM demonstrated acceptable signal to noise for fast photometric studies for 8-10th magnitude targets depending on scintillation and background conditions. Future SPM study topics are also discussed.

  3. FEC for high-speed optical transmission

    NASA Astrophysics Data System (ADS)

    Xie, Changsong; Zhao, Yu; Xiao, Zhiyu; Chang, Deyuan; Yu, Fan

    2011-12-01

    This paper will at first explain the requirement of high speed optical transport network on forward error correction (FEC) codes in terms of code length, code rate, coding gain, burst error correction capability, error floor, latency, coding/decoding complexity. Then, a few code schemes used in current optical transport systems such as Reed-Solomon codes recommended by ITU-T G.709 and enhanced FECs listed in ITU-T, G.975.1 are introduced. Advanced codes recently developed by vendors used for 100Gbps systems and their performances are summarized. Features and special requirements on soft decoding FEC (SDFEC) especially inter-working between SDFEC and equalizer, with and without deferential coding etc. are analyzed. Some perspectives of future FEC for optical transport are also given.

  4. High-speed photometric imaging of elves

    NASA Astrophysics Data System (ADS)

    Santeler, C.; Moore, R. C.

    2011-12-01

    A new high-speed photometric array is used to analyze the properties of optical emissions associated with elves, including the expansion rate and luminosity as a function of time. The new instrument samples 8 channels at 2.5 MHz with 14-bit resolution and streams data to a 12 TB RAID array, enabling continuous operation during thunderstorm activity. In order to leverage the full bandwidth of the system, a particular observational geometry is required. The array is aimed vertically at the overlying ionosphere in order to detect elves produced by lightning flashes ~50 to 100 km distant. We address the issue of cloud coverage by choosing among several favorable observation locations on the night of the storm. This paper provides a summary of observations performed in Florida during the winter and the summer of 2011.

  5. Design of a high speed business transport

    NASA Technical Reports Server (NTRS)

    1990-01-01

    The design of a High Speed Business Transport (HSBT) was considered by the Aeronautical Design Class during the academic year 1989 to 1990. The project was chosen to offer an opportunity to develop user friendliness for some computer codes such as WAVE DRAG, supplied by NASA/Langley, and to experiment with several design lessons developed by Dr. John McMasters and his colleages at Boeing. Central to these design lessons was an appeal to marketing and feasibility considerations. There was an emphasis upon simplified analytical techniques to study trades and to stimulate creative thinking before committing to extensive analytical activity. Two designs stood out among all the rest because of the depth of thought and consideration of alternatives. One design, the Aurora, used a fixed wing design to satisfy the design mission: the Viero used a swept wing configuration to overcome problems related to supersonic flight. A summary of each of these two designs is given.

  6. Tomosynthesis using high speed CT scanning system

    SciTech Connect

    Boyd, D.P.; Rutt, B.K.

    1988-04-05

    In a high-speed CT scanning system in which fan beams of radiation are generated by sweeping an electron beam along a target and collimated X-rays emitted by the target are received by an array of detectors after passing through a patient area between the target and the array of detectors, a method of obtaining a tomograph of a patient is described comprising the steps of sweeping the electron beam along the target, measuring radiation received at detector positions as the electron beam is swept along the target; moving the patient past the collimated X-rays, and combining measurements at the detector positions as correlated in time to positions of the patient and tomosynthesizing the tomograph from data for lines in the desired plane for the positions of the patient.

  7. High Speed/ Low Effluent Process for Ethanol

    SciTech Connect

    M. Clark Dale

    2006-10-30

    n this project, BPI demonstrated a new ethanol fermentation technology, termed the High Speed/ Low Effluent (HS/LE) process on both lab and large pilot scale as it would apply to wet mill and/or dry mill corn ethanol production. The HS/LE process allows very rapid fermentations, with 18 to 22% sugar syrups converted to 9 to 11% ethanol ‘beers’ in 6 to 12 hours using either a ‘consecutive batch’ or ‘continuous cascade’ implementation. This represents a 5 to 8X increase in fermentation speeds over conventional 72 hour batch fermentations which are the norm in the fuel ethanol industry today. The ‘consecutive batch’ technology was demonstrated on a large pilot scale (4,800 L) in a dry mill corn ethanol plant near Cedar Rapids, IA (Xethanol Biofuels). The pilot demonstrated that 12 hour fermentations can be accomplished on an industrial scale in a non-sterile industrial environment. Other objectives met in this project included development of a Low Energy (LE) Distillation process which reduces the energy requirements for distillation from about 14,000 BTU/gal steam ($0.126/gal with natural gas @ $9.00 MCF) to as low as 0.40 KW/gal electrical requirements ($0.022/gal with electricity @ $0.055/KWH). BPI also worked on the development of processes that would allow application of the HS/LE fermentation process to dry mill ethanol plants. A High-Value Corn ethanol plant concept was developed to produce 1) corn germ/oil, 2) corn bran, 3) ethanol, 4) zein protein, and 5) nutritional protein, giving multiple higher value products from the incoming corn stream.

  8. Computation of high-speed reacting flows

    NASA Astrophysics Data System (ADS)

    Clutter, James Keith

    A computational study has been conducted for high-speed reacting flows relevant to munition problems, including shock-induced combustion and gun muzzle blast. The theoretical model considers inviscid and viscous flows, multi-species, finite rate chemical reaction schemes, and turbulence. Both the physical and numerical aspects are investigated to determine their impact on simulation accuracy. A range of hydrogen and oxygen reaction mechanisms are evaluated for the shock-induced combustion flow scenario. Characteristics of the mechanisms such as the induction time, heat release rate, and second explosion limit are found to impact the accuracy of the computation. On the numerical side, reaction source term treatments, including logarithmic weighting and scaling modifications, are investigated to determine their effectiveness in addressing numerical errors caused by disparate length scales between chemical reactions and fluid dynamics. It is demonstrated that these techniques can enhance solution accuracy. Computations of shock-induced combustion have also been performed using a κ-ɛ model to account for the turbulent transport of species and heat. An algebraic model of the temperature fluctuations has been used to estimate the impact of the turbulent effect on the chemical reaction source terms. The turbulence effects when represented with the current models are found to be minimal in the shock-induced combustion flow investigated in the present work. For the gun system simulations, computations for both a large caliber howitzer and small caliber firearms are carried out. A reduced kinetic scheme and an algebraic turbulence model are employed. The present approach, which accounts for the chemical reaction aspects of the gun muzzle blast problem, is found to improve the prediction of peak overpressures and can capture the effects produced by small caliber firearm sound suppressors. The present study has established the numerical and physical requirements for

  9. Photodetector having high speed and sensitivity

    DOEpatents

    Morse, Jeffrey D.; Mariella, Jr., Raymond P.

    1991-01-01

    The present invention provides a photodetector having an advantageous combination of sensitivity and speed; it has a high sensitivity while retaining high speed. In a preferred embodiment, visible light is detected, but in some embodiments, x-rays can be detected, and in other embodiments infrared can be detected. The present invention comprises a photodetector having an active layer, and a recombination layer. The active layer has a surface exposed to light to be detected, and comprises a semiconductor, having a bandgap graded so that carriers formed due to interaction of the active layer with the incident radiation tend to be swept away from the exposed surface. The graded semiconductor material in the active layer preferably comprises Al.sub.1-x Ga.sub.x As. An additional sub-layer of graded In.sub.1-y Ga.sub.y As may be included between the Al.sub.1-x Ga.sub.x As layer and the recombination layer. The recombination layer comprises a semiconductor material having a short recombination time such as a defective GaAs layer grown in a low temperature process. The recombination layer is positioned adjacent to the active layer so that carriers from the active layer tend to be swept into the recombination layer. In an embodiment, the photodetector may comprise one or more additional layers stacked below the active and recombination layers. These additional layers may include another active layer and another recombination layer to absorb radiation not absorbed while passing through the first layers. A photodetector having a stacked configuration may have enhanced sensitivity and responsiveness at selected wavelengths such as infrared.

  10. High speed, high performance /Hg,Cd/Te photodiode detectors.

    NASA Technical Reports Server (NTRS)

    Soderman, D. A.; Pinkston, W. H.

    1972-01-01

    The current performance of high speed photodiode detectors for the 1 to 10 micron spectral region is discussed. The (Hg,Cd)Te photodiode configuration, detector properties, integration in laser receiver modules, and frequency response are considered for near infrared and far infrared wavelengths. The recent advances in (Hg,Cd)Te material and device development are indicated by the realization not only of exceptionally high speed detectors but of detectors that exhibit excellent detectivities. The performance improves substantially when the detector is cooled. This detector junction technology has been extended to other compositions of (Hg,Cd)Te for peak spectral responses at 5 and 10 micron.

  11. A high fill-factor low dark leakage CMOS image sensor with shared-pixel design

    NASA Astrophysics Data System (ADS)

    Seo, Min-Woong; Yasutomi, Keita; Kagawa, Keiichiro; Kawahito, Shoji

    2014-03-01

    We have developed and evaluated the high responsivity and low dark leakage CMOS image sensor with the ring-gate shared-pixel design. A ring-gate shared-pixel design with a high fill factor makes it possible to achieve the low-light imaging. As eliminating the shallow trench isolation in the proposed pixel, the dark leakage current is significantly decreased because one of major dark leakage sources is removed. By sharing the in-pixel transistors such as a reset transistor, a select transistor, and a source follower amplifier, each pixel has a high fill-factor of 43 % and high sensitivity of 144.6 ke-/lx·sec. In addition, the effective number of transistors per pixel is 1.75. The proposed imager achieved the relatively low dark leakage current of about 104.5 e-/s (median at 60°C), corresponding to a dark current density Jdark_proposed of about 30 pA/cm2. In contrast, the conventional type test pixel has a large dark leakage current of 2450 e-/s (median at 60°C), corresponding to Jdark_conventional of about 700 pA/cm2. Both pixels have a same pixel size of 7.5×7.5 μm2 and are fabricated in same process.

  12. 8-Foot High Speed Tunnel (HST

    NASA Technical Reports Server (NTRS)

    1957-01-01

    Interior view of the slotted throat test section installed in the 8-Foot High Speed Tunnel (HST) in 1950. The slotted region is about 160 inches in length. In this photograph, the sting-type model support is seen straight on. In a NASA report, the test section is described as follows: 'The test section of the Langley 8-foot transonic tunnel is dodecagonal in cross section and has a cross-sectional area of about 43 square feet. Longitudinal slots are located between each of the 12 wall panels to allow continuous operation through the transonic speed range. The slots contain about 11 percent of the total periphery of the test section. Six of the twelve panels have windows in them to allow for schlieren observations. The entire test section is enclosed in a hemispherical shaped chamber.' John Becker noted that the tunnel's 'final achievement was the development and use in routine operations of the first transonic slotted throat. The investigations of wing-body shapes in this tunnel led to Whitcomb's discovery of the transonic area rule.' James Hansen described the origins of the the slotted throat as follows: 'In 1946 Langley physicist Ray H. Wright conceived a way to do transonic research effectively in a wind tunnel by placing slots in the throat of the test section. The concept for what became known as the slotted-throat or slotted-wall tunnel came to Wright not as a solution to the chronic transonic problem, but as a way to get rid of wall interference (i.e., the mutual effect of two or more meeting waves or vibrations of any kind caused by solid boundaries) at subsonic speeds. For most of the year before Wright came up with this idea, he had been trying to develop a theoretical understanding of wall interference in the 8-Foot HST, which was then being repowered for Mach 1 capability.' When Wright presented these ideas to John Stack, the response was enthusiastic but neither Wright nor Stack thought of slotted-throats as a solution to the transonic problem, only

  13. A Monolithic CMOS Magnetic Hall Sensor with High Sensitivity and Linearity Characteristics.

    PubMed

    Huang, Haiyun; Wang, Dejun; Xu, Yue

    2015-01-01

    This paper presents a fully integrated linear Hall sensor by means of 0.8 μm high voltage complementary metal-oxide semiconductor (CMOS) technology. This monolithic Hall sensor chip features a highly sensitive horizontal switched Hall plate and an efficient signal conditioner using dynamic offset cancellation technique. An improved cross-like Hall plate achieves high magnetic sensitivity and low offset. A new spinning current modulator stabilizes the quiescent output voltage and improves the reliability of the signal conditioner. The tested results show that at the 5 V supply voltage, the maximum Hall output voltage of the monolithic Hall sensor microsystem, is up to ±2.1 V and the linearity of Hall output voltage is higher than 99% in the magnetic flux density range from ±5 mT to ±175 mT. The output equivalent residual offset is 0.48 mT and the static power consumption is 20 mW. PMID:26516864

  14. A method for electrophysiological characterization of hamster retinal ganglion cells using a high-density CMOS microelectrode array

    PubMed Central

    Jones, Ian L.; Russell, Thomas L.; Farrow, Karl; Fiscella, Michele; Franke, Felix; Müller, Jan; Jäckel, David; Hierlemann, Andreas

    2015-01-01

    Knowledge of neuronal cell types in the mammalian retina is important for the understanding of human retinal disease and the advancement of sight-restoring technology, such as retinal prosthetic devices. A somewhat less utilized animal model for retinal research is the hamster, which has a visual system that is characterized by an area centralis and a wide visual field with a broad binocular component. The hamster retina is optimally suited for recording on the microelectrode array (MEA), because it intrinsically lies flat on the MEA surface and yields robust, large-amplitude signals. However, information in the literature about hamster retinal ganglion cell functional types is scarce. The goal of our work is to develop a method featuring a high-density (HD) complementary metal-oxide-semiconductor (CMOS) MEA technology along with a sequence of standardized visual stimuli in order to categorize ganglion cells in isolated Syrian Hamster (Mesocricetus auratus) retina. Since the HD-MEA is capable of recording at a higher spatial resolution than most MEA systems (17.5 μm electrode pitch), we were able to record from a large proportion of RGCs within a selected region. Secondly, we chose our stimuli so that they could be run during the experiment without intervention or computation steps. The visual stimulus set was designed to activate the receptive fields of most ganglion cells in parallel and to incorporate various visual features to which different cell types respond uniquely. Based on the ganglion cell responses, basic cell properties were determined: direction selectivity, speed tuning, width tuning, transience, and latency. These properties were clustered to identify ganglion cell types in the hamster retina. Ultimately, we recorded up to a cell density of 2780 cells/mm2 at 2 mm (42°) from the optic nerve head. Using five parameters extracted from the responses to visual stimuli, we obtained seven ganglion cell types. PMID:26528115

  15. Development of Gated Pinned Avalanche Photodiode Pixels for High-Speed Low-Light Imaging.

    PubMed

    Resetar, Tomislav; De Munck, Koen; Haspeslagh, Luc; Rosmeulen, Maarten; Süss, Andreas; Puers, Robert; Van Hoof, Chris

    2016-01-01

    This work explores the benefits of linear-mode avalanche photodiodes (APDs) in high-speed CMOS imaging as compared to different approaches present in literature. Analysis of APDs biased below their breakdown voltage employed in single-photon counting mode is also discussed, showing a potentially interesting alternative to existing Geiger-mode APDs. An overview of the recently presented gated pinned avalanche photodiode pixel concept is provided, as well as the first experimental results on a 8 × 16 pixel test array. Full feasibility of the proposed pixel concept is not demonstrated; however, informative data is obtained from the sensor operating under -32 V substrate bias and clearly exhibiting wavelength-dependent gain in frontside illumination. The readout of the chip designed in standard 130 nm CMOS technology shows no dependence on the high-voltage bias. Readout noise level of 15 e - rms, full well capacity of 8000 e - , and the conversion gain of 75 µV / e - are extracted from the photon-transfer measurements. The gain characteristics of the avalanche junction are characterized on separate test diodes showing a multiplication factor of 1.6 for red light in frontside illumination. PMID:27537882

  16. 14 CFR 23.253 - High speed characteristics.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 14 Aeronautics and Space 1 2014-01-01 2014-01-01 false High speed characteristics. 23.253 Section 23.253 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION, DEPARTMENT OF TRANSPORTATION AIRCRAFT... Requirements § 23.253 High speed characteristics. If a maximum operating speed VMO/MMO is established...

  17. 14 CFR 23.253 - High speed characteristics.

    Code of Federal Regulations, 2013 CFR

    2013-01-01

    ... 14 Aeronautics and Space 1 2013-01-01 2013-01-01 false High speed characteristics. 23.253 Section 23.253 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION, DEPARTMENT OF TRANSPORTATION AIRCRAFT... Requirements § 23.253 High speed characteristics. If a maximum operating speed VMO/MMO is established...

  18. 14 CFR 23.253 - High speed characteristics.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 14 Aeronautics and Space 1 2010-01-01 2010-01-01 false High speed characteristics. 23.253 Section 23.253 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION, DEPARTMENT OF TRANSPORTATION AIRCRAFT... Requirements § 23.253 High speed characteristics. If a maximum operating speed VMO/MMO is established...

  19. 14 CFR 25.253 - High-speed characteristics.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 14 Aeronautics and Space 1 2011-01-01 2011-01-01 false High-speed characteristics. 25.253 Section 25.253 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION, DEPARTMENT OF TRANSPORTATION AIRCRAFT AIRWORTHINESS STANDARDS: TRANSPORT CATEGORY AIRPLANES Flight Miscellaneous Flight Requirements § 25.253 High-speed characteristics. (a) Speed...

  20. Integrated High Resolution Digital Color Light Sensor in 130 nm CMOS Technology

    PubMed Central

    Strle, Drago; Nahtigal, Uroš; Batistell, Graciele; Zhang, Vincent Chi; Ofner, Erwin; Fant, Andrea; Sturm, Johannes

    2015-01-01

    This article presents a color light detection system integrated in 130 nm CMOS technology. The sensors and corresponding electronics detect light in a CIE XYZ color luminosity space using on-chip integrated sensors without any additional process steps, high-resolution analog-to-digital converter, and dedicated DSP algorithm. The sensor consists of a set of laterally arranged integrated photodiodes that are partly covered by metal, where color separation between the photodiodes is achieved by lateral carrier diffusion together with wavelength-dependent absorption. A high resolution, hybrid, ∑∆ ADC converts each photo diode’s current into a 22-bit digital result, canceling the dark current of the photo diodes. The digital results are further processed by the DSP, which calculates normalized XYZ or RGB color and intensity parameters using linear transformations of the three photo diode responses by multiplication of the data with a transformation matrix, where the coefficients are extracted by training in combination with a pseudo-inverse operation and the least-mean square approximation. The sensor system detects the color light parameters with 22-bit accuracy, consumes less than 60 μA on average at 10 readings per second, and occupies approx. 0.8 mm2 of silicon area (including three photodiodes and the analog part of the ADC). The DSP is currently implemented on FPGA. PMID:26205275

  1. Ultra-low-voltage CMOS-based current bleeding mixer with high LO-RF isolation.

    PubMed

    Tan, Gim Heng; Sidek, Roslina Mohd; Ramiah, Harikrishnan; Chong, Wei Keat; Lioe, De Xing

    2014-01-01

    This journal presents an ultra-low-voltage current bleeding mixer with high LO-RF port-to-port isolation, implemented on 0.13 μm standard CMOS technology for ZigBee application. The architecture compliments a modified current bleeding topology, consisting of NMOS-based current bleeding transistor, PMOS-based switching stage, and integrated inductors achieving low-voltage operation and high LO-RF isolation. The mixer exhibits a conversion gain of 7.5 dB at the radio frequency (RF) of 2.4 GHz, an input third-order intercept point (IIP3) of 1 dBm, and a LO-RF isolation measured to 60 dB. The DC power consumption is 572 µW at supply voltage of 0.45 V, while consuming a chip area of 0.97 × 0.88 mm(2). PMID:25197694

  2. Integrated High Resolution Digital Color Light Sensor in 130 nm CMOS Technology.

    PubMed

    Strle, Drago; Nahtigal, Uroš; Batistell, Graciele; Zhang, Vincent Chi; Ofner, Erwin; Fant, Andrea; Sturm, Johannes

    2015-01-01

    This article presents a color light detection system integrated in 130 nm CMOS technology. The sensors and corresponding electronics detect light in a CIE XYZ color luminosity space using on-chip integrated sensors without any additional process steps, high-resolution analog-to-digital converter, and dedicated DSP algorithm. The sensor consists of a set of laterally arranged integrated photodiodes that are partly covered by metal, where color separation between the photodiodes is achieved by lateral carrier diffusion together with wavelength-dependent absorption. A high resolution, hybrid, ∑∆ ADC converts each photo diode's current into a 22-bit digital result, canceling the dark current of the photo diodes. The digital results are further processed by the DSP, which calculates normalized XYZ or RGB color and intensity parameters using linear transformations of the three photo diode responses by multiplication of the data with a transformation matrix, where the coefficients are extracted by training in combination with a pseudo-inverse operation and the least-mean square approximation. The sensor system detects the color light parameters with 22-bit accuracy, consumes less than 60 μA on average at 10 readings per second, and occupies approx. 0.8 mm(2) of silicon area (including three photodiodes and the analog part of the ADC). The DSP is currently implemented on FPGA. PMID:26205275

  3. Spatiotemporal norepinephrine mapping using a high-density CMOS microelectrode array.

    PubMed

    Wydallis, John B; Feeny, Rachel M; Wilson, William; Kern, Tucker; Chen, Tom; Tobet, Stuart; Reynolds, Melissa M; Henry, Charles S

    2015-10-21

    A high-density amperometric electrode array containing 8192 individually addressable platinum working electrodes with an integrated potentiostat fabricated using Complementary Metal Oxide Semiconductor (CMOS) processes is reported. The array was designed to enable electrochemical imaging of chemical gradients with high spatiotemporal resolution. Electrodes are arranged over a 2 mm × 2 mm surface area into 64 subarrays consisting of 128 individual Pt working electrodes as well as Pt pseudo-reference and auxiliary electrodes. Amperometric measurements of norepinephrine in tissue culture media were used to demonstrate the ability of the array to measure concentration gradients in complex media. Poly(dimethylsiloxane) microfluidics were incorporated to control the chemical concentrations in time and space, and the electrochemical response at each electrode was monitored to generate electrochemical heat maps, demonstrating the array's imaging capabilities. A temporal resolution of 10 ms can be achieved by simultaneously monitoring a single subarray of 128 electrodes. The entire 2 mm × 2 mm area can be electrochemically imaged in 64 seconds by cycling through all subarrays at a rate of 1 Hz per subarray. Monitoring diffusional transport of norepinephrine is used to demonstrate the spatiotemporal resolution capabilities of the system. PMID:26333296

  4. High-power CMOS current driver with accurate transconductance for electrical impedance tomography.

    PubMed

    Constantinou, Loucas; Triantis, Iasonas F; Bayford, Richard; Demosthenous, Andreas

    2014-08-01

    Current drivers are fundamental circuits in bioimpedance measurements including electrical impedance tomography (EIT). In the case of EIT, the current driver is required to have a large output impedance to guarantee high current accuracy over a wide range of load impedance values. This paper presents an integrated current driver which meets these requirements and is capable of delivering large sinusoidal currents to the load. The current driver employs a differential architecture and negative feedback, the latter allowing the output current to be accurately set by the ratio of the input voltage to a resistor value. The circuit was fabricated in a 0.6- μm high-voltage CMOS process technology and its core occupies a silicon area of 0.64 mm (2) . It operates from a ± 9 V power supply and can deliver output currents up to 5 mA p-p. The accuracy of the maximum output current is within 0.41% up to 500 kHz, reducing to 0.47% at 1 MHz with a total harmonic distortion of 0.69%. The output impedance is 665 k Ω at 100 kHz and 372 k Ω at 500 kHz. PMID:25073130

  5. A CMOS high resolution, process/temperature variation tolerant RSSI for WIA-PA transceiver

    NASA Astrophysics Data System (ADS)

    Tao, Yang; Yu, Jiang; Jie, Li; Jiangfei, Guo; Hua, Chen; Jingyu, Han; Guiliang, Guo; Yuepeng, Yan

    2015-08-01

    This paper presents a high resolution, process/temperature variation tolerant received signal strength indicator (RSSI) for wireless networks for industrial automation process automation (WIA-PA) transceiver fabricated in 0.18 μm CMOS technology. The active area of the RSSI is 0.24 mm2. Measurement results show that the proposed RSSI has a dynamic range more than 70 dB and the linearity error is within ±0.5 dB for an input power from -70 to 0 dBm (dBm to 50 Ω), the corresponding output voltage is from 0.81 to 1.657 V and the RSSI slope is 12.1 mV/dB while consuming all of 2 mA from a 1.8 V power supply. Furthermore, by the help of the integrated compensation circuit, the proposed RSSI shows the temperature error within ±1.5 dB from -40 to 85 °C, and process variation error within ±0.25 dB, which exhibits good temperature-independence and excellent robustness against process variation characteristics. Project supported by the National High Technology Research and Development Program of China (No. 2011AA040102).

  6. Material constraints on high-speed design

    NASA Astrophysics Data System (ADS)

    Bucur, Diana; Militaru, Nicolae

    2015-02-01

    Current high-speed circuit designs with signal rates up to 100Gbps and above are implying constraints for dielectric and conductive materials and their dependence of frequency, for component elements and for production processes. The purpose of this paper is to highlight through various simulation results the frequency dependence of specific parameters like insertion and return loss, eye diagrams, group delay that are part of signal integrity analyses type. In low-power environment designs become more complex as the operation frequency increases. The need for new materials with spatial uniformity for dielectric constant is a need for higher data rates circuits. The fiber weave effect (FWE) will be analyzed through the eye diagram results for various dielectric materials in a differential signaling scheme given the fact that the FWE is a phenomenon that affects randomly the performance of the circuit on balanced/differential transmission lines which are typically characterized through the above mentioned approaches. Crosstalk between traces is also of concern due to propagated signals that have tight rise and fall times or due to high density of the boards. Criteria should be considered to achieve maximum performance of the designed system requiring critical electronic properties.

  7. High speed exhaust gas recirculation valve

    DOEpatents

    Fensom, Rod; Kidder, David J.

    2005-01-18

    In order to minimize pollutants such as Nox, internal combustion engines typically include an exhaust gas recirculation (EGR) valve that can be used to redirect a portion of exhaust gases to an intake conduit, such as an intake manifold, so that the redirected exhaust gases will be recycled. It is desirable to have an EGR valve with fast-acting capabilities, and it is also desirable to have the EGR valve take up as little space as possible. An exhaust gas recirculation valve is provided that includes an exhaust passage tube, a valve element pivotally mounted within the exhaust passage tube, a linear actuator; and a gear train. The gear train includes a rack gear operatively connected to the linear actuator, and at least one rotatable gear meshing with the rack gear and operatively connected to the valve element to cause rotation of the valve element upon actuation of the linear actuator. The apparatus provides a highly compact package having a high-speed valve actuation capability.

  8. High-speed curing by laser irradiation

    NASA Astrophysics Data System (ADS)

    Decker, Christian

    1999-05-01

    Laser-assisted processing of multifunctional systems is a very efficient method for achieving high-speed curing of photosensitive resins. With acrylate functionalized monomers and polymers, crosslinking was achieved upon a few millisecond exposure to a UV laser beam, in the presence of a radical-type photoinitiator. The polymerization reaction was followed in real-time by infrared spectroscopy and shown to proceed with long kinetic chains (up to 20,000 functional groups polymerized per initiating radical). An acrylate functionalized polyester proved to be the most reactive system, with formation of a tightly cross-linked and strickly insoluble polymer. Its high sensitivity makes this photoresist particularly well suited for laser direct imaging applications. Similar results have been obtained with epoxy and vinyl ether functionalized polymers, which undergo a fast cationic polymerization in the presence of a photogenerated protonic acid. Interpenetrating polymer networks have been synthetized by laser irradiation of blends of acrylate and epoxy-functionalized oligomers to obtain polymers that combine the elastomeric character of cross-linked polyurethanes and the toughness of epoxy polymers. These laser-sensitive polymers are to be used as photoresists to produce microcircuits, as protective coatings of optical fibers, as recording media in holography and as photocurable resins in stereolithography.

  9. High-Speed Data Recorder for Space, Geodesy, and Other High-Speed Recording Applications

    NASA Technical Reports Server (NTRS)

    Taveniku, Mikael

    2013-01-01

    A high-speed data recorder and replay equipment has been developed for reliable high-data-rate recording to disk media. It solves problems with slow or faulty disks, multiple disk insertions, high-altitude operation, reliable performance using COTS hardware, and long-term maintenance and upgrade path challenges. The current generation data recor - ders used within the VLBI community are aging, special-purpose machines that are both slow (do not meet today's requirements) and are very expensive to maintain and operate. Furthermore, they are not easily upgraded to take advantage of commercial technology development, and are not scalable to multiple 10s of Gbit/s data rates required by new applications. The innovation provides a softwaredefined, high-speed data recorder that is scalable with technology advances in the commercial space. It maximally utilizes current technologies without being locked to a particular hardware platform. The innovation also provides a cost-effective way of streaming large amounts of data from sensors to disk, enabling many applications to store raw sensor data and perform post and signal processing offline. This recording system will be applicable to many applications needing realworld, high-speed data collection, including electronic warfare, softwaredefined radar, signal history storage of multispectral sensors, development of autonomous vehicles, and more.

  10. High Speed High Resolution Current Comparator and its Application to Analog to Digital Converter

    NASA Astrophysics Data System (ADS)

    Sridhar, Ranjana; Pandey, Neeta; Bhattacharyya, Asok; Bhatia, Veepsa

    2016-06-01

    This paper introduces a high speed high resolution current comparator which includes the current differencing stage and employs non linear feedback in the gain stage. The usefulness of the proposed comparator is demonstrated by implementing a 3-bit current mode flash analog-to-digital converter (ADC). Simulation program with integrated circuit emphasis (SPICE) simulations have been carried out to verify theoretical proposition and performance parameters of both comparator and ADC are obtained using TSMC 0.18 µm CMOS technology parameters. The current comparator shows a resolution of ±5 nA and a delay of 0.86 ns for current difference of ±1 µA. The impact of process variation on proposed comparator propagation delay has been studied through Monte Carlo simulation and it is found that percentage change in propagation delay in best case is 1.3 % only and in worst case is 9 % only. The ADC exhibits an offset, gain error, differential nonlinearity (DNL) and integral nonlinearity (INL) of 0.102 µA, 0.99, -0.34 LSB and 0.0267 LSB, respectively. The impact of process variation on ADC has also been studied at different process corners.

  11. High Speed High Resolution Current Comparator and its Application to Analog to Digital Converter

    NASA Astrophysics Data System (ADS)

    Sridhar, Ranjana; Pandey, Neeta; Bhattacharyya, Asok; Bhatia, Veepsa

    2015-04-01

    This paper introduces a high speed high resolution current comparator which includes the current differencing stage and employs non linear feedback in the gain stage. The usefulness of the proposed comparator is demonstrated by implementing a 3-bit current mode flash analog-to-digital converter (ADC). Simulation program with integrated circuit emphasis (SPICE) simulations have been carried out to verify theoretical proposition and performance parameters of both comparator and ADC are obtained using TSMC 0.18 µm CMOS technology parameters. The current comparator shows a resolution of ±5 nA and a delay of 0.86 ns for current difference of ±1 µA. The impact of process variation on proposed comparator propagation delay has been studied through Monte Carlo simulation and it is found that percentage change in propagation delay in best case is 1.3 % only and in worst case is 9 % only. The ADC exhibits an offset, gain error, differential nonlinearity (DNL) and integral nonlinearity (INL) of 0.102 µA, 0.99, -0.34 LSB and 0.0267 LSB, respectively. The impact of process variation on ADC has also been studied at different process corners.

  12. SPADAS: a high-speed 3D single-photon camera for advanced driver assistance systems

    NASA Astrophysics Data System (ADS)

    Bronzi, D.; Zou, Y.; Bellisai, S.; Villa, F.; Tisa, S.; Tosi, A.; Zappa, F.

    2015-02-01

    Advanced Driver Assistance Systems (ADAS) are the most advanced technologies to fight road accidents. Within ADAS, an important role is played by radar- and lidar-based sensors, which are mostly employed for collision avoidance and adaptive cruise control. Nonetheless, they have a narrow field-of-view and a limited ability to detect and differentiate objects. Standard camera-based technologies (e.g. stereovision) could balance these weaknesses, but they are currently not able to fulfill all automotive requirements (distance range, accuracy, acquisition speed, and frame-rate). To this purpose, we developed an automotive-oriented CMOS single-photon camera for optical 3D ranging based on indirect time-of-flight (iTOF) measurements. Imagers based on Single-photon avalanche diode (SPAD) arrays offer higher sensitivity with respect to CCD/CMOS rangefinders, have inherent better time resolution, higher accuracy and better linearity. Moreover, iTOF requires neither high bandwidth electronics nor short-pulsed lasers, hence allowing the development of cost-effective systems. The CMOS SPAD sensor is based on 64 × 32 pixels, each able to process both 2D intensity-data and 3D depth-ranging information, with background suppression. Pixel-level memories allow fully parallel imaging and prevents motion artefacts (skew, wobble, motion blur) and partial exposure effects, which otherwise would hinder the detection of fast moving objects. The camera is housed in an aluminum case supporting a 12 mm F/1.4 C-mount imaging lens, with a 40°×20° field-of-view. The whole system is very rugged and compact and a perfect solution for vehicle's cockpit, with dimensions of 80 mm × 45 mm × 70 mm, and less that 1 W consumption. To provide the required optical power (1.5 W, eye safe) and to allow fast (up to 25 MHz) modulation of the active illumination, we developed a modular laser source, based on five laser driver cards, with three 808 nm lasers each. We present the full characterization of

  13. Characterization of Depleted Monolithic Active Pixel detectors implemented with a high-resistive CMOS technology

    NASA Astrophysics Data System (ADS)

    Kishishita, T.; Hemperek, T.; Rymaszewski, P.; Hirono, T.; Krüger, H.; Wermes, N.

    2016-07-01

    We present the recent development of DMAPS (Depleted Monolithic Active Pixel Sensor), implemented with a Toshiba 130 nm CMOS process. Unlike in the case of standard MAPS technologies which are based on an epi-layer, this process provides a high-resistive substrate that enables larger signal and faster charge collection by drift in a 50 - 300 μm thick depleted layer. Since this process also enables the use of deep n-wells to isolate the collection electrodes from the thin active device layer, NMOS and PMOS transistors are available for the readout electronics in each pixel cell. In order to characterize the technology, we implemented a simple three transistor readout with a variety of pixel pitches and input FET sizes. This layout variety gives us a clue on sensor characteristics for future optimization, such as the input detector capacitance or leakage current. In the initial measurement, the radiation spectra were obtained from 55Fe with an energy resolution of 770 eV (FWHM) and 90Sr with the MVP of 4165 e-.

  14. Tracking burst patterns in hippocampal cultures with high-density CMOS-MEAs

    NASA Astrophysics Data System (ADS)

    Gandolfo, M.; Maccione, A.; Tedesco, M.; Martinoia, S.; Berdondini, L.

    2010-10-01

    In this work, we investigate the spontaneous bursting behaviour expressed by in vitro hippocampal networks by using a high-resolution CMOS-based microelectrode array (MEA), featuring 4096 electrodes, inter-electrode spacing of 21 µm and temporal resolution of 130 µs. In particular, we report an original development of an adapted analysis method enabling us to investigate spatial and temporal patterns of activity and the interplay between successive network bursts (NBs). We first defined and detected NBs, and then, we analysed the spatial and temporal behaviour of these events with an algorithm based on the centre of activity trajectory. We further refined the analysis by using a technique derived from statistical mechanics, capable of distinguishing the two main phases of NBs, i.e. (i) a propagating and (ii) a reverberating phase, and by classifying the trajectory patterns. Finally, this methodology was applied to signal representations based on spike detection, i.e. the instantaneous firing rate, and directly based on voltage-coded raw data, i.e. activity movies. Results highlight the potentialities of this approach to investigate fundamental issues on spontaneous neuronal dynamics and suggest the hypothesis that neurons operate in a sort of 'team' to the perpetuation of the transmission of the same information.

  15. High-dynamic-range 4-Mpixel CMOS image sensor for scientific applications

    NASA Astrophysics Data System (ADS)

    Vu, Paul; Fowler, Boyd; Liu, Chiao; Mims, Steve; Bartkovjak, Peter; Do, Hung; Li, Wang; Appelbaum, Jeff; Lopez, Angel

    2012-03-01

    As bio-technology transitions from research and development to high volume production, dramatic improvements in image sensor performance will be required to support the throughput and cost requirements of this market. This includes higher resolution, higher frame rates, higher quantum efficiencies, increased system integration, lower read-noise, and lower device costs. We present the performance of a recently developed low noise 2048(H) x 2048(V) CMOS image sensor optimized for scientific applications such as life science imaging, microscopy, as well as industrial inspection applications. The sensor architecture consists of two identical halves which can be operated independently and the imaging array consists of 4T pixels with pinned photodiodes on a 6.5μm pitch with integrated micro-lens. The operation of the sensor is programmable through a SPI interface. The measured peak quantum efficiency of the sensor is 73% at 600nm, and the read noise is about 1.1e- RMS at 100 fps data rate. The sensor features dual gain column parallel ouput amplifiers with 11-bit single slope ADCs. The full well capacity is greater than 36ke-, the dark current is less than 7pA/cm2 at 20°C. The sensor achieves an intra-scene linear dynamic range of greater than 91dB (36000:1) at room temperature.

  16. Enhanced high-speed coherent diffraction imaging

    NASA Astrophysics Data System (ADS)

    Potier, Jonathan; Fricker, Sebastien; Idir, Mourad

    2011-03-01

    Due to recent advances in X-ray microscopy, we are now able to image objects with nanometer resolution thanks to Synchrotron beam lines or Free Electron Lasers (FEL). The PCI (Phase Contrast Imaging) is a robust technique that can recover the wavefront from measurements of only few intensity pictures in the Fresnel diffraction region. With our fast straightforward calculus methods, we manage to provide the phase induced by a microscopic specimen in few seconds. We can therefore obtain high contrasted images from transparent materials at very small scales. To reach atomic resolution imaging and thus make a transition from the near to the far field, the Coherent Diffraction Imaging (CDI) technique finds its roots in the analysis of diffraction patterns to obtain the phase of the altered complex wave. Theoretical results about existence and uniqueness of this retrieved piece of information by both iterative and direct algorithms have already been released. However, performances of algorithms remain limited by the coherence of the X-ray beam, presence of random noise and the saturation threshold of the detector. We will present reconstructions of samples using an enhanced version of HIO algorithm improving the speed of convergence and its repeatability. As a first step toward a practical X-Ray CDI system, initial images for reconstructions are acquired with the laser-based CDI system working in the visible spectrum.

  17. High speed curved position sensitive detector

    DOEpatents

    Hendricks, Robert W.; Wilson, Jack W.

    1989-01-01

    A high speed curved position sensitive porportional counter detector for use in x-ray diffraction, the detection of 5-20 keV photons and the like. The detector employs a planar anode assembly of a plurality of parallel metallic wires. This anode assembly is supported between two cathode planes, with at least one of these cathode planes having a serpentine resistive path in the form of a meander having legs generally perpendicular to the anode wires. This meander is produced by special microelectronic fabrication techniques whereby the meander "wire" fans outwardly at the cathode ends to produce the curved aspect of the detector, and the legs of the meander are small in cross-section and very closely spaced whereby a spatial resolution of about 50 .mu.m can be achieved. All of the other performance characteristics are about as good or better than conventional position sensitive proportional counter type detectors. Count rates of up to 40,000 counts per second with 0.5 .mu.s shaping time constants are achieved.

  18. Heater Applications for High Speed Jets

    NASA Astrophysics Data System (ADS)

    Rossetti, Jack; Berger, Zachary; Berry, Matthew; Hall, Andre; Glauser, Mark

    2013-11-01

    In this investigation, we study a high speed jet flow for noise reduction techniques. Here we specifically examine a heated jet for practical jet noise applications. Experiments are conducted in the Syracuse University anechoic chamber at the Skytop campus. This 206 m3 facility is lined with fiberglass wedges having a cutoff frequency of 150 Hz. Far-field microphones and near-field pressure sensors measure the acoustics and hydrodynamics, respectively. A 470 kW Chromalox heating unit is used to heat the flow to 1000°F at the nozzle exit. The controller for the heating unit has an associated time lag based on the Mach number and temperature. Therefore, this study will primarily focus on the heat transfer between the heating elements and the nozzle flow. Optimization of the heater's controller will allow for sufficient run time for data acquisition capabilities. Previous investigations at Syracuse University indicate significant differences between heated and cold jets, with regards to the acoustics and potential core characteristics (Hall et al. 2009).

  19. 8-Foot High Speed Tunnel (HST)

    NASA Technical Reports Server (NTRS)

    1953-01-01

    Semi-automatic readout equipment installed in the 1950s used for data recording and reduction in the 8-Foot High Speed Tunnel (HST). A 1957 NACA report on wind tunnel facilities at Langley included these comments on the data recording and reduction equipment for the 8-foot HST: 'The data recording and reduction equipment used for handling steady force and pressure information at the Langley 8-foot transonic tunnel is similar to that described for the Langley 16-foot transonic tunnel. Very little dynamic data recording equipment, however, is available.' The description of the 16-foot transonic tunnel equipment is as follows: 'A semiautomatic force data readout system provides tabulated raw data and punch card storage of raw data concurrent with the operation of the wind tunnel. Provision is made for 12 automatic channels of strain gage-data output, and eight channels of four-digit manually operated inputs are available for tabulating and punching constants, configuration codes, and other information necessary for data reduction and identification. The data are then processed on electronic computing machines to obtain the desired coefficients. These coefficients and their proper identification are then machine tabulated to provide a printed record of the results. The punched cards may also be fed into an automatic plotting device for the preparation of plots necessary for data analysis.'

  20. High-speed ground transportation for America

    SciTech Connect

    1996-08-01

    High speed ground transportation (HSGT)--a family of technologies ranging from upgraded existing railroads to magnetically levitated vehicles--is a passenger transportation option that can best link metropolitan areas lying about 100 to 500 miles apart. Common in Europe and Japan, HSGT in the United States already exist in the Northeast Corridor between New York and Washington, and will soon serve travelers between New York and Boston. To provide an objective basis for transport policy formulation and planning at the State and Federal levels, this report examines the economics of bringing HSGT to well-populated groups of cities throughout the United States. The intention is to draw nationwide--not corridor-specific--conclusions from projections of the likely investment needs, operating performance, and benefits of HSGT in a set of illustrative corridors in several regions. Although useful collectively, these case studies cannot substitute for the more detailed, State-and privately-sponsored analyses of specific corridors that would be prerequisite to HSGT implementation.

  1. High-transonic-speed transport aircraft study

    NASA Technical Reports Server (NTRS)

    Kulfan, R. M.

    1974-01-01

    An initial design study of high-transonic-speed transport aircraft has been completed. Five different design concepts were developed. These included fixed swept wing, variable-sweep wing, delta wing, double-fuselage yawed-wing, and single-fuselage yawed-wing aircraft. The boomless supersonic design objectives of range = 5560 km (3000 nmi), payload = 18,143 kg (40,000 lb), Mach = 1.2, and FAR Part 36 aircraft noise levels were achieved by the single-fuselage yawed-wing configuration with a gross weight of 211,828 kg (467,000 lb). A noise level of 15 EPNdB below FAR Part 36 requirements was obtained with a gross weight increase to 226,796 kg (500,000 lb). The off-design subsonic range capability for this configuration exceeded the Mach 1.2 design range by more than 20%. Although wing aeroelastic divergence was a primary design consideration for the yawed-wing concepts, the graphite-epoxy wings of this study were designed by critical gust and maneuver loads rather than by divergence requirements. The transonic nacelle drag is shown to be very sensitive to the nacelle installation. A six-degree-of-freedom dynamic stability analysis indicated that the control coordination and stability augmentation system would require more development than for a symmetrical airplane but is entirely feasible. A three-plane development plan is recommended to establish the full potential of the yawed-wing concept.

  2. High speed point derivative microseismic detector

    DOEpatents

    Uhl, James Eugene; Warpinski, Norman Raymond; Whetten, Ernest Blayne

    1998-01-01

    A high speed microseismic event detector constructed in accordance with the present invention uses a point derivative comb to quickly and accurately detect microseismic events. Compressional and shear waves impinging upon microseismic receiver stations disposed to collect waves are converted into digital data and analyzed using a point derivative comb including assurance of quiet periods prior to declaration of microseismic events. If a sufficient number of quiet periods have passed, the square of a two point derivative of the incoming digital signal is compared to a trip level threshold exceeding the determined noise level to declare a valid trial event. The squaring of the derivative emphasizes the differences between noise and signal, and the valid event is preferably declared when the trip threshold has been exceeded over a temporal comb width to realize a comb over a given time period. Once a trial event has been declared, the event is verified through a spatial comb, which applies the temporal event comb to additional stations. The detector according to the present invention quickly and accurately detects initial compressional waves indicative of a microseismic event which typically exceed the ambient cultural noise level by a small amount, and distinguishes the waves from subsequent larger amplitude shear waves.

  3. High speed point derivative microseismic detector

    DOEpatents

    Uhl, J.E.; Warpinski, N.R.; Whetten, E.B.

    1998-06-30

    A high speed microseismic event detector constructed in accordance with the present invention uses a point derivative comb to quickly and accurately detect microseismic events. Compressional and shear waves impinging upon microseismic receiver stations disposed to collect waves are converted into digital data and analyzed using a point derivative comb including assurance of quiet periods prior to declaration of microseismic events. If a sufficient number of quiet periods have passed, the square of a two point derivative of the incoming digital signal is compared to a trip level threshold exceeding the determined noise level to declare a valid trial event. The squaring of the derivative emphasizes the differences between noise and signal, and the valid event is preferably declared when the trip threshold has been exceeded over a temporal comb width to realize a comb over a given time period. Once a trial event has been declared, the event is verified through a spatial comb, which applies the temporal event comb to additional stations. The detector according to the present invention quickly and accurately detects initial compressional waves indicative of a microseismic event which typically exceed the ambient cultural noise level by a small amount, and distinguishes the waves from subsequent larger amplitude shear waves. 9 figs.

  4. High-speed image matching with coaxial holographic optical correlator

    NASA Astrophysics Data System (ADS)

    Ikeda, Kanami; Watanabe, Eriko

    2016-09-01

    A computation speed of more than 100 Gbps is experimentally demonstrated using our developed ultrahigh-speed optical correlator. To verify this high computation speed practically, the computation speeds of our optical correlator and conventional digital image matching are quantitatively compared. We use a population count function that achieves the fastest calculation speed when calculating binary matching by a central processing unit (CPU). The calculation speed of the optical correlator is dramatically faster than that using a CPU (2.40 GHz × 4) and 16 GB of random access memory, especially when the calculation data are large-scale.

  5. Studies for a 10 μs, thin, high resolution CMOS pixel sensor for future vertex detectors

    NASA Astrophysics Data System (ADS)

    Voutsinas, G.; Amar-Youcef, S.; Baudot, J.; Bertolone, G.; Brogna, A.; Chon-Sen, N.; Claus, G.; Colledani, C.; Dorokhov, A.; Dozière, G.; Dulinski, W.; Degerli, Y.; De Masi, R.; Deveaux, M.; Gelin, M.; Goffe, M.; Hu-Guo, Ch.; Himmi, A.; Jaaskelainen, K.; Koziel, M.; Morel, F.; Müntz, C.; Orsini, F.; Santos, C.; Schrader, C.; Specht, M.; Stroth, J.; Valin, I.; Wagner, F. M.; Winter, M.

    2011-06-01

    Future high energy physics (HEP) experiments require detectors with unprecedented performances for track and vertex reconstruction. These requirements call for high precision sensors, with low material budget and short integration time. The development of CMOS sensors for HEP applications was initiated at IPHC Strasbourg more than 10 years ago, motivated by the needs for vertex detectors at the International Linear Collider (ILC) [R. Turchetta et al, NIM A 458 (2001) 677]. Since then several other applications emerged. The first real scale digital CMOS sensor MIMOSA26 equips Flavour Tracker at RHIC, as well as for the microvertex detector of the CBM experiment at FAIR. MIMOSA sensors may also offer attractive performances for the ALICE upgrade at LHC. This paper will demonstrate the substantial performance improvement of CMOS sensors based on a high resistivity epitaxial layer. First studies for integrating the sensors into a detector system will be addressed and finally the way to go to a 10 μs readout sensor will be discussed.

  6. A high-speed mixed-signal down-scaling circuit for DAB tuners

    NASA Astrophysics Data System (ADS)

    Lu, Tang; Zhigong, Wang; Jiahui, Xuan; Yang, Yang; Jian, Xu; Yong, Xu

    2012-07-01

    A high-speed mixed-signal down-scaling circuit with low power consumption and low phase noise for use in digital audio broadcasting tuners has been realized and characterized. Some new circuit techniques are adopted to improve its performance. A dual-modulus prescaler (DMP) with low phase noise is realized with a kind of improved source-coupled logic (SCL) D-flip-flop (DFF) in the synchronous divider and a kind of improved complementary metal oxide semiconductor master-slave (CMOS MS)-DFF in the asynchronous divider. A new more accurate wire-load model is used to realize the pulse-swallow counter (PS counter). Fabricated in a 0.18-μm CMOS process, the total chip size is 0.6 × 0.2 mm2. The DMP in the proposed down-scaling circuit exhibits a low phase noise of -118.2 dBc/Hz at 10 kHz off the carrier frequency. At a supply voltage of 1.8 V, the power consumption of the down-scaling circuit's core part is only 2.7 mW.

  7. High Speed Dynamics in Brittle Materials

    NASA Astrophysics Data System (ADS)

    Hiermaier, Stefan

    2015-06-01

    Brittle Materials under High Speed and Shock loading provide a continuous challenge in experimental physics, analysis and numerical modelling, and consequently for engineering design. The dependence of damage and fracture processes on material-inherent length and time scales, the influence of defects, rate-dependent material properties and inertia effects on different scales make their understanding a true multi-scale problem. In addition, it is not uncommon that materials show a transition from ductile to brittle behavior when the loading rate is increased. A particular case is spallation, a brittle tensile failure induced by the interaction of stress waves leading to a sudden change from compressive to tensile loading states that can be invoked in various materials. This contribution highlights typical phenomena occurring when brittle materials are exposed to high loading rates in applications such as blast and impact on protective structures, or meteorite impact on geological materials. A short review on experimental methods that are used for dynamic characterization of brittle materials will be given. A close interaction of experimental analysis and numerical simulation has turned out to be very helpful in analyzing experimental results. For this purpose, adequate numerical methods are required. Cohesive zone models are one possible method for the analysis of brittle failure as long as some degree of tension is present. Their recent successful application for meso-mechanical simulations of concrete in Hopkinson-type spallation tests provides new insight into the dynamic failure process. Failure under compressive loading is a particular challenge for numerical simulations as it involves crushing of material which in turn influences stress states in other parts of a structure. On a continuum scale, it can be modeled using more or less complex plasticity models combined with failure surfaces, as will be demonstrated for ceramics. Models which take microstructural

  8. Development of III-V p-MOSFETs with high-kappa gate stack for future CMOS applications

    NASA Astrophysics Data System (ADS)

    Nagaiah, Padmaja

    As the semiconductor industry approaches the limits of traditional silicon CMOS scaling, non-silicon materials and new device architectures are gradually being introduced to improve Si integrated circuit performance and continue transistor scaling. Recently, the replacement of SiO2 with a high-k material (HfO2) as gate dielectric has essentially removed one of the biggest advantages of Si as channel material. As a result, alternate high mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. III-V materials in particular have become of great interest as channel materials, owing to their superior electron transport properties. However, there are several critical challenges that need to be addressed before III-V based CMOS can replace Si CMOS technology. Some of these challenges include development of a high quality, thermally stable gate dielectric/III-V interface, and improvement in III-V p-channel hole mobility to complement the n-channel mobility, low source/drain resistance and integration onto Si substrate. In this thesis, we would be addressing the first two issues i.e. the development high performance III-V p-channels and obtaining high quality III-V/high-k interface. We start with using the device architecture of the already established InGaAs n-channels as a baseline to understand the effect of remote scattering from the high-k oxide and oxide/semiconductor interface on channel transport properties such as electron mobility and channel electron concentration. Temperature dependent Hall electron mobility measurements were performed to separate various scattering induced mobility limiting factors. Dependence of channel mobility on proximity of the channel to the oxide interface, oxide thickness, annealing conditions are discussed. The results from this work will be used in the design of the p-channel MOSFETs. Following this, InxGa1-xAs (x>0.53) is chosen as channel material for developing p

  9. 622 Mbps High-speed satellite communication system for WINDS

    NASA Astrophysics Data System (ADS)

    Ogawa, Yasuo; Hashimoto, Yukio; Yoshimura, Naoko; Suzuki, Ryutaro; Gedney, Richard T.; Dollard, Mike

    2006-07-01

    WINDS is the experimental communications satellite currently under joint development by Japanese Aerospace Exploration Agency (JAXA) and the National Institute of Information and Communications Technology (NICT). The high-speed satellite communication system is very effective for quick deployment of high-speed networks economically. The WINDS will realize ultra high-speed networking and demonstrate operability of satellite communication systems in high-speed internet. NICT is now developing high-speed satellite communication system for WINDS. High-speed TDMA burst modem with high performance TPC error correction is underdevelopment. Up to the DAC on the transmitter and from the ADC on the receiver, all modem functions are performed in the digital processing technology. Burst modem has been designed for a user data rate up to 1244 Mbps. NICT is developing the digital terminal as a user interface and a network controller for this earth station. High compatibility with the Internet will be provided.

  10. A high-dynamic range (HDR) back-side illuminated (BSI) CMOS image sensor for extreme UV detection

    NASA Astrophysics Data System (ADS)

    Wang, Xinyang; Wolfs, Bram; Bogaerts, Jan; Meynants, Guy; BenMoussa, Ali

    2012-03-01

    This paper describes a back-side illuminated 1 Megapixel CMOS image sensor made in 0.18um CMOS process for EUV detection. The sensor applied a so-call "dual-transfer" scheme to achieve low noise, high dynamic range. The EUV sensitivity is achieved with backside illumination use SOI-based solution. The epitaxial silicon layer is thinned down to less than 3um. The sensor is tested and characterized at 5nm to 30nm illumination. At 17.4nm targeted wavelength, the detector external QE (exclude quantum yield factor) reaches almost 60%. The detector reaches read noise of 1.2 ph- (@17.4nm), i.e. close to performance of EUV photon counting.

  11. Calibration of GPS based high accuracy speed meter for vehicles

    NASA Astrophysics Data System (ADS)

    Bai, Yin; Sun, Qiao; Du, Lei; Yu, Mei; Bai, Jie

    2015-02-01

    GPS based high accuracy speed meter for vehicles is a special type of GPS speed meter which uses Doppler Demodulation of GPS signals to calculate the speed of a moving target. It is increasingly used as reference equipment in the field of traffic speed measurement, but acknowledged standard calibration methods are still lacking. To solve this problem, this paper presents the set-ups of simulated calibration, field test signal replay calibration, and in-field test comparison with an optical sensor based non-contact speed meter. All the experiments were carried out on particular speed values in the range of (40-180) km/h with the same GPS speed meter. The speed measurement errors of simulated calibration fall in the range of +/-0.1 km/h or +/-0.1%, with uncertainties smaller than 0.02% (k=2). The errors of replay calibration fall in the range of +/-0.1% with uncertainties smaller than 0.10% (k=2). The calibration results justify the effectiveness of the two methods. The relative deviations of the GPS speed meter from the optical sensor based noncontact speed meter fall in the range of +/-0.3%, which validates the use of GPS speed meter as reference instruments. The results of this research can provide technical basis for the establishment of internationally standard calibration methods of GPS speed meters, and thus ensures the legal status of GPS speed meters as reference equipment in the field of traffic speed metrology.

  12. Silicon high speed modulator for advanced modulation: device structures and exemplary modulator performance

    NASA Astrophysics Data System (ADS)

    Milivojevic, Biljana; Wiese, Stefan; Whiteaway, James; Raabe, Christian; Shastri, Anujit; Webster, Mark; Metz, Peter; Sunder, Sanjay; Chattin, Bill; Anderson, Sean P.; Dama, Bipin; Shastri, Kal

    2014-03-01

    Fiber optics is well established today due to the high capacity and speed, unrivaled flexibility and quality of service. However, state of the art optical elements and components are hardly scalable in terms of cost and size required to achieve competitive port density and cost per bit. Next-generation high-speed coherent optical communication systems targeting a data rate of 100-Gb/s and beyond goes along with innovations in component and subsystem areas. Consequently, by leveraging the advanced silicon micro and nano-fabrication technologies, significant progress in developing CMOS platform-based silicon photonic devices has been made all over the world. These achievements include the demonstration of high-speed IQ modulators, which are important building blocks in coherent optical communication systems. In this paper, we demonstrate silicon photonic QPSK modulator based on a metal-oxide-semiconductor (MOS) capacitor structure, address different modulator configuration structures and report our progress and research associated with highspeed advanced optical modulation in silicon photonics

  13. A high-speed and low-offset dynamic latch comparator.

    PubMed

    Rahman, Labonnah Farzana; Bin Ibne Reaz, Mamun; Yin, Chia Chieu; Marufuzzaman, Mohammad; Rahman, Mohammad Anisur

    2014-01-01

    Circuit intricacy, speed, low-offset voltage, and resolution are essential factors for high-speed applications like analog-to-digital converters (ADCs). The comparator circuit with preamplifier increases the power dissipation, as it requires higher amount of currents than the latch circuitry. In this research, a novel topology of dynamic latch comparator is illustrated, which is able to provide high speed, low offset, and high resolution. Moreover, the circuit is able to reduce the power dissipation as the topology is based on latch circuitry. The cross-coupled circuit mechanism with the regenerative latch is employed for enhancing the dynamic latch comparator performance. In addition, input-tracking phase is used to reduce the offset voltage. The Monte-Carlo simulation results for the designed comparator in 0.18 μm CMOS process show that the equivalent input-referred offset voltage is 720 μV with 3.44 mV standard deviation. The simulated result shows that the designed comparator has 8-bit resolution and dissipates 158.5 μW of power under 1.8 V supply while operating with a clock frequency of 50 MHz. In addition, the proposed dynamic latch comparator has a layout size of 148.80 μm × 59.70 μm. PMID:25114959

  14. A High-Speed and Low-Offset Dynamic Latch Comparator

    PubMed Central

    Rahman, Labonnah Farzana; Reaz, Mamun Bin Ibne; Yin, Chia Chieu; Rahman, Mohammad Anisur

    2014-01-01

    Circuit intricacy, speed, low-offset voltage, and resolution are essential factors for high-speed applications like analog-to-digital converters (ADCs). The comparator circuit with preamplifier increases the power dissipation, as it requires higher amount of currents than the latch circuitry. In this research, a novel topology of dynamic latch comparator is illustrated, which is able to provide high speed, low offset, and high resolution. Moreover, the circuit is able to reduce the power dissipation as the topology is based on latch circuitry. The cross-coupled circuit mechanism with the regenerative latch is employed for enhancing the dynamic latch comparator performance. In addition, input-tracking phase is used to reduce the offset voltage. The Monte-Carlo simulation results for the designed comparator in 0.18 μm CMOS process show that the equivalent input-referred offset voltage is 720 μV with 3.44 mV standard deviation. The simulated result shows that the designed comparator has 8-bit resolution and dissipates 158.5 μW of power under 1.8 V supply while operating with a clock frequency of 50 MHz. In addition, the proposed dynamic latch comparator has a layout size of 148.80 μm × 59.70 μm. PMID:25114959

  15. High Speed Balancing Applied to the T700 Engine

    NASA Technical Reports Server (NTRS)

    Walton, J.; Lee, C.; Martin, M.

    1989-01-01

    The work performed under Contracts NAS3-23929 and NAS3-24633 is presented. MTI evaluated the feasibility of high-speed balancing for both the T700 power turbine rotor and the compressor rotor. Modifications were designed for the existing Corpus Christi Army Depot (CCAD) T53/T55 high-speed balancing system for balancing T700 power turbine rotors. Tests conducted under these contracts included a high-speed balancing evaluation for T700 power turbines in the Army/NASA drivetrain facility at MTI. The high-speed balancing tests demonstrated the reduction of vibration amplitudes at operating speed for both low-speed balanced and non-low-speed balanced T700 power turbines. In addition, vibration data from acceptance tests of T53, T55, and T700 engines were analyzed and a vibration diagnostic procedure developed.

  16. CMOS Monolithic Active Pixel Sensors (MAPS): Developments and future outlook

    NASA Astrophysics Data System (ADS)

    Turchetta, R.; Fant, A.; Gasiorek, P.; Esbrand, C.; Griffiths, J. A.; Metaxas, M. G.; Royle, G. J.; Speller, R.; Venanzi, C.; van der Stelt, P. F.; Verheij, H.; Li, G.; Theodoridis, S.; Georgiou, H.; Cavouras, D.; Hall, G.; Noy, M.; Jones, J.; Leaver, J.; Machin, D.; Greenwood, S.; Khaleeq, M.; Schulerud, H.; Østby, J. M.; Triantis, F.; Asimidis, A.; Bolanakis, D.; Manthos, N.; Longo, R.; Bergamaschi, A.

    2007-12-01

    Re-invented in the early 1990s, on both sides of the Atlantic, Monolithic Active Pixel Sensors (MAPS) in a CMOS technology are today the most sold solid-state imaging devices, overtaking the traditional technology of Charge-Coupled Devices (CCD). The slow uptake of CMOS MAPS started with low-end applications, for example web-cams, and is slowly pervading the high-end applications, for example in prosumer digital cameras. Higher specifications are required for scientific applications: very low noise, high speed, high dynamic range, large format and radiation hardness are some of these requirements. This paper will present a brief overview of the CMOS Image Sensor technology and of the requirements for scientific applications. As an example, a sensor for X-ray imaging will be presented. This sensor was developed within a European FP6 Consortium, intelligent imaging sensors (I-ImaS).

  17. Measuring droplet fall speed with a high-speed camera: indoor accuracy and potential outdoor applications

    NASA Astrophysics Data System (ADS)

    Yu, Cheng-Ku; Hsieh, Pei-Rong; Yuter, Sandra E.; Cheng, Lin-Wen; Tsai, Chia-Lun; Lin, Che-Yu; Chen, Ying

    2016-04-01

    Acquisition of accurate raindrop fall speed measurements outdoors in natural rain by means of moderate-cost and easy-to-use devices represents a long-standing and challenging issue in the meteorological community. Feasibility experiments were conducted to evaluate the indoor accuracy of fall speed measurements made with a high-speed camera and to evaluate its capability for outdoor applications. An indoor experiment operating in calm conditions showed that the high-speed imaging technique can provide fall speed measurements with a mean error of 4.1-9.7 % compared to Gunn and Kinzer's empirical fall-speed-size relationship for typical sizes of rain and drizzle drops. Results obtained using the same apparatus outside in summer afternoon showers indicated larger positive and negative velocity deviations compared to the indoor measurements. These observed deviations suggest that ambient flow and turbulence play a role in modifying drop fall speeds which can be quantified with future outdoor high-speed camera measurements. Because the fall speed measurements, as presented in this article, are analyzed on the basis of tracking individual, specific raindrops, sampling uncertainties commonly found in the widely adopted optical disdrometers can be significantly mitigated.

  18. Interferometric comparison of the performance of a CMOS and sCMOS detector

    NASA Astrophysics Data System (ADS)

    Flores-Moreno, J. M.; De la Torre I., Manuel H.; Hernández-Montes, M. S.; Pérez-López, Carlos; Mendoza S., Fernando

    2015-08-01

    We present an analysis of the imaging performance of two state-of-the-art sensors widely used in the nondestructive- testing area (NDT). The analysis is based on the quantification of the signal-to-noise (SNR) ratio from an optical phase image. The calculation of the SNR is based on the relation of the median (average) and standard deviation measurements over specific areas of interest in the phase images of both sensors. This retrieved phase is coming from the vibrational behavior of a large object by means of an out-of-plane holographic interferometer. The SNR is used as a figure-of-merit to evaluate and compare the performance of the CMOS and scientific CMOS (sCMOS) camera as part of the experimental set-up. One of the cameras has a high speed CMOS sensor while the other has a high resolution sCMOS sensor. The object under study is a metallically framed table with a Formica cover with an observable area of 1.1 m2. The vibration induced to the sample is performed by a linear step motor with an attached tip in the motion stage. Each camera is used once at the time to record the deformation keeping the same experimental conditions for each case. These measurements may complement the conventional procedures or technical information commonly used to evaluate a camerás performance such as: quantum efficiency, spatial resolution and others. Results present post processed images from both cameras, but showing a smoother and easy to unwrap optical phase coming from those recorded with the sCMOS camera.

  19. High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

    NASA Astrophysics Data System (ADS)

    Chen, Zhe; Yang, Jie; Shi, Cong; Qin, Qi; Liu, Liyuan; Wu, Nanjian

    2016-04-01

    In this paper, a hybrid vision processor based on a compact full-custom distributed memory for near-sensor high-speed image processing is proposed. The proposed processor consists of a reconfigurable processing element (PE) array, a row processor (RP) array, and a dual-core microprocessor. The PE array includes two-dimensional processing elements with a compact full-custom distributed memory. It supports real-time reconfiguration between the PE array and the self-organized map (SOM) neural network. The vision processor is fabricated using a 0.18 µm CMOS technology. The circuit area of the distributed memory is reduced markedly into 1/3 of that of the conventional memory so that the circuit area of the vision processor is reduced by 44.2%. Experimental results demonstrate that the proposed design achieves correct functions.

  20. High speed low power FEE for silicon detectors in nuclear physics applications

    NASA Astrophysics Data System (ADS)

    Gómez-Galán, J. A.; López-Ahumada, R.; Sánchez-Rodríguez, T.; Sánchez-Raya, M.; Jiménez, R.; Martel, I.

    2013-06-01

    A high speed, low power and programmable readout front-end system is presented for silicon detectors to be used in nuclear physics applications. The architecture consists of a folded cascode charge sensitive amplifier, a pole-zero cancellation circuit to eliminate undershoots and a shaper circuit with Gm-C topology. All building blocks include a regulated cascode technique based gain enhancement. Experimental results show that the whole front-end system can be programmed for peaking times of 100 ns, 200 ns and 400 ns maintaining the amplitude of the output voltage. Programmability is achieved by switching different resistors for all poles and zeros. The system has been designed in a 130 nm CMOS technology and powered from a 1.2 V supply. The output pulse has peak amplitude of 200 mV for an input energy of 5 MeV from the detector. A power consumption low noise tradeoff will be considered.

  1. High-speed electrochemistry using ultramicroelectrodes

    SciTech Connect

    Walsh, M.R.

    1989-01-01

    This research investigates the use of ultramicroelectrodes in performing electrochemistry on microsecond and nanosecond time scales. One purpose of this research was to look at new ways to apply ultramicroelectrodes to high speed experiments. Some of the aspects that are discussed in this thesis are: (a) A novel technique was developed for measuring currents on short time scales that involves conversion of the current to light using a light emitting diode and measuring the light intensity as a function of time using time correlated single photon counting (TCSPC). Computer processing of the light intensity data can convert this data back to current. The technique is capable of measurements on nanosecond time scales, but TCSPC requires tens or hundreds of millions of experiments to obtain a complete set of data and this frequently results in severe electrode fouling problems. (b) Potential step experiments were used instead of potential sweep experiments. Potential step experiments enable the separation in time of the faradaic and charging currents for chemical systems in which the faradaic impedance is greater than the uncompensated solution resistance. (c) For systems in which the faradaic impedance and uncompensated resistance are of the same order of magnitude, a computer simulation was developed which accounts for the interaction of the faradaic and double layer charging processes. (d) Application of short time scale experiments to the study of surface processes. Some processes studied in this work are the oxidation of clean platinum surfaces, electrode reactions of anthraquinone-2,6-disulfonic acid adsorbed on mercury, reductive hydrogen adsorption on platinum and double layer charging. (e) A study of the smallest available time constants was performed, taking into account non-idealities in the electrode such as stray capacitance and resistance of the electrode itself.

  2. High speed flow cytometric separation of viable cells

    DOEpatents

    Sasaki, D.T.; Van den Engh, G.J.; Buckie, A.M.

    1995-11-14

    Hematopoietic cell populations are separated to provide cell sets and subsets as viable cells with high purity and high yields, based on the number of original cells present in the mixture. High-speed flow cytometry is employed using light characteristics of the cells to separate the cells, where high flow speeds are used to reduce the sorting time.

  3. High speed flow cytometric separation of viable cells

    DOEpatents

    Sasaki, Dennis T.; Van den Engh, Gerrit J.; Buckie, Anne-Marie

    1995-01-01

    Hematopoietic cell populations are separated to provide cell sets and subsets as viable cells with high purity and high yields, based on the number of original cells present in the mixture. High-speed flow cytometry is employed using light characteristics of the cells to separate the cells, where high flow speeds are used to reduce the sorting time.

  4. A high-speed on-chip pseudo-random binary sequence generator for multi-tone phase calibration

    NASA Astrophysics Data System (ADS)

    Gommé, Liesbeth; Vandersteen, Gerd; Rolain, Yves

    2011-07-01

    An on-chip reference generator is conceived by adopting the technique of decimating a pseudo-random binary sequence (PRBS) signal in parallel sequences. This is of great benefit when high-speed generation of PRBS and PRBS-derived signals is the objective. The design implemented standard CMOS logic is available in commercial libraries to provide the logic functions for the generator. The design allows the user to select the periodicity of the PRBS and the PRBS-derived signals. The characterization of the on-chip generator marks its performance and reveals promising specifications.

  5. High-Speed, High-Temperature Finger Seal Test Evaluated

    NASA Technical Reports Server (NTRS)

    Proctor, Margaret P.

    2003-01-01

    A finger seal, designed and fabricated by Honeywell Engines, Systems and Services, was tested at the NASA Glenn Research Center at surface speeds up to 1200 ft/s, air temperatures up to 1200 F, and pressures across the seal of 75 psid. These are the first test results obtained with NASA s new High-Temperature, High-Speed Turbine Seal Test Rig (see the photograph). The finger seal is an innovative design recently patented by AlliedSignal Engines, which has demonstrated considerably lower leakage than commonly used labyrinth seals and is considerably cheaper than brush seals. The cost to produce finger seals is estimated to be about half of the cost to produce brush seals. Replacing labyrinth seals with fingers seals at locations that have high-pressure drops in gas turbine engines, typically main engine and thrust seals, can reduce air leakage at each location by 50 percent or more. This directly results in a 0.7- to 1.4-percent reduction in specific fuel consumption and a 0.35- to 0.7-percent reduction in direct operating costs . Because the finger seal is a contacting seal, this testing was conducted to address concerns about its heat generation and life capability at the higher speeds and temperatures required for advanced engines. The test results showed that the seal leakage and wear performance are acceptable for advanced engines.

  6. Measurements of speed of response of high-speed visible and IR optical detectors

    NASA Technical Reports Server (NTRS)

    Rowe, H. E.; Osmundson, J. S.

    1972-01-01

    A technique for measuring speed of response of high speed visible and IR optical detectors to mode-locked Nd:YAG laser pulses is described. Results of measurements of response times of four detectors are presented. Three detectors that can be used as receivers in a 500-MHz optical communication system are tested.

  7. A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver

    NASA Astrophysics Data System (ADS)

    Jian, Xu; Zheng, Zhou; Yiqiang, Wu; Zhigong, Wang; Jianping, Chen

    2015-05-01

    A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB receiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifier stage. The input transconductance stage employs a self-biasing current reusing technique, with a resistor shunt feedback to increase the gain and output impedance. A dynamic bias technique is used in the switching stage to ensure the stability of the overdrive voltage versus the PVT variations. A current shunt feedback is introduced to the conventional low-voltage second-generation fully balanced multi-output current converter (FBMOCCII), which provides very low input impedance and high output impedance. With the circuit working in current mode, the linearity is effectively improved with low supply voltages. Especially, the transimpedance stage can be removed, which simplifies the design considerably. The design is verified with a SMIC 0.18 μm RF CMOS process. The measurement results show that the voltage conversation gain is 1.407 dB, the NF is 16.22 dB, and the IIP3 is 4.5 dBm, respectively. The current consumption is 9.30 mA with a supply voltage of 1.8 V. This exhibits a good compromise among the gain, noise, and linearity for the second IF mixer in DRM/DAB receivers. Project supported by the National Natural Science Foundation of China (No. 61306069), and the National High Technology Research and Development Program of China (No. 2011AA010301).

  8. Ring current development during high speed streams

    NASA Astrophysics Data System (ADS)

    Jordanova, V. K.; Matsui, H.; Puhl-Quinn, P. A.; Thomsen, M. F.; Mursula, K.; Holappa, L.

    2009-07-01

    Episodes of southward (Bz<0) interplanetary magnetic field (IMF) which lead to disturbed geomagnetic conditions are associated either with coronal mass ejections (CMEs) and possess long and continuous negative IMF Bz excursions, or with high speed solar wind streams (HSS) whose geoeffectiveness is due to IMF Bz profiles fluctuating about zero with various amplitudes and duration. We simulate ring current evolution during a HSS-driven storm that occurred during 24-26 October 2002 and compare its dynamics with a CME-driven storm of similar strength during 22-23 April 2001. We use our kinetic ring current-atmosphere interactions model (RAM), and investigate the mechanisms responsible for trapping particles and for causing their loss. Ring current evolution depends on the interplay of time-dependent inflow of plasma from the magnetotail, particle acceleration and loss (mainly due to charge exchange) along adiabatic drift paths, and outflow of plasma from the dayside magnetopause; all of these processes are incorporated in our model. We compare results from simulations using a newly developed, Cluster data based, University of New Hampshire inner magnetospheric electric field (UNH-IMEF) convection model with simulations using a Volland-Stern (V-S) type convection model. We find that, first, periods of increased magnetospheric convection coinciding with enhancements of plasma sheet density are needed for strong ring current buildup. Second, during the HSS-driven storm the convection potential from UNH-IMEF model is highly variable and causes sporadic shallow injections resulting in a weak ring current. The long period of enhanced convection during the CME-driven storm causes a continuous ion injection penetrating to lower L shells and stronger ring current buildup. V-S model predicts larger ring current injection during both storms. Third, the RAM driven by either convection model underestimates the total ring current energy during the recovery phase of the HSS storm

  9. Water Containment Systems for Testing High-Speed Flywheels

    NASA Technical Reports Server (NTRS)

    Trase, Larry; Thompson, Dennis

    2006-01-01

    Water-filled containers are used as building blocks in a new generation of containment systems for testing high-speed flywheels. Such containment systems are needed to ensure safety by trapping high-speed debris in the event of centrifugal breakup or bearing failure. Traditional containment systems for testing flywheels consist mainly of thick steel rings. The effectiveness of this approach to shielding against high-speed debris was demonstrated in a series of tests.

  10. Chicago-St. Louis high speed rail plan

    SciTech Connect

    Stead, M.E.

    1994-12-31

    The Illinois Department of Transportation (IDOT), in cooperation with Amtrak, undertook the Chicago-St. Louis High Speed Rail Financial and Implementation Plan study in order to develop a realistic and achievable blueprint for implementation of high speed rail in the Chicago-St. Louis corridor. This report presents a summary of the Price Waterhouse Project Team`s analysis and the Financial and Implementation Plan for implementing high speed rail service in the Chicago-St. Louis corridor.

  11. 33 CFR 84.24 - High-speed craft.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at a... 33 Navigation and Navigable Waters 1 2014-07-01 2014-07-01 false High-speed craft. 84.24...

  12. 33 CFR 84.24 - High-speed craft.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at a... 33 Navigation and Navigable Waters 1 2012-07-01 2012-07-01 false High-speed craft. 84.24...

  13. 33 CFR 84.24 - High-speed craft.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at a... 33 Navigation and Navigable Waters 1 2013-07-01 2013-07-01 false High-speed craft. 84.24...

  14. 33 CFR 84.24 - High-speed craft.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 33 Navigation and Navigable Waters 1 2011-07-01 2011-07-01 false High-speed craft. 84.24 Section... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at...

  15. 33 CFR 84.24 - High-speed craft.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 33 Navigation and Navigable Waters 1 2010-07-01 2010-07-01 false High-speed craft. 84.24 Section... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at...

  16. Observation of diesel spray by pseudo-high-speed photography

    NASA Astrophysics Data System (ADS)

    Umezu, Seiji; Oka, Mohachiro

    2001-04-01

    Pseudo high speed photography has been developed to observe intermittent, periodic and high speed phenomena like diesel spray. Main device of this photography consists of Automatic Variable Retarder (AVR) which delays gradually timing between diesel injection and strobe spark with the micrometer. This technique enables us to observe diesel spray development just like images taken by a high speed video camera. This paper describes a principle of pseudo high speed photography, experimental results of adaptation to diesel spray and analysis of the diesel atomization mechanism.

  17. High-speed rail-coming to America?

    PubMed

    Cameron, David Ossian

    2009-01-01

    The United States lags many parts of the world when it comes to high-speed rail. But investing in high-speed rail could help us through current problems. Funds- $8 billion-in the economic stimulus package passed by Congress are designated for high-speed rail. Other funds in the pipeline total approximately $15.5 billion. High-speed rail can relieve congestion, free up national airspace, provide reliable transportation and positive economic development, create jobs, and is more energy efficient than other modes of travel. PMID:19608527

  18. High-speed dual Langmuir probe

    SciTech Connect

    Lobbia, Robert B.; Gallimore, Alec D.

    2010-07-15

    In an effort to temporally resolve the electron density, electron temperature, and plasma potential for turbulent plasma discharges, a unique high-speed dual Langmuir probe (HDLP) has been developed. A traditional single Langmuir probe of cylindrical geometry (exposed to the plasma) is swept simultaneously with a nearby capacitance and noise compensating null probe (fully insulated from the plasma) to enable bias sweep rates on a microsecond timescale. Traditional thin-sheath Langmuir probe theory is applied for interpretation of the collected probe data. Data at a sweep rate of 100 kHz are presented; however the developed system is capable of running at 1 MHz--near the upper limit of the applied electrostatic Langmuir probe theory for the investigated plasma conditions. Large sets (100 000 sweeps at each of 352 spatial locations) of contiguous turbulent plasma properties are collected using simple electronics for probe bias driving and current measurement attaining 80 dB signal-to-noise measurements with dc to 1 MHz bandwidth. Near- and far-field plume measurements with the HDLP system are performed downstream from a modern Hall effect thruster where the time-averaged plasma properties exhibit the approximate ranges: electron density n{sub e} from (1x10{sup 15})-(5x10{sup 16}) m{sup -3}, electron temperature T{sub e} from 1 to 3.5 eV, and plasma potential V{sub p} from 5 to 15 V. The thruster discharge of 200 V (constant anode potential) and 2 A (average discharge current) displays strong, 2.2 A peak-to-peak, current oscillations at 19 kHz, characteristic of the thruster ''breathing mode'' ionization instability. Large amplitude discharge current fluctuations are typical for most Hall thrusters, yet the HDLP system reveals the presence of the same 19 kHz fluctuations in n{sub e}(t), T{sub e}(t), and V{sub p}(t) throughout the entire plume with peak-to-peak divided by mean plasma properties that average 94%. The propagation delays between the discharge current

  19. High-speed dual Langmuir probe.

    PubMed

    Lobbia, Robert B; Gallimore, Alec D

    2010-07-01

    In an effort to temporally resolve the electron density, electron temperature, and plasma potential for turbulent plasma discharges, a unique high-speed dual Langmuir probe (HDLP) has been developed. A traditional single Langmuir probe of cylindrical geometry (exposed to the plasma) is swept simultaneously with a nearby capacitance and noise compensating null probe (fully insulated from the plasma) to enable bias sweep rates on a microsecond timescale. Traditional thin-sheath Langmuir probe theory is applied for interpretation of the collected probe data. Data at a sweep rate of 100 kHz are presented; however the developed system is capable of running at 1 MHz-near the upper limit of the applied electrostatic Langmuir probe theory for the investigated plasma conditions. Large sets (100,000 sweeps at each of 352 spatial locations) of contiguous turbulent plasma properties are collected using simple electronics for probe bias driving and current measurement attaining 80 dB signal-to-noise measurements with dc to 1 MHz bandwidth. Near- and far-field plume measurements with the HDLP system are performed downstream from a modern Hall effect thruster where the time-averaged plasma properties exhibit the approximate ranges: electron density n(e) from (1x10(15))-(5x10(16)) m(-3), electron temperature T(e) from 1 to 3.5 eV, and plasma potential V(p) from 5 to 15 V. The thruster discharge of 200 V (constant anode potential) and 2 A (average discharge current) displays strong, 2.2 A peak-to-peak, current oscillations at 19 kHz, characteristic of the thruster "breathing mode" ionization instability. Large amplitude discharge current fluctuations are typical for most Hall thrusters, yet the HDLP system reveals the presence of the same 19 kHz fluctuations in n(e)(t), T(e)(t), and V(p)(t) throughout the entire plume with peak-to-peak divided by mean plasma properties that average 94%. The propagation delays between the discharge current fluctuations and the corresponding plasma

  20. High-Speed General Purpose Genetic Algorithm Processor.

    PubMed

    Hoseini Alinodehi, Seyed Pourya; Moshfe, Sajjad; Saber Zaeimian, Masoumeh; Khoei, Abdollah; Hadidi, Khairollah

    2016-07-01

    In this paper, an ultrafast steady-state genetic algorithm processor (GAP) is presented. Due to the heavy computational load of genetic algorithms (GAs), they usually take a long time to find optimum solutions. Hardware implementation is a significant approach to overcome the problem by speeding up the GAs procedure. Hence, we designed a digital CMOS implementation of GA in [Formula: see text] process. The proposed processor is not bounded to a specific application. Indeed, it is a general-purpose processor, which is capable of performing optimization in any possible application. Utilizing speed-boosting techniques, such as pipeline scheme, parallel coarse-grained processing, parallel fitness computation, parallel selection of parents, dual-population scheme, and support for pipelined fitness computation, the proposed processor significantly reduces the processing time. Furthermore, by relying on a built-in discard operator the proposed hardware may be used in constrained problems that are very common in control applications. In the proposed design, a large search space is achievable through the bit string length extension of individuals in the genetic population by connecting the 32-bit GAPs. In addition, the proposed processor supports parallel processing, in which the GAs procedure can be run on several connected processors simultaneously. PMID:26241984

  1. Time optimal paths for high speed maneuvering

    SciTech Connect

    Reister, D.B.; Lenhart, S.M.

    1993-01-01

    Recent theoretical results have completely solved the problem of determining the minimum length path for a vehicle with a minimum turning radius moving from an initial configuration to a final configuration. Time optimal paths for a constant speed vehicle are a subset of the minimum length paths. This paper uses the Pontryagin maximum principle to find time optimal paths for a constant speed vehicle. The time optimal paths consist of sequences of axes of circles and straight lines. The maximum principle introduces concepts (dual variables, bang-bang solutions, singular solutions, and transversality conditions) that provide important insight into the nature of the time optimal paths. We explore the properties of the optimal paths and present some experimental results for a mobile robot following an optimal path.

  2. High-speed architecture for the decoding of trellis-coded modulation

    NASA Technical Reports Server (NTRS)

    Osborne, William P.

    1992-01-01

    Since 1971, when the Viterbi Algorithm was introduced as the optimal method of decoding convolutional codes, improvements in circuit technology, especially VLSI, have steadily increased its speed and practicality. Trellis-Coded Modulation (TCM) combines convolutional coding with higher level modulation (non-binary source alphabet) to provide forward error correction and spectral efficiency. For binary codes, the current stare-of-the-art is a 64-state Viterbi decoder on a single CMOS chip, operating at a data rate of 25 Mbps. Recently, there has been an interest in increasing the speed of the Viterbi Algorithm by improving the decoder architecture, or by reducing the algorithm itself. Designs employing new architectural techniques are now in existence, however these techniques are currently applied to simpler binary codes, not to TCM. The purpose of this report is to discuss TCM architectural considerations in general, and to present the design, at the logic gate level, or a specific TCM decoder which applies these considerations to achieve high-speed decoding.

  3. High-Speed Multiprocessing For Engine Simulation

    NASA Technical Reports Server (NTRS)

    Milner, Edward J.; Arpasi, Dale J.

    1988-01-01

    Parallel microprocessors have computational power and speed for realistic simulations. Interactive information bus links front-end processor and computational processors. Real-time information bus links real-time extension processor and pre-processors. Computational processor and preprocessor communicate through shared memory. System used to simulate small turboshaft engine to demonstrate potential of multiprocessing in such applications. Real-time simulations aid development of new digital engine controls enabling testing of hardware and software under realistic conditions.

  4. Using a High-Speed Camera to Measure the Speed of Sound

    NASA Astrophysics Data System (ADS)

    Hack, William Nathan; Baird, William H.

    2012-01-01

    The speed of sound is a physical property that can be measured easily in the lab. However, finding an inexpensive and intuitive way for students to determine this speed has been more involved. The introduction of affordable consumer-grade high-speed cameras (such as the Exilim EX-FC100) makes conceptually simple experiments feasible. Since the Exilim can capture 1000 frames a second, it provides an easy way for students to calculate the speed of sound by counting video frames from a sound-triggered event they can see. For our experiment, we popped a balloon at a measured distance from a sound-activated high-output LED while recording high-speed video for later analysis. The beauty of using this as the method for calculating the speed of sound is that the software required for frame-by-frame analysis is free and the idea itself (slow motion) is simple. This allows even middle school students to measure the speed of sound with assistance, but the ability to independently verify such a basic result is invaluable for high school or college students.

  5. High loading, low speed fan study, 5

    NASA Technical Reports Server (NTRS)

    Keenan, M. J.; Burdsall, E. A.

    1973-01-01

    A low speed, low noise, single stage fan was designed and tested. Design pressure ratio was 1.5 at a rotor tip speed of 1000 ft/sec. No inlet guide vane was used, the rotor stator was spaced and the number of rotor and stator airfoils was selected for low noise. Tests were conducted with uniform and distorted inlet flows. Stall margin of the initial design was too low for practical application. Airfoil slots and boundary layer and endwall devices did not improve stall margin sufficiently. A redesigned stator with reduced loadings increased stall margin, giving a fan efficiency of 0.883, 15% stall margin, and a 1.474 pressure radio at a specific flow of 41.7 lb/sec sq ft. Casing treatment over rotor tips improved stall margin with distorted inlet flow; vortex generators did not. Blade passing frequency noise increased with rotor relative Mach number. No supersonic fan noise was measured below 105% of design speed. Slotting airfoils, casing treatments, and a reduction of the ratio (number-stators/number-rotors) from (2n + 16) to (2n + 2) had no significant effects on noise.

  6. Micro-G silicon accelerometers with high performance CMOS interface circuitry

    NASA Astrophysics Data System (ADS)

    Yazdi, Navid

    High precision micro-g accelerometers are widely used in applications such as inertial navigation, microgravity measurements and seismology. The objective of this dissertation is to design and develop a z-axis micro-g accelerometer with high sensitivity, low noise, low temperature sensitivity, and good long-term stability. In order to achieve this goal, two novel all-silicon device structures, two single-wafer fabrication processes, and a novel interface CMOS circuit are introduced. The accelerometers are fabricated on a single silicon wafer using a combined bulk and surface micromachining technology. The first accelerometer is a fully-symmetrical capacitive device, which has a low cross-axis sensitivity in addition to the aforementioned performance targets. The accelerometer with a 4 x 1mm 2 proof mass shows a measured sensitivity of 19.4pF/g using turn-over tests, that yields a differential top and bottom sensitivity of 38.8pF/g. The calculated noise floor of this device at atmosphere is 0. 16 mug/√Hz. The second accelerometer is a high sensitivity capacitive device with a new folded-electrode structure. The structure provides closed-loop operation and differential capacitance measurement with a single-sided structure. The measured sensitivity for a device with 2.6 x 1mm2 proof mass is about 100pF/g. The calculated mechanical noise floor for the same device is 0.18mug/√Hz at atmosphere. Thorough analytical modeling and simulation of the accelerometer with finite electrode stiffness operated closed-loop are presented with an oversampled sigma-delta modulator chip. The simulations are performed in the time domain with inclusion of all non-idealities and non-linearities. The simulation results show a resolution of less than 10mug direct digital output and better than 1% linearity. Finally, a high performance interface circuit for the micro-g accelerometers is presented. This chip implements an oversampled sigma-delta modulator and can be both used for open

  7. High-speed and high-resolution heterodyne interferometer

    NASA Astrophysics Data System (ADS)

    Yokoyama, Shuko; Nishihara, I.; Okamoto, A.; Araki, Tsutomu; Suzuki, Norihito

    1990-07-01

    In conventional heterodyne interferometer it Is necessary to provide a high-beat frequency laser when measurement for a high-speed target Is required1 . But use of the high-beat frequency laser makes the " nanometerdivisions" difficult. We have developed a novel interferometer system that has a sufficient response to high-speed movement of the target without Increase of the laser beat frequency. In this work a two frequency laser light passes through the same optical path of the interferometer so that two conjugate beat signals are obtained. By processing the multiple beat signals with a newly developed signal processor the above methodological contradiction is solved. l. OPTICS FOR LINEAR DISTANCE MEASUREMENT Optical system of the interferometer Is shown In Flg. l in which two frequency lights Fl and F2 (freq. f and f2) of orthogonally linear-polarized components of a two mode laser are used. A reference beat signal R (freq. r ) is generated from Fl and F2. Fl and F2 are passed through exactly the same path of the interferometer. A half power of Fl and F2 Is reflected and the rest Is transmitted In the beam splitter ( BS ). Polarization direction of the reflected beam is rotated for ir/2 after passing the X/4 plate twice. The transmitted beam Is reflected by a moving mirror (MM) mounted on the moving target so that frequency of the reflected beam Is shifted by Doppler

  8. Multi-point, high-speed passive ion velocity distribution diagnostic on the Pegasus Toroidal Experiment

    SciTech Connect

    Burke, M. G.; Fonck, R. J.; Bongard, M. W.; Schlossberg, D. J.; Winz, G. R.

    2012-10-15

    A passive ion temperature polychromator has been deployed on Pegasus to study power balance and non-thermal ion distributions that arise during point source helicity injection. Spectra are recorded from a 1 m F/8.6 Czerny-Turner polychromator whose output is recorded by an intensified high-speed camera. The use of high orders allows for a dispersion of 0.02 A/mm in 4th order and a bandpass of 0.14 A ({approx}13 km/s) at 3131 A in 4th order with 100 {mu}m entrance slit. The instrument temperature of the spectrometer is 15 eV. Light from the output of an image intensifier in the spectrometer focal plane is coupled to a high-speed CMOS camera. The system can accommodate up to 20 spatial points recorded at 0.5 ms time resolution. During helicity injection, stochastic magnetic fields keep T{sub e} low ({approx}100 eV) and thus low ionization impurities penetrate to the core. Under these conditions, high core ion temperatures are measured (T{sub i} Almost-Equal-To 1.2 keV, T{sub e} Almost-Equal-To 0.1 keV) using spectral lines from carbon III, nitrogen III, and boron IV.

  9. Multi-point, high-speed passive ion velocity distribution diagnostic on the Pegasus Toroidal Experimenta)

    NASA Astrophysics Data System (ADS)

    Burke, M. G.; Fonck, R. J.; Bongard, M. W.; Schlossberg, D. J.; Winz, G. R.

    2012-10-01

    A passive ion temperature polychromator has been deployed on Pegasus to study power balance and non-thermal ion distributions that arise during point source helicity injection. Spectra are recorded from a 1 m F/8.6 Czerny-Turner polychromator whose output is recorded by an intensified high-speed camera. The use of high orders allows for a dispersion of 0.02 Å/mm in 4th order and a bandpass of 0.14 Å (˜13 km/s) at 3131 Å in 4th order with 100 μm entrance slit. The instrument temperature of the spectrometer is 15 eV. Light from the output of an image intensifier in the spectrometer focal plane is coupled to a high-speed CMOS camera. The system can accommodate up to 20 spatial points recorded at 0.5 ms time resolution. During helicity injection, stochastic magnetic fields keep Te low (˜100 eV) and thus low ionization impurities penetrate to the core. Under these conditions, high core ion temperatures are measured (Ti ≈ 1.2 keV, Te ≈ 0.1 keV) using spectral lines from carbon III, nitrogen III, and boron IV.

  10. Full-field high-speed laser Doppler imaging system for blood-flow measurements

    NASA Astrophysics Data System (ADS)

    Serov, Alexandre; Lasser, Theo

    2006-02-01

    We describe the design and performance of a new full-field high-speed laser Doppler imaging system developed for mapping and monitoring of blood flow in biological tissue. The total imaging time for 256x256 pixels region of interest is 1.2 seconds. An integrating CMOS image sensor is utilized to detect Doppler signal in a plurality of points simultaneously on the sample illuminated by a divergent laser beam of a uniform intensity profile. The integrating property of the detector improves the signal-to-noise ratio of the measurement, which results in high-quality flow-images provided by the system. The new technique is real-time, non-invasive and the instrument is easy to use. The wide range of applications is one of the major challenges for a future application of the imager. High-resolution high-speed laser Doppler perfusion imaging is a promising optical technique for diagnostic and assessing the treatment effect of the diseases such as e.g. atherosclerosis, psoriasis, diabetes, skin cancer, allergies, peripheral vascular diseases, skin irritancy and wound healing. We present some biological applications of the new imager and discuss the perspectives for the future implementations of the imager for clinical and physiological applications.

  11. High-speed wireless optical LANs

    NASA Astrophysics Data System (ADS)

    Oe, Kunishige; Sato, Syuichi; Okayama, Motoyuki; Kubota, Toshihiro

    2001-11-01

    Study on high speed indoor wireless optical LAN system enabling 100Mbps signal transmission with low bit error rate (10-9) is presented. To realize the optical LAN system handling 100 Mbps signal, a directed line of sight (LOS) system is adopted as the optical receiver sensitivity for a bit error rate of 10-9 for 100 Mbps signals is fairly large. In the system, new approaches are introduced: WDM technology which enables bi-directional transmission in full duplex manner is applied using a 1.3 micrometers laser diode for down-link and 0.65 micrometers red laser diode for up-link light sources. As the wavelengths of the two lasers are quite separated from each other, this WDM technology brings an advantage that two kind of semiconductor materials can be used for detectors; GaInAs is used for down-link while Si is applied for up-link. GaInAs PD cannot detect the up-link laser light of 0.65 micrometers and Si PD or APD cannot detect the down-link laser light of 1.3micrometers . Therefore full duplex transmission can be achieved in this configuration. In the indoor wireless optical LAN system, one of the critical points is the transmitter configuration for down- link which enables to deliver optical power enough for 100 Mbps transmission to user areas as wide as possible with inexpensive prices. To realize the point, a special 1.3micrometers laser diode, a spot-size converter integrated laser (SS-LD), is introduced in company with convex lens and an object lens to deliver optical power to areas as wide as possible. As the far-field patterns of the SS-LD are fairly narrow, most of the output power of the LD could be collected to and spread wide by the object lens of 40 magnifications. Using the device, 3m diameter circle area in the plane 2m apart from the 1.3micrometers SS-LD emitting 20 mW optical power, could receive optical power above the receiver sensitivity for a bit error rate of 10-9 for 100 Mbps signals. The visible red light is convenient for not only position

  12. High-speed on-chip windowed centroiding using photodiode-based CMOS imager

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Sun, Chao (Inventor); Yang, Guang (Inventor); Cunningham, Thomas J. (Inventor); Hancock, Bruce (Inventor)

    2003-01-01

    A centroid computation system is disclosed. The system has an imager array, a switching network, computation elements, and a divider circuit. The imager array has columns and rows of pixels. The switching network is adapted to receive pixel signals from the image array. The plurality of computation elements operates to compute inner products for at least x and y centroids. The plurality of computation elements has only passive elements to provide inner products of pixel signals the switching network. The divider circuit is adapted to receive the inner products and compute the x and y centroids.

  13. High-speed on-chip windowed centroiding using photodiode-based CMOS imager

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Sun, Chao (Inventor); Yang, Guang (Inventor); Cunningham, Thomas J. (Inventor); Hancock, Bruce (Inventor)

    2004-01-01

    A centroid computation system is disclosed. The system has an imager array, a switching network, computation elements, and a divider circuit. The imager array has columns and rows of pixels. The switching network is adapted to receive pixel signals from the image array. The plurality of computation elements operates to compute inner products for at least x and y centroids. The plurality of computation elements has only passive elements to provide inner products of pixel signals the switching network. The divider circuit is adapted to receive the inner products and compute the x and y centroids.

  14. 14 CFR 23.253 - High speed characteristics.

    Code of Federal Regulations, 2012 CFR

    2012-01-01

    ... 14 Aeronautics and Space 1 2012-01-01 2012-01-01 false High speed characteristics. 23.253 Section 23.253 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION, DEPARTMENT OF TRANSPORTATION AIRCRAFT... Requirements § 23.253 High speed characteristics. Link to an amendment published at 76 FR 75755, December...

  15. High-Speed Video Analysis of Damped Harmonic Motion

    ERIC Educational Resources Information Center

    Poonyawatpornkul, J.; Wattanakasiwich, P.

    2013-01-01

    In this paper, we acquire and analyse high-speed videos of a spring-mass system oscillating in glycerin at different temperatures. Three cases of damped harmonic oscillation are investigated and analysed by using high-speed video at a rate of 120 frames s[superscript -1] and Tracker Video Analysis (Tracker) software. We present empirical data for…

  16. HIGH-SPEED GC/MS FOR AIR ANALYSIS

    EPA Science Inventory

    High speed or fast gas chromatography (FGC) consists of narrow bandwidth injection into a high-speed carrier gas stream passing through a short column leading to a fast detector. Many attempts have been made to demonstrate FGC, but until recently no practical method for routin...

  17. SEMICONDUCTOR INTEGRATED CIRCUITS: A high-performance low-power CMOS AGC for GPS application

    NASA Astrophysics Data System (ADS)

    Qianqian, Lei; Qiming, Xu; Zhiming, Chen; Yin, Shi; Min, Lin; Hailong, Jia

    2010-02-01

    A wide tuning range, low power CMOS automatic gain control (AGC) with a simple architecture is proposed. The proposed AGC is composed of a variable gain amplifier (VGA), a comparator and a charge pump, and the dB-linear gain is controlled by the charge pump. The AGC was implemented in a 0.18 μm CMOS technology. The dynamic range of the VGA is more than 55 dB, the bandwidth is 30 MHz, and the gain error is lower than ±1.5 dB over the full temperature and gain ranges. It is designed for GPS application and is fed from a single 1.8 V power supply. The AGC power consumption is less than 5 mW, and the area of the AGC is 700 × 450 μm2.

  18. Nonparametric analysis of high wind speed data

    NASA Astrophysics Data System (ADS)

    Francisco-Fernández, Mario; Quintela-del-Río, Alejandro

    2013-01-01

    In this paper, nonparametric curve estimation methods are applied to analyze time series of wind speeds, focusing on the extreme events exceeding a chosen threshold. Classical parametric statistical approaches in this context consist in fitting a generalized Pareto distribution (GPD) to the tail of the empirical cumulative distribution, using maximum likelihood or the method of the moments to estimate the parameters of this distribution. Additionally, confidence intervals are usually computed to assess the uncertainty of the estimates. Nonparametric methods to estimate directly some quantities of interest, such as the probability of exceedance, the quantiles or return levels, or the return periods, are proposed. Moreover, bootstrap techniques are used to develop pointwise and simultaneous confidence intervals for these functions. The proposed models are applied to wind speed data in the Gulf Coast of US, comparing the results with those using the GPD approach, by means of a split-sample test. Results show that nonparametric methods are competitive with respect to the standard GPD approximations. The study is completed generating synthetic data sets and comparing the behavior of the parametric and the nonparametric estimates in this framework.

  19. High-performance 0.25-um CMOS technology for fast SRAMs

    NASA Astrophysics Data System (ADS)

    Hayden, James D.; McNelly, T. F.; Perera, Asanga H.; Pfiester, Jim R.; Subramanian, C. K.; Thompson, Matthew A.

    1996-09-01

    A high performance 0.25 micrometers CMOS process has been developed for fast static RAMs. This technology features retrograde wells, shallow trench isolation scalable to a 0.45 micrometers active pitch, surface channel 0.25 micrometers NMOS and PMOS transistors with a 55 angstroms nitrided gate oxide providing drive currents of 630 and 300 (mu) A/micrometers respectively at off-leakages of 10 pA/micrometers , overgated TFTs with an on/off ratio greater than 6(DOT)105, stacked capacitors for improved SER protection, five levels of polysilicon planarized by chemical-mechanical polishing with two self-aligned interpoly contacts, 0.35 micrometers contacts and a 0.625 metal pitch. In this technology, a triple well structure was used for SER protection. High energy retrograde wells were integrated with shallow trench isolation and epi providing excellent interwell isolation for both leakage and latch-up down to n+/p+ spaces of 0.60 micrometers . PMOS transistors were scaled to a physical gate length of 0.1 micrometers while maintaining excellent short channel characteristics. A split word-line bitcell was scaled to 1.425 micrometers X 2.625 micrometers equals 3.74 micrometers 2 using 0.25 micrometers rules. A tungsten interpoly plug was used to connect the PMOS TFT loads to the underlying NMOS latch gates without a parasitic diode or dopant interdiffusion, connecting 3 polysilicon layers with self-aligned isolation from an intervening polysilicon layer used as a local interconnect. With this plug, TFT drive currents were greatly improved, particularly at low voltages and the memory nodes pulled to the fully supply voltage. Functional 0.25 micrometers bitcells were demonstrated and with an LDD resistor it was possible to double the cell stability. Bitcell simulation was used to demonstrate that a 4T bitcell will be stable at 2.5 V but that a word-line boost will be required for 1.8 V operation.

  20. Ge on Si waveguide-integrated photodiodes for high speed and low power receivers

    NASA Astrophysics Data System (ADS)

    Virot, Léopold; Vivien, Laurent; Hartmann, Jean Michel; Fédéli, Jean-Marc; Marris-Morini, Delphine; Cassan, Eric; Baudot, Charles; Boeuf, Frédéric

    2013-05-01

    Development of fast silicon photonics integrated circuit is mainly driven by the reduction of the power consumption. As a result, photodetectors with high efficiency, high speed and low dark current are needed to reduce the global link consumption. Germanium is now considered as the ideal candidate for fully integrated receivers based on SOI substrate and CMOS-like processes. We report on low power and high speed waveguide-integrated Ge photodetectors. Butt coupled lateral PIN structure photodiodes have been fabricated by Germanium selective growth and ion implantation at the end of silicon waveguide. Three types of photodiodes are reported, with dark current as low as 6nA at 1V reverse bias, optical bandwidth over 40GHz at zero bias and responsivity up to 0.8A/W at a wavelength of 1550nm. Such devices are suitable for data rate over 40Gbps and can be easily integrated with other photonic devices to fabricate wafer scale integrated circuits for datacom and telecom applications.

  1. A MHz speed wavelength sweeping for ultra-high speed FBG interrogation

    NASA Astrophysics Data System (ADS)

    Kim, Gyeong Hun; Lee, Hwi Don; Eom, Tae Joong; Jeong, Myung Yung; Kim, Chang-Seok

    2015-09-01

    We demonstrated a MHz speed wavelength-swept fiber laser based on the active mode locking (AML) technique and applied to interrogation system of an array of fiber Bragg grating (FBG) sensors. MHz speed wavelength sweeping of wavelength-swept fiber laser can be obtained by programmable frequency modulation of the semiconductor optical amplifier (SOA) without any wavelength tunable filter. Both static and dynamic strain measurement of FBG sensors were successfully characterized with high linearity of an R-square value of 0.9999 at sweeping speed of 50 kHz.

  2. High speed micromachining with high power UV laser

    NASA Astrophysics Data System (ADS)

    Patel, Rajesh S.; Bovatsek, James M.

    2013-03-01

    Increasing demand for creating fine features with high accuracy in manufacturing of electronic mobile devices has fueled growth for lasers in manufacturing. High power, high repetition rate ultraviolet (UV) lasers provide an opportunity to implement a cost effective high quality, high throughput micromachining process in a 24/7 manufacturing environment. The energy available per pulse and the pulse repetition frequency (PRF) of diode pumped solid state (DPSS) nanosecond UV lasers have increased steadily over the years. Efficient use of the available energy from a laser is important to generate accurate fine features at a high speed with high quality. To achieve maximum material removal and minimal thermal damage for any laser micromachining application, use of the optimal process parameters including energy density or fluence (J/cm2), pulse width, and repetition rate is important. In this study we present a new high power, high PRF QuasarR 355-40 laser from Spectra-Physics with TimeShiftTM technology for unique software adjustable pulse width, pulse splitting, and pulse shaping capabilities. The benefits of these features for micromachining include improved throughput and quality. Specific example and results of silicon scribing are described to demonstrate the processing benefits of the Quasar's available power, PRF, and TimeShift technology.

  3. Final Report and Documentation for the Optical Backplane/Interconnect for High Speed Communication LDRD

    SciTech Connect

    ROBERTSON, PERRY J.; CHEN, HELEN Y.; BRANDT, JAMES M.; SULLIVAN, CHARLES T.; PIERSON, LYNDON G.; WITZKE, EDWARD L.; GASS, KARL

    2001-03-01

    Current copper backplane technology has reached the technical limits of clock speed and width for systems requiring multiple boards. Currently, bus technology such as VME and PCI (types of buses) will face severe limitations are the bus speed approaches 100 MHz. At this speed, the physical length limit of an unterminated bus is barely three inches. Terminating the bus enables much higher clock rates but at drastically higher power cost. Sandia has developed high bandwidth parallel optical interconnects that can provide over 40 Gbps throughput between circuit boards in a system. Based on Sandia's unique VCSEL (Vertical Cavity Surface Emitting Laser) technology, these devices are compatible with CMOS (Complementary Metal Oxide Semiconductor) chips and have single channel bandwidth in excess of 20 GHz. In this project, we are researching the use of this interconnect scheme as the physical layer of a greater ATM (Asynchronous Transfer Mode) based backplane. There are several advantages to this technology including small board space, lower power and non-contact communication. This technology is also easily expandable to meet future bandwidth requirements in excess of 160 Gbps sometimes referred to as UTOPIA 6. ATM over optical backplane will enable automatic switching of wide high-speed circuits between boards in a system. In the first year we developed integrated VCSELs and receivers, identified fiber ribbon based interconnect scheme and a high level architecture. In the second year, we implemented the physical layer in the form of a PCI computer peripheral card. A description of future work including super computer networking deployment and protocol processing is included.

  4. High speed demodulation systems for fiber optic grating sensors

    NASA Technical Reports Server (NTRS)

    Udd, Eric (Inventor); Weisshaar, Andreas (Inventor)

    2002-01-01

    Fiber optic grating sensor demodulation systems are described that offer high speed and multiplexing options for both single and multiple parameter fiber optic grating sensors. To attain very high speeds for single parameter fiber grating sensors ratio techniques are used that allow a series of sensors to be placed in a single fiber while retaining high speed capability. These methods can be extended to multiparameter fiber grating sensors. Optimization of speeds can be obtained by minimizing the number of spectral peaks that must be processed and it is shown that two or three spectral peak measurements may in specific multiparameter applications offer comparable or better performance than processing four spectral peaks. Combining the ratio methods with minimization of peak measurements allows very high speed measurement of such important environmental effects as transverse strain and pressure.

  5. Traction contact performance evaluation at high speeds

    NASA Technical Reports Server (NTRS)

    Tevaarwerk, J. L.

    1981-01-01

    The results of traction tests performed on two fluids are presented. These tests covered a pressure range of 1.0 to 2.5 GPa, an inlet temperature range of 30 'C to 70 'C, a speed range of 10 to 80 m/sec, aspect ratios of .5 to 5 and spin from 0 to 2.1 percent. The test results are presented in the form of two dimensionless parameters, the initial traction slope and the maximum traction peak. With the use of a suitable rheological fluid model the actual traction curves measured can now be reconstituted from the two fluid parameters. More importantly, the knowledge of these parameters together with the fluid rheological model, allow the prediction of traction under conditions of spin, slip and any combination thereof. Comparison between theoretically predicted traction under these conditions and those measured in actual traction tests shows that this method gives good results.

  6. Design of a GHz high-speed memory system

    NASA Astrophysics Data System (ADS)

    Lim, Teck Y.; Foo, Say W.; Chan, Kheng Kang

    1999-12-01

    Digital application has moved towards operating speed of hundreds of Mega Hertz, with the sampling speed of ADC moving into Giga Hertz range. There is an increasing need for the design and development of a high-speed data acquisition system that is capable of capturing and processing digitized analogue signal at high speed. Due to the tight timing budget, high operating speed components, Emitter-Coupled-Logic families components with rise time of typically less than 300 ps were used in the design. With this operating speed and short rise time, signal integrity issues like reflections due to impedance mismatches and crosstalk among the traces of the printed circuit board can no longer be neglected. A quick and reliable approach was taken in the design and implementation of a 1 GHz high-speed data acquisition system using commercial-off-the-shelf discrete components. High-speed digital design issues and methodology were explored in this project and verified with the implemented hardware. This paper gives an overview of the system and focuses on the use of functional and signal- integrity computer simulation software to confirm system performance at the early design stage before actual hardware implementation. Simulation results were further confirmed with the actual hardware implemented, and was found to be close. This has helped to reduce the design cycle time and development cost of the project.

  7. High-Speed, High-Temperature Finger Seal Test Results

    NASA Technical Reports Server (NTRS)

    Proctor, Margaret P.; Kumar, Arun; Delgado, Irebert R.

    2002-01-01

    Finger seals have significantly lower leakage rates than conventional labyrinth seals used in gas turbine engines and are expected to decrease specific fuel consumption by over 1 percent and to decrease direct operating cost by over 0.5 percent. Their compliant design accommodates shaft growth and motion due to thermal and dynamic loads with minimal wear. The cost to fabricate these finger seals is estimated to be about half the cost to fabricate brush seals. A finger seal has been tested in NASA's High Temperature, High Speed Turbine Seal Test Rig at operating conditions up to 1200 F, 1200 ft/s, and 75 psid. Static, performance and endurance test results are presented. While seal leakage and wear performance are acceptable, further design improvements are needed to reduce the seal power loss.

  8. Thermometry of a high temperature high speed micro heater.

    PubMed

    Xu, M; Slovin, G; Paramesh, J; Schlesinger, T E; Bain, J A

    2016-02-01

    A high temperature high-speed tungsten micro heater was fabricated and tested for application in phase change switches to indirectly heat and transform phase change material. Time domain transmissometry was used to measure heater temperature transients for given electrical inputs. Finite element modeling results on heater temperature transients show a good consistency between experiments and simulations with 0.2% mismatch in the best case and 13.1% in the worst case. The heater described in this work can reliably reach 1664 K at a rate of 1.67 × 10(10) K/s and quench to room temperature with a thermal RC time constant (time for T to fall by a factor of e) of less than 40 ns. PMID:26931881

  9. First Annual High-Speed Research Workshop, part 4

    NASA Technical Reports Server (NTRS)

    Whitehead, Allen H., Jr. (Compiler)

    1992-01-01

    Papers presented at the First Annual High Speed Research Workshop held in Williamsburg, Viginia, on May 14-16, 1991 are presented. This NASA-sponsored workshop provided a national forum for presenting and discussing important technology issues related to the definition of an economically viable and environmentally compatible High Speed Civil Transport. The sessions are developed around the technical components of NASA's Phase 1 High Speed Research Program which addresses the environmental issues of atmospheric emissions, community noise, and sonic boom. In particular, this part of the publication, Part 4, addresses high lift research and supersonic laminar flow control.

  10. Turbomachinery technology for high-speed civil flight

    NASA Technical Reports Server (NTRS)

    Saunders, Neal T.; Glassman, Arthur J.

    1989-01-01

    NASA Lewis' research and technology efforts applicable to turbomachinery for high-speed flight are discussed. The potential benefits and cycle requirements for advanced variable cycle engines and the supersonic throughflow fan engine for a high-speed civil transport application are presented. The supersonic throughflow fan technology program is discussed. Technology efforts in the basic discipline areas addressing the severe operating conditions associated with high-speed flight turbomachinery are reviewed. Included are examples of work in internal fluid mechanics, high-temperature materials, structural analysis, instrumentation and controls.

  11. Experimental ball bearing dynamics study. [by high speed photography

    NASA Technical Reports Server (NTRS)

    Signer, H. R.

    1973-01-01

    A photographic method was employed to record the kinematic performance of rolling elements in turbo machinery ball bearings. The 110 mm split inner ring test bearings had nominal contact angles of 26 deg and 34 deg. High speed films were taken at inner ring speeds of 4,000, 8,000 and 12,000 rpm and at thrust loads of 4,448 N and 22,240 N (1,000 and 5,000 lbs). The films were measured and this data reduced to obtain separator speed, ball speed and ball spin axis orientation.

  12. Review of High-Speed Fiber Optic Grating Sensors Systems

    SciTech Connect

    Udd, E; Benterou, J; May, C; Mihailov, S J; Lu, P

    2010-03-24

    Fiber grating sensors can be used to support a wide variety of high speed measurement applications. This includes measurements of vibrations on bridges, traffic monitoring on freeways, ultrasonic detection to support non-destructive tests on metal plates and providing details of detonation events. This paper provides a brief overview of some of the techniques that have been used to support high speed measurements using fiber grating sensors over frequency ranges from 10s of kHz, to MHZ and finally toward frequencies approaching the GHz regime. Very early in the development of fiber grating sensor systems it was realized that a high speed fiber grating sensor system could be realized by placing an optical filter that might be a fiber grating in front of a detector so that spectral changes in the reflection from a fiber grating were amplitude modulated. In principal the only limitation on this type of system involved the speed of the output detector which with the development of high speed communication links moved from the regime of 10s of MHz toward 10s of GHz. The earliest deployed systems involved civil structures including measurements of the strain fields on composite utility poles and missile bodies during break tests, bridges and freeways. This was followed by a series of developments that included high speed fiber grating sensors to support nondestructive testing via ultrasonic wave detection, high speed machining and monitoring ship hulls. Each of these applications involved monitoring mechanical motion of structures and thus interest was in speeds up to a few 10s of MHz. Most recently there has been interest in using fiber grating to monitor the very high speed events such as detonations and this has led to utilization of fiber gratings that are consumed during an event that may require detection speeds of hundreds of MHz and in the future multiple GHz.

  13. The Lag Model Applied to High Speed Flows

    NASA Technical Reports Server (NTRS)

    Olsen, Michael E.; Coakley, Thomas J.; Lillard, Randolph P.

    2005-01-01

    The Lag model has shown great promise in prediction of low speed and transonic separations. The predictions of the model, along with other models (Spalart-Allmaras and Menter SST) are assessed for various high speed flowfields. In addition to skin friction and separation predictions, the prediction of heat transfer are compared among these models, and some fundamental building block flowfields, are investigated.

  14. Application Of High Speed Photography In Science And Technology

    NASA Astrophysics Data System (ADS)

    Wu Ji-Zong, Wu; Yu-Ju, Lin

    1983-03-01

    The service works in high-speed photography carried out by the Department of Precision Instruments, Tianjin University are described in this paper. A compensation type high-speed camera was used in these works. The photographic methods adopted and better results achieved in the studies of several technical fields, such as velocity field of flow of overflow surface of high dam, combustion process of internal combustion engine, metal cutting, electrical are welding, experiment of piling of steel tube piles for supporting the marine platforms and characteristics of motion of wrist watch escape mechanism and so on are illustrated in more detail. As the extension of human visual organs and for increasing the abi-lities of observing and studying the high-speed processes, high-speed photography plays a very important role. In order to promote the application and development on high-speed photography, we have carried out the consultative and service works inside and outside Tianjin Uni-versity. The Pentazet 35 compensation type high-speed camera, made in East Germany, was used to record the high-speed events in various kinds of technical investigations and necessary results have been ob-tained. 1. Measurement of flow velocity on the overflow surface of high dam. In the design of a key water control project with high head, it is extremely necessary to determinate various characteristics of flow velocity field on the overflow surface of high dam. Since the water flow on the surface of high overflow dam possesses the features of large flow velocity and shallow water depth, therefore it is difficult to use the conventional current meters such as pilot tube, miniature cur-rent meter or electrical measuring methods of non-electrical quantities for studying this problem. Adopting the high-speed photographic method to study analogously the characteristics of flow velocity field on the overflow surface of high dam is a kind of new measuring method. People

  15. Performance comparison of CMOS-based photodiodes for high-resolution and high-sensitivity digital mammography

    NASA Astrophysics Data System (ADS)

    Bae, J. H.; Cho, M.; Kim, M. S.; Lee, D. H.; Cho, G.

    2011-12-01

    In order to develop a high-resolution and high-sensitivity digital mamographic detector, to use a commercially-available and well-developed CMOS image sensor (CIS) process can be a cost-effective way. However, in any commercial CIS process, several different types of n- or p-layers can be used so that various pn-junction structures could be formed depending on the choice of n- and p-layer combination. We performed a comparative analysis on the characteristics of three types of photodiodes formed on a high-resistivity p-type epitaxial wafer by applying three available n-layer processes in order to develop the high-sensitivity photodiode for a scintillator-based X-ray imaging detector. As a preliminar study, a small test-version CIS chip with an 80 × 80 pixel array of a 3-transistor active pixel sensor structure, 50 μm pitch and 80{%} fill factor was fabricated. The pixel area is subdivided into four 40 × 40 sub-arrays and 3 different types of photodides are designed for each sub-array by using n+, n- and n-well layers. All other components are designed to be identical for impartial comparison of the photodiodes only. Among 3 types, the n-/p-epi photodiode exhibited high charge-to-voltage gain (0.86 μV/e-), high quantum efficiency (49% at 532 nm wavelength) and low dark current (294 pA/cm2). The test CIS chip was coupled to a phosphor screen, Lanex Fine or Lanex Regular, both composed of Gd2O2S:Tb, and was tested using X-rays in a mammography setting. Among 6 cases, n-/p-epi photodiode coupled with the Lanex Regular also showed the highest sensitivity of 30.5 mV/mR.

  16. Improving the critical speeds of high-speed trains using magnetorheological technology

    NASA Astrophysics Data System (ADS)

    Sun, Shuaishuai; Deng, Huaxia; Li, Weihua; Du, Haiping; Qing Ni, Yi; Zhang, Jin; Yang, Jian

    2013-11-01

    With the rapid development of high-speed railways, vibration control for maintaining stability, passenger comfort, and safety has become an important area of research. In order to investigate the mechanism of train vibration, the critical speeds of various DOFs with respect to suspension stiffness and damping are first calculated and analyzed based on its dynamic equations. Then, the sensitivity of the critical speed is studied by analyzing the influence of different suspension parameters. On the basis of these analyses, a conclusion is drawn that secondary lateral damping is the most sensitive suspension damper. Subsequently, the secondary lateral dampers are replaced with magnetorheological fluid (MRF) dampers. Finally, a high-speed train model with MRF dampers is simulated by a combined ADAMS and MATLAB simulation and tested in a roller rig test platform to investigate the mechanism of how the MRF damper affects the train’s stability and critical speed. The results show that the semi-active suspension installed with MRF dampers substantially improves the stability and critical speed of the train.

  17. Non-linear responsivity characterisation of a CMOS Active Pixel Sensor for high resolution imaging of the Jovian system

    NASA Astrophysics Data System (ADS)

    Soman, M.; Stefanov, K.; Weatherill, D.; Holland, A.; Gow, J.; Leese, M.

    2015-02-01

    The Jovian system is the subject of study for the Jupiter Icy Moon Explorer (JUICE), an ESA mission which is planned to launch in 2022. The scientific payload is designed for both characterisation of the magnetosphere and radiation environment local to the spacecraft, as well as remote characterisation of Jupiter and its satellites. A key instrument on JUICE is the high resolution and wide angle camera, JANUS, whose main science goals include detailed characterisation and study phases of three of the Galilean satellites, Ganymede, Callisto and Europa, as well as studies of other moons, the ring system, and irregular satellites. The CIS115 is a CMOS Active Pixel Sensor from e2v technologies selected for the JANUS camera. It is fabricated using 0.18 μ m CMOS imaging sensor process, with an imaging area of 2000 × 1504 pixels, each 7 μ m square. A 4T pixel architecture allows for efficient correlated double sampling, improving the readout noise to better than 8 electrons rms, whilst the sensor is operated in a rolling shutter mode, sampling at up to 10 Mpixel/s at each of the four parallel outputs.A primary parameter to characterise for an imaging device is the relationship that converts the sensor's voltage output back to the corresponding number of electrons that were detected in a pixel, known as the Charge to Voltage Factor (CVF). In modern CMOS sensors with small feature sizes, the CVF is known to be non-linear with signal level, therefore a signal-dependent measurement of the CIS115's CVF has been undertaken and is presented here. The CVF is well modelled as a quadratic function leading to a measurement of the maximum charge handling capacity of the CIS115 to be 3.4 × 104 electrons. If the CIS115's response is assumed linear, its CVF is 21.1 electrons per mV (1/47.5 μ V per electron).

  18. High speed electromechanical response of ionic microactuators

    NASA Astrophysics Data System (ADS)

    Maziz, Ali; Plesse, Cedric; Soyer, Caroline; Cattan, Eric; Vidal, Frederic

    2015-04-01

    This paper presents the synthesis and characterization of thin and ultra-fast conducting polymer microactuators which can operate in the open air. Compared to all previous existing electronic conducting polymer based microactuators, this approach deals with the synthesis of robust interpenetrating polymer networks (IPNs) combined with a spincoating technique in order to tune and drastically reduce the thickness of conducting IPN microactuators using a so-called "trilayer" configuration. Patterning of electroactive materials has been performed with existing technologies, such as standard photolithography and dry etching. The smallest air-operating microbeam actuator based on conducting polymer is then described with dimensions as low as 160x30x6 μm3. Under electrical stimulation the translations of small ion motion into bending deformations are used as tools to demonstrate that small ion vibrations can still occur at frequency as several hundreds of Hz. Conducting IPN microactuators are then promising candidates to develop new MEMS combining downscaling, softness, low driving voltage, and fast response speed.

  19. High-voltage pixel detectors in commercial CMOS technologies for ATLAS, CLIC and Mu3e experiments

    NASA Astrophysics Data System (ADS)

    Perić, Ivan; Fischer, Peter; Kreidl, Christian; Hanh Nguyen, Hong; Augustin, Heiko; Berger, Niklaus; Kiehn, Moritz; Perrevoort, Ann-Kathrin; Schöning, André; Wiedner, Dirk; Feigl, Simon; Heim, Timon; Meng, Lingxin; Münstermann, Daniel; Benoit, Mathieu; Dannheim, Dominik; Bompard, Frederic; Breugnon, Patrick; Clemens, Jean-Claude; Fougeron, Denis; Liu, Jian; Pangaud, Patrick; Rozanov, Alexandre; Barbero, Marlon; Backhaus, Malte; Hügging, Fabian; Krüger, Hans; Lütticke, Florian; Mariñas, Carlos; Obermann, Theresa; Garcia-Sciveres, Maurice; Schwenker, Benjamin; Dierlamm, Alexander; La Rosa, Alessandro; Miucci, Antonio

    2013-12-01

    High-voltage particle detectors in commercial CMOS technologies are a detector family that allows implementation of low-cost, thin and radiation-tolerant detectors with a high time resolution. In the R/D phase of the development, a radiation tolerance of 1015 neq/cm2, nearly 100% detection efficiency and a spatial resolution of about 3 μm were demonstrated. Since 2011 the HV detectors have first applications: the technology is presently the main option for the pixel detector of the planned Mu3e experiment at PSI (Switzerland). Several prototype sensors have been designed in a standard 180 nm HV CMOS process and successfully tested. Thanks to its high radiation tolerance, the HV detectors are also seen at CERN as a promising alternative to the standard options for ATLAS upgrade and CLIC. In order to test the concept, within ATLAS upgrade R/D, we are currently exploring an active pixel detector demonstrator HV2FEI4; also implemented in the 180 nm HV process.

  20. Design and implementation of super broadband high speed waveguide switches

    NASA Astrophysics Data System (ADS)

    Zhu, Wenbin; Chao, Ju-Hung; Wang, Chao; Yao, Jimmy; Yin, Stuart

    2015-08-01

    In this paper, based on the theory of dynamic waveguiding effect in nanodisordered KTN crystals, a detailed design and implementation of a super broadband 1x2 high speed waveguide switch is presented. The important waveguide parameters, including the dimension, the refractive index distribution, and the electric field distribution within the waveguide are quantitatively simulated and analyzed. An experimental verification of switching effect based on the design is also conducted, which confirmed the design. The broadband and high speed nature of such kind of switch can play a key role in data center networks and cloud computing, which needs low power consumption and high speed switches.

  1. High-speed digital project, HSD test capability

    SciTech Connect

    Markley, R.E.; Elarton, J.L.; Allen, C.T.

    1994-04-01

    Establishing a high-speed digital (HSD) test capability for the Digital Waveform Synthesizer (DWS) multichip module (MCM) has required the development of several areas: a detailed test plan for the MCM; design, fabrication and prove-in of the high-speed test console; and the specification, design, and development of the high-speed test and environmental conditioning interface to the DWS. These development activities have been successfully completed at the Allied Signal Inc., Kansas City Division (KCD), and the test capability described herein is currently supporting DWS MCM testing and can be adapted to similar HSD module testing.

  2. First Annual High-Speed Research Workshop, part 3

    NASA Technical Reports Server (NTRS)

    Whitehead, Allen H., Jr. (Compiler)

    1992-01-01

    The First High-Speed Research (HSR) Workshop was hosted by NASA LaRC and was held 14-16 May 1991, in Williamsburg, Virginia. The purpose of the workshop was to provide a national forum for the government, industry, and university participants to present and discuss important technology issues related to the development of a commercially viable, environmentally compatible, U.S. High-Speed Civil Transport. The workshop sessions are organized around the major task elements in NASA's Phase 1 High-Speed Research Program which basically addresses the environmental issues of atmospheric emissions, community noise, and sonic boom.

  3. High Speed Measurements using Fiber-optic Bragg Grating Sensors

    SciTech Connect

    Benterou, J J; May, C A; Udd, E; Mihailov, S J; Lu, P

    2011-03-26

    Fiber grating sensors may be used to monitor high-speed events that include catastrophic failure of structures, ultrasonic testing and detonations. This paper provides insights into the utility of fiber grating sensors to measure structural changes under extreme conditions. An emphasis is placed on situations where there is a structural discontinuity. Embedded chirped fiber Bragg grating (CFBG) sensors can track the very high-speed progress of detonation waves (6-9 km/sec) inside energetic materials. This paper discusses diagnostic instrumentation and analysis techniques used to measure these high-speed events.

  4. Trend on High-speed Power Line Communication Technology

    NASA Astrophysics Data System (ADS)

    Ogawa, Osamu

    High-speed power line communication (PLC) is useful technology to easily build the communication networks, because construction of new infrastructure is not necessary. In Europe and America, PLC has been used for broadband networks since the beginning of 21th century. In Japan, high-speed PLC was deregulated only indoor usage in 2006. Afterward it has been widely used for home area network, LAN in hotels and school buildings and so on. And recently, PLC is greatly concerned as communication technology for smart grid network. In this paper, the author surveys the high-speed PLC technology and its current status.

  5. High speed data transmission for the SSC solenoidal detector

    SciTech Connect

    Leskovar, B.

    1991-04-24

    High speed data transmission using fiber optics for the Superconducting Super Collider solenoidal detector has been studied. The solenoidal detector system will consist of nine subsystems involving more than a total 10{sup 7} channels of readout electronics. Consequently, a new high performance data acquisition system, incorporating high-speed optical fiber networks, will be required to process this large quantity of data. 15 refs., 3 figs., 1 tab.

  6. Fabrication and Electrical Characterization of Strained Si-on-insulator/Strained SiGe-on-insulator Dual Channel CMOS structures with High-Mobility Channels

    NASA Astrophysics Data System (ADS)

    Tezuka, Tsutomu; Nakaharai, Shu; Moriyama, Yoshihiko; Hirashita, Norio; Toyoda, Eiji; Sugiyama, Naoharu; Mizuno, Tomohisa; Takagi, Shinichi

    Mobility enhancement technologies by incorporating strain in MOSFETs have been recognized as key technologies for scaled CMOS devices. The most promising channel materials for n- and p-channel MOSFETs are tensily-strained Si and compressively-strained Ge (SiGe), respectively, from the viewpoint of their high mobility values. In this paper, dual channel CMOS structures with strained Si-on-insulator (strained-SOI)-nMOSFETs and strained SiGe-on-insulator (strained-SGOI)-pMOSFETs are demonstrated as well as their high channel mobility and current drive enhancements. Strained Si channels on a relaxed SGOI substrate and Ge-rich strained SGOI channels are located on the nMOS and pMOS regions of the same wafer, respectively. The dual channel structure was fabricated by a CMOS process combined with the Ge condensation process, in which the epitaxially grown SiGe layer on the SOI substrate was locally oxidized at high temperatures. As a result, significant electron- and hole-mobility enhancements for the strained SOI and SGOI channels were observed as well as the drain current enhancements. Based on the measured mobility for the nMOS and pMOS channels in the CMOS devices, CMOS performance enhancement of 30% was estimated.

  7. Per-Pixel Coded Exposure for High-Speed and High-Resolution Imaging Using a Digital Micromirror Device Camera

    PubMed Central

    Feng, Wei; Zhang, Fumin; Qu, Xinghua; Zheng, Shiwei

    2016-01-01

    High-speed photography is an important tool for studying rapid physical phenomena. However, low-frame-rate CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) camera cannot effectively capture the rapid phenomena with high-speed and high-resolution. In this paper, we incorporate the hardware restrictions of existing image sensors, design the sampling functions, and implement a hardware prototype with a digital micromirror device (DMD) camera in which spatial and temporal information can be flexibly modulated. Combined with the optical model of DMD camera, we theoretically analyze the per-pixel coded exposure and propose a three-element median quicksort method to increase the temporal resolution of the imaging system. Theoretically, this approach can rapidly increase the temporal resolution several, or even hundreds, of times without increasing bandwidth requirements of the camera. We demonstrate the effectiveness of our method via extensive examples and achieve 100 fps (frames per second) gain in temporal resolution by using a 25 fps camera. PMID:26959023

  8. Per-Pixel Coded Exposure for High-Speed and High-Resolution Imaging Using a Digital Micromirror Device Camera.

    PubMed

    Feng, Wei; Zhang, Fumin; Qu, Xinghua; Zheng, Shiwei

    2016-01-01

    High-speed photography is an important tool for studying rapid physical phenomena. However, low-frame-rate CCD (charge coupled device) or CMOS (complementary metal oxide semiconductor) camera cannot effectively capture the rapid phenomena with high-speed and high-resolution. In this paper, we incorporate the hardware restrictions of existing image sensors, design the sampling functions, and implement a hardware prototype with a digital micromirror device (DMD) camera in which spatial and temporal information can be flexibly modulated. Combined with the optical model of DMD camera, we theoretically analyze the per-pixel coded exposure and propose a three-element median quicksort method to increase the temporal resolution of the imaging system. Theoretically, this approach can rapidly increase the temporal resolution several, or even hundreds, of times without increasing bandwidth requirements of the camera. We demonstrate the effectiveness of our method via extensive examples and achieve 100 fps (frames per second) gain in temporal resolution by using a 25 fps camera. PMID:26959023

  9. High-speed digital signal normalization for feature identification

    NASA Technical Reports Server (NTRS)

    Ortiz, J. A.; Meredith, B. D.

    1983-01-01

    A design approach for high speed normalization of digital signals was developed. A reciprocal look up table technique is employed, where a digital value is mapped to its reciprocal via a high speed memory. This reciprocal is then multiplied with an input signal to obtain the normalized result. Normalization improves considerably the accuracy of certain feature identification algorithms. By using the concept of pipelining the multispectral sensor data processing rate is limited only by the speed of the multiplier. The breadboard system was found to operate at an execution rate of five million normalizations per second. This design features high precision, a reduced hardware complexity, high flexibility, and expandability which are very important considerations for spaceborne applications. It also accomplishes a high speed normalization rate essential for real time data processing.

  10. FPGA Flash Memory High Speed Data Acquisition

    NASA Technical Reports Server (NTRS)

    Gonzalez, April

    2013-01-01

    The purpose of this research is to design and implement a VHDL ONFI Controller module for a Modular Instrumentation System. The goal of the Modular Instrumentation System will be to have a low power device that will store data and send the data at a low speed to a processor. The benefit of such a system will give an advantage over other purchased binary IP due to the capability of allowing NASA to re-use and modify the memory controller module. To accomplish the performance criteria of a low power system, an in house auxiliary board (Flash/ADC board), FPGA development kit, debug board, and modular instrumentation board will be jointly used for the data acquisition. The Flash/ADC board contains four, 1 MSPS, input channel signals and an Open NAND Flash memory module with an analog to digital converter. The ADC, data bits, and control line signals from the board are sent to an Microsemi/Actel FPGA development kit for VHDL programming of the flash memory WRITE, READ, READ STATUS, ERASE, and RESET operation waveforms using Libero software. The debug board will be used for verification of the analog input signal and be able to communicate via serial interface with the module instrumentation. The scope of the new controller module was to find and develop an ONFI controller with the debug board layout designed and completed for manufacture. Successful flash memory operation waveform test routines were completed, simulated, and tested to work on the FPGA board. Through connection of the Flash/ADC board with the FPGA, it was found that the device specifications were not being meet with Vdd reaching half of its voltage. Further testing showed that it was the manufactured Flash/ADC board that contained a misalignment with the ONFI memory module traces. The errors proved to be too great to fix in the time limit set for the project.

  11. Highly Reliable, High-Speed, Unidirectional Serial Data Links

    NASA Technical Reports Server (NTRS)

    Cole, Robert M.; Bishop, Jamie

    2005-01-01

    Highly reliable, high-speed, unidirectional serial data-communication subsystems have been proposed to be installed in an upgrade of the computing systems aboard the space shuttles. The basic design concept of these serial data links is also adaptable to terrestrial use in applications in which there are requirements for highly reliable serial data communications. The hardware and software aspects of the architecture of the data links are dictated largely by a requirement, in the original space-shuttle application, for one computer to monitor the memory transactions and memory contents of other computers in real time with high reliability and without reliance on requests for retransmission. To minimize weight while affording a capability to transfer data at a required rate of 2.56 x 10(exp 8) bits per second, it was decided that the links would be serial ones of the fiber-channel type. [Fiber channel denotes a type of serial computer bus that is used to connect a computer (usually a supercomputer) with a high-speed data storage device. Depending on the specific application, the physical connection between the transmitter and receiver could be made via an optical fiber or a twisted pair of wires.] Heretofore, fiber-channel links have ordinarily been bidirectional and have operated under protocols that provide for receiving stations to detect errors and request retransmission when necessary. In the present case, the time taken by processing to request retransmission would conflict with the requirement for real-time transfer of data. To ensure reliability without retransmission, a link according to the proposal would utilize a modified version of the normal fiberchannel character set in conjunction with forward error correction by means of a Reed-Solomon code (see figure). The Reed-Solomon encoding and decoding and the translations between the normal and modified character sets would be effected by logic circuitry external to the fiber-channel transmitter and receiver

  12. A global standardization trend for high-speed client and line side transceivers

    NASA Astrophysics Data System (ADS)

    Isono, Hideki

    2012-12-01

    Through the recent progress in information oriented society, the required information volume is expanding rapidly. Under these circumstances, high-speed and high-capacity optical communication systems are deployed in the industry. Especially high speed optical transceiver is the key device to realize high-speed system, and the practical development is accelerated in the industry. In order to develop these leading edge products timely, the establishment of the global standards is strongly demanded in the industry. Based on these backgrounds, Forum standardization bodies such as OIF/IEEE802.3 are energetically creating the standards in the industry. With regard to 40G/100G standardization activities, OIF leads telecom field and IEEE802.3 leads datacom field, and both activities become important recently. The recent topics of these two standardization bodies are reviewed and its future direction is discussed. Two organizations have completed the 1st gen 40G/100G standards, and soon after they starts creating the 2nd gen 40G/100G standards for targeting more compact size and low power consumption transceivers, mainly because the unexpected huge increase of the information volume. Key factor for the 2nd gen is the low power consumption technology such as new CMOS technology and the design improvement of the heat dissipation. Also from the mechanical point of view, the development of the new electrical interface such as 25G/50G and the brand-new hybrid integration technologies are strongly expected in the industry. New configurations using silicon-photonics are reported by many organizations in the recent standardization meetings.

  13. Concentric Parallel Combining Balun for Millimeter-Wave Power Amplifier in Low-Power CMOS with High-Power Density

    NASA Astrophysics Data System (ADS)

    Han, Jiang-An; Kong, Zhi-Hui; Ma, Kaixue; Yeo, Kiat Seng; Lim, Wei Meng

    2016-07-01

    This paper presents a novel balun for a millimeter-wave power amplifier (PA) design to achieve high-power density in a 65-nm low-power (LP) CMOS process. By using a concentric winding technique, the proposed parallel combining balun with compact size accomplishes power combining and unbalance-balance conversion concurrently. For calculating its power combination efficiency in the condition of various amplitude and phase wave components, a method basing on S-parameters is derived. Based on the proposed parallel combining balun, a fabricated 60-GHz industrial, scientific, and medical (ISM) band PA with single-ended I/O achieves an 18.9-dB gain and an 8.8-dBm output power at 1-dB compression and 14.3-dBm saturated output power (P sat) at 62 GHz. This PA occupying only a 0.10-mm2 core area has demonstrated a high-power density of 269.15 mW/mm2 in 65 nm LP CMOS.

  14. ASIC for high-speed-gating and free running operation of SPADs

    NASA Astrophysics Data System (ADS)

    Rochas, Alexis; Guillaume-Gentil, Christophe; Gautier, Jean-Daniel; Pauchard, Alexandre; Ribordy, Gregoire; Zbinden, Hugo; Leblebici, Yusuf; Monat, Laurent

    2007-05-01

    Single photon detection at telecom wavelengths is of importance in many industrial applications ranging from quantum cryptography, quantum optics, optical time domain reflectometry, non-invasive testing of VLSI circuits, eye-safe LIDAR to laser ranging. In practical applications, the combination of an InGaAs/InP APD with an appropriate electronic circuit still stands as the best solution in comparison with emerging technologies such as superconducting single photon detectors, MCP-PMTs for the near IR or up-conversion technique. An ASIC dedicated to the operation of InGaAs/InP APDs in both gated mode and free-running mode is presented. The 1.6mm2 chip is fabricated in a CMOS technology. It combines a gate generator, a voltage limiter, a fast comparator, a precise timing circuit for the gate signal processing and an output stage. A pulse amplitude of up to +7V can be achieved, which allows the operation of commercially available APDs at a single photon detection probability larger than 25% at 1.55μm. The avalanche quenching process is extremely fast, thus reducing the afterpulsing effects. The packaging of the diode in close proximity with the quenching circuit enables high speed gating at frequencies larger than 10MHz. The reduced connection lengths combined with impedance adaptation technique provide excellent gate quality, free of oscillations or bumps. The excess bias voltage is thus constant over the gate width leading to a stable single photon detection probability and timing resolution. The CMOS integration guarantees long-term stability, reliability and compactness.

  15. High Electron Mobility Transistor Structures on Sapphire Substrates Using CMOS Compatible Processing Techniques

    NASA Technical Reports Server (NTRS)

    Mueller, Carl; Alterovitz, Samuel; Croke, Edward; Ponchak, George

    2004-01-01

    System-on-a-chip (SOC) processes are under intense development for high-speed, high frequency transceiver circuitry. As frequencies, data rates, and circuit complexity increases, the need for substrates that enable high-speed analog operation, low-power digital circuitry, and excellent isolation between devices becomes increasingly critical. SiGe/Si modulation doped field effect transistors (MODFETs) with high carrier mobilities are currently under development to meet the active RF device needs. However, as the substrate normally used is Si, the low-to-modest substrate resistivity causes large losses in the passive elements required for a complete high frequency circuit. These losses are projected to become increasingly troublesome as device frequencies progress to the Ku-band (12 - 18 GHz) and beyond. Sapphire is an excellent substrate for high frequency SOC designs because it supports excellent both active and passive RF device performance, as well as low-power digital operations. We are developing high electron mobility SiGe/Si transistor structures on r-plane sapphire, using either in-situ grown n-MODFET structures or ion-implanted high electron mobility transistor (HEMT) structures. Advantages of the MODFET structures include high electron mobilities at all temperatures (relative to ion-implanted HEMT structures), with mobility continuously improving to cryogenic temperatures. We have measured electron mobilities over 1,200 and 13,000 sq cm/V-sec at room temperature and 0.25 K, respectively in MODFET structures. The electron carrier densities were 1.6 and 1.33 x 10(exp 12)/sq cm at room and liquid helium temperature, respectively, denoting excellent carrier confinement. Using this technique, we have observed electron mobilities as high as 900 sq cm/V-sec at room temperature at a carrier density of 1.3 x 10(exp 12)/sq cm. The temperature dependence of mobility for both the MODFET and HEMT structures provides insights into the mechanisms that allow for enhanced

  16. Explosive-driven, high speed, arcless switch

    DOEpatents

    Skogmo, P.J.; Tucker, T.J.

    1986-05-02

    An explosive-actuated, fast-acting arcless switch contains a highly conductive foil to carry high currents positioned adjacent a dielectric surface within a casing. At one side of the foil opposite the dielectric surface is an explosive which, when detonated, drives the conductive foil against the dielectric surface. A pattern of grooves in the dielectric surface ruptures the foil to establish a rupture path having a pattern corresponding to the pattern of the grooves. The impedance of the ruptured foil is greater than that of the original foil to divert high current to a load. Planar and cylindrical embodiments of the switch are disclosed.

  17. Explosive-driven, high speed, arcless switch

    DOEpatents

    Skogmo, P.J.; Tucker, T.J.

    1987-07-14

    An explosive-actuated, fast-acting arcless switch contains a highly conductive foil to carry high currents positioned adjacent a dielectric surface within a casing. At one side of the foil opposite the dielectric surface is an explosive which, when detonated, drives the conductive foil against the dielectric surface. A pattern of grooves in the dielectric surface ruptures the foil to establish a rupture path having a pattern corresponding to the pattern of the grooves. The impedance of the ruptured foil is greater than that of the original foil to divert high current to a load. Planar and cylindrical embodiments of the switch are disclosed. 7 figs.

  18. Explosive-driven, high speed, arcless switch

    DOEpatents

    Skogmo, Phillip J.; Tucker, Tillman J.

    1987-01-01

    An explosive-actuated, fast-acting arcless switch contains a highly conductive foil to carry high currents positioned adjacent a dielectric surface within a casing. At one side of the foil opposite the dielectric surface is an explosive which, when detonated, drives the conductive foil against the dielectric surface. A pattern of grooves in the dielectric surface ruptures the foil to establish a rupture path having a pattern corresponding to the pattern of the grooves. The impedance of the ruptured foil is greater than that of the original foil to divert high current to a load. Planar and cylindrical embodiments of the switch are disclosed.

  19. Suggested future directions in high-speed transition experimental research

    NASA Technical Reports Server (NTRS)

    Bushnell, Dennis

    1990-01-01

    Historical developments in the area of high-speed experimental transition research are outlined, and future directions in this area as determined by the panel membership are listed. The directions include measurement and modeling of initial disturbance fields, both in ground facilities and flight, for all modes; development of advanced high-speed instrumentation for disturbance field measurements, measurements of the details of receptivity in multitudinous flows; further development and use of high-speed quiet tunnels; stability and transition studies for multitudinous flows; detailed studies of the transitional region for boundary layers, free flows, vortices separated flows, corner flows, etc.; and studies of flow-chemistry effects on transition phenomena. Applied research such areas as the physics of perforated-surface suction stabilization and the resolution of anomalies in the existing high-speed database is also suggested.

  20. Discharge characteristics of a high speed fuel injection system

    NASA Technical Reports Server (NTRS)

    Matthews, Robertson

    1925-01-01

    Discussed here are some discharge characteristics of a fuel injection system intended primarily for high speed service. The system consisted of a cam actuated fuel pump, a spring loaded automatic injection valve, and a connecting tube.

  1. The flight of an autogiro at high speed

    NASA Technical Reports Server (NTRS)

    Bennett, J A J

    1933-01-01

    This report presents a method for computing the flight performance of an autogiro at high speed, the velocity component along the blades being accounted for by calculation of the profile drag and the equation for zero torque.

  2. The High Speed Photometer for the Space Telescope

    NASA Technical Reports Server (NTRS)

    Bless, R. C.

    1982-01-01

    An overview of the high speed photometer (HSP), its optics and detectors, its electronics, its mechanical structure, and some observational considerations are presented. The capabilities and limitations of the HSP are outlined.

  3. Technology needs for high-speed rotorcraft, volume 1

    NASA Technical Reports Server (NTRS)

    Wilkerson, J. B.; Schneider, J. J.; Bartie, K. M.

    1991-01-01

    High-speed rotorcraft concepts and the technology needed to extend rotorcraft cruise speeds up to 450 knots (while retaining the helicopter attributes of low downwash velocities) were identified. Task I identified 20 concepts with high-speed potential. These concepts were qualitatively evaluated to determine the five most promising ones. These five concepts were designed with optimum wing loading and disk loading to a common NASA-defined military transport mission. The optimum designs were quantitatively compared against 11 key criteria and ranked accordingly. The two highest ranking concepts were selected for the further study.

  4. High-speed imaging and image processing in voice disorders

    NASA Astrophysics Data System (ADS)

    Tigges, Monika; Wittenberg, Thomas; Rosanowski, Frank; Eysholdt, Ulrich

    1996-12-01

    A digital high-speed camera system for the endoscopic examination of the larynx delivers recording speeds of up to 10,000 frames/s. Recordings of up to 1 s duration can be stored and used for further evaluation. Maximum resolution is 128 multiplied by 128 pixel. The acoustic and electroglottographic signals are recorded simultaneously. An image processing program especially developed for this purpose renders time-way-waveforms (high-speed glottograms) of several locations on the vocal cords. From the graphs all of the known objective parameters of the voice can be derived. Results of examinations in normal subjects and patients are presented.

  5. High speed data transmission at the Superconducting Super Collider

    SciTech Connect

    Leskovar, B.

    1990-04-01

    High speed data transmission using fiber optics in the data acquisition system of the Superconducting Super Collider has been investigated. Emphasis is placed on the high speed data transmission system overview, the local data network and on subassemblies, such as optical transmitters and receivers. Also, the performance of candidate subassemblies having a low power dissipation for the data acquisition system is discussed. 14 refs., 5 figs.

  6. Real-time intraoperative high-speed imaging during phacoemulsification.

    PubMed

    Srivastava, Samaresh; Vasavada, Abhay R; Vasavada, Vaishali A; Vasavada, Viraj A

    2012-09-01

    We describe the use of high-speed imaging during phacoemulsification in a clinical scenario. Images captured during surgery at high frame rates are converted into a slow-motion film to view and analyze various surgical steps. This technique highlights events that are not captured in a normal-speed video recording. It has obvious applications for understanding surgical techniques and technology. PMID:22841426

  7. High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

    PubMed

    Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

    2014-05-21

    We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics. PMID:24727896

  8. Highly sensitive multipoint real-time kinetic detection of Surface Plasmon bioanalytes with custom CMOS cameras

    PubMed Central

    Wang, Jing; Smith, Richard J.; Light, Roger A.; Richens, Joanna L.; Zhang, Jing; O’Shea, Paul; See, Chung; Somekh, Michael G.

    2014-01-01

    Phase sensitive Surface Plasmon Resonance (SPR) techniques are a popular means of characterizing biomolecular interactions. However, limitations due to the narrow dynamic range and difficulty in adapting the method for multi-point sensing have restricted its range of applications. This paper presents a compact phase sensitive SPR technology using a custom CMOS camera. The system is exceptionally versatile enabling one to trade dynamic range for sensitivity without altering the optical system. We present results showing sensitivity over the array of better than 10−6 Refractive Index Units (RIU) over a refractive index range of 2×10−2 RIU, with peak sensitivity of 3×10−7 RIU at the center of this range. We also explain how simply altering the settings of polarization components can give sensitivity on the order of 10−8 RIU albeit at the cost of lower dynamic range. The consistent response of the custom CMOS camera in the system also allowed us to demonstrate precise quantitative detection of two Fibrinogen antibody–protein binding sites. Moreover, we use the system to determine reaction kinetics and argue how the multipoint detection gives useful insight into the molecular binding mechanisms. PMID:24632461

  9. Low Noise and Highly Linear Wideband CMOS RF Front-End for DVB-H Direct-Conversion Receiver

    NASA Astrophysics Data System (ADS)

    Nam, Ilku; Moon, Hyunwon; Woo, Doo Hyung

    In this paper, a wideband CMOS radio frequency (RF) front-end for digital video broadcasting-handheld (DVB-H) receiver is proposed. The RF front-end circuit is composed of a single-ended resistive feedback low noise amplifier (LNA), a single-to-differential amplifier, an I/Q down-conversion mixer with linearized transconductors employing third order intermodulation distortion cancellation, and a divide-by-two circuit with LO buffers. By employing a third order intermodulation (IMD3) cancellation technique and vertical NPN bipolar junction transistor (BJT) switching pair for an I/Q down-conversion mixer, the proposed RF front-end circuit has high linearity and low low-frequency noise performance. It is fabricated in a 0.18µm deep n-well CMOS technology and draws 12mA from a 1.8V supply voltage. It shows a voltage gain of 31dB, a noise figure (NF) lower than 2.6dB, and an IIP3 of -8dBm from 470MHz to 862MHz.

  10. Carrying freight on high-speed rail lines

    SciTech Connect

    Plotkin, D.

    1997-05-01

    Under the current economic climate it is expected that any new high-speed rail line in the US would be constructed as a public/private partnership, requiring substantial private investment, and thus the expectation of reasonable profits. To date, proposed high-speed rail lines have failed to attract sufficient investment to create any new starts, in great part due to the conclusion that these systems would not likely cover their capital and operating costs and also provide reasonable profit for investors. Studies of the economic potential of US high-speed rail lines have commonly considered them as passenger carriers only, depending solely on ridership as a source of revenue. Yet is likely that significant revenue potential exists for carrying higher value freight as well--perhaps enough to substantially improve the economic viability of certain high-speed operations. Some basic technical aspects of carrying freight on high-speed rail lines are presented, along with an analysis to estimate the quantity of freight that may be technically practical, and thus potentially economically viable, for a high-speed train to carry.

  11. High Speed Computing, LANs, and WAMs

    NASA Technical Reports Server (NTRS)

    Bergman, Larry A.; Monacos, Steve

    1994-01-01

    Optical fiber networks may one day offer potential capacities exceeding 10 terabits/sec. This paper describes present gigabit network techniques for distributed computing as illustrated by the CASA gigabit testbed, and then explores future all-optic network architectures that offer increased capacity, more optimized level of service for a given application, high fault tolerance, and dynamic reconfigurability.

  12. A new design for a high speed spindle

    SciTech Connect

    Weck, M.; Fischer, S.; Holster, P.; Carlisle, K.; Chen, Y.

    1996-12-31

    Precision grinding and micromachining both impose high demands on the machine behavior, since the achievable workpiece accuracy is determined not only by the technological parameters but also by the characteristics of the applicated machine components. Ultraprecision surface quality and the mechanical fabrication of structures in the micron range can only be achieved by using machine tools which have appropriate spindles. Structures cannot be manufactured using spindle types of which the radial error motion is greater than the level of contour accuracy or surface roughness required. In addition, the spindle speed is an important value. Not only a certain cutting speed is needed from the technological point of view, but also the machining time required for microstructuring surfaces is reduced by deploying a high frequency spindle, thereby increasing the economic efficiency of the technique. Hence, the main purpose of the project was to develop a high speed spindle with properties concerning accuracy, speed and stiffness beyond commercially available ones.

  13. High-speed cineradiography using electronic imaging

    NASA Astrophysics Data System (ADS)

    Lucero, Jacob P.; Fry, David A.; Gaskill, William E.; Henderson, R. L.; Crawford, Ted R.; Carey, N. E.

    1993-01-01

    The Los Alamos National Laboratory has constructed and is now operating a cineradiography system for imaging and evaluation of ballistic interaction events at the 1200 meter range of the Terminal Effects Research and Analysis (TERA) Group at the New Mexico Institute of Mining and Technology. Cineradiography is part of a complete firing, tracking, and analysis system at the range. The cine system consists of flash x-ray sources illuminating a one-half meter by two meter fast phosphor screen which is viewed by gated-intensified high resolution still video cameras via turning mirrors. The entire system is armored to protect against events containing up to 13.5 kg of high explosive. Digital images are available for immediate display and processing. The system is capable of frame rates up to 105/sec for up to five total images.

  14. High speed cineradiography using electronic imaging

    NASA Astrophysics Data System (ADS)

    Lucero, J. P.; Fry, D. A.; Gaskill, W. E.; Henderson, R. L.; Crawford, T. R.; Carey, N. E.

    1992-12-01

    The Los Alamos National Laboratory has constructed and is now operating a cineradiography system for imaging and evaluation of ballistic interaction events at the 1200 meter range of the Terminal Effects Research and Analysis (TERA) Group at the New Mexico Institute of Mining and Technology. Cineradiography is part of a complete firing, tracking, and analysis system at the range. The cine system consists of flash x-ray sources illuminating a one-half meter by two meter fast phosphor screen which is viewed by gated-intensified high resolution still video cameras via turning mirrors. The entire system is armored to protect against events containing up to 13.5 kg of high explosive. Digital images are available for immediate display and processing. The system is capable of frame rates up to 10(exp 5)/sec for up to five total images.

  15. A high-sensitivity 135 GHz millimeter-wave imager by compact split-ring-resonator in 65-nm CMOS

    NASA Astrophysics Data System (ADS)

    Li, Nan; Yu, Hao; Yang, Chang; Shang, Yang; Li, Xiuping; Liu, Xiong

    2015-11-01

    A high-sensitivity 135 GHz millimeter-wave imager is demonstrated in 65 nm CMOS by on-chip metamaterial resonator: a differential transmission-line (T-line) loaded with split-ring-resonator (DTL-SRR). Due to sharp stop-band introduced by the metamaterial load, high-Q oscillatory amplification can be achieved with high sensitivity when utilizing DTL-SRR as quench-controlled oscillator to provide regenerative detection. The developed 135 GHz mm-wave imager pixel has a compact core chip area of 0.0085 mm2 with measured power consumption of 6.2 mW, sensitivity of -76.8 dBm, noise figure of 9.7 dB, and noise equivalent power of 0.9 fW/√{HZ } Hz. Millimeter-wave images has been demonstrated with millimeter-wave imager integrated with antenna array.

  16. Backside-illuminated, high-QE, 3e- RoN, fast 700fps, 1760x1680 pixels CMOS imager for AO with highly parallel readout

    NASA Astrophysics Data System (ADS)

    Downing, Mark; Kolb, Johann; Baade, Dietrich; Balard, Philippe; Dierickx, Bart; Defernez, Arnaud; Dupont, Benoit; Feautrier, Philippe; Finger, Gert; Fryer, Martin; Gach, Jean-Luc; Guillaume, Christian; Hubin, Norbert; Iwert, Olaf; Jerram, Paul; Jorden, Paul; Pike, Andrew; Pratlong, Jerome; Reyes, Javier; Stadler, Eric; Walker, Andrew

    2012-07-01

    The success of the next generation of instruments for 8 to 40-m class telescopes will depend upon improving the image quality (correcting the distortion caused by atmospheric turbulence) by exploiting sophisticated Adaptive Optics (AO) systems. One of the critical components of the AO systems for the E-ELT has been identified as the Laser/Natural Guide Star (LGS/NGS) WaveFront Sensing (WFS) detector. The combination of large format, 1760x1680 pixels to finely sample (84x84 sub-apertures) the wavefront and the spot elongation of laser guide stars, fast frame rate of 700 (up to 1000) frames per second, low read noise (< 3e-), and high QE (> 90%) makes the development of such a device extremely challenging. Design studies by industry concluded that a thinned and backside-illuminated CMOS Imager as the most promising technology. This paper describes the multi-phased development plan that will ensure devices are available on-time for E-ELT first-light AO systems; the different CMOS pixel architectures studied; measured results of technology demonstrators that have validated the CMOS Imager approach; the design explaining the approach of massive parallelism (70,000 ADCs) needed to achieve low noise at high pixel rates of ~3 Gpixel/s ; the 88 channel LVDS data interface; the restriction that stitching (required due to the 5x6cm size) posed on the design and the solutions found to overcome these limitations. Two generations of the CMOS Imager will be built: a pioneering quarter sized device of 880x840 pixels capable of meeting first light needs of the E-ELT called NGSD (Natural Guide Star Detector); followed by the full size device, the LGSD (Laser Guide Star Detector). Funding sources: OPTICON FP6 and FP7 from European Commission and ESO.

  17. Target location using high-speed orthorectification

    NASA Astrophysics Data System (ADS)

    Gordon, Donald P.

    2002-11-01

    Today's modern image processing software that removes pointing angle and platform anomalies through the photogrammetric orthorectification process offers some utility that if mitigated to hardware could provide near real-time on platform or on sensor capability. The orthorectification process, however, is so computation intensive and time consuming that real time operation is generally not available. This paper describes a low-cost means of performing real-time orthorectification, a brief overview of the orthorectification process and how it relates to targeting and location measurement. Also included in the presentation is a dynamic demonstration of two commercial software packages being used to extra geocoordinate information from a high resolution digital image.

  18. High-speed integrated electroabsorption modulators

    NASA Astrophysics Data System (ADS)

    Johnson, John E.; Morton, Paul A.; Park, Yong-Kwan; Ketelsen, Leonard J. P.; Grenko, J. A.; Miller, Thomas J.; Sputz, Sharon K.; Tanbun-Ek, Tawee; Vandenberg, J. M.; Yadvish, R. D.; Fullowan, Thomas R.; Sciortino, Paul F., Jr.; Sergent, A. M.; Tsang, Won-Tien

    1997-04-01

    The explosive growth in internet, multimedia and wireless traffic in recent years is rapidly exhausting capacity in public networks worldwide, forcing network service providers to aggressively install new lines and upgrade old ones. Fortunately, technological breakthroughs in the areas of erbium-doped fiber amplifiers (EDFA's), passive wavelength demultiplexers and low chirp sources have made all-optical dense wavelength-division multiplexed (WDM) systems a cost- effective way to utilize the vast bandwidth already available in the embedded fiber plant. WDM systems offer additional operational advantages, including high ultimate capacity, bit-rate transparency, flexible growth strategies, and the potential to use all-optical wavelength routing in future broadband network architectures. Commercial WDM systems operating at the OC-48 (2.5 Gbit/s) line rate are now available, and OC-192 (10 Gbit/s) terminal equipment which is under development will further enhance the capacity of these systems. One of the keys to viable WDM systems is the availability of inexpensive low-chirp optical transmitters. By taking advantage of photonic integrated circuit technology, it is possible to produce monolithically integrated DFB laser/EA modulators (EML's) with low chirp, low drive voltage and high extinction ratio, in a single compact package. In this talk we discuss the operating characteristics of these devices and their relationship to WDM system performance.

  19. High-gain, high-bandwidth, rail-to-rail, constant-gm CMOS operational amplifier

    NASA Astrophysics Data System (ADS)

    Huang, Hong-Yi; Wang, Bo-Ruei

    2013-01-01

    This study presents a high-gain, high-bandwidth, constant-gm , rail-to-rail operational amplifier (op-amp). The constant transconductance is improved with a source-to-bulk bias control of an input pair. A source degeneration scheme is also adapted to the output stage for receiving wide input range without degradation of the gain. Additionally, several compensation schemes are employed to enhance the stability. A test chip is fabricated in a 0.18 µm complementary metal-oxide semiconductor process. The active area of the op-amp is 181 × 173 µm2 and it consumes a power of 2.41 mW at a supply voltage of 1.8 V. The op-amp achieves a dc gain of 94.3 dB and a bandwidth of 45 MHz when the output capacitive load is connected to an effective load of 42.5 pF. A class-AB output stage combining a slew rate (SR) boost circuit provides a sinking current of 6 mA and an SR of 17 V/µs.

  20. High-speed imaging system for observation of discharge phenomena

    NASA Astrophysics Data System (ADS)

    Tanabe, R.; Kusano, H.; Ito, Y.

    2008-11-01

    A thin metal electrode tip instantly changes its shape into a sphere or a needlelike shape in a single electrical discharge of high current. These changes occur within several hundred microseconds. To observe these high-speed phenomena in a single discharge, an imaging system using a high-speed video camera and a high repetition rate pulse laser was constructed. A nanosecond laser, the wavelength of which was 532 nm, was used as the illuminating source of a newly developed high-speed video camera, HPV-1. The time resolution of our system was determined by the laser pulse width and was about 80 nanoseconds. The system can take one hundred pictures at 16- or 64-microsecond intervals in a single discharge event. A band-pass filter at 532 nm was placed in front of the camera to block the emission of the discharge arc at other wavelengths. Therefore, clear images of the electrode were recorded even during the discharge. If the laser was not used, only images of plasma during discharge and thermal radiation from the electrode after discharge were observed. These results demonstrate that the combination of a high repetition rate and a short pulse laser with a high speed video camera provides a unique and powerful method for high speed imaging.

  1. 'Superplane!' High Speed Civil Transport (pt 1/5)

    NASA Technical Reports Server (NTRS)

    1998-01-01

    The High Speed Civil Transport (HSCT). This light-hearted promotional piece explains what the HSCT 'Superplane!' is and what advantages it will have over current aircraft. As envisioned, the HSCT is a next-generation supersonic (faster than the speed of sound) passenger jet that would fly 300 passengers at more than 1,500 miles per hour -- more than twice the speed of sound. It will cross the Pacific or Atlantic in less than half the time of modern subsonic jets, and at a ticket price less than 20 percent above comparable, slower flights.

  2. 'Superplane!' High Speed Civil Transport (pt 2/5)

    NASA Technical Reports Server (NTRS)

    1998-01-01

    The High Speed Civil Transport (HSCT). This light-hearted promotional piece explains what the HSCT 'Superplane!' is and what advantages it will have over current aircraft. As envisioned, the HSCT is a next-generation supersonic (faster than the speed of sound) passenger jet that would fly 300 passengers at more than 1,500 miles per hour -- more than twice the speed of sound. It will cross the Pacific or Atlantic in less than half the time of modern subsonic jets, and at a ticket price less than 20 percent above comparable, slower flights

  3. Superplane! High Speed Civil Transport ( pt3/5 )

    NASA Technical Reports Server (NTRS)

    1998-01-01

    The High Speed Civil Transport (HSCT). This light-hearted promotional piece explains what the HSCT 'Superplane' is and what advantages it will have over current aircraft. As envisioned, the HSCT is a next-generation supersonic (faster than the speed of sound) passenger jet that would fly 300 passengers at more than 1,500 miles per hour -- more than twice the speed of sound. It will cross the Pacific or Atlantic in less than half the time of modern subsonic jets, and at a ticket price less than 20 percent above comparable, slower flights

  4. Coal-fueled high-speed diesel engine development

    SciTech Connect

    Kakwani, R. M.; Winsor, R. E.; Ryan, III, T. W.; Schwalb, J. A.; Wahiduzzaman, S.; Wilson, Jr., R. P.

    1991-11-01

    The objectives of this program are to study combustion feasibility by running Series 149 engine tests at high speeds with a fuel injection and combustion system designed for coal-water-slurry (CWS). The following criteria will be used to judge feasibility: (1) engine operation for sustained periods over the load range at speeds from 600 to 1900 rpm. The 149 engine for mine-haul trucks has a rated speed of 1900 rpm; (2) reasonable fuel economy and coal burnout rate; (3) reasonable cost of the engine design concept and CWS fuel compared to future oil prices.

  5. Control structures for high speed processors

    NASA Technical Reports Server (NTRS)

    Maki, G. K.; Mankin, R.; Owsley, P. A.; Kim, G. M.

    1982-01-01

    A special processor was designed to function as a Reed Solomon decoder with throughput data rate in the Mhz range. This data rate is significantly greater than is possible with conventional digital architectures. To achieve this rate, the processor design includes sequential, pipelined, distributed, and parallel processing. The processor was designed using a high level language register transfer language. The RTL can be used to describe how the different processes are implemented by the hardware. One problem of special interest was the development of dependent processes which are analogous to software subroutines. For greater flexibility, the RTL control structure was implemented in ROM. The special purpose hardware required approximately 1000 SSI and MSI components. The data rate throughput is 2.5 megabits/second. This data rate is achieved through the use of pipelined and distributed processing. This data rate can be compared with 800 kilobits/second in a recently proposed very large scale integration design of a Reed Solomon encoder.

  6. Aeroacoustics of Turbulent High-Speed Jets

    NASA Technical Reports Server (NTRS)

    Rao, Ram Mohan; Lundgren, Thomas S.

    1996-01-01

    Aeroacoustic noise generation in a supersonic round jet is studied to understand in particular the effect of turbulence structure on the noise without numerically compromising the turbulence itself. This means that direct numerical simulations (DNS's) are needed. In order to use DNS at high enough Reynolds numbers to get sufficient turbulence structure we have decided to solve the temporal jet problem, using periodicity in the direction of the jet axis. Physically this means that turbulent structures in the jet are repeated in successive downstream cells instead of being gradually modified downstream into a jet plume. Therefore in order to answer some questions about the turbulence we will partially compromise the overall structure of the jet. The first section of chapter 1 describes some work on the linear stability of a supersonic round jet and the implications of this for the jet noise problem. In the second section we present preliminary work done using a TVD numerical scheme on a CM5. This work is only two-dimensional (plane) but shows very interesting results, including weak shock waves. However this is a nonviscous computation and the method resolves the shocks by adding extra numerical dissipation where the gradients are large. One wonders whether the extra dissipation would influence small turbulent structures like small intense vortices. The second chapter is an extensive discussion of preliminary numerical work using the spectral method to solve the compressible Navier-Stokes equations to study turbulent jet flows. The method uses Fourier expansions in the azimuthal and streamwise direction and a 1-D B-spline basis representation in the radial direction. The B-spline basis is locally supported and this ensures block diagonal matrix equations which are solved in O(N) steps. A very accurate highly resolved DNS of a turbulent jet flow is expected.

  7. Low Speed and High Speed Correlation of SMART Active Flap Rotor Loads

    NASA Technical Reports Server (NTRS)

    Kottapalli, Sesi B. R.

    2010-01-01

    Measured, open loop and closed loop data from the SMART rotor test in the NASA Ames 40- by 80- Foot Wind Tunnel are compared with CAMRAD II calculations. One open loop high-speed case and four closed loop cases are considered. The closed loop cases include three high-speed cases and one low-speed case. Two of these high-speed cases include a 2 deg flap deflection at 5P case and a test maximum-airspeed case. This study follows a recent, open loop correlation effort that used a simple correction factor for the airfoil pitching moment Mach number. Compared to the earlier effort, the current open loop study considers more fundamental corrections based on advancing blade aerodynamic conditions. The airfoil tables themselves have been studied. Selected modifications to the HH-06 section flap airfoil pitching moment table are implemented. For the closed loop condition, the effect of the flap actuator is modeled by increased flap hinge stiffness. Overall, the open loop correlation is reasonable, thus confirming the basic correctness of the current semi-empirical modifications; the closed loop correlation is also reasonable considering that the current flap model is a first generation model. Detailed correlation results are given in the paper.

  8. Three-dimensional image cytometer based on widefield structured light microscopy and high-speed remote depth scanning.

    PubMed

    Choi, Heejin; Wadduwage, Dushan N; Tu, Ting Yuan; Matsudaira, Paul; So, Peter T C

    2015-01-01

    A high throughput 3D image cytometer have been developed that improves imaging speed by an order of magnitude over current technologies. This imaging speed improvement was realized by combining several key components. First, a depth-resolved image can be rapidly generated using a structured light reconstruction algorithm that requires only two wide field images, one with uniform illumination and the other with structured illumination. Second, depth scanning is implemented using the high speed remote depth scanning. Finally, the large field of view, high NA objective lens and the high pixelation, high frame rate sCMOS camera enable high resolution, high sensitivity imaging of a large cell population. This system can image at 800 cell/sec in 3D at submicron resolution corresponding to imaging 1 million cells in 20 min. The statistical accuracy of this instrument is verified by quantitatively measuring rare cell populations with ratio ranging from 1:1 to 1:10(5) . © 2014 International Society for Advancement of Cytometry. PMID:25352187

  9. Ultra high speed image processing techniques. [electronic packaging techniques

    NASA Technical Reports Server (NTRS)

    Anthony, T.; Hoeschele, D. F.; Connery, R.; Ehland, J.; Billings, J.

    1981-01-01

    Packaging techniques for ultra high speed image processing were developed. These techniques involve the development of a signal feedthrough technique through LSI/VLSI sapphire substrates. This allows the stacking of LSI/VLSI circuit substrates in a 3 dimensional package with greatly reduced length of interconnecting lines between the LSI/VLSI circuits. The reduced parasitic capacitances results in higher LSI/VLSI computational speeds at significantly reduced power consumption levels.

  10. High granularity tracker based on a Triple-GEM optically read by a CMOS-based camera

    NASA Astrophysics Data System (ADS)

    Marafini, M.; Patera, V.; Pinci, D.; Sarti, A.; Sciubba, A.; Spiriti, E.

    2015-12-01

    The detection of photons produced during the avalanche development in gas chambers has been the subject of detailed studies in the past. The great progresses achieved in last years in the performance of micro-pattern gas detectors on one side and of photo-sensors on the other provide the possibility of making high granularity and very sensitive particle trackers. In this paper, the results obtained with a triple-GEM structure read-out by a CMOS based sensor are described. The use of an He/CF4 (60/40) gas mixture and a detailed optimization of the electric fields made possible to obtain a very high GEM light yield. About 80 photons per primary electron were detected by the sensor resulting in a very good capability of tracking both muons from cosmic rays and electrons from natural radioactivity.

  11. Multi-exposure laser speckle contrast imaging using a high frame rate CMOS sensor with a field programmable gate array.

    PubMed

    Sun, Shen; Hayes-Gill, Barrie R; He, Diwei; Zhu, Yiqun; Morgan, Stephen P

    2015-10-15

    A system has been developed in which multi-exposure laser speckle contrast imaging (LSCI) is implemented using a high frame rate CMOS imaging sensor chip. Processing is performed using a field programmable gate array (FPGA). The system allows different exposure times to be simulated by accumulating a number of short exposures. This has the advantage that the image acquisition time is limited by the maximum exposure time and that regulation of the illuminating light level is not required. This high frame rate camera has also been deployed to implement laser Doppler blood flow processing, enabling a direct comparison of multi-exposure laser speckle imaging and laser Doppler imaging (LDI) to be carried out using the same experimental data. Results from a rotating diffuser indicate that both multi-exposure LSCI and LDI provide a linear response to changes in velocity. This cannot be obtained using single-exposure LSCI, unless an appropriate model is used for correcting the response. PMID:26469570

  12. Material requirements for the High Speed Civil Transport

    NASA Technical Reports Server (NTRS)

    Stephens, Joseph R.; Hecht, Ralph J.; Johnson, Andrew M.

    1993-01-01

    Under NASA-sponsored High Speed Research (HSR) programs, the materials and processing requirements have been identified for overcoming the environmental and economic barriers of the next generation High Speed Civil Transport (HSCT) propulsion system. The long (2 to 5 hours) supersonic cruise portion of the HSCT cycle will place additional durability requirements on all hot section engine components. Low emissions combustor designs will require high temperature ceramic matrix composite liners to meet an emission goal of less than 5g NO(x) per Kg fuel burned. Large axisymmetric and two-dimensional exhaust nozzle designs are now under development to meet or exceed FAR 36 Stage III noise requirements, and will require lightweight, high temperature metallic, intermetallic, and ceramic matrix composites to reduce nozzle weight and meet structural and acoustic component performance goals. This paper describes and discusses the turbomachinery, combustor, and exhaust nozzle requirements of the High Speed Civil Transport propulsion system.

  13. A Low-Power High-Speed Smart Sensor Design for Space Exploration Missions

    NASA Technical Reports Server (NTRS)

    Fang, Wai-Chi

    1997-01-01

    A low-power high-speed smart sensor system based on a large format active pixel sensor (APS) integrated with a programmable neural processor for space exploration missions is presented. The concept of building an advanced smart sensing system is demonstrated by a system-level microchip design that is composed with an APS sensor, a programmable neural processor, and an embedded microprocessor in a SOI CMOS technology. This ultra-fast smart sensor system-on-a-chip design mimics what is inherent in biological vision systems. Moreover, it is programmable and capable of performing ultra-fast machine vision processing in all levels such as image acquisition, image fusion, image analysis, scene interpretation, and control functions. The system provides about one tera-operation-per-second computing power which is a two order-of-magnitude increase over that of state-of-the-art microcomputers. Its high performance is due to massively parallel computing structures, high data throughput rates, fast learning capabilities, and advanced VLSI system-on-a-chip implementation.

  14. High-speed particle image velocimetry for the efficient measurement of turbulence statistics

    NASA Astrophysics Data System (ADS)

    Willert, Christian E.

    2015-01-01

    A high-frame-rate camera and a continuous-wave laser are used to capture long particle image sequences exceeding 100,000 consecutive frames at framing frequencies up to 20 kHz. The electronic shutter of the high-speed CMOS camera is reduced to s to prevent excessive particle image streaking. The combination of large image number and high frame rate is possible by limiting the field of view to a narrow strip, primarily to capture temporally resolved profiles of velocity and derived quantities, such as vorticity as well as higher order statistics. Multi-frame PIV processing algorithms are employed to improve the dynamic range of recovered PIV data. The recovered data are temporally well resolved and provide sufficient samples for statistical convergence of the fluctuating velocity components. The measurement technique is demonstrated on a spatially developing turbulent boundary layer inside a small wind tunnel with and . The chosen magnification permits a reliable estimation of the mean velocity profile down to a few wall units and yields statistical information such as the Reynolds stress components and probability density functions. By means of single-line correlation, it is further possible to extract the near-wall velocity profile in the viscous sublayer, both time-averaged as well as instantaneous, which permits the estimation the wall shear rate and along with it the shear stress and friction velocity . These data are then used for the calculation of space-time correlation maps of wall shear stress and velocity.

  15. Efficient space-time sampling with pixel-wise coded exposure for high-speed imaging.

    PubMed

    Liu, Dengyu; Gu, Jinwei; Hitomi, Yasunobu; Gupta, Mohit; Mitsunaga, Tomoo; Nayar, Shree K

    2014-02-01

    Cameras face a fundamental trade-off between spatial and temporal resolution. Digital still cameras can capture images with high spatial resolution, but most high-speed video cameras have relatively low spatial resolution. It is hard to overcome this trade-off without incurring a significant increase in hardware costs. In this paper, we propose techniques for sampling, representing, and reconstructing the space-time volume to overcome this trade-off. Our approach has two important distinctions compared to previous works: 1) We achieve sparse representation of videos by learning an overcomplete dictionary on video patches, and 2) we adhere to practical hardware constraints on sampling schemes imposed by architectures of current image sensors, which means that our sampling function can be implemented on CMOS image sensors with modified control units in the future. We evaluate components of our approach, sampling function and sparse representation, by comparing them to several existing approaches. We also implement a prototype imaging system with pixel-wise coded exposure control using a liquid crystal on silicon device. System characteristics such as field of view and modulation transfer function are evaluated for our imaging system. Both simulations and experiments on a wide range of scenes show that our method can effectively reconstruct a video from a single coded image while maintaining high spatial resolution. PMID:24356347

  16. Assessment of rural soundscapes with high-speed train noise.

    PubMed

    Lee, Pyoung Jik; Hong, Joo Young; Jeon, Jin Yong

    2014-06-01

    In the present study, rural soundscapes with high-speed train noise were assessed through laboratory experiments. A total of ten sites with varying landscape metrics were chosen for audio-visual recording. The acoustical characteristics of the high-speed train noise were analyzed using various noise level indices. Landscape metrics such as the percentage of natural features (NF) and Shannon's diversity index (SHDI) were adopted to evaluate the landscape features of the ten sites. Laboratory experiments were then performed with 20 well-trained listeners to investigate the perception of high-speed train noise in rural areas. The experiments consisted of three parts: 1) visual-only condition, 2) audio-only condition, and 3) combined audio-visual condition. The results showed that subjects' preference for visual images was significantly related to NF, the number of land types, and the A-weighted equivalent sound pressure level (LAeq). In addition, the visual images significantly influenced the noise annoyance, and LAeq and NF were the dominant factors affecting the annoyance from high-speed train noise in the combined audio-visual condition. In addition, Zwicker's loudness (N) was highly correlated with the annoyance from high-speed train noise in both the audio-only and audio-visual conditions. PMID:23953404

  17. High speed global shutter image sensors for professional applications

    NASA Astrophysics Data System (ADS)

    Wu, Xu; Meynants, Guy

    2015-04-01

    Global shutter imagers expand the use to miscellaneous applications, such as machine vision, 3D imaging, medical imaging, space etc. to eliminate motion artifacts in rolling shutter imagers. A low noise global shutter pixel requires more than one non-light sensitive memory to reduce the read noise. But larger memory area reduces the fill-factor of the pixels. Modern micro-lenses technology can compensate this fill-factor loss. Backside illumination (BSI) is another popular technique to improve the pixel fill-factor. But some pixel architecture may not reach sufficient shutter efficiency with backside illumination. Non-light sensitive memory elements make the fabrication with BSI possible. Machine vision like fast inspection system, medical imaging like 3D medical or scientific applications always ask for high frame rate global shutter image sensors. Thanks to the CMOS technology, fast Analog-to-digital converters (ADCs) can be integrated on chip. Dual correlated double sampling (CDS) on chip ADC with high interface digital data rate reduces the read noise and makes more on-chip operation control. As a result, a global shutter imager with digital interface is a very popular solution for applications with high performance and high frame rate requirements. In this paper we will review the global shutter architectures developed in CMOSIS, discuss their optimization process and compare their performances after fabrication.

  18. HDR {sup 192}Ir source speed measurements using a high speed video camera

    SciTech Connect

    Fonseca, Gabriel P.; Rubo, Rodrigo A.; Sales, Camila P. de; Verhaegen, Frank

    2015-01-15

    Purpose: The dose delivered with a HDR {sup 192}Ir afterloader can be separated into a dwell component, and a transit component resulting from the source movement. The transit component is directly dependent on the source speed profile and it is the goal of this study to measure accurate source speed profiles. Methods: A high speed video camera was used to record the movement of a {sup 192}Ir source (Nucletron, an Elekta company, Stockholm, Sweden) for interdwell distances of 0.25–5 cm with dwell times of 0.1, 1, and 2 s. Transit dose distributions were calculated using a Monte Carlo code simulating the source movement. Results: The source stops at each dwell position oscillating around the desired position for a duration up to (0.026 ± 0.005) s. The source speed profile shows variations between 0 and 81 cm/s with average speed of ∼33 cm/s for most of the interdwell distances. The source stops for up to (0.005 ± 0.001) s at nonprogrammed positions in between two programmed dwell positions. The dwell time correction applied by the manufacturer compensates the transit dose between the dwell positions leading to a maximum overdose of 41 mGy for the considered cases and assuming an air-kerma strength of 48 000 U. The transit dose component is not uniformly distributed leading to over and underdoses, which is within 1.4% for commonly prescribed doses (3–10 Gy). Conclusions: The source maintains its speed even for the short interdwell distances. Dose variations due to the transit dose component are much lower than the prescribed treatment doses for brachytherapy, although transit dose component should be evaluated individually for clinical cases.

  19. High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

    NASA Technical Reports Server (NTRS)

    Lin, Shu; Uehara, Gregory T.

    1996-01-01

    implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

  20. Thermal Behavior of High-Speed Helical Gear Trains Investigated

    NASA Technical Reports Server (NTRS)

    Handschuh, Robert F.

    2003-01-01

    High-speed and heavily loaded gearing are commonplace in the rotorcraft systems employed in helicopter and tiltrotor transmissions. The components are expected to deliver high power from the gas turbine engines to the high-torque, low-speed rotor, reducing the shaft rotational speed in the range of 25:1 to 100:1. These components are designed for high power-to-weight ratios, thus the components are fabricated as light as possible with the best materials and processing to transmit the required torque and carry the resultant loads without compromising the reliability of the drive system. This is a difficult task that is meticulously analyzed and thoroughly tested experimentally prior to being applied on a new or redesigned aircraft.

  1. Validation of solar wind high-speed stream predictions

    NASA Astrophysics Data System (ADS)

    Reiss, Martin; Temmer, Manuela; Veronig, Astrid; Nikolic, Ljubomir; Schöngassner, Florian; Vennerstrøm, Susanne

    2016-04-01

    Solar wind high-speed streams emanating from coronal holes are frequently impinging on the Earth's magnetosphere causing recurrent, medium-level geomagnetic storm activity. As major contributors to space weather disturbances at times of low solar activity, prediction models of solar wind high-speed streams are becoming highly desirable. We present a verification analysis of two operational solar wind prediction models (empirical model, Wang-Sheeley-Arge like model) by comparing the model runs for the period 2011 to 2014 with in-situ plasma measurements from the ACE spacecraft located at 1 AU. We find that both prediction models achieve a similar accuracy but demonstrate the tendency to under-predict and over-predict events of solar wind high-speed streams, respectively. General advantages and disadvantages of both models are diagnosed and outlined.

  2. High speed commercial transport fuels considerations and research needs

    NASA Technical Reports Server (NTRS)

    Lee, C. M.; Niedzwiecki, R. W.

    1989-01-01

    NASA is currently evaluating the potential of incorporating High Speed Civil Transport (HSCT) aircraft in the commercial fleet in the beginning of the 21st century. NASA sponsored HSCT enabling studies currently underway with airframers and engine manufacturers, are addressing a broad range of technical, environmental, economic, and related issues. Supersonic cruise speeds for these aircraft were originally focused in the Mach 2 to 5 range. At these flight speeds, both jet fuels and liquid methane were considered potential fuel candidates. For the year 2000 to 2010, cruise Mach numbers of 2 to 3+ are projected for aircraft fuel with thermally stable liquid jet fuels. For 2015 and beyond, liquid methane fueled aircraft cruising at Mach numbers of 4+ may be viable candidates. Operation at supersonic speeds will be much more severe than those encountered at subsonic flight. One of the most critical problems is the potential deterioration of the fuel due to the high temperature environment. HSCT fuels will not only be required to provide the energy necessary for flight, but will also be subject to aerodynamic heating and, will be required to serve as the primary heat sink for cooling the engine and airframe. To define fuel problems for high speed flight, a fuels workshop was conducted at NASA Lewis Research Center. The purpose of the workshop was to gather experts on aviation fuels, airframe fuel systems, airport infrastructure, and combustion systems to discuss high speed fuel alternatives, fuel supply scenarios, increased thermal stability approaches and measurements, safety considerations, and to provide directional guidance for future R and D efforts. Subsequent follow-up studies defined airport infrastructure impacts of high speed fuel candidates. The results of these activities are summarized. In addition, an initial case study using modified in-house refinery simulation model Gordian code (1) is briefly discussed. This code can be used to simulate different

  3. Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

    NASA Astrophysics Data System (ADS)

    Turchetta, R.; French, M.; Manolopoulos, S.; Tyndel, M.; Allport, P.; Bates, R.; O'Shea, V.; Hall, G.; Raymond, M.

    2003-03-01

    Monolithic Active Pixel Sensors (MAPS) designed in a standard VLSI CMOS technology have recently been proposed as a compact pixel detector for the detection of high-energy charged particle in vertex/tracking applications. MAPS, also named CMOS sensors, are already extensively used in visible light applications. With respect to other competing imaging technologies, CMOS sensors have several potential advantages in terms of low cost, low power, lower noise at higher speed, random access of pixels which allows windowing of region of interest, ability to integrate several functions on the same chip. This brings altogether to the concept of 'camera-on-a-chip'. In this paper, we review the use of CMOS sensors for particle physics and we analyse their performances in term of the efficiency (fill factor), signal generation, noise, readout speed and sensor area. In most of high-energy physics applications, data reduction is needed in the sensor at an early stage of the data processing before transfer of the data to tape. Because of the large number of pixels, data reduction is needed on the sensor itself or just outside. This brings in stringent requirements on the temporal noise as well as to the sensor uniformity, expressed as a Fixed Pattern Noise (FPN). A pixel architecture with an additional transistor is proposed. This architecture, coupled to correlated double sampling of the signal will allow cancellation of the two dominant noise sources, namely the reset or kTC noise and the FPN. A prototype has been designed in a standard 0.25 μm CMOS technology. It has also a structure for electrical calibration of the sensor. The prototype is functional and detailed tests are under way.

  4. Unsteady Flow Simulation of High-speed Turbopumps

    NASA Technical Reports Server (NTRS)

    Kiris, Cetin C.; Kwak, dochan; Chan, William; Housman, Jeffrey A.

    2006-01-01

    Computation of high-speed hydrodynamics requires high-fidelity simulation to resolve flow features involving transient flow, cavitation, tip vortex and multiple scales of unsteady fluctuations. One example of this type in aerospace is related to liquid-fueled rocket turbopump. Rocket turbopumps operate under severe conditions at very high rotational speeds typically at thousands of rpm. For example, the Shuttle orbiter low-pressure-fuel-turbopump creates transient flow features associated with reverse flows, tip clearance effects, secondary flows, vortex shedding, junction flows, and cavitation effects. Flow unsteadiness originating from the orbiter Low-Pressure-Fuel-Turbopump (LPFTP) inducer is one of the major contributors to the high frequency cyclic loading that results in high cycle fatigue damage to the flow liners just upstream of the LPFTP. The reverse flow generated at the tip of the inducer blades travels upstream and interacts with the bellows cavity. Simulation procedure for this type high-speed hydrodynamic problems requires a method for quantifying multi-scale and multi-phase flow as well as an efficient high-end computing strategy. The current paper presents a high-fidelity computational procedure for unsteady hydrodynamic problems using a high-speed liquid-fueled rocket turbopump.

  5. High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

    NASA Technical Reports Server (NTRS)

    Lin, Shu; Uehara, Gregory T.

    1996-01-01

    implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

  6. Vertical-coupled high-efficiency tunable III-V- CMOS SOI hybrid external-cavity laser.

    PubMed

    Lin, Shiyun; Djordjevic, Stevan S; Cunningham, John E; Shubin, Ivan; Luo, Ying; Yao, Jin; Li, Guoliang; Thacker, Hiren; Lee, Jin-Hyoung; Raj, Kannan; Zheng, Xuezhe; Krishnamoorthy, Ashok V

    2013-12-30

    We demonstrate a hybrid III-V/SOI laser by vertically coupling a III-V RSOA chip with a SOI-CMOS chip containing a tunable wavelength selective reflector. We report a waveguide-coupled wall-plug-efficiency of 5.5% and output power of 10 mW. A silicon resistor-based microheater was integrated to thermally tune a ring resonator for precise lasing wavelength control. A high tuning efficiency of 2.2 nm/mW over a range of 18 nm was achieved by locally removing the SOI handler substrate. C-band single mode lasing was confirmed with a side mode suppression ratio of 35 dB. This grating coupler based vertical integration approach can be scaled up in two dimensions for efficient multi-wavelength sources in silicon photonics. PMID:24514836

  7. High-speed cylindrical collapse of two perfect fluids

    NASA Astrophysics Data System (ADS)

    Sharif, M.; Ahmad, Zahid

    2007-09-01

    In this paper, the study of the gravitational collapse of cylindrically distributed two perfect fluid system has been carried out. It is assumed that the collapsing speeds of the two fluids are very large. We explore this condition by using the high-speed approximation scheme. There arise two cases, i.e., bounded and vanishing of the ratios of the pressures with densities of two fluids given by c s , d s . It is shown that the high-speed approximation scheme breaks down by non-zero pressures p 1, p 2 when c s , d s are bounded below by some positive constants. The failure of the high-speed approximation scheme at some particular time of the gravitational collapse suggests the uncertainty on the evolution at and after this time. In the bounded case, the naked singularity formation seems to be impossible for the cylindrical two perfect fluids. For the vanishing case, if a linear equation of state is used, the high-speed collapse does not break down by the effects of the pressures and consequently a naked singularity forms. This work provides the generalisation of the results already given by Nakao and Morisawa (Prog Theor Phys 113:73, 2005) for the perfect fluid.

  8. High-speed T-38A landing gear extension loads

    NASA Technical Reports Server (NTRS)

    Schmitt, A. L.

    1980-01-01

    Testing of T-38A landing gear extension at high speed and high altitude is described. The mechanisms are shown together with peak hydraulic pressure data during landing gear deployment with active and inactive strut door flaps. Results of strain gage measurements of stress on various structural members are included.

  9. 14 CFR 23.253 - High speed characteristics.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 14 Aeronautics and Space 1 2011-01-01 2011-01-01 false High speed characteristics. 23.253 Section 23.253 Aeronautics and Space FEDERAL AVIATION ADMINISTRATION, DEPARTMENT OF TRANSPORTATION AIRCRAFT AIRWORTHINESS STANDARDS: NORMAL, UTILITY, ACROBATIC, AND COMMUTER CATEGORY AIRPLANES Flight Miscellaneous Flight Requirements § 23.253 High...

  10. Noise in the passenger cars of high-speed trains.

    PubMed

    Hong, Joo Young; Cha, Yongwon; Jeon, Jin Yong

    2015-12-01

    The aim of this study is to investigate the effects of both room acoustic conditions and spectral characteristics of noises on acoustic discomfort in a high-speed train's passenger car. Measurement of interior noises in a high-speed train was performed when the train was operating at speeds of 100 km/h and 300 km/h. Acoustic discomfort caused by interior noises was evaluated by paired comparison methods based on the variation of reverberation time (RT) in a passenger car and the spectral differences in interior noises. The effect of RT on acoustic discomfort was not significant, whereas acoustic discomfort significantly varied depending on spectral differences in noise. Acoustic discomfort increased with increment of the sound pressure level (SPL) ratio at high frequencies, and variation in high-frequency noise components were described using sharpness. Just noticeable differences of SPL with low- and high-frequency components were determined to be 3.7 and 2.9 dB, respectively. This indicates that subjects were more sensitive to differences in SPLs at the high-frequency range than differences at the low-frequency range. These results support that, for interior noises, reduction in SPLs at high frequencies would significantly contribute to improved acoustic quality in passenger cars of high-speed trains. PMID:26723308

  11. High-speed ground transportation is coming to America -- slowly

    SciTech Connect

    Harrison, J.A.

    1995-03-01

    Over the past four decades, the US has invested heavily in highways and airport improvements, and in general has opted not to develop intercity passenger rail service. Over the same period, by contrast, Europe and japan have committed large sums of money to developing high-speed guided ground transportation and building extensive new high-speed rail networks. The US launched a high-speed ground transportation (HSGT) initiative in the mid-1906s and abandoned it in the mid-1970s. Now the Clinton administration proposes to support HSGT development, but the level and type of support remains to be worked out. This paper explores the prologue to and current prospects for HSGT development in the US.

  12. Development of a high-specific-speed centrifugal compressor

    SciTech Connect

    Rodgers, C.

    1997-07-01

    This paper describes the development of a subscale single-stage centrifugal compressor with a dimensionless specific speed (Ns) of 1.8, originally designed for full-size application as a high volume flow, low pressure ratio, gas booster compressor. The specific stage is noteworthy in that it provides a benchmark representing the performance potential of very high-specific-speed compressors, of which limited information is found in the open literature. Stage and component test performance characteristics are presented together with traverse results at the impeller exit. Traverse test results were compared with recent CFD computational predictions for an exploratory analytical calibration of a very high-specific-speed impeller geometry. The tested subscale (0.583) compressor essentially satisfied design performance expectations with an overall stage efficiency of 74% including, excessive exit casing losses. It was estimated that stage efficiency could be increased to 81% with exit casing losses halved.

  13. Development of a prototype sensor system for ultra-high-speed LDA-PIV

    NASA Astrophysics Data System (ADS)

    Griffiths, Jennifer A.; Royle, Gary J.; Bohndiek, Sarah E.; Turchetta, Renato; Chen, Daoyi

    2008-04-01

    Laser Doppler Anemometry (LDA) and Particle Image Velocimetry (PIV) are commonly used in the analysis of particulates in fluid flows. Despite the successes of these techniques, current instrumentation has placed limitations on the size and shape of the particles undergoing measurement, thus restricting the available data for the many industrial processes now utilising nano/micro particles. Data for spherical and irregularly shaped particles down to the order of 0.1 µm is now urgently required. Therefore, an ultra-fast LDA-PIV system is being constructed for the acquisition of this data. A key component of this instrument is the PIV optical detection system. Both the size and speed of the particles under investigation place challenging constraints on the system specifications: magnification is required within the system in order to visualise particles of the size of interest, but this restricts the corresponding field of view in a linearly inverse manner. Thus, for several images of a single particle in a fast fluid flow to be obtained, the image capture rate and sensitivity of the system must be sufficiently high. In order to fulfil the instrumentation criteria, the optical detection system chosen is a high-speed, lensed, digital imaging system based on state-of-the-art CMOS technology - the 'Vanilla' sensor developed by the UK based MI3 consortium. This novel Active Pixel Sensor is capable of high frame rates and sparse readout. When coupled with an image intensifier, it will have single photon detection capabilities. An FPGA based DAQ will allow real-time operation with minimal data transfer.

  14. Free-space optical data transmission using wavelength-division-multiplexing with a dedicated CMOS image sensor for indoor optical wireless LAN

    NASA Astrophysics Data System (ADS)

    Kagawa, K.; Tanida, J.

    2009-08-01

    We have proposed a space- and wavelength-division-multiplexing (WDM) indoor optical wireless LAN system based on a custom CMOS image sensor to realize a compact, high-speed, and intelligent nodes and hub. The CMOS image sensor can detect multiple fast optical data concurrently as well as captures ordinary images from which positions of communication nodes or the hub is obtained. In this paper, with the CMOS image sensor, we demonstrate an application of WDM technique to downlinks. We fabricated a 64x64-pixel custom CMOS image sensor with 4-channel concurrent data acquisition function. Experimental results showed that the CMOS sensor received 10Mbps×3ch WDM data while capturing ordinary images.

  15. Ultra-high-speed bionanoscope for cell and microbe imaging

    NASA Astrophysics Data System (ADS)

    Etoh, T. Goji; Vo Le, Cuong; Kawano, Hiroyuki; Ishikawa, Ikuko; Miyawaki, Atshushi; Dao, Vu T. S.; Nguyen, Hoang Dung; Yokoi, Sayoko; Yoshida, Shigeru; Nakano, Hitoshi; Takehara, Kohsei; Saito, Yoshiharu

    2008-11-01

    We are developing an ultra-high-sensitivity and ultra-high-speed imaging system for bioscience, mainly for imaging of microbes with visible light and cells with fluorescence emission. Scarcity of photons is the most serious problem in applications of high-speed imaging to the scientific field. To overcome the problem, the system integrates new technologies consisting of (1) an ultra-high-speed video camera with sub-ten-photon sensitivity with the frame rate of more than 1 mega frames per second, (2) a microscope with highly efficient use of light applicable to various unstained and fluorescence cell observations, and (3) very powerful long-pulse-strobe Xenon lights and lasers for microscopes. Various auxiliary technologies to support utilization of the system are also being developed. One example of them is an efficient video trigger system, which detects a weak signal of a sudden change in a frame under ultra-high-speed imaging by canceling high-frequency fluctuation of illumination light. This paper outlines the system with its preliminary evaluation results.

  16. Handling qualities of the High Speed Civil Transport

    NASA Technical Reports Server (NTRS)

    Solies, U. Peter

    1994-01-01

    The low speed handling qualities of a High Speed Civil Transport class aircraft have been investigated by using data of the former Advanced Supersonic Transport (AST) 105. The operation of such vehicles in the airport terminal area is characterized by 'backside' performance. Main objectives of this research effort were: (Q) determination of the nature and magnitude of the speed instability associated with the backside of the thrust required curve; (2) confirmation of the validity of existing MIL-SPEC handling qualities criteria; (3) safety of operation of the vehicle in the event of autothrottle failure; and (4) correlation of required engine responsiveness with level of speed instability. Preliminary findings comprise the following: (1) The critical velocity for speed instability was determined to be 196 knots, well above the projected approach speed of 155 knots. This puts the vehicle far on the backside of its thrust required curve. While the aircraft can be configured to have static and dynamic stability at this trim point, a significant speed instability emerges, if a pilot or autopilot attempts flight path control with elevator and/or canard control surfaces only. This requires a properly configured autothrottle and/or variable aerodynamic drag devices which can provide speed stability; (2) An AST 105 type vehicle meets MIL-SPEC criteria only in part. While the damping criteria for phugoid and short period motion are met easily, the AST 105 falls short of the required minimum short period frequency, meaning that the HSCT is too sluggish in pitch to meet the military criteria. Obviously the military specification do not consider a vehicle with such high pitch inertia. With regard to speed stability and flight path stability criteria, the vehicle meets levels 2 and 3 of the military requirements, indicating that it would be landed safety with manual controls in case of an autothrottle failure, even though the pilot workload would be high; and (3) This requires

  17. Stability control for high speed tracked unmanned vehicles

    NASA Astrophysics Data System (ADS)

    Pape, Olivier; Morillon, Joel G.; Houbloup, Philippe; Leveque, Stephane; Fialaire, Cecile; Gauthier, Thierry; Ropars, Patrice

    2005-05-01

    The French Military Robotic Study Program (introduced in Aerosense 2003), sponsored by the French Defense Procurement Agency and managed by Thales as the prime contractor, focuses on about 15 robotic themes which can provide an immediate "operational add-on value". The paper details the "automatic speed adjustment" behavior (named SYR4), developed by Giat Industries Company, which main goal is to secure the teleoperated mobility of high speed tracked vehicles on rough grounds; more precisely, the validated low level behavior continuously adjusts the vehicle speed taking into account the teleperator wish AND the maximum speed that the vehicle can manage safely according to the commanded radius of curvature. The algorithm is based on a realistic physical model of the ground-tracks relation, taking into account many vehicle and ground parameters (such as ground adherence and dynamic specificities of tracked vehicles). It also deals with the teleoperator-machine interface, providing a balanced strategy between both extreme behaviors: a) maximum speed reduction before initiating the commanded curve; b) executing the minimum possible radius without decreasing the commanded speed. The paper presents the results got from the military acceptance tests performed on tracked SYRANO vehicle (French Operational Demonstrator).

  18. High-Speed Passphrase Search System for PGP

    NASA Astrophysics Data System (ADS)

    Shimizu, Koichi; Suzuki, Daisuke; Tsurumaru, Toyohiro

    We propose an FPGA-based high-speed search system for cryptosystems that employ a passphrase-based security scheme. We first choose PGP as an example of such cryptosystems, clear several hurdles for high throughputs and manage to develop a high-speed search system for it. As a result we achieve a throughput of 1.1 × 105 passphrases per second, which is 38 times the speed of the fastest software. Furthermore we can do many flexible passphrase generations in addition to a simple brute force one because we assign the passphrase generation operation to software. In fact we implement a brute force and a dictionary-based ones, and get the same maximum throughput as above in both cases. We next consider the speed of passphrase generation in order to apply our system to other cryptosystems than PGP, and implement a hardware passphrase generator to achieve higher throughputs. In the PGP case, the very heavy iteration of hashing, 1025 times in our case, lowers the total throughput linearly, and makes the figure 1.1 × 105 suffice. In other cases without any such iteration structure, we have to generate even more passphrases, for example 108 per second. That can easily exceed the generation speed that software can offer and thus we conclude that it is now necessary to place the passphrase generation in hardware instead of in software.

  19. Advanced superposition methods for high speed turbopump vibration analysis

    NASA Technical Reports Server (NTRS)

    Nielson, C. E.; Campany, A. D.

    1981-01-01

    The small, high pressure Mark 48 liquid hydrogen turbopump was analyzed and dynamically tested to determine the cause of high speed vibration at an operating speed of 92,400 rpm. This approaches the design point operating speed of 95,000 rpm. The initial dynamic analysis in the design stage and subsequent further analysis of the rotor only dynamics failed to predict the vibration characteristics found during testing. An advanced procedure for dynamics analysis was used in this investigation. The procedure involves developing accurate dynamic models of the rotor assembly and casing assembly by finite element analysis. The dynamically instrumented assemblies are independently rap tested to verify the analytical models. The verified models are then combined by modal superposition techniques to develop a completed turbopump model where dynamic characteristics are determined. The results of the dynamic testing and analysis obtained are presented and methods of moving the high speed vibration characteristics to speeds above the operating range are recommended. Recommendations for use of these advanced dynamic analysis procedures during initial design phases are given.

  20. High-speed optical coherence tomography: basics and applications.

    PubMed

    Wojtkowski, Maciej

    2010-06-01

    In the past decade we have observed a rapid development of ultrahigh-speed optical coherence tomography (OCT) instruments, which currently enable performing cross-sectional in vivo imaging of biological samples with speeds of more than 100,000 A-scans/s. This progress in OCT technology has been achieved by the development of Fourier-domain detection techniques. Introduction of high-speed imaging capabilities lifts the primary limitation of early OCT technology by giving access to in vivo three-dimensional volumetric reconstructions on large scales within reasonable time constraints. As result, novel tools can be created that add new perspective for existing OCT applications and open new fields of research in biomedical imaging. Especially promising is the capability of performing functional imaging, which shows a potential to enable the differentiation of tissue pathologies via metabolic properties or functional responses. In this contribution the fundamental limitations and advantages of time-domain and Fourier-domain interferometric detection methods are discussed. Additionally the progress of high-speed OCT instruments and their impact on imaging applications is reviewed. Finally new perspectives on functional imaging with the use of state-of-the-art high-speed OCT technology are demonstrated. PMID:20517358

  1. Magneto-optical system for high speed real time imaging

    NASA Astrophysics Data System (ADS)

    Baziljevich, M.; Barness, D.; Sinvani, M.; Perel, E.; Shaulov, A.; Yeshurun, Y.

    2012-08-01

    A new magneto-optical system has been developed to expand the range of high speed real time magneto-optical imaging. A special source for the external magnetic field has also been designed, using a pump solenoid to rapidly excite the field coil. Together with careful modifications of the cryostat, to reduce eddy currents, ramping rates reaching 3000 T/s have been achieved. Using a powerful laser as the light source, a custom designed optical assembly, and a high speed digital camera, real time imaging rates up to 30 000 frames per seconds have been demonstrated.

  2. Secondary Containment Design for a High Speed Centrifuge

    SciTech Connect

    Snyder, K.W.

    1999-03-01

    Secondary containment for high speed rotating machinery, such as a centrifuge, is extremely important for operating personnel safety. Containment techniques can be very costly, ungainly and time consuming to construct. A novel containment concept is introduced which is fabricated out of modular sections of polycarbonate glazed into a Unistrut metal frame. A containment study for a high speed centrifuge is performed which includes the development of parameters for secondary containment design. The Unistrut/polycarbonate shield framing concept is presented including design details and proof testing procedures. The economical fabrication and modularity of the design indicates a usefulness for this shielding system in a wide variety of containment scenarios.

  3. First Annual High-Speed Research Workshop, part 1

    NASA Technical Reports Server (NTRS)

    Whitehead, Allen H., Jr. (Compiler)

    1992-01-01

    The workshop was presented to provide a national forum for the government, industry, and university participants in the program to present and discuss important technology issues related to the development of a commercially viable, environmentally compatible U.S. High Speed Civil Transport. The workshop sessions were organized around the major task elements in NASA's Phase 1 High Speed Research Program which basically addressed the environmental issues of atmospheric emissions, community noise, and sonic boom. This volume is divided into three sessions entitled: Plenary Session (which gives overviews from NASA, Boeing, Douglas, GE, and Pratt & Whitney on the HSCT program); Airframe Systems Studies; and Atmospheric Effects.

  4. Miniature high speed compressor having embedded permanent magnet motor

    NASA Technical Reports Server (NTRS)

    Zhou, Lei (Inventor); Zheng, Liping (Inventor); Chow, Louis (Inventor); Kapat, Jayanta S. (Inventor); Wu, Thomas X. (Inventor); Kota, Krishna M. (Inventor); Li, Xiaoyi (Inventor); Acharya, Dipjyoti (Inventor)

    2011-01-01

    A high speed centrifugal compressor for compressing fluids includes a permanent magnet synchronous motor (PMSM) having a hollow shaft, the being supported on its ends by ball bearing supports. A permanent magnet core is embedded inside the shaft. A stator with a winding is located radially outward of the shaft. The PMSM includes a rotor including at least one impeller secured to the shaft or integrated with the shaft as a single piece. The rotor is a high rigidity rotor providing a bending mode speed of at least 100,000 RPM which advantageously permits implementation of relatively low-cost ball bearing supports.

  5. High-speed tapping for N/C machining centers

    SciTech Connect

    Friend, J.P.

    1991-11-01

    Through a series of experiments, a new high-speed tapping technique was developed for N/C machining centers. The new technique produces high quality threads in a fraction of the time previously required, using the same equipment. Threads are produced to precise size and depth in a single pass at speeds up to 5000 rpm. Thread sizes ranged from 0.80 UNM (Unified Miniature Thread Series) (0.0315 in. major diameter) to 0.250-20 UN (Unified Screw Threads) in both blind and through-hole applications. The materials tapped included 17-4 PH stainless steel, 300 series stainless steel, and 6061-T6 aluminum. 10 figs.

  6. High-speed centrifugation induces aggregation of extracellular vesicles

    PubMed Central

    Linares, Romain; Tan, Sisareuth; Gounou, Céline; Arraud, Nicolas; Brisson, Alain R.

    2015-01-01

    Plasma and other body fluids contain cell-derived extracellular vesicles (EVs), which participate in physiopathological processes and have potential biomedical applications. In order to isolate, concentrate and purify EVs, high-speed centrifugation is often used. We show here, using electron microscopy, receptor-specific gold labelling and flow cytometry, that high-speed centrifugation induces the formation of EV aggregates composed of a mixture of EVs of various phenotypes and morphologies. The presence of aggregates made of EVs of different phenotypes may lead to erroneous interpretation concerning the existence of EVs harbouring surface antigens from different cell origins. PMID:26700615

  7. Global dynamics of low immersion high-speed milling.

    PubMed

    Szalai, Róbert; Stépán, Gábor; Hogan, S John

    2004-12-01

    In the case of low immersion high-speed milling, the ratio of time spent cutting to not cutting can be considered as a small parameter. In this case the classical regenerative vibration model of machine tool vibrations reduces to a simplified discrete mathematical model. The corresponding stability charts contain stability boundaries related to period doubling and Neimark-Sacker bifurcations. The subcriticality of both types of bifurcations is proved in this paper. Further, global period-2 orbits are found and analyzed. In connection with these orbits, the existence of chaotic motion is demonstrated for realistic high-speed milling parameters. PMID:15568921

  8. High growth speed of gallium nitride using ENABLE-MBE

    NASA Astrophysics Data System (ADS)

    Williams, J. J.; Fischer, A. M.; Williamson, T. L.; Gangam, S.; Faleev, N. N.; Hoffbauer, M. A.; Honsberg, C. B.

    2015-09-01

    Films of gallium nitride were grown at varying growth speeds, while all other major variables were held constant. Films grown determine the material impact of the high flux capabilities of the unique nitrogen plasma source ENABLE. Growth rates ranged from 13 to near 60 nm/min. X-ray ω scans of GaN (0002) have FWHM in all samples less than 300 arc sec. Cathodoluminescence shows radiative recombination for all samples at the band edge. In general material quality overall is high with slight degradation as growth speeds increase to higher rates.

  9. Multiply-agile encryption in high speed communication networks

    SciTech Connect

    Pierson, L.G.; Witzke, E.L.

    1997-05-01

    Different applications have different security requirements for data privacy, data integrity, and authentication. Encryption is one technique that addresses these requirements. Encryption hardware, designed for use in high-speed communications networks, can satisfy a wide variety of security requirements if that hardware is key-agile, robustness-agile and algorithm-agile. Hence, multiply-agile encryption provides enhanced solutions to the secrecy, interoperability and quality of service issues in high-speed networks. This paper defines these three types of agile encryption. Next, implementation issues are discussed. While single-algorithm, key-agile encryptors exist, robustness-agile and algorithm-agile encryptors are still research topics.

  10. Magneto-optical system for high speed real time imaging.

    PubMed

    Baziljevich, M; Barness, D; Sinvani, M; Perel, E; Shaulov, A; Yeshurun, Y

    2012-08-01

    A new magneto-optical system has been developed to expand the range of high speed real time magneto-optical imaging. A special source for the external magnetic field has also been designed, using a pump solenoid to rapidly excite the field coil. Together with careful modifications of the cryostat, to reduce eddy currents, ramping rates reaching 3000 T/s have been achieved. Using a powerful laser as the light source, a custom designed optical assembly, and a high speed digital camera, real time imaging rates up to 30 000 frames per seconds have been demonstrated. PMID:22938303

  11. Development of magnetically levitated high speed transport system in Japan

    SciTech Connect

    Sawada, Kazuo

    1996-07-01

    In Japan, huge passenger traffic moves through the Tokyo-Osaka corridor and the demand is mounting on one more high speed line besides the Tokaido Shinkansen. A magnetically levitated vehicle (JR Maglev) using superconducting magnets has been developed for the Tokyo-Osaka superspeed express. JR Maglev has many advantages over conventional rail systems. This paper describes the necessity of one more high speed line in this corridor, the reason the author chose Maglev, the scheme of this system, history of the development and outline of the new Yamanashi test line project.

  12. Proceedings: High-speed rail and maglev workshop

    SciTech Connect

    Not Available

    1993-04-01

    On October 30 and 31, 1991, the EPRI Public and Advanced Transportation Program sponsored a workshop on high-speed rail (HSR) and maglev. The purpose of this workshop was to provide utility managers with increased knowledge about these technologies, public policy regarding them, and their potential costs and benefits to utilities, including induced economic development. With this information, utilities should be better prepared to make decisions related to the development of these high speed intercity passenger options in their service areas. A main goal, achieved by the workshop, was to provide EPRI and its member utilities with ideas and information for developing an assessment and research agenda on these technologies.

  13. High-speed modulation of vertical cavity surface emitting lasers

    SciTech Connect

    Hietala, V.M.; Armendariz, M.G.; Choquette, K.D.; Lear, K.L.

    1998-03-01

    This report summarizes work on the development of high-speed vertical cavity surface emitting lasers (VCSELs) for multi-gigabit per second optical data communications applications (LDRD case number 3506.010). The program resulted in VCSELs that operate with an electrical bandwidth of 20 GHz along with a simultaneous conversion efficiency (DC to light) of about 20%. To achieve the large electrical bandwidth, conventional VCSELs were appropriately modified to reduce electrical parasitics and adapted for microwave probing for high-speed operation.

  14. Ethylene Trace-gas Techniques for High-speed Flows

    NASA Technical Reports Server (NTRS)

    Davis, David O.; Reichert, Bruce A.

    1994-01-01

    Three applications of the ethylene trace-gas technique to high-speed flows are described: flow-field tracking, air-to-air mixing, and bleed mass-flow measurement. The technique involves injecting a non-reacting gas (ethylene) into the flow field and measuring the concentration distribution in a downstream plane. From the distributions, information about flow development, mixing, and mass-flow rates can be dtermined. The trace-gas apparatus and special considerations for use in high-speed flow are discussed. A description of each application, including uncertainty estimates is followed by a demonstrative example.

  15. Design of high speed proprotors using multiobjective optimization techniques

    NASA Technical Reports Server (NTRS)

    Mccarthy, Thomas R.; Chattopadhyay, Aditi

    1992-01-01

    An integrated, multiobjective optimization procedure is developed for the design of high speed proprotors with the coupling of aerodynamic, dynamic, aeroelastic, and structural criteria. The objectives are to maximize propulsive efficiency in high speed cruise and rotor figure of merit in hover. Constraints are imposed on rotor blade aeroelastic stability in cruise and on total blade weight. Two different multiobjective formulation procedures, the Min summation of beta and the K-S function approaches are used to formulate the two-objective optimization problems.

  16. Introduction of the M-85 high-speed rotorcraft concept

    NASA Technical Reports Server (NTRS)

    Stroub, Robert H.

    1991-01-01

    As a result of studying possible requirements for high-speed rotorcraft and studying many high-speed concepts, a new high-speed rotorcraft concept, designated as M-85, was derived. The M-85 is a helicopter that is reconfigured to a fixed-wing aircraft for high-speed cruise. The concept was derived as an approach to enable smooth, stable conversion between fixed-wing and rotary-wing while retaining hover and low-speed flight characteristics of a low disk loading helicopter. The name, M-85, reflects the high-speed goals of 0.85 Mach number at high altitude. For a high-speed rotorcraft, it is expected that a viable concept must be a cruise-efficient, fixed-wing aircraft so it may be attractive for a multiplicity of missions. It is also expected that a viable high-speed rotorcraft concept must be cruise efficient first and secondly, efficient in hover. What makes the M-85 unique is the large circular hub fairing that is large enough to support the aircraft during conversion between rotary-wind and fixed-wing modes. With the aircraft supported by this hub fairing, the rotor blades can be unloaded during the 100 percent change in rotor rpm. With the blades unloaded, the potential for vibratory loads would be lessened. In cruise, the large circular hub fairing would be part of the lifting system with additional lifting panels deployed for better cruise efficiency. In hover, the circular hub fairing would slightly reduce lift potential and/or decrease hover efficiency of the rotor system. The M-85 concept is described and estimated forward flight performance characteristics are presented in terms of thrust requirements and L/D with airspeed. The forward flight performance characteristics reflect recent completed wind tunnel tests of the wing concept. Also presented is a control system technique that is critical to achieving low oscillatory loads in rotary-wing mode. Hover characteristics, C(sub p) versus C(sub T) from test data, is discussed. Other techniques pertinent to

  17. High performance CMOS image sensor for digitally fused day/night vision systems

    NASA Astrophysics Data System (ADS)

    Fowler, Boyd; Vu, Paul; Liu, Chiao; Mims, Steve; Do, Hung; Li, Wang; Appelbaum, Jeff

    2010-04-01

    We present the performance of a CMOS image sensor optimized for next generation fused day/night vision systems. The device features 5T pixels with pinned photodiodes on a 6.5μm pitch with integrated micro-lens. The 5T pixel architecture enables both correlated double sampling (CDS) to reduce noise for night time operation, and a lateral antiblooming drain for day time operation. The measured peak quantum efficiency of the sensor is above 55% at 600nm, and the median read noise is less than 1e- RMS at room temperature. The sensor features dual gain 11-bit data output ports and supports 30 fps and 60 fps. The full well capacity is greater than 30ke-, the dark current is less than 3.8pA/cm2 at 20ºC, and the MTF at 77 lp/mm is 0.4 at 550nm. The sensor also achieves an intra-scene linear dynamic range of greater than 90dB (30000:1) for night time operation, and an inter-scene linear dynamic range of greater than 150dB for complete day/night operability.

  18. Highly-Integrated CMOS Interface Circuits for SiPM-Based PET Imaging Systems.

    PubMed

    Dey, Samrat; Lewellen, Thomas K; Miyaoka, Robert S; Rudell, Jacques C

    2012-01-01

    Recent developments in the area of Positron Emission Tomography (PET) detectors using Silicon Photomultipliers (SiPMs) have demonstrated the feasibility of higher resolution PET scanners due to a significant reduction in the detector form factor. The increased detector density requires a proportionally larger number of channels to interface the SiPM array with the backend digital signal processing necessary for eventual image reconstruction. This work presents a CMOS ASIC design for signal reducing readout electronics in support of an 8×8 silicon photomultiplier array. The row/column/diagonal summation circuit significantly reduces the number of required channels, reducing the cost of subsequent digitizing electronics. Current amplifiers are used with a single input from each SiPM cathode. This approach helps to reduce the detector loading, while generating all the necessary row, column and diagonal addressing information. In addition, the single current amplifier used in our Pulse-Positioning architecture facilitates the extraction of pulse timing information. Other components under design at present include a current-mode comparator which enables threshold detection for dark noise current reduction, a transimpedance amplifier and a variable output impedance I/O driver which adapts to a wide range of loading conditions between the ASIC and lines with the off-chip Analog-to-Digital Converters (ADCs). PMID:24301987

  19. A low power CMOS VCO using inductive-biasing with high performance FoM

    NASA Astrophysics Data System (ADS)

    Weihao, Liu; Lu, Huang

    2016-04-01

    A novel voltage-controlled oscillator (VCO) topology with low voltage and low power is presented. It employed the inductive-biasing to build a feedback path between the tank and the MOS gate to enhance the voltage gain from output nodes of the tank to the gate node of the cross-coupled transistor. Theoretical analysis using time-varying phase noise theory derives closed-form symbolic formulas for the 1/f 2 phase noise region, showing that this feedback path could improve the phase noise performance. The proposed VCO is fabricated in TSMC 0.13 μm CMOS technology. Working under a 0.3 V supply voltage with 1.2 mW power consumption, the measured phase noise of the VCO is ‑119.4 dBc/Hz at 1 MHz offset frequency from the carrier of 4.92 GHz, resulting in an FoM of 192.5 dBc/Hz. Project supported by the National Science and Technology Major Project of China (No. 2011ZX03004-002-01).

  20. Research and design of high speed mass image storage system

    NASA Astrophysics Data System (ADS)

    Li, Yu-feng; Xue, Rong-kun; Liang, Fei

    2009-07-01

    The design of the high mass image storage system is introduced using DSP, FPGA and Flash structure. Texas Instruments Corporation DSP chip (TMS320VC5509APEG) is used as the main controller, Samsung's Flash chips (K9F2G08U0M) used as the main storage medium, and the Xilinx Corporation FPGA chip (XCV600E) used as logic control modules. In this system, Storage module consists of 32 Flash memory chips, which are divided into 8 groups that correspond to 8-level pipeline. The 4-Flash memory chip forms a basic 32-bit memory module. The entire system storage space is 64 G bit. Through simulation and verification, the storage speed is up to 352Mbps and readout speed is up to 290Mbps, it can meet the demand to the high-speed access, and which has strong environmental adaptability.