Process Research on Polycrystalline Silicon Material (PROPSM)

NASA Technical Reports Server (NTRS)

Culik, J. S.

1982-01-01

The investigation of the performance limiting mechanisms in large grain (greater than 1-2 mm in diameter) polycrystalline silicon was continued by fabricating a set of minicell wafers on a selection of 10 cm x 10 cm wafers. A minicell wafer consists of an array of small (approximately 0.2 sq cm in area) photodiodes which are isolated from one another by a mesa structure. The junction capacitance of each minicell was used to obtain the dopant concentration, and therefore the resistivity, as a function of position across each wafer. The results indicate that there is no significant variation in resistivity with position for any of the polycrystalline wafers, whether Semix or Wacker. However, the resistivity of Semix brick 71-01E did decrease slightly from bottom to top.

Polycrystalline silicon sheets for solar cells by the spinning method

NASA Astrophysics Data System (ADS)

Maeda, Y.; Yokoyama, T.; Hide, I.

1984-03-01

A new method has been developed in which polycrystalline silicon sheets are formed directly from molten silicon on a spinning wheel. The sheet is 5 cm x 5 cm, 0.1-0.5 mm thick, and made at a rate of four sheets per 15 s; power conversion rate of a solar cell assembled with these silicon sheets is more than 10 percent.

The effects of intragrain defects on the local photoresponse of polycrystalline silicon solar cells

NASA Astrophysics Data System (ADS)

Inoue, N.; Wilmsen, C. W.; Jones, K. A.

1981-02-01

Intragrain defects in Wacker cast and Monsanto zone-refined polycrystalline silicon materials were investigated using the electron-beam-induced current (EBIC) technique. The EBIC response maps were compared with etch pit, local diffusion length and local photoresponse measurements. It was determined that the Wacker polycrystalline silicon has a much lower density of defects than does the Monsanto polycrystalline silicon and that most of the defects in the Wacker material are not active recombination sites. A correlation was found between the recombination site density, as determined by EBIC, and the local diffusion length. It is shown that a large density of intragrain recombination sites greatly reduces the minority carrier diffusion length and thus can significantly reduce the photoresponse of solar cells.

Tracking performance of a single-crystal and a polycrystalline diamond pixel-detector

DOE Office of Scientific and Technical Information (OSTI.GOV)

Menasce, D.; et al.

2013-06-01

We present a comparative characterization of the performance of a single-crystal and a polycrystalline diamond pixel-detector employing the standard CMS pixel readout chips. Measurements were carried out at the Fermilab Test Beam Facility, FTBF, using protons of momentum 120 GeV/c tracked by a high-resolution pixel telescope. Particular attention was directed to the study of the charge-collection, the charge-sharing among adjacent pixels and the achievable position resolution. The performance of the single-crystal detector was excellent and comparable to the best available silicon pixel-detectors. The measured average detection-efficiency was near unity, ε = 0.99860±0.00006, and the position-resolution for shared hits was aboutmore » 6 μm. On the other hand, the performance of the polycrystalline detector was hampered by its lower charge collection distance and the readout chip threshold. A new readout chip, capable of operating at much lower threshold (around 1 ke $-$), would be required to fully exploit the potential performance of the polycrystalline diamond pixel-detector.« less

Spherical silicon photonic microcavities: From amorphous to polycrystalline

NASA Astrophysics Data System (ADS)

Fenollosa, R.; Garín, M.; Meseguer, F.

2016-06-01

Shaping silicon as a spherical object is not an obvious task, especially when the object size is in the micrometer range. This has the important consequence of transforming bare silicon material in a microcavity, so it is able to confine light efficiently. Here, we have explored the inside volume of such microcavities, both in their amorphous and in their polycrystalline versions. The synthesis method, which is based on chemical vapor deposition, causes amorphous microspheres to have a high content of hydrogen that produces an onionlike distributed porous core when the microspheres are crystallized by a fast annealing regime. This substantially influences the resonant modes. However, a slow crystallization regime does not yield pores, and produces higher-quality-factor resonances that could be fitted to the Mie theory. This allows the establishment of a procedure for obtaining size calibration standards with relative errors of the order of 0.1%.

Hydrogen passivation of polycrystalline silicon thin films

NASA Astrophysics Data System (ADS)

Scheller, L.-P.; Weizman, M.; Simon, P.; Fehr, M.; Nickel, N. H.

2012-09-01

The influence of post-hydrogenation on the electrical and optical properties of solid phase crystallized polycrystalline silicon (poly-Si) was examined. The passivation of grain-boundary defects was measured as a function of the passivation time. The silicon dangling-bond concentration decreases with increasing passivation time due to the formation of Si-H complexes. In addition, large H-stabilized platelet-like clusters are generated. The influence of H on the electrical properties was investigated using temperature dependent conductivity and Hall-effect measurements. For poly-Si on Corning glass, the dark conductivity decreases upon hydrogenation, while it increases when the samples are fabricated on silicon-nitride covered Borofloat glass. Hall-effect measurements reveal that for poly-Si on Corning glass the hole concentration and the mobility decrease upon post-hydrogenation, while a pronounced increase is observed for poly-Si on silicon-nitride covered Borofloat glass. This indicates the formation of localized states in the band gap, which is supported by sub band-gap absorption measurments. The results are discussed in terms of hydrogen-induced defect passivation and generation mechanisms.

Polycrystalline Silicon: a Biocompatibility Assay

NASA Astrophysics Data System (ADS)

Pecheva, E.; Laquerriere, P.; Bouthors, Sylvie; Fingarova, D.; Pramatarova, L.; Hikov, T.; Dimova-Malinovska, D.; Montgomery, P.

2010-01-01

Polycrystalline silicon (poly-Si) layers were functionalized through the growth of biomimetic hydroxyapatite (HA) on their surface. HA is the mineral component of bones and teeth and thus possesses excellent bioactivity and biocompatibility. MG-63 osteoblast-like cells were cultured on both HA-coated and un-coated poly-Si surfaces for 1, 3, 5 and 7 days and toxicity, proliferation and cell morphology were investigated. The results revealed that the poly-Si layers were bioactive and compatible with the osteoblast-like cells. Nevertheless, the HA coating improved the cell interactions with the poly-Si surfaces based on the cell affinity to the specific chemical composition of the bone-like HA and/or to the higher HA roughness.

Polycrystalline silicon availability for photovoltaic and semiconductor industries

NASA Technical Reports Server (NTRS)

Ferber, R. R.; Costogue, E. N.; Pellin, R.

1982-01-01

Markets, applications, and production techniques for Siemens process-produced polycrystalline silicon are surveyed. It is noted that as of 1982 a total of six Si materials suppliers were servicing a worldwide total of over 1000 manufacturers of Si-based devices. Besides solar cells, the Si wafers are employed for thyristors, rectifiers, bipolar power transistors, and discrete components for control systems. An estimated 3890 metric tons of semiconductor-grade polycrystalline Si will be used in 1982, and 6200 metric tons by 1985. Although the amount is expected to nearly triple between 1982-89, research is being carried out on the formation of thin films and ribbons for solar cells, thereby eliminating the waste produced in slicing Czolchralski-grown crystals. The free-world Si production in 1982 is estimated to be 3050 metric tons. Various new technologies for the formation of polycrystalline Si at lower costs and with less waste are considered. New entries into the industrial Si formation field are projected to produce a 2000 metric ton excess by 1988.

Polycrystalline indium phosphide on silicon by indium assisted growth in hydride vapor phase epitaxy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Metaferia, Wondwosen; Sun, Yan-Ting, E-mail: yasun@kth.se; Lourdudoss, Sebastian

2014-07-21

Polycrystalline InP was grown on Si(001) and Si(111) substrates by using indium (In) metal as a starting material in hydride vapor phase epitaxy (HVPE) reactor. In metal was deposited on silicon substrates by thermal evaporation technique. The deposited In resulted in islands of different size and was found to be polycrystalline in nature. Different growth experiments of growing InP were performed, and the growth mechanism was investigated. Atomic force microscopy and scanning electron microscopy for morphological investigation, Scanning Auger microscopy for surface and compositional analyses, powder X-ray diffraction for crystallinity, and micro photoluminescence for optical quality assessment were conducted. Itmore » is shown that the growth starts first by phosphidisation of the In islands to InP followed by subsequent selective deposition of InP in HVPE regardless of the Si substrate orientation. Polycrystalline InP of large grain size is achieved and the growth rate as high as 21 μm/h is obtained on both substrates. Sulfur doping of the polycrystalline InP was investigated by growing alternating layers of sulfur doped and unintentionally doped InP for equal interval of time. These layers could be delineated by stain etching showing that enough amount of sulfur can be incorporated. Grains of large lateral dimension up to 3 μm polycrystalline InP on Si with good morphological and optical quality is obtained. The process is generic and it can also be applied for the growth of other polycrystalline III–V semiconductor layers on low cost and flexible substrates for solar cell applications.« less

Advanced Micro-Polycrystalline Silicon Films Formed by Blue-Multi-Laser-Diode Annealing

NASA Astrophysics Data System (ADS)

Noguchi, Takashi; Chen, Yi; Miyahira, Tomoyuki; de Dieu Mugiraneza, Jean; Ogino, Yoshiaki; Iida, Yasuhiro; Sahota, Eiji; Terao, Motoyasu

2010-03-01

Semiconductor blue-multi-laser-diode annealing (BLDA) for amorphous Si film was performed to obtain a film containing uniform polycrystalline silicon (poly-Si) grains as a low temperature poly-Si (LTPS) process used for thin-film transistor (TFT). By adopting continuous wave (CW) mode at the 445 nm wavelength of the BLDA system, the light beam is efficiently absorbed into the thin amorphous silicon film of 50 nm thickness and can be crystallized stably. By adjusting simply the laser power below 6 W with controlled beam shape, the isotropic Si grains from uniform micro-grains to arbitral grain size of polycrystalline phase can be obtained with reproducible by fixing the scan speed at 500 mm/s. As a result of analysis using electron microscopy and atomic force microscopy (AFM), uniform distributed micro-poly-Si grains of smooth surface were observed at a power condition below 5 W and the preferred crystal orientation of (111) face was confirmed. As arbitral grain size can be obtained stably and reproducibly merely by controlling the laser power, BLDA is promising as a next-generation LTPS process for AM OLED panel including a system on glass (SoG).

The effect of heat treatment on the resistivity of polycrystalline silicon films

NASA Technical Reports Server (NTRS)

Fripp, A. L., Jr.

1975-01-01

The resistivity of doped polycrystalline silicon films has been studied as a function of post deposition heat treatments in an oxidizing atmosphere. It was found that a short oxidation cycle may produce a resistivity increase as large as three orders of magnitude in the polycrystalline films. The extent of change was dependent on the initial resistivity and the films' doping level and was independent of the total oxidation time.

Hot-Carrier Immunity of Polycrystalline Silicon Thin Film Transistors Using Silicon Oxynitride Gate Dielectric Formed with Plasma-Enhanced Chemical Vapor Deposition

NASA Astrophysics Data System (ADS)

Kunii, Masafumi

2009-11-01

An analysis is presented of the hot-carrier degradation in a polycrystalline silicon (poly-Si) thin film transistor (TFT) with a silicon oxynitride gate dielectric formed with plasma-enhanced chemical vapor deposition. An introduction of silicon oxynitride into a gate dielectric significantly improves hot-carrier immunity even under the severe stressing mode of drain avalanche hot carriers. To compensate the initial negative shift of threshold voltage for TFTs with a silicon oxynitride gate dielectric, high-pressure water vapor annealing (HWA) is applied. A comparison of TFTs with and without HWA reveals that the improvement in hot-carrier immunity is mainly attributed to the introduction of Si≡N bonds into a gate dielectric.

Effect of Grain Boundaries on the Performance of Thin-Film-Based Polycrystalline Silicon Solar Cells: A Numerical Modeling

NASA Astrophysics Data System (ADS)

Chhetri, Nikita; Chatterjee, Somenath

2018-01-01

Solar cells/photovoltaic, a renewable energy source, is appraised to be the most effective alternative to the conventional electrical energy generator. A cost-effective alternative of crystalline wafer-based solar cell is thin-film polycrystalline-based solar cell. This paper reports the numerical analysis of dependency of the solar cell parameters (i.e., efficiency, fill factor, open-circuit voltage and short-circuit current density) on grain size for thin-film-based polycrystalline silicon (Si) solar cells. A minority carrier lifetime model is proposed to do a correlation between the grains, grain boundaries and lifetime for thin-film-based polycrystalline Si solar cells in MATLAB environment. As observed, the increment in the grain size diameter results in increase in minority carrier lifetime in polycrystalline Si thin film. A non-equivalent series resistance double-diode model is used to find the dark as well as light (AM1.5) current-voltage (I-V) characteristics for thin-film-based polycrystalline Si solar cells. To optimize the effectiveness of the proposed model, a successive approximation method is used and the corresponding fitting parameters are obtained. The model is validated with the experimentally obtained results reported elsewhere. The experimentally reported solar cell parameters can be found using the proposed model described here.

Very high-cycle fatigue failure in micron-scale polycrystalline silicon films: Effects of environment and surface oxide thickness

NASA Astrophysics Data System (ADS)

Alsem, D. H.; Timmerman, R.; Boyce, B. L.; Stach, E. A.; De Hosson, J. Th. M.; Ritchie, R. O.

2007-01-01

Fatigue failure in micron-scale polycrystalline silicon structural films, a phenomenon that is not observed in bulk silicon, can severely impact the durability and reliability of microelectromechanical system devices. Despite several studies on the very high-cycle fatigue behavior of these films (up to 1012cycles), there is still an on-going debate on the precise mechanisms involved. We show here that for devices fabricated in the multiuser microelectromechanical system process (MUMPs) foundry and Sandia Ultra-planar, Multi-level MEMS Technology (SUMMiT V™) process and tested under equi-tension/compression loading at ˜40kHz in different environments, stress-lifetime data exhibit similar trends in fatigue behavior in ambient room air, shorter lifetimes in higher relative humidity environments, and no fatigue failure at all in high vacuum. The transmission electron microscopy of the surface oxides in the test samples shows a four- to sixfold thickening of the surface oxide at stress concentrations after fatigue failure, but no thickening after overload fracture in air or after fatigue cycling in vacuo. We find that such oxide thickening and premature fatigue failure (in air) occur in devices with initial oxide thicknesses of ˜4nm (SUMMiT V™) as well as in devices with much thicker initial oxides ˜20nm (MUMPs). Such results are interpreted and explained by a reaction-layer fatigue mechanism. Specifically, moisture-assisted subcritical cracking within a cyclic stress-assisted thickened oxide layer occurs until the crack reaches a critical size to cause catastrophic failure of the entire device. The entirety of the evidence presented here strongly indicates that the reaction-layer fatigue mechanism is the governing mechanism for fatigue failure in micron-scale polycrystalline silicon thin films.

The effect of grain boundaries on the resistivity of polycrystalline silicon. Ph.D. Thesis - Va. Univ.

NASA Technical Reports Server (NTRS)

Fripp, A. L., Jr.

1974-01-01

The electrical resistivity of polycrystalline silicon films was investigated. The films were grown by the chemical vapor decomposition of silane on oxidized silicon wafers. The resistivity was found to be independent of dopant atom concentration in the lightly doped regions but was a strong function of dopant levels in the more heavily doped regions. A model, based on high dopant atom segregation in the grain boundaries, is proposed to explain the results.

Effect of nickel silicide gettering on metal-induced crystallized polycrystalline-silicon thin-film transistors

NASA Astrophysics Data System (ADS)

Kim, Hyung Yoon; Seok, Ki Hwan; Chae, Hee Jae; Lee, Sol Kyu; Lee, Yong Hee; Joo, Seung Ki

2017-06-01

Low-temperature polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) fabricated via metal-induced crystallization (MIC) are attractive candidates for use in active-matrix flat-panel displays. However, these exhibit a large leakage current due to the nickel silicide being trapped at the grain boundaries of the poly-Si. We reduced the leakage current of the MIC poly-Si TFTs by developing a gettering method to remove the Ni impurities using a Si getter layer and natively-formed SiO2 as the etch stop interlayer. The Ni trap state density (Nt) in the MIC poly-Si film decreased after the Ni silicide gettering, and as a result, the leakage current of the MIC poly-Si TFTs decreased. Furthermore, the leakage current of MIC poly-Si TFTs gradually decreased with additional gettering. To explain the gettering effect on MIC poly-Si TFTs, we suggest an appropriate model. He received the B.S. degree in School of Advanced Materials Engineering from Kookmin University, Seoul, South Korea in 2012, and the M.S. degree in Department of Materials Science and Engineering from Seoul National University, Seoul, South Korea in 2014. He is currently pursuing the Ph.D. degree with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and top-gate polycrystalline-silicon thin-film transistors. He received the M.S. degree in innovation technology from Ecol Polytechnique, Palaiseau, France in 2013. He is currently pursuing the Ph.D. degree with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and bottom-gate polycrystalline-silicon thin-film transistors. He is currently pursuing the integrated M.S and Ph.D course with the Department of Materials Science and Engineering, Seoul National University, Seoul. He is involved in semiconductor device fabrication technology and copper

Microstructure and photovoltaic performance of polycrystalline silicon thin films on temperature-stable ZnO:Al layers

NASA Astrophysics Data System (ADS)

Becker, C.; Ruske, F.; Sontheimer, T.; Gorka, B.; Bloeck, U.; Gall, S.; Rech, B.

2009-10-01

Polycrystalline silicon (poly-Si) thin films have been prepared by electron-beam evaporation and thermal annealing for the development of thin-film solar cells on glass coated with ZnO:Al as a transparent, conductive layer. The poly-Si microstructure and photovoltaic performance were investigated as functions of the deposition temperature by Raman spectroscopy, scanning and transmission electron microscopies including defect analysis, x-ray diffraction, external quantum efficiency, and open circuit measurements. It is found that two temperature regimes can be distinguished: Poly-Si films fabricated by deposition at low temperatures (Tdep<400 °C) and a subsequent thermal solid phase crystallization step exhibit 1-3 μm large, randomly oriented grains, but a quite poor photovoltaic performance. However, silicon films deposited at higher temperatures (Tdep>400 °C) directly in crystalline phase reveal columnar, up to 300 nm big crystals with a strong ⟨110⟩ orientation and much better solar cell parameters. It can be concluded from the results that the electrical quality of the material, reflected by the open circuit voltage of the solar cell, only marginally depends on crystal size and shape but rather on the intragrain properties of the material. The carrier collection, described by the short circuit current of the cell, seems to be positively influenced by preferential ⟨110⟩ orientation of the grains. The correlation between experimental, microstructural, and photovoltaic parameters will be discussed in detail.

Polycrystalline silicon thin-film transistors on quartz fiber

NASA Astrophysics Data System (ADS)

Sugawara, Yuta; Uraoka, Yukiharu; Yano, Hiroshi; Hatayama, Tomoaki; Fuyuki, Takashi; Nakamura, Toshihiro; Toda, Sadayuki; Koaizawa, Hisashi; Mimura, Akio; Suzuki, Kenkichi

2007-11-01

We demonstrate the fabrication of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) on a thin quartz fiber for the first time. The poly-Si used in the active layer of the TFTs was prepared by excimer laser annealing of an amorphous Si thin film deposited on the fiber. Top-gated TFTs were fabricated on the fiber, and a field effect mobility of 10cm2/Vs was obtained. The proposed TFTs on a thin quartz fiber, named fiber TFTs, have potential application in microelectronic devices using TFTs fabricated on one-dimensional substrates.

High purity silane and silicon production

NASA Technical Reports Server (NTRS)

Breneman, William C. (Inventor)

1987-01-01

Silicon tetrachloride, hydrogen and metallurgical silicon are reacted at about 400.degree.-600.degree. C. and at pressures in excess of 100 psi, and specifically from about 300 up to about 600 psi to form di- and trichlorosilane that is subjected to disproportionation in the presence of an anion exchange resin to form high purity silane. By-product and unreacted materials are recycled, with metallurgical silicon and hydrogen being essentially the only consumed feed materials. The silane product may be further purified, as by means of activated carbon or cryogenic distillation, and decomposed in a fluid bed or free space reactor to form high purity polycrystalline silicon and by-product hydrogen which can be recycled for further use. The process results in simplified waste disposal operations and enhances the overall conversion of metallurgical grade silicon to silane and high purity silicon for solar cell and semiconductor silicon applications.

Silicon photonics for high-performance interconnection networks

NASA Astrophysics Data System (ADS)

Biberman, Aleksandr

2011-12-01

We assert in the course of this work that silicon photonics has the potential to be a key disruptive technology in computing and communication industries. The enduring pursuit of performance gains in computing, combined with stringent power constraints, has fostered the ever-growing computational parallelism associated with chip multiprocessors, memory systems, high-performance computing systems, and data centers. Sustaining these parallelism growths introduces unique challenges for on- and off-chip communications, shifting the focus toward novel and fundamentally different communication approaches. This work showcases that chip-scale photonic interconnection networks, enabled by high-performance silicon photonic devices, enable unprecedented bandwidth scalability with reduced power consumption. We demonstrate that the silicon photonic platforms have already produced all the high-performance photonic devices required to realize these types of networks. Through extensive empirical characterization in much of this work, we demonstrate such feasibility of waveguides, modulators, switches, and photodetectors. We also demonstrate systems that simultaneously combine many functionalities to achieve more complex building blocks. Furthermore, we leverage the unique properties of available silicon photonic materials to create novel silicon photonic devices, subsystems, network topologies, and architectures to enable unprecedented performance of these photonic interconnection networks and computing systems. We show that the advantages of photonic interconnection networks extend far beyond the chip, offering advanced communication environments for memory systems, high-performance computing systems, and data centers. Furthermore, we explore the immense potential of all-optical functionalities implemented using parametric processing in the silicon platform, demonstrating unique methods that have the ability to revolutionize computation and communication. Silicon photonics

Influence of the transition region between p- and n-type polycrystalline silicon passivating contacts on the performance of interdigitated back contact silicon solar cells

NASA Astrophysics Data System (ADS)

Reichel, Christian; Müller, Ralph; Feldmann, Frank; Richter, Armin; Hermle, Martin; Glunz, Stefan W.

2017-11-01

Passivating contacts based on thin tunneling oxides (SiOx) and n- and p-type semi-crystalline or polycrystalline silicon (poly-Si) enable high passivation quality and low contact resistivity, but the integration of these p+/n emitter and n+/n back surface field junctions into interdigitated back contact silicon solar cells poses a challenge due to high recombination at the transition region from p-type to n-type poly-Si. Here, the transition region was created in different configurations—(a) p+ and n+ poly-Si regions are in direct contact with each other ("pn-junction"), using a local overcompensation (counterdoping) as a self-aligning process, (b) undoped (intrinsic) poly-Si remains between the p+ and n+ poly-Si regions ("pin-junction"), and (c) etched trenches separate the p+ and n+ poly-Si regions ("trench")—in order to investigate the recombination characteristics and the reverse breakdown behavior of these solar cells. Illumination- and injection-dependent quasi-steady state photoluminescence (suns-PL) and open-circuit voltage (suns-Voc) measurements revealed that non-ideal recombination in the space charge regions with high local ideality factors as well as recombination in shunted regions strongly limited the performance of solar cells without a trench. In contrast, solar cells with a trench allowed for open-circuit voltage (Voc) of 720 mV, fill factor of 79.6%, short-circuit current (Jsc) of 41.3 mA/cm2, and a conversion efficiencies (η) of 23.7%, showing that a lowly conducting and highly passivating intermediate layer between the p+ and n+ poly-Si regions is mandatory. Independent of the configuration, no hysteresis was observed upon multiple stresses in reverse direction, indicating a controlled and homogeneously distributed breakdown, but with different breakdown characteristics.

Polycrystalline silicon ion sensitive field effect transistors

NASA Astrophysics Data System (ADS)

Yan, F.; Estrela, P.; Mo, Y.; Migliorato, P.; Maeda, H.; Inoue, S.; Shimoda, T.

2005-01-01

We report the operation of polycrystalline silicon ion sensitive field effect transistors. These devices can be fabricated on inexpensive disposable substrates such as glass or plastics and are, therefore, promising candidates for low cost single-use intelligent multisensors. In this work we have developed an extended gate structure with a Si3N4 sensing layer. Nearly ideal pH sensitivity (54mV /pH) and stable operation have been achieved. Temperature effects have been characterized. A penicillin sensor has been fabricated by functionalizing the sensing area with penicillinase. The sensitivity to penicillin G is about 10mV/mM, in solutions with concentration lower than the saturation value, which is about 7 mM.

Process for utilizing low-cost graphite substrates for polycrystalline solar cells

NASA Technical Reports Server (NTRS)

Chu, T. L. (Inventor)

1978-01-01

Low cost polycrystalline silicon solar cells supported on substrates were prepared by depositing successive layers of polycrystalline silicon containing appropriate dopants over supporting substrates of a member selected from the group consisting of metallurgical grade polycrystalline silicon, graphite and steel coated with a diffusion barrier of silica, borosilicate, phosphosilicate, or mixtures thereof such that p-n junction devices were formed which effectively convert solar energy to electrical energy. To improve the conversion efficiency of the polycrystalline silicon solar cells, the crystallite size in the silicon was substantially increased by melting and solidifying a base layer of polycrystalline silicon before depositing the layers which form the p-n junction.

Polycrystalline silicon thin-film transistors fabricated by Joule-heating-induced crystallization

NASA Astrophysics Data System (ADS)

Hong, Won-Eui; Ro, Jae-Sang

2015-01-01

Joule-heating-induced crystallization (JIC) of amorphous silicon (a-Si) films is carried out by applying an electric pulse to a conductive layer located beneath or above the films. Crystallization occurs across the whole substrate surface within few tens of microseconds. Arc instability, however, is observed during crystallization, and is attributed to dielectric breakdown in the conductor/insulator/transformed polycrystalline silicon (poly-Si) sandwich structures at high temperatures during electrical pulsing for crystallization. In this study, we devised a method for the crystallization of a-Si films while preventing arc generation; this method consisted of pre-patterning an a-Si active layer into islands and then depositing a gate oxide and gate electrode. Electric pulsing was then applied to the gate electrode formed using a Mo layer. The Mo layer was used as a Joule-heat source for the crystallization of pre-patterned active islands of a-Si films. JIC-processed poly-Si thin-film transistors (TFTs) were fabricated successfully, and the proposed method was found to be compatible with the standard processing of coplanar top-gate poly-Si TFTs.

Formation of polycrystalline-silicon films with hemispherical grains for capacitor structures with increased capacitance

DOE Office of Scientific and Technical Information (OSTI.GOV)

Novak, A. V., E-mail: novak-andrei@mail.ru

2014-12-15

The effect of formation conditions on the morphology of silicon films with hemispherical grains (HSG-Si) obtained by the method of low-pressure chemical vapor deposition (LPCVD) is investigated by atomic-force microscopy. The formation conditions for HSG-Si films with a large surface area are found. The obtained HSG-Si films make it possible to fabricate capacitor structures, the electric capacitance of which is twice as large in comparison to that of capacitors with “smooth” electrodes from polycrystalline silicon.

Fabrication of Large Lateral Polycrystalline Silicon Film by Laser Dehydrogenation and Lateral Crystallization of Hydrogenated Nanocrystalline Silicon Films

NASA Astrophysics Data System (ADS)

Sato, Tadashi; Yamamoto, Kenichi; Kambara, Junji; Kitahara, Kuninori; Hara, Akito

2009-12-01

Hydrogenated nanocrystalline silicon (nc-Si:H) thin-film transistors (TFTs) have attracted attention for application to the operation of organic light-emitting diodes (OLEDs). The monolithic integration of nc-Si:H TFTs and polycrystalline silicon (poly-Si) TFTs and the use of nc-Si:H TFTs for operating an OLED are candidate technologies to achieve OLED system-on-glass. To develop such a system, it is necessary to fabricate poly-Si films without employing thermal dehydrogenation because hydrogen needs to be maintained in the channel region of nc-Si:H TFTs. In this study, we optimized the laser dehydrogenation process as a substitute for thermal dehydrogenation by using a diode-pumped solid-state continuous-wave green laser (Nd:YVO4, 2ω=532 nm) to fabricate large lateral poly-Si films with grain sizes of 3×20 µm2. The performance of poly-Si TFTs is well known to be sensitive to the quality of poly-Si films. In order to evaluate the electrical properties of poly-Si films, TFTs were fabricated by conventional processes. The field-effect mobility, threshold voltage, and S-value of the poly-Si TFTs were 220 cm2 V-1 s-1, -1.0 V, and 0.45 V/dec, respectively. The quality of the poly-Si film fabricated in this experiment was sufficiently high for the integration of peripheral circuits.

TU-FG-209-03: Exploring the Maximum Count Rate Capabilities of Photon Counting Arrays Based On Polycrystalline Silicon

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liang, A K; Koniczek, M; Antonuk, L E

Purpose: Photon counting arrays (PCAs) offer several advantages over conventional, fluence-integrating x-ray imagers, such as improved contrast by means of energy windowing. For that reason, we are exploring the feasibility and performance of PCA pixel circuitry based on polycrystalline silicon. This material, unlike the crystalline silicon commonly used in photon counting detectors, lends itself toward the economic manufacture of radiation tolerant, monolithic large area (e.g., ∼43×43 cm2) devices. In this presentation, exploration of maximum count rate, a critical performance parameter for such devices, is reported. Methods: Count rate performance for a variety of pixel circuit designs was explored through detailedmore » circuit simulations over a wide range of parameters (including pixel pitch and operating conditions) with the additional goal of preserving good energy resolution. The count rate simulations assume input events corresponding to a 72 kVp x-ray spectrum with 20 mm Al filtration interacting with a CZT detector at various input flux rates. Output count rates are determined at various photon energy threshold levels, and the percentage of counts lost (e.g., due to deadtime or pile-up) is calculated from the ratio of output to input counts. The energy resolution simulations involve thermal and flicker noise originating from each circuit element in a design. Results: Circuit designs compatible with pixel pitches ranging from 250 to 1000 µm that allow count rates over a megacount per second per pixel appear feasible. Such rates are expected to be suitable for radiographic and fluoroscopic imaging. Results for the analog front-end circuitry of the pixels show that acceptable energy resolution can also be achieved. Conclusion: PCAs created using polycrystalline silicon have the potential to offer monolithic large-area detectors with count rate performance comparable to those of crystalline silicon detectors. Further improvement through detailed

Dimension dependent immunity of X-ray irradiation on low-temperature polycrystalline-silicon TFTs

NASA Astrophysics Data System (ADS)

Wei, Yin-Chang; Li, Yi-Chieh; Lee, I.-Che; Cheng, Huang-Chung

2017-06-01

Typically, each element in a large-area flat-panel X-ray image sensor consists of a photodetector and amorphous silicon (a-Si) thin-film transistor (TFT) switches. In order to reduce noise, increase sensor dynamic range, and increase carrying capacity, the low-temperature polycrystalline-silicon (LTPS) TFTs have been proposed as a candidate to replace the a-Si TFTs. However, there are concerns regarding the impact of X-ray radiation in LTPS-TFTs, and several studies have been conducted to inquire into the same. In this paper, we show that LTPS TFTs with small channel length (<2 µm) are almost immune to X-ray radiation.

In situ arsenic-doped polycrystalline silicon as a low thermal budget emitter contact for Si/Si1 - xGex heterojunction bipolar transistors

NASA Astrophysics Data System (ADS)

King, C. A.; Johnson, R. W.; Pinto, M. R.; Luftman, H. S.; Munanka, J.

1996-01-01

A low thermal budget emitter contact with low specific contact resistivity (ρc) with the absence of transient enhanced diffusion (TED) effects is essential to fabricate integratable high performance Si/SiGe heterojunction bipolar transistors (HBTs). We report the use of in situ As-doped polycrystalline silicon (polysilicon) from a low base pressure rapid thermal episystem for this purpose and find that it meets all the requirements. We used secondary ion mass spectrometry to find that 18 nm, heavily B-doped layers remain intact after implantation into the surface polysilicon and annealing at 800 °C for 40 s. Similar samples without the surface polylayer displayed extreme broadening of B profile. Kelvin crossbridge resistors together with 2D device simulations revealed that ρc is an extremely low value of 1.2×10-8 Ω cm2 in as-deposited material. Fabrication of simple 30×30 μm2 mesa isolated HBT devices showed IC to be more than two decades higher in devices with only an in situ As-doped polyemitter compared with devices that incorporated a surface implant into the single crystal portion of the emitter before polysilicon deposition. These results demonstrate that this doped polycrystalline silicon material is an excellent choice for emitter contacts to HBT devices.

Investigation of diffusion length distribution on polycrystalline silicon wafers via photoluminescence methods

PubMed Central

Lou, Shishu; Zhu, Huishi; Hu, Shaoxu; Zhao, Chunhua; Han, Peide

2015-01-01

Characterization of the diffusion length of solar cells in space has been widely studied using various methods, but few studies have focused on a fast, simple way to obtain the quantified diffusion length distribution on a silicon wafer. In this work, we present two different facile methods of doing this by fitting photoluminescence images taken in two different wavelength ranges or from different sides. These methods, which are based on measuring the ratio of two photoluminescence images, yield absolute values of the diffusion length and are less sensitive to the inhomogeneity of the incident laser beam. A theoretical simulation and experimental demonstration of this method are presented. The diffusion length distributions on a polycrystalline silicon wafer obtained by the two methods show good agreement. PMID:26364565

Polycrystalline silicon material availability and market pricing outlook study for 1980 to 88: January 1983 update

NASA Technical Reports Server (NTRS)

Costogue, E.; Pellin, R.

1983-01-01

Photovoltaic solar cell arrays which convert solar energy into electrical energy can become a cost effective, alternative energy source provided that an adequate supply of low priced materials and automated fabrication techniques are available. Presently, silicon is the most promising cell material for achieving the near term cost goals of the Photovoltaics Program. Electronic grade silicon is produced primarily for the semiconductor industry with the photovoltaic industry using, in most cases, the production rejects of slightly lower grade material. Therefore, the future availability of adequate supplies of low cost silicon is one of the major concerns of the Photovoltaic Program. The supply outlook for silicon with emphasis on pricing is updated and is based primarily on an industry survey conducted by a JPL consultant. This survey included interviews with polycrystalline silicon manufacturers, a large cross section of silicon users and silicon solar cell manufacturers.

Performance of In-Pixel Circuits for Photon Counting Arrays (PCAs) Based on Polycrystalline Silicon TFTs

PubMed Central

Liang, Albert K.; Koniczek, Martin; Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua; Street, Robert A.; Lu, Jeng Ping

2017-01-01

Photon counting arrays (PCAs), defined as pixelated imagers which measure the absorbed energy of x-ray photons individually and record this information digitally, are of increasing clinical interest. A number of PCA prototypes with a 1 mm pixel-to-pixel pitch have recently been fabricated with polycrystalline silicon (poly-Si) — a thin-film technology capable of creating monolithic imagers of a size commensurate with human anatomy. In this study, analog and digital simulation frameworks were developed to provide insight into the influence of individual poly-Si transistors on pixel circuit performance — information that is not readily available through empirical means. The simulation frameworks were used to characterize the circuit designs employed in the prototypes. The analog framework, which determines the noise produced by individual transistors, was used to estimate energy resolution, as well as to identify which transistors contribute the most noise. The digital framework, which analyzes how well circuits function in the presence of significant variations in transistor properties, was used to estimate how fast a circuit can produce an output (referred to as output count rate). In addition, an algorithm was developed and used to estimate the minimum pixel pitch that could be achieved for the pixel circuits of the current prototypes. The simulation frameworks predict that the analog component of the PCA prototypes could have energy resolution as low as 8.9% FWHM at 70 keV; and the digital components should work well even in the presence of significant TFT variations, with the fastest component having output count rates as high as 3 MHz. Finally, based on conceivable improvements in the underlying fabrication process, the algorithm predicts that the 1 mm pitch of the current PCA prototypes could be reduced significantly, potentially to between ~240 and 290 μm. PMID:26878107

Performance of in-pixel circuits for photon counting arrays (PCAs) based on polycrystalline silicon TFTs.

PubMed

Liang, Albert K; Koniczek, Martin; Antonuk, Larry E; El-Mohri, Youcef; Zhao, Qihua; Street, Robert A; Lu, Jeng Ping

2016-03-07

Photon counting arrays (PCAs), defined as pixelated imagers which measure the absorbed energy of x-ray photons individually and record this information digitally, are of increasing clinical interest. A number of PCA prototypes with a 1 mm pixel-to-pixel pitch have recently been fabricated with polycrystalline silicon (poly-Si)-a thin-film technology capable of creating monolithic imagers of a size commensurate with human anatomy. In this study, analog and digital simulation frameworks were developed to provide insight into the influence of individual poly-Si transistors on pixel circuit performance-information that is not readily available through empirical means. The simulation frameworks were used to characterize the circuit designs employed in the prototypes. The analog framework, which determines the noise produced by individual transistors, was used to estimate energy resolution, as well as to identify which transistors contribute the most noise. The digital framework, which analyzes how well circuits function in the presence of significant variations in transistor properties, was used to estimate how fast a circuit can produce an output (referred to as output count rate). In addition, an algorithm was developed and used to estimate the minimum pixel pitch that could be achieved for the pixel circuits of the current prototypes. The simulation frameworks predict that the analog component of the PCA prototypes could have energy resolution as low as 8.9% full width at half maximum (FWHM) at 70 keV; and the digital components should work well even in the presence of significant thin-film transistor (TFT) variations, with the fastest component having output count rates as high as 3 MHz. Finally, based on conceivable improvements in the underlying fabrication process, the algorithm predicts that the 1 mm pitch of the current PCA prototypes could be reduced significantly, potentially to between ~240 and 290 μm.

High-Columbic-Efficiency Lithium Battery Based on Silicon Particle Materials.

PubMed

Zhang, Junying; Zhang, Chunqian; Wu, Shouming; Zhang, Xu; Li, Chuanbo; Xue, Chunlai; Cheng, Buwen

2015-12-01

Micro-sized polycrystalline silicon particles were used as anode materials of lithium-ion battery. The columbic efficiency of the first cycle reached a relatively high value of 91.8 % after prelithiation and increased to 99 % in the second cycle. Furthermore, columbic efficiency remained above 99 % for up to 280+ cycles. The excellent performances of the batteries were the results of the use of a proper binder to protect the electrode from cracking and the application of a suitable conductive agent to provide an efficient conductive channel. The good performance was also significantly attributed to the electrolyte in the packaging process.

Fabricating micro-instruments in surface-micromachined polycrystalline silicon

DOE Office of Scientific and Technical Information (OSTI.GOV)

Comtois, J.H.; Michalicek, M.A.; Barron, C.C.

1997-04-01

Smaller, lighter instruments can be fabricated as Micro-Electro-Mechanical Systems (MEMS), having micron scale moving parts packaged together with associated control and measurement electronics. Batch fabrication of these devices will make economical applications such as condition-based machine maintenance and remote sensing. The choice of instrumentation is limited only by the designer`s imagination. This paper presents one genre of MEMS fabrication, surface-micromachined polycrystalline silicon (polysilicon). Two currently available but slightly different polysilicon processes are presented. One is the ARPA-sponsored ``Multi-User MEMS ProcesS`` (MUMPS), available commercially through MCNC; the other is the Sandia National Laboratories ``Sandia Ultra-planar Multilevel MEMS Technology`` (SUMMiT). Example componentsmore » created in both processes will be presented, with an emphasis on actuators, actuator force testing instruments, and incorporating actuators into larger instruments.« less

Silicon materials outlook study for 1980-1985 calendar years

NASA Technical Reports Server (NTRS)

Costogue, E.; Ferber, R.; Hasbach, W.; Pellin, R.; Yaws, C.

1979-01-01

The polycrystalline silicon industry was studied in relation to future market needs. Analysis of the data obtained indicates that there is a high probability of polycrystalline silicon shortage by the end of 1982 and a strong seller's market after 1981 which will foster price competition for available silicon.

Polycrystalline Silicon Thin-film Solar cells with Plasmonic-enhanced Light-trapping

PubMed Central

Varlamov, Sergey; Rao, Jing; Soderstrom, Thomas

2012-01-01

One of major approaches to cheaper solar cells is reducing the amount of semiconductor material used for their fabrication and making cells thinner. To compensate for lower light absorption such physically thin devices have to incorporate light-trapping which increases their optical thickness. Light scattering by textured surfaces is a common technique but it cannot be universally applied to all solar cell technologies. Some cells, for example those made of evaporated silicon, are planar as produced and they require an alternative light-trapping means suitable for planar devices. Metal nanoparticles formed on planar silicon cell surface and capable of light scattering due to surface plasmon resonance is an effective approach. The paper presents a fabrication procedure of evaporated polycrystalline silicon solar cells with plasmonic light-trapping and demonstrates how the cell quantum efficiency improves due to presence of metal nanoparticles. To fabricate the cells a film consisting of alternative boron and phosphorous doped silicon layers is deposited on glass substrate by electron beam evaporation. An Initially amorphous film is crystallised and electronic defects are mitigated by annealing and hydrogen passivation. Metal grid contacts are applied to the layers of opposite polarity to extract electricity generated by the cell. Typically, such a ~2 μm thick cell has a short-circuit current density (Jsc) of 14-16 mA/cm2, which can be increased up to 17-18 mA/cm2 (~25% higher) after application of a simple diffuse back reflector made of a white paint. To implement plasmonic light-trapping a silver nanoparticle array is formed on the metallised cell silicon surface. A precursor silver film is deposited on the cell by thermal evaporation and annealed at 23°C to form silver nanoparticles. Nanoparticle size and coverage, which affect plasmonic light-scattering, can be tuned for enhanced cell performance by varying the precursor film thickness and its annealing

Reliability and efficacy of organic passivation for polycrystalline silicon solar cells at room temperature

NASA Astrophysics Data System (ADS)

Shinde, Onkar S.; Funde, Adinath M.; Jadkar, Sandesh R.; Dusane, Rajiv O.; Dhere, Neelkanth G.; Ghaisas, Subhash V.

2016-09-01

Oleylamine is used as a passivating layer instead of commercial high temperature SiNx. Oleylamine coating applied on the n-type emitter side with p-type base polycrystalline silicon solar cells at room temperature using a simple spin coating method. It has been observed that there is 16% increase in efficiency after Oleylamine coating. Further, the solar cell was subjected to standard characterization namely current-voltage measurement for electrical parameters and Fourier transform infrared spectroscopy to understand the interaction of emitter surface and passivating Oleylamine. However, the passivation layer is not stable due to the reaction between Oleylamine and ambient air content such as humidity and carbon dioxide. This degradation can be prevented with suitable overcoating.

Fatigue and Fracture of Polycrystalline Silicon and Diamond MEMS at Room and Elevated Temperatures

DTIC Science & Technology

2006-12-01

amorphous diamond-like carbon (ta-C) and polycrystalline silicon ( polysilicon ) for microelectromechanical systems (MEMS). Polysilicon and ta-C test...toughness were obtained, many of them for the first time. Compared to polysilicon , ta-C was found to have superior mechanical properties: Its fracture...toughness and strength were 3.5 times and two times that of polysilicon , respectively. Its elastic modulus was 4.5 times that of polysilicon and its

Crystallization to polycrystalline silicon thin film and simultaneous inactivation of electrical defects by underwater laser annealing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Machida, Emi; Research Fellowships of the Japan Society for the Promotion of Science, Japan Society for the Promotion of Science, 1-8 Chiyoda, Tokyo 102-8472; Horita, Masahiro

2012-12-17

We propose a low-temperature laser annealing method of a underwater laser annealing (WLA) for polycrystalline silicon (poly-Si) films. We performed crystallization to poly-Si films by laser irradiation in flowing deionized-water where KrF excimer laser was used for annealing. We demonstrated that the maximum value of maximum grain size of WLA samples was 1.5 {mu}m, and that of the average grain size was 2.8 times larger than that of conventional laser annealing in air (LA) samples. Moreover, WLA forms poly-Si films which show lower conductivity and larger carrier life time attributed to fewer electrical defects as compared to LA poly-Si films.

Low temperature deposition of polycrystalline silicon thin films on a flexible polymer substrate by hot wire chemical vapor deposition

NASA Astrophysics Data System (ADS)

Lee, Sang-hoon; Jung, Jae-soo; Lee, Sung-soo; Lee, Sung-bo; Hwang, Nong-moon

2016-11-01

For the applications such as flexible displays and solar cells, the direct deposition of crystalline silicon films on a flexible polymer substrate has been a great issue. Here, we investigated the direct deposition of polycrystalline silicon films on a polyimide film at the substrate temperature of 200 °C. The low temperature deposition of crystalline silicon on a flexible substrate has been successfully made based on two ideas. One is that the Si-Cl-H system has a retrograde solubility of silicon in the gas phase near the substrate temperature. The other is the new concept of non-classical crystallization, where films grow by the building block of nanoparticles formed in the gas phase during hot-wire chemical vapor deposition (HWCVD). The total amount of precipitation of silicon nanoparticles decreased with increasing HCl concentration. By adding HCl, the amount and the size of silicon nanoparticles were reduced remarkably, which is related with the low temperature deposition of silicon films of highly crystalline fraction with a very thin amorphous incubation layer. The dark conductivity of the intrinsic film prepared at the flow rate ratio of RHCl=[HCl]/[SiH4]=3.61 was 1.84×10-6 Scm-1 at room temperature. The Hall mobility of the n-type silicon film prepared at RHCl=3.61 was 5.72 cm2 V-1s-1. These electrical properties of silicon films are high enough and could be used in flexible electric devices.

Charge retention characteristics of silicide-induced crystallized polycrystalline silicon floating gate thin-film transistors for active matrix organic light-emitting diode.

PubMed

Park, Jae Hyo; Son, Se Wan; Byun, Chang Woo; Kim, Hyung Yoon; Joo, So Na; Lee, Yong Woo; Yun, Seung Jae; Joo, Seung Ki

2013-10-01

In this work, non-volatile memory thin-film transistor (NVM-TFT) was fabricated by nickel silicide-induced laterally crystallized (SILC) polycrystalline silicon (poly-Si) as the active layer. The nickel seed silicide-induced crystallized (SIC) poly-Si was used as storage layer which is embedded in the gate insulator. The novel unit pixel of active matrix organic light-emitting diode (AMOLED) using NVM-TFT is proposed and investigated the electrical and optical performance. The threshold voltage shift showed 17.2 V and the high reliability of retention characteristic was demonstrated until 10 years. The retention time can modulate the recharge refresh time of the unit pixel of AMOLED up to 5000 sec.

Utilization of Tabula Rasa to Stabilize Bulk Lifetimes in n-Cz Silicon for High-Performance Solar Cell Processing

DOE Office of Scientific and Technical Information (OSTI.GOV)

LaSalvia, Vincenzo; Jensen, Mallory Ann; Youssef, Amanda

2016-11-21

We investigate a high temperature, high cooling-rate anneal Tabula Rasa (TR) and report its implications on n-type Czochralski-grown silicon (n-Cz Si) for photovoltaic fabrication. Tabula Rasa aims at dissolving and homogenizing oxygen precipitate nuclei that can grow during the cell process steps and degrade the cell performance due to their high internal gettering and recombination activity. The Tabula Rasa thermal treatment is performed in a clean tube furnace with cooling rates >100 degrees C/s. We characterize the bulk lifetime by Sinton lifetime and photoluminescence mapping just after Tabula Rasa, and after the subsequent cell processing. After TR, the bulk lifetimemore » surprisingly degrades to <; 0.1ms, only to recover to values equal or higher than the initial non-treated wafer (several ms), after typical high temperature cell process steps. Those include boron diffusion and oxidation; phosphorus diffusion/oxidation; ambient annealing at 850 degrees C; and crystallization annealing of tunneling-passivating contacts (doped polycrystalline silicon on 1.5 nm thermal oxide). The drastic lifetime improvement during high temperature cell processing is attributed to improved external gettering of metal impurities and annealing of intrinsic point defects. Time and injection dependent lifetime spectroscopy further reveals the mechanisms of lifetime improvement after Tabula Rasa treatment. Additionally, we report the efficacy of Tabula Rasa on n-type Cz-Si wafers and its dependence on oxygen concentration, correlated to position within the ingot.« less

Reduce on the Cost of Photovoltaic Power Generation for Polycrystalline Silicon Solar Cells by Double Printing of Ag/Cu Front Contact Layer

NASA Astrophysics Data System (ADS)

Peng, Zhuoyin; Liu, Zhou; Chen, Jianlin; Liao, Lida; Chen, Jian; Li, Cong; Li, Wei

2018-06-01

With the development of photovoltaic industry, the cost of photovoltaic power generation has become the significant issue. And the metallization process has decided the cost of original materials and photovoltaic efficiency of the solar cells. Nowadays, double printing process has been introduced instead of one-step printing process for front contact of polycrystalline silicon solar cells, which can effectively improve the photovoltaic conversion efficiency of silicon solar cells. Here, the relative cheap Cu paste has replaced the expensive Ag paste to form Ag/Cu composite front contact of silicon solar cells. The photovoltaic performance and the cost of photovoltaic power generation have been investigated. With the optimization on structure and height of Cu finger layer for Ag/Cu composite double-printed front contact, the silicon solar cells have exhibited a photovoltaic conversion efficiency of 18.41%, which has reduced 3.42 cent per Watt for the cost of photovoltaic power generation.

Process for forming retrograde profiles in silicon

DOEpatents

Weiner, K.H.; Sigmon, T.W.

1996-10-15

A process is disclosed for forming retrograde and oscillatory profiles in crystalline and polycrystalline silicon. The process consisting of introducing an n- or p-type dopant into the silicon, or using prior doped silicon, then exposing the silicon to multiple pulses of a high-intensity laser or other appropriate energy source that melts the silicon for short time duration. Depending on the number of laser pulses directed at the silicon, retrograde profiles with peak/surface dopant concentrations which vary are produced. The laser treatment can be performed in air or in vacuum, with the silicon at room temperature or heated to a selected temperature.

Planarized thick copper gate polycrystalline silicon thin film transistors for ultra-large AMOLED displays

NASA Astrophysics Data System (ADS)

Yun, Seung Jae; Lee, Yong Woo; Son, Se Wan; Byun, Chang Woo; Reddy, A. Mallikarjuna; Joo, Seung Ki

2012-08-01

A planarized thick copper (Cu) gate low temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) is fabricated for ultra-large active-matrix organic light-emitting diode (AMOLED) displays. We introduce a damascene and chemical mechanical polishing process to embed a planarized Cu gate of 500 nm thickness into a trench and Si3N4/SiO2 multilayer gate insulator, to prevent the Cu gate from diffusing into the silicon (Si) layer at 550°C, and metal-induced lateral crystallization (MILC) technology to crystallize the amorphous Si layer. A poly-Si TFT with planarized thick Cu gate exhibits a field effect mobility of 5 cm2/Vs and a threshold voltage of -9 V, and a subthreshold swing (S) of 1.4 V/dec.

Low temperature production of large-grain polycrystalline semiconductors

DOEpatents

Naseem, Hameed A [Fayetteville, AR; Albarghouti, Marwan [Loudonville, NY

2007-04-10

An oxide or nitride layer is provided on an amorphous semiconductor layer prior to performing metal-induced crystallization of the semiconductor layer. The oxide or nitride layer facilitates conversion of the amorphous material into large grain polycrystalline material. Hence, a native silicon dioxide layer provided on hydrogenated amorphous silicon (a-Si:H), followed by deposited Al permits induced crystallization at temperatures far below the solid phase crystallization temperature of a-Si. Solar cells and thin film transistors can be prepared using this method.

Silicon Carbide Diodes Performance Characterization at High Temperatures

NASA Technical Reports Server (NTRS)

Lebron-Velilla, Ramon C.; Schwarze, Gene E.; Gardner, Brent G.; Adams, Jerry

2004-01-01

NASA Glenn Research center's Electrical Systems Development branch is working to demonstrate and test the advantages of Silicon Carbide (SiC) devices in actual power electronics applications. The first step in this pursuit is to obtain commercially available SiC Schottky diodes and to individually test them under both static and dynamic conditions, and then compare them with current state of the art silicon Schottky and ultra fast p-n diodes of similar voltage and current ratings. This presentation covers the results of electrical tests performed at NASA Glenn. Steady state forward and reverse current-volt (I-V) curves were generated for each device to compare performance and to measure their forward voltage drop at rated current, as well as the reverse leakage current at rated voltage. In addition, the devices were individually connected as freewheeling diodes in a Buck (step down) DC to DC converter to test their reverse recovery characteristics and compare their transient performance in a typical converter application. Both static and transient characterization tests were performed at temperatures ranging from 25 C to 300 C, in order to test and demonstrate the advantages of SiC over Silicon at high temperatures.

Nanopores creation in boron and nitrogen doped polycrystalline graphene: A molecular dynamics study

NASA Astrophysics Data System (ADS)

Izadifar, Mohammadreza; Abadi, Rouzbeh; Nezhad Shirazi, Ali Hossein; Alajlan, Naif; Rabczuk, Timon

2018-05-01

In the present paper, molecular dynamic simulations have been conducted to investigate the nanopores creation on 10% of boron and nitrogen doped polycrystalline graphene by silicon and diamond nanoclusters. Two types of nanoclusters based on silicon and diamond are used to investigate their effect for the fabrication of nanopores. Therefore, three different diameter sizes of the clusters with five kinetic energies of 10, 50, 100, 300 and 500 eV/atom at four different locations in boron or nitrogen doped polycrystalline graphene nanosheets have been perused. We also study the effect of 3% and 6% of boron doped polycrystalline graphene with the best outcome from 10% of doping. Our results reveal that the diamond cluster with diameter of 2 and 2.5 nm fabricates the largest nanopore areas on boron and nitrogen doped polycrystalline graphene, respectively. Furthermore, the kinetic energies of 10 and 50 eV/atom can not fabricate nanopores in some cases for silicon and diamond clusters on boron doped polycrystalline graphene nanosheets. On the other hand, silicon and diamond clusters fabricate nanopores for all locations and all tested energies on nitrogen doped polycrystalline graphene. The area sizes of nanopores fabricated by silicon and diamond clusters with diameter of 2 and 2.5 nm are close to the actual area size of the related clusters for the kinetic energy of 300 eV/atom in all locations on boron doped polycrystalline graphene. The maximum area and the average maximum area of nanopores are fabricated by the kinetic energy of 500 eV/atom inside the grain boundary at the center of the nanosheet and in the corner of nanosheet with diameters of 2 and 3 nm for silicon and diamond clusters on boron and nitrogen doped polycrystalline graphene.

Effect of doping on the modification of polycrystalline silicon by spontaneous reduction of diazonium salts

NASA Astrophysics Data System (ADS)

Girard, A.; Coulon, N.; Cardinaud, C.; Mohammed-Brahim, T.; Geneste, F.

2014-09-01

The chemical modification of doped polycrystalline silicon materials (N+, N++ and P++) and silicon (1 0 0) and (1 1 1) used as references is investigated by spontaneous reduction of diazonium salts. The effectiveness of the grafting process on all polySi surfaces is shown by AFM and XPS analyses. The effect of substrate doping on the efficiency of the electrografting process is compared by using the thicknesses of the deposited organic films. For a better accuracy, two methods are used to estimate the thicknesses: XPS and the coupling of a O2 plasma etching with AFM measurement. Structural characteristics of the poly-Si films were investigated by Scanning Electron Microscopy and X-ray diffraction to find a correlation between the structure of the material and its reactivity. Different parameters that could have an impact on the efficiency of the grafting procedure are discussed. The observed differences between differently doped silicon surfaces is rather limited, this is in agreement with the radical character of the reacting species.

Enhanced Performance of Gate-First p-Channel Metal-Insulator-Semiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method

NASA Astrophysics Data System (ADS)

Kitano, Naomu; Horie, Shinya; Arimura, Hiroaki; Kawahara, Takaaki; Sakashita, Shinsuke; Nishida, Yukio; Yugami, Jiro; Minami, Takashi; Kosuda, Motomu; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2007-12-01

We demonstrated the use of an in situ metal/high-k fabrication method for improving the performance of metal-insulator-semiconductor field-effect transistors (MISFETs). Gate-first pMISFETs with polycrystalline silicon (poly-Si)/TiN/HfSiON stacks were fabricated by techniques based on low-damage physical vapor deposition, in which high-quality HfSiON dielectrics were formed by the interface reaction between an ultrathin metal-Hf layer (0.5 nm thick) and a SiO2 underlayer, and TiN electrodes were continuously deposited on the gate dielectrics without exposure to air. Gate-first pMISFETs with high carrier mobility and a low threshold voltage (Vth) were realized by reducing the carbon impurity in the gate stacks and improving the Vth stability against thermal treatment. As a result, we obtained superior current drivability (Ion = 350 μA/μm at Ioff = 200 pA/μm), which corresponds to a 13% improvement over that of conventional chemical vapor deposition-based metal/high-k devices.

Modeling and simulation of temperature effect in polycrystalline silicon PV cells

NASA Astrophysics Data System (ADS)

Marcu, M.; Niculescu, T.; Slusariuc, R. I.; Popescu, F. G.

2016-06-01

Due to the human needs of energy, there is a need to apply new technologies in energy conversion to supply the demand of clean and cheap energy in the context of environmental issues. Renewable energy sources like solar energy has one of the highest potentials. In this paper, solar panel is the key part of a photovoltaic system which converts solar energy to electrical energy. The purpose of this paper is to give a MATLAB/ Simulink simulation for photovoltaic module based on the one-diode model of a photovoltaic cell made of polycrystalline silicon. This model reveals the effect of the ambient temperature and the heating of the panel due to the solar infrared radiation. Also the measurements on the solar cell exposed to solar radiation can confirm the simulation.

Adjustable Lid Aids Silicon-Ribbon Growth

NASA Technical Reports Server (NTRS)

Mchugh, J. P.; Steidensticker, R. G.; Duncan, C. S.

1985-01-01

Closely-spaced crucible cover speeds up solidification. Growth rate of dendritic-web silicon ribbon from molten silicon increased by controlling distance between crucible susceptor lid and liquid/solid interface. Lid held in relatively high position when crucible newly filled with chunks of polycrystalline silicon. As silicon melts and forms pool of liquid at lower level, lid gradually lowered.

Fabrication and characterization of low temperature polycrystalline silicon thin film transistors

NASA Astrophysics Data System (ADS)

Krishnan, Anand Thiruvengadathan

2000-10-01

The proliferation of devices with built-in displays, such as personal digital assistants and cellular phones has created a demand for rugged light-weight displays. Polymeric substrates could be suited for these applications, and they offer the possibility of flexible displays also. However, driver circuitry needs to be integrated in the display if the cost is to be reduced. Low temperature (<350°C) polycrystalline silicon (poly-Si) thin film transistors, if developed, offer driver circuitry integration during pixel transistor fabrication on top of flexible substrates. This thesis addresses several issues related to the fabrication of thin film transistors at low temperatures on glass substrates. A high-density plasma (electron cyclotron resonance (ECR)) based approach was adopted for deposition of thin films. A process for deposition of n-type doped silicon (n-type doped Si) at T < 350°C and having resistivity <1 ohm/cm has been developed. Intrinsic poly-Si was deposited under different conditions of microwave power, RF bias and deposition times. The properties of n-type doped Si and intrinsic poly-Si were correlated with the structure and the deposition conditions. A novel TFT structure has been proposed and implemented in this work. This top gate TFT structure uses n-type doped Si and utilizes only two masks and one alignment step. There are no critical etch steps and good interface quality could be obtained even without post-processing hydrogenation as the poly-Si surface was not exposed to air before deposition of the gate dielectric. TFTs using this top gate structure were fabricated with no process step exceeding 340°C electrode temperature (surface temperature <300°C). These TFTs show ON/OFF ratios in excess of 105. Their sub-threshold swing is ˜0.5 V/decade and mobility is 1--10 cm2/V-s. Several TFTs were also fabricated using alternative dielectrics such as oxide deposited from tetramethyl silane in an RFPECVD chamber and silicon nitride deposited in

High performance broadband photodetector based on MoS2/porous silicon heterojunction

NASA Astrophysics Data System (ADS)

Dhyani, Veerendra; Dwivedi, Priyanka; Dhanekar, Saakshi; Das, Samaresh

2017-11-01

A high speed efficient broadband photodetector based on a vertical n-MoS2/p-porous silicon heterostructure has been demonstrated. Large area MoS2 on electrochemical etched porous silicon was grown by sulphurization of a sputtered MoO3 thin film. A maximum responsivity of 9 A/W (550-850 nm) with a very high detectivity of ˜1014 Jones is observed. Transient measurements show a fast response time of ˜9 μs and is competent to work at high frequencies (˜50 kHz). The enhanced photodetection performance of the heterojunction made on porous silicon over that made on planar silicon is explained in terms of higher interfacial barrier height, superior light trapping property, and larger junction area in the MoS2/porous silicon junction.

Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuits for Active Matrix Organic Light Emitting Diodes

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Yu-Sheng; Liu, Yan-Wei

A new pixel design and driving method for active matrix organic light emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage programming method are proposed and verified using the SPICE simulator. We had employed an appropriate TFT model in SPICE simulation to demonstrate the performance of the pixel circuit. The OLED anode voltage variation error rates are below 0.35% under driving TFT threshold voltage deviation (Δ Vth =± 0.33V). The OLED current non-uniformity caused by the OLED threshold voltage degradation (Δ VTO =+0.33V) is significantly reduced (below 6%). The simulation results show that the pixel design can improve the display image non-uniformity by compensating for the threshold voltage deviation in the driving TFT and the OLED threshold voltage degradation at the same time.

Polycrystalline silicon on tungsten substrates

NASA Technical Reports Server (NTRS)

Bevolo, A. J.; Schmidt, F. A.; Shanks, H. R.; Campisi, G. J.

1979-01-01

Thin films of electron-beam-vaporized silicon were deposited on fine-grained tungsten substrates under a pressure of about 1 x 10 to the -10th torr. Mass spectra from a quadrupole residual-gas analyzer were used to determine the partial pressure of 13 residual gases during each processing step. During separate silicon depositions, the atomically clean substrates were maintained at various temperatures between 400 and 780 C, and deposition rates were between 20 and 630 A min. Surface contamination and interdiffusion were monitored by in situ Auger electron spectrometry before and after cleaning, deposition, and annealing. Auger depth profiling, X-ray analysis, and SEM in the topographic and channeling modes were utilized to characterize the samples with respect to silicon-metal interface, interdiffusion, silicide formation, and grain size of silicon. The onset of silicide formation was found to occur at approximately 625 C. Above this temperature tungsten silicides were formed at a rate faster than the silicon deposition. Fine-grain silicon films were obtained at lower temperatures.

Buried oxide layer in silicon

DOEpatents

Sadana, Devendra Kumar; Holland, Orin Wayne

2001-01-01

A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

CdCl2 passivation of polycrystalline CdMgTe and CdZnTe absorbers for tandem photovoltaic cells

NASA Astrophysics Data System (ADS)

Swanson, Drew E.; Reich, Carey; Abbas, Ali; Shimpi, Tushar; Liu, Hanxiao; Ponce, Fernando A.; Walls, John M.; Zhang, Yong-Hang; Metzger, Wyatt K.; Sampath, W. S.; Holman, Zachary C.

2018-05-01

As single-junction silicon solar cells approach their theoretical limits, tandems provide the primary path to higher efficiencies. CdTe alloys can be tuned with magnesium (CdMgTe) or zinc (CdZnTe) for ideal tandem pairing with silicon. A II-VI/Si tandem holds the greatest promise for inexpensive, high-efficiency top cells that can be quickly deployed in the market using existing polycrystalline CdTe manufacturing lines combined with mature silicon production lines. Currently, all high efficiency polycrystalline CdTe cells require a chloride-based passivation process to passivate grain boundaries and bulk defects. This research examines the rich chemistry and physics that has historically limited performance when extending Cl treatments to polycrystalline 1.7-eV CdMgTe and CdZnTe absorbers. A combination of transmittance, quantum efficiency, photoluminescence, transmission electron microscopy, and energy-dispersive X-ray spectroscopy clearly reveals that during passivation, Mg segregates and out-diffuses, initially at the grain boundaries but eventually throughout the bulk. CdZnTe exhibits similar Zn segregation behavior; however, the onset and progression is localized to the back of the device. After passivation, CdMgTe and CdZnTe can render a layer that is reduced to predominantly CdTe electro-optical behavior. Contact instabilities caused by inter-diffusion between the layers create additional complications. The results outline critical issues and paths for these materials to be successfully implemented in Si-based tandems and other applications.

CdCl2 Passivation of Polycrystalline CdMgTe and CdZnTe Absorbers for Tandem Photovoltaic Cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Metzger, Wyatt K; Swanson, Drew; Reich, Carey

As single-junction silicon solar cells approach their theoretical limits, tandems provide the primary path to higher efficiencies. CdTe alloys can be tuned with magnesium (CdMgTe) or zinc (CdZnTe) for ideal tandem pairing with silicon. A II-VI/Si tandem holds the greatest promise for inexpensive, high-efficiency top cells that can be quickly deployed in the market using existing polycrystalline CdTe manufacturing lines combined with mature silicon production lines. Currently, all high efficiency polycrystalline CdTe cells require a chloride-based passivation process to passivate grain boundaries and bulk defects. This research examines the rich chemistry and physics that has historically limited performance when extendingmore » Cl treatments to polycrystalline 1.7-eV CdMgTe and CdZnTe absorbers. A combination of transmittance, quantum efficiency, photoluminescence, transmission electron microscopy, and energy-dispersive X-ray spectroscopy clearly reveals that during passivation, Mg segregates and out-diffuses, initially at the grain boundaries but eventually throughout the bulk. CdZnTe exhibits similar Zn segregation behavior; however, the onset and progression is localized to the back of the device. After passivation, CdMgTe and CdZnTe can render a layer that is reduced to predominantly CdTe electro-optical behavior. Contact instabilities caused by inter-diffusion between the layers create additional complications. The results outline critical issues and paths for these materials to be successfully implemented in Si-based tandems and other applications.« less

Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

NASA Technical Reports Server (NTRS)

Ikpe, Stanley A.; Lauenstein, Jean-Marie; Carr, Gregory A.; Hunter, Don; Ludwig, Lawrence L.; Wood, William; Del Castillo, Linda Y.; Fitzpatrick, Fred; Chen, Yuan

2016-01-01

Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

Effect of mechanical strain on mobility of polycrystalline silicon thin-film transistors fabricated on stainless steel foil

NASA Astrophysics Data System (ADS)

Kuo, Po-Chin; Jamshidi-Roudbari, Abbas; Hatalis, Miltiadis

2007-12-01

The effect of uniaxial tensile strain parallel to the channel on mobility of polycrystalline silicon thin-film transistors (TFTs) on stainless steel foil has been investigated. The electron mobility increases by 20% while the hole mobility decreases by 6% as the strain increases to 0.5%, and both followed by saturation as the strain increases further. The off current decreases for both types of TFTs under strain. All TFTs remained functional at the applied strain of 1.13%.

EPDM - Silicone blends - a high performance elastomeric composition for automotive applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mitchell, J.M.

1987-01-01

Styling and design changes have dramatically altered performance requirements for elastomers. High performance engines with electronic fuel injection have increased temperatures under the hood. Therefore, high performance elastomers are required to meet today's service conditions. New technology has been developed to compatibilize EPDM and silicone into high performance elastomeric compositions. These blends have physical, electrical and mechanical properties, for 175/sup 0/C service. Formulations are discussed for applications which require heat and weather resistance.

Exploration of maximum count rate capabilities for large-area photon counting arrays based on polycrystalline silicon thin-film transistors

NASA Astrophysics Data System (ADS)

Liang, Albert K.; Koniczek, Martin; Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua

2016-03-01

Pixelated photon counting detectors with energy discrimination capabilities are of increasing clinical interest for x-ray imaging. Such detectors, presently in clinical use for mammography and under development for breast tomosynthesis and spectral CT, usually employ in-pixel circuits based on crystalline silicon - a semiconductor material that is generally not well-suited for economic manufacture of large-area devices. One interesting alternative semiconductor is polycrystalline silicon (poly-Si), a thin-film technology capable of creating very large-area, monolithic devices. Similar to crystalline silicon, poly-Si allows implementation of the type of fast, complex, in-pixel circuitry required for photon counting - operating at processing speeds that are not possible with amorphous silicon (the material currently used for large-area, active matrix, flat-panel imagers). The pixel circuits of two-dimensional photon counting arrays are generally comprised of four stages: amplifier, comparator, clock generator and counter. The analog front-end (in particular, the amplifier) strongly influences performance and is therefore of interest to study. In this paper, the relationship between incident and output count rate of the analog front-end is explored under diagnostic imaging conditions for a promising poly-Si based design. The input to the amplifier is modeled in the time domain assuming a realistic input x-ray spectrum. Simulations of circuits based on poly-Si thin-film transistors are used to determine the resulting output count rate as a function of input count rate, energy discrimination threshold and operating conditions.

Polycrystalline silicon thin-film transistors with location-controlled crystal grains fabricated by excimer laser crystallization

NASA Astrophysics Data System (ADS)

Tsai, Chun-Chien; Lee, Yao-Jen; Chiang, Ko-Yu; Wang, Jyh-Liang; Lee, I.-Che; Chen, Hsu-Hsin; Wei, Kai-Fang; Chang, Ting-Kuo; Chen, Bo-Ting; Cheng, Huang-Chung

2007-11-01

In this paper, location-controlled silicon crystal grains are fabricated by the excimer laser crystallization method which employs amorphous silicon spacer structure and prepatterned thin films. The amorphous silicon spacer in nanometer-sized width formed using spacer technology is served as seed crystal to artificially control superlateral growth phenomenon during excimer laser irradiation. An array of 1.8-μm-sized disklike silicon grains is formed, and the n-channel thin-film transistors whose channels located inside the artificially-controlled crystal grains exhibit higher performance of field-effect-mobility reaching 308cm2/Vs as compared with the conventional ones. This position-manipulated silicon grains are essential to high-performance and good uniformity devices.

Tribological performance of polycrystalline tantalum-carbide-incorporated diamond films on silicon substrates

NASA Astrophysics Data System (ADS)

Ullah, Mahtab; Rana, Anwar Manzoor; Ahmed, E.; Malik, Abdul Sattar; Shah, Z. A.; Ahmad, Naseeb; Mehtab, Ujala; Raza, Rizwan

2018-05-01

Polycrystalline tantalum-carbide-incorporated diamond coatings have been made on unpolished side of Si (100) wafer by hot filament chemical vapor deposition process. Morphology of the coatings has been found to vary from (111) triangular-facetted to predominantly (111) square-faceted by increasing the concentration of tantalum carbide. The results have been compared to those of a diamond reference coating with no tantalum content. An increase in roughness has been observed with the increase of tantalum carbide (TaC) due to change in morphology of the diamond films. It is noticed that roughness of the coatings increases as grains become more square-faceted. It is found that diamond coatings involving tantalum carbide are not as resistant as diamond films with no TaC content and the coefficient of friction for such coatings with microcrystalline grains can be manipulated to 0·33 under high vacuum of 10-7 Torr. Such a low friction coefficient value enhances tribological behavior of unpolished Si substrates and can possibly be used in sliding applications.

Dielectric Performance of a High Purity HTCC Alumina at High Temperatures - a Comparison Study with Other Polycrystalline Alumina

NASA Technical Reports Server (NTRS)

Chen, Liangyu

2014-01-01

A very high purity (99.99+%) high temperature co-fired ceramic (HTCC) alumina has recently become commercially available. The raw material of this HTCC alumina is very different from conventional HTCC alumina, and more importantly there is no glass additive in this alumina material for co-firing processing. Previously, selected HTCC and LTCC (low temperature co-fired ceramic) alumina materials were evaluated at high temperatures as dielectric and compared to a regularly sintered 96% polycrystalline alumina (96% Al2O3), where 96% alumina was used as the benchmark. A prototype packaging system based on regular 96% alumina with Au thickfilm metallization successfully facilitated long term testing of high temperature silicon carbide (SiC) electronic devices for over 10,000 hours at 500 C. In order to evaluate this new high purity HTCC alumina for possible high temperature packaging applications, the dielectric properties of this HTCC alumina substrate were measured and compared with those of 96% alumina and a previously tested LTCC alumina from room temperature to 550 C at frequencies of 120 Hz, 1 KHz, 10 KHz, 100 KHz, and 1 MHz. A parallel-plate capacitive device with dielectric of the HTCC alumina and precious metal electrodes were used for measurements of the dielectric constant and dielectric loss of the co-fired alumina material in the temperature and frequency ranges. The capacitance and AC parallel conductance of the capacitive device were directly measured by an AC impedance meter, and the dielectric constant and parallel AC conductivity of the dielectric were calculated from the capacitance and conductance measurement results. The temperature and frequency dependent dielectric constant, AC conductivity, and dissipation factor of the HTCC alumina substrate are presented and compared to those of 96% alumina and a selected LTCC alumina. Other technical advantages of this new co-fired material for possible high packaging applications are also discussed.

Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor

PubMed Central

Park, Jae Hyo; Jang, Gil Su; Kim, Hyung Yoon; Seok, Ki Hwan; Chae, Hee Jae; Lee, Sol Kyu; Joo, Seung Ki

2016-01-01

Realizing a low-temperature polycrystalline-silicon (LTPS) thin-film transistor (TFT) with sub-kT/q subthreshold slope (SS) is significantly important to the development of next generation active-matrix organic-light emitting diode displays. This is the first time a sub-kT/q SS (31.44 mV/dec) incorporated with a LTPS-TFT with polycrystalline-Pb(Zr,Ti)O3 (PZT)/ZrTiO4 (ZTO) gate dielectrics has been demonstrated. The sub-kT/q SS was observed in the weak inversion region at −0.5 V showing ultra-low operating voltage with the highest mobility (250.5 cm2/Vsec) reported so far. In addition, the reliability of DC negative bias stress, hot carrier stress and self-heating stress in LTPS-TFT with negative capacitance was investigated for the first time. It was found that the self-heating stress showed accelerated SS degradation due to the PZT Curie temperature. PMID:27098115

Initial steps toward the realization of large area arrays of single photon counting pixels based on polycrystalline silicon TFTs

NASA Astrophysics Data System (ADS)

Liang, Albert K.; Koniczek, Martin; Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua; Jiang, Hao; Street, Robert A.; Lu, Jeng Ping

2014-03-01

The thin-film semiconductor processing methods that enabled creation of inexpensive liquid crystal displays based on amorphous silicon transistors for cell phones and televisions, as well as desktop, laptop and mobile computers, also facilitated the development of devices that have become ubiquitous in medical x-ray imaging environments. These devices, called active matrix flat-panel imagers (AMFPIs), measure the integrated signal generated by incident X rays and offer detection areas as large as ~43×43 cm2. In recent years, there has been growing interest in medical x-ray imagers that record information from X ray photons on an individual basis. However, such photon counting devices have generally been based on crystalline silicon, a material not inherently suited to the cost-effective manufacture of monolithic devices of a size comparable to that of AMFPIs. Motivated by these considerations, we have developed an initial set of small area prototype arrays using thin-film processing methods and polycrystalline silicon transistors. These prototypes were developed in the spirit of exploring the possibility of creating large area arrays offering single photon counting capabilities and, to our knowledge, are the first photon counting arrays fabricated using thin film techniques. In this paper, the architecture of the prototype pixels is presented and considerations that influenced the design of the pixel circuits, including amplifier noise, TFT performance variations, and minimum feature size, are discussed.

Method for producing silicon thin-film transistors with enhanced forward current drive

DOEpatents

Weiner, Kurt H.

1998-01-01

A method for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon. A device made by this method can be used, for example, as a pixel switch in an active-matrix liquid crystal display to improve display refresh rates.

Fabrication of polycrystalline solar cells on low-cost substrates

NASA Technical Reports Server (NTRS)

Chu, T. L. (Inventor)

1976-01-01

A new method of producing p-n junction semiconductors for solar cells was described; the principal objective of this investigation is to reduce production costs significantly by depositing polycrystalline silicon on a relatively cheap substrate such as metallurgical-grade silicon, graphite, or steel. The silicon layer contains appropriate dopants, and the substrates are coated with a diffusion barrier of silica, borosilicate, phosphosilicate, or mixtures of these compounds.

Printable nanostructured silicon solar cells for high-performance, large-area flexible photovoltaics.

PubMed

Lee, Sung-Min; Biswas, Roshni; Li, Weigu; Kang, Dongseok; Chan, Lesley; Yoon, Jongseung

2014-10-28

Nanostructured forms of crystalline silicon represent an attractive materials building block for photovoltaics due to their potential benefits to significantly reduce the consumption of active materials, relax the requirement of materials purity for high performance, and hence achieve greatly improved levelized cost of energy. Despite successful demonstrations for their concepts over the past decade, however, the practical application of nanostructured silicon solar cells for large-scale implementation has been hampered by many existing challenges associated with the consumption of the entire wafer or expensive source materials, difficulties to precisely control materials properties and doping characteristics, or restrictions on substrate materials and scalability. Here we present a highly integrable materials platform of nanostructured silicon solar cells that can overcome these limitations. Ultrathin silicon solar microcells integrated with engineered photonic nanostructures are fabricated directly from wafer-based source materials in configurations that can lower the materials cost and can be compatible with deterministic assembly procedures to allow programmable, large-scale distribution, unlimited choices of module substrates, as well as lightweight, mechanically compliant constructions. Systematic studies on optical and electrical properties, photovoltaic performance in experiments, as well as numerical modeling elucidate important design rules for nanoscale photon management with ultrathin, nanostructured silicon solar cells and their interconnected, mechanically flexible modules, where we demonstrate 12.4% solar-to-electric energy conversion efficiency for printed ultrathin (∼ 8 μm) nanostructured silicon solar cells when configured with near-optimal designs of rear-surface nanoposts, antireflection coating, and back-surface reflector.

Polycrystalline silicon carbide dopant profiles obtained through a scanning nano-Schottky contact

DOE Office of Scientific and Technical Information (OSTI.GOV)

Golt, M. C.; Strawhecker, K. E.; Bratcher, M. S.

2016-07-14

The unique thermo-electro-mechanical properties of polycrystalline silicon carbide (poly-SiC) make it a desirable candidate for structural and electronic materials for operation in extreme environments. Necessitated by the need to understand how processing additives influence poly-SiC structure and electrical properties, the distribution of lattice defects and impurities across a specimen of hot-pressed 6H poly-SiC processed with p-type additives was visualized with high spatial resolution using a conductive atomic force microscopy approach in which a contact forming a nano-Schottky interface is scanned across the sample. The results reveal very intricate structures within poly-SiC, with each grain having a complex core-rim structure. Thismore » complexity results from the influence the additives have on the evolution of the microstructure during processing. It was found that the highest conductivities localized at rims as well as at the interface between the rim and the core. The conductivity of the cores is less than the conductivity of the rims due to a lower concentration of dopant. Analysis of the observed conductivities and current-voltage curves is presented in the context of nano-Schottky contact regimes where the conventional understanding of charge transport to diode operation is no longer valid.« less

Polycrystalline silicon carbide dopant profiles obtained through a scanning nano-Schottky contact

NASA Astrophysics Data System (ADS)

Golt, M. C.; Strawhecker, K. E.; Bratcher, M. S.; Shanholtz, E. R.

2016-07-01

The unique thermo-electro-mechanical properties of polycrystalline silicon carbide (poly-SiC) make it a desirable candidate for structural and electronic materials for operation in extreme environments. Necessitated by the need to understand how processing additives influence poly-SiC structure and electrical properties, the distribution of lattice defects and impurities across a specimen of hot-pressed 6H poly-SiC processed with p-type additives was visualized with high spatial resolution using a conductive atomic force microscopy approach in which a contact forming a nano-Schottky interface is scanned across the sample. The results reveal very intricate structures within poly-SiC, with each grain having a complex core-rim structure. This complexity results from the influence the additives have on the evolution of the microstructure during processing. It was found that the highest conductivities localized at rims as well as at the interface between the rim and the core. The conductivity of the cores is less than the conductivity of the rims due to a lower concentration of dopant. Analysis of the observed conductivities and current-voltage curves is presented in the context of nano-Schottky contact regimes where the conventional understanding of charge transport to diode operation is no longer valid.

Simultaneous high crystallinity and sub-bandgap optical absorptance in hyperdoped black silicon using nanosecond laser annealing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Franta, Benjamin, E-mail: bafranta@gmail.com; Pastor, David; Gandhi, Hemi H.

2015-12-14

Hyperdoped black silicon fabricated with femtosecond laser irradiation has attracted interest for applications in infrared photodetectors and intermediate band photovoltaics due to its sub-bandgap optical absorptance and light-trapping surface. However, hyperdoped black silicon typically has an amorphous and polyphasic polycrystalline surface that can interfere with carrier transport, electrical rectification, and intermediate band formation. Past studies have used thermal annealing to obtain high crystallinity in hyperdoped black silicon, but thermal annealing causes a deactivation of the sub-bandgap optical absorptance. In this study, nanosecond laser annealing is used to obtain high crystallinity and remove pressure-induced phases in hyperdoped black silicon while maintainingmore » high sub-bandgap optical absorptance and a light-trapping surface morphology. Furthermore, it is shown that nanosecond laser annealing reactivates the sub-bandgap optical absorptance of hyperdoped black silicon after deactivation by thermal annealing. Thermal annealing and nanosecond laser annealing can be combined in sequence to fabricate hyperdoped black silicon that simultaneously shows high crystallinity, high above-bandgap and sub-bandgap absorptance, and a rectifying electrical homojunction. Such nanosecond laser annealing could potentially be applied to non-equilibrium material systems beyond hyperdoped black silicon.« less

Porous graphene current collectors filled with silicon as high-performance lithium battery anode

NASA Astrophysics Data System (ADS)

Ababtain, Khalid; Babu, Ganguli; Susarla, Sandhya; Gullapalli, Hemtej; Masurkar, Nirul; Ajayan, Pulickel M.; Mohana Reddy Arava, Leela

2018-01-01

Despite the massive success for high energy density, the charge-discharge current rate performance of the lithium-ion batteries are still a major concern owing to inherent sluggish Li-ion kinetics. Herein, we demonstrate three-dimensional porous electrodes engineered on highly conductive graphene current collectors to enhance the Li-ion conductivity, thereby c-rate performance. Such high-quality graphene provides surface area for loading a large amount of electrochemically active material and strong adhesion with the electrode. The synergism of porous structure and conductive current collector enables us to realize high-performance new-generation silicon anodes with a high energy density of 1.8 mAh cm-2. Further, silicon electrodes revealed with excellent current rates up to 5C with a capacity of 0.37 mAh cm-2 for 500 nm planar thickness.

High Input Voltage, Silicon Carbide Power Processing Unit Performance Demonstration

NASA Technical Reports Server (NTRS)

Bozak, Karin E.; Pinero, Luis R.; Scheidegger, Robert J.; Aulisio, Michael V.; Gonzalez, Marcelo C.; Birchenough, Arthur G.

2015-01-01

A silicon carbide brassboard power processing unit has been developed by the NASA Glenn Research Center in Cleveland, Ohio. The power processing unit operates from two sources - a nominal 300-Volt high voltage input bus and a nominal 28-Volt low voltage input bus. The design of the power processing unit includes four low voltage, low power supplies that provide power to the thruster auxiliary supplies, and two parallel 7.5 kilowatt power supplies that are capable of providing up to 15 kilowatts of total power at 300-Volts to 500-Volts to the thruster discharge supply. Additionally, the unit contains a housekeeping supply, high voltage input filter, low voltage input filter, and master control board, such that the complete brassboard unit is capable of operating a 12.5 kilowatt Hall Effect Thruster. The performance of unit was characterized under both ambient and thermal vacuum test conditions, and the results demonstrate the exceptional performance with full power efficiencies exceeding 97. With a space-qualified silicon carbide or similar high voltage, high efficiency power device, this design could evolve into a flight design for future missions that require high power electric propulsion systems.

Experimental study of three-dimensional fin-channel charge trapping flash memories with titanium nitride and polycrystalline silicon gates

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Mizubayashi, Wataru; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku

2014-01-01

Three-dimensional (3D) fin-channel charge trapping (CT) flash memories with different gate materials of physical-vapor-deposited (PVD) titanium nitride (TiN) and n+-polycrystalline silicon (poly-Si) have successfully been fabricated by using (100)-oriented silicon-on-insulator (SOI) wafers and orientation-dependent wet etching. Electrical characteristics of the fabricated flash memories including statistical threshold voltage (Vt) variability, endurance, and data retention have been comparatively investigated. It was experimentally found that a larger memory window and a deeper erase are obtained in PVD-TiN-gated metal-oxide-nitride-oxide-silicon (MONOS)-type flash memories than in poly-Si-gated poly-Si-oxide-nitride-oxide-silicon (SONOS)-type memories. The larger memory window and deeper erase of MONOS-type flash memories are contributed by the higher work function of the PVD-TiN metal gate than of the n+-poly-Si gate, which is effective for suppressing electron back tunneling during erase operation. It was also found that the initial Vt roll-off due to the short-channel effect (SCE) is directly related to the memory window roll-off when the gate length (Lg) is scaled down to 46 nm or less.

Process Research of Polycrystalline Silicon Material (PROPSM)

NASA Technical Reports Server (NTRS)

Culik, J. S.

1984-01-01

An investigation was begun into the usefulness of molecular hydrogen annealing on polycrystalline solar cells. No improvement was realized even after twenty hours of hydrogenation. Thus, samples were chosen on the basis of: (1) low open circuit voltage; (2) low shunt conductance; and (3) high light generated current. These cells were hydrogenated in molecular hydrogen at 300 C. The differences between the before and after hydrogenation values are so slight as to be negligible. These cells have light generated current densities that indicate long minority carrier diffusion lengths. The open circuit voltage appears to be degraded, and quasi-neutral recombination current enhanced. Therefore, molecular hydrogen is not usful for passivating electrically active defects.

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2004-12-07

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process For Direct Integration Of A Thin-Film Silicon P-N Junction Diode With A Magnetic Tunnel Junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2005-08-23

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction

DOEpatents

Toet, Daniel; Sigmon, Thomas W.

2003-01-01

A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization.

Method of forming buried oxide layers in silicon

DOEpatents

Sadana, Devendra Kumar; Holland, Orin Wayne

2000-01-01

A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

Silicon materials task of the low-cost solar array project. Phase 4: Effects of impurities and processing on silicon solar cells

NASA Technical Reports Server (NTRS)

Hopkins, R. H.; Hanes, M. H.; Davis, J. R.; Rohatgi, A.; Raichoudhury, P.; Mollenkopf, H. C.

1981-01-01

The results of the study form a basis for silicon producers, wafer manufacturers, and cell fabricators to develop appropriate cost-benefit relationships for the use of less pure, less costly solar grade silicon. Cr is highly mobile in silicon even at temperatures as low as 600 C. Contrasting with earlier data for Mo, Ti, and V, Cr concentrations vary from place to place in polycrystalline silicon wafers and the electrically-active Cr concentration in the polysilicon is more than an order of magnitude smaller than would be projected from single crystal impurity data. We hypothesize that Cr diffuses during ingot cooldown after growth, preferentially segregates to grain and becomes electrically deactivated. Accelerated aging data from Ni-contaminated silicon imply that no significant impurity-induced cell performance reduction should be expected over a twenty year device lifetime.

Method for producing silicon thin-film transistors with enhanced forward current drive

DOEpatents

Weiner, K.H.

1998-06-30

A method is disclosed for fabricating amorphous silicon thin film transistors (TFTs) with a polycrystalline silicon surface channel region for enhanced forward current drive. The method is particularly adapted for producing top-gate silicon TFTs which have the advantages of both amorphous and polycrystalline silicon TFTs, but without problem of leakage current of polycrystalline silicon TFTs. This is accomplished by selectively crystallizing a selected region of the amorphous silicon, using a pulsed excimer laser, to create a thin polycrystalline silicon layer at the silicon/gate-insulator surface. The thus created polysilicon layer has an increased mobility compared to the amorphous silicon during forward device operation so that increased drive currents are achieved. In reverse operation the polysilicon layer is relatively thin compared to the amorphous silicon, so that the transistor exhibits the low leakage currents inherent to amorphous silicon. A device made by this method can be used, for example, as a pixel switch in an active-matrix liquid crystal display to improve display refresh rates. 1 fig.

Interdigitated back contact solar cells with polycrystalline silicon on oxide passivating contacts for both polarities

NASA Astrophysics Data System (ADS)

Haase, Felix; Kiefer, Fabian; Schäfer, Sören; Kruse, Christian; Krügener, Jan; Brendel, Rolf; Peibst, Robby

2017-08-01

We demonstrate an independently confirmed 25.0%-efficient interdigitated back contact silicon solar cell with passivating polycrystalline silicon (poly-Si) on oxide (POLO) contacts that enable a high open circuit voltage of 723 mV. We use n-type POLO contacts with a measured saturation current density of J 0n = 4 fA cm-2 and p-type POLO contacts with J 0p = 10 fA cm-2. The textured front side and the gaps between the POLO contacts on the rear are passivated by aluminum oxide (AlO x ) with J 0AlO x = 6 fA cm-2 as measured after deposition. We analyze the recombination characteristics of our solar cells at different process steps using spatially resolved injection-dependent carrier lifetimes measured by infrared lifetime mapping. The implied pseudo-efficiency of the unmasked cell, i.e., cell and perimeter region are illuminated during measurement, is 26.2% before contact opening, 26.0% after contact opening and 25.7% for the finished cell. This reduction is due to an increase in the saturation current density of the AlO x passivation during chemical etching of the contact openings and of the rear side metallization. The difference between the implied pseudo-efficiency and the actual efficiency of 25.0% as determined by designated-area light current-voltage (I-V) measurements is due to series resistance and diffusion of excess carriers into the non-illuminated perimeter region.

Silicene Flowers: A Dual Stabilized Silicon Building Block for High-Performance Lithium Battery Anodes.

PubMed

Zhang, Xinghao; Qiu, Xiongying; Kong, Debin; Zhou, Lu; Li, Zihao; Li, Xianglong; Zhi, Linjie

2017-07-25

Nanostructuring is a transformative way to improve the structure stability of high capacity silicon for lithium batteries. Yet, the interface instability issue remains and even propagates in the existing nanostructured silicon building blocks. Here we demonstrate an intrinsically dual stabilized silicon building block, namely silicene flowers, to simultaneously address the structure and interface stability issues. These original Si building blocks as lithium battery anodes exhibit extraordinary combined performance including high gravimetric capacity (2000 mAh g -1 at 800 mA g -1 ), high volumetric capacity (1799 mAh cm -3 ), remarkable rate capability (950 mAh g -1 at 8 A g -1 ), and excellent cycling stability (1100 mA h g -1 at 2000 mA g -1 over 600 cycles). Paired with a conventional cathode, the fabricated full cells deliver extraordinarily high specific energy and energy density (543 Wh kg ca -1 and 1257 Wh L ca -1 , respectively) based on the cathode and anode, which are 152% and 239% of their commercial counterparts using graphite anodes. Coupled with a simple, cost-effective, scalable synthesis approach, this silicon building block offers a horizon for the development of high-performance batteries.

High Input Voltage, Silicon Carbide Power Processing Unit Performance Demonstration

NASA Technical Reports Server (NTRS)

Bozak, Karin E.; Pinero, Luis R.; Scheidegger, Robert J.; Aulisio, Michael V.; Gonzalez, Marcelo C.; Birchenough, Arthur G.

2015-01-01

A silicon carbide brassboard power processing unit has been developed by the NASA Glenn Research Center in Cleveland, Ohio. The power processing unit operates from two sources: a nominal 300 Volt high voltage input bus and a nominal 28 Volt low voltage input bus. The design of the power processing unit includes four low voltage, low power auxiliary supplies, and two parallel 7.5 kilowatt (kW) discharge power supplies that are capable of providing up to 15 kilowatts of total power at 300 to 500 Volts (V) to the thruster. Additionally, the unit contains a housekeeping supply, high voltage input filter, low voltage input filter, and master control board, such that the complete brassboard unit is capable of operating a 12.5 kilowatt Hall effect thruster. The performance of the unit was characterized under both ambient and thermal vacuum test conditions, and the results demonstrate exceptional performance with full power efficiencies exceeding 97%. The unit was also tested with a 12.5kW Hall effect thruster to verify compatibility and output filter specifications. With space-qualified silicon carbide or similar high voltage, high efficiency power devices, this would provide a design solution to address the need for high power electric propulsion systems.

Smart integration of silicon nanowire arrays in all-silicon thermoelectric micro-nanogenerators

NASA Astrophysics Data System (ADS)

Fonseca, Luis; Santos, Jose-Domingo; Roncaglia, Alberto; Narducci, Dario; Calaza, Carlos; Salleras, Marc; Donmez, Inci; Tarancon, Albert; Morata, Alex; Gadea, Gerard; Belsito, Luca; Zulian, Laura

2016-08-01

Micro and nanotechnologies are called to play a key role in the fabrication of small and low cost sensors with excellent performance enabling new continuous monitoring scenarios and distributed intelligence paradigms (Internet of Things, Trillion Sensors). Harvesting devices providing energy autonomy to those large numbers of microsensors will be essential. In those scenarios where waste heat sources are present, thermoelectricity will be the obvious choice. However, miniaturization of state of the art thermoelectric modules is not easy with the current technologies used for their fabrication. Micro and nanotechnologies offer an interesting alternative considering that silicon in nanowire form is a material with a promising thermoelectric figure of merit. This paper presents two approaches for the integration of large numbers of silicon nanowires in a cost-effective and practical way using only micromachining and thin-film processes compatible with silicon technologies. Both approaches lead to automated physical and electrical integration of medium-high density stacked arrays of crystalline or polycrystalline silicon nanowires with arbitrary length (tens to hundreds microns) and diameters below 100 nm.

Low-temperature electron cyclotron resonance plasma-enhanced chemical-vapor deposition silicon dioxide as gate insulator for polycrystalline silicon thin-film transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Maiolo, L.; Pecora, A.; Fortunato, G.

2006-03-15

Silicon dioxide films have been deposited at temperatures below 270 deg. C in an electron cyclotron resonance (ECR) plasma reactor from O{sub 2}, SiH{sub 4}, and He gas mixture. Pinhole density analysis as a function of substrate temperature for different microwave powers was carried out. Films deposited at higher microwave power and at room temperature show defect densities (<7 pinhole/mm{sup 2}), ensuring low-temperature process integration on large area. From Fourier transform infrared analysis and thermal desorption spectrometry we also evaluated very low hydrogen content if compared to conventional rf-plasma-enhanced chemical-vapor-deposited (PECVD) SiO{sub 2} deposited at 350 deg. C. Electrical propertiesmore » have been measured in metal-oxide-semiconductor (MOS) capacitors, depositing SiO{sub 2} at RT as gate dielectric; breakdown electric fields >10 MV/cm and charge trapping at fields >6 MV/cm have been evaluated. From the study of interface quality in MOS capacitors, we found that even for low annealing temperature (200 deg. C), it is possible to considerably reduce the interface state density down to 5x10{sup 11} cm{sup -2} eV{sup -1}. To fully validate the ECR-PECVD silicon dioxide we fabricated polycrystalline silicon thin-film transistors using RT-deposited SiO{sub 2} as gate insulator. Different postdeposition thermal treatments have been studied and good device characteristics were obtained even for annealing temperature as low as 200 deg. C.« less

Semi-transparent perovskite solar cells for tandems with silicon and CIGS

DOE PAGES

Bailie, Colin D.; Christoforo, M. Greyson; Mailoa, Jonathan P.; ...

2014-12-23

A promising approach for upgrading the performance of an established low-bandgap solar technology without adding much cost is to deposit a high bandgap polycrystalline semiconductor on top to make a tandem solar cell. We use a transparent silver nanowire electrode on perovskite solar cells to achieve a semi-transparent device. We place the semi-transparent cell in a mechanically-stacked tandem configuration onto copper indium gallium diselenide (CIGS) and low-quality multicrystalline silicon (Si) to achieve solid-state polycrystalline tandem solar cells with a net improvement in efficiency over the bottom cell alone. Furthermore, this work paves the way for integrating perovskites into a low-costmore » and high-efficiency (>25%) tandem cell.« less

Silicon on ceramic process. Silicon sheet growth development for the large-area silicon sheet task of the low-cost silicon solar array project

NASA Technical Reports Server (NTRS)

Zook, J. D.; Heaps, J. D.; Maciolek, R. B.; Koepke, B. G.; Butter, C. D.; Schuldt, S. B.

1977-01-01

The technical and economic feasibility of producing solar-cell-quality sheet silicon was investigated. The sheets were made by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. Significant progress was made in all areas of the program.

High performance hybrid silicon micropillar solar cell based on light trapping characteristics of Cu nanoparticles

NASA Astrophysics Data System (ADS)

Zhang, Yulong; Fan, Zhiqiang; Zhang, Weijia; Ma, Qiang; Jiang, Zhaoyi; Ma, Denghao

2018-05-01

High performance silicon combined structure (micropillar with Cu nanoparticles) solar cell has been synthesized from N-type silicon substrates based on the micropillar array. The combined structure solar cell exhibited higher short circuit current rather than the silicon miropillar solar cell, which the parameters of micropillar array are the same. Due to the Cu nanoparticles were decorated on the surface of silicon micropillar array, the photovoltaic properties of cells have been improved. In addition, the optimal efficiency of 11.5% was measured for the combined structure solar cell, which is better than the silicon micropillar cell.

High-pressure-assisted synthesis of high-volume ZnGeP2 polycrystalline

NASA Astrophysics Data System (ADS)

Huang, Changbao; Wu, Haixin; Xiao, Ruichun; Chen, Shijing; Ma, Jiaren

2018-06-01

The pnictide and chalcogenide semiconductors are promising materials for the applications in the field of photoelectric. High-purity and high-volume polycrystalline required in the real-world applications is hard to be synthesized due to the high vapor pressure of phosphorus and sulfur components at high temperature. A new high-pressure-resisted method was used to investigate the synthesis of the nonlinear-optical semiconductor ZnGeP2. The high-purity ZnGeP2 polycrystalline material of approximately 500 g was synthesized in one run, which enables the preparation of nominally stoichiometric material. Since increasing internal pressure resistance of quartz crucible and reducing the reaction space, the high-pressure-resisted method can be used to rapidly synthesize other pnictide and chalcogenide semiconductors and control the components ratio.

Silicon-on-ceramic process: Silicon sheet growth and device development for the large-area silicon sheet task of the low-cost solar array project

NASA Technical Reports Server (NTRS)

Whitehead, A. B.; Zook, J. D.; Grung, B. L.; Heaps, J. D.; Schmit, F.; Schuldt, S. B.; Chapman, P. W.

1981-01-01

The technical feasibility of producing solar cell quality sheet silicon to meet the DOE 1986 cost goal of 70 cents/watt was investigated. The silicon on ceramic approach is to coat a low cost ceramic substrate with large grain polycrystalline silicon by unidirectional solidification of molten silicon. Results and accomplishments are summarized.

Formation of a Polycrystalline Silicon Thin Film by Using Blue Laser Diode Annealing

NASA Astrophysics Data System (ADS)

Choi, Young-Hwan; Ryu, Han-Youl

2018-04-01

We report the crystallization of an amorphous silicon thin film deposited on a SiO2/Si wafer using an annealing process with a high-power blue laser diode (LD). The laser annealing process was performed using a continuous-wave blue LD of 450 nm in wavelength with varying laser output power in a nitrogen atmosphere. The crystallinity of the annealed poly-silicon films was investigated using ellipsometry, electron microscope observation, X-ray diffraction, and Raman spectroscopy. Polysilicon grains with > 100-nm diameter were observed to be formed after the blue LD annealing. The crystal quality was found to be improved as the laser power was increased up to 4 W. The demonstrated blue LD annealing is expected to provide a low-cost and versatile solution for lowtemperature poly-silicon processes.

Dissolution chemistry and biocompatibility of silicon- and germanium-based semiconductors for transient electronics.

PubMed

Kang, Seung-Kyun; Park, Gayoung; Kim, Kyungmin; Hwang, Suk-Won; Cheng, Huanyu; Shin, Jiho; Chung, Sangjin; Kim, Minjin; Yin, Lan; Lee, Jeong Chul; Lee, Kyung-Mi; Rogers, John A

2015-05-06

Semiconducting materials are central to the development of high-performance electronics that are capable of dissolving completely when immersed in aqueous solutions, groundwater, or biofluids, for applications in temporary biomedical implants, environmentally degradable sensors, and other systems. The results reported here include comprehensive studies of the dissolution by hydrolysis of polycrystalline silicon, amorphous silicon, silicon-germanium, and germanium in aqueous solutions of various pH values and temperatures. In vitro cellular toxicity evaluations demonstrate the biocompatibility of the materials and end products of dissolution, thereby supporting their potential for use in biodegradable electronics. A fully dissolvable thin-film solar cell illustrates the ability to integrate these semiconductors into functional systems.

Propagation losses in undoped and n-doped polycrystalline silicon wire waveguides.

PubMed

Zhu, Shiyang; Fang, Q; Yu, M B; Lo, G Q; Kwong, D L

2009-11-09

Polycrystalline silicon (polySi) wire waveguides with width ranging from 200 to 500 nm are fabricated by solid-phase crystallization (SPC) of deposited amorphous silicon (a-Si) on SiO(2) at a maximum temperature of 1000 degrees C. The propagation loss at 1550 nm decreases from 13.0 to 9.8 dB/cm with the waveguide width shrinking from 500 to 300 nm while the 200-nm-wide waveguides exhibit quite large loss (>70 dB/cm) mainly due to the relatively rough sidewall of waveguides induced by the polySi dry etch. By modifying the process sequence, i.e., first patterning the a-Si layer into waveguides by dry etch and then SPC, the sidewall roughness is significantly improved but the polySi crystallinity is degraded, leading to 13.9 dB/cm loss in the 200-nm-wide waveguides while larger losses in the wider waveguides. Phosphorus implantation causes an additional loss in the polySi waveguides. The doping-induced optical loss increases relatively slowly with the phosphorus concentration increasing up to 1 x 10(18) cm(-3), whereas the 5 x 10(18) cm(-3) doped waveguides exhibit large loss due to the dominant free carrier absorption. For all undoped polySi waveguides, further 1-2 dB/cm loss reduction is obtained by a standard forming gas (10%H(2) + 90%N(2)) annealing owing to the hydrogen passivation of Si dangling bonds present in polySi waveguides, achieving the lowest loss of 7.9 dB/cm in the 300-nm-wide polySi waveguides. However, for the phosphorus doped polySi waveguides, the propagation loss is slightly increased by the forming gas annealing.

Dip-coating process: Silicon sheet growth development for the large-area silicon sheet task of the low-cost silicon solar array project

NASA Technical Reports Server (NTRS)

Zook, J. D.; Heaps, J. D.; Maciolek, R. B.; Koepke, B. G.; Gutter, C. D.; Schuldt, S. B.

1977-01-01

The objective of this research program is to investigate the technical and economic feasibility of producing solar-cell-quality sheet silicon by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. The past quarter demonstrated significant progress in several areas. Seeded growth of silicon-on-ceramic (SOC) with an EFG ribbon seed was demonstrated. Different types of mullite were successfully coated with silicon. A new method of deriving minority carrier diffusion length, L sub n from spectral response measurements was evaluated. ECOMOD cost projections were found to be in good agreement with the interim SAMIS method proposed by JPL. On the less positive side, there was a decrease in cell performance which we believe to be due to an unidentified source of impurities.

Near single-crystalline, high-carrier-mobility silicon thin film on a polycrystalline/amorphous substrate

DOEpatents

Findikoglu, Alp T [Los Alamos, NM; Jia, Quanxi [Los Alamos, NM; Arendt, Paul N [Los Alamos, NM; Matias, Vladimir [Santa Fe, NM; Choi, Woong [Los Alamos, NM

2009-10-27

A template article including a base substrate including: (i) a base material selected from the group consisting of polycrystalline substrates and amorphous substrates, and (ii) at least one layer of a differing material upon the surface of the base material; and, a buffer material layer upon the base substrate, the buffer material layer characterized by: (a) low chemical reactivity with the base substrate, (b) stability at temperatures up to at least about 800.degree. C. under low vacuum conditions, and (c) a lattice crystal structure adapted for subsequent deposition of a semiconductor material; is provided, together with a semiconductor article including a base substrate including: (i) a base material selected from the group consisting of polycrystalline substrates and amorphous substrates, and (ii) at least one layer of a differing material upon the surface of the base material; and, a buffer material layer upon the base substrate, the buffer material layer characterized by: (a) low chemical reactivity with the base substrate, (b) stability at temperatures up to at least about 800.degree. C. under low vacuum conditions, and (c) a lattice crystal structure adapted for subsequent deposition of a semiconductor material, and, a top-layer of semiconductor material upon the buffer material layer.

Comparative study of mobility extraction methods in p-type polycrystalline silicon thin film transistors

NASA Astrophysics Data System (ADS)

Liu, Kai; Liu, Yuan; Liu, Yu-Rong; En, Yun-Fei; Li, Bin

2017-07-01

Channel mobility in the p-type polycrystalline silicon thin film transistors (poly-Si TFTs) is extracted using Hoffman method, linear region transconductance method and multi-frequency C-V method. Due to the non-negligible errors when neglecting the dependence of gate-source voltage on the effective mobility, the extracted mobility results are overestimated using linear region transconductance method and Hoffman method, especially in the lower gate-source voltage region. By considering of the distribution of localized states in the band-gap, the frequency independent capacitance due to localized charges in the sub-gap states and due to channel free electron charges in the conduction band were extracted using multi-frequency C-V method. Therefore, channel mobility was extracted accurately based on the charge transport theory. In addition, the effect of electrical field dependent mobility degradation was also considered in the higher gate-source voltage region. In the end, the extracted mobility results in the poly-Si TFTs using these three methods are compared and analyzed.

High performance SONOS flash memory with in-situ silicon nanocrystals embedded in silicon nitride charge trapping layer

NASA Astrophysics Data System (ADS)

Lim, Jae-Gab; Yang, Seung-Dong; Yun, Ho-Jin; Jung, Jun-Kyo; Park, Jung-Hyun; Lim, Chan; Cho, Gyu-seok; Park, Seong-gye; Huh, Chul; Lee, Hi-Deok; Lee, Ga-Won

2018-02-01

In this paper, SONOS-type flash memory device with highly improved charge-trapping efficiency is suggested by using silicon nanocrystals (Si-NCs) embedded in silicon nitride (SiNX) charge trapping layer. The Si-NCs were in-situ grown by PECVD without additional post annealing process. The fabricated device shows high program/erase speed and retention property which is suitable for multi-level cell (MLC) application. Excellent performance and reliability for MLC are demonstrated with large memory window of ∼8.5 V and superior retention characteristics of 7% charge loss for 10 years. High resolution transmission electron microscopy image confirms the Si-NC formation and the size is around 1-2 nm which can be verified again in X-ray photoelectron spectroscopy (XPS) where pure Si bonds increase. Besides, XPS analysis implies that more nitrogen atoms make stable bonds at the regular lattice point. Photoluminescence spectra results also illustrate that Si-NCs formation in SiNx is an effective method to form deep trap states.

Theoretical investigation of the noise performance of active pixel imaging arrays based on polycrystalline silicon thin film transistors.

PubMed

Koniczek, Martin; Antonuk, Larry E; El-Mohri, Youcef; Liang, Albert K; Zhao, Qihua

2017-07-01

Active matrix flat-panel imagers, which typically incorporate a pixelated array with one a-Si:H thin-film transistor (TFT) per pixel, have become ubiquitous by virtue of many advantages, including large monolithic construction, radiation tolerance, and high DQE. However, at low exposures such as those encountered in fluoroscopy, digital breast tomosynthesis and breast computed tomography, DQE is degraded due to the modest average signal generated per interacting x-ray relative to electronic additive noise levels of ~1000 e, or greater. A promising strategy for overcoming this limitation is to introduce an amplifier into each pixel, referred to as the active pixel (AP) concept. Such circuits provide in-pixel amplification prior to readout as well as facilitate correlated multiple sampling, enhancing signal-to-noise and restoring DQE at low exposures. In this study, a methodology for theoretically investigating the signal and noise performance of imaging array designs is introduced and applied to the case of AP circuits based on low-temperature polycrystalline silicon (poly-Si), a semiconductor suited to manufacture of large area, radiation tolerant arrays. Computer simulations employing an analog circuit simulator and performed in the temporal domain were used to investigate signal characteristics and major sources of electronic additive noise for various pixel amplifier designs. The noise sources include photodiode shot noise and resistor thermal noise, as well as TFT thermal and flicker noise. TFT signal behavior and flicker noise were parameterized from fits to measurements performed on individual poly-Si test TFTs. The performance of three single-stage and three two-stage pixel amplifier designs were investigated under conditions relevant to fluoroscopy. The study assumes a 20 × 20 cm 2 , 150 μm pitch array operated at 30 fps and coupled to a CsI:Tl x-ray converter. Noise simulations were performed as a function of operating conditions, including

High-performance silicon nanowire bipolar phototransistors

NASA Astrophysics Data System (ADS)

Tan, Siew Li; Zhao, Xingyan; Chen, Kaixiang; Crozier, Kenneth B.; Dan, Yaping

2016-07-01

Silicon nanowires (SiNWs) have emerged as sensitive absorbing materials for photodetection at wavelengths ranging from ultraviolet (UV) to the near infrared. Most of the reports on SiNW photodetectors are based on photoconductor, photodiode, or field-effect transistor device structures. These SiNW devices each have their own advantages and trade-offs in optical gain, response time, operating voltage, and dark current noise. Here, we report on the experimental realization of single SiNW bipolar phototransistors on silicon-on-insulator substrates. Our SiNW devices are based on bipolar transistor structures with an optically injected base region and are fabricated using CMOS-compatible processes. The experimentally measured optoelectronic characteristics of the SiNW phototransistors are in good agreement with simulation results. The SiNW phototransistors exhibit significantly enhanced response to UV and visible light, compared with typical Si p-i-n photodiodes. The near infrared responsivities of the SiNW phototransistors are comparable to those of Si avalanche photodiodes but are achieved at much lower operating voltages. Compared with other reported SiNW photodetectors as well as conventional bulk Si photodiodes and phototransistors, the SiNW phototransistors in this work demonstrate the combined advantages of high gain, high photoresponse, low dark current, and low operating voltage.

Solid/melt interface studies of high-speed silicon sheet growth

NASA Technical Reports Server (NTRS)

Ciszek, T. F.

1984-01-01

Radial growth-rate anisotropies and limiting growth forms of point nucleated, dislocation-free silicon sheets spreading horizontally on the free surface of a silicon melt have been measured for (100), (110), (111), and (112) sheet planes. Sixteen-millimeter movie photography was used to record the growth process. Analysis of the sheet edges has lead to predicted geometries for the tip shape of unidirectional, dislocation-free, horizontally growing sheets propagating in various directions within the above-mentioned planes. Similar techniques were used to study polycrystalline sheets and dendrite propagation. For dendrites, growth rates on the order of 2.5 m/min and growth rate anisotropies on the order of 25 were measured.

On the Discontinuity of Polycrystalline Silicon Thin Films Realized by Aluminum-Induced Crystallization of PECVD-Deposited Amorphous Si

NASA Astrophysics Data System (ADS)

Pan, Qingtao; Wang, Tao; Yan, Hui; Zhang, Ming; Mai, Yaohua

2017-04-01

Crystallization of glass/Aluminum (50, 100, 200 nm) /hydrogenated amorphous silicon (a-Si:H) (50, 100, 200 nm) samples by Aluminum-induced crystallization (AIC) is investigated in this article. After annealing and wet etching, we found that the continuity of the polycrystalline silicon (poly-Si) thin films was strongly dependent on the double layer thicknesses. Increasing the a-Si:H/Al layer thickness ratio would improve the film microcosmic continuity. However, too thick Si layer might cause convex or peeling off during annealing. Scanning electron microscopy (SEM) and Energy Dispersive X-ray spectroscopy (EDX) are introduced to analyze the process of the peeling off. When the thickness ratio of a-Si:H/Al layer is around 1 to 1.5 and a-Si:H layer is less than 200 nm, the poly-Si film has a good continuity. Hall measurements are introduced to determine the electrical properties. Raman spectroscopy and X-ray diffraction (XRD) results show that the poly-Si film is completely crystallized and has a preferential (111) orientation.

Polycrystalline La1-xSrxMnO3 films on silicon: Influence of post-Deposition annealing on structural, (Magneto-)Optical, and (Magneto-)Electrical properties

NASA Astrophysics Data System (ADS)

Thoma, Patrick; Monecke, Manuel; Buja, Oana-Maria; Solonenko, Dmytro; Dudric, Roxana; Ciubotariu, Oana-Tereza; Albrecht, Manfred; Deac, Iosif G.; Tetean, Romulus; Zahn, Dietrich R. T.; Salvan, Georgeta

2018-01-01

The integration of La1-xSrxMnO3 (LSMO) thin film technology into established industrial silicon processes is regarded as challenging due to lattice mismatch, thermal expansion, and chemical reactions at the interface of LSMO and silicon. In this work, we investigated the physical properties of thin La0.73Sr0.27MnO3 films deposited by magnetron sputtering on silicon without a lattice matching buffer layer. The influence of a post-deposition annealing treatment on the structural, (magneto-)optical, and (magneto-)electrical properties was investigated by a variety of techniques. Using Rutherford backscattering spectroscopy, atomic force microscopy, Raman spectroscopy, and X-ray diffraction we could show that the thin films exhibit a polycrystalline, rhombohedral structure after a post-deposition annealing of at least 700 °C. The dielectric tensor in the spectral range from 1.7 eV to 5 eV determined from spectroscopic ellipsometry in combination with magneto-optical Kerr effect spectroscopy was found to be comparable to that of lattice matched films on single crystal substrates reported in literature [1]. The values of the metal-isolator transition temperature and temperature-dependent resistivities also reflect a high degree of crystalline quality of the thermally treated films.

Morphology and electronic transport of polycrystalline pentacene thin-film transistors

NASA Astrophysics Data System (ADS)

Knipp, D.; Street, R. A.; Völkel, A. R.

2003-06-01

Temperature-dependent measurements of thin-film transistors were performed to gain insight in the electronic transport of polycrystalline pentacene. Devices were fabricated with plasma-enhanced chemical vapor deposited silicon nitride gate dielectrics. The influence of the dielectric roughness and the deposition temperature of the thermally evaporated pentacene films were studied. Although films on rougher gate dielectrics and films prepared at low deposition temperatures exhibit similar grain size, the electronic properties are different. Increasing the dielectric roughness reduces the free carrier mobility, while low substrate temperature leads to more and deeper hole traps.

Pixel structures to compensate nonuniform threshold voltage and mobility of polycrystalline silicon thin-film transistors using subthreshold current for large-size active matrix organic light-emitting diode displays

NASA Astrophysics Data System (ADS)

Na, Jun-Seok; Kwon, Oh-Kyong

2014-01-01

We propose pixel structures for large-size and high-resolution active matrix organic light-emitting diode (AMOLED) displays using a polycrystalline silicon (poly-Si) thin-film transistor (TFT) backplane. The proposed pixel structures compensate the variations of the threshold voltage and mobility of the driving TFT using the subthreshold current. The simulated results show that the emission current error of the proposed pixel structure B ranges from -2.25 to 2.02 least significant bit (LSB) when the variations of the threshold voltage and mobility of the driving TFT are ±0.5 V and ±10%, respectively.

A scalable silicon photonic chip-scale optical switch for high performance computing systems.

PubMed

Yu, Runxiang; Cheung, Stanley; Li, Yuliang; Okamoto, Katsunari; Proietti, Roberto; Yin, Yawei; Yoo, S J B

2013-12-30

This paper discusses the architecture and provides performance studies of a silicon photonic chip-scale optical switch for scalable interconnect network in high performance computing systems. The proposed switch exploits optical wavelength parallelism and wavelength routing characteristics of an Arrayed Waveguide Grating Router (AWGR) to allow contention resolution in the wavelength domain. Simulation results from a cycle-accurate network simulator indicate that, even with only two transmitter/receiver pairs per node, the switch exhibits lower end-to-end latency and higher throughput at high (>90%) input loads compared with electronic switches. On the device integration level, we propose to integrate all the components (ring modulators, photodetectors and AWGR) on a CMOS-compatible silicon photonic platform to ensure a compact, energy efficient and cost-effective device. We successfully demonstrate proof-of-concept routing functions on an 8 × 8 prototype fabricated using foundry services provided by OpSIS-IME.

RF performances of inductors integrated on localized p+-type porous silicon regions

PubMed Central

2012-01-01

To study the influence of localized porous silicon regions on radiofrequency performances of passive devices, inductors were integrated on localized porous silicon regions, full porous silicon sheet, bulk silicon and glass substrates. In this work, a novel strong, resistant fluoropolymer mask is introduced to localize the porous silicon on the silicon wafer. Then, the quality factors and resonant frequencies obtained with the different substrates are presented. A first comparison is done between the performances of inductors integrated on same-thickness localized and full porous silicon sheet layers. The effect of the silicon regions in the decrease of performances of localized porous silicon is discussed. Then, the study shows that the localized porous silicon substrate significantly reduces losses in comparison with high-resistivity silicon or highly doped silicon bulks. These results are promising for the integration of both passive and active devices on the same silicon/porous silicon hybrid substrate. PMID:23009746

Continuous method of producing silicon carbide fibers

NASA Technical Reports Server (NTRS)

Barnard, Thomas Duncan (Inventor); Nguyen, Kimmai Thi (Inventor); Rabe, James Alan (Inventor)

1999-01-01

This invention pertains to a method for production of polycrystalline ceramic fibers from silicon oxycarbide (SiCO) ceramic fibers wherein the method comprises heating an amorphous ceramic fiber containing silicon and carbon in an inert environment comprising a boron oxide and carbon monoxide at a temperature sufficient to convert the amorphous ceramic fiber to a polycrystalline ceramic fiber. By having carbon monoxide present during the heating of the ceramic fiber, it is possible to achieve higher production rates on a continuous process.

Leakage current suppression with a combination of planarized gate and overlap/off-set structure in metal-induced laterally crystallized polycrystalline-silicon thin-film transistors

NASA Astrophysics Data System (ADS)

Chae, Hee Jae; Seok, Ki Hwan; Lee, Sol Kyu; Joo, Seung Ki

2018-04-01

A novel inverted staggered metal-induced laterally crystallized (MILC) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) with a combination of a planarized gate and an overlap/off-set at the source-gate/drain-gate structure were fabricated and characterized. While the MILC process is advantageous for fabricating inverted staggered poly-Si TFTs, MILC TFTs reveal higher leakage current than TFTs crystallized by other processes due to their high trap density of Ni contamination. Due to this drawback, the planarized gate and overlap/off-set structure were applied to inverted staggered MILC TFTs. The proposed device shows drastic suppression of leakage current and pinning phenomenon by reducing the lateral electric field and the space-charge limited current from the gate to the drain.

Handbook of the optical, thermal and mechanical properties of six polycrystalline dielectric materials

NASA Technical Reports Server (NTRS)

Dewitt, D. P.

1972-01-01

The design data for six polycrystalline dielectric materials are presented to describe the optical, thermal, and mechanical properties. The materials are aluminum oxide, calcium fluoride, magnesium fluoride, magnesium oxide, silicon dioxide, and titanium dioxide. The primary interest is in the polycrystalline state, although single crystal data are included when appropriate. The temperature range is room temperature to melting point. The wavelength range is from near ultraviolet to near infrared.

Low loss poly-silicon for high performance capacitive silicon modulators.

PubMed

Douix, Maurin; Baudot, Charles; Marris-Morini, Delphine; Valéry, Alexia; Fowler, Daivid; Acosta-Alba, Pablo; Kerdilès, Sébastien; Euvrard, Catherine; Blanc, Romuald; Beneyton, Rémi; Souhaité, Aurélie; Crémer, Sébastien; Vulliet, Nathalie; Vivien, Laurent; Boeuf, Frédéric

2018-03-05

Optical properties of poly-silicon material are investigated to be integrated in new silicon photonics devices, such as capacitive modulators. Test structure fabrication is done on 300 mm wafer using LPCVD deposition: 300 nm thick amorphous silicon layers are deposited on thermal oxide, followed by solid phase crystallization anneal. Rib waveguides are fabricated and optical propagation losses measured at 1.31 µm. Physical analysis (TEM ASTAR, AFM and SIMS) are used to assess the origin of losses. Optimal deposition and annealing conditions have been defined, resulting in 400 nm-wide rib waveguides with only 9.2-10 dB/cm losses.

Modelling heat conduction in polycrystalline hexagonal boron-nitride films

PubMed Central

Mortazavi, Bohayra; Pereira, Luiz Felipe C.; Jiang, Jin-Wu; Rabczuk, Timon

2015-01-01

We conducted extensive molecular dynamics simulations to investigate the thermal conductivity of polycrystalline hexagonal boron-nitride (h-BN) films. To this aim, we constructed large atomistic models of polycrystalline h-BN sheets with random and uniform grain configuration. By performing equilibrium molecular dynamics (EMD) simulations, we investigated the influence of the average grain size on the thermal conductivity of polycrystalline h-BN films at various temperatures. Using the EMD results, we constructed finite element models of polycrystalline h-BN sheets to probe the thermal conductivity of samples with larger grain sizes. Our multiscale investigations not only provide a general viewpoint regarding the heat conduction in h-BN films but also propose that polycrystalline h-BN sheets present high thermal conductivity comparable to monocrystalline sheets. PMID:26286820

High-Temperature Performance of Stacked Silicon Nanowires for Thermoelectric Power Generation

NASA Astrophysics Data System (ADS)

Stranz, Andrej; Waag, Andreas; Peiner, Erwin

2013-07-01

Deep reactive-ion etching at cryogenic temperatures (cryo-DRIE) has been used to produce arrays of silicon nanowires (NWs) for thermoelectric (TE) power generation devices. Using cryo-DRIE, we were able to fabricate NWs of large aspect ratios (up to 32) using a photoresist mask. Roughening of the NW sidewalls occurred, which has been recognized as beneficial for low thermal conductivity. Generated NWs, which were 7 μm in length and 220 nm to 270 nm in diameter, were robust enough to be stacked with a bulk silicon chip as a common top contact to the NWs. Mechanical support of the NW array, which can be created by filling the free space between the NWs using silicon oxide or polyimide, was not required. The Seebeck voltage, measured across multiple stacks of up to 16 bulk silicon dies, revealed negligible thermal interface resistance. With stacked silicon NWs, we observed Seebeck voltages that were an order of magnitude higher than those observed for bulk silicon. Degradation of the TE performance of silicon NWs was not observed for temperatures up to 470°C and temperature gradients up to 170 K.

Surface engineered porous silicon for stable, high performance electrochemical supercapacitors

PubMed Central

Oakes, Landon; Westover, Andrew; Mares, Jeremy W.; Chatterjee, Shahana; Erwin, William R.; Bardhan, Rizia; Weiss, Sharon M.; Pint, Cary L.

2013-01-01

Silicon materials remain unused for supercapacitors due to extreme reactivity of silicon with electrolytes. However, doped silicon materials boast a low mass density, excellent conductivity, a controllably etched nanoporous structure, and combined earth abundance and technological presence appealing to diverse energy storage frameworks. Here, we demonstrate a universal route to transform porous silicon (P-Si) into stable electrodes for electrochemical devices through growth of an ultra-thin, conformal graphene coating on the P-Si surface. This graphene coating simultaneously passivates surface charge traps and provides an ideal electrode-electrolyte electrochemical interface. This leads to 10–40X improvement in energy density, and a 2X wider electrochemical window compared to identically-structured unpassivated P-Si. This work demonstrates a technique generalizable to mesoporous and nanoporous materials that decouples the engineering of electrode structure and electrochemical surface stability to engineer performance in electrochemical environments. Specifically, we demonstrate P-Si as a promising new platform for grid-scale and integrated electrochemical energy storage. PMID:24145684

Surface engineered porous silicon for stable, high performance electrochemical supercapacitors.

PubMed

Oakes, Landon; Westover, Andrew; Mares, Jeremy W; Chatterjee, Shahana; Erwin, William R; Bardhan, Rizia; Weiss, Sharon M; Pint, Cary L

2013-10-22

Silicon materials remain unused for supercapacitors due to extreme reactivity of silicon with electrolytes. However, doped silicon materials boast a low mass density, excellent conductivity, a controllably etched nanoporous structure, and combined earth abundance and technological presence appealing to diverse energy storage frameworks. Here, we demonstrate a universal route to transform porous silicon (P-Si) into stable electrodes for electrochemical devices through growth of an ultra-thin, conformal graphene coating on the P-Si surface. This graphene coating simultaneously passivates surface charge traps and provides an ideal electrode-electrolyte electrochemical interface. This leads to 10-40X improvement in energy density, and a 2X wider electrochemical window compared to identically-structured unpassivated P-Si. This work demonstrates a technique generalizable to mesoporous and nanoporous materials that decouples the engineering of electrode structure and electrochemical surface stability to engineer performance in electrochemical environments. Specifically, we demonstrate P-Si as a promising new platform for grid-scale and integrated electrochemical energy storage.

Surface engineered porous silicon for stable, high performance electrochemical supercapacitors

NASA Astrophysics Data System (ADS)

Oakes, Landon; Westover, Andrew; Mares, Jeremy W.; Chatterjee, Shahana; Erwin, William R.; Bardhan, Rizia; Weiss, Sharon M.; Pint, Cary L.

2013-10-01

Silicon materials remain unused for supercapacitors due to extreme reactivity of silicon with electrolytes. However, doped silicon materials boast a low mass density, excellent conductivity, a controllably etched nanoporous structure, and combined earth abundance and technological presence appealing to diverse energy storage frameworks. Here, we demonstrate a universal route to transform porous silicon (P-Si) into stable electrodes for electrochemical devices through growth of an ultra-thin, conformal graphene coating on the P-Si surface. This graphene coating simultaneously passivates surface charge traps and provides an ideal electrode-electrolyte electrochemical interface. This leads to 10-40X improvement in energy density, and a 2X wider electrochemical window compared to identically-structured unpassivated P-Si. This work demonstrates a technique generalizable to mesoporous and nanoporous materials that decouples the engineering of electrode structure and electrochemical surface stability to engineer performance in electrochemical environments. Specifically, we demonstrate P-Si as a promising new platform for grid-scale and integrated electrochemical energy storage.

Multibit Polycristalline Silicon-Oxide-Silicon Nitride-Oxide-Silicon Memory Cells with High Density Designed Utilizing a Separated Control Gate

NASA Astrophysics Data System (ADS)

Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan

2010-10-01

Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.

Disposal of metal fragments released during polycrystalline slicing by multi-wire saw

NASA Astrophysics Data System (ADS)

Boutouchent-Guerfi, N.; Drouiche, N.; Medjahed, S.; Ould-Hamou, M.; Sahraoui, F.

2016-08-01

The environmental and economic impacts linked with solar systems are largely based on discharges of slurry generated during the various stages of sawing and cutting ingots. These discharges into the environment are subject to the general regulations on hazardous and special industrial waste disposal. Therefore, they should not be abandoned or burned in open air. The cutting of Silicon ingots leads to the production of Silicon wafers additional costs, losing more than 30% of Silicon material. Abrasive grains (Silicon Carbide) trapped between the wire and the block of Silicon need to be removed by various mechanisms to be later evacuated by slurry fragments. In the interest of decreasing operational costs during polycrystalline ingot slicing at Semiconductors Research Center, and, avoid environmental problems; it is necessary to recover the solar grade Silicon from the Silicon sawing waste. For this reason, the removal of metal fragments has become a preliminary requirement to regenerate the slurry; in addition, the solid phase needs to be separated from the liquid phase after the dissolution PEG with the solvent. In the present study, magnetic separation and centrifugation methods were adopted for metals removal, followed by the analysis of some operating parameters such as: washing time, pH, and initial concentration of Silicon. Finally, analytical, morphological and basic methods were performed in order to evaluate the efficiency of the process undertaken.

High damage tolerance of electrochemically lithiated silicon

PubMed Central

Wang, Xueju; Fan, Feifei; Wang, Jiangwei; Wang, Haoran; Tao, Siyu; Yang, Avery; Liu, Yang; Beng Chew, Huck; Mao, Scott X.; Zhu, Ting; Xia, Shuman

2015-01-01

Mechanical degradation and resultant capacity fade in high-capacity electrode materials critically hinder their use in high-performance rechargeable batteries. Despite tremendous efforts devoted to the study of the electro–chemo–mechanical behaviours of high-capacity electrode materials, their fracture properties and mechanisms remain largely unknown. Here we report a nanomechanical study on the damage tolerance of electrochemically lithiated silicon. Our in situ transmission electron microscopy experiments reveal a striking contrast of brittle fracture in pristine silicon versus ductile tensile deformation in fully lithiated silicon. Quantitative fracture toughness measurements by nanoindentation show a rapid brittle-to-ductile transition of fracture as the lithium-to-silicon molar ratio is increased to above 1.5. Molecular dynamics simulations elucidate the mechanistic underpinnings of the brittle-to-ductile transition governed by atomic bonding and lithiation-induced toughening. Our results reveal the high damage tolerance in amorphous lithium-rich silicon alloys and have important implications for the development of durable rechargeable batteries. PMID:26400671

High damage tolerance of electrochemically lithiated silicon

NASA Astrophysics Data System (ADS)

Wang, Xueju; Fan, Feifei; Wang, Jiangwei; Wang, Haoran; Tao, Siyu; Yang, Avery; Liu, Yang; Beng Chew, Huck; Mao, Scott X.; Zhu, Ting; Xia, Shuman

2015-09-01

Mechanical degradation and resultant capacity fade in high-capacity electrode materials critically hinder their use in high-performance rechargeable batteries. Despite tremendous efforts devoted to the study of the electro-chemo-mechanical behaviours of high-capacity electrode materials, their fracture properties and mechanisms remain largely unknown. Here we report a nanomechanical study on the damage tolerance of electrochemically lithiated silicon. Our in situ transmission electron microscopy experiments reveal a striking contrast of brittle fracture in pristine silicon versus ductile tensile deformation in fully lithiated silicon. Quantitative fracture toughness measurements by nanoindentation show a rapid brittle-to-ductile transition of fracture as the lithium-to-silicon molar ratio is increased to above 1.5. Molecular dynamics simulations elucidate the mechanistic underpinnings of the brittle-to-ductile transition governed by atomic bonding and lithiation-induced toughening. Our results reveal the high damage tolerance in amorphous lithium-rich silicon alloys and have important implications for the development of durable rechargeable batteries.

High damage tolerance of electrochemically lithiated silicon

DOE PAGES

Wang, Xueju; Fan, Feifei; Wang, Jiangwei; ...

2015-09-24

Mechanical degradation and resultant capacity fade in high-capacity electrode materials critically hinder their use in high-performance rechargeable batteries. Despite tremendous efforts devoted to the study of the electro–chemo–mechanical behaviours of high-capacity electrode materials, their fracture properties and mechanisms remain largely unknown. In this paper, we report a nanomechanical study on the damage tolerance of electrochemically lithiated silicon. Our in situ transmission electron microscopy experiments reveal a striking contrast of brittle fracture in pristine silicon versus ductile tensile deformation in fully lithiated silicon. Quantitative fracture toughness measurements by nanoindentation show a rapid brittle-to-ductile transition of fracture as the lithium-to-silicon molar ratiomore » is increased to above 1.5. Molecular dynamics simulations elucidate the mechanistic underpinnings of the brittle-to-ductile transition governed by atomic bonding and lithiation-induced toughening. Finally, our results reveal the high damage tolerance in amorphous lithium-rich silicon alloys and have important implications for the development of durable rechargeable batteries.« less

Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors

PubMed Central

El-Mohri, Youcef; Antonuk, Larry E.; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A.; Lu, Jeng-Ping

2009-01-01

Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and∕or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of ∼10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical fill

Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors.

PubMed

El-Mohri, Youcef; Antonuk, Larry E; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A; Lu, Jeng-Ping

2009-07-01

Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and/or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of approximately 10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in

Characterization of nanometer-thick polycrystalline silicon with phonon-boundary scattering enhanced thermoelectric properties and its application in infrared sensors.

PubMed

Zhou, Huchuan; Kropelnicki, Piotr; Lee, Chengkuo

2015-01-14

Although significantly reducing the thermal conductivity of silicon nanowires has been reported, it remains a challenge to integrate silicon nanowires with structure materials and electrodes in the complementary metal-oxide-semiconductor (CMOS) process. In this paper, we investigated the thermal conductivity of nanometer-thick polycrystalline silicon (poly-Si) theoretically and experimentally. By leveraging the phonon-boundary scattering, the thermal conductivity of 52 nm thick poly-Si was measured as low as around 12 W mK(-1) which is only about 10% of the value of bulk single crystalline silicon. The ZT of n-doped and p-doped 52 nm thick poly-Si was measured as 0.067 and 0.024, respectively, while most previously reported data had values of about 0.02 and 0.01 for a poly-Si layer with a thickness of 0.5 μm and above. Thermopile infrared sensors comprising 128 pairs of thermocouples made of either n-doped or p-doped nanometer-thick poly-Si strips in a series connected by an aluminium (Al) metal interconnect layer are fabricated using microelectromechanical system (MEMS) technology. The measured vacuum specific detectivity (D*) of the n-doped and p-doped thermopile infrared (IR) sensors are 3.00 × 10(8) and 1.83 × 10(8) cm Hz(1/2) W(-1) for sensors of 52 nm thick poly-Si, and 5.75 × 10(7) and 3.95 × 10(7) cm Hz(1/2) W(-1) for sensors of 300 nm thick poly-Si, respectively. The outstanding thermoelectric properties indicate our approach is promising for diverse applications using ultrathin poly-Si technology.

High-performance silicon photonic tri-state switch based on balanced nested Mach-Zehnder interferometer.

PubMed

Lu, Zeqin; Celo, Dritan; Mehrvar, Hamid; Bernier, Eric; Chrostowski, Lukas

2017-09-25

This work proposes a novel silicon photonic tri-state (cross/bar/blocking) switch, featuring high-speed switching, broadband operation, and crosstalk-free performance. The switch is designed based on a 2 × 2 balanced nested Mach-Zehnder interferometer structure with carrier injection phase tuning. As compared to silicon photonic dual-state (cross/bar) switches based on Mach-Zehnder interferometers with carrier injection phase tuning, the proposed switch not only has better performance in cross/bar switching but also provides an extra blocking state. The unique blocking state has a great advantage in applications of N × N switch fabrics, where idle switching elements in the fabrics can be configured to the blocking state for crosstalk suppression. According to our numerical experiments on a fully loaded 8 × 8 dilated Banyan switch fabric, the worst output crosstalk of the 8 × 8 switch can be dramatically suppressed by more than 50 dB, by assigning the blocking state to idle switching elements in the fabric. The results of this work can extend the functionality of silicon photonic switches and significantly improve the performance of on-chip N × N photonic switching technologies.

A III-V nanowire channel on silicon for high-performance vertical transistors.

PubMed

Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

2012-08-09

Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

High-performance solid state supercapacitors assembling graphene interconnected networks in porous silicon electrode by electrochemical methods using 2,6-dihydroxynaphthalen.

PubMed

Romanitan, Cosmin; Varasteanu, Pericle; Mihalache, Iuliana; Culita, Daniela; Somacescu, Simona; Pascu, Razvan; Tanasa, Eugenia; Eremia, Sandra A V; Boldeiu, Adina; Simion, Monica; Radoi, Antonio; Kusko, Mihaela

2018-06-25

The challenge for conformal modification of the ultra-high internal surface of nanoporous silicon was tackled by electrochemical polymerisation of 2,6-dihydroxynaphthalene using cyclic voltammetry or potentiometry and, notably, after the thermal treatment (800 °C, N 2 , 4 h) an assembly of interconnected networks of graphene strongly adhering to nanoporous silicon matrix resulted. Herein we demonstrate the achievement of an easy scalable technology for solid state supercapacitors on silicon, with excellent electrochemical properties. Accordingly, our symmetric supercapacitors (SSC) showed remarkable performance characteristics, comparable to many of the best high-power and/or high-energy carbon-based supercapacitors, their figures of merit matching under battery-like supercapacitor behaviour. Furthermore, the devices displayed high specific capacity values along with enhanced capacity retention even at ultra-high rates for voltage sweep, 5 V/s, or discharge current density, 100 A/g, respectively. The cycling stability tests performed at relatively high discharge current density of 10 A/g indicated good capacity retention, with a superior performance demonstrated for the electrodes obtained under cyclic voltammetry approach, which may be ascribed on the one hand to a better coverage of the porous silicon substrate and, on the other hand, to an improved resilience of the hybrid electrode to pore clogging.

Analysis of twelve-month degradation in three polycrystalline photovoltaic modules

NASA Astrophysics Data System (ADS)

Lai, T.; Potter, B. G.; Simmons-Potter, K.

2016-09-01

Polycrystalline silicon photovoltaic (PV) modules have the advantage of lower manufacturing cost as compared to their monocrystalline counterparts, but generally exhibit both lower initial module efficiencies and more significant early-stage efficiency degradation than do similar monocrystalline PV modules. For both technologies, noticeable deterioration in power conversion efficiency typically occurs over the first two years of usage. Estimating PV lifetime by examining the performance degradation behavior under given environmental conditions is, therefore, one of continual goals for experimental research and economic analysis. In the present work, accelerated lifecycle testing (ALT) on three polycrystalline PV technologies was performed in a full-scale, industrial-standard environmental chamber equipped with single-sun irradiance capability, providing an illumination uniformity of 98% over a 2 x 1.6m area. In order to investigate environmental aging effects, timedependent PV performance (I-V characteristic) was evaluated over a recurring, compressed day-night cycle, which simulated local daily solar insolation for the southwestern United States, followed by dark (night) periods. During a total test time of just under 4 months that corresponded to a year equivalent exposure on a fielded module, the temperature and humidity varied in ranges from 3°C to 40°C and 5% to 85% based on annual weather profiles for Tucson, AZ. Removing the temperature de-rating effect that was clearly seen in the data enabled the computation of normalized efficiency degradation with time and environmental exposure. Results confirm the impact of environmental conditions on the module long-term performance. Overall, more than 2% efficiency degradation in the first year of usage was observed for all thee polycrystalline Si solar modules. The average 5-year degradation of each PV technology was estimated based on their determined degradation rates.

First performance results of the Phobos silicon detectors

NASA Astrophysics Data System (ADS)

Pernegger, H.; Back, B. B.; Baker, M. D.; Barton, D. S.; Betts, R. R.; Bindel, R.; Budzanowski, A.; Busza, W.; Carroll, A.; Decowski, M. P.; Garcia, E.; George, N.; Gulbrandsen, K.; Gushue, S.; Halliwell, C.; Hamblen, J.; Heintzelman, G. A.; Henderson, C.; Hołyński, R.; Hofman, D. J.; Holzman, B.; Johnson, E.; Kane, J. L.; Katzy, J.; Khan, N.; Kucewicz, W.; Kulinich, P.; Lin, W. T.; Manly, S.; McLeod, D.; Michalowski, J.; Mignerey, A.; Mülmenstädt, J.; Nouicer, R.; Olszewski, A.; Pak, R.; Park, I. C.; Reed, C.; Remsberg, L. P.; Reuter, M.; Roland, C.; Roland, G.; Rosenberg, L.; Sarin, P.; Sawicki, P.; Skulski, W.; Steadman, S. G.; Stephans, G. S. F.; Steinberg, P.; Stodulski, M.; Sukhanov, A.; Tang, J.-L.; Teng, R.; Trzupek, A.; Vale, C.; van Nieuwenhuizen, G. J.; Verdier, R.; Wadsworth, B.; Wolfs, F. L. H.; Wosiek, B.; Woźniak, K.; Wuosmaa, A. H.; Wysłouch, B.

2001-11-01

The Phobos experiment concluded its first year of operation at RHIC taking data in Au-Au nucleus collisions at s nn=65 GeV and 130 GeV/ nucleon pair. First preliminary results of the performances of our silicon detectors in the experiment are summarized. The Phobos experiment uses silicon pad detectors for both tracking and multiplicity measurements. The silicon sensors vary strongly in their pad geometry. In this paper, we compare the signal response, the signal uniformity and signal-to-noise performance as measured in the experiment for the different geometries. Additionally, we investigate effects of very high channel occupancy on the signal response.

Defect engineering and luminescence characterization in bulk and thin film polycrystalline silicon

NASA Astrophysics Data System (ADS)

Koshka, Yaroslav

The passivation of recombination centers and the monitoring of passivation efficiency are critical for successful utilization of polycrystalline silicon (poly-Si) in solar cells and in thin-film transistors. Two important classes of poly-Si-thin films and bulk wafers-can respond differently to passivation processes (hydrogenation efficiency, possibilities of extrinsic and intrinsic gettering, etc.) and demand different approaches to their characterization. The effect of photoluminescence (PL) enhancement using ultrasound treatment (UST) was studied in poly-Si and amorphous-Si films on glass. In addition to the previously documented growth of the 0.7 eV oxygen related band in poly-Si films, generation and dramatic enhancement of a new luminescence maximum at about 0.98 eV occurs in films containing a superposition of poly-Si and alpha-Si phases. A model of ultrasound stimulated hydrogen detrapping followed by hydrogen diffusion and passivation of non-radiative centers was developed. Room temperature photoluminescence (PL) mapping was used to monitor improvement of recombination properties in bulk photovoltaic poly-Si during solar cell fabrication. Analysis of the statistical distribution of the values of PL enhancement shows that the contribution of individual processing steps to the increasing PL are different in nature. A correlation between PL mapping and minority carrier diffusion length was performed and quantitatively described. A method of obtaining separate information about the recombination properties of the bulk and the p/n junction regions of solar cells was developed. The method is based on measurements of PL distribution under different biases applied to solar cells and under different intensities of the excitation light. A PL study at 0.8 eV spectral maximum and comparison with the band-to-band PL was performed. Influence of the defects responsible for the 0.8 eV defect band was insignificant in as-grown wafers. It was revealed, however, that these

A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

NASA Astrophysics Data System (ADS)

Ching-Lin Fan,; Yi-Yan Lin,; Jyu-Yu Chang,; Bo-Jhang Sun,; Yan-Wei Liu,

2010-06-01

This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (Δ VTH = ± 0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.

A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Yi-Yan; Chang, Jyu-Yu; Sun, Bo-Jhang; Liu, Yan-Wei

2010-06-01

This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (ΔVTH = ±0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.

Effects of a capping oxide layer on polycrystalline-silicon thin-film transistors fabricated by continuous-wave laser crystallization

NASA Astrophysics Data System (ADS)

Li, Yi-Shao; Wu, Chun-Yi; Chou, Chia-Hsin; Liao, Chan-Yu; Chuang, Kai-Chi; Luo, Jun-Dao; Li, Wei-Shuo; Cheng, Huang-Chung

2018-06-01

A tetraethyl-orthosilicate (TEOS) capping oxide was deposited by low-pressure chemical vapor deposition (LPCVD) on a 200-nm-thick amorphous Si (a-Si) film as a heat reservoir to improve the crystallinity and surface roughness of polycrystalline silicon (poly-Si) formed by continuous-wave laser crystallization (CLC). The effects of four thicknesses of the capping oxide layer to satisfy an antireflection condition, namely, 90, 270, 450, and 630 nm, were investigated. The largest poly-Si grain size of 2.5 × 20 µm2 could be achieved using a capping oxide layer with an optimal thickness of 450 nm. Moreover, poly-Si nanorod (NR) thin-film transistors (TFTs) fabricated using the aforementioned technique exhibited a superior electron field-effect mobility of 1093.3 cm2 V‑1 s‑1 and an on/off current ratio of 2.53 × 109.

Silicon homo-heterojunction solar cells: A promising candidate to realize high performance more stably

NASA Astrophysics Data System (ADS)

Tan, Miao; Zhong, Sihua; Wang, Wenjie; Shen, Wenzhong

2017-08-01

We have investigated the influences of diverse physical parameters on the performances of a silicon homo-heterojunction (H-H) solar cell, which encompasses both homojunction and heterojunction, together with their underlying mechanisms by the aid of AFORS-HET simulation. It is found that the performances of H-H solar cell are less sensitive to (i) the work function of the transparent conductive oxide layer, (ii) the interfacial density of states at the front hydrogenated amorphous silicon/crystalline silicon (a-Si:H/c-Si) interface, (iii) the peak dangling bond defect densities within the p-type a-Si:H (p-a-Si:H) layer, and (iv) the doping concentration of the p-a-Si:H layer, when compared to that of the conventional heterojunction with intrinsic thin layer (HIT) counterparts. These advantages are due to the fact that the interfacial recombination and the recombination within the a-Si:H region are less affected by all the above parameters, which fundamentally benefit from the field-effect passivation of the homojunction. Therefore, the design of H-H structure can provide an opportunity to produce high-efficiency solar cells more stably.

Polycrystalline ZrTe 5 Parametrized as a Narrow-Band-Gap Semiconductor for Thermoelectric Performance

DOE PAGES

Miller, Samuel A.; Witting, Ian; Aydemir, Umut; ...

2018-01-24

The transition-metal pentatellurides HfTe 5 and ZrTe 5 have been studied for their exotic transport properties with much debate over the transport mechanism, band gap, and cause of the resistivity behavior, including a large low-temperature resistivity peak. Single crystals grown by the chemical-vapor-transport method have shown an n-p transition of the Seebeck coefficient at the same temperature as a peak in the resistivity. We show that behavior similar to that of single crystals can be observed in iodine-doped polycrystalline samples but that undoped polycrystalline samples exhibit drastically different properties: they are p type over the entire temperature range. Additionally, themore » thermal conductivity for polycrystalline samples is much lower, 1.5 Wm -1 K -1, than previously reported for single crystals. It is found that the polycrystalline ZrTe 5 system can be modeled as a simple semiconductor with conduction and valence bands both contributing to transport, separated by a band gap of 20 meV. This model demonstrates to first order that a simple two-band model can explain the transition from n- to p-type behavior and the cause of the anomalous resistivity peak. Combined with the experimental data, the two-band model shows that carrier concentration variation is responsible for differences in behavior between samples. Using the two-band model, the thermoelectric performance at different doping levels is predicted, finding zT=0.2 and 0.1 for p and n type, respectively, at 300 K, and zT=0.23 and 0.32 for p and n type at 600 K. Given the reasonably high zT that is comparable in magnitude for both n and p type, a thermoelectric device with a single compound used for both legs is feasible.« less

Polycrystalline ZrTe5 Parametrized as a Narrow-Band-Gap Semiconductor for Thermoelectric Performance

NASA Astrophysics Data System (ADS)

Miller, Samuel A.; Witting, Ian; Aydemir, Umut; Peng, Lintao; Rettie, Alexander J. E.; Gorai, Prashun; Chung, Duck Young; Kanatzidis, Mercouri G.; Grayson, Matthew; Stevanović, Vladan; Toberer, Eric S.; Snyder, G. Jeffrey

2018-01-01

The transition-metal pentatellurides HfTe5 and ZrTe5 have been studied for their exotic transport properties with much debate over the transport mechanism, band gap, and cause of the resistivity behavior, including a large low-temperature resistivity peak. Single crystals grown by the chemical-vapor-transport method have shown an n -p transition of the Seebeck coefficient at the same temperature as a peak in the resistivity. We show that behavior similar to that of single crystals can be observed in iodine-doped polycrystalline samples but that undoped polycrystalline samples exhibit drastically different properties: they are p type over the entire temperature range. Additionally, the thermal conductivity for polycrystalline samples is much lower, 1.5 Wm-1 K-1 , than previously reported for single crystals. It is found that the polycrystalline ZrTe5 system can be modeled as a simple semiconductor with conduction and valence bands both contributing to transport, separated by a band gap of 20 meV. This model demonstrates to first order that a simple two-band model can explain the transition from n - to p -type behavior and the cause of the anomalous resistivity peak. Combined with the experimental data, the two-band model shows that carrier concentration variation is responsible for differences in behavior between samples. Using the two-band model, the thermoelectric performance at different doping levels is predicted, finding z T =0.2 and 0.1 for p and n type, respectively, at 300 K, and z T =0.23 and 0.32 for p and n type at 600 K. Given the reasonably high z T that is comparable in magnitude for both n and p type, a thermoelectric device with a single compound used for both legs is feasible.

Polycrystalline ZrTe 5 Parametrized as a Narrow-Band-Gap Semiconductor for Thermoelectric Performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

Miller, Samuel A.; Witting, Ian; Aydemir, Umut

The transition-metal pentatellurides HfTe 5 and ZrTe 5 have been studied for their exotic transport properties with much debate over the transport mechanism, band gap, and cause of the resistivity behavior, including a large low-temperature resistivity peak. Single crystals grown by the chemical-vapor-transport method have shown an n-p transition of the Seebeck coefficient at the same temperature as a peak in the resistivity. We show that behavior similar to that of single crystals can be observed in iodine-doped polycrystalline samples but that undoped polycrystalline samples exhibit drastically different properties: they are p type over the entire temperature range. Additionally, themore » thermal conductivity for polycrystalline samples is much lower, 1.5 Wm -1 K -1, than previously reported for single crystals. It is found that the polycrystalline ZrTe 5 system can be modeled as a simple semiconductor with conduction and valence bands both contributing to transport, separated by a band gap of 20 meV. This model demonstrates to first order that a simple two-band model can explain the transition from n- to p-type behavior and the cause of the anomalous resistivity peak. Combined with the experimental data, the two-band model shows that carrier concentration variation is responsible for differences in behavior between samples. Using the two-band model, the thermoelectric performance at different doping levels is predicted, finding zT=0.2 and 0.1 for p and n type, respectively, at 300 K, and zT=0.23 and 0.32 for p and n type at 600 K. Given the reasonably high zT that is comparable in magnitude for both n and p type, a thermoelectric device with a single compound used for both legs is feasible.« less

Microscopic studies of polycrystalline nanoparticle growth in free space

NASA Astrophysics Data System (ADS)

Mohan, A.; Kaiser, M.; Verheijen, M. A.; Schropp, R. E. I.; Rath, J. K.

2017-06-01

We have extensively studied by multiple microscopic techniques the growth and crystallization of silicon nanoparticles in pulsed SiH4/Ar plasmas. We observe that the crystallinity of the particles can be tuned from amorphous to crystalline by altering the plasma ON time, tON. Three phases can be identified as a function of tON. Microscopic studies reveal that, in the initial gas phase (phase I) single particles of polycrystalline nature are formed which according to our hypothesis grow out of a single nucleus. The individual crystallites of the polycrystalline particles become bigger crystalline regions which marks the onset of cauliflower shaped particles (phase II). At longer tON (phase III) distinct cauliflower particles are formed by the growth of these crystalline regions by local epitaxy.

Progress with polycrystalline silicon thin-film solar cells on glass at UNSW

NASA Astrophysics Data System (ADS)

Aberle, Armin G.

2006-01-01

Polycrystalline Si (pc-Si) thin-film solar cells on glass have long been considered a very promising approach for lowering the cost of photovoltaic (PV) solar electricity. In recent years there have been dramatic advances with this PV technology, and the first commercial modules (CSG Solar) are expected to hit the marketplace in 2006. The CSG modules are based on solid-phase crystallisation of plasma-enhanced chemical vapor deposition (PECVD) -deposited amorphous Si. Independent research in the author's group at the University of New South Wales (UNSW) during recent years has led to the development of three alternative pc-Si thin-film solar cells on glass—EVA, ALICIA and ALICE. Cell thickness is generally about 2 μm. The first two cells are made by vacuum evaporation, whereas ALICE cells can be made by either vacuum evaporation or PECVD. Evaporation has the advantage of being a fast and inexpensive Si deposition method. A crucial component of ALICIA and ALICE cells is a seed layer made on glass by metal-induced crystallisation of amorphous silicon (a-Si). The absorber layer of these cells is made by either ion-assisted Si epitaxy (ALICIA) or solid-phase epitaxy of a-Si (ALICE). This paper reports on the status of these three new thin-film PV technologies. All three solar cells seem to be capable of voltages of over 500 mV and, owing to their potentially inexpensive and scalable fabrication process, have significant industrial appeal.

Development of a Self Aligned CMOS Process for Flash Lamp Annealed Polycrystalline Silicon TFTs

NASA Astrophysics Data System (ADS)

Bischoff, Paul

The emerging active matrix liquid crystal (AMLCD) display market requires a high performing semiconductor material to meet rising standards of operation. Currently amorphous silicon (a-Si) dominates the market but it does not have the required mobility for it to be used in AMLCD manufacturing. Other materials have been developed including crystallizing a-Si into poly-silicon. A new approach to crystallization through the use of flash lamp annealing (FLA) decreases manufacturing time and greatly improves carrier mobility. Previous work on FLA silicon for the use in CMOS transistors revealed significant lateral dopant diffusion into the channel greatly increasing the minimum channel length required for a working device. This was further confounded by the gate overlap due to misalignment during lithography patterning steps. Through the use of furnace dopant activation instead of FLA dopant activation and a self aligned gate the minimum size transistor can be greatly reduced. A new lithography mask and process flow were developed for the furnace annealing and self aligned gate. Fabrication of the self aligned devices resulted in oxidation of the Molybdenum self aligned gate. Further development is needed to successfully manufacture these devices. Non-self aligned transistors were made simultaneously with self aligned devices and used the furnace activation. These devices showed an increase in sheet resistance from 250 O to 800 O and lower mobility from 380 to 40.2 V/cm2s. The lower mobility can be contributed to an increase in implanted trap density indicating furnace annealing is an inferior activation method over FLA. The minimum transistor size however was reduced from 20 to 5 mum. With improvements in the self aligned process high performing small devices can be manufactured.

Characterization of a fully depleted CCD on high-resistivity silicon

NASA Astrophysics Data System (ADS)

Stover, Richard J.; Wei, Mingzhi; Lee, Y.; Gilmore, David K.; Holland, S. E.; Groom, D. E.; Moses, William W.; Perlmutter, Saul; Goldhaber, G.; Pennypacker, C.; Wang, N. W.; Palaio, N.

1997-04-01

Most scientific CCD imagers are fabricated on 30-50 (Omega) - cm epitaxial silicon. When illuminated form the front side of the device they generally have low quantum efficiency in the blue region of the visible spectrum because of strong absorption in the polycrystalline silicon gates as well as poor quantum efficiency in the far red and near infrared region of the spectrum because of the shallow depletion depth of the low-resistivity silicon. To enhance the blue response of scientific CCDs they are often thinned and illuminated from the back side. While blue response is greatly enhanced by this process, it is expensive and it introduces additional problems for the red end of the spectrum. A typical thinned CCD is 15 to 25 micrometers thick, and at wavelengths beyond about 800 nm the absorption depth becomes comparable to the thickness of the device, leading to interference fringes from reflected light. Because these interference fringes are of high order, the spatial pattern of the fringes is extremely sensitive to small changes in the optical illumination of the detector. Calibration and removal of the effects of the fringes is one of the primary limitations on the performance of astronomical images taken at wavelengths of 800 nm or more. In this paper we present results from the characterization of a CCD which promises to address many of the problems of typical thinned CCDs. The CCD reported on here was fabricated at Lawrence Berkeley National Laboratory (LBNL) on a 10-12 K$OMega-cm n-type silicon substrate.THe CCD is a 200 by 200 15-micrometers square pixel array, and due to the very high resistivity of the starting material, the entire 300 micrometers substrate is depleted. Full depletion works because of the gettering technology developed at LBNL which keeps leakage current down. Both front-side illuminated and backside illuminated devices have been tested. We have measured quantum efficiency, read-noise, full-well, charge-transfer efficiency, and leakage

On the development status of high performance silicon pore optics for future x-ray telescopes

NASA Astrophysics Data System (ADS)

Kraft, Stefan; Collon, M.; Günther, R.; Partapsing, R.; Beijersbergen, M.; Bavdaz, M.; Lumb, D.; Peacock, A.; Wallace, K.

2017-11-01

Silicon pore optics have been proposed earlier as modular optical X-ray units in large Wolter-I telescopes that would match effective area and resolution requirements imposed by missions such as XEUS. Since then the optics have been developed further and the feasibility of the production of high-performance pore optics has been demonstrated. Optimisation of both the production and the assembly process allowed the generation of optics with larger areas with improved imaging performance. Silicon pore optics can now be manufactured with properties required for future X-ray telescopes. A suitable design that allows the implementation of pore optics into X-ray Optical Units in Wolter-I configuration was recently derived including an appropriate telescope mounting structure with interfaces for the individual components. The development status, the achieved performance and the requirements regarding future mirror production, optics assembly and related metrology for its characterisation are presented.

High-Performance and Traditional Multicrystalline Silicon: Comparing Gettering Responses and Lifetime-Limiting Defects

DOE Office of Scientific and Technical Information (OSTI.GOV)

Castellanos, Sergio; Ekstrom, Kai E.; Autruffe, Antoine

2016-05-01

In recent years, high-performance multicrystalline silicon (HPMC-Si) has emerged as an attractive alternative to traditional ingot-based multicrystalline silicon (mc-Si), with a similar cost structure but improved cell performance. Herein, we evaluate the gettering response of traditional mc-Si and HPMC-Si. Microanalytical techniques demonstrate that HPMC-Si and mc-Si share similar lifetime-limiting defect types but have different relative concentrations and distributions. HPMC-Si shows a substantial lifetime improvement after P-gettering compared with mc-Si, chiefly because of lower area fraction of dislocation-rich clusters. In both materials, the dislocation clusters and grain boundaries were associated with relatively higher interstitial iron point-defect concentrations after diffusion, which ismore » suggestive of dissolving metal-impurity precipitates. The relatively fewer dislocation clusters in HPMC-Si are shown to exhibit similar characteristics to those found in mc-Si. Given similar governing principles, a proxy to determine relative recombination activity of dislocation clusters developed for mc-Si is successfully transferred to HPMC-Si.« less

High fidelity polycrystalline CdTe/CdS heterostructures via molecular dynamics

DOE PAGES

Aguirre, Rodolfo; Chavez, Jose Juan; Zhou, Xiaowang; ...

2017-06-20

Molecular dynamics simulations of polycrystalline growth of CdTe/CdS heterostructures have been performed. First, CdS was deposited on an amorphous CdS substrate, forming a polycrystalline film. Subsequently, CdTe was deposited on top of the polycrystalline CdS film. Cross-sectional images show grain formation at early stages of the CdS growth. During CdTe deposition, the CdS structure remains almost unchanged. Concurrently, CdTe grain boundary motion was detected after the first 24.4 nanoseconds of CdTe deposition. With the elapse of time, this grain boundary pins along the CdS/CdTe interface, leaving only a small region of epitaxial growth. CdTe grains are larger than CdS grainsmore » in agreement with experimental observations in the literature. Crystal phase analysis shows that zinc blende structure dominates over the wurtzite structure inside both CdS and CdTe grains. Composition analysis shows Te and S diffusion to the CdS and CdTe films, respectively. Lastly, these simulated results may stimulate new ideas for studying and improving CdTe solar cell efficiency.« less

Surface damage on polycrystalline β-SiC by xenon ion irradiation at high fluence

NASA Astrophysics Data System (ADS)

Baillet, J.; Gavarini, S.; Millard-Pinard, N.; Garnier, V.; Peaucelle, C.; Jaurand, X.; Duranti, A.; Bernard, C.; Rapegno, R.; Cardinal, S.; Escobar Sawa, L.; De Echave, T.; Lanfant, B.; Leconte, Y.

2018-05-01

Polycrystalline β-silicon carbide (β-SiC) pellets were prepared by Spark Plasma Sintering (SPS). These were implanted at room temperature with 800 keV xenon at ion fluences of 5.1015 and 1.1017 cm-2. Microstructural modifications were studied by electronic microscopy (TEM and SEM) and xenon profiles were determined by Rutherford Backscattering Spectroscopy (RBS). A complete amorphization of the implanted area associated with a significant oxidation is observed for the highest fluence. Large xenon bubbles formed in the oxide phase are responsible of surface swelling. No significant gas release has been measured up to 1017 at.cm-2. A model is proposed to explain the different steps of the oxidation process and xenon bubbles formation as a function of ion fluence.

Calculation of Debye-Scherrer diffraction patterns from highly stressed polycrystalline materials

DOE PAGES

MacDonald, M. J.; Vorberger, J.; Gamboa, E. J.; ...

2016-06-07

Calculations of Debye-Scherrer diffraction patterns from polycrystalline materials have typically been done in the limit of small deviatoric stresses. Although these methods are well suited for experiments conducted near hydrostatic conditions, more robust models are required to diagnose the large strain anisotropies present in dynamic compression experiments. A method to predict Debye-Scherrer diffraction patterns for arbitrary strains has been presented in the Voigt (iso-strain) limit. Here, we present a method to calculate Debye-Scherrer diffraction patterns from highly stressed polycrystalline samples in the Reuss (iso-stress) limit. This analysis uses elastic constants to calculate lattice strains for all initial crystallite orientations, enablingmore » elastic anisotropy and sample texture effects to be modeled directly. Furthermore, the effects of probing geometry, deviatoric stresses, and sample texture are demonstrated and compared to Voigt limit predictions. An example of shock-compressed polycrystalline diamond is presented to illustrate how this model can be applied and demonstrates the importance of including material strength when interpreting diffraction in dynamic compression experiments.« less

Calculation of Debye-Scherrer diffraction patterns from highly stressed polycrystalline materials

DOE Office of Scientific and Technical Information (OSTI.GOV)

MacDonald, M. J., E-mail: macdonm@umich.edu; SLAC National Accelerator Laboratory, Menlo Park, California 94025; Vorberger, J.

2016-06-07

Calculations of Debye-Scherrer diffraction patterns from polycrystalline materials have typically been done in the limit of small deviatoric stresses. Although these methods are well suited for experiments conducted near hydrostatic conditions, more robust models are required to diagnose the large strain anisotropies present in dynamic compression experiments. A method to predict Debye-Scherrer diffraction patterns for arbitrary strains has been presented in the Voigt (iso-strain) limit [Higginbotham, J. Appl. Phys. 115, 174906 (2014)]. Here, we present a method to calculate Debye-Scherrer diffraction patterns from highly stressed polycrystalline samples in the Reuss (iso-stress) limit. This analysis uses elastic constants to calculate latticemore » strains for all initial crystallite orientations, enabling elastic anisotropy and sample texture effects to be modeled directly. The effects of probing geometry, deviatoric stresses, and sample texture are demonstrated and compared to Voigt limit predictions. An example of shock-compressed polycrystalline diamond is presented to illustrate how this model can be applied and demonstrates the importance of including material strength when interpreting diffraction in dynamic compression experiments.« less

Development and evaluation of polycrystalline cadmium telluride dosimeters for accurate quality assurance in radiation therapy

NASA Astrophysics Data System (ADS)

Oh, K.; Han, M.; Kim, K.; Heo, Y.; Moon, C.; Park, S.; Nam, S.

2016-02-01

For quality assurance in radiation therapy, several types of dosimeters are used such as ionization chambers, radiographic films, thermo-luminescent dosimeter (TLD), and semiconductor dosimeters. Among them, semiconductor dosimeters are particularly useful for in vivo dosimeters or high dose gradient area such as the penumbra region because they are more sensitive and smaller in size compared to typical dosimeters. In this study, we developed and evaluated Cadmium Telluride (CdTe) dosimeters, one of the most promising semiconductor dosimeters due to their high quantum efficiency and charge collection efficiency. Such CdTe dosimeters include single crystal form and polycrystalline form depending upon the fabrication process. Both types of CdTe dosimeters are commercially available, but only the polycrystalline form is suitable for radiation dosimeters, since it is less affected by volumetric effect and energy dependence. To develop and evaluate polycrystalline CdTe dosimeters, polycrystalline CdTe films were prepared by thermal evaporation. After that, CdTeO3 layer, thin oxide layer, was deposited on top of the CdTe film by RF sputtering to improve charge carrier transport properties and to reduce leakage current. Also, the CdTeO3 layer which acts as a passivation layer help the dosimeter to reduce their sensitivity changes with repeated use due to radiation damage. Finally, the top and bottom electrodes, In/Ti and Pt, were used to have Schottky contact. Subsequently, the electrical properties under high energy photon beams from linear accelerator (LINAC), such as response coincidence, dose linearity, dose rate dependence, reproducibility, and percentage depth dose, were measured to evaluate polycrystalline CdTe dosimeters. In addition, we compared the experimental data of the dosimeter fabricated in this study with those of the silicon diode dosimeter and Thimble ionization chamber which widely used in routine dosimetry system and dose measurements for radiation

Graphene Caging Silicon Particles for High-Performance Lithium-Ion Batteries.

PubMed

Nie, Ping; Le, Zaiyuan; Chen, Gen; Liu, Dan; Liu, Xiaoyan; Wu, Hao Bin; Xu, Pengcheng; Li, Xinru; Liu, Fang; Chang, Limin; Zhang, Xiaogang; Lu, Yunfeng

2018-06-01

Silicon holds great promise as an anode material for lithium-ion batteries with higher energy density; its implication, however, is limited by rapid capacity fading. A catalytic growth of graphene cages on composite particles of magnesium oxide and silicon, which are made by magnesiothermic reduction reaction of silica particles, is reported herein. Catalyzed by the magnesium oxide, graphene cages can be conformally grown onto the composite particles, leading to the formation of hollow graphene-encapsulated Si particles. Such materials exhibit excellent lithium storage properties in terms of high specific capacity, remarkable rate capability (890 mAh g -1 at 5 A g -1 ), and good cycling retention over 200 cycles with consistently high coulombic efficiency at a current density of 1 A g -1 . A full battery test using LiCoO 2 as the cathode demonstrates a high energy density of 329 Wh kg -1 . © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Polycrystalline ZrTe{sub 5} Parameterized as a Narrow Band Gap Semiconductor for Thermoelectric Performance.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Miller, Samuel A.; Witting, Ian; Aydemir, Umut

The transition-metal pentatellurides HfTe5 and ZrTe5 have been studied for their exotic transport properties with much debate over the transport mechanism, band gap, and cause of the resistivity behavior, including a large low-temperature resistivity peak. Single crystals grown by the chemical-vapor-transport method have shown an n-p transition of the Seebeck coefficient at the same temperature as a peak in the resistivity. We show that behavior similar to that of single crystals can be observed in iodine-doped polycrystalline samples but that undoped polycrystalline samples exhibit drastically different properties: they are p type over the entire temperature range. Additionally, the thermal conductivitymore » for polycrystalline samples is much lower, 1.5 Wm -1 K -1, than previously reported for single crystals. It is found that the polycrystalline ZrTe 5 system can be modeled as a simple semiconductor with conduction and valence bands both contributing to transport, separated by a band gap of 20 meV. This model demonstrates to first order that a simple two-band model can explain the transition from n- to p-type behavior and the cause of the anomalous resistivity peak. Combined with the experimental data, the two-band model shows that carrier concentration variation is responsible for differences in behavior between samples. Using the twoband model, the thermoelectric performance at different doping levels is predicted, finding zT =0.2 and 0.1 for p and n type, respectively, at 300 K, and zT= 0.23 and 0.32 for p and n type at 600 K. Given the reasonably high zT that is comparable in magnitude for both n and p type, a thermoelectric device with a single compound used for both legs is feasible.« less

High-sensitivity silicon nanowire phototransistors

NASA Astrophysics Data System (ADS)

Tan, Siew Li; Zhao, Xingyan; Dan, Yaping

2014-08-01

Silicon nanowires (SiNWs) have emerged as a promising material for high-sensitivity photodetection in the UV, visible and near-infrared spectral ranges. In this work, we demonstrate novel planar SiNW phototransistors on silicon-oninsulator (SOI) substrate using CMOS-compatible processes. The device consists of a bipolar transistor structure with an optically-injected base region. The electronic and optical properties of the SiNW phototransistors are investigated. Preliminary simulation and experimental results show that nanowire geometry, doping densities and surface states have considerable effects on the device performance, and that a device with optimized parameters can potentially outperform conventional Si photodetectors.

Transmutation doping of silicon solar cells

NASA Technical Reports Server (NTRS)

Wood, R. F.; Westbrook, R. D.; Young, R. T.; Cleland, J. W.

1977-01-01

Normal isotopic silicon contains 3.05% of Si-30 which transmutes to P-31 after thermal neutron absorption, with a half-life of 2.6 hours. This reaction is used to introduce extremely uniform concentrations of phosphorus into silicon, thus eliminating the areal and spatial inhomogeneities characteristic of chemical doping. Annealing of the lattice damage in the irradiated silicon does not alter the uniformity of dopant distribution. Transmutation doping also makes it possible to introduce phosphorus into polycrystalline silicon without segregation of the dopant at the grain boundaries. The use of neutron transmutation doped (NTD) silicon in solar cell research and development is discussed.

Laser-induced phase separation of silicon carbide

PubMed Central

Choi, Insung; Jeong, Hu Young; Shin, Hyeyoung; Kang, Gyeongwon; Byun, Myunghwan; Kim, Hyungjun; Chitu, Adrian M.; Im, James S.; Ruoff, Rodney S.; Choi, Sung-Yool; Lee, Keon Jae

2016-01-01

Understanding the phase separation mechanism of solid-state binary compounds induced by laser–material interaction is a challenge because of the complexity of the compound materials and short processing times. Here we present xenon chloride excimer laser-induced melt-mediated phase separation and surface reconstruction of single-crystal silicon carbide and study this process by high-resolution transmission electron microscopy and a time-resolved reflectance method. A single-pulse laser irradiation triggers melting of the silicon carbide surface, resulting in a phase separation into a disordered carbon layer with partially graphitic domains (∼2.5 nm) and polycrystalline silicon (∼5 nm). Additional pulse irradiations cause sublimation of only the separated silicon element and subsequent transformation of the disordered carbon layer into multilayer graphene. The results demonstrate viability of synthesizing ultra-thin nanomaterials by the decomposition of a binary system. PMID:27901015

Silicon Carbide Nanotube Oxidation at High Temperatures

NASA Technical Reports Server (NTRS)

Ahlborg, Nadia; Zhu, Dongming

2012-01-01

Silicon Carbide Nanotubes (SiCNTs) have high mechanical strength and also have many potential functional applications. In this study, SiCNTs were investigated for use in strengthening high temperature silicate and oxide materials for high performance ceramic nanocomposites and environmental barrier coating bond coats. The high · temperature oxidation behavior of the nanotubes was of particular interest. The SiCNTs were synthesized by a direct reactive conversion process of multiwall carbon nanotubes and silicon at high temperature. Thermogravimetric analysis (TGA) was used to study the oxidation kinetics of SiCNTs at temperatures ranging from 800degC to1300degC. The specific oxidation mechanisms were also investigated.

Deformation and fracture of single-crystal and sintered polycrystalline silicon carbide produced by cavitation

NASA Technical Reports Server (NTRS)

Miyoshi, Kazuhisa; Hattori, Shuji; Okada, Tsunenori; Buckley, Donald H.

1987-01-01

An investigation was conducted to examine the deformation and fracture behavior of single-crystal and sintered polycrystalline SiC surfaces exposed to cavitation. Cavitation erosion experiments were conducted in distilled water at 25 C by using a magnetostrictive oscillator in close proximity (1 mm) to the surface of SiC. The horn frequency was 20 kHz, and the double amplitude of the vibrating disk was 50 microns. The results of the investigation indicate that the SiC (0001) surface could be deformed in a plastic manner during cavitation. Dislocation etch pits were formed when the surface was chemically etched. The number of defects, including dislocations in the SiC (0001) surface, increased with increasing exposure time to cavitation. The presence of intrinsic defects such as voids in the surficial layers of the sintered polycrystalline SiC determined the zones at which fractured grains and fracture pits (pores) were generated. Single-crystal SiC had superior erosion resistance to that of sintered polycrystalline SiC.

Deformation and fracture of single-crystal and sintered polycrystalline silicon carbide produced by cavitation

NASA Technical Reports Server (NTRS)

Miyoshi, Kazuhisa; Hattori, Shuji; Okada, Tsunenori; Buckley, Donald H.

1989-01-01

An investigation was conducted to examine the deformation and fracture behavior of single-crystal and sintered polycrystalline SiC surfaces exposed to cavitation. Cavitation erosion experiments were conducted in distilled water at 25 C by using a magnetostrictive oscillator in close proximity (1 mm) to the surface of SiC. The horn frequency was 20 kHz, and the double amplitude of the vibrating disk was 50 microns. The results of the investigation indicate that the SiC (0001) surface could be deformed in a plastic manner during cavitation. Dislocation etch pits were formed when the surface was chemically etched. The number of defects, including dislocations in SiC (0001) surface, increased with increasing exposure time to cavitation. The presence of intrinsic defects such as voids in the surficial layers of the sintered polycrystalline SiC determined the zones at which fractured grains and fracture pits (pores) were generated. Single-crystal SiC had superior erosion resistance to that of sintered polycrystalline SiC.

Processing of crack-free high density polycrystalline LiTaO3 ceramics

DOE PAGES

Chen, Ching-Fong; Brennecka, Geoff L.; King, Graham; ...

2016-11-04

Our work achieved high density (99.9%) polycrystalline LiTaO 3. The keys to the high density without cracking were the use of LiF-assisted densification to maintain fine grain size as well as the presence of secondary lithium aluminate phases as grain growth inhibitors. The average grain size of the hot pressed polycrystalline LiTaO 3 is less than 5 μm, limiting residual stresses caused by the anisotropic thermal expansion. Dilatometry results clearly indicate liquid phase sintering via the added LiF sintering aid. Efficient liquid phase sintering allows densification during low temperature hot pressing. Electron microscopy confirmed the high-density microstructure. Furthermore, Rietveld analysismore » of neutron diffraction data revealed the presence of LiAlO 2 and LiAl 5O 8 minority phases and negligible substitutional defect incorporation in LiTaO 3.« less

Silicon solar cell performance deposited by diamond like carbon thin film ;Atomic oxygen effects;

NASA Astrophysics Data System (ADS)

Aghaei, Abbas Ail; Eshaghi, Akbar; Karami, Esmaeil

2017-09-01

In this research, a diamond-like carbon thin film was deposited on p-type polycrystalline silicon solar cell via plasma-enhanced chemical vapor deposition method by using methane and hydrogen gases. The effect of atomic oxygen on the functioning of silicon coated DLC thin film and silicon was investigated. Raman spectroscopy, field emission scanning electron microscopy, atomic force microscopy and attenuated total reflection-Fourier transform infrared spectroscopy were used to characterize the structure and morphology of the DLC thin film. Photocurrent-voltage characteristics of the silicon solar cell were carried out using a solar simulator. The results showed that atomic oxygen exposure induced the including oxidation, structural changes, cross-linking reactions and bond breaking of the DLC film; thus reducing the optical properties. The photocurrent-voltage characteristics showed that although the properties of the fabricated thin film were decreased after being exposed to destructive rays, when compared with solar cell without any coating, it could protect it in atomic oxygen condition enhancing solar cell efficiency up to 12%. Thus, it can be said that diamond-like carbon thin layer protect the solar cell against atomic oxygen exposure.

Silicon-on Ceramic Process: Silicon Sheet Growth and Device Development for the Large-area Silicon Sheet and Cell Development Tasks of the Low-cost Solar Array Project

NASA Technical Reports Server (NTRS)

Chapman, P. W.; Zook, J. D.; Heaps, J. D.; Grung, B. L.; Koepke, B.; Schuldt, S. B.

1979-01-01

The technical and economic feasibility of producing solar cell-quality silicon was investigated. This was done by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. Significant progress in the following areas was demonstrated: (1) fabricating a 10 sq cm cell having 9.9 percent conversion efficiency; (2) producing a 225 sq cm layer of sheet silicon; and (3) obtaining 100 microns thick coatings at pull speed of 0.15 cm/sec, although approximately 50 percent of the layer exhibited dendritic growth.

High-performance terahertz wave absorbers made of silicon-based metamaterials

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yin, Sheng; Zhu, Jianfei; Jiang, Wei

2015-08-17

Electromagnetic (EM) wave absorbers with high efficiency in different frequency bands have been extensively investigated for various applications. In this paper, we propose an ultra-broadband and polarization-insensitive terahertz metamaterial absorber based on a patterned lossy silicon substrate. Experimentally, a large absorption efficiency more than 95% in a frequency range of 0.9–2.5 THz was obtained up to a wave incident angle as large as 70°. Much broader absorption bandwidth and excellent oblique incidence absorption performance are numerically demonstrated. The underlying mechanisms due to the combination of a waveguide cavity mode and impedance-matched diffraction are analyzed in terms of the field patternsmore » and the scattering features. The monolithic THz absorber proposed here may find important applications in EM energy harvesting systems such as THz barometer or biosensor.« less

Progress in performance enhancement methods for capacitive silicon resonators

NASA Astrophysics Data System (ADS)

Van Toan, Nguyen; Ono, Takahito

2017-11-01

In this paper, we review the progress in recent studies on the performance enhancement methods for capacitive silicon resonators. We provide information on various fabrication technologies and design considerations that can be employed to improve the performance of capacitive silicon resonators, including low motional resistance, small insertion loss, and high quality factor (Q). This paper contains an overview of device structures and working principles, fabrication technologies consisting of hermetic packaging, deep reactive-ion etching and neutral beam etching, and design considerations including mechanically coupled, movable electrode structures and piezoresistive heat engines.

Synthesis of silane and silicon in a non-equilibrium plasma jet

NASA Technical Reports Server (NTRS)

Calcote, H. F.; Felder, W.

1977-01-01

The feasibility of using a non-equilibrium hydrogen plasma jet as a chemical synthesis tool was investigated. Four possible processes were identified for further study: (1) production of polycrystalline silicon photovoltaic surfaces, (2) production of SiHCl3 from SiCl4, (3) production of SiH4 from SiHCl3, and (4) purification of SiCl4 by metal impurity nucleation. The most striking result was the recognition that the strongly adhering silicon films, amorphous or polycrystalline, produced in our studies could be the basis for preparing a photovoltaic surface directly; this process has potential advantages over other vapor deposition processes.

Low-voltage high-performance silicon photonic devices and photonic integrated circuits operating up to 30 Gb/s.

PubMed

Kim, Gyungock; Park, Jeong Woo; Kim, In Gyoo; Kim, Sanghoon; Kim, Sanggi; Lee, Jong Moo; Park, Gun Sik; Joo, Jiho; Jang, Ki-Seok; Oh, Jin Hyuk; Kim, Sun Ae; Kim, Jong Hoon; Lee, Jun Young; Park, Jong Moon; Kim, Do-Won; Jeong, Deog-Kyoon; Hwang, Moon-Sang; Kim, Jeong-Kyoum; Park, Kyu-Sang; Chi, Han-Kyu; Kim, Hyun-Chang; Kim, Dong-Wook; Cho, Mu Hee

2011-12-19

We present high performance silicon photonic circuits (PICs) defined for off-chip or on-chip photonic interconnects, where PN depletion Mach-Zehnder modulators and evanescent-coupled waveguide Ge-on-Si photodetectors were monolithically integrated on an SOI wafer with CMOS-compatible process. The fabricated silicon PIC(off-chip) for off-chip optical interconnects showed operation up to 30 Gb/s. Under differential drive of low-voltage 1.2 V(pp), the integrated 1 mm-phase-shifter modulator in the PIC(off-chip) demonstrated an extinction ratio (ER) of 10.5dB for 12.5 Gb/s, an ER of 9.1dB for 20 Gb/s, and an ER of 7.2 dB for 30 Gb/s operation, without adoption of travelling-wave electrodes. The device showed the modulation efficiency of V(π)L(π) ~1.59 Vcm, and the phase-shifter loss of 3.2 dB/mm for maximum optical transmission. The Ge photodetector, which allows simpler integration process based on reduced pressure chemical vapor deposition exhibited operation over 30 Gb/s with a low dark current of 700 nA at -1V. The fabricated silicon PIC(intra-chip) for on-chip (intra-chip) photonic interconnects, where the monolithically integrated modulator and Ge photodetector were connected by a silicon waveguide on the same chip, showed on-chip data transmissions up to 20 Gb/s, indicating potential application in future silicon on-chip optical network. We also report the performance of the hybrid silicon electronic-photonic IC (EPIC), where a PIC(intra-chip) chip and 0.13μm CMOS interface IC chips were hybrid-integrated.

Carrier Transport, Recombination, and the Effects of Grain Boundaries in Polycrystalline Cadmium Telluride Thin Films for Photovoltaics

NASA Astrophysics Data System (ADS)

Tuteja, Mohit

Cadmium Telluride (CdTe), a chalcogenide semiconductor, is currently used as the absorber layer in one of the highest efficiency thin film solar cell technologies. Current efficiency records are over 22%. In 2011, CdTe solar cells accounted for 8% of all solar cells installed. This is because, in part, CdTe has a low degradation rate, high optical absorption coefficient, and high tolerance to intrinsic defects. Solar cells based on polycrystalline CdTe exhibit a higher short-circuit current, fill factor, and power conversion efficiency than their single crystal counterparts. This is despite the fact that polycrystalline CdTe devices exhibit lower open-circuit voltages. This is contrary to the observation for silicon and III-V semiconductors, where material defects cause a dramatic drop in device performance. For example, grain boundaries in covalently-bonded semiconductors (a) act as carrier recombination centers, and (b) lead to localized energy states, causing carrier trapping. Despite significant research to date, the mechanism responsible for the superior current collection properties of polycrystalline CdTe solar cells has not been conclusively answered. This dissertation focuses on the macro-scale electronic band structure, and micro scale electronic properties of grains and grain boundaries in device-grade CdTe thin films to answer this open question. My research utilized a variety of experimental techniques. Samples were obtained from leading groups fabricating the material and devices. A CdCl 2 anneal is commonly performed as part of this fabrication and its effects were also investigated. Photoluminescence (PL) spectroscopy was employed to study the band structure and defect states in CdTe polycrystals. Cadmium vacancy- and chlorine-related states lead to carrier recombination, as in CdTe films grown by other methods. Comparing polycrystalline and single crystal CdTe, showed that the key to explaining the improved performance of polycrystalline CdTe does

High-performance, low-voltage electroosmotic pumps with molecularly thin silicon nanomembranes

PubMed Central

Snyder, Jessica L.; Getpreecharsawas, Jirachai; Fang, David Z.; Gaborski, Thomas R.; Striemer, Christopher C.; Fauchet, Philippe M.; Borkholder, David A.; McGrath, James L.

2013-01-01

We have developed electroosmotic pumps (EOPs) fabricated from 15-nm-thick porous nanocrystalline silicon (pnc-Si) membranes. Ultrathin pnc-Si membranes enable high electroosmotic flow per unit voltage. We demonstrate that electroosmosis theory compares well with the observed pnc-Si flow rates. We attribute the high flow rates to high electrical fields present across the 15-nm span of the membrane. Surface modifications, such as plasma oxidation or silanization, can influence the electroosmotic flow rates through pnc-Si membranes by alteration of the zeta potential of the material. A prototype EOP that uses pnc-Si membranes and Ag/AgCl electrodes was shown to pump microliter per minute-range flow through a 0.5-mm-diameter capillary tubing with as low as 250 mV of applied voltage. This silicon-based platform enables straightforward integration of low-voltage, on-chip EOPs into portable microfluidic devices with low back pressures. PMID:24167263

A review of high-efficiency silicon solar cells

NASA Technical Reports Server (NTRS)

Rohatgi, A.

1986-01-01

Various parameters that affect solar cell efficiency were discussed. It is not understood why solar cells produced from less expensive Czochralski (Cz) silicon are less efficient than cells fabricated from more expensive float-zone (Fz) silicon. Performance characteristics were presented for recently produced, high-efficient solar cells fabricated by Westinghouse Electric Corp., Spire Corp., University of New South Wales, and Stanford University.

High-purity silicon for solar cell applications

NASA Technical Reports Server (NTRS)

Dosaj, V. D.; Hunt, L. P.; Schei, A.

1978-01-01

The article discusses the production of solar cells from high-purity silicon. The process consists of reducing the level of impurities in the raw materials, preventing material contamination before and after entering the furnace, and performing orders-of-magnitude reduction of metal impurity concentrations. The high-purity raw materials are considered with reference to carbon reductants, silica, and graphite electrodes. Attention is also given to smelting experiments used to demonstrate, in an experimental-scale furnace, the production of high-purity SoG-Si. It is found that high-purity silicon may be produced from high-purity quartz and chemically purified charcoal in a 50-kVA arc furnace. The major contamination source is shown to be impurities from the carbon reducing materials.

High-performance fused indium gallium arsenide/silicon photodiode

NASA Astrophysics Data System (ADS)

Kang, Yimin

Modern long haul, high bit rate fiber-optic communication systems demand photodetectors with high sensitivity. Avalanche photodiodes (APDs) exhibit superior sensitivity performance than other types of photodetectors by virtual of its internal gain mechanism. This dissertation work further advances the APD performance by applying a novel materials integration technique. It is the first successful demonstration of wafer fused InGaAs/Si APDs with low dark current and low noise. APDs generally adopt separate absorption and multiplication (SAM) structure, which allows independent optimization of materials properties in two distinct regions. While the absorption material needs to have high absorption coefficient in the target wavelength range to achieve high quantum efficiency, it is desirable for the multiplication material to have large discrepancy between its electron and hole ionization coefficients to reduce noise. According to these criteria, InGaAs and Si are the ideal materials combination. Wafer fusion is the enabling technique that makes this theoretical ideal an experimental possibility. APDs fabricated on the fused InGaAs/Si wafer with mesa structure exhibit low dark current and low noise. Special device fabrication techniques and high quality wafer fusion reduce dark current to nano ampere level at unity gain, comparable to state-of-the-art commercial III/V APDs. The small excess noise is attributed to the large difference in ionization coefficients between electrons and holes in silicon. Detailed layer structure designs are developed specifically for fused InGaAs/Si APDs based on principles similar to those used in traditional InGaAs/InP APDs. An accurate yet straightforward technique for device structural parameters extraction is also proposed. The extracted results from the fabricated APDs agree with device design parameters. This agreement also confirms that the fusion interface has negligible effect on electric field distributions for devices fabricated

Optical performance of hybrid porous silicon-porous alumina multilayers

NASA Astrophysics Data System (ADS)

Cencha, L. G.; Antonio Hernández, C.; Forzani, L.; Urteaga, R.; Koropecki, R. R.

2018-05-01

In this work, we study the optical response of structures involving porous silicon and porous alumina in a multi-layered hybrid structure. We performed a rational design of the optimal sequence necessary to produce a high transmission and selective filter, with potential applications in chemical and biosensors. The combination of these porous materials can be used to exploit its distinguishing features, i.e., high transparency of alumina and high refractive index of porous silicon. We assembled hybrid microcavities with a central porous alumina layer between two porous silicon Bragg reflectors. In this way, we constructed a Fabry-Perot resonator with high reflectivity and low absorption that improves the quality of the filter compared to a microcavity built only with porous silicon or porous alumina. We explored a simpler design in which one of the Bragg reflectors is replaced by the aluminium that remains bound to the alumina after its fabrication. We theoretically explored the potential of the proposal and its limitations when considering the roughness of the layers. We found that the quality of a microcavity made entirely with porous silicon shows a limit in the visible range due to light absorption. This limitation is overcome in the hybrid scheme, with the roughness of the layers determining the ultimate quality. Q-factors of 220 are experimentally obtained for microcavities supported on aluminium, while Q-factors around 600 are reached for microcavities with double Bragg reflectors, centred at 560 nm. This represents a four-fold increase with respect to the optimal porous silicon microcavity at this wavelength.

High performance and reusable SERS substrates using Ag/ZnO heterostructure on periodic silicon nanotube substrate

NASA Astrophysics Data System (ADS)

Lai, Yi-Chen; Ho, Hsin-Chia; Shih, Bo-Wei; Tsai, Feng-Yu; Hsueh, Chun-Hway

2018-05-01

Surface-enhanced Raman scattering (SERS) substrate with a higher surface area, enhanced light harvesting, multiple hot spots and strong electromagnetic field enhancements would exhibit enhanced Raman signals. Herein, the Ag nanoparticle/ZnO nanowire heterostructure decorated periodic silicon nanotube (Ag@ZnO@SiNT) substrate was proposed and fabricated. The proposed structure employed as SERS-active substrate was examined, and the results showed both the high performance in terms of high sensitivity and good reproducibility. Furthermore, the Ag@ZnO@SiNT substrate demonstrated the self-cleaning performance through the photocatalytic degradation of probed molecules upon UV-irradiation. The results showed that the proposed nanostructure had high performance, good reproducibility and reusability, and it is a promising SERS-active substrate for molecular sensing and cleaning.

Development of large-area monolithically integrated silicon-film photovoltaic modules

NASA Astrophysics Data System (ADS)

Rand, J. A.; Cotter, J. E.; Ingram, A. E.; Ruffins, T. R.; Shreve, K. P.; Hall, R. B.; Barnett, A. M.

1993-06-01

This report describes work to develop Silicon-Film (trademark) Product 3 into a low-cost, stable solar cell for large-scale terrestrial power applications. The Product 3 structure is a thin (less than 100 micron) polycrystalline layer of silicon on a durable, insulating, ceramic substrate. The insulating substrate allows the silicon layer to be isolated and metallized to form a monolithically interconnected array of solar cells. High efficiency is achievable with the use of light trapping and a passivated back surface. The long-term goal for the product is a 1200 sq cm, 18%-efficient, monolithic array. The short-term objectives are to improve material quality and to fabricate 100 sq cm monolithically interconnected solar cell arrays. Low minority-carrier diffusion length in the silicon film and series resistance in the interconnected device structure are presently limiting device performance. Material quality is continually improving through reduced impurity contamination. Metallization schemes, such as a solder-dipped interconnection process, have been developed that will allow low-cost production processing and minimize R(sub s) effects. Test data for a nine-cell device (16 sq cm) indicated a V(sub oc) of 3.72 V. These first-reported monolithically interconnected multicrystalline silicon-on-ceramic devices show low shunt conductance (less than 0.1 mA/sq cm) due to limited conduction through the ceramic and no process-related metallization shunts.

High-Performance and Omnidirectional Thin-Film Amorphous Silicon Solar Cell Modules Achieved by 3D Geometry Design.

PubMed

Yu, Dongliang; Yin, Min; Lu, Linfeng; Zhang, Hanzhong; Chen, Xiaoyuan; Zhu, Xufei; Che, Jianfei; Li, Dongdong

2015-11-01

High-performance thin-film hydrogenated amorphous silicon solar cells are achieved by combining macroscale 3D tubular substrates and nanoscaled 3D cone-like antireflective films. The tubular geometry delivers a series of advantages for large-scale deployment of photovoltaics, such as omnidirectional performance, easier encapsulation, decreased wind resistance, and easy integration with a second device inside the glass tube. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Improved performance of silicon nitride-based high temperature ceramics

NASA Technical Reports Server (NTRS)

Ashbrook, R. L.

1977-01-01

Recent progress in the production of Si3N4 based ceramics is reviewed: (1) high temperature strength and toughness of hot pressed Si3N4 were improved by using high purity powder and a stabilized ZrO2 additive, (2) impact resistance of hot pressed Si3N4 was increased by the use of a crushable energy absorbing layer, (3) the oxidation resistance and strength of reaction sintered Si3N4 were increased by impregnating reaction sintered silicon nitride with solutions that oxidize to Al2O3 or ZrO2, (4) beta prime SiA1ON compositions and sintering aids were developed for improved oxidation resistance or improved high temperature strength.

Heterogeneously-integrated VCSEL using high-contrast grating on silicon

NASA Astrophysics Data System (ADS)

Ferrara, James; Zhu, Li; Yang, Weijian; Qiao, Pengfei; Chang-Hasnain, Connie J.

2015-02-01

We present a unique heterogeneous integration approach for VCSELs on silicon using eutectic bonding. An electrically pumped III-V - silicon heterogeneous VCSEL is demonstrated using a high-contrast grating (HCG) reflector on silicon. CW output power >1.5 mW, thermal resistance of 1.46 K/mW, and 5 Gb/s direct modulation is demonstrated. We also explore the possibility of an all-HCG VCSEL structure that would benefit from stronger thermal performance, larger tuning efficiency, and higher direct modulation speeds.

Optimal angle of polycrystalline silicon solar panels placed in a building using the ant colony optimization algorithm

NASA Astrophysics Data System (ADS)

Saouane, I.; Chaker, A.; Zaidi, B.; Shekhar, C.

2017-03-01

This paper describes the mathematical model used to determine the amount of solar radiation received on an inclined solar photovoltaic panel. The optimum slope angles for each month, season, and year have also been calculated for a solar photovoltaic panel. The optimization of the procedure to maximize the solar energy collected by the solar panel by varying the tilt angle is also presented. As a first step, the global solar radiation on the horizontal surface of a thermal photovoltaic panel during clear sky is estimated. Thereafter, the Muneer model, which provides the most accurate estimation of the total solar radiation at a given geographical point has been used to determine the optimum collector slope. Also, the Ant Colony Optimization (ACO) algorithm was applied to obtain the optimum tilt angle settings for PV collector to improve the PV collector efficiency. The results show good agreement between calculated and predicted results. Additionally, this paper presents studies carried out on the polycrystalline silicon solar panels for electrical energy generation in the city of Ghardaia. The electrical energy generation has been studied as a function of amount of irradiation received and the angle of optimum orientation of the solar panels.

Low Temperature Deposition of PECVD Polycrystalline Silicon Thin Films using SiF4 / SiH4 mixture

NASA Astrophysics Data System (ADS)

Syed, Moniruzzaman; Inokuma, Takao; Kurata, Yoshihiro; Hasegawa, Seiichi

2016-03-01

Polycrystalline silicon films with a strong (110) texture were prepared at 400°C by a plasma-enhanced chemical vapor deposition using different SiF4 flow rates ([SiF4] = 0-0.5 sccm) under a fixed SiH4 flow rate ([SiH4] = 1 or 0.15 sccm). The effects of the addition of SiF4 to SiH4 on the structural properties of the films were studied by Raman scattering, X-ray diffraction (XRD), Atomic force microscopy and stress measurements. For [SiH4] = 1 sccm, the crystallinity and the (110) XRD grain size monotonically increased with increasing [SiF4] and their respective maxima reach 90% and 900 Å. However, for [SiH4] = 0.15 sccm, both the crystallinity and the grain size decreased with [SiF4]. Mechanisms causing the change in crystallinity are discussed, and it was suggested that an improvement in the crystallinity, due to the addition of SiF4, is likely to be caused by the effect of a change in the surface morphology of the substrates along with the effect of in situ chemical cleaning.

Polycrystalline Si nanoparticles and their strong aging enhancement of blue photoluminescence

NASA Astrophysics Data System (ADS)

Yang, Shikuan; Cai, Weiping; Zeng, Haibo; Li, Zhigang

2008-07-01

Nearly spherical polycrystalline Si nanoparticles with 20 nm diameter were fabricated based on laser ablation of silicon wafer immersed in sodium dodecyl sulfate aqueous solution. Such Si nanoparticles consist of disordered areas and ultrafine grains of 3 nm in mean size and exhibit significant photoluminescence in blue region. Importantly, aging at ambient air leads to continuing enhancement of the emission (more than 130 times higher in 16 weeks) showing stable and strong blue emission. This aging enhancement is attributed to progressive passivation of nonradiative Pb centers corresponding to silicon dangling bonds on the particles' surface. This study could be helpful in pushing Si into optoelectronic field and Si-based full color display, biomedical tagging, and flash memories.

High temperature and frequency pressure sensor based on silicon-on-insulator layers

NASA Astrophysics Data System (ADS)

Zhao, Y. L.; Zhao, L. B.; Jiang, Z. D.

2006-03-01

Based on silicon on insulator (SOI) technology, a novel high temperature pressure sensor with high frequency response is designed and fabricated, in which a buried silicon dioxide layer in the silicon material is developed by the separation by implantation of oxygen (SIMOX) technology. This layer can isolate leak currents between the top silicon layer for the detecting circuit and body silicon at a temperature of about 200 °C. In addition, the technology of silicon and glass bonding is used to create a package of the sensor without internal strain. A structural model and test data from the sensor are presented. The experimental results showed that this kind of sensor possesses good static performance in a high temperature environment and high frequency dynamic characteristics, which may satisfy the pressure measurement demands of the oil industry, aviation and space, and so on.

Environmental aging in polycrystalline-Si photovoltaic modules: comparison of chamber-based accelerated degradation studies with field-test data

NASA Astrophysics Data System (ADS)

Lai, T.; Biggie, R.; Brooks, A.; Potter, B. G.; Simmons-Potter, K.

2015-09-01

Lifecycle degradation testing of photovoltaic (PV) modules in accelerated-degradation chambers can enable the prediction both of PV performance lifetimes and of return-on-investment for installations of PV systems. With degradation results strongly dependent on chamber test parameters, the validity of such studies relative to fielded, installed PV systems must be determined. In the present work, accelerated aging of a 250 W polycrystalline silicon module is compared to real-time performance degradation in a similar polycrystalline-silicon, fielded, PV technology that has been operating since October 2013. Investigation of environmental aging effects are performed in a full-scale, industrial-standard environmental chamber equipped with single-sun irradiance capability providing illumination uniformity of 98% over a 2 x 1.6 m area. Time-dependent, photovoltaic performance (J-V) is evaluated over a recurring, compressed night-day cycle providing representative local daily solar insolation for the southwestern United States, followed by dark (night) cycling. This cycle is synchronized with thermal and humidity environmental variations that are designed to mimic, as closely as possible, test-yard conditions specific to a 12 month weather profile for a fielded system in Tucson, AZ. Results confirm the impact of environmental conditions on the module long-term performance. While the effects of temperature de-rating can be clearly seen in the data, removal of these effects enables the clear interpretation of module efficiency degradation with time and environmental exposure. With the temperature-dependent effect removed, the normalized efficiency is computed and compared to performance results from another panel of similar technology that has previously experienced identical climate changes in the test yard. Analysis of relative PV module efficiency degradation for the chamber-tested system shows good comparison to the field-tested system with ~2.5% degradation following

Silicon-on ceramic process: Silicon sheet growth and device development for the large-area silicon sheet task of the low-cost solar array project

NASA Technical Reports Server (NTRS)

Grung, B. L.; Heaps, J. D.; Schmit, F. M.; Schuldt, S. B.; Zook, J. D.

1981-01-01

The technical feasibility of producing solar-cell-quality sheet silicon to meet the Department of Energy (DOE) 1986 overall price goal of $0.70/watt was investigated. With the silicon-on-ceramic (SOC) approach, a low-cost ceramic substrate is coated with large-grain polycrystalline silicon by unidirectional solidification of molten silicon. This effort was divided into several areas of investigation in order to most efficiently meet the goals of the program. These areas include: (1) dip-coating; (2) continuous coating designated SCIM-coating, and acronym for Silicon Coating by an Inverted Meniscus (SCIM); (3) material characterization; (4) cell fabrication and evaluation; and (5) theoretical analysis. Both coating approaches were successful in producing thin layers of large grain, solar-cell-quality silicon. The dip-coating approach was initially investigated and considerable effort was given to this technique. The SCIM technique was adopted because of its scale-up potential and its capability to produce more conventiently large areas of SOC.

Electronic and local atomistic structure of MgSiO3 glass under pressure: a study of X-ray Raman scattering at the silicon and magnesium L-edges

NASA Astrophysics Data System (ADS)

Fukui, Hiroshi; Hiraoka, Nozomu

2018-02-01

We applied X-ray Raman scattering technique to MgSiO3 glass, a precursor to magnesium silicate melts, with respect to magnesium and silicon under high-pressure conditions as well as some polycrystalline phases of MgSiO3 at ambient conditions. We also performed ab initio calculations to interpret the X-ray Raman spectra. Experimentally obtained silicon L-edge spectra indicate that the local environment around silicon started changing at pressure above 10 GPa, where the electronic structure of oxygen is known to change. In contrast, the shape of the magnesium L-edge spectrum changed below 10 GPa. This indicates that the magnesium sites in MgSiO3 glass first distort and that the local structure around magnesium shows a wide variation under pressure. The framework structure consisting of silicon and oxygen changed above 10 GPa, where the coordination number of silicon was more than four. Our results imply that 6-oxygen-coordinated silicon was formed above 20 GPa.

Synergistic effects of water addition and step heating on the formation of solution-processed zinc tin oxide thin films: towards high-mobility polycrystalline transistors

NASA Astrophysics Data System (ADS)

Huang, Genmao; Duan, Lian; Zhao, Yunlong; Zhang, Yunge; Dong, Guifang; Zhang, Deqiang; Qiu, Yong

2016-11-01

Thin-film transistors (TFTs) with high mobility and good uniformity are attractive for next-generation flat panel displays. In this work, solution-processed polycrystalline zinc tin oxide (ZTO) thin film with well-ordered microstructure is prepared, thanks to the synergistic effect of water addition and step heating. The step heating treatment other than direct annealing induces crystallization, while adequate water added to precursor solution further facilitates alloying and densification process. The optimal polycrystalline ZTO film is free of hierarchical sublayers, and featured with an increased amount of ternary phases, as well as a decreased fraction of oxygen vacancies and hydroxides. TFT devices based on such an active layer exhibit a remarkable field-effect mobility of 52.5 cm2 V-1 s-1, a current on/off ratio of 2 × 105, a threshold voltage of 2.32 V, and a subthreshold swing of 0.36 V dec-1. Our work offers a facile method towards high-performance solution-processed polycrystalline metal oxide TFTs.

Vertical integration of high-Q silicon nitride microresonators into silicon-on-insulator platform.

PubMed

Li, Qing; Eftekhar, Ali A; Sodagar, Majid; Xia, Zhixuan; Atabaki, Amir H; Adibi, Ali

2013-07-29

We demonstrate a vertical integration of high-Q silicon nitride microresonators into the silicon-on-insulator platform for applications at the telecommunication wavelengths. Low-loss silicon nitride films with a thickness of 400 nm are successfully grown, enabling compact silicon nitride microresonators with ultra-high intrinsic Qs (~ 6 × 10(6) for 60 μm radius and ~ 2 × 10(7) for 240 μm radius). The coupling between the silicon nitride microresonator and the underneath silicon waveguide is based on evanescent coupling with silicon dioxide as buffer. Selective coupling to a desired radial mode of the silicon nitride microresonator is also achievable using a pulley coupling scheme. In this work, a 60-μm-radius silicon nitride microresonator has been successfully integrated into the silicon-on-insulator platform, showing a single-mode operation with an intrinsic Q of 2 × 10(6).

Basic research challenges in crystalline silicon photovoltaics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Werner, J.H.

1995-08-01

Silicon is abundant, non-toxic and has an ideal band gap for photovoltaic energy conversion. Experimental world record cells of 24 % conversion efficiency with around 300 {mu}m thickness are only 4 % (absolute) efficiency points below the theoretical Auger recombination-limit of around 28 %. Compared with other photovoltaic materials, crystalline silicon has only very few disadvantages. The handicap of weak light absorbance may be mastered by clever optical designs. Single crystalline cells of only 48 {mu}m thickness showed 17.3 % efficiency even without backside reflectors. A technology of solar cells from polycrystalline Si films on foreign substrates arises at themore » horizon. However, the disadvantageous, strong activity of grain boundaries in Si could be an insurmountable hurdle for a cost-effective, terrestrial photovoltaics based on polycrystalline Si on foreign substrates. This talk discusses some basic research challenges related to a Si based photovoltaics.« less

Surface Engineering of Polycrystalline Silicon for Long-Term Mechanical Stress Endurance Enhancement in Flexible Low-Temperature Poly-Si Thin-Film Transistors.

PubMed

Chen, Bo-Wei; Chang, Ting-Chang; Chang, Kuan-Chang; Hung, Yu-Ju; Huang, Shin-Ping; Chen, Hua-Mao; Liao, Po-Yung; Lin, Yu-Ho; Huang, Hui-Chun; Chiang, Hsiao-Cheng; Yang, Chung-I; Zheng, Yu-Zhe; Chu, Ann-Kuo; Li, Hung-Wei; Tsai, Chih-Hung; Lu, Hsueh-Hsing; Wang, Terry Tai-Jui; Chang, Tsu-Chiang

2017-04-05

The surface morphology in polycrystalline silicon (poly-Si) film is an issue regardless of whether conventional excimer laser annealing (ELA) or the newer metal-induced lateral crystallization (MILC) process is used. This paper investigates the stress distribution while undergoing long-term mechanical stress and the influence of stress on electrical characteristics. Our simulated results show that the nonuniform stress in the gate insulator is more pronounced near the polysilicon/gate insulator edge and at the two sides of the polysilicon protrusion. This stress results in defects in the gate insulator and leads to a nonuniform degradation phenomenon, which affects both the performance and the reliability in thin-film transistors (TFTs). The degree of degradation is similar regardless of bending axis (channel-length axis, channel-width axis) or bending type (compression, tension), which means that the degradation is dominated by the protrusion effects. Furthermore, by utilizing long-term electrical bias stresses after undergoing long-tern bending stress, it is apparent that the carrier injection is severe in the subchannel region, which confirms that the influence of protrusions is crucial. To eliminate the influence of surface morphology in poly-Si, three kinds of laser energy density were used during crystallization to control the protrusion height. The device with the lowest protrusions demonstrates the smallest degradation after undergoing long-term bending.

12-GHz thin-film transistors on transferrable silicon nanomembranes for high-performance flexible electronics.

PubMed

Sun, Lei; Qin, Guoxuan; Seo, Jung-Hun; Celler, George K; Zhou, Weidong; Ma, Zhenqiang

2010-11-22

Multigigahertz flexible electronics are attractive and have broad applications. A gate-after-source/drain fabrication process using preselectively doped single-crystal silicon nanomembranes (SiNM) is an effective approach to realizing high device speed. However, further downscaling this approach has become difficult in lithography alignment. In this full paper, a local alignment scheme in combination with more accurate SiNM transfer measures for minimizing alignment errors is reported. By realizing 1 μm channel alignment for the SiNMs on a soft plastic substrate, thin-film transistors with a record speed of 12 GHz maximum oscillation frequency are demonstrated. These results indicate the great potential of properly processed SiNMs for high-performance flexible electronics.

High specific activity silicon-32

DOEpatents

Phillips, Dennis R.; Brzezinski, Mark A.

1996-01-01

A process for preparation of silicon-32 is provided and includes contacting an irradiated potassium chloride target, including spallation products from a prior irradiation, with sufficient water, hydrochloric acid or potassium hydroxide to form a solution, filtering the solution, adjusting pH of the solution to from about 5.5 to about 7.5, admixing sufficient molybdate-reagent to the solution to adjust the pH of the solution to about 1.5 and to form a silicon-molybdate complex, contacting the solution including the silicon-molybdate complex with a dextran-based material, washing the dextran-based material to remove residual contaminants such as sodium-22, separating the silicon-molybdate complex from the dextran-based material as another solution, adding sufficient hydrochloric acid and hydrogen peroxide to the solution to prevent reformation of the silicon-molybdate complex and to yield an oxidization state of the molybdate adapted for subsequent separation by an anion exchange material, contacting the solution with an anion exchange material whereby the molybdate is retained by the anion exchange material and the silicon remains in solution, and optionally adding sufficient alkali metal hydroxide to adjust the pH of the solution to about 12 to 13. Additionally, a high specific activity silicon-32 product having a high purity is provided.

High specific activity silicon-32

DOEpatents

Phillips, D.R.; Brzezinski, M.A.

1996-06-11

A process for preparation of silicon-32 is provided and includes contacting an irradiated potassium chloride target, including spallation products from a prior irradiation, with sufficient water, hydrochloric acid or potassium hydroxide to form a solution, filtering the solution, adjusting pH of the solution from about 5.5 to about 7.5, admixing sufficient molybdate-reagent to the solution to adjust the pH of the solution to about 1.5 and to form a silicon-molybdate complex, contacting the solution including the silicon-molybdate complex with a dextran-based material, washing the dextran-based material to remove residual contaminants such as sodium-22, separating the silicon-molybdate complex from the dextran-based material as another solution, adding sufficient hydrochloric acid and hydrogen peroxide to the solution to prevent reformation of the silicon-molybdate complex and to yield an oxidation state of the molybdate adapted for subsequent separation by an anion exchange material, contacting the solution with an anion exchange material whereby the molybdate is retained by the anion exchange material and the silicon remains in solution, and optionally adding sufficient alkali metal hydroxide to adjust the pH of the solution to about 12 to 13. Additionally, a high specific activity silicon-32 product having a high purity is provided.

Development of processes for the production of low cost silicon dendritic web for solar cells

NASA Technical Reports Server (NTRS)

Duncan, C. S.; Seidensticker, R. G.; Mchugh, J. P.; Hopkins, R. H.; Skutch, M. E.; Driggers, J. M.; Hill, F. E.

1980-01-01

High area output rates and continuous, automated growth are two key technical requirements for the growth of low-cost silicon ribbons for solar cells. By means of computer-aided furnace design, silicon dendritic web output rates as high as 27 sq cm/min have been achieved, a value in excess of that projected to meet a $0.50 per peak watt solar array manufacturing cost. The feasibility of simultaneous web growth while the melt is replenished with pelletized silicon has also been demonstrated. This step is an important precursor to the development of an automated growth system. Solar cells made on the replenished material were just as efficient as devices fabricated on typical webs grown without replenishment. Moreover, web cells made on a less-refined, pelletized polycrystalline silicon synthesized by the Battelle process yielded efficiencies up to 13% (AM1).

Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

PubMed

Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

2018-04-01

Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

Nondestructive ultrasonic characterization of armor grade silicon carbide

NASA Astrophysics Data System (ADS)

Portune, Andrew Richard

Ceramic materials have traditionally been chosen for armor applications for their superior mechanical properties and low densities. At high strain rates seen during ballistic events, the behavior of these materials relies upon the total volumetric flaw concentration more so than any single anomalous flaw. In this context flaws can be defined as any microstructural feature which detriments the performance of the material, potentially including secondary phases, pores, or unreacted sintering additives. Predicting the performance of armor grade ceramic materials depends on knowledge of the absolute and relative concentration and size distribution of bulk heterogeneities. Ultrasound was chosen as a nondestructive technique for characterizing the microstructure of dense silicon carbide ceramics. Acoustic waves interact elastically with grains and inclusions in large sample volumes, and were well suited to determine concentration and size distribution variations for solid inclusions. Methodology was developed for rapid acquisition and analysis of attenuation coefficient spectra. Measurements were conducted at individual points and over large sample areas using a novel technique entitled scanning acoustic spectroscopy. Loss spectra were split into absorption and scattering dominant frequency regimes to simplify analysis. The primary absorption mechanism in polycrystalline silicon carbide was identified as thermoelastic in nature. Correlations between microstructural conditions and parameters within the absorption equation were established through study of commercial and custom engineered SiC materials. Nonlinear least squares regression analysis was used to estimate the size distributions of boron carbide and carbon inclusions within commercial SiC materials. This technique was shown to additionally be capable of approximating grain size distributions in engineered SiC materials which did not contain solid inclusions. Comparisons to results from electron microscopy

Effects of high optical injection levels in polycrystalline Si wafers on carrier transport

NASA Astrophysics Data System (ADS)

Steele, Doneisha; Semichaevsky, Andrey

High levels of carrier injection in polycrystalline Si may arise, for example, in solar cells under concentrated sunlight. Mechanisms for non-radiative carrier recombination include trap-mediated SRH and higher-order processes, e.g., Auger recombination. In this paper we present our experimental results for intensity-dependent carrier lifetimes and conduction currents in polycrystalline Si wafers illuminated with pulses of up to 50 Sun intensity. We also use a computational model for carrier transport that includes both SRH and Auger recombination mechanisms, in order to explain our experiments. The model allows quantifying recombination rate dependence on carrier concentration. Our goal is to relate the recombination rates to Si microstructure and defect densities that are revealed by IR PL images. We acknowledge the NSF support through Grant 1505377.

A Study on the Thermomechanical Reliability Risks of Through-Silicon-Vias in Sensor Applications

PubMed Central

Shao, Shuai; Liu, Dapeng; Niu, Yuling; O’Donnell, Kathy; Sengupta, Dipak; Park, Seungbae

2017-01-01

Reliability risks for two different types of through-silicon-vias (TSVs) are discussed in this paper. The first is a partially-filled copper TSV, if which the copper layer covers the side walls and bottom. A polymer is used to fill the rest of the cavity. Stresses in risk sites are studied and ranked for this TSV structure by FEA modeling. Parametric studies for material properties (modulus and thermal expansion) of TSV polymer are performed. The second type is a high aspect ratio TSV filled by polycrystalline silicon (poly Si). Potential risks of the voids in the poly Si due to filling defects are studied. Fracture mechanics methods are utilized to evaluate the risk for two different assembly conditions: package assembled to printed circuit board (PCB) and package assembled to flexible substrate. The effect of board/substrate/die thickness and the size and location of the void are discussed. PMID:28208758

Hierarchical silicon nanowires-carbon textiles matrix as a binder-free anode for high-performance advanced lithium-ion batteries

PubMed Central

Liu, Bin; Wang, Xianfu; Chen, Haitian; Wang, Zhuoran; Chen, Di; Cheng, Yi-Bing; Zhou, Chongwu; Shen, Guozhen

2013-01-01

Toward the increasing demands of portable energy storage and electric vehicle applications, the widely used graphite anodes with significant drawbacks become more and more unsuitable. Herein, we report a novel scaffold of hierarchical silicon nanowires-carbon textiles anodes fabricated via a facile method. Further, complete lithium-ion batteries based on Si and commercial LiCoO2 materials were assembled to investigate their corresponding across-the-aboard performances, demonstrating their enhanced specific capacity (2950 mAh g−1 at 0.2 C), good repeatability/rate capability (even >900 mAh g−1 at high rate of 5 C), long cycling life, and excellent stability in various external conditions (curvature, temperature, and humidity). Above results light the way to principally replacing graphite anodes with silicon-based electrodes which was confirmed to have better comprehensive performances. PMID:23572030

Enantiomerically enriched, polycrystalline molecular sieves

DOE PAGES

Brand, Stephen K.; Schmidt, Joel E.; Deem, Michael W.; ...

2017-05-01

Zeolite and zeolite-like molecular sieves are being used in a large number of applications such as adsorption and catalysis. Achievement of the long-standing goal of creating a chiral, polycrystalline molecular sieve with bulk enantioenrichment would enable these materials to perform enantioselective functions. Here, we report the synthesis of enantiomerically enriched samples of a molecular sieve. For this study, enantiopure organic structure directing agents are designed with the assistance of computational methods and used to synthesize enantioenriched, polycrystalline molecular sieve samples of either enantiomer. Computational results correctly predicted which enantiomer is obtained, and enantiomeric enrichment is proven by high-resolution transmission electronmore » microscopy. The enantioenriched and racemic samples of the molecular sieves are tested as adsorbents and heterogeneous catalysts. The enantioenriched molecular sieves show enantioselectivity for the ring opening reaction of epoxides and enantioselective adsorption of 2-butanol (the R enantiomer of the molecular sieve shows opposite and approximately equal enantioselectivity compared with the S enantiomer of the molecular sieve, whereas the racemic sample of the molecular sieve shows no enantioselectivity).« less

Enantiomerically enriched, polycrystalline molecular sieves

DOE Office of Scientific and Technical Information (OSTI.GOV)

Brand, Stephen K.; Schmidt, Joel E.; Deem, Michael W.

Zeolite and zeolite-like molecular sieves are being used in a large number of applications such as adsorption and catalysis. Achievement of the long-standing goal of creating a chiral, polycrystalline molecular sieve with bulk enantioenrichment would enable these materials to perform enantioselective functions. Here, we report the synthesis of enantiomerically enriched samples of a molecular sieve. For this study, enantiopure organic structure directing agents are designed with the assistance of computational methods and used to synthesize enantioenriched, polycrystalline molecular sieve samples of either enantiomer. Computational results correctly predicted which enantiomer is obtained, and enantiomeric enrichment is proven by high-resolution transmission electronmore » microscopy. The enantioenriched and racemic samples of the molecular sieves are tested as adsorbents and heterogeneous catalysts. The enantioenriched molecular sieves show enantioselectivity for the ring opening reaction of epoxides and enantioselective adsorption of 2-butanol (the R enantiomer of the molecular sieve shows opposite and approximately equal enantioselectivity compared with the S enantiomer of the molecular sieve, whereas the racemic sample of the molecular sieve shows no enantioselectivity).« less

Impurity segregation behavior in polycrystalline silicon ingot grown with variation of electron-beam power

NASA Astrophysics Data System (ADS)

Lee, Jun-Kyu; Lee, Jin-Seok; Jang, Bo-Yun; Kim, Joon-Soo; Ahn, Young-Soo; Cho, Churl-Hee

2014-08-01

Electron beam melting (EBM) systems have been used to improve the purity of metallurgical grade silicon feedstock for photovoltaic application. Our advanced EBM system is able to effectively remove volatile impurities using a heat source with high energy from an electron gun and to continuously allow impurities to segregate at the top of an ingot solidified in a directional solidification (DS) zone in a vacuum chamber. Heat in the silicon melt should move toward the ingot bottom for the desired DS. However, heat flux though the ingot is changed as the ingot becomes longer due to low thermal conductivity of silicon. This causes a non-uniform microstructure of the ingot, finally leading to impurity segregation at its middle. In this research, EB power irradiated on the silicon melt was controlled during the ingot growth in order to suppress the change of heat flux. EB power was reduced from 12 to 6.6 kW during the growth period of 45 min with a drop rate of 0.125 kW/min. Also, the silicon ingot was grown under a constant EB power of 12 kW to estimate the effect of the drop rate of EB power. When the EB power was reduced, the grains with columnar shape were much larger at the middle of the ingot compared to the case of constant EB power. Also, the present research reports a possible reason for the improvement of ingot purity by considering heat flux behaviors.

A method for polycrystalline silicon delineation applicable to a double-diffused MOS transistor

NASA Technical Reports Server (NTRS)

Halsor, J. L.; Lin, H. C.

1974-01-01

Method is simple and eliminates requirement for unreliable special etchants. Structure is graded in resistivity to prevent punch-through and has very narrow channel length to increase frequency response. Contacts are on top to permit planar integrated circuit structure. Polycrystalline shield will prevent creation of inversion layer in isolated region.

High-Performance Silicon-Germanium-Based Thermoelectric Modules for Gas Exhaust Energy Scavenging

NASA Astrophysics Data System (ADS)

Romanjek, K.; Vesin, S.; Aixala, L.; Baffie, T.; Bernard-Granger, G.; Dufourcq, J.

2015-06-01

Some of the energy used in transportation and industry is lost as heat, often at high-temperatures, during conversion processes. Thermoelectricity enables direct conversion of heat into electricity, and is an alternative to the waste-heat-recovery technology currently used, for example turbines and other types of thermodynamic cycling. The performance of thermoelectric (TE) materials and modules has improved continuously in recent decades. In the high-temperature range ( T hot side > 500°C), silicon-germanium (SiGe) alloys are among the best TE materials reported in the literature. These materials are based on non-toxic elements. The Thermoelectrics Laboratory at CEA (Commissariat à l'Energie Atomique et aux Energies Alternatives) has synthesized n and p-type SiGe pellets, manufactured TE modules, and integrated these into thermoelectric generators (TEG) which were tested on a dedicated bench with hot air as the source of heat. SiGe TE samples of diameter 60 mm were created by spark-plasma sintering. For n-type SiGe doped with phosphorus the peak thermoelectric figure of merit reached ZT = 1.0 at 700°C whereas for p-type SiGe doped with boron the peak was ZT = 0.75 at 700°C. Thus, state-of-the-art conversion efficiency was obtained while also achieving higher production throughput capacity than for competing processes. A standard deviation <4% in the electrical resistance of batches of ten pellets of both types was indicative of high reproducibility. A silver-paste-based brazing technique was used to assemble the TE elements into modules. This assembly technique afforded low and repeatable electrical contact resistance (<3 nΩ m2). A test bench was developed for measuring the performance of TE modules at high temperatures (up to 600°C), and thirty 20 mm × 20 mm TE modules were produced and tested. The results revealed the performance was reproducible, with power output reaching 1.9 ± 0.2 W for a 370 degree temperature difference. When the temperature

A high performance three-phase enzyme electrode based on superhydrophobic mesoporous silicon nanowire arrays for glucose detection.

PubMed

Xu, Chenlong; Song, Zhiqian; Xiang, Qun; Jin, Jian; Feng, Xinjian

2016-04-14

We describe here a high performance oxygen-rich three-phase enzyme electrode based on superhydrophobic mesoporous silicon nanowire arrays for glucose detection. We demonstrate that its linear detection upper limit is 30 mM, more than 15 times higher than that can be obtained on the normal enzyme-electrode. Notably, the three-phase enzyme electrode output is insensitive to the significant oxygen level fluctuation in analyte solution.

Comparison between laser terahertz emission microscope and conventional methods for analysis of polycrystalline silicon solar cell

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nakanishi, Hidetoshi, E-mail: nakanisi@screen.co.jp; Ito, Akira, E-mail: a.ito@screen.co.jp; Takayama, Kazuhisa, E-mail: takayama.k0123@gmail.com

2015-11-15

A laser terahertz emission microscope (LTEM) can be used for noncontact inspection to detect the waveforms of photoinduced terahertz emissions from material devices. In this study, we experimentally compared the performance of LTEM with conventional analysis methods, e.g., electroluminescence (EL), photoluminescence (PL), and laser beam induced current (LBIC), as an inspection method for solar cells. The results showed that LTEM was more sensitive to the characteristics of the depletion layer of the polycrystalline solar cell compared with EL, PL, and LBIC and that it could be used as a complementary tool to the conventional analysis methods for a solar cell.

Silicon Photomultiplier Performance in High ELectric Field

NASA Astrophysics Data System (ADS)

Montoya, J.; Morad, J.

2016-12-01

Roughly 27% of the universe is thought to be composed of dark matter. The Large Underground Xenon (LUX) relies on the emission of light from xenon atoms after a collision with a dark matter particle. After a particle interaction in the detector, two things can happen: the xenon will emit light and charge. The charge (electrons), in the liquid xenon needs to be pulled into the gas section so that it can interact with gas and emit light. This allows LUX to convert a single electron into many photons. This is done by applying a high voltage across the liquid and gas regions, effectively ripping electrons out of the liquid xenon and into the gas. The current device used to detect photons is the photomultiplier tube (PMT). These devices are large and costly. In recent years, a new technology that is capable of detecting single photons has emerged, the silicon photomultiplier (SiPM). These devices are cheaper and smaller than PMTs. Their performance in a high electric fields, such as those found in LUX, are unknown. It is possible that a large electric field could introduce noise on the SiPM signal, drowning the single photon detection capability. My hypothesis is that SiPMs will not observe a significant increase is noise at an electric field of roughly 10kV/cm (an electric field within the range used in detectors like LUX). I plan to test this hypothesis by first rotating the SiPMs with no applied electric field between two metal plates roughly 2 cm apart, providing a control data set. Then using the same angles test the dark counts with the constant electric field applied. Possibly the most important aspect of LUX, is the photon detector because it's what detects the signals. Dark matter is detected in the experiment by looking at the ratio of photons to electrons emitted for a given interaction in the detector. Interactions with a low electron to photon ratio are more like to be dark matter events than those with a high electron to photon ratio. The ability to

Long term performance stability of silicon sensors

NASA Astrophysics Data System (ADS)

Mori, R.; Betancourt, C.; Kühn, S.; Hauser, M.; Messmer, I.; Hasenfratz, A.; Thomas, M.; Lohwasser, K.; Parzefall, U.; Jakobs, K.

2015-10-01

The HL-LHC investigations on silicon particle sensor performance are carried out with the intention to reproduce the harsh environments foreseen, but usually in individual short measurements. Recently, several groups have observed a decrease in the charge collection of silicon strip sensors after several days, in particular on sensors showing charge multiplication. This phenomenon has been explained with a surface effect, the increase of charge sharing due to the increment of positive charge in the silicon oxide coming from the source used for charge collection measurements. Observing a similar behaviour in other sensors for which we can exclude this surface effect, we propose and investigate alternative explanations, namely trapping related effects (change of polarization) and annealing related effects. Several n-on-p strip sensors, as-processed and irradiated with protons and neutrons up to 5 ×1015neq /cm2, have been subjected to charge collection efficiency measurements for several days, while parameters like the impedance have been monitored. The probable stressing conditions have been changed in an attempt to recover the collected charge in case of a decrease. The results show that for the investigated sensors the effect of charge sharing induced by a radioactive source is not important, and a main detrimental factor is due to very high voltage, while at lower voltages the performance is stable.

Breathing silicon anodes for durable high-power operations

NASA Astrophysics Data System (ADS)

Hwang, Chihyun; Joo, Sehun; Kang, Na-Ri; Lee, Ungju; Kim, Tae-Hee; Jeon, Yuju; Kim, Jieun; Kim, Young-Jin; Kim, Ju-Young; Kwak, Sang-Kyu; Song, Hyun-Kon

2015-09-01

Silicon anode materials have been developed to achieve high capacity lithium ion batteries for operating smart phones and driving electric vehicles for longer time. Serious volume expansion induced by lithiation, which is the main drawback of silicon, has been challenged by multi-faceted approaches. Mechanically rigid and stiff polymers (e.g. alginate and carboxymethyl cellulose) were considered as the good choices of binders for silicon because they grab silicon particles in a tight and rigid way so that pulverization and then break-away of the active mass from electric pathways are suppressed. Contrary to the public wisdom, in this work, we demonstrate that electrochemical performances are secured better by letting silicon electrodes breathe in and out lithium ions with volume change rather than by fixing their dimensions. The breathing electrodes were achieved by using a polysaccharide (pullulan), the conformation of which is modulated from chair to boat during elongation. The conformational transition of pullulan was originated from its α glycosidic linkages while the conventional rigid polysaccharide binders have β linkages.

Polycrystalline lead selenide: the resurgence of an old infrared detector

NASA Astrophysics Data System (ADS)

Vergara, G.; Montojo, M. T.; Torquemada, M. C.; Rodrigo, M. T.; Sánchez, F. J.; Gómez, L. J.; Almazán, R. M.; Verdú, M.; Rodríguez, P.; Villamayor, V.; Álvarez, M.; Diezhandino, J.; Plaza, J.; Catalán, I.

2007-06-01

The existing technology for uncooled MWIR photon detectors based on polycrystalline lead salts is stigmatized for being a 50-year-old technology. It has been traditionally relegated to single-element detectors and relatively small linear arrays due to the limitations imposed by its standard manufacture process based on a chemical bath deposition technique (CBD) developed more than 40 years ago. Recently, an innovative method for processing detectors, based on a vapour phase deposition (VPD) technique, has allowed manufacturing the first 2D array of polycrystalline PbSe with good electro optical characteristics. The new method of processing PbSe is an all silicon technology and it is compatible with standard CMOS circuitry. In addition to its affordability, VPD PbSe constitutes a perfect candidate to fill the existing gap in the photonic and uncooled IR imaging detectors sensitive to the MWIR photons. The perspectives opened are numerous and very important, converting the old PbSe detector in a serious alternative to others uncooled technologies in the low cost IR detection market. The number of potential applications is huge, some of them with high commercial impact such as personal IR imagers, enhanced vision systems for automotive applications and other not less important in the security/defence domain such as sensors for active protection systems (APS) or low cost seekers. Despite the fact, unanimously accepted, that uncooled will dominate the majority of the future IR detection applications, today, thermal detectors are the unique plausible alternative. There is plenty of room for photonic uncooled and complementary alternatives are needed. This work allocates polycrystalline PbSe in the current panorama of the uncooled IR detectors, underlining its potentiality in two areas of interest, i.e., very low cost imaging IR detectors and MWIR fast uncooled detectors for security and defence applications. The new method of processing again converts PbSe into an

Timing performance of the silicon PET insert probe

PubMed Central

Studen, A.; Burdette, D.; Chesi, E.; Cindro, V.; Clinthorne, N. H.; Cochran, E.; Grošičar, B.; Kagan, H.; Lacasta, C.; Linhart, V.; Mikuž, M.; Stankova, V.; Weilhammer, P.; Žontar, D.

2010-01-01

Simulation indicates that PET image could be improved by upgrading a conventional ring with a probe placed close to the imaged object. In this paper, timing issues related to a PET probe using high-resistivity silicon as a detector material are addressed. The final probe will consist of several (four to eight) 1-mm thick layers of silicon detectors, segmented into 1 × 1 mm2 pads, each pad equivalent to an independent p + nn+ diode. A proper matching of events in silicon with events of the external ring can be achieved with a good timing resolution. To estimate the timing performance, measurements were performed on a simplified model probe, consisting of a single 1-mm thick detector with 256 square pads (1.4 mm side), coupled with two VATAGP7s, application-specific integrated circuits. The detector material and electronics are the same that will be used for the final probe. The model was exposed to 511 keV annihilation photons from an 22Na source, and a scintillator (LYSO)–PMT assembly was used as a timing reference. Results were compared with the simulation, consisting of four parts: (i) GEANT4 implemented realistic tracking of electrons excited by annihilation photon interactions in silicon, (ii) calculation of propagation of secondary ionisation (electron–hole pairs) in the sensor, (iii) estimation of the shape of the current pulse induced on surface electrodes and (iv) simulation of the first electronics stage. A very good agreement between the simulation and the measurements were found. Both indicate reliable performance of the final probe at timing windows down to 20 ns. PMID:20215445

Timing performance of the silicon PET insert probe.

PubMed

Studen, A; Burdette, D; Chesi, E; Cindro, V; Clinthorne, N H; Cochran, E; Grosicar, B; Kagan, H; Lacasta, C; Linhart, V; Mikuz, M; Stankova, V; Weilhammer, P; Zontar, D

2010-01-01

Simulation indicates that PET image could be improved by upgrading a conventional ring with a probe placed close to the imaged object. In this paper, timing issues related to a PET probe using high-resistivity silicon as a detector material are addressed. The final probe will consist of several (four to eight) 1-mm thick layers of silicon detectors, segmented into 1 x 1 mm(2) pads, each pad equivalent to an independent p + nn+ diode. A proper matching of events in silicon with events of the external ring can be achieved with a good timing resolution. To estimate the timing performance, measurements were performed on a simplified model probe, consisting of a single 1-mm thick detector with 256 square pads (1.4 mm side), coupled with two VATAGP7s, application-specific integrated circuits. The detector material and electronics are the same that will be used for the final probe. The model was exposed to 511 keV annihilation photons from an (22)Na source, and a scintillator (LYSO)-PMT assembly was used as a timing reference. Results were compared with the simulation, consisting of four parts: (i) GEANT4 implemented realistic tracking of electrons excited by annihilation photon interactions in silicon, (ii) calculation of propagation of secondary ionisation (electron-hole pairs) in the sensor, (iii) estimation of the shape of the current pulse induced on surface electrodes and (iv) simulation of the first electronics stage. A very good agreement between the simulation and the measurements were found. Both indicate reliable performance of the final probe at timing windows down to 20 ns.

Thermal system design and modeling of meniscus controlled silicon growth process for solar applications

NASA Astrophysics Data System (ADS)

Wang, Chenlei

The direct conversion of solar radiation to electricity by photovoltaics has a number of significant advantages as an electricity generator. That is, solar photovoltaic conversion systems tap an inexhaustible resource which is free of charge and available anywhere in the world. Roofing tile photovoltaic generation, for example, saves excess thermal heat and preserves the local heat balance. This means that a considerable reduction of thermal pollution in densely populated city areas can be attained. A semiconductor can only convert photons with the energy of the band gap with good efficiency. It is known that silicon is not at the maximum efficiency but relatively close to it. There are several main parts for the photovoltaic materials, which include, single- and poly-crystalline silicon, ribbon silicon, crystalline thin-film silicon, amorphous silicon, copper indium diselenide and related compounds, cadmium telluride, et al. In this dissertation, we focus on melt growth of the single- and poly-crystalline silicon manufactured by Czochralski (Cz) crystal growth process, and ribbon silicon produced by the edge-defined film-fed growth (EFG) process. These two methods are the most commonly used techniques for growing photovoltaic semiconductors. For each crystal growth process, we introduce the growth mechanism, growth system design, general application, and progress in the numerical simulation. Simulation results are shown for both Czochralski and EFG systems including temperature distribution of the growth system, velocity field inside the silicon melt and electromagnetic field for the EFG growth system. Magnetic field is applied on Cz system to reduce the melt convection inside crucible and this has been simulated in our numerical model. Parametric studies are performed through numerical and analytical models to investigate the relationship between heater power levels and solidification interface movement and shape. An inverse problem control scheme is developed to

Crystal growth for high-efficiency silicon solar cells workshop: Summary

NASA Technical Reports Server (NTRS)

Dumas, K. A.

1985-01-01

The state of the art in the growth of silicon crystals for high-efficiency solar cells are reviewed, sheet requirements are defined, and furture areas of research are identified. Silicon sheet material characteristics that limit cell efficiencies and yields were described as well as the criteria for the ideal sheet-growth method. The device engineers wish list to the material engineer included: silicon sheet with long minority carrier lifetime that is uniform throughout the sheet, and which doesn't change during processing; and sheet material that stays flat throughout device processing, has uniform good mechanical strength, and is low cost. Impurities in silicon solar cells depreciate cell performance by reducing diffusion length and degrading junctions. The impurity behavior, degradation mechanisms, and variations in degradation threshold with diffusion length for silicon solar cells were described.

Development of silicon grisms and immersion gratings for high-resolution infrared spectroscopy

NASA Astrophysics Data System (ADS)

Ge, Jian; McDavitt, Daniel L.; Bernecker, John L.; Miller, Shane; Ciarlo, Dino R.; Kuzmenko, Paul J.

2002-01-01

We report new results on silicon grism and immersion grating development using photolithography and anisotropic chemical etching techniques, which include process recipe finding, prototype grism fabrication, lab performance evaluation and initial scientific observations. The very high refractive index of silicon (n=3.4) enables much higher dispersion power for silicon-based gratings than conventional gratings, e.g. a silicon immersion grating can offer a factor of 3.4 times the dispersion of a conventional immersion grating. Good transmission in the infrared (IR) allows silicon-based gratings to operate in the broad IR wavelength regions (~1- 10 micrometers and far-IR), which make them attractive for both ground and space-based spectroscopic observations. Coarser gratings can be fabricated with these new techniques rather than conventional techniques, allowing observations at very high dispersion orders for larger simultaneous wavelength coverage. We have found new etching techniques for fabricating high quality silicon grisms with low wavefront distortion, low scattered light and high efficiency. Particularly, a new etching process using tetramethyl ammonium hydroxide (TMAH) is significantly simplifying the fabrication process on large, thick silicon substrates, while providing comparable grating quality to our traditional potassium hydroxide (KOH) process. This technique is being used for fabricating inch size silicon grisms for several IR instruments and is planned to be used for fabricating ~ 4 inch size silicon immersion gratings later. We have obtained complete K band spectra of a total of 6 T Tauri and Ae/Be stars and their close companions at a spectral resolution of R ~ 5000 using a silicon echelle grism with a 5 mm pupil diameter at the Lick 3m telescope. These results represent the first scientific observations conducted by the high-resolution silicon grisms, and demonstrate the extremely high dispersing power of silicon- based gratings. The future of

Rectangular-cladding silicon slot waveguide with improved nonlinear performance

NASA Astrophysics Data System (ADS)

Huang, Zengzhi; Huang, Qingzhong; Wang, Yi; Xia, Jinsong

2018-04-01

Silicon slot waveguides have great potential in hybrid silicon integration to realize nonlinear optical applications. We propose a rectangular-cladding hybrid silicon slot waveguide. Simulation result shows that, with a rectangular-cladding, the slot waveguide can be formed by narrower silicon strips, so the two-photon absorption (TPA) loss in silicon is decreased. When the cladding material is a nonlinear polymer, the calculated TPA figure of merit (FOMTPA) is 4.4, close to the value of bulk nonlinear polymer of 5.0. This value confirms the good nonlinear performance of rectangular-cladding silicon slot waveguides.

Polycrystalline CVD diamond device level modeling for particle detection applications

NASA Astrophysics Data System (ADS)

Morozzi, A.; Passeri, D.; Kanxheri, K.; Servoli, L.; Lagomarsino, S.; Sciortino, S.

2016-12-01

Diamond is a promising material whose excellent physical properties foster its use for radiation detection applications, in particular in those hostile operating environments where the silicon-based detectors behavior is limited due to the high radiation fluence. Within this framework, the application of Technology Computer Aided Design (TCAD) simulation tools is highly envisaged for the study, the optimization and the predictive analysis of sensing devices. Since the novelty of using diamond in electronics, this material is not included in the library of commercial, state-of-the-art TCAD software tools. In this work, we propose the development, the application and the validation of numerical models to simulate the electrical behavior of polycrystalline (pc)CVD diamond conceived for diamond sensors for particle detection. The model focuses on the characterization of a physically-based pcCVD diamond bandgap taking into account deep-level defects acting as recombination centers and/or trap states. While a definite picture of the polycrystalline diamond band-gap is still debated, the effect of the main parameters (e.g. trap densities, capture cross-sections, etc.) can be deeply investigated thanks to the simulated approach. The charge collection efficiency due to β -particle irradiation of diamond materials provided by different vendors and with different electrode configurations has been selected as figure of merit for the model validation. The good agreement between measurements and simulation findings, keeping the traps density as the only one fitting parameter, assesses the suitability of the TCAD modeling approach as a predictive tool for the design and the optimization of diamond-based radiation detectors.

An EBIC study of HEM polycrystalline silicon

NASA Technical Reports Server (NTRS)

Koch, T.; Ast, D.

1982-01-01

Low-cost silicon for solar cells grown by the heat exchanger method (HEM) was studied in the electron beam induced current (EBIC) mode of a scanning electron microscope (SEM). Comparisons were made between the defects observed optically and the recombination centers visible in EBIC. Much of the HEM material was single crystalline, but structural defects were found from areas near the corners of the grown material. Most of these defects consisted of linear twin boundaries and grain boundaries. The electrical activity of these boundaries was dependent on symmetry of the boundaries. Symmetric twin boundaries did not exhibit recombination activity while unsymmetric twin boundaries were electrically active.

Adaptive optics high-resolution IR spectroscopy with silicon grisms and immersion gratings

NASA Astrophysics Data System (ADS)

Ge, Jian; McDavitt, Daniel L.; Chakraborty, Abhijit; Bernecker, John L.; Miller, Shane

2003-02-01

The breakthrough of silicon immersion grating technology at Penn State has the ability to revolutionize high-resolution infrared spectroscopy when it is coupled with adaptive optics at large ground-based telescopes. Fabrication of high quality silicon grism and immersion gratings up to 2 inches in dimension, less than 1% integrated scattered light, and diffraction-limited performance becomes a routine process thanks to newly developed techniques. Silicon immersion gratings with etched dimensions of ~ 4 inches are being developed at Penn State. These immersion gratings will be able to provide a diffraction-limited spectral resolution of R = 300,000 at 2.2 micron, or 130,000 at 4.6 micron. Prototype silicon grisms have been successfully used in initial scientific observations at the Lick 3m telescope with adaptive optics. Complete K band spectra of a total of 6 T Tauri and Ae/Be stars and their close companions at a spectral resolution of R ~ 3000 were obtained. This resolving power was achieved by using a silicon echelle grism with a 5 mm pupil diameter in an IR camera. These results represent the first scientific observations conducted by the high-resolution silicon grisms, and demonstrate the extremely high dispersing power of silicon-based gratings. New discoveries from this high spatial and spectral resolution IR spectroscopy will be reported. The future of silicon-based grating applications in ground-based AO IR instruments is promising. Silicon immersion gratings will make very high-resolution spectroscopy (R > 100,000) feasible with compact instruments for implementation on large telescopes. Silicon grisms will offer an efficient way to implement low-cost medium to high resolution IR spectroscopy (R ~ 1000-50000) through the conversion of existing cameras into spectrometers by locating a grism in the instrument's pupil location.

Atomistic modeling of mechanical properties of polycrystalline graphene.

PubMed

Mortazavi, Bohayra; Cuniberti, Gianaurelio

2014-05-30

We performed molecular dynamics (MD) simulations to investigate the mechanical properties of polycrystalline graphene. By constructing molecular models of ultra-fine-grained graphene structures, we studied the effect of different grain sizes of 1-10 nm on the mechanical response of graphene. We found that the elastic modulus and tensile strength of polycrystalline graphene decrease with decreasing grain size. The calculated mechanical proprieties for pristine and polycrystalline graphene sheets are found to be in agreement with experimental results in the literature. Our MD results suggest that the ultra-fine-grained graphene structures can show ultrahigh tensile strength and elastic modulus values that are very close to those of pristine graphene sheets.

High quality silicon-based substrates for microwave and millimeter wave passive circuits

NASA Astrophysics Data System (ADS)

Belaroussi, Y.; Rack, M.; Saadi, A. A.; Scheen, G.; Belaroussi, M. T.; Trabelsi, M.; Raskin, J.-P.

2017-09-01

Porous silicon substrate is very promising for next generation wireless communication requiring the avoidance of high-frequency losses originating from the bulk silicon. In this work, new variants of porous silicon (PSi) substrates have been introduced. Through an experimental RF performance, the proposed PSi substrates have been compared with different silicon-based substrates, namely, standard silicon (Std), trap-rich (TR) and high resistivity (HR). All of the mentioned substrates have been fabricated where identical samples of CPW lines have been integrated on. The new PSi substrates have shown successful reduction in the substrate's effective relative permittivity to values as low as 3.7 and great increase in the substrate's effective resistivity to values higher than 7 kΩ cm. As a concept proof, a mm-wave bandpass filter (MBPF) centred at 27 GHz has been integrated on the investigated substrates. Compared with the conventional MBPF implemented on standard silicon-based substrates, the measured S-parameters of the PSi-based MBPF have shown high filtering performance, such as a reduction in insertion loss and an enhancement of the filter selectivity, with the joy of having the same filter performance by varying the temperature. Therefore, the efficiency of the proposed PSi substrates has been well highlighted. From 1994 to 1995, she was assistant of physics at (USTHB), Algiers . From 1998 to 2011, she was a Researcher at characterization laboratory in ionized media and laser division at the Advanced Technologies Development Center. She has integrated the Analog Radio Frequency Integrated Circuits team as Researcher since 2011 until now in Microelectronic and Nanotechnology Division at Advanced Technologies Development Center (CDTA), Algiers. She has been working towards her Ph.D. degree jointly at CDTA and Ecole Nationale Polytechnique, Algiers, since 2012. Her research interest includes fabrication and characterization of microwave passive devices on porous

Amorphous silicon as high index photonic material

NASA Astrophysics Data System (ADS)

Lipka, T.; Harke, A.; Horn, O.; Amthor, J.; Müller, J.

2009-05-01

Silicon-on-Insulator (SOI) photonics has become an attractive research topic within the area of integrated optics. This paper aims to fabricate SOI-structures for optical communication applications with lower costs compared to standard fabrication processes as well as to provide a higher flexibility with respect to waveguide and substrate material choice. Amorphous silicon is deposited on thermal oxidized silicon wafers with plasma-enhanced chemical vapor deposition (PECVD). The material is optimized in terms of optical light transmission and refractive index. Different a-Si:H waveguides with low propagation losses are presented. The waveguides were processed with CMOS-compatible fabrication technologies and standard DUV-lithography enabling high volume production. To overcome the large mode-field diameter mismatch between incoupling fiber and sub-μm waveguides three dimensional, amorphous silicon tapers were fabricated with a KOH etched shadow mask for patterning. Using ellipsometric and Raman spectroscopic measurements the material properties as refractive index, layer thickness, crystallinity and material composition were analyzed. Rapid thermal annealing (RTA) experiments of amorphous thin films and rib waveguides were performed aiming to tune the refractive index of the deposited a-Si:H waveguide core layer after deposition.

Transparent, Flexible Silicon Nanostructured Wire Networks with Seamless Junctions for High-Performance Photodetector Applications.

PubMed

Hossain, Mozakkar; Kumar, Gundam Sandeep; Barimar Prabhava, S N; Sheerin, Emmet D; McCloskey, David; Acharya, Somobrata; Rao, K D M; Boland, John J

2018-05-22

Optically transparent photodetectors are crucial in next-generation optoelectronic applications including smart windows and transparent image sensors. Designing photodetectors with high transparency, photoresponsivity, and robust mechanical flexibility remains a significant challenge, as is managing the inevitable trade-off between high transparency and strong photoresponse. Here we report a scalable method to produce flexible crystalline Si nanostructured wire (NW) networks fabricated from silicon-on-insulator (SOI) with seamless junctions and highly responsive porous Si segments that combine to deliver exceptional performance. These networks show high transparency (∼92% at 550 nm), broadband photodetection (350 to 950 nm) with excellent responsivity (25 A/W), optical response time (0.58 ms), and mechanical flexibility (1000 cycles). Temperature-dependent photocurrent measurements indicate the presence of localized electronic states in the porous Si segments, which play a crucial role in light harvesting and photocarrier generation. The scalable low-cost approach based on SOI has the potential to deliver new classes of flexible optoelectronic devices, including next-generation photodetectors and solar cells.

High Efficiency, Low Cost Solar Cells Manufactured Using 'Silicon Ink' on Thin Crystalline Silicon Wafers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Antoniadis, H.

Reported are the development and demonstration of a 17% efficient 25mm x 25mm crystalline Silicon solar cell and a 16% efficient 125mm x 125mm crystalline Silicon solar cell, both produced by Ink-jet printing Silicon Ink on a thin crystalline Silicon wafer. To achieve these objectives, processing approaches were developed to print the Silicon Ink in a predetermined pattern to form a high efficiency selective emitter, remove the solvents in the Silicon Ink and fuse the deposited particle Silicon films. Additionally, standard solar cell manufacturing equipment with slightly modified processes were used to complete the fabrication of the Silicon Ink highmore » efficiency solar cells. Also reported are the development and demonstration of a 18.5% efficient 125mm x 125mm monocrystalline Silicon cell, and a 17% efficient 125mm x 125mm multicrystalline Silicon cell, by utilizing high throughput Ink-jet and screen printing technologies. To achieve these objectives, Innovalight developed new high throughput processing tools to print and fuse both p and n type particle Silicon Inks in a predetermined pat-tern applied either on the front or the back of the cell. Additionally, a customized Ink-jet and screen printing systems, coupled with customized substrate handling solution, customized printing algorithms, and a customized ink drying process, in combination with a purchased turn-key line, were used to complete the high efficiency solar cells. This development work delivered a process capable of high volume producing 18.5% efficient crystalline Silicon solar cells and enabled the Innovalight to commercialize its technology by the summer of 2010.« less

A review of recent progress in heterogeneous silicon tandem solar cells

NASA Astrophysics Data System (ADS)

Yamaguchi, Masafumi; Lee, Kan-Hua; Araki, Kenji; Kojima, Nobuaki

2018-04-01

Silicon solar cells are the most established solar cell technology and are expected to dominate the market in the near future. As state-of-the-art silicon solar cells are approaching the Shockley-Queisser limit, stacking silicon solar cells with other photovoltaic materials to form multi-junction devices is an obvious pathway to further raise the efficiency. However, many challenges stand in the way of fully realizing the potential of silicon tandem solar cells because heterogeneously integrating silicon with other materials often degrades their qualities. Recently, above or near 30% silicon tandem solar cell has been demonstrated, showing the promise of achieving high-efficiency and low-cost solar cells via silicon tandem. This paper reviews the recent progress of integrating solar cell with other mainstream solar cell materials. The first part of this review focuses on the integration of silicon with III-V semiconductor solar cells, which is a long-researched topic since the emergence of III-V semiconductors. We will describe the main approaches—heteroepitaxy, wafer bonding and mechanical stacking—as well as other novel approaches. The second part introduces the integration of silicon with polycrystalline thin-film solar cells, mainly perovskites on silicon solar cells because of its rapid progress recently. We will also use an analytical model to compare the material qualities of different types of silicon tandem solar cells and project their practical efficiency limits.

Rapid epitaxy-free graphene synthesis on silicidated polycrystalline platinum

PubMed Central

Babenko, Vitaliy; Murdock, Adrian T.; Koós, Antal A.; Britton, Jude; Crossley, Alison; Holdway, Philip; Moffat, Jonathan; Huang, Jian; Alexander-Webber, Jack A.; Nicholas, Robin J.; Grobert, Nicole

2015-01-01

Large-area synthesis of high-quality graphene by chemical vapour deposition on metallic substrates requires polishing or substrate grain enlargement followed by a lengthy growth period. Here we demonstrate a novel substrate processing method for facile synthesis of mm-sized, single-crystal graphene by coating polycrystalline platinum foils with a silicon-containing film. The film reacts with platinum on heating, resulting in the formation of a liquid platinum silicide layer that screens the platinum lattice and fills topographic defects. This reduces the dependence on the surface properties of the catalytic substrate, improving the crystallinity, uniformity and size of graphene domains. At elevated temperatures growth rates of more than an order of magnitude higher (120 μm min−1) than typically reported are achieved, allowing savings in costs for consumable materials, energy and time. This generic technique paves the way for using a whole new range of eutectic substrates for the large-area synthesis of 2D materials. PMID:26175062

Optimization of the performance of the polymerase chain reaction in silicon-based microstructures.

PubMed Central

Taylor, T B; Winn-Deen, E S; Picozza, E; Woudenberg, T M; Albin, M

1997-01-01

We have demonstrated the ability to perform real-time homogeneous, sequence specific detection of PCR products in silicon microstructures. Optimal design/ processing result in equivalent performance (yield and specificity) for high surface-to-volume silicon structures as compared to larger volume reactions in polypropylene tubes. Amplifications in volumes as small as 0.5 microl and thermal cycling times reduced as much as 5-fold from that of conventional systems have been demonstrated for the microstructures. PMID:9224619

Hot forming of silicon sheet, silicon sheet growth development for the large area silicon sheet task of the low cost silicon solar array project

NASA Technical Reports Server (NTRS)

Graham, C. D., Jr.; Pope, D. P.; Kulkarni, S.; Wolf, M.

1978-01-01

The hot workability of polycrystalline silicon was studied. Uniaxail stress-strain curves are given for strain rates in the range of .0001 to .1/sec and temperatures from 1100 to 1380 C. At the highest strain rates at 1380 C axial strains in excess of 20% were easily obtainable without cracking. After deformations of 36%, recrystallization was completed within 0.1 hr at 1380 C. When the recrystallization was complete, there was still a small volume fraction of unrecyrstallized material which appeared very stable and may degrade the electronic properties of the bulk materials. Texture measurements showed that the as-produced vapor deposited polycrystalline rods have a 110 fiber texture with the 110 direction parallel to the growth direction and no preferred orientation about this axis. Upon axial compression perpendicular to the growth direction, the former 110 fiber axis changed to 111 and the compression axis became 110 . Recrystallization changed the texture to 110 along the former fiber axis and to 100 along the compression axis.

High-Purity Silicon Seeds for Silane Pyrolysis

NASA Technical Reports Server (NTRS)

Hsu, G. C.; Rohatgi, N. K.; Morrison, A.

1985-01-01

Seed particles for fluidized-bed production of silicon made by new contamination-free, economical method. In new method, large particles of semiconductor-grade silicon fired at each other by high-speed streams of gas and thereby break up into particles of suitable size for fluidized bed. No foreign materials introduced, and leaching unnecessary. Method used to feed fluidized-bed reactor for continuous production of high-purity silicon.

GaAs Photovoltaics on Polycrystalline Ge Substrates

NASA Technical Reports Server (NTRS)

Wilt, David M.; Pal, AnnaMaria T.; McNatt, Jeremiah S.; Wolford, David S.; Landis, Geoffrey A.; Smith, Mark A.; Scheiman, David; Jenkins, Phillip P.; McElroy Bruce

2007-01-01

High efficiency III-V multijunction solar cells deposited on metal foil or even polymer substrates can provide tremendous advantages in mass and stowage, particularly for planetary missions. As a first step towards that goal, poly-crystalline p/i/n GaAs solar cells are under development on polycrystalline Ge substrates. Organo Metallic Vapor Phase Epitaxy (OMVPE) parameters for pre-growth bake, nucleation and deposition have been examined. Single junction p/i/n GaAs photovoltaic devices, incorporating InGaP front and back window layers, have been grown and processed. Device performance has shown a dependence upon the thickness of a GaAs buffer layer deposited between the Ge substrate and the active device structure. A thick (2 m) GaAs buffer provides for both increased average device performance as well as reduced sensitivity to variations in grain size and orientation. Illumination under IR light (lambda > 1 micron), the cells showed a Voc, demonstrating the presence of an unintended photoactive junction at the GaAs/Ge interface. The presence of this junction limited the efficiency to approx.13% (estimated with an anti-refection coating) due to the current mismatch and lack of tunnel junction interconnect.

Optical interconnection networks for high-performance computing systems

NASA Astrophysics Data System (ADS)

Biberman, Aleksandr; Bergman, Keren

2012-04-01

Enabled by silicon photonic technology, optical interconnection networks have the potential to be a key disruptive technology in computing and communication industries. The enduring pursuit of performance gains in computing, combined with stringent power constraints, has fostered the ever-growing computational parallelism associated with chip multiprocessors, memory systems, high-performance computing systems and data centers. Sustaining these parallelism growths introduces unique challenges for on- and off-chip communications, shifting the focus toward novel and fundamentally different communication approaches. Chip-scale photonic interconnection networks, enabled by high-performance silicon photonic devices, offer unprecedented bandwidth scalability with reduced power consumption. We demonstrate that the silicon photonic platforms have already produced all the high-performance photonic devices required to realize these types of networks. Through extensive empirical characterization in much of our work, we demonstrate such feasibility of waveguides, modulators, switches and photodetectors. We also demonstrate systems that simultaneously combine many functionalities to achieve more complex building blocks. We propose novel silicon photonic devices, subsystems, network topologies and architectures to enable unprecedented performance of these photonic interconnection networks. Furthermore, the advantages of photonic interconnection networks extend far beyond the chip, offering advanced communication environments for memory systems, high-performance computing systems, and data centers.

The outgassing characteristic research of the silicone rubber in high power laser system

NASA Astrophysics Data System (ADS)

Wu, Qipeng; Lv, Haibing; Dong, Meng; Fu, Zhaohui

2016-11-01

The outgassing characteristic of the silicone rubber which is the main material of non-metallic materials in high power laser system was studied outgassing rates of the silicone rubber and the baked-out silicone rubber which was performed at 80°C4 hours were measured by the constant volume process method and outgassing properties of them were analyzed by the quadrupole mass spectrometer. The results show that the outgassing rate of the silicone rubber and the baked-out silicone rubber is 2.69×10-7 Pa·m3s-1cm-2 and 6.47×10-8 Pa·m3s-1cm-2 respectively. All of them give out condensable volatile matter in vacuum. The outgassing rate and condensable volatile matter of the baked-out silicone rubber are less an order of magnitude compared with the silicone rubber, and the outgassing rate of the silicone rubber is less than 1×10-7 Pa·m3s-1cm-2, which is fit for non-metallic material of the high power laser system. This paper also discusses the method of reducing the outgassing rate and condensable volatile matter of the silicone rubber in high power laser system.

Novel strategy to improve the Li-storage performance of micro silicon anodes

NASA Astrophysics Data System (ADS)

Choi, Min-Jae; Xiao, Ying; Hwang, Jang-Yeon; Belharouak, Ilias; Sun, Yang-Kook

2017-04-01

Silicon (Si)-based materials have attracted significant research as an outstanding candidate for the anode material of lithium-ion batteries. However, the tremendous volume change and poor electron conductivity of bulk silicon result in inferior capacity retention and low Coulombic efficiency. Designing special Si with high energy density and good stability in a bulk electrode remains a significant challenge. In this work, we introduce an ingenious strategy to modify micro silicon by designing a porous structure, constructing nanoparticle blocks, and introducing carbon nanotubes as wedges. A disproportion reaction, coupled with a chemical etching process and a ball-milling reaction, are applied to generate the desired material. The as-prepared micro silicon material features porosity, small primary particles, and effective CNT-wedging, which combine to endow the resultant anode with a high reversible specific capacity of up to 2028.6 mAh g-1 after 100 cycles and excellent rate capability. The superior electrochemical performance is attributed to the unique architecture and optimized composition.

Amorphous/crystalline silicon interface passivation: Ambient-temperature dependence and implications for solar cell performance

DOE PAGES

Seif, Johannes P.; Krishnamani, Gopal; Demaurex, Benedicte; ...

2015-03-02

Silicon heterojunction (SHJ) solar cells feature amorphous silicon passivation films, which enable very high voltages. We report how such passivation increases with operating temperature for amorphous silicon stacks involving doped layers and decreases for intrinsic-layer-only passivation. We discuss the implications of this phenomenon on the solar cell's temperature coefficient, which represents an important figure-of-merit for the energy yield of devices deployed in the field. We show evidence that both open-circuit voltage (Voc) and fill factor (FF) are affected by these variations in passivation and quantify these temperature-mediated effects, compared with those expected from standard diode equations. We confirm that devicesmore » with high Voc values at 25°C show better high-temperature performance. Thus, we also argue that the precise device architecture, such as the presence of charge-transport barriers, may affect the temperature-dependent device performance as well.« less

Grain boundary dominated ion migration in polycrystalline organic–inorganic halide perovskite films

DOE PAGES

Shao, Yuchuan; Fang, Yanjun; Li, Tao; ...

2016-03-21

The efficiency of perovskite solar cells is approaching that of single-crystalline silicon solar cells despite the presence of large grain boundary (GB) area in the polycrystalline thin films. Here, by using a combination of nanoscopic and macroscopic level measurements, we show that the ion migration in polycrystalline perovskites is dominated through GBs. Conducting atomic force microscopy measurements reveal much stronger hysteresis both for photocurrent and dark-current at the GBs than on the grains interiors, which can be explained by faster ion migration at the GBs. The dramatically enhanced ion migration results in a redistribution of ions along the GBs aftermore » electric poling, in contrast to the intact grain area. The perovskite single-crystal devices without GBs show negligible current hysteresis and no ion-migration signal. Furthermore, the discovery of dominating ion migration through GBs in perovskites can lead to broad applications in many types of devices including photovoltaics, memristors, and ion batteries.« less

Terbium Ion Doping in Ca3Co4O9: A Step towards High-Performance Thermoelectric Materials

PubMed Central

Saini, Shrikant; Yaddanapudi, Haritha Sree; Tian, Kun; Yin, Yinong; Magginetti, David; Tiwari, Ashutosh

2017-01-01

The potential of thermoelectric materials to generate electricity from the waste heat can play a key role in achieving a global sustainable energy future. In order to proceed in this direction, it is essential to have thermoelectric materials that are environmentally friendly and exhibit high figure of merit, ZT. Oxide thermoelectric materials are considered ideal for such applications. High thermoelectric performance has been reported in single crystals of Ca3Co4O9. However, for large scale applications single crystals are not suitable and it is essential to develop high-performance polycrystalline thermoelectric materials. In polycrystalline form, Ca3Co4O9 is known to exhibit much weaker thermoelectric response than in single crystal form. Here, we report the observation of enhanced thermoelectric response in polycrystalline Ca3Co4O9 on doping Tb ions in the material. Polycrystalline Ca3−xTbxCo4O9 (x = 0.0–0.7) samples were prepared by a solid-state reaction technique. Samples were thoroughly characterized using several state of the art techniques including XRD, TEM, SEM and XPS. Temperature dependent Seebeck coefficient, electrical resistivity and thermal conductivity measurements were performed. A record ZT of 0.74 at 800 K was observed for Tb doped Ca3Co4O9 which is the highest value observed till date in any polycrystalline sample of this system. PMID:28317853

Silicon on Ceramic Process: Silicon Sheet Growth and Device Development for the Large-area Silicon Sheet and Cell Development Tasks of the Low-cost Solar Array Project

NASA Technical Reports Server (NTRS)

Chapman, P. W.; Zook, J. D.; Heaps, J. D.; Pickering, C.; Grung, B. L.; Koepke, B.; Schuldt, S. B.

1979-01-01

The technical and economic feasibility of producing solar cell quality sheet silicon was investigated. It was hoped this could be done by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. Work was directed towards the solution of unique cell processing/design problems encountered with the silicon-ceramic (SOC) material due to its intimate contact with the ceramic substrate. Significant progress was demonstrated in the following areas; (1) the continuous coater succeeded in producing small-area coatings exhibiting unidirectional solidification and substatial grain size; (2) dip coater succeeded in producing thick (more than 500 micron) dendritic layers at coating speeds of 0.2-0.3 cm/sec; and (3) a standard for producing total area SOC solar cells using slotted ceramic substrates was developed.

Photon-trapping microstructures enable high-speed high-efficiency silicon photodiodes

NASA Astrophysics Data System (ADS)

Gao, Yang; Cansizoglu, Hilal; Polat, Kazim G.; Ghandiparsi, Soroush; Kaya, Ahmet; Mamtaz, Hasina H.; Mayet, Ahmed S.; Wang, Yinan; Zhang, Xinzhi; Yamada, Toshishige; Devine, Ekaterina Ponizovskaya; Elrefaie, Aly F.; Wang, Shih-Yuan; Islam, M. Saif

2017-04-01

High-speed, high-efficiency photodetectors play an important role in optical communication links that are increasingly being used in data centres to handle higher volumes of data traffic and higher bandwidths, as big data and cloud computing continue to grow exponentially. Monolithic integration of optical components with signal-processing electronics on a single silicon chip is of paramount importance in the drive to reduce cost and improve performance. We report the first demonstration of micro- and nanoscale holes enabling light trapping in a silicon photodiode, which exhibits an ultrafast impulse response (full-width at half-maximum) of 30 ps and a high efficiency of more than 50%, for use in data-centre optical communications. The photodiode uses micro- and nanostructured holes to enhance, by an order of magnitude, the absorption efficiency of a thin intrinsic layer of less than 2 µm thickness and is designed for a data rate of 20 gigabits per second or higher at a wavelength of 850 nm. Further optimization can improve the efficiency to more than 70%.

Multilayer hexagonal silicon forming in slit nanopore

PubMed Central

He, Yezeng; Li, Hui; Sui, Yanwei; Qi, Jiqiu; Wang, Yanqing; Chen, Zheng; Dong, Jichen; Li, Xiongying

2015-01-01

The solidification of two-dimensional liquid silicon confined to a slit nanopore has been studied using molecular dynamics simulations. The results clearly show that the system undergoes an obvious transition from liquid to multilayer hexagonal film with the decrease of temperature, accompanied by dramatic change in potential energy, atomic volume, coordination number and lateral radial distribution function. During the cooling process, some hexagonal islands randomly appear in the liquid first, then grow up to grain nuclei, and finally connect together to form a complete polycrystalline film. Moreover, it is found that the quenching rate and slit size are of vital importance to the freezing structure of silicon film. The results also indicate that the slit nanopore induces the layering of liquid silicon, which further induces the slit size dependent solidification behavior of silicon film with different electrical properties. PMID:26435518

Microstructure and nanohardness distribution in a polycrystalline Zn deformed by high strain rate impact

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dirras, G., E-mail: dirras@univ-paris13.fr; Ouarem, A.; Couque, H.

2011-05-15

Polycrystalline Zn with an average grain size of about 300 {mu}m was deformed by direct impact Hopkinson pressure bar at a velocity of 29 m/s. An inhomogeneous grain structure was found consisting of a center region having large average grain size of 20 {mu}m surrounded by a fine-grained rim with an average grain size of 6 {mu}m. Transmission electron microscopy investigations showed a significant dislocation density in the large-grained area while in the fine-grained rim the dislocation density was negligible. Most probably, the higher strain yielded recrystallization in the outer ring while in the center only recovery occurred. The hardeningmore » effect of dislocations overwhelms the smaller grain size strengthening in the center part resulting in higher nanohardness in this region than in the outer ring. - Graphical Abstract: (a): EBSD micrograph showing the initial microstructure of polycrystalline Zn that was subsequently submitted to high strain rate impact. (b): an inhomogeneous grain size refinement was obtained which consists of a central coarse-grained area, surrounded by a fine-grained recrystallized rim. The black arrow points to the disc center. Research Highlights: {yields} A polycrystalline Zn specimen was submitted to high strain rate impact loading. {yields} Inhomogeneous grain refinement occurred due to strain gradient in impacted sample. {yields} A fine-grained recrystallized rim surrounded the coarse-grained center of specimen. {yields} The coarse-grained center exhibited higher hardness than the fine-grained rim. {yields} The higher hardness of the center was caused by the higher dislocation density.« less

Facile synthesis of 3D silicon/carbon nanotube capsule composites as anodes for high-performance lithium-ion batteries

NASA Astrophysics Data System (ADS)

Yue, Xinyang; Sun, Wang; Zhang, Jing; Wang, Fang; Sun, Kening

2016-10-01

Carbon nanotubes have attracted widespread attention as ideal materials for Lithium-ion batteries (LIBs) due to their excellent conductivity, mechanical flexibility, chemical stability and extremely large surface area. Here, three-dimensional (3D) silicon/carbon nanotube capsule composites (Si/CNCs) are firstly prepared via water-in-oil (W/O) emulsion technique with more than 75 wt% loading amount of silicon. CNCs with unique hollow sphere structure act as a 3D interconnected conductive network skeleton, and the cross-linked carbon nanotubes (CNTs) of CNCs can effectively enhance the strength, flexibility and conductivity of the electrode. This Si/CNCs can not only alleviate the volume expansion, but also effectively improve the electrochemical performance of the LIBs. Such Si/CNCs electrode with the unique structure achieves a high initial discharge specific capacity of 2950 mAh g-1 and retains 1226 mAh g-1 after 100 cycles at 0.5 A g-1, as well as outstanding rate performance of 547 mAh g-1 at 10 A g-1.

Solution-derived SiO2 gate insulator formed by CO2 laser annealing for polycrystalline silicon thin-film transistors

NASA Astrophysics Data System (ADS)

Hishitani, Daisuke; Horita, Masahiro; Ishikawa, Yasuaki; Ikenoue, Hiroshi; Uraoka, Yukiharu

2017-05-01

The formation of perhydropolysilazane (PHPS)-based SiO2 films by CO2 laser annealing is proposed. Irradiation with a CO2 laser with optimum fluence transformed a prebaked PHPS film into a SiO2 film with uniform composition in the thickness direction. Polycrystalline silicon thin-film transistors (poly-Si TFTs) with a SiO2 film as the gate insulator were fabricated. When the SiO2 film was formed by CO2 laser annealing (CO2LA) at the optimum fluence of 20 mJ/cm2, the film had fewer OH groups which was one-twentieth that of the furnace annealed PHPS film and one-hundredth that of the SiO2 film deposited by plasma-enhanced chemical vapor deposition (PECVD) using tetraethyl orthosilicate (TEOS). The resulting TFTs using PHPS showed a clear transistor operation with a field-effect mobility of 37.9 ± 1.2 cm2 V-1 s-1, a threshold voltage of 9.8 ± 0.2 V, and a subthreshold swing of 0.76 ± 0.02 V/decade. The characteristics of such TFTs were as good as those of a poly-Si TFT with a SiO2 gate insulator prepared by PECVD using TEOS.

Silicon Carbide High-Temperature Power Rectifiers Fabricated and Characterized

NASA Technical Reports Server (NTRS)

1996-01-01

The High Temperature Integrated Electronics and Sensors (HTIES) team at the NASA Lewis Research Center is developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. Silicon carbide's demonstrated ability to function under extreme high-temperature, high power, and/or high-radiation conditions will enable significant improvements to a far ranging variety of applications and systems. These improvements range from improved high-voltage switching for energy savings in public electric power distribution and electric vehicles, to more powerful microwave electronics for radar and cellular communications, to sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. In the case of jet engines, uncooled operation of 300 to 600 C SiC power actuator electronics mounted in key high-temperature areas would greatly enhance system performance and reliability. Because silicon cannot function at these elevated temperatures, the semiconductor device circuit components must be made of SiC. Lewis' HTIES group recently fabricated and characterized high-temperature SiC rectifier diodes whose record-breaking characteristics represent significant progress toward the realization of advanced high-temperature actuator control circuits. The first figure illustrates the 600 C probe-testing of a Lewis SiC pn-junction rectifier diode sitting on top of a glowing red-hot heating element. The second figure shows the current-versus voltage rectifying characteristics recorded at 600 C. At this high temperature, the diodes were able to "turn-on" to conduct 4 A of current when forward biased, and yet block the flow of current ($quot;turn-off") when reverse biases as high as 150 V were applied. This device represents a new record for semiconductor device operation, in that no previous semiconductor electronic device has ever simultaneously demonstrated 600 C functionality

Effects of DC bias on magnetic performance of high grades grain-oriented silicon steels

NASA Astrophysics Data System (ADS)

Ma, Guang; Cheng, Ling; Lu, Licheng; Yang, Fuyao; Chen, Xin; Zhu, Chengzhi

2017-03-01

When high voltage direct current (HVDC) transmission adopting mono-polar ground return operation mode or unbalanced bipolar operation mode, the invasion of DC current into neutral point of alternating current (AC) transformer will cause core saturation, temperature increasing, and vibration acceleration. Based on the MPG-200D soft magnetic measurement system, the influence of DC bias on magnetic performance of 0.23 mm and 0.27 mm series (P1.7=0.70-1.05 W/kg, B8>1.89 T) grain-oriented (GO) silicon steels under condition of AC / DC hybrid excitation were systematically realized in this paper. For the high magnetic induction GO steels (core losses are the same), greater thickness can lead to stronger ability of resisting DC bias, and the reasons for it were analyzed. Finally, the magnetostriction and A-weighted magnetostriction velocity level of GO steel under DC biased magnetization were researched.

Direct glass bonded high specific power silicon solar cells for space applications

NASA Technical Reports Server (NTRS)

Dinetta, L. C.; Rand, J. A.; Cummings, J. R.; Lampo, S. M.; Shreve, K. P.; Barnett, Allen M.

1991-01-01

A lightweight, radiation hard, high performance, ultra-thin silicon solar cell is described that incorporates light trapping and a cover glass as an integral part of the device. The manufacturing feasibility of high specific power, radiation insensitive, thin silicon solar cells was demonstrated experimentally and with a model. Ultra-thin, light trapping structures were fabricated and the light trapping demonstrated experimentally. The design uses a micro-machined, grooved back surface to increase the optical path length by a factor of 20. This silicon solar cell will be highly tolerant to radiation because the base width is less than 25 microns making it insensitive to reduction in minority carrier lifetime. Since the silicon is bonded without silicone adhesives, this solar cell will also be insensitive to UV degradation. These solar cells are designed as a form, fit, and function replacement for existing state of the art silicon solar cells with the effect of simultaneously increasing specific power, power/area, and power supply life. Using a 3-mil thick cover glass and a 0.3 g/sq cm supporting Al honeycomb, a specific power for the solar cell plus cover glass and honeycomb of 80.2 W/Kg is projected. The development of this technology can result in a revolutionary improvement in high survivability silicon solar cell products for space with the potential to displace all existing solar cell technologies for single junction space applications.

A sensitive and selective magnetic graphene composite-modified polycrystalline-silicon nanowire field-effect transistor for bladder cancer diagnosis.

PubMed

Chen, Hsiao-Chien; Chen, Yi-Ting; Tsai, Rung-Ywan; Chen, Min-Cheng; Chen, Shi-Liang; Xiao, Min-Cong; Chen, Chien-Lun; Hua, Mu-Yi

2015-04-15

In this study, we describe the urinary quantification of apolipoprotein A II protein (APOA2 protein), a biomarker for the diagnosis of bladder cancer, using an n-type polycrystalline silicon nanowire field-effect transistor (poly-SiNW-FET). The modification of poly-SiNW-FET by magnetic graphene with long-chain acid groups (MGLA) synthesized via Friedel-Crafts acylation was compared with that obtained using short-chain acid groups (MGSA). Compared with MGSA, the MGLA showed a higher immobilization degree and bioactivity to the anti-APOA2 antibody (Ab) due to its lower steric hindrance. In addition, the magnetic properties enabled rapid separation and purification during Ab immobilization, ultimately preserving its bioactivity. The Ab-MGLA/poly-SiNW-FET exhibited a linear dependence of relative response to the logarithmical concentration in a range between 19.5pgmL(-1) and 1.95µgmL(-1), with a limit of detection (LOD) of 6.7pgmL(-1). An additional washing step before measurement aimed at excluding the interfering biocomponents ensured the reliability of the assay. We conclude that our biosensor efficiently distinguishes mean values of urinary APOA2 protein concentrations between patients with bladder cancer (29-344ngmL(-1)) and those with hernia (0.425-9.47ngmL(-1)). Copyright © 2014 Elsevier B.V. All rights reserved.

3D hierarchical assembly of ultrathin MnO2 nanoflakes on silicon nanowires for high performance micro-supercapacitors in Li- doped ionic liquid

PubMed Central

Dubal, Deepak P.; Aradilla, David; Bidan, Gérard; Gentile, Pascal; Schubert, Thomas J.S.; Wimberg, Jan; Sadki, Saïd; Gomez-Romero, Pedro

2015-01-01

Building of hierarchical core-shell hetero-structures is currently the subject of intensive research in the electrochemical field owing to its potential for making improved electrodes for high-performance micro-supercapacitors. Here we report a novel architecture design of hierarchical MnO2@silicon nanowires (MnO2@SiNWs) hetero-structures directly supported onto silicon wafer coupled with Li-ion doped 1-Methyl-1-propylpyrrolidinium bis(trifluromethylsulfonyl)imide (PMPyrrBTA) ionic liquids as electrolyte for micro-supercapacitors. A unique 3D mesoporous MnO2@SiNWs in Li-ion doped IL electrolyte can be cycled reversibly across a voltage of 2.2 V and exhibits a high areal capacitance of 13 mFcm−2. The high conductivity of the SiNWs arrays combined with the large surface area of ultrathin MnO2 nanoflakes are responsible for the remarkable performance of these MnO2@SiNWs hetero-structures which exhibit high energy density and excellent cycling stability. This combination of hybrid electrode and hybrid electrolyte opens up a novel avenue to design electrode materials for high-performance micro-supercapacitors. PMID:25985388

High Surface Area of Porous Silicon Drives Desorption of Intact Molecules

PubMed Central

Northen, Trent R.; Woo, Hin-Koon; Northen, Michael T.; Nordström, Anders; Uritboonthail, Winnie; Turner, Kimberly L.; Siuzdak, Gary

2007-01-01

The surface structure of porous silicon used in desorption/ionization on porous silicon (DIOS) mass analysis is known to play a primary role in the desorption/ionization (D/I) process. In this study, mass spectrometry and scanning electron microscopy (SEM) are used to examine the correlation between intact ion generation with surface ablation, and surface morphology. The DIOS process is found to be highly laser energy dependent and correlates directly with the appearance of surface ions (Sin+ and OSiH+). A threshold laser energy for DIOS is observed (10 mJ/cm2), which supports that DIOS is driven by surface restructuring and is not a strictly thermal process. In addition, three DIOS regimes are observed which correspond to surface restructuring and melting. These results suggest that higher surface area silicon substrates may enhance DIOS performance. A recent example which fits into this mechanism is silicon nanowires surface which have a high surface energy and concomitantly requires lower laser energy for analyte desorpton. PMID:17881245

Silicon solar cell process development, fabrication and analysis

NASA Technical Reports Server (NTRS)

Yoo, H. I.; Iles, P. A.; Leung, D. C.

1981-01-01

Solar cells were fabricated from EFG ribbons dendritic webs, cast ingots by heat exchanger method, and cast ingots by ubiquitous crystallization process. Baseline and other process variations were applied to fabricate solar cells. EFG ribbons grown in a carbon-containing gas atmosphere showed significant improvement in silicon quality. Baseline solar cells from dendritic webs of various runs indicated that the quality of the webs under investigation was not as good as the conventional CZ silicon, showing an average minority carrier diffusion length of about 60 um versus 120 um of CZ wafers. Detail evaluation of large cast ingots by HEM showed ingot reproducibility problems from run to run and uniformity problems of sheet quality within an ingot. Initial evaluation of the wafers prepared from the cast polycrystalline ingots by UCP suggested that the quality of the wafers from this process is considerably lower than the conventional CZ wafers. Overall performance was relatively uniform, except for a few cells which showed shunting problems caused by inclusions.

Dip coating process: Silicon sheet growth development for the large-area silicon sheet task of the low-cost silicon solar array project

NASA Technical Reports Server (NTRS)

Heaps, J. D.; Maciolek, R. B.; Zook, J. D.; Harrison, W. B.; Scott, M. W.; Hendrickson, G.; Wolner, H. A.; Nelson, L. D.; Schuller, T. L.; Peterson, A. A.

1976-01-01

The technical and economic feasibility of producing solar cell quality sheet silicon by dip-coating one surface of carbonized ceramic substrates with a thin layer of large grain polycrystalline silicon was investigated. The dip-coating methods studied were directed toward a minimum cost process with the ultimate objective of producing solar cells with a conversion efficiency of 10% or greater. The technique shows excellent promise for low cost, labor-saving, scale-up potentialities and would provide an end product of sheet silicon with a rigid and strong supportive backing. An experimental dip-coating facility was designed and constructed, several substrates were successfully dip-coated with areas as large as 25 sq cm and thicknesses of 12 micron to 250 micron. There appears to be no serious limitation on the area of a substrate that could be coated. Of the various substrate materials dip-coated, mullite appears to best satisfy the requirement of the program. An inexpensive process was developed for producing mullite in the desired geometry.

Grain-boundary physics in polycrystalline CuInSe2 revisited: experiment and theory.

PubMed

Yan, Yanfa; Noufi, R; Al-Jassim, M M

2006-05-26

Current studies have attributed the remarkable performance of polycrystalline CuInSe2 (CIS) to anomalous grain-boundary (GB) physics in CIS. The recent theory predicts that GBs in CIS are hole barriers, which prevent GB electrons from recombining. We examine the atomic structure and chemical composition of (112) GBs in Cu(In,Ga)Se2 (CIGS) using high-resolution Z-contrast imaging and nanoprobe x-ray energy-dispersive spectroscopy. We show that the theoretically predicted Cu-vacancy rows are not observed in (112) GBs in CIGS. Our first-principles modeling further reveals that the (112) GBs in CIS do not act as hole barriers. Our results suggest that the superior performance of polycrystalline CIS should not be explained solely by the GB behaviors.

A silicon carbide array for electrocorticography and peripheral nerve recording.

PubMed

Diaz-Botia, C A; Luna, L E; Neely, R M; Chamanzar, M; Carraro, C; Carmena, J M; Sabes, P N; Maboudian, R; Maharbiz, M M

2017-10-01

Current neural probes have a limited device lifetime of a few years. Their common failure mode is the degradation of insulating films and/or the delamination of the conductor-insulator interfaces. We sought to develop a technology that does not suffer from such limitations and would be suitable for chronic applications with very long device lifetimes. We developed a fabrication method that integrates polycrystalline conductive silicon carbide with insulating silicon carbide. The technology employs amorphous silicon carbide as the insulator and conductive silicon carbide at the recording sites, resulting in a seamless transition between doped and amorphous regions of the same material, eliminating heterogeneous interfaces prone to delamination. Silicon carbide has outstanding chemical stability, is biocompatible, is an excellent molecular barrier and is compatible with standard microfabrication processes. We have fabricated silicon carbide electrode arrays using our novel fabrication method. We conducted in vivo experiments in which electrocorticography recordings from the primary visual cortex of a rat were obtained and were of similar quality to those of polymer based electrocorticography arrays. The silicon carbide electrode arrays were also used as a cuff electrode wrapped around the sciatic nerve of a rat to record the nerve response to electrical stimulation. Finally, we demonstrated the outstanding long term stability of our insulating silicon carbide films through accelerated aging tests. Clinical translation in neural engineering has been slowed in part due to the poor long term performance of current probes. Silicon carbide devices are a promising technology that may accelerate this transition by enabling truly chronic applications.

A silicon carbide array for electrocorticography and peripheral nerve recording

NASA Astrophysics Data System (ADS)

Diaz-Botia, C. A.; Luna, L. E.; Neely, R. M.; Chamanzar, M.; Carraro, C.; Carmena, J. M.; Sabes, P. N.; Maboudian, R.; Maharbiz, M. M.

2017-10-01

Objective. Current neural probes have a limited device lifetime of a few years. Their common failure mode is the degradation of insulating films and/or the delamination of the conductor-insulator interfaces. We sought to develop a technology that does not suffer from such limitations and would be suitable for chronic applications with very long device lifetimes. Approach. We developed a fabrication method that integrates polycrystalline conductive silicon carbide with insulating silicon carbide. The technology employs amorphous silicon carbide as the insulator and conductive silicon carbide at the recording sites, resulting in a seamless transition between doped and amorphous regions of the same material, eliminating heterogeneous interfaces prone to delamination. Silicon carbide has outstanding chemical stability, is biocompatible, is an excellent molecular barrier and is compatible with standard microfabrication processes. Main results. We have fabricated silicon carbide electrode arrays using our novel fabrication method. We conducted in vivo experiments in which electrocorticography recordings from the primary visual cortex of a rat were obtained and were of similar quality to those of polymer based electrocorticography arrays. The silicon carbide electrode arrays were also used as a cuff electrode wrapped around the sciatic nerve of a rat to record the nerve response to electrical stimulation. Finally, we demonstrated the outstanding long term stability of our insulating silicon carbide films through accelerated aging tests. Significance. Clinical translation in neural engineering has been slowed in part due to the poor long term performance of current probes. Silicon carbide devices are a promising technology that may accelerate this transition by enabling truly chronic applications.

Variable temperature performance of a fully screen printed transistor switch

NASA Astrophysics Data System (ADS)

Zambou, Serges; Magunje, Batsirai; Rhyme, Setshedi; Walton, Stanley D.; Idowu, M. Florence; Unuigbe, David; Britton, David T.; Härting, Margit

2016-12-01

This article reports on the variable temperature performance of a flexible printed transistor which works as a current driven switch. In this work, electronic ink is formulated from nanostructured silicon produced by milling polycrystalline silicon. The study of the silicon active layer shows that its conductivity is based on thermal activation of carriers, and could be used as active layers in active devices. We further report on the transistors switching operation and their electrical performance under variable temperature. The reliability of the transistors at constant current bias was also investigated. Analysis of the electrical transfer characteristics from 340 to 10 K showed that the printed devices' current ON/OFF ratio increases as temperature decreases making it a better switch at lower temperatures. A constant current bias on a terminal for up to six hours shows extraordinary stability in electrical performance of the device.

Structural changes in shock compressed silicon observed using time-resolved x-ray diffraction at the Dynamic Compression Sector

NASA Astrophysics Data System (ADS)

Turneaure, Stefan; Zdanowicz, E.; Sinclair, N.; Graber, T.; Gupta, Y. M.

2015-06-01

Structural changes in shock compressed silicon were observed directly using time-resolved x-ray diffraction (XRD) measurements at the Dynamic Compression Sector at the Advanced Photon Source. The silicon samples were impacted by polycarbonate impactors accelerated to velocities greater than 5 km/s using a two-stage light gas gun resulting in impact stresses of about 25 GPa. The 23.5 keV synchrotron x-ray beam passed through the polycarbonate impactor, the silicon sample, and an x-ray window (polycarbonate or LiF) at an angle of 30 degrees relative to the impact plane. Four XRD frames (~ 100 ps snapshots) were obtained with 153.4 ns between frames near the time of impact. The XRD measurements indicate that in the peak shocked state, the silicon samples completely transformed to a high-pressure phase. XRD results for both shocked polycrystalline silicon and single crystal silicon will be presented and compared. Work supported by DOE/NNSA.

Radiation damage in high voltage silicon solar cells

NASA Technical Reports Server (NTRS)

Weinberg, I.; Brandhorst, H., Jr.; Swartz, C. K.; Weizer, V. G.

1980-01-01

Three high open-circuit voltage cell designs based on 0.1 ohm-cm p-type silicon were irradiated with 1 MeV electrons and their performance determined to fluences as high as 10 to the 15th power/sq cm. Of the three cell designs, radiation induced degradation was greatest in the high-low emitter (HLE cell). The diffused and ion implanted cells degraded approximately equally but less than the HLE cell. Degradation was greatest in an HLE cell exposed to X-rays before electron irradiation. The cell regions controlling both short-circuit current and open-circuit voltage degradation were defined in all three cell types. An increase in front surface recombination velocity accompanied time dependent degradation of an HLE cell after X-irradiation. It was speculated that this was indirectly due to a decrease in positive charge at the silicon-oxide interface. Modifications aimed at reducing radiation induced degradation are proposed for all three cell types.

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

NASA Astrophysics Data System (ADS)

Hussain, Muhammad M.; Rojas, Jhonathan P.; Torres Sevilla, Galo A.

2013-05-01

Today's information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor - heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon - industry's darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%).

Development of high temperature, high radiation resistant silicon semiconductors

NASA Technical Reports Server (NTRS)

Whorl, C. A.; Evans, A. W.

1972-01-01

The development of a hardened silicon power transistor for operation in severe nuclear radiation environments at high temperature was studied. Device hardness and diffusion techniques are discussed along with the geometries of hardened power transistor chips. Engineering drawings of 100 amp and 5 amp silicon devices are included.

Production of high specific activity silicon-32

DOEpatents

Phillips, Dennis R.; Brzezinski, Mark A.

1994-01-01

A process for preparation of silicon-32 is provide and includes contacting an irradiated potassium chloride target, including spallation products from a prior irradiation, with sufficient water, hydrochloric acid or potassium hydroxide to form a solution, filtering the solution, adjusting pH of the solution to from about 5.5 to about 7.5, admixing sufficient molybdate-reagent to the solution to adjust the pH of the solution to about 1.5 and to form a silicon-molybdate complex, contacting the solution including the silicon-molybdate complex with a dextran-based material, washing the dextran-based material to remove residual contaminants such as sodium-22, separating the silicon-molybdate complex from the dextran-based material as another solution, adding sufficient hydrochloric acid and hydrogen peroxide to the solution to prevent reformation of the silicon-molybdate complex and to yield an oxidization state of the molybdate adapted for subsequent separation by an anion exchange material, contacting the solution with an anion exchange material whereby the molybdate is retained by the anion exchange material and the silicon remains in solution, and optionally adding sufficient alkali metal hydroxide to adjust the pH of the solution to about 12 to 13. Additionally, a high specific activity silicon-32 product having a high purity is provided.

Direct-patterned optical waveguides on amorphous silicon films

DOEpatents

Vernon, Steve; Bond, Tiziana C.; Bond, Steven W.; Pocha, Michael D.; Hau-Riege, Stefan

2005-08-02

An optical waveguide structure is formed by embedding a core material within a medium of lower refractive index, i.e. the cladding. The optical index of refraction of amorphous silicon (a-Si) and polycrystalline silicon (p-Si), in the wavelength range between about 1.2 and about 1.6 micrometers, differ by up to about 20%, with the amorphous phase having the larger index. Spatially selective laser crystallization of amorphous silicon provides a mechanism for controlling the spatial variation of the refractive index and for surrounding the amorphous regions with crystalline material. In cases where an amorphous silicon film is interposed between layers of low refractive index, for example, a structure comprised of a SiO.sub.2 substrate, a Si film and an SiO.sub.2 film, the formation of guided wave structures is particularly simple.

Silicon Carbide Diodes Performance Characterization and Comparison With Silicon Devices

NASA Technical Reports Server (NTRS)

Lebron-Velilla, Ramon C.; Schwarze, Gene E.; Trapp, Scott

2003-01-01

Commercially available silicon carbide (SiC) Schottky diodes from different manufacturers were electrically tested and characterized at room temperature. Performed electrical tests include steady state forward and reverse I-V curves, as well as switching transient tests performed with the diodes operating in a hard switch dc-to-dc buck converter. The same tests were performed in current state of the art silicon (Si) and gallium arsenide (GaAs) Schottky and pn junction devices for evaluation and comparison purposes. The SiC devices tested have a voltage rating of 200, 300, and 600 V. The comparison parameters are forward voltage drop at rated current, reverse current at rated voltage and peak reverse recovery currents in the dc to dc converter. Test results show that steady state characteristics of the tested SiC devices are not superior to the best available Si Schottky and ultra fast pn junction devices. Transient tests reveal that the tested SiC Schottky devices exhibit superior transient behavior. This is more evident at the 300 and 600 V rating where SiC Schottky devices showed drastically lower reverse recovery currents than Si ultra fast pn diodes of similar rating.

Effect of grain size on optical transmittance of birefringent polycrystalline ceramics

NASA Astrophysics Data System (ADS)

Wen, Tzu-Chien

Polycrystalline ceramics are increasingly used for fabricating windows and domes for the mid infra-red regime (3-5 mum) due to their superior durability as compared to glass and the lower cost of their fabrication and finishing relative to single crystals without significant compromise in optical properties. Due to the noncubic structure, MgF2 and Al2O3 are birefringent ceramics. Birefringence causes scatter of light at the grain boundaries and diminishes in-line transmittance and optical performance. This dissertation presents experimental results and analyses of the grain-size and wavelength dependence of the in-line transmittance of polycrystalline MgF2 and Al2O3. Chapter 2 presents experimental results and analyses of light transmission in polycrystalline MgF2 as a function of the mean grain size at different wavelengths. The scattering coefficient of polycrystalline MgF 2 increased linearly with the mean grain size and inversely with the square of the wavelength of light. These trends are consistent with theoretical models based on both a limiting form of the Raleigh-Gans-Debye theory of particle scattering and light retardation theories that take refractive-index variations along the light path. Chapter 3 investigates the applicability of particle light scattering theories to light attenuation in birefringent polycrystalline ceramics by measuring light transmittance in a model two-phase system. The system consisted of microspheres of silica dispersed in a solution of glycerol in water. It was found that RGD theory showed the systematic deviation for higher particle volume fraction (φ > 0.2) and larger particle size (d p > 1 mum). This result suggested that light scattering models based on single particle scattering are unlikely to provide viable physical explanation for the effect of grain size on light transmittance in birefringent polycrystalline ceramics due to the high volume fraction in dense polycrystalline ceramics. Chapter 4 analyses light

Silicon carbide semiconductor technology for high temperature and radiation environments

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.

1993-01-01

Viewgraphs on silicon carbide semiconductor technology and its potential for enabling electronic devices to function in high temperature and high radiation environments are presented. Topics covered include silicon carbide; sublimation growth of 6H-SiC boules; SiC chemical vapor deposition reaction system; 6H silicon carbide p-n junction diode; silicon carbide MOSFET; and silicon carbide JFET radiation response.

Single-crystal silicon trench etching for fabrication of highly integrated circuits

NASA Astrophysics Data System (ADS)

Engelhardt, Manfred

1991-03-01

The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tomai, S.; Graduate School of Material Science, Nara Institute of Science and Technology, 8916-5, Takayama-cho, Ikoma, Nara 6300192; Terai, K.

We have developed a high-mobility and high-uniform oxide semiconductor using poly-crystalline semiconductor material composed of indium and zinc (p-IZO). A typical conduction mechanism of p-IZO film was demonstrated by the grain boundary scattering model as in polycrystalline silicon. The grain boundary potential of the 2-h-annealed IZO film was calculated to be 100 meV, which was comparable to that of the polycrystalline silicon. However, the p-IZO thin film transistor (TFT) measurement shows rather uniform characteristics. It denotes that the mobility deterioration around the grain boundaries is lower than the case for low-temperature polycrystalline silicon. This assertion was made based on the differencemore » of the mobility between the polycrystalline and amorphous IZO film being much smaller than is the case for silicon transistors. Therefore, we conclude that the p-IZO is a promising material for a TFT channel, which realizes high drift mobility and uniformity simultaneously.« less

Solution-Based Fabrication of Polycrystalline Si Thin-Film Transistors from Recycled Polysilanes.

PubMed

Sberna, Paolo M; Trifunovic, Miki; Ishihara, Ryoichi

2017-07-03

Currently, research has been focusing on printing and laser crystallization of cyclosilanes, bringing to life polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with outstanding properties. However, the synthesis of these Si-based inks is generally complex and expensive. Here, we prove that a polysilane ink, obtained as a byproduct of silicon gases and derivatives, can be used successfully for the synthesis of poly-Si by laser annealing, at room temperature, and for n- and p-channel TFTs. The devices, fabricated according to CMOS compatible processes at 350 °C, showed field effect mobilities up to 8 and 2 cm 2 /(V s) for n- and p-type TFTs, respectively. The presented method combines a low-cost coating technique with the usage of recycled material, opening a route to a convenient and sustainable production of large-area, flexible, and even disposable/single-use electronics.

High Power Silicon Carbide (SiC) Power Processing Unit Development

NASA Technical Reports Server (NTRS)

Scheidegger, Robert J.; Santiago, Walter; Bozak, Karin E.; Pinero, Luis R.; Birchenough, Arthur G.

2015-01-01

NASA GRC successfully designed, built and tested a technology-push power processing unit for electric propulsion applications that utilizes high voltage silicon carbide (SiC) technology. The development specifically addresses the need for high power electronics to enable electric propulsion systems in the 100s of kilowatts. This unit demonstrated how high voltage combined with superior semiconductor components resulted in exceptional converter performance.

Simulations of in situ x-ray diffraction from uniaxially compressed highly textured polycrystalline targets

DOE Office of Scientific and Technical Information (OSTI.GOV)

McGonegle, David, E-mail: d.mcgonegle1@physics.ox.ac.uk; Wark, Justin S.; Higginbotham, Andrew

2015-08-14

A growing number of shock compression experiments, especially those involving laser compression, are taking advantage of in situ x-ray diffraction as a tool to interrogate structure and microstructure evolution. Although these experiments are becoming increasingly sophisticated, there has been little work on exploiting the textured nature of polycrystalline targets to gain information on sample response. Here, we describe how to generate simulated x-ray diffraction patterns from materials with an arbitrary texture function subject to a general deformation gradient. We will present simulations of Debye-Scherrer x-ray diffraction from highly textured polycrystalline targets that have been subjected to uniaxial compression, as maymore » occur under planar shock conditions. In particular, we study samples with a fibre texture, and find that the azimuthal dependence of the diffraction patterns contains information that, in principle, affords discrimination between a number of similar shock-deformation mechanisms. For certain cases, we compare our method with results obtained by taking the Fourier transform of the atomic positions calculated by classical molecular dynamics simulations. Illustrative results are presented for the shock-induced α–ϵ phase transition in iron, the α–ω transition in titanium and deformation due to twinning in tantalum that is initially preferentially textured along [001] and [011]. The simulations are relevant to experiments that can now be performed using 4th generation light sources, where single-shot x-ray diffraction patterns from crystals compressed via laser-ablation can be obtained on timescales shorter than a phonon period.« less

Simulations of in situ x-ray diffraction from uniaxially compressed highly textured polycrystalline targets

DOE PAGES

McGonegle, David; Milathianaki, Despina; Remington, Bruce A.; ...

2015-08-11

A growing number of shock compression experiments, especially those involving laser compression, are taking advantage of in situ x-ray diffraction as a tool to interrogate structure and microstructure evolution. Although these experiments are becoming increasingly sophisticated, there has been little work on exploiting the textured nature of polycrystalline targets to gain information on sample response. Here, we describe how to generate simulated x-ray diffraction patterns from materials with an arbitrary texture function subject to a general deformation gradient. We will present simulations of Debye-Scherrer x-ray diffraction from highly textured polycrystalline targets that have been subjected to uniaxial compression, as maymore » occur under planar shock conditions. In particular, we study samples with a fibre texture, and find that the azimuthal dependence of the diffraction patterns contains information that, in principle, affords discrimination between a number of similar shock-deformation mechanisms. For certain cases, we compare our method with results obtained by taking the Fourier transform of the atomic positions calculated by classical molecular dynamics simulations. Illustrative results are presented for the shock-induced α–ϵ phase transition in iron, the α–ω transition in titanium and deformation due to twinning in tantalum that is initially preferentially textured along [001] and [011]. In conclusion, the simulations are relevant to experiments that can now be performed using 4th generation light sources, where single-shot x-ray diffraction patterns from crystals compressed via laser-ablation can be obtained on timescales shorter than a phonon period.« less

Requirements for high-efficiency solar cells

NASA Technical Reports Server (NTRS)

Sah, C. T.

1986-01-01

Minimum recombination and low injection level are essential for high efficiency. Twenty percent AM1 efficiency requires a dark recombination current density of 2 x 10 to the minus 13th power A/sq cm and a recombination center density of less than 10 to the 10th power /cu cm. Recombination mechanisms at thirteen locations in a conventional single crystalline silicon cell design are reviewed. Three additional recombination locations are described at grain boundaries in polycrystalline cells. Material perfection and fabrication process optimization requirements for high efficiency are outlined. Innovative device designs to reduce recombination in the bulk and interfaces of single crystalline cells and in the grain boundary of polycrystalline cells are reviewed.

Monolithically Integrated High-β Nanowire Lasers on Silicon.

PubMed

Mayer, B; Janker, L; Loitsch, B; Treu, J; Kostenbader, T; Lichtmannecker, S; Reichert, T; Morkötter, S; Kaniber, M; Abstreiter, G; Gies, C; Koblmüller, G; Finley, J J

2016-01-13

Reliable technologies for the monolithic integration of lasers onto silicon represent the holy grail for chip-level optical interconnects. In this context, nanowires (NWs) fabricated using III-V semiconductors are of strong interest since they can be grown site-selectively on silicon using conventional epitaxial approaches. Their unique one-dimensional structure and high refractive index naturally facilitate low loss optical waveguiding and optical recirculation in the active NW-core region. However, lasing from NWs on silicon has not been achieved to date, due to the poor modal reflectivity at the NW-silicon interface. We demonstrate how, by inserting a tailored dielectric interlayer at the NW-Si interface, low-threshold single mode lasing can be achieved in vertical-cavity GaAs-AlGaAs core-shell NW lasers on silicon as measured at low temperature. By exploring the output characteristics along a detection direction parallel to the NW-axis, we measure very high spontaneous emission factors comparable to nanocavity lasers (β = 0.2) and achieve ultralow threshold pump energies ≤11 pJ/pulse. Analysis of the input-output characteristics of the NW lasers and the power dependence of the lasing emission line width demonstrate the potential for high pulsation rates ≥250 GHz. Such highly efficient nanolasers grown monolithically on silicon are highly promising for the realization of chip-level optical interconnects.

High-Efficiency Silicon Carbide (SiC) Converters. Delivery Order 0001: Development of High-Temperature, High-Power, High-Efficiency, High-Voltage Converters Using Silicon Carbide

DTIC Science & Technology

2004-03-01

32 Silicon Dioxide as a Mask ......................................................... 34 Silicon Nitride as a Mask...phosphorous (P), and arsenic (As) for n-type material and aluminum (Al), boron (B), beryllium (Be), gallium (Ga), oxygen (O), and scandium (Sc) for...O2 in carbon tetrafluoride (CF4), nitrogen trifluoride (NF3), and sulfur hexafluoride (SF6) were observed because these gases produce high fluorine

Manganese molybdate nanoflakes on silicon microchannel plates as novel nano energetic material

PubMed Central

Zhang, Chi; Wu, Dajun; Shi, Liming; Zhu, Yiping; Xiong, Dayuan; Xu, Shaohui; Huang, Rong; Qi, Ruijuan; Zhang, Wenchao; Chu, Paul K.

2017-01-01

Nano energetic materials have attracted great attention recently owing to their potential applications for both civilian and military purposes. By introducing silicon microchannel plates (Si-MCPs) three-dimensional (3D)-ordered structures, monocrystalline MnMoO4 with a size of tens of micrometres and polycrystalline MnMoO4 nanoflakes are produced on the surface and sidewall of nickel-coated Si-MCP, respectively. The MnMoO4 crystals ripen controllably forming polycrystalline nanoflakes with lattice fringes of 0.542 nm corresponding to the (1¯11) plane on the sidewall. And these MnMoO4 nanoflakes show apparent thermite performance which is rarely reported and represents MnMoO4 becoming a new category of energetic materials after nanocrystallization. Additionally, the nanocrystallization mechanism is interpreted by ionic diffusion caused by 3D structure. The results indicate that the Si-MCP is a promising substrate for nanocrystallization of energetic materials such as MnMoO4. PMID:29308255

Manganese molybdate nanoflakes on silicon microchannel plates as novel nano energetic material.

PubMed

Zhang, Chi; Wu, Dajun; Shi, Liming; Zhu, Yiping; Xiong, Dayuan; Xu, Shaohui; Huang, Rong; Qi, Ruijuan; Zhang, Wenchao; Wang, Lianwei; Chu, Paul K

2017-12-01

Nano energetic materials have attracted great attention recently owing to their potential applications for both civilian and military purposes. By introducing silicon microchannel plates (Si-MCPs) three-dimensional (3D)-ordered structures, monocrystalline MnMoO 4 with a size of tens of micrometres and polycrystalline MnMoO 4 nanoflakes are produced on the surface and sidewall of nickel-coated Si-MCP, respectively. The MnMoO 4 crystals ripen controllably forming polycrystalline nanoflakes with lattice fringes of 0.542 nm corresponding to the [Formula: see text] plane on the sidewall. And these MnMoO 4 nanoflakes show apparent thermite performance which is rarely reported and represents MnMoO 4 becoming a new category of energetic materials after nanocrystallization. Additionally, the nanocrystallization mechanism is interpreted by ionic diffusion caused by 3D structure. The results indicate that the Si-MCP is a promising substrate for nanocrystallization of energetic materials such as MnMoO 4 .

High Sensitivity and High Detection Specificity of Gold-Nanoparticle-Grafted Nanostructured Silicon Mass Spectrometry for Glucose Analysis.

PubMed

Tsao, Chia-Wen; Yang, Zhi-Jie

2015-10-14

Desorption/ionization on silicon (DIOS) is a high-performance matrix-free mass spectrometry (MS) analysis method that involves using silicon nanostructures as a matrix for MS desorption/ionization. In this study, gold nanoparticles grafted onto a nanostructured silicon (AuNPs-nSi) surface were demonstrated as a DIOS-MS analysis approach with high sensitivity and high detection specificity for glucose detection. A glucose sample deposited on the AuNPs-nSi surface was directly catalyzed to negatively charged gluconic acid molecules on a single AuNPs-nSi chip for MS analysis. The AuNPs-nSi surface was fabricated using two electroless deposition steps and one electroless etching step. The effects of the electroless fabrication parameters on the glucose detection efficiency were evaluated. Practical application of AuNPs-nSi MS glucose analysis in urine samples was also demonstrated in this study.

Substitution of ceramics for high temperature alloys. [advantages of using silicon carbides and silicon nitrides in gas turbine engines

NASA Technical Reports Server (NTRS)

Probst, H. B.

1978-01-01

The high temperature capability of ceramics such as silicon nitride and silicon carbide can result in turbine engines of improved efficiency. Other advantages when compared to the nickel and cobalt alloys in current use are raw material availability, lower weight, erosion/corrosion resistance, and potentially lower cost. The use of ceramics in three different sizes of gas turbine is considered; these are the large utility turbines, advanced aircraft turbines, and small automotive turbines. Special consideration, unique to each of these applications, arise when one considers substituting ceramics for high temperature alloys. The effects of material substitutions are reviewed in terms of engine performance, operating economy, and secondary effects.

Synthesis and characterization of silicon nanowire arrays for photovoltaic applications

NASA Astrophysics Data System (ADS)

Eichfeld, Sarah M.

nanowires grown in the AAO membranes was then compared to the resistivity of silicon nanowires grown on Si and measured using single wire four-point measurements. It was determined that the undoped silicon nanowires grown in AAO have a lower resistivity compared to nanowires grown on Si substrates. This indicates the presence of an unintentional acceptor. The resistivity of the silicon nanowires was found to change as the dopant/SiH4 ratio was varied during growth. The growth and doping conditions developed from this study were then used to fabricate p-type SiNW arrays on the AAO coated glass substrates. The final investigation in this thesis focused on the development of a process for radial coating of an n-type Si layer on the p-type Si nanowires. While prior studies demonstrated the fabrication of polycrystalline n-type Si shell layers on Si nanowires, an epitaxial n-type Si shell layer is ultimately of interest to obtain a high quality p-n interface. Initial n-type Si thin film deposition studies were carried out on sapphire substrates using SiH 4 as the silicon precursor to investigate the effect of growth conditions on thickness uniformity, growth rate and doping level. High growth temperatures (>900°C) are generally desired for achieving epitaxial growth; however, gas phase depletion of the SiH4 source along the length of the reactor resulted in poor thickness uniformity. To improve the uniformity, the substrate was shifted closer to the gas inlet at higher temperatures (950°C) and the total flow of gas through the reactor was increased to 200 sccm. A series of n-type doping experiments were also carried out. Hall measurements indicated n-type behavior and four-point measurements yielded a change in resistivity based on the PH3/SiH4 ratio. Pre-coating sample preparation was determined to be important for achieving a high quality Si shell layer. Since Au can diffuse down the sides of the nanowire during sample cooldown after growth, the Au tips were etched away

Active phase correction of high resolution silicon photonic arrayed waveguide gratings.

PubMed

Gehl, M; Trotter, D; Starbuck, A; Pomerene, A; Lentine, A L; DeRose, C

2017-03-20

Arrayed waveguide gratings provide flexible spectral filtering functionality for integrated photonic applications. Achieving narrow channel spacing requires long optical path lengths which can greatly increase the footprint of devices. High index contrast waveguides, such as those fabricated in silicon-on-insulator wafers, allow tight waveguide bends which can be used to create much more compact designs. Both the long optical path lengths and the high index contrast contribute to significant optical phase error as light propagates through the device. Therefore, silicon photonic arrayed waveguide gratings require active or passive phase correction following fabrication. Here we present the design and fabrication of compact silicon photonic arrayed waveguide gratings with channel spacings of 50, 10 and 1 GHz. The largest device, with 11 channels of 1 GHz spacing, has a footprint of only 1.1 cm². Using integrated thermo-optic phase shifters, the phase error is actively corrected. We present two methods of phase error correction and demonstrate state-of-the-art cross-talk performance for high index contrast arrayed waveguide gratings. As a demonstration of possible applications, we perform RF channelization with 1 GHz resolution. Additionally, we generate unique spectral filters by applying non-zero phase offsets calculated by the Gerchberg Saxton algorithm.

Further development and application of polycrystalline metal whiskers

NASA Technical Reports Server (NTRS)

Schladitz, H. J.

1979-01-01

High strength metal whiskers have a larger versatile field of application than monocrystalline whiskers. Although polycrystalline metal whiskers can be used for composites, preferably by extrusion in thermoplastics or by infiltration of resins or metals into whisker networks, the chief application at present may be the production and various use of whisker networks. Such networks can be produced up to high degrees of porosity and besides high mechanical strength, they have high inside surfaces and high electric conductivity. There are for instance, applications concerning construction of electrodes for batteries and fuel cells, catalysts and also new heat-exchanger material, capable of preparing fuel oil and gasoline in order to assist a high-efficiency combustion. The technical application of polycrystalline metal whiskers require their modification as well as the construction of a pilot production unit.

A High Temperature Silicon Carbide mosfet Power Module With Integrated Silicon-On-Insulator-Based Gate Drive

DOE PAGES

Wang, Zhiqiang; Shi, Xiaojie; Tolbert, Leon M.; ...

2014-04-30

Here we present a board-level integrated silicon carbide (SiC) MOSFET power module for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI)-based gate driver capable of operating at 200°C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC MOSFET phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate drivermore » and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermosensitive electrical parameter and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225°C.« less

Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

PubMed Central

Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F.; Ross, Caroline A.

2013-01-01

Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4)O3−δ and polycrystalline (CeY2)Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2)Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates. PMID:28788379

Carbon-silicon core-shell nanowires as high capacity electrode for lithium ion batteries.

PubMed

Cui, Li-Feng; Yang, Yuan; Hsu, Ching-Mei; Cui, Yi

2009-09-01

We introduce a novel design of carbon-silicon core-shell nanowires for high power and long life lithium battery electrodes. Amorphous silicon was coated onto carbon nanofibers to form a core-shell structure and the resulted core-shell nanowires showed great performance as anode material. Since carbon has a much smaller capacity compared to silicon, the carbon core experiences less structural stress or damage during lithium cycling and can function as a mechanical support and an efficient electron conducting pathway. These nanowires have a high charge storage capacity of approximately 2000 mAh/g and good cycling life. They also have a high Coulmbic efficiency of 90% for the first cycle and 98-99.6% for the following cycles. A full cell composed of LiCoO(2) cathode and carbon-silicon core-shell nanowire anode is also demonstrated. Significantly, using these core-shell nanowires we have obtained high mass loading and an area capacity of approximately 4 mAh/cm(2), which is comparable to commercial battery values.

High-Performance Ultrathin Organic-Inorganic Hybrid Silicon Solar Cells via Solution-Processed Interface Modification.

PubMed

Zhang, Jie; Zhang, Yinan; Song, Tao; Shen, Xinlei; Yu, Xuegong; Lee, Shuit-Tong; Sun, Baoquan; Jia, Baohua

2017-07-05

Organic-inorganic hybrid solar cells based on n-type crystalline silicon and poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) exhibited promising efficiency along with a low-cost fabrication process. In this work, ultrathin flexible silicon substrates, with a thickness as low as tens of micrometers, were employed to fabricate hybrid solar cells to reduce the use of silicon materials. To improve the light-trapping ability, nanostructures were built on the thin silicon substrates by a metal-assisted chemical etching method (MACE). However, nanostructured silicon resulted in a large amount of surface-defect states, causing detrimental charge recombination. Here, the surface was smoothed by solution-processed chemical treatment to reduce the surface/volume ratio of nanostructured silicon. Surface-charge recombination was dramatically suppressed after surface modification with a chemical, associated with improved minority charge-carrier lifetime. As a result, a power conversion efficiency of 9.1% was achieved in the flexible hybrid silicon solar cells, with a substrate thickness as low as ∼14 μm, indicating that interface engineering was essential to improve the hybrid junction quality and photovoltaic characteristics of the hybrid devices.

Silicon carbide, an emerging high temperature semiconductor

NASA Technical Reports Server (NTRS)

Matus, Lawrence G.; Powell, J. Anthony

1991-01-01

In recent years, the aerospace propulsion and space power communities have expressed a growing need for electronic devices that are capable of sustained high temperature operation. Applications for high temperature electronic devices include development instrumentation within engines, engine control, and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Other earth-based applications include deep-well drilling instrumentation, nuclear reactor instrumentation and control, and automotive sensors. To meet the needs of these applications, the High Temperature Electronics Program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. Research is focussed on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of silicon carbide electronic devices and integrated sensors. The progress made in developing silicon carbide is presented, and the challenges that lie ahead are discussed.

Current status of solar cell performance of unconventional silicon sheets

NASA Technical Reports Server (NTRS)

Yoo, H. I.; Liu, J. K.

1981-01-01

It is pointed out that activities in recent years directed towards reduction in the cost of silicon solar cells for terrestrial photovoltaic applications have resulted in impressive advancements in the area of silicon sheet formation from melt. The techniques used in the process of sheet formation can be divided into two general categories. All approaches in one category require subsequent ingot wavering. The various procedures of the second category produce silicon in sheet form. The performance of baseline solar cells is discussed. The baseline process included identification marking, slicing to size, and surface treatment (etch-polishing) when needed. Attention is also given to the performance of cells with process variations, and the effects of sheet quality on performance and processing.

High speed analog-to-digital conversion with silicon photonics

NASA Astrophysics Data System (ADS)

Holzwarth, C. W.; Amatya, R.; Araghchini, M.; Birge, J.; Byun, H.; Chen, J.; Dahlem, M.; DiLello, N. A.; Gan, F.; Hoyt, J. L.; Ippen, E. P.; Kärtner, F. X.; Khilo, A.; Kim, J.; Kim, M.; Motamedi, A.; Orcutt, J. S.; Park, M.; Perrott, M.; Popovic, M. A.; Ram, R. J.; Smith, H. I.; Zhou, G. R.; Spector, S. J.; Lyszczarz, T. M.; Geis, M. W.; Lennon, D. M.; Yoon, J. U.; Grein, M. E.; Schulein, R. T.; Frolov, S.; Hanjani, A.; Shmulovich, J.

2009-02-01

Sampling rates of high-performance electronic analog-to-digital converters (ADC) are fundamentally limited by the timing jitter of the electronic clock. This limit is overcome in photonic ADC's by taking advantage of the ultra-low timing jitter of femtosecond lasers. We have developed designs and strategies for a photonic ADC that is capable of 40 GSa/s at a resolution of 8 bits. This system requires a femtosecond laser with a repetition rate of 2 GHz and timing jitter less than 20 fs. In addition to a femtosecond laser this system calls for the integration of a number of photonic components including: a broadband modulator, optical filter banks, and photodetectors. Using silicon-on-insulator (SOI) as the platform we have fabricated these individual components. The silicon optical modulator is based on a Mach-Zehnder interferometer architecture and achieves a VπL of 2 Vcm. The filter banks comprise 40 second-order microring-resonator filters with a channel spacing of 80 GHz. For the photodetectors we are exploring ion-bombarded silicon waveguide detectors and germanium films epitaxially grown on silicon utilizing a process that minimizes the defect density.

High Performance Arcjet Engines

NASA Technical Reports Server (NTRS)

Kennel, Elliot B.; Ivanov, Alexey Nikolayevich; Nikolayev, Yuri Vyacheslavovich

1994-01-01

This effort sought to exploit advanced single crystal tungsten-tantalum alloy material for fabrication of a high strength, high temperature arcjet anode. The use of this material is expected to result in improved strength, temperature resistance, and lifetime compared to state of the art polycrystalline alloys. In addition, the use of high electrical and thermal conductivity carbon-carbon composites was considered, and is believed to be a feasible approach. Highly conductive carbon-carbon composite anode capability represents enabling technology for rotating-arc designs derived from the Russian Scientific Research Institute of Thermal Processes (NIITP) because of high heat fluxes at the anode surface. However, for US designs the anode heat flux is much smaller, and thus the benefits are not as great as in the case of NIITP-derived designs. Still, it does appear that the tensile properties of carbon-carbon can be even better than those of single crystal tungsten alloys, especially when nearly-single-crystal fibers such as vapor grown carbon fiber (VGCF) are used. Composites fabricated from such materials must be coated with a refractory carbide coating in order to ensure compatibility with high temperature hydrogen. Fabrication of tungsten alloy single crystals in the sizes required for fabrication of an arcjet anode has been shown to be feasible. Test data indicate that the material can be expected to be at least the equal of W-Re-HfC polycrystalline alloy in terms of its tensile properties, and possibly superior. We are also informed by our colleagues at Scientific Production Association Luch (NP0 Luch) that it is possible to use Russian technology to fabricate polycrystalline W-Re-HfC or other high strength alloys if desired. This is important because existing engines must rely on previously accumulated stocks of these materials, and a fabrication capability for future requirements is not assured.

High performance arcjet engines

NASA Astrophysics Data System (ADS)

Kennel, Elliot B.; Ivanov, Alexey Nikolayevich; Nikolayev, Yuri Vyacheslavovich

1994-10-01

This effort sought to exploit advanced single crystal tungsten-tantalum alloy material for fabrication of a high strength, high temperature arcjet anode. The use of this material is expected to result in improved strength, temperature resistance, and lifetime compared to state of the art polycrystalline alloys. In addition, the use of high electrical and thermal conductivity carbon-carbon composites was considered, and is believed to be a feasible approach. Highly conductive carbon-carbon composite anode capability represents enabling technology for rotating-arc designs derived from the Russian Scientific Research Institute of Thermal Processes (NIITP) because of high heat fluxes at the anode surface. However, for US designs the anode heat flux is much smaller, and thus the benefits are not as great as in the case of NIITP-derived designs. Still, it does appear that the tensile properties of carbon-carbon can be even better than those of single crystal tungsten alloys, especially when nearly-single-crystal fibers such as vapor grown carbon fiber (VGCF) are used. Composites fabricated from such materials must be coated with a refractory carbide coating in order to ensure compatibility with high temperature hydrogen. Fabrication of tungsten alloy single crystals in the sizes required for fabrication of an arcjet anode has been shown to be feasible. Test data indicate that the material can be expected to be at least the equal of W-Re-HfC polycrystalline alloy in terms of its tensile properties, and possibly superior. We are also informed by our colleagues at Scientific Production Association Luch (NP0 Luch) that it is possible to use Russian technology to fabricate polycrystalline W-Re-HfC or other high strength alloys if desired. This is important because existing engines must rely on previously accumulated stocks of these materials, and a fabrication capability for future requirements is not assured.

Analysis of defect structure in silicon. Silicon sheet growth development for the large area silicon sheet task of the Low-Cost Solar array Project

NASA Technical Reports Server (NTRS)

Natesh, R.; Mena, M.; Plichta, M.; Smith, J. M.; Sellani, M. A.

1982-01-01

One hundred ninety-three silicon sheet samples, approximately 880 square centimeters, were analyzed for twin boundary density, dislocation pit density, and grain boundary length. One hundred fifteen of these samples were manufactured by a heat exchanger method, thirty-eight by edge defined film fed growth, twenty-three by the silicon on ceramics process, and ten by the dendritic web process. Seven solar cells were also step-etched to determine the internal defect distribution on these samples. Procedures were developed or the quantitative characterization of structural defects such as dislocation pits, precipitates, twin & grain boundaries using a QTM 720 quantitative image analyzing system interfaced with a PDP 11/03 mini computer. Characterization of the grain boundary length per unit area for polycrystalline samples was done by using the intercept method on an Olympus HBM Microscope.

High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures.

PubMed

Liu, Yuan; Sheng, Jiming; Wu, Hao; He, Qiyuan; Cheng, Hung-Chieh; Shakir, Muhammad Imran; Huang, Yu; Duan, Xiangfeng

2016-06-01

Scalable fabrication of vertical-tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm(-2) . This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene-silicon heterostructures. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

High-Efficiency Polycrystalline CdS/CdTe Solar Cells on Buffered Commercial TCO-Coated Glass

NASA Astrophysics Data System (ADS)

Colegrove, E.; Banai, R.; Blissett, C.; Buurma, C.; Ellsworth, J.; Morley, M.; Barnes, S.; Gilmore, C.; Bergeson, J. D.; Dhere, R.; Scott, M.; Gessert, T.; Sivananthan, Siva

2012-10-01

Multiple polycrystalline CdS/CdTe solar cells with efficiencies greater than 15% were produced on buffered, commercially available Pilkington TEC Glass at EPIR Technologies, Inc. (EPIR, Bolingbrook, IL) and verified by the National Renewable Energy Laboratory (NREL). n-CdS and p-CdTe were grown by chemical bath deposition (CBD) and close space sublimation, respectively. Samples with sputter-deposited CdS were also investigated. Initial results indicate that this is a viable dry-process alternative to CBD for production-scale processing. Published results for polycrystalline CdS/CdTe solar cells with high efficiencies are typically based on cells using research-grade transparent conducting oxides (TCOs) requiring high-temperature processing inconducive to low-cost manufacturing. EPIR's results for cells on commercial glass were obtained by implementing a high-resistivity SnO2 buffer layer and by optimizing the CdS window layer thickness. The high-resistivity buffer layer prevents the formation of CdTe-TCO junctions, thereby maintaining a high open-circuit voltage and fill factor, whereas using a thin CdS layer reduces absorption losses and improves the short-circuit current density. EPIR's best device demonstrated an NREL-verified efficiency of 15.3%. The mean efficiency of hundreds of cells produced with a buffer layer between December 2010 and June 2011 is 14.4%. Quantum efficiency results are presented to demonstrate EPIR's progress toward NREL's best-published results.

Studies of silicon quantum dots prepared at different substrate temperatures

NASA Astrophysics Data System (ADS)

Al-Agel, Faisal A.; Suleiman, Jamal; Khan, Shamshad A.

2017-03-01

In this research work, we have synthesized silicon quantum dots at different substrate temperatures 193, 153 and 123 K at a fixed working pressure 5 Torr. of Argon gas. The structural studies of these silicon quantum dots have been undertaken using X-ray diffraction, Field Emission Scanning Electron Microscopy (FESEM) and High Resolution Transmission Electron Microscopy (HRTEM). The optical and electrical properties have been studied using UV-visible spectroscopy, Fourier transform infrared (FTIR) spectroscopy, Fluorescence spectroscopy and I-V measurement system. X-ray diffraction pattern of Si quantum dots prepared at different temperatures show the amorphous nature except for the quantum dots synthesized at 193 K which shows polycrystalline nature. FESEM images of samples suggest that the size of quantum dots varies from 2 to 8 nm. On the basis of UV-visible spectroscopy measurements, a direct band gap has been observed for Si quantum dots. FTIR spectra suggest that as-grown Si quantum dots are partially oxidized which is due exposure of as-prepared samples to air after taking out from the chamber. PL spectra of the synthesized silicon quantum dots show an intense peak at 444 nm, which may be attributed to the formation of Si quantum dots. Temperature dependence of dc conductivity suggests that the dc conductivity enhances exponentially by raising the temperature. On the basis above properties i.e. direct band gap, high absorption coefficient and high conductivity, these silicon quantum dots will be useful for the fabrication of solar cells.

Enabling electrolyte compositions for columnar silicon anodes in high energy secondary batteries

NASA Astrophysics Data System (ADS)

Piwko, Markus; Thieme, Sören; Weller, Christine; Althues, Holger; Kaskel, Stefan

2017-09-01

Columnar silicon structures are proven as high performance anodes for high energy batteries paired with low (sulfur) or high (nickel-cobalt-aluminum oxide, NCA) voltage cathodes. The introduction of a fluorinated ether/sulfolane solvent mixture drastically improves the capacity retention for both battery types due to an improved solid electrolyte interface (SEI) on the surface of the silicon electrode which reduces irreversible reactions normally causing lithium loss and rapid capacity fading. For the lithium silicide/sulfur battery cycling stability is significantly improved as compared to a frequently used reference electrolyte (DME/DOL) reaching a constant coulombic efficiency (CE) as high as 98%. For the silicon/NCA battery with higher voltage, the addition of only small amounts of fluoroethylene carbonate (FEC) to the novel electrolyte leads to a stable capacity over at least 50 cycles and a CE as high as 99.9%. A high volumetric energy density close to 1000 Wh l-1 was achieved with the new electrolyte taking all inactive components of the stack into account for the estimation.

On the failure load and mechanism of polycrystalline graphene by nanoindentation

PubMed Central

Sha, Z. D.; Wan, Q.; Pei, Q. X.; Quek, S. S.; Liu, Z. S.; Zhang, Y. W.; Shenoy, V. B.

2014-01-01

Nanoindentation has been recently used to measure the mechanical properties of polycrystalline graphene. However, the measured failure loads are found to be scattered widely and vary from lab to lab. We perform molecular dynamics simulations of nanoindentation on polycrystalline graphene at different sites including grain center, grain boundary (GB), GB triple junction, and holes. Depending on the relative position between the indenter tip and defects, significant scattering in failure load is observed. This scattering is found to arise from a combination of the non-uniform stress state, varied and weakened strengths of different defects, and the relative location between the indenter tip and the defects in polycrystalline graphene. Consequently, the failure behavior of polycrystalline graphene by nanoindentation is critically dependent on the indentation site, and is thus distinct from uniaxial tensile loading. Our work highlights the importance of the interaction between the indentation tip and defects, and the need to explicitly consider the defect characteristics at and near the indentation site in polycrystalline graphene during nanoindentation. PMID:25500732

Development of a high efficiency thin silicon solar cell. [fabrication and stability tests

NASA Technical Reports Server (NTRS)

Lindmayer, J.

1976-01-01

One hundred thin (120 microns to 260 microns) silicon-aluminum solar cells were fabricated and tested. Silicon slices were prepared, into which an aluminum alloy was evaporated over a range of temperatures and times. Antireflection coatings of tantalum oxide were applied to the cells. Reflectance of the silicon-aluminum interfaces was correlated to alloy temperature (graphs are shown). Optical measurements of the rear surface-internal reflectance of the cells were performed using a Beckman spectrophotometer. An improved gridline pattern was evaluated and stability tests (thermal cycling tests) were performed. Results show that: (1) a high-index, high-transmittance antireflection coating was obtained; (2) the improved metallization of the cells gave a 60 percent rear surface-internal reflectance, and the cells displayed excellent fill factors and blue response of the spectrum; (3) an improved gridline pattern (5 micron linewidths compared to 13 micron linewidths) resulted in a 1.3 percent improvement in short circuit currents; and (4) the stability tests showed no change in cell properties.

Vertical waveguides integrated with silicon photodetectors: Towards high efficiency and low cross-talk image sensors

NASA Astrophysics Data System (ADS)

Tut, Turgut; Dan, Yaping; Duane, Peter; Yu, Young; Wober, Munib; Crozier, Kenneth B.

2012-01-01

We describe the experimental realization of vertical silicon nitride waveguides integrated with silicon photodetectors. The waveguides are embedded in a silicon dioxide layer. Scanning photocurrent microscopy is performed on a device containing a waveguide, and on a device containing the silicon dioxide layer, but without the waveguide. The results confirm the waveguide's ability to guide light onto the photodetector with high efficiency. We anticipate that the use of these structures in image sensors, with one waveguide per pixel, would greatly improve efficiency and significantly reduce inter-pixel crosstalk.

Nanopattern-guided growth of single-crystal silicon on amorphous substrates and high-performance sub-100 nm thin-film transistors for three-dimensional integrated circuits

NASA Astrophysics Data System (ADS)

Gu, Jian

/off current ratio, device-to-device uniformity etc. Two-dimensional device simulations show that PaTH TFTs are comparable to silicon-on-insulator (SOI) devices, making it a promising candidate for the fabrication of future high performance, low-power 3D integrated circuits. Finally, an ultrafast nanolithography technique, laser-assisted direct imprint (LADI) is introduced. LADI shows the ability of patterning nanostructures directly in silicon in nanoseconds with sub-10 nm resolution. The process has potential applications in multiple disciplines, and could be extended to other materials and processes.

High-purity silicon crystal growth investigations

NASA Technical Reports Server (NTRS)

Ciszek, T. F.; Hurd, J. L.; Schuyler, T.

1985-01-01

The study of silicon sheet material requirements for high efficiency solar cells is reported. Research continued on obtaining long lifetime single crystal float zone silicon and on understanding and reducing the mechanisms that limit the achievement of long lifetimes. The mechanisms studied are impurities, thermal history, point defects, and surface effect. The lifetime related crystallographic defects are characterized by X-ray topography and electron beam induced current.

Review on analog/radio frequency performance of advanced silicon MOSFETs

NASA Astrophysics Data System (ADS)

Passi, Vikram; Raskin, Jean-Pierre

2017-12-01

Aggressive gate-length downscaling of the metal-oxide-semiconductor field-effect transistor (MOSFET) has been the main stimulus for the growth of the integrated circuit industry. This downscaling, which has proved beneficial to digital circuits, is primarily the result of the need for improved circuit performance and cost reduction and has resulted in tremendous reduction of the carrier transit time across the channel, thereby resulting in very high cut-off frequencies. It is only in recent decades that complementary metal-oxide-semiconductor (CMOS) field-effect transistor (FET) has been considered as the radio frequency (RF) technology of choice. In this review, the status of the digital, analog and RF figures of merit (FoM) of silicon-based FETs is presented. State-of-the-art devices with very good performance showing low values of drain-induced barrier lowering, sub-threshold swing, high values of gate transconductance, Early voltage, cut-off frequencies, and low minimum noise figure, and good low-frequency noise characteristic values are reported. The dependence of these FoM on the device gate length is also shown, helping the readers to understand the trends and challenges faced by shorter CMOS nodes. Device performance boosters including silicon-on-insulator substrates, multiple-gate architectures, strain engineering, ultra-thin body and buried-oxide and also III-V and 2D materials are discussed, highlighting the transistor characteristics that are influenced by these boosters. A brief comparison of the two main contenders in continuing Moore’s law, ultra-thin body buried-oxide and fin field-effect transistors are also presented. The authors would like to mention that despite extensive research carried out in the semiconductor industry, silicon-based MOSFET will continue to be the driving force in the foreseeable future.

Highly stable, extremely high-temperature, nonvolatile memory based on resistance switching in polycrystalline Pt nanogaps

PubMed Central

Suga, Hiroshi; Suzuki, Hiroya; Shinomura, Yuma; Kashiwabara, Shota; Tsukagoshi, Kazuhito; Shimizu, Tetsuo; Naitoh, Yasuhisa

2016-01-01

Highly stable, nonvolatile, high-temperature memory based on resistance switching was realized using a polycrystalline platinum (Pt) nanogap. The operating temperature of the memory can be drastically increased by the presence of a sharp-edged Pt crystal facet in the nanogap. A short distance between the facet edges maintains the nanogap shape at high temperature, and the sharp shape of the nanogap densifies the electric field to maintain a stable current flow due to field migration. Even at 873 K, which is a significantly higher temperature than feasible for conventional semiconductor memory, the nonvolatility of the proposed memory allows stable ON and OFF currents, with fluctuations of less than or equal to 10%, to be maintained for longer than eight hours. An advantage of this nanogap scheme for high-temperature memory is its secure operation achieved through the assembly and disassembly of a Pt needle in a high electric field. PMID:27725705

Performance of the PHOBOS silicon sensors

NASA Astrophysics Data System (ADS)

Decowski, M. P.; Back, B. B.; Baker, M. D.; Barton, D. S.; Betts, R. R.; Bindel, R.; Budzanowski, A.; Busza, W.; Carroll, A.; Garcia, E.; George, N.; Gulbrandsen, K.; Gushue, S.; Halliwell, C.; Hamblen, J.; Heintzelman, G. A.; Henderson, C.; Hołyński, R.; Hofman, D. J.; Holzman, B.; Johnson, E.; Kane, J. L.; Katzy, J.; Khan, N.; Kucewicz, W.; Kulinich, P.; Lin, W. T.; Manly, S.; McLeod, D.; Michałowski, J.; Mignerey, A. C.; Mülmenstädt, J.; Nouicer, R.; Olszewski, A.; Pak, R.; Park, I. C.; Pernegger, H.; Reed, C.; Remsberg, L. P.; Reuter, M.; Roland, C.; Roland, G.; Rosenberg, L.; Sarin, P.; Sawicki, P.; Skulski, W.; Steadman, S. G.; Stephans, G. S. F.; Steinberg, P.; Stodulski, M.; Sukhanov, A.; Tang, J.-L.; Teng, R.; Trzupek, A.; Vale, C.; van Nieuwenhuizen, G. J.; Verdier, R.; Wadsworth, B.; Wolfs, F. L. H.; Wosiek, B.; Woźniak, K.; Wuosmaa, A. H.; Wysłouch, B.

2002-02-01

The PHOBOS detector is designed to study the physics of Au+Au collisions at the Relativistic Heavy Ion Collider. The detector is almost entirely made of silicon pad detectors and was fully operational during the first year of operation. The detector is described, and key performance characteristics are summarized.

Improved thermoelectric performance of p-type polycrystalline bismuth telluride via hydrothermal treatment with alkali metal salts

NASA Astrophysics Data System (ADS)

Su, Zhe

The field of thermoelectric research has attracted a lot of interest in hope of helping address the energy crisis. In recent years, low-dimensional thermoelectric materials have been found promising and thus become a popular school of thought. However, the high complexity and cost for fabricating low-dimensional materials give rise to the attempt to further improve conventional bulk polycrystalline materials. Polycrystals are featured by numerous grain boundaries that can scatter heat-carrying phonons to significantly reduce the thermal conductivity kappa whereas at the same time can unfortunately deteriorate the electrical resistivity rho. Aiming at the dualism of the grain boundaries in determining the transport properties of polycrystalline materials, a novel concept of "grain boundary engineering" has been proposed in order to have a thermoelectrically favorable grain boundary. In this dissertation, a polycrystalline p-type Bi2Te 3 system has been intensively investigated in light of such a concept that was realized through a hydrothermal nano-coating treatment technique. P-type Bi0.4Sb1.6Te3 powder was hydrothermally treated with alkali metal salt XBH4 ( X = Na, K or Rb) solution. After the treatment, there formed an alkali-metal-containing surface layer of nanometers thick on the p-Bi2Te3 grains. The Na-treatment, leaving the Seebeck coefficient alpha almost untouched, lowered kappa the most while the Rb-treatment at the same time increased alpha slightly and decreased rho the most. Compared to the untreated sample, Na- and Rb-treatments improved the dimensionless figure of merit ZT by ˜ 30% due to the reduced kappa and ˜ 38% owing to the improved the power factor PF, respectively. The grain boundary phase provides a new avenue by which one can potentially decouple the otherwise inter-related alpha, rho and kappa within one thermoelectric material. The morphologic investigation showed this surface layer lacked crystallinity, if any, and was possibly an

Chemical vapor deposition of silicon, silicon dioxide, titanium and ferroelectric thin films

NASA Astrophysics Data System (ADS)

Chen, Feng

Various silicon-based thin films (such as epitaxial, polycrystalline and amorphous silicon thin films, silicon dioxide thin films and silicon nitride thin films), titanium thin film and various ferroelectric thin films (such as BaTiO3 and PbTiO3 thin films) play critical roles in the manufacture of microelectronics circuits. For the past few years, there have been tremendous interests to search for cheap, safe and easy-to-use methods to develop those thin films with high quality and good step coverage. Silane is a critical chemical reagent widely used to deposit silicon-based thin films. Despite its wide use, silane is a dangerous material. It is pyrophoric, extremely flammable and may explode from heat, shock and/or friction. Because of the nature of silane, serious safety issues have been raised concerning the use, transportation, and storage of compressed gas cylinders of silane. Therefore it is desired to develop safer ways to deposit silicon-based films. In chapter III, I present the results of our research in the following fields: (1) Silane generator, (2) Substitutes of silane for deposition of silicon and silicon dioxide thin films, (3) Substitutes of silane for silicon dioxide thin film deposition. In chapter IV, hydropyridine is introduced as a new ligand for use in constructing precursors for chemical vapor deposition. Detachement of hydropyridine occurs by a low-temperature reaction leaving hydrogen in place of the hydropyridine ligands. Hydropyridine ligands can be attached to a variety of elements, including main group metals, such as aluminum and antimony, transition metals, such as titanium and tantalum, semiconductors such as silicon, and non-metals such as phosphorus and arsenic. In this study, hydropyridine-containing titanium compounds were synthesized and used as chemical vapor deposition precursors for deposition of titanium containing thin films. Some other titanium compounds were also studied for comparison. In chapter V, Chemical Vapor

Process to produce silicon carbide fibers using a controlled concentration of boron oxide vapor

NASA Technical Reports Server (NTRS)

Barnard, Thomas Duncan (Inventor); Lipowitz, Jonathan (Inventor); Nguyen, Kimmai Thi (Inventor)

2001-01-01

A process for producing polycrystalline silicon carbide by heating an amorphous ceramic fiber that contains silicon and carbon in an environment containing boron oxide vapor. The boron oxide vapor is produced in situ by the reaction of a boron containing material such as boron carbide and an oxidizing agent such as carbon dioxide, and the amount of boron oxide vapor can be controlled by varying the amount and rate of addition of the oxidizing agent.

Process to produce silicon carbide fibers using a controlled concentration of boron oxide vapor

NASA Technical Reports Server (NTRS)

Barnard, Thomas Duncan (Inventor); Lipowitz, Jonathan (Inventor); Nguyen, Kimmai Thi (Inventor)

2000-01-01

A process for producing polycrystalline silicon carbide includes heating an amorphous ceramic fiber that contains silicon and carbon in an environment containing boron oxide vapor. The boron oxide vapor is produced in situ by the reaction of a boron containing material such as boron carbide and an oxidizing agent such as carbon dioxide, and the amount of boron oxide vapor can be controlled by varying the amount and rate of addition of the oxidizing agent.

Study of silicon strip waveguides with diffraction gratings and photonic crystals tuned to a wavelength of 1.5 µm

DOE Office of Scientific and Technical Information (OSTI.GOV)

Barabanenkov, M. Yu., E-mail: barab@iptm.ru; Vyatkin, A. F.; Volkov, V. T.

2015-12-15

Single-mode submicrometer-thick strip waveguides on silicon-on-insulator substrates, fabricated by silicon-planar-technology methods are considered. To solve the problem of 1.5-µm wavelength radiation input-output and its frequency filtering, strip diffraction gratings and two-dimensional photonic crystals are integrated into waveguides. The reflection and transmission spectra of gratings and photonic crystals are calculated. The waveguide-mode-attenuation coefficient for a polycrystalline silicon waveguide is experimentally estimated.

Hazardous Waste Cleanup: Momentive Performance Materials Silicones, LLC in Waterford, New York

EPA Pesticide Factsheets

Momentive Performance Materials Silicones, LLC (MPM Silicones, LLC) owns and operates a large silicone manufacturing facility at 260 Hudson River Road, Waterford on an 800-acre site in the Town of Waterford, Saratoga County, New York. The facility is

Crystallization and doping of amorphous silicon on low temperature plastic

DOEpatents

Kaschmitter, James L.; Truher, Joel B.; Weiner, Kurt H.; Sigmon, Thomas W.

1994-01-01

A method or process of crystallizing and doping amorphous silicon (a-Si) on a low-temperature plastic substrate using a short pulsed high energy source in a selected environment, without heat propagation and build-up in the substrate. The pulsed energy processing of the a-Si in a selected environment, such as BF3 and PF5, will form a doped micro-crystalline or poly-crystalline silicon (pc-Si) region or junction point with improved mobilities, lifetimes and drift and diffusion lengths and with reduced resistivity. The advantage of this method or process is that it provides for high energy materials processing on low cost, low temperature, transparent plastic substrates. Using pulsed laser processing a high (>900.degree. C.), localized processing temperature can be achieved in thin films, with little accompanying temperature rise in the substrate, since substrate temperatures do not exceed 180.degree. C. for more than a few microseconds. This method enables use of plastics incapable of withstanding sustained processing temperatures (higher than 180.degree. C.) but which are much lower cost, have high tolerance to ultraviolet light, have high strength and good transparency, compared to higher temperature plastics such as polyimide.

Crystallization and doping of amorphous silicon on low temperature plastic

DOEpatents

Kaschmitter, J.L.; Truher, J.B.; Weiner, K.H.; Sigmon, T.W.

1994-09-13

A method or process of crystallizing and doping amorphous silicon (a-Si) on a low-temperature plastic substrate using a short pulsed high energy source in a selected environment, without heat propagation and build-up in the substrate is disclosed. The pulsed energy processing of the a-Si in a selected environment, such as BF3 and PF5, will form a doped micro-crystalline or poly-crystalline silicon (pc-Si) region or junction point with improved mobilities, lifetimes and drift and diffusion lengths and with reduced resistivity. The advantage of this method or process is that it provides for high energy materials processing on low cost, low temperature, transparent plastic substrates. Using pulsed laser processing a high (>900 C), localized processing temperature can be achieved in thin films, with little accompanying temperature rise in the substrate, since substrate temperatures do not exceed 180 C for more than a few microseconds. This method enables use of plastics incapable of withstanding sustained processing temperatures (higher than 180 C) but which are much lower cost, have high tolerance to ultraviolet light, have high strength and good transparency, compared to higher temperature plastics such as polyimide. 5 figs.

A Novel Approach to Synthesize Micrometer-Sized Porous Silicon as a High Performance Anode for Lithium-Ion Batteries

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jia, Haiping; Zheng, Jianming; Song, Junhua

Porous structured silicon (p-Si) has been recognized as one of the most promising anodes for Li-ion batteries. However, many available methods to synthesize p-Si are difficult to scale up due to their high production cost. Here we introduce a new approach to obtain spherical micrometer-sized silicon with unique porous structure by using a microemulsion of the cost-effective of silica nanoparticles and magnesiothermic reduction method. The spherical micron-sized p-Si particles prepared by this approach consist of highly aligned nano-sized silicon and exhibit a tap density close to that of bulk Si particles. They have demonstrated significantly improved electrochemical stability compared tomore » nano-Si. Well controlled void space and a highly graphitic carbon coating on the p-Si particles enable good stability of the structure and low overall resistance, thus resulting in a Si-based anode with high capacity (~1467 mAh g –1 at 1 C), enhanced cycle life (370 cycles with 83% capacity retention), and high rate capability (~650 mAh g –1 at 5 C). Furthermore, this approach may also be generalized to prepare other hierarchical structured high capacity anode materials for constructing high energy density lithium ion batteries.« less

A Novel Approach to Synthesize Micrometer-Sized Porous Silicon as a High Performance Anode for Lithium-Ion Batteries

DOE PAGES

Jia, Haiping; Zheng, Jianming; Song, Junhua; ...

2018-05-21

Porous structured silicon (p-Si) has been recognized as one of the most promising anodes for Li-ion batteries. However, many available methods to synthesize p-Si are difficult to scale up due to their high production cost. Here we introduce a new approach to obtain spherical micrometer-sized silicon with unique porous structure by using a microemulsion of the cost-effective of silica nanoparticles and magnesiothermic reduction method. The spherical micron-sized p-Si particles prepared by this approach consist of highly aligned nano-sized silicon and exhibit a tap density close to that of bulk Si particles. They have demonstrated significantly improved electrochemical stability compared tomore » nano-Si. Well controlled void space and a highly graphitic carbon coating on the p-Si particles enable good stability of the structure and low overall resistance, thus resulting in a Si-based anode with high capacity (~1467 mAh g –1 at 1 C), enhanced cycle life (370 cycles with 83% capacity retention), and high rate capability (~650 mAh g –1 at 5 C). Furthermore, this approach may also be generalized to prepare other hierarchical structured high capacity anode materials for constructing high energy density lithium ion batteries.« less

Polycrystalline silicon material availability and market pricing outlook for 1980 through 1988

NASA Technical Reports Server (NTRS)

Costogue, E. N.; Ferber, R. R.

1984-01-01

The results of the second JPL update to an original report to assess the availability and prices of polycrystalline Si for solar cells in the 1983-88 interval are reported. It is noted that the demand for poly-Si for solar cells competes with the demand for the same material for semiconductors, although the solar cell industry can use material rejected from the semiconductor industry. A sufficient supply is projected for the 6 yr period, rising from 3224 metric tons to 10,220 metric tons in 1988, with prices dropping from the 1980 level of $140/kg to $25/kg. The price reduction and improved production are noted to be due in large part to DOE efforts at defining lower-cost production processes.

Electrochemical Deposition of High Purity Silicon from Molten Salts

NASA Astrophysics Data System (ADS)

Haarberg, Geir Martin

Several approaches were tried in order to develop an electrochemical route for producing high purity silicon from molten salts. SiO2, K2SiF6 and metallurgical silicon were used as the source of silicon. Molten electrolytes based on chloride (CaCl2-NaCl) and fluoride (LiF-KF) at temperatures from 550 - 900 oC were used. Transient electrochemical techniques were used to study the electrochemical behaviour of dissolved silicon species. Electrolysis experiments were carried out to deposit silicon.

Electrochemical Deposition of High Purity Silicon in Molten Salts

NASA Astrophysics Data System (ADS)

Haarberg, Geir Martin

Several approaches were tried in order to develop an electrochemical route for producing high purity silicon from molten salts. SiO2, K2SiF6 and metallurgical silicon were used as the source of silicon. Molten electrolytes based on chloride (CaCl2-NaCl) and fluoride (LiF-KF) at temperatures from 550 - 900 °C were used. Transient electrochemical techniques were used to study the electrochemical behaviour of dissolved silicon species. Electrolysis experiments were carried out to deposit silicon.

Brillouin-scattering measurements of surface-acoustic-wave velocities in silicon at high temperatures

NASA Astrophysics Data System (ADS)

Stoddart, P. R.; Comins, J. D.; Every, A. G.

1995-06-01

Brillouin-scattering measurements of the angular dependence of surface-acoustic-wave velociites at high temperatures are reported. The measurements have been performed on the (001) surface of a silicon single crystal at temperatures up to 800 °C, allowing comparison of the results with calculated velocities based on existing data for the elastic constants and thermal expansion of silicon in this temperature range. The change in surface-acoustic-wave velocity with temperature is reproduced well, demonstrating the value of this technique for the characterization of the high-temperature elastic properties of opaque materials.

Method and apparatus for producing high purity silicon

DOEpatents

Olson, Jerry M.

1984-01-01

A method for producing high purity silicon includes forming a copper silie alloy and positioning the alloy within an enclosure. A filament member is also placed within the enclosure opposite the alloy. The enclosure is then filled with a chemical vapor transport gas adapted for transporting silicon. Finally, both the filament member and the alloy are heated to temperatures sufficient to cause the gas to react with silicon at the alloy surface and deposit the reacted silicon on the filament member. In addition, an apparatus for carrying out this method is also disclosed.

Method and apparatus for producing high purity silicon

DOEpatents

Olson, J.M.

1983-05-27

A method for producing high purity silicon includes forming a copper silicide alloy and positioning the alloy within an enclosure. A filament member is also placed within the enclosure opposite the alloy. The enclosure is then filled with a chemical vapor transport gas adapted for transporting silicon. Finally, both the filament member and the alloy are heated to temperatures sufficient to cause the gas to react with silicon at the alloy surface and deposit the reacted silicon on the filament member. In addition, an apparatus for carrying out this method is also disclosed.

Silicon Carbide Capacitive High Temperature MEMS Strain Transducer

DTIC Science & Technology

2012-03-22

SILICON CARBIDE CAPACITIVE HIGH TEMPURATURE MEMS STRAIN TRANSDUCER THESIS Richard P. Weisenberger, DR01, USAF AFIT/GE/ENG...declared a work of the U.S. Government and is not subject to copyright protection in the United States AFIT/GE/ENG/12-43 SILICON CARBIDE CAPACITIVE...STATEMENT A. APPROVED FOR PUBLIC RELEASE; DISTRIBUTION UNLIMITED AFIT/GE/ENG/12-43 SILICON CARBIDE CAPACITIVE IDGH TEMPURATURE MEMS STRAIN TRANSDUCER

Evaluation of Electrical Characteristics and Trap-State Density in Bottom-Gate Polycrystalline Thin Film Transistors Processed with High-Pressure Water Vapor Annealing

NASA Astrophysics Data System (ADS)

Kunii, Masafumi

2006-02-01

This paper discusses electrical characteristics and trap-state density in polycrystalline silicon (poly-Si) used in bottom-gate poly-Si thin film transistors (TFTs) processed with high-pressure water vapor annealing (HWA). The threshold voltage uniformity of the HWA-processed TFTs is improved by 42% for N-channel and 38% for P-channel TFTs in terms of standard deviation, and carrier mobility is enhanced by 10% or greater for both N- and P-channel TFTs than those TFTs processed conventionally. Subthreshold swing is also improved by HWA, showing that HWA postannealing is effective for improving the Si/SiO2 interface of the bottom-gate TFTs. Two types of TFTs having different poly-Si crystallinities are examined to investigate carrier transport in poly-Si processed by HWA postannealing. The evaluation of trap-state density for the two types of poly-Si reveals that HWA postannealing is more efficient for N-channel than for P-channel TFTs. Furthermore, HWA postannealing is more effective for poly-Si with high crystallinity to improve TFT characteristics. The analysis of the trap-state distributions and the activation energy of TFT drain current indicate that HWA deactivates dangling bonds highly localized at poly-Si grain boundaries (GBs). Thus, HWA postannealing effects can be interpreted by a GB barrier potential model similar to that applied to conventional hydrogenation.

Highly crosslinked silicon polymers for gas chromatography columns

NASA Technical Reports Server (NTRS)

Shen, Thomas C. (Inventor)

1994-01-01

A new highly crosslinked silicone polymer particle for gas chromatography application and a process for synthesizing such copolymer are described. The new copolymer comprises vinyltriethoxysilane and octadecyltrichlorosilane. The copolymer has a high degree of crosslinking and a cool balance of polar to nonpolar sites in the porous silicon polymer assuring fast separation of compounds of variable polarity.

Sodium accumulation at potential-induced degradation shunted areas in polycrystalline silicon modules

DOE PAGES

Harvey, Steven P.; Aguiar, Jeffery A.; Hacke, Peter; ...

2016-09-19

Here, we investigated potential-induced degradation (PID) in silicon mini-modules that were subjected to accelerated stressing to induce PID conditions. Shunted areas on the cells were identified with photoluminescence and dark lock-in thermography (DLIT) imaging. The identical shunted areas were then analyzed via time-of-flight secondary-ion mass spectrometry (TOFSIMS) imaging, 3-D tomography, and high-resolution transmission electron microscopy. The TOF-SIMS imaging indicates a high concentration of sodium in the shunted areas, and 3-D tomography reveals that the sodium extends more than 2 um from the surface below shunted regions. Transmission electron microscopy investigation reveals that a stacking fault is present at an areamore » identified as shunted by DLIT imaging. After the removal of surface sodium, tomography reveals persistent sodium present around the junction depth of 300 nm and a drastic difference in sodium content at the junction when comparing shunted and nonshunted regions.« less

Superstrong micro-grained polycrystalline diamond compact through work hardening under high pressure

NASA Astrophysics Data System (ADS)

Liu, Jin; Zhan, Guodong; Wang, Qiang; Yan, Xiaozhi; Liu, Fangming; Wang, Pei; Lei, Li; Peng, Fang; Kou, Zili; He, Duanwei

2018-02-01

We report an approach to strengthen micro-grained polycrystalline diamond (MPD) compact through work hardening under high pressure and high temperature, in which both hardness and fracture toughness are simultaneously boosted. Micro-sized diamond powders are treated without any additives under a high pressure of 14 GPa and temperatures ranging from 1000 °C to 2000 °C. It was found that the high pressure and high temperature environments could constrain the brittle feature and cause a severe plastic deformation of starting diamond grains to form a mutual bonded diamond network. The relative density is increased with temperature to nearly fully dense at 1600 °C. The Vickers hardness of the well-prepared MPD bulks at 14 GPa and 1900 °C reaches the top limit of the single crystal diamond of 120 GPa, and the near-metallic fracture toughness of the sample is as high as 18.7 MPa m1/2.

Design, fabrication and characterization of a poly-silicon PN junction

NASA Astrophysics Data System (ADS)

Tower, Jason D.

This thesis details the design, fabrication, and characterization of a PN junction formed from p-type mono-crystalline silicon and n-type poly-crystalline silicon. The primary product of this project was a library of standard operating procedures (SOPs) for the fabrication of such devices, laying the foundations for future work and the development of a class in fabrication processes. The fabricated PN junction was characterized; in particular its current-voltage relationship was measured and fit to models. This characterization was to determine whether or not the fabrication process could produce working PN junctions with acceptable operational parameters.

Deposition method for producing silicon carbide high-temperature semiconductors

DOEpatents

Hsu, George C.; Rohatgi, Naresh K.

1987-01-01

An improved deposition method for producing silicon carbide high-temperature semiconductor material comprising placing a semiconductor substrate composed of silicon carbide in a fluidized bed silicon carbide deposition reactor, fluidizing the bed particles by hydrogen gas in a mildly bubbling mode through a gas distributor and heating the substrate at temperatures around 1200.degree.-1500.degree. C. thereby depositing a layer of silicon carbide on the semiconductor substrate.

Process for producing high purity silicon nitride by the direct reaction between elemental silicon and nitrogen-hydrogen liquid reactants

DOEpatents

Pugar, Eloise A.; Morgan, Peter E. D.

1990-01-01

A process is disclosed for producing, at a low temperature, a high purity reaction product consisting essentially of silicon, nitrogen, and hydrogen which can then be heated to produce a high purity alpha silicon nitride. The process comprises: reacting together a particulate elemental high purity silicon with a high purity nitrogen-hydrogen reactant in its liquid state (such as ammonia or hydrazine) having the formula: N.sub.n H.sub.(n+m) wherein: n=1-4 and m=2 when the nitrogen-hydrogen reactant is straight chain, and 0 when the nitrogen-hydrogen reactant is cyclic. High purity silicon nitride can be formed from this intermediate product by heating the intermediate product at a temperature of from about 1200.degree.-1700.degree. C. for a period from about 15 minutes up to about 2 hours to form a high purity alpha silicon nitride product. The discovery of the existence of a soluble Si-N-H intermediate enables chemical pathways to be explored previously unavailable in conventional solid state approaches to silicon-nitrogen ceramics.

Process for producing high purity silicon nitride by the direct reaction between elemental silicon and nitrogen-hydrogen liquid reactants

DOEpatents

Pugar, E.A.; Morgan, P.E.D.

1987-09-15

A process is disclosed for producing, at a low temperature, a high purity reaction product consisting essentially of silicon, nitrogen, and hydrogen which can then be heated to produce a high purity alpha silicon nitride. The process comprises: reacting together a particulate elemental high purity silicon with a high purity nitrogen-hydrogen reactant in its liquid state (such as ammonia or hydrazine) having the formula: N/sub n/H/sub (n+m)/ wherein: n = 1--4 and m = 2 when the nitrogen-hydrogen reactant is straight chain, and 0 when the nitrogen-hydrogen reactant is cyclic. High purity silicon nitride can be formed from this intermediate product by heating the intermediate product at a temperature of from about 1200--1700/degree/C for a period from about 15 minutes up to about 2 hours to form a high purity alpha silicon nitride product. The discovery of the existence of a soluble Si/endash/N/endash/H intermediate enables chemical pathways to be explored previously unavailable in conventional solid-state approaches to silicon-nitrogen ceramics

Methods for Producing High-Performance Silicon Carbide Fibers, Architectural Preforms, and High-Temperature Composite Structures

NASA Technical Reports Server (NTRS)

Yun, Hee-Mann (Inventor); DiCarlo, James A. (Inventor)

2014-01-01

Methods are disclosed for producing architectural preforms and high-temperature composite structures containing high-strength ceramic fibers with reduced preforming stresses within each fiber, with an in-situ grown coating on each fiber surface, with reduced boron within the bulk of each fiber, and with improved tensile creep and rupture resistance properties tier each fiber. The methods include the steps of preparing an original sample of a preform formed from a pre-selected high-strength silicon carbide ceramic fiber type, placing the original sample in a processing furnace under a pre-selected preforming stress state and thermally treating the sample in the processing furnace at a pre-selected processing temperature and hold time in a processing gas having a pre-selected composition, pressure, and flow rate. For the high-temperature composite structures, the method includes additional steps of depositing a thin interphase coating on the surface of each fiber and forming a ceramic or carbon-based matrix within the sample.

Physics of grain boundaries in polycrystalline photovoltaic semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yan, Yanfa, E-mail: yanfa.yan@utoledo.edu; Yin, Wan-Jian; Wu, Yelong

2015-03-21

Thin-film solar cells based on polycrystalline Cu(In,Ga)Se{sub 2} (CIGS) and CdTe photovoltaic semiconductors have reached remarkable laboratory efficiencies. It is surprising that these thin-film polycrystalline solar cells can reach such high efficiencies despite containing a high density of grain boundaries (GBs), which would seem likely to be nonradiative recombination centers for photo-generated carriers. In this paper, we review our atomistic theoretical understanding of the physics of grain boundaries in CIGS and CdTe absorbers. We show that intrinsic GBs with dislocation cores exhibit deep gap states in both CIGS and CdTe. However, in each solar cell device, the GBs can bemore » chemically modified to improve their photovoltaic properties. In CIGS cells, GBs are found to be Cu-rich and contain O impurities. Density-functional theory calculations reveal that such chemical changes within GBs can remove most of the unwanted gap states. In CdTe cells, GBs are found to contain a high concentration of Cl atoms. Cl atoms donate electrons, creating n-type GBs between p-type CdTe grains, forming local p-n-p junctions along GBs. This leads to enhanced current collections. Therefore, chemical modification of GBs allows for high efficiency polycrystalline CIGS and CdTe thin-film solar cells.« less

Physics of grain boundaries in polycrystalline photovoltaic semiconductors

DOE PAGES

Yan, Yanfa; Yin, Wan-Jian; Wu, Yelong; ...

2015-03-16

Thin-film solar cells based on polycrystalline Cu(In,Ga)Se 2 (CIGS) and CdTe photovoltaic semiconductors have reached remarkable laboratory efficiencies. It is surprising that these thin-film polycrystalline solar cells can reach such high efficiencies despite containing a high density of grain boundaries (GBs), which would seem likely to be nonradiative recombination centers for photo-generated carriers. In this study, we review our atomistic theoretical understanding of the physics of grain boundaries in CIGS and CdTe absorbers. We show that intrinsic GBs with dislocation cores exhibit deep gap states in both CIGS and CdTe. Although, in each solar cell device, the GBs can bemore » chemically modified to improve their photovoltaic properties. In CIGS cells, GBs are found to be Cu-rich and contain O impurities. Density-functional theory calculations reveal that such chemical changes within GBs can remove most of the unwanted gap states. In CdTe cells, GBs are found to contain a high concentration of Cl atoms. Cl atoms donate electrons, creating n-type GBs between p-type CdTe grains, forming local p-n-p junctions along GBs. This leads to enhanced current collections. In conclusion, chemical modification of GBs allows for high efficiency polycrystalline CIGS and CdTe thin-film solar cells.« less

Formation of silicon nanowire packed films from metallurgical-grade silicon powder using a two-step metal-assisted chemical etching method.

PubMed

Ouertani, Rachid; Hamdi, Abderrahmen; Amri, Chohdi; Khalifa, Marouan; Ezzaouia, Hatem

2014-01-01

In this work, we use a two-step metal-assisted chemical etching method to produce films of silicon nanowires shaped in micrograins from metallurgical-grade polycrystalline silicon powder. The first step is an electroless plating process where the powder was dipped for few minutes in an aqueous solution of silver nitrite and hydrofluoric acid to permit Ag plating of the Si micrograins. During the second step, corresponding to silicon dissolution, we add a small quantity of hydrogen peroxide to the plating solution and we leave the samples to be etched for three various duration (30, 60, and 90 min). We try elucidating the mechanisms leading to the formation of silver clusters and silicon nanowires obtained at the end of the silver plating step and the silver-assisted silicon dissolution step, respectively. Scanning electron microscopy (SEM) micrographs revealed that the processed Si micrograins were covered with densely packed films of self-organized silicon nanowires. Some of these nanowires stand vertically, and some others tilt to the silicon micrograin facets. The thickness of the nanowire films increases from 0.2 to 10 μm with increasing etching time. Based on SEM characterizations, laser scattering estimations, X-ray diffraction (XRD) patterns, and Raman spectroscopy, we present a correlative study dealing with the effect of the silver-assisted etching process on the morphological and structural properties of the processed silicon nanowire films.

High-contrast gratings for long-wavelength laser integration on silicon

NASA Astrophysics Data System (ADS)

Sciancalepore, Corrado; Descos, Antoine; Bordel, Damien; Duprez, Hélène; Letartre, Xavier; Menezo, Sylvie; Ben Bakir, Badhise

2014-02-01

Silicon photonics is increasingly considered as the most promising way-out to the relentless growth of data traffic in today's telecommunications infrastructures, driving an increase in transmission rates and computing capabilities. This is in fact challenging the intrinsic limit of copper-based, short-reach interconnects and microelectronic circuits in data centers and server architectures to offer enough modulation bandwidth at reasonable power dissipation. In the context of the heterogeneous integration of III-V direct-bandgap materials on silicon, optics with high-contrast metastructures enables the efficient implementation of optical functions such as laser feedback, input/output (I/O) to active/passive components, and optical filtering, while heterogeneous integration of III-V layers provides sufficient optical gain, resulting in silicon-integrated laser sources. The latest ensure reduced packaging costs and reduced footprint for the optical transceivers, a key point for the short reach communications. The invited talk will introduce the audience to the latest breakthroughs concerning the use of high-contrast gratings (HCGs) for the integration of III-V-on-Si verticalcavity surface-emitting lasers (VCSELs) as well as Fabry-Perot edge-emitters (EELs) in the main telecom band around 1.55 μm. The strong near-field mode overlap within HCG mirrors can be exploited to implement unique optical functions such as dense wavelength division multiplexing (DWDM): a 16-λ100-GHz-spaced channels VCSEL array is demonstrated. On the other hand, high fabrication yields obtained via molecular wafer bonding of III-V alloys on silicon-on-insulator (SOI) conjugate excellent device performances with cost-effective high-throughput production, supporting industrial needs for a rapid research-to-market transfer.

Ultra-thin silicon solar cells for high performance panel applications

NASA Technical Reports Server (NTRS)

Gay, C. F.

1978-01-01

Solar cells have been fabricated which achieved the highest power to mass ratios and radiation stability yet reported for silicon devices. The thinnest cells (.04 mm) had initial efficiencies in excess of 2 watts per gram (AMO) and 1.7 watts per gram after an irradiation of 1 x 10 to the 15th equivalent 1 MeV electrons per square centimeter. The cells have been successfully interconnected by welding and filtered using a FEP bonded, ceria-doped microsheet of six mil thickness. Handling losses during cell manufacture and panel assembly may be minimized through the use of an integral reinforcing perimeter or ribs which remove almost all restrictions on cell thickness and area. Such a cell is typically composed of a main section which can be as thin as 0.015 mm and is supported at the edge by a thicker border (0.20 mm) of silicon.

A sub-atmospheric chemical vapor deposition process for deposition of oxide liner in high aspect ratio through silicon vias.

PubMed

Lisker, Marco; Marschmeyer, Steffen; Kaynak, Mehmet; Tekin, Ibrahim

2011-09-01

The formation of a Through Silicon Via (TSV) includes a deep Si trench etching and the formation of an insulating layer along the high-aspect-ratio trench and the filling of a conductive material into the via hole. The isolation of the filling conductor from the silicon substrate becomes more important for higher frequencies due to the high coupling of the signal to the silicon. The importance of the oxide thickness on the via wall isolation can be verified using electromagnetic field simulators. To satisfy the needs on the Silicon dioxide deposition, a sub-atmospheric chemical vapor deposition (SA-CVD) process has been developed to deposit an isolation oxide to the walls of deep silicon trenches. The technique provides excellent step coverage of the 100 microm depth silicon trenches with the high aspect ratio of 20 and more. The developed technique allows covering the deep silicon trenches by oxide and makes the high isolation of TSVs from silicon substrate feasible which is the key factor for the performance of TSVs for mm-wave 3D packaging.

Status of Reconstruction of Fragmented Diamond-on-Silicon Collector From Genesis Spacecraft Solar Wind Concentrator

NASA Technical Reports Server (NTRS)

Rodriquez, Melissa C.; Calaway, M. C.; McNamara, K. M.; Hittle, J. D.

2009-01-01

In addition to passive solar wind collector surfaces, the Genesis Discovery Mission science canister had on board an electrostatic concave mirror for concentrating the solar wind ions, known as the concentrator . The 30-mm-radius collector focal point (the target) was comprised of 4 quadrants: two of single crystal SiC, one of polycrystalline 13C diamond and one of diamond-like-carbon (DLC) on a silicon substrate. [DLC-on-silicon is also sometimes referenced as Diamond-on-silicon, DOS.] Three of target quadrants survived the hard landing intact, but the DLC-on-silicon quadrant fractured into numerous pieces (Fig. 1). This abstract reports the status of identifying the DLC target fragments and reconstructing their original orientation.

Creep and stress relaxation modeling of polycrystalline ceramic fibers

NASA Technical Reports Server (NTRS)

Dicarlo, James A.; Morscher, Gregory N.

1994-01-01

A variety of high performance polycrystalline ceramic fibers are currently being considered as reinforcement for high temperature ceramic matrix composites. However, under mechanical loading about 800 C, these fibers display creep related instabilities which can result in detrimental changes in composite dimensions, strength, and internal stress distributions. As a first step toward understanding these effects, this study examines the validity of a mechanism-based empirical model which describes primary stage tensile creep and stress relaxation of polycrystalline ceramic fibers as independent functions of time, temperature, and applied stress or strain. To verify these functional dependencies, a simple bend test is used to measure stress relaxation for four types of commercial ceramic fibers for which direct tensile creep data are available. These fibers include both nonoxide (SCS-6, Nicalon) and oxide (PRD-166, FP) compositions. The results of the Bend Stress Relaxation (BSR) test not only confirm the stress, time, and temperature dependencies predicted by the model, but also allow measurement of model empirical parameters for the four fiber types. In addition, comparison of model tensile creep predictions based on the BSR test results with the literature data show good agreement, supporting both the predictive capability of the model and the use of the BSR text as a simple method for parameter determination for other fibers.

Creep and stress relaxation modeling of polycrystalline ceramic fibers

NASA Technical Reports Server (NTRS)

Dicarlo, James A.; Morscher, Gregory N.

1991-01-01

A variety of high performance polycrystalline ceramic fibers are currently being considered as reinforcement for high temperature ceramic matrix composites. However, under mechanical loading above 800 C, these fibers display creep-related instabilities which can result in detrimental changes in composite dimensions, strength, and internal stress distributions. As a first step toward understanding these effects, this study examines the validity of mechanistic-based empirical model which describes primary stage tensile creep and stress relaxation of polycrystalline ceramic fibers as independent functions of time, temperature, and applied stress or strain. To verify these functional dependencies, a simple bend test is used to measure stress relaxation for four types of commercial ceramic fibers for which direct tensile creep data are available. These fibers include both nonoxide (SCS-6, Nicalon) and oxide (PRD-166, FP) compositions. The results of the bend stress relaxation (BSR) test not only confirm the stress, time, and temperature dependencies predicted by the model but also allow measurement of model empirical parameters for the four fiber types. In addition, comparison of model predictions and BSR test results with the literature tensile creep data show good agreement, supporting both the predictive capability of the model and the use of the BSR test as a simple method for parameter determination for other fibers.

A holistic view of crystalline silicon module reliability

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hanoka, J.I.

1995-11-01

Several aspects of module reliability are discussed, particularly with reference to the encapsulant and its interaction with the metallization and interconnection of a module. A need to look at the module as a whole single unit is stressed. Also, the issue of a slight light degradation effect in crystalline silicon cells is discussed. A model for this is mentioned and it may well be that polycrystalline cells with dislocations may have an advantage.

Advances in polycrystalline thin-film photovoltaics for space applications

NASA Technical Reports Server (NTRS)

Lanning, Bruce R.; Armstrong, Joseph H.; Misra, Mohan S.

1994-01-01

Polycrystalline, thin-film photovoltaics represent one of the few (if not the only) renewable power sources which has the potential to satisfy the demanding technical requirements for future space applications. The demand in space is for deployable, flexible arrays with high power-to-weight ratios and long-term stability (15-20 years). In addition, there is also the demand that these arrays be produced by scalable, low-cost, high yield, processes. An approach to significantly reduce costs and increase reliability is to interconnect individual cells series via monolithic integration. Both CIS and CdTe semiconductor films are optimum absorber materials for thin-film n-p heterojunction solar cells, having band gaps between 0.9-1.5 ev and demonstrated small area efficiencies, with cadmium sulfide window layers, above 16.5 percent. Both CIS and CdTe polycrystalline thin-film cells have been produced on a laboratory scale by a variety of physical and chemical deposition methods, including evaporation, sputtering, and electrodeposition. Translating laboratory processes which yield these high efficiency, small area cells into the design of a manufacturing process capable of producing 1-sq ft modules, however, requires a quantitative understanding of each individual step in the process and its (each step) effect on overall module performance. With a proper quantification and understanding of material transport and reactivity for each individual step, manufacturing process can be designed that is not 'reactor-specific' and can be controlled intelligently with the design parameters of the process. The objective of this paper is to present an overview of the current efforts at MMC to develop large-scale manufacturing processes for both CIS and CdTe thin-film polycrystalline modules. CIS cells/modules are fabricated in a 'substrate configuration' by physical vapor deposition techniques and CdTe cells/modules are fabricated in a 'superstrate configuration' by wet chemical

Incorporation of capsaicin in silicone coatings for enhanced antifouling performance

NASA Astrophysics Data System (ADS)

Reddy Jaggari, Karunakar; Zhang Newby, Bi-Min

2002-03-01

Successful use of capsaicin as insect and animal repellant propelled us to use it as a possible antifouling agent. Its non-toxic, non-biocidal, non-leaching properties make it a viable alternative to organotin compounds. In order to optimize the anti-fouling performance of the coating, silicone, the most effective foul-release marine coating, was chosen as the carrier. We have incorporated capsaicin into silicone coating, by both bulk entrapment and surface immobilization. Contact angle measurements on capsaicin-incorporated silicone exhibited an increase in wettability, owing to the presence of capsaicin. FTIR study further confirmed the incorporation of capsaicin in silicone. Bacterial attachment studies were conducted using lake Erie water. While bacteria liberally inhabited the control coating, their presence on the capsaicin-incorporated coating was found to be minimal. These preliminary studies indicate that capsaicin incorporated silicone could be a viable environment friendly alternative to currently used antifouling coatings.

25th anniversary article: key points for high-mobility organic field-effect transistors.

PubMed

Dong, Huanli; Fu, Xiaolong; Liu, Jie; Wang, Zongrui; Hu, Wenping

2013-11-20

Remarkable progress has been made in developing high performance organic field-effect transistors (OFETs) and the mobility of OFETs has been approaching the values of polycrystalline silicon, meeting the requirements of various electronic applications from electronic papers to integrated circuits. In this review, the key points for development of high mobility OFETs are highlighted from aspects of molecular engineering, process engineering and interface engineering. The importance of other factors, such as impurities and testing conditions is also addressed. Finally, the current challenges in this field for practical applications of OFETs are further discussed. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Polycrystalline Thin-Film Photovoltaics | Photovoltaic Research | NREL

Science.gov Websites

(CdTe) We develop processes and a range of materials for CdTe photovoltaic (PV) devices. Our work partners. Our objectives are to improve CdTe PV performance, reduce costs, and advance fundamental processes and materials related to thin-film polycrystalline PV devices, and our measurements and

Theoretical-Experimental Analysis of the Effects of Grain Boundaries on the Electrical Properties of SOI (Silicon-on-Insulator) MOSFETS.

DTIC Science & Technology

1983-11-01

work on recrystallization of polycrystalline silicon ( polysilicon ) films deposited on silicon-dioxide has demonstrated remarkable improvement in film...quality, and thus has identified another possibly viable 1SO technology for ICs. The polysilicon -on-S10 2 technology not only has the advantages alluded...and consequently higher areal device densities. Virtually all the research to date on polysilicon -on-SiO 2 has concentrated on the

N-Type delta Doping of High-Purity Silicon Imaging Arrays

NASA Technical Reports Server (NTRS)

Blacksberg, Jordana; Hoenk, Michael; Nikzad, Shouleh

2005-01-01

A process for n-type (electron-donor) delta doping has shown promise as a means of modifying back-illuminated image detectors made from n-doped high-purity silicon to enable them to detect high-energy photons (ultraviolet and x-rays) and low-energy charged particles (electrons and ions). This process is applicable to imaging detectors of several types, including charge-coupled devices, hybrid devices, and complementary metal oxide/semiconductor detector arrays. Delta doping is so named because its density-vs.-depth characteristic is reminiscent of the Dirac delta function (impulse function): the dopant is highly concentrated in a very thin layer. Preferably, the dopant is concentrated in one or at most two atomic layers in a crystal plane and, therefore, delta doping is also known as atomic-plane doping. The use of doping to enable detection of high-energy photons and low-energy particles was reported in several prior NASA Tech Briefs articles. As described in more detail in those articles, the main benefit afforded by delta doping of a back-illuminated silicon detector is to eliminate a "dead" layer at the back surface of the silicon wherein high-energy photons and low-energy particles are absorbed without detection. An additional benefit is that the delta-doped layer can serve as a back-side electrical contact. Delta doping of p-type silicon detectors is well established. The development of the present process addresses concerns specific to the delta doping of high-purity silicon detectors, which are typically n-type. The present process involves relatively low temperatures, is fully compatible with other processes used to fabricate the detectors, and does not entail interruption of those processes. Indeed, this process can be the last stage in the fabrication of an imaging detector that has, in all other respects, already been fully processed, including metallized. This process includes molecular-beam epitaxy (MBE) for deposition of three layers, including

Surface damages of polycrystalline W and La2O3-doped W induced by high-flux He plasma irradiation

NASA Astrophysics Data System (ADS)

Liu, Lu; Li, Shouzhe; Liu, Dongping; Benstetter, Günther; Zhang, Yang; Hong, Yi; Fan, Hongyu; Ni, Weiyuan; Yang, Qi; Wu, Yunfeng; Bi, Zhenhua

2018-04-01

In this study, polycrystalline tungsten (W) and three oxide dispersed strengthened W with 0.1 vol %, 1.0 vol % and 5.0 vol % lanthanum trioxide (La2O3) were irradiated with low-energy (200 eV) and high-flux (5.8 × 1021 or 1.4 × 1022 ions/m2ṡs) He+ ions at elevated temperature. After He+ irradiation at a fluence of 3.0 × 1025/m2, their surface damages were observed by scanning electron microscopy, energy dispersive spectroscopy, scanning electron microscopy-electron backscatter diffraction, and conductive atomic force microscopy. Micron-sized holes were formed on the surface of W alloys after He+ irradiation at 1100 K. Analysis shows that the La2O3 grains doped in W were sputtered preferentially by the high-flux He+ ions when compared with the W grains. For irradiation at 1550 K, W nano-fuzz was formed at the surfaces of both polycrystalline W and La2O3-doped W. The thickness of the fuzz layers formed at the surface of La2O3-doped W is 40% lower than the one of polycrystalline W. The presence of La2O3 could suppress the diffusion and coalescence of He atoms inside W, which plays an important role in the growth of nanostructures fuzz.

Monolithically interconnected silicon-film™ module technology

NASA Astrophysics Data System (ADS)

DelleDonne, E. J.; Ford, D. H.; Hall, R. B.; Ingram, A. E.; Rand, J. A.; Barnett, A. M.

1999-03-01

AstroPower is developing an advanced thin-silicon-based, photovoltaic module product. A low-cost monolithic interconnected device is being integrated into a module that combines the design and process features of advanced light trapped, thin-silicon solar cells. This advanced product incorporates a low-cost substrate, a nominally 50-μm thick grown silicon layer with minority carrier diffusion lengths exceeding the active layer thickness, light trapping due to back-surface reflection, and back-surface passivation. The thin silicon layer enables high solar cell performance and can lead to a module conversion efficiency as high as 19%. These performance design features, combined with low-cost manufacturing using relatively low-cost capital equipment, continuous processing and a low-cost substrate, will lead to high-performance, low-cost photovoltaic panels.

The Electrochemical Performance of Silicon Nanoparticles in Concentrated Electrolyte.

PubMed

Chang, Zeng-Hua; Wang, Jian-Tao; Wu, Zhao-Hui; Gao, Min; Wu, Shuai-Jin; Lu, Shi-Gang

2018-06-11

Silicon is a promising material for anodes in energy-storage devices. However, excessive growth of a solid-electrolyte interphase (SEI) caused by the severe volume change during the (de)lithiation processes leads to dramatic capacity fading. Here, we report a super-concentrated electrolyte composed of lithium bis(fluorosulfonyl)imide (LiFSI) and propylene carbonate (PC) with a molar ratio of 1:2 to improve the cycling performance of silicon nanoparticles (SiNPs). The SiNP electrode shows a remarkably improved cycling performance with an initial delithiation capacity of approximately 3000 mAh g -1 and a capacity of approximately 2000 mAh g -1 after 100 cycles, exhibiting about 6.8 times higher capacity than the cells with dilute electrolyte LiFSI-(PC) 8 . Raman spectra reveal that most of the PC solvent and FSI anions are complexed by Li + to form a specific solution structure like a fluid polymeric network. The reduction of FSI anions starts to play an important role owing to the increased concentration of contact ion pairs (CIPs) or aggregates (AGGs), which contribute to the formation of a more mechanically robust and chemically stable complex SEI layer. The complex SEI layer can effectively suppress the morphology evolution of silicon particles and self-limit the excessive growth, which mitigates the crack propagation of the silicon electrode and the deterioration of the kinetics. This study will provide a new direction for screening cycling-stable electrolytes for silicon-based electrodes. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Silylated functionalized silicon-based composite as anode with excellent cyclic performance for lithium-ion battery

NASA Astrophysics Data System (ADS)

Li, Xiao; Tian, Xiaodong; Yang, Tao; Wang, Wei; Song, Yan; Guo, Quangui; Liu, Zhanjun

2018-05-01

Inferior cycling stability and rate performance respectively caused by rigorous volume change and poor electrical conductivity were the main challenge of state-of-the-art Silicon-based electrode. In this work, silylated functionalized exfoliated graphite oxide (EGO)/silicon@amorphous carbon (3-APTS-EGO/Si@C) was synthesized by adopting silane as intermediate to connect Si particles with EGO sheets followed by introduction of amorphous carbon. The result suggested that 3-Aminopropyltriethoxysilan connected the EGO sheets and Si nanoparticles via covalent bonds. Owing to the strong covalent interaction and the synergistic effect between the silicon, EGO sheets and amorphous carbon, 3-APTS-EGO/Si@C composite possessed a high capacity of 774 mAh g-1 even after 450 cycles at 0.4 A g-1 with the retention capacity of 97%. This work also provided an effective strategy to improve the long cycling life performance of Si-based electrode.

Polyaniline-encapsulated silicon on three-dimensional carbon nanotubes foam with enhanced electrochemical performance for lithium-ion batteries

NASA Astrophysics Data System (ADS)

Zhou, Xiaoming; Liu, Yang; Du, Chunyu; Ren, Yang; Mu, Tiansheng; Zuo, Pengjian; Yin, Geping; Ma, Yulin; Cheng, Xinqun; Gao, Yunzhi

2018-03-01

Seeking free volume around nanostructures for silicon-based anodes has been a crucial strategy to improve cycling and rate performance in the next generation Li-ion batteries. Herein, through a simple pyrolysis and in-situ polymerization approach, the low cost commercially available melamine foam as a soft template converts carbon nanotubes into highly dispersed and three-dimensionally interconnected framework with encapsulated silicon/polyaniline hierarchical nanoarchitecture. This unique core-sheath structure based on carbon nanotubes foam integrates a large number of mesoporous, thus providing well-accessible space for electrolyte wetting, whereas the carbon nanotubes matrix serves as conductive thoroughfares for electron transport. Meanwhile, the outer polyaniline coated on silicon nanoparticles provides effective space for volume expansion of silicon, further inhibiting the active material escape from the current collector. As expected, the PANI-Si@CNTs foam exhibits a high initial specific capacity of 1954 mAh g-1 and retains 727 mAh g-1 after 100 cycles at 100 mA g-1, which can be attributed to highly electrical conductivity of carbon nanotubes and protective layer of polyaniline sheath, together with three-dimensionally interconnected porous skeleton. This facile structure can pave a way for large scale synthesis of high durable silicon-based anodes or other electrode materials with huge volume expansion.

Formation of silicon nanowire packed films from metallurgical-grade silicon powder using a two-step metal-assisted chemical etching method

PubMed Central

2014-01-01

In this work, we use a two-step metal-assisted chemical etching method to produce films of silicon nanowires shaped in micrograins from metallurgical-grade polycrystalline silicon powder. The first step is an electroless plating process where the powder was dipped for few minutes in an aqueous solution of silver nitrite and hydrofluoric acid to permit Ag plating of the Si micrograins. During the second step, corresponding to silicon dissolution, we add a small quantity of hydrogen peroxide to the plating solution and we leave the samples to be etched for three various duration (30, 60, and 90 min). We try elucidating the mechanisms leading to the formation of silver clusters and silicon nanowires obtained at the end of the silver plating step and the silver-assisted silicon dissolution step, respectively. Scanning electron microscopy (SEM) micrographs revealed that the processed Si micrograins were covered with densely packed films of self-organized silicon nanowires. Some of these nanowires stand vertically, and some others tilt to the silicon micrograin facets. The thickness of the nanowire films increases from 0.2 to 10 μm with increasing etching time. Based on SEM characterizations, laser scattering estimations, X-ray diffraction (XRD) patterns, and Raman spectroscopy, we present a correlative study dealing with the effect of the silver-assisted etching process on the morphological and structural properties of the processed silicon nanowire films. PMID:25349554

Performance of a Commercial Silicon Drift Detector for X-ray Microanalysis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kenik, Edward A

2008-01-01

Silicon drift detectors (SDDs) are rapidly becoming the energy dispersive spectrometer of choice especially for scanning electron microscopy applications. The complementary features of large active areas (i.e., collection angle) and high count rate capability of these detector contribute to their popularity, as well as the absence of liquid nitrogen cooling of the detector. The performance of an EDAX Apollo 40 SDD on a JEOL 6500F SEM will be discussed.

An Investigation of the Wear on Silicon Surface at High Humidity.

PubMed

Wang, Xiaodong; Guo, Jian; Xu, Lin; Cheng, Guanggui; Qian, Linmao

2018-06-16

Using an atomic force microscope (AFM), the wear of monocrystalline silicon (covered by a native oxide layer) at high humidity was investigated. The experimental results indicated that tribochemistry played an important role in the wear of the silicon at different relative humidity levels (RH = 60%, 90%). Since the tribochemical reactions were facilitated at 60% RH, the wear of silicon was serious and the friction force was around 1.58 μN under the given conditions. However, the tribochemical reactions were restrained when the wear pair was conducted at high humidity. As a result, the wear of silicon was very slight and the friction force decreased to 0.85 μN at 90% RH. The slight wear of silicon at high humidity was characterized by etching tests. It was demonstrated that the silicon sample surface was partly damaged and the native oxide layer on silicon sample surface had not been totally removed during the wear process. These results may help us optimize the tribological design of dynamic microelectromechanical systems working in humid conditions.

Improved High/Low Junction Silicon Solar Cell

NASA Technical Reports Server (NTRS)

Neugroschel, A.; Pao, S. C.; Lindholm, F. A.; Fossum, J. G.

1986-01-01

Method developed to raise value of open-circuit voltage in silicon solar cells by incorporating high/low junction in cell emitter. Power-conversion efficiency of low-resistivity silicon solar cell considerably less than maximum theoretical value mainly because open-circuit voltage is smaller than simple p/n junction theory predicts. With this method, air-mass-zero opencircuit voltage increased from 600 mV level to approximately 650 mV.

Delta-Doping at Wafer Level for High Throughput, High Yield Fabrication of Silicon Imaging Arrays

NASA Technical Reports Server (NTRS)

Hoenk, Michael E. (Inventor); Nikzad, Shoulch (Inventor); Jones, Todd J. (Inventor); Greer, Frank (Inventor); Carver, Alexander G. (Inventor)

2014-01-01

Systems and methods for producing high quantum efficiency silicon devices. A silicon MBE has a preparation chamber that provides for cleaning silicon surfaces using an oxygen plasma to remove impurities and a gaseous (dry) NH3 + NF3 room temperature oxide removal process that leaves the silicon surface hydrogen terminated. Silicon wafers up to 8 inches in diameter have devices that can be fabricated using the cleaning procedures and MBE processing, including delta doping.

High-performance silicon nanowire field-effect transistor with silicided contacts

NASA Astrophysics Data System (ADS)

Rosaz, G.; Salem, B.; Pauc, N.; Gentile, P.; Potié, A.; Solanki, A.; Baron, T.

2011-08-01

Undoped silicon nanowire (Si NW) field-effect transistors (FETs) with a back-gate configuration have been fabricated and characterized. A thick (200 nm) Si3N4 layer was used as a gate insulator and a p++ silicon substrate as a back gate. Si NWs have been grown by the chemical vapour deposition method using the vapour-liquid-solid mechanism and gold as a catalyst. Metallic contacts have been deposited using Ni/Al (80 nm/120 nm) and characterized before and after an optimized annealing step at 400 °C, which resulted in a great decrease in the contact resistance due to the newly formed nickel silicide/Si interface at source and drain. These optimized devices show a good hole mobility of around 200 cm2 V-1 s-1, in the same range as the bulk material, with a good ON current density of about 28 kA cm-2. Finally, hysteretic behaviour of NW channel conductance is discussed to explain the importance of NW surface passivation.

Silicon Cations Intermixed Indium Zinc Oxide Interface for High-Performance Thin-Film Transistors Using a Solution Process.

PubMed

Na, Jae Won; Rim, You Seung; Kim, Hee Jun; Lee, Jin Hyeok; Hong, Seonghwan; Kim, Hyun Jae

2017-09-06

Solution-processed amorphous metal-oxide thin-film transistors (TFTs) utilizing an intermixed interface between a metal-oxide semiconductor and a dielectric layer are proposed. In-depth physical characterizations are carried out to verify the existence of the intermixed interface that is inevitably formed by interdiffusion of cations originated from a thermal process. In particular, when indium zinc oxide (IZO) semiconductor and silicon dioxide (SiO 2 ) dielectric layer are in contact and thermally processed, a Si 4+ intermixed IZO (Si/IZO) interface is created. On the basis of this concept, a high-performance Si/IZO TFT having both a field-effect mobility exceeding 10 cm 2 V -1 s -1 and a on/off current ratio over 10 7 is successfully demonstrated.

High efficiency crystalline silicon solar cells

NASA Technical Reports Server (NTRS)

Sah, C. Tang

1986-01-01

A review of the entire research program since its inception ten years ago is given. The initial effort focused on the effects of impurities on the efficiency of silicon solar cells to provide figures of maximum allowable impurity density for efficiencies up to about 16 to 17%. Highly accurate experimental techniques were extended to characterize the recombination properties of the residual imputities in the silicon solar cell. A numerical simulator of the solar cell was also developed, using the Circuit Technique for Semiconductor Analysis. Recent effort focused on the delineation of the material and device parameters which limited the silicon efficiency to below 20% and on an investigation of cell designs to break the 20% barrier. Designs of the cell device structure and geometry can further reduce recombination losses as well as the sensitivity and criticalness of the fabrication technology required to exceed 20%. Further research is needed on the fundamental characterization of the carrier recombination properties at the chemical impurity and physical defect centers. It is shown that only single crystalline silicon cell technology can be successful in attaining efficiencies greater than 20%.

Plastic Deformation of Micromachined Silicon Diaphragms with a Sealed Cavity at High Temperatures

PubMed Central

Ren, Juan; Ward, Michael; Kinnell, Peter; Craddock, Russell; Wei, Xueyong

2016-01-01

Single crystal silicon (SCS) diaphragms are widely used as pressure sensitive elements in micromachined pressure sensors. However, for harsh environments applications, pure silicon diaphragms are hardly used because of the deterioration of SCS in both electrical and mechanical properties. To survive at the elevated temperature, the silicon structures must work in combination with other advanced materials, such as silicon carbide (SiC) or silicon on insulator (SOI), for improved performance and reduced cost. Hence, in order to extend the operating temperatures of existing SCS microstructures, this work investigates the mechanical behavior of pressurized SCS diaphragms at high temperatures. A model was developed to predict the plastic deformation of SCS diaphragms and was verified by the experiments. The evolution of the deformation was obtained by studying the surface profiles at different anneal stages. The slow continuous deformation was considered as creep for the diaphragms with a radius of 2.5 mm at 600 °C. The occurrence of plastic deformation was successfully predicted by the model and was observed at the operating temperature of 800 °C and 900 °C, respectively. PMID:26861332

High surface area silicon materials: fundamentals and new technology.

PubMed

Buriak, Jillian M

2006-01-15

Crystalline silicon forms the basis of just about all computing technologies on the planet, in the form of microelectronics. An enormous amount of research infrastructure and knowledge has been developed over the past half-century to construct complex functional microelectronic structures in silicon. As a result, it is highly probable that silicon will remain central to computing and related technologies as a platform for integration of, for instance, molecular electronics, sensing elements and micro- and nanoelectromechanical systems. Porous nanocrystalline silicon is a fascinating variant of the same single crystal silicon wafers used to make computer chips. Its synthesis, a straightforward electrochemical, chemical or photochemical etch, is compatible with existing silicon-based fabrication techniques. Porous silicon literally adds an entirely new dimension to the realm of silicon-based technologies as it has a complex, three-dimensional architecture made up of silicon nanoparticles, nanowires, and channel structures. The intrinsic material is photoluminescent at room temperature in the visible region due to quantum confinement effects, and thus provides an optical element to electronic applications. Our group has been developing new organic surface reactions on porous and nanocrystalline silicon to tailor it for a myriad of applications, including molecular electronics and sensing. Integration of organic and biological molecules with porous silicon is critical to harness the properties of this material. The construction and use of complex, hierarchical molecular synthetic strategies on porous silicon will be described.

Polycrystalline-thin-film thermophotovoltaic cells

NASA Astrophysics Data System (ADS)

Dhere, Neelkanth G.

1996-02-01

Thermophotovoltaic (TPV) cells convert thermal energy to electricity. Modularity, portability, silent operation, absence of moving parts, reduced air pollution, rapid start-up, high power densities, potentially high conversion efficiencies, choice of a wide range of heat sources employing fossil fuels, biomass, and even solar radiation are key advantages of TPV cells in comparison with fuel cells, thermionic and thermoelectric convertors, and heat engines. The potential applications of TPV systems include: remote electricity supplies, transportation, co-generation, electric-grid independent appliances, and space, aerospace, and military power applications. The range of bandgaps for achieving high conversion efficiencies using low temperature (1000-2000 K) black-body or selective radiators is in the 0.5-0.75 eV range. Present high efficiency convertors are based on single crystalline materials such as In1-xGaxAs, GaSb, and Ga1-xInxSb. Several polycrystalline thin films such as Hg1-xCdxTe, Sn1-xCd2xTe2, and Pb1-xCdxTe, etc., have great potential for economic large-scale applications. A small fraction of the high concentration of charge carriers generated at high fluences effectively saturates the large density of defects in polycrystalline thin films. Photovoltaic conversion efficiencies of polycrystalline thin films and PV solar cells are comparable to single crystalline Si solar cells, e.g., 17.1% for CuIn1-xGaxSe2 and 15.8% for CdTe. The best recombination-state density Nt is in the range of 10-15-10-16 cm-3 acceptable for TPV applications. Higher efficiencies may be achieved because of the higher fluences, possibility of bandgap tailoring, and use of selective emitters such as rare earth oxides (erbia, holmia, yttria) and rare earth-yttrium aluminium garnets. As compared to higher bandgap semiconductors such as CdTe, it is easier to dope the lower bandgap semiconductors. TPV cell development can benefit from the more mature PV solar cell and opto

Silicon Hot-Electron Bolometers

NASA Technical Reports Server (NTRS)

Stevenson, Thomas R.; Hsieh, Wen-Ting; Mitchell, Robert R.; Isenberg, Hal D.; Stahle, Carl M.; Cao, Nga T.; Schneider, Gideon; Travers, Douglas E.; Moseley, S. Harvey; Wollack, Edward J.

2004-01-01

We discuss a new type of direct detector, a silicon hot-electron bolometer, for measurements in the far-infrared and submillimeter spectral ranges. High performance bolometers can be made using the electron-phonon conductance in heavily doped silicon to provide thermal isolation from the cryogenic bath. Noise performance is expected to be near thermodynamic limits, allowing background limited performance for many far infrared and submillimeter photometric and spectroscopic applications.

Crystallographic Characterization on Polycrystalline Ni-Mn-Ga Alloys with Strong Preferred Orientation

PubMed Central

Li, Zongbin; Yang, Bo; Zou, Naifu; Zhang, Yudong; Esling, Claude; Gan, Weimin; Zhao, Xiang; Zuo, Liang

2017-01-01

Heusler type Ni-Mn-Ga ferromagnetic shape memory alloys can demonstrate excellent magnetic shape memory effect in single crystals. However, such effect in polycrystalline alloys is greatly weakened due to the random distribution of crystallographic orientation. Microstructure optimization and texture control are of great significance and challenge to improve the functional behaviors of polycrystalline alloys. In this paper, we summarize our recent progress on the microstructure control in polycrystalline Ni-Mn-Ga alloys in the form of bulk alloys, melt-spun ribbons and thin films, based on the detailed crystallographic characterizations through neutron diffraction, X-ray diffraction and electron backscatter diffraction. The presented results are expected to offer some guidelines for the microstructure modification and functional performance control of ferromagnetic shape memory alloys. PMID:28772826

Crystallographic Characterization on Polycrystalline Ni-Mn-Ga Alloys with Strong Preferred Orientation.

PubMed

Li, Zongbin; Yang, Bo; Zou, Naifu; Zhang, Yudong; Esling, Claude; Gan, Weimin; Zhao, Xiang; Zuo, Liang

2017-04-27

Heusler type Ni-Mn-Ga ferromagnetic shape memory alloys can demonstrate excellent magnetic shape memory effect in single crystals. However, such effect in polycrystalline alloys is greatly weakened due to the random distribution of crystallographic orientation. Microstructure optimization and texture control are of great significance and challenge to improve the functional behaviors of polycrystalline alloys. In this paper, we summarize our recent progress on the microstructure control in polycrystalline Ni-Mn-Ga alloys in the form of bulk alloys, melt-spun ribbons and thin films, based on the detailed crystallographic characterizations through neutron diffraction, X-ray diffraction and electron backscatter diffraction. The presented results are expected to offer some guidelines for the microstructure modification and functional performance control of ferromagnetic shape memory alloys.

Texturing of high T(sub c) superconducting polycrystalline fibers/wires by laser-driven directional solidification in an thermal gradient

NASA Technical Reports Server (NTRS)

Varshney, Usha; Eichelberger, B. Davis, III

1995-01-01

This paper summarizes the technique of laser-driven directional solidification in a controlled thermal gradient of yttria stabilized zirconia core coated Y-Ba-Cu-O materials to produce textured high T(sub c) superconducting polycrystalline fibers/wires with improved critical current densities in the extended range of magnetic fields at temperatures greater than 77 K. The approach involves laser heating to minimize phase segregation by heating very rapidly through the two-phase incongruent melt region to the single phase melt region and directionally solidifying in a controlled thermal gradient to achieve highly textured grains in the fiber axis direction. The technique offers a higher grain growth rate and a lower thermal budget compared with a conventional thermal gradient and is amenable as a continuous process for improving the J(sub c) of high T(sub c) superconducting polycrystalline fibers/wires. The technique has the advantage of suppressing weak-link behavior by orientation of crystals, formation of dense structures with enhanced connectivity, formation of fewer and cleaner grain boundaries, and minimization of phase segregation in the incongruent melt region.

High-Quality Solution-Processed Silicon Oxide Gate Dielectric Applied on Indium Oxide Based Thin-Film Transistors.

PubMed

Jaehnike, Felix; Pham, Duy Vu; Anselmann, Ralf; Bock, Claudia; Kunze, Ulrich

2015-07-01

A silicon oxide gate dielectric was synthesized by a facile sol-gel reaction and applied to solution-processed indium oxide based thin-film transistors (TFTs). The SiOx sol-gel was spin-coated on highly doped silicon substrates and converted to a dense dielectric film with a smooth surface at a maximum processing temperature of T = 350 °C. The synthesis was systematically improved, so that the solution-processed silicon oxide finally achieved comparable break downfield strength (7 MV/cm) and leakage current densities (<10 nA/cm(2) at 1 MV/cm) to thermally grown silicon dioxide (SiO2). The good quality of the dielectric layer was successfully proven in bottom-gate, bottom-contact metal oxide TFTs and compared to reference TFTs with thermally grown SiO2. Both transistor types have field-effect mobility values as high as 28 cm(2)/(Vs) with an on/off current ratio of 10(8), subthreshold swings of 0.30 and 0.37 V/dec, respectively, and a threshold voltage close to zero. The good device performance could be attributed to the smooth dielectric/semiconductor interface and low interface trap density. Thus, the sol-gel-derived SiO2 is a promising candidate for a high-quality dielectric layer on many substrates and high-performance large-area applications.

Fabrication of vanadium dioxide polycrystalline films with higher temperature coefficient of resistance

NASA Astrophysics Data System (ADS)

Li, Jinhua; Yuan, Ningyi; Jiang, Meiping; Kun, Li

2011-08-01

Vanadium Dioxide Polycrystalline Films with High Temperature Coefficient of Resistance(TCR) were fabricated by modified Ion Beam Enhanced Deposition(IBED) method. The TCR of the Un-doping VO2 was about -4%/K at room temperature after appropriate thermal annealing. The XRD results clearly showed that IBED polycrystalline VO2 films had a single [002] orientation of VO2(M). The TCR of 5at.%W and 7at.% Ta doped Vanadium Dioxide Polycrystalline Films were high up to -18%/K and -12%/K at room temperature, respectively. Using 7at.% Ta and 2at.% Ti co-doping, the TCR of the co-doped vanadium oxide film was -7%/K and without hysteresis during temperature increasing and decresing from 0-80°C. It should indicate that the W-doped vanadium dioxide films colud be used for high sensing IR detect and the Ta/Ti co-doped film without hysteresis is suitable for infrarid imaging application.

Silicon-embedded copper nanostructure network for high energy storage

DOEpatents

Yu, Tianyue

2016-03-15

Provided herein are nanostructure networks having high energy storage, electrochemically active electrode materials including nanostructure networks having high energy storage, as well as electrodes and batteries including the nanostructure networks having high energy storage. According to various implementations, the nanostructure networks have high energy density as well as long cycle life. In some implementations, the nanostructure networks include a conductive network embedded with electrochemically active material. In some implementations, silicon is used as the electrochemically active material. The conductive network may be a metal network such as a copper nanostructure network. Methods of manufacturing the nanostructure networks and electrodes are provided. In some implementations, metal nanostructures can be synthesized in a solution that contains silicon powder to make a composite network structure that contains both. The metal nanostructure growth can nucleate in solution and on silicon nanostructure surfaces.

Silicon-embedded copper nanostructure network for high energy storage

DOEpatents

Yu, Tianyue

2018-01-23

Provided herein are nanostructure networks having high energy storage, electrochemically active electrode materials including nanostructure networks having high energy storage, as well as electrodes and batteries including the nanostructure networks having high energy storage. According to various implementations, the nanostructure networks have high energy density as well as long cycle life. In some implementations, the nanostructure networks include a conductive network embedded with electrochemically active material. In some implementations, silicon is used as the electrochemically active material. The conductive network may be a metal network such as a copper nanostructure network. Methods of manufacturing the nanostructure networks and electrodes are provided. In some implementations, metal nanostructures can be synthesized in a solution that contains silicon powder to make a composite network structure that contains both. The metal nanostructure growth can nucleate in solution and on silicon nanostructure surfaces.

Selective deposition of polycrystalline diamond films using photolithography with addition of nanodiamonds as nucleation centers

NASA Astrophysics Data System (ADS)

Okhotnikov, V. V.; Linnik, S. A.; Gaidaichuk, A. V.; Shashev, D. V.; Nazarova, G. Yu; Yurchenko, V. I.

2016-02-01

A new method of selective deposition of polycrystalline diamond has been developed and studied. The diamond coatings with a complex, predetermined geometry and resolution up to 5 μm were obtained. A high density of polycrystallites in the coating area was reached (up to 32·107 pcs/cm2). The uniformity of the film reached 100%, and the degree of the surface contamination by parasitic crystals did not exceed 2%. The technology was based on the application of the standard photolithography with an addition of nanodiamond suspension into the photoresist that provided the creation of the centers of further nucleation in the areas which require further overgrowth. The films were deposited onto monocrystalline silicon substrates using the method of “hot filaments” in the CVD reactor. The properties of the coating and the impact of the nanodiamond suspension concentration in the photoresist were also studied. The potential use of the given method includes a high resolution, technological efficiency, and low labor costs compared to the standard methods (laser treatment, chemical etching in aggressive environments,).

Neutron-irradiation creep of silicon carbide materials beyond the initial transient

DOE PAGES

Katoh, Yutai; Ozawa, Kazumi; Shimoda, Kazuya; ...

2016-06-04

Irradiation creep beyond the transient regime was investigated for various silicon carbide (SiC) materials. Here, the materials examined included polycrystalline or monocrystalline high-purity SiC, nanopowder sintered SiC, highly crystalline and near-stoichiometric SiC fibers (including Hi-Nicalon Type S, Tyranno SA3, isotopically-controlled Sylramic and Sylramic-iBN fibers), and a Tyranno SA3 fiber–reinforced SiC matrix composite fabricated through a nano-infiltration transient eutectic phase process. Neutron irradiation experiments for bend stress relaxation tests were conducted at irradiation temperatures ranging from 430 to 1180 °C up to 30 dpa with initial bend stresses of up to ~1 GPa for the fibers and ~300 MPa for themore » other materials. Initial bend stress in the specimens continued to decrease from 1 to 30 dpa. Analysis revealed that (1) the stress exponent of irradiation creep above 1 dpa is approximately unity, (2) the stress normalized creep rate is ~1 × 10 –7 [dpa –1 MPa –1] at 430–750 °C for the range of 1–30 dpa for most polycrystalline SiC materials, and (3) the effects on irradiation creep of initial microstructures—such as grain boundary, crystal orientation, and secondary phases—increase with increasing irradiation temperature.« less

Silicon as anode for high-energy lithium ion batteries: From molten ingot to nanoparticles

NASA Astrophysics Data System (ADS)

Leblanc, Dominic; Hovington, Pierre; Kim, Chisu; Guerfi, Abdelbast; Bélanger, Daniel; Zaghib, Karim

2015-12-01

In this work, we demonstrate that a new mechanical attrition process can be used to prepare nanosilicon powder from metallurgical grade silicon lumps. Composite Li-ion anode made from this nanometer-size powder was found to have a high reversible capacity of 2400 mAh g-1 and an improved cycling stability compared to micrometer-sized powder. It is proposed that improved battery cycling performance is ascribed to the nanoscale silicon particles which supresses the volume expansion owing to its superplasticity.

Wide-band (2.5 - 10.5 µm), high-frame rate IRFPAs based on high-operability MCT on silicon

NASA Astrophysics Data System (ADS)

Crosbie, Michael J.; Giess, Jean; Gordon, Neil T.; Hall, David J.; Hails, Janet E.; Lees, David J.; Little, Christopher J.; Phillips, Tim S.

2010-04-01

We have previously presented results from our mercury cadmium telluride (MCT, Hg1-xCdxTe) growth on silicon substrate technology for different applications, including negative luminescence, long waveband and mid/long dual waveband infrared imaging. In this paper, we review recent developments in QinetiQ's combined molecular beam epitaxy (MBE) and metal-organic vapor phase epitaxy (MOVPE) MCT growth on silicon; including MCT defect density, uniformity and reproducibility. We also present a new small-format (128 x 128) focal plane array (FPA) for high frame-rate applications. A custom high-speed readout integrated circuit (ROIC) was developed with a large pitch and large charge storage aimed at producing a very high performance FPA (NETD ~10mK) operating at frame rates up to 2kHz for the full array. The array design allows random addressing and this allows the maximum frame rate to be increased as the window size is reduced. A broadband (2.5-10.5 μm) MCT heterostructure was designed and grown by the MBE/MOVPE technique onto silicon substrates. FPAs were fabricated using our standard techniques; wet-etched mesa diodes passivated with epitaxial CdTe and flip-chip bonded to the ROIC. The resulting focal plane arrays were characterized at the maximum frame rate and shown to have the high operabilities and low NETD values characteristic of our LWIR MCT on silicon technology.

Thermoelectric Properties of High-Doped Silicon from Room Temperature to 900 K

NASA Astrophysics Data System (ADS)

Stranz, A.; Kähler, J.; Waag, A.; Peiner, E.

2013-07-01

Silicon is investigated as a low-cost, Earth-abundant thermoelectric material for high-temperature applications up to 900 K. For the calculation of module design the Seebeck coefficient and the electrical as well as thermal properties of silicon in the high-temperature range are of great importance. In this study, we evaluate the thermoelectric properties of low-, medium-, and high-doped silicon from room temperature to 900 K. In so doing, the Seebeck coefficient, the electrical and thermal conductivities, as well as the resulting figure of merit ZT of silicon are determined.

HiSPoD: a program for high-speed polychromatic X-ray diffraction experiments and data analysis on polycrystalline samples

DOE PAGES

Sun, Tao; Fezzaa, Kamel

2016-06-17

Here, a high-speed X-ray diffraction technique was recently developed at the 32-ID-B beamline of the Advanced Photon Source for studying highly dynamic, yet non-repeatable and irreversible, materials processes. In experiments, the microstructure evolution in a single material event is probed by recording a series of diffraction patterns with extremely short exposure time and high frame rate. Owing to the limited flux in a short pulse and the polychromatic nature of the incident X-rays, analysis of the diffraction data is challenging. Here, HiSPoD, a stand-alone Matlab-based software for analyzing the polychromatic X-ray diffraction data from polycrystalline samples, is described. With HiSPoD,more » researchers are able to perform diffraction peak indexing, extraction of one-dimensional intensity profiles by integrating a two-dimensional diffraction pattern, and, more importantly, quantitative numerical simulations to obtain precise sample structure information.« less

Electrical Transport Properties of Polycrystalline Monolayer Molybdenum Disulfide

DTIC Science & Technology

2014-07-14

Lou, Sina Najmaei, Matin Amani, Matthew L. Chin, Zheng Se. TASK NUMBER Liu Sf. WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAMES AND ADDRESSES 8...Transport Properties of Polycrystalline Monolayer Molybdenum Disulfide Sina Najmaei,t.§ Matin Ama ni,M Matthew L. Chin,* Zhe ng liu/ ·"·v: A. Gle n

Study of the Effects of Impurities on the Properties of Silicon Materials and Performance of Silicon Solar Cell

NASA Technical Reports Server (NTRS)

Sah, C. T.

1979-01-01

Numerical solutions were obtained from the exact one dimensional transmission line circuit model to study the following effects on the terrestrial performance of silicon solar cells: interband Auger recombination; surface recombination at the contact interfaces; enhanced metallic impurity solubility; diffusion profiles; and defect-impurity recombination centers. Thermal recombination parameters of titanium impurity in silicon were estimated from recent experimental data. Based on those parameters, computer model calculations showed that titanium concentration must be kept below 6x10 to the 12th power Ti/cu cm in order to achieve 16% AM1 efficiency in a silicon solar cell of 250 micrometers thick and 1.5 ohm-cm resistivity.

3D-fabrication of tunable and high-density arrays of crystalline silicon nanostructures

NASA Astrophysics Data System (ADS)

Wilbers, J. G. E.; Berenschot, J. W.; Tiggelaar, R. M.; Dogan, T.; Sugimura, K.; van der Wiel, W. G.; Gardeniers, J. G. E.; Tas, N. R.

2018-04-01

In this report, a procedure for the 3D-nanofabrication of ordered, high-density arrays of crystalline silicon nanostructures is described. Two nanolithography methods were utilized for the fabrication of the nanostructure array, viz. displacement Talbot lithography (DTL) and edge lithography (EL). DTL is employed to perform two (orthogonal) resist-patterning steps to pattern a thin Si3N4 layer. The resulting patterned double layer serves as an etch mask for all further etching steps for the fabrication of ordered arrays of silicon nanostructures. The arrays are made by means of anisotropic wet etching of silicon in combination with an isotropic retraction etch step of the etch mask, i.e. EL. The procedure enables fabrication of nanostructures with dimensions below 15 nm and a potential density of 1010 crystals cm-2.

Thermal conductivity of ultrathin nano-crystalline diamond films determined by Raman thermography assisted by silicon nanowires

NASA Astrophysics Data System (ADS)

Anaya, Julian; Rossi, Stefano; Alomari, Mohammed; Kohn, Erhard; Tóth, Lajos; Pécz, Béla; Kuball, Martin

2015-06-01

The thermal transport in polycrystalline diamond films near its nucleation region is still not well understood. Here, a steady-state technique to determine the thermal transport within the nano-crystalline diamond present at their nucleation site has been demonstrated. Taking advantage of silicon nanowires as surface temperature nano-sensors, and using Raman Thermography, the in-plane and cross-plane components of the thermal conductivity of ultra-thin diamond layers and their thermal barrier to the Si substrate were determined. Both components of the thermal conductivity of the nano-crystalline diamond were found to be well below the values of polycrystalline bulk diamond, with a cross-plane thermal conductivity larger than the in-plane thermal conductivity. Also a depth dependence of the lateral thermal conductivity through the diamond layer was determined. The results impact the design and integration of diamond for thermal management of AlGaN/GaN high power transistors and also show the usefulness of the nanowires as accurate nano-thermometers.

Basic principles for rational design of high-performance nanostructured silicon-based thermoelectric materials.

PubMed

Yang, Chun Cheng; Li, Sean

2011-12-23

Recently, nanostructured silicon-based thermoelectric materials have drawn great attention owing to their excellent thermoelectric performance in the temperature range around 450 °C, which is eminently applicable for concentrated solar thermal technology. In this work, a unified nanothermodynamic model is developed to investigate the predominant factors that determine the lattice thermal conductivity of nanocrystalline, nanoporous, and nanostructured bulk Si. A systematic study shows that the thermoelectric performance of these materials can be substantially enhanced by the following three basic principles: 1) artificial manipulation and optimization of roughness with surface/interface patterning/engineering; 2) grain-size reduction with innovative fabrication techniques in a controllable fashion; and 3) optimization of material parameters, such as bulk solid-vapor transition entropy, bulk vibrational entropy, dimensionality, and porosity, to decrease the lattice thermal conductivity. These principles may be used to rationally design novel nanostructured Si-based thermoelectric materials for renewable energy applications. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

High-Bandgap Silicon Nanocrystal Solar Cells: Device Fabrication, Characterization, and Modeling

NASA Astrophysics Data System (ADS)

Löper, Philipp; Canino, Mariaconcetta; Schnabel, Manuel; Summonte, Caterina; Janz, Stefan; Zacharias, Margit

Silicon nanocrystals (Si NCs) embedded in Si-based dielectrics provide a Si-based high-bandgap material (1.7 eV) and enable the construction of crystalline Si tandem solar cells. This chapter focusses on Si NC embedded in silicon carbide, because silicon carbide offers electrical conduction through the matrix material. The material development is reviewed, and optical modeling is introduced as a powerful method to monitor the four material components, amorphous and crystalline silicon as well as amorphous and crystalline silicon carbide. In the second part of this chapter, recent device developments for the photovoltaic characterization of Si NCs are examined. The controlled growth of Si NCs involves high-temperature annealing which deteriorates the properties of any previously established selective contacts. A membrane-based device is presented to overcome these limitations. In this approach, the formation of both selective contacts is carried out after high-temperature annealing and is therefore not affected by the latter. We examine p-i-n solar cells with an intrinsic region made of Si NCs embedded in silicon carbide. Device failure due to damaged insulation layers is analyzed by light beam-induced current measurements. An optical model of the device is presented for improving the cell current. A characterization scheme for Si NC p-i-n solar cells is presented which aims at determining the fundamental transport and recombination properties, i.e., the effective mobility lifetime product, of the nanocrystal layer at device level. For this means, an illumination-dependent analysis of Si NC p-i-n solar cells is carried out within the framework of the constant field approximation. The analysis builds on an optical device model, which is used to assess the photogenerated current in each of the device layers. Illumination-dependent current-voltage curves are modelled with a voltage-dependent current collection function with only two free parameters, and excellent

Dry Lubrication of High Temperature Silicon Nitride Rolling Contacts.

DTIC Science & Technology

1980-11-01

comparable to M50 bearing steel [2]. Quality control measures were implemented in the areas of raw material inspection as well as non-destructive evaluation...to oil lubricated bearing steels . Due to the apparent success of graphite at high tem- perature, three vendors were selected that manufacture graph...hybrid bearings ( steel rings and silicon nitride balls) to establish solid lubricant/cage design practices. High temperature bearing tests with silicon

A silicon nanowire-reduced graphene oxide composite as a high-performance lithium ion battery anode material.

PubMed

Ren, Jian-Guo; Wang, Chundong; Wu, Qi-Hui; Liu, Xiang; Yang, Yang; He, Lifang; Zhang, Wenjun

2014-03-21

Toward the increasing demands of portable energy storage and electric vehicle applications, silicon has been emerging as a promising anode material for lithium-ion batteries (LIBs) owing to its high specific capacity. However, serious pulverization of bulk silicon during cycling limits its cycle life. Herein, we report a novel hierarchical Si nanowire (Si NW)-reduced graphene oxide (rGO) composite fabricated using a solvothermal method followed by a chemical vapor deposition process. In the composite, the uniform-sized [111]-oriented Si NWs are well dispersed on the rGO surface and in between rGO sheets. The flexible rGO enables us to maintain the structural integrity and to provide a continuous conductive network of the electrode, which results in over 100 cycles serving as an anode in half cells at a high lithium storage capacity of 2300 mA h g(-1). Due to its [111] growth direction and the large contact area with rGO, the Si NWs in the composite show substantially enhanced reaction kinetics compared with other Si NWs or Si particles.

Active phase correction of high resolution silicon photonic arrayed waveguide gratings

DOE PAGES

Gehl, M.; Trotter, D.; Starbuck, A.; ...

2017-03-10

Arrayed waveguide gratings provide flexible spectral filtering functionality for integrated photonic applications. Achieving narrow channel spacing requires long optical path lengths which can greatly increase the footprint of devices. High index contrast waveguides, such as those fabricated in silicon-on-insulator wafers, allow tight waveguide bends which can be used to create much more compact designs. Both the long optical path lengths and the high index contrast contribute to significant optical phase error as light propagates through the device. Thus, silicon photonic arrayed waveguide gratings require active or passive phase correction following fabrication. We present the design and fabrication of compact siliconmore » photonic arrayed waveguide gratings with channel spacings of 50, 10 and 1 GHz. The largest device, with 11 channels of 1 GHz spacing, has a footprint of only 1.1 cm 2. Using integrated thermo-optic phase shifters, the phase error is actively corrected. We present two methods of phase error correction and demonstrate state-of-the-art cross-talk performance for high index contrast arrayed waveguide gratings. As a demonstration of possible applications, we perform RF channelization with 1 GHz resolution. In addition, we generate unique spectral filters by applying non-zero phase offsets calculated by the Gerchberg Saxton algorithm.« less

Nonlinear silicon photonics

NASA Astrophysics Data System (ADS)

Borghi, M.; Castellan, C.; Signorini, S.; Trenti, A.; Pavesi, L.

2017-09-01

Silicon photonics is a technology based on fabricating integrated optical circuits by using the same paradigms as the dominant electronics industry. After twenty years of fervid development, silicon photonics is entering the market with low cost, high performance and mass-manufacturable optical devices. Until now, most silicon photonic devices have been based on linear optical effects, despite the many phenomenologies associated with nonlinear optics in both bulk materials and integrated waveguides. Silicon and silicon-based materials have strong optical nonlinearities which are enhanced in integrated devices by the small cross-section of the high-index contrast silicon waveguides or photonic crystals. Here the photons are made to strongly interact with the medium where they propagate. This is the central argument of nonlinear silicon photonics. It is the aim of this review to describe the state-of-the-art in the field. Starting from the basic nonlinearities in a silicon waveguide or in optical resonator geometries, many phenomena and applications are described—including frequency generation, frequency conversion, frequency-comb generation, supercontinuum generation, soliton formation, temporal imaging and time lensing, Raman lasing, and comb spectroscopy. Emerging quantum photonics applications, such as entangled photon sources, heralded single-photon sources and integrated quantum photonic circuits are also addressed at the end of this review.

Cu diffusion in single-crystal and polycrystalline TiN barrier layers: A high-resolution experimental study supported by first-principles calculations

NASA Astrophysics Data System (ADS)

Mühlbacher, Marlene; Bochkarev, Anton S.; Mendez-Martin, Francisca; Sartory, Bernhard; Chitu, Livia; Popov, Maxim N.; Puschnig, Peter; Spitaler, Jürgen; Ding, Hong; Schalk, Nina; Lu, Jun; Hultman, Lars; Mitterer, Christian

2015-08-01

Dense single-crystal and polycrystalline TiN/Cu stacks were prepared by unbalanced DC magnetron sputter deposition at a substrate temperature of 700 °C and a pulsed bias potential of -100 V. The microstructural variation was achieved by using two different substrate materials, MgO(001) and thermally oxidized Si(001), respectively. Subsequently, the stacks were subjected to isothermal annealing treatments at 900 °C for 1 h in high vacuum to induce the diffusion of Cu into the TiN. The performance of the TiN diffusion barrier layers was evaluated by cross-sectional transmission electron microscopy in combination with energy-dispersive X-ray spectrometry mapping and atom probe tomography. No Cu penetration was evident in the single-crystal stack up to annealing temperatures of 900 °C, due to the low density of line and planar defects in single-crystal TiN. However, at higher annealing temperatures when diffusion becomes more prominent, density-functional theory calculations predict a stoichiometry-dependent atomic diffusion mechanism of Cu in bulk TiN, with Cu diffusing on the N sublattice for the experimental N/Ti ratio. In comparison, localized diffusion of Cu along grain boundaries in the columnar polycrystalline TiN barriers was detected after the annealing treatment. The maximum observed diffusion length was approximately 30 nm, yielding a grain boundary diffusion coefficient of the order of 10-16 cm2 s-1 at 900 °C. This is 10 to 100 times less than for comparable underdense polycrystalline TiN coatings deposited without external substrate heating or bias potential. The combined numerical and experimental approach presented in this paper enables the contrasting juxtaposition of diffusion phenomena and mechanisms in two TiN coatings, which differ from each other only in the presence of grain boundaries.

Highly Sensitive Bulk Silicon Chemical Sensors with Sub-5 nm Thin Charge Inversion Layers.

PubMed

Fahad, Hossain M; Gupta, Niharika; Han, Rui; Desai, Sujay B; Javey, Ali

2018-03-27

There is an increasing demand for mass-producible, low-power gas sensors in a wide variety of industrial and consumer applications. Here, we report chemical-sensitive field-effect-transistors (CS-FETs) based on bulk silicon wafers, wherein an electrostatically confined sub-5 nm thin charge inversion layer is modulated by chemical exposure to achieve a high-sensitivity gas-sensing platform. Using hydrogen sensing as a "litmus" test, we demonstrate large sensor responses (>1000%) to 0.5% H 2 gas, with fast response (<60 s) and recovery times (<120 s) at room temperature and low power (<50 μW). On the basis of these performance metrics as well as standardized benchmarking, we show that bulk silicon CS-FETs offer similar or better sensing performance compared to emerging nanostructures semiconductors while providing a highly scalable and manufacturable platform.

Development of high-efficiency solar cells on silicon web

NASA Technical Reports Server (NTRS)

Meier, D. L.; Greggi, J.; Okeeffe, T. W.; Rai-Choudhury, P.

1986-01-01

Work was performed to improve web base material with a goal of obtaining solar cell efficiencies in excess of 18% (AM1). Efforts in this program are directed toward identifying carrier loss mechanisms in web silicon, eliminating or reducing these mechanisms, designing a high efficiency cell structure with the aid of numerical models, and fabricating high efficiency web solar cells. Fabrication techniques must preserve or enhance carrier lifetime in the bulk of the cell and minimize recombination of carriers at the external surfaces. Three completed cells were viewed by cross-sectional transmission electron microscopy (TEM) in order to investigate further the relation between structural defects and electrical performance of web cells. Consistent with past TEM examinations, the cell with the highest efficiency (15.0%) had no dislocations but did have 11 twin planes.

Asymmetric band offsets in silicon heterojunction solar cells: Impact on device performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seif, Johannes Peter, E-mail: johannes.seif@alumni.epfl.ch; Ballif, Christophe; De Wolf, Stefaan

Amorphous/crystalline silicon interfaces feature considerably larger valence than conduction band offsets. In this article, we analyze the impact of such band offset asymmetry on the performance of silicon heterojunction solar cells. To this end, we use silicon suboxides as passivation layers—inserted between substrate and (front or rear) contacts—since such layers enable intentionally exacerbated band-offset asymmetry. Investigating all topologically possible passivation layer permutations and focussing on light and dark current-voltage characteristics, we confirm that to avoid fill factor losses, wider-bandgap silicon oxide films (of at least several nanometer thin) should be avoided in hole-collecting contacts. As a consequence, device implementation ofmore » such films as window layers—without degraded carrier collection—demands electron collection at the front and hole collection at the rear. Furthermore, at elevated operating temperatures, once possible carrier transport barriers are overcome by thermionic (field) emission, the device performance is mainly dictated by the passivation of its surfaces. In this context, compared to the standard amorphous silicon layers, the wide-bandgap oxide layers applied here passivate remarkably better at these temperatures, which may represent an additional benefit under practical operation conditions.« less

Asymmetric band offsets in silicon heterojunction solar cells: Impact on device performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seif, Johannes Peter; Menda, Deneb; Descoeudres, Antoine

Here, amorphous/crystalline silicon interfaces feature considerably larger valence than conduction band offsets. In this article, we analyze the impact of such band offset asymmetry on the performance of silicon heterojunction solar cells. To this end, we use silicon suboxides as passivation layers -- inserted between substrate and (front or rear) contacts -- since such layers enable intentionally exacerbated band-offset asymmetry. Investigating all topologically possible passivation layer permutations and focussing on light and dark current-voltage characteristics, we confirm that to avoid fill factor losses, wider-bandgap silicon oxide films (of at least several nanometer thin) should be avoided in hole-collecting contacts. Asmore » a consequence, device implementation of such films as window layers -- without degraded carrier collection -- demands electron collection at the front and hole collection at the rear. Furthermore, at elevated operating temperatures, once possible carrier transport barriers are overcome by thermionic (field) emission, the device performance is mainly dictated by the passivation of its surfaces. In this context, compared to the standard amorphous silicon layers, the wide-bandgap oxide layers applied here passivate remarkably better at these temperatures, which may represent an additional benefit under practical operation conditions.« less

Asymmetric band offsets in silicon heterojunction solar cells: Impact on device performance

DOE PAGES

Seif, Johannes Peter; Menda, Deneb; Descoeudres, Antoine; ...

2016-08-01

Here, amorphous/crystalline silicon interfaces feature considerably larger valence than conduction band offsets. In this article, we analyze the impact of such band offset asymmetry on the performance of silicon heterojunction solar cells. To this end, we use silicon suboxides as passivation layers -- inserted between substrate and (front or rear) contacts -- since such layers enable intentionally exacerbated band-offset asymmetry. Investigating all topologically possible passivation layer permutations and focussing on light and dark current-voltage characteristics, we confirm that to avoid fill factor losses, wider-bandgap silicon oxide films (of at least several nanometer thin) should be avoided in hole-collecting contacts. Asmore » a consequence, device implementation of such films as window layers -- without degraded carrier collection -- demands electron collection at the front and hole collection at the rear. Furthermore, at elevated operating temperatures, once possible carrier transport barriers are overcome by thermionic (field) emission, the device performance is mainly dictated by the passivation of its surfaces. In this context, compared to the standard amorphous silicon layers, the wide-bandgap oxide layers applied here passivate remarkably better at these temperatures, which may represent an additional benefit under practical operation conditions.« less

Photovoltaic Cell Having A P-Type Polycrystalline Layer With Large Crystals

DOEpatents

Albright, Scot P.; Chamberlin, Rhodes R.

1996-03-26

A photovoltaic cell has an n-type polycrystalline layer and a p-type polycrystalline layer adjoining the n-type polycrystalline layer to form a photovoltaic junction. The p-type polycrystalline layer comprises a substantially planar layer portion having relatively large crystals adjoining the n-type polycrystalline layer. The planar layer portion includes oxidized impurities which contribute to obtainment of p-type electrical properties in the planar layer portion.

High-efficiency crystalline silicon technology development

NASA Technical Reports Server (NTRS)

Prince, M. B.

1984-01-01

The rationale for pursuing high efficiency crystalline silicon technology research is discussed. Photovoltaic energy systems are reviewed as to their cost effectiveness and their competitiveness with other energy systems. The parameters of energy system life are listed and briefly reviewed.

Double-shelled silicon anode nanocomposite materials: A facile approach for stabilizing electrochemical performance via interface construction

NASA Astrophysics Data System (ADS)

Du, Lulu; Wen, Zhongsheng; Wang, Guanqin; Yang, Yan-E.

2018-04-01

The rapid capacity fading induced by volumetric changes is the main issue that hinders the widespread application of silicon anode materials. Thus, double-shelled silicon composite materials where lithium silicate was located between an Nb2O5 coating layer and a silicon active core were configured to overcome the chemical compatibility issues related to silicon and oxides. The proposed composites were prepared via a facile co-precipitation method combined with calcination. Transmission electron microscopy and X-ray photoelectron spectroscopy analysis demonstrated that a transition layer of lithium silicate was constructed successfully, which effectively hindered the thermal inter-diffusion between the silicon and oxide coating layers during heat treatment. The electrochemical performance of the double-shelled silicon composites was enhanced dramatically with a retained specific capacity of 1030 mAh g-1 after 200 cycles at a current density of 200 mA g-1 compared with 598 mAh g-1 for a core-shell Si@Nb2O5 composite that lacked the interface. The lithium silicate transition layer was shown to play an important role in maintaining the high electrochemical stability.

Amorphous silicon carbide passivating layers for crystalline-silicon-based heterojunction solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boccard, Mathieu; Holman, Zachary C.

Amorphous silicon enables the fabrication of very high-efficiency crystalline-silicon-based solar cells due to its combination of excellent passivation of the crystalline silicon surface and permeability to electrical charges. Yet, amongst other limitations, the passivation it provides degrades upon high-temperature processes, limiting possible post-deposition fabrication possibilities (e.g., forcing the use of low-temperature silver pastes). We investigate the potential use of intrinsic amorphous silicon carbide passivating layers to sidestep this issue. The passivation obtained using device-relevant stacks of intrinsic amorphous silicon carbide with various carbon contents and doped amorphous silicon are evaluated, and their stability upon annealing assessed, amorphous silicon carbide beingmore » shown to surpass amorphous silicon for temperatures above 300 °C. We demonstrate open-circuit voltage values over 700 mV for complete cells, and an improved temperature stability for the open-circuit voltage. Transport of electrons and holes across the hetero-interface is studied with complete cells having amorphous silicon carbide either on the hole-extracting side or on the electron-extracting side, and a better transport of holes than of electrons is shown. Also, due to slightly improved transparency, complete solar cells using an amorphous silicon carbide passivation layer on the hole-collecting side are demonstrated to show slightly better performances even prior to annealing than obtained with a standard amorphous silicon layer.« less

Amorphous silicon carbide passivating layers for crystalline-silicon-based heterojunction solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Boccard, Mathieu; Holman, Zachary C.

With this study, amorphous silicon enables the fabrication of very high-efficiency crystalline-silicon-based solar cells due to its combination of excellent passivation of the crystalline silicon surface and permeability to electrical charges. Yet, amongst other limitations, the passivation it provides degrades upon high-temperature processes, limiting possible post-deposition fabrication possibilities (e.g., forcing the use of low-temperature silver pastes). We investigate the potential use of intrinsic amorphous silicon carbide passivating layers to sidestep this issue. The passivation obtained using device-relevant stacks of intrinsic amorphous silicon carbide with various carbon contents and doped amorphous silicon are evaluated, and their stability upon annealing assessed, amorphousmore » silicon carbide being shown to surpass amorphous silicon for temperatures above 300°C. We demonstrate open-circuit voltage values over 700 mV for complete cells, and an improved temperature stability for the open-circuit voltage. Transport of electrons and holes across the hetero-interface is studied with complete cells having amorphous silicon carbide either on the hole-extracting side or on the electron-extracting side, and a better transport of holes than of electrons is shown. Also, due to slightly improved transparency, complete solar cells using an amorphous silicon carbide passivation layer on the hole-collecting side are demonstrated to show slightly better performances even prior to annealing than obtained with a standard amorphous silicon layer.« less

Amorphous silicon carbide passivating layers for crystalline-silicon-based heterojunction solar cells

DOE PAGES

Boccard, Mathieu; Holman, Zachary C.

2015-08-14

With this study, amorphous silicon enables the fabrication of very high-efficiency crystalline-silicon-based solar cells due to its combination of excellent passivation of the crystalline silicon surface and permeability to electrical charges. Yet, amongst other limitations, the passivation it provides degrades upon high-temperature processes, limiting possible post-deposition fabrication possibilities (e.g., forcing the use of low-temperature silver pastes). We investigate the potential use of intrinsic amorphous silicon carbide passivating layers to sidestep this issue. The passivation obtained using device-relevant stacks of intrinsic amorphous silicon carbide with various carbon contents and doped amorphous silicon are evaluated, and their stability upon annealing assessed, amorphousmore » silicon carbide being shown to surpass amorphous silicon for temperatures above 300°C. We demonstrate open-circuit voltage values over 700 mV for complete cells, and an improved temperature stability for the open-circuit voltage. Transport of electrons and holes across the hetero-interface is studied with complete cells having amorphous silicon carbide either on the hole-extracting side or on the electron-extracting side, and a better transport of holes than of electrons is shown. Also, due to slightly improved transparency, complete solar cells using an amorphous silicon carbide passivation layer on the hole-collecting side are demonstrated to show slightly better performances even prior to annealing than obtained with a standard amorphous silicon layer.« less

High-alignment-accuracy transfer printing of passive silicon waveguide structures.

PubMed

Ye, Nan; Muliuk, Grigorij; Trindade, Antonio Jose; Bower, Chris; Zhang, Jing; Uvin, Sarah; Van Thourhout, Dries; Roelkens, Gunther

2018-01-22

We demonstrate the transfer printing of passive silicon devices on a silicon-on-insulator target waveguide wafer. Adiabatic taper structures and directional coupler structures were designed for 1310 nm and 1600 nm wavelength coupling tolerant for ± 1 µm misalignment. The release of silicon devices from the silicon substrate was realized by underetching the buried oxide layer while protecting the back-end stack. Devices were successfully picked by a PDMS stamp, by breaking the tethers that kept the silicon coupons in place on the source substrate, and printed with high alignment accuracy on a silicon photonic target wafer. Coupling losses of -1.5 +/- 0.5 dB for the adiabatic taper at 1310 nm wavelength and -0.5 +/- 0.5 dB for the directional coupler at 1600 nm wavelength are obtained.

Functionalization of 2D macroporous silicon under the high-pressure oxidation

NASA Astrophysics Data System (ADS)