Science.gov

Sample records for individual pixel readout

  1. Development of a 64-channel APD detector module with individual pixel readout for submillimetre spatial resolution in PET

    NASA Astrophysics Data System (ADS)

    Bérard, Philippe; Bergeron, Mélanie; Pepin, Catherine M.; Cadorette, Jules; Tétrault, Marc-André; Viscogliosi, Nicolas; Fontaine, Réjean; Dautet, Henri; Davies, Murray; Deschamps, Pierre; Lecomte, Roger

    2009-10-01

    Visualization and quantification of biological processes by molecular imaging in small animals such as rats and especially mice require the best possible spatial resolution in positron emission tomography (PET). A new avalanche photodiode (APD) detector module, the LabPET II, was developed to achieve submillimetre spatial resolution for this purpose. The module consists of two monolithic APD arrays of 4×8 pixels, each with an active area of 1.1×1.1 mm 2 at a 1.2 mm pitch. The two APD arrays mounted in a custom ceramic PGA holder are coupled to an 8×8 tapered LYSO scintillator array designed to accommodate one-to-one coupling between individual APDs and crystal pixels. To investigate the module performance, an analog test board with four 16-channel preamplifier ASICs was designed to be interfaced with the LabPET™ digital processing electronics. At a standard APD operating bias, a mean energy resolution of 27.5±2.1% was typically obtained with a relative standard deviation of 13.8% in signal amplitude for the 64 individual pixels when irradiated with 511 keV photons. With two modules in coincidence, a mean timing resolution of 5.0±0.2 ns FWHM was measured. Finally, an intrinsic spatial resolution of 0.82 mm FWHM was measured by sweeping a 22Na point source between the two detector arrays. The LabPET II detector module demonstrates promising characteristics for dedicated small animal PET imaging at submillimetre resolution and, with some further optimization, would be suitable as the building block for a dual-modality combined PET/CT system.

  2. Data encoding efficiency in pixel detector readout with charge information

    NASA Astrophysics Data System (ADS)

    Garcia-Sciveres, Maurice; Wang, Xinkang

    2016-04-01

    The average minimum number of bits needed for lossless readout of a pixel detector is calculated, in the regime of interest for particle physics where only a small fraction of pixels have a non-zero value per frame. This permits a systematic comparison of the readout efficiency of different encoding implementations. The calculation is compared to the number of bits used by the FE-I4 pixel readout chip of the ATLAS experiment.

  3. Active pixel sensor array with multiresolution readout

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor); Pain, Bedabrata (Inventor)

    1999-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

  4. Pixel readout electronics for LHC and biomedical applications

    NASA Astrophysics Data System (ADS)

    Blanquart, L.; Bonzom, V.; Comes, G.; Delpierre, P.; Fischer, P.; Hausmann, J.; Keil, M.; Lindner, M.; Meuser, S.; Wermes, N.

    2000-01-01

    The demanding requirements for pixel readout electronics for high-energy physics experiments and biomedical applications are reviewed. Some examples of the measured analog performance of prototype chips are given. The readout architectures of the PIxel Readout for the ATlas Experiment (PIRATE) chip suited for LHC experiments and of the Multi Picture Element Counter (MPEC) counting chip targeted for biomedical applications are presented. First results with complete chip-sensor assemblies are also shown.

  5. FPIX2, the BTeV pixel readout chip

    SciTech Connect

    David C. Christian et al.

    2003-12-10

    A radiation tolerant pixel readout chip, FPIX2, has been developed at Fermilab for use by BTeV. Some of the requirements of the BTeV pixel readout chip are reviewed and contrasted with requirements for similar devices in LHC experiments. A description of the FPIX2 is given, and results of initial tests of its performance are presented, as is a summary of measurements planned for the coming year.

  6. Recent Developments of HEP Pixel Detector Readout Chips

    NASA Astrophysics Data System (ADS)

    Caminada, Lea

    This article reviews the development of readout integrated circuits for hybrid pixel particle physics detectors. The 250-nm feature size chips in the presently operating ATLAS and CMS experiments are compared with the current state of the art in 130-nm feature size represented by the FE-I4 chip that will be used to add a new beam pipe layer for the ATLAS experiment in 2013 and the upgrade options of the CMS pixel readout chip. This includes a discussion of the array and pixel size, analog performance, readout architecture, power consumption, power distribution options and radiation hardness. Finally, recent work in 65-nm feature size as a means to continue the evolution of readout chip technology towards smaller feature size, higher rate, and lower power is presented.

  7. Vertically integrated pixel readout chip for high energy physics

    SciTech Connect

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Khalid, Farah; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2011-01-01

    We report on the development of the vertex detector pixel readout chips based on multi-tier vertically integrated electronics for the International Linear Collider. Some testing results of the VIP2a prototype are presented. The chip is the second iteration of the silicon implementation of the prototype, data-pushed concept of the readout developed at Fermilab. The device was fabricated in the 3D MIT-LL 0.15 {micro}m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 {micro}m{sup 2} pixels, laid out in an array of 48 x 48 pixels.

  8. Readout of TPC Tracking Chambers with GEMs and Pixel Chip

    SciTech Connect

    Kadyk, John; Kim, T.; Freytsis, M.; Button-Shafer, J.; Kadyk, J.; Vahsen, S.E.; Wenzel, W.A.

    2007-12-21

    Two layers of GEMs and the ATLAS Pixel Chip, FEI3, have been combined and tested as a prototype for Time Projection Chamber (TPC) readout at the International Linear Collider (ILC). The double-layer GEM system amplifies charge with gain sufficient to detect all track ionization. The suitability of three gas mixtures for this application was investigated, and gain measurements are presented. A large sample of cosmic ray tracks was reconstructed in 3D by using the simultaneous timing and 2D spatial information from the pixel chip. The chip provides pixel charge measurement as well as timing. These results demonstrate that a double GEM and pixel combination, with a suitably modified pixel ASIC, could meet the stringent readout requirements of the ILC.

  9. Readout chip for the CMS pixel detector upgrade

    NASA Astrophysics Data System (ADS)

    Rossini, Marco

    2014-11-01

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

  10. Detector apparatus having a hybrid pixel-waveform readout system

    SciTech Connect

    Meng, Ling-Jian

    2014-10-21

    A gamma ray detector apparatus comprises a solid state detector that includes a plurality of anode pixels and at least one cathode. The solid state detector is configured for receiving gamma rays during an interaction and inducing a signal in an anode pixel and in a cathode. An anode pixel readout circuit is coupled to the plurality of anode pixels and is configured to read out and process the induced signal in the anode pixel and provide triggering and addressing information. A waveform sampling circuit is coupled to the at least one cathode and configured to read out and process the induced signal in the cathode and determine energy of the interaction, timing of the interaction, and depth of interaction.

  11. Sensor Development and Readout Prototyping for the STAR Pixel Detector

    SciTech Connect

    Greiner, L.; Anderssen, E.; Matis, H.S.; Ritter, H.G.; Stezelberger, T.; Szelezniak, M.; Sun, X.; Vu, C.; Wieman, H.

    2009-01-14

    The STAR experiment at the Relativistic Heavy Ion Collider (RHIC) is designing a new vertex detector. The purpose of this upgrade detector is to provide high resolution pointing to allow for the direct topological reconstruction of heavy flavor decays such as the D{sup 0} by finding vertices displaced from the collision vertex by greater than 60 microns. We are using Monolithic Active Pixel Sensor (MAPS) as the sensor technology and have a coupled sensor development and readout system plan that leads to a final detector with a <200 {micro}s integration time, 400 M pixels and a coverage of -1 < {eta} < 1. We present our coupled sensor and readout development plan and the status of the prototyping work that has been accomplished.

  12. A generic readout environment for prototype pixel detectors

    NASA Astrophysics Data System (ADS)

    Turqueti, Marcos; Rivera, Ryan; Prosser, Alan; Kwan, Simon

    2010-11-01

    Pixel detectors for experimental particle physics research have been implemented with a variety of readout formats and potentially generate massive amounts of data. Examples include the PSI46 device for the Compact Muon Solenoid (CMS) experiment which implements an analog readout, the Fermilab FPIX2.1 device with a digital readout, and the Fermilab Vertically Integrated Pixel device. The Electronic Systems Engineering Department of the Computing Division at the Fermi National Accelerator Laboratory has developed a data acquisition system flexible and powerful enough to meet the various needs of these devices to support laboratory test bench as well as test beam applications. The system is called CAPTAN (Compact And Programmable daTa Acquisition Node) and is characterized by its flexibility, versatility and scalability by virtue of several key architectural features. These include a vertical bus that permits the user to stack multiple boards, a gigabit Ethernet link that permits high speed communications to the system and a core group of boards that provide specific processing and readout capabilities for the system. System software based on distributed computing techniques supports an expandable network of CAPTANs. In this paper, we describe the system architecture and give an overview of its capabilities.

  13. Towards a new generation of pixel detector readout chips

    NASA Astrophysics Data System (ADS)

    Campbell, M.; Alozy, J.; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

    2016-01-01

    The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile-ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

  14. Small-Scale Readout Systems Prototype for the STAR PIXEL Detector

    SciTech Connect

    Szelezniak, Michal A.; Besson, Auguste; Colledani, Claude; Dorokhov, Andrei; Dulinski, Wojciech; Greiner, Leo C.; Himmi, Abdelkader; Hu, Christine; Matis, Howard S.; Ritter, Hans Georg; Rose, Andrew; Shabetai, Alexandre; Stezelberger, Thorsten; Sun, Xiangming; Thomas, Jim H.; Valin, Isabelle; Vu, Chinh Q.; Wieman, Howard H.; Winter, Marc

    2008-10-01

    A prototype readout system for the STAR PIXEL detector in the Heavy Flavor Tracker (HFT) vertex detector upgrade is presented. The PIXEL detector is a Monolithic Active Pixel Sensor (MAPS) based silicon pixel vertex detector fabricated in a commercial CMOS process that integrates the detector and front-end electronics layers in one silicon die. Two generations ofMAPS prototypes designed specifically for the PIXEL are discussed. We have constructed a prototype telescope system consisting of three small MAPS sensors arranged in three parallel and coaxial planes with a readout system based on the readout architecture for PIXEL. This proposed readout architecture is simple and scales to the size required to readout the final detector. The real-time hit finding algorithm necessary for data rate reduction in the 400 million pixel detector is described, and aspects of the PIXEL system integration into the existing STAR framework are addressed. The complete system has been recently tested and shown to be fully functional.

  15. Digital pixel readout integrated circuit architectures for LWIR

    NASA Astrophysics Data System (ADS)

    Shafique, Atia; Yazici, Melik; Kayahan, Huseyin; Ceylan, Omer; Gurbuz, Yasar

    2015-06-01

    This paper presents and discusses digital pixel readout integrated circuit architectures for long wavelength infrared (LWIR) in CMOS technology. Presented architectures are designed for scanning and staring arrays type detectors respectively. For scanning arrays, digital time delay integration (TDI) is implemented on 8 pixels with sampling rate up to 3 using CMOS 180nm technology. Input referred noise of ROIC is below 750 rms electron meanwhile power dissipation is appreciably under 30mW. ROIC design is optimized to perform at room as well as cryogenic temperatures. For staring type arrays, a digital pixel architecture relying on coarse quantization with pulse frequency modulation (PFM) and novel approach of extended integration is presented. It can achieve extreme charge handling capacity of 2.04Ge- with 20 bit output resolution and power dissipation below 350 nW in CMOS 90nm technology. Efficient mechanism of measuring the time to estimate the remaining charge on integration capacitor in order to achieve low SNR has employed.

  16. A near-infrared 64-pixel superconducting nanowire single photon detector array with integrated multiplexed readout

    SciTech Connect

    Allman, M. S. Verma, V. B.; Stevens, M.; Gerrits, T.; Horansky, R. D.; Lita, A. E.; Mirin, R.; Nam, S. W.; Marsili, F.; Beyer, A.; Shaw, M. D.; Kumor, D.

    2015-05-11

    We demonstrate a 64-pixel free-space-coupled array of superconducting nanowire single photon detectors optimized for high detection efficiency in the near-infrared range. An integrated, readily scalable, multiplexed readout scheme is employed to reduce the number of readout lines to 16. The cryogenic, optical, and electronic packaging to read out the array as well as characterization measurements are discussed.

  17. CMOS Active-Pixel Image Sensor With Intensity-Driven Readout

    NASA Technical Reports Server (NTRS)

    Langenbacher, Harry T.; Fossum, Eric R.; Kemeny, Sabrina

    1996-01-01

    Proposed complementary metal oxide/semiconductor (CMOS) integrated-circuit image sensor automatically provides readouts from pixels in order of decreasing illumination intensity. Sensor operated in integration mode. Particularly useful in number of image-sensing tasks, including diffractive laser range-finding, three-dimensional imaging, event-driven readout of sparse sensor arrays, and star tracking.

  18. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    PubMed Central

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e−RMS at maximum gain and negative polarity conditions has been measured at room temperature. PMID:26744545

  19. Radiation Tolerance Studies of BTeV Pixel Readout Chip Prototypes

    SciTech Connect

    Gabriele Chiodini et al.

    2001-09-11

    We report on several irradiation studies performed on BTeV preFPIX2 pixel readout chip prototypes exposed to a 200 MeV proton beam at the Indiana University Cyclotron Facility. The preFPIX2 pixel readout chip has been implemented in standard 0.25 micron CMOS technology following radiation tolerant design rules. The tests confirmed the radiation tolerance of the chip design to proton total dose of 26 MRad. In addition, non destructive radiation-induced single event upsets have been observed in on-chip static registers and the single bit upset cross section has been measured.

  20. Two-dimensional pixel readout of wire chambers

    NASA Astrophysics Data System (ADS)

    Carlén, L.; Garpman, S.; Gustafsson, H.-Å.; Oskarsson, A.; Otterlund, I.; Stenlund, E.; Svensson, T.; Söderström, K.

    1997-02-01

    We describe a new concept for two-dimensional position readout of wire chambers. The cathode is divided into small electrodes (pads) with approximately the size of the desired position resolution. The pulse height in each pad is compared with a threshold. A particle hit will always result in a cluster of three neighbouring pads fired, thus providing a very high noise immunity in spite of the simple threshold readout. Test results for single particles are reported. The results are used as the input for a simulation of the two track separation power. The simulations indicate that the concept will show excellent performance at the very high particle multiplicities prevailing in heavy ion collisions at RHIC and LHC.

  1. Small-Scale Readout System Prototype for the STAR PIXEL Detector

    SciTech Connect

    Szelezniak, Michal; Anderssen, Eric; Greiner, Leo; Matis, Howard; Ritter, Hans Georg; Stezelberger, Thorsten; Sun, Xiangming; Thomas, James; Vu, Chinh; Wieman, Howard

    2008-10-10

    Development and prototyping efforts directed towards construction of a new vertex detector for the STAR experiment at the RHIC accelerator at BNL are presented. This new detector will extend the physics range of STAR by allowing for precision measurements of yields and spectra of particles containing heavy quarks. The innermost central part of the new detector is a high resolution pixel-type detector (PIXEL). PIXEL requirements are discussed as well as a conceptual mechanical design, a sensor development path, and a detector readout architecture. Selected progress with sensor prototypes dedicated to the PIXEL detector is summarized and the approach chosen for the readout system architecture validated in tests of hardware prototypes is discussed.

  2. Dead-time free pixel readout architecture for ATLAS front-end IC

    SciTech Connect

    Einsweiler, K.; Joshi, A.; Kleinfelder, S.; Luo, L.; Marchesini, R.; Milgrome, O.; Pengg, F.

    1999-06-01

    A low-power, sparse-scan, readout architecture has been developed for the ATLAS pixel front-end electronics. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address of the hits and associates them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 {micro} HP process to meet the requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC has been found to provide dead-time-less ambiguity-free readout at 40 MHz data rate.

  3. CMOS readout integrated circuit involving pixel-level ADC for microbolometer FPAs

    NASA Astrophysics Data System (ADS)

    Hwang, C. H.; Kwon, I. W.; Lee, Y. S.; Lee, H. C.

    2008-04-01

    The function of most readout integrated circuits (ROIC) for microbolometer focal plane arrays (FPAs) is supplying a bias voltage to a microbolometer of each pixel, integrating the current of a microbolometer, and transferring the signals from pixels to the output of a chip. However, the scale down of CMOS technology allows the integration of other functions. In this paper, we proposed a CMOS ROIC involving a pixel-level analog-to-digital converter (ADC) for 320 × 240 microbolometer FPAs. Such integration would improve the performance of a ROIC at the reduced system cost and power consumption. The noise performance of a microbolometer is improved by using the pixelwise readout structure because integration time can be increased up to 1ms. A Pixel circuit is consisted of a background skimming circuit, a differential amplifier, an integration capacitor and a 10-bit DRAM. First, the microbolometer current is integrated for 1ms after the skimming current correction. The differential amplifier operates as an op-Amp and the integration capacitor makes negative feedback loop between an output and a negative input of the op-Amp. And then, the integrated signal voltage is converted to digital signals using a modified single slope ADC in a pixel when the differential amplifier operates as a comparator and the 10-bit DRAM stores values of a counter. This readout circuit is designed and fabricated using a standard 0.35μm 2-poly 3-metal CMOS technology.

  4. Fast readout architectures for large arrays of digital pixels: examples and applications.

    PubMed

    Gabrielli, A

    2014-01-01

    Modern pixel detectors, particularly those designed and constructed for applications and experiments for high-energy physics, are commonly built implementing general readout architectures, not specifically optimized in terms of speed. High-energy physics experiments use bidimensional matrices of sensitive elements located on a silicon die. Sensors are read out via other integrated circuits bump bonded over the sensor dies. The speed of the readout electronics can significantly increase the overall performance of the system, and so here novel forms of readout architectures are studied and described. These circuits have been investigated in terms of speed and are particularly suited for large monolithic, low-pitch pixel detectors. The idea is to have a small simple structure that may be expanded to fit large matrices without affecting the layout complexity of the chip, while maintaining a reasonably high readout speed. The solutions might be applied to devices for applications not only in physics but also to general-purpose pixel detectors whenever online fast data sparsification is required. The paper presents also simulations on the efficiencies of the systems as proof of concept for the proposed ideas. PMID:24778588

  5. Fast Readout Architectures for Large Arrays of Digital Pixels: Examples and Applications

    PubMed Central

    Gabrielli, A.

    2014-01-01

    Modern pixel detectors, particularly those designed and constructed for applications and experiments for high-energy physics, are commonly built implementing general readout architectures, not specifically optimized in terms of speed. High-energy physics experiments use bidimensional matrices of sensitive elements located on a silicon die. Sensors are read out via other integrated circuits bump bonded over the sensor dies. The speed of the readout electronics can significantly increase the overall performance of the system, and so here novel forms of readout architectures are studied and described. These circuits have been investigated in terms of speed and are particularly suited for large monolithic, low-pitch pixel detectors. The idea is to have a small simple structure that may be expanded to fit large matrices without affecting the layout complexity of the chip, while maintaining a reasonably high readout speed. The solutions might be applied to devices for applications not only in physics but also to general-purpose pixel detectors whenever online fast data sparsification is required. The paper presents also simulations on the efficiencies of the systems as proof of concept for the proposed ideas. PMID:24778588

  6. High-speed readout of high-Z pixel detectors with the LAMBDA detector

    NASA Astrophysics Data System (ADS)

    Pennicard, D.; Smoljanin, S.; Sheviakov, I.; Xia, Q.; Rothkirch, A.; Yu, Y.; Struth, B.; Hirsemann, H.; Graafsma, H.

    2014-12-01

    High-frame-rate X-ray pixel detectors make it possible to perform time-resolved experiments at synchrotron beamlines, and to make better use of these sources by shortening experiment times. LAMBDA is a photon-counting hybrid pixel detector based on the Medipix3 chip, designed to combine a small pixel size of 55 μm, a large tileable module design, high speed, and compatibility with ``high-Z'' sensors for hard X-ray detection. This technical paper focuses on LAMBDA's high-speed-readout functionality, which allows a frame rate of 2000 frames per second with no deadtime between successive images. This takes advantage of the Medipix3 chip's ``continuous read-write'' function and highly parallelised readout. The readout electronics serialise this data and send it back to a server PC over two 10 Gigabit Ethernet links. The server PC controls the detector and receives, processes and stores the data using software designed for the Tango control system. As a demonstration of high-speed readout of a high-Z sensor, a GaAs LAMBDA detector was used to make a high-speed X-ray video of a computer fan.

  7. Focal plane readout for 2-D LWIR application implemented with current mode background suppression per pixel

    NASA Astrophysics Data System (ADS)

    Woo, Doo Hyung; Kang, Sang Gu; Lee, Hee Chul

    2004-02-01

    In this paper, a readout technique involving current mode background suppression is studied for 2-dimensional infrared focal plane arrays (IR FPA"s). This technique has a current memory per pixel, and the suppression current can be optimized per pixel element. Capacitive transimpedende amplifier (CTIA) and feedback amplifier structure are adopted for input circuit and background suppression circuit, respectively. Feedback amplifier structure can minimize skimming error due to channel length modulation. The area size of the pixel circuit is generally limited in the case of 2-D application. So, the amplifier used in the CTIA input circuit adopts timesharing for background suppression. To further improve the area limitation, a half circuit of the CTIA is shared in row circuit out of the pixel array. Because of the leakage of the current memory, the skimming data of the current memory in the pixel array is stored in SRAM array through ADC, and is refreshed periodically with SRAM data through DAC. The readout circuit was fabricated using 0.6um 2-poly 3-metal CMOS process for 64 x 64 LWIR HgCdTe IR array with the pixel size of 50um x 50um. The measurement performance of the skimming circuit exhibits about only 3% error for 100nA background current. The simulation results exhibit that skimming error can be reduced further to 0.3% when the ratioed current mirror scheme and/or multi step refresh scheme is adopted.

  8. FDM Readout Assembly with Flexible, Superconducting Connection to Cryogenic kilo-Pixel TES Detectors

    NASA Astrophysics Data System (ADS)

    Bruijn, M. P.; van der Linden, A. J.; Ridder, M. L.; van Weers, H. J.

    2016-07-01

    We describe a new fabrication process for a superconducting, flexible, and demountable connector to a kilo-pixel transition edge sensor. The demountable part contains planar coils for inductive coupling, in particular suited for AC-biased frequency domain multiplexed readout. A fixed connection to a chip with superconducting LC filters and SQUID readout is made by gold bump bonding with a connection resistance of 1.1 {× } 10^{-4} Ω . The Nb-based connecting lines on the flexible part show a superconducting transition around 7 K, which enables testing of connectors and LC filters in a simple L-He setup.

  9. The FE-I4 Pixel Readout Chip and the IBL Module

    SciTech Connect

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; Beccherle, Roberto; Darbo, Giovanni; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  10. Characterization of M-π-n CdTe pixel detectors coupled to HEXITEC readout chip

    NASA Astrophysics Data System (ADS)

    Veale, M. C.; Kalliopuska, J.; Pohjonen, H.; Andersson, H.; Nenonen, S.; Seller, P.; Wilson, M. D.

    2012-01-01

    Segmentation of the anode-side of an M-π-n CdTe diode, where the pn-junction is diffused into the detector bulk, produces large improvements in the spatial and energy resolution of CdTe pixel detectors. It has been shown that this fabrication technique produces very high inter-pixel resistance and low leakage currents are obtained by physical isolation of the pixels of M-π-n CdTe detectors. In this paper the results from M-π-n CdTe detectors stud bonded to a spectroscopic readout ASIC are reported. The CdTe pixel detectors have 250 μm pitch and an area of 5 × 5 mm2 with thicknesses of 1 and 2 mm. The polarization and energy resolution dependence of the M-π-n CdTe detectors as a function of detector thickness are discussed.

  11. Pixelwise readout integrated circuits with pixel-level ADC for microbolometers

    NASA Astrophysics Data System (ADS)

    Hwang, C. H.; Kim, C. B.; Lee, Y. S.; Yu, B. G.; Lee, H. C.

    2007-04-01

    Pixelwise integrated circuits involving a pixel-level analog-to-digital converter (ADC) are studied for 320 × 240 microbolometer focal plane arrays (FPAs). It is necessary to use the pixelwise readout architecture for decreasing the thermal noise. However, it is hard to locate a sufficiently large integration capacitor in a unit pixel of FPAs because of the area limitation. To effectively overcome this problem, a two step integration method is proposed. First, after integrating the current of the microbolometer for 32μs, upper 5bits of the 13bit digital signal are output through a pixel-level ADC. Then, the current of the microbolometer is integrated during 1ms after the skimming current correction using upper 5bits in a field-programmable gate array (FPGA), and then lower 8bits are obtained through a pixel-level ADC. Finally, upper 5bits and lower 8bits are combined into the digital image signal after the gain and offset correction in digital signal processor (DSP) Each 2×2 pixel shares an readout circuit, including a current-mode background skimming circuit, an operational amplifier(op-Amp), an integration capacitor and a single slope ADC. When the current of a microbolometer is integrated, the integration capacitor is connected between a negative input and an output of the op-Amp. Therefore a capacitive transimpedance amplifier (CTIA) has been employed as the input circuit of the microbolometer. When the output of a microbolometer is converted to digital signal, the Op-Amp is used as a comparator of the single slope ADC. This readout circuit is designed to achieve 35×35μm2 pixel size in 0.35μm 2-poly 3-metal CMOS technology.

  12. Development of readout system for FE-I4 pixel module using SiTCP

    NASA Astrophysics Data System (ADS)

    Teoh, J. J.; Hanagaki, K.; Ikegami, Y.; Takubo, Y.; Terada, S.; Unno, Y.

    2013-12-01

    The ATLAS pixel detector will be replaced in the future High Luminosity-Large Hadron Collider (HL-LHC) upgrade to preserve or improve the detector performance at high luminosity environment. To meet the tight requirements of the upgrade, a new pixel Front-End (FE) Integrated Circuit (IC) called FE-I4 has been developed. We have then devised a readout system for the new FE IC. Our system incorporates Silicon Transmission Control Protocol (SiTCP) technology (Uchida, 2008 [1]) which utilizes the standard TCP/IP and UDP communication protocols. This technology allows direct data access and transfer between a readout hardware chain and PC via a high speed Ethernet. In addition, the communication protocols are small enough to be implemented in a single Field-Programable Gate Array (FPGA). Relying on this technology, we have been able to construct a very compact, versatile and fast readout system. We have developed a firmware and software together with the readout hardware chain. We also have established basic functionalities for reading out FE-I4.

  13. The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    NASA Astrophysics Data System (ADS)

    Kluge, A.; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    2013-12-01

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300 μm2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms.

  14. Development of a cylindrical tracking detector with multichannel scintillation fibers and pixelated photon detector readout

    NASA Astrophysics Data System (ADS)

    Akazawa, Y.; Miwa, K.; Honda, R.; Shiozaki, T.; Chiga, N.

    2015-07-01

    We are developing a cylindrical tracking detector for a Σp scattering experiment in J-PARC with scintillation fibers and the Pixelated Photon Detector (PPD) readout, which is called as cylindrical fiber tracker (CFT), in order to reconstruct trajectories of charged particles emitted inside CFT. CFT works not only as a tracking detector but also a particle identification detector from energy deposits. A prototype CFT consisting of two straight layers and one spiral layer was constructed. About 1100 scintillation fibers with a diameter of 0.75 mm (Kuraray SCSF-78 M) were used. Each fiber signal was read by Multi-Pixel Photon Counter (MPPC, HPK S10362-11-050P, 1×1 mm2, 400 pixels) fiber by fiber. MPPCs were handled with Extended Analogue Silicon Photomultipliers Integrated ReadOut Chip (EASIROC) boards, which were developed for the readout of a large number of MPPCs. The energy resolution of one layer was 28% for a 70 MeV proton where the energy deposit in fibers was 0.7 MeV.

  15. Radiation tolerance of prototype BTeV pixel detector readout chips

    SciTech Connect

    Gabriele Chiodini et al.

    2002-07-12

    High energy and nuclear physics experiments need tracking devices with increasing spatial precision and readout speed in the face of ever-higher track densities and increased radiation environments. The new generation of hybrid pixel detectors (arrays of silicon diodes bump bonded to arrays of front-end electronic cells) is the state of the art technology able to meet these challenges. We report on irradiation studies performed on BTeV pixel readout chip prototypes exposed to a 200 MeV proton beam at Indiana University Cyclotron Facility. Prototype pixel readout chip preFPIX2 has been developed at Fermilab for collider experiments and implemented in standard 0.25 micron CMOS technology following radiation tolerant design rules. The tests confirmed the radiation tolerance of the chip design to proton total dose up to 87 MRad. In addition, non destructive radiation-induced single event upsets have been observed in on-chip static registers and the single bit upset cross section has been extensively measured.

  16. Low noise signal-to-noise ratio enhancing readout circuit for current-mediated active pixel sensors

    SciTech Connect

    Ottaviani, Tony; Karim, Karim S.; Nathan, Arokia; Rowlands, John A.

    2006-05-15

    Diagnostic digital fluoroscopic applications continuously expose patients to low doses of x-ray radiation, posing a challenge to both the digital imaging pixel and readout electronics when amplifying small signal x-ray inputs. Traditional switch-based amorphous silicon imaging solutions, for instance, have produced poor signal-to-noise ratios (SNRs) at low exposure levels owing to noise sources from the pixel readout circuitry. Current-mediated amorphous silicon pixels are an improvement over conventional pixel amplifiers with an enhanced SNR across the same low-exposure range, but whose output also becomes nonlinear with increasing dosage. A low-noise SNR enhancing readout circuit has been developed that enhances the charge gain of the current-mediated active pixel sensor (C-APS). The solution takes advantage of the current-mediated approach, primarily integrating the signal input at the desired frequency necessary for large-area imaging, while adding minimal noise to the signal readout. Experimental data indicates that the readout circuit can detect pixel outputs over a large bandwidth suitable for real-time digital diagnostic x-ray fluoroscopy. Results from hardware testing indicate that the minimum achievable C-APS output current that can be discerned at the digital fluoroscopic output from the enhanced SNR readout circuit is 0.341 nA. The results serve to highlight the applicability of amorphous silicon current-mediated pixel amplifiers for large-area flat panel x-ray imagers.

  17. Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

    NASA Technical Reports Server (NTRS)

    Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

    2011-01-01

    Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

  18. Review of hybrid pixel detector readout ASICs for spectroscopic X-ray imaging

    NASA Astrophysics Data System (ADS)

    Ballabriga, R.; Alozy, J.; Campbell, M.; Frojdh, E.; Heijne, E. H. M.; Koenig, T.; Llopart, X.; Marchal, J.; Pennicard, D.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.; Zuber, M.

    2016-01-01

    Semiconductor detector readout chips with pulse processing electronics have made possible spectroscopic X-ray imaging, bringing an improvement in the overall image quality and, in the case of medical imaging, a reduction in the X-ray dose delivered to the patient. In this contribution we review the state of the art in semiconductor-detector readout ASICs for spectroscopic X-ray imaging with emphasis on hybrid pixel detector technology. We discuss how some of the key challenges of the technology (such as dealing with high fluxes, maintaining spectral fidelity, power consumption density) are addressed by the various ASICs. In order to understand the fundamental limits of the technology, the physics of the interaction of radiation with the semiconductor detector and the process of signal induction in the input electrodes of the readout circuit are described. Simulations of the process of signal induction are presented that reveal the importance of making use of the small pixel effect to minimize the impact of the slow motion of holes and hole trapping in the induced signal in high-Z sensor materials. This can contribute to preserve fidelity in the measured spectrum with relatively short values of the shaper peaking time. Simulations also show, on the other hand, the distortion in the energy spectrum due to charge sharing and fluorescence photons when the pixel pitch is decreased. However, using recent measurements from the Medipix3 ASIC, we demonstrate that the spectroscopic information contained in the incoming photon beam can be recovered by the implementation in hardware of an algorithm whereby the signal from a single photon is reconstructed and allocated to the pixel with the largest deposition.

  19. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    NASA Astrophysics Data System (ADS)

    Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

    2011-06-01

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: http://www.pi.infn.it/SuperB]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, doi:10.1016/j.nima.2010.05.039]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack ṡ s -1 ṡ cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  20. The pixel detector readout ASIC for the MicroVertex Detector of the PANDA experiment

    NASA Astrophysics Data System (ADS)

    Mazza, G.; Calvo, D.; De Remigis, P.; Kugathasan, T.; Mignone, M.; Rivetti, A.; Toscano, L.; Wheadon, R.

    2013-08-01

    The silicon pixel detector of the PANDA experiment is characterized by both high track density and the absence of a hardware trigger signal, thus leading to a huge amount of data to be acquired and transmitted to the DAQ. In order to cope with such challenging requirements, an ASIC based custom solution for the electronic readout has been chosen. The ASIC, named ToPiX, will provide the time position of each hit and a measure of the charge released with the Time over Threshold (ToT) technique. A reduced scale prototype in a CMOS 0.13 μm technology has been designed and tested. The prototype includes four columns made of 128 pixel cells, four columns of 32 cells and the end of column readout with a 32 cells deep FIFO for each double column. Each cell embeds a charge amplifier with constant current feedback capacitor discharge, a comparator with per cell adjustable threshold, 12-bits leading and trailing edge register for time and ToT measurement and an 8 bits configuration register. All the readout logic has been SEU-hardened by design using either Hamming encoding or triple modular redundancy. The chip has been tested both electrically via a test pulse input and connected to a detector in a beam test.

  1. Prototype AEGIS: A Pixel-Array Readout Circuit for Gamma-Ray Imaging

    PubMed Central

    Barber, H. Bradford; Augustine, F. L.; Furenlid, L.; Ingram, C. M.; Grim, G. P.

    2015-01-01

    Semiconductor detector arrays made of CdTe/CdZnTe are expected to be the main components of future high-performance, clinical nuclear medicine imaging systems. Such systems will require small pixel-pitch and much larger numbers of pixels than are available in current semiconductor-detector cameras. We describe the motivation for developing a new readout integrated circuit, AEGIS, for use in hybrid semiconductor detector arrays, that may help spur the development of future cameras. A basic design for AEGIS is presented together with results of an HSPICE™ simulation of the performance of its unit cell. AEGIS will have a shaper-amplifier unit cell and neighbor pixel readout. Other features include the use of a single input power line with other biases generated on-board, a control register that allows digital control of all thresholds and chip configurations and an output approach that is compatible with list-mode data acquisition. An 8×8 prototype version of AEGIS is currently under development; the full AEGIS will be a 64×64 array with 300 μm pitch. PMID:26345126

  2. Characterization of edgeless pixel detectors coupled to Medipix2 readout chip

    NASA Astrophysics Data System (ADS)

    Kalliopuska, Juha; Tlustos, Lukas; Eränen, Simo; Virolainen, Tuula

    2011-08-01

    VTT has developed a straightforward and fast process to fabricate four-side buttable (edgeless) microstrip and pixel detectors on 6 in. (150 mm) wafers. The process relies on advanced ion implantation to activate the edges of the detector instead of using polysilicon. The article characterizes 150 μm thick n-on-n edgeless pixel detector prototypes with a dead layer at the edge below 1 μm. Electrical and radiation response characterization of 1.4×1.4 cm2 n-on-n edgeless detectors has been done by coupling them to the Medipix2 readout chips. The distance of the detector's physical edge from the pixels was either 20 or 50 μm. The leakage current of flip-chip bonded edgeless Medipix2 detector assembles were measured to be ˜90 nA/cm2 and no breakdown was observed below 110 V. Radiation response characterization includes X-ray tube and radiation source responses. The characterization results show that the detector's response at the pixels close to the physical edge of the detector depend dramatically on the pixel-to-edge distance.

  3. A 15 × 15 single photon avalanche diode sensor featuring breakdown pixels extraction architecture for efficient data readout

    NASA Astrophysics Data System (ADS)

    Yang, Xiao; Zhu, Hongbo; Nakura, Toru; Iizuka, Tetsuya; Asada, Kunihiro

    2016-04-01

    This paper proposes a breakdown pixels extraction architecture for single photon avalanche diode (SPAD) based faint light detection systems. The proposed extraction circuit detects the breakdown pixels and only their addresses are readout. Therefore, under the faint light environment, this SPAD-based sensor significantly improves the data readout efficiency. In addition, since the readout sequence is 4× faster than that of the conventional architecture in the dark condition, the proposed system does not need an independent on-chip event detection circuit that consumes additional area and power. A test-of-concept chip with a 15 × 15 SPAD pixels array was fabricated in a 0.18 µm 1P5M standard CMOS process and pinhole diffraction patterns were successfully captured thanks to the high sensitivity of the SPAD sensor. Under the faint light condition, a high-speed readout is verified by measurement and the robustness of the proposed architecture is successfully demonstrated.

  4. Cryogenic measurements of a digital pixel readout integrated circuit for LWIR

    NASA Astrophysics Data System (ADS)

    Shafique, Atia; Yazici, Melik; Kayahan, Huseyin; Ceylan, Omer; Gurbuz, Yasar

    2015-06-01

    This paper presents and discusses the cryogenic temperature (77K) measurement results of a digital readout integrated circuit (DROIC) for a 32x32 long wavelength infrared pixel sensor array designed in 90nm CMOS process. The chip achieves a signal-to-noise ratio (SNR) of 58dB with a charge handling capacity of 2.03Ge- at cryogenic temperature with 1.3mW of power dissipation. The performance of the readout is discussed in terms of power dissipation, charge handling capacity and SNR considering the fact that the process library models are not optimized for cryogenic temperature operation of the Metal-Oxide-Semiconductor (MOS) devices. These results provide an insight to foresee the design confrontations due to non-optimized device models for cryogenic temperatures particularly for short channel devices

  5. Development of a readout technique for the high data rate BTeV pixel detector at Fermilab

    SciTech Connect

    Bradley K Hall et al.

    2001-11-05

    The pixel detector for the BTeV experiment at Fermilab provides digitized data from approximately 22 million silicon pixel channels. Portions of the detector are six millimeters from the beam providing a substantial hit rate and high radiation dose. The pixel detector data will be employed by the lowest level trigger system for track reconstruction every beam crossing. These requirements impose a considerable constraint on the readout scheme. This paper presents a readout technique that provides the bandwidth that is adequate for high hit rates, minimizes the number of radiation hard components, and satisfies all other design constraints.

  6. FPIX2: A radiation-hard pixel readout chip for BTeV

    SciTech Connect

    David C. Christian et al.

    2000-12-11

    A radiation-hard pixel readout chip, FPIX2, is being developed at Fermilab for the recently approved BTeV experiment. Although designed for BTeV, this chip should also be appropriate for use by CDF and DZero. A short review of this development effort is presented. Particular attention is given to the circuit redesign which was made necessary by the decision to implement FPIX2 using a standard deep-submicron CMOS process rather than an explicitly radiation-hard CMOS technology, as originally planned. The results of initial tests of prototype 0.25{micro} CMOS devices are presented, as are plans for the balance of the development effort.

  7. Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

    SciTech Connect

    Perez-Mendez, V.; Drewery, J.; Hong, W.S.; Jing, T.; Kaplan, S.N.; Lee, H.; Mireshghi, A.

    1994-10-01

    We describe the characteristics of thin (1 {mu}m) and thick (>30 {mu}m) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-rays and {gamma} rays. For x-ray, {gamma} ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For direct detection of charged particles with high resistance to radiation damage, we use the thick p-i-n diode arrays. Deposition techniques using helium dilution, which produce samples with low stress are described. Pixel arrays for flux exposures can be readout by transistor, single diode or two diode switches. Polysilicon charge sensitive pixel amplifiers for single event detection are described. Various applications in nuclear, particle physics, x-ray medical imaging, neutron crystallography, and radionuclide chromatography are discussed.

  8. The cryogenic readout system with GaAs JFETs for multi-pixel cameras

    NASA Astrophysics Data System (ADS)

    Hibi, Y.; Matsuo, H.; Nagata, H.; Ikeda, H.; Fujiwara, M.

    2010-11-01

    Our purpose is to realize a multi-pixel sub-millimeter/terahertz camera with the superconductor - insulator - superconductor photon detectors. These detectors must be cooled below 1 K. Since these detectors have high impedance, signal amplifiers of each pixel must be setting aside of them for precise signal readout. Therefore, it is desirable that the readout system work well even in cryogenic temperature. We selected the n-type GaAs JFETs as cryogenic circuit elements. From our previous studies, the n-type GaAs JFETs have good cryogenic properties even when those power dissipations are low. We have designed several kinds of integration circuits (ICs) and demonstrated their performance at cryogenic temperature. Contents of ICs are following; AC coupled trans-impedance amplifiers, voltage distributors for suppressing input offset voltage of AC coupled CTIAs, multiplexers with sample-and holds, and shift-registers for controlling multiplex timing. The power dissipation of each circuit is 0.5 to 3 micro watts per channel. We also have designed and manufactured 32-channel multi-chip-modules with these ICs. These modules can make 32- channel input photo current signals into one or two serial output voltage signal(s). Size of these is 40mm x 30mm x 2mm and estimated total power dissipation is around 400 micro watts.

  9. A vertically integrated pixel readout device for the Vertex Detector at the International Linear Collider

    SciTech Connect

    Deptuch, Grzegorz; Christian, David; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2008-12-01

    3D-Integrated Circuit technology enables higher densities of electronic circuitry per unit area without the use of nanoscale processes. It is advantageous for mixed mode design with precise analog circuitry because processes with conservative feature sizes typically present lower process dispersions and tolerate higher power supply voltages, resulting in larger separation of a signal from the noise floor. Heterogeneous wafers (different foundries or different process families) may be combined with some 3D integration methods, leading to the optimization of each tier in the 3D stack. Tracking and vertexing in future High-Energy Physics (HEP) experiments involves construction of detectors composed of up to a few billions of channels. Readout electronics must record the position and time of each measurement with the highest achievable precision. This paper reviews a prototype of the first 3D readout chip for HEP, designed for a vertex detector at the International Linear Collider. The prototype features 20 x 20 {micro}m{sup 2} pixels, laid out in an array of 64 x 64 elements and was fabricated in a 3-tier 0.18 {micro}m Fully Depleted SOI CMOS process at MIT-Lincoln Laboratory. The tests showed correct functional operation of the structure. The chip performs a zero-suppressed readout. Successive submissions are planned in a commercial 3D bulk 0.13 {micro}m CMOS process to overcome some of the disadvantages of an FDSOI process.

  10. AC Read-Out Circuits for Single Pixel Characterization of TES Microcalorimeters and Bolometers

    NASA Technical Reports Server (NTRS)

    Gottardi, L.; van de Kuur, J.; Bandler, S.; Bruijn, M.; de Korte, P.; Gao, J. R.; den Hartog, R.; Hijmering, R. A.; Hoevers, H.; Koshropanah, P.; Kilbourne, C.; Lindemann, M. A.; Parra Borderias, M.; Ridder, M.

    2011-01-01

    SRON is developing Frequency Domain Multiplexing (FDM) for the read-out of transition edge sensor (TES) soft x-ray microcalorimeters for the XMS instrument of the International X-ray Observatory and far-infrared bolometers for the SAFARI instrument on the Japanese mission SPICA. In FDM the TESs are AC voltage biased at frequencies from 0.5 to 6 MHz in a superconducting LC resonant circuit and the signal is read-out by low noise and high dynamic range SQUIDs amplifiers. The TES works as an amplitude modulator. We report on several AC bias experiments performed on different detectors. In particular, we discuss the results on the characterization of Goddard Space Flight Center x-ray pixels and SRON bolometers. The paper focuses on the analysis of different read-out configurations developed to optimize the noise and the impedance matching between the detectors and the SQUID amplifier. A novel feedback network electronics has been developed to keep the SQUID in flux locked loop, when coupled to superconducting high Q circuits, and to optimally tune the resonant bias circuit. The achieved detector performances are discussed in view of the instrument requirement for the two space missions.

  11. The charge pump PLL clock generator designed for the 1.56 ns bin size time-to-digital converter pixel array of the Timepix3 readout ASIC

    NASA Astrophysics Data System (ADS)

    Fu, Y.; Brezina, C.; Desch, K.; Poikela, T.; Llopart, X.; Campbell, M.; Massimiliano, D.; Gromov, V.; Kluit, R.; van Beauzekom, M.; Zappon, F.; Zivkovic, V.

    2014-01-01

    Timepix3 is a newly developed pixel readout chip which is expected to be operated in a wide range of gaseous and silicon detectors. It is made of 256 × 256 pixels organized in a square pixel-array with 55 μm pitch. Oscillators running at 640 MHz are distributed across the pixel-array and allow for a highly accurate measurement of the arrival time of a hit. This paper concentrates on a low-jitter phase locked loop (PLL) that is located in the chip periphery. This PLL provides a control voltage which regulates the actual frequency of the individual oscillators, allowing for compensation of process, voltage, and temperature variations.

  12. Design of the low area monotonic trim DAC in 40 nm CMOS technology for pixel readout chips

    NASA Astrophysics Data System (ADS)

    Drozd, A.; Szczygiel, R.; Maj, P.; Satlawa, T.; Grybos, P.

    2014-12-01

    The recent research in hybrid pixel detectors working in single photon counting mode focuses on nanometer or 3D technologies which allow making pixels smaller and implementing more complex solutions in each of the pixels. Usually single pixel in readout electronics for X-ray detection comprises of charge amplifier, shaper and discriminator that allow classification of events occurring at the detector as true or false hits by comparing amplitude of the signal obtained with threshold voltage, which minimizes the influence of noise effects. However, making the pixel size smaller often causes problems with pixel to pixel uniformity and additional effects like charge sharing become more visible. To improve channel-to-channel uniformity or implement an algorithm for charge sharing effect minimization, small area trimming DACs working in each pixel independently are necessary. However, meeting the requirement of small area often results in poor linearity and even non-monotonicity. In this paper we present a novel low-area thermometer coded 6-bit DAC implemented in 40 nm CMOS technology. Monte Carlo simulations were performed on the described design proving that under all conditions designed DAC is inherently monotonic. Presented DAC was implemented in the prototype readout chip with 432 pixels working in single photon counting mode, with two trimming DACs in each pixel. Each DAC occupies the area of 8 μm × 18.5 μm. Measurements and chips' tests were performed to obtain reliable statistical results.

  13. Focal plane array readout integrated circuit with per-pixel analog-to-digital and digital-to-analog conversion

    NASA Astrophysics Data System (ADS)

    Kleinfelder, Stuart; Hottes, Alison; Pease, R. Fabian W.

    2000-07-01

    A pixel array readout integrated circuit (ROIC) containing per-pixel analog-to-digital conversion (ADC) and digital-to- analog conversion (DAC) for infrared detectors is presented with design and test result details. Fabricated in a standard 0.35 micron, 3.3 volt CMOS technology. the prototype consists of a linear array of 64 pixels, containing over 100 transistors per 30 by 30 micron pixel. The 8-bit per-pixel ADC is a Nyquist-rate single-slope design consisting of a three stage comparator and an 8 bit memory. This fully pixel- parallel ADC architecture operates in full-frame 'snapshot' mode and can reach over 1,000 frames per second. Each pixel also contains cascoded current source, globally biased to subtract an identical, fixed amount of current from each pixel in order to remove a common background signal by 'charge skimming.' It operates over more than 3 decades of current cancellation (approximately 10 pA to > 10 nA). As well, each pixel contains a 4 to 6+ bit current-mode DAC, intended to trim-out pixel-to-pixel variations in background current. It consists of 16 unit-cells of switched cascoded current sources per pixel, organized as two separately biased weights and controlled by a 16-bit per-pixel memory. The DAC operates over more than 4 decades of current cancellation (< 10 pA to approximately equals 100 nA) per least significant bit (LSB).

  14. Fully digital pixel readout architecture with a current-mode A/D converter

    NASA Astrophysics Data System (ADS)

    Eshraghian, Kamran; Lachowicz, Stefan W.

    2001-11-01

    Camera-on-a-CMOS chip will be an inevitable component of future intelligent vision systems. However, up till now, the dominant format of data in imaging devices is still analog. The analog photocurrent or sampled voltage is transferred to the ADC via a column or a column/row bus. Moreover, in the active pixel configuration the area occupied by circuitry reduces significantly the fill factor, so that there are heavy constraints imposed on the size of the circuits used. In this paper a concept of back illuminated focal plane is presented. The system consists of two chips bonded face to face using Indium bumps. The top chip, which is the seeing chip, is thinned and the light signal is applied to the bottom surface. The bottom chip is the processing chip and it contains a distributed array of analog-to digital converters. As the seeing chip is fully dedicated to photosensors the fill factor can be increased from 25-40% possible on a single plane to over 95% with two planes. The analog-to-digital converters are algorithmic current-mode converters, where one-bit cell is implemented in the processing area facing one-pixel. Eight such cells are cascaded to form an 8-bit converter. As a result, a fully digital pixel readout is obtained.

  15. SMARTPIX, a photon-counting pixel detector for synchrotron applications based on Medipix3RX readout chip and active edge pixel sensors

    NASA Astrophysics Data System (ADS)

    Ponchut, C.; Collet, E.; Hervé, C.; Le Caer, T.; Cerrai, J.; Siron, L.; Dabin, Y.; Ribois, J. F.

    2015-01-01

    Photon-counting pixel detectors are now routinely used on synchrotron beamlines. Many applications benefit from their noiseless mode of operation, single-pixel point spread function and high frame rates. One of their drawbacks is a discontinuous detection area due to the space-consuming wirebonded connections of the readout chips. Moreover, charge sharing limits their efficiency and their energy discrimination capabilities. In order to overcome these issues the ESRF is developing SMARTPIX,a scalable and versatile pixel detector system with minimized dead areas and with energy resolving capabilities based on the MEDIPIX3RX readout chip. SMARTPIX exploits the through-silicon via technology implemented on MEDIPIX3RX, the active edge sensor processing developed in particular at ADVACAM, and the on-chip analog charge summing feature of MEDIPIX3RX. This article reports on system architecture, unit module structure, data acquisition electronics, target characteristics and applications.

  16. Radiation tolerance of the readout chip for the Phase I upgrade of the CMS pixel detector

    NASA Astrophysics Data System (ADS)

    Hoss, J.; Kästli, H.-C.; Meier, B.; Rohe, T.; Starodumov, A.

    2016-01-01

    For the Phase I upgrade of the CMS pixel detector a new digital readout chip (ROC) has been developed. An important part of the design verification are irradiation studies to ensure sufficient radiation tolerance. The paper summarizes results of the irradiation studies on the final ROC design for the detector layers 2 - 4. Samples have been irradiated with 23 MeV protons to accumulate the expected lifetime dose of 0.5 MGy and up to 1.1 MGy to project the performance of the ROC for layer 1 of the detector. It could be shown that the design is sufficiently radiation tolerant and that all performance parameters stay within their specifications. Additionally, very high doses of up to 4.2 MGy have been tested to explore the limits of the current chip design on 250 nm CMOS technology. The study confirmed that samples irradiated up to the highest dose could be successfully operated with test pulses.

  17. FPIX2: a radiation-hard pixel readout chip for BTeV

    NASA Astrophysics Data System (ADS)

    Christian, D. C.; Appel, J. A.; Cancelo, G.; Hoff, J.; Kwan, S.; Mekkaoui, A.; Yarema, R.; Wester, W.; Zimmermann, S.

    2001-11-01

    A radiation-hard pixel readout chip, FPIX2, is being developed at Fermilab for the recently approved BTeV experiment [A. Kulyavtsev, et al., Proposal for an Experiment to Measure Mixing, CP Violation and Rare Decays in Charm and Beauty Particle Decays at the Fermilab Collider (2000), http://www-btev.fnal.gov/public_documents/btev_proposal/]. Although designed for BTeV, this chip should also be appropriate for use by CDF and DZero. A short review of this development effort is presented. Particular attention is given to the circuit redesign which was made necessary by the decision to implement FPIX2 using a standard deep-submicron CMOS process rather than an explicitly radiation-hard CMOS technology, as originally planned. The results (including the effects of irradiation to ˜33 Mrad) of initial tests of prototype 0.25 μm CMOS devices are presented, as are plans for the balance of the development effort.

  18. Method of acquiring an image from an optical structure having pixels with dedicated readout circuits

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2006-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  19. A parallel plate chamber with pixel read-out for very high data rate

    SciTech Connect

    Angelini, F.; Bellazzini, R.; Brez, A.; Massai, M.; Torquati, M.R.

    1989-02-01

    The authors report the preliminary test results on the performance of a device specially designed for the imaging of X rays at a very high data rate. A prototype having 256 read-out channels has been built and tested in our lab. The detector is a two step parallel plate chamber. The anode is made up of a chess-board of pads, onto which a thin germanium layer is evaporated to restore the electrical continuity. Each individual pad can be read out independently on the back of the board.

  20. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    NASA Technical Reports Server (NTRS)

    Kimble, Randy A.; Pain, B.; Norton, T. J.; Haas, P.; Fisher, Richard R. (Technical Monitor)

    2001-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution for the readout while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest or by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  1. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    NASA Astrophysics Data System (ADS)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

    2015-06-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  2. The detection of single electrons using a Micromegas gas amplification and a MediPix2 CMOS pixel readout

    NASA Astrophysics Data System (ADS)

    Fornaini, A.; Campbell, M.; Chefdeville, M.; Colas, P.; Colijn, A. P.; van der Graaf, H.; Giomataris, Y.; Heijne, E. H. M.; Kluit, P.; Llopart, X.; Schmitz, J.; Timmermans, J.; Visschers, J. L.

    2005-07-01

    By placing a Micromegas gas gain grid on top of a CMOS pixel readout circuit (MediPix2), we developed a device which acts as a pixel-segmented direct anode in gas-filled detectors. With a He/Isobutane 80/20 mixture (capable of achieving gas gain factors up to 20×103) and employing a drift length of 15 mm, signals from radioactive sources and cosmic radiation were measured. Single primary electrons originating from the passage of cosmic muons through the gas volume were detected with an efficiency higher than 90%.

  3. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    NASA Technical Reports Server (NTRS)

    Kimble, Randy A.; Pain, Bedabrata; Norton, Timothy J.; Haas, J. Patrick; Oegerle, William R. (Technical Monitor)

    2002-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest of by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  4. A low power cryogenic 512 × 512-pixel infrared readout integrated circuit with modified MOS device model

    NASA Astrophysics Data System (ADS)

    Zhao, Hongliang; Liu, Xinghui; Xu, Chao

    2013-11-01

    A low power cryogenic readout integrated circuit (ROIC) for 512 × 512-pixel infrared focal plane array (IRFPA) image system, is presented. In order to improve the precision of the circuit simulation at cryogenic temperatures, a modified MOS device model is proposed. The model is based on BSIM3 model, and uses correction parameters to describe carrier freeze-out effect at low temperatures to improve the fitting accuracy for low temperature MOS device simulation. A capacitive trans-impedance amplifier (CTIA) with inherent correlated double sampling (CDS) configuration is employed to realize a high performance readout interfacing circuit in a pixel area of 30 × 30 μm2. Optimized column readout timing and structure are applied to reduce the power consumption. The experimental chip fabricated by a standard 0.35 μm 2P4M CMOS process shows more than 10 MHz readout rate with less than 70 mW power consumption under 3.3 V supply voltage at 77-150 K operated temperatures. And it occupies an area of 18 × 17 mm2.

  5. Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

    NASA Astrophysics Data System (ADS)

    Ceresa, D.; Marchioro, A.; Kloukinas, K.; Kaplon, J.; Bialas, W.; Re, V.; Traversi, G.; Gaioni, L.; Ratti, L.

    2014-11-01

    The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level 1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720 pixels and 1920 strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method is presented with particular attention on the cluster reduction, position encoding and momentum discrimination logic. Concerning the architectural studies, a software test bench capable of reading physics Monte-Carlo generated events has been developed and used to validate the MPA design and to evaluate the MPA performance. The MPA-Light is scheduled to be submitted for fabrication this year and will include the full analog functions and a part of the digital logic of the final version in order to qualify the chosen VLSI technology for the analog front-end, the module assembly and the low voltage digital supply.

  6. A new digital readout integrated circuit (DROIC) with pixel parallel A/D conversion with reduced quantization noise

    NASA Astrophysics Data System (ADS)

    Kayahan, Huseyin; Ceylan, Ömer; Yazici, Melik; Gurbuz, Yasar

    2014-06-01

    This paper presents a digital ROIC for staring type arrays with extending counting method to realize very low quantization noise while achieving a very high charge handling capacity. Current state of the art has shown that digital readouts with pulse frequency method can achieve charge handling capacities higher than 3Ge- with quantization noise higher than 1000e-. Even if the integration capacitance is reduced, it cannot be lower than 1-3 fF due to the parasitic capacitance of the comparator. For achieving a very low quantization noise of 161 electrons in a power efficient way, a new method based on measuring the time to measure the remaining charge on the integration capacitor is proposed. With this approach SNR of low flux pixels are significantly increased while large flux pixels can store electrons as high as 2.33Ge-. A prototype array of 32×32 pixels with 30μm pitch is implemented in 90nm CMOS process technology for verification. Measurement results are given for complete readout.

  7. Method and apparatus of high dynamic range image sensor with individual pixel reset

    NASA Technical Reports Server (NTRS)

    Yadid-Pecht, Orly (Inventor); Pain, Bedabrata (Inventor); Fossum, Eric R. (Inventor)

    2001-01-01

    A wide dynamic range image sensor provides individual pixel reset to vary the integration time of individual pixels. The integration time of each pixel is controlled by column and row reset control signals which activate a logical reset transistor only when both signals coincide for a given pixel.

  8. The ToPiX v4 prototype for the triggerless readout of the PANDA silicon pixel detector

    NASA Astrophysics Data System (ADS)

    Mazza, G.; Calvo, D.; De Remigis, P.; Mignone, M.; Olave, J.; Rivetti, A.; Wheadon, R.; Zotti, L.

    2015-01-01

    ToPiX v4 is the prototype for the readout of the silicon pixel sensors for the Micro Vertex Detector of the PANDA experiment. ToPiX provides position, time and energy measurement of the incoming particles and is designed for the triggerless environment foreseen in PANDA. The prototype includes 640 pixels with a size of 100 × 100 μm2, a 160 MHz time stamp distribution circuit to measure both particle arrival time and released energy (via ToT technique) and the full control logic. The ASIC is designed in a 0.13 μm CMOS technology with SEU protection techniques for the digital parts.

  9. Development of a radiation-hardened SRAM with EDAC algorithm for fast readout CMOS pixel sensors for charged particle tracking

    NASA Astrophysics Data System (ADS)

    Wei, X.; Li, B.; Chen, N.; Wang, J.; Zheng, R.; Gao, W.; Wei, T.; Gao, D.; Hu, Y.

    2014-08-01

    CMOS pixel sensors (CPS) are attractive for use in the innermost particle detectors for charged particle tracking due to their good trade-off between spatial resolution, material budget, radiation hardness, and readout speed. With the requirements of high readout speed and high radiation hardness to total ionizing dose (TID) for particle tracking, fast readout CPS are composed by integrating a data compression block and two SRAM IP cores. However, the radiation hardness of the SRAM IP cores is not as high as that of the other parts in CPS, and thus the radiation hardness of the whole CPS chip is lowered. Especially, when CPS are migrated into 0.18-μm processes, the single event upset (SEU) effects should be also considered besides TID and single event latchup (SEL) effects. This paper presents a radiation-hardened SRAM with enhanced radiation hardness to SEU. An error detection and correction (EDAC) algorithm and a bit-interleaving storage strategy are adopted in the design. The prototype design has been fabricated in a 0.18-μm process. The area of the new SRAM is increased 1.6 times as compared with a non-radiation-hardened SRAM due to the integration of EDAC algorithm and the adoption of radiation hardened layout. The access time is increased from 5 ns to 8 ns due to the integration of EDAC algorithm. The test results indicate that the design satisfy requirements of CPS for charged particle tracking.

  10. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    NASA Astrophysics Data System (ADS)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-05-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

  11. Ultrafast soft x-ray two-dimensional plasma imaging system based on gas electron multiplier detector with pixel readout

    NASA Astrophysics Data System (ADS)

    Pacella, D.; Pizzicaroli, G.; Gabellieri, L.; Leigheb, M.; Bellazzini, R.; Brez, A.; Gariano, G.; Latronico, L.; Lumb, N.; Spandre, G.; Massai, M. M.; Reale, S.

    2001-02-01

    In the present article a new diagnostic device in the soft x-ray range, for magnetic fusion plasmas, is proposed based on a gas electron multiplier detector with 2.5×2.5 cm active area, equipped with a true two-dimensional readout system. The readout printed circuit board, designed for these experiments, has 128 pads. Each pad is 2 mm square and covers a roughly circular area. The operational conditions of the detector are settled to work in the x-ray range 3-15 keV at very high counting rates, with a linear response up to 2 MHz/pixel. This limitation is due to the electronic dead time. Images of a wrench and two pinholes were done at rates of 2.5 MHz/pixel with a powerful x-ray laboratory source showing an excellent imaging capability. Finally preliminary measurements of x-ray emission from a magnetic fusion plasma were performed on the Frascati tokamak upgrade experiment. The system was able to image the plasma with a wide dynamic range (more than a factor of 100), with a sampling frequency of 20 kHz and with counting rates up to 4 MHz/pixel, following the changes of the x-ray plasma emissivity due to additional radio frequency heating. The spatial resolution and imaging properties of this detector have been studied in this work for conditions of high counting rates and high gain, with the detector fully illuminated by very intense x-ray sources (laboratory tube and tokamak plasma).

  12. A 65 nm pixel readout ASIC with quick transverse momentum discrimination capabilities for the CMS Tracker at HL-LHC

    NASA Astrophysics Data System (ADS)

    Ceresa, D.; Kaplon, J.; Francisco, R.; Caratelli, A.; Kloukinas, K.; Marchioro, A.

    2016-01-01

    A readout ASIC for the hybrid pixel detector with the capability of performing quick recognition of particles with high transverse momentum has been designed for the requirements of the CMS Outer Tracker at the High Luminosity LHC . The particle momentum dicrimination capability represents the main challenge for this design together with the low power requirement: the constraint of low mass for the new tracker dictates a total power budget of less than 100 mW/cm2. The choice of a 65 nm CMOS technology has made it possible to satisfy this power requirement despite the fairly large amount of logic necessary to perform the momentum discrimination and the continuous operation at 40 MHz. Several techniques for low power have been used to implement this logic that performs cluster reduction, position offset correction and coordinate encoding. A prototype chip including a large part of the final functionality and the full front-end has been realized and comprises a matrix of 16 by 3 rectangular pixels of 100 μm × 1446 μm, providing 7.65 mm2 of segmented active area. Measurements of the analog front-end characteristics closely match the simulations and confirm the consumption of < 30 μA per pixel. Front-end characterization and irradiation results up to 150 MRad are also reported.

  13. A new digital readout integrated circuit (DROIC) with pixel parallel A/D conversion and reduced quantization noise

    NASA Astrophysics Data System (ADS)

    Kayahan, Hüseyin; Yazici, Melik; Ceylan, Ömer; Gurbuz, Yasar

    2014-03-01

    This paper represents a novel digital readout for infrared focal plane arrays with 2.33 Ge- charge handling capacity while achieving quantization noise of 161 e-. Pixel level A/D conversion has been realized by pulse frequency modulation (PFM) technique supported with a novel method utilizing extended integration that eliminates the requirement for an additional column ADC. Digital pixel operates with two phases; the first phase is as ordinary PFM in charge domain and the second phase is in time domain, allowing the fine quantization and low quantization noise. A 32 × 32 prototype has been manufactured and tested. Measured peak SNR at half well fill is 71 dB with significant SNR improvement for low illuminated pixels due to extremely low quantization noise. 32 × 32 ROIC dissipates only 1.1 mW and the figure of merit for power dissipation is measured to be 465 fJ/LSB, compared to 930 fJ/LSB and 1470 fJ/LSB of the state of the art.

  14. A pixel unit-cell targeting 16 ns resolution and radiation hardness in a column read-out particle vertex detector

    SciTech Connect

    Wright, M.; Millaud, J.; Nygren, D.

    1992-10-01

    A pixel unit cell (PUC) circuit architecture, optimized for a column read out architecture, is reported. Each PUC contains an integrator, active filter, comparator, and optional analog store. The time-over-threshold (TOT) discriminator allows an all-digital interface to the array periphery readout while passing an analog measure of collected charge. Use of (existing) radiation hard processes, to build a detector bump-bonded to a pixel readout array, is targeted. Here, emphasis is on a qualitative explanation of how the unique circuit implementation benefits operation for Super Collider (SSC) detector application.

  15. Single-event upset tests on the readout electronics for the pixel detectors of the PANDA experiment

    NASA Astrophysics Data System (ADS)

    Mazza, G.; Balossino, I.; Calvo, D.; De Mori, F.; De Remigis, P.; Filippi, A.; Marcello, S.; Mignone, M.; Wheadon, R.; Zotti, L.; Candelori, A.; Mattiazzo, S.; Silvestrin, L.

    2014-01-01

    The Silicon Pixel Detector (SPD) of the future PANDA experiment is the closest one to the interaction point and therefore the sensor and its electronics are the most exposed to radiation. The Total Ionizing Dose (TID) issue has been addressed by the use of a deep-submicron technology (CMOS 0.13 μm) for the readout ASICs. While this technology is very effective in reducing radiation induced oxide damage, it is also more sensitive to Single Event Upset (SEU) effects due to their extremely reduced dimensions. This problem has to be addressed at the circuit level and generally leads to an area penalty. Several techniques have been proposed in literature with different trade-off between level of protection and cell size. A subset of these techniques has been implemented in the PANDA SPD ToPiX readout ASIC prototypes, ranging from DICE cells to triple redundancy. Two prototypes have been tested with different ion beams at the INFN-LNL facility in order to measure the SEU cross section. Comparative results of the SEU test will be shown, together with an analysis of the SEU tolerance of the various protection schemes and future plans for the SEU protection strategy which will be implemented in the next ToPiX prototype.

  16. Low-Power CMOS Laser Doppler Imaging Using Non-CDS Pixel Readout and 13.6-bit SAR ADC.

    PubMed

    Chen, Denis Guangyin; Law, Man-Kay; Lian, Yong; Bermak, Amine

    2016-02-01

    Laser Doppler imaging (LDI) measures particle flows such as blood perfusion by sensing their Doppler shift. This paper is the first of its kind in analyzing the effect of circuit noise on LDI precision which is distinctively different from conventional imaging. Based on this result, it presents a non-correlated-double-sampling (non-CDS) pixel readout scheme along with a high-resolution successive-approximation-register (SAR) analog-to-digital-converter (ADC) with 13.6b effective resolution (ER). Measurement results from the prototype chip in 0.18 μm technology confirm the theoretical analysis and show that the two techniques improve LDI sensing precision by 6.9 dB and 4.4 dB (compared to a 10b ADC) respectively without analog pre-amplification. The sensor's ADC occupies 518 μm×84 μm and is suitable for fast column parallel readout. Its differential non-linearity (DNL), integral non-linearity (INL), and input referred noise are +3.0/-2.8 LSB, +24/-17 LSB, and 110 μVrms respectively, leading to a Figure-of-Merit (FoM) of 23 fJ/state which makes it one of the most energy efficient image sensor ADCs and an order of magnitude better than the best reported LDI system using commercial high-speed image sensors. PMID:25532189

  17. Readout cross-talk for alpha-particle measurements in a pixelated sensor system

    NASA Astrophysics Data System (ADS)

    Norlin, B.; Reza, S.; Krapohl, D.; Fröjdh, E.; Thungström, G.

    2015-05-01

    Simulations in Medici are performed to quantify crosstalk and charge sharing in a hybrid pixelated silicon detector. Crosstalk and charge sharing degrades the spatial and spectral resolution of single photon processing X-ray imaging systems. For typical medical X-ray imaging applications, the process is dominated by charge sharing between the pixels in the sensor. For heavier particles each impact generates a large amount of charge and the simulation seems to over predict the charge collection efficiency. This indicates that some type of non modelled degradation of the charge transport efficiency exists, like the plasma effect where the plasma might shield the generated charges from the electric field and hence distorts the charge transport process. Based on the simulations it can be reasoned that saturation of the amplifiers in the Timepix system might generate crosstalk that increases the charge spread measured from ion impact on the sensor.

  18. Development of high data readout rate pixel module and detector hybridization at Fermilab

    SciTech Connect

    Sergio Zimmermann et al.

    2001-03-20

    This paper describes the baseline design and a variation of the pixel module to handle the data rate required for the BTeV experiment at Fermilab. The present prototype has shown good electrical performance characteristics. Indium bump bonding is proven to be capable of successful fabrication at 50 micron pitch on real detectors. For solder bumps at 50 micron pitch, much better results have been obtained with the fluxless PADS processed detectors. The results are adequate for our needs and our tests have validated it as a viable technology.

  19. First look at the beam test results of the FPIX2 readout chip for the BTeV silicon pixel detector

    SciTech Connect

    Uplegger, L.; Appel, J.A.; Artuso, M.; Cardoso, G.; Cease, H.P.; Chiodini, G.; Christian, D.C.; Cinabro, D.A.; Coluccia, R.; Hoff, J.; Kwan, S.; Magni, S.; Mekkaoui, A.; Menasce, D.; Newsom, C.; Papavassiliou, V.; Schreiner, A.; Turqueti, M.A.; Yarema, R.; Wang, J.C.; /Fermilab /Syracuse U. /INFN, Lecce /Wayne State U. /INFN, Milan /Iowa U. /New Mexico State U.

    2004-11-01

    High energy and nuclear physics experiments need tracking devices with excellent spatial precision and readout speed in the face of ever-higher track densities and increased radiation environments. The new generation of hybrid pixel detectors (arrays of silicon diodes bump bonded to arrays of front-end electronic cells) is a technology able to meet these challenges. We report the first results of the BTeV silicon pixel detector beam test carried out at Fermilab in summer 2004. Tests were performed using a 120 GeV/c proton beam incident on a 6 planes pixel detector telescope. The last prototype developed for the BTeV experiment (FPIX2) is tested in the middle of the telescope. There is no external trigger and events were built using the time-stamp information provided by the readout chips.

  20. Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners.

    PubMed

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

    2013-08-01

    VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-triggered pixel which will be connected to a global time-to-digital converter (TDC) with 1 ns resolution will provide the event's time stamp. The analog part of the readout chain and the ADC have been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and characterized with an external test pulse. The power consumption of these parts is 200 μW from a 2.5 V supply. It offers 4 switchable gains from ±10 mV/fC to ±40 mV/fC and an input charge dynamic range of up to ±70 fC for the minimum gain for both polarities. Based on noise measurements, the expected equivalent noise charge (ENC) is 65 e(-) RMS at room temperature. PMID:24187382

  1. Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners

    PubMed Central

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

    2013-01-01

    VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-triggered pixel which will be connected to a global time-to-digital converter (TDC) with 1 ns resolution will provide the event’s time stamp. The analog part of the readout chain and the ADC have been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and characterized with an external test pulse. The power consumption of these parts is 200 μW from a 2.5 V supply. It offers 4 switchable gains from ±10 mV/fC to ±40 mV/fC and an input charge dynamic range of up to ±70 fC for the minimum gain for both polarities. Based on noise measurements, the expected equivalent noise charge (ENC) is 65 e− RMS at room temperature. PMID:24187382

  2. The RD53 collaboration's SystemVerilog-UVM simulation framework and its general applicability to design of advanced pixel readout chips

    NASA Astrophysics Data System (ADS)

    Marconi, S.; Conti, E.; Placidi, P.; Christiansen, J.; Hemperek, T.

    2014-10-01

    The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger latency buffering section of pixel chips. A fully shared architecture and a distributed one have been described at behavioral level and simulated; the resulting memory occupancy statistics and hit loss rates have subsequently been compared.

  3. A Pixel Readout Chip in 40 nm CMOS Process for High Count Rate Imaging Systems with Minimization of Charge Sharing Effects

    SciTech Connect

    Maj, Piotr; Grybos, P.; Szczgiel, R.; Kmon, P.; Drozd, A.; Deptuch, G.

    2013-11-07

    We present a prototype chip in 40 nm CMOS technology for readout of hybrid pixel detector. The prototype chip has a matrix of 18x24 pixels with a pixel pitch of 100 m. It can operate both in single photon counting (SPC) mode and in C8P1 mode. In SPC the measured ENC is 84 e rms (for the peaking time of 48 ns), while the effective offset spread is below 2 mV rms. In the C8P1 mode the chip reconstructs full charge deposited in the detector, even in the case of charge sharing, and it identifies a pixel with the largest charge deposition. The chip architecture and preliminary measurements are reported.

  4. Development of two-dimensional multiwire-type neutron detector system with individual line readout and optical signal transmission

    NASA Astrophysics Data System (ADS)

    Toh, K.; Nakamura, T.; Sakasai, K.; Soyama, K.; Hino, M.; Kitaguchi, M.; Yamagishi, H.

    2013-10-01

    A multiwire-type two-dimensional neutron detector system with a sensitive area of 128×128 mm2 is developed for use in the Materials and Life Science Experimental Facility at the Japan Proton Accelerator Research Complex. The system can achieve a short response time and high spatial resolution using the individual line readout method. Optical devices have been incorporated in the system for long-distance signal transmission and insulation between a detector head in the neutron shielding and signal processing circuits in the data acquisition room. The detector system exhibits a pulse-pair resolution of 1 μs, an average spatial resolution of less than 2 mm full width at half-maximum in the sensitive region, and a two-dimensional homogeneity of 8.3% in all pixels.

  5. Enabling more capability within smaller pixels: advanced wafer-level process technologies for integration of focal plane arrays with readout electronics

    NASA Astrophysics Data System (ADS)

    Temple, Dorota S.; Vick, Erik P.; Lueck, Matthew R.; Malta, Dean; Skokan, Mark R.; Masterjohn, Christopher M.; Muzilla, Mark S.

    2014-05-01

    Over the past decade, the development of infrared focal plane arrays (FPAs) has seen two trends: decreasing of the pixel size and increasing of signal-processing capability at the device level. Enabling more capability within smaller pixels can be achieved through the use of advanced wafer-level processes for the integration of FPAs with silicon (Si) readout integrated circuits (ROICs). In this paper, we review the development of these wafer-level integration technologies, highlighting approaches in which the infrared sensor is integrated with three-dimensional ROIC stacks composed of multiple layers of Si circuitry interconnected using metal-filled through-silicon vias.

  6. Submillisecond X-ray photon correlation spectroscopy from a pixel array detector with fast dual gating and no readout dead-time.

    PubMed

    Zhang, Qingteng; Dufresne, Eric M; Grybos, Pawel; Kmon, Piotr; Maj, Piotr; Narayanan, Suresh; Deptuch, Grzegorz W; Szczygiel, Robert; Sandy, Alec

    2016-05-01

    Small-angle scattering X-ray photon correlation spectroscopy (XPCS) studies were performed using a novel photon-counting pixel array detector with dual counters for each pixel. Each counter can be read out independently from the other to ensure there is no readout dead-time between the neighboring frames. A maximum frame rate of 11.8 kHz was achieved. Results on test samples show good agreement with simple diffusion. The potential of extending the time resolution of XPCS beyond the limit set by the detector frame rate using dual counters is also discussed. PMID:27140146

  7. A digital 25 µm pixel-pitch uncooled amorphous silicon TEC-less VGA IRFPA with massive parallel Sigma-Delta-ADC readout

    NASA Astrophysics Data System (ADS)

    Weiler, Dirk; Russ, Marco; Würfel, Daniel; Lerch, Renee; Yang, Pin; Bauer, Jochen; Vogt, Holger

    2010-04-01

    This paper presents an advanced 640 x 480 (VGA) IRFPA based on uncooled microbolometers with a pixel-pitch of 25μm developed by Fraunhofer-IMS. The IRFPA is designed for thermal imaging applications in the LWIR (8 .. 14μm) range with a full-frame frequency of 30 Hz and a high sensitivity with NETD < 100 mK @ f/1. A novel readout architecture which utilizes massively parallel on-chip Sigma-Delta-ADCs located under the microbolometer array results in a high performance digital readout. Sigma-Delta-ADCs are inherently linear. A high resolution of 16 bit for a secondorder Sigma-Delta-modulator followed by a third-order digital sinc-filter can be obtained. In addition to several thousand Sigma-Delta-ADCs the readout circuit consists of a configurable sequencer for controlling the readout clocking signals and a temperature sensor for measuring the temperature of the IRFPA. Since packaging is a significant part of IRFPA's price Fraunhofer-IMS uses a chip-scaled package consisting of an IR-transparent window with antireflection coating and a soldering frame for maintaining the vacuum. The IRFPAs are completely fabricated at Fraunhofer-IMS on 8" CMOS wafers with an additional surface micromachining process. In this paper the architecture of the readout electronics, the packaging, and the electro-optical performance characterization are presented.

  8. Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data

    NASA Astrophysics Data System (ADS)

    Conti, E.; Marconi, S.; Christiansen, J.; Placidi, P.; Hemperek, T.

    2016-01-01

    The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified.

  9. Uncooled digital IRFPA-family with 17μm pixel-pitch based on amorphous silicon with massively parallel Sigma-Delta-ADC readout

    NASA Astrophysics Data System (ADS)

    Weiler, D.; Hochschulz, F.; Würfel, D.; Lerch, R.; Geruschke, T.; Wall, S.; Heß, J.; Wang, Q.; Vogt, H.

    2014-06-01

    This paper presents the results of an advanced digital IRFPA-family developed by Fraunhofer IMS. The IRFPA-family compromises the two different optical resolutions VGA (640 ×480 pixel) and QVGA (320 × 240 pixel) by using a pin-compatible detector board. The uncooled IRFPAs are designed for thermal imaging applications in the LWIR (8 .. 14μm) range with a full-frame frequency of 30 Hz and a high thermal sensitivity. The microbolometer with a pixel-pitch of 17μm consists of amorphous silicon as the sensing layer. By scaling and optimizing our previous microbolometer technology with a pixel-pitch of 25μm we enhance the thermal sensitivity of the microbolometer. The microbolometers are read out by a novel readout architecture which utilizes massively parallel on-chip Sigma-Delta-ADCs. This results in a direct digital conversion of the resistance change of the microbolometer induced by incident infrared radiation. To reduce production costs a chip-scale-package is used as vacuum package. This vacuum package consists of an IR-transparent window with an antireflection coating and a soldering frame which is fixed by a wafer-to-chip process directly on top of the CMOS-substrate. The chip-scale-package is placed onto a detector board by a chip-on-board technique. The IRFPAs are completely fabricated at Fraunhofer IMS on 8" CMOS wafers with an additional surface micromachining process. In this paper the architecture of the readout electronics, the packaging, and the electro-optical performance characterization are presented.

  10. Commissioning of the read-out driver (ROD) card for the ATLAS IBL detector and upgrade studies for the pixel Layers 1 and 2

    NASA Astrophysics Data System (ADS)

    Balbi, G.; Bindi, M.; Falchieri, D.; Gabrielli, A.; Travaglini, R.; Chen, S.-P.; Hsu, S.-C.; Hauck, S.; Kugel, A.

    2014-11-01

    The higher luminosity that is expected for the LHC after future upgrades will require better performance by the data acquisition system, especially in terms of throughput. In particular, during the first shutdown of the LHC collider in 2013/14, the ATLAS Pixel Detector will be equipped with a fourth layer - the Insertable B-Layer or IBL - located at a radius smaller than the present three layers. Consequently, a new front end ASIC (FE-I4) was designed as well as a new off-detector chain. The latter is composed mainly of two 9U-VME cards called the Back-Of-Crate (BOC) and Read-Out Driver (ROD). The ROD is used for data and event formatting and for configuration and control of the overall read-out electronics. After some prototyping samples were completed, a pre-production batch of 5 ROD cards was delivered with the final layout. Actual production of another 15 ROD cards is ongoing in Fall 2013, and commissioning is scheduled in 2014. Altogether 14 cards are necessary for the 14 staves of the IBL detector, one additional card is required by the Diamond Beam Monitor (DBM), and additional spare ROD cards will be produced for a total of 20 boards. This paper describes some integration tests that were performed and our plan to test the production of the ROD cards. Slices of the IBL read-out chain have been instrumented, and ROD performance is verified on a test bench mimicking a small-sized final setup. This contribution will report also one view on the possible adoption of the IBL ROD for ATLAS Pixel Detector Layer 2 (firstly) and, possibly, in the future, for Layer 1.

  11. An integrated readout system for drift chambers: the application of monolithic CMOS pixel sensors as segmented direct anode

    NASA Astrophysics Data System (ADS)

    Campbell, M.; Heijne, E. H. M.; Llopart, X.; Chefdeville, M.; Colas, P.; Giomataris, Y.; Colijn, A. P.; Fornaini, A.; van der Graaf, H.; Kluit, P.; Timmermans, J.; Visschers, J. L.; Schmitz, J.

    2006-01-01

    A small TPC has been read out by means of a MediPix2 readout chip as direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/Isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. We recorded many frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays.

  12. Detection of single electrons by means of a Micromegas-covered MediPix2 pixel CMOS readout circuit

    NASA Astrophysics Data System (ADS)

    Campbell, M.; Chefdeville, M.; Colas, P.; Colijn, A. P.; Fornaini, A.; Giomataris, Y.; van der Graaf, H.; Heijne, E. H. M.; Kluit, P.; Llopart, X.; Schmitz, J.; Timmermans, J.; Visschers, J. L.

    2005-03-01

    A small drift chamber was read out by means of a MediPix2 readout chip as a direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. We recorded many frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays.

  13. GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

    NASA Astrophysics Data System (ADS)

    Campbell, M.; Heijne, E. H. M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A. P.; Fornaini, A.; van der Graaf, H.; Kluit, P.; Timmermans, J.; Visschers, J. L.; Schmitz, J.

    2006-05-01

    A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1 mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

  14. ``The Read-Out Driver'' ROD card for the Insertable B-layer (IBL) detector of the ATLAS experiment: commissioning and upgrade studies for the Pixel Layers 1 and 2

    NASA Astrophysics Data System (ADS)

    Balbi, G.; Bindi, M.; Chen, S. P.; Falchieri, D.; Flick, T.; Gabrielli, A.; Hauck, S.; Hsu, S. C.; Kretz, M.; Kugel, A.; Lama, L.; Morettini, P.; Travaglini, R.; Wensing, M.

    2014-01-01

    The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, called the Insertable B-layer (IBL). The IBL read-out system will be equipped with new electronics. The Readout-Driver card (ROD) is a VME board devoted to data processing, configuration and control. A pre-production batch has been delivered for testing with instrumented slices of the overall acquisition chain, aiming to finalize strategies for system commissioning. In this paper system setups and results will be described, as well as preliminary studies on changes needed to adopt the ROD for the ATLAS Pixel Layers 1 and 2.

  15. Application Of A 1024X1024 Pixel Digital Image Store, With Pulsed Progressive Readout Camera, For Gastro-Intestinal Radiology

    NASA Astrophysics Data System (ADS)

    Edmonds, E. W.; Rowlands, J. A.; Hynes, D. M.; Toth, B. D.; Porter, A. J.

    1986-06-01

    We discuss the applicability of intensified x-ray television systems for general digital radiography and the requirements necessary for physician acceptance. Television systems for videofluorography when limited to conventional fluoroscopic exposure rates (25uR/s to x-ray intensifier), with particular application to the gastro-intestinal system, all suffer from three problems which tend to degrade the image: (a) lack of resolution, (b) noise, and (c) patient movement. The system to be described in this paper addresses each of these problems. Resolution is that provided by the use of a 1024 x 1024 pixel frame store combined with a 1024 line video camera and a 10"/6" x-ray image intensifier. Problems of noise and sensitivity to patient movement are overcome by using a short but intense burst of radiation to produce the latent image, which is then read off the video camera in a progressive fashion and placed in the digital store. Hard copy is produced from a high resolution multiformat camera, or a high resolution digital laser camera. It is intended that this PPR system will replace the 100mm spot film camera in present use, and will provide information in digital form for further processing and eventual digital archiving.

  16. LCD panel characterization by measuring full Jones matrix of individual pixels using polarization-sensitive digital holographic microscopy.

    PubMed

    Park, Jongchan; Yu, Hyeonseung; Park, Jung-Hoon; Park, YongKeun

    2014-10-01

    We present measurements of the full Jones matrix of individual pixels in a liquid-crystal display (LCD) panel. Employing a polarization-sensitive digital holographic microscopy based on Mach-Zehnder interferometry, the complex amplitudes of the light passing through individual LCD pixels are precisely measured with respect to orthogonal bases of polarization states, from which the full Jones matrix components of individual pixels are obtained. We also measure the changes in the Jones matrix of individual LCD pixels with respect to an applied bias. In addition, the complex optical responses of a LCD panel with respect to arbitrary polarization states of incident light were characterized from the measured Jones matrix. PMID:25322005

  17. Back-side-illuminated 1.4μm pixel with a vertically pinned photodiode based on hole collection, PMOS readout chain and active side-wall passivation

    NASA Astrophysics Data System (ADS)

    Mamdy, Bastien; Roy, François; Ahmed, Nayera; Lu, Guo-Neng

    2015-10-01

    To further improve the characteristics of CMOS image sensors (CIS), we propose a back-side illuminated pixel integrating a vertically pinned and P-type photodiode (which collects holes) and PMOS readout circuitry. It has been designed in a 1.4μm-pitch, a two-transistor (2T) shared readout architecture and fabricated in a combined 65nm and 90nm technology. The vertically pinned photodiode takes up almost the entire volume of the pixel, allowing a full well capacity (FWC) exceeding 7000h+. With a conversion factor around 120μV/h+, the output swing approaching 1V is achieved on the column voltage. The pixel also integrates capacitive deep trench isolation (CDTI) to tackle electrical and optical crosstalk issues. The effective passivation of trench interface by CDTI bias control is demonstrated for a hole-based pixel. As expected, PMOS transistors have much lower trapping noise compared to NMOS counterparts. The PMOS source follower has an average temporal noise of 195μV, mainly dominated by thermal noise contribution.

  18. Serial Pixel Analog-to-Digital Converter

    SciTech Connect

    Larson, E D

    2010-02-01

    This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator. The resulting encoded pixel data is then decoded into a standard hexadecimal format before storage. The high-speed serial pixel ADC concept is based on the single-slope integrating pixel ADC architecture. Previous work has described a massively parallel pixel readout of a similar architecture. The serial ADC connection is similar to the state-of-the art method with the exception that the pixel ADC register is a shift register and the data path is a single bit. A state-of-the-art individual-pixel ADC uses a single-slope charge integration converter architecture with integral registers and “one-hot” counters. This implies that parallel data bits are routed among the counter and the individual on-chip pixel ADC registers. The data path bit-width to the pixel is therefore equivalent to the pixel ADC bit resolution.

  19. Hit efficiency study of CMS prototype forward pixel detectors

    SciTech Connect

    Kim, Dongwook; /Johns Hopkins U.

    2006-01-01

    In this paper the author describes the measurement of the hit efficiency of a prototype pixel device for the CMS forward pixel detector. These pixel detectors were FM type sensors with PSI46V1 chip readout. The data were taken with the 120 GeV proton beam at Fermilab during the period of December 2004 to February 2005. The detectors proved to be highly efficient (99.27 {+-} 0.02%). The inefficiency was primarily located near the corners of the individual pixels.

  20. Test-beam results of a silicon pixel detector with Time-over-Threshold read-out having ultra-precise time resolution

    NASA Astrophysics Data System (ADS)

    Aglieri Rinella, G.; Cortina Gil, E.; Fiorini, M.; Kaplon, J.; Kluge, A.; Marchetto, F.; Albarran, M. E. Martin; Morel, M.; Noy, M.; Perktold, L.; Tiuraniem, S.; Velghe, B.

    2015-12-01

    A time-tagging hybrid silicon pixel detector developed for beam tracking in the NA62 experiment has been tested in a dedicated test-beam at CERN with 10 GeV/c hadrons. Measurements include time resolution, detection efficiency and charge sharing between pixels, as well as effects due to bias voltage variations. A time resolution of less than 150 ps has been measured with a 200 μm thick silicon sensor, using an on-pixel amplifier-discriminator and an end-of-column DLL-based time-to-digital converter.

  1. Electrical-contact-free readout of the response of superconductive bolometer arrays using thermal cross talk.

    PubMed

    Bozbey, Ali; Fardmanesh, Mehdi; Schubert, Juergen; Banzet, Marko

    2006-10-01

    We utilized and investigated the unique dependence of the magnitude and phase of the response on thermal cross talk between bolometer pixels in an array to measure the response of the devices through fewer monitoring devices. We show the feasibility of the proposed readout technique by use of two source pixels in an array, as the image-mapping devices, and one optically shielded pixel as the readout device. While the sensing pixels were electrical-contact free, the readout device was current biased in 4-probe current-bias configuration. Both the phase and the magnitude of the response due to the cross talk in the array were found to be strongly dependent on the modulation frequency and the distance between the sensing and the readout pixels. A series of measurements were designed to extract the response of each single-sensing pixel. By combining the measured data, the response of individual pixels could be extracted through the interpolation of the mapped responses. PMID:16983408

  2. TES Detector Noise Limited Readout Using SQUID Multiplexers

    NASA Technical Reports Server (NTRS)

    Staguhn, J. G.; Benford, D. J.; Chervenak, J. A.; Khan, S. A.; Moseley, S. H.; Shafer, R. A.; Deiker, S.; Grossman, E. N.; Hilton, G. C.; Irwin, K. D.

    2004-01-01

    The availability of superconducting Transition Edge Sensors (TES) with large numbers of individual detector pixels requires multiplexers for efficient readout. The use of multiplexers reduces the number of wires needed between the cryogenic electronics and the room temperature electronics and cuts the number of required cryogenic amplifiers. We are using an 8 channel SQUID multiplexer to read out one-dimensional TES arrays which are used for submillimeter astronomical observations. We present results from test measurements which show that the low noise level of the SQUID multiplexers allows accurate measurements of the TES Johnson noise, and that in operation, the readout noise is dominated by the detector noise. Multiplexers for large number of channels require a large bandwidth for the multiplexed readout signal. We discuss the resulting implications for the noise performance of these multiplexers which will be used for the readout of two dimensional TES arrays in next generation instruments.

  3. Backside-illuminated, high-QE, 3e- RoN, fast 700fps, 1760x1680 pixels CMOS imager for AO with highly parallel readout

    NASA Astrophysics Data System (ADS)

    Downing, Mark; Kolb, Johann; Baade, Dietrich; Balard, Philippe; Dierickx, Bart; Defernez, Arnaud; Dupont, Benoit; Feautrier, Philippe; Finger, Gert; Fryer, Martin; Gach, Jean-Luc; Guillaume, Christian; Hubin, Norbert; Iwert, Olaf; Jerram, Paul; Jorden, Paul; Pike, Andrew; Pratlong, Jerome; Reyes, Javier; Stadler, Eric; Walker, Andrew

    2012-07-01

    The success of the next generation of instruments for 8 to 40-m class telescopes will depend upon improving the image quality (correcting the distortion caused by atmospheric turbulence) by exploiting sophisticated Adaptive Optics (AO) systems. One of the critical components of the AO systems for the E-ELT has been identified as the Laser/Natural Guide Star (LGS/NGS) WaveFront Sensing (WFS) detector. The combination of large format, 1760x1680 pixels to finely sample (84x84 sub-apertures) the wavefront and the spot elongation of laser guide stars, fast frame rate of 700 (up to 1000) frames per second, low read noise (< 3e-), and high QE (> 90%) makes the development of such a device extremely challenging. Design studies by industry concluded that a thinned and backside-illuminated CMOS Imager as the most promising technology. This paper describes the multi-phased development plan that will ensure devices are available on-time for E-ELT first-light AO systems; the different CMOS pixel architectures studied; measured results of technology demonstrators that have validated the CMOS Imager approach; the design explaining the approach of massive parallelism (70,000 ADCs) needed to achieve low noise at high pixel rates of ~3 Gpixel/s ; the 88 channel LVDS data interface; the restriction that stitching (required due to the 5x6cm size) posed on the design and the solutions found to overcome these limitations. Two generations of the CMOS Imager will be built: a pioneering quarter sized device of 880x840 pixels capable of meeting first light needs of the E-ELT called NGSD (Natural Guide Star Detector); followed by the full size device, the LGSD (Laser Guide Star Detector). Funding sources: OPTICON FP6 and FP7 from European Commission and ESO.

  4. Large area CMOS bio-pixel array for compact high sensitive multiplex biosensing.

    PubMed

    Sandeau, Laure; Vuillaume, Cassandre; Contié, Sylvain; Grinenval, Eva; Belloni, Federico; Rigneault, Hervé; Owens, Roisin M; Fournet, Margaret Brennan

    2015-02-01

    A novel CMOS bio-pixel array which integrates assay substrate and assay readout is demonstrated for multiplex and multireplicate detection of a triplicate of cytokines with single digit pg ml(-1) sensitivities. Uniquely designed large area bio-pixels enable individual assays to be dedicated to and addressed by single pixels. A capability to simultaneously measure a large number of targets is provided by the 128 available pixels. Chemiluminescent assays are carried out directly on the pixel surface which also detects the emitted chemiluminescent photons, facilitating a highly compact sensor and reader format. The high sensitivity of the bio-pixel array is enabled by the high refractive index of silicon based pixels. This in turn generates a strong supercritical angle luminescence response significantly increasing the efficiency of the photon collection over conventional farfield modalities. PMID:25490928

  5. High-flux ptychographic imaging using the new 55 µm-pixel detector ‘Lambda’ based on the Medipix3 readout chip

    SciTech Connect

    Wilke, R. N. Wallentin, J.; Osterhoff, M.; Pennicard, D.; Zozulya, A.; Sprung, M.; Salditt, T.

    2014-11-01

    The Large Area Medipix-Based Detector Array (Lambda) has been used in a ptychographic imaging experiment on solar-cell nanowires. By using a semi-transparent central stop, the high flux density provided by nano-focusing Kirkpatrick–Baez mirrors can be fully exploited for high-resolution phase reconstructions. Suitable detection systems that are capable of recording high photon count rates with single-photon detection are instrumental for coherent X-ray imaging. The new single-photon-counting pixel detector ‘Lambda’ has been tested in a ptychographic imaging experiment on solar-cell nanowires using Kirkpatrick–Baez-focused 13.8 keV X-rays. Taking advantage of the high count rate of the Lambda and dynamic range expansion by the semi-transparent central stop, a high-dynamic-range diffraction signal covering more than seven orders of magnitude has been recorded, which corresponds to a photon flux density of about 10{sup 5} photons nm{sup −2} s{sup −1} or a flux of ∼10{sup 10} photons s{sup −1} on the sample. By comparison with data taken without the semi-transparent central stop, an increase in resolution by a factor of 3–4 is determined: from about 125 nm to about 38 nm for the nanowire and from about 83 nm to about 21 nm for the illuminating wavefield.

  6. PIXEL PUSHER

    NASA Technical Reports Server (NTRS)

    Stanfill, D. F.

    1994-01-01

    Pixel Pusher is a Macintosh application used for viewing and performing minor enhancements on imagery. It will read image files in JPL's two primary image formats- VICAR and PDS - as well as the Macintosh PICT format. VICAR (NPO-18076) handles an array of image processing capabilities which may be used for a variety of applications including biomedical image processing, cartography, earth resources, and geological exploration. Pixel Pusher can also import VICAR format color lookup tables for viewing images in pseudocolor (256 colors). This program currently supports only eight bit images but will work on monitors with any number of colors. Arbitrarily large image files may be viewed in a normal Macintosh window. Color and contrast enhancement can be performed with a graphical "stretch" editor (as in contrast stretch). In addition, VICAR images may be saved as Macintosh PICT files for exporting into other Macintosh programs, and individual pixels can be queried to determine their locations and actual data values. Pixel Pusher is written in Symantec's Think C and was developed for use on a Macintosh SE30, LC, or II series computer running System Software 6.0.3 or later and 32 bit QuickDraw. Pixel Pusher will only run on a Macintosh which supports color (whether a color monitor is being used or not). The standard distribution medium for this program is a set of three 3.5 inch Macintosh format diskettes. The program price includes documentation. Pixel Pusher was developed in 1991 and is a copyrighted work with all copyright vested in NASA. Think C is a trademark of Symantec Corporation. Macintosh is a registered trademark of Apple Computer, Inc.

  7. Compact all-CMOS spatiotemporal compressive sensing video camera with pixel-wise coded exposure.

    PubMed

    Zhang, Jie; Xiong, Tao; Tran, Trac; Chin, Sang; Etienne-Cummings, Ralph

    2016-04-18

    We present a low power all-CMOS implementation of temporal compressive sensing with pixel-wise coded exposure. This image sensor can increase video pixel resolution and frame rate simultaneously while reducing data readout speed. Compared to previous architectures, this system modulates pixel exposure at the individual photo-diode electronically without external optical components. Thus, the system provides reduction in size and power compare to previous optics based implementations. The prototype image sensor (127 × 90 pixels) can reconstruct 100 fps videos from coded images sampled at 5 fps. With 20× reduction in readout speed, our CMOS image sensor only consumes 14μW to provide 100 fps videos. PMID:27137331

  8. Improved Signal Chains for Readout of CMOS Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Hancock, Bruce; Cunningham, Thomas

    2009-01-01

    An improved generic design has been devised for implementing signal chains involved in readout from complementary metal oxide/semiconductor (CMOS) image sensors and for other readout integrated circuits (ICs) that perform equivalent functions. The design applies to any such IC in which output signal charges from the pixels in a given row are transferred simultaneously into sampling capacitors at the bottoms of the columns, then voltages representing individual pixel charges are read out in sequence by sequentially turning on column-selecting field-effect transistors (FETs) in synchronism with source-follower- or operational-amplifier-based amplifier circuits. The improved design affords the best features of prior source-follower-and operational- amplifier-based designs while overcoming the major limitations of those designs. The limitations can be summarized as follows: a) For a source-follower-based signal chain, the ohmic voltage drop associated with DC bias current flowing through the column-selection FET causes unacceptable voltage offset, nonlinearity, and reduced small-signal gain. b) For an operational-amplifier-based signal chain, the required bias current and the output noise increase superlinearly with size of the pixel array because of a corresponding increase in the effective capacitance of the row bus used to couple the sampled column charges to the operational amplifier. The effect of the bus capacitance is to simultaneously slow down the readout circuit and increase noise through the Miller effect.

  9. MONOLITHIC ACTIVE PIXEL MATRIX WITH BINARY COUNTERS IN AN SOI PROCESS.

    SciTech Connect

    DUPTUCH,G.; YAREMA, R.

    2007-06-07

    The design of a Prototype monolithic active pixel matrix, designed in a 0.15 {micro}m CMOS SOI Process, is presented. The process allowed connection between the electronics and the silicon volume under the layer of buried oxide (BOX). The small size vias traversing through the BOX and implantation of small p-type islands in the n-type bulk result in a monolithic imager. During the acquisition time, all pixels register individual radiation events incrementing the counters. The counting rate is up to 1 MHz per pixel. The contents of counters are shifted out during the readout phase. The designed prototype is an array of 64 x 64 pixels and the pixel size is 26 x 26 {micro}m{sup 2}.

  10. Precision tracking with a single gaseous pixel detector

    NASA Astrophysics Data System (ADS)

    Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N. P.; de Jong, P.; Kluit, R.

    2015-09-01

    The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips. Using wafer post-processing we add a spark-protection layer and a grid to create an amplification region above the chip, allowing individual electrons released above the grid by the passage of ionising radiation to be recorded. The electron creation point is measured in 3D, using the pixel position for (x, y) and the drift time for z. The track can be reconstructed by fitting a straight line to these points. In this work we have used a pixel-readout-chip which is a small-scale prototype of Timepix3 chip (designed for both silicon and gaseous detection media). This prototype chip has several advantages over the existing Timepix chip, including a faster front-end (pre-amplifier and discriminator) and a faster TDC which reduce timewalk's contribution to the z position error. Although the chip is very small (sensitive area of 0.88 × 0.88mm2), we have built it into a detector with a short drift gap (1.3 mm), and measured its tracking performance in an electron beam at DESY. We present the results obtained, which lead to a significant improvement for the resolutions with respect to Timepix-based detectors.

  11. Nanosecond monolithic CMOS readout cell

    DOEpatents

    Souchkov, Vitali V.

    2004-08-24

    A pulse shaper is implemented in monolithic CMOS with a delay unit formed of a unity gain buffer. The shaper is formed of a difference amplifier having one input connected directly to an input signal and a second input connected to a delayed input signal through the buffer. An elementary cell is based on the pulse shaper and a timing circuit which gates the output of an integrator connected to the pulse shaper output. A detector readout system is formed of a plurality of elementary cells, each connected to a pixel of a pixel array, or to a microstrip of a plurality of microstrips, or to a detector segment.

  12. Spectrally tunable pixel sensors

    NASA Astrophysics Data System (ADS)

    Langfelder, G.; Buffa, C.; Longoni, A. F.; Zaraga, F.

    2013-01-01

    They are here reported the developments and experimental results of fully operating matrices of spectrally tunable pixels based on the Transverse Field Detector (TFD). Unlike several digital imaging sensors based on color filter arrays or layered junctions, the TFD has the peculiar feature of having electrically tunable spectral sensitivities. In this way the sensor color space is not fixed a priori but can be real-time adjusted, e.g. for a better adaptation to the scene content or for multispectral capture. These advantages come at the cost of an increased complexity both for the photosensitive elements and for the readout electronics. The challenges in the realization of a matrix of TFD pixels are analyzed in this work. First experimental results on an 8x8 (x 3 colors) and on a 64x64 (x 3 colors) matrix will be presented and analyzed in terms of colorimetric and noise performance, and compared to simulation predictions.

  13. DAQ hardware and software development for the ATLAS Pixel Detector

    NASA Astrophysics Data System (ADS)

    Stramaglia, Maria Elena

    2016-07-01

    In 2014, the Pixel Detector of the ATLAS experiment has been extended by about 12 million pixels thanks to the installation of the Insertable B-Layer (IBL). Data-taking and tuning procedures have been implemented along with newly designed readout hardware to support high bandwidth for data readout and calibration. The hardware is supported by an embedded software stack running on the readout boards. The same boards will be used to upgrade the readout bandwidth for the two outermost barrel layers of the ATLAS Pixel Detector. We present the IBL readout hardware and the supporting software architecture used to calibrate and operate the 4-layer ATLAS Pixel Detector. We discuss the technical implementations and status for data taking, validation of the DAQ system in recent cosmic ray data taking, in-situ calibrations, and results from additional tests in preparation for Run 2 at the LHC.

  14. Report of the sensor readout electronics panel

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.; Carson, J.; Kleinhans, W.; Kosonocky, W.; Kozlowski, L.; Pecsalski, A.; Silver, A.; Spieler, H.; Woolaway, J.

    1991-01-01

    The findings of the Sensor Readout Electronics Panel are summarized in regard to technology assessment and recommended development plans. In addition to two specific readout issues, cryogenic readouts and sub-electron noise, the panel considered three advanced technology areas that impact the ability to achieve large format sensor arrays. These are mega-pixel focal plane packaging issues, focal plane to data processing module interfaces, and event driven readout architectures. Development in each of these five areas was judged to have significant impact in enabling the sensor performance desired for the Astrotech 21 mission set. Other readout issues, such as focal plane signal processing or other high volume data acquisition applications important for Eos-type mapping, were determined not to be relevant for astrophysics science goals.

  15. Readout of Epigenetic Modifications

    PubMed Central

    Patel, Dinshaw J.; Wang, Zhanxin

    2015-01-01

    This review focuses on a structure-based analysis of histone posttranslational modification (PTM) readout, where the PTMs serve as docking sites for reader modules as part of larger complexes displaying chromatin modifier and remodeling activities, with the capacity to alter chromatin architecture and templated processes. Individual topics addressed include the diversity of reader-binding pocket architectures and common principles underlying readout of methyl-lysine and methyl-arginine marks, their unmodified counterparts, as well as acetyl-lysine and phosphoserine marks. The review also discusses the impact of multivalent readout of combinations of PTMs localized at specific genomic sites by linked binding modules on processes ranging from gene transcription to repair. Additional topics include cross talk between histone PTMs, histone mimics, epigenetic-based diseases, and drug-based therapeutic intervention. The review ends by highlighting new initiatives and advances, as well as future challenges, toward the promise of enhancing our structural and mechanistic understanding of the readout of histone PTMs at the nucleosomal level. PMID:23642229

  16. Simulation of charge transport in pixelated CdTe

    NASA Astrophysics Data System (ADS)

    Kolstein, M.; Ariño, G.; Chmeissani, M.; De Lorenzo, G.

    2014-12-01

    The Voxel Imaging PET (VIP) Pathfinder project intends to show the advantages of using pixelated semiconductor technology for nuclear medicine applications to achieve an improved image reconstruction without efficiency loss. It proposes designs for Positron Emission Tomography (PET), Positron Emission Mammography (PEM) and Compton gamma camera detectors with a large number of signal channels (of the order of 106). The design is based on the use of a pixelated CdTe Schottky detector to have optimal energy and spatial resolution. An individual read-out channel is dedicated for each detector voxel of size 1 × 1 × 2 mm3 using an application-specific integrated circuit (ASIC) which the VIP project has designed, developed and is currently evaluating experimentally. The behaviour of the signal charge carriers in CdTe should be well understood because it has an impact on the performance of the readout channels. For this purpose the Finite Element Method (FEM) Multiphysics COMSOL software package has been used to simulate the behaviour of signal charge carriers in CdTe and extract values for the expected charge sharing depending on the impact point and bias voltage. The results on charge sharing obtained with COMSOL are combined with GAMOS, a Geant based particle tracking Monte Carlo software package, to get a full evaluation of the amount of charge sharing in pixelated CdTe for different gamma impact points.

  17. Multiport solid-state imager characterization at variable pixel rates

    SciTech Connect

    Yates, G.J.; Albright, K.A.; Turko, B.T.

    1993-08-01

    The imaging performance of an 8-port Full Frame Transfer Charge Coupled Device (FFT CCD) as a function of several parameters including pixel clock rate is presented. The device, model CCD- 13, manufactured by English Electric Valve (EEV) is a 512 {times} 512 pixel array designed with four individual programmable bidirectional serial registers and eight output amplifiers permitting simultaneous readout of eight segments (128 horizontal {times} 256 vertical pixels) of the array. The imager was evaluated in Los Alamos National Laboratory`s High-Speed Solid-State Imager Test Station at true pixel rates as high as 50 MHz for effective imager pixel rates approaching 400 MHz from multiporting. Key response characteristics measured include absolute responsivity, Charge-Transfer-Efficiency (CTE), dynamic range, resolution, signal-to-noise ratio, and electronic and optical crosstalk among the eight video channels. Preliminary test results and data obtained from the CCD-13 will be presented and the versatility/capabilities of the test station will be reviewed.

  18. Direct readout of gaseous detectors with tiled CMOS circuits

    NASA Astrophysics Data System (ADS)

    Visschers, J. L.; Blanco Carballo, V.; Chefdeville, M.; Colas, P.; van der Graaf, H.; Schmitz, J.; Smits, S.; Timmermans, J.

    2007-03-01

    A coordinated design effort is underway, exploring the three-dimensional direct readout of gaseous detectors by an anode plate equipped with a tiled array of many CMOS pixel readout ASICs, having amplification grids integrated on their topsides and being contacted on their backside.

  19. Readout IC requirement trends based on a simplified parametric seeker model.

    SciTech Connect

    Osborn, Thor D.

    2010-03-01

    Modern space based optical sensors place substantial demands on the focal plane array readout integrated circuit. Active pixel readout designs offer direct access to individual pixel data but require analog to digital conversion at or near each pixel. Thus, circuit designers must create precise, fundamentally analog circuitry within tightly constrained areas on the integrated circuit. Rapidly changing phenomena necessitate tradeoffs between sampling and conversion speed, data precision, and heat generation adjacent the detector array, especially of concern for thermally sensitive space grade infrared detectors. A simplified parametric model is presented that illustrates seeker system performance and analog to digital conversion requirements trends in the visible through mid-wave infrared, for varying sample rate. Notional limiting-case Earth optical backgrounds were generated using MODTRAN4 with a range of cloud extremes and approximate practical albedo limits for typical surface features from a composite of the Mosart and Aster spectral albedo databases. The dynamic range requirements imposed by these background spectra are discussed in the context of optical band selection and readout design impacts.

  20. Readout of the upgraded ALICE-ITS

    NASA Astrophysics Data System (ADS)

    Szczepankiewicz, A.

    2016-07-01

    The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb-Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

  1. CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography

    NASA Astrophysics Data System (ADS)

    Esposito, M.; Anaxagoras, T.; Evans, P. M.; Green, S.; Manolopoulos, S.; Nieto-Camero, J.; Parker, D. J.; Poludniowski, G.; Price, T.; Waltham, C.; Allinson, N. M.

    2015-06-01

    Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs.

  2. Use of silicon pixel detectors in double electron capture experiments

    NASA Astrophysics Data System (ADS)

    Cermak, P.; Stekl, I.; Shitov, Yu A.; Mamedov, F.; Rukhadze, E. N.; Jose, J. M.; Cermak, J.; Rukhadze, N. I.; Brudanin, V. B.; Loaiza, P.

    2011-01-01

    A novel experimental approach to search for double electron capture (EC/EC) is discussed in this article. R&D for a new generation EC/EC spectrometer based on silicon pixel detectors (SPDs) has been conducted since 2009 for an upgrade of the TGV experiment. SPDs built on Timepix technology with a spectroscopic readout from each individual pixel are an effective tool to detect the 2νEC/EC signature of the two low energy X-rays hitting two separate pixels. The ability of SPDs to indentify α/β/γ particles and localize them precisely leads to effective background discrimination and thus considerable improvement of the signal-to-background ratio (S/B). A multi-SPD system, called a Silicon Pixel Telescope (SPT), is planned based on the experimental approach of the TGV calorimeter which measures thin foils of enriched EC/EC-isotope sandwiched between HPGe detectors working in coincidence mode. The sources of SPD internal background have been identified by measuring SPD radiopurity with a low-background HPGe detector as well as by long-term SPD background runs in the Modane underground laboratory (LSM, France), and results of these studies are presented.

  3. Digital-pixel focal plane array development

    NASA Astrophysics Data System (ADS)

    Brown, Matthew G.; Baker, Justin; Colonero, Curtis; Costa, Joe; Gardner, Tom; Kelly, Mike; Schultz, Ken; Tyrrell, Brian; Wey, Jim

    2010-01-01

    Since 2006, MIT Lincoln Laboratory has been developing Digital-pixel Focal Plane Array (DFPA) readout integrated circuits (ROICs). To date, four 256 × 256 30 μm pitch DFPA designs with in-pixel analog to digital conversion have been fabricated using IBM 90 nm CMOS processes. The DFPA ROICs are compatible with a wide range of detector materials and cutoff wavelengths; HgCdTe, QWIP, and InGaAs photo-detectors with cutoff wavelengths ranging from 1.6 to 14.5 μm have been hybridized to the same digital-pixel readout. The digital-pixel readout architecture offers high dynamic range, A/C or D/C coupled integration, and on-chip image processing with low power orthogonal transfer operations. The newest ROIC designs support two-color operation with a single Indium bump connection. Development and characterization of the two-color DFPA designs is presented along with applications for this new digital readout technology.

  4. 3D, Flash, Induced Current Readout for Silicon Sensors

    SciTech Connect

    Parker, Sherwood I.

    2014-06-07

    A new method for silicon microstrip and pixel detector readout using (1) 65 nm-technology current amplifers which can, for the first time with silicon microstrop and pixel detectors, have response times far shorter than the charge collection time (2) 3D trench electrodes large enough to subtend a reasonable solid angle at most track locations and so have adequate sensitivity over a substantial volume of pixel, (3) induced signals in addition to, or in place of, collected charge

  5. CMOS Active-Pixel Image Sensor With Simple Floating Gates

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

    1996-01-01

    Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

  6. Proceedings of PIXEL98 -- International pixel detector workshop

    SciTech Connect

    Anderson, D.F.; Kwan, S.

    1998-08-01

    Experiments around the globe face new challenges of more precision in the face of higher interaction rates, greater track densities, and higher radiation doses, as they look for rarer and rarer processes, leading many to incorporate pixelated solid-state detectors into their plans. The highest-readout rate devices require new technologies for implementation. This workshop reviewed recent, significant progress in meeting these technical challenges. Participants presented many new results; many of them from the weeks--even days--just before the workshop. Brand new at this workshop were results on cryogenic operation of radiation-damaged silicon detectors (dubbed the Lazarus effect). Other new work included a diamond sensor with 280-micron collection distance; new results on breakdown in p-type silicon detectors; testing of the latest versions of read-out chip and interconnection designs; and the radiation hardness of deep-submicron processes.

  7. Pixel multichip module development at Fermilab

    SciTech Connect

    Turqueti, M A; Cardoso, G; Andresen, J; Appel, J A; Christian, D C; Kwan, S W; Prosser, A; Uplegger, L

    2005-10-01

    At Fermilab, there is an ongoing pixel detector R&D effort for High Energy Physics with the objective of developing high performance vertex detectors suitable for the next generation of HEP experiments. The pixel module presented here is a direct result of work undertaken for the canceled BTeV experiment. It is a very mature piece of hardware, having many characteristics of high performance, low mass and radiation hardness driven by the requirements of the BTeV experiment. The detector presented in this paper consists of three basic devices; the readout integrated circuit (IC) FPIX2A [2][5], the pixel sensor (TESLA p-spray) [6] and the high density interconnect (HDI) flex circuit [1][3] that is capable of supporting eight readout ICs. The characterization of the pixel multichip module prototype as well as the baseline design of the eight chip pixel module and its capabilities are presented. These prototypes were characterized for threshold and noise dispersion. The bump-bonds of the pixel module were examined using an X-ray inspection system. Furthermore, the connectivity of the bump-bonds was tested using a radioactive source ({sup 90}Sr), while the absolute calibration of the modules was achieved using an X-ray source. This paper provides a view of the integration of the three components that together comprise the pixel multichip module.

  8. Optical links for the ATLAS Pixel Detector

    NASA Astrophysics Data System (ADS)

    Stucci, Stefania

    2016-07-01

    With the expected increase in the instantaneous luminosity of the LHC in the next few years, the off-detector optical read-out system of the outer two layers of the Pixel Detector of the ATLAS experiment will reach its bandwidth limits. The bandwidth will be increased with new optical receivers, which had to be redesigned since commercial solutions could not be used. The new design allows for a wider operational range in terms of data frequency and input optical power to match the on-detector transmitters of the present Pixel Detector. We report on the design and testing of prototypes of these components and the plans for the installation in the Pixel Detector read-out chain in 2015.

  9. Development of pixel detectors for SSC vertex tracking

    SciTech Connect

    Kramer, G. . Electro-Optical and Data Systems Group); Atlas, E.L.; Augustine, F.; Barken, O.; Collins, T.; Marking, W.L.; Worley, S.; Yacoub, G.Y. ) Shapiro, S.L. ); Arens, J.F.; Jernigan, J.G. . Space Sciences Lab.); Nygren,

    1991-04-01

    A description of hybrid PIN diode arrays and a readout architecture for their use as a vertex detector in the SSC environment is presented. Test results obtained with arrays having 256 {times} 256 pixels, each 30 {mu}m square, are also presented. The development of a custom readout for the SSC will be discussed, which supports a mechanism for time stamping hit pixels, storing their xy coordinates, and storing the analog information within the pixel. The peripheral logic located on the array, permits the selection of those pixels containing interesting data and their coordinates to be selectively read out. This same logic also resolves ambiguous pixel ghost locations and controls the pixel neighbor read out necessary to achieve high spatial resolution. The thermal design of the vertex tracker and the proposed signal processing architecture will also be discussed. 5 refs., 13 figs., 3 tabs.

  10. XAMPS Detectors Readout ASIC for LCLS

    SciTech Connect

    Dragone, A; Pratte, J.F.; Rehak, P.; Carini, G.A.; Herbst, R.; O'Connor, P.; Siddons, D.P.; /BNL, NSLS

    2008-12-18

    An ASIC for the readout of signals from X-ray Active Matrix Pixel Sensor (XAMPS) detectors to be used at the Linac Coherent Light Source (LCLS) is presented. The X-ray Pump Probe (XPP) instrument, for which the ASIC has been designed, requires a large input dynamic range on the order of 104 photons at 8 keV with a resolution of half a photon FWHM. Due to the size of the pixel and the length of the readout line, large input capacitance is expected, leading to stringent requirement on the noise optimization. Furthermore, the large number of pixels needed for a good position resolution and the fixed LCLS beam period impose limitations on the time available for the single pixel readout. Considering the periodic nature of the LCLS beam, the ASIC developed for this application is a time-variant system providing low-noise charge integration, filtering and correlated double sampling. In order to cope with the large input dynamic range a charge pump scheme implementing a zero-balance measurement method has been introduced. It provides an on chip 3-bit coarse digital conversion of the integrated charge. The residual charge is sampled using correlated double sampling into analog memory and measured with the required resolution. The first 64 channel prototype of the ASIC has been fabricated in TSMC CMOS 0.25 {micro}m technology. In this paper, the ASIC architecture and performances are presented.

  11. Electronic readout systems for microchannel plates

    NASA Technical Reports Server (NTRS)

    Timothy, J. G.

    1985-01-01

    The modes of operation of position-sensitive electronic readout systems which use high-gain microchannel plate (MCP) electron multipliers are described, and their performance characteristics, along with those of the MCP, are compared. Among the structures presented are the wedge-and-strip, Codacon, and multilayer coincidence-anode MAMA (Multimode Microchannel Array) arrays. Spatial resolution of 25 x 25 sq microns (coincidence anode arrays) is achieved with an array format of 256 x 1024 pixels. On the basis of the performance data it is concluded that the readout systems using only conducting electrodes offer the best performance characteristics.

  12. Pixel detectors in 3D technologies for high energy physics

    SciTech Connect

    Deptuch, G.; Demarteau, M.; Hoff, J.; Lipton, R.; Shenai, A.; Yarema, R.; Zimmerman, T.; /Fermilab

    2010-10-01

    This paper reports on the current status of the development of International Linear Collider vertex detector pixel readout chips based on multi-tier vertically integrated electronics. Initial testing results of the VIP2a prototype are presented. The chip is the second embodiment of the prototype data-pushed readout concept developed at Fermilab. The device was fabricated in the MIT-LL 0.15 {micro}m fully depleted SOI process. The prototype is a three-tier design, featuring 30 x 30 {micro}m{sup 2} pixels, laid out in an array of 48 x 48 pixels.

  13. High-voltage pixel sensors for ATLAS upgrade

    NASA Astrophysics Data System (ADS)

    Perić, I.; Kreidl, C.; Fischer, P.; Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M.; Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B.; Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A.; Nessi, M.; Iacobucci, G.; Backhaus, M.; Hügging, Fabian; Krüger, H.; Hemperek, T.; Obermann, T.; Wermes, N.; Garcia-Sciveres, M.; Quadt, A.; Weingarten, J.; George, M.; Grosse-Knetter, J.; Rieger, J.; Bates, R.; Blue, A.; Buttar, C.; Hynds, D.

    2014-11-01

    The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

  14. The status of the CMS forward pixel detector

    SciTech Connect

    Tan, Ping; /Fermilab

    2006-01-01

    The silicon pixel detector is the innermost component of the CMS tracking system. It provides precise measurements of space points to allow effective pattern recognition in multiple track environments near the LHC interaction point. The end disks of the pixel detector, known as the Forward Pixel detector, are constructed mainly by the US-CMS collaborators. The design techniques, readout electronics, test beam activities, and construction status are reviewed.

  15. Characterization of a three side abuttable CMOS pixel sensor with digital pixel and data compression for charged particle tracking

    NASA Astrophysics Data System (ADS)

    Guilloux, F.; Değerli, Y.; Flouzat, C.; Lachkar, M.; Monmarthe, E.; Orsini, F.; Venault, P.

    2016-02-01

    CMOS monolithic pixel sensor technology has been chosen to equip the new ALICE trackers for HL-LHC . PIXAM is the final prototype from an R&D program specific to the Muon Forward Tracker which intends to push significantly forward the performances of the mature rolling shutter architecture. By implementing a digital pixel allowing to readout of a group of rows in parallel, the PIXAM sensor increases the rolling shutter readout speed while keeping the same power consumption as that of analogue pixel sensors. This paper will describe shortly the ASIC architecture and will focus on the analogue and digital performances of the sensor, obtained from laboratory measurements.

  16. X-ray Characterization of a Multichannel Smart-Pixel Array Detector

    SciTech Connect

    Ross, Steve; Haji-Sheikh, Michael; Huntington, Andrew; Kline, David; Lee, Adam; Li, Yuelin; Rhee, Jehyuk; Tarpley, Mary; Walko, Donald A.; Westberg, Gregg; Williams, George; Zou, Haifeng; Landahl, Eric

    2016-01-01

    The Voxtel VX-798 is a prototype X-ray pixel array detector (PAD) featuring a silicon sensor photodiode array of 48 x 48 pixels, each 130 mu m x 130 mu m x 520 mu m thick, coupled to a CMOS readout application specific integrated circuit (ASIC). The first synchrotron X-ray characterization of this detector is presented, and its ability to selectively count individual X-rays within two independent arrival time windows, a programmable energy range, and localized to a single pixel is demonstrated. During our first trial run at Argonne National Laboratory's Advance Photon Source, the detector achieved a 60 ns gating time and 700 eV full width at half-maximum energy resolution in agreement with design parameters. Each pixel of the PAD holds two independent digital counters, and the discriminator for X-ray energy features both an upper and lower threshold to window the energy of interest discarding unwanted background. This smart-pixel technology allows energy and time resolution to be set and optimized in software. It is found that the detector linearity follows an isolated dead-time model, implying that megahertz count rates should be possible in each pixel. Measurement of the line and point spread functions showed negligible spatial blurring. When combined with the timing structure of the synchrotron storage ring, it is demonstrated that the area detector can perform both picosecond time-resolved X-ray diffraction and fluorescence spectroscopy measurements.

  17. X-ray characterization of a multichannel smart-pixel array detector.

    PubMed

    Ross, Steve; Haji-Sheikh, Michael; Huntington, Andrew; Kline, David; Lee, Adam; Li, Yuelin; Rhee, Jehyuk; Tarpley, Mary; Walko, Donald A; Westberg, Gregg; Williams, George; Zou, Haifeng; Landahl, Eric

    2016-01-01

    The Voxtel VX-798 is a prototype X-ray pixel array detector (PAD) featuring a silicon sensor photodiode array of 48 × 48 pixels, each 130 µm × 130 µm × 520 µm thick, coupled to a CMOS readout application specific integrated circuit (ASIC). The first synchrotron X-ray characterization of this detector is presented, and its ability to selectively count individual X-rays within two independent arrival time windows, a programmable energy range, and localized to a single pixel is demonstrated. During our first trial run at Argonne National Laboratory's Advance Photon Source, the detector achieved a 60 ns gating time and 700 eV full width at half-maximum energy resolution in agreement with design parameters. Each pixel of the PAD holds two independent digital counters, and the discriminator for X-ray energy features both an upper and lower threshold to window the energy of interest discarding unwanted background. This smart-pixel technology allows energy and time resolution to be set and optimized in software. It is found that the detector linearity follows an isolated dead-time model, implying that megahertz count rates should be possible in each pixel. Measurement of the line and point spread functions showed negligible spatial blurring. When combined with the timing structure of the synchrotron storage ring, it is demonstrated that the area detector can perform both picosecond time-resolved X-ray diffraction and fluorescence spectroscopy measurements. PMID:26698064

  18. Readout circuitry for continuous high-rate photon detection with arrays of InP Geiger-mode avalanche photodiodes

    NASA Astrophysics Data System (ADS)

    Frechette, Jonathan; Grossmann, Peter J.; Busacker, David E.; Jordy, George J.; Duerr, Erik K.; McIntosh, K. Alexander; Oakley, Douglas C.; Bailey, Robert J.; Ruff, Albert C.; Brattain, Michael A.; Funk, Joseph E.; MacDonald, Jason G.; Verghese, Simon

    2012-06-01

    An asynchronous readout integrated circuit (ROIC) has been developed for hybridization to a 32x32 array of single-photon sensitive avalanche photodiodes (APDs). The asynchronous ROIC is capable of simultaneous detection and readout of photon times of arrival, with no array blind time. Each pixel in the array is independently operated by a finite state machine that actively quenches an APD upon a photon detection event, and re-biases the device into Geiger mode after a programmable hold-off time. While an individual APD is in hold-off mode, other elements in the array are biased and available to detect photons. This approach enables high pixel refresh frequency (PRF), making the device suitable for applications including optical communications and frequency-agile ladar. A built-in electronic shutter that de-biases the whole array allows the detector to operate in a gated mode or allows for detection to be temporarily disabled. On-chip data reduction reduces the high bandwidth requirements of simultaneous detection and readout. Additional features include programmable single-pixel disable, region of interest processing, and programmable output data rates. State-based on-chip clock gating reduces overall power draw. ROIC operation has been demonstrated with hybridized InP APDs sensitive to 1.06-μm and 1.55-μm wavelength, and fully packaged focal plane arrays (FPAs) have been assembled and characterized.

  19. Study on 512×128 pixels InGaAs near infrared focal plane arrays

    NASA Astrophysics Data System (ADS)

    Li, Xue; Tang, Hengjing; Huang, Songlei; Shao, Xiumei; Li, Tao; Huang, Zhangcheng; Gong, Haimei

    2014-10-01

    It is well known that In0.53Ga0.47As epitaxial material is lattice-matched to InP substrate corresponding to the wavelength from 0.9μm to 1.7μm, which results to high quality material and good device characteristics at room temperature. In order to develop the near infrared multi-spectral imaging, 512×128 pixels InGaAs Near Infrared Focal Plane Arrays (FPAs) were studied. The n-InP/i-InGaAs/n-InP double hereto-structure epitaxial material was grown by MBE. The 512×128 back-illuminated planar InGaAs detector arrays were fabricated, including the improvement of passivation film, by grooving the diffusion masking layer, the P type electrode layer, In bump condition and so on. The photo-sensitive region has the diffusion area of 23×23μm2 and pixel pitch of 30×30μm2 . The 512×128 detector arrays were individually hybridized on readout integrated circuit(ROIC) by Indium bump based on flip-chip process to make focal plane arrays (FPAs). The ROIC is based on a capacitive trans-impedance amplifier with correlated double sampling and integrated while readout (IWR) mode with high readout velocity of every pixel resulting in low readout noise and high frame frequency. The average peak detectivity and the response non-uniformity of the FPAs are 1.63×1012 cmHz1/2/W and 5.9%, respectively. The power dissipation and frame frequency of the FPAs are about 180mW and 400Hz, respectively.

  20. Commissioning of the CMS Forward Pixel Detector

    SciTech Connect

    Kumar, Ashish; /SUNY, Buffalo

    2008-12-01

    The Compact Muon Solenoid (CMS) experiment is scheduled for physics data taking in summer 2009 after the commissioning of high energy proton-proton collisions at Large Hadron Collider (LHC). At the core of the CMS all-silicon tracker is the silicon pixel detector, comprising three barrel layers and two pixel disks in the forward and backward regions, accounting for a total of 66 million channels. The pixel detector will provide high-resolution, 3D tracking points, essential for pattern recognition and precise vertexing, while being embedded in a hostile radiation environment. The end disks of the pixel detector, known as the Forward Pixel detector, has been assembled and tested at Fermilab, USA. It has 18 million pixel cells with dimension 100 x 150 {micro}m{sup 2}. The complete forward pixel detector was shipped to CERN in December 2007, where it underwent extensive system tests for commissioning prior to the installation. The pixel system was put in its final place inside the CMS following the installation and bake out of the LHC beam pipe in July 2008. It has been integrated with other sub-detectors in the readout since September 2008 and participated in the cosmic data taking. This report covers the strategy and results from commissioning of CMS forward pixel detector at CERN.

  1. SNO+ Readout Electronics Upgrades

    NASA Astrophysics Data System (ADS)

    Bonventre, Richard; Shokair, Timothy; Knapik, Robert

    2012-03-01

    The SNO+ experiment is designed to explore several topics in neutrino physics including neutrinoless double beta decay, reactor antineutrinos, and low energy solar neutrinos. SNO+ uses the existing Sudbury Neutrino Observatory (SNO) detector, with the heavy water target replaced with liquid scintillator. The new target requires an upgrade to the command and control electronics to handle the higher rates expected with scintillation light as compared to Cherenkov light. The readout electronics have been upgraded to autonomously push data to a central data acquisition computer over ethernet from each of the 19 front end crates. The autonomous readout is achieved with a field programmable gate array (FPGA) with an embedded processor. Inside the FPGA fabric a state machine is configured to pull data across the VME-like bus of each crate. A small C program, making use of the open source Light Weight IP (LWIP) libraries, is run directly on the hardware (with no operating system) to push the data via TCP/IP. The hybrid combination of `high-level' C code and a `low-level' VHDL state machine is a cost effective and flexible solution for reading out individual front end crates.

  2. A new 9T global shutter pixel with CDS technique

    NASA Astrophysics Data System (ADS)

    Liu, Yang; Ma, Cheng; Zhou, Quan; Wang, Xinyang

    2015-04-01

    Benefiting from motion blur free, Global shutter pixel is very widely used in the design of CMOS image sensors for high speed applications such as motion vision, scientifically inspection, etc. In global shutter sensors, all pixel signal information needs to be stored in the pixel first and then waiting for readout. For higher frame rate, we need very fast operation of the pixel array. There are basically two ways for the in pixel signal storage, one is in charge domain, such as the one shown in [1], this needs complicated process during the pixel fabrication. The other one is in voltage domain, one example is the one in [2], this pixel is based on the 4T PPD technology and normally the driving of the high capacitive transfer gate limits the speed of the array operation. In this paper we report a new 9T global shutter pixel based on 3-T partially pinned photodiode (PPPD) technology. It incorporates three in-pixel storage capacitors allowing for correlated double sampling (CDS) and pipeline operation of the array (pixel exposure during the readout of the array). Only two control pulses are needed for all the pixels at the end of exposure which allows high speed exposure control.

  3. Single photon counting pixel detectors for synchrotron radiation experiments

    NASA Astrophysics Data System (ADS)

    Toyokawa, H.; Broennimann, Ch.; Eikenberry, E. F.; Henrich, B.; Kawase, M.; Kobas, M.; Kraft, P.; Sato, M.; Schmitt, B.; Suzuki, M.; Tanida, H.; Uruga, T.

    2010-11-01

    At the Paul Scherrer Institute PSI an X-ray single photon counting pixel detector (PILATUS) based on the hybrid-pixel detector technology was developed in collaboration with SPring-8. The detection element is a 320 or 450 μm thick silicon sensor forming pixelated pn-diodes with a pitch of 172 μm×172 μm. An array of 2×8 custom CMOS readout chips are indium bump-bonded to the sensor, which leads to 33.5 mm×83.8 mm detective area. Each pixel contains a charge-sensitive amplifier, a single level discriminator and a 20 bit counter. This design realizes a high dynamic range, short readout time of less than 3 ms, a high framing rate of over 200 images per second and an excellent point-spread function. The maximum counting rate achieves more than 2×10 6 X-rays/s/pixel.

  4. Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

    2005-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

  5. Planar pixel detector module development for the HL-LHC ATLAS pixel system

    NASA Astrophysics Data System (ADS)

    Bates, Richard L.; Buttar, C.; Stewart, A.; Blue, A.; Doonan, K.; Ashby, J.; Casse, G.; Dervan, P.; Forshaw, D.; Tsurin, I.; Brown, S.; Pater, J.

    2013-12-01

    The ATLAS pixel detector for the HL-LHC requires the development of large area pixel modules that can withstand doses up to 1016 1 MeV neq cm-2. The area of the pixel detector system will be over 5 m2 and as such low cost, large area modules are required. The development of a quad module based on 4 FE-I4 readout integrated chips (ROIC) will be discussed. The FE-I4 ROIC is a large area chip and the yield of the flip-chip process to form an assembly is discussed for single chip assemblies. The readout of the quad module for laboratory tests will be reported.

  6. Development of CMOS Pixel Sensors with digital pixel dedicated to future particle physics experiments

    NASA Astrophysics Data System (ADS)

    Zhao, W.; Wang, T.; Pham, H.; Hu-Guo, C.; Dorokhov, A.; Hu, Y.

    2014-02-01

    Two prototypes of CMOS pixel sensor with in-pixel analog to digital conversion have been developed in a 0.18 μm CIS process. The first design integrates a discriminator into each pixel within an area of 22 × 33 μm2 in order to meet the requirements of the ALICE inner tracking system (ALICE-ITS) upgrade. The second design features 3-bit charge encoding inside a 35 × 35 μm2 pixel which is motivated by the specifications of the outer layers of the ILD vertex detector (ILD-VXD). This work aims to validate the concept of in-pixel digitization which offers higher readout speed, lower power consumption and less dead zone compared with the column-level charge encoding.

  7. Novel CMOS readout techniques for uncooled pyroelectric IR FPA

    NASA Astrophysics Data System (ADS)

    Sun, Tai-Ping; Chin, Yuan-Lung; Chung, Wen-Yaw; Hsiung, Shen-Kan; Chou, Jung-Chuan

    1998-09-01

    Based on the application of the source follower per detector (SFD) input biasing technique, a new redout structure for the IR focal-plane-array (FPA), called the variable gain source follower per detector (VGSFD) is proposed and analyzed. The readout circuit of VGSFD of a unit cell of pyroelectric sensor under investigation, is composed of a source follower per detector circuit, high gain amplifier, and the reset switch. The VGSFD readout chip has been designed in 0.5 micrometers double-poly-double-metal n-well CMOS technology in various formats from 8 by 8 to 128 by 128. The experimental 8 by 8 VGSFD measurement results of the fabricated readout chip at room temperature have successfully verified both the readout function and performance. The high gain, low power, high sensitivity readout performances are achieved in a 50 by 50 micrometers (superscript 2) pixel size.

  8. Counting x-ray line detector with monolithically integrated readout circuits

    NASA Astrophysics Data System (ADS)

    Lohse, T.; Krüger, P.; Heuer, H.; Oppermann, M.; Torlee, H.; Meyendorf, N.

    2013-05-01

    The developed direct converting X-ray line detectors offer a number of advantages in comparison to other X-ray sensor concepts. Direct converting X-ray detectors are based on absorption of X-rays in semiconductor material, which leads to a generation of charge carriers. By applying high bias voltage charge carriers can be separated and with this the arising current pulse can be assessed by suitable readout integrated circuits (ICs) subsequently. The X-ray absorber itself is implemented as a diode based on GaAs to use it in the reverse direction. It exhibits low dark currents and can therefore be used at room temperatures. The GaAs absorber has a structured top electrode designed on variable bonding and high breakdown voltages. The implemented GaAs absorber exhibits a pixel size of 100 μm while the readout IC features fast dead-time-free readout, energy discrimination by two individually adjustable thresholds with 20 bit deep counters and radiation-hard design on chip level. These properties guarantee the application as fast and thus sensitive line detector for imaging processes. Another advantage of the imaging line detector is the cascadability of several sensor modules with 1024 pixels each. This property ensures that the 102.4 mm long sensor modules can be concatenated virtually with arbitrary length gaplessly. The readout ICs hitting radiation dose can be further minimized by implementing constructive steps to ensure longer lifetime of the sensor module. Furthermore, first results using the introduced sensor module for solid state X-ray detection are discussed.

  9. Pixel Perfect

    SciTech Connect

    Perrine, Kenneth A.; Hopkins, Derek F.; Lamarche, Brian L.; Sowa, Marianne B.

    2005-09-01

    cubic warp. During image acquisitions, the cubic warp is evaluated by way of forward differencing. Unwanted pixelation artifacts are minimized by bilinear sampling. The resulting system is state-of-the-art for biological imaging. Precisely registered images enable the reliable use of FRET techniques. In addition, real-time image processing performance allows computed images to be fed back and displayed to scientists immediately, and the pipelined nature of the FPGA allows additional image processing algorithms to be incorporated into the system without slowing throughput.

  10. The LAMBDA photon-counting pixel detector

    NASA Astrophysics Data System (ADS)

    Pennicard, D.; Lange, S.; Smoljanin, S.; Hirsemann, H.; Graafsma, H.; Epple, M.; Zuvic, M.; Lampert, M.-O.; Fritzsch, T.; Rothermund, M.

    2013-03-01

    The Medipix3 photon-counting detector chip has a number of novel features that are attractive for synchrotron experiments, such as a high frame rate with zero dead time and high spatial resolution. DESY are developing a large-area Medipix3-based detector array (LAMBDA). A single LAMBDA module consists of 2 by 6 Medipix3 chips on a ceramic carrier board, bonded to either a single large silicon sensor or two smaller high-Z sensors. The readout system fits behind the carrier board to allow module tiling, and uses a large on-board RAM and multiple 10 Gigabit Ethernet links to permit high-speed readout. Currently, the first large silicon modules have been constructed and read out at low speed, and the firmware for highspeed readout is being developed. In addition to these silicon sensors, we are developing a germanium hybrid pixel detector in collaboration with Canberra for higher-energy beamlines. Canberra have produced a set of 256-by-256-pixel planar germanium sensors with 55μm pitch, and these are currently being bonded to Medipix3 readout chips by Fraunhofer IZM (Berlin).

  11. Pixel multichip module design for a high energy physics experiment

    SciTech Connect

    Guilherme Cardoso et al.

    2003-11-05

    At Fermilab, a pixel detector multichip module is being developed for the BTeV experiment. The module is composed of three layers. The lowest layer is formed by the readout integrated circuits (ICs). The back of the ICs is in thermal contact with the supporting structure, while the top is flip-chip bump-bonded to the pixel sensor. A low mass flex-circuit interconnect is glued on the top of this assembly, and the readout IC pads are wire-bounded to the circuit. This paper presents recent results on the development of a multichip module prototype and summarizes its performance characteristics.

  12. Development of a high density pixel multichip module at Fermilab

    SciTech Connect

    Sergio Zimmermann et al.

    2001-09-11

    At Fermilab, a pixel detector multichip module is being developed for the BTeV experiment. The module is composed of three layers. The lowest layer is formed by the readout integrated circuits (ICs). The back of the ICs is in thermal contact with the supporting structure, while the top is flip-chip bump-bonded to the pixel sensor. A low mass flex-circuit interconnect is glued on the top of this assembly, and the readout IC pads are wire-bounded to the circuit. This paper presents recent results on the development of a multichip module prototype and summarizes its performance characteristics.

  13. A germanium hybrid pixel detector with 55μm pixel size and 65,000 channels

    NASA Astrophysics Data System (ADS)

    Pennicard, D.; Struth, B.; Hirsemann, H.; Sarajlic, M.; Smoljanin, S.; Zuvic, M.; Lampert, M. O.; Fritzsch, T.; Rothermund, M.; Graafsma, H.

    2014-12-01

    Hybrid pixel semiconductor detectors provide high performance through a combination of direct detection, a relatively small pixel size, fast readout and sophisticated signal processing circuitry in each pixel. For X-ray detection above 20 keV, high-Z sensor layers rather than silicon are needed to achieve high quantum efficiency, but many high-Z materials such as GaAs and CdTe often suffer from poor material properties or nonuniformities. Germanium is available in large wafers of extremely high quality, making it an appealing option for high-performance hybrid pixel X-ray detectors, but suitable technologies for finely pixelating and bump-bonding germanium have not previously been available. A finely-pixelated germanium photodiode sensor with a 256 by 256 array of 55μm pixels has been produced. The sensor has an n-on-p structure, with 700μm thickness. Using a low-temperature indium bump process, this sensor has been bonded to the Medipix3RX photoncounting readout chip. Tests with the LAMBDA readout system have shown that the detector works successfully, with a high bond yield and higher image uniformity than comparable high-Z systems. During cooling, the system is functional around -80°C (with warmer temperatures resulting in excessive leakage current), with -100°C sufficient for good performance.

  14. VeloPix: the pixel ASIC for the LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Poikela, T.; De Gaspari, M.; Plosila, J.; Westerlund, T.; Ballabriga, R.; Buytaert, J.; Campbell, M.; Llopart, X.; Wyllie, K.; Gromov, V.; van Beuzekom, M.; Zivkovic, V.

    2015-01-01

    The LHCb Vertex Detector (VELO) will be upgraded in 2018 along with the other subsystems of LHCb in order to enable full readout at 40 MHz, with the data fed directly to the software triggering algorithms. The upgraded VELO is a lightweight hybrid pixel detector operating in vacuum in close proximity to the LHC beams. The readout will be provided by a dedicated front-end ASIC, dubbed VeloPix, matched to the LHCb readout requirements and the 55 × 55 μm VELO pixel dimensions. The chip is closely related to the Timepix3, from the Medipix family of ASICs. The principal challenge that the chip has to meet is a hit rate of up to 900 Mhits/s, resulting in a required output bandwidth of more than 16 Gbit/s. The occupancy across the chip is also very non-uniform, and the radiation levels reach an integrated 400 Mrad over the lifetime of the detector.VeloPix is a binary pixel readout chip with a data driven readout, designed in 130 nm CMOS technology. The pixels are combined into groups of 2 × 4 super pixels, enabling a shared logic and a reduction of bandwidth due to combined address and time stamp information. The pixel hits are combined with other simultaneous hits in the same super pixel, time stamped, and immediately driven off-chip. The analog front-end must be sufficiently fast to accurately time stamp the data, with a small enough dead time to minimize data loss in the most occupied regions of the chip. The data is driven off chip with a custom designed high speed serialiser. The current status of the ASIC design, the chip architecture and the simulations will be described.

  15. Progress on the FDM Development at SRON: Toward 160 Pixels

    NASA Astrophysics Data System (ADS)

    den Hartog, R. H.; Bruijn, M. P.; Clenet, A.; Gottardi, L.; Hijmering, R.; Jackson, B. D.; van der Kuur, J.; van Leeuwen, B. J.; van der Linden, A. J.; van Loon, D.; Nieuwenhuizen, A.; Ridder, M.; van Winden, P.

    2014-08-01

    SRON is developing the electronic read-out for arrays of transition edge sensors using frequency domain multiplexing in combination with base-band feedback. The astronomical applications of this system are the read-out of soft X-ray micro-calorimeters in a potential instrument on the European X-ray mission-under-study Athena+ and far-IR bolometers for the Safari instrument on the Japanese mission SPICA. In this paper we demonstrate the simultaneous read-out of 38 bolometer pixels at a 12 aW/Hz dark NEP level. The stability of the read-out is assessed over 400 s. time spans. Although some 1/f noise is present, there are several bolometers for which 1/f-free read-out can be demonstrated.

  16. Back-Side Readout Silicon Photomultiplier.

    PubMed

    Choong, Woon-Seng; Holland, Stephen E

    2012-07-19

    We present a novel structure for the back-side readout silicon photomultipler (SiPM). Current SiPMs are front-illuminated structures with front-side readout, which have relatively small geometric fill factor leading to degradation in their photon detection efficiency (PDE). Back-side readout devices will provide an advantageous solution to achieve high PDE. We designed and investigated a novel structure that would allow back-side readout while creating a region of high electric field optimized for avalanche breakdown. In addition, this structure has relatively high fill factor and also allow direct coupling of individual micro-cell of the SiPM to application-specific integrated circuits. We will discuss the performance that can be attained with this structure through device simulation and the process flow that can be used to fabricate this structure through process simulation. PMID:23564969

  17. Back-Side Readout Silicon Photomultiplier

    PubMed Central

    Choong, Woon-Seng; Holland, Stephen E.

    2012-01-01

    We present a novel structure for the back-side readout silicon photomultipler (SiPM). Current SiPMs are front-illuminated structures with front-side readout, which have relatively small geometric fill factor leading to degradation in their photon detection efficiency (PDE). Back-side readout devices will provide an advantageous solution to achieve high PDE. We designed and investigated a novel structure that would allow back-side readout while creating a region of high electric field optimized for avalanche breakdown. In addition, this structure has relatively high fill factor and also allow direct coupling of individual micro-cell of the SiPM to application-specific integrated circuits. We will discuss the performance that can be attained with this structure through device simulation and the process flow that can be used to fabricate this structure through process simulation. PMID:23564969

  18. Polycrystalline Mercuric Iodide Films on CMOS Readout Arrays

    PubMed Central

    Hartsough, Neal E.; Iwanczyk, Jan S.; Nygard, Einar; Malakhov, Nail; Barber, William C.; Gandhi, Thulasidharan

    2009-01-01

    We have created high-resolution x-ray imaging devices using polycrystalline mercuric iodide (HgI2) films grown directly onto CMOS readout chips using a thermal vapor transport process. Images from prototype 400×400 pixel HgI2-coated CMOS readout chips are presented, where the pixel grid is 30 μm × 30 μm. The devices exhibited sensitivity of 6.2 μC/Rcm2 with corresponding dark current of ∼2.7 nA/cm2, and a 80 μm FWHM planar image response to a 50 μm slit aperture. X-ray CT images demonstrate a point spread function sufficient to obtain a 50 μm spatial resolution in reconstructed CT images at a substantially reduced dose compared to phosphor-coated readouts. The use of CMOS technology allows for small pixels (30 μm), fast readout speeds (8 fps for a 3200×3200 pixel array), and future design flexibility due to the use of well-developed fabrication processes. PMID:20161098

  19. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  20. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2004-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  1. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    1995-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  2. Digital radiography using amorphous selenium: Photoconductively activated switch (PAS) readout system

    SciTech Connect

    Reznik, Nikita; Komljenovic, Philip T.; Germann, Stephen; Rowlands, John A.

    2008-03-15

    A new amorphous selenium (a-Se) digital radiography detector is introduced. The proposed detector generates a charge image in the a-Se layer in a conventional manner, which is stored on electrode pixels at the surface of the a-Se layer. A novel method, called photoconductively activated switch (PAS), is used to read out the latent x-ray charge image. The PAS readout method uses lateral photoconduction at the a-Se surface which is a revolutionary modification of the bulk photoinduced discharge (PID) methods. The PAS method addresses and eliminates the fundamental weaknesses of the PID methods--long readout times and high readout noise--while maintaining the structural simplicity and high resolution for which PID optical readout systems are noted. The photoconduction properties of the a-Se surface were investigated and the geometrical design for the electrode pixels for a PAS radiography system was determined. This design was implemented in a single pixel PAS evaluation system. The results show that the PAS x-ray induced output charge signal was reproducible and depended linearly on the x-ray exposure in the diagnostic exposure range. Furthermore, the readout was reasonably rapid (10 ms for pixel discharge). The proposed detector allows readout of half a pixel row at a time (odd pixels followed by even pixels), thus permitting the readout of a complete image in 30 s for a 40 cmx40 cm detector with the potential of reducing that time by using greater readout light intensity. This demonstrates that a-Se based x-ray detectors using photoconductively activated switches could form a basis for a practical integrated digital radiography system.

  3. Digital radiography using amorphous selenium: photoconductively activated switch (PAS) readout system.

    PubMed

    Reznik, Nikita; Komljenovic, Philip T; Germann, Stephen; Rowlands, John A

    2008-03-01

    A new amorphous selenium (a-Se) digital radiography detector is introduced. The proposed detector generates a charge image in the a-Se layer in a conventional manner, which is stored on electrode pixels at the surface of the a-Se layer. A novel method, called photoconductively activated switch (PAS), is used to read out the latent x-ray charge image. The PAS readout method uses lateral photoconduction at the a-Se surface which is a revolutionary modification of the bulk photoinduced discharge (PID) methods. The PAS method addresses and eliminates the fundamental weaknesses of the PID methods--long readout times and high readout noise--while maintaining the structural simplicity and high resolution for which PID optical readout systems are noted. The photoconduction properties of the a-Se surface were investigated and the geometrical design for the electrode pixels for a PAS radiography system was determined. This design was implemented in a single pixel PAS evaluation system. The results show that the PAS x-ray induced output charge signal was reproducible and depended linearly on the x-ray exposure in the diagnostic exposure range. Furthermore, the readout was reasonably rapid (10 ms for pixel discharge). The proposed detector allows readout of half a pixel row at a time (odd pixels followed by even pixels), thus permitting the readout of a complete image in 30 s for a 40 cm x 40 cm detector with the potential of reducing that time by using greater readout light intensity. This demonstrates that a-Se based x-ray detectors using photoconductively activated switches could form a basis for a practical integrated digital radiography system. PMID:18404939

  4. Design Methodology: ASICs with complex in-pixel processing for Pixel Detectors

    SciTech Connect

    Fahim, Farah

    2014-10-31

    The development of Application Specific Integrated Circuits (ASIC) for pixel detectors with complex in-pixel processing using Computer Aided Design (CAD) tools that are, themselves, mainly developed for the design of conventional digital circuits requires a specialized approach. Mixed signal pixels often require parasitically aware detailed analog front-ends and extremely compact digital back-ends with more than 1000 transistors in small areas below 100μm x 100μm. These pixels are tiled to create large arrays, which have the same clock distribution and data readout speed constraints as in, for example, micro-processors. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout.

  5. Power Studies for the CMS Pixel Tracker

    SciTech Connect

    Todri, A.; Turqueti, M.; Rivera, R.; Kwan, S.; /Fermilab

    2009-01-01

    The Electronic Systems Engineering Department of the Computing Division at the Fermi National Accelerator Laboratory is carrying out R&D investigations for the upgrade of the power distribution system of the Compact Muon Solenoid (CMS) Pixel Tracker at the Large Hadron Collider (LHC). Among the goals of this effort is that of analyzing the feasibility of alternative powering schemes for the forward tracker, including DC to DC voltage conversion techniques using commercially available and custom switching regulator circuits. Tests of these approaches are performed using the PSI46 pixel readout chip currently in use at the CMS Tracker. Performance measures of the detector electronics will include pixel noise and threshold dispersion results. Issues related to susceptibility to switching noise will be studied and presented. In this paper, we describe the current power distribution network of the CMS Tracker, study the implications of the proposed upgrade with DC-DC converters powering scheme and perform noise susceptibility analysis.

  6. Development and characterization of 16-channel silicon photomultiplier prototype with sub-mm pixels for high-resolution PET system

    NASA Astrophysics Data System (ADS)

    Shimazoe, K.; Lipovec, A.; Takahashi, H.; Wiest, F.; Iskra, P.; Ganka, T.; Kamada, K.

    2014-11-01

    Silicon photomultipliers (SiPMs) are one of the most promising photodetectors for high-resolution PET systems because of their high gain and fast rise time. The resolution of a modern animal PET scanner is now in the sub-mm range; it has also been reported that an individual readout for pixels is necessary in order to achieve the theoretically best resolution. For achieving sub-mm resolution, a detector with pixelated crystals individually coupled to the photodetector is ideal. To this end, a prototype 16-channel SiPM with a pitch of 500μm was designed and fabricated, and its characteristics were studied. Several parameters, such as dark count rate (DCR), gain, crosstalk, and photon detection efficiency (PDE) are characterized in this study. The developed SiPM shows the performance required for future PET detector application.

  7. Application-specific architectures of CMOS monolithic active pixel sensors

    NASA Astrophysics Data System (ADS)

    Szelezniak, Michal; Besson, Auguste; Claus, Gilles; Colledani, Claude; Degerli, Yavuz; Deptuch, Grzegorz; Deveaux, Michael; Dorokhov, Andrei; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Grandjean, Damien; Guilloux, Fabrice; Heini, Sebastien; Himmi, Abdelkader; Hu, Christine; Jaaskelainen, Kimmo; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Pellicioli, Michel; Shabetai, Alexandre; Valin, Isabelle; Winter, Marc

    2006-11-01

    Several development directions intended to adapt and optimize monolithic active pixel sensors for specific applications are presented in this work. The first example, compatible with the STAR microvertex upgrade, is based on a simple two-transistor pixel circuitry. It is suited for a long integration time, room-temperature operation and minimum power dissipation. In another approach for this application, a specific readout method is proposed, allowing optimization of the integration time independently of the full frame-readout time. The circuit consists of an in-pixel front-end voltage amplifier, with a gain on the order of five, followed by two analog memory cells. The extended version of this scheme, based on the implementation of more memory cells per pixel, is the solution considered for the outer layers of a microvertex detector at the international linear collider. For the two innermost layers, a circuit allowing fast frame scans together with on-line, on-chip data sparsification is proposed. The first results of this prototype demonstrate that the fixed pattern dispersion is reduced below a noise level of 15 e -, allowing the use of a single comparator or a low-resolution ADC per pixel column. A common element for most of the mentioned readout schemes is a low-noise, low power consumption, layout efficient in-pixel amplifier. A review of possible solutions for this element together with some experimental results is presented.

  8. Novel integrated CMOS pixel structures for vertex detectors

    SciTech Connect

    Kleinfelder, Stuart; Bieser, Fred; Chen, Yandong; Gareus, Robin; Matis, Howard S.; Oldenburg, Markus; Retiere, Fabrice; Ritter, Hans Georg; Wieman, Howard H.; Yamamoto, Eugene

    2003-10-29

    Novel CMOS active pixel structures for vertex detector applications have been designed and tested. The overriding goal of this work is to increase the signal to noise ratio of the sensors and readout circuits. A large-area native epitaxial silicon photogate was designed with the aim of increasing the charge collected per struck pixel and to reduce charge diffusion to neighboring pixels. The photogate then transfers the charge to a low capacitance readout node to maintain a high charge to voltage conversion gain. Two techniques for noise reduction are also presented. The first is a per-pixel kT/C noise reduction circuit that produces results similar to traditional correlated double sampling (CDS). It has the advantage of requiring only one read, as compared to two for CDS, and no external storage or subtraction is needed. The technique reduced input-referred temporal noise by a factor of 2.5, to 12.8 e{sup -}. Finally, a column-level active reset technique is explored that suppresses kT/C noise during pixel reset. In tests, noise was reduced by a factor of 7.6 times, to an estimated 5.1 e{sup -} input-referred noise. The technique also dramatically reduces fixed pattern (pedestal) noise, by up to a factor of 21 in our tests. The latter feature may possibly reduce pixel-by-pixel pedestal differences to levels low enough to permit sparse data scan without per-pixel offset corrections.

  9. High-speed optical shutter coupled to fast-readout CCD camera

    NASA Astrophysics Data System (ADS)

    Yates, George J.; Pena, Claudine R.; McDonald, Thomas E., Jr.; Gallegos, Robert A.; Numkena, Dustin M.; Turko, Bojan T.; Ziska, George; Millaud, Jacques E.; Diaz, Rick; Buckley, John; Anthony, Glen; Araki, Takae; Larson, Eric D.

    1999-04-01

    A high frame rate optically shuttered CCD camera for radiometric imaging of transient optical phenomena has been designed and several prototypes fabricated, which are now in evaluation phase. the camera design incorporates stripline geometry image intensifiers for ultra fast image shutters capable of 200ps exposures. The intensifiers are fiber optically coupled to a multiport CCD capable of 75 MHz pixel clocking to achieve 4KHz frame rate for 512 X 512 pixels from simultaneous readout of 16 individual segments of the CCD array. The intensifier, Philips XX1412MH/E03 is generically a Generation II proximity-focused micro channel plate intensifier (MCPII) redesigned for high speed gating by Los Alamos National Laboratory and manufactured by Philips Components. The CCD is a Reticon HSO512 split storage with bi-direcitonal vertical readout architecture. The camera main frame is designed utilizing a multilayer motherboard for transporting CCD video signals and clocks via imbedded stripline buses designed for 100MHz operation. The MCPII gate duration and gain variables are controlled and measured in real time and up-dated for data logging each frame, with 10-bit resolution, selectable either locally or by computer. The camera provides both analog and 10-bit digital video. The camera's architecture, salient design characteristics, and current test data depicting resolution, dynamic range, shutter sequences, and image reconstruction will be presented and discussed.

  10. Single-Readout High-Density Memristor Crossbar.

    PubMed

    Zidan, M A; Omran, H; Naous, R; Sultan, A; Fahmy, H A H; Lu, W D; Salama, K N

    2016-01-01

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques. PMID:26738564

  11. Single-Readout High-Density Memristor Crossbar

    PubMed Central

    Zidan, M. A.; Omran, H.; Naous, R.; Sultan, A.; Fahmy, H. A. H.; Lu, W. D.; Salama, K. N.

    2016-01-01

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques. PMID:26738564

  12. Single-Readout High-Density Memristor Crossbar

    NASA Astrophysics Data System (ADS)

    Zidan, M. A.; Omran, H.; Naous, R.; Sultan, A.; Fahmy, H. A. H.; Lu, W. D.; Salama, K. N.

    2016-01-01

    High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

  13. Test of pixel detectors for laser-driven accelerated particle beams

    NASA Astrophysics Data System (ADS)

    Reinhardt, S.; Granja, C.; Krejci, F.; Assmann, W.

    2011-12-01

    Laser-driven accelerated (LDA) particle beams have due to the unique acceleration process very special properties. In particular they are created in ultra-short bunches of high intensity exceeding more than 107 \\frac{particles}{cm^{2} \\cdot ns} per bunch. Characterization of these beams is very limited with conventional particle detectors. Non-electronic detectors such as imaging plates or nuclear track detectors are, therefore, conventionally used at present. Moreover, all these detectors give only offline information about the particle pulse position and intensity as they require minutes to hours to be processed, calling for a new highly sensitive online device. Here, we present tests of different pixel detectors for real time detection of LDA ion pulses. Experiments have been performed at the Munich 14MV Tandem accelerator with 8-20 MeV protons in dc and pulsed beam, the latter producing comparable flux as a LDA ion pulse. For detection tests we chose the position-sensitive quantum-counting semiconductor pixel detector Timepix which also provides per-pixel energy- or time-sensitivity. Additionally other types of commercially available pixel detectors are being evaluated such as the RadEye™1, a large area (25 x 50 mm2) CMOS image sensor. All of these devices are able to resolve individual ions with high spatial- and energy-resolution down to the level of μm and tens of keV, respectively. Various beam delivering parameters of the accelerator were thus evaluated and verified. The different readout modes of the Timepix detector which is operated with an integrated USB-based readout interface allow online visualization of single and time-integrated events. Therefore Timepix offers the greatest potential in analyzing the beam parameters.

  14. Flexible readout and integration sensor (FRIS): a bio-inspired, system-on-chip, event-based readout architecture

    NASA Astrophysics Data System (ADS)

    Lin, Joseph H.; Pouliquen, Philippe O.; Andreou, Andreas G.; Goldberg, Arnold C.; Rizk, Charbel G.

    2012-06-01

    We present a bio-inspired system-on-chip focal plane readout architecture which at the system level, relies on an event based sampling scheme where only pixels within a programmable range of photon flux rates are output. At the pixel level, a one bit oversampled analog-to-digital converter together with a decimator allows for the quantization of signals up to 26 bits. Furthermore, digital non-uniformity correction of both gain and offset errors is applied at the pixel level prior to readout. We report test results for a prototype array fabricated in a standard 90nm CMOS process. Tests performed at room and cryogenic temperatures demonstrate the capability to operate at a temporal noise ratio as low as 1.5, an electron well capacity over 100Ge-, and an ADC LSB down to 1e-.

  15. Design of the small pixel pitch ROIC

    NASA Astrophysics Data System (ADS)

    Liang, Qinghua; Jiang, Dazhao; Chen, Honglei; Zhai, Yongcheng; Gao, Lei; Ding, Ruijun

    2014-11-01

    Since the technology trend of the third generation IRFPA towards resolution enhancing has steadily progressed,the pixel pitch of IRFPA has been greatly reduced.A 640×512 readout integrated circuit(ROIC) of IRFPA with 15μm pixel pitch is presented in this paper.The 15μm pixel pitch ROIC design will face many challenges.As we all known,the integrating capacitor is a key performance parameter when considering pixel area,charge capacity and dynamic range,so we adopt the effective method of 2 by 2 pixels sharing an integrating capacitor to solve this problem.The input unit cell architecture will contain two paralleled sample and hold parts,which not only allow the FPA to be operated in full frame snapshot mode but also save relatively unit circuit area.Different applications need more matching input unit circuits. Because the dimension of 2×2 pixels is 30μm×30μm, an input stage based on direct injection (DI) which has medium injection ratio and small layout area is proved to be suitable for middle wave (MW) while BDI with three-transistor cascode amplifier for long wave(LW). By adopting the 0.35μm 2P4M mixed signal process, the circuit architecture can make the effective charge capacity of 7.8Me- per pixel with 2.2V output range for MW and 7.3 Me- per pixel with 2.6V output range for LW. According to the simulation results, this circuit works well under 5V power supply and achieves less than 0.1% nonlinearity.

  16. FastPixN, a new integrated pixel chip for a future fast version of the IRSN - recoil proton telescope.

    PubMed

    Kachel, M; Husson, D; Higueret, S; Taforeau, J; Lebreton, L

    2014-10-01

    A first prototype of recoil proton telescope (RPT) is currently working at the AMANDE facility, being developed as a collaboration between IPHC Strasbourg and the LNE-IRSN. The device, able to measure both energy and fluence of neutron fields in the range of 5-20 MeV, has to be improved further, in order to reduce the considerable inelastic background generated by the neutrons inside the RPT itself. To achieve faster running cycles, the present complementary metal-oxide-semiconductor pixels used for proton tracking are to be replaced by a new integrated chip, specially developed for this application. The authors present a first version of this new element, with individual pixels readout at a 200-MHz frequency, with a fast 4-bit ADC for each column of 64 pixels. The measured performances point to a complete frame treatment in only 12.6 µs. With a readout speed multiplied by a factor 400 over the existing device, the authors expect a considerable improvement of the telescope at AMANDE, with the potential to reach neutron fluence rates up to 10(7) n cm(-2) s(-1) or more. PMID:24277876

  17. Beam test results for the BTeV silicon pixel detector

    SciTech Connect

    Jeffrey A. Appel, G. Chiodini et al.

    2000-09-28

    The authors report the results of the BTeV silicon pixel detector tests carried out in the MTest beam at Fermilab in 1999--2000. The pixel detector spatial resolution has been studied as a function of track inclination, sensor bias, and readout threshold.

  18. Studies of the possibility to use Gas Pixel Detector as a fast trigger tracking device

    NASA Astrophysics Data System (ADS)

    Sinev, N.; Bashindzhagyan, G.; Korotkova, N.; Romaniouk, A.; Tikhomirov, V.

    2016-02-01

    Gas Pixel Detector (GPD) technology offers new possibilities, which make them very attractive for application in existing and future accelerator experiments and beyond. GPDs combine advantages of silicon and gaseous detectors. They can be produced radiation hard and with low power consumption using relatively cheap technology. Low capacitance of the individual pixel channel allows us to obtain a large signal to noise ratio. Using a time projection method for GPD readout one obtains 3D track image with precise coordinate (31 µm) and angular information (0.40°). This feature would allow us to achieve performance of one GPD layer equal to a few layers of silicon detectors. Implementation of a fast readout and data processing at the front-end level allows one to reconstruct a track segment in less than 1 μs, and to use this information for the first level trigger generation. The relevant algorithms of data acquisition and analysis are described and the results of simulations are presented in this paper.

  19. Wire Bond Encapsulation for the CMS Forward Pixel Upgrade

    NASA Astrophysics Data System (ADS)

    Higginbotham, Sam; CMS Collaboration

    2015-04-01

    The Phase 1 upgrade of the pixel tracker for the CMS experiment will require the assembly of approximately 1000 modules consisting of pixel sensors bump bonded to readout chips. Electrical connections between the custom readout chips and support ASIC's that constitute the front-end of the pixel data acquisition system are made via wire bonds to a thin printed circuit board. Part of the assembly process carried out at Purdue University includes the partial encapsulation of the wire bonds for mechanical protection, prevention of electrolytic corrosion, and to damp oscillations due to Lorentz forces from transient current pulses in large magnetic fields. We present the details of the robotic assembly process which allows the deposition of the viscous encapsulant compound with 100 micron precision.

  20. FERA readout system for APEX

    NASA Astrophysics Data System (ADS)

    Gazes, S. B.; Perera, P. A. A.; Wolfs, F. L. H.

    1993-12-01

    A data acquisition system is described for processing energy and timing signals from large arrays of solid-state detectors and photomultiplier tubes. Signals are digitized using Fast Encoding and Readout ADCs (FERAs), and then downloaded to Data Stacks for subsequent readout via CAMAC. The acquisition electronics uses additional ECL modules to make logical decisions about data compression and synchronization. Three modes of readout are available, providing varying degrees of event compression. The system is characterized by a very short readout period, as well as the ease with which readout mode can be reconfigured. This FERA readout system is currently being used in the ATLAS Positron EXperiment (APEX) at Argonne National Laboratory.

  1. SOI monolithic pixel detector

    NASA Astrophysics Data System (ADS)

    Miyoshi, T.; Ahmed, M. I.; Arai, Y.; Fujita, Y.; Ikemoto, Y.; Takeda, A.; Tauchi, K.

    2014-05-01

    We are developing monolithic pixel detector using fully-depleted (FD) silicon-on-insulator (SOI) pixel process technology. The SOI substrate is high resistivity silicon with p-n junctions and another layer is a low resistivity silicon for SOI-CMOS circuitry. Tungsten vias are used for the connection between two silicons. Since flip-chip bump bonding process is not used, high sensor gain in a small pixel area can be obtained. In 2010 and 2011, high-resolution integration-type SOI pixel sensors, DIPIX and INTPIX5, have been developed. The characterizations by evaluating pixel-to-pixel crosstalk, quantum efficiency (QE), dark noise, and energy resolution were done. A phase-contrast imaging was demonstrated using the INTPIX5 pixel sensor for an X-ray application. The current issues and future prospect are also discussed.

  2. Progress on the design of a data push architecture for an array of optimized time tagging pixels

    SciTech Connect

    Shapiro, S.; Cords, D.; Mani, S.; Holbrook, B.; Atlas, E.

    1993-06-01

    A pixel array has been proposed which features a completely data driven architecture. A pixel cell has been designed that has been optimized for this readout. It retains the features of preceding designs which allow low noise operation, time stamping, analog signal processing, XY address recording, ghost elimination and sparse data transmission. The pixel design eliminates a number of problems inherent in previous designs, by the use of sampled data techniques, destructive readout, and current mode output drivers. This architecture and pixel design is directed at applications such as a forward spectrometer at the SSC, an e{sup +}e{sup {minus}} B factory at SLAC, and fixed target experiments at FNAL.

  3. Uncooled infrared detectors toward smaller pixel pitch with newly proposed pixel structure

    NASA Astrophysics Data System (ADS)

    Tohyama, Shigeru; Sasaki, Tokuhito; Endoh, Tsutomu; Sano, Masahiko; Kato, Koji; Kurashina, Seiji; Miyoshi, Masaru; Yamazaki, Takao; Ueno, Munetaka; Katayama, Haruyoshi; Imai, Tadashi

    2013-12-01

    An uncooled infrared (IR) focal plane array (FPA) with 23.5 μm pixel pitch has been successfully demonstrated and has found wide commercial applications in the areas of thermography, security cameras, and other applications. One of the key issues for uncooled IRFPA technology is to shrink the pixel pitch because the size of the pixel pitch determines the overall size of the FPA, which, in turn, determines the cost of the IR camera products. This paper proposes an innovative pixel structure with a diaphragm and beams placed in different levels to realize an uncooled IRFPA with smaller pixel pitch (≦17 μm). The upper level consists of a diaphragm with VOx bolometer and IR absorber layers, while the lower level consists of the two beams, which are designed to be placed on the adjacent pixels. The test devices of this pixel design with 12, 15, and 17 μm pitch have been fabricated on the Si read-out integrated circuit (ROIC) of quarter video graphics array (QVGA) (320×240) with 23.5 μm pitch. Their performances are nearly equal to those of the IRFPA with 23.5 μm pitch. For example, a noise equivalent temperature difference of 12 μm pixel is 63.1 mK for F/1 optics with the thermal time constant of 14.5 ms. Then, the proposed structure is shown to be effective for the existing IRFPA with 23.5 μm pitch because of the improvements in IR sensitivity. Furthermore, the advanced pixel structure that has the beams composed of two levels are demonstrated to be realizable.

  4. Design and implementation of Gm-APD array readout integrated circuit for infrared 3D imaging

    NASA Astrophysics Data System (ADS)

    Zheng, Li-xia; Yang, Jun-hao; Liu, Zhao; Dong, Huai-peng; Wu, Jin; Sun, Wei-feng

    2013-09-01

    A single-photon detecting array of readout integrated circuit (ROIC) capable of infrared 3D imaging by photon detection and time-of-flight measurement is presented in this paper. The InGaAs avalanche photon diodes (APD) dynamic biased under Geiger operation mode by gate controlled active quenching circuit (AQC) are used here. The time-of-flight is accurately measured by a high accurate time-to-digital converter (TDC) integrated in the ROIC. For 3D imaging, frame rate controlling technique is utilized to the pixel's detection, so that the APD related to each pixel should be controlled by individual AQC to sense and quench the avalanche current, providing a digital CMOS-compatible voltage pulse. After each first sense, the detector is reset to wait for next frame operation. We employ counters of a two-segmental coarse-fine architecture, where the coarse conversion is achieved by a 10-bit pseudo-random linear feedback shift register (LFSR) in each pixel and a 3-bit fine conversion is realized by a ring delay line shared by all pixels. The reference clock driving the LFSR counter can be generated within the ring delay line Oscillator or provided by an external clock source. The circuit is designed and implemented by CSMC 0.5μm standard CMOS technology and the total chip area is around 2mm×2mm for 8×8 format ROIC with 150μm pixel pitch. The simulation results indicate that the relative time resolution of the proposed ROIC can achieve less than 1ns, and the preliminary test results show that the circuit function is correct.

  5. Radiation experience with the CMS pixel detector

    NASA Astrophysics Data System (ADS)

    Veszpremi, V.

    2015-04-01

    The CMS pixel detector is the innermost component of the CMS tracker occupying the region around the centre of CMS, where the LHC beams are crossed, between 4.3 cm and 30 cm in radius and 46.5 cm along the beam axis. It operates in a high-occupancy and high-radiation environment created by particle collisions. Studies of radiation damage effects to the sensors were performed throughout the first running period of the LHC . Leakage current, depletion voltage, pixel readout thresholds, and hit finding efficiencies were monitored as functions of the increasing particle fluence. The methods and results of these measurements will be described together with their implications to detector operation as well as to performance parameters in offline hit reconstruction.

  6. PixelLearn

    NASA Technical Reports Server (NTRS)

    Mazzoni, Dominic; Wagstaff, Kiri; Bornstein, Benjamin; Tang, Nghia; Roden, Joseph

    2006-01-01

    PixelLearn is an integrated user-interface computer program for classifying pixels in scientific images. Heretofore, training a machine-learning algorithm to classify pixels in images has been tedious and difficult. PixelLearn provides a graphical user interface that makes it faster and more intuitive, leading to more interactive exploration of image data sets. PixelLearn also provides image-enhancement controls to make it easier to see subtle details in images. PixelLearn opens images or sets of images in a variety of common scientific file formats and enables the user to interact with several supervised or unsupervised machine-learning pixel-classifying algorithms while the user continues to browse through the images. The machinelearning algorithms in PixelLearn use advanced clustering and classification methods that enable accuracy much higher than is achievable by most other software previously available for this purpose. PixelLearn is written in portable C++ and runs natively on computers running Linux, Windows, or Mac OS X.

  7. The STAR Heavy Flavor Tracker PXL detector readout electronics

    NASA Astrophysics Data System (ADS)

    Schambach, J.; Contin, G.; Greiner, L.; Stezelberger, T.; Sun, X.; Szelezniak, M.; Vu, C.

    2016-01-01

    The Heavy Flavor Tracker (HFT) is a recently installed micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders. The two innermost layers of the HFT close to the beam pipe, the Pixel ("PXL") subsystem, employ CMOS Monolithic Active Pixel Sensor (MAPS) technology that integrate the sensor, front-end electronics, and zero-suppression circuitry in one silicon die. This paper presents selected characteristics of the PXL detector part of the HFT and the hardware, firmware and software associated with the readout system for this detector.

  8. Comparative analysis of 4x288 readouts and FPAs

    NASA Astrophysics Data System (ADS)

    Sizov, Fiodor F.; Reva, Vladimir P.; Derkach, Yurii P.; Vasiliev, Vladimir V.

    2005-10-01

    Comparative analysis of four 4x288 different designed readouts elaborated at the Institute of Microdevices and the Institute of Semiconductor Physics is presented. Also some features of design 576x6 readouts adduced. All the readouts have the direct injection input circuit with incorporated cells allowing testing without photodiodes. TDI registers have three delay elements between neighbor inputs. Some characteristics of 4x288 FPAs with mercury-cadmium-telluride TDI arrays are cited too. 2-phase and 4-phase CCD readouts (2.5 micron technology) have different channel types (surface, buried and semi-buried), which include 10 bit TDI registers in each channel, and 18 channel multiplexing to 16 outputs. Two polysili-con, one metal level and 400 A dielectric layers were used. The readouts characteristics: charge handling capacity, transfer characteristics, output nonlinearity characteristics, bias dispersion, etc. are presented. CCD technology used for data multiplication results in crosstalk increase, because of the presence of rather considerable transfer inefficiency at cryogenic temperatures. Using 2.5 micron CCD technology and 2.0 CMOS technology the readouts, which include the digital interface for dead pixels deselection, preliminary amplification circuits, 36 channel multiplication by CCD registers and 2 beat multiplication by analogue switches to 4 output amplifiers, were manufactured. One pocket CMOS technology with two polysilicon, two metal levels and 350 A dielectric layers were used. To increase the linearity of transfer characteristics and noise level decrease at the output of CCD the circuits of charge-voltage conversion on the base of operational amplifiers were used. This allows getting circuits with parameters close to those obtained by 0.8 - 1.0 micron CMOS technology. Also some characteristics of 4x288 readouts designed by 1.2 micron CMOS technology are discussed (two polysilicon and two metal levels). This one includes the circuits of auxiliary

  9. Pixel telescope test in STAR at RHIC

    NASA Astrophysics Data System (ADS)

    Sun, Xiangming; Szelezniak, Michal; Greiner, Leo; Matis, Howard; Vu, Chinh; Stezelberger, Thorsten; Wieman, Howard

    2007-10-01

    The STAR experiment at RHIC is designing a new inner vertex detector called the Heavy Flavor Tracker (HFT). The HFT's innermost two layers is called the PIXEL detector which uses Monolithic Active Pixel Sensor technology (MAPS). To test the MAPS technology, we just constructed and tested a telescope. The telescope uses a stack of three MIMOSTAR2 chips, Each MIMOSTAR2 sensor, which was designed by IPHC, is an array of 132x128 pixels with a square pixel size of 30 μ. The readout of the telescope makes use of the ALICE DDL/SIU cards, which is compatible with the future STAR data acquisition system called DAQ1000. The telescope was first studied in a 1.2 GeV/c electron beam at LBNL's Advanced Light Source. Afterwards, the telescope was outside the STAR magnet, and then later inside it, 145 cm away from STAR's center. We will describe this first test of MAPS technology in a collider environment, and report on the occupancy, particle flux, and performance of the telescope.

  10. Research of infrared image optimization algorithm in optical read-out IR imaging

    NASA Astrophysics Data System (ADS)

    Wu, Jianxiong; Cheng, Teng; Zhang, Qingchuan; Gao, Jie; Wu, Xiaoping

    2014-09-01

    Different from traditional electrical readout infrared imaging, optical readout infrared imaging system readout the thermo-mechanical response of focal plane array via visible light. Due to the different parameters of the optical system, usually,the infrared thermal image pixel corresponding to the thermal element of focal plane array is not consistent. And the substrate-free focal plane array brings thermal crosstalk, the image blur. This manuscript analyzes the optical readout infrared imaging principle, proposes an one to one correspondence method between the infrared thermal image pixel and the thermal element of focal plane array, optimizes the digital infrared image by the thermal crosstalk on substrate-free focal plane array. Simulation and experiments show that the algorithm can effectively enhance the contours of the infrared image detail, enhancing image quality.

  11. Thin active region, type II superlattice photodiode arrays: Single-pixel and focal plane array characterization

    NASA Astrophysics Data System (ADS)

    Little, J. W.; Svensson, S. P.; Beck, W. A.; Goldberg, A. C.; Kennerly, S. W.; Hongsmatip, T.; Winn, M.; Uppal, P.

    2007-02-01

    We have measured the radiometric properties of two midwave infrared photodiode arrays (320×256pixel2 format) fabricated from the same wafer comprising a thin (0.24μm), not intentionally doped InAs /GaSb superlattice between a p-doped GaSb layer and a n-doped InAs layer. One of the arrays was indium bump bonded to a silicon fanout chip to allow for the measurement of properties of individual pixels, and one was bonded to a readout integrated circuit to enable array-scale measurements and infrared imaging. The superlattice layer is thin enough that it is fully depleted at zero bias, and the collection efficiency of photogenerated carriers in the intrinsic region is close to unity. This simplifies the interpretation of photocurrent data as compared with previous measurements made on thick superlattices with complex doping profiles. Superlattice absorption coefficient curves, obtained from measurements of the external quantum efficiency using two different assumptions for optical coupling into the chip, bracket values calculated using an eight-band k •p model. Measurements of the quantum efficiency map of the focal plane array were in good agreement with the single-pixel measurements. Imagery obtained with this focal plane array demonstrates the high uniformity and crystal quality of the type II superlattice material.

  12. Cool Timepix - Electronic noise of the Timepix readout chip down to -125 °C

    NASA Astrophysics Data System (ADS)

    Schön, R.; Alfonsi, M.; van Bakel, N.; van Beuzekom, M.; Koffeman, E.

    2015-01-01

    The Timepix readout chip with its 65k pixels on a sensitive area of 14 mm×14 mm provides a fine spatial resolution for particle tracking or medical imaging. We explore the operation of Timepix in a dual-phase xenon environment (around -110 °C). Used in dual-phase xenon time projection chambers, e.g. for dark matter search experiments, the readout must have a sufficiently low detection limit for small energy deposits. We measured the electronic pixel noise of three bare Timepix chips. For the first time Timepix readout chips were cooled to temperatures as low as -125 °C. In this work, we present the results of analysing noise transition curves recorded while applying a well-defined charge to the pixel's input. The electronic noise reduces to an average of 99e-, a reduction of 23% compared to operation at room temperature.

  13. Semiconductor arrays with multiplexer readout for gamma-ray imaging: results for a 48 × 48 Ge array

    NASA Astrophysics Data System (ADS)

    Barber, H. B.; Augustine, F. L.; Barrett, H. H.; Dereniak, E. L.; Matherson, K. L.; Meyers, T. J.; Perry, D. L.; Venzon, J. E.; Woolfenden, J. M.; Young, E. T.

    1994-12-01

    We are developing a new kind of gamma-ray imaging device that has sub-millimeter spatial resolution and excellent energy resolution. The device is composed of a slab of semiconductor detector partitioned into an array of detector cells by photolithography and connected to a monolithic circuit chip called a multiplexer (MUX) for readout. Our application is for an ultra-high-resolution SPECT system for functional brain imaging using an injected radiotracer. We report here on results obtained with a Hughes 48 × 48 Ge PIN-photodiode array with MUX readout, originally developed as an infrared focal-plane-array imaging sensor. The device functions as an array of individual gamma-ray detectors with minimal interpixel crosstalk. Linearity of energy response is excellent up to at least 140 keV. The array exhibits excellent energy resolution, ˜ 2 keV at ≤ 140 keV or 1.5% FWHM at 140 keV. The energy resolution is dominated by MUX readout noise and so should improve with MUX optimization for gamma-ray detection. The spatial resolution of the 48 × 48 Ge array is essentially the same as the pixel spacing, 125 μm. The quantum efficiency is limited by the thin Ge detector (0.25 mm), but this approach is readily applicable to thicker Ge detectors and room-temperature semiconductor detectors such as CdTe, HgI 2 and CdZnTe.

  14. Hybrid Pixel Detectors for gamma/X-ray imaging

    NASA Astrophysics Data System (ADS)

    Hatzistratis, D.; Theodoratos, G.; Zografos, V.; Kazas, I.; Loukas, D.; Lambropoulos, C. P.

    2015-09-01

    Hybrid pixel detectors are made by direct converting high-Z semi-insulating single crystalline material coupled to complementary-metal-oxide semiconductor (CMOS) readout electronics. They are attractive because direct conversion exterminates all the problems of spatial localization related to light diffusion, energy resolution, is far superior from the combination of scintillation crystals and photomultipliers and lithography can be used to pattern electrodes with very fine pitch. We are developing 2-D pixel CMOS ASICs, connect them to pixilated CdTe crystals with the flip chip and bump bonding method and characterize the hybrids. We have designed a series of circuits, whose latest member consists of a 50×25 pixel array with 400um pitch and an embedded controller. In every pixel a full spectroscopic channel with time tagging information has been implemented. The detectors are targeting Compton scatter imaging and they can be used for coded aperture imaging too. Hybridization using CMOS can overcome the limit put on pixel circuit complexity by the use of thin film transistors (TFT) in large flat panels. Hybrid active pixel sensors are used in dental imaging and other applications (e.g. industrial CT etc.). Thus X-ray imaging can benefit from the work done on dynamic range enhancement methods developed initially for visible and infrared CMOS pixel sensors. A 2-D CMOS ASIC with 100um pixel pitch to demonstrate the feasibility of such methods in the context of X-ray imaging has been designed.

  15. Characterization results of the JUNGFRAU full scale readout ASIC

    NASA Astrophysics Data System (ADS)

    Mozzanica, A.; Bergamaschi, A.; Brueckner, M.; Cartier, S.; Dinapoli, R.; Greiffenberg, D.; Jungmann-Smith, J.; Maliakal, D.; Mezza, D.; Ramilli, M.; Ruder, C.; Schaedler, L.; Schmitt, B.; Shi, X.; Tinti, G.

    2016-02-01

    The two-dimensional pixel detector JUNGFRAU is designed for high performance photon science applications at free electron lasers and synchrotron light sources. It is developed for the SwissFEL currently under construction at the Paul Scherrer Institut, Switzerland. The detector is a hybrid pixel detector with a charge integration readout ASIC characterized by single photon sensitivity and a low noise performance over a dynamic range of 104 12 keV photons. Geometrically, a JUNGFRAU readout chip consists of 256×256 pixels of 75×75 μm2. The chips are bump bonded to 320 μm thick silicon sensors. Arrays of 2×4 chips are tiled to form modules of 4×8 cm2 area. Several multi-module systems with up to 16 Mpixels per system will be delivered to the two end stations at SwissFEL. The JUNGFRAU full scale readout ASIC and module design are presented along with characterization results of the first systems. Experiments from fluorescence X-ray, visible light illumination, and synchrotron irradiation are shown. The results include an electronic noise of ~50 electrons r.m.s., which enables single photon detection energies below 2 keV and a noise well below the Poisson statistical limit over the entire dynamic range. First imaging experiments are also shown.

  16. Two-dimensional pixel array image sensor for protein crystallography

    SciTech Connect

    Beuville, E.; Beche, J.-F.; Cork, C.

    1996-07-01

    A 2D pixel array image sensor module has been designed for time resolved Protein Crystallography. This smart pixels detector significantly enhances time resolved Laue Protein crystallography by two to three orders of magnitude compared to existing sensors like films or phosphor screens coupled to CCDs. The resolution in time and dynamic range of this type of detector will allow one to study the evolution of structural changes that occur within the protein as a function of time. This detector will also considerably accelerate data collection in static Laue or monochromatic crystallography and make better use of the intense beam delivered by synchrotron light sources. The event driven pixel array detectors, based on the column Architecture, can provide multiparameter information (energy discrimination, time), with sparse and frameless readout without significant dead time. The prototype module consists of a 16x16 pixel diode array bump-bonded to the integrated circuit. The detection area is 150x150 square microns.

  17. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2000-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  18. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  19. Sensor readout detector circuit

    DOEpatents

    Chu, D.D.; Thelen, D.C. Jr.

    1998-08-11

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

  20. Sensor readout detector circuit

    DOEpatents

    Chu, Dahlon D.; Thelen, Jr., Donald C.

    1998-01-01

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

  1. Interconnect and bonding techniques for pixelated X-ray and gamma-ray detectors

    NASA Astrophysics Data System (ADS)

    Schneider, A.; Veale, M. C.; Duarte, D. D.; Bell, S. J.; Wilson, M. D.; Lipp, J. D.; Seller, P.

    2015-02-01

    In the last decade, the Detector Development Group at the Technology Department of the Science and Technology Facilities Council (STFC), U.K., established a variety of fabrication and bonding techniques to build pixelated X-ray and γ-ray detector systems such as the spectroscopic X-ray imaging detector HEXITEC [1]. The fabrication and bonding of such devices comprises a range of processes including material surface preparation, photolithography, stencil printing, flip-chip and wire bonding of detectors to application-specific integrated circuits (ASIC). This paper presents interconnect and bonding techniques used in the fabrication chain for pixelated detectors assembled at STFC. For this purpose, detector dies (~ 20× 20 mm2) of high quality, single crystal semiconductors, such as cadmium zinc telluride (CZT) are cut to the required thickness (up to 5mm). The die surfaces are lapped and polished to a mirror-finish and then individually processed by electroless gold deposition combined with photolithography to form 74× 74 arrays of 200 μ m × 200 μ m pixels with 250 μ m pitch. Owing to a lack of availability of CZT wafers, lithography is commonly carried out on individual detector dies which represents a significant technical challenge as the edge of the pixel array and the surrounding guard band lies close to the physical edge of the crystal. Further, such detector dies are flip-chip bonded to readout ASIC using low-temperature curing silver-loaded epoxy so that the stress between the bonded detector die and the ASIC is minimized. In addition, this reduces crystalline modifications of the detector die that occur at temperature greater than 150\\r{ }C and have adverse effects on the detector performance. To allow smaller pitch detectors to be bonded, STFC has also developed a compression cold-weld indium bump bonding technique utilising bumps formed by a photolithographic lift-off technique.

  2. Pixel Detectors For Diffraction Experiments At The Swiss Light Source

    SciTech Connect

    Huelsen, G.; Eikenberry, E.F.; Schmitt, B.; Schulze-Briese, C.; Tomizaki, T.; Stampanoni, M.; Willmott, P.; Patterson, B.; Broennimann, Ch.; Horisberger, R.; Toyokawa, H.; Borchert, G. L.

    2004-05-12

    The PILATUS detector (Pixel Apparatus for the SLS) is a large, quantum-limited area X-ray detector for protein crystallography which is currently under construction. Its basic units are modules with 16 CMOS chips bump-bonded to a large, continuously sensitive silicon sensor with 157x366 pixels of 217x217 {mu}m2, leading to an active area of 34x80 mm2. With a counting circuit in each pixel, X-rays are detected in single photon counting mode, leading to excellent, noise-free data. The main properties of the detector are an energy range of 6 to 30 keV, no back-ground due to leakage current or readout-noise, fast read-out time of 6.7 ms, a rate/pixel >104/s and a PSF of one pixel. PILATUS detectors are installed at the SLS X06SA protein crystallography beamline, and at both the surface diffraction (SD) station and the radiography and tomography (XTM) station of beamline X04SA. The detectors are operated at room temperature and thus are very easy to use. Experiments benefit from the ability to detect very weak diffraction spots with high precision. At the SD station and at the XTM station, which is equipped with a Bragg magnifier, diffraction, radiography and tomography experiments showed promising results. At beamline X06SA, a three-module array (1120x157 pixels) with a readout time of 6.7 ms was tested. This system was used to collect fine phi-sliced protein crystal data in continuous sample rotation mode in which the crystal was continuously rotated with a slow angular velocity of 0.04 deg./s without any shutter operation. Exposure time per frame ranged from 100 ms to a few seconds, depending on the crystal. These initial experiments show the potential of this method.

  3. Readout Techniques for Drift and Low Frequency Noise Rejection in Infrared Arrays

    NASA Astrophysics Data System (ADS)

    Finger, G.; Dorn, R. J.; Hoffman, A. W.; Mehrgan, H.; Meyer, M.; Moorwood, A. F. M.; Steigmeier, J.

    Three different methods are presented to subtract thermal drifts and low-frequency noise from the signal of infrared array. The first is dead pixels with open Indium bumps, the second is reference output as implemented on the Hawaii2 multiplexer, and the third is dark pixels to emulate reference cells having a capacity connected to the gate of the unit cell field-effect transistor (FET). The third method is the most effective and yields a reduction in readout noise from 15.4-9.4 erms. A novel method will be described to extend this readout technique to the Aladdin 1Kx1K InSb array.

  4. Development of a high density pixel multichip module at Fermilab

    SciTech Connect

    Cardoso, G.

    2001-03-08

    At Fermilab, both pixel detector multichip module and sensor hybridization are being developed for the BTeV experiment. The BTeV pixel detector is based on a design relying on a hybrid approach. With this approach, the readout chip and the sensor array are developed separately and the detector is constructed by flip-chip mating the two together. This method offers maximum flexibility in the development process, choice of fabrication technologies, and the choice of sensor material. This paper presents strategies to handle the required data rate and performance results of the first prototype and detector hybridization.

  5. Current progress on pixel level packaging for uncooled IRFPA

    NASA Astrophysics Data System (ADS)

    Dumont, G.; Rabaud, W.; Yon, J.-J.; Carle, L.; Goudon, V.; Vialle, C.; Becker, Sébastien; Hamelin, Antoine; Arnaud, A.

    2012-06-01

    Vacuum packaging is definitely a major cost driver for uncooled IRFPA and a technological breakthrough is still expected to comply with the very low cost infrared camera market. To address this key issue, CEA-LETI is developing a Pixel Level Packaging (PLP) technology which basically consists in capping each pixel under vacuum in the direct continuation of the wafer level bolometer process. Previous CEA-LETI works have yet shown the feasibility of PLP based microbolometers that exhibit the required thermal insulation and vacuum achievement. CEA-LETI is still pushing the technology which has been now applied for the first time on a CMOS readout circuit. The paper will report on the recent progress obtained on PLP technology with particular emphasis on the optical efficiency of the PLP arrangement compared to the traditional microbolometer packaging. Results including optical performances, aging studies and compatibility with CMOS readout circuit are extensively presented.

  6. Methodological Study of a Single Photon Counting Pixel Detector at SPring-8

    SciTech Connect

    Toyokawa, H.; Suzuki, M.; Broennimann, Ch.; Eikenberry, E. F.; Henrich, B.; Huelsen, G.; Kraft, P.

    2007-01-19

    PILATUS (Pixel Apparatus for the SLS) is a challenging project to develop a large area single photon counting pixel detector for synchrotron radiation experiments. SPring-8 examined the PLATUS single module detectors in collaboration with the Paul Scherrer Institute. The PILATUS-II single module detector has a desired performance with almost zero defective pixels and a fast frame rate up to 100 Hz using a newly developed PCI readout system on a Linux-PC. The maximum counting rate achieves more than 2 x 106 X-rays/s/pixel.

  7. High density pixel array

    NASA Technical Reports Server (NTRS)

    Wiener-Avnear, Eliezer (Inventor); McFall, James Earl (Inventor)

    2004-01-01

    A pixel array device is fabricated by a laser micro-milling method under strict process control conditions. The device has an array of pixels bonded together with an adhesive filling the grooves between adjacent pixels. The array is fabricated by moving a substrate relative to a laser beam of predetermined intensity at a controlled, constant velocity along a predetermined path defining a set of grooves between adjacent pixels so that a predetermined laser flux per unit area is applied to the material, and repeating the movement for a plurality of passes of the laser beam until the grooves are ablated to a desired depth. The substrate is of an ultrasonic transducer material in one example for fabrication of a 2D ultrasonic phase array transducer. A substrate of phosphor material is used to fabricate an X-ray focal plane array detector.

  8. Medipix2 parallel readout system

    NASA Astrophysics Data System (ADS)

    Fanti, V.; Marzeddu, R.; Randaccio, P.

    2003-08-01

    A fast parallel readout system based on a PCI board has been developed in the framework of the Medipix collaboration. The readout electronics consists of two boards: the motherboard directly interfacing the Medipix2 chip, and the PCI board with digital I/O ports 32 bits wide. The device driver and readout software have been developed at low level in Assembler to allow fast data transfer and image reconstruction. The parallel readout permits a transfer rate up to 64 Mbytes/s. http://medipix.web.cern ch/MEDIPIX/

  9. Pixel-One

    NASA Astrophysics Data System (ADS)

    Pedichini, F.; Di Paola, A.; Testa, V.

    2010-07-01

    The early future of astronomy will be dominated by Extremely Large Telescopes where the focal lengths will be of the order of several hundred meters. This yields focal plane sizes of roughly one square meter to obtain a field of view of about 5 x 5 arcmin. When operated in seeing limited mode this field is correctly sampled with 1x1mm pixels. Such a sampling can be achieved using a peculiar array of tiny CMOS active photodiodes illuminated through microlenses or lightpipes. If the photodiode is small enough and utilizes the actual pixel technology, its dark current can be kept well below the sky background photocurrent, thus avoiding the use of cumbersome cryogenics systems. An active smart electronics will manage each pixel up to the A/D conversion and data transfer. This modular block is the Pixel-One. A 30x30 mm tile filled with 1000 Pixel-Ones could be the basic unit to mosaic very large focal planes. By inserting dispersion elements inside the optical path of the lenslet array one could also produce a low dispersed spectrum of each focal plane sub-aperture and, by using an array of few smart photodiodes, also get multi-wavelength information in the optical band for each equivalent focal plane pixel. An application to the E-ELT is proposed.

  10. Advanced Solid State Pixel Detectors for Future High Energy X-ray Missions

    NASA Astrophysics Data System (ADS)

    Harrison, Fiona

    We propose to advance the state of the art in solid state high energy X-ray pixel detectors for astrophysics. This program builds on advanced readout technology developed for suborbital and the NuSTAR space mission, and combines newly-developed CdTe PIN sensors and materials characterization techniques to achieve detectors broad band (1 - 200 keV), sub-keV energy resolution, and 300 micron spatial resolution. The low-noise readout technology will also be taken to the next generation with reduced pixel size, lower noise and significantly reduced dead time.

  11. Semiconductor detectors with proximity signal readout

    SciTech Connect

    Asztalos, Stephen J.

    2014-01-30

    Semiconductor-based radiation detectors are routinely used for the detection, imaging, and spectroscopy of x-rays, gamma rays, and charged particles for applications in the areas of nuclear and medical physics, astrophysics, environmental remediation, nuclear nonproliferation, and homeland security. Detectors used for imaging and particle tracking are more complex in that they typically must also measure the location of the radiation interaction in addition to the deposited energy. In such detectors, the position measurement is often achieved by dividing or segmenting the electrodes into many strips or pixels and then reading out the signals from all of the electrode segments. Fine electrode segmentation is problematic for many of the standard semiconductor detector technologies. Clearly there is a need for a semiconductor-based radiation detector technology that can achieve fine position resolution while maintaining the excellent energy resolution intrinsic to semiconductor detectors, can be fabricated through simple processes, does not require complex electrical interconnections to the detector, and can reduce the number of required channels of readout electronics. Proximity electrode signal readout (PESR), in which the electrodes are not in physical contact with the detector surface, satisfies this need.

  12. Characterization of Pixelated Cadmium-Zinc-Telluride Detectors for Astrophysical Applications

    NASA Technical Reports Server (NTRS)

    Gaskin, Jessica; Sharma, Dharma; Ramsey, Brian; Seller, Paul

    2003-01-01

    Comparisons of charge sharing and charge loss measurements between two pixelated Cadmium-Zinc-Telluride (CdZnTe) detectors are discussed. These properties along with the detector geometry help to define the limiting energy resolution and spatial resolution of the detector in question. The first detector consists of a 1-mm-thick piece of CdZnTe sputtered with a 4x4 array of pixels with pixel pitch of 750 microns (inter-pixel gap is 100 microns). Signal readout is via discrete ultra-low-noise preamplifiers, one for each of the 16 pixels. The second detector consists of a 2-mm-thick piece of CdZnTe sputtered with a 16x16 array of pixels with a pixel pitch of 300 microns (inter-pixel gap is 50 microns). This crystal is bonded to a custom-built readout chip (ASIC) providing all front-end electronics to each of the 256 independent pixels. These detectors act as precursors to that which will be used at the focal plane of the High Energy Replicated Optics (HERO) telescope currently being developed at Marshall Space Flight Center. With a telescope focal length of 6 meters, the detector needs to have a spatial resolution of around 200 microns in order to take full advantage of the HERO angular resolution. We discuss to what degree charge sharing will degrade energy resolution but will improve our spatial resolution through position interpolation.

  13. ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

    NASA Technical Reports Server (NTRS)

    Vasile, Stefan; Lipson, Jerold

    2012-01-01

    The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

  14. Automatic readout micrometer

    SciTech Connect

    Lauritzen, T.

    1982-03-23

    A measuring system is disclosed for surveying and very accurately positioning objects with respect to a reference line. A principal use of this surveying system is for accurately aligning the electromagnets which direct a particle beam emitted from a particle accelerator. Prior art surveying systems require highly skilled surveyors. Prior art systems include, for example, optical surveying systems which are susceptible to operator reading errors, and celestial navigation-type surveying systems, with their inherent complexities. The present invention provides an automatic readout micrometer which can very accurately measure distances. The invention has a simplicity of operation which practically eliminates the possibilities of operator optical reading error, owning to the elimination of traditional optical alignments for making measurements. The invention has an extendable arm which carries a laser surveying target. The extendable arm can be continuously positioned over its entire length of travel by either a coarse or fine adjustment without having the fine adjustment outrun the coarse adjustment until a reference laser beam is centered on the target as indicated by a digital readout. The length of the micrometer can then be accurately and automatically read by a computer and compared with a standardized set of alignment measurements. Due to its construction, the micrometer eliminates any errors due to temperature changes when the system is operated within a standard operating temperature range.

  15. Automatic readout micrometer

    DOEpatents

    Lauritzen, T.

    A measuring system is described for surveying and very accurately positioning objects with respect to a reference line. A principle use of this surveying system is for accurately aligning the electromagnets which direct a particle beam emitted from a particle accelerator. Prior art surveying systems require highly skilled surveyors. Prior art systems include, for example, optical surveying systems which are susceptible to operator reading errors, and celestial navigation-type surveying systems, with their inherent complexities. The present invention provides an automatic readout micrometer which can very accurately measure distances. The invention has a simplicity of operation which practically eliminates the possibilities of operator optical reading error, owning to the elimination of traditional optical alignments for making measurements. The invention has an extendable arm which carries a laser surveying target. The extendable arm can be continuously positioned over its entire length of travel by either a coarse of fine adjustment without having the fine adjustment outrun the coarse adjustment until a reference laser beam is centered on the target as indicated by a digital readout. The length of the micrometer can then be accurately and automatically read by a computer and compared with a standardized set of alignment measurements. Due to its construction, the micrometer eliminates any errors due to temperature changes when the system is operated within a standard operating temperature range.

  16. Automatic readout micrometer

    DOEpatents

    Lauritzen, Ted

    1982-01-01

    A measuring system is disclosed for surveying and very accurately positioning objects with respect to a reference line. A principal use of this surveying system is for accurately aligning the electromagnets which direct a particle beam emitted from a particle accelerator. Prior art surveying systems require highly skilled surveyors. Prior art systems include, for example, optical surveying systems which are susceptible to operator reading errors, and celestial navigation-type surveying systems, with their inherent complexities. The present invention provides an automatic readout micrometer which can very accurately measure distances. The invention has a simplicity of operation which practically eliminates the possibilities of operator optical reading error, owning to the elimination of traditional optical alignments for making measurements. The invention has an extendable arm which carries a laser surveying target. The extendable arm can be continuously positioned over its entire length of travel by either a coarse or fine adjustment without having the fine adjustment outrun the coarse adjustment until a reference laser beam is centered on the target as indicated by a digital readout. The length of the micrometer can then be accurately and automatically read by a computer and compared with a standardized set of alignment measurements. Due to its construction, the micrometer eliminates any errors due to temperature changes when the system is operated within a standard operating temperature range.

  17. A new method to improve multiplication factor in micro-pixel avalanche photodiodes with high pixel density

    NASA Astrophysics Data System (ADS)

    Sadygov, Z.; Ahmadov, F.; Khorev, S.; Sadigov, A.; Suleymanov, S.; Madatov, R.; Mehdiyeva, R.; Zerrouk, F.

    2016-07-01

    Presented is a new model describing development of the avalanche process in time, taking into account the dynamics of electric field within the depleted region of the diode and the effect of parasitic capacitance shunting individual quenching micro-resistors on device parameters. Simulations show that the effective capacitance of a single pixel, which defines the multiplication factor, is the sum of the pixel capacitance and a parasitic capacitance shunting its quenching micro-resistor. Conclusions obtained as a result of modeling open possibilities of improving the pixel gain in micropixel avalanche photodiodes with high pixel density (or low pixel capacitance).

  18. Characterization of Silicon Detector Readout Electronics

    SciTech Connect

    Jones, M.

    2015-07-22

    Configuration and calibration of the front-end electronics typical of many silicon detector configurations were investigated in a lab activity based on a pair of strip sensors interfaced with FSSR2 read-out chips and an FPGA. This simple hardware configuration, originally developed for a telescope at the Fermilab Test Beam Facility, was used to measure thresholds and noise on individual readout channels and to study the influence that different configurations of the front-end electronics had on the observed levels of noise in the system. An understanding of the calibration and operation of this small detector system provided an opportunity to explore the architecture of larger systems such as those currently in use at LHC experiments.

  19. Selecting Pixels for Kepler Downlink

    NASA Technical Reports Server (NTRS)

    Bryson, Stephen T.; Jenkins, Jon M.; Klaus, Todd C.; Cote, Miles T.; Quintana, Elisa V.; Hall, Jennifer R.; Ibrahim, Khadeejah; Chandrasekaran, Hema; Caldwell, Douglas A.; Van Cleve, Jeffrey E.; Haas, Michael R.

    2010-01-01

    The Kepler mission monitors > 100,000 stellar targets using 42 2200 1024 pixel CCDs. Bandwidth constraints prevent the downlink of all 96 million pixels per 30-minute cadence, so the Kepler spacecraft downlinks a specified collection of pixels for each target. These pixels are selected by considering the object brightness, background and the signal-to-noise of each pixel, and are optimized to maximize the signal-to-noise ratio of the target. This paper describes pixel selection, creation of spacecraft apertures that efficiently capture selected pixels, and aperture assignment to a target. Diagnostic apertures, short-cadence targets and custom specified shapes are discussed.

  20. Parallel optical readout of cantilever arrays in dynamic mode.

    PubMed

    Koelmans, W W; van Honschoten, J; de Vries, J; Vettiger, P; Abelmann, L; Elwenspoek, M C

    2010-10-01

    Parallel frequency readout of an array of cantilevers is demonstrated using optical beam deflection with a single laser-diode pair. Multi-frequency addressing makes the individual nanomechanical response of each cantilever distinguishable within the received signal. Addressing is accomplished by exciting the array with the sum of all cantilever resonant frequencies. This technique requires considerably less hardware compared to other parallel optical readout techniques. Readout is demonstrated in beam deflection mode and interference mode. Many cantilevers can be readout in parallel, limited by the oscillators' quality factor and available bandwidth. The proposed technique facilitates parallelism in applications at the nano-scale, including probe-based data storage and biological sensing. PMID:20820095

  1. Compensated digital readout family

    NASA Technical Reports Server (NTRS)

    Ludwig, David E.; Skow, Michael

    1991-01-01

    ISC has completed test on an IC which has 32 channels of amplifiers, low pass anti-aliasing filters, 13-bit analog-to-digital (A/D) converters with non-uniformity correction per channel and a digital multiplexer. The single slope class of A/D conversion is described, as are the unique variations required for incorporation of this technique for use with on-focal plane detector readout electronics. This paper describes the architecture used to implement the digital on-focal plane signal processing functions. Results from measured data on a test IC are presented for a circuit containing these functions operating at a sensor frame rate of 1000 hertz.

  2. CMOS VLSI Active-Pixel Sensor for Tracking

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  3. A generic readout system for astrophysical detectors

    NASA Astrophysics Data System (ADS)

    Doumayrou, E.; Lortholary, M.

    2012-09-01

    We have developed a generic digital platform to fulfill the needs for the development of new detectors in astrophysics, which is used in lab, for ground-based telescopes instruments and also in prototype versions for space instruments development. This system is based on hardware FPGA electronic board (called MISE) together with software on a PC computer (called BEAR). The MISE board generates the fast clocking which reads the detectors thanks to a programmable digital sequencer and performs data acquisition, buffering of digitalized pixels outputs and interfaces with others boards. The data are then sent to the PC via a SpaceWire or Usb link. The BEAR software sets the MISE board up, makes data acquisition and enables the visualization, processing and the storage of data in line. These software tools are made of C++ and Labview (NI) on a Linux OS. MISE and BEAR make a generic acquisition architecture, on which dedicated analog boards are plugged, so that to accommodate with detectors specificity: number of pixels, the readout channels and frequency, analog bias and clock interfaces. We have used this concept to build a camera for the P-ARTEMIS project including a 256 pixels sub-millimeter bolometer detector at 10Kpixel/s (SPIE 7741-12 (2010)). For the EUCLID project, a lab camera is now working for the test of CCDs 4Mpixels at 4*200Kpixel/s. Another is working for the testing of new near infrared detectors (NIR LFSA for the ESA TRP program) 110Kpixels at 2*100Kpixels/s. Other projects are in progress for the space missions PLATO and SPICA.

  4. Active Pixel Sensor Characterization for the STAR Detector

    NASA Astrophysics Data System (ADS)

    King, Jake

    2004-10-01

    The STAR collaboration is studying matter at high temperatures and densities. If a significant improvement to the measurement of particle trajectories can be made, charmed mesons that decay away from the primary collision point could be identified. To achieve this goal, STAR is building a vertex detector consisting of a new technology Â- active pixel sensors. (APS) An APS is an implementation of standard CMOS technology in which each pixel has a photodiode directly above the epitaxial layer. Incident particles produce electron-hole pairs in the epitaxial layer, and these electrons accumulate on the photodiode. Charge from the photodiode is digitized to identify the position of the incident particle. It is important to characterize the signal to noise, readout time, and resolution on several different pixel sizes so that the vertex detector can be optimized for cost and speed. Larger pixels result in a faster data acquisition, while smaller pixels have better resolution. We will present studies of 5, 10, 20 and 30μm square pixel geometries that measure charge distribution and collection. We will also display the results of using a field emission scanning electron microscope with energies from 1 to 30 keV. This tool has the potential to probe regions of the APS integrated circuit and contribute to understanding its properties.

  5. Challenges of small-pixel infrared detectors: a review

    NASA Astrophysics Data System (ADS)

    Rogalski, A.; Martyniuk, P.; Kopytko, M.

    2016-04-01

    In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology—HgCdTe material systems and III-V materials (mainly barrier detectors)—have been investigated.

  6. Challenges of small-pixel infrared detectors: a review.

    PubMed

    Rogalski, A; Martyniuk, P; Kopytko, M

    2016-04-01

    In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology-HgCdTe material systems and III-V materials (mainly barrier detectors)-have been investigated. PMID:27007242

  7. Impact of defective pixels in AMLCDs on the perception of medical images

    NASA Astrophysics Data System (ADS)

    Kimpe, Tom; Sneyders, Yuri

    2006-03-01

    With LCD displays, each pixel has its own individual transistor that controls the transmittance of that pixel. Occasionally, these individual transistors will short or alternatively malfunction, resulting in a defective pixel that always shows the same brightness. With ever increasing resolution of displays the number of defect pixels per display increases accordingly. State of the art processes are capable of producing displays with no more than one faulty transistor out of 3 million. A five Mega Pixel medical LCD panel contains 15 million individual sub pixels (3 sub pixels per pixel), each having an individual transistor. This means that a five Mega Pixel display on average will have 5 failing pixels. This paper investigates the visibility of defective pixels and analyzes the possible impact of defective pixels on the perception of medical images. JND simulations were done to study the effect of defective pixels on medical images. Our results indicate that defective LCD pixels can mask subtle features in medical images in an unexpectedly broad area around the defect and therefore may reduce the quality of diagnosis for specific high-demanding areas such as mammography. As a second contribution an innovative solution is proposed. A specialized image processing algorithm can make defective pixels completely invisible and moreover can also recover the information of the defect so that the radiologist perceives the medical image correctly. This correction algorithm has been validated with both JND simulations and psycho visual tests.

  8. CMOS Active Pixel Sensor Star Tracker with Regional Electronic Shutter

    NASA Technical Reports Server (NTRS)

    Yadid-Pecht, Orly; Pain, Bedabrata; Staller, Craig; Clark, Christopher; Fossum, Eric

    1996-01-01

    The guidance system in a spacecraft determines spacecraft attitude by matching an observed star field to a star catalog....An APS(active pixel sensor)-based system can reduce mass and power consumption and radiation effects compared to a CCD(charge-coupled device)-based system...This paper reports an APS (active pixel sensor) with locally variable times, achieved through individual pixel reset (IPR).

  9. Fast, High-Precision Readout Circuit for Detector Arrays

    NASA Technical Reports Server (NTRS)

    Rider, David M.; Hancock, Bruce R.; Key, Richard W.; Cunningham, Thomas J.; Wrigley, Chris J.; Seshadri, Suresh; Sander, Stanley P.; Blavier, Jean-Francois L.

    2013-01-01

    The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

  10. XNAP: a hybrid pixel detector with nanosecond resolution for time resolved synchrotron radiation studies

    NASA Astrophysics Data System (ADS)

    Fajardo, P.; Baron, A. Q. R.; Dautet, H.; Davies, M.; Fischer, P.; Göttlicher, P.; Graafsma, H.; Hervé, C.; Rüffer, R.; Thil, C.

    2013-03-01

    The XNAP collaboration is constructing a hybrid pixel X-ray detector based on a monolithic silicon avalanche photodiode (APD) sensor array aiming at applications in synchrotron radiation facilities. The 2D detector is capable of identifying which individual electron bunch produces each detected X-ray photon, even when the storage ring operates in multibunch filling modes. This instrument is intended to be used in X-ray Photon Correlation Spectroscopy and Nuclear Resonance experiments and serve as a demonstrator for various kind of time resolved diffraction and scattering applications as well as a very high count rate device. The detector is a 1 kilopixel device with 280 μm pitch that implements both counting mode up to MHz frame rates and event-by-event readout with sub-nanosecond time resolution. The paper describes the detector design and some results obtained with small 4×4 pixel prototypes that have been built and measured to make and validate the most critical choices for the final detector.

  11. Embedded controller for GEM detector readout system

    NASA Astrophysics Data System (ADS)

    Zabołotny, Wojciech M.; Byszuk, Adrian; Chernyshova, Maryna; Cieszewski, Radosław; Czarski, Tomasz; Dominik, Wojciech; Jakubowska, Katarzyna L.; Kasprowicz, Grzegorz; Poźniak, Krzysztof; Rzadkiewicz, Jacek; Scholz, Marek

    2013-10-01

    This paper describes the embedded controller used for the multichannel readout system for the GEM detector. The controller is based on the embedded Mini ITX mainboard, running the GNU/Linux operating system. The controller offers two interfaces to communicate with the FPGA based readout system. FPGA configuration and diagnostics is controlled via low speed USB based interface, while high-speed setup of the readout parameters and reception of the measured data is handled by the PCI Express (PCIe) interface. Hardware access is synchronized by the dedicated server written in C. Multiple clients may connect to this server via TCP/IP network, and different priority is assigned to individual clients. Specialized protocols have been implemented both for low level access on register level and for high level access with transfer of structured data with "msgpack" protocol. High level functionalities have been split between multiple TCP/IP servers for parallel operation. Status of the system may be checked, and basic maintenance may be performed via web interface, while the expert access is possible via SSH server. System was designed with reliability and flexibility in mind.

  12. Superconducting THz Camera with GaAs-JFET Cryogenic Readout Electronics

    NASA Astrophysics Data System (ADS)

    Matsuo, Hiroshi; Hibi, Yasunori; Suzuki, Toyoaki; Naruse, Masato; Noguchi, Takashi; Sekimoto, Yutaro; Uzawa, Yoshinori; Nagata, Hirohisa; Ikeda, Hirokazu; Ariyoshi, Seiichiro; Otani, Chiko; Nitta, Tom; Qi-jun, Yao, Fujiwara, Mikio

    2009-12-01

    We describe the development of large format array of superconducting tunnel junction detectors that is readout by SONY GaAs-JFET cryogenic integrated circuits. High quality SIS photon detectors have high dynamic impedance that can be readout by low gate leakage GaAs-JFET circuits. Our imaging array design, with niobium SIS photon detectors and GaAs-JFET cryogenics electronics, uses integrating amplifiers, multiplexers and shift-registers to readout large number of pixels that is similar to CMOS digital cameras. We have designed and fabricated GaAs-JFET cryogenic integrated circuits, such as AC-coupled capacitive trans-impedance amplifier, multiplexers with sample-and-holds and shift-registers, for 32-channel readout module. The Advanced Technology Center of National Astronomical Observatory of Japan have started extensive development program for large format array of SIS photon detectors.

  13. The 160 TES bolometer read-out using FDM for SAFARI

    NASA Astrophysics Data System (ADS)

    Hijmering, R. A.; den Hartog, R. H.; van der Linden, A. J.; Ridder, M.; Bruijn, M. P.; van der Kuur, J.; van Leeuwen, B. J.; van Winden, P.; Jackson, B.

    2014-07-01

    For the read out of the Transition Edge Sensors (TES) bolometer arrays of the SAFARI instrument on the Japanese background-limited far-IR SPICA mission SRON is developing a Frequency Domain Multiplexing (FDM) read-out system. The next step after the successful demonstration of the read out of 38 TES bolometers using FDM was to demonstrate the FDM readout of the required 160 TES bolometers. Of the 160 LC filter and TES bolometer chains 151 have been connected and after cooldown 148 of the resonances could be identified. Although initial operation and locking of the pixels went smoothly the experiment revealed several complications. In this paper we describe the 160 pixel FDM set-up, show the results and discuss the issues faced during operation of the 160 pixel FDM experiment.

  14. Simple Bulk Readout of Digital Nucleic Acid Quantification Assays.

    PubMed

    Morinishi, Leanna S; Blainey, Paul

    2015-01-01

    Digital assays are powerful methods that enable detection of rare cells and counting of individual nucleic acid molecules. However, digital assays are still not routinely applied, due to the cost and specific equipment associated with commercially available methods. Here we present a simplified method for readout of digital droplet assays using a conventional real-time PCR instrument to measure bulk fluorescence of droplet-based digital assays. We characterize the performance of the bulk readout assay using synthetic droplet mixtures and a droplet digital multiple displacement amplification (MDA) assay. Quantitative MDA particularly benefits from a digital reaction format, but our new method applies to any digital assay. For established digital assay protocols such as digital PCR, this method serves to speed up and simplify assay readout. Our bulk readout methodology brings the advantages of partitioned assays without the need for specialized readout instrumentation. The principal limitations of the bulk readout methodology are reduced dynamic range compared with droplet-counting platforms and the need for a standard sample, although the requirements for this standard are less demanding than for a conventional real-time experiment. Quantitative whole genome amplification (WGA) is used to test for contaminants in WGA reactions and is the most sensitive way to detect the presence of DNA fragments with unknown sequences, giving the method great promise in diverse application areas including pharmaceutical quality control and astrobiology. PMID:26436576

  15. PAUCam readout electronics assembly, integration and test (AIT)

    NASA Astrophysics Data System (ADS)

    Jiménez, Jorge; Illa, José M.; Cardiel-Sas, Laia; de Vicente, Juan; Castilla, Javier; Casas, Ricard

    2014-08-01

    The PAUCam is an optical camera with an array of 18 CCDs (Hamamatsu Photonics K.K.) and up to 45 narrow and broad band filters. The camera will be installed on the William Herschel Telescope (WHT) in the Canary Islands, Spain. In order to fulfill with the specifications for the camera readout system, it was necessary to test the different readout electronics subsystems individually before to integrate the final readout work package, which is composed of 4 MONSOON (NOAO) front-ends, 6 fan out boards (MIX), each one driving up to 5 CCDs signals and a pre-amplification stage (PREAMP) located inside the cryostat. To get the subsystems integration, it was built a small camera prototype using the same technology as used in the main camera: a carbon fiber cryostat refrigerated by a cryotiger cooling system but with capacity to allocate just 2 CCDs, which were readout and re-characterized to measure the electronics performance as conversion factor or gain, readout noise, stability, linearity, etc. while the cross-talk was measured by using a spot-light. The aim of this paper is to review the whole process of assembly, integration and test (AIT) of the readout electronics work package and present the main results to demonstrate the viability of the proposed systems to be use with the PAUCam camera.

  16. Hybrid pixel-waveform CdTe/CZT detector for use in an ultrahigh resolution MRI compatible SPECT system

    PubMed Central

    Cai, Liang; Meng, Ling-Jian

    2013-01-01

    In this paper, we will present a new small pixel CdTe/CZT detector for sub-500 μm resolution SPECT imaging application inside MR scanner based on a recently developed hybrid pixel-waveform (HPWF) readout circuitry. The HPWF readout system consists of a 2-D multi-pixel circuitry attached to the anode pixels to provide the X–Y positions of interactions, and a high-speed digitizer to read out the pulse-waveform induced on the cathode. The digitized cathode waveform could provide energy deposition information, precise timing and depth-of-interaction information for gamma ray interactions. Several attractive features with this HPWF detector system will be discussed in this paper. To demonstrate the performance, we constructed several prototype HPWF detectors with pixelated CZT and CdTe detectors of 2–5 mm thicknesses, connected to a prototype readout system consisting of energy-resolved photon-counting ASIC for readout anode pixels and an Agilent high-speed digitizer for digitizing the cathode signals. The performances of these detectors based on HPWF are discussed in this paper. PMID:24371365

  17. Hybrid pixel-waveform CdTe/CZT detector for use in an ultrahigh resolution MRI compatible SPECT system.

    PubMed

    Cai, Liang; Meng, Ling-Jian

    2013-02-01

    In this paper, we will present a new small pixel CdTe/CZT detector for sub-500 μm resolution SPECT imaging application inside MR scanner based on a recently developed hybrid pixel-waveform (HPWF) readout circuitry. The HPWF readout system consists of a 2-D multi-pixel circuitry attached to the anode pixels to provide the X-Y positions of interactions, and a high-speed digitizer to read out the pulse-waveform induced on the cathode. The digitized cathode waveform could provide energy deposition information, precise timing and depth-of-interaction information for gamma ray interactions. Several attractive features with this HPWF detector system will be discussed in this paper. To demonstrate the performance, we constructed several prototype HPWF detectors with pixelated CZT and CdTe detectors of 2-5 mm thicknesses, connected to a prototype readout system consisting of energy-resolved photon-counting ASIC for readout anode pixels and an Agilent high-speed digitizer for digitizing the cathode signals. The performances of these detectors based on HPWF are discussed in this paper. PMID:24371365

  18. Hybrid pixel-waveform CdTe/CZT detector for use in an ultrahigh resolution MRI compatible SPECT system

    NASA Astrophysics Data System (ADS)

    Cai, Liang; Meng, Ling-Jian

    2013-02-01

    In this paper, we will present a new small pixel CdTe/CZT detector for sub-500 μm resolution SPECT imaging application inside MR scanner based on a recently developed hybrid pixel-waveform (HPWF) readout circuitry. The HPWF readout system consists of a 2-D multi-pixel circuitry attached to the anode pixels to provide the X-Y positions of interactions, and a high-speed digitizer to read out the pulse-waveform induced on the cathode. The digitized cathode waveform could provide energy deposition information, precise timing and depth-of-interaction information for gamma ray interactions. Several attractive features with this HPWF detector system will be discussed in this paper. To demonstrate the performance, we constructed several prototype HPWF detectors with pixelated CZT and CdTe detectors of 2-5 mm thicknesses, connected to a prototype readout system consisting of energy-resolved photon-counting ASIC for readout anode pixels and an Agilent high-speed digitizer for digitizing the cathode signals. The performances of these detectors based on HPWF are discussed in this paper.

  19. Hodoscope readout system

    DOEpatents

    Lee, L.Y.

    1973-12-01

    A readout system has been provided for reading out a radiation multidetector device with a reduced number of signal sensors. A radiation hodoscope, such as an array of scintillation counters, multiwire proportional counter array, or a set of multidetectors which do not receive signals simultaneously, is divided into equal numbered groups. A first group of signal terminals is connected to the equal numbered groups of detectors so that a signal from any one of the detectors of a group will be fed to one of the first group of terminals. A second group of signal terminals is connected to the detector groups so that a signal from a particular numbered detector of each of the detector groups is connected to one of the second group of terminals. Both groups of signal terminals are, in turn, coupled to signal sensors so that when a signal is simultaneously observed in one of the first group of terminals and one of the second group of tenniinals the specific detector detecting a radiation event is determined. The sensors are arranged in such a manner that a binary code is developed from their outputs which can be stored in a digital storage means according to the location of the event in the multidetector device. (Official Gazette)

  20. Tests of CMS Phase 1 Pixel Upgrade Back-End Electronics

    NASA Astrophysics Data System (ADS)

    Kilpatrick, Matthew

    2016-03-01

    The CMS detector will be upgraded so that it can handle the higher instantaneous luminosity of the 13-14 TeV collisions. The Phase 1 Pixel detector will experience a higher density of particle interactions requiring new front-end and read-out electronics. A front-end pixel data emulator was developed to validate the back-end readout electronics prior to installation and operation. A FPGA-based design emulates 400 Mbps data patterns from the front-end read-out chips and will be used to confirm that each Front End Driver (FED) can correctly decode and process the expected data patterns and error conditions. A FED test bench using the emulator can produce LHC-like conditions for stress testing FED hardware, firmware and online software. The design of the emulator and initial test results will be reported.

  1. Automated procedures for the assembly of the CMS Phase 1 upgrade pixel modules

    NASA Astrophysics Data System (ADS)

    Wade, Alex; CMS Collaboration

    2016-03-01

    The Phase 1 upgrade of the pixel tracker for the CMS experiment requires the assembly of approximately 1000 modules consisting of pixel sensors bump bonded to readout chips. The precision assembly of modules in this volume is made possible using several robotic processes for dispensing epoxy,positioning of sensor components, automatic wire-bonding and robotic deposition of elastomer for wire bond encapsulation. We will describe the these processes in detail, along with the measurements that quanitfy the quality of assembled modules, and describe the subsequent steps in which the sensor modules are used in the construction of the Phase 1 pixel tracker. With support from USCMS.

  2. Latest pixel size reduction of uncooled IR-FPA at CEA, LETI

    NASA Astrophysics Data System (ADS)

    Becker, Sebastien; Imperinetti, Pierre; Yon, Jean-Jacques; Ouvrier-Buffet, Jean-Louis; Goudon, Valérie; Hamelin, Antoine; Vialle, Claire; Arnaud, Agnès.

    2012-10-01

    Recent developments at the Infrared Lab (LIR) of CEA, LETI have been concentrated on the pixel size reduction of uncooled infrared detectors. With the support from French company ULIS, we have successfully demonstrated the technological integration of 12μm pixels on a commercial TV-format read-out circuit (VGA-ROIC) supplied by ULIS. The 12μm pixel has been designed, processed and characterized in CEA, LETI and first results showed exceptional performances. This paper presents the characterization and associated imagery results.

  3. 128 x 128 pixel uncooled bolometric FPA for IR detection and imaging

    NASA Astrophysics Data System (ADS)

    Jerominek, Hubert; Pope, Timothy D.; Alain, Christine; Zhang, Rose; Lehoux, Mario; Picard, Francis; Fuchs, R. Wayne; Grenier, Carol; Rouleau, Yves; Cayer, Felix; Savard, Simon; Bilodeau, Ghislain; Couillard, Jean-Francois; Larouche, Carl; Ngo, Linh P.

    1998-10-01

    An uncooled IR camera making use of a 128 X 128 pixel bolometric FPA is presented. The reconfigurable bolometric focal plane array consist of 50 micrometer X 50 micrometer pixels and simple on-chip CMOS readout electronics which can be operated in random access, independent row and column clocking, and self-scanning modes. Depending on the selected pixel format and frame rate, the FPA's NETD varies from 0.52 degrees Celsius down to 0.10 degrees Celsius. The modular IR camera is software configured and provides RS170A analog video and 12-bit TTL format digital outputs.

  4. Service cylinder electronics for the CMS Forward Pixel Phase 1 Upgrade

    NASA Astrophysics Data System (ADS)

    Durgut, Suleyman; CMS Collaboration

    2016-03-01

    The Phase 1 upgrade of the CMS forward pixel detector includes three disks on each side of the interaction point containing a total of 672 modules for a total of about 45 million pixels. A description will be given of the readout, powering, and control chain electronics that are located in the service cylinders outside of the acceptance of the CMS tracker. The status of the production of all the electronics components of the forward pixel service cylinders will be discussed along with the description of the tests performed for quality assurance purposes.

  5. Beam test results of the BTeV silicon pixel detector

    SciTech Connect

    Gabriele Chiodini et al.

    2000-09-28

    The authors have described the results of the BTeV silicon pixel detector beam test. The pixel detectors under test used samples of the first two generations of Fermilab pixel readout chips, FPIX0 and FPIX1, (indium bump-bonded to ATLAS sensor prototypes). The spatial resolution achieved using analog charge information is excellent for a large range of track inclination. The resolution is still very good using only 2-bit charge information. A relatively small dependence of the resolution on bias voltage is observed. The resolution is observed to depend dramatically on the discriminator threshold, and it deteriorates rapidly for threshold above 4000e{sup {minus}}.

  6. Design and test of clock distribution circuits for the Macro Pixel ASIC

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.

    2016-07-01

    Clock distribution circuits account for a significant fraction of the power dissipation of the Macro Pixel ASIC (MPA), designed for the pixel layer readout of the so-called Pixel-Strip module in the innermost part of the CMS tracker at the High Luminosity LHC. A test chip including low power clock distribution circuits of the MPA has been designed in a 65 nm CMOS technology and thoroughly tested. This work summarizes the experimental results relevant to the prototype chip, focusing particularly on the power and speed performance and compares such results with those coming from circuit simulations.

  7. FITPix COMBO—Timepix detector with integrated analog signal spectrometric readout

    NASA Astrophysics Data System (ADS)

    Holik, M.; Kraus, V.; Georgiev, V.; Granja, C.

    2016-02-01

    The hybrid semiconductor pixel detector Timepix has proven a powerful tool in radiation detection and imaging. Energy loss and directional sensitivity as well as particle type resolving power are possible by high resolution particle tracking and per-pixel energy and quantum-counting capability. The spectrometric resolving power of the detector can be further enhanced by analyzing the analog signal of the detector common sensor electrode (also called back-side pulse). In this work we present a new compact readout interface, based on the FITPix readout architecture, extended with integrated analog electronics for the detector's common sensor signal. Integrating simultaneous operation of the digital per-pixel information with the common sensor (called also back-side electrode) analog pulse processing circuitry into one device enhances the detector capabilities and opens new applications. Thanks to noise suppression and built-in electromagnetic interference shielding the common hardware platform enables parallel analog signal spectroscopy on the back side pulse signal with full operation and read-out of the pixelated digital part, the noise level is 600 keV and spectrometric resolution around 100 keV for 5.5 MeV alpha particles. Self-triggering is implemented with delay of few tens of ns making use of adjustable low-energy threshold of the particle analog signal amplitude. The digital pixelated full frame can be thus triggered and recorded together with the common sensor analog signal. The waveform, which is sampled with frequency 100 MHz, can be recorded in adjustable time window including time prior to the trigger level. An integrated software tool provides control, on-line display and read-out of both analog and digital channels. Both the pixelated digital record and the analog waveform are synchronized and written out by common time stamp.

  8. Further applications for mosaic pixel FPA technology

    NASA Astrophysics Data System (ADS)

    Liddiard, Kevin C.

    2011-06-01

    In previous papers to this SPIE forum the development of novel technology for next generation PIR security sensors has been described. This technology combines the mosaic pixel FPA concept with low cost optics and purpose-designed readout electronics to provide a higher performance and affordable alternative to current PIR sensor technology, including an imaging capability. Progressive development has resulted in increased performance and transition from conventional microbolometer fabrication to manufacture on 8 or 12 inch CMOS/MEMS fabrication lines. A number of spin-off applications have been identified. In this paper two specific applications are highlighted: high performance imaging IRFPA design and forest fire detection. The former involves optional design for small pixel high performance imaging. The latter involves cheap expendable sensors which can detect approaching fire fronts and send alarms with positional data via mobile phone or satellite link. We also introduce to this SPIE forum the application of microbolometer IR sensor technology to IoT, the Internet of Things.

  9. Synchrotron beam test with a photon-counting pixel detector.

    PubMed

    Brönnimann, C; Florin, S; Lindner, M; Schmitt, B; Schulze-Briese, C

    2000-09-01

    Synchrotron beam measurements were performed with a single-photon-counting pixel detector to investigate the influence of threshold settings on charge sharing. Improvement of image homogeneity by adjusting the threshold of each pixel individually was demonstrated. With a flat-field correction, the homogeneity could be improved. A measurement of the point spread function is reported. PMID:16609212

  10. Research on an AlSiNx bi-material thermal-mechanical uncooled infrared FPA pixel

    NASA Astrophysics Data System (ADS)

    Zhang, Xia; Zhang, Da-cheng

    2011-08-01

    AlSiNx bi-material thermal strain structure is used in uncooled optic readout infrared focal plane array (UOR IR FPA) pixel based on Micro-Electro-Mechanical Systems (MEMS) technology. In this paper, the problems that the AlSiNxstructure prevents FPA pixel scaling down and fill factor improving, and the Au reflection layer of the pixel leads to larger readout light energy loss are analyzed. The feasibility of AlSiNx instead of AlSiNx in the UOR IR FPA fabrication is researched in detail. The theoretical analyzing and simulation results demonstrate that, with optimized thicknesses and their matching designing of SiNx and Al, the thermal-mechanical response of AlSiNx bi-material structure is improved to 1.8 times and the intensity of optic readout signal is improved to about 2 times compared with AuSiNAlSiNx one.