Electron mobility in InGaN channel heterostructure field effect transistor structures with different barriers

NASA Astrophysics Data System (ADS)

Xie, J.; Leach, J. H.; Ni, X.; Wu, M.; Shimada, R.; Özgür, Ü.; Morkoç, H.

2007-12-01

InGaN possesses higher electron mobility and velocity than GaN, and therefore is expected to lead to relatively better performances for heterostructure field effect transistors (HFETs). However, the reported mobilities for AlGaN /InGaN HFETs are lower than GaN channel HFETs. To address this issue, we studied the effect of different barriers on the Hall mobility for InGaN channel HFETs grown by metal organic chemical vapor deposition. Unlike the conventional AlGaN barrier, the AlInN barrier can be grown at the same temperature as the InGaN channel layer, alleviating some of the technological roadblocks. Specifically, this avoids possible degradation of the thin InGaN channel during AlGaN growth at high temperatures; and paves the way for better interfaces. An undoped In0.18Al0.82N/AlN/In0.04Ga0.96N HFET structure exhibited a μH=820cm2/Vs, with a ns=2.12×1013cm-2 at room temperature. Moreover, with an In-doped AlGaN barrier, namely, Al0.24In0.01Ga0.75N, grown at 900°C, the μH increased to 1230cm2/Vs with a ns of 1.09×1013cm-2 for a similar InGaN channel. Furthermore, when the barrier was replaced by Al0.25Ga0.75N grown at 1030°C, μH dropped to 870cm2/Vs with ns of 1.26×1013cm-2 at room temperature. Our results suggest that to fully realize the potential of the InGaN channel HFETs, AlInN or AlInGaN should be used as the barrier instead of the conventional AlGaN barrier.

Investigation of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors for logic application

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui

2014-01-01

DC performance of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors (DCFETs) grown on a low-cost GaAs substrate is first demonstrated. In the complementary DCFETs, the n-channel device was fabricated on the InxGa1-xP metamorphic linearly graded buffer layer and the p-channel field-effect transistor was stacked on the top of the n-channel device. Particularly, the saturation voltage of the n-channel device is substantially reduced to decrease the VOL and VIH values attributed that two-dimensional electron gas is formed and could be modulated in the n-InGaAs channel. Experimentally, a maximum extrinsic transconductance of 215 (17) mS/mm and a maximum saturation current density of 43 (-27) mA/mm are obtained in the n-channel (p-channel) device. Furthermore, the noise margins NMH and NML are up to 0.842 and 0.330 V at a supply voltage of 1.5 V in the complementary logic inverter application.

Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrappedmore » around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.« less

Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

NASA Astrophysics Data System (ADS)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

2015-10-01

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

PubMed Central

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L.; Banyai, Douglas; Savaikar, Madhusudan A.; Jaszczak, John A.; Yap, Yoke Khin

2016-01-01

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (in-situ STM-TEM). As suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending. PMID:26846587

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

DOE PAGES

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; ...

2016-02-05

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under variousmore » bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.« less

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under variousmore » bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.« less

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors.

PubMed

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L; Banyai, Douglas; Savaikar, Madhusudan A; Jaszczak, John A; Yap, Yoke Khin

2016-02-05

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (in-situ STM-TEM). As suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.

Impact of source height on the characteristic of U-shaped channel tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Yang, Zhaonian; Zhang, Yue; Yang, Yuan; Yu, Ningmei

2017-11-01

Tunnel field-effect transistor (TFET) is very attractive in replacing a MOSFET, particularly for low-power nanoelectronic circuits. The U-shaped channel TFET (U-TFET) was proposed to improve the drain-source current with a reduced footprint. In this work, the impact of the source height (HS) on the characteristic of the U-shaped channel tunnel field-effect transistor (U-TFET) is investigated by using TCAD simulation. It is found that with a fixed gate height (HG) the drain-source current has a negative correlation with HS. This is because when the gate region is deeper than the source region, the electric field near the corner of the tunneling junction can be enhanced and the tunneling rate is increased. When HS becomes very thin, the drain-source current is limited by the source region volume. The U-TFET with an n+ pocket is also studied and the same trend is observed.

Complementary spin transistor using a quantum well channel.

PubMed

Park, Youn Ho; Choi, Jun Woo; Kim, Hyung-Jun; Chang, Joonyeon; Han, Suk Hee; Choi, Heon-Jin; Koo, Hyun Cheol

2017-04-20

In order to utilize the spin field effect transistor in logic applications, the development of two types of complementary transistors, which play roles of the n- and p-type conventional charge transistors, is an essential prerequisite. In this research, we demonstrate complementary spin transistors consisting of two types of devices, namely parallel and antiparallel spin transistors using InAs based quantum well channels and exchange-biased ferromagnetic electrodes. In these spin transistors, the magnetization directions of the source and drain electrodes are parallel or antiparallel, respectively, depending on the exchange bias field direction. Using this scheme, we also realize a complementary logic operation purely with spin transistors controlled by the gate voltage, without any additional n- or p-channel transistor.

Recent progress in n-channel organic thin-film transistors.

PubMed

Wen, Yugeng; Liu, Yunqi

2010-03-26

Particular attention has been focused on n-channel organic thin-film transistors (OTFTs) during the last few years, and the potentially cost-effective circuitry-based applications in flexible electronics, such as flexible radiofrequency identity tags, smart labels, and simple displays, will benefit from this fast development. This article reviews recent progress in performance and molecular design of n-channel semiconductors in the past five years, and limitations and practicable solutions for n-channel OTFTs are dealt with from the viewpoint of OTFT constitution and geometry, molecular design, and thin-film growth conditions. Strategy methodology is especially highlighted with an aim to investigate basic issues in this field.

Effect of graded InGaN drain region and 'In' fraction in InGaN channel on performances of InGaN tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Duan, Xiaoling; Zhang, Jincheng; Wang, Shulong; Quan, Rudai; Hao, Yue

2017-12-01

An InGaN-based graded drain region tunnel field-effect transistor (GD-TFET) is proposed to suppress the ambipolar behavior. The simulation results with the trade-off between on-state current (Ion) and ambipolar current (Iambipolar) show decreased Iambipolar (1.9 × 10-14 A/μm) in comparison with that of conventional TFETs (2.0 × 10-8 A/μm). Furthermore, GD-TFET with high 'In' fraction InxGa1-xN source-side channel (SC- GD-TFET) is explored and exhibits 5.3 times Ion improvement and 60% average subthreshold swing (SSavg) reduction in comparison with GD-TFET by adjusting 'In' fraction in the InxGa1-xN source-side channel. The improvement is attributed to the confinement of BTBT in the source-side channel by the heterojunction. And then, the optimum value for source-side channel length (Lsc) is researched by DC performances results, which shows it falls into the range between Lsc = 10 nm and 20 nm.

P-Channel InGaN/GaN heterostructure metal-oxide-semiconductor field effect transistor based on polarization-induced two-dimensional hole gas

PubMed Central

Zhang, Kexiong; Sumiya, Masatomo; Liao, Meiyong; Koide, Yasuo; Sang, Liwen

2016-01-01

The concept of p-channel InGaN/GaN heterostructure field effect transistor (FET) using a two-dimensional hole gas (2DHG) induced by polarization effect is demonstrated. The existence of 2DHG near the lower interface of InGaN/GaN heterostructure is verified by theoretical simulation and capacitance-voltage profiling. The metal-oxide-semiconductor FET (MOSFET) with Al2O3 gate dielectric shows a drain-source current density of 0.51 mA/mm at the gate voltage of −2 V and drain bias of −15 V, an ON/OFF ratio of two orders of magnitude and effective hole mobility of 10 cm2/Vs at room temperature. The normal operation of MOSFET without freeze-out at 8 K further proves that the p-channel behavior is originated from the polarization-induced 2DHG. PMID:27021054

Low electron mobility of field-effect transistor determined by modulated magnetoresistance

NASA Astrophysics Data System (ADS)

Tauk, R.; Łusakowski, J.; Knap, W.; Tiberj, A.; Bougrioua, Z.; Azize, M.; Lorenzini, P.; Sakowicz, M.; Karpierz, K.; Fenouillet-Beranger, C.; Cassé, M.; Gallon, C.; Boeuf, F.; Skotnicki, T.

2007-11-01

Room temperature magnetotransport experiments were carried out on field-effect transistors in magnetic fields up to 10 T. It is shown that measurements of the transistor magnetoresistance and its first derivative with respect to the gate voltage allow the derivation of the electron mobility in the gated part of the transistor channel, while the access/contact resistances and the transistor gate length need not be known. We demonstrate the potential of this method using GaN and Si field-effect transistors and discuss its importance for mobility measurements in transistors with nanometer gate length.

Simulation study of short-channel effects of tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Fukuda, Koichi; Asai, Hidehiro; Hattori, Junichi; Mori, Takahiro; Morita, Yukinori; Mizubayashi, Wataru; Masahara, Meishoku; Migita, Shinji; Ota, Hiroyuki; Endo, Kazuhiro; Matsukawa, Takashi

2018-04-01

Short-channel effects of tunnel field-effect transistors (FETs) are investigated in detail using simulations of a nonlocal band-to-band tunneling model. Discussion is limited to silicon. Several simulation scenarios were considered to address different effects, such as source overlap and drain offset effects. Adopting the drain offset to suppress the drain leakage current suppressed the short channel effects. The physical mechanism underlying the short-channel behavior of the tunnel FETs (TFETs) was very different from that of metal-oxide-semiconductor FETs (MOSFETs). The minimal gate lengths that do not lose on-state current by one order are shown to be 3 nm for single-gate structures and 2 nm for double gate structures, as determined from the drain offset structure.

Air-stable n-channel organic thin-film transistors with high field-effect mobility based on N ,N'-bis(heptafluorobutyl)-3,4:9,10-perylene diimide

NASA Astrophysics Data System (ADS)

Oh, Joon Hak; Liu, Shuhong; Bao, Zhenan; Schmidt, Rüdiger; Würthner, Frank

2007-11-01

The thin-film transistor characteristics of n-channel organic semiconductor, N ,N'-bis(2,2,3,3,4,4,4-heptafluorobutyl)-perylene tetracarboxylic diimide, are described. The slip-stacked face-to-face molecular packing allows a very dense parallel arrangement of the molecules, leading to field-effect mobility as high as 0.72cm2V-1s-1. The mobility only slightly decreased after exposure to air and remained stable for more than 50days. Our results reveal that molecular packing effects such as close stacking of perylene diimide units and segregation effects imparted by the fluorinated side chains are crucial for the air stability.

GaN metal-oxide-semiconductor field-effect transistors on AlGaN/GaN heterostructure with recessed gate

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Ao, Jin-Ping; Wang, Pangpang; Jiang, Ying; Li, Liuan; Kawaharada, Kazuya; Liu, Yang

2015-04-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure with a recess gate were fabricated and characterized. The device showed good pinch-off characteristics and a maximum field-effect mobility of 145.2 cm2·V-1·s-1. The effects of etching gas of Cl2 and SiCl4 were investigated in the gate recess process. SiCl4-etched devices showed higher channel mobility and lower threshold voltage. Atomic force microscope measurement was done to investigate the etching profile with different etching protection mask. Compared with photoresist, SiO2-masked sample showed lower surface roughness and better profile with stepper sidewall and weaker trenching effect resulting in higher channel mobility in the MOSFET.

Organic-inorganic hybrid materials as semiconducting channels in thin-film field-effect transistors

PubMed

Kagan; Mitzi; Dimitrakopoulos

1999-10-29

Organic-inorganic hybrid materials promise both the superior carrier mobility of inorganic semiconductors and the processability of organic materials. A thin-film field-effect transistor having an organic-inorganic hybrid material as the semiconducting channel was demonstrated. Hybrids based on the perovskite structure crystallize from solution to form oriented molecular-scale composites of alternating organic and inorganic sheets. Spin-coated thin films of the semiconducting perovskite (C(6)H(5)C(2)H(4)NH(3))(2)SnI(4) form the conducting channel, with field-effect mobilities of 0.6 square centimeters per volt-second and current modulation greater than 10(4). Molecular engineering of the organic and inorganic components of the hybrids is expected to further improve device performance for low-cost thin-film transistors.

Field-Effect Transistors Based on Networks of Highly Aligned, Chemically Synthesized N = 7 Armchair Graphene Nanoribbons.

PubMed

Passi, Vikram; Gahoi, Amit; Senkovskiy, Boris V; Haberer, Danny; Fischer, Felix R; Grüneis, Alexander; Lemme, Max C

2018-03-28

We report on the experimental demonstration and electrical characterization of N = 7 armchair graphene nanoribbon (7-AGNR) field effect transistors. The back-gated transistors are fabricated from atomically precise and highly aligned 7-AGNRs, synthesized with a bottom-up approach. The large area transfer process holds the promise of scalable device fabrication with atomically precise nanoribbons. The channels of the FETs are approximately 30 times longer than the average nanoribbon length of 30 nm to 40 nm. The density of the GNRs is high, so that transport can be assumed well-above the percolation threshold. The long channel transistors exhibit a maximum I ON / I OFF current ratio of 87.5.

Carrier mobility in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Xu, Yong; Benwadih, Mohamed; Gwoziecki, Romain; Coppard, Romain; Minari, Takeo; Liu, Chuan; Tsukagoshi, Kazuhito; Chroboczek, Jan; Balestra, Francis; Ghibaudo, Gerard

2011-11-01

A study of carrier transport in top-gate and bottom-contact TIPS-pentacene organic field-effect transistors (OFETs) based on mobility is presented. Among three mobilities extracted by different methods, the low-field mobility obtained by the Y function exhibits the best reliability and ease for use, whereas the widely applied field-effect mobility is not reliable, particularly in short-channel transistors and at low temperatures. A detailed study of contact transport reveals its strong impact on short-channel transistors, suggesting that a more intrinsic transport analysis is better implemented in relatively longer-channel devices. The observed temperature dependences of mobility are well explained by a transport model with Gaussian-like diffusivity band tails, different from diffusion in localized states band tails. This model explicitly interprets the non-zero constant mobility at low temperatures and clearly demonstrates the effects of disorder and hopping transport on temperature and carrier density dependences of mobility in organic transistors.

AlGaN/GaN field effect transistors for power electronics—Effect of finite GaN layer thickness on thermal characteristics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hodges, C., E-mail: chris.hodges@bristol.ac.uk; Anaya Calvo, J.; Kuball, M.

2013-11-11

AlGaN/GaN heterostructure field effect transistors with a 150 nm thick GaN channel within stacked Al{sub x}Ga{sub 1−x}N layers were investigated using Raman thermography. By fitting a thermal simulation to the measured temperatures, the thermal conductivity of the GaN channel was determined to be 60 W m{sup −1} K{sup −1}, over 50% less than typical GaN epilayers, causing an increased peak channel temperature. This agrees with a nanoscale model. A low thermal conductivity AlGaN buffer means the GaN spreads heat; its properties are important for device thermal characteristics. When designing power devices with thin GaN layers, as well as electrical considerations, the reducedmore » channel thermal conductivity must be considered.« less

Selective area deposited n-Al0.5Ga0.5N channel field effect transistors with high solar-blind ultraviolet photo-responsivity

NASA Astrophysics Data System (ADS)

Muhtadi, S.; Hwang, S.; Coleman, A.; Asif, F.; Lunev, A.; Chandrashekhar, M. V. S.; Khan, A.

2017-04-01

We report on AlGaN field effect transistors over AlN/sapphire templates with selective area grown n-Al0.5Ga0.5N channel layers for which a field-effect mobility of 55 cm2/V-sec was measured. Using a pulsed plasma enhanced chemical vapor deposition deposited 100 A thick SiO2 layer as the gate-insulator, the gate-leakage currents were reduced by three orders of magnitude. These devices with or without gate insulators are excellent solar-blind ultraviolet detectors, and they can be operated either in the photoconductive or the photo-voltaic modes. In the photo-conductive mode, gain arising from hole-trapping in the depletion region leads to steady-state photoresponsivity as high as 1.2 × 106A/W at 254 nm, which drops sharply below 290 nm. A hole-trapping limited detector response time of 34 ms, fast enough for real-time flame-detection and imaging applications, was estimated.

Polarization-Engineered Ga-Face GaN-Based Heterostructures for Normally-Off Heterostructure Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Kim, Hyeongnam; Nath, Digbijoy; Rajan, Siddharth; Lu, Wu

2013-01-01

Polarization-engineered Ga-face GaN-based heterostructures with a GaN cap layer and an AlGaN/ p-GaN back barrier have been designed for normally-off field-effect transistors (FETs). The simulation results show that an unintentionally doped GaN cap and p-GaN layer in the buffer primarily deplete electrons in the channel and the Al0.2Ga0.8N back barrier helps to pinch off the channel. Experimentally, we have demonstrated a normally-off GaN-based field-effect transistor on the designed GaN cap/Al0.3Ga0.7N/GaN channel/Al0.2Ga0.8N/ p-GaN/GaN heterostructure. A positive threshold voltage of 0.2 V and maximum transconductance of 2.6 mS/mm were achieved for 80- μm-long gate devices. The device fabrication process does not require a dry etching process for gate recessing, while highly selective etching of the GaN cap against a very thin Al0.3GaN0.7N top barrier has to be performed to create a two-dimensional electron gas for both the ohmic and access regions. A self-aligned, selective etch of the GaN cap in the access region is introduced, using the gate metal as an etch mask. The absence of gate recess etching is promising for uniform and repeatable threshold voltage control in normally-off AlGaN/GaN heterostructure FETs for power switching applications.

High performance n-channel thin-film transistors with an amorphous phase C60 film on plastic substrate

NASA Astrophysics Data System (ADS)

Na, Jong H.; Kitamura, M.; Arakawa, Y.

2007-11-01

We fabricated high mobility, low voltage n-channel transistors on plastic substrates by combining an amorphous phase C60 film and a high dielectric constant gate insulator titanium silicon oxide (TiSiO2). The transistors exhibited high performance with a threshold voltage of 1.13V, an inverse subthreshold swing of 252mV/decade, and a field-effect mobility up to 1cm2/Vs at an operating voltage as low as 5V. The amorphous phase C60 films can be formed at room temperature, implying that this transistor is suitable for corresponding n-channel transistors in flexible organic logic devices.

Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Macleod, Todd C.; Ho, Fat D.

2006-01-01

Previous research investigated the modeling of a N Wga te constructed of Metal-Ferroelectric- Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. The NAND gate was modeled using n-channel MFSFETs with positive polarization for the standard CMOS n-channel transistors and n-channel MFSFETs with negative polarization for the standard CMOS p-channel transistors. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. During the low-to-high transition, the negatively polarized transistor pulls up the output voltage, and during the high-to-low transition, the positively polarized transistor pulls down the output voltage. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate. Extension of this technique to more complicated logic gates using MFSFETs will be studied.

Structured-gate organic field-effect transistors

NASA Astrophysics Data System (ADS)

Aljada, Muhsen; Pandey, Ajay K.; Velusamy, Marappan; Burn, Paul L.; Meredith, Paul; Namdas, Ebinazar B.

2012-06-01

We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO2) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends.

SOI N-Channel Field Effect Transistors, CHT-NMOS80, for Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Almad

2009-01-01

high temperature N-channel MOSFET (metal-oxide semiconductor field-effect transistor) device that was manufactured by CISSOID. This high voltage, medium-power transistor is fabricated using SOI processes and is designed for extreme wide temperature applications such as geothermal well logging, aerospace and avionics, and automotive industry. It has a high DC current capability and is specified for operation in the temperature range of -55 C to +225 C

In-situ SiN{sub x}/InN structures for InN field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zervos, Ch., E-mail: hzervos@physics.uoc.gr; Georgakilas, A.; Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete

Critical aspects of InN channel field-effect transistors (FETs) have been investigated. SiN{sub x} dielectric layers were deposited in-situ, in the molecular beam epitaxy system, on the surface of 2 nm InN layers grown on GaN (0001) buffer layers. Metal-insulator-semiconductor Ni/SiN{sub x}/InN capacitors were analyzed by capacitance-voltage (C-V) and current-voltage measurements and were used as gates in InN FET transistors (MISFETs). Comparison of the experimental C-V results with self-consistent Schrödinger-Poisson calculations indicates the presence of a positive charge at the SiN{sub x}/InN interface of Q{sub if} ≈ 4.4 – 4.8 × 10{sup 13 }cm{sup −2}, assuming complete InN strain relaxation. Operation of InN MISFETs was demonstrated, but their performancemore » was limited by a catastrophic breakdown at drain-source voltages above 2.5–3.0 V, the low electron mobility, and high series resistances of the structures.« less

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures

Electrical characteristics of tunneling field-effect transistors with asymmetric channel thickness

NASA Astrophysics Data System (ADS)

Kim, Jungsik; Oh, Hyeongwan; Kim, Jiwon; Meyyappan, M.; Lee, Jeong-Soo

2017-02-01

Effects of using asymmetric channel thickness in tunneling field-effect transistors (TFET) are investigated in sub-50 nm channel regime using two-dimensional (2D) simulations. As the thickness of the source side becomes narrower in narrow-source wide-drain (NSWD) TFETs, the threshold voltage (V th) and the subthreshold swing (SS) decrease due to enhanced gate controllability of the source side. The narrow source thickness can make the band-to-band tunneling (BTBT) distance shorter and induce much higher electric field near the source junction at the on-state condition. In contrast, in a TFET with wide-source narrow-drain (WSND), the SS shows almost constant values and the V th slightly increases with narrowing thickness of the drain side. In addition, the ambipolar current can rapidly become larger with smaller thickness on the drain side because of the shorter BTBT distance and the higher electric-field at the drain junction. The on-current of the asymmetric channel TFET is lower than that of conventional TFETs due to the volume limitation of the NSWD TFET and high series resistance of the WSND TFET. The on-current is almost determined by the channel thickness of the source side.

Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeond, Todd C.; Sayyah, Rana; Ho, Fat Duen

2009-01-01

Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

NASA Astrophysics Data System (ADS)

Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

2008-11-01

In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

Investigation of performance enhancement in InAs/InGaAs heterojunction-enhanced N-channel tunneling field-effect transistor

NASA Astrophysics Data System (ADS)

Han, Genquan; Zhao, Bin; Liu, Yan; Wang, Hongjuan; Liu, Mingshan; Zhang, Chunfu; Hu, Shengdong; Hao, Yue

2015-12-01

We design a heterojunction-enhanced n-channel tunneling field effect transistor (HE-TFET) with an InAs/In1-xGaxAs heterojunction located in channel region with a distance of LT-H from source/channel tunneling junction. The influence of LT-H on the performance of HE-TFETs is investigated by simulation. Compared with InAs homo-NTFET, the positive shift of onset voltage, the steeper subthreshold swing (SS), and the enhanced on-state current ION are achieved in HE-NTFETs, which is attributed to the modulation of the heterojunction on band-to-band tunneling. At a supply voltage of 0.3 V, ION of InAs/In0.9Ga0.1As HE-NTFET with a LT-H of 6 nm demonstrates an enhancement of 119.3% in comparison with the homo device. Furthermore, the impact of Ga composition on the performance of HE-NTFETs is studied. As the Ga composition increases, the average SS characteristics of HE-NTFETs are improved, while the drive current of devices is reduced due to the increasing of tunneling barrier.

High-mobility field-effect transistor based on crystalline ZnSnO3 thin films

NASA Astrophysics Data System (ADS)

Minato, Hiroya; Fujiwara, Kohei; Tsukazaki, Atsushi

2018-05-01

We propose crystalline ZnSnO3 as a new channel material for field-effect transistors. By molecular-beam epitaxy on LiNbO3(0001) substrates, we synthesized films of ZnSnO3, which crystallizes in the LiNbO3-type polar structure. Field-effect transistors on ZnSnO3 exhibit n-type operation with field-effect mobility of as high as 45 cm2V-1s-1 at room temperature. Systematic examination of the transistor operation for channels with different Zn/Sn compositional ratios revealed that the observed high-mobility reflects the nature of stoichiometric ZnSnO3 phase. Moreover, we found an indication of coupling of transistor characteristics with intrinsic spontaneous polarization in ZnSnO3, potentially leading to a distinct type of polarization-induced conduction.

Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat Duen

2005-01-01

Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

High-power flexible AlGaN/GaN heterostructure field-effect transistors with suppression of negative differential conductance

NASA Astrophysics Data System (ADS)

Oh, Seung Kyu; Cho, Moon Uk; Dallas, James; Jang, Taehoon; Lee, Dong Gyu; Pouladi, Sara; Chen, Jie; Wang, Weijie; Shervin, Shahab; Kim, Hyunsoo; Shin, Seungha; Choi, Sukwon; Kwak, Joon Seop; Ryou, Jae-Hyun

2017-09-01

We investigate thermo-electronic behaviors of flexible AlGaN/GaN heterostructure field-effect transistors (HFETs) for high-power operation of the devices using Raman thermometry, infrared imaging, and current-voltage characteristics. A large negative differential conductance observed in HFETs on polymeric flexible substrates is confirmed to originate from the decreasing mobility of the two-dimensional electron gas channel caused by the self-heating effect. We develop high-power transistors by suppressing the negative differential conductance in the flexible HFETs using chemical lift-off and modified Ti/Au/In metal bonding processes with copper (Cu) tapes for high thermal conductivity and low thermal interfacial resistance in the flexible hybrid structures. Among different flexible HFETs, the ID of the HFETs on Cu with Ni/Au/In structures decreases only by 11.3% with increasing drain bias from the peak current to the current at VDS = 20 V, which is close to that of the HFETs on Si (9.6%), solving the problem of previous flexible AlGaN/GaN transistors.

Charge-Transfer-Induced p-Type Channel in MoS2 Flake Field Effect Transistors.

PubMed

Min, Sung-Wook; Yoon, Minho; Yang, Sung Jin; Ko, Kyeong Rok; Im, Seongil

2018-01-31

The two-dimensional transition-metal dichalcogenide semiconductor MoS 2 has received extensive attention for decades because of its outstanding electrical and mechanical properties for next-generation devices. One weakness of MoS 2 , however, is that it shows only n-type conduction, revealing its limitations for homogeneous PN diodes and complementary inverters. Here, we introduce a charge-transfer method to modify the conduction property of MoS 2 from n- to p-type. We initially deposited an n-type InGaZnO (IGZO) film on top of the MoS 2 flake so that electron charges might be transferred from MoS 2 to IGZO during air ambient annealing. As a result, electron charges were depleted in MoS 2 . Such charge depletion lowered the MoS 2 Fermi level, which makes hole conduction favorable in MoS 2 when optimum source/drain electrodes with a high work function are selected. Our IGZO-supported MoS 2 flake field effect transistors (FETs) clearly display channel-type conversion from n- to p-channel in this way. Under short- and long-annealing conditions, n- and p-channel MoS 2 FETs are achieved, respectively, and a low-voltage complementary inverter is demonstrated using both channels in a single MoS 2 flake.

Calculation of the electron wave function in a graded-channel double-heterojunction modulation-doped field-effect transistor

NASA Technical Reports Server (NTRS)

Mui, D. S. L.; Patil, M. B.; Morkoc, H.

1989-01-01

Three double-heterojunction modulation-doped field-effect transistor structures with different channel composition are investigated theoretically. All of these transistors have an In(x)Ga(1-x)As channel sandwiched between two doped Al(0.3)Ga(0.7)As barriers with undoped spacer layers. In one of the structures, x varies from 0 from either heterojunction to 0.15 at the center of the channel quadratically; in the other two, constant values of x of 0 and 0.15 are used. The Poisson and Schroedinger equations are solved self-consistently for the electron wave function in all three cases. The results showed that the two-dimensional electron gas (2DEG) concentration in the channel of the quadratically graded structure is higher than the x = 0 one and slightly lower than the x = 0.15 one, and the mean distance of the 2DEG is closer to the center of the channel for this transistor than the other two. These two effects have important implications on the electron mobility in the channel.

Photojunction field-effect transistor based on a colloidal quantum dot absorber channel layer.

PubMed

Adinolfi, Valerio; Kramer, Illan J; Labelle, André J; Sutherland, Brandon R; Hoogland, S; Sargent, Edward H

2015-01-27

The performance of photodetectors is judged via high responsivity, fast speed of response, and low background current. Many previously reported photodetectors based on size-tuned colloidal quantum dots (CQDs) have relied either on photodiodes, which, since they are primary photocarrier devices, lack gain; or photoconductors, which provide gain but at the expense of slow response (due to delayed charge carrier escape from sensitizing centers) and an inherent dark current vs responsivity trade-off. Here we report a photojunction field-effect transistor (photoJFET), which provides gain while breaking prior photoconductors' response/speed/dark current trade-off. This is achieved by ensuring that, in the dark, the channel is fully depleted due to a rectifying junction between a deep-work-function transparent conductive top contact (MoO3) and a moderately n-type CQD film (iodine treated PbS CQDs). We characterize the rectifying behavior of the junction and the linearity of the channel characteristics under illumination, and we observe a 10 μs rise time, a record for a gain-providing, low-dark-current CQD photodetector. We prove, using an analytical model validated using experimental measurements, that for a given response time the device provides a two-orders-of-magnitude improvement in photocurrent-to-dark-current ratio compared to photoconductors. The photoJFET, which relies on a junction gate-effect, enriches the growing family of CQD photosensitive transistors.

AlGaN Channel Transistors for Power Management and Distribution

NASA Technical Reports Server (NTRS)

VanHove, James M.

1996-01-01

Contained within is the Final report of a Phase 1 SBIR program to develop AlGaN channel junction field effect transistors (JFET). The report summarizes our work to design, deposit, and fabricate JFETS using molecular beam epitaxy growth AlGaN. Nitride growth is described using a RF atomic nitrogen plasma source. Processing steps needed to fabricate the device such as ohmic source-drain contacts, reactive ion etching, gate formation, and air bride fabrication are documented. SEM photographs of fabricated power FETS are shown. Recommendations are made to continue the effort in a Phase 2 Program.

Hopping and trapping mechanisms in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Konezny, S. J.; Bussac, M. N.; Zuppiroli, L.

2010-01-01

A charge carrier in the channel of an organic field-effect transistor (OFET) is coupled to the electric polarization of the gate in the form of a surface Fröhlich polaron [N. Kirova and M. N. Bussac, Phys. Rev. B 68, 235312 (2003)]. We study the effects of the dynamical field of polarization on both small-polaron hopping and trap-limited transport mechanisms. We present numerical calculations of polarization energies, band-narrowing effects due to polarization, hopping barriers, and interface trap depths in pentacene and rubrene transistors as functions of the dielectric constant of the gate insulator and demonstrate that a trap-and-release mechanism more appropriately describes transport in high-mobility OFETs. For mobilities on the order 0.1cm2/Vs and below, all states are highly localized and hopping becomes the predominant mechanism.

Quantum simulation of an ultrathin body field-effect transistor with channel imperfections

NASA Astrophysics Data System (ADS)

Vyurkov, V.; Semenikhin, I.; Filippov, S.; Orlikovsky, A.

2012-04-01

An efficient program for the all-quantum simulation of nanometer field-effect transistors is elaborated. The model is based on the Landauer-Buttiker approach. Our calculation of transmission coefficients employs a transfer-matrix technique involving the arbitrary precision (multiprecision) arithmetic to cope with evanescent modes. Modified in such way, the transfer-matrix technique turns out to be much faster in practical simulations than that of scattering-matrix. Results of the simulation demonstrate the impact of realistic channel imperfections (random charged centers and wall roughness) on transistor characteristics. The Landauer-Buttiker approach is developed to incorporate calculation of the noise at an arbitrary temperature. We also validate the ballistic Landauer-Buttiker approach for the usual situation when heavily doped contacts are indispensably included into the simulation region.

Temperature-dependent degradation mechanisms of threshold voltage in La2O3-gated n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Wang, Ming-Tsong; Hsu, De-Cheng; Juan, Pi-Chun; Wang, Y. L.; Lee, Joseph Ya-min

2010-09-01

Metal-oxide-semiconductor capacitors and n-channel metal-oxide-semiconductor field-effect transistors with La2O3 gate dielectric were fabricated. The positive bias temperature instability was studied. The degradation of threshold voltage (ΔVT) showed an exponential dependence on the stress time in the temperature range from 25 to 75 °C. The degradation of subthreshold slope (ΔS) and gate leakage (IG) with stress voltage was also measured. The degradation of VT is attributed to the oxide trap charges Qot. The extracted activation energy of 0.2 eV is related to a degradation dominated by the release of atomic hydrogen in La2O3 thin films.

Graphene oxide-zinc oxide nanocomposite as channel layer for field effect transistors: effect of ZnO loading on field effect transport.

PubMed

Jilani, S Mahaboob; Banerji, Pallab

2014-10-08

The effects of ZnO on graphene oxide (GO)-ZnO nanocomposites are investigated to tune the conductivity in GO under field effect regime. Zinc oxides with different concentrations from 5 wt % to 25 wt % are used in a GO matrix to increase the conductivity in the composite. Six sets of field effect transistors with pristine GO and GO-ZnO as the channel layer at varying ZnO concentrations were fabricated. From the transfer characteristics, it is observed that GO exhibited an insulating behavior and the transistors with low ZnO (5 wt %) concentration initially showed p-type conductivity that changes to n-type with increases in ZnO loading. This n-type dominance in conductivity is a consequence of the transfer of electrons from ZnO to the GO matrix. From X-ray photoelectron spectroscopic measurements, it is observed that the progressive reduction in the C-OH oxygen group took place with increases in ZnO loading. Thus, from insulating GO to p- and then n-type, conductivity in GO could be achieved with reduction in the C-OH oxygen group by photocatalytic reduction of GO with varying degrees of ZnO. The restoration of sp(2) electron network in the GO matrix with the anchoring of ZnO nanostructures was observed from Raman spectra. From UV-visible spectra, the band gap in pristine GO was found to be 3.98 eV and reduced to 2.8 eV with increase in ZnO attachment.

Electrical Transport and Channel Length Modulation in Semiconducting Carbon Nanotube Field-Effect Transistors

DTIC Science & Technology

2013-11-25

a ballistic one-dimensional conductor is / = £>(£) ■ VgiE)[fR(E) - fdEME , (1) where Vg(E) is the group velocity, D(E) is the density of states... AEROSPACE REPORT NO. ATR-2013-01138 Electrical Transport and Channel Length Modulation in Semiconducting Carbon Nanotube Field-Effect Transistors...SCIENCES LABORATORIES The Aerospace Corporation functions as an "architect-engineer" for national security programs, specializing in advanced military

Enhanced sheet carrier densities in polarization controlled AlInN/AlN/GaN/InGaN field-effect transistor on Si (111)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hennig, J., E-mail: jonas.hennig@ovgu.de; Dadgar, A.; Witte, H.

2015-07-15

We report on GaN based field-effect transistor (FET) structures exhibiting sheet carrier densities of n = 2.9 10{sup 13} cm{sup −2} for high-power transistor applications. By grading the indium-content of InGaN layers grown prior to a conventional GaN/AlN/AlInN FET structure control of the channel width at the GaN/AlN interface is obtained. The composition of the InGaN layer was graded from nominally x{sub In} = 30 % to pure GaN just below the AlN/AlInN interface. Simulations reveal the impact of the additional InGaN layer on the potential well width which controls the sheet carrier density within the channel region of the devices.more » Benchmarking the In{sub x}Ga{sub 1−x}N/GaN/AlN/Al{sub 0.87}In{sub 0.13}N based FETs against GaN/AlN/AlInN FET reference structures we found increased maximum current densities of I{sub SD} = 1300 mA/mm (560 mA/mm). In addition, the InGaN layer helps to achieve broader transconductance profiles as well as reduced leakage currents.« less

Comparison of effect of 5 MeV proton and Co-60 gamma irradiation on silicon NPN rf power transistors and N-channel depletion MOSFETs

NASA Astrophysics Data System (ADS)

Gnana Prakash, A. P.; Pradeep, T. M.; Hegde, Vinayakprasanna N.; Pushpa, N.; Bajpai, P. K.; Patel, S. P.; Trivedi, Tarkeshwar; Bhushan, K. G.

2017-12-01

NPN transistors and N-channel depletion metal oxide semiconductor field effect transistors (MOSFETs) were irradiated with 5 MeV protons and 60Co gamma radiation in the dose ranging from 1 Mrad(Si) to 100 Mrad(Si). The different electrical characteristics of the NPN transistor such as Gummel characteristics, excess base current (ΔIB), dc current gain (hFE), transconductance (gm), displacement damage factor (K) and output characteristics were studied as a function of total dose. The different electrical characteristics of N-channel MOSFETs such as threshold voltage (Vth), density of interface trapped charges (ΔNit), density of oxide trapped charges (ΔNot), transconductance (gm), mobility (µ) and drain saturation current (IDSat) were studied systematically before and after irradiation in the same dose ranges. A considerable increase in the base current (IB) and decrease in the hFE, gm and collector saturation current (ICSat) were observed after irradiation in the case of the NPN transistor. In the N-channel MOSFETs, the ΔNit and ΔNot were found to increase and Vth, gm, µ and IDSat were found to decrease with increase in the radiation dose. The 5 MeV proton irradiation results of both the NPN transistor and N-channel MOSFETs were compared with 60Co gamma-irradiated devices in the same dose ranges. It was observed that the degradation in 5 MeV proton-irradiated devices is more when compared with the 60Co gamma-irradiated devices at higher total doses.

Top-gate organic depletion and inversion transistors with doped channel and injection contact

NASA Astrophysics Data System (ADS)

Liu, Xuhai; Kasemann, Daniel; Leo, Karl

2015-03-01

Organic field-effect transistors constitute a vibrant research field and open application perspectives in flexible electronics. For a commercial breakthrough, however, significant performance improvements are still needed, e.g., stable and high charge carrier mobility and on-off ratio, tunable threshold voltage, as well as integrability criteria such as n- and p-channel operation and top-gate architecture. Here, we show pentacene-based top-gate organic transistors operated in depletion and inversion regimes, realized by doping source and drain contacts as well as a thin layer of the transistor channel. By varying the doping concentration and the thickness of the doped channel, we control the position of the threshold voltage without degrading on-off ratio or mobility. Capacitance-voltage measurements show that an inversion channel can indeed be formed, e.g., an n-doped channel can be inverted to a p-type inversion channel with highly p-doped contacts. The Cytop polymer dielectric minimizes hysteresis, and the transistors can be biased for prolonged cycles without a shift of threshold voltage, indicating excellent operation stability.

Multiple-channel detection of cellular activities by ion-sensitive transistors

NASA Astrophysics Data System (ADS)

Machida, Satoru; Shimada, Hideto; Motoyama, Yumi

2018-04-01

An ion-sensitive field-effect transistor to record cellular activities was demonstrated. This field-effect transistor (bio transistor) includes cultured cells on the gate insulator instead of gate electrode. The bio transistor converts a change in potential underneath the cells into variation of the drain current when ion channels open. The bio transistor has high detection sensitivity to even minute variations in potential utilizing a subthreshold swing region. To open ion channels, a reagent solution (acetylcholine) was added to a human-originating cell cultured on the bio transistor. The drain current was successfully decreased with the addition of acetylcholine. Moreover, we attempted to detect the opening of ion channels using a multiple-channel measurement circuit containing several bio transistors. As a consequence, the drain current distinctly decreased only after the addition of acetylcholine. We confirmed that this measurement system including bio transistors enables to observation of cellular activities sensitively and simultaneously.

Fabrication and characterization of the normally-off N-channel lateral 4H-SiC metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Qing-Wen, Song; Xiao-Yan, Tang; Yan-Jing, He; Guan-Nan, Tang; Yue-Hu, Wang; Yi-Meng, Zhang; Hui, Guo; Ren-Xu, Jia; Hong-Liang, Lv; Yi-Men, Zhang; Yu-Ming, Zhang

2016-03-01

In this paper, the normally-off N-channel lateral 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFFETs) have been fabricated and characterized. A sandwich- (nitridation-oxidation-nitridation) type process was used to grow the gate dielectric film to obtain high channel mobility. The interface properties of 4H-SiC/SiO2 were examined by the measurement of HF I-V, G-V, and C-V over a range of frequencies. The ideal C-V curve with little hysteresis and the frequency dispersion were observed. As a result, the interface state density near the conduction band edge of 4H-SiC was reduced to 2 × 1011 eV-1·cm-2, the breakdown field of the grown oxides was about 9.8 MV/cm, the median peak field-effect mobility is about 32.5 cm2·V-1·s-1, and the maximum peak field-effect mobility of 38 cm2·V-1·s-1 was achieved in fabricated lateral 4H-SiC MOSFFETs. Projcet supported by the National Natural Science Foundation of China (Grant Nos. 61404098, 61176070, and 61274079), the Doctoral Fund of Ministry of Education of China (Grant Nos. 20110203110010 and 20130203120017), the National Key Basic Research Program of China (Grant No. 2015CB759600), and the Key Specific Projects of Ministry of Education of China (Grant No. 625010101).

Use of a bilayer lattice-matched AlInGaN barrier for improving the channel carrier confinement of enhancement-mode AlInGaN/GaN hetero-structure field-effect transistors

NASA Astrophysics Data System (ADS)

Rahbardar Mojaver, Hassan; Gosselin, Jean-Lou; Valizadeh, Pouya

2017-06-01

A quaternary lattice-matched layer structure based on employing a bilayer barrier for improving the carrier confinement in the channel of enhancement-mode metal-face c-plane wurtzite AlInGaN/GaN hetero-structure field effect transistors (HFETs) is for the first time proposed. Using the commercial self-consistent Poisson-Schrödinger solver Nextnano, electronic properties of the proposed hetero-structure, including the sheet charge density and carrier confinement on the GaN side of the hetero-interface, are evaluated. Based on these evaluations, it is shown that while the proposed layer structure substantially improves the carrier confinement in the GaN channel layer, it also upholds the merits of employing a lattice-matched barrier towards achieving an enhancement-mode operation (i.e., in the absence of the piezoelectric effect). According to these simulations, in terms of maintaining the required positive threshold-voltage for the enhancement-mode operation, it is also shown that the proposed layer structure substantially outperforms the quaternary AlInGaN/GaN HFETs employing a thin AlN spacer layer.

Investigation of InP/In0.65Ga0.35As metamorphic p-channel doped-channel field-effect transistor

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui

2016-07-01

In this article, the device mechanism and characteristics of InP/InGaAs metamorphic p-channel field-effect transistor (FET), which has a high indium mole fraction of InGaAs channel, grown on the GaAs substrate is demonstrated. The device was fabricated on the top of the InxGa1-xP graded metamorphic buffer layer, and the In0.65Ga0.35As pseudomorphic channel was employed to elevate the transistor performance. For the p-type FET, due to the considerably large valence band discontinuity at InP/In0.65Ga0.35As heterojunction and a relatively thin as well as heavily doped pseudomorphic In0.65Ga0.35As channel between two undoped InP layers, a maximum extrinsic transconductance of 27.3 mS/mm and a maximum saturation current density of -54.3 mA/mm are obtained. Consequently, the studied metamorphic FET is suitable for the development in signal amplification, integrated circuits, and low supply-voltage complementary logic inverters.

Design consideration of δ-doping channels for high-performance n + - GaAs / p + -InGaP/n-GaAs camel-gate field effect transistors

NASA Astrophysics Data System (ADS)

Tsai, Jung-Hui; Chen, Jeng-Shyan; Chu, Yu-Jui

2005-01-01

The influence of δ-doping channels on the performance of n +-GaAs/p +-InGaP/n-GaAs camel-gate field effect transistors is investigated by theoretical analysis and experimental results. The depleted pn junction of the camel gate and the existence of considerable conduction band discontinuity at the InGaP/GaAs heterojunction enhance the potential barrier height and the forward gate voltage. As the concentration-thickness products of the n-GaAs layer and δ-doping layer are fixed, the higher δ-doping device exhibits a higher potential barrier height, a larger drain current, and a broader gate voltage swing, whereas the transconductance is somewhat lower. For a n +=5.5×10 12 cm -2δ-doping device, the experimental result exhibits a maximum transconductance of 240 mS/mm and a gate voltage swing of 3.5 V. Consequently, the studied devices provide a good potential for large signal and linear circuit applications.

Reconfigurable Complementary Monolayer MoTe2 Field-Effect Transistors for Integrated Circuits.

PubMed

Larentis, Stefano; Fallahazad, Babak; Movva, Hema C P; Kim, Kyounghwan; Rai, Amritesh; Taniguchi, Takashi; Watanabe, Kenji; Banerjee, Sanjay K; Tutuc, Emanuel

2017-05-23

Transition metal dichalcogenides are of interest for next generation switches, but the lack of low resistance electron and hole contacts in the same material has hindered the development of complementary field-effect transistors and circuits. We demonstrate an air-stable, reconfigurable, complementary monolayer MoTe 2 field-effect transistor encapsulated in hexagonal boron nitride, using electrostatically doped contacts. The introduction of a multigate design with prepatterned bottom contacts allows us to independently achieve low contact resistance and threshold voltage tuning, while also decoupling the Schottky contacts and channel gating. We illustrate a complementary inverter and a p-i-n diode as potential applications.

Noise and current-voltage characterization of complementary heterojunction field-effect transistor (CHFET) structures below 8 K

NASA Technical Reports Server (NTRS)

Cunningham, Thomas J.; Fossum, Eric R.; Baier, Steven M.

1992-01-01

Noise and current-voltage characterization of complementary heterojunction field-effect transistor (CHFET) structures below 8 K are presented. It is shown that the CHFET exhibits normal transistor operation down to 6 K. Some of the details of the transistor operation, such as the gate-voltage dependence of the channel potential, are analyzed. The gate current is examined and is shown to be due to several mechanisms acting in parallel. These include field-emission and thermionic-field-emission, conduction through a temperature-activated resistance, and thermionic emission. The input referred noise for n-channel CHFETs is presented and discussed. The noise has the spectral dependence of 1/f noise, but does not exhibit the usual area dependence.

Dependence of interface charge trapping on channel engineering in pentacene field effect transistors.

PubMed

Lee, Sunwoo; Park, Junghyuck; Park, In-Sung; Ahn, Jinho

2014-07-01

We investigate the dependence of charge carrier mobility by trap states at various interface regions through channel engineering. Prior to evaluation of interface trap density, the electrical performance in pentaene field effect transistors (FET) with high-k gate oxide are also investigated depending on four channel engineering. As a channel engineering, gas treatment, coatings of thin polymer layer, and chemical surface modification using small molecules were carried out. After channel engineering, the performance of device as well as interface trap density calculated by conductance method are remarkably improved. It is found that the reduced interface trap density is closely related to decreasing the sub-threshold swing and improving the mobility. Particularly, we also found that performance of device such as mobility, subthreshold swing, and interface trap density after gas same is comparable to those of OTS.

Deep-submicron Graphene Field-Effect Transistors with State-of-Art fmax

PubMed Central

Lyu, Hongming; Lu, Qi; Liu, Jinbiao; Wu, Xiaoming; Zhang, Jinyu; Li, Junfeng; Niu, Jiebin; Yu, Zhiping; Wu, Huaqiang; Qian, He

2016-01-01

In order to conquer the short-channel effects that limit conventional ultra-scale semiconductor devices, two-dimensional materials, as an option of ultimate thin channels, receive wide attention. Graphene, in particular, bears great expectations because of its supreme carrier mobility and saturation velocity. However, its main disadvantage, the lack of bandgap, has not been satisfactorily solved. As a result, maximum oscillation frequency (fmax) which indicates transistors’ power amplification ability has been disappointing. Here, we present submicron field-effect transistors with specially designed low-resistance gate and excellent source/drain contact, and therefore significantly improved fmax. The fabrication was assisted by the advanced 8-inch CMOS back-end-of-line technology. A 200-nm-gate-length GFET achieves fT/fmax = 35.4/50 GHz. All GFET samples with gate lengths ranging from 200 nm to 400 nm possess fmax 31–41% higher than fT, closely resembling Si n-channel MOSFETs at comparable technology nodes. These results re-strengthen the promise of graphene field-effect transistors in next generation semiconductor electronics. PMID:27775009

Organic field effect transistor with ultra high amplification

NASA Astrophysics Data System (ADS)

Torricelli, Fabrizio

2016-09-01

High-gain transistors are essential for the large-scale circuit integration, high-sensitivity sensors and signal amplification in sensing systems. Unfortunately, organic field-effect transistors show limited gain, usually of the order of tens, because of the large contact resistance and channel-length modulation. Here we show organic transistors fabricated on plastic foils enabling unipolar amplifiers with ultra-gain. The proposed approach is general and opens up new opportunities for ultra-large signal amplification in organic circuits and sensors.

InN/InGaN complementary heterojunction-enhanced tunneling field-effect transistor with enhanced subthreshold swing and tunneling current

NASA Astrophysics Data System (ADS)

Peng, Yue; Han, Genquan; Wang, Hongjuan; Zhang, Chunfu; Liu, Yan; Wang, Yibo; Zhao, Shenglei; Zhang, Jincheng; Hao, Yue

2016-05-01

InN/In0.75Ga0.25N complementary heterojunction-enhanced tunneling field-effect transistors (HE-TFETs) were characterized using the numerical simulation. InN/In0.75Ga0.25N HE-TFET has an InN/In0.75Ga0.25N heterojunction located in the channel region with a distance of LT-H from the source/channel tunneling junction. We demonstrate that, for both n- and p-channel devices, HE-TFETs have a delay of onset voltage VONSET, a steeper subthreshold swing (SS), and an enhanced on-state current ION in comparison with the homo-TFETs. InN/In0.75Ga0.25N n- and p-channel HE-TFETs with a gate length LG of 25 nm and a LT-H of 5 nm achieve a 7 and 9 times ION improvement in comparison with the homo devices, respectively, at a supply voltage of 0.3 V. The performance enhancement in HE-TFETs is attributed to the modulating effect of heterojunction on band-to-band tunneling (BTBT). Because InN/In0.75Ga0.25N heterointerface shows the similar band offsets at conduction and valence bands, the InN/In0.75Ga0.25N heterojunction exhibits the improved effect on BTBT for both n- and p-channel devices. This makes InN/In0.75Ga0.25N heterojunction a promising structure for high performance complementary TFETs.

Vacuum field-effect transistor with a deep submicron channel fabricated by electro-forming

NASA Astrophysics Data System (ADS)

Wang, Xiao; Shen, Zhihua; Wu, Shengli; Zhang, Jintao

2017-06-01

Vacuum field-effect transistors (VFETs) with channel lengths down to 500 nm (i.e., the deep submicron scale) were fabricated with the mature technology of the surface conduction electron emitter fabrication process in our former experiments. The vacuum channel of this new VFET was generated by using the electro-forming process. During electro-forming, the joule heat cracks the conductive film and then generates the submicron scale gap that serves as the vacuum channel. The gap separates the conductive film into two plane-to-plane electrodes, which serve as a source (cathode) electrode and a drain (anode) electrode of the VFET, respectively. Experimental results reveal that the fabricated device demonstrates a clear triode behavior of the gate modulation. Fowler-Nordheim theory was used to analyze the electron emission mechanism and operating principle of the device.

Performance comparison between p–i–n and p–n junction tunneling field-effect transistors

NASA Astrophysics Data System (ADS)

Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man

2018-06-01

In this study, we investigated the direct-current (DC) and radio-frequency (RF) performances of p–i–n and p–n junction tunneling field-effect transistors (TFETs). Compared to the p–i–n junction TFET, the p–n junction TFET exhibited higher on-state current (I on) because the channel formation mechanism of the p–n junction TFET resulted in a narrower tunneling barrier and an expanded tunneling area. Further, the reduction of I on of the p–n junction TFET by the interface trap was smaller. Moreover, the p–n junction TFET exhibited lower gate-to-drain capacitance (C gd) because a depletion capacitance (C gd,dep) was formed by the depletion region under gate dielectric. Consequently, the p–n junction TFET achieved an improvement of cut-off frequency (f T) and intrinsic delay time (τ), which are related to the current performance and total gate capacitance (C gg). We confirmed the enhancement of device performances in terms of I on, f T, and τ by the conduction mechanism of the p–n junction TFET.

Effects of channel thickness on oxide thin film transistor with double-stacked channel layer

NASA Astrophysics Data System (ADS)

Lee, Kimoon; Kim, Yong-Hoon; Yoon, Sung-Min; Kim, Jiwan; Oh, Min Suk

2017-11-01

To improve the field effect mobility and control the threshold voltage ( V th ) of oxide thin film transistors (TFTs), we fabricated the oxide TFTs with double-stacked channel layers which consist of thick Zn-Sn-O (ZTO) and very thin In-Zn-O (IZO) layers. We investigated the effects of the thickness of thin conductive layer and the conductivity of thick layer on oxide TFTs with doublestacked channel layer. When we changed the thickness of thin conductive IZO channel layer, the resistivity values were changed. This resistivity of thin channel layer affected on the saturation field effect mobility and the off current of TFTs. In case of the thick ZTO channel layer which was deposited by sputtering in Ar: O2 = 10: 1, the device showed better performances than that which was deposited in Ar: O2 = 1: 1. Our TFTs showed high mobility ( μ FE ) of 40.7 cm2/Vs and V th of 4.3 V. We assumed that high mobility and the controlled V th were caused by thin conductive IZO layer and thick stable ZTO layer. Therefore, this double-stacked channel structure can be very promising way to improve the electrical characteristics of various oxide thin film transistors.

Ferroelectric field-effect transistors based on solution-processed electrochemically exfoliated graphene

NASA Astrophysics Data System (ADS)

Heidler, Jonas; Yang, Sheng; Feng, Xinliang; Müllen, Klaus; Asadi, Kamal

2018-06-01

Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.

Enhanced transconductance in a double-gate graphene field-effect transistor

NASA Astrophysics Data System (ADS)

Hwang, Byeong-Woon; Yeom, Hye-In; Kim, Daewon; Kim, Choong-Ki; Lee, Dongil; Choi, Yang-Kyu

2018-03-01

Multi-gate transistors, such as double-gate, tri-gate and gate-all-around transistors are the most advanced Si transistor structure today. Here, a genuine double-gate transistor with a graphene channel is experimentally demonstrated. The top and bottom gates of the double-gate graphene field-effect transistor (DG GFET) are electrically connected so that the conductivity of the graphene channel can be modulated simultaneously by both the top and bottom gate. A single-gate graphene field-effect transistor (SG GFET) with only the top gate is also fabricated as a control device. For systematical analysis, the transfer characteristics of both GFETs were measured and compared. Whereas the maximum transconductance of the SG GFET was 17.1 μS/μm, that of the DG GFET was 25.7 μS/μm, which is approximately a 50% enhancement. The enhancement of the transconductance was reproduced and comprehensively explained by a physics-based compact model for GFETs. The investigation of the enhanced transfer characteristics of the DG GFET in this work shows the possibility of a multi-gate architecture for high-performance graphene transistor technology.

Nature of size effects in compact models of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torkhov, N. A., E-mail: trkf@mail.ru; Scientific-Research Institute of Semiconductor Devices, Tomsk 634050; Tomsk State University of Control Systems and Radioelectronics, Tomsk 634050

Investigations have shown that in the local approximation (for sizes L < 100 μm), AlGaN/GaN high electron mobility transistor (HEMT) structures satisfy to all properties of chaotic systems and can be described in the language of fractal geometry of fractional dimensions. For such objects, values of their electrophysical characteristics depend on the linear sizes of the examined regions, which explain the presence of the so-called size effects—dependences of the electrophysical and instrumental characteristics on the linear sizes of the active elements of semiconductor devices. In the present work, a relationship has been established for the linear model parameters of themore » equivalent circuit elements of internal transistors with fractal geometry of the heteroepitaxial structure manifested through a dependence of its relative electrophysical characteristics on the linear sizes of the examined surface areas. For the HEMTs, this implies dependences of their relative static (A/mm, mA/V/mm, Ω/mm, etc.) and microwave characteristics (W/mm) on the width d of the sink-source channel and on the number of sections n that leads to a nonlinear dependence of the retrieved parameter values of equivalent circuit elements of linear internal transistor models on n and d. Thus, it has been demonstrated that the size effects in semiconductors determined by the fractal geometry must be taken into account when investigating the properties of semiconductor objects on the levels less than the local approximation limit and designing and manufacturing field effect transistors. In general, the suggested approach allows a complex of problems to be solved on designing, optimizing, and retrieving the parameters of equivalent circuits of linear and nonlinear models of not only field effect transistors but also any arbitrary semiconductor devices with nonlinear instrumental characteristics.« less

Performance enhancement in uniaxially tensile stressed GeSn n-channel fin tunneling field-effect transistor: Impact of stress direction

NASA Astrophysics Data System (ADS)

Wang, Hongjuan; Han, Genquan; Jiang, Xiangwei; Liu, Yan; Zhang, Chunfu; Zhang, Jincheng; Hao, Yue

2017-04-01

In this work, the boosting effect on the performance of GeSn n-channel fin tunneling FET (nFinTFET) enabled by uniaxial tensile stress is investigated theoretically. As the fin rotates within the (001) plane, the uniaxial tensile stress is always along its direction. The electrical characteristics of tensile-stressed GeSn nFinTFETs with point and line tunneling modes are computed utilizing the technology computer aided design (TCAD) simulator in which the dynamic nonlocal band-to-band tunneling (BTBT) algorithm is employed. In comparison with the relaxed devices, tensile-stressed GeSn nFinTFETs achieve a substantial enhancement in band-to-band tunneling generation rate (G BTBT) and on-state current I ON owing to the reduced bandgap E G induced by the tensile stress. Performance improvement of GeSn nFinTFETs induced by tensile stress demonstrates a strong dependence on channel direction and tunneling modes. Under the same magnitude of stress, line-nFinTFETs obtain a more pronounced I ON enhancement over the transistors with point tunneling mode.

Modeling of high composition AlGaN channel high electron mobility transistors with large threshold voltage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bajaj, Sanyam, E-mail: bajaj.10@osu.edu; Hung, Ting-Hsiang; Akyol, Fatih

2014-12-29

We report on the potential of high electron mobility transistors (HEMTs) consisting of high composition AlGaN channel and barrier layers for power switching applications. Detailed two-dimensional (2D) simulations show that threshold voltages in excess of 3 V can be achieved through the use of AlGaN channel layers. We also calculate the 2D electron gas mobility in AlGaN channel HEMTs and evaluate their power figures of merit as a function of device operating temperature and Al mole fraction in the channel. Our models show that power switching transistors with AlGaN channels would have comparable on-resistance to GaN-channel based transistors for the samemore » operation voltage. The modeling in this paper shows the potential of high composition AlGaN as a channel material for future high threshold enhancement mode transistors.« less

Catalytic activity of enzymes immobilized on AlGaN /GaN solution gate field-effect transistors

NASA Astrophysics Data System (ADS)

Baur, B.; Howgate, J.; von Ribbeck, H.-G.; Gawlina, Y.; Bandalo, V.; Steinhoff, G.; Stutzmann, M.; Eickhoff, M.

2006-10-01

Enzyme-modified field-effect transistors (EnFETs) were prepared by immobilization of penicillinase on AlGaN /GaN solution gate field-effect transistors. The influence of the immobilization process on enzyme functionality was analyzed by comparing covalent immobilization and physisorption. Covalent immobilization by Schiff base formation on GaN surfaces modified with an aminopropyltriethoxysilane monolayer exhibits high reproducibility with respect to the enzyme/substrate affinity. Reductive amination of the Schiff base bonds to secondary amines significantly increases the stability of the enzyme layer. Electronic characterization of the EnFET response to penicillin G indicates that covalent immobilization leads to the formation of an enzyme (sub)monolayer.

Enhanced mobility in vertically scaled N-polar high-electron-mobility transistors using GaN/InGaN composite channels

NASA Astrophysics Data System (ADS)

Li, Haoran; Wienecke, Steven; Romanczyk, Brian; Ahmadi, Elaheh; Guidry, Matthew; Zheng, Xun; Keller, Stacia; Mishra, Umesh K.

2018-02-01

A GaN/InGaN composite channel design for vertically scaled N-polar high-electron-mobility transistor (HEMT) structures is proposed and demonstrated by metal-organic chemical vapor deposition. In a conventional N-polar HEMT structure, as the channel thickness (tch) decreases, the sheet charge density (ns) decreases, the electric field in the channel increases, and the centroid of the two-dimensional electron gas (2DEG) moves towards the back-barrier/channel interface, resulting in stronger scattering and lower electron mobility (μ). In this study, a thin InGaN layer was introduced in-between the channel and the AlGaN cap to increase the 2DEG density and reduce the electric field in the channel and therefore increase the electron mobility. The dependence of μ on the InGaN thickness (tInGaN) and the indium composition (xIn) was investigated for different channel thicknesses. With optimized tInGaN and xIn, significant improvements in electron mobility were observed. For a 6 nm channel HEMT structure, the electron mobility increased from 606 to 1141 cm2/(V.s) when the 6 nm thick pure GaN channel was replaced by the 4 nm GaN/2 nm In0.1Ga0.9N composite channel.

Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

DOEpatents

Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

2001-01-01

A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

Characterization of vertical GaN p-n diodes and junction field-effect transistors on bulk GaN down to cryogenic temperatures

NASA Astrophysics Data System (ADS)

Kizilyalli, I. C.; Aktas, O.

2015-12-01

There is great interest in wide-bandgap semiconductor devices and most recently in vertical GaN structures for power electronic applications such as power supplies, solar inverters and motor drives. In this paper the temperature-dependent electrical behavior of vertical GaN p-n diodes and vertical junction field-effect transistors fabricated on bulk GaN substrates of low defect density (104 to 106 cm-2) is described. Homoepitaxial MOCVD growth of GaN on its native substrate and the ability to control the doping in the drift layers in GaN have allowed the realization of vertical device architectures with drift layer thicknesses of 6 to 40 μm and net carrier electron concentrations as low as 1 × 1015 cm-3. This parameter range is suitable for applications requiring breakdown voltages of 1.2 kV to 5 kV. Mg, which is used as a p-type dopant in GaN, is a relatively deep acceptor (E A ≈ 0.18 eV) and susceptible to freeze-out at temperatures below 200 K. The loss of holes in p-GaN has a deleterious effect on p-n junction behavior, p-GaN contacts and channel control in junction field-effect transistors at temperatures below 200 K. Impact ionization-based avalanche breakdown (BV > 1200 V) in GaN p-n junctions is characterized between 77 K and 423 K for the first time. At higher temperatures the p-n junction breakdown voltage improves due to increased phonon scattering. A positive temperature coefficient in the breakdown voltage is demonstrated down to 77 K; however, the device breakdown characteristics are not as abrupt at temperatures below 200 K. On the other hand, contact resistance to p-GaN is reduced dramatically above room temperature, improving the overall device performance in GaN p-n diodes in all cases except where the n-type drift region resistance dominates the total forward resistance. In this case, the electron mobility can be deconvolved and is found to decrease with T -3/2, consistent with a phonon scattering model. Also, normally-on vertical junction

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Graphene-graphite oxide field-effect transistors.

PubMed

Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

2012-03-14

Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

Non-localized trapping effects in AlGaN/GaN heterojunction field-effect transistors subjected to on-state bias stress

NASA Astrophysics Data System (ADS)

Hu, Cheng-Yu; Hashizume, Tamotsu

2012-04-01

For AlGaN/GaN heterojunction field-effect transistors, on-state-bias-stress (on-stress)-induced trapping effects were observed across the entire drain access region, not only at the gate edge. However, during the application of on-stress, the highest electric field was only localized at the drain side of the gate edge. Using the location of the highest electric field as a reference, the trapping effects at the gate edge and at the more distant access region were referred to as localized and non-localized trapping effect, respectively. Using two-dimensional-electron-gas sensing-bar (2DEG-sensing-bar) and dual-gate structures, the non-localized trapping effects were investigated and the trap density was measured to be ˜1.3 × 1012 cm-2. The effect of passivation was also discussed. It was found that both surface leakage currents and hot electrons are responsible for the non-localized trapping effects with hot electrons having the dominant effect. Since hot electrons are generated from the 2DEG channel, it is highly likely that the involved traps are mainly in the GaN buffer layer. Using monochromatic irradiation (1.24-2.81 eV), the trap levels responsible for the non-localized trapping effects were found to be located at 0.6-1.6 eV from the valence band of GaN. Both trap-assisted impact ionization and direct channel electron injection are proposed as the possible mechanisms of the hot-electron-related non-localized trapping effect. Finally, using the 2DEG-sensing-bar structure, we directly confirmed that blocking gate injected electrons is an important mechanism of Al2O3 passivation.

Lead iodide perovskite light-emitting field-effect transistor

PubMed Central

Chin, Xin Yu; Cortecchia, Daniele; Yin, Jun; Bruno, Annalisa; Soci, Cesare

2015-01-01

Despite the widespread use of solution-processable hybrid organic–inorganic perovskites in photovoltaic and light-emitting applications, determination of their intrinsic charge transport parameters has been elusive due to the variability of film preparation and history-dependent device performance. Here we show that screening effects associated to ionic transport can be effectively eliminated by lowering the operating temperature of methylammonium lead iodide perovskite (CH3NH3PbI3) field-effect transistors. Field-effect carrier mobility is found to increase by almost two orders of magnitude below 200 K, consistent with phonon scattering-limited transport. Under balanced ambipolar carrier injection, gate-dependent electroluminescence is also observed from the transistor channel, with spectra revealing the tetragonal to orthorhombic phase transition. This demonstration of CH3NH3PbI3 light-emitting field-effect transistors provides intrinsic transport parameters to guide materials and solar cell optimization, and will drive the development of new electro-optic device concepts, such as gated light-emitting diodes and lasers operating at room temperature. PMID:26108967

Universal core model for multiple-gate field-effect transistors with short channel and quantum mechanical effects

NASA Astrophysics Data System (ADS)

Shin, Yong Hyeon; Bae, Min Soo; Park, Chuntaek; Park, Joung Won; Park, Hyunwoo; Lee, Yong Ju; Yun, Ilgu

2018-06-01

A universal core model for multiple-gate (MG) field-effect transistors (FETs) with short channel effects (SCEs) and quantum mechanical effects (QMEs) is proposed. By using a Young’s approximation based solution for one-dimensional Poisson’s equations the total inversion charge density (Q inv ) in the channel is modeled for double-gate (DG) and surrounding-gate SG (SG) FETs, following which a universal charge model is derived based on the similarity of the solutions, including for quadruple-gate (QG) FETs. For triple-gate (TG) FETs, the average of DG and QG FETs are used. A SCEs model is also proposed considering the potential difference between the channel’s surface and center. Finally, a QMEs model for MG FETs is developed using the quantum correction compact model. The proposed universal core model is validated on commercially available three-dimensional ATLAS numerical simulations.

A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell Design

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Bailey, Mark; Ho, Fat Duen

2004-01-01

The use of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) in a resistive-load SRAM memory cell has been investigated A typical two-transistor resistive-load SRAM memory cell architecture is modified by replacing one of the NMOS transistors with an n-channel MFSFET. The gate of the MFSFET is connected to a polling voltage pulse instead of the other NMOS transistor drain. The polling voltage pulses are of sufficient magnitude to saturate the ferroelectric gate material and force the MFSFET into a particular logic state. The memory cell circuit is further modified by the addition of a PMOS transistor and a load resistor in order to improve the retention characteristics of the memory cell. The retention characteristics of both the "1" and "0" logic states are simulated. The simulations show that the MFSFET memory cell design can maintain both the "1" and "0" logic states for a long period of time.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates.

PubMed

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Koo, Yong-Seo; Kim, Sangsig

2009-11-11

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Channel scaling and field-effect mobility extraction in amorphous InZnO thin film transistors

NASA Astrophysics Data System (ADS)

Lee, Sunghwan; Song, Yang; Park, Hongsik; Zaslavsky, A.; Paine, D. C.

2017-09-01

Amorphous oxide semiconductors (AOSs) based on indium oxides are of great interest for next generation ultra-high definition displays that require much smaller pixel driving elements. We describe the scaling behavior in amorphous InZnO thin film transistors (TFTs) with a significant decrease in the extracted field-effect mobility μFE with channel length L (from 39.3 to 9.9 cm2/V·s as L is reduced from 50 to 5 μm). Transmission line model measurements reveal that channel scaling leads to a significant μFE underestimation due to contact resistance (RC) at the metallization/channel interface. Therefore, we suggest a method of extracting correct μFE when the TFT performance is significantly affected by RC. The corrected μFE values are higher (45.4 cm2/V·s) and nearly independent of L. The results show the critical effect of contact resistance on μFE measurements and suggest strategies to determine accurate μFE when a TFT channel is scaled.

Large contact noise in graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Karnatak, Paritosh; Sai, Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

Fluctuations in the electrical resistance at the interface of atomically thin materials and metals, or the contact noise, can adversely affect the device performance but remains largely unexplored. We have investigated contact noise in graphene field effect transistors of varying device geometry and contact configuration, with channel carrier mobility ranging from 5,000 to 80,000 cm2V-1s-1. A phenomenological model developed for contact noise due to current crowding for two dimensional conductors, shows a dominant contact contribution to the measured resistance noise in all graphene field effect transistors when measured in the two-probe or invasive four probe configurations, and surprisingly, also in nearly noninvasive four probe (Hall bar) configuration in the high mobility devices. We identify the fluctuating electrostatic environment of the metal-channel interface as the major source of contact noise, which could be generic to two dimensional material-based electronic devices. The work was financially supported by the Department of Science and Technology, India and Tokyo Electron Limited.

Graphene-based field-effect transistor biosensors

DOEpatents

Chen; , Junhong; Mao, Shun; Lu, Ganhua

2017-06-14

The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.

A III-V nanowire channel on silicon for high-performance vertical transistors.

PubMed

Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

2012-08-09

Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

Gallium nitride junction field-effect transistor

DOEpatents

Zolper, John C.; Shul, Randy J.

1999-01-01

An all-ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorous co-implantation, in selected III-V semiconductor materials.

Enhancing Photoresponsivity of Self-Aligned MoS2 Field-Effect Transistors by Piezo-Phototronic Effect from GaN Nanowires.

PubMed

Liu, Xingqiang; Yang, Xiaonian; Gao, Guoyun; Yang, Zhenyu; Liu, Haitao; Li, Qiang; Lou, Zheng; Shen, Guozhen; Liao, Lei; Pan, Caofeng; Lin Wang, Zhong

2016-08-23

We report high-performance self-aligned MoS2 field-effect transistors (FETs) with enhanced photoresponsivity by the piezo-phototronic effect. The FETs are fabricated based on monolayer MoS2 with a piezoelectric GaN nanowire (NW) as the local gate, and a self-aligned process is employed to define the source/drain electrodes. The fabrication method allows the preservation of the intrinsic property of MoS2 and suppresses the scattering center density in the MoS2/GaN interface, which results in high electrical and photoelectric performances. MoS2 FETs with channel lengths of ∼200 nm have been fabricated with a small subthreshold slope of 64 mV/dec. The photoresponsivity is 443.3 A·W(-1), with a fast response and recovery time of ∼5 ms under 550 nm light illumination. When strain is introduced into the GaN NW, the photoresponsivity is further enhanced to 734.5 A·W(-1) and maintains consistent response and recovery time, which is comparable with that of the mechanical exfoliation of MoS2 transistors. The approach presented here opens an avenue to high-performance top-gated piezo-enhanced MoS2 photodetectors.

Black Phosphorus-Zinc Oxide Nanomaterial Heterojunction for p-n Diode and Junction Field-Effect Transistor.

PubMed

Jeon, Pyo Jin; Lee, Young Tack; Lim, June Yeong; Kim, Jin Sung; Hwang, Do Kyung; Im, Seongil

2016-02-10

Black phosphorus (BP) nanosheet is two-dimensional (2D) semiconductor with distinct band gap and attracting recent attention from researches because it has some similarity to gapless 2D semiconductor graphene in the following two aspects: single element (P) for its composition and quite high mobilities depending on its fabrication conditions. Apart from several electronic applications reported with BP nanosheet, here we report for the first time BP nanosheet-ZnO nanowire 2D-1D heterojunction applications for p-n diodes and BP-gated junction field effect transistors (JFETs) with n-ZnO channel on glass. For these nanodevices, we take advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO. As a result, our BP-ZnO nanodimension p-n diode displays a high ON/OFF ratio of ∼10(4) in static rectification and shows kilohertz dynamic rectification as well while ZnO nanowire channel JFET operations are nicely demonstrated by BP gate switching in both electrostatics and kilohertz dynamics.

Double gate graphene nanoribbon field effect transistor with single halo pocket in channel region

NASA Astrophysics Data System (ADS)

Naderi, Ali

2016-01-01

A new structure for graphene nanoribbon field-effect transistors (GNRFETs) is proposed and investigated using quantum simulation with a nonequilibrium Green's function (NEGF) method. Tunneling leakage current and ambipolar conduction are known effects for MOSFET-like GNRFETs. To minimize these issues a novel structure with a simple change of the GNRFETs by using single halo pocket in the intrinsic channel region, "Single Halo GNRFET (SH-GNRFET)", is proposed. An appropriate halo pocket at source side of channel is used to modify potential distribution of the gate region and weaken band to band tunneling (BTBT). In devices with materials like Si in channel region, doping type of halo and source/drain regions are different. But, here, due to the smaller bandgap of graphene, the mentioned doping types should be the same to reduce BTBT. Simulations have shown that in comparison with conventional GNRFET (C-GNRFET), an SH-GNRFET with appropriately halo doping results in a larger ON current (Ion), smaller OFF current (Ioff), a larger ON-OFF current ratio (Ion/Ioff), superior ambipolar characteristics, a reduced power-delay product and lower delay time.

Gallium nitride junction field-effect transistor

DOEpatents

Zolper, J.C.; Shul, R.J.

1999-02-02

An ion implanted gallium-nitride (GaN) junction field-effect transistor (JFET) and method of making the same are disclosed. Also disclosed are various ion implants, both n- and p-type, together with or without phosphorus co-implantation, in selected III-V semiconductor materials. 19 figs.

Terahertz signal detection in a short gate length field-effect transistor with a two-dimensional electron gas

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vostokov, N. V., E-mail: vostokov@ipm.sci-nnov.ru; Shashkin, V. I.

2015-11-28

We consider the problem of non-resonant detection of terahertz signals in a short gate length field-effect transistor having a two-dimensional electron channel with zero external bias between the source and the drain. The channel resistance, gate-channel capacitance, and quadratic nonlinearity parameter of the transistor during detection as a function of the gate bias voltage are studied. Characteristics of detection of the transistor connected in an antenna with real impedance are analyzed. The consideration is based on both a simple one-dimensional model of the transistor and allowance for the two-dimensional distribution of the electric field in the transistor structure. The resultsmore » given by the different models are discussed.« less

Tunable SnSe2 /WSe2 Heterostructure Tunneling Field Effect Transistor.

PubMed

Yan, Xiao; Liu, Chunsen; Li, Chao; Bao, Wenzhong; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2017-09-01

The burgeoning 2D semiconductors can maintain excellent device electrostatics with an ultranarrow channel length and can realize tunneling by electrostatic gating to avoid deprivation of band-edge sharpness resulting from chemical doping, which make them perfect candidates for tunneling field effect transistors. Here this study presents SnSe 2 /WSe 2 van der Waals heterostructures with SnSe 2 as the p-layer and WSe 2 as the n-layer. The energy band alignment changes from a staggered gap band offset (type-II) to a broken gap (type-III) when changing the negative back-gate voltage to positive, resulting in the device operating as a rectifier diode (rectification ratio ~10 4 ) or an n-type tunneling field effect transistor, respectively. A steep average subthreshold swing of 80 mV dec -1 for exceeding two decades of drain current with a minimum of 37 mV dec -1 at room temperature is observed, and an evident trend toward negative differential resistance is also accomplished for the tunneling field effect transistor due to the high gate efficiency of 0.36 for single gate devices. The I ON /I OFF ratio of the transfer characteristics is >10 6 , accompanying a high ON current >10 -5 A. This work presents original phenomena of multilayer 2D van der Waals heterostructures which can be applied to low-power consumption devices. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Ambipolar pentacene field-effect transistor with double-layer organic insulator

NASA Astrophysics Data System (ADS)

Kwak, Jeong-Hun; Baek, Heume-Il; Lee, Changhee

2006-08-01

Ambipolar conduction in organic field-effect transistor is very important feature to achieve organic CMOS circuitry. We fabricated an ambipolar pentacene field-effect transistors consisted of gold source-drain electrodes and double-layered PMMA (Polymethylmethacrylate) / PVA (Polyvinyl Alcohol) organic insulator on the ITO(Indium-tin-oxide)-patterned glass substrate. These top-contact geometry field-effect transistors were fabricated in the vacuum of 10 -6 Torr and minimally exposed to atmosphere before its measurement and characterized in the vacuum condition. Our device showed reasonable p-type characteristics of field-effect hole mobility of 0.2-0.9 cm2/Vs and the current ON/OFF ratio of about 10 6 compared to prior reports with similar configurations. For the n-type characteristics, field-effect electron mobility of 0.004-0.008 cm2/Vs and the current ON/OFF ratio of about 10 3 were measured, which is relatively high performance for the n-type conduction of pentacene field-effect transistors. We attributed these ambipolar properties mainly to the hydroxyl-free PMMA insulator interface with the pentacene active layer. In addition, an increased insulator capacitance due to double-layer insulator structure with high-k PVA layer also helped us to observe relatively good n-type characteristics.

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2015-07-21

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

Analyte chemisorption and sensing on n- and p-channel copper phthalocyanine thin-film transistors.

PubMed

Yang, Richard D; Park, Jeongwon; Colesniuc, Corneliu N; Schuller, Ivan K; Royer, James E; Trogler, William C; Kummel, Andrew C

2009-04-28

Chemical sensing properties of phthalocyanine thin-film transistors have been investigated using nearly identical n- and p-channel devices. P-type copper phthalocyanine (CuPc) has been modified with fluorine groups to convert the charge carriers from holes to electrons. The sensor responses to the tight binding analyte dimethyl methylphosphonate (DMMP) and weak binding analyte methanol (MeOH) were compared in air and N(2). The results suggest that the sensor response involves counterdoping of pre-adsorbed oxygen (O(2)). A linear dependence of chemical response to DMMP concentration was observed in both n- and p- type devices. For DMMP, there is a factor of 2.5 difference in the chemical sensitivity between n- and p-channel CuPc thin-film transistors, even though it has similar binding strength to n- and p-type CuPc molecules as indicated by the desorption times. The effect is attributed to the difference in the analyte perturbation of electron and hole trap energies in n- and p-type materials.

Hydrothermally Processed Photosensitive Field-Effect Transistor Based on ZnO Nanorod Networks

NASA Astrophysics Data System (ADS)

Kumar, Ashish; Bhargava, Kshitij; Dixit, Tejendra; Palani, I. A.; Singh, Vipul

2016-11-01

Formation of a stable, reproducible zinc oxide (ZnO) nanorod-network-based photosensitive field-effect transistor using a hydrothermal process at low temperature has been demonstrated. K2Cr2O7 additive was used to improve adhesion and facilitate growth of the ZnO nanorod network over the SiO2/Si substrate. Transistor characteristics obtained in the dark resemble those of the n-channel-mode field-effect transistor (FET). The devices showed I on/ I off ratio above 8 × 102 under dark condition, field-effect mobility of 4.49 cm2 V-1 s-1, and threshold voltage of -12 V. Further, under ultraviolet (UV) illumination, the FET exhibited sensitivity of 2.7 × 102 in off-state (-10 V) versus 1.4 in on-state (+9.7 V) of operation. FETs based on such nanorod networks showed good photoresponse, which is attributed to the large surface area of the nanorod network. The growth temperature for ZnO nanorod networks was kept at 110°C, enabling a low-temperature, cost-effective, simple approach for high-performance ZnO-based FETs for large-scale production. The role of network interfaces in the FET performance is also discussed.

Proton Damage Effects on Carbon Nanotube Field-Effect Transistors

DTIC Science & Technology

2014-06-19

PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Evan R. Kemp, Ctr...United States. AFIT-ENP-T-14-J-39 PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS THESIS Presented to...PROTON DAMAGE EFFECTS ON CARBON NANOTUBE FIELD-EFFECT TRANSISTORS Evan R. Kemp, BS Ctr, USAF Approved: // Signed

Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

DOEpatents

Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

1984-04-19

In a field-effect transistor comprising a semiconductor having therein a source, a drain, a channel and a gate in operational relationship, there is provided an improvement wherein said semiconductor is a superlattice comprising alternating quantum well and barrier layers, the quantum well layers comprising a first direct gap semiconductor material which in bulk form has a certain bandgap and a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, the barrier layers comprising a second semiconductor material having a bandgap wider than that of said first semiconductor material, wherein the layer thicknesses of said quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice having a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, and wherein the thicknesses of said quantum well layers are selected to provide a superlattice curve of electron velocity versus applied electric field whereby, at applied electric fields higher than that at which the maximum electron velocity occurs in said first material when in bulk form, the electron velocities are higher in said superlattice than they are in said first semiconductor material in bulk form.

Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

DOEpatents

Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

1987-06-08

A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space. The layer thicknesses of the quantum well layers are selected to provide a superlattice L/sub 2D/-valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley. 2 figs.

Fabrication and analysis of polymer field-effect transistors

NASA Astrophysics Data System (ADS)

Scheinert, S.; Paasch, G.

2004-05-01

Parameters of organic field-effect transistors (OFET) achieved in recent years are promising enough for R & D activities towards a commercial low-cost polymer electronics. In spite of the fast progress, preparations dominated by trial and error are concentrated essentially on higher mobility polymers and shorter channel patterning, and the analysis of measured data is based on oversimplified models. Here ways to professionalize the research on polymer field-effect transistors are discussed exploiting experience accumulated in microelectronics. First of all, designing the devices before fabricating and subsequently analyzing them requires appropriate modelling. Almost independently from the nature of the transport process, the device physics is basically described by the drift-diffusion model, combined with non-degenerate carrier statistics. Therefore, with a modified interpretation of the so-called effective density of states, existing simulation tools can be applied, except for special cases which are discussed. Analytical estimates are helpful already in designing devices, and applied to experimental data they yield input parameters for the numerical simulations. Preparations of OFET's and capacitors with poly(3-ocylthiophene) (P3OT), poly(3-dodecylthiophene) P3HT, Arylamino-poly-(phenylene-vinylene) (PPV), poly(2-methoxy, 5 ethyl (2 hexyloxy) paraphenylenevinylene) MEH-PPV, and pentacene from a soluble precursor are described, with silicon dioxide (SiO2) or poly(4-vinylphenol) (P4VP) as gate insulator, and with rather different channel length. We demonstrate the advantage of combining all steps from design/fabrication to analysis of the experimental data with analytical estimates and numerical simulation. Of special importance is the connection between mobility, transistor channel length, cut-off frequency and operation voltage, which was the starting point for the development of a low-cost fabrication of high-performance submicrometer OFET's by an underetching

Bias temperature instability in tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

2017-04-01

We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.

Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance

DOEpatents

Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.

2000-01-01

A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

Comparison between the effects of positive noncatastrophic HMB ESD stress in n-channel and p-channel power MOSFET's

NASA Astrophysics Data System (ADS)

Zupac, Dragan; Kosier, Steven L.; Schrimpf, Ronald D.; Galloway, Kenneth F.; Baum, Keith W.

1991-10-01

The effect of noncatastrophic positive human body model (HBM) electrostatic discharge (ESD) stress on n-channel power MOSFETs is radically different from that on p-channel MOSFETs. In n-channel transistors, the stress causes negative shifts of the current-voltage characteristics indicative of positive charge trapping in the gate oxide. In p-channel transistors, the stress increases the drain-to-source leakage current, probably due to localized avalanche electron injection from the p-doped drain.

Gate frequency sweep: An effective method to evaluate the dynamic performance of AlGaN/GaN power heterojunction field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Santi, C. de; Meneghini, M., E-mail: matteo.meneghini@dei.unipd.it; Meneghesso, G.

2014-08-18

With this paper we propose a test method for evaluating the dynamic performance of GaN-based transistors, namely, gate-frequency sweep measurements: the effectiveness of the method is verified by characterizing the dynamic performance of Gate Injection Transistors. We demonstrate that this method can provide an effective description of the impact of traps on the transient performance of Heterojunction Field Effect Transistors, and information on the properties (activation energy and cross section) of the related defects. Moreover, we discuss the relation between the results obtained by gate-frequency sweep measurements and those collected by conventional drain current transients and double pulse characterization.

Organic-inorganic proximity effect in the magneto-conductance of vertical organic field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Khachatryan, B.; Devir-Wolfman, A. H.; Ehrenfreund, E., E-mail: eitane@technion.ac.il

Vertical organic field effect transistors having a patterned source electrode and an a-SiO{sub 2} insulation layer show high performance as a switching element with high transfer characteristics. By measuring the low field magneto-conductance under ambient conditions at room temperature, we show here that the proximity of the inorganic a-SiO{sub 2} insulation to the organic conducting channel affects considerably the magnetic response. We propose that in n-type devices, electrons in the organic conducting channel and spin bearing charged defects in the inorganic a-SiO{sub 2} insulation layer (e.g., O{sub 2} = Si{sup +·}) form oppositely charged spin pairs whose singlet-triplet spin configurations are mixedmore » through the relatively strong hyperfine field of {sup 29}Si. By increasing the contact area between the insulation layer and the conducting channel, the ∼2% magneto-conductance response may be considerably enhanced.« less

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

NASA Astrophysics Data System (ADS)

Deen, David A.; Storm, David F.; Scott Katzer, D.; Bass, R.; Meyer, David J.

2016-08-01

A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain current after bias stressed in subthreshold. These structures additionally achieved small signal metrics ft/fmax of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with ft/fmax of 48/60 GHz.

Scanning gate study of organic thin-film field-effect transistor

NASA Astrophysics Data System (ADS)

Aoki, N.; Sudou, K.; Matsusaki, K.; Okamoto, K.; Ochiai, Y.

2008-03-01

Scanning gate microscopy (SGM) has been applied for a study of organic thin-film field effect transistor (OFET). In contrast to one-dimensional nano-material such a carbon nanonube or nano-structure such a quantum point contact, visualization a transport characteristic of OFET channel is basically rather difficult since the channel width is much larger than the size of the SGM tip. Nevertheless, Schottky barriers are successfully visualized at the boundary between the metal electrodes and the OFET channel at ambient atmosphere.

Current crowding mediated large contact noise in graphene field-effect transistors

PubMed Central

Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

2016-01-01

The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene–metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V−1 s−1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal–channel interface, which could be generic to two-dimensional material-based electronic devices. PMID:27929087

Current crowding mediated large contact noise in graphene field-effect transistors

NASA Astrophysics Data System (ADS)

Karnatak, Paritosh; Sai, T. Phanindra; Goswami, Srijit; Ghatak, Subhamoy; Kaushal, Sanjeev; Ghosh, Arindam

2016-12-01

The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene-metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm2 V-1 s-1. Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal-channel interface, which could be generic to two-dimensional material-based electronic devices.

Ultralow-power complementary metal-oxide-semiconductor inverters constructed on Schottky barrier modified nanowire metal-oxide-semiconductor field-effect-transistors.

PubMed

Ma, R M; Peng, R M; Wen, X N; Dai, L; Liu, C; Sun, T; Xu, W J; Qin, G G

2010-10-01

We show that the threshold voltages of both n- and p-channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) can be lowered to close to zero by adding extra Schottky contacts on top of nanowires (NWs). Novel complementary metal-oxide-semiconductor (CMOS) inverters are constructed on these Schottky barrier modified n- and p-channel NW MOSFETs. Based on the high performances of the modified n- and p-channel MOSFETs, especially the low threshold voltages, the as-fabricated CMOS inverters have low operating voltage, high voltage gain, and ultra-low static power dissipation.

Impact of metal gates on remote phonon scattering in titanium nitride/hafnium dioxide n-channel metal-oxide-semiconductor field effect transistors-low temperature electron mobility study

NASA Astrophysics Data System (ADS)

Maitra, Kingsuk; Frank, Martin M.; Narayanan, Vijay; Misra, Veena; Cartier, Eduard A.

2007-12-01

We report low temperature (40-300 K) electron mobility measurements on aggressively scaled [equivalent oxide thickness (EOT)=1 nm] n-channel metal-oxide-semiconductor field effect transistors (nMOSFETs) with HfO2 gate dielectrics and metal gate electrodes (TiN). A comparison is made with conventional nMOSFETs containing HfO2 with polycrystalline Si (poly-Si) gate electrodes. No substantial change in the temperature acceleration factor is observed when poly-Si is replaced with a metal gate, showing that soft optical phonons are not significantly screened by metal gates. A qualitative argument based on an analogy between remote phonon scattering and high-resolution electron energy-loss spectroscopy (HREELS) is provided to explain the underlying physics of the observed phenomenon. It is also shown that soft optical phonon scattering is strongly damped by thin SiO2 interface layers, such that room temperature electron mobility values at EOT=1 nm become competitive with values measured in nMOSFETs with SiON gate dielectrics used in current high performance processors.

The Current Collapse in AlGaN/GaN High-Electron Mobility Transistors Can Originate from the Energy Relaxation of Channel Electrons?

PubMed Central

Mao, Ling-Feng; Ning, Huan-Sheng; Wang, Jin-Yan

2015-01-01

Influence of the energy relaxation of the channel electrons on the performance of AlGaN/GaN high-electron mobility transistors (HEMTs) has been investigated using self-consistent solution to the coupled Schrödinger equation and Poisson equation. The first quantized energy level in the inversion layer rises and the average channel electron density decreases when the channel electric field increases from 20 kV/cm to 120 kV/cm. This research also demonstrates that the energy relaxation of the channel electrons can lead to current collapse and suggests that the energy relaxation should be considered in modeling the performance of AlGaN/GaN HEMTs such as, the gate leakage current, threshold voltage, source-drain current, capacitance-voltage curve, etc. PMID:26039589

The Current Collapse in AlGaN/GaN High-Electron Mobility Transistors Can Originate from the Energy Relaxation of Channel Electrons?

PubMed

Mao, Ling-Feng; Ning, Huan-Sheng; Wang, Jin-Yan

2015-01-01

Influence of the energy relaxation of the channel electrons on the performance of AlGaN/GaN high-electron mobility transistors (HEMTs) has been investigated using self-consistent solution to the coupled Schrödinger equation and Poisson equation. The first quantized energy level in the inversion layer rises and the average channel electron density decreases when the channel electric field increases from 20 kV/cm to 120 kV/cm. This research also demonstrates that the energy relaxation of the channel electrons can lead to current collapse and suggests that the energy relaxation should be considered in modeling the performance of AlGaN/GaN HEMTs such as, the gate leakage current, threshold voltage, source-drain current, capacitance-voltage curve, etc.

Coulomb blockade based field-effect transistors exploiting stripe-shaped channel geometries of self-assembled metal nanoparticles.

PubMed

Lehmann, Hauke; Willing, Svenja; Möller, Sandra; Volkmann, Mirjam; Klinke, Christian

2016-08-14

Metallic nanoparticles offer possibilities to build basic electric devices with new functionality and improved performance. Due to the small volume and the resulting low self-capacitance, each single nanoparticle exhibits a high charging energy. Thus, a Coulomb-energy gap emerges during transport experiments that can be shifted by electric fields, allowing for charge transport whenever energy levels of neighboring particles match. Hence, the state of the device changes sequentially between conducting and non-conducting instead of just one transition from conducting to pinch-off as in semiconductors. To exploit this behavior for field-effect transistors, it is necessary to use uniform nanoparticles in ordered arrays separated by well-defined tunnel barriers. In this work, CoPt nanoparticles with a narrow size distribution are synthesized by colloidal chemistry. These particles are deposited via the scalable Langmuir-Blodgett technique as ordered, homogeneous monolayers onto Si/SiO2 substrates with pre-patterned gold electrodes. The resulting nanoparticle arrays are limited to stripes of adjustable lengths and widths. In such a defined channel with a limited number of conduction paths the current can be controlled precisely by a gate voltage. Clearly pronounced Coulomb oscillations are observed up to temperatures of 150 K. Using such systems as field-effect transistors yields unprecedented oscillating current modulations with on/off-ratios of around 70%.

Models of second-order effects in metal-oxide-semiconductor field-effect transistors for computer applications

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John; Coss, James

1988-01-01

Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.

A unified analytical drain current model for Double-Gate Junctionless Field-Effect Transistors including short channel effects

NASA Astrophysics Data System (ADS)

Raksharam; Dutta, Aloke K.

2017-04-01

In this paper, a unified analytical model for the drain current of a symmetric Double-Gate Junctionless Field-Effect Transistor (DG-JLFET) is presented. The operation of the device has been classified into four modes: subthreshold, semi-depleted, accumulation, and hybrid; with the main focus of this work being on the accumulation mode, which has not been dealt with in detail so far in the literature. A physics-based model, using a simplified one-dimensional approach, has been developed for this mode, and it has been successfully integrated with the model for the hybrid mode. It also includes the effect of carrier mobility degradation due to the transverse electric field, which was hitherto missing in the earlier models reported in the literature. The piece-wise models have been unified using suitable interpolation functions. In addition, the model includes two most important short-channel effects pertaining to DG-JLFETs, namely the Drain Induced Barrier Lowering (DIBL) and the Subthreshold Swing (SS) degradation. The model is completely analytical, and is thus computationally highly efficient. The results of our model have shown an excellent match with those obtained from TCAD simulations for both long- and short-channel devices, as well as with the experimental data reported in the literature.

Performance improvement in novel germanium-tin/germanium heterojunction-enhanced p-channel tunneling field-effect transistor

NASA Astrophysics Data System (ADS)

Wang, Hongjuan; Liu, Yan; Liu, Mingshan; Zhang, Qingfang; Zhang, Chunfu; Ma, Xiaohua; Zhang, Jincheng; Hao, Yue; Han, Genquan

2015-07-01

We design a novel GeSn-based heterojunction-enhanced p-channel tunneling field-effect transistor (HE-PTFET) with a Ge0.92Sn0.08/Ge heterojunction located in channel region, at a distance of LT-H from the Ge0.92Sn0.08 source-channel tunneling junction (TJ). HE-PTFETs demonstrate the negative shift of onset voltage VONSET, the steeper subthreshold swing S, and the improved on-state current ION compared to Ge0.92Sn0.08 homo-PTFET. At low VGS, the suppression of BTBT due to the widening of the tunneling barrier caused by the heterojunction leads to a negative shift of VONSET in HE-PTFETs. At high VGS, ION enhancement in HE-PTFETs is achieved over the homo device, which is attributed to the confinement of BTBT in Ge0.92Sn0.08 source-channel TJ region by the heterojunction, where the short tunneling paths lead to a high tunneling probability. Due to the steeper average S, HE-PTFET with a 6 nm LT-H achieves a 4 times higher ION compared to homo device at a VDD of -0.3 V.

Anisotropic stress in narrow sGe fin field-effect transistor channels measured using nano-focused Raman spectroscopy

NASA Astrophysics Data System (ADS)

Nuytten, T.; Bogdanowicz, J.; Witters, L.; Eneman, G.; Hantschel, T.; Schulze, A.; Favia, P.; Bender, H.; De Wolf, I.; Vandervorst, W.

2018-05-01

The continued importance of strain engineering in semiconductor technology demands fast and reliable stress metrology that is non-destructive and process line-compatible. Raman spectroscopy meets these requirements but the diffraction limit prevents its application in current and future technology nodes. We show that nano-focused Raman scattering overcomes these limitations and can be combined with oil-immersion to obtain quantitative anisotropic stress measurements. We demonstrate accurate stress characterization in strained Ge fin field-effect transistor channels without sample preparation or advanced microscopy. The detailed analysis of the enhanced Raman response from a periodic array of 20 nm-wide Ge fins provides direct access to the stress levels inside the nanoscale channel, and the results are validated using nano-beam diffraction measurements.

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deen, David A., E-mail: david.deen@alumni.nd.edu; Storm, David F.; Scott Katzer, D.

A dual-channel AlN/GaN high electron mobility transistor (HEMT) architecture is demonstrated that leverages ultra-thin epitaxial layers to suppress surface-related gate lag. Two high-density two-dimensional electron gas (2DEG) channels are utilized in an AlN/GaN/AlN/GaN heterostructure wherein the top 2DEG serves as a quasi-equipotential that screens potential fluctuations resulting from distributed surface and interface states. The bottom channel serves as the transistor's modulated channel. Dual-channel AlN/GaN heterostructures were grown by molecular beam epitaxy on free-standing hydride vapor phase epitaxy GaN substrates. HEMTs fabricated with 300 nm long recessed gates demonstrated a gate lag ratio (GLR) of 0.88 with no degradation in drain currentmore » after bias stressed in subthreshold. These structures additionally achieved small signal metrics f{sub t}/f{sub max} of 27/46 GHz. These performance results are contrasted with the non-recessed gate dual-channel HEMT with a GLR of 0.74 and 82 mA/mm current collapse with f{sub t}/f{sub max} of 48/60 GHz.« less

Variability and reliability analysis in self-assembled multichannel carbon nanotube field-effect transistors

NASA Astrophysics Data System (ADS)

Hu, Zhaoying; Tulevski, George S.; Hannon, James B.; Afzali, Ali; Liehr, Michael; Park, Hongsik

2015-06-01

Carbon nanotubes (CNTs) have been widely studied as a channel material of scaled transistors for high-speed and low-power logic applications. In order to have sufficient drive current, it is widely assumed that CNT-based logic devices will have multiple CNTs in each channel. Understanding the effects of the number of CNTs on device performance can aid in the design of CNT field-effect transistors (CNTFETs). We have fabricated multi-CNT-channel CNTFETs with an 80-nm channel length using precise self-assembly methods. We describe compact statistical models and Monte Carlo simulations to analyze failure probability and the variability of the on-state current and threshold voltage. The results show that multichannel CNTFETs are more resilient to process variation and random environmental fluctuations than single-CNT devices.

Effects of Energy Relaxation via Quantum Coupling Among Three-Dimensional Motion on the Tunneling Current of Graphene Field-Effect Transistors.

PubMed

Mao, Ling-Feng; Ning, Huansheng; Li, Xijun

2015-12-01

We report theoretical study of the effects of energy relaxation on the tunneling current through the oxide layer of a two-dimensional graphene field-effect transistor. In the channel, when three-dimensional electron thermal motion is considered in the Schrödinger equation, the gate leakage current at a given oxide field largely increases with the channel electric field, electron mobility, and energy relaxation time of electrons. Such an increase can be especially significant when the channel electric field is larger than 1 kV/cm. Numerical calculations show that the relative increment of the tunneling current through the gate oxide will decrease with increasing the thickness of oxide layer when the oxide is a few nanometers thick. This highlights that energy relaxation effect needs to be considered in modeling graphene transistors.

Fluorination of Metal Phthalocyanines: Single-Crystal Growth, Efficient N-Channel Organic Field-Effect Transistors, and Structure-Property Relationships

PubMed Central

Jiang, Hui; Ye, Jun; Hu, Peng; Wei, Fengxia; Du, Kezhao; Wang, Ning; Ba, Te; Feng, Shuanglong; Kloc, Christian

2014-01-01

The fluorination of p-type metal phthalocyanines produces n-type semiconductors, allowing the design of organic electronic circuits that contain inexpensive heterojunctions made from chemically and thermally stable p- and n-type organic semiconductors. For the evaluation of close to intrinsic transport properties, high-quality centimeter-sized single crystals of F16CuPc, F16CoPc and F16ZnPc have been grown. New crystal structures of F16CuPc, F16CoPc and F16ZnPc have been determined. Organic single-crystal field-effect transistors have been fabricated to study the effects of the central metal atom on their charge transport properties. The F16ZnPc has the highest electron mobility (~1.1 cm2 V−1 s−1). Theoretical calculations indicate that the crystal structure and electronic structure of the central metal atom determine the transport properties of fluorinated metal phthalocyanines. PMID:25524460

Enhanced stability of thin film transistors with double-stacked amorphous IWO/IWO:N channel layer

NASA Astrophysics Data System (ADS)

Lin, Dong; Pi, Shubin; Yang, Jianwen; Tiwari, Nidhi; Ren, Jinhua; Zhang, Qun; Liu, Po-Tsun; Shieh, Han-Ping

2018-06-01

In this work, bottom-gate top-contact thin film transistors with double-stacked amorphous IWO/IWO:N channel layer were fabricated. Herein, amorphous IWO and N-doped IWO were deposited as front and back channel layers, respectively, by radio-frequency magnetron sputtering. The electrical characteristics of the bi-layer-channel thin film transistors (TFTs) were examined and compared with those of single-layer-channel (i.e., amorphous IWO or IWO:N) TFTs. It was demonstrated to exhibit a high mobility of 27.2 cm2 V‑1 s‑1 and an on/off current ratio of 107. Compared to the single peers, bi-layer a-IWO/IWO:N TFTs showed smaller hysteresis and higher stability under negative bias stress and negative bias temperature stress. The enhanced performance could be attributed to its unique double-stacked channel configuration, which successfully combined the merits of the TFTs with IWO and IWO:N channels. The underlying IWO thin film provided percolation paths for electron transport, meanwhile, the top IWO:N layer reduced the bulk trap densities. In addition, the IWO channel/gate insulator interface had reduced defects, and IWO:N back channel surface was insensitive to the ambient atmosphere. Overall, the proposed bi-layer a-IWO/IWO:N TFTs show potential for practical applications due to its possibly long-term serviceability.

Study of novel junctionless Ge n-Tunneling Field-Effect Transistors with lightly doped drain (LDD) region

NASA Astrophysics Data System (ADS)

Liu, Xiangyu; Hu, Huiyong; Wang, Bin; Wang, Meng; Han, Genquan; Cui, Shimin; Zhang, Heming

2017-02-01

In this paper, a novel junctionless Ge n-Tunneling Field-Effect Transistors (TFET) structure is proposed. The simulation results show that Ion = 5.5 × 10-5A/μm is achieved. The junctionless device structure enhances Ion effectively and increases the region where significant BTBT occurs, comparing with the normal Ge-nTEFT. The impact of the lightly doped drain (LDD) region is investigated. A comparison of Ion and Ioff of the junctionless Ge n-TFET with different channel doping concentration ND and LDD doping concentration NLDD is studied. Ioff is reduced 1 order of magnitude with the optimized ND and NLDD are 1 × 1018cm-3 and 1 × 1017 cm-3, respectively. To reduce the gate induced drain leakage (GIDL) current, the impact of the sloped gate oxide structure is also studied. By employing the sloped gate oxide structure, the below 60 mV/decade subthreshold swing S = 46.2 mV/decade is achieved at Ion = 4.05 × 10-5A/μm and Ion/Ioff = 5.7 × 106.

An underlap field-effect transistor for electrical detection of influenza

NASA Astrophysics Data System (ADS)

Lee, Kwang-Won; Choi, Sung-Jin; Ahn, Jae-Hyuk; Moon, Dong-Il; Park, Tae Jung; Lee, Sang Yup; Choi, Yang-Kyu

2010-01-01

An underlap channel-embedded field-effect transistor (FET) is proposed for label-free biomolecule detection. Specifically, silica binding protein fused with avian influenza (AI) surface antigen and avian influenza antibody (anti-AI) were designed as a receptor molecule and a target material, respectively. The drain current was significantly decreased after the binding of negatively charged anti-AI on the underlap channel. A set of control experiments supports that only the biomolecules on the underlap channel effectively modulate the drain current. With the merits of a simple fabrication process, complementary metal-oxide-semiconductor compatibility, and enhanced sensitivity, the underlap FET could be a promising candidate for a chip-based biosensor.

Improved Performance of h-BN Encapsulated Double Gate Graphene Nanomesh Field Effect Transistor for Short Channel Length

NASA Astrophysics Data System (ADS)

Tiwari, Durgesh Laxman; Sivasankaran, K.

This paper presents improved performance of Double Gate Graphene Nanomesh Field Effect Transistor (DG-GNMFET) with h-BN as substrate and gate oxide material. The DC characteristics of 0.95μm and 5nm channel length devices are studied for SiO2 and h-BN substrate and oxide material. For analyzing the ballistic behavior of electron for 5nm channel length, von Neumann boundary condition is considered near source and drain contact region. The simulated results show improved saturation current for h-BN encapsulated structure with two times higher on current value (0.375 for SiO2 and 0.621 for h-BN) as compared to SiO2 encapsulated structure. The obtained result shows h-BN to be a better substrate and oxide material for graphene electronics with improved device characteristics.

Computational study of graphene-based vertical field effect transistor

NASA Astrophysics Data System (ADS)

Chen, Wenchao; Rinzler, Andrew; Guo, Jing

2013-03-01

Poisson and drift-diffusion equations are solved in a three-dimensional device structure to simulate graphene-based vertical field effect transistors (GVFETs). Operation mechanisms of the GVFET with and without punched holes in the graphene source contact are presented and compared. The graphene-channel Schottky barrier can be modulated by gate electric field due to graphene's low density of states. For the graphene contact with punched holes, the contact barrier thinning and lowering around punched hole edge allow orders of magnitude higher tunneling current compared to the region away from the punched hole edge, which is responsible for significant performance improvement as already verified by experiments. Small hole size is preferred due to less electrostatic screening from channel inversion layer, which gives large electric field around the punched hole edge, thus, leading to a thinner and lower barrier. Bilayer and trilayer graphenes as the source contact degrade the performance improvement because stronger electrostatic screening leads to smaller contact barrier lowering and thinning. High punched hole area percentage improves current performance by allowing more gate electric field to modulate the graphene-channel barrier. Low effective mass channel material gives better on-off current ratio.

P-type field effect transistor based on Na-doped BaSnO3

NASA Astrophysics Data System (ADS)

Jang, Yeaju; Hong, Sungyun; Park, Jisung; Char, Kookrin

We fabricated field effect transistors (FET) based on the p-type Na-doped BaSnO3 (BNSO) channel layer. The properties of epitaxial BNSO channel layer were controlled by the doping rate. In order to modulate the p-type FET, we used amorphous HfOx and epitaxial BaHfO3 (BHO) gate oxides, both of which have high dielectric constants. HfOx was deposited by atomic-layer-deposition and BHO was epitaxially grown by pulsed laser deposition. The pulsed laser deposited SrRuO3 (SRO) was used as the source and the drain contacts. Indium-tin oxide and La-doped BaSnO3 were used as the gate electrodes on top of the HfOx and the BHO gate oxides, respectively. We will analyze and present the performances of the BNSO field effect transistor such as the IDS-VDS, the IDS-VGS, the Ion/Ioff ratio, and the field effect mobility. Samsung Science and Technology Foundation.

Detection beyond Debye's length with an electrolyte-gated organic field-effect transistor.

PubMed

Palazzo, Gerardo; De Tullio, Donato; Magliulo, Maria; Mallardi, Antonia; Intranuovo, Francesca; Mulla, Mohammad Yusuf; Favia, Pietro; Vikholm-Lundin, Inger; Torsi, Luisa

2015-02-04

Electrolyte-gated organic field-effect transistors are successfully used as biosensors to detect binding events occurring at distances from the transistor electronic channel that are much larger than the Debye length in highly concentrated solutions. The sensing mechanism is mainly capacitive and is due to the formation of Donnan's equilibria within the protein layer, leading to an extra capacitance (CDON) in series to the gating system. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Polarization-mediated Debye-screening of surface potential fluctuations in dual-channel AlN/GaN high electron mobility transistors

NASA Astrophysics Data System (ADS)

Deen, David A.; Miller, Ross A.; Osinsky, Andrei V.; Downey, Brian P.; Storm, David F.; Meyer, David J.; Scott Katzer, D.; Nepal, Neeraj

2016-12-01

A dual-channel AlN/GaN/AlN/GaN high electron mobility transistor (HEMT) architecture is proposed, simulated, and demonstrated that suppresses gate lag due to surface-originated trapped charge. Dual two-dimensional electron gas (2DEG) channels are utilized such that the top 2DEG serves as an equipotential that screens potential fluctuations resulting from surface trapped charge. The bottom channel serves as the transistor's modulated channel. Two device modeling approaches have been performed as a means to guide the device design and to elucidate the relationship between the design and performance metrics. The modeling efforts include a self-consistent Poisson-Schrodinger solution for electrostatic simulation as well as hydrodynamic three-dimensional device modeling for three-dimensional electrostatics, steady-state, and transient simulations. Experimental results validated the HEMT design whereby homo-epitaxial growth on free-standing GaN substrates and fabrication of the same-wafer dual-channel and recessed-gate AlN/GaN HEMTs have been demonstrated. Notable pulsed-gate performance has been achieved by the fabricated HEMTs through a gate lag ratio of 0.86 with minimal drain current collapse while maintaining high levels of dc and rf performance.

A computational study of a novel graphene nanoribbon field effect transistor

NASA Astrophysics Data System (ADS)

Ghoreishi, Seyed Saleh; Yousefi, Reza

2017-04-01

In this paper, using gate structure engineering and modification of channel dopant profile, we propose a new double gate graphene nanoribbon field effect transistor (DG-GNRFET) mainly to suppress the band-to-band tunneling (BTBT) of carriers. In the new device, the intrinsic part of the channel is replaced by an intrinsic-lightly doped-intrinsic (I -N--I) configuration in a way that only the intrinsic parts are covered by the gate contact. Transport characteristics of the device are investigated theoretically using the nonequilibrium Green’s function (NEGF) formalism. Numerical simulations show that off-current, ambipolar behavior, on/off-current ratio and the switching characteristics such as intrinsic delay and power-delay product are improved. In addition, the new device demonstrates better sub-threshold swing and less drain-induced barrier lowering (DIBL).

Current saturation and voltage gain in bilayer graphene field effect transistors.

PubMed

Szafranek, B N; Fiori, G; Schall, D; Neumaier, D; Kurz, H

2012-03-14

The emergence of graphene with its unique electrical properties has triggered hopes in the electronic devices community regarding its exploitation as a channel material in field effect transistors. Graphene is especially promising for devices working at frequencies in the 100 GHz range. So far, graphene field effect transistors (GFETs) have shown cutoff frequencies up to 300 GHz, while exhibiting poor voltage gains, another important figure of merit for analog high frequency applications. In the present work, we show that the voltage gain of GFETs can be improved significantly by using bilayer graphene, where a band gap is introduced through a vertical electric displacement field. At a displacement field of -1.7 V/nm the bilayer GFETs exhibit an intrinsic voltage gain up to 35, a factor of 6 higher than the voltage gain in corresponding monolayer GFETs. The transconductance, which limits the cutoff frequency of a transistor, is not degraded by the displacement field and is similar in both monolayer and bilayer GFETs. Using numerical simulations based on an atomistic p(z) tight-binding Hamiltonian we demonstrate that this approach can be extended to sub-100 nm gate lengths. © 2012 American Chemical Society

Capacitorless one-transistor dynamic random-access memory based on asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor with n-doped boosting layer and drain-underlap structure

NASA Astrophysics Data System (ADS)

Yoon, Young Jun; Seo, Jae Hwa; Kang, In Man

2018-04-01

In this work, we present a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on an asymmetric double-gate Ge/GaAs-heterojunction tunneling field-effect transistor (TFET) for DRAM applications. The n-doped boosting layer and gate2 drain-underlap structure is employed in the device to obtain an excellent 1T-DRAM performance. The n-doped layer inserted between the source and channel regions improves the sensing margin because of a high rate of increase in the band-to-band tunneling (BTBT) probability. Furthermore, because the gate2 drain-underlap structure reduces the recombination rate that occurs between the gate2 and drain regions, a device with a gate2 drain-underlap length (L G2_D-underlap) of 10 nm exhibited a longer retention performance. As a result, by applying the n-doped layer and gate2 drain-underlap structure, the proposed device exhibited not only a high sensing margin of 1.11 µA/µm but also a long retention time of greater than 100 ms at a temperature of 358 K (85 °C).

Mobility overestimation due to gated contacts in organic field-effect transistors

PubMed Central

Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.

2016-01-01

Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271

Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors.

PubMed

Lee, Ya-Ju; Yang, Zu-Po; Chen, Pin-Guang; Hsieh, Yung-An; Yao, Yung-Chi; Liao, Ming-Han; Lee, Min-Hung; Wang, Mei-Tan; Hwang, Jung-Min

2014-10-20

In this study, we report a novel monolithically integrated GaN-based light-emitting diode (LED) with metal-oxide-semiconductor field-effect transistor (MOSFET). Without additionally introducing complicated epitaxial structures for transistors, the MOSFET is directly fabricated on the exposed n-type GaN layer of the LED after dry etching, and serially connected to the LED through standard semiconductor-manufacturing technologies. Such monolithically integrated LED/MOSFET device is able to circumvent undesirable issues that might be faced by other kinds of integration schemes by growing a transistor on an LED or vice versa. For the performances of resulting device, our monolithically integrated LED/MOSFET device exhibits good characteristics in the modulation of gate voltage and good capability of driving injected current, which are essential for the important applications such as smart lighting, interconnection, and optical communication.

Fabrication of metal nanopatterns for organic field effect transistor electrodes by cracking and transfer printing

NASA Astrophysics Data System (ADS)

Wang, Xiaonan; Fu, Tingting; Wang, Zhe

2018-04-01

In this paper, we demonstrate a novel method for fabricating metal nanopatterns using cracking to address the limitations of traditional techniques. Parallel crack arrays were created in a polydimethylsiloxane (PDMS) mold using a combination of surface modification and control of strain fields. The elastic PDMS containing the crack arrays was subsequently used as a stamp to prepare nanoscale metal patterns on a substrate by transfer printing. To illustrate the functionality of this technique, we employed the metal patterns as the source and drain contacts of an organic field effect transistor. Using this approach, we fabricated transistors with channel lengths ranging from 70-600 nm. The performance of these devices when the channel length was reduced was studied. The drive current density increases as expected, indicating the creation of operational transistors with recognizable properties.

Channel length dependence of field-effect mobility of c-axis-aligned crystalline In-Ga-Zn-O field-effect transistors

NASA Astrophysics Data System (ADS)

Matsuda, Shinpei; Kikuchi, Erumu; Yamane, Yasumasa; Okazaki, Yutaka; Yamazaki, Shunpei

2015-04-01

Field-effect transistors (FETs) with c-axis-aligned crystalline In-Ga-Zn-O (CAAC-IGZO) active layers have extremely low off-state leakage current. Exploiting this feature, we investigated the application of CAAC-IGZO FETs to LSI memories. A high on-state current is required for the high-speed operation of these LSI memories. The field-effect mobility μFE of a CAAC-IGZO FET is relatively low compared with the electron mobility of single-crystal Si (sc-Si). In this study, we measured and calculated the channel length L dependence of μFE for CAAC-IGZO and sc-Si FETs. For CAAC-IGZO FETs, μFE remains almost constant, particularly when L is longer than 0.3 µm, whereas that of sc-Si FETs decreases markedly as L shortens. Thus, the μFE difference between both FET types is reduced by miniaturization. This difference in μFE behavior is attributed to the different susceptibilities of electrons to phonon scattering. On the basis of this result and the extremely low off-state leakage current of CAAC-IGZO FETs, we expect high-speed LSI memories with low power consumption.

Ballistic Spin Field Effect Transistor Based on Silicon Nanowires

NASA Astrophysics Data System (ADS)

Osintsev, Dmitri; Sverdlov, Viktor; Stanojevic, Zlatan; Selberherr, Siegfried

2011-03-01

We investigate the properties of ballistic spin field-effect transistors build on silicon nanowires. An accurate description of the conduction band based on the k . p} model is necessary in thin and narrow silicon nanostructures. The subband effective mass and subband splitting dependence on the nanowire dimensions is analyzed and used in the transport calculations. The spin transistor is formed by sandwiching the nanowire between two ferromagnetic metallic contacts. Delta-function barriers at the interfaces between the contacts and the silicon channel are introduced. The major contribution to the electric field-dependent spin-orbit interaction in confined silicon systems is due to the interface-induced inversion asymmetry which is of the Dresselhaus type. We study the current and conductance through the system for the contacts being in parallel and anti-parallel configurations. Differences between the [100] and [110] orientated structures are investigated in details. This work is supported by the European Research Council through the grant #247056 MOSILSPIN.

Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

DOEpatents

Chaffin, deceased, Roger J.; Dawson, Ralph; Fritz, Ian J.; Osbourn, Gordon C.; Zipperian, Thomas E.

1989-01-01

A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space which includes a lowest energy .GAMMA.-valley and a next lowest energy L-valley, each k-vector corresponding to one of the orthogonal directions defined by the planes of said layers and the directions perpendicular thereto. The layer thicknesses of the quantum well layers are selected to provide a superlattice L.sub.2D -valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley.

Investigation of Corner Effect and Identification of Tunneling Regimes in L-Shaped Tunnel Field-Effect-Transistor.

PubMed

Najam, Faraz; Yu, Yun Seop

2018-09-01

Corner-effect existing in L-shaped tunnel field-effect-transistor (LTFET) was investigated using numerical simulations and band diagram analysis. It was found that the corner-effect is caused by the convergence of electric field in the sharp source corner present in an LTFET, thereby increasing the electric field in the sharp source corner region. It was found that in the corner-effect region tunneling starts early, as a function of applied bias, as compared to the rest of the channel not affected by corner-effect. Further, different tunneling regimes as a function of applied bias were identified in the LTFET including source to channel and channel to channel tunneling regimes. Presence of different tunneling regimes in LTFET was analytically justified with a set of equations developed to model source to channel, and channel to channel tunneling currents. Drain-current-gate-voltage (Ids-Vgs) characteristics obtained from the equations is in reasonable qualitative agreement with numerical simulation.

An analytical model for bio-electronic organic field-effect transistor sensors

NASA Astrophysics Data System (ADS)

Macchia, Eleonora; Giordano, Francesco; Magliulo, Maria; Palazzo, Gerardo; Torsi, Luisa

2013-09-01

A model for the electrical characteristics of Functional-Bio-Interlayer Organic Field-Effect Transistors (FBI-OFETs) electronic sensors is here proposed. Specifically, the output current-voltage characteristics of a streptavidin (SA) embedding FBI-OFET are modeled by means of the analytical equations of an enhancement mode p-channel OFET modified according to an ad hoc designed equivalent circuit that is also independently simulated with pspice. An excellent agreement between the model and the experimental current-voltage output characteristics has been found upon exposure to 5 nM of biotin. A good agreement is also found with the SA OFET parameters graphically extracted from the device transfer I-V curves.

Tunability of p- and n-channel TiOx thin film transistors.

PubMed

Peng, Wu-Chang; Chen, Yao-Ching; He, Ju-Liang; Ou, Sin-Liang; Horng, Ray-Hua; Wuu, Dong-Sing

2018-06-18

To acquire device-quality TiO x films usually needs high-temperature growth or additional post-thermal treatment. However, both processes make it very difficult to form the p-type TiO x even under oxygen-poor growth condition. With the aid of high energy generated by high power impulse magnetron sputtering (HIPIMS), a highly stable p-type TiO x film with good quality can be achieved. In this research, by varying the oxygen flow rate, p-type γ-TiO and n-type TiO 2 films were both prepared by HIPIMS. Furthermore, p- and n-type thin film transistors employing γ-TiO and TiO 2 as channel layers possess the field-effect carrier mobilities of 0.2 and 0.7 cm 2 /Vs, while their on/off current ratios are 1.7 × 10 4 and 2.5 × 10 5 , respectively. The first presented p-type γ-TiO TFT is a major breakthrough for fabricating the TiO x -based p-n combinational devices. Additionally, our work also confirms HIPIMS offers the possibility of growing both p- and n-type conductive oxides, significantly expanding the practical usage of this technique.

Ambipolar transport of silver nanoparticles decorated graphene oxide field effect transistors

NASA Astrophysics Data System (ADS)

Sarkar, Kalyan Jyoti; Sarkar, K.; Pal, B.; Kumar, Aparabal; Das, Anish; Banerji, P.

2018-05-01

In this article, we report ambipolar field effect transistor (FET) by using graphene oxide (GO) as a gate dielectric material for silver nanoparticles (AgNPs) decorated GO channel layer. GO was synthesized by Hummers' method. The AgNPs were prepared via photochemical reduction of silver nitrate solution by using monoethanolamine as a reducing agent. Morphological properties of channel layer were characterized by Field Effect Scanning Electron Microscopy (FESEM). Fourier Transform Infrared Spectroscopy (FTIR) was carried out to characterize GO thin film. For device fabrication gold (Au) was deposited as source-drain contact and aluminum (Al) was taken as bottom contact. Electrical measurements were performed by back gate configuration. Ambipolar transport behavior was explained from transfer characteristics. A maximum electron mobiliy of 6.65 cm2/Vs and a hole mobility of 2.46 cm2/Vs were extracted from the transfer characteristics. These results suggest that GO is a potential candidate as a gate dielectric material for thin film transistor applications and also provides new insights in GO based research.

Investigation of defect-induced abnormal body current in fin field-effect-transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Kuan-Ju; Tsai, Jyun-Yu; Lu, Ying-Hsin

2015-08-24

This letter investigates the mechanism of abnormal body current at the linear region in n-channel high-k/metal gate stack fin field effect transistors. Unlike body current, which is generated by impact ionization at high drain voltages, abnormal body current was found to increase with decreasing drain voltages. Notably, the unusual body leakage only occurs in three-dimensional structure devices. Based on measurements under different operation conditions, the abnormal body current can be attributed to fin surface defect-induced leakage current, and the mechanism is electron tunneling to the fin via the defects, resulting in holes left at the body terminal.

Electrospun Polyaniline/Polyethylene Oxide Nanofiber Field Effect Transistor

NASA Technical Reports Server (NTRS)

Pinto, N. J.; Johnson, A. T.; MacDiarmid, A. G.; Mueller, C. H.; Theofylaktos, N.; Robinson, D. C.; Miranda, F. A.

2003-01-01

We report on the observation of field effect transistor (FET) behavior in electrospun camphorsulfonic acid doped polyaniline(PANi)/polyethylene oxide(PE0) nanofibers. Saturation channel currents are observed at surprisingly low source/drain voltages. The hole mobility in the depletion regime is 1.4 x 10(exp -4) sq cm/V s while the 1-D charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx. 10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating 1-D polymer FET's.

Design, fabrication, and performance analysis of GaN vertical electron transistors with a buried p/n junction

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yeluri, Ramya, E-mail: ramyay@ece.ucsb.edu; Lu, Jing; Keller, Stacia

2015-05-04

The Current Aperture Vertical Electron Transistor (CAVET) combines the high conductivity of the two dimensional electron gas channel at the AlGaN/GaN heterojunction with better field distribution offered by a vertical design. In this work, CAVETs with buried, conductive p-GaN layers as the current blocking layer are reported. The p-GaN layer was regrown by metalorganic chemical vapor deposition and the subsequent channel regrowth was done by ammonia molecular beam epitaxy to maintain the p-GaN conductivity. Transistors with high ON current (10.9 kA/cm{sup 2}) and low ON-resistance (0.4 mΩ cm{sup 2}) are demonstrated. Non-planar selective area regrowth is identified as the limiting factormore » to transistor breakdown, using planar and non-planar n/p/n structures. Planar n/p/n structures recorded an estimated electric field of 3.1 MV/cm, while non-planar structures showed a much lower breakdown voltage. Lowering the p-GaN regrowth temperature improved breakdown in the non-planar n/p/n structure. Combining high breakdown voltage with high current will enable GaN vertical transistors with high power densities.« less

Polarization induced doped transistor

DOEpatents

Xing, Huili; Jena, Debdeep; Nomoto, Kazuki; Song, Bo; Zhu, Mingda; Hu, Zongyang

2016-06-07

A nitride-based field effect transistor (FET) comprises a compositionally graded and polarization induced doped p-layer underlying at least one gate contact and a compositionally graded and doped n-channel underlying a source contact. The n-channel is converted from the p-layer to the n-channel by ion implantation, a buffer underlies the doped p-layer and the n-channel, and a drain underlies the buffer.

Organic field-effect transistors: a combined study on short-channel effects and the influence of substrate pre-treatment on ambient stability

NASA Astrophysics Data System (ADS)

Klug, A.; Meingast, A.; Wurzinger, G.; Blümel, A.; Schmoltner, K.; Scherf, U.; List, E. J. W.

2011-10-01

For high-performance low-cost applications based on organic field-effect transistors (OFETs) and corresponding sensors essential properties of the applied semiconducting materials include solution-processability, high field-effect mobility, compatibility with adjacent layers and stability with respect to ambient conditions. In this combined study regioregular poly(3-hexylthiophene)- and pentacene-based bottom-gate bottom-contact OFETs with various channel lengths are thoroughly investigated with respect to short-channel effects and the implications of dielectric surface modification with hexamethyldisilazane (HMDS) on device performance. In addition, the influences of oxygen, moisture and HMDStreatment on the ambient stability of the devices are evaluated in detail. While OFETs without surface modification exhibited the expected degradation behavior upon air exposure mainly due to oxygen/moisture-induced doping or charge-carrier trapping, the stability of the investigated semiconductors was found to be distinctly increased when the substrate surface was hydrophobized. The presented results thoroughly summarize important issues which have to be considered when selecting semiconducting materials for high-performance OFETs and OFET-based sensors.

Performance evaluation of parallel electric field tunnel field-effect transistor by a distributed-element circuit model

NASA Astrophysics Data System (ADS)

Morita, Yukinori; Mori, Takahiro; Migita, Shinji; Mizubayashi, Wataru; Tanabe, Akihito; Fukuda, Koichi; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shin-ichi; Liu, Yongxun; Masahara, Meishoku; Ota, Hiroyuki

2014-12-01

The performance of parallel electric field tunnel field-effect transistors (TFETs), in which band-to-band tunneling (BTBT) was initiated in-line to the gate electric field was evaluated. The TFET was fabricated by inserting an epitaxially-grown parallel-plate tunnel capacitor between heavily doped source wells and gate insulators. Analysis using a distributed-element circuit model indicated there should be a limit of the drain current caused by the self-voltage-drop effect in the ultrathin channel layer.

Germanium Based Field-Effect Transistors: Challenges and Opportunities

PubMed Central

Goley, Patrick S.; Hudait, Mantu K.

2014-01-01

The performance of strained silicon (Si) as the channel material for today’s metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed. PMID:28788569

The fundamental downscaling limit of field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mamaluy, Denis, E-mail: mamaluy@sandia.gov; Gao, Xujiao

2015-05-11

We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increasemore » in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.« less

The fundamental downscaling limit of field effect transistors

DOE PAGES

Mamaluy, Denis; Gao, Xujiao

2015-05-12

We predict that within next 15 years a fundamental down-scaling limit for CMOS technology and other Field-Effect Transistors (FETs) will be reached. Specifically, we show that at room temperatures all FETs, irrespective of their channel material, will start experiencing unacceptable level of thermally induced errors around 5-nm gate lengths. These findings were confirmed by performing quantum mechanical transport simulations for a variety of 6-, 5-, and 4-nm gate length Si devices, optimized to satisfy high-performance logic specifications by ITRS. Different channel materials and wafer/channel orientations have also been studied; it is found that altering channel-source-drain materials achieves only insignificant increasemore » in switching energy, which overall cannot sufficiently delay the approaching downscaling limit. Alternative possibilities are discussed to continue the increase of logic element densities for room temperature operation below the said limit.« less

Relaxed germanium-tin P-channel tunneling field-effect transistors fabricated on Si: impacts of Sn composition and uniaxial tensile strain

NASA Astrophysics Data System (ADS)

Han, Genquan; Wang, Yibo; Liu, Yan; Wang, Hongjuan; Liu, Mingshan; Zhang, Chunfu; Zhang, Jincheng; Cheng, Buwen; Hao, Yue

2015-05-01

In this work, relaxed GeSn p-channel tunneling field-effect transistors (pTFETs) with various Sn compositions are fabricated on Si. Enhancement of on-state current ION with the increase of Sn composition is observed in transistors, due to the reduction of direct bandgap EG. Ge0.93Sn0.07 and Ge0.95Sn0.05 pTFETs achieve 110% and 75% enhancement in ION, respectively, compared to Ge0.97Sn0.03 devices, at VGS - VTH = VDS = - 1.0 V. For the first time, ION enhancement in GeSn pTFET utilizing uniaxial tensile strain is reported. By applying 0.14% uniaxial tensile strain along [110] channel direction, Ge0.95Sn0.05 pTFETs achieve 12% ION improvement, over unstrained control devices at VGS - VTH = VDS = - 1.0 V. Theoretical study demonstrates that uniaxial tensile strain leads to the reduction of direct EG and affects the reduced tunneling mass, which bring the GBTBT rising, benefiting the tunneling current enhancement in GeSn TFETs.

Utilizing Schottky barriers to suppress short-channel effects in organic transistors

NASA Astrophysics Data System (ADS)

Fernández, Anton F.; Zojer, Karin

2017-10-01

Transistors with short channel lengths exhibit profound deviations from the ideally expected behavior. One of the undesired short-channel effects is an enlarged OFF current that is associated with a premature turn on of the transistor. We present an efficient approach to suppress the OFF current, defined as the current at zero gate source bias, in short-channel organic transistors. We employ two-dimensional device simulations based on the drift-diffusion model to demonstrate that intentionally incorporating a Schottky barrier for injection enhances the ON-OFF ratio in both staggered and coplanar transistor architectures. The Schottky barrier is identified to directly counteract the origin of enlarged OFF currents: Short channels promote a drain-induced barrier lowering. The latter permits unhindered injection of charges even at reverse gate-source bias. An additional Schottky barrier hampers injection for such points of operations. We explain how it is possible to find the Schottky barrier of the smallest height necessary to exactly compensate for the premature turn on. This approach offers a substantial enhancement of the ON-OFF ratio. We show that this roots in the fact that such optimal barrier heights offer an excellent compromise between an OFF current diminished by orders of magnitude and an only slightly reduced ON current.

Quantitative analysis of immobilized penicillinase using enzyme-modified AlGaN/GaN field-effect transistors.

PubMed

Müntze, Gesche Mareike; Baur, Barbara; Schäfer, Wladimir; Sasse, Alexander; Howgate, John; Röth, Kai; Eickhoff, Martin

2015-02-15

Penicillinase-modified AlGaN/GaN field-effect transistors (PenFETs) are utilized to systematically investigate the covalently immobilized enzyme penicillinase under different experimental conditions. We demonstrate quantitative evaluation of covalently immobilized penicillinase layers on pH-sensitive field-effect transistors (FETs) using an analytical kinetic PenFET model. This kinetic model is explicitly suited for devices with thin enzyme layers that are not diffusion-limited, as it is the case for the PenFETs discussed here. By means of the kinetic model it was possible to extract the Michaelis constant of covalently immobilized penicillinase as well as relative transport coefficients of the different species associated with the enzymatic reaction which, exempli gratia, give information about the permeability of the enzymatic layer. Based on this analysis we quantify the reproducibility and the stability of the analyzed PenFETs over the course of 33 days as well as the influence of pH and buffer concentration on the properties of the enzymatic layer. Thereby the stability measurements reveal a Michalis constant KM of (67 ± 13)μM while the chronological development of the relative transport coefficients suggests a detachment of physisorbed penicillinase during the first two weeks since production. Our results show that AlGaN/GaN PenFETs prepared by covalent immobilization of a penicillinase enzyme layer present a powerful tool for quantitative analysis of enzyme functionality. Copyright © 2014 Elsevier B.V. All rights reserved.

Field-effect transistors (2nd revised and enlarged edition)

NASA Astrophysics Data System (ADS)

Bocharov, L. N.

The design, principle of operation, and principal technical characteristics of field-effect transistors produced in the USSR are described. Problems related to the use of field-effect transistors in various radioelectronic devices are examined, and tables of parameters and mean statistical characteristics are presented for the main types of field-effect transistors. Methods for calculating various circuit components are discussed and illustrated by numerical examples.

An innovative large scale integration of silicon nanowire-based field effect transistors

NASA Astrophysics Data System (ADS)

Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

2018-05-01

Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dib, E., E-mail: elias.dib@for.unipi.it; Carrillo-Nuñez, H.; Cavassilas, N.

Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.

Electron density window for best frequency performance, lowest phase noise and slowest degradation of GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Matulionis, Arvydas

2013-07-01

The problems in the realm of nitride heterostructure field-effect transistors (HFETs) are discussed in terms of a novel fluctuation-dissipation-based approach impelled by a recent demonstration of strong correlation of hot-electron fluctuations with frequency performance and degradation of the devices. The correlation has its genesis in the dissipation of the LO-mode heat accumulated by the non-equilibrium longitudinal optical phonons (hot phonons) confined in the channel that hosts the high-density hot-electron gas subjected to a high electric field. The LO-mode heat causes additional scattering of hot electrons and facilitates defect formation in a different manner than the conventional heat contained mainly in the acoustic phonon mode. We treat the heat dissipation problem in terms of the hot-phonon lifetime responsible for the conversion of the non-migrant hot phonons into migrant acoustic modes and other vibrations. The lifetime is measured over a wide range of electron density and supplied electric power. The optimal conditions for the dissipation of the LO-mode heat are associated with the plasmon-assisted disintegration of hot phonons. Signatures of plasmons are experimentally resolved in fluctuations, dissipation, hot-electron transport, transistor frequency performance, transistor phase noise and transistor reliability. In particular, a slower degradation and a faster operation of GaN-based HFETs take place inside the electron density window where the resonant plasmon-assisted ultrafast dissipation of the LO-mode heat comes into play. A novel heterostructure design for the possible improvement of HFET performance is proposed, implemented and tested.

Chemical-free n-type and p-type multilayer-graphene transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dissanayake, D. M. N. M., E-mail: nandithad@voxtel-inc.com; Eisaman, M. D.; Department of Electrical and Computer Engineering, Stony Brook University, Stony Brook, New York 11794

A single-step doping method to fabricate n- and p-type multilayer graphene (MG) top-gate field effect transistors (GFETs) is demonstrated. The transistors are fabricated on soda-lime glass substrates, with the n-type doping of MG caused by the sodium in the substrate without the addition of external chemicals. Placing a hydrogen silsesquioxane (HSQ) barrier layer between the MG and the substrate blocks the n-doping, resulting in p-type doping of the MG above regions patterned with HSQ. The HSQ is deposited in a single fabrication step using electron beam lithography, allowing the patterning of arbitrary sub-micron spatial patterns of n- and p-type doping.more » When a MG channel is deposited partially on the barrier and partially on the glass substrate, a p-type and n-type doping profile is created, which is used for fabricating complementary transistors pairs. Unlike chemically doped GFETs in which the external dopants are typically introduced from the top, these substrate doped GFETs allow for a top gate which gives a stronger electrostatic coupling to the channel, reducing the operating gate bias. Overall, this method enables scalable fabrication of n- and p-type complementary top-gated GFETs with high spatial resolution for graphene microelectronic applications.« less

Ultrashort channel silicon nanowire transistors with nickel silicide source/drain contacts.

PubMed

Tang, Wei; Dayeh, Shadi A; Picraux, S Tom; Huang, Jian Yu; Tu, King-Ning

2012-08-08

We demonstrate the shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) by a controlled reaction with Ni leads on an in situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 °C. NiSi(2) is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (μA/μm) and a maximum transconductance of 430 (μS/μm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of 17 nm to 3.6 μm. Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs, and that limits transport parameter extraction from SB-FETs using conventional field-effect transconductance measurements.

Effects of surface passivation dielectrics on carrier transport in AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Oh, Sejoon; Jang, Han-Soo; Choi, Chel-Jong; Cho, Jaehee

2018-04-01

Dielectric layers prepared by different deposition methods were used for the surface passivation of AlGaN/GaN heterostructure field-effect transistors (HFETs) and the corresponding electrical characteristics were examined. Increases in the sheet charge density and the maximum drain current by approximately 45% and 28%, respectively, were observed after the deposition of a 100 nm-thick SiO2 layer by plasma-enhanced chemical vapor deposition (PECVD) on the top of the AlGaN/GaN HFETs. However, SiO2 deposited by a radio frequency (rf) sputter system had the opposite effect. As the strain applied to AlGaN was influenced by the deposition methods used for the dielectric layers, the carrier transport in the two-dimensional electron gas formed at the interface between AlGaN and GaN was affected accordingly.

Piezoelectric coupling in a field-effect transistor with a nanohybrid channel of ZnO nanorods grown vertically on graphene.

PubMed

Quang Dang, Vinh; Kim, Do-Il; Thai Duy, Le; Kim, Bo-Yeong; Hwang, Byeong-Ung; Jang, Mi; Shin, Kyung-Sik; Kim, Sang-Woo; Lee, Nae-Eung

2014-12-21

Piezoelectric coupling phenomena in a graphene field-effect transistor (GFET) with a nano-hybrid channel of chemical-vapor-deposited Gr (CVD Gr) and vertically aligned ZnO nanorods (NRs) under mechanical pressurization were investigated. Transfer characteristics of the hybrid channel GFET clearly indicated that the piezoelectric effect of ZnO NRs under static or dynamic pressure modulated the channel conductivity (σ) and caused a positive shift of 0.25% per kPa in the Dirac point. However, the GFET without ZnO NRs showed no change in either σ or the Dirac point. Analysis of the Dirac point shifts indicated transfer of electrons from the CVD Gr to ZnO NRs due to modulation of their interfacial barrier height under pressure. High responsiveness of the hybrid channel device with fast response and recovery times was evident in the time-dependent behavior at a small gate bias. In addition, the hybrid channel FET could be gated by mechanical pressurization only. Therefore, a piezoelectric-coupled hybrid channel GFET can be used as a pressure-sensing device with low power consumption and a fast response time. Hybridization of piezoelectric 1D nanomaterials with a 2D semiconducting channel in FETs enables a new design for future nanodevices.

The Effect of Aptamer Concetration towards Reduced Graphene Oxide-Field Effect Transistor Surface Channel for Biosensor Application

NASA Astrophysics Data System (ADS)

Syafiq Zainol Abidin, Azrul; Rahim, Ruslinda Abdul; Huan, Chow Yong; Maidin, Nur Nasyifa Mohd; Atiqah Ahmad, Nurul; Hashwan, Saeed S. Ba; Faudzi, Fatin Nabilah Mohd; Hong, Voon Chun

2018-03-01

Aptamer are artificially produce bioreceptor that has been developed to bind with various target biomolecules such as ion, cells, protein and small molecules. In this research, an aptamer concentration of 0.5 nM, 1 nM, 5 nM, 10 nM, and 50 nM were immobilized on reduced graphene oxide (rGO) integrated with field effect transistor (FET) respectively to study the effect of aptamer concentration toward rGO surface for stable biosensing platform. The 0.5 nM concentration of aptamer shows the highest current result of 84.3 µA at 1 V applied through the source and drain. After immobilized with aminated aptamer, the conductivity shows significant reduction due to the formation of amide bond on rGO surface between aminated aptamer and carboxyl group on rGO. The electrical performance of FET integrated with rGO shows stable electrical performance suitable to be used in the biosensing application.

Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis.

PubMed

Zhang, Yanjun; Clausmeyer, Jan; Babakinejad, Babak; Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V; Korchev, Yuri

2016-03-22

Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements.

Spearhead Nanometric Field-Effect Transistor Sensors for Single-Cell Analysis

PubMed Central

Córdoba, Ainara López; Ali, Tayyibah; Shevchuk, Andrew; Takahashi, Yasufumi; Novak, Pavel; Edwards, Christopher; Lab, Max; Gopal, Sahana; Chiappini, Ciro; Anand, Uma; Magnani, Luca; Coombes, R. Charles; Gorelik, Julia; Matsue, Tomokazu; Schuhmann, Wolfgang; Klenerman, David; Sviderskaya, Elena V.; Korchev, Yuri

2016-01-01

Nanometric field-effect-transistor (FET) sensors are made on the tip of spear-shaped dual carbon nanoelectrodes derived from carbon deposition inside double-barrel nanopipettes. The easy fabrication route allows deposition of semiconductors or conducting polymers to comprise the transistor channel. A channel from electrodeposited poly pyrrole (PPy) exhibits high sensitivity toward pH changes. This property is exploited by immobilizing hexokinase on PPy nano-FETs to give rise to a selective ATP biosensor. Extracellular pH and ATP gradients are key biochemical constituents in the microenvironment of living cells; we monitor their real-time changes in relation to cancer cells and cardiomyocytes. The highly localized detection is possible because of the high aspect ratio and the spear-like design of the nano-FET probes. The accurately positioned nano-FET sensors can detect concentration gradients in three-dimensional space, identify biochemical properties of a single living cell, and after cell membrane penetration perform intracellular measurements. PMID:26816294

Field effect transistors improve buffer amplifier

NASA Technical Reports Server (NTRS)

1967-01-01

Unity gain buffer amplifier with a Field Effect Transistor /FET/ differential input stage responds much faster than bipolar transistors when operated at low current levels. The circuit uses a dual FET in a unity gain buffer amplifier having extremely high input impedance, low bias current requirements, and wide bandwidth.

HgNO3 sensitivity of AlGaN/GaN field effect transistors functionalized with phytochelating peptides

NASA Astrophysics Data System (ADS)

Rohrbaugh, Nathaniel; Hernandez-Balderrama, Luis; Kaess, Felix; Kirste, Ronny; Collazo, Ramon; Ivanisevic, Albena

2016-06-01

This study examined the conductance sensitivity of AlGaN/GaN field effect transistors in response to varying Hg/HNO3 solutions. FET surfaces were covalently functionalized with phytochelatin-5 peptides in order to detect Hg in solution. Results showed a resilience of peptide-AlGaN/GaN bonds in the presence of strong HNO3 aliquots, with significant degradation in FET ID signal. However, devices showed strong and varied response to Hg concentrations of 1, 10, 100, and 1000 ppm. The gathered statistically significant results indicate that peptide terminated AlGaN/GaN devices are capable of differentiating between Hg solutions and demonstrate device sensitivity.

The role of polarization coulomb field scattering in the electron mobility of AlGaN/AlN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Liu, Yan; Lin, Zhaojun; Zhao, Jingtao; Yang, Ming; Shi, Wenjing; Lv, Yuanjie; Feng, Zhihong

2016-04-01

The electron mobility for the prepared AlGaN/AlN/GaN heterostructure field-effect transistor (HFET) with the ratio of the gate length to the drain-to-source distance being less than 1/2 has been studied by comparing the measured electron mobility with the theoretical value. The measured electron mobility is derived from the measured capacitance-voltage (C-V) and current-voltage (I-V) characteristics, and the theoretical mobility is determined by using Matthiessen's law, involving six kinds of important scattering mechanisms. For the prepared device at room temperature, longitudinal optical phonon scattering (LO scattering) was found to have a remarkable effect on the value of the electron mobility, and polarization Coulomb field scattering (PCF scattering ) was found to be important to the changing trend of the electron mobility versus the two-dimensional electron gas (2DEG) density.

A 700 V narrow channel nJFET with low pinch-off voltage and suppressed drain-induced barrier lowering effect

NASA Astrophysics Data System (ADS)

Mao, Kun; Qiao, Ming; Zhang, WenTong; Zhang, Bo; Li, Zhaoji

2014-11-01

This paper proposes a 700 V narrow channel region triple-RESURF (reduced surface field) n-type junction field-effect transistor (NCT-nJFET). Compared to traditional structures, low pinch-off voltage (VP) with unobvious drain-induced barrier lowering (DIBL) effect and large saturated current (IDsat) are achieved. This is because p-type buried layer (Pbury) and PWELL are introduced to shape narrow n-type channel in JFET channel region. DIBL sensitivity (SDIBL) is firstly introduced in this paper to analyze the DIBL effect of high-voltage long-channel JFET. Ultra-high breakdown voltage is obtained by triple RESURF technology. Experimental results show that proposed NCT-nJFET achieves 24-V VP, 3.5% SDIBL, 2.3-mA IDsat, 800-V OFF-state breakdown voltage (OFF-BV) and 650-V ON-state breakdown voltage when VGS equals 0 V (ON-BV).

Investigation of piezoresistive effect in p-channel metal–oxide–semiconductor field-effect transistors fabricated on circular silicon-on-insulator diaphragms using cost-effective minimal-fab process

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Tanaka, Hiroyuki; Umeyama, Norio; Koga, Kazuhiro; Khumpuang, Sommawan; Nagao, Masayoshi; Matsukawa, Takashi; Hara, Shiro

2018-06-01

P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) with the 〈110〉 or 〈100〉 channel direction have been successfully fabricated on circular silicon-on-insulator (SOI) diaphragms using a cost-effective minimal-fab process, and their electrical characteristics have been systematically investigated before and after the SOI diaphragm formation. It was found that almost the same subthreshold slope (S-slope) and threshold voltage (V t) are observed in the fabricated PMOSFETs before and after the SOI diaphragm formation, and they are independent of the channel direction. On the other hand, significant variations in drain current were observed in the fabricated PMOSFETs with the 〈110〉 channel direction after the SOI diaphragm formation owing to the residual mechanical stress-induced piezoresistive effect. It was also confirmed that electrical characteristics of the fabricated PMOSFETs with the 〈100〉 channel direction are almost the same before and after the SOI diaphragm formation, i.e., not sensitive to the mechanical stress. Moreover, the drain current variations at different directions of mechanical stress and current flow were systematically investigated and discussed.

Nanoscale structural and chemical analysis of F-implanted enhancement-mode InAlN/GaN heterostructure field effect transistors

NASA Astrophysics Data System (ADS)

Tang, Fengzai; Lee, Kean B.; Guiney, Ivor; Frentrup, Martin; Barnard, Jonathan S.; Divitini, Giorgio; Zaidi, Zaffar H.; Martin, Tomas L.; Bagot, Paul A.; Moody, Michael P.; Humphreys, Colin J.; Houston, Peter A.; Oliver, Rachel A.; Wallis, David J.

2018-01-01

We investigate the impact of a fluorine plasma treatment used to obtain enhancement-mode operation on the structure and chemistry at the nanometer and atomic scales of an InAlN/GaN field effect transistor. The fluorine plasma treatment is successful in that enhancement mode operation is achieved with a +2.8 V threshold voltage. However, the InAlN barrier layers are observed to have been damaged by the fluorine treatment with their thickness being reduced by up to 50%. The treatment also led to oxygen incorporation within the InAlN barrier layers. Furthermore, even in the as-grown structure, Ga was unintentionally incorporated during the growth of the InAlN barrier. The impact of both the reduced barrier thickness and the incorporated Ga within the barrier on the transistor properties has been evaluated theoretically and compared to the experimentally determined two-dimensional electron gas density and threshold voltage of the transistor. For devices without fluorine treatment, the two-dimensional electron gas density is better predicted if the quaternary nature of the barrier is taken into account. For the fluorine treated device, not only the changes to the barrier layer thickness and composition, but also the fluorine doping needs to be considered to predict device performance. These studies reveal the factors influencing the performance of these specific transistor structures and highlight the strengths of the applied nanoscale characterisation techniques in revealing information relevant to device performance.

High on/off ratios in bilayer graphene field effect transistors realized by surface dopants.

PubMed

Szafranek, B N; Schall, D; Otto, M; Neumaier, D; Kurz, H

2011-07-13

The unique property of bilayer graphene to show a band gap tunable by external electrical fields enables a variety of different device concepts with novel functionalities for electronic, optoelectronic, and sensor applications. So far the operation of bilayer graphene-based field effect transistors requires two individual gates to vary the channel's conductance and to create a band gap. In this paper, we report on a method to increase the on/off ratio in single gated bilayer graphene field effect transistors by adsorbate doping. The adsorbate dopants on the upper side of the graphene establish a displacement field perpendicular to the graphene surface breaking the inversion symmetry of the two graphene layers. Low-temperature measurements indicate that the increased on/off ratio is caused by the opening of a mobility gap.

Control of short-channel effects in InAlN/GaN high-electron mobility transistors using graded AlGaN buffer

NASA Astrophysics Data System (ADS)

Han, Tiecheng; Zhao, Hongdong; Peng, Xiaocan; Li, Yuhai

2018-04-01

A graded AlGaN buffer is designed to realize the p-type buffer by inducing polarization-doping holes. Based on the two-dimensional device simulator, the effect of the graded AlGaN buffer on the direct-current (DC) and radio-frequency (RF) performance of short-gate InAlN/GaN high-electron mobility transistors (HEMTs) are investigated, theoretically. Compared to standard HEMT, an enhancement of electron confinement and a good control of short-channel effect (SCEs) are demonstrated in the graded AlGaN buffer HEMT. Accordingly, the pinched-off behavior and the ability of gate modulation are significantly improved. And, no serious SCEs are observed in the graded AlGaN buffer HEMT with an aspect ratio (LG/tch) of about 6.7, much lower than that of the standard HEMT (LG/tch = 13). In addition, for a 70-nm gate length, a peak current gain cutoff frequency (fT) of 171 GHz and power gain cutoff frequency (fmax) of 191 GHz are obtained in the grade buffer HEMT, which are higher than those of the standard one with the same gate length.

Current conduction in junction gate field effect transistors. Ph.D. Thesis

NASA Technical Reports Server (NTRS)

Kim, C.

1970-01-01

The internal physical mechanism that governs the current conduction in junction-gate field effect transistors is studied. A numerical method of analyzing the devices with different length-to-width ratios and doping profiles is developed. This method takes into account the two dimensional character of the electric field and the field dependent mobility. Application of the method to various device models shows that the channel width and the carrier concentration in the conductive channel decrease with increasing drain-to-source voltage for conventional devices. It also shows larger differential drain conductances for shorter devices when the drift velocity is not saturated. The interaction of the source and the drain gives the carrier accumulation in the channel which leads to the space-charge-limited current flow. The important parameters for the space-charge-limited current flow are found to be the L/L sub DE ratio and the crossover voltage.

High-performance multilayer WSe 2 field-effect transistors with carrier type control

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pudasaini, Pushpa Raj; Oyedele, Akinola; Zhang, Cheng

In this paper, high-performance multilayer WSe 2 field-effect transistor (FET) devices with carrier type control are demonstrated via thickness modulation and a remote oxygen plasma surface treatment. Carrier type control in multilayer WSe 2 FET devices with Cr/Au contacts is initially demonstrated by modulating the WSe 2 thickness. The carrier type evolves with increasing WSe 2 channel thickness, being p-type, ambipolar, and n-type at thicknesses <3, ~4, and >5 nm, respectively. The thickness-dependent carrier type is attributed to changes in the bandgap of WSe 2 as a function of the thickness and the carrier band offsets relative to the metalmore » contacts. Furthermore, we present a strong hole carrier doping effect via remote oxygen plasma treatment. It non-degenerately converts n-type characteristics into p-type and enhances field-effect hole mobility by three orders of magnitude. Finally, this work demonstrates progress towards the realization of high-performance multilayer WSe 2 FETs with carrier type control, potentially extendable to other transition metal dichalcogenides, for future electronic and optoelectronic applications.« less

High-performance multilayer WSe 2 field-effect transistors with carrier type control

DOE PAGES

Pudasaini, Pushpa Raj; Oyedele, Akinola; Zhang, Cheng; ...

2017-07-06

In this paper, high-performance multilayer WSe 2 field-effect transistor (FET) devices with carrier type control are demonstrated via thickness modulation and a remote oxygen plasma surface treatment. Carrier type control in multilayer WSe 2 FET devices with Cr/Au contacts is initially demonstrated by modulating the WSe 2 thickness. The carrier type evolves with increasing WSe 2 channel thickness, being p-type, ambipolar, and n-type at thicknesses <3, ~4, and >5 nm, respectively. The thickness-dependent carrier type is attributed to changes in the bandgap of WSe 2 as a function of the thickness and the carrier band offsets relative to the metalmore » contacts. Furthermore, we present a strong hole carrier doping effect via remote oxygen plasma treatment. It non-degenerately converts n-type characteristics into p-type and enhances field-effect hole mobility by three orders of magnitude. Finally, this work demonstrates progress towards the realization of high-performance multilayer WSe 2 FETs with carrier type control, potentially extendable to other transition metal dichalcogenides, for future electronic and optoelectronic applications.« less

Traps and Interface Fixed Charge Effects on a Solution-Processed n-Type Polymeric-Based Organic Field-Effect Transistor

NASA Astrophysics Data System (ADS)

Hafsi, B.; Boubaker, A.; Guerin, D.; Lenfant, S.; Kalboussi, A.; Lmimouni, K.

2017-02-01

Organic field-effect transistors based on poly{[ N, N0- bis(2-octyldodecyl)- naphthalene-1,4,5,8- bis(dicarboximide)-2,6-diyl]-alt-5,50-(2,20-bithiophene)}, [P(NDI2OD-T2)n], were fabricated and characterized. The effect of octadecyltrichlorosilane (OTS) a self-assembled monolayer (SAM) grafted on to a SiO2 gate dielectric was investigated. A significant improvement of the charge mobility ( μ), up to 0.22 cm2/V s, was reached thanks to the OTS treatment. Modifying some technological parameters relating to fabrication, such as solvents, was also studied. We have analyzed the electrical properties of these thin-film transistors by using a two-dimensional drift-diffusion simulator, Integrated System Engineering-Technology Computer Aided Design (ISE-TCAD®). We studied the fixed surface charges at the organic semiconductor/oxide interface and the bulk traps effect. The dependence of the threshold voltage on the density and energy level of the trap states has also been considered. We finally found a good agreement between the output and transfer characteristics for experimental and simulated data.

Importance of the Debye Screening Length on Nanowire Field Effect Transistor Sensors

PubMed Central

Stern, Eric; Wagner, Robin; Sigworth, Fred J.; Breaker, Ronald; Fahmy, Tarek M.; Reed, Mark A.

2009-01-01

Nanowire field effect transistors (NW-FETs) can serve as ultrasensitive detectors for label-free reagents. The NW-FET sensing mechanism assumes a controlled modification in the local channel electric field created by the binding of charged molecules to the nanowire surface. Careful control of the solution Debye length is critical for unambiguous selective detection of macromolecules. Here we show the appropriate conditions under which the selective binding of macromolecules is accurately sensed with NW-FET sensors. PMID:17914853

Importance of the Debye screening length on nanowire field effect transistor sensors.

PubMed

Stern, Eric; Wagner, Robin; Sigworth, Fred J; Breaker, Ronald; Fahmy, Tarek M; Reed, Mark A

2007-11-01

Nanowire field effect transistors (NW-FETs) can serve as ultrasensitive detectors for label-free reagents. The NW-FET sensing mechanism assumes a controlled modification in the local channel electric field created by the binding of charged molecules to the nanowire surface. Careful control of the solution Debye length is critical for unambiguous selective detection of macromolecules. Here we show the appropriate conditions under which the selective binding of macromolecules is accurately sensed with NW-FET sensors.

The interface between ferroelectric and 2D material for a Ferroelectric Field-Effect Transistor

NASA Astrophysics Data System (ADS)

Park, Nahee; Kang, Haeyong; Lee, Sang-Goo; Lee, Young Hee; Suh, Dongseok

We have studied electrical property of ferroelectric field-effect transistor which consists of graphene on hexagonal Boron-Nitride (h-BN) gated by a ferroelectric, PMN-PT (i.e. (1-x)Pb(Mg1/3Nb2/3) O3-xPbTiO3) single-crystal substrate. The PMN-PT was expected to have an effect on polarization field into the graphene channel and to induce a giant amount of surface charge. The hexagonal Boron-Nitride (h-BN) flake was directly exfoliated on the PMN-PT substrate for preventing graphene from directly contacting on the PMN-PT substrate. It can make us to observe the effect of the interface between ferroelectric and 2D material on the device operation. Monolayer graphene as 2D channel material, which was confirmed by Raman spectroscopy, was transferred on top of the hexagonal Boron-Nitride (h-BN) by using the conventional dry-transfer method. Here, we can demonstrate that the structure of graphene/hexagonal-BN/ferroelectric field-effect transistor makes us to clearly understand the device operation as well as the interface between ferroelectric and 2D materials by inserting h-BN between them. The phenomena such as anti-hysteresis, current saturation behavior, and hump-like increase of channel current, will be discussed by in terms of ferroelectric switching, polarization-assisted charge trapping.

Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

PubMed Central

Feng, Ping; Shao, Feng; Shi, Yi; Wan, Qing

2014-01-01

One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs) are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed. PMID:25232915

N-Heterocyclic-Carbene-Treated Gold Surfaces in Pentacene Organic Field-Effect Transistors: Improved Stability and Contact at the Interface.

PubMed

Lv, Aifeng; Freitag, Matthias; Chepiga, Kathryn M; Schäfer, Andreas H; Glorius, Frank; Chi, Lifeng

2018-04-16

N-Heterocyclic carbenes (NHCs), which react with the surface of Au electrodes, have been successfully applied in pentacene transistors. With the application of NHCs, the charge-carrier mobility of pentacene transistors increased by five times, while the contact resistance at the pentacene-Au interface was reduced by 85 %. Even after annealing the NHC-Au electrodes at 200 °C for 2 h before pentacene deposition, the charge-carrier mobility of the pentacene transistors did not decrease. The distinguished performance makes NHCs as excellent alternatives to thiols as metal modifiers for the application in organic field-effect transistors (OFETs). © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Silicon junctionless field effect transistors as room temperature terahertz detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Marczewski, J., E-mail: jmarcz@ite.waw.pl; Tomaszewski, D.; Zaborowski, M.

2015-09-14

Terahertz (THz) radiation detection by junctionless metal-oxide-semiconductor field-effect transistors (JL MOSFETs) was studied and compared with THz detection using conventional MOSFETs. It has been shown that in contrast to the behavior of standard transistors, the junctionless devices have a significant responsivity also in the open channel (low resistance) state. The responsivity for a photolithographically defined JL FET was 70 V/W and the noise equivalent power 460 pW/√Hz. Working in the open channel state may be advantageous for THz wireless and imaging applications because of its low thermal noise and possible high operating speed or large bandwidth. It has been proven that themore » junctionless MOSFETs can also operate in a zero gate bias mode, which enables simplification of the THz array circuitry. Existing models of THz detection by MOSFETs were considered and it has been demonstrated that the process of detection by these junctionless devices cannot be explained within the framework of the commonly accepted models and therefore requires a new theoretical approach.« less

Interfacial fields in organic field-effect transistors and sensors

NASA Astrophysics Data System (ADS)

Dawidczyk, Thomas J.

Organic electronics are currently being commercialized and present a viable alternative to conventional electronics. These organic materials offer the ability to chemically manipulate the molecule, allowing for more facile mass processing techniques, which in turn reduces the cost. One application where organic semiconductors (OSCs) are being investigated is sensors. This work evaluates an assortment of n- and p-channel semiconductors as organic field-effect transistor (OFET) sensors. The sensor responses to dinitrotoluene (DNT) vapor and solid along with trinitrotoluene (TNT) solid were studied. Different semiconductor materials give different magnitude and direction of electrical current response upon exposure to DNT. Additional OFET parameters---mobility and threshold voltage---further refine the response to the DNT with each OFET sensor requiring a certain gate voltage for an optimized response to the vapor. The pattern of responses has sufficient diversity to distinguish DNT from other vapors. To effectively use these OFET sensors in a circuit, the threshold voltage needs to be tuned for each transistor to increase the efficiency of the circuit and maximize the sensor response. The threshold voltage can be altered by embedding charges into the dielectric layer of the OFET. To study the quantity and energy of charges needed to alter the threshold voltage, charge carriers were injected into polystyrene (PS) and investigated with scanning Kelvin probe microscopy (SKPM) and thermally stimulated discharge current (TSDC). Lateral heterojunctions of pentacene/PS were scanned using SKPM, effectively observing polarization along a side view of a lateral nonvolatile organic field-effect transistor dielectric interface. TSDC was used to observe charge migration out of PS films and to estimate the trap energy level inside the PS, using the initial rise method. The process was further refined to create lateral heterojunctions that were actual working OFETs, consisting of a

P-channel differential multiple-time programmable memory cells by laterally coupled floating metal gate fin field-effect transistors

NASA Astrophysics Data System (ADS)

Wang, Tai-Min; Chien, Wei-Yu; Hsu, Chia-Ling; Lin, Chrong Jung; King, Ya-Chin

2018-04-01

In this paper, we present a new differential p-channel multiple-time programmable (MTP) memory cell that is fully compatible with advanced 16 nm CMOS fin field-effect transistors (FinFET) logic processes. This differential MTP cell stores complementary data in floating gates coupled by a slot contact structure, which make different read currents possible on a single cell. In nanoscale CMOS FinFET logic processes, the gate dielectric layer becomes too thin to retain charges inside floating gates for nonvolatile data storage. By using a differential architecture, the sensing window of the cell can be extended and maintained by an advanced blanket boost scheme. The charge retention problem in floating gate cells can be improved by periodic restoring lost charges when significant read window narrowing occurs. In addition to high programming efficiency, this p-channel MTP cells also exhibit good cycling endurance as well as disturbance immunity. The blanket boost scheme can remedy the charge loss problem under thin gate dielectrics.

Flexible ambipolar organic field-effect transistors with reverse-offset-printed silver electrodes for a complementary inverter.

PubMed

Park, Junsu; Kim, Minseok; Yeom, Seung-Won; Ha, Hyeon Jun; Song, Hyenggun; Min Jhon, Young; Kim, Yun-Hi; Ju, Byeong-Kwon

2016-06-03

We report ambipolar organic field-effect transistors and complementary inverter circuits with reverse-offset-printed (ROP) Ag electrodes fabricated on a flexible substrate. A diketopyrrolopyrrole-based co-polymer (PDPP-TAT) was used as the semiconductor and poly(methyl methacrylate) was used as the gate insulator. Considerable improvement is observed in the n-channel electrical characteristics by inserting a cesium carbonate (Cs2CO3) as the electron-injection/hole-blocking layer at the interface between the semiconductors and the electrodes. The saturation mobility values are 0.35 cm(2) V(-1) s(-1) for the p-channel and 0.027 cm(2) V(-1) s(-1) for the n-channel. A complementary inverter is demonstrated based on the ROP process, and it is selectively controlled by the insertion of Cs2CO3 onto the n-channel region via thermal evaporation. Moreover, the devices show stable operation during the mechanical bending test using tensile strains ranging from 0.05% to 0.5%. The results confirm that these devices have great potential for use in flexible and inexpensive integrated circuits over a large area.

Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

PubMed Central

Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

2016-01-01

Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

PubMed

Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

2018-01-01

Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Buffer transport mechanisms in intentionally carbon doped GaN heterojunction field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Uren, Michael J.; Cäsar, Markus; Kuball, Martin

2014-06-30

Temperature dependent pulsed and ramped substrate bias measurements are used to develop a detailed understanding of the vertical carrier transport in the buffer layers in a carbon doped GaN power heterojunction field effect transistor. Carbon doped GaN and multiple layers of AlGaN alloy are used in these devices to deliver an insulating and strain relieved buffer with high breakdown voltage capability. However, understanding of the detailed physical mechanism for its operation is still lacking. At the lowest electric fields (<10 MV/m), charge redistribution within the C doped layer is shown to occur by hole conduction in the valence band withmore » activation energy 0.86 eV. At higher fields, leakage between the two-dimensional electron gas and the buffer dominates occurring by a Poole-Frenkel mechanism with activation energy ∼0.65 eV, presumably along threading dislocations. At higher fields still, the strain relief buffer starts to conduct by a field dependent process. Balancing the onset of these leakage mechanisms is essential to allow the build-up of positive rather than negative space charge, and thus minimize bulk-related current-collapse in these devices.« less

Influence of the gate position on source-to-drain resistance in AlGaN/AlN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Liu, Yan; Lin, Zhaojun; Cui, Peng; Zhao, Jingtao; Fu, Chen; Yang, Ming; Lv, Yuanjie

2017-08-01

Using a suitable dual-gate structure, the source-to-drain resistance (RSD) of AlGaN/AlN/GaN heterostructure field-effect transistor (HFET) with varying gate position has been studied at room temperature. The theoretical and experimental results have revealed a dependence of RSD on the gate position. The variation of RSD with the gate position is found to stem from the polarization Coulomb field (PCF) scattering. This finding is of great benefit to the optimization of the performance of AlGaN/AlN/GaN HFET. Especially, when the AlGaN/AlN/GaN HFET works as a microwave device, it is beneficial to achieve the impedance matching by designing the appropriate gate position based on PCF scattering.

Organic field-effect transistors using single crystals.

PubMed

Hasegawa, Tatsuo; Takeya, Jun

2009-04-01

Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.

Vertical Silicon Nanowire Field Effect Transistors with Nanoscale Gate-All-Around

NASA Astrophysics Data System (ADS)

Guerfi, Youssouf; Larrieu, Guilhem

2016-04-01

Nanowires are considered building blocks for the ultimate scaling of MOS transistors, capable of pushing devices until the most extreme boundaries of miniaturization thanks to their physical and geometrical properties. In particular, nanowires' suitability for forming a gate-all-around (GAA) configuration confers to the device an optimum electrostatic control of the gate over the conduction channel and then a better immunity against the short channel effects (SCE). In this letter, a large-scale process of GAA vertical silicon nanowire (VNW) MOSFETs is presented. A top-down approach is adopted for the realization of VNWs with an optimum reproducibility followed by thin layer engineering at nanoscale. Good overall electrical performances were obtained, with excellent electrostatic behavior (a subthreshold slope (SS) of 95 mV/dec and a drain induced barrier lowering (DIBL) of 25 mV/V) for a 15-nm gate length. Finally, a first demonstration of dual integration of n-type and p-type VNW transistors for the realization of CMOS inverter is proposed.

Gate Tunable Transport in Graphene/MoS₂/(Cr/Au) Vertical Field-Effect Transistors.

PubMed

Nazir, Ghazanfar; Khan, Muhammad Farooq; Aftab, Sikandar; Afzal, Amir Muhammad; Dastgeer, Ghulam; Rehman, Malik Abdul; Seo, Yongho; Eom, Jonghwa

2017-12-28

Two-dimensional materials based vertical field-effect transistors have been widely studied due to their useful applications in industry. In the present study, we fabricate graphene/MoS₂/(Cr/Au) vertical transistor based on the mechanical exfoliation and dry transfer method. Since the bottom electrode was made of monolayer graphene (Gr), the electrical transport in our Gr/MoS₂/(Cr/Au) vertical transistors can be significantly modified by using back-gate voltage. Schottky barrier height at the interface between Gr and MoS₂ can be modified by back-gate voltage and the current bias. Vertical resistance (R vert ) of a Gr/MoS₂/(Cr/Au) transistor is compared with planar resistance (R planar ) of a conventional lateral MoS₂ field-effect transistor. We have also studied electrical properties for various thicknesses of MoS₂ channels in both vertical and lateral transistors. As the thickness of MoS₂ increases, R vert increases, but R planar decreases. The increase of R vert in the thicker MoS₂ film is attributed to the interlayer resistance in the vertical direction. However, R planar shows a lower value for a thicker MoS₂ film because of an excess of charge carriers available in upper layers connected directly to source/drain contacts that limits the conduction through layers closed to source/drain electrodes. Hence, interlayer resistance associated with these layers contributes to planer resistance in contrast to vertical devices in which all layers contribute interlayer resistance.

Graphene Field Effect Transistor for Radiation Detection

NASA Technical Reports Server (NTRS)

Li, Mary J. (Inventor); Chen, Zhihong (Inventor)

2016-01-01

The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.

Design considerations and emerging challenges for nanotube-, nanowire-, and negative capacitor-field effect transistors

NASA Astrophysics Data System (ADS)

Wahab, Md. Abdul

As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs) comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FinFETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE) and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may help. For example, gate has excellent electrostatic control over 2D thin film channel with planar geometry, and 1D nanowire (NW) channel with gate-all-around (GAA) geometry to reduce SCE. High carrier mobility of single wall carbon nanotube (SWNT) or III-V channels may reduce VDD to reduce power consumption. Therefore, as channel of transistor, 2D thin film of array SWNTs and 1D III-V multi NWs are promising for sub 10 nm technology nodes. In this thesis, we analyze the potential of these transistors from process, performance, and reliability perspectives. For SWNT FETs, we discuss a set of challenges (such as how to (i) characterize diameter distribution, (ii) remove metallic (m)-SWNTs, and (iii) avoid electrostatic cross-talk among the neighboring SWNTs), and demonstrate solution strategies both theoretically and experimentally. Regarding self-heating in these new class of devices (SWNT FET and GAA NW FET including state-of-the-art FinFET), higher thermal resistance from poor thermal conducting oxides results significant temperature rise, and reduces the IC life-time. For GAA NW FETs, we discuss accurate self-heating evaluation with good spatial, temporal, and thermal resolutions. The introduction of negative capacitor (NC), as gate dielectric stack of transistor, allows sub 60 mV/dec operation to reduce power consumption significantly. Taken together, our work provides a comprehensive perspective regarding the challenges and opportunities of sub 10 nm technology nodes.

Influence of polymer dielectrics on C60-based field-effect transistors

NASA Astrophysics Data System (ADS)

Zhou, Jianlin; Zhang, Fujia; Lan, Lifeng; Wen, Shangsheng; Peng, Junbiao

2007-12-01

Fullerene C60 organic field-effect transistors (OFETs) have been fabricated based on two different polymer dielectric materials, poly(methylmethacrylate) (PMMA) and cross-linkable poly(4-vinylphenol). The large grain size of C60 film and small number of traps at the interface of PMMA /C60 were obtained with high electron mobility of 0.66cm2/Vs in the PMMA transistor. The result suggests that the C60 semiconductor cooperating with polymer dielectric is a promising application in the fabrication of n-type organic transistors because of low threshold voltage and high electron mobility.

A new method to determine the 2DEG density distribution for passivated AlGaN/AlN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Fu, Chen; Lin, Zhaojun; Cui, Peng; Lv, Yuanjie; Zhou, Yang; Dai, Gang; Luan, Chongbiao; Liu, Huan; Cheng, Aijie

2018-01-01

A new method to determine the two-dimensional electron gas (2DEG) density distribution of the AlGaN/AlN/GaN heterostructure field-effect transistors (HFETs) after the Si3N4 passivation process has been presented. Detailed device characteristics were investigated and better transport properties have been observed for the passivated devices. The strain variation and the influence of the surface trapping states were analyzed. By using the polarization Coulomb field (PCF) scattering theory, the 2DEG density after passivation was both quantitively and qualitatively determined, which has been increased by 45% under the access regions and decreased by 2% under the gate region.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET.

PubMed

Tan, Michael Loong Peng; Lentaris, Georgios; Amaratunga Aj, Gehan

2012-08-19

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.

Organic field-effect transistors using single crystals

PubMed Central

Hasegawa, Tatsuo; Takeya, Jun

2009-01-01

Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for ‘plastic electronics’. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20–40 cm2 Vs−1, achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps. PMID:27877287

Atomically engineered epitaxial anatase TiO 2 metal-semiconductor field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Brian S. Y.; Minohara, Makoto; Hikita, Yasuyuki

Here, anatase TiO 2 is a promising material for a vast array of electronic, energy, and environmental applications, including photocatalysis, photovoltaics, and sensors. A key requirement for these applications is the ability to modulate its electrical properties without dominant dopant scattering and while maintaining high carrier mobility. Here, we demonstrate the room temperature field-effect modulation of the conducting epitaxial interface between anatase TiO 2 and LaAlO 3 (001), which arises for LaO-terminated LaAlO 3, while the AlO 2-terminated interface is insulating. This approach, together with the metal-semiconductor field-effect transistor geometry, naturally bypasses the gate/channel interface traps, resulting in a highmore » field-effect mobility μ FE of 3.14 cm 2 (V s) –1 approaching 98% of the corresponding Hall mobility μ Hall. Accordingly, the channel conductivity is modulated over 6 orders of magnitude over a gate voltage range of ~4 V.« less

Atomically engineered epitaxial anatase TiO 2 metal-semiconductor field-effect transistors

DOE PAGES

Kim, Brian S. Y.; Minohara, Makoto; Hikita, Yasuyuki; ...

2018-03-26

Here, anatase TiO 2 is a promising material for a vast array of electronic, energy, and environmental applications, including photocatalysis, photovoltaics, and sensors. A key requirement for these applications is the ability to modulate its electrical properties without dominant dopant scattering and while maintaining high carrier mobility. Here, we demonstrate the room temperature field-effect modulation of the conducting epitaxial interface between anatase TiO 2 and LaAlO 3 (001), which arises for LaO-terminated LaAlO 3, while the AlO 2-terminated interface is insulating. This approach, together with the metal-semiconductor field-effect transistor geometry, naturally bypasses the gate/channel interface traps, resulting in a highmore » field-effect mobility μ FE of 3.14 cm 2 (V s) –1 approaching 98% of the corresponding Hall mobility μ Hall. Accordingly, the channel conductivity is modulated over 6 orders of magnitude over a gate voltage range of ~4 V.« less

Atomically engineered epitaxial anatase TiO2 metal-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Kim, Brian S. Y.; Minohara, Makoto; Hikita, Yasuyuki; Bell, Christopher; Hwang, Harold Y.

2018-03-01

Anatase TiO2 is a promising material for a vast array of electronic, energy, and environmental applications, including photocatalysis, photovoltaics, and sensors. A key requirement for these applications is the ability to modulate its electrical properties without dominant dopant scattering and while maintaining high carrier mobility. Here, we demonstrate the room temperature field-effect modulation of the conducting epitaxial interface between anatase TiO2 and LaAlO3 (001), which arises for LaO-terminated LaAlO3, while the AlO2-terminated interface is insulating. This approach, together with the metal-semiconductor field-effect transistor geometry, naturally bypasses the gate/channel interface traps, resulting in a high field-effect mobility μ FE of 3.14 cm2 (V s)-1 approaching 98% of the corresponding Hall mobility μ Hall . Accordingly, the channel conductivity is modulated over 6 orders of magnitude over a gate voltage range of ˜4 V.

Effect of channel-width and chirality on graphene field-effect transistor based real-time biomolecule sensing

NASA Astrophysics Data System (ADS)

Lyu, Letian; Jaswal, Perveshwer; Xu, Guangyu

2018-03-01

Graphene field-effect transistors (GFET) hold promise in biomolecule sensing due to the outstanding properties of graphene materials. Charges in biomolecules are transduced into a change in the GFET current, which allows real-time monitoring of the biomolecule concentrations. Here we theoretically evaluate the performance of GFET based real-time biomolecule sensing, aiming to better understand the width-scaling limit in GFET based biosensors. In particular, we study the effect of the channel-width and the chirality on FET sensitivity by taking the percentage change of the FET current per unit charge density as the sensing signal. Firstly, GFETs made of graphene nanoribbons (GNR) and graphene sheets (GS) show comparable sensing signals to each other when gated at 1011 - 1012 cm-2 carrier densities. Sensing signals in GNRs are enhanced when gated near the sub-band thresholds, and increase their values in wider GNRs due to the change in device conductance and quantum capacitance. Secondly, the GNR chirality is found to fine tune the sensing signals. Armchair GNRs with smaller energy bandgaps appear to have an enhanced sensing signal close to 1011 cm-2 carrier densities. These results may help understand the scaling limit in GFET based biosensors along the width direction, and shed light on forming all-electrical bio-arrays.

Field effect transistors based on phosphorene nanoribbon with selective edge-adsorption: A first-principles study

NASA Astrophysics Data System (ADS)

Hu, Mengli; Yang, Zhixiong; Zhou, Wenzhe; Li, Aolin; Pan, Jiangling; Ouyang, Fangping

2018-04-01

By using density functional theory (DFT) and nonequilibrium Green's function (NEGF), field effect transistor (FET) based on zigzag shaped phosphorene nanoribbons (ZPNR) are investigated. The FETs are constructed with bare-edged ZPNRs as electrodes and H, Cl or OH adsorbed ZPNRs as channel. It is found FETs with the three kinds of channel show similar transport properties. The FET is p-type with a maximum current on/off ratio of 104 and a minimum off-current of 1 nA. The working mode of FETs is dependent on the parity of channel length. It can be either enhancement mode or depletion mode and the off-state current shows an even-odd oscillation. The current oscillations are interpreted with density of states (DOS) analysis and methods of evolution operator and tight-binding Hamiltonian. Operating mechanism of the designed FETs is also presented with projected local density of states and band diagrams.

I-V Characteristics of a Ferroelectric Field Effect Transistor

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen

1999-01-01

There are many possible uses for ferroelectric field effect transistors.To understand their application, a fundamental knowledge of their basic characteristics must first be found. In this research, the current and voltage characteristics of a field effect transistor are described. The effective gate capacitance and charge are derived from experimental data on an actual FFET. The general equation for a MOSFET is used to derive the internal characteristics of the transistor: This equation is modified slightly to describe the FFET characteristics. Experimental data derived from a Radiant Technologies FFET is used to calculate the internal transistor characteristics using fundamental MOSFET equations. The drain current was measured under several different gate and drain voltages and with different initial polarizations on the ferroelectric material in the transistor. Two different polarization conditions were used. One with the gate ferroelectric material polarized with a +9.0 volt write pulse and one with a -9.0 volt pulse.

SiC Optically Modulated Field-Effect Transistor

NASA Technical Reports Server (NTRS)

Tabib-Azar, Massood

2009-01-01

An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification

Field Effect Transistor Behavior in Electrospun Polyaniline/Polyethylene Oxide Demonstrated

NASA Technical Reports Server (NTRS)

Mueller, Carl H.; Theofylaktos, Onoufrios; Robinson, Daryl C.; Miranda, Felix A.

2004-01-01

Novel transistors and logic devices based on nanotechnology concepts are under intense development. The potential for ultra-low-power circuitry makes nanotechnology attractive for applications such as digital electronics and sensors. For NASA applications, nanotechnology offers tremendous opportunities for increased onboard data processing, and thus autonomous decisionmaking ability, and novel sensors that detect and respond to environmental stimuli with little oversight requirements. Polyaniline/polyethylene oxide (PANi/PEO) nanofibers are of interest because they have electrical conductivities that can be changed from insulating to metallic by varying the doping levels and conformations of the polymer chain. At the NASA Glenn Research Center, we have observed field effect transistor (FET) behavior in electrospun PANi/PEO nanofibers doped with camphorsulfonic acid. The nanofibers were deposited onto Au electrodes, which had been prepatterned onto oxidized silicon substrates. The preceding scanning electron image shows the device used in the transistor measurements. Saturation channel currents are observed at surprisingly low source/drain voltages (see the following graph). The hole mobility in the depletion regime is 1.4x10(exp -4)sq cm/V sec, whereas the one-dimensional charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx.10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating one-dimensional polymer FET's.

Atomic-Monolayer MoS2 Band-to-Band Tunneling Field-Effect Transistor.

PubMed

Lan, Yann-Wen; Torres, Carlos M; Tsai, Shin-Hung; Zhu, Xiaodan; Shi, Yumeng; Li, Ming-Yang; Li, Lain-Jong; Yeh, Wen-Kuan; Wang, Kang L

2016-11-01

The experimental observation of band-to-band tunneling in novel tunneling field-effect transistors utilizing a monolayer of MoS 2 as the conducting channel is demonstrated. Our results indicate that the strong gate-coupling efficiency enabled by two-dimensional materials, such as monolayer MoS 2 , results in the direct manifestation of a band-to-band tunneling current and an ambipolar transport. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Artificial semiconductor/insulator superlattice channel structure for high-performance oxide thin-film transistors

PubMed Central

Ahn, Cheol Hyoun; Senthil, Karuppanan; Cho, Hyung Koun; Lee, Sang Yeol

2013-01-01

High-performance thin-film transistors (TFTs) are the fundamental building blocks in realizing the potential applications of the next-generation displays. Atomically controlled superlattice structures are expected to induce advanced electric and optical performance due to two-dimensional electron gas system, resulting in high-electron mobility transistors. Here, we have utilized a semiconductor/insulator superlattice channel structure comprising of ZnO/Al2O3 layers to realize high-performance TFTs. The TFT with ZnO (5 nm)/Al2O3 (3.6 nm) superlattice channel structure exhibited high field effect mobility of 27.8 cm2/Vs, and threshold voltage shift of only < 0.5 V under positive/negative gate bias stress test during 2 hours. These properties showed extremely improved TFT performance, compared to ZnO TFTs. The enhanced field effect mobility and stability obtained for the superlattice TFT devices were explained on the basis of layer-by-layer growth mode, improved crystalline nature of the channel layers, and passivation effect of Al2O3 layers. PMID:24061388

Atomic layer deposition of insulating nitride interfacial layers for germanium metal oxide semiconductor field effect transistors with high-κ oxide/tungsten nitride gate stacks

NASA Astrophysics Data System (ADS)

Kim, Kyoung H.; Gordon, Roy G.; Ritenour, Andrew; Antoniadis, Dimitri A.

2007-05-01

Atomic layer deposition (ALD) was used to deposit passivating interfacial nitride layers between Ge and high-κ oxides. High-κ oxides on Ge surfaces passivated by ultrathin (1-2nm) ALD Hf3N4 or AlN layers exhibited well-behaved C-V characteristics with an equivalent oxide thickness as low as 0.8nm, no significant flatband voltage shifts, and midgap density of interface states values of 2×1012cm-1eV-1. Functional n-channel and p-channel Ge field effect transistors with nitride interlayer/high-κ oxide/metal gate stacks are demonstrated.

Functional Na+ Channels in Cell Adhesion probed by Transistor Recording

PubMed Central

Schmidtner, Markus; Fromherz, Peter

2006-01-01

Cell membranes in a tissue are in close contact to each other, embedded in the extracellular matrix. Standard electrophysiological methods are not able to characterize ion channels under these conditions. Here we consider the area of cell adhesion on a solid substrate as a model system. We used HEK 293 cells cultured on fibronectin and studied the activation of NaV1.4 sodium channels in the adherent membrane with field-effect transistors in a silicon substrate. Under voltage clamp, we compared the transistor response with the whole-cell current. We observed that the extracellular voltage in the cell-chip contact was proportional to the total membrane current. The relation was calibrated by alternating-current stimulation. We found that Na+ channels are present in the area of cell adhesion on fibronectin with a functionality and a density that is indistinguishable from the free membrane. The experiment provides a basis for studying selective accumulation and depletion of ion channels in cell adhesion and also for a development of cell-based biosensoric devices and neuroelectronic systems. PMID:16227504

Bio-fabrication of nanomesh channels of single-walled carbon nanotubes for locally gated field-effect transistors

NASA Astrophysics Data System (ADS)

Byeon, Hye-Hyeon; Lee, Woo Chul; Kim, Wonbin; Kim, Seong Keun; Kim, Woong; Yi, Hyunjung

2017-01-01

Single-walled carbon nanotubes (SWNTs) are one of the promising electronic components for nanoscale electronic devices such as field-effect transistors (FETs) owing to their excellent device characteristics such as high conductivity, high carrier mobility and mechanical flexibility. Localized gating gemometry of FETs enables individual addressing of active channels and allows for better electrostatics via thinner dielectric layer of high k-value. For localized gating of SWNTs, it becomes critical to define SWNTs of controlled nanostructures and functionality onto desired locations in high precision. Here, we demonstrate that a biologically templated approach in combination of microfabrication processes can successfully produce a nanostructured channels of SWNTs for localized active devices such as local bottom-gated FETs. A large-scale nanostructured network, nanomesh, of SWNTs were assembled in solution using an M13 phage with strong binding affinity toward SWNTs and micrometer-scale nanomesh channels were defined using negative photolithography and plasma-etching processes. The bio-fabrication approach produced local bottom-gated FETs with remarkably controllable nanostructures and successfully enabled semiconducting behavior out of unsorted SWNTs. In addition, the localized gating scheme enhanced the device performances such as operation voltage and I on/I off ratio. We believe that our approach provides a useful and integrative method for fabricating electronic devices out of nanoscale electronic materials for applications in which tunable electrical properties, mechanical flexibility, ambient stability, and chemical stability are of crucial importance.

Low-frequency noise in MoSe{sub 2} field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Das, Suprem R., E-mail: srdaspurdue@gmail.com, E-mail: janes@purdue.edu; Kwon, Jiseok; Prakash, Abhijith

One of the important performance metrics of emerging nanoelectronic devices, including low dimensional Field Effect Transistors (FETs), is the magnitude of the low-frequency noise. Atomically thin 2D semiconductor channel materials such as MoX{sub 2} (X ≡ S, Se) have shown promising transistor characteristics such as I{sub ON}/I{sub OFF} ratio exceeding 10{sup 6} and low I{sub OFF}, making them attractive as channel materials for next generation nanoelectronic devices. However, MoS{sub 2} FETs demonstrated to date exhibit high noise levels under ambient conditions. In this letter, we report at least two orders of magnitude smaller values of Hooge parameter in a back-gatedmore » MoSe{sub 2} FET (10 atomic layers) with nickel S/D contacts and measured at atmospheric pressure and temperature. The channel dominated regime of noise was extracted from the total noise spectrum and is shown to follow a mobility fluctuation model with 1/f dependence. The low noise in MoSe{sub 2} FETs is comparable to other 1D nanoelectronic devices such as carbon nanotube FETs (CNT-FETs) and paves the way for use in future applications in precision sensing and communications.« less

Field-effect transistor improves electrometer amplifier

NASA Technical Reports Server (NTRS)

Munoz, R.

1964-01-01

An electrometer amplifier uses a field effect transistor to measure currents of low amperage. The circuit, developed as an ac amplifier, is used with an external filter which limits bandwidth to achieve optimum noise performance.

Reliability of gamma-irradiated n-channel ZnO thin-film transistors: electronic and interface properties

NASA Astrophysics Data System (ADS)

Lee, Kin Kiong; Wang, Danna; Shinobu, Onoda; Ohshima, Takeshi

2018-04-01

Radiation-induced charge trapping and interface traps in n-channel ZnO thin film transistors are characterised as a function of total dose and irradiation bias following exposure to gamma-rays. Devices were irradiated up to ∼60 kGy(SiO?) and the electrical characteristic exhibits two distinct regimes. In the first regime, up to a total dose of 40 kGy(SiO?), the threshold voltage increases positively. However, in the second regime with irradiation greater than 40 kGy(SiO?), the threshold voltage moves in the opposite direction. This reversal of threshold voltage is attributed to the influence of the radiation-induced interface and oxide- charge, in which both have opposite polarity, on the electrical performance of the transistors. In the first regime, the generation of the oxide- charge is initially greater than the density of interface traps and caused a positive shift. In the second regime, when the total doses were greater than 40 kGy(SiO?), the radiation-induced interface traps are greater than the density of oxide- charge and caused the threshold voltage to switch direction. Further, the generated interface traps contributed to the degradation of the effective channel mobility, whereas the density of traps at the grain-boundaries did not increase significantly upon irradiation. Isothermal annealing of the devices at 363 K results in a reduction in the trap density and an improvement of the effective channel mobility to ∼90% of its pre-irradiation value.

Two dimensional analytical model for a reconfigurable field effect transistor

NASA Astrophysics Data System (ADS)

Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

2018-02-01

This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

Emerging ferroelectric transistors with nanoscale channel materials: the possibilities, the limitations

NASA Astrophysics Data System (ADS)

Hong, Xia

2016-03-01

Combining the nonvolatile, locally switchable polarization field of a ferroelectric thin film with a nanoscale electronic material in a field effect transistor structure offers the opportunity to examine and control a rich variety of mesoscopic phenomena and interface coupling. It is also possible to introduce new phases and functionalities into these hybrid systems through rational design. This paper reviews two rapidly progressing branches in the field of ferroelectric transistors, which employ two distinct classes of nanoscale electronic materials as the conducting channel, the two-dimensional (2D) electron gas graphene and the strongly correlated transition metal oxide thin films. The topics covered include the basic device physics, novel phenomena emerging in the hybrid systems, critical mechanisms that control the magnitude and stability of the field effect modulation and the mobility of the channel material, potential device applications, and the performance limitations of these devices due to the complex interface interactions and challenges in achieving controlled materials properties. Possible future directions for this field are also outlined, including local ferroelectric gate control via nanoscale domain patterning and incorporating other emergent materials in this device concept, such as the simple binary ferroelectrics, layered 2D transition metal dichalcogenides, and the 4d and 5d heavy metal compounds with strong spin-orbit coupling.

In2O3 nanowire based field effect transistor for biological sensors.

NASA Astrophysics Data System (ADS)

Zeng, Zhongming; Wang, Kai; Zhou, Weilie

2008-03-01

Semiconductor nanowires (NWs) are attracting considerable attention due to their nanoscale dimensions and enormous surface-to-volume ratios. Many applications have been demonstrated in toxic gas, protein, small molecule and viruses sensing because of their superior sensing performances. Indium oxide (In2O3) NWs have been successfully applied for toxic gas and small organic molecule sensing. In our experiment, In2O3 NWs based field effect transistors (FET) are fabricated for virus (Ricin) detections. Single-crystalline In2O3 NWs with diameters around 100 nm were synthesized by the thermal evaporation. The nanodevice based on In2O3 NWs bridges the source/drain electrodes with a channel length of ˜5 μm. Basic transport properties of devices were measured before biological detection. The I-V curves with the gate voltage Vg=0 shows good ohmic contact and the resistance is about 10 Mφ. The back-gate effect on the conductivity showed that In2O3 NW is working as n-type channel with obvious back-gate effect, which is much stronger than the reported results. The nanodevices used as virus detection will be also discussed.

Highly sensitive protein detection using a plasmonic field effect transistor (Conference Presentation)

NASA Astrophysics Data System (ADS)

Shokri-Kojori, Hossein; Ji, Yiwen; Han, Xu; Paik, Younghun; Braunschweig, Adam; Kim, Sung Jin

2016-03-01

Localized surface Plasmon Resonance (LSPR) is a nanoscale phenomenon which presents strong resonance associated with noble metal nanostructures. This plasmon resonance based technology enables highly sensitive detection for chemical and biological applications. Recently, we have developed a plasmon field effect transistor (FET) that enables direct plasmonic-to-electric signal conversion with signal amplification. The plasmon FET consists of back-gated field effect transistor incorporated with gold nanoparticles on top of the FET channel. The gold nanostructures are physically separated from transistor electrodes and can be functionalized for a specific biological application. In this presentation, we report a successful demonstration of a model system to detect Con A proteins using Carbohydrate linkers as a capture molecule. The plasmon FET detected a very low concentration of Con A (0.006 mg/L) while it offers a wide dynamic range of 0.006-50 mg/L. In this demonstration, we used two-color light sources instead of a bulky spectrometer to achieve high sensitivity and wide dynamic range. The details of two-color based differential measurement method will be discussed. This novel protein-based sensor has several advantages such as extremely small size for point-of-care system, multiplexing capability, no need of complex optical geometry.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET

PubMed Central

2012-01-01

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency. PMID:22901374

Recent progress in photoactive organic field-effect transistors.

PubMed

Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

2014-04-01

Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

Interface trap of p-type gate integrated AlGaN/GaN heterostructure field effect transistors

NASA Astrophysics Data System (ADS)

Kim, Kyu Sang

2017-09-01

In this work, the impact of trap states at the p-(Al)GaN/AlGaN interface has been investigated for the normally-off mode p-(Al)GaN/AlGaN/GaN heterostructure field-effect transistors (HFETs) by means of frequency dependent conductance. From the current-voltage (I-V) measurement, it was found that the p-AlGaN gate integrated device has higher drain current and lower gate leakage current compared to the p-GaN gate integrated device. We obtained the interface trap density and the characteristic time constant for the p-type gate integrated HFETs under the forward gate voltage of up to 6 V. As a result, the interface trap density (characteristic time constant) of the p-GaN gate device was lower (longer) than that of the p-AlGaN. Furthermore, it was analyzed that the trap state energy level of the p-GaN gate device was located at the shallow level relative to the p-AlGaN gate device, which accounts for different gate leakage current of each devices.

Improved performance of InSe field-effect transistors by channel encapsulation

NASA Astrophysics Data System (ADS)

Liang, Guangda; Wang, Yiming; Han, Lin; Yang, Zai-Xing; Xin, Qian; Kudrynskyi, Zakhar R.; Kovalyuk, Zakhar D.; Patanè, Amalia; Song, Aimin

2018-06-01

Due to the high electron mobility and photo-responsivity, InSe is considered as an excellent candidate for next generation electronics and optoelectronics. In particular, in contrast to many high-mobility two-dimensional (2D) materials, such as phosphorene, InSe is more resilient to oxidation in air. Nevertheless, its implementation in future applications requires encapsulation techniques to prevent the adsorption of gas molecules on its surface. In this work, we use a common lithography resist, poly(methyl methacrylate) (PMMA) to encapsulate InSe-based field-effect transistors (FETs). The encapsulation of InSe by PMMA improves the electrical stability of the FETs under a gate bias stress, and increases both the drain current and electron mobility. These findings indicate the effectiveness of the PMMA encapsulation method, which could be applied to other 2D materials.

Transport properties of field-effect transistor with Langmuir-Blodgett films of C60 dendrimer and estimation of impurity levels

NASA Astrophysics Data System (ADS)

Kawasaki, Naoko; Nagano, Takayuki; Kubozono, Yoshihiro; Sako, Yuuki; Morimoto, Yu; Takaguchi, Yutaka; Fujiwara, Akihiko; Chu, Chih-Chien; Imae, Toyoko

2007-12-01

Field-effect transistor (FET) device has been fabricated with Langmuir-Blodgett films of C60 dendrimer. The device showed n-channel normally off characteristics with the field-effect mobility of 2.7×10-3cm2V-1s-1 at 300K, whose value is twice as high as that (1.4×10-3cm2V-1s-1) for the FET with spin-coated films of C60 dendrimer. This originates from the formation of ordered π-conduction network of C60 moieties. From the temperature dependence of field-effect mobility, a structural phase transition has been observed at around 300K. Furthermore, the density of states for impurity levels was estimated in the Langmuir-Blodgett films.

Effects of floating gate structures on the two-dimensional electron gas density and electron mobility in AlGaN/AlN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Zhao, Jingtao; Zhao, Zhenguo; Chen, Zidong; Lin, Zhaojun; Xu, Fukai

2017-12-01

In this study, we have investigated the electrical properties of the AlGaN/AlN/GaN heterostructure field-effect transistors (HFETs) with floating gate structures using the measured capacitancevoltage (C-V) and current-voltage (I-V) characteristics. It is found that the two-dimensional electron gas (2DEG) density under the central gate cannot be changed by the floating gate structures. However, the floating gate structures can cause the strain variation in the barrier layer, which lead to the non-uniform distribution of the polarization charges, then induce a polarization Coulomb field and scatter the 2DEG. More floating gate structures and closer distance between the floating gates and the central gate will result in stronger scattering effect of the 2DEG.

Plasma-assisted ohmic contact for AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Zhang, Jiaqi; Wang, Lei; Wang, Qingpeng; Jiang, Ying; Li, Liuan; Zhu, Huichao; Ao, Jin-Ping

2016-03-01

An Al-based ohmic process assisted by an inductively coupled plasma (ICP) recess treatment is proposed for AlGaN/GaN heterostructure field-effect transistors (HFETs) to realize ohmic contact, which is only needed to anneal at 500 °C. The recess treatment was done with SiCl4 plasma with 100 W ICP power for 20 s and annealing at 575 °C for 1 min. Under these conditions, contact resistance of 0.52 Ωmm was confirmed. To suppress the ball-up phenomenon and improve the surface morphology, an Al/TiN structure was also fabricated with the same conditions. The contact resistance was further improved to 0.30 Ωmm. By using this plasma-assisted ohmic process, a gate-first HFET was fabricated. The device showed high drain current density and high transconductance. The leakage current of the TiN-gate device decreased to 10-9 A, which was 5 orders of magnitude lower than that of the device annealed at 800 °C. The results showed that the low-temperature ohmic contact process assisted by ICP treatment is promising for the fabrication of gate-first and self-aligned gate HFETs.

Nanocrystal-mediated charge screening effects in nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Yoon, C. J.; Yeom, D. H.; Jeong, D. Y.; Lee, M. G.; Moon, B. M.; Kim, S. S.; Choi, C. Y.; Koo, S. M.

2009-03-01

ZnO nanowire field-effect transistors having an omega-shaped floating gate (OSFG) have been successfully fabricated by directly coating CdTe nanocrystals (˜6±2.5 nm) at room temperature, and compared to simultaneously prepared control devices without nanocrystals. Herein, we demonstrate that channel punchthrough may occur when the depletion from the OSFG takes place due to the trapped charges in the nanocrystals. Electrical measurements on the OSFG nanowire devices showed static-induction transistorlike behavior in the drain output IDS-VDS characteristics and a hysteresis window as large as ˜3.1 V in the gate transfer IDS-VGS characteristics. This behavior is ascribed to the presence of the CdTe nanocrystals, and is indicative of the trapping and emission of electrons in the nanocrystals. The numerical simulations clearly show qualitatively the same characteristics as the experimental data and confirm the effect, showing that the change in the potential distribution across the channel, induced by both the wrapping-around gate and the drain, affects the transport characteristics of the device. The cross-sectional energy band and potential profile of the OSFG channel corresponding to the "programed (noncharged)" and "erased (charged)" operations for the device are also discussed on the basis of the numerical capacitance-voltage simulations.

Operation of the GaSb p-channel metal-oxide-semiconductor field-effect transistors fabricated on (111)A surfaces

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nishi, K., E-mail: nishi@mosfet.t.u-tokyo.ac.jp; Takenaka, M.; Takagi, S.

2014-12-08

We demonstrate the operation of GaSb p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on (111)A surfaces with Al{sub 2}O{sub 3} gate dielectrics formed by atomic-layer deposition at 150 °C. The p-MOSFETs on (111)A surfaces exhibit higher drain current and lower subthreshold swing than those on (100) surfaces. We find that the interface-state density (D{sub it}) values at the Al{sub 2}O{sub 3}/GaSb MOS interfaces on the (111)A surfaces are lower than those on the (100) surfaces, which can lead to performance enhancement of the GaSb p-MOSFETs on (111)A surfaces. The mobility of the GaSb p-MOSFETs on (111)A surfaces is 80% higher than that onmore » (100) surfaces.« less

Characterization and Fabrication of High k dielectric-High Mobility Channel Transistors

NASA Astrophysics Data System (ADS)

Sun, Xiao

As the conventional scaling of Si-based MOSFETs would bring negligible or even negative merits for IC's beyond the 7-nm CMOS technology node, many perceive the use of high-mobility channels to be one of the most likely principle changes, in order to achieve higher performance and lower power. However, interface and oxide traps have become a major obstacle for high-mobility semiconductors (such as Ge, InGaAs, GaSb, GaN...) to replace Si CMOS technology. In this thesis, the distinct properties of the traps in the high-k dielectric/high-mobility substrate system is discussed, as well as the challenges to characterize and passivate them. By modifying certain conventional gate admittance methods, both the fast and slow traps in Ge MOS gate stacks is investigated. In addition, a novel ac-transconductance method originated at Yale is introduced and demonstrated with several advanced transistors provided by collaborating groups, such as ultra-thin-body & box SO1 MOSFETs (CEA-LETI), InGaAs MOSFETs (IMEC, UT Austin, Purdue), and GaN MOS-HEMT (MIT). By use of the aforementioned characterization techniques, several effective passivation techniques on high mobility substrates (Ge, InGaAs, GaSb, GeSn, etc.) are evaluated, including a novel Ba sub-monolayer passivation of Ge surface. The key factors that need to be considered in passivating high mobility substrates are revealed. The techniques that we have established for characterizing traps in advanced field-effect transistors, as well as the knowledge gained about these traps by the use of these techniques, have been applied to the study of ionizing radiation effects in high-mobility-channel transistors, because it is very important to understand such effects as these devices are likely to be exposed to radiation-harsh environments, such as in outer space, nuclear plants, and during X-ray or UHV lithography. In this thesis, the total ionizing dose (TD) radiation effects of InGaAs-based MOSFETs and GaN-based MOS-HEMT are

A Probe for Measuring Spacecraft Surface Potentials Using a Direct-Gate Field Effect Transistor.

DTIC Science & Technology

1983-09-30

SURFACE POTENTIALS USING A DIRECT-GATE FIELD EFFECT TRANSISTOR Mark N. Horenstein Anton Havretic Trustees of Boston University 881 Commonwealth Avenue...1933 Transistor 6. PERFORMING ORG. REPORT NUMBER 7. AUTHOR(s) S. CONTRACT OR GRANT NUMBER(&) ’_5 Mark N. Horenstein Anton Mavretic F19628-82-K-00 34...at AFGL. These tests can be considered the bench mark tests for device performance, with all elements of the monitoring system optimized to eliminate

β-Ga2O3 on insulator field-effect transistors with drain currents exceeding 1.5 A/mm and their self-heating effect

NASA Astrophysics Data System (ADS)

Zhou, Hong; Maize, Kerry; Qiu, Gang; Shakouri, Ali; Ye, Peide D.

2017-08-01

We have demonstrated that depletion/enhancement-mode β-Ga2O3 on insulator field-effect transistors can achieve a record high drain current density of 1.5/1.0 A/mm by utilizing a highly doped β-Ga2O3 nano-membrane as the channel. β-Ga2O3 on insulator field-effect transistor (GOOI FET) shows a high on/off ratio of 1010 and low subthreshold slope of 150 mV/dec even with 300 nm thick SiO2. The enhancement-mode GOOI FET is achieved through surface depletion. An ultra-fast, high resolution thermo-reflectance imaging technique is applied to study the self-heating effect by directly measuring the local surface temperature. High drain current, low Rc, and wide bandgap make the β-Ga2O3 on insulator field-effect transistor a promising candidate for future power electronics applications.

Trap density of states in n-channel organic transistors: variable temperature characteristics and band transport

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Joung-min, E-mail: cho.j.ad@m.titech.ac.jp; Akiyama, Yuto; Kakinuma, Tomoyuki

2013-10-15

We have investigated trap density of states (trap DOS) in n-channel organic field-effect transistors based on N,N ’-bis(cyclohexyl)naphthalene diimide (Cy-NDI) and dimethyldicyanoquinonediimine (DMDCNQI). A new method is proposed to extract trap DOS from the Arrhenius plot of the temperature-dependent transconductance. Double exponential trap DOS are observed, in which Cy-NDI has considerable deep states, by contrast, DMDCNQI has substantial tail states. In addition, numerical simulation of the transistor characteristics has been conducted by assuming an exponential trap distribution and the interface approximation. Temperature dependence of transfer characteristics are well reproduced only using several parameters, and the trap DOS obtained from the simulatedmore » characteristics are in good agreement with the assumed trap DOS, indicating that our analysis is self-consistent. Although the experimentally obtained Meyer-Neldel temperature is related to the trap distribution width, the simulation satisfies the Meyer-Neldel rule only very phenomenologically. The simulation also reveals that the subthreshold swing is not always a good indicator of the total trap amount, because it also largely depends on the trap distribution width. Finally, band transport is explored from the simulation having a small number of traps. A crossing point of the transfer curves and negative activation energy above a certain gate voltage are observed in the simulated characteristics, where the critical V{sub G} above which band transport is realized is determined by the sum of the trapped and free charge states below the conduction band edge.« less

Silicon nanowire biologically sensitive field effect transistors: electrical characteristics and applications.

PubMed

Rim, Taiuk; Baek, Chang-Ki; Kim, Kihyun; Jeong, Yoon-Ha; Lee, Jeong-Soo; Meyyappan, M

2014-01-01

The interest in biologically sensitive field effect transistors (BioFETs) is growing explosively due to their potential as biosensors in biomedical, environmental monitoring and security applications. Recently, adoption of silicon nanowires in BioFETs has enabled enhancement of sensitivity, device miniaturization, decreasing power consumption and emerging applications such as the 3D cell probe. In this review, we describe the device physics and operation of the silicon nanowire BioFETs along with recent advances in the field. The silicon nanowire BioFETs are basically the same as the conventional field-effect transistors (FETs) with the exceptions of nanowire channel instead of thin film and a liquid gate instead of the conventional gate. Therefore, the silicon device physics is important to understand the operation of the BioFETs. Herein, physical characteristics of the silicon nanowire FETs are described and the operational principles of the BioFETs are classified according to the number of gates and the analysis domain of the measured signal. Even the bottom-up process has merits on low-cost fabrication; the top-down process technique is highlighted here due to its reliability and reproducibility. Finally, recent advances in the silicon nanowire BioFETs in the literature are described and key features for commercialization are discussed.

Enzyme-polyelectrolyte multilayer assemblies on reduced graphene oxide field-effect transistors for biosensing applications.

PubMed

Piccinini, Esteban; Bliem, Christina; Reiner-Rozman, Ciril; Battaglini, Fernando; Azzaroni, Omar; Knoll, Wolfgang

2017-06-15

We present the construction of layer-by-layer (LbL) assemblies of polyethylenimine and urease onto reduced-graphene-oxide based field-effect transistors (rGO FETs) for the detection of urea. This versatile biosensor platform simultaneously exploits the pH dependency of liquid-gated graphene-based transistors and the change in the local pH produced by the catalyzed hydrolysis of urea. The use of an interdigitated microchannel resulted in transistors displaying low noise, high pH sensitivity (20.3µA/pH) and transconductance values up to 800 µS. The modification of rGO FETs with a weak polyelectrolyte improved the pH response because of its transducing properties by electrostatic gating effects. In the presence of urea, the urease-modified rGO FETs showed a shift in the Dirac point due to the change in the local pH close to the graphene surface. Markedly, these devices operated at very low voltages (less than 500mV) and were able to monitor urea in the range of 1-1000µm, with a limit of detection (LOD) down to 1µm, fast response and good long-term stability. The urea-response of the transistors was enhanced by increasing the number of bilayers due to the increment of the enzyme surface coverage onto the channel. Moreover, quantification of the heavy metal Cu 2+ (with a LOD down to 10nM) was performed in aqueous solution by taking advantage of the urease specific inhibition. Copyright © 2016 The Authors. Published by Elsevier B.V. All rights reserved.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations

NASA Astrophysics Data System (ADS)

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-01

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

Selective Dirac voltage engineering of individual graphene field-effect transistors for digital inverter and frequency multiplier integrations.

PubMed

Sul, Onejae; Kim, Kyumin; Jung, Yungwoo; Choi, Eunsuk; Lee, Seung-Beck

2017-09-15

The ambipolar band structure of graphene presents unique opportunities for novel electronic device applications. A cycle of gate voltage sweep in a conventional graphene transistor produces a frequency-doubled output current. To increase the frequency further, we used various graphene doping control techniques to produce Dirac voltage engineered graphene channels. The various surface treatments and substrate conditions produced differently doped graphene channels that were integrated on a single substrate and multiple Dirac voltages were observed by applying a single gate voltage sweep. We applied the Dirac voltage engineering techniques to graphene field-effect transistors on a single chip for the fabrication of a frequency multiplier and a logic inverter demonstrating analog and digital circuit application possibilities.

Photocurrent microscopy of contact resistance and charge carrier traps in organic field-effect transistors

NASA Astrophysics Data System (ADS)

Liewald, C.; Reiser, D.; Westermeier, C.; Nickel, B.

2016-08-01

We use a pentacene transistor with asymmetric source drain contacts to test the sensitivity of scanning photocurrent microscopy (SPCM) for contact resistance and charge traps. The drain current of the device strongly depends on the choice of the drain electrode. In one case, more than 94% of the source drain voltage is lost due to contact resistance. Here, SPCM maps show an enhanced photocurrent signal at the hole-injecting contact. For the other bias condition, i.e., for ohmic contacts, the SPCM signal peaks heterogeneously along the channel. We argue from basic transport models that bright areas in SPCM maps indicate areas of large voltage gradients or high electric field strength caused by injection barriers or traps. Thus, SPCM allows us to identify and image the dominant voltage loss mechanism in organic field-effect transistors.

Feasibility Study of Extended-Gate-Type Silicon Nanowire Field-Effect Transistors for Neural Recording

PubMed Central

Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey

2017-01-01

In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development. PMID:28350370

Feasibility Study of Extended-Gate-Type Silicon Nanowire Field-Effect Transistors for Neural Recording.

PubMed

Kang, Hongki; Kim, Jee-Yeon; Choi, Yang-Kyu; Nam, Yoonkey

2017-03-28

In this research, a high performance silicon nanowire field-effect transistor (transconductance as high as 34 µS and sensitivity as 84 nS/mV) is extensively studied and directly compared with planar passive microelectrode arrays for neural recording application. Electrical and electrochemical characteristics are carefully characterized in a very well-controlled manner. We especially focused on the signal amplification capability and intrinsic noise of the transistors. A neural recording system using both silicon nanowire field-effect transistor-based active-type microelectrode array and platinum black microelectrode-based passive-type microelectrode array are implemented and compared. An artificial neural spike signal is supplied as input to both arrays through a buffer solution and recorded simultaneously. Recorded signal intensity by the silicon nanowire transistor was precisely determined by an electrical characteristic of the transistor, transconductance. Signal-to-noise ratio was found to be strongly dependent upon the intrinsic 1/f noise of the silicon nanowire transistor. We found how signal strength is determined and how intrinsic noise of the transistor determines signal-to-noise ratio of the recorded neural signals. This study provides in-depth understanding of the overall neural recording mechanism using silicon nanowire transistors and solid design guideline for further improvement and development.

Charge injection engineering of ambipolar field-effect transistors for high-performance organic complementary circuits.

PubMed

Baeg, Kang-Jun; Kim, Juhwan; Khim, Dongyoon; Caironi, Mario; Kim, Dong-Yu; You, In-Kyu; Quinn, Jordan R; Facchetti, Antonio; Noh, Yong-Young

2011-08-01

Ambipolar π-conjugated polymers may provide inexpensive large-area manufacturing of complementary integrated circuits (CICs) without requiring micro-patterning of the individual p- and n-channel semiconductors. However, current-generation ambipolar semiconductor-based CICs suffer from higher static power consumption, low operation frequencies, and degraded noise margins compared to complementary logics based on unipolar p- and n-channel organic field-effect transistors (OFETs). Here, we demonstrate a simple methodology to control charge injection and transport in ambipolar OFETs via engineering of the electrical contacts. Solution-processed caesium (Cs) salts, as electron-injection and hole-blocking layers at the interface between semiconductors and charge injection electrodes, significantly decrease the gold (Au) work function (∼4.1 eV) compared to that of a pristine Au electrode (∼4.7 eV). By controlling the electrode surface chemistry, excellent p-channel (hole mobility ∼0.1-0.6 cm(2)/(Vs)) and n-channel (electron mobility ∼0.1-0.3 cm(2)/(Vs)) OFET characteristics with the same semiconductor are demonstrated. Most importantly, in these OFETs the counterpart charge carrier currents are highly suppressed for depletion mode operation (I(off) < 70 nA when I(on) > 0.1-0.2 mA). Thus, high-performance, truly complementary inverters (high gain >50 and high noise margin >75% of ideal value) and ring oscillators (oscillation frequency ∼12 kHz) based on a solution-processed ambipolar polymer are demonstrated.

Modeling of short channel MOS transistors

NASA Technical Reports Server (NTRS)

Lin, H. C.; Kokalis, D. P.; Bandy, W. R.

1976-01-01

Higher frequency response in MOS technology can be obtained by shortening the channel length. One approach for doing this involves an employment of higher resolution lithography technology. A second approach makes use of a double-diffused MOS transistor (DMOS). It is pointed out that the ordinary method of modeling the transistors used in both approaches is not accurate. An investigation is conducted of the questions which have to be considered for DMOS modeling. The modeling of a short channel MOS transistor is discussed, taking into account the derivation of the threshold voltage equation. Excellent agreement between theoretical and experimental data shows the accuracy of the described modeling approach.

Vacuum-processed polyethylene as a dielectric for low operating voltage organic field effect transistors

PubMed Central

Kanbur, Yasin; Irimia-Vladu, Mihai; Głowacki, Eric D.; Voss, Gundula; Baumgartner, Melanie; Schwabegger, Günther; Leonat, Lucia; Ullah, Mujeeb; Sarica, Hizir; Erten-Ela, Sule; Schwödiauer, Reinhard; Sitter, Helmut; Küçükyavuz, Zuhal; Bauer, Siegfried; Sariciftci, Niyazi Serdar

2012-01-01

We report on the fabrication and performance of vacuum-processed organic field effect transistors utilizing evaporated low-density polyethylene (LD-PE) as a dielectric layer. With C60 as the organic semiconductor, we demonstrate low operating voltage transistors with field effect mobilities in excess of 4 cm2/Vs. Devices with pentacene showed a mobility of 0.16 cm2/Vs. Devices using tyrian Purple as semiconductor show low-voltage ambipolar operation with equal electron and hole mobilities of ∼0.3 cm2/Vs. These devices demonstrate low hysteresis and operational stability over at least several months. Grazing-angle infrared spectroscopy of evaporated thin films shows that the structure of the polyethylene is similar to solution-cast films. We report also on the morphological and dielectric properties of these films. Our experiments demonstrate that polyethylene is a stable dielectric supporting both hole and electron channels. PMID:23483783

High-performance air-stable n-channel organic thin film transistors based on halogenated perylene bisimide semiconductors.

PubMed

Schmidt, Rüdiger; Oh, Joon Hak; Sun, Ya-Sen; Deppisch, Manuela; Krause, Ana-Maria; Radacki, Krzysztof; Braunschweig, Holger; Könemann, Martin; Erk, Peter; Bao, Zhenan; Würthner, Frank

2009-05-06

The syntheses and comprehensive characterization of 14 organic semiconductors based on perylene bisimide (PBI) dyes that are equipped with up to four halogen substituents in the bay area of the perylene core and five different highly fluorinated imide substituents are described. The influence of the substituents on the LUMO level and the solid state packing of PBIs was examined by cyclic voltammetry and single crystal structure analyses of seven PBI derivatives, respectively. Top-contact/bottom-gate organic thin film transistor (OTFT) devices were constructed by vacuum deposition of these PBIs on SiO(2) gate dielectrics that had been pretreated with n-octadecyl triethoxysilane in vapor phase (OTS-V) or solution phase (OTS-S). The electrical characterization of all devices was accomplished in a nitrogen atmosphere as well as in air, and the structural features of thin films were explored by grazing incidence X-ray diffraction (GIXD) and atomic force microscopy (AFM). Several of those PBIs that bear only hydrogen or up to two fluorine substitutents at the concomitantly flat PBI core afforded excellent n-channel transistors, in particular, on OTS-S substrate and even in air (mu > 0.5 cm(2) V(-1) s(-1); I(on)/I(off) > 10(6)). The best OTFTs were obtained for 2,2,3,3,4,4,4-heptafluorobutyl-substituted PBI 1a ("PTCDI-C4F7") on OTS-S with n-channel field effect mobilities consistently >1 cm(2) V(-1) s(-1) and on-to-off current rations of 10(6) in a nitrogen atmosphere and in air. For distorted core-tetrahalogenated (fluorine, chlorine, or bromine) PBIs, less advantageous solid state packing properties were found and high performance OTFTs were obtained from only one tetrachlorinated derivative (2d on OTS-S). The excellent on-to-off current modulation combined with high mobility in air makes these PBIs suitable for a wide range of practical applications.

GaN nanowire arrays with nonpolar sidewalls for vertically integrated field-effect transistors

NASA Astrophysics Data System (ADS)

Yu, Feng; Yao, Shengbo; Römer, Friedhard; Witzigmann, Bernd; Schimpke, Tilman; Strassburg, Martin; Bakin, Andrey; Schumacher, Hans Werner; Peiner, Erwin; Suryo Wasisto, Hutomo; Waag, Andreas

2017-03-01

Vertically aligned gallium nitride (GaN) nanowire (NW) arrays have attracted a lot of attention because of their potential for novel devices in the fields of optoelectronics and nanoelectronics. In this work, GaN NW arrays have been designed and fabricated by combining suitable nanomachining processes including dry and wet etching. After inductively coupled plasma dry reactive ion etching, the GaN NWs are subsequently treated in wet chemical etching using AZ400K developer (i.e., with an activation energy of 0.69 ± 0.02 eV and a Cr mask) to form hexagonal and smooth a-plane sidewalls. Etching experiments using potassium hydroxide (KOH) water solution reveal that the sidewall orientation preference depends on etchant concentration. A model concerning surface bonding configuration on crystallography facets has been proposed to understand the anisotropic wet etching mechanism. Finally, NW array-based vertical field-effect transistors with wrap-gated structure have been fabricated. A device composed of 99 NWs exhibits enhancement mode operation with a threshold voltage of 1.5 V, a superior electrostatic control, and a high current output of >10 mA, which prevail potential applications in next-generation power switches and high-temperature digital circuits.

III-V heterostructure tunnel field-effect transistor.

PubMed

Convertino, C; Zota, C B; Schmid, H; Ionescu, A M; Moselund, K E

2018-07-04

The tunnel field-effect transistor (TFET) is regarded as one of the most promising solid-state switches to overcome the power dissipation challenge in ultra-low power integrated circuits. TFETs take advantage of quantum mechanical tunneling hence exploit a different current control mechanism compared to standard MOSFETs. In this review, we describe state-of-the-art development of TFET both in terms of performances and of materials integration and we identify the main remaining technological challenges such as heterojunction defects and oxide/channel interface traps causing trap-assisted-tunneling (TAT). Mesa-structures, planar as well as vertical geometries are examined. Conductance slope analysis on InAs/GaSb nanowire tunnel diodes are reported, these two-terminal measurements can be relevant to investigate the tunneling behavior. A special focus is dedicated to III-V heterostructure TFET, as different groups have recently shown encouraging results achieving the predicted sub-thermionic low-voltage operation.

III–V heterostructure tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Convertino, C.; Zota, C. B.; Schmid, H.; Ionescu, A. M.; Moselund, K. E.

2018-07-01

The tunnel field-effect transistor (TFET) is regarded as one of the most promising solid-state switches to overcome the power dissipation challenge in ultra-low power integrated circuits. TFETs take advantage of quantum mechanical tunneling hence exploit a different current control mechanism compared to standard MOSFETs. In this review, we describe state-of-the-art development of TFET both in terms of performances and of materials integration and we identify the main remaining technological challenges such as heterojunction defects and oxide/channel interface traps causing trap-assisted-tunneling (TAT). Mesa-structures, planar as well as vertical geometries are examined. Conductance slope analysis on InAs/GaSb nanowire tunnel diodes are reported, these two-terminal measurements can be relevant to investigate the tunneling behavior. A special focus is dedicated to III–V heterostructure TFET, as different groups have recently shown encouraging results achieving the predicted sub-thermionic low-voltage operation.

Thin-film transistors with a graphene oxide nanocomposite channel.

PubMed

Jilani, S Mahaboob; Gamot, Tanesh D; Banerji, P

2012-12-04

Graphene oxide (GO) and graphene oxide-zinc oxide nanocomposites (GO-ZnO) were used as channel materials on SiO(2)/Si to fabricate thin-film transistors (TFT) with an aluminum source and drain. Pure GO-based TFT showed poor field-effect characteristics. However, GO-ZnO-nanocomposite-based TFT showed better field-effect performance because of the anchoring of ZnO nanostructures in the GO matrix, which causes a partial reduction in GO as is found from X-ray photoelectron spectroscopic data. The field-effect mobility of charge carriers at a drain voltage of 1 V was found to be 1.94 cm(2)/(V s). The transport of charge carriers in GO-ZnO was explained by a fluctuation-induced tunneling mechanism.

A multi-agent quantum Monte Carlo model for charge transport: Application to organic field-effect transistors

NASA Astrophysics Data System (ADS)

Bauer, Thilo; Jäger, Christof M.; Jordan, Meredith J. T.; Clark, Timothy

2015-07-01

We have developed a multi-agent quantum Monte Carlo model to describe the spatial dynamics of multiple majority charge carriers during conduction of electric current in the channel of organic field-effect transistors. The charge carriers are treated by a neglect of diatomic differential overlap Hamiltonian using a lattice of hydrogen-like basis functions. The local ionization energy and local electron affinity defined previously map the bulk structure of the transistor channel to external potentials for the simulations of electron- and hole-conduction, respectively. The model is designed without a specific charge-transport mechanism like hopping- or band-transport in mind and does not arbitrarily localize charge. An electrode model allows dynamic injection and depletion of charge carriers according to source-drain voltage. The field-effect is modeled by using the source-gate voltage in a Metropolis-like acceptance criterion. Although the current cannot be calculated because the simulations have no time axis, using the number of Monte Carlo moves as pseudo-time gives results that resemble experimental I/V curves.

A multi-agent quantum Monte Carlo model for charge transport: Application to organic field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bauer, Thilo; Jäger, Christof M.; Jordan, Meredith J. T.

2015-07-28

We have developed a multi-agent quantum Monte Carlo model to describe the spatial dynamics of multiple majority charge carriers during conduction of electric current in the channel of organic field-effect transistors. The charge carriers are treated by a neglect of diatomic differential overlap Hamiltonian using a lattice of hydrogen-like basis functions. The local ionization energy and local electron affinity defined previously map the bulk structure of the transistor channel to external potentials for the simulations of electron- and hole-conduction, respectively. The model is designed without a specific charge-transport mechanism like hopping- or band-transport in mind and does not arbitrarily localizemore » charge. An electrode model allows dynamic injection and depletion of charge carriers according to source-drain voltage. The field-effect is modeled by using the source-gate voltage in a Metropolis-like acceptance criterion. Although the current cannot be calculated because the simulations have no time axis, using the number of Monte Carlo moves as pseudo-time gives results that resemble experimental I/V curves.« less

Leakage and field emission in side-gate graphene field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Di Bartolomeo, A., E-mail: dibant@sa.infn.it; Iemmo, L.; Romeo, F.

We fabricate planar graphene field-effect transistors with self-aligned side-gate at 100 nm from the 500 nm wide graphene conductive channel, using a single lithographic step. We demonstrate side-gating below 1 V with conductance modulation of 35% and transconductance up to 0.5 mS/mm at 10 mV drain bias. We measure the planar leakage along the SiO{sub 2}/vacuum gate dielectric over a wide voltage range, reporting rapidly growing current above 15 V. We unveil the microscopic mechanisms driving the leakage, as Frenkel-Poole transport through SiO{sub 2} up to the activation of Fowler-Nordheim tunneling in vacuum, which becomes dominant at higher voltages. We report a field-emission current densitymore » as high as 1 μA/μm between graphene flakes. These findings are important for the miniaturization of atomically thin devices.« less

Thermal Analysis of AlGaN/GaN High-Electron-Mobility Transistor and Its RF Power Efficiency Optimization with Source-Bridged Field-Plate Structure.

PubMed

Kwak, Hyeon-Tak; Chang, Seung-Bo; Jung, Hyun-Gu; Kim, Hyun-Seok

2018-09-01

In this study, we consider the relationship between the temperature in a two-dimensional electron gas (2-DEG) channel layer and the RF characteristics of an AlGaN/GaN high-electron-mobility transistor by changing the geometrical structure of the field-plate. The final goal is to achieve a high power efficiency by decreasing the channel layer temperature. First, simulations were performed to compare and contrast the experimental data of a conventional T-gate head structure. Then, a source-bridged field-plate (SBFP) structure was used to obtain the lower junction temperature in the 2-DEG channel layer. The peak electric field intensity was reduced, and a decrease in channel temperature resulted in an increase in electron mobility. Furthermore, the gate-to-source capacitance was increased by the SBFP structure. However, under the large current flow condition, the SBFP structure had a lower maximum temperature than the basic T-gate head structure, which improved the device electron mobility. Eventually, an optimum position of the SBFP was used, which led to higher frequency responses and improved the breakdown voltages. Hence, the optimized SBFP structure can be a promising candidate for high-power RF devices.

Spatial profile of charge storage in organic field-effect transistor nonvolatile memory using polymer electret

NASA Astrophysics Data System (ADS)

She, Xiao-Jian; Liu, Jie; Zhang, Jing-Yu; Gao, Xu; Wang, Sui-Dong

2013-09-01

Spatial profile of the charge storage in the pentacene-based field-effect transistor nonvolatile memories using poly(2-vinyl naphthalene) electret is probed. The electron trapping into the electret after programming can be space dependent with more electron storage in the region closer to the contacts, and reducing the channel length is an effective approach to improve the memory performance. The deficient electron supply in pentacene is proposed to be responsible for the inhomogeneous electron storage in the electret. The hole trapping into the electret after erasing is spatially homogeneous, arising from the sufficient hole accumulation in the pentacene channel.

High Mobility SiGe/Si n-Type Structures and Field Effect Transistors on Sapphire Substrates

NASA Technical Reports Server (NTRS)

Alterovitz, Samuel A.; Ponchak, George E.; Mueller, Carl H.; Croke, Edward T.

2004-01-01

SiGe/Si n-type modulation doped field effect transistors (MODFETs) fabricated on sapphire substrates have been characterized at microwave frequencies for the first time. The highest measured room temperature electron mobility is 1380 sq cm/V-sec at a carrier density of 1.8 x 10(exp 12)/sq cm for a MODFET structure, and 900 sq cm/V-sec at a carrier density of 1.3 x 10/sq cm for a phosphorus ion implanted sample. A two finger, 2 x 200 micron gate n-MODFET has a peak transconductance of 37 mS/mm at a drain to source voltage of 2.5 V and a transducer gain of 6.4 dB at 1 GHz.

Enhanced Performance of Field-Effect Transistors Based on Black Phosphorus Channels Reduced by Galvanic Corrosion of Al Overlayers.

PubMed

Lee, Sangik; Yoon, Chansoo; Lee, Ji Hye; Kim, Yeon Soo; Lee, Mi Jung; Kim, Wondong; Baik, Jaeyoon; Jia, Quanxi; Park, Bae Ho

2018-06-06

Two-dimensional (2D)-layered semiconducting materials with considerable band gaps are emerging as a new class of materials applicable to next-generation devices. Particularly, black phosphorus (BP) is considered to be very promising for next-generation 2D electrical and optical devices because of its high carrier mobility of 200-1000 cm 2 V -1 s -1 and large on/off ratio of 10 4 to 10 5 in field-effect transistors (FETs). However, its environmental instability in air requires fabrication processes in a glovebox filled with nitrogen or argon gas followed by encapsulation, passivation, and chemical functionalization of BP. Here, we report a new method for reduction of BP-channel devices fabricated without the use of a glovebox by galvanic corrosion of an Al overlayer. The reduction of BP induced by an anodic oxidation of Al overlayer is demonstrated through surface characterization of BP using atomic force microscopy, Raman spectroscopy, and X-ray photoemission spectroscopy along with electrical measurement of a BP-channel FET. After the deposition of an Al overlayer, the FET device shows a significantly enhanced performance, including restoration of ambipolar transport, high carrier mobility of 220 cm 2 V -1 s -1 , low subthreshold swing of 0.73 V/decade, and low interface trap density of 7.8 × 10 11 cm -2 eV -1 . These improvements are attributed to both the reduction of the BP channel and the formation of an Al 2 O 3 interfacial layer resulting in a high- k screening effect. Moreover, ambipolar behavior of our BP-channel FET device combined with charge-trap behavior can be utilized for implementing reconfigurable memory and neuromorphic computing applications. Our study offers a simple device fabrication process for BP-channel FETs with high performance using galvanic oxidation of Al overlayers.

Slowing DNA Translocation in a Nanofluidic Field-Effect Transistor.

PubMed

Liu, Yifan; Yobas, Levent

2016-04-26

Here, we present an experimental demonstration of slowing DNA translocation across a nanochannel by modulating the channel surface charge through an externally applied gate bias. The experiments were performed on a nanofluidic field-effect transistor, which is a monolithic integrated platform featuring a 50 nm-diameter in-plane alumina nanocapillary whose entire length is surrounded by a gate electrode. The field-effect transistor behavior was validated on the gating of ionic conductance and protein transport. The gating of DNA translocation was subsequently studied by measuring discrete current dips associated with single λ-DNA translocation events under a source-to-drain bias of 1 V. The translocation speeds under various gate bias conditions were extracted by fitting event histograms of the measured translocation time to the first passage time distributions obtained from a simple 1D biased diffusion model. A positive gate bias was observed to slow the translocation of single λ-DNA chains markedly; the translocation speed was reduced by an order of magnitude from 18.4 mm/s obtained under a floating gate down to 1.33 mm/s under a positive gate bias of 9 V. Therefore, a dynamic and flexible regulation of the DNA translocation speed, which is vital for single-molecule sequencing, can be achieved on this device by simply tuning the gate bias. The device is realized in a conventional semiconductor microfabrication process without the requirement of advanced lithography, and can be potentially further developed into a compact electronic single-molecule sequencer.

Polycrystalline silicon ion sensitive field effect transistors

NASA Astrophysics Data System (ADS)

Yan, F.; Estrela, P.; Mo, Y.; Migliorato, P.; Maeda, H.; Inoue, S.; Shimoda, T.

2005-01-01

We report the operation of polycrystalline silicon ion sensitive field effect transistors. These devices can be fabricated on inexpensive disposable substrates such as glass or plastics and are, therefore, promising candidates for low cost single-use intelligent multisensors. In this work we have developed an extended gate structure with a Si3N4 sensing layer. Nearly ideal pH sensitivity (54mV /pH) and stable operation have been achieved. Temperature effects have been characterized. A penicillin sensor has been fabricated by functionalizing the sensing area with penicillinase. The sensitivity to penicillin G is about 10mV/mM, in solutions with concentration lower than the saturation value, which is about 7 mM.

Analysis of electric field distribution in GaAs metal-semiconductor field effect transistor with a field-modulating plate

NASA Astrophysics Data System (ADS)

Hori, Yasuko; Kuzuhara, Masaaki; Ando, Yuji; Mizuta, Masashi

2000-04-01

Electric field distribution in the channel of a field effect transistor (FET) with a field-modulating plate (FP) has been theoretically investigated using a two-dimensional ensemble Monte Carlo simulation. This analysis revealed that the introduction of FP is effective in canceling the influence of surface traps under forward bias conditions and in reducing the electric field intensity at the drain side of the gate edge under pinch-off bias conditions. This study also found that a partial overlap of the high-field region under the gate and that at the FP electrode is important for reducing the electric field intensity. The optimized metal-semiconductor FET with FP (FPFET) (LGF˜0.2 μm) exhibited a much lower peak electric field intensity than a conventional metal-semiconductor FET. Based on these numerically calculated results, we have proposed a design procedure to optimize the power FPFET structure with extremely high breakdown voltages while maintaining reasonable gain performance.

Undoped polythiophene field-effect transistors with mobility of 1 cm2 V-1 s-1

NASA Astrophysics Data System (ADS)

Hamadani, B. H.; Gundlach, D. J.; McCulloch, I.; Heeney, M.

2007-12-01

We report on charge transport in organic field-effect transistors based on poly(2,5-bis(3-tetradecylthiophen-2-yl)thieno[3,2-b]thiophene) as the active polymer layer with saturation field-effect mobilities as large as 1cm2V-1s-1. This is achieved by employing Pt instead of the commonly used Au as the contacting electrode and allows for a significant reduction in the metal/polymer contact resistance. The mobility increases as a function of decreasing channel length, consistent with a Poole-Frenkel model of charge transport, and reaches record mobilities of 1cm2V-1s-1 or more at channel lengths on the order of few microns in an undoped solution-processed polymer cast on an oxide gate dielectric.

Current-voltage characteristics in organic field-effect transistors. Effect of interface dipoles

NASA Astrophysics Data System (ADS)

Sworakowski, Juliusz

2015-07-01

The role of polar molecules present at dielectric/semiconductor interfaces of organic field-effect transistors (OFETs) has been assessed employing the electrostatic model put forward in a recently published paper (Sworakowski et al., 2014). The interface dipoles create dipolar traps in the surface region of the semiconductor, their depths decreasing with the distance from the interface. This feature results in appearance of mobility gradients in the direction perpendicular to the dielectric/semiconductor interface, manifesting themselves in modification of the shapes of current-voltage characteristics. The effect may account for differences in carrier mobilities determined from the same experimental data using methods scanning different ranges of channel thicknesses (e.g., transconductances vs. transfer characteristics), differences between turn-on voltages and threshold voltages, and gate voltage dependence of mobility.

Deformable Organic Nanowire Field-Effect Transistors.

PubMed

Lee, Yeongjun; Oh, Jin Young; Kim, Taeho Roy; Gu, Xiaodan; Kim, Yeongin; Wang, Ging-Ji Nathan; Wu, Hung-Chin; Pfattner, Raphael; To, John W F; Katsumata, Toru; Son, Donghee; Kang, Jiheong; Matthews, James R; Niu, Weijun; He, Mingqian; Sinclair, Robert; Cui, Yi; Tok, Jeffery B-H; Lee, Tae-Woo; Bao, Zhenan

2018-02-01

Deformable electronic devices that are impervious to mechanical influence when mounted on surfaces of dynamically changing soft matters have great potential for next-generation implantable bioelectronic devices. Here, deformable field-effect transistors (FETs) composed of single organic nanowires (NWs) as the semiconductor are presented. The NWs are composed of fused thiophene diketopyrrolopyrrole based polymer semiconductor and high-molecular-weight polyethylene oxide as both the molecular binder and deformability enhancer. The obtained transistors show high field-effect mobility >8 cm 2 V -1 s -1 with poly(vinylidenefluoride-co-trifluoroethylene) polymer dielectric and can easily be deformed by applied strains (both 100% tensile and compressive strains). The electrical reliability and mechanical durability of the NWs can be significantly enhanced by forming serpentine-like structures of the NWs. Remarkably, the fully deformable NW FETs withstand 3D volume changes (>1700% and reverting back to original state) of a rubber balloon with constant current output, on the surface of which it is attached. The deformable transistors can robustly operate without noticeable degradation on a mechanically dynamic soft matter surface, e.g., a pulsating balloon (pulse rate: 40 min -1 (0.67 Hz) and 40% volume expansion) that mimics a beating heart, which underscores its potential for future biomedical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Multiscale modeling and computation of nano-electronic transistors and transmembrane proton channels

NASA Astrophysics Data System (ADS)

Chen, Duan

The miniaturization of nano-scale electronic transistors, such as metal oxide semiconductor field effect transistors (MOSFETs), has given rise to a pressing demand in the new theoretical understanding and practical tactic for dealing with quantum mechanical effects in integrated circuits. In biology, proton dynamics and transport across membrane proteins are of paramount importance to the normal function of living cells. Similar physical characteristics are behind the two subjects, and model simulations share common mathematical interests/challenges. In this thesis work, multiscale and multiphysical models are proposed to study the mechanisms of nanotransistors and proton transport in transmembrane at the atomic level. For nano-electronic transistors, we introduce a unified two-scale energy functional to describe the electrons and the continuum electrostatic potential. This framework enables us to put microscopic and macroscopic descriptions on an equal footing at nano-scale. Additionally, this model includes layered structures and random doping effect of nano-transistors. For transmembrane proton channels, we describe proton dynamics quantum mechanically via a density functional approach while implicitly treat numerous solvent molecules as a dielectric continuum. The densities of all other ions in the solvent are assumed to obey the Boltzmann distribution. The impact of protein molecular structure and its charge polarization on the proton transport is considered in atomic details. We formulate a total free energy functional to include kinetic and potential energies of protons, as well as electrostatic energy of all other ions on an equal footing. For both nano-transistors and proton channels systems, the variational principle is employed to derive nonlinear governing equations. The Poisson-Kohn-Sham equations are derived for nano-transistors while the generalized Poisson-Boltzmann equation and Kohn-Sham equation are obtained for proton channels. Related numerical

A study of effects of electrode contacts on performance of organic-based light-emitting field-effect transistors

NASA Astrophysics Data System (ADS)

Kim, Dae-Kyu; Choi, Jong-Ho

2018-02-01

Herein is presented a comparative performance analysis of heterojunction organic-based light-emitting field-effect transistors (OLEFETs) with symmetric (Au only) and asymmetric (Au and LiF/Al) electrode contacts. The devices had a top source-drain contact with long-channel geometry and were produced by sequentially depositing p-type pentacene and n-type N,N‧-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13) using a neutral cluster beam deposition apparatus. The spectroscopic, structural and morphological properties of the organic thin films were examined using photoluminescence (PL) spectroscopy, X-ray diffraction (XRD) method, laser scanning confocal and atomic force microscopy (LSCM, AFM). Based upon the growth of high-quality, well-packed crystalline thin films, the devices demonstrated ambipolar field-effect characteristics, stress-free operational stability, and light emission under ambient conditions. Various device parameters were derived from the fits of the observed characteristics. The hole mobilities were nearly equal irrespective of the electrode contacts, whereas the electron mobilities of the transistors with LiF/Al drain electrodes were higher due to the low injection barrier. For the OLEFETs with symmetric electrodes, electroluminescence (EL) occurred only in the vicinity of the hole-injecting electrode, whereas for the OLEFETs with asymmetric electrodes, the emission occurred in the vicinity of both hole- and electron-injecting electrodes. By tuning the carrier injection and transport through high- and low-work function metals, the hole-electron recombination sites could be controlled. The operating conduction and light emission mechanism are discussed with the aid of EL images obtained using a charge-coupled device (CCD) camera.

Photovoltage field-effect transistors

NASA Astrophysics Data System (ADS)

Adinolfi, Valerio; Sargent, Edward H.

2017-02-01

The detection of infrared radiation enables night vision, health monitoring, optical communications and three-dimensional object recognition. Silicon is widely used in modern electronics, but its electronic bandgap prevents the detection of light at wavelengths longer than about 1,100 nanometres. It is therefore of interest to extend the performance of silicon photodetectors into the infrared spectrum, beyond the bandgap of silicon. Here we demonstrate a photovoltage field-effect transistor that uses silicon for charge transport, but is also sensitive to infrared light owing to the use of a quantum dot light absorber. The photovoltage generated at the interface between the silicon and the quantum dot, combined with the high transconductance provided by the silicon device, leads to high gain (more than 104 electrons per photon at 1,500 nanometres), fast time response (less than 10 microseconds) and a widely tunable spectral response. Our photovoltage field-effect transistor has a responsivity that is five orders of magnitude higher at a wavelength of 1,500 nanometres than that of previous infrared-sensitized silicon detectors. The sensitization is achieved using a room-temperature solution process and does not rely on traditional high-temperature epitaxial growth of semiconductors (such as is used for germanium and III-V semiconductors). Our results show that colloidal quantum dots can be used as an efficient platform for silicon-based infrared detection, competitive with state-of-the-art epitaxial semiconductors.

Contact Resistance and Channel Conductance of Graphene Field-Effect Transistors under Low-Energy Electron Irradiation

PubMed Central

Giubileo, Filippo; Di Bartolomeo, Antonio; Martucciello, Nadia; Romeo, Francesco; Iemmo, Laura; Romano, Paola; Passacantando, Maurizio

2016-01-01

We studied the effects of low-energy electron beam irradiation up to 10 keV on graphene-based field effect transistors. We fabricated metallic bilayer electrodes to contact mono- and bi-layer graphene flakes on SiO2, obtaining specific contact resistivity ρc≈19 kΩ·µm2 and carrier mobility as high as 4000 cm2·V−1·s−1. By using a highly doped p-Si/SiO2 substrate as the back gate, we analyzed the transport properties of the device and the dependence on the pressure and on the electron bombardment. We demonstrate herein that low energy irradiation is detrimental to the transistor current capability, resulting in an increase in contact resistance and a reduction in carrier mobility, even at electron doses as low as 30 e−/nm2. We also show that irradiated devices recover their pristine state after few repeated electrical measurements. PMID:28335335

Doped bottom-contact organic field-effect transistors

NASA Astrophysics Data System (ADS)

Liu, Shiyi; Billig, Paul; Al-Shadeedi, Akram; Kaphle, Vikash; Lüssem, Björn

2018-07-01

The influence of doping on doped bottom-gate bottom-contact organic field-effect transistors (OFETs) is discussed. It is shown that the inclusion of a doped layer at the dielectric/organic semiconductor layer leads to a significant reduction in the contact resistances and a fine control of the threshold voltage. Through varying the thickness of the doped layer, a linear shift of threshold voltage V T from ‑3.1 to ‑0.22 V is observed for increasing thickness of doped layer. Meanwhile, the contact resistance at the source and drain electrode is reduced from 138.8 MΩ at V GS = ‑10 V for 3 nm to 0.3 MΩ for 7 nm thick doped layers. Furthermore, an increase of charge mobility is observed for increasing thickness of doped layer. Overall, it is shown that doping can minimize injection barriers in bottom-contact OFETs with channel lengths in the micro-meter regime, which has the potential to increase the performance of this technology further.

High-performance silicon nanowire field-effect transistor with silicided contacts

NASA Astrophysics Data System (ADS)

Rosaz, G.; Salem, B.; Pauc, N.; Gentile, P.; Potié, A.; Solanki, A.; Baron, T.

2011-08-01

Undoped silicon nanowire (Si NW) field-effect transistors (FETs) with a back-gate configuration have been fabricated and characterized. A thick (200 nm) Si3N4 layer was used as a gate insulator and a p++ silicon substrate as a back gate. Si NWs have been grown by the chemical vapour deposition method using the vapour-liquid-solid mechanism and gold as a catalyst. Metallic contacts have been deposited using Ni/Al (80 nm/120 nm) and characterized before and after an optimized annealing step at 400 °C, which resulted in a great decrease in the contact resistance due to the newly formed nickel silicide/Si interface at source and drain. These optimized devices show a good hole mobility of around 200 cm2 V-1 s-1, in the same range as the bulk material, with a good ON current density of about 28 kA cm-2. Finally, hysteretic behaviour of NW channel conductance is discussed to explain the importance of NW surface passivation.

Local sensor based on nanowire field effect transistor from inhomogeneously doped silicon on insulator

NASA Astrophysics Data System (ADS)

Presnov, Denis E.; Bozhev, Ivan V.; Miakonkikh, Andrew V.; Simakin, Sergey G.; Trifonov, Artem S.; Krupenin, Vladimir A.

2018-02-01

We present the original method for fabricating a sensitive field/charge sensor based on field effect transistor (FET) with a nanowire channel that uses CMOS-compatible processes only. A FET with a kink-like silicon nanowire channel was fabricated from the inhomogeneously doped silicon on insulator wafer very close (˜100 nm) to the extremely sharp corner of a silicon chip forming local probe. The single e-beam lithographic process with a shadow deposition technique, followed by separate two reactive ion etching processes, was used to define the narrow semiconductor nanowire channel. The sensors charge sensitivity was evaluated to be in the range of 0.1-0.2 e /√{Hz } from the analysis of their transport and noise characteristics. The proposed method provides a good opportunity for the relatively simple manufacture of a local field sensor for measuring the electrical field distribution, potential profiles, and charge dynamics for a wide range of mesoscopic objects. Diagnostic systems and devices based on such sensors can be used in various fields of physics, chemistry, material science, biology, electronics, medicine, etc.

Surface Modulation of Graphene Field Effect Transistors on Periodic Trench Structure.

PubMed

Jin, Jun Eon; Choi, Jun Hee; Yun, Hoyeol; Jang, Ho-Kyun; Lee, Byung Chul; Choi, Ajeong; Joo, Min-Kyu; Dettlaff-Weglikowska, Urszula; Roth, Siegmar; Lee, Sang Wook; Lee, Jae Woo; Kim, Gyu Tae

2016-07-20

In this work, graphene field effect transistors (FETs) were fabricated on a trench structure made by carbonized poly(methylmethacrylate) to modify the graphene surface. The trench-structured devices showed different characteristics depending on the channel orientation and the pitch size of the trenches as well as channel area in the FETs. Periodic corrugations and barriers of suspended graphene on the trench structure were measured by atomic force microscopy and electrostatic force microscopy. Regular barriers of 160 mV were observed for the trench structure with graphene. To confirm the transfer mechanism in the FETs depending on the channel orientation, the ratio of experimental mobility (3.6-3.74) was extracted from the current-voltage characteristics using equivalent circuit simulation. It is shown that the number of barriers increases as the pitch size decreases because the number of corrugations increases from different trench pitches. The noise for the 140 nm pitch trench is 1 order of magnitude higher than that for the 200 nm pitch trench.

Nonvolatile MoS2 field effect transistors directly gated by single crystalline epitaxial ferroelectric

NASA Astrophysics Data System (ADS)

Lu, Zhongyuan; Serrao, Claudy; Khan, Asif Islam; You, Long; Wong, Justin C.; Ye, Yu; Zhu, Hanyu; Zhang, Xiang; Salahuddin, Sayeef

2017-07-01

We demonstrate non-volatile, n-type, back-gated, MoS2 transistors, placed directly on an epitaxial grown, single crystalline, PbZr0.2Ti0.8O3 (PZT) ferroelectric. The transistors show decent ON current (19 μA/μm), high on-off ratio (107), and a subthreshold swing of (SS ˜ 92 mV/dec) with a 100 nm thick PZT layer as the back gate oxide. Importantly, the ferroelectric polarization can directly control the channel charge, showing a clear anti-clockwise hysteresis. We have self-consistently confirmed the switching of the ferroelectric and corresponding change in channel current from a direct time-dependent measurement. Our results demonstrate that it is possible to obtain transistor operation directly on polar surfaces, and therefore, it should be possible to integrate 2D electronics with single crystalline functional oxides.

Electrochemical doping for lowering contact barriers in organic field effect transistors

PubMed Central

Schaur, Stefan; Stadler, Philipp; Meana-Esteban, Beatriz; Neugebauer, Helmut; Serdar Sariciftci, N.

2012-01-01

By electrochemically p-doping pentacene in the vicinity of the source-drain electrodes in organic field effect transistors the injection barrier for holes is decreased. The focus of this work is put on the influence of the p-doping process on the transistor performance. Cyclic voltammetry performed on a pentacene based transistor exhibits a reversible p-doping response. This doped state is evoked at the transistor injection electrodes. An improvement is observed when comparing transistor characteristics before and after the doping process apparent by an improved transistor on-current. This effect is reflected in the analysis of the contact resistances of the devices. PMID:23483101

Doping Nitrogen in InGaZnO Thin Film Transistor with Double Layer Channel Structure.

PubMed

Chang, Sheng-Po; Shan, Deng

2018-04-01

This paper presents the electrical characteristics of doping nitrogen in an amorphous InGaZnO thin film transistor. The IGZO:N film, which acted as a channel layer, was deposited using RF sputtering with a nitrogen and argon gas mixture at room temperature. The optimized parameters of the IGZO:N/IGZO TFT are as follows: threshold voltage is 0.5 V, field effect mobility is 14.34 cm2V-1S-1. The on/off current ratio is 106 and subthreshold swing is 1.48 V/decade. The positive gate bias stress stability of InGaZnO doping with nitrogen shows improvement compared to doping with oxygen.

Carrier polarity engineering in carbon nanotube field-effect transistors by induced charges in polymer insulator

NASA Astrophysics Data System (ADS)

Aikawa, Shinya; Kim, Sungjin; Thurakitseree, Theerapol; Einarsson, Erik; Inoue, Taiki; Chiashi, Shohei; Tsukagoshi, Kazuhito; Maruyama, Shigeo

2018-01-01

We present that the electrical conduction type in carbon nanotube field-effect transistors (CNT-FETs) can be converted by induced charges in a polyvinyl alcohol (PVA) insulator. When the CNT channels are covered with pure PVA, the FET characteristics clearly change from unipolar p-type to ambipolar. The addition of ammonium ions (NH4+) in the PVA leads to further conversion to unipolar n-type conduction. The capacitance - voltage characteristics indicate that a high density of positive charges is induced at the PVA/SiO2 interface and within the bulk PVA. Electrons are electrostatically accumulated in the CNT channels due to the presence of the positive charges, and thus, stable n-type conduction of PVA-coated CNT-FETs is observed, even under ambient conditions. The mechanism for conversion of the conduction type is considered to be electrostatic doping due to the large amount of positive charges in the PVA. A blue-shift of the Raman G-band peak was observed for CNTs coated with NH4+-doped PVA, which corresponds to unipolar n-type CNT-FET behavior. These results confirm that carrier polarity engineering in CNT-FETs can be achieved with a charged PVA passivation layer.

Electrical characteristics of silicon percolating nanonet-based field effect transistors in the presence of dispersion

NASA Astrophysics Data System (ADS)

Cazimajou, T.; Legallais, M.; Mouis, M.; Ternon, C.; Salem, B.; Ghibaudo, G.

2018-05-01

We studied the current-voltage characteristics of percolating networks of silicon nanowires (nanonets), operated in back-gated transistor mode, for future use as gas or biosensors. These devices featured P-type field-effect characteristics. It was found that a Lambert W function-based compact model could be used for parameter extraction of electrical parameters such as apparent low field mobility, threshold voltage and subthreshold slope ideality factor. Their variation with channel length and nanowire density was related to the change of conduction regime from direct source/drain connection by parallel nanowires to percolating channels. Experimental results could be related in part to an influence of the threshold voltage dispersion of individual nanowires.

Organic Field Effect Transistors for Large Format Electronics

DTIC Science & Technology

2003-06-19

calculated output characteristics for a p-channel substrate insulator Organic layer Source Drain Gate 6 pentacene OFET with 2µm source to drain spacing...conventional transistors. Figure 3. Calculated output characteristics of a pentacene OFET with image charge induced contact barrier...Cross section view of a part of an OFET in the vicinity of a source or drain contact. local ordering due to surface energy effects. The development of

Ferroelectric polarization induces electric double layer bistability in electrolyte-gated field-effect transistors.

PubMed

Fabiano, Simone; Crispin, Xavier; Berggren, Magnus

2014-01-08

The dense surface charges expressed by a ferroelectric polymeric thin film induce ion displacement within a polyelectrolyte layer and vice versa. This is because the density of dipoles along the surface of the ferroelectric thin film and its polarization switching time matches that of the (Helmholtz) electric double layers formed at the ferroelectric/polyelectrolyte and polyelectrolyte/semiconductor interfaces. This combination of materials allows for introducing hysteresis effects in the capacitance of an electric double layer capacitor. The latter is advantageously used to control the charge accumulation in the semiconductor channel of an organic field-effect transistor. The resulting memory transistors can be written at a gate voltage of around 7 V and read out at a drain voltage as low as 50 mV. The technological implication of this large difference between write and read-out voltages lies in the non-destructive reading of this ferroelectric memory.

GaN nanowire arrays with nonpolar sidewalls for vertically integrated field-effect transistors.

PubMed

Yu, Feng; Yao, Shengbo; Römer, Friedhard; Witzigmann, Bernd; Schimpke, Tilman; Strassburg, Martin; Bakin, Andrey; Schumacher, Hans Werner; Peiner, Erwin; Wasisto, Hutomo Suryo; Waag, Andreas

2017-03-03

Vertically aligned gallium nitride (GaN) nanowire (NW) arrays have attracted a lot of attention because of their potential for novel devices in the fields of optoelectronics and nanoelectronics. In this work, GaN NW arrays have been designed and fabricated by combining suitable nanomachining processes including dry and wet etching. After inductively coupled plasma dry reactive ion etching, the GaN NWs are subsequently treated in wet chemical etching using AZ400K developer (i.e., with an activation energy of 0.69 ± 0.02 eV and a Cr mask) to form hexagonal and smooth a-plane sidewalls. Etching experiments using potassium hydroxide (KOH) water solution reveal that the sidewall orientation preference depends on etchant concentration. A model concerning surface bonding configuration on crystallography facets has been proposed to understand the anisotropic wet etching mechanism. Finally, NW array-based vertical field-effect transistors with wrap-gated structure have been fabricated. A device composed of 99 NWs exhibits enhancement mode operation with a threshold voltage of 1.5 V, a superior electrostatic control, and a high current output of >10 mA, which prevail potential applications in next-generation power switches and high-temperature digital circuits.

Dual origin of room temperature sub-terahertz photoresponse in graphene field effect transistors

NASA Astrophysics Data System (ADS)

Bandurin, D. A.; Gayduchenko, I.; Cao, Y.; Moskotin, M.; Principi, A.; Grigorieva, I. V.; Goltsman, G.; Fedorov, G.; Svintsov, D.

2018-04-01

Graphene is considered as a promising platform for detectors of high-frequency radiation up to the terahertz (THz) range due to its superior electron mobility. Previously, it has been shown that graphene field effect transistors (FETs) exhibit room temperature broadband photoresponse to incoming THz radiation, thanks to the thermoelectric and/or plasma wave rectification. Both effects exhibit similar functional dependences on the gate voltage, and therefore, it was difficult to disentangle these contributions in previous studies. In this letter, we report on combined experimental and theoretical studies of sub-THz response in graphene field-effect transistors analyzed at different temperatures. This temperature-dependent study allowed us to reveal the role of the photo-thermoelectric effect, p-n junction rectification, and plasmonic rectification in the sub-THz photoresponse of graphene FETs.

Effect of N-substituents on redox, optical, and electronic properties of naphthalene bisimides used for field-effect transistors fabrication.

PubMed

Gawrys, Pawel; Djurado, David; Rimarcík, Ján; Kornet, Aleksandra; Boudinet, Damien; Verilhac, Jean-Marie; Lukes, Vladimír; Wielgus, Ireneusz; Zagorska, Malgorzata; Pron, Adam

2010-02-11

Three groups of naphthalene bisimides were synthesized and comparatively studied, namely, alkyl bisimides, alkylaryl ones, and novel bisimides containing the alkylthienyl moiety in the N-substituent. The experimental absorption spectra measured in CHCl(3) exhibit one intensive absorption band that is uniformly detected in the spectral range of 340 to 400 nm for all studied molecules. This band consists of three or four vibronic peaks. The introduction of an alkylthienyl group results in the appearance of an additional band (in the spectral range from 282 to 326 nm, depending on the position of the substituent) that can be ascribed to the pi-pi* transition in the thienyl chromophore. The minimal substituent effect on the lowest electronic transitions was explained using the quantum chemical calculations based on the time-dependent density functional theory. The investigation of the shapes of frontier orbitals have also shown that the oxidation of bisimides containing thiophene moiety is primary connected with the electron abstraction from the thienyl ring. To the contrary, the addition of an electron in the reduction process leads to an increase in the electron density in the central bisimide core. As shown by the electrochemical measurements, the onset of the first reduction potential (so-called "electrochemically determined LUMO level") is sensitive toward the type of the substituent being shifted from about -3.72 eV for bisimides with alkyl substituents to about -3.83 eV for alkylaryl ones and to about -3.94 eV for bisimides with thienyl groups. The presence of the thienyl ring also lowers the energy difference between the HOMO and LUMO orbitals. These experimental data can be well correlated with the DFT calculations in terms of HOMO/LUMO shapes and energies. Taking into account the low position of their LUMO level and their highly ordered supramolecular organization, the new bisimides are good candidates for the use in n-channel field effect transistors

An All-Solid-State pH Sensor Employing Fluorine-Terminated Polycrystalline Boron-Doped Diamond as a pH-Insensitive Solution-Gate Field-Effect Transistor.

PubMed

Shintani, Yukihiro; Kobayashi, Mikinori; Kawarada, Hiroshi

2017-05-05

A fluorine-terminated polycrystalline boron-doped diamond surface is successfully employed as a pH-insensitive SGFET (solution-gate field-effect transistor) for an all-solid-state pH sensor. The fluorinated polycrystalline boron-doped diamond (BDD) channel possesses a pH-insensitivity of less than 3mV/pH compared with a pH-sensitive oxygenated channel. With differential FET (field-effect transistor) sensing, a sensitivity of 27 mv/pH was obtained in the pH range of 2-10; therefore, it demonstrated excellent performance for an all-solid-state pH sensor with a pH-sensitive oxygen-terminated polycrystalline BDD SGFET and a platinum quasi-reference electrode, respectively.

Direct observation of single-charge-detection capability of nanowire field-effect transistors.

PubMed

Salfi, J; Savelyev, I G; Blumin, M; Nair, S V; Ruda, H E

2010-10-01

A single localized charge can quench the luminescence of a semiconductor nanowire, but relatively little is known about the effect of single charges on the conductance of the nanowire. In one-dimensional nanostructures embedded in a material with a low dielectric permittivity, the Coulomb interaction and excitonic binding energy are much larger than the corresponding values when embedded in a material with the same dielectric permittivity. The stronger Coulomb interaction is also predicted to limit the carrier mobility in nanowires. Here, we experimentally isolate and study the effect of individual localized electrons on carrier transport in InAs nanowire field-effect transistors, and extract the equivalent charge sensitivity. In the low carrier density regime, the electrostatic potential produced by one electron can create an insulating weak link in an otherwise conducting nanowire field-effect transistor, modulating its conductance by as much as 4,200% at 31 K. The equivalent charge sensitivity, 4 × 10(-5) e Hz(-1/2) at 25 K and 6 × 10(-5) e Hz(-1/2) at 198 K, is orders of magnitude better than conventional field-effect transistors and nanoelectromechanical systems, and is just a factor of 20-30 away from the record sensitivity for state-of-the-art single-electron transistors operating below 4 K (ref. 8). This work demonstrates the feasibility of nanowire-based single-electron memories and illustrates a physical process of potential relevance for high performance chemical sensors. The charge-state-detection capability we demonstrate also makes the nanowire field-effect transistor a promising host system for impurities (which may be introduced intentionally or unintentionally) with potentially long spin lifetimes, because such transistors offer more sensitive spin-to-charge conversion readout than schemes based on conventional field-effect transistors.

Charge injection in solution-processed organic field-effect transistors: physics, models and characterization methods.

PubMed

Natali, Dario; Caironi, Mario

2012-03-15

A high-mobility organic semiconductor employed as the active material in a field-effect transistor does not guarantee per se that expectations of high performance are fulfilled. This is even truer if a downscaled, short channel is adopted. Only if contacts are able to provide the device with as much charge as it needs, with a negligible voltage drop across them, then high expectations can turn into high performances. It is a fact that this is not always the case in the field of organic electronics. In this review, we aim to offer a comprehensive overview on the subject of current injection in organic thin film transistors: physical principles concerning energy level (mis)alignment at interfaces, models describing charge injection, technologies for interface tuning, and techniques for characterizing devices. Finally, a survey of the most recent accomplishments in the field is given. Principles are described in general, but the technologies and survey emphasis is on solution processed transistors, because it is our opinion that scalable, roll-to-roll printing processing is one, if not the brightest, possible scenario for the future of organic electronics. With the exception of electrolyte-gated organic transistors, where impressively low width normalized resistances were reported (in the range of 10 Ω·cm), to date the lowest values reported for devices where the semiconductor is solution-processed and where the most common architectures are adopted, are ∼10 kΩ·cm for transistors with a field effect mobility in the 0.1-1 cm(2)/Vs range. Although these values represent the best case, they still pose a severe limitation for downscaling the channel lengths below a few micrometers, necessary for increasing the device switching speed. Moreover, techniques to lower contact resistances have been often developed on a case-by-case basis, depending on the materials, architecture and processing techniques. The lack of a standard strategy has hampered the progress of the

Influence of Surface Passivation on AlN Barrier Stress and Scattering Mechanism in Ultra-thin AlN/GaN Heterostructure Field-Effect Transistors.

PubMed

Lv, Y J; Song, X B; Wang, Y G; Fang, Y L; Feng, Z H

2016-12-01

Ultra-thin AlN/GaN heterostructure field-effect transistors (HFETs) with, and without, SiN passivation were fabricated by the same growth and device processes. Based on the measured DC characteristics, including the capacitance-voltage (C-V) and output current-voltage (I-V) curves, the variation of electron mobility with gate bias was found to be quite different for devices with, and without, SiN passivation. Although the AlN barrier layer is ultra thin (c. 3 nm), it was proved that SiN passivation induces no additional tensile stress and has no significant influence on the piezoelectric polarization of the AlN layer using Hall and Raman measurements. The SiN passivation was found to affect the surface properties, thereby increasing the electron density of the two-dimensional electron gas (2DEG) under the access region. The higher electron density in the access region after SiN passivation enhanced the electrostatic screening for the non-uniform distributed polarization charges, meaning that the polarization Coulomb field scattering has a weaker effect on the electron drift mobility in AlN/GaN-based devices.

Ultrafast decay of hot phonons in an AlGaN/AlN/AlGaN/GaN camelback channel

NASA Astrophysics Data System (ADS)

Leach, J. H.; Wu, M.; Morkoç, H.; Liberis, J.; Šermukšnis, E.; Ramonas, M.; Matulionis, A.

2011-11-01

A bottleneck for heat dissipation from the channel of a GaN-based heterostructure field-effect transistor is treated in terms of the lifetime of nonequilibrium (hot) longitudinal optical phonons, which are responsible for additional scattering of electrons in the voltage-biased quasi-two-dimensional channel. The hot-phonon lifetime is measured for an Al0.33Ga0.67N/AlN/Al0.1Ga0.9N/GaN heterostructure where the mobile electrons are spread in a composite Al0.1Ga0.9N/GaN channel and form a camelback electron density profile at high electric fields. In accordance with plasmon-assisted hot-phonon decay, the parameter of importance for the lifetime is not the total charge in the channel (the electron sheet density) but rather the electron density profile. This is demonstrated by comparing two structures with equal sheet densities (1 × 1013 cm-2), but with different density profiles. The camelback channel profile exhibits a shorter hot-phonon lifetime of ˜270 fs as compared with ˜500 fs reported for a standard Al0.33Ga0.67N/AlN/GaN channel at low supplied power levels. When supplied power is sufficient to heat the electrons > 600 K, ultrafast decay of hot phonons is observed in the case of the composite channel structure. In this case, the electron density profile spreads to form a camelback profile, and hot-phonon lifetime reduces to ˜50 fs.

Nitrogen plasma-treated multilayer graphene-based field effect transistor fabrication and electronic characteristics

NASA Astrophysics Data System (ADS)

Su, Wei-Jhih; Chang, Hsuan-Chen; Honda, Shin-ichi; Lin, Pao-Hung; Huang, Ying-Sheng; Lee, Kuei-Yi

2017-08-01

Chemical doping with hetero-atoms is an effective method used to change the characteristics of materials. Nitrogen doping technology plays a critical role in regulating the electronic properties of graphene. Nitrogen plasma treatment was used in this work to dope nitrogen atoms to modulate multilayer graphene electrical properties. The measured I-V multilayer graphene-base field-effect transistor characteristics (GFETs) showed a V-shaped transfer curve with the hole and electron region separated from the measured current-voltage (I-V) minimum. GFETs fabricated with multilayer graphene from chemical vapor deposition (CVD) exhibited p-type behavior because of oxygen adsorption. After using different nitrogen plasma treatment times, the minimum in I-V characteristic shifted into the negative gate voltage region with increased nitrogen concentration and the GFET channel became an n-type semiconductor. GFETs could be easily fabricated using this method with potential for various applications. The GFET transfer characteristics could be tuned precisely by adjusting the nitrogen plasma treatment time.

Dramatic switching behavior in suspended MoS2 field-effect transistors

NASA Astrophysics Data System (ADS)

Chen, Huawei; Li, Jingyu; Chen, Xiaozhang; Zhang, David; Zhou, Peng

2018-02-01

When integrating MoS2 flakes into scaling-down transistors, the short-channel effect, which is severe in silicon technology below 5-nanometer, can be avoided effectively. MoS2 transistors not only exhibit a high on/off ratio but also demonstrate a rapid switching speed. According to the theoretical calculation, the thermionic limit subthreshold slope (SS) of the ideal device could reach 60 mV/dec. However, due to the confinement of defects from substrates or contamination during the process, the SS deteriorates to more than 300 mV/dec, causing serious power consumption. In this work, we optimize the SS through structure design of MoS2 transistors. The suspended transistors exhibit a high on/off ratio of 107 and a minimum SS of 63 mV/dec with an ultralow standby power at room temperature. This study demonstrates the promising potential of structure design for electronic devices with ultralow-power switching behaviors.

Abnormal threshold voltage shift under hot carrier stress in Ti1-xNx/HfO2 p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Tsai, Jyun-Yu; Chang, Ting-Chang; Lo, Wen-Hung; Ho, Szu-Han; Chen, Ching-En; Chen, Hua-Mao; Tseng, Tseung-Yuen; Tai, Ya-Hsiang; Cheng, Osbert; Huang, Cheng-Tung

2013-09-01

This work investigates the channel hot carrier (CHC) effect in HfO2/Ti1-xNx p-channel metal oxide semiconductor field effect transistors (p-MOSFETs). Generally, the subthreshold swing (S.S.) should increase during CHC stress (CHCS), since interface states will be generated near the drain side under high electric field due to drain voltage (Vd). However, our experimental data indicate that S.S. has no evident change under CHCS, but threshold voltage (Vth) shifts positively. This result can be attributed to hot carrier injected into high-k dielectric near the drain side. Meanwhile, it is surprising that such Vth degradation is not observed in the saturation region during stress. Therefore, drain-induced-barrier-lowering (DIBL) as a result of CHC-induced electron trapping is proposed to explain the different Vth behaviors in the linear and saturation regions. Additionally, the influence of different nitrogen concentrations in HfO2/Ti1-xNx p-MOSFETs on CHCS is also investigated in this work. Since nitrogen diffuses to SiO2/Si interface induced pre-Nit occurring to degrades channel mobility during the annealing process, a device with more nitrogen shows slightly less impact ionization, leading to insignificant charge trapping-induced DIBL behavior.

Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

PubMed

Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2018-05-08

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

Theoretical investigation of performance of armchair graphene nanoribbon field effect transistors.

PubMed

Hur, Ji-Hyun; Kim, Deok-Kee

2018-05-04

In this paper, we theoretically investigate the highest possible expected performance for graphene nanoribbon field effect transistors (GNRFETs) for a wide range of operation voltages and device structure parameters, such as the width of the graphene nanoribbon and gate length. We formulated a self-consistent, non-equilibrium Green's function method in conjunction with the Poisson equation and modeled the operation of nanometer sized GNRFETs, of which GNR channels have finite bandgaps so that the GNRFET can operate as a switch. We propose a metric for competing with the current silicon CMOS high performance or low power devices and explain that this can vary greatly depending on the GNRFET structure parameters.

Theoretical investigation of performance of armchair graphene nanoribbon field effect transistors

NASA Astrophysics Data System (ADS)

Hur, Ji-Hyun; Kim, Deok-Kee

2018-05-01

In this paper, we theoretically investigate the highest possible expected performance for graphene nanoribbon field effect transistors (GNRFETs) for a wide range of operation voltages and device structure parameters, such as the width of the graphene nanoribbon and gate length. We formulated a self-consistent, non-equilibrium Green’s function method in conjunction with the Poisson equation and modeled the operation of nanometer sized GNRFETs, of which GNR channels have finite bandgaps so that the GNRFET can operate as a switch. We propose a metric for competing with the current silicon CMOS high performance or low power devices and explain that this can vary greatly depending on the GNRFET structure parameters.

Acceptor Percolation Determines How Electron-Accepting Additives Modify Transport of Ambipolar Polymer Organic Field-Effect Transistors.

PubMed

Ford, Michael J; Wang, Ming; Bustillo, Karen C; Yuan, Jianyu; Nguyen, Thuc-Quyen; Bazan, Guillermo C

2018-06-18

Organic field-effect transistors (OFETs) that utilize ambipolar polymer semiconductors can benefit from the ability of both electron and hole conduction, which is necessary for complementary circuits. However, simultaneous hole and electron transport in organic field-effect transistors result in poor ON/OFF ratios, limiting potential applications. Solution processing methods have been developed to control charge transport properties and transform ambipolar conduction to hole-only conduction. The electron-acceptor phenyl-C61-butyric acid methyl ester (PC 61 BM), when mixed in solution with an ambipolar semiconducting polymer, can reduce electron conduction. Unipolar p-type OFETs with high, well-defined ON/OFF ratios and without detrimental effects on hole conduction are achieved for a wide range of blend compositions, from 95:5 to 5:95 wt % semiconductor polymer:PC 61 BM. When introducing the alternative acceptor N, N'-bis(1-ethylpropyl)-3,4:9,10-perylenediimide (PDI), high ON/OFF ratios are achieved for 95:5 wt % semiconductor polymer:PDI; however, electron conduction increases for 50:50 and 5:95 wt % semiconductor polymer:PDI. As described within, we show that electron conduction is practically eliminated when additive domains do not percolate across the OFET channel, that is, electrons are "morphologically trapped". Morphologies were characterized by optical, electron, and atomic force microscopy as well as X-ray scattering techniques. PC 61 BM was substituted with an endohedral Lu 3 N fullerene, which enhanced contrast in electron microscopy and allowed for more detailed insight into the blend morphologies. Blends with alternative, nonfullerene acceptors further emphasize the importance of morphology and acceptor percolation, providing insights for such blends that control ambipolar transport and ON/OFF ratios.

Charge movement in a GaN-based hetero-structure field effect transistor structure with carbon doped buffer under applied substrate bias

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pooth, Alexander, E-mail: a.pooth@bristol.ac.uk; IQE; Uren, Michael J.

2015-12-07

Charge trapping and transport in the carbon doped GaN buffer of a GaN-based hetero-structure field effect transistor (HFET) has been investigated under both positive and negative substrate bias. Clear evidence of redistribution of charges in the carbon doped region by thermally generated holes is seen, with electron injection and capture observed during positive bias. Excellent agreement is found with simulations. It is shown that these effects are intrinsic to the carbon doped GaN and need to be controlled to provide reliable and efficient GaN-based power HFETs.

Electrical Characteristics of Organic Field Effect Transistor Formed by Gas Treatment of High-k Al2O3 at Low Temperature

NASA Astrophysics Data System (ADS)

Lee, Sunwoo; Yoon, Seungki; Park, In-Sung; Ahn, Jinho

2009-04-01

We studied the electrical characteristics of an organic field effect transistor (OFET) formed by the hydrogen (H2) and nitrogen (N2) mixed gas treatment of a gate dielectric layer. We also investigated how device mobility is related to the length and width variations of the channel. Aluminum oxide (Al2O3) was used as the gate dielectric layer. After the treatment, the mobility and subthreshold swing were observed to be significantly improved by the decreased hole carrier localization at the interfacial layer between the gate oxide and pentacene channel layers. H2 gas plays an important role in removing the defects of the gate oxide layer at temperatures below 100 °C.

Terahertz light-emitting graphene-channel transistor toward single-mode lasing

NASA Astrophysics Data System (ADS)

Yadav, Deepika; Tamamushi, Gen; Watanabe, Takayuki; Mitsushio, Junki; Tobah, Youssef; Sugawara, Kenta; Dubinov, Alexander A.; Satou, Akira; Ryzhii, Maxim; Ryzhii, Victor; Otsuji, Taiichi

2018-03-01

A distributed feedback dual-gate graphene-channel field-effect transistor (DFB-DG-GFET) was fabricated as a current-injection terahertz (THz) light-emitting laser transistor. We observed a broadband emission in a 1-7.6-THz range with a maximum radiation power of 10 μW as well as a single-mode emission at 5.2 THz with a radiation power of 0.1 μW both at 100 K when the carrier injection stays between the lower cutoff and upper cutoff threshold levels. The device also exhibited peculiar nonlinear threshold-like behavior with respect to the current-injection level. The LED-like broadband emission is interpreted as an amplified spontaneous THz emission being transcended to a single-mode lasing. Design constraints on waveguide structures for better THz photon field confinement with higher gain overlapping as well as DFB cavity structures with higher Q factors are also addressed towards intense, single-mode continuous wave THz lasing at room temperature.

Ultrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yokoyama, Masafumi, E-mail: yokoyama@mosfet.t.u-tokyo.ac.jp; Takenaka, Mitsuru; Takagi, Shinichi

2015-02-16

We have realized ultrathin body GaSb-on-insulator (GaSb-OI) on Si wafers by direct wafer bonding technology using atomic-layer deposition (ALD) Al{sub 2}O{sub 3} and have demonstrated GaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Si. A 23-nm-thick GaSb-OI p-MOSFET exhibits the peak effective mobility of ∼76 cm{sup 2}/V s. We have found that the effective hole mobility of the thin-body GaSb-OI p-MOSFETs decreases with a decrease in the GaSb-OI thickness or with an increase in Al{sub 2}O{sub 3} ALD temperature. The InAs passivation of GaSb-OI MOS interfaces can enhance the peak effective mobility up to 159 cm{sup 2}/V s for GaSb-OI p-MOSFETs with themore » 20-nm-thick GaSb layer.« less

Hall effect mobility for SiC MOSFETs with increasing dose of nitrogen implantation into channel region

NASA Astrophysics Data System (ADS)

Noguchi, Munetaka; Iwamatsu, Toshiaki; Amishiro, Hiroyuki; Watanabe, Hiroshi; Kita, Koji; Yamakawa, Satoshi

2018-04-01

The Hall effect mobility (μHall) of the Si-face 4H-SiC metal–oxide–semiconductor field effect transistor (MOSFET) with a nitrogen (N)-implanted channel region was investigated by increasing the N dose. The μHall in the channel region was systematically examined regarding channel structures, that is, the surface and buried channels. It was experimentally demonstrated that increasing the N dose results in an improvement in μHall in the channel region due to the formation of the buried channel. However, further increase in N dose was found to decrease the μHall in the channel region, owing to the decrease in the electron mobility in the N-implanted bulk region.

SiC Field Effect Transistor Technology Demonstrating Prolonged Stable Operation at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Okojie, Robert S.; Beheim, Glenn M.; Meredith, Roger; Ferrier, Terry

2006-01-01

While there have been numerous reports of short-term transistor operation at 500 degree C or above, these devices have previously not demonstrated sufficient long-term operational durability at 500 degree C to be considered viable for most envisioned applications. This paper reports the development of Silicone Carbi field effect transistors capable of long-term electrical operation at 500 degree C. A 6H-SiC MESFET was packaged and subjected to continuous electrical operation while residing in a 500 degree C oven in oxidizing air atmosphere for over 2400 hours. The transistor gain, saturation current (IDSS), and on-resistance (RDS) changed by less than 20% from initial values throughout the duration of the biased 500 degree C test. Another high-temperature packaged 6H-SiC MESFET was employed to form a simple one-stage high-temperature low-frequency voltage amplifier. This single-stage common-source amplifier demonstrated stable continuous electrical operation (negligible changes to gain and operating biases) for over 600 hours while residing in a 500 degree C air ambient oven. In both cases, increased leakage from annealing of the Schottky gate-to-channel diode was the dominant transistor degradation mechanism that limited the duration of 500 degree C electrical operation.

Perspective analysis of tri gate germanium tunneling field-effect transistor with dopant segregation region at source/drain

NASA Astrophysics Data System (ADS)

Liu, Liang-kui; Shi, Cheng; Zhang, Yi-bo; Sun, Lei

2017-04-01

A tri gate Ge-based tunneling field-effect transistor (TFET) has been numerically studied with technology computer aided design (TCAD) tools. Dopant segregated Schottky source/drain is applied to the device structure design (DS-TFET). The characteristics of the DS-TFET are compared and analyzed comprehensively. It is found that the performance of n-channel tri gate DS-TFET with a positive bias is insensitive to the dopant concentration and barrier height at n-type drain, and that the dopant concentration and barrier height at a p-type source considerably affect the device performance. The domination of electron current in the entire BTBT current of this device accounts for this phenomenon and the tri-gate DS-TFET is proved to have a higher performance than its dual-gate counterpart.

'Soft' amplifier circuits based on field-effect ionic transistors.

PubMed

Boon, Niels; Olvera de la Cruz, Monica

2015-06-28

Soft materials can be used as the building blocks for electronic devices with extraordinary properties. We introduce a theoretical model for a field-effect transistor in which ions are the gated species instead of electrons. Our model incorporates readily-available soft materials, such as conductive porous membranes and polymer-electrolytes to represent a device that regulates ion currents and can be integrated as a component in larger circuits. By means of Nernst-Planck numerical simulations as well as an analytical description of the steady-state current we find that the responses of the system to various input voltages can be categorized into ohmic, sub-threshold, and active modes. This is fully analogous to what is known for the electronic field-effect transistor (FET). Pivotal FET properties such as the threshold voltage and the transconductance crucially depend on the half-cell redox potentials of the source and drain electrodes as well as on the polyelectrolyte charge density and the gate material work function. We confirm the analogy with the electronic FETs through numerical simulations of elementary amplifier circuits in which we successfully substitute the electronic transistor by an ionic transistor.

Improvement in the performance of graphene nanoribbon p-i-n tunneling field effect transistors by applying lightly doped profile on drain region

NASA Astrophysics Data System (ADS)

Naderi, Ali

2017-12-01

In this paper, an efficient structure with lightly doped drain region is proposed for p-i-n graphene nanoribbon field effect transistors (LD-PIN-GNRFET). Self-consistent solution of Poisson and Schrödinger equation within Nonequilibrium Green’s function (NEGF) formalism has been employed to simulate the quantum transport of the devices. In proposed structure, source region is doped by constant doping density, channel is an intrinsic GNR, and drain region contains two parts with lightly and heavily doped doping distributions. The important challenge in tunneling devices is obtaining higher current ratio. Our simulations demonstrate that LD-PIN-GNRFET is a steep slope device which not only reduces the leakage current and current ratio but also enhances delay, power delay product, and cutoff frequency in comparison with conventional PIN GNRFETs with uniform distribution of impurity and with linear doping profile in drain region. Also, the device is able to operate in higher drain-source voltages due to the effectively reduced electric field at drain side. Briefly, the proposed structure can be considered as a more reliable device for low standby-power logic applications operating at higher voltages and upper cutoff frequencies.

Hydrogen-terminated diamond vertical-type metal oxide semiconductor field-effect transistors with a trench gate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Inaba, Masafumi, E-mail: inaba-ma@ruri.waseda.jp; Muta, Tsubasa; Kobayashi, Mikinori

2016-07-18

The hydrogen-terminated diamond surface (C-H diamond) has a two-dimensional hole gas (2DHG) layer independent of the crystal orientation. A 2DHG layer is ubiquitously formed on the C-H diamond surface covered by atomic-layer-deposited-Al{sub 2}O{sub 3}. Using Al{sub 2}O{sub 3} as a gate oxide, C-H diamond metal oxide semiconductor field-effect transistors (MOSFETs) operate in a trench gate structure where the diamond side-wall acts as a channel. MOSFETs with a side-wall channel exhibit equivalent performance to the lateral C-H diamond MOSFET without a side-wall channel. Here, a vertical-type MOSFET with a drain on the bottom is demonstrated in diamond with channel current modulationmore » by the gate and pinch off.« less

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

PubMed

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

Study of fully-depleted Ge double-gate n-type Tunneling Field-Effect Transistors for improvement in on-state current and sub-threshold swing

NASA Astrophysics Data System (ADS)

Liu, Xiangyu; Hu, Huiyong; Wang, Meng; Zhang, Heming; Cui, Shimin; Shu, Bin; Wang, Bin

2018-01-01

In this paper, a fully-depleted (FD) Ge double-gate (DG) n-type Tunneling Field-Effect Transistors (TFET) structure is studied in detail by two-dimensional numerical simulation. The simulation results indicated that the on-state current Ion and on-off ratio of the FD Ge DG-TFET increases about 1 order of magnitude comparing with the Conventional Ge DG-TFET, and Ion=3.95×10-5 A/μm and the below 60 mV/decade subthreshold swing S=26.4 mV/decade are achieved with the length of gate LD=20 nm, the workfuntion of metal gate Φm=0.2 eV and the doping concentration of n+-type-channel ND=1×1018 cm-3. Moreover, the impacts of Φm, ND and LD are investigated. The simulation results indicated that the off-state current Ioff includes the tunneling current at the middle of channel IB the gated-induced drain leakage (GIDL) current IGIDL. With optimized Φm and ND, Ioff is reduced about 2 orders of magnitude to 2.5×10-13 A/μm with LD increasing from 40 nm to 100 nm, and on-off ratio is increased to 1.58×107.

A Field-Effect Transistor (FET) model for ASAP

NASA Technical Reports Server (NTRS)

Ming, L.

1965-01-01

The derivation of the circuitry of a field effect transistor (FET) model, the procedure for adapting the model to automated statistical analysis program (ASAP), and the results of applying ASAP on this model are described.

Temperature dependence of single-event burnout in n-channel power MOSFET's

NASA Astrophysics Data System (ADS)

Johnson, G. H.; Schrimpf, R. D.; Galloway, K. F.; Koga, R.

1994-03-01

The temperature dependence of single-event burnout (SEB) in n-channel power metal-oxide-semiconductor field effect transistors (MOSFET's) is investigated experimentally and analytically. Experimental data are presented which indicate that the SEB susceptibility of the power MOSFET decreases with increasing temperature. A previously reported analytical model that describes the SEB mechanism is updated to include temperature variations. This model is shown to agree with the experimental trends.

A steep-slope transistor based on abrupt electronic phase transition

NASA Astrophysics Data System (ADS)

Shukla, Nikhil; Thathachary, Arun V.; Agrawal, Ashish; Paik, Hanjong; Aziz, Ahmedullah; Schlom, Darrell G.; Gupta, Sumeet Kumar; Engel-Herbert, Roman; Datta, Suman

2015-08-01

Collective interactions in functional materials can enable novel macroscopic properties like insulator-to-metal transitions. While implementing such materials into field-effect-transistor technology can potentially augment current state-of-the-art devices by providing unique routes to overcome their conventional limits, attempts to harness the insulator-to-metal transition for high-performance transistors have experienced little success. Here, we demonstrate a pathway for harnessing the abrupt resistivity transformation across the insulator-to-metal transition in vanadium dioxide (VO2), to design a hybrid-phase-transition field-effect transistor that exhibits gate controlled steep (`sub-kT/q') and reversible switching at room temperature. The transistor design, wherein VO2 is implemented in series with the field-effect transistor's source rather than into the channel, exploits negative differential resistance induced across the VO2 to create an internal amplifier that facilitates enhanced performance over a conventional field-effect transistor. Our approach enables low-voltage complementary n-type and p-type transistor operation as demonstrated here, and is applicable to other insulator-to-metal transition materials, offering tantalizing possibilities for energy-efficient logic and memory applications.

A steep-slope transistor based on abrupt electronic phase transition.

PubMed

Shukla, Nikhil; Thathachary, Arun V; Agrawal, Ashish; Paik, Hanjong; Aziz, Ahmedullah; Schlom, Darrell G; Gupta, Sumeet Kumar; Engel-Herbert, Roman; Datta, Suman

2015-08-07

Collective interactions in functional materials can enable novel macroscopic properties like insulator-to-metal transitions. While implementing such materials into field-effect-transistor technology can potentially augment current state-of-the-art devices by providing unique routes to overcome their conventional limits, attempts to harness the insulator-to-metal transition for high-performance transistors have experienced little success. Here, we demonstrate a pathway for harnessing the abrupt resistivity transformation across the insulator-to-metal transition in vanadium dioxide (VO2), to design a hybrid-phase-transition field-effect transistor that exhibits gate controlled steep ('sub-kT/q') and reversible switching at room temperature. The transistor design, wherein VO2 is implemented in series with the field-effect transistor's source rather than into the channel, exploits negative differential resistance induced across the VO2 to create an internal amplifier that facilitates enhanced performance over a conventional field-effect transistor. Our approach enables low-voltage complementary n-type and p-type transistor operation as demonstrated here, and is applicable to other insulator-to-metal transition materials, offering tantalizing possibilities for energy-efficient logic and memory applications.

Mathematical Models of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field effect Transistor

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2013-01-01

Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric- semiconductor field effect transistors (MOSFETs) are developed in this paper. The models are compared against data collected with MOSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth as well as differences and advantages as compared to the performance of each circuit using a MOSFET.

Graphene nanoribbon field-effect transistors fabricated by etchant-free transfer from Au(788)

NASA Astrophysics Data System (ADS)

Ohtomo, Manabu; Sekine, Yoshiaki; Hibino, Hiroki; Yamamoto, Hideki

2018-01-01

We report etching-free and iodine-free transfer of highly aligned array of armchair-edge graphene nanoribbons (ACGNRs) and their field-effect transistor (FET) characteristics. They were prepared by on-surface polymerization on Au(788) templates. The ACGNRs were mechanically delaminated and transferred onto insulating substrates with the aid of a nano-porous support layer composed of hydrogen silsesquioxane (HSQ). The key process in the mechanical delamination is the intercalation of octanethiol self-assembled monolayers (SAMs), which penetrate the HSQ layer and intercalate between the ACGNRs and Au(788). After the transfer, the octanethiol SAMs were removed with Piranha solution, enabling the reuse of the Au single crystals. The FETs fabricated with the transferred ACGNR array showed ambipolar behavior when the channel length was as long as 60 nm. Quasi-one-dimensional conductivity was observed, which implies a good alignment of GNRs after the transfer. In contrast, short-channel ACGNR FETs (channel length ˜20 nm) suffer from a geometry-dependent short-channel effect. This effect is more severe in the FETs with ACGNRs parallel to the channel, which is an ideal geometry, than in ones perpendicular to the channel. Since the ID-VD curve is well fitted by the power-law model, the short-channel effect likely stems from the space-charge limited current effect, while the wide charge-transfer region in the GNR channel can be another possible cause for the short-channel effect. These results provide us with important insights into the designing short-channel GNR-FETs with improved performance.

Field-effect transistors as electrically controllable nonlinear rectifiers for the characterization of terahertz pulses

NASA Astrophysics Data System (ADS)

Lisauskas, Alvydas; Ikamas, Kestutis; Massabeau, Sylvain; Bauer, Maris; ČibiraitÄ--, DovilÄ--; Matukas, Jonas; Mangeney, Juliette; Mittendorff, Martin; Winnerl, Stephan; Krozer, Viktor; Roskos, Hartmut G.

2018-05-01

We propose to exploit rectification in field-effect transistors as an electrically controllable higher-order nonlinear phenomenon for the convenient monitoring of the temporal characteristics of THz pulses, for example, by autocorrelation measurements. This option arises because of the existence of a gate-bias-controlled super-linear response at sub-threshold operation conditions when the devices are subjected to THz radiation. We present measurements for different antenna-coupled transistor-based THz detectors (TeraFETs) employing (i) AlGaN/GaN high-electron-mobility and (ii) silicon CMOS field-effect transistors and show that the super-linear behavior in the sub-threshold bias regime is a universal phenomenon to be expected if the amplitude of the high-frequency voltage oscillations exceeds the thermal voltage. The effect is also employed as a tool for the direct determination of the speed of the intrinsic TeraFET response which allows us to avoid limitations set by the read-out circuitry. In particular, we show that the build-up time of the intrinsic rectification signal of a patch-antenna-coupled CMOS detector changes from 20 ps in the deep sub-threshold voltage regime to below 12 ps in the vicinity of the threshold voltage.

Coupling p+n Field-Effect Transistor Circuits for Low Concentration Methane Gas Detection

PubMed Central

Zhou, Xinyuan; Yang, Liping; Bian, Yuzhi; Ma, Xiang; Chen, Yunfa

2018-01-01

Nowadays, the detection of low concentration combustible methane gas has attracted great concern. In this paper, a coupling p+n field effect transistor (FET) amplification circuit is designed to detect methane gas. By optimizing the load resistance (RL), the response to methane of the commercial MP-4 sensor can be magnified ~15 times using this coupling circuit. At the same time, it decreases the limit of detection (LOD) from several hundred ppm to ~10 ppm methane, with the apparent response of 7.0 ± 0.2 and voltage signal of 1.1 ± 0.1 V. This is promising for the detection of trace concentrations of methane gas to avoid an accidental explosion because its lower explosion limit (LEL) is ~5%. The mechanism of this coupling circuit is that the n-type FET firstly generates an output voltage (VOUT) amplification process caused by the gate voltage-induced resistance change of the FET. Then, the p-type FET continues to amplify the signal based on the previous VOUT amplification process. PMID:29509659

Coupling p+n Field-Effect Transistor Circuits for Low Concentration Methane Gas Detection.

PubMed

Zhou, Xinyuan; Yang, Liping; Bian, Yuzhi; Ma, Xiang; Han, Ning; Chen, Yunfa

2018-03-06

Nowadays, the detection of low concentration combustible methane gas has attracted great concern. In this paper, a coupling p+n field effect transistor (FET) amplification circuit is designed to detect methane gas. By optimizing the load resistance ( R L ), the response to methane of the commercial MP-4 sensor can be magnified ~15 times using this coupling circuit. At the same time, it decreases the limit of detection (LOD) from several hundred ppm to ~10 ppm methane, with the apparent response of 7.0 ± 0.2 and voltage signal of 1.1 ± 0.1 V. This is promising for the detection of trace concentrations of methane gas to avoid an accidental explosion because its lower explosion limit (LEL) is ~5%. The mechanism of this coupling circuit is that the n-type FET firstly generates an output voltage ( V OUT ) amplification process caused by the gate voltage-induced resistance change of the FET. Then, the p-type FET continues to amplify the signal based on the previous V OUT amplification process.

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistor

NASA Technical Reports Server (NTRS)

Toshishige, Yamada; Biegel, Bryan A. (Technical Monitor)

2002-01-01

The threshold voltages of a carbon-nanotube (CNT) field-effect transistor (FET) are studied. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, and this makes the device characteristics quite unique. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and inversion and accumulation threshold voltages (V(sub Ti), and V(sub Ta)) are derived. V(sub Ti) of the CNTFETs has a much stronger doping dependence than that of the metal-oxide- semiconductor FETs, while V(sub Ta) of both devices depends weakly on doping with the same functional form.

A gallium phosphide high-temperature bipolar junction transistor

NASA Technical Reports Server (NTRS)

Zipperian, T. E.; Dawson, L. R.; Chaffin, R. J.

1981-01-01

Preliminary results are reported on the development of a high temperature (350 C) gallium phosphide bipolar junction transistor (BJT) for geothermal and other energy applications. This four-layer p(+)n(-)pp(+) structure was formed by liquid phase epitaxy using a supercooling technique to insure uniform nucleation of the thin layers. Magnesium was used as the p-type dopant to avoid excessive out-diffusion into the lightly doped base. By appropriate choice of electrodes, the device may also be driven as an n-channel junction field-effect transistor. The initial design suffers from a series resistance problem which limits the transistor's usefulness at high temperatures.

Statistical variability study of random dopant fluctuation on gate-all-around inversion-mode silicon nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Yoon, Jun-Sik; Rim, Taiuk; Kim, Jungsik; Kim, Kihyun; Baek, Chang-Ki; Jeong, Yoon-Ha

2015-03-01

Random dopant fluctuation effects of gate-all-around inversion-mode silicon nanowire field-effect transistors (FETs) with different diameters and extension lengths are investigated. The nanowire FETs with smaller diameter and longer extension length reduce average values and variations of subthreshold swing and drain-induced barrier lowering, thus improving short channel immunity. Relative variations of the drain currents increase as the diameter decreases because of decreased current drivability from narrower channel cross-sections. Absolute variations of the drain currents decrease critically as the extension length increases due to decreasing the number of arsenic dopants penetrating into the channel region. To understand variability origins of the drain currents, variations of source/drain series resistance and low-field mobility are investigated. All these two parameters affect the variations of the drain currents concurrently. The nanowire FETs having extension lengths sufficient to prevent dopant penetration into the channel regions and maintaining relatively large cross-sections are suggested to achieve suitable short channel immunity and small variations of the drain currents.

Zinc oxide integrated area efficient high output low power wavy channel thin film transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hanna, A. N.; Ghoneim, M. T.; Bahabry, R. R.

2013-11-25

We report an atomic layer deposition based zinc oxide channel material integrated thin film transistor using wavy channel architecture allowing expansion of the transistor width in the vertical direction using the fin type features. The experimental devices show area efficiency, higher normalized output current, and relatively lower power consumption compared to the planar architecture. This performance gain is attributed to the increased device width and an enhanced applied electric field due to the architecture when compared to a back gated planar device with the same process conditions.

Doped Organic Transistors.

PubMed

Lüssem, Björn; Keum, Chang-Min; Kasemann, Daniel; Naab, Ben; Bao, Zhenan; Leo, Karl

2016-11-23

Organic field-effect transistors hold the promise of enabling low-cost and flexible electronics. Following its success in organic optoelectronics, the organic doping technology is also used increasingly in organic field-effect transistors. Doping not only increases device performance, but it also provides a way to fine-control the transistor behavior, to develop new transistor concepts, and even improve the stability of organic transistors. This Review summarizes the latest progress made in the understanding of the doping technology and its application to organic transistors. It presents the most successful doping models and an overview of the wide variety of materials used as dopants. Further, the influence of doping on charge transport in the most relevant polycrystalline organic semiconductors is reviewed, and a concise overview on the influence of doping on transistor behavior and performance is given. In particular, recent progress in the understanding of contact doping and channel doping is summarized.

Silicon Field Effect Transistors as Dual-Use Sensor-Heater Hybrids

PubMed Central

Reddy, Bobby; Elibol, Oguz H.; Nair, Pradeep R.; Dorvel, Brian R.; Butler, Felice; Ahsan, Zahab; Bergstrom, Donald E.; Alam, Muhammad A.; Bashir, Rashid

2011-01-01

We demonstrate the temperature mediated applications of a previously proposed novel localized dielectric heating method on the surface of dual purpose silicon field effect transistor (FET) sensor-heaters and perform modeling and characterization of the underlying mechanisms. The FETs are first shown to operate as electrical sensors via sensitivity to changes in pH in ionic fluids. The same devices are then demonstrated as highly localized heaters via investigation of experimental heating profiles and comparison to simulation results. These results offer further insight into the heating mechanism and help determine the spatial resolution of the technique. Two important biosensor platform applications spanning different temperature ranges are then demonstrated: a localized heat-mediated DNA exchange reaction and a method for dense selective functionalization of probe molecules via the heat catalyzed complete desorption and reattachment of chemical functionalization to the transistor surfaces. Our results show that the use of silicon transistors can be extended beyond electrical switching and field-effect sensing to performing localized temperature controlled chemical reactions on the transistor itself. PMID:21214189

All-Electrical Spin Field Effect Transistor in van der Waals Heterostructures at Room Temperature

NASA Astrophysics Data System (ADS)

Dankert, André; Dash, Saroj

Spintronics aims to exploit the spin degree of freedom in solid state devices for data storage and information processing. Its fundamental concepts (creation, manipulation and detection of spin polarization) have been demonstrated in semiconductors and spin transistor structures using electrical and optical methods. However, an unsolved challenge is the realization of all-electrical methods to control the spin polarization in a transistor manner at ambient temperatures. Here we combine graphene and molybdenum disulfide (MoS2) in a van der Waals heterostructure to realize a spin field-effect transistor (spin-FET) at room temperature. These two-dimensional crystals offer a unique platform due to their contrasting properties, such as weak spin-orbit coupling (SOC) in graphene and strong SOC in MoS2. The gate-tuning of the Schottky barrier at the MoS2/graphene interface and MoS2 channel yields spins to interact with high SOC material and allows us to control the spin polarization and lifetime. This all-electrical spin-FET at room temperature is a substantial step in the field of spintronics and opens a new platform for testing a plethora of exotic physical phenomena, which can be key building blocks in future device architectures.

Light-Stimulated Synaptic Devices Utilizing Interfacial Effect of Organic Field-Effect Transistors.

PubMed

Dai, Shilei; Wu, Xiaohan; Liu, Dapeng; Chu, Yingli; Wang, Kai; Yang, Ben; Huang, Jia

2018-06-14

Synaptic transistors stimulated by light waves or photons may offer advantages to the devices, such as wide bandwidth, ultrafast signal transmission, and robustness. However, previously reported light-stimulated synaptic devices generally require special photoelectric properties from the semiconductors and sophisticated device's architectures. In this work, a simple and effective strategy for fabricating light-stimulated synaptic transistors is provided by utilizing interface charge trapping effect of organic field-effect transistors (OFETs). Significantly, our devices exhibited highly synapselike behaviors, such as excitatory postsynaptic current (EPSC) and pair-pulse facilitation (PPF), and presented memory and learning ability. The EPSC decay, PPF curves, and forgetting behavior can be well expressed by mathematical equations for synaptic devices, indicating that interfacial charge trapping effect of OFETs can be utilized as a reliable strategy to realize organic light-stimulated synapses. Therefore, this work provides a simple and effective strategy for fabricating light-stimulated synaptic transistors with both memory and learning ability, which enlightens a new direction for developing neuromorphic devices.

Field-induced strain degradation of AlGaN/GaN high electron mobility transistors on a nanometer scale

NASA Astrophysics Data System (ADS)

Lin, Chung-Han; Doutt, D. R.; Mishra, U. K.; Merz, T. A.; Brillson, L. J.

2010-11-01

Nanoscale Kelvin probe force microscopy and depth-resolved cathodoluminescence spectroscopy reveal an electronic defect evolution inside operating AlGaN/GaN high electron mobility transistors with degradation under electric-field-induced stress. Off-state electrical stress results in micron-scale areas within the extrinsic drain expanding and decreasing in electric potential, midgap defects increasing by orders-of-magnitude at the AlGaN layer, and local Fermi levels lowering as gate-drain voltages increase above a characteristic stress threshold. The pronounced onset of defect formation, Fermi level movement, and transistor degradation at the threshold gate-drain voltage of J. A. del Alamo and J. Joh [Microelectron. Reliab. 49, 1200 (2009)] is consistent with crystal deformation and supports the inverse piezoelectric model of high electron mobility transistor degradation.

Electrical characteristics of Graphene based Field Effect Transistor (GFET) biosensor for ADH detection

NASA Astrophysics Data System (ADS)

Selvarajan, Reena Sri; Hamzah, Azrul Azlan; Majlis, Burhanuddin Yeop

2017-08-01

First pristine graphene was successfully produced by mechanical exfoliation and electrically characterized in 2004 by Andre Geim and Konstantin Novoselov at University of Manchester. Since its discovery in 2004, graphene also known as `super' material that has enticed many researchers and engineers to explore its potential in ultrasensitive detection of analytes in biosensing applications. Among myriad reported sensors, biosensors based on field effect transistors (FETs) have attracted much attention. Thus, implementing graphene as conducting channel material hastens the opportunities for production of ultrasensitive biosensors for future device applications. Herein, we have reported electrical characteristics of graphene based field effect transistor (GFET) for ADH detection. GFET was modelled and simulated using Lumerical DEVICE charge transport solver (DEVICE CT). Electrical characteristics comprising of transfer and output characteristics curves are reported in this study. The device shows ambipolar curve and achieved a minimum conductivity of 0.23912 e5A at Dirac point. However, the curve shifts to the left and introduces significant changes in the minimum conductivity as drain voltage is increased. Output characteristics of GFET exhibits linear Id - Vd dependence characteristics for gate voltage ranging from 0 to 1.5 V. In addition, behavior of electrical transport through GFET was analyzed for various simulation temperatures. It clearly proves that the electrical transport in GFET is dependent on the simulation temperature as it may vary the maximum resistance in channel of the device. Therefore, this unique electrical characteristics of GFET makes it as a promising candidate for ultrasensitive detection of small biomolecules such as ADH in biosensing applications.

Study on high breakdown voltage GaN-based vertical field effect transistor with interfacial charge engineering for power applications

NASA Astrophysics Data System (ADS)

Du, Jiangfeng; Liu, Dong; Liu, Yong; Bai, Zhiyuan; Jiang, Zhiguang; Liu, Yang; Yu, Qi

2017-11-01

A high voltage GaN-based vertical field effect transistor with interfacial charge engineering (GaN ICE-VFET) is proposed and its breakdown mechanism is presented. This vertical FET features oxide trenches which show a fixed negative charge at the oxide/GaN interface. In the off-state, firstly, the trench oxide layer acts as a field plate; secondly, the n-GaN buffer layer is inverted along the oxide/GaN interface and thus a vertical hole layer is formed, which acts as a virtual p-pillar and laterally depletes the n-buffer pillar. Both of them modulate electric field distribution in the device and significantly increase the breakdown voltage (BV). Compared with a conventional GaN vertical FET, the BV of GaN ICE-VFET is increased from 1148 V to 4153 V with the same buffer thickness of 20 μm. Furthermore, the proposed device achieves a great improvement in the tradeoff between BV and on-resistance; and its figure of merit even exceeds the GaN one-dimensional limit.

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Anh Khoa Augustin; IMEC, 75 Kapeldreef, B-3001 Leuven; Pourtois, Geoffrey

2016-01-25

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, andmore » sets the limit of the scaling in future transistor designs.« less

Ferroelectric Field Effect Transistor Model Using Partitioned Ferroelectric Layer and Partial Polarization

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat D.

2004-01-01

A model of an n-channel ferroelectric field effect transistor has been developed based on both theoretical and empirical data. The model is based on an existing model that incorporates partitioning of the ferroelectric layer to calculate the polarization within the ferroelectric material. The model incorporates several new aspects that are useful to the user. It takes into account the effect of a non-saturating gate voltage only partially polarizing the ferroelectric material based on the existing remnant polarization. The model also incorporates the decay of the remnant polarization based on the time history of the FFET. A gate pulse of a specific voltage; will not put the ferroelectric material into a single amount of polarization for that voltage, but instead vary with previous state of the material and the time since the last change to the gate voltage. The model also utilizes data from FFETs made from different types of ferroelectric materials to allow the user just to input the material being used and not recreate the entire model. The model also allows the user to input the quality of the ferroelectric material being used. The ferroelectric material quality can go from a theoretical perfect material with little loss and no decay to a less than perfect material with remnant losses and decay. This model is designed to be used by people who need to predict the external characteristics of a FFET before the time and expense of design and fabrication. It also allows the parametric evaluation of quality of the ferroelectric film on the overall performance of the transistor.

Fabrication of 4H-SiC n-channel IGBTs with ultra high blocking voltage

NASA Astrophysics Data System (ADS)

Yang, Xiaolei; Tao, Yonghong; Yang, Tongtong; Huang, Runhua; Song, Bai

2018-03-01

Owing to the conductivity modulation of silicon carbide (SiC) bipolar devices, n-channel insulated gate bipolar transistors (n-IGBTs) have a significant advantage over metal oxide semiconductor field effect transistors (MOSFETs) in ultra high voltage (UHV) applications. In this paper, backside grinding and laser annealing process were carried out to fabricate 4H-SiC n-IGBTs. The thickness of a drift layer was 120 μm, which was designed for a blocking voltage of 13 kV. The n-IGBTs carried a collector current density of 24 A/cm2 at a power dissipation of 300 W/cm2 when the gate voltage was 20 V, with a differential specific on-resistance of 140 mΩ·cm2.

Integrating Partial Polarization into a Metal-Ferroelectric-Semiconductor Field Effect Transistor Model

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen

1999-01-01

The ferroelectric channel in a Metal-Ferroelectric-Semiconductor Field Effect Transistor (MFSFET) can partially change its polarization when the gate voltage near the polarization threshold voltage. This causes the MFSFET Drain current to change with repeated pulses of the same gate voltage near the polarization threshold voltage. A previously developed model [11, based on the Fermi-Dirac function, assumed that for a given gate voltage and channel polarization, a sin-le Drain current value would be generated. A study has been done to characterize the effects of partial polarization on the Drain current of a MFSFET. These effects have been described mathematically and these equations have been incorporated into a more comprehensive mathematical model of the MFSFET. The model takes into account the hysteresis nature of the MFSFET and the time dependent decay as well as the effects of partial polarization. This model defines the Drain current based on calculating the degree of polarization from previous gate pulses, the present Gate voltage, and the amount of time since the last Gate volta-e pulse.

Glucose Sensing Using Functionalized Amorphous In-Ga-Zn-O Field-Effect Transistors.

PubMed

Du, Xiaosong; Li, Yajuan; Motley, Joshua R; Stickle, William F; Herman, Gregory S

2016-03-01

Recent advances in glucose sensing have focused on the integration of sensors into contact lenses to allow noninvasive continuous glucose monitoring. Current technologies focus primarily on enzyme-based electrochemical sensing which requires multiple nontransparent electrodes to be integrated. Herein, we leverage amorphous indium gallium zinc oxide (IGZO) field-effect transistors (FETs), which have found use in a wide range of display applications and can be made fully transparent. Bottom-gated IGZO-FETs can have significant changes in electrical characteristics when the back-channel is exposed to different environments. We have functionalized the back-channel of IGZO-FETs with aminosilane groups that are cross-linked to glucose oxidase and have demonstrated that these devices have high sensitivity to changes in glucose concentrations. Glucose sensing occurs through the decrease in pH during glucose oxidation, which modulates the positive charge of the aminosilane groups attached to the IGZO surface. The change in charge affects the number of acceptor-like surface states which can deplete electron density in the n-type IGZO semiconductor. Increasing glucose concentrations leads to an increase in acceptor states and a decrease in drain-source conductance due to a positive shift in the turn-on voltage. The functionalized IGZO-FET devices are effective in minimizing detection of interfering compounds including acetaminophen and ascorbic acid. These studies suggest that IGZO FETs can be effective for monitoring glucose concentrations in a variety of environments, including those where fully transparent sensing elements may be of interest.

Relation between film thickness and surface doping of MoS2 based field effect transistors

NASA Astrophysics Data System (ADS)

Lockhart de la Rosa, César J.; Arutchelvan, Goutham; Leonhardt, Alessandra; Huyghebaert, Cedric; Radu, Iuliana; Heyns, Marc; De Gendt, Stefan

2018-05-01

Ultra-thin MoS2 film doping through surface functionalization with physically adsorbed species is of great interest due to its ability to dope the film without reduction in the carrier mobility. However, there is a need for understanding how the thickness of the MoS2 film is related to the induced surface doping for improved electrical performance. In this work, we report on the relation of MoS2 film thickness with the doping effect induced by the n-dopant adsorbate poly(vinyl-alcohol). Field effect transistors built using MoS2 films of different thicknesses were electrically characterized, and it was observed that the ION/OFF ratio after doping in thin films is more than four orders of magnitudes greater when compared with thick films. Additionally, a semi-classical model tuned with the experimental devices was used to understand the spatial distribution of charge in the channel and explain the observed behavior. From the simulation results, it was revealed that the two-dimensional carrier density induced by the adsorbate is distributed rather uniformly along the complete channel for thin films (<5.2 nm) contrary to what happens for thicker films.

Time-dependent observation of individual cellular binding events to field-effect transistors.

PubMed

Schäfer, S; Eick, S; Hofmann, B; Dufaux, T; Stockmann, R; Wrobel, G; Offenhäusser, A; Ingebrandt, S

2009-01-01

Electrolyte-gate field-effect transistors (EG-FETs) gained continuously more importance in the field of bioelectronics. The reasons for this are the intrinsic properties of these FETs. Binding of analysts or changes in the electrolyte composition are leading to variations of the drain-source current. Furthermore, due to the signal amplification upon voltage-to-current conversion even small extracellular signals can be detected. Here we report about impedance spectroscopy with an FET array to characterize passive components of a cell attached to the transistor gate. We developed a 16-channel readout system, which provides a simultaneous, lock-in based readout. A test signal of known amplitude and phase was applied via the reference electrode. We monitored the electronic transfer function of the FETs with the attached cell. The resulting frequency spectrum was used to investigate the surface adhesion of individual HEK293 cells. We applied different chemical treatments with either the serinpeptidase trypsin or the ionophor amphotericin B (AmpB). Binding studies can be realized by a time-dependent readout of the lock-in amplifier at a constant frequency. We observed cell detachment upon trypsin activity as well as membrane decomposition induced by AmpB. The results were interpreted in terms of an equivalent electrical circuit model of the complete system. The presented method could in future be applied to monitor more relevant biomedical manipulations of individual cells. Due to the utilization of the silicon technology, our method could be easily up-scaled to many output channels for high throughput pharmacological screening.

Organic Field Effect Transistor Using Amorphous Fluoropolymer as Gate Insulating Film

NASA Astrophysics Data System (ADS)

Kitajima, Yosuke; Kojima, Kenzo; Mizutani, Teruyoshi; Ochiai, Shizuyasu

Organic field effect transistors are fabricated by the active layer of Regioregular poly (3-hexylthiophene-2,5-diy)(P3HT) thin film. CYTOP thin film made from Amorphous Fluoropolymer and fabricated by spin-coating is adopted to a gate dielectric layer on Polyethylenenaphthalate (PEN) thin film that is the substrate of an organic field effect transistor. The surface morphology and molecular orientation of P3HT thin films is observed by atomic force microscope (AFM) and X-Ray diffractometer (XRD). Grains are observed on the CYTOP thin film via an AFM image and the P3HT molecule is oriented perpendicularly on the CYTOP thin film. Based on the performance of the organic field effect transistor, the carrier mobility is 0.092 cm2/Vs, the ON/OFF ratio is 7, and the threshold voltage is -12 V. The ON/OFF ratio is relatively low and to improve On/Off ratio, the CYTOP/Polyimide double gate insulating layer is adopted to OFET.

Experimental study of uniaxial stress effects on Coulomb-limited mobility in p-type metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Kobayashi, Shigeki; Saitoh, Masumi; Nakabayashi, Yukio; Uchida, Ken

2007-11-01

Uniaxial stress effects on Coulomb-limited mobility (μCoulomb) in Si metal-oxide-semiconductor field-effect transistors (MOSFETs) are investigated experimentally. By using the four-point bending method, uniaxial stress corresponding to 0.1% strain is applied to MOSFETs along the channel direction. It is found that μCoulomb in p-type MOSFETs is enhanced greatly by uniaxial stress; μCoulomb is as sensitive as phonon-limited mobility. The high sensitivity of μCoulomb in p-type MOSFETs to stress arises from the stress-induced change of hole effective mass.

High-frequency noise characterization of graphene field effect transistors on SiC substrates

NASA Astrophysics Data System (ADS)

Yu, C.; He, Z. Z.; Song, X. B.; Liu, Q. B.; Dun, S. B.; Han, T. T.; Wang, J. J.; Zhou, C. J.; Guo, J. C.; Lv, Y. J.; Cai, S. J.; Feng, Z. H.

2017-07-01

Considering its high carrier mobility and high saturation velocity, a low-noise amplifier is thought of as being the most attractive analogue application of graphene field-effect transistors. The noise performance of graphene field-effect transistors at frequencies in the K-band remains unknown. In this work, the noise parameters of a graphene transistor are measured from 10 to 26 GHz and noise models are built with the data. The extrinsic minimum noise figure for a graphene transistor reached 1.5 dB, and the intrinsic minimum noise figure was as low as 0.8 dB at a frequency of 10 GHz, which were comparable with the results from tests on Si CMOS and started to approach those for GaAs and InP transistors. Considering the short development time, the current results are a significant step forward for graphene transistors and show their application potential in high-frequency electronics.

Temperature sensitivity analysis of polarity controlled electrostatically doped tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Nigam, Kaushal; Pandey, Sunil; Kondekar, P. N.; Sharma, Dheeraj

2016-09-01

The conventional tunnel field-effect transistors (TFETs) have shown potential to scale down in sub-22 nm regime due to its lower sub-threshold slope and robustness against short-channel effects (SCEs), however, sensitivity towards temperature variation is a major concern. Therefore, for the first time, we investigate temperature sensitivity analysis of a polarity controlled electrostatically doped tunnel field-effect transistor (ED-TFET). Different performance metrics and analog/RF figure-of-merits were considered and compared for both devices, and simulations were performed using Silvaco ATLAS device tool. We found that the variation in ON-state current in ED-TFET is almost temperature independent due to electrostatically doped mechanism, while, it increases in conventional TFET at higher temperature. Above room temperature, the variation in ION, IOFF, and SS sensitivity in ED-TFET are only 0.11%/K, 2.21%/K, and 0.63%/K, while, in conventional TFET the variations are 0.43%/K, 2.99%/K, and 0.71%/K, respectively. However, below room temperature, the variation in ED-TFET ION is 0.195%/K compared to 0.27%/K of conventional TFET. Moreover, it is analysed that the incomplete ionization effect in conventional TFET severely affects the drive current and the threshold voltage, while, ED-TFET remains unaffected. Hence, the proposed ED-TFET is less sensitive towards temperature variation and can be used for cryogenics as well as for high temperature applications.

Improved Field-Effect Transistor Equations for Computer Simulation.

ERIC Educational Resources Information Center

Kidd, Richard; Ardini, James

1979-01-01

Presents a laboratory experiment that was developed to acquaint physics students with field-effect transistor characteristics and circuits. Computer-drawn curves supplementing student laboratory exercises can be generated to provide more permanent, usable data than those taken from a curve tracer. (HM)

Benzocyclobutene (BCB) Polymer as Amphibious Buffer Layer for Graphene Field-Effect Transistor.

PubMed

Wu, Yun; Zou, Jianjun; Huo, Shuai; Lu, Haiyan; Kong, Yuecan; Chen, Tangshen; Wu, Wei; Xu, Jingxia

2015-08-01

Owing to the scattering and trapping effects, the interfaces of dielectric/graphene or substrate/graphene can tailor the performance of field-effect transistor (FET). In this letter, the polymer of benzocyclobutene (BCB) was used as an amphibious buffer layer and located at between the layers of substrate and graphene and between the layers of dielectric and graphene. Interestingly, with the help of nonpolar and hydrophobic BCB buffer layer, the large-scale top-gated, chemical vapor deposited (CVD) graphene transistors was prepared on Si/SiO2 substrate, its cutoff frequency (fT) and the maximum cutoff frequency (fmax) of the graphene field-effect transistor (GFET) can be reached at 12 GHz and 11 GHz, respectively.

Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu Shiyang; Nakajima, Anri; Ohashi, Takuo

2005-12-01

The interface trap generation ({delta}N{sub it}) and fixed oxide charge buildup ({delta}N{sub ot}) under negative bias temperature instability (NBTI) of p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultrathin (2 nm) plasma-nitrided SiON gate dielectrics were studied using a modified direct-current-current-voltage method and a conventional subthreshold characteristic measurement. Different stress time dependences were shown for {delta}N{sub it} and {delta}N{sub ot}. At the earlier stress times, {delta}N{sub it} dominates the threshold voltage shift ({delta}V{sub th}) and {delta}N{sub ot} is negligible. With increasing stress time, the rate of increase of {delta}N{sub it} decreases continuously, showing a saturating trend for longer stress times, while {delta}N{submore » ot} still has a power-law dependence on stress time so that the relative contribution of {delta}N{sub ot} increases. The thermal activation energy of {delta}N{sub it} and the NBTI lifetime of pMOSFETs, compared at a given stress voltage, are independent of the peak nitrogen concentration of the SiON film. This indicates that plasma nitridation is a more reliable method for incorporating nitrogen in the gate oxide.« less

Monte Carlo simulations of spin transport in a strained nanoscale InGaAs field effect transistor

NASA Astrophysics Data System (ADS)

Thorpe, B.; Kalna, K.; Langbein, F. C.; Schirmer, S.

2017-12-01

Spin-based logic devices could operate at a very high speed with a very low energy consumption and hold significant promise for quantum information processing and metrology. We develop a spintronic device simulator by combining an in-house developed, experimentally verified, ensemble self-consistent Monte Carlo device simulator with spin transport based on a Bloch equation model and a spin-orbit interaction Hamiltonian accounting for Dresselhaus and Rashba couplings. It is employed to simulate a spin field effect transistor operating under externally applied voltages on a gate and a drain. In particular, we simulate electron spin transport in a 25 nm gate length In0.7Ga0.3As metal-oxide-semiconductor field-effect transistor with a CMOS compatible architecture. We observe a non-uniform decay of the net magnetization between the source and the gate and a magnetization recovery effect due to spin refocusing induced by a high electric field between the gate and the drain. We demonstrate a coherent control of the polarization vector of the drain current via the source-drain and gate voltages, and show that the magnetization of the drain current can be increased twofold by the strain induced into the channel.

INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Quantum-Mechanical Study on Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Hu, Guang-Xi; Wang, Ling-Li; Liu, Ran; Tang, Ting-Ao; Qiu, Zhi-Jun

2010-10-01

As the channel length of metal-oxide-semiconductor field-effect transistors (MOSFETs) scales into the nanometer regime, quantum mechanical effects are becoming more and more significant. In this work, a model for the surrounding-gate (SG) nMOSFET is developed. The Schrödinger equation is solved analytically. Some of the solutions are verified via results obtained from simulations. It is found that the percentage of the electrons with lighter conductivity mass increases as the silicon body radius decreases, or as the gate voltage reduces, or as the temperature decreases. The centroid of inversion-layer is driven away from the silicon-oxide interface towards the silicon body, therefore the carriers will suffer less scattering from the interface and the electrons effective mobility of the SG nMOSFETs will be enhanced.

Vacuum lamination approach to fabrication of high-performance single-crystal organic field-effect transistors.

PubMed

Yi, H T; Chen, Y; Czelen, K; Podzorov, V

2011-12-22

A novel vacuum lamination approach to fabrication of high-performance single-crystal organic field-effect transistors has been developed. The non-destructive nature of this method allows a direct comparison of field-effect mobilities achieved with various gate dielectrics using the same single-crystal sample. The method also allows gating delicate systems, such as n -type crystals and SAM-coated surfaces, without perturbation. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A hydrogel capsule as gate dielectric in flexible organic field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dumitru, L. M.; Manoli, K.; Magliulo, M.

2015-01-01

A jellified alginate based capsule serves as biocompatible and biodegradable electrolyte system to gate an organic field-effect transistor fabricated on a flexible substrate. Such a system allows operating thiophene based polymer transistors below 0.5 V through an electrical double layer formed across an ion-permeable polymeric electrolyte. Moreover, biological macro-molecules such as glucose-oxidase and streptavidin can enter into the gating capsules that serve also as delivery system. An enzymatic bio-reaction is shown to take place in the capsule and preliminary results on the measurement of the electronic responses promise for low-cost, low-power, flexible electronic bio-sensing applications using capsule-gated organic field-effect transistors.

Strategies for Improving the Performance of Sensors Based on Organic Field-Effect Transistors.

PubMed

Wu, Xiaohan; Mao, Shun; Chen, Junhong; Huang, Jia

2018-04-01

Organic semiconductors (OSCs) have been extensively studied as sensing channel materials in field-effect transistors due to their unique charge transport properties. Stimulation caused by its environmental conditions can readily change the charge-carrier density and mobility of OSCs. Organic field-effect transistors (OFETs) can act as both signal transducers and signal amplifiers, which greatly simplifies the device structure. Over the past decades, various sensors based on OFETs have been developed, including physical sensors, chemical sensors, biosensors, and integrated sensor arrays with advanced functionalities. However, the performance of OFET-based sensors still needs to be improved to meet the requirements from various practical applications, such as high sensitivity, high selectivity, and rapid response speed. Tailoring molecular structures and micro/nanofilm structures of OSCs is a vital strategy for achieving better sensing performance. Modification of the dielectric layer and the semiconductor/dielectric interface is another approach for improving the sensor performance. Moreover, advanced sensory functionalities have been achieved by developing integrated device arrays. Here, a brief review of strategies used for improving the performance of OFET sensors is presented, which is expected to inspire and provide guidance for the design of future OFET sensors for various specific and practical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Nanopore extended field-effect transistor for selective single-molecule biosensing.

PubMed

Ren, Ren; Zhang, Yanjun; Nadappuram, Binoy Paulose; Akpinar, Bernice; Klenerman, David; Ivanov, Aleksandar P; Edel, Joshua B; Korchev, Yuri

2017-09-19

There has been a significant drive to deliver nanotechnological solutions to biosensing, yet there remains an unmet need in the development of biosensors that are affordable, integrated, fast, capable of multiplexed detection, and offer high selectivity for trace analyte detection in biological fluids. Herein, some of these challenges are addressed by designing a new class of nanoscale sensors dubbed nanopore extended field-effect transistor (nexFET) that combine the advantages of nanopore single-molecule sensing, field-effect transistors, and recognition chemistry. We report on a polypyrrole functionalized nexFET, with controllable gate voltage that can be used to switch on/off, and slow down single-molecule DNA transport through a nanopore. This strategy enables higher molecular throughput, enhanced signal-to-noise, and even heightened selectivity via functionalization with an embedded receptor. This is shown for selective sensing of an anti-insulin antibody in the presence of its IgG isotype.Efficient detection of single molecules is vital to many biosensing technologies, which require analytical platforms with high selectivity and sensitivity. Ren et al. combine a nanopore sensor and a field-effect transistor, whereby gate voltage mediates DNA and protein transport through the nanopore.

Nanowire size dependence on sensitivity of silicon nanowire field-effect transistor-based pH sensor

NASA Astrophysics Data System (ADS)

Lee, Ryoongbin; Kwon, Dae Woong; Kim, Sihyun; Kim, Sangwan; Mo, Hyun-Sun; Kim, Dae Hwan; Park, Byung-Gook

2017-12-01

In this study, we investigated the effects of nanowire size on the current sensitivity of silicon nanowire (SiNW) ion-sensitive field-effect transistors (ISFETs). The changes in on-current (I on) and resistance according to pH were measured in fabricated SiNW ISFETs of various lengths and widths. As a result, it was revealed that the sensitivity expressed as relative I on change improves as the width decreases. Through technology computer-aided design (TCAD) simulation analysis, the width dependence on the relative I on change can be explained by the observation that the target molecules located at the edge region along the channel width have a stronger effect on the sensitivity as the SiNW width is reduced. Additionally, the length dependence on the sensitivity can be understood in terms of the resistance ratio of the fixed parasitic resistance, including source/drain resistance, to the varying channel resistance as a function of channel length.

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

NASA Astrophysics Data System (ADS)

Es-Sakhi, Azzedin D.

Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the

Probing organic field effect transistors in situ during operation using SFG.

PubMed

Ye, Hongke; Abu-Akeel, Ashraf; Huang, Jia; Katz, Howard E; Gracias, David H

2006-05-24

In this communication, we report results obtained using surface-sensitive IR+Visible Sum Frequency Generation (SFG) nonlinear optical spectroscopy on interfaces of organic field effect transistors during operation. We observe remarkable correlations between trends in the surface vibrational spectra and electrical properties of the transistor, with changes in gate voltage (VG). These results suggest that field effects on electronic conduction in thin film organic semiconductor devices are correlated to interfacial nonlinear optical characteristics and point to the possibility of using SFG spectroscopy to monitor electronic properties of OFETs.

Reduction of channel resistance in amorphous oxide thin-film transistors with buried layer

NASA Astrophysics Data System (ADS)

Chong, Eugene; Kim, Bosul; Lee, Sang Yeol

2012-04-01

A silicon-indium-zinc-oxide (SIZO) thin film transistor (TFT) with low channel-resistance (RCH) indium-zinc-oxide (In2O3:ZnO = 9:1) buried layer annealed at low temperature of 200°C exhibited high field-effect mobility (μFE) over 55.8 cm2/V·s which is 5 times higher than that of the conventional TFTs due to small threshold voltage (Vth) change of 1.8 V under bias-temperature stress (BTS) condition for 420 minutes. The low-RCH buried-layer allows more strong current-path formed in channel layer well within relatively high-RCH channel-layer since it is less affected by the channel bulk and/or back interface trap with high carrier concentration.

The analysis of ion-selective field-effect transistor operation in chemical sensors

NASA Astrophysics Data System (ADS)

Hotra, Zenon; Holyaka, Roman; Hladun, Michael; Humenuk, Iryna

2003-09-01

In this paper we present the research results of influence of substrate potential in ion-selective field-effect transistors (ISFET) on output signal of chemical sensors, e.g. PH-meters. It is shown that the instability of substrate-source p-n junction bias in well-known chemical sensors, which use grounded reference electrode - ISFET gate, affect on sensor characteristics in negative way. The analytical description and research results of 'substrate effect' on ISFET characteristics are considered.

Enhancement mode GaN-based multiple-submicron channel array gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Wang, Chun-Chi

2018-04-01

To study the function of channel width in multiple-submicron channel array, we fabricated the enhancement mode GaN-based gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) with a channel width of 450 nm and 195 nm, respectively. In view of the enhanced gate controllability in a narrower fin-channel structure, the transconductance was improved from 115 mS/mm to 151 mS/mm, the unit gain cutoff frequency was improved from 6.2 GHz to 6.8 GHz, and the maximum oscillation frequency was improved from 12.1 GHz to 13.1 GHz of the devices with a channel width of 195 nm, compared with the devices with a channel width of 450 nm.

Equivalent input spectrum and drain current spectrum for 1/ƒ noise in short channel MOS transistors

NASA Astrophysics Data System (ADS)

Gentil, P.; Mounib, A.

1981-05-01

Flicker noise in MOS transistors can be evaluated by measuring the spectrum SID of the drain current fluctuation or the spectrum Sve of an equivalent gate fluctuation. We show here that experimental variations of {S I D}/{Sve} are in good agreement with gm2 by considering a model of the transconductance gm which takes into account the variations of the channel carriers mobility with the surface electric field. The model agrees with the experimental results obtained on short channel MOS transistors which exhibit large variations of mobility with the gate voltage. The validity of physical interpretations of noise data on MOS transistors is examined.

Long-term stability assessment of AlGaN/GaN field effect transistors modified with peptides: Device characteristics vs. surface properties

DOE Office of Scientific and Technical Information (OSTI.GOV)