Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu Shiyang; Nakajima, Anri; Ohashi, Takuo

2005-12-01

The interface trap generation ({delta}N{sub it}) and fixed oxide charge buildup ({delta}N{sub ot}) under negative bias temperature instability (NBTI) of p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultrathin (2 nm) plasma-nitrided SiON gate dielectrics were studied using a modified direct-current-current-voltage method and a conventional subthreshold characteristic measurement. Different stress time dependences were shown for {delta}N{sub it} and {delta}N{sub ot}. At the earlier stress times, {delta}N{sub it} dominates the threshold voltage shift ({delta}V{sub th}) and {delta}N{sub ot} is negligible. With increasing stress time, the rate of increase of {delta}N{sub it} decreases continuously, showing a saturating trend for longer stress times, while {delta}N{submore » ot} still has a power-law dependence on stress time so that the relative contribution of {delta}N{sub ot} increases. The thermal activation energy of {delta}N{sub it} and the NBTI lifetime of pMOSFETs, compared at a given stress voltage, are independent of the peak nitrogen concentration of the SiON film. This indicates that plasma nitridation is a more reliable method for incorporating nitrogen in the gate oxide.« less

INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Quantum-Mechanical Study on Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Hu, Guang-Xi; Wang, Ling-Li; Liu, Ran; Tang, Ting-Ao; Qiu, Zhi-Jun

2010-10-01

As the channel length of metal-oxide-semiconductor field-effect transistors (MOSFETs) scales into the nanometer regime, quantum mechanical effects are becoming more and more significant. In this work, a model for the surrounding-gate (SG) nMOSFET is developed. The Schrödinger equation is solved analytically. Some of the solutions are verified via results obtained from simulations. It is found that the percentage of the electrons with lighter conductivity mass increases as the silicon body radius decreases, or as the gate voltage reduces, or as the temperature decreases. The centroid of inversion-layer is driven away from the silicon-oxide interface towards the silicon body, therefore the carriers will suffer less scattering from the interface and the electrons effective mobility of the SG nMOSFETs will be enhanced.

Experimental study of uniaxial stress effects on Coulomb-limited mobility in p-type metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Kobayashi, Shigeki; Saitoh, Masumi; Nakabayashi, Yukio; Uchida, Ken

2007-11-01

Uniaxial stress effects on Coulomb-limited mobility (μCoulomb) in Si metal-oxide-semiconductor field-effect transistors (MOSFETs) are investigated experimentally. By using the four-point bending method, uniaxial stress corresponding to 0.1% strain is applied to MOSFETs along the channel direction. It is found that μCoulomb in p-type MOSFETs is enhanced greatly by uniaxial stress; μCoulomb is as sensitive as phonon-limited mobility. The high sensitivity of μCoulomb in p-type MOSFETs to stress arises from the stress-induced change of hole effective mass.

SOI metal-oxide-semiconductor field-effect transistor photon detector based on single-hole counting.

PubMed

Du, Wei; Inokawa, Hiroshi; Satoh, Hiroaki; Ono, Atsushi

2011-08-01

In this Letter, a scaled-down silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) is characterized as a photon detector, where photogenerated individual holes are trapped below the negatively biased gate and modulate stepwise the electron current flowing in the bottom channel induced by the positive substrate bias. The output waveforms exhibit clear separation of current levels corresponding to different numbers of trapped holes. Considering this capability of single-hole counting, a small dark count of less than 0.02 s(-1) at room temperature, and low operation voltage of 1 V, SOI MOSFET could be a unique photon-number-resolving detector if the small quantum efficiency were improved. © 2011 Optical Society of America

Enhancement mode GaN-based multiple-submicron channel array gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors

NASA Astrophysics Data System (ADS)

Lee, Ching-Ting; Wang, Chun-Chi

2018-04-01

To study the function of channel width in multiple-submicron channel array, we fabricated the enhancement mode GaN-based gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) with a channel width of 450 nm and 195 nm, respectively. In view of the enhanced gate controllability in a narrower fin-channel structure, the transconductance was improved from 115 mS/mm to 151 mS/mm, the unit gain cutoff frequency was improved from 6.2 GHz to 6.8 GHz, and the maximum oscillation frequency was improved from 12.1 GHz to 13.1 GHz of the devices with a channel width of 195 nm, compared with the devices with a channel width of 450 nm.

Ultrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yokoyama, Masafumi, E-mail: yokoyama@mosfet.t.u-tokyo.ac.jp; Takenaka, Mitsuru; Takagi, Shinichi

2015-02-16

We have realized ultrathin body GaSb-on-insulator (GaSb-OI) on Si wafers by direct wafer bonding technology using atomic-layer deposition (ALD) Al{sub 2}O{sub 3} and have demonstrated GaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Si. A 23-nm-thick GaSb-OI p-MOSFET exhibits the peak effective mobility of ∼76 cm{sup 2}/V s. We have found that the effective hole mobility of the thin-body GaSb-OI p-MOSFETs decreases with a decrease in the GaSb-OI thickness or with an increase in Al{sub 2}O{sub 3} ALD temperature. The InAs passivation of GaSb-OI MOS interfaces can enhance the peak effective mobility up to 159 cm{sup 2}/V s for GaSb-OI p-MOSFETs with themore » 20-nm-thick GaSb layer.« less

The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

NASA Astrophysics Data System (ADS)

Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

2008-11-01

Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

PubMed

Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2018-05-08

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

PbSe Nanocrystal Solids for n- and p-Channel Thin Film Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Talapin, Dmitri V.; Murray, Christopher B.

2005-10-01

Initially poorly conducting PbSe nanocrystal solids (quantum dot arrays or superlattices) can be chemically ``activated'' to fabricate n- and p-channel field effect transistors with electron and hole mobilities of 0.9 and 0.2 square centimeters per volt-second, respectively; with current modulations of about 103 to 104; and with current density approaching 3 × 104 amperes per square centimeter. Chemical treatments engineer the interparticle spacing, electronic coupling, and doping while passivating electronic traps. These nanocrystal field-effect transistors allow reversible switching between n- and p-transport, providing options for complementary metal oxide semiconductor circuits and enabling a range of low-cost, large-area electronic, optoelectronic, thermoelectric, and sensing applications.

Atomic layer deposition of insulating nitride interfacial layers for germanium metal oxide semiconductor field effect transistors with high-κ oxide/tungsten nitride gate stacks

NASA Astrophysics Data System (ADS)

Kim, Kyoung H.; Gordon, Roy G.; Ritenour, Andrew; Antoniadis, Dimitri A.

2007-05-01

Atomic layer deposition (ALD) was used to deposit passivating interfacial nitride layers between Ge and high-κ oxides. High-κ oxides on Ge surfaces passivated by ultrathin (1-2nm) ALD Hf3N4 or AlN layers exhibited well-behaved C-V characteristics with an equivalent oxide thickness as low as 0.8nm, no significant flatband voltage shifts, and midgap density of interface states values of 2×1012cm-1eV-1. Functional n-channel and p-channel Ge field effect transistors with nitride interlayer/high-κ oxide/metal gate stacks are demonstrated.

Abnormal threshold voltage shift under hot carrier stress in Ti1-xNx/HfO2 p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Tsai, Jyun-Yu; Chang, Ting-Chang; Lo, Wen-Hung; Ho, Szu-Han; Chen, Ching-En; Chen, Hua-Mao; Tseng, Tseung-Yuen; Tai, Ya-Hsiang; Cheng, Osbert; Huang, Cheng-Tung

2013-09-01

This work investigates the channel hot carrier (CHC) effect in HfO2/Ti1-xNx p-channel metal oxide semiconductor field effect transistors (p-MOSFETs). Generally, the subthreshold swing (S.S.) should increase during CHC stress (CHCS), since interface states will be generated near the drain side under high electric field due to drain voltage (Vd). However, our experimental data indicate that S.S. has no evident change under CHCS, but threshold voltage (Vth) shifts positively. This result can be attributed to hot carrier injected into high-k dielectric near the drain side. Meanwhile, it is surprising that such Vth degradation is not observed in the saturation region during stress. Therefore, drain-induced-barrier-lowering (DIBL) as a result of CHC-induced electron trapping is proposed to explain the different Vth behaviors in the linear and saturation regions. Additionally, the influence of different nitrogen concentrations in HfO2/Ti1-xNx p-MOSFETs on CHCS is also investigated in this work. Since nitrogen diffuses to SiO2/Si interface induced pre-Nit occurring to degrades channel mobility during the annealing process, a device with more nitrogen shows slightly less impact ionization, leading to insignificant charge trapping-induced DIBL behavior.

Radiation hardness of β-Ga2O3 metal-oxide-semiconductor field-effect transistors against gamma-ray irradiation

NASA Astrophysics Data System (ADS)

Wong, Man Hoi; Takeyama, Akinori; Makino, Takahiro; Ohshima, Takeshi; Sasaki, Kohei; Kuramata, Akito; Yamakoshi, Shigenobu; Higashiwaki, Masataka

2018-01-01

The effects of ionizing radiation on β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) were investigated. A gamma-ray tolerance as high as 1.6 MGy(SiO2) was demonstrated for the bulk Ga2O3 channel by virtue of weak radiation effects on the MOSFETs' output current and threshold voltage. The MOSFETs remained functional with insignificant hysteresis in their transfer characteristics after exposure to the maximum cumulative dose. Despite the intrinsic radiation hardness of Ga2O3, radiation-induced gate leakage and drain current dispersion ascribed respectively to dielectric damage and interface charge trapping were found to limit the overall radiation hardness of these devices.

Near interface traps in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors monitored by temperature dependent gate current transient measurements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fiorenza, Patrick; La Magna, Antonino; Vivona, Marilena

This letter reports on the impact of gate oxide trapping states on the conduction mechanisms in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors (MOSFETs). The phenomena were studied by gate current transient measurements, performed on n-channel MOSFETs operated in “gate-controlled-diode” configuration. The measurements revealed an anomalous non-steady conduction under negative bias (V{sub G} > |20 V|) through the SiO{sub 2}/4H-SiC interface. The phenomenon was explained by the coexistence of a electron variable range hopping and a hole Fowler-Nordheim (FN) tunnelling. A semi-empirical modified FN model with a time-depended electric field is used to estimate the near interface traps in the gate oxide (N{sub trap} ∼ 2 × 10{supmore » 11} cm{sup −2}).« less

Differential-Mode Biosensor Using Dual Extended-Gate Metal-Oxide-Semiconductor Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Choi, Jinhyeon; Lee, Hee Ho; Ahn, Jungil; Seo, Sang-Ho; Shin, Jang-Kyoo

2012-06-01

In this paper, we present a differential-mode biosensor using dual extended-gate metal-oxide-semiconductor field-effect transistors (MOSFETs), which possesses the advantages of both the extended-gate structure and the differential-mode operation. The extended-gate MOSFET was fabricated using a 0.6 µm standard complementary metal oxide semiconductor (CMOS) process. The Au extended gate is the sensing gate on which biomolecules are immobilized, while the Pt extended gate is the dummy gate for use in the differential-mode detection circuit. The differential-mode operation offers many advantages such as insensitivity to the variation of temperature and light, as well as low noise. The outputs were measured using a semiconductor parameter analyzer in a phosphate buffered saline (PBS; pH 7.4) solution. A standard Ag/AgCl reference electrode was used to apply the gate bias. We measured the variation of output voltage with time, temperature, and light intensity. The bindings of self-assembled monolayer (SAM), streptavidin, and biotin caused a variation in the output voltage of the differential-mode detection circuit and this was confirmed by surface plasmon resonance (SPR) experiment. Biotin molecules could be detected up to a concentration of as low as 0.001 µg/ml.

Statistical analysis of relationship between negative-bias temperature instability and random telegraph noise in small p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Tega, Naoki; Miki, Hiroshi; Mine, Toshiyuki; Ohmori, Kenji; Yamada, Keisaku

2014-03-01

It is demonstrated from a statistical perspective that the generation of random telegraph noise (RTN) changes before and after the application of negative-bias temperature instability (NBTI) stress. The NBTI stress generates a large number of permanent interface traps and, at the same time, a large number of RTN traps causing temporary RTN and one-time RTN. The interface trap and the RTN trap show different features in the recovery process. That is, a re-passivation of interface states is the minor cause of the recovery after the NBTI stress, and in contrast, rapid disappearance of the temporary RTN and the one-time RTN is the main cause of the recovery. The RTN traps are less likely to become permanent. This two-type trap, namely, the interface trap and RTN trap, model simply explains NBTI degradation and recovery in scaled p-channel metal-oxide-semiconductor field-effect transistors.

Low temperature processed complementary metal oxide semiconductor (CMOS) device by oxidation effect from capping layer.

PubMed

Wang, Zhenwei; Al-Jawhari, Hala A; Nayak, Pradipta K; Caraveo-Frescas, J A; Wei, Nini; Hedhili, M N; Alshareef, H N

2015-04-20

In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190 °C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

NASA Astrophysics Data System (ADS)

Held, Martin; Schießl, Stefan P.; Miehler, Dominik; Gannott, Florentina; Zaumseil, Jana

2015-08-01

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.

Metal oxide semiconductor thin-film transistors for flexible electronics

NASA Astrophysics Data System (ADS)

Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

2016-06-01

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular

Metal oxide semiconductor thin-film transistors for flexible electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Petti, Luisa; Vogt, Christian; Büthe, Lars

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This reviewmore » reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In

Gate voltage dependent 1/f noise variance model based on physical noise generation mechanisms in n-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Arai, Yukiko; Aoki, Hitoshi; Abe, Fumitaka; Todoroki, Shunichiro; Khatami, Ramin; Kazumi, Masaki; Totsuka, Takuya; Wang, Taifeng; Kobayashi, Haruo

2015-04-01

1/f noise is one of the most important characteristics for designing analog/RF circuits including operational amplifiers and oscillators. We have analyzed and developed a novel 1/f noise model in the strong inversion, saturation, and sub-threshold regions based on SPICE2 type model used in any public metal-oxide-semiconductor field-effect transistor (MOSFET) models developed by the University of California, Berkeley. Our model contains two noise generation mechanisms that are mobility and interface trap number fluctuations. Noise variability dependent on gate voltage is also newly implemented in our model. The proposed model has been implemented in BSIM4 model of a SPICE3 compatible circuit simulator. Parameters of the proposed model are extracted with 1/f noise measurements for simulation verifications. The simulation results show excellent agreements between measurement and simulations.

Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lei, Dian; Wang, Wei; Gong, Xiao, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org

2016-01-14

The effect of room temperature sulfur passivation of the surface of Ge{sub 0.83}Sn{sub 0.17} prior to high-k dielectric (HfO{sub 2}) deposition is investigated. X-ray photoelectron spectroscopy (XPS) was used to examine the chemical bonding at the interface of HfO{sub 2} and Ge{sub 0.83}Sn{sub 0.17}. Sulfur passivation is found to be effective in suppressing the formation of both Ge oxides and Sn oxides. A comparison of XPS results for sulfur-passivated and non-passivated Ge{sub 0.83}Sn{sub 0.17} samples shows that sulfur passivation of the GeSn surface could also suppress the surface segregation of Sn atoms. In addition, sulfur passivation reduces the interface trapmore » density D{sub it} at the high-k dielectric/Ge{sub 0.83}Sn{sub 0.17} interface from the valence band edge to the midgap of Ge{sub 0.83}Sn{sub 0.17}, as compared with a non-passivated control. The impact of the improved D{sub it} is demonstrated in Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs). Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs with sulfur passivation show improved subthreshold swing S, intrinsic transconductance G{sub m,int}, and effective hole mobility μ{sub eff} as compared with the non-passivated control. At a high inversion carrier density N{sub inv} of 1 × 10{sup 13 }cm{sup −2}, sulfur passivation increases μ{sub eff} by 25% in Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs.« less

Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

PubMed Central

Wang, Zhenwei; Al-Jawhari, Hala A.; Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wei, Nini; Hedhili, M. N.; Alshareef, H. N.

2015-01-01

In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field. PMID:25892711

All-Graphene Planar Self-Switching MISFEDs, Metal-Insulator-Semiconductor Field-Effect Diodes

PubMed Central

Al-Dirini, Feras; Hossain, Faruque M.; Nirmalathas, Ampalavanapillai; Skafidas, Efstratios

2014-01-01

Graphene normally behaves as a semimetal because it lacks a bandgap, but when it is patterned into nanoribbons a bandgap can be introduced. By varying the width of these nanoribbons this band gap can be tuned from semiconducting to metallic. This property allows metallic and semiconducting regions within a single Graphene monolayer, which can be used in realising two-dimensional (2D) planar Metal-Insulator-Semiconductor field effect devices. Based on this concept, we present a new class of nano-scale planar devices named Graphene Self-Switching MISFEDs (Metal-Insulator-Semiconductor Field-Effect Diodes), in which Graphene is used as the metal and the semiconductor concurrently. The presented devices exhibit excellent current-voltage characteristics while occupying an ultra-small area with sub-10 nm dimensions and an ultimate thinness of a single atom. Quantum mechanical simulation results, based on the Extended Huckel method and Nonequilibrium Green's Function Formalism, show that a Graphene Self-Switching MISFED with a channel as short as 5 nm can achieve forward-to-reverse current rectification ratios exceeding 5000. PMID:24496307

Effects of substrate voltage on noise characteristics and hole lifetime in SOI metal-oxide-semiconductor field-effect transistor photon detector.

PubMed

Putranto, Dedy Septono Catur; Priambodo, Purnomo Sidi; Hartanto, Djoko; Du, Wei; Satoh, Hiroaki; Ono, Atsushi; Inokawa, Hiroshi

2014-09-08

Low-frequency noise and hole lifetime in silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) are analyzed, considering their use in photon detection based on single-hole counting. The noise becomes minimum at around the transition point between front- and back-channel operations when the substrate voltage is varied, and increases largely on both negative and positive sides of the substrate voltage showing peculiar Lorentzian (generation-recombination) noise spectra. Hole lifetime is evaluated by the analysis of drain current histogram at different substrate voltages. It is found that the peaks in the histogram corresponding to the larger number of stored holes become higher as the substrate bias becomes larger. This can be attributed to the prolonged lifetime caused by the higher electric field inside the body of SOI MOSFET. It can be concluded that, once the inversion channel is induced for detection of the photo-generated holes, the small absolute substrate bias is favorable for short lifetime and low noise, leading to high-speed operation.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Held, Martin; Schießl, Stefan P.; Gannott, Florentina

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states atmore » the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.« less

AlGaN channel field effect transistors with graded heterostructure ohmic contacts

NASA Astrophysics Data System (ADS)

Bajaj, Sanyam; Akyol, Fatih; Krishnamoorthy, Sriram; Zhang, Yuewei; Rajan, Siddharth

2016-09-01

We report on ultra-wide bandgap (UWBG) Al0.75Ga0.25N channel metal-insulator-semiconductor field-effect transistors (MISFETs) with heterostructure engineered low-resistance ohmic contacts. The low intrinsic electron affinity of AlN (0.6 eV) leads to large Schottky barriers at the metal-AlGaN interface, resulting in highly resistive ohmic contacts. In this work, we use a reverse compositional graded n++ AlGaN contact layer to achieve upward electron affinity grading, leading to a low specific contact resistance (ρsp) of 1.9 × 10-6 Ω cm2 to n-Al0.75Ga0.25N channels (bandgap ˜5.3 eV) with non-alloyed contacts. We also demonstrate UWBG Al0.75Ga0.25N channel MISFET device operation employing the compositional graded n++ ohmic contact layer and 20 nm atomic layer deposited Al2O3 as the gate-dielectric.

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2016-06-09

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

Fabricating metal-oxide-semiconductor field-effect transistors on a polyethylene terephthalate substrate by applying low-temperature layer transfer of a single-crystalline silicon layer by meniscus force

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sakaike, Kohei; Akazawa, Muneki; Nakamura, Shogo

2013-12-02

A low-temperature local-layer technique for transferring a single-crystalline silicon (c-Si) film by using a meniscus force was proposed, and an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) was fabricated on polyethylene terephthalate (PET) substrate. It was demonstrated that it is possible to transfer and form c-Si films in the required shape at the required position on PET substrates at extremely low temperatures by utilizing a meniscus force. The proposed technique for layer transfer was applied for fabricating high-performance c-Si MOSFETs on a PET substrate. The fabricated MOSFET showed a high on/off ratio of more than 10{sup 8} and a high field-effect mobilitymore » of 609 cm{sup 2} V{sup −1} s{sup −1}.« less

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lu, Anh Khoa Augustin; IMEC, 75 Kapeldreef, B-3001 Leuven; Pourtois, Geoffrey

2016-01-25

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, andmore » sets the limit of the scaling in future transistor designs.« less

Influence of quantizing magnetic field and Rashba effect on indium arsenide metal-oxide-semiconductor structure accumulation capacitance

NASA Astrophysics Data System (ADS)

Kovchavtsev, A. P.; Aksenov, M. S.; Tsarenko, A. V.; Nastovjak, A. E.; Pogosov, A. G.; Pokhabov, D. A.; Tereshchenko, O. E.; Valisheva, N. A.

2018-05-01

The accumulation capacitance oscillations behavior in the n-InAs metal-oxide-semiconductor structures with different densities of the built-in charge (Dbc) and the interface traps (Dit) at temperature 4.2 K in the magnetic field (B) 2-10 T, directed perpendicular to the semiconductor-dielectric interface, is studied. A decrease in the oscillation frequency and an increase in the capacitance oscillation amplitude are observed with the increase in B. At the same time, for a certain surface accumulation band bending, the influence of the Rashba effect, which is expressed in the oscillations decay and breakdown, is traced. The experimental capacitance-voltage curves are in a good agreement with the numeric simulation results of the self-consistent solution of Schrödinger and Poisson equations in the magnetic field, taking into account the quantization, nonparabolicity of dispersion law, and Fermi-Dirac electron statistics, with the allowance for the Rashba effect. The Landau quantum level broadening in a two-dimensional electron gas (Lorentzian-shaped density of states), due to the electron scattering mechanism, linearly depends on the magnetic field. The correlation between the interface electronic properties and the characteristic scattering times was established.

Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate Switching Time Analysis

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Macleod, Todd C.; Ho, Fat D.

2006-01-01

Previous research investigated the modeling of a N Wga te constructed of Metal-Ferroelectric- Semiconductor Field-Effect Transistors (MFSFETs) to obtain voltage transfer curves. The NAND gate was modeled using n-channel MFSFETs with positive polarization for the standard CMOS n-channel transistors and n-channel MFSFETs with negative polarization for the standard CMOS p-channel transistors. This paper investigates the MFSFET NAND gate switching time propagation delay, which is one of the other important parameters required to characterize the performance of a logic gate. Initially, the switching time of an inverter circuit was analyzed. The low-to-high and high-to-low propagation time delays were calculated. During the low-to-high transition, the negatively polarized transistor pulls up the output voltage, and during the high-to-low transition, the positively polarized transistor pulls down the output voltage. The MFSFETs were simulated by using a previously developed model which utilized a partitioned ferroelectric layer. Then the switching time of a 2-input NAND gate was analyzed similarly to the inverter gate. Extension of this technique to more complicated logic gates using MFSFETs will be studied.

The AMOS cell - An improved metal-semiconductor solar cell. [Antireflection coated Metal Oxide Semiconductor

NASA Technical Reports Server (NTRS)

Stirn, R. J.; Yeh, Y.-C. M.

1975-01-01

A new fabrication process is being developed which significantly improves the efficiency of metal-semiconductor solar cells. The resultant effect, a marked increase in the open-circuit voltage, is produced by the addition of an interfacial layer oxide on the semiconductor. Cells using gold on n-type gallium arsenide have been made in small areas (0.17 sq cm) with conversion efficiencies of 15% in terrestrial sunlight.

Large Lateral Photovoltaic Effect in Metal-(Oxide-) Semiconductor Structures

PubMed Central

Yu, Chongqi; Wang, Hui

2010-01-01

The lateral photovoltaic effect (LPE) can be used in position-sensitive detectors to detect very small displacements due to its output of lateral photovoltage changing linearly with light spot position. In this review, we will summarize some of our recent works regarding LPE in metal-semiconductor and metal-oxide-semiconductor structures, and give a theoretical model of LPE in these two structures. PMID:22163463

Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat Duen

2005-01-01

Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

Silicon carbide: A unique platform for metal-oxide-semiconductor physics

NASA Astrophysics Data System (ADS)

Liu, Gang; Tuttle, Blair R.; Dhar, Sarit

2015-06-01

A sustainable energy future requires power electronics that can enable significantly higher efficiencies in the generation, distribution, and usage of electrical energy. Silicon carbide (4H-SiC) is one of the most technologically advanced wide bandgap semiconductor that can outperform conventional silicon in terms of power handling, maximum operating temperature, and power conversion efficiency in power modules. While SiC Schottky diode is a mature technology, SiC power Metal Oxide Semiconductor Field Effect Transistors are relatively novel and there is large room for performance improvement. Specifically, major initiatives are under way to improve the inversion channel mobility and gate oxide stability in order to further reduce the on-resistance and enhance the gate reliability. Both problems relate to the defects near the SiO2/SiC interface, which have been the focus of intensive studies for more than a decade. Here we review research on the SiC MOS physics and technology, including its brief history, the state-of-art, and the latest progress in this field. We focus on the two main scientific problems, namely, low channel mobility and bias temperature instability. The possible mechanisms behind these issues are discussed at the device physics level as well as the atomic scale, with the support of published physical analysis and theoretical studies results. Some of the most exciting recent progress in interface engineering for improving the channel mobility and fundamental understanding of channel transport is reviewed.

Analysis of electric field distribution in GaAs metal-semiconductor field effect transistor with a field-modulating plate

NASA Astrophysics Data System (ADS)

Hori, Yasuko; Kuzuhara, Masaaki; Ando, Yuji; Mizuta, Masashi

2000-04-01

Electric field distribution in the channel of a field effect transistor (FET) with a field-modulating plate (FP) has been theoretically investigated using a two-dimensional ensemble Monte Carlo simulation. This analysis revealed that the introduction of FP is effective in canceling the influence of surface traps under forward bias conditions and in reducing the electric field intensity at the drain side of the gate edge under pinch-off bias conditions. This study also found that a partial overlap of the high-field region under the gate and that at the FP electrode is important for reducing the electric field intensity. The optimized metal-semiconductor FET with FP (FPFET) (LGF˜0.2 μm) exhibited a much lower peak electric field intensity than a conventional metal-semiconductor FET. Based on these numerically calculated results, we have proposed a design procedure to optimize the power FPFET structure with extremely high breakdown voltages while maintaining reasonable gain performance.

Dual passivation of intrinsic defects at the compound semiconductor/oxide interface using an oxidant and a reductant.

PubMed

Kent, Tyler; Chagarov, Evgeniy; Edmonds, Mary; Droopad, Ravi; Kummel, Andrew C

2015-05-26

Studies have shown that metal oxide semiconductor field-effect transistors fabricated utilizing compound semiconductors as the channel are limited in their electrical performance. This is attributed to imperfections at the semiconductor/oxide interface which cause electronic trap states, resulting in inefficient modulation of the Fermi level. The physical origin of these states is still debated mainly because of the difficulty in assigning a particular electronic state to a specific physical defect. To gain insight into the exact source of the electronic trap states, density functional theory was employed to model the intrinsic physical defects on the InGaAs (2 × 4) surface and to model the effective passivation of these defects by utilizing both an oxidant and a reductant to eliminate metallic bonds and dangling-bond-induced strain at the interface. Scanning tunneling microscopy and spectroscopy were employed to experimentally determine the physical and electronic defects and to verify the effectiveness of dual passivation with an oxidant and a reductant. While subsurface chemisorption of oxidants on compound semiconductor substrates can be detrimental, it has been shown theoretically and experimentally that oxidants are critical to removing metallic defects at oxide/compound semiconductor interfaces present in nanoscale channels, oxides, and other nanostructures.

Ionic Liquid Activation of Amorphous Metal-Oxide Semiconductors for Flexible Transparent Electronic Devices

DOE PAGES

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...

2016-02-09

To begin this abstract, amorphous metal-oxide semiconductors offer the high carrier mobilities and excellent large-area uniformity required for high performance, transparent, flexible electronic devices; however, a critical bottleneck to their widespread implementation is the need to activate these materials at high temperatures which are not compatible with flexible polymer substrates. The highly controllable activation of amorphous indium gallium zinc oxide semiconductor channels using ionic liquid gating at room temperature is reported. Activation is controlled by electric field-induced oxygen migration across the ionic liquid-semiconductor interface. In addition to activation of unannealed devices, it is shown that threshold voltages of a transistormore » can be linearly tuned between the enhancement and depletion modes. Finally, the first ever example of transparent flexible thin film metal oxide transistor on a polyamide substrate created using this simple technique is demonstrated. Finally, this study demonstrates the potential of field-induced activation as a promising alternative to traditional postdeposition thermal annealing which opens the door to wide scale implementation into flexible electronic applications.« less

An Overview of High-k Oxides on Hydrogenated-Diamond for Metal-Oxide-Semiconductor Capacitors and Field-Effect Transistors.

PubMed

Liu, Jiangwei; Koide, Yasuo

2018-06-04

Thanks to its excellent intrinsic properties, diamond is promising for applications of high-power electronic devices, ultraviolet detectors, biosensors, high-temperature tolerant gas sensors, etc. Here, an overview of high- k oxides on hydrogenated-diamond (H-diamond) for metal-oxide-semiconductor (MOS) capacitors and MOS field-effect transistors (MOSFETs) is demonstrated. Fabrication routines for the H-diamond MOS capacitors and MOSFETs, band configurations of oxide/H-diamond heterointerfaces, and electrical properties of the MOS and MOSFETs are summarized and discussed. High- k oxide insulators are deposited using atomic layer deposition (ALD) and sputtering deposition (SD) techniques. Electrical properties of the H-diamond MOS capacitors with high- k oxides of ALD-Al₂O₃, ALD-HfO₂, ALD-HfO₂/ALD-Al₂O₃ multilayer, SD-HfO₂/ALD-HfO₂ bilayer, SD-TiO₂/ALD-Al₂O₃ bilayer, and ALD-TiO₂/ALD-Al₂O₃ bilayer are discussed. Analyses for capacitance-voltage characteristics of them show that there are low fixed and trapped charge densities for the ALD-Al₂O₃/H-diamond and SD-HfO₂/ALD-HfO₂/H-diamond MOS capacitors. The k value of 27.2 for the ALD-TiO₂/ALD-Al₂O₃ bilayer is larger than those of the other oxide insulators. Drain-source current versus voltage curves show distinct pitch-off and p -type channel characteristics for the ALD-Al₂O₃/H-diamond, SD-HfO₂/ALD-HfO₂/H-diamond, and ALD-TiO₂/ALD-Al₂O₃/H-diamond MOSFETs. Understanding of fabrication routines and electrical properties for the high- k oxide/H-diamond MOS electronic devices is meaningful for the fabrication of high-performance H-diamond MOS capacitor and MOSFET gas sensors.

CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES: Switching Characteristics of Phase Change Memory Cell Integrated with Metal-Oxide Semiconductor Field Effect Transistor

NASA Astrophysics Data System (ADS)

Xu, Cheng; Liu, Bo; Chen, Yi-Feng; Liang, Shuang; Song, Zhi-Tang; Feng, Song-Lin; Wan, Xu-Dong; Yang, Zuo-Ya; Xie, Joseph; Chen, Bomy

2008-05-01

A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0. 18 μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.

Single photon sources in 4H-SiC metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Abe, Y.; Umeda, T.; Okamoto, M.; Kosugi, R.; Harada, S.; Haruyama, M.; Kada, W.; Hanaizumi, O.; Onoda, S.; Ohshima, T.

2018-01-01

We present single photon sources (SPSs) embedded in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). They are formed in the SiC/SiO2 interface regions of wet-oxidation C-face 4H-SiC MOSFETs and were not found in other C-face and Si-face MOSFETs. Their bright room-temperature photoluminescence (PL) was observed in the range from 550 to 750 nm and revealed variable multi-peak structures as well as variable peak shifts. We characterized a wide variety of their PL spectra as the inevitable variation of local atomic structures at the interface. Their polarization dependence indicates that they are formed at the SiC side of the interface. We also demonstrate that it is possible to switch on/off the SPSs by a bias voltage of the MOSFET.

Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

NASA Astrophysics Data System (ADS)

Kao, Wei-Chieh

Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

N-Channel field-effect transistors with floating gates for extracellular recordings.

PubMed

Meyburg, Sven; Goryll, Michael; Moers, Jürgen; Ingebrandt, Sven; Böcker-Meffert, Simone; Lüth, Hans; Offenhäusser, Andreas

2006-01-15

A field-effect transistor (FET) for recording extracellular signals from electrogenic cells is presented. The so-called floating gate architecture combines a complementary metal oxide semiconductor (CMOS)-type n-channel transistor with an independent sensing area. This concept allows the transistor and sensing area to be optimised separately. The devices are robust and can be reused several times. The noise level of the devices was smaller than of comparable non-metallised gate FETs. In addition to the usual drift of FET devices, we observed a long-term drift that has to be controlled for future long-term measurements. The device performance for extracellular signal recording was tested using embryonic rat cardiac myocytes cultured on fibronectin-coated chips. The extracellular cell signals were recorded before and after the addition of the cardioactive isoproterenol. The signal shapes of the measured action potentials were comparable to the non-metallised gate FETs previously used in similar experiments. The fabrication of the devices involved the process steps of standard CMOS that were necessary to create n-channel transistors. The implementation of a complete CMOS process would facilitate the integration of the logical circuits necessary for signal pre-processing on a chip, which is a prerequisite for a greater number of sensor spots in future layouts.

Comparative Study on Graded-Barrier AlxGa1‑xN/AlN/GaN/Si Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistor by Using Ultrasonic Spray Pyrolysis Deposition Technique

NASA Astrophysics Data System (ADS)

Lee, Ching-Sung; Hsu, Wei-Chou; Huang, Yi-Ping; Liu, Han-Yin; Yang, Wen-Luh; Yang, Shen-Tin

2018-06-01

Comparative study on a novel Al2O3-dielectric graded-barrier (GB) AlxGa1‑xN/AlN/GaN/Si (x = 0.22 ∼ 0.3) metal-oxide-semiconductor heterostructure field-effect transistor (MOS-HFET) formed by using the ultrasonic spray pyrolysis deposition (USPD) technique has been made with respect to a conventional-barrier (CB) Al0.26Ga0.74N/AlN/GaN/Si MOS-HFET and the reference Schottky-gate HFET devices. The GB AlxGa1‑xN was devised to improve the interfacial quality and enhance the Schottky barrier height at the same time. A cost-effective ultrasonic spray pyrolysis deposition (USPD) method was used to form the high-k Al2O3 gate dielectric and surface passivation on the AlGaN barrier of the present MOS-HFETs. Comprehensive device performances, including maximum extrinsic transconductance (g m,max), maximum drain-source current density (I DS,max), gate-voltage swing (GVS) linearity, breakdown voltages, subthreshold swing (SS), on/off current ratio (I on /I off ), high frequencies, and power performance are investigated.

Thin Film Complementary Metal Oxide Semiconductor (CMOS) Device Using a Single-Step Deposition of the Channel Layer

PubMed Central

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wang, Zhenwei; Hedhili, M. N.; Wang, Q. X.; Alshareef, H. N.

2014-01-01

We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n- and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350°C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications. PMID:24728223

Simulation study of short-channel effects of tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Fukuda, Koichi; Asai, Hidehiro; Hattori, Junichi; Mori, Takahiro; Morita, Yukinori; Mizubayashi, Wataru; Masahara, Meishoku; Migita, Shinji; Ota, Hiroyuki; Endo, Kazuhiro; Matsukawa, Takashi

2018-04-01

Short-channel effects of tunnel field-effect transistors (FETs) are investigated in detail using simulations of a nonlocal band-to-band tunneling model. Discussion is limited to silicon. Several simulation scenarios were considered to address different effects, such as source overlap and drain offset effects. Adopting the drain offset to suppress the drain leakage current suppressed the short channel effects. The physical mechanism underlying the short-channel behavior of the tunnel FETs (TFETs) was very different from that of metal-oxide-semiconductor FETs (MOSFETs). The minimal gate lengths that do not lose on-state current by one order are shown to be 3 nm for single-gate structures and 2 nm for double gate structures, as determined from the drain offset structure.

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

NASA Astrophysics Data System (ADS)

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-02-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current

PubMed Central

Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

2016-01-01

Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters. PMID:26842997

Metal-semiconductor barrier modulation for high photoresponse in transition metal dichalcogenide field effect transistors.

PubMed

Li, Hua-Min; Lee, Dae-Yeong; Choi, Min Sup; Qu, Deshun; Liu, Xiaochi; Ra, Chang-Ho; Yoo, Won Jong

2014-02-10

A gate-controlled metal-semiconductor barrier modulation and its effect on carrier transport were investigated in two-dimensional (2D) transition metal dichalcogenide (TMDC) field effect transistors (FETs). A strong photoresponse was observed in both unipolar MoS2 and ambipolar WSe2 FETs (i) at the high drain voltage due to a high electric field along the channel for separating photo-excited charge carriers and (ii) at the certain gate voltage due to the optimized barriers for the collection of photo-excited charge carriers at metal contacts. The effective barrier height between Ti/Au and TMDCs was estimated by a low temperature measurement. An ohmic contact behavior and drain-induced barrier lowering (DIBL) were clearly observed in MoS2 FET. In contrast, a Schottky-to-ohmic contact transition was observed in WSe2 FET as the gate voltage increases, due to the change of majority carrier transport from holes to electrons. The gate-dependent barrier modulation effectively controls the carrier transport, demonstrating its great potential in 2D TMDCs for electronic and optoelectronic applications.

Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

PubMed

Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

2018-05-09

Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

PubMed Central

Long, Rathnait D.; McIntyre, Paul C.

2012-01-01

The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

A compact quantum correction model for symmetric double gate metal-oxide-semiconductor field-effect transistor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cho, Edward Namkyu; Shin, Yong Hyeon; Yun, Ilgu, E-mail: iyun@yonsei.ac.kr

2014-11-07

A compact quantum correction model for a symmetric double gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET) is investigated. The compact quantum correction model is proposed from the concepts of the threshold voltage shift (ΔV{sub TH}{sup QM}) and the gate capacitance (C{sub g}) degradation. First of all, ΔV{sub TH}{sup QM} induced by quantum mechanical (QM) effects is modeled. The C{sub g} degradation is then modeled by introducing the inversion layer centroid. With ΔV{sub TH}{sup QM} and the C{sub g} degradation, the QM effects are implemented in previously reported classical model and a comparison between the proposed quantum correction model and numerical simulationmore » results is presented. Based on the results, the proposed quantum correction model can be applicable to the compact model of DG MOSFET.« less

Atomically engineered epitaxial anatase TiO 2 metal-semiconductor field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Brian S. Y.; Minohara, Makoto; Hikita, Yasuyuki

Here, anatase TiO 2 is a promising material for a vast array of electronic, energy, and environmental applications, including photocatalysis, photovoltaics, and sensors. A key requirement for these applications is the ability to modulate its electrical properties without dominant dopant scattering and while maintaining high carrier mobility. Here, we demonstrate the room temperature field-effect modulation of the conducting epitaxial interface between anatase TiO 2 and LaAlO 3 (001), which arises for LaO-terminated LaAlO 3, while the AlO 2-terminated interface is insulating. This approach, together with the metal-semiconductor field-effect transistor geometry, naturally bypasses the gate/channel interface traps, resulting in a highmore » field-effect mobility μ FE of 3.14 cm 2 (V s) –1 approaching 98% of the corresponding Hall mobility μ Hall. Accordingly, the channel conductivity is modulated over 6 orders of magnitude over a gate voltage range of ~4 V.« less

Atomically engineered epitaxial anatase TiO 2 metal-semiconductor field-effect transistors

DOE PAGES

Kim, Brian S. Y.; Minohara, Makoto; Hikita, Yasuyuki; ...

2018-03-26

Here, anatase TiO 2 is a promising material for a vast array of electronic, energy, and environmental applications, including photocatalysis, photovoltaics, and sensors. A key requirement for these applications is the ability to modulate its electrical properties without dominant dopant scattering and while maintaining high carrier mobility. Here, we demonstrate the room temperature field-effect modulation of the conducting epitaxial interface between anatase TiO 2 and LaAlO 3 (001), which arises for LaO-terminated LaAlO 3, while the AlO 2-terminated interface is insulating. This approach, together with the metal-semiconductor field-effect transistor geometry, naturally bypasses the gate/channel interface traps, resulting in a highmore » field-effect mobility μ FE of 3.14 cm 2 (V s) –1 approaching 98% of the corresponding Hall mobility μ Hall. Accordingly, the channel conductivity is modulated over 6 orders of magnitude over a gate voltage range of ~4 V.« less

Atomically engineered epitaxial anatase TiO2 metal-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Kim, Brian S. Y.; Minohara, Makoto; Hikita, Yasuyuki; Bell, Christopher; Hwang, Harold Y.

2018-03-01

Anatase TiO2 is a promising material for a vast array of electronic, energy, and environmental applications, including photocatalysis, photovoltaics, and sensors. A key requirement for these applications is the ability to modulate its electrical properties without dominant dopant scattering and while maintaining high carrier mobility. Here, we demonstrate the room temperature field-effect modulation of the conducting epitaxial interface between anatase TiO2 and LaAlO3 (001), which arises for LaO-terminated LaAlO3, while the AlO2-terminated interface is insulating. This approach, together with the metal-semiconductor field-effect transistor geometry, naturally bypasses the gate/channel interface traps, resulting in a high field-effect mobility μ FE of 3.14 cm2 (V s)-1 approaching 98% of the corresponding Hall mobility μ Hall . Accordingly, the channel conductivity is modulated over 6 orders of magnitude over a gate voltage range of ˜4 V.

Passivation of GaSb using molecular beam epitaxy Y{sub 2}O{sub 3} to achieve low interfacial trap density and high-performance self-aligned inversion-channel p-metal-oxide-semiconductor field-effect-transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chu, R. L.; Chiang, T. H.; Hsueh, W. J.

2014-11-03

Molecular beam epitaxy deposited rare-earth oxide of Y{sub 2}O{sub 3} has effectively passivated GaSb, leading to low interfacial trap densities of (1–4) × 10{sup 12 }cm{sup −2} eV{sup −1} across the energy bandgap of GaSb. A high saturation drain current density of 130 μA/μm, a peak transconductance of 90 μS/μm, a low subthreshold slope of 147 mV/decade, and a peak field-effect hole mobility of 200 cm{sup 2}/V-s were obtained in 1 μm-gate-length self-aligned inversion-channel GaSb p-Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs). In this work, high-κ/GaSb interfacial properties were better in samples with a high substrate temperature of 200 °C than in those with high κ's deposited at room temperature, in terms of themore » interfacial electrical properties, particularly, the reduction of interfacial trap densities near the conduction band and the MOSFET device performance.« less

Coaxial metal-oxide-semiconductor (MOS) Au/Ga2O3/GaN nanowires.

PubMed

Hsieh, Chin-Hua; Chang, Mu-Tung; Chien, Yu-Jen; Chou, Li-Jen; Chen, Lih-Juann; Chen, Chii-Dong

2008-10-01

Coaxial metal-oxide-semiconductor (MOS) Au-Ga2O3-GaN heterostructure nanowires were successfully fabricated by an in situ two-step process. The Au-Ga2O3 core-shell nanowires were first synthesized by the reaction of Ga powder, a mediated Au thin layer, and a SiO2 substrate at 800 degrees C. Subsequently, these core-shell nanowires were nitridized in ambient ammonia to form a GaN coating layer at 600 degrees C. The GaN shell is a single crystal, an atomic flat interface between the oxide and semiconductor that ensures that the high quality of the MOS device is achieved. These novel 1D nitride-based MOS nanowires may have promise as building blocks to the future nitride-based vertical nanodevices.

Fluorination of Metal Phthalocyanines: Single-Crystal Growth, Efficient N-Channel Organic Field-Effect Transistors, and Structure-Property Relationships

PubMed Central

Jiang, Hui; Ye, Jun; Hu, Peng; Wei, Fengxia; Du, Kezhao; Wang, Ning; Ba, Te; Feng, Shuanglong; Kloc, Christian

2014-01-01

The fluorination of p-type metal phthalocyanines produces n-type semiconductors, allowing the design of organic electronic circuits that contain inexpensive heterojunctions made from chemically and thermally stable p- and n-type organic semiconductors. For the evaluation of close to intrinsic transport properties, high-quality centimeter-sized single crystals of F16CuPc, F16CoPc and F16ZnPc have been grown. New crystal structures of F16CuPc, F16CoPc and F16ZnPc have been determined. Organic single-crystal field-effect transistors have been fabricated to study the effects of the central metal atom on their charge transport properties. The F16ZnPc has the highest electron mobility (~1.1 cm2 V−1 s−1). Theoretical calculations indicate that the crystal structure and electronic structure of the central metal atom determine the transport properties of fluorinated metal phthalocyanines. PMID:25524460

Method of physical vapor deposition of metal oxides on semiconductors

DOEpatents

Norton, David P.

2001-01-01

A process for growing a metal oxide thin film upon a semiconductor surface with a physical vapor deposition technique in a high-vacuum environment and a structure formed with the process involves the steps of heating the semiconductor surface and introducing hydrogen gas into the high-vacuum environment to develop conditions at the semiconductor surface which are favorable for growing the desired metal oxide upon the semiconductor surface yet is unfavorable for the formation of any native oxides upon the semiconductor. More specifically, the temperature of the semiconductor surface and the ratio of hydrogen partial pressure to water pressure within the vacuum environment are high enough to render the formation of native oxides on the semiconductor surface thermodynamically unstable yet are not so high that the formation of the desired metal oxide on the semiconductor surface is thermodynamically unstable. Having established these conditions, constituent atoms of the metal oxide to be deposited upon the semiconductor surface are directed toward the surface of the semiconductor by a physical vapor deposition technique so that the atoms come to rest upon the semiconductor surface as a thin film of metal oxide with no native oxide at the semiconductor surface/thin film interface. An example of a structure formed by this method includes an epitaxial thin film of (001)-oriented CeO.sub.2 overlying a substrate of (001) Ge.

Radiation hardening of metal-oxide semi-conductor (MOS) devices by boron

NASA Technical Reports Server (NTRS)

Danchenko, V.

1974-01-01

Technique using boron effectively protects metal-oxide semiconductor devices from ionizing radiation without using shielding materials. Boron is introduced into insulating gate oxide layer at semiconductor-insulator interface.

n-Channel semiconductor materials design for organic complementary circuits.

PubMed

Usta, Hakan; Facchetti, Antonio; Marks, Tobin J

2011-07-19

Organic semiconductors have unique properties compared to traditional inorganic materials such as amorphous or crystalline silicon. Some important advantages include their adaptability to low-temperature processing on flexible substrates, low cost, amenability to high-speed fabrication, and tunable electronic properties. These features are essential for a variety of next-generation electronic products, including low-power flexible displays, inexpensive radio frequency identification (RFID) tags, and printable sensors, among many other applications. Accordingly, the preparation of new materials based on π-conjugated organic molecules or polymers has been a central scientific and technological research focus over the past decade. Currently, p-channel (hole-transporting) materials are the leading class of organic semiconductors. In contrast, high-performance n-channel (electron-transporting) semiconductors are relatively rare, but they are of great significance for the development of plastic electronic devices such as organic field-effect transistors (OFETs). In this Account, we highlight the advances our team has made toward realizing moderately and highly electron-deficient n-channel oligomers and polymers based on oligothiophene, arylenediimide, and (bis)indenofluorene skeletons. We have synthesized and characterized a "library" of structurally related semiconductors, and we have investigated detailed structure-property relationships through optical, electrochemical, thermal, microstructural (both single-crystal and thin-film), and electrical measurements. Our results reveal highly informative correlations between structural parameters at various length scales and charge transport properties. We first discuss oligothiophenes functionalized with perfluoroalkyl and perfluoroarene substituents, which represent the initial examples of high-performance n-channel semiconductors developed in this project. The OFET characteristics of these compounds are presented with an

A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell Design

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; Bailey, Mark; Ho, Fat Duen

2004-01-01

The use of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) in a resistive-load SRAM memory cell has been investigated A typical two-transistor resistive-load SRAM memory cell architecture is modified by replacing one of the NMOS transistors with an n-channel MFSFET. The gate of the MFSFET is connected to a polling voltage pulse instead of the other NMOS transistor drain. The polling voltage pulses are of sufficient magnitude to saturate the ferroelectric gate material and force the MFSFET into a particular logic state. The memory cell circuit is further modified by the addition of a PMOS transistor and a load resistor in order to improve the retention characteristics of the memory cell. The retention characteristics of both the "1" and "0" logic states are simulated. The simulations show that the MFSFET memory cell design can maintain both the "1" and "0" logic states for a long period of time.

Temperature dependence of single-event burnout in n-channel power MOSFET's

NASA Astrophysics Data System (ADS)

Johnson, G. H.; Schrimpf, R. D.; Galloway, K. F.; Koga, R.

1994-03-01

The temperature dependence of single-event burnout (SEB) in n-channel power metal-oxide-semiconductor field effect transistors (MOSFET's) is investigated experimentally and analytically. Experimental data are presented which indicate that the SEB susceptibility of the power MOSFET decreases with increasing temperature. A previously reported analytical model that describes the SEB mechanism is updated to include temperature variations. This model is shown to agree with the experimental trends.

Metal/oxide/semiconductor interface investigated by monoenergetic positrons

NASA Astrophysics Data System (ADS)

Uedono, A.; Tanigawa, S.; Ohji, Y.

1988-10-01

Variable-energy positron-beam studies have been carried out for the first time on a metal/oxide/semiconductor (MOS) structure of polycrystalline Si/SiO 2/Si-substrate. We were successful in collecting injected positrons at the SiO 2/Si interface by the application of an electric field between the MOS electrodes.

Piezoresistive effect in metal-semiconductor-metal structures on p-type GaN

NASA Astrophysics Data System (ADS)

Gaska, R.; Shur, M. S.; Bykhovski, A. D.; Yang, J. W.; Khan, M. A.; Kaminski, V. V.; Soloviov, S. M.

2000-06-01

We report on a strong piezoresistive effect in metal-semiconductor-metal structures fabricated on p-type GaN. The maximum measured gauge factor was 260, which is nearly two times larger than for piezoresistive silicon transducers. We attribute this large sensitivity to applied strain to the combination of two mechanisms: (i) a high piezoresistance of bulk p-GaN and (ii) a strong piezoresistive effect in a Schottky contact on p-GaN. The obtained results demonstrate that GaN-based structures can be suitable for stress/pressure sensor applications.

A Self-Aligned InGaAs Quantum-Well Metal-Oxide-Semiconductor Field-Effect Transistor Fabricated through a Lift-Off-Free Front-End Process

NASA Astrophysics Data System (ADS)

Lin, Jianqiang; Kim, Tae-Woo; Antoniadis, Dimitri A.; del Alamo, Jesús A.

2012-06-01

We present a novel n-type InGaAs quantum-well metal-oxide-semiconductor field-effect transistor (QW-MOSFET) fabricated by a self-aligned gate-last process and investigate relevant Si-like manufacturing issues in future III-V MOSFETs. The device structure features a composite InP/Al2O3 gate barrier with a capacitance equivalent thickness (CET) of 3 nm and non alloyed Mo ohmic contacts. We have found that RIE introduces significant damage to the intrinsic device resulting in poor current drive and subthreshold swing. The effect is largely removed through a thermal annealing step. Thermally annealed QW-MOSFETs exhibit a subthreshold swing of 95 mV/dec, indicative of excellent interfacial characteristics. The peak mobility of the MOSFET is 2780 cm2 V-1 s-1.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

NASA Astrophysics Data System (ADS)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

Improvement of charge-pumping electrically detected magnetic resonance and its application to silicon metal-oxide-semiconductor field-effect transistor

NASA Astrophysics Data System (ADS)

Hori, Masahiro; Tsuchiya, Toshiaki; Ono, Yukinori

2017-01-01

Charge-pumping electrically detected magnetic resonance (CP EDMR), or EDMR in the CP mode, is improved and applied to a silicon metal-oxide-semiconductor field-effect transistor (MOSFET). Real-time monitoring of the CP process reveals that high-frequency transient currents are an obstacle to signal amplification for EDMR. Therefore, we introduce cutoff circuitry, leading to a detection limit for the number of spins as low as 103 for Si MOS interface defects. With this improved method, we demonstrate that CP EDMR inherits one of the most important features of the CP method: the gate control of the energy window of the detectable interface defects for spectroscopy.

Anomalous threshold voltage change by 2 MeV electron irradiation at 100 °C in deep submicron metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Hayama, K.; Ohyama, H.; Simoen, E.; Rafí, J. M.; Mercha, A.; Claeys, C.

2004-04-01

The degradation of the electrical properties of deep submicron metal-oxide-semiconductor field-effect transistors (MOSFETs) by 2 MeV electron irradiation at high temperatures was studied. The irradiation temperatures were 30, 100, 150 and 200 °C, and the fluence was fixed at 1015e/cm2. For most experimental conditions, the threshold voltage (VT) is observed to reduce in absolute value both for n- and p-MOSFETs. This reduction is most pronounced at 100 °C, as at this irradiation temperature, the radiation-induced density of interface traps is highest. It is proposed that hydrogen neutralization of the dopants in the substrate plays a key role, whereby the hydrogen is released from the gate by the 2 MeV electrons.

Electrocatalytic N-Doped Graphitic Nanofiber - Metal/Metal Oxide Nanoparticle Composites.

PubMed

Tang, Hongjie; Chen, Wei; Wang, Jiangyan; Dugger, Thomas; Cruz, Luz; Kisailus, David

2018-03-01

Carbon-based nanocomposites have shown promising results in replacing commercial Pt/C as high-performance, low cost, nonprecious metal-based oxygen reduction reaction (ORR) catalysts. Developing unique nanostructures of active components (e.g., metal oxides) and carbon materials is essential for their application in next generation electrode materials for fuel cells and metal-air batteries. Herein, a general approach for the production of 1D porous nitrogen-doped graphitic carbon fibers embedded with active ORR components, (M/MO x , i.e., metal or metal oxide nanoparticles) using a facile two-step electrospinning and annealing process is reported. Metal nanoparticles/nanoclusters nucleate within the polymer nanofibers and subsequently catalyze graphitization of the surrounding polymer matrix and following oxidation, create an interconnected graphite-metal oxide framework with large pore channels, considerable active sites, and high specific surface area. The metal/metal oxide@N-doped graphitic carbon fibers, especially Co 3 O 4 , exhibit comparable ORR catalytic activity but superior stability and methanol tolerance versus Pt in alkaline solutions, which can be ascribed to the synergistic chemical coupling effects between Co 3 O 4 and robust 1D porous structures composed of interconnected N-doped graphitic nanocarbon rings. This finding provides a novel insight into the design of functional electrocatalysts using electrospun carbon nanomaterials for their application in energy storage and conversion fields. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A Wide-Range Tunable Level-Keeper Using Vertical Metal-Oxide-Semiconductor Field-Effect Transistors for Current-Reuse Systems

NASA Astrophysics Data System (ADS)

Tanoi, Satoru; Endoh, Tetsuo

2012-04-01

A wide-range tunable level-keeper using vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed for current-reuse analog systems. The design keys for widening tunable range of the operation are a two-path feed-back and a vertical MOSFET with back-bias-effect free. The proposed circuit with the vertical MOSFETs shows the 1.23-V tunable-range of the input level with the 2.4-V internal-supply voltage (VDD) in the simulation. This tunable-range of the proposed circuit is 4.7 times wider than that of the conventional. The achieved current efficiency of the proposed level-keeper is 66% at the 1.2-V output with the 2.4-V VDD. This efficiency of the proposed circuit is twice higher than that of the traditional voltage down converter.

Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dib, E., E-mail: elias.dib@for.unipi.it; Carrillo-Nuñez, H.; Cavassilas, N.

Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.

95 MeV oxygen ion irradiation effects on N-channel MOSFETs

NASA Astrophysics Data System (ADS)

Prakash, A. P. G.; Ke, S. C.; Siddappa, K.

2003-09-01

The N-channel metal oxide semiconductor field effect transistors (MOSFETs) were exposed to 95 MeV oxygen ions, in the fluence range of 5 x 10(10) to 5 x 10(13) ions/cm(2). The influence of ion irradiation on threshold voltage (V-TH), linear drain current (I-DLin), leakage current (I-L), drain conductance (g(D)), transconductance (g(m)), mobility (mu) and drain saturation current (I-DSat) of MOSFETs was studied systematically for various fluence. The V-TH of the irradiated MOSFET was found to decrease significantly after irradiation. The interface (N-it) and oxide trapped charge (N-ot) were estimated from the subthreshold measurements and were found to increase after irradiation. The densities of oxide-trapped (DeltaN(it)) charge in irradiated MOSFETs were found to he higher than those of the interface trapped charge (DeltaN(ot)). The I-DLin and I-Dsat of MOSFETs were also found to decrease significantly after irradiation. Studies on effects of 95 MeV oxygen ion irradiation on g(m), g(D) and mu show a degradation varying front 70 to 75% after irradiation. The mobility degradation coefficients for N-it(alpha(it)) and N-ot(alpha(it)) were estimated. The results of these studies are presented and discussed.

Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrappedmore » around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.« less

Multi-frequency inversion-charge pumping for charge separation and mobility analysis in high-k/InGaAs metal-oxide-semiconductor field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Djara, V.; Cherkaoui, K.; Negara, M. A.

2015-11-28

An alternative multi-frequency inversion-charge pumping (MFICP) technique was developed to directly separate the inversion charge density (N{sub inv}) from the trapped charge density in high-k/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). This approach relies on the fitting of the frequency response of border traps, obtained from inversion-charge pumping measurements performed over a wide range of frequencies at room temperature on a single MOSFET, using a modified charge trapping model. The obtained model yielded the capture time constant and density of border traps located at energy levels aligned with the InGaAs conduction band. Moreover, the combination of MFICP and pulsed I{sub d}-V{sub g}more » measurements enabled an accurate effective mobility vs N{sub inv} extraction and analysis. The data obtained using the MFICP approach are consistent with the most recent reports on high-k/InGaAs.« less

Integrating Partial Polarization into a Metal-Ferroelectric-Semiconductor Field Effect Transistor Model

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Ho, Fat Duen

1999-01-01

The ferroelectric channel in a Metal-Ferroelectric-Semiconductor Field Effect Transistor (MFSFET) can partially change its polarization when the gate voltage near the polarization threshold voltage. This causes the MFSFET Drain current to change with repeated pulses of the same gate voltage near the polarization threshold voltage. A previously developed model [11, based on the Fermi-Dirac function, assumed that for a given gate voltage and channel polarization, a sin-le Drain current value would be generated. A study has been done to characterize the effects of partial polarization on the Drain current of a MFSFET. These effects have been described mathematically and these equations have been incorporated into a more comprehensive mathematical model of the MFSFET. The model takes into account the hysteresis nature of the MFSFET and the time dependent decay as well as the effects of partial polarization. This model defines the Drain current based on calculating the degree of polarization from previous gate pulses, the present Gate voltage, and the amount of time since the last Gate volta-e pulse.

Ultraviolet GaN photodetectors on Si via oxide buffer heterostructures with integrated short period oxide-based distributed Bragg reflectors and leakage suppressing metal-oxide-semiconductor contacts

DOE Office of Scientific and Technical Information (OSTI.GOV)

Szyszka, A., E-mail: szyszka@ihp-microelectronics.com, E-mail: adam.szyszka@pwr.wroc.pl; Faculty of Microsystem Electronics and Photonics, Wroclaw University of Technology, Janiszewskiego 11/17, 50-372 Wroclaw; Lupina, L.

2014-08-28

Based on a novel double step oxide buffer heterostructure approach for GaN integration on Si, we present an optimized Metal-Semiconductor-Metal (MSM)-based Ultraviolet (UV) GaN photodetector system with integrated short-period (oxide/Si) Distributed Bragg Reflector (DBR) and leakage suppressing Metal-Oxide-Semiconductor (MOS) electrode contacts. In terms of structural properties, it is demonstrated by in-situ reflection high energy electron diffraction and transmission electron microscopy-energy dispersive x-ray studies that the DBR heterostructure layers grow with high thickness homogeneity and sharp interface structures sufficient for UV applications; only minor Si diffusion into the Y{sub 2}O{sub 3} films is detected under the applied thermal growth budget. Asmore » revealed by comparative high resolution x-ray diffraction studies on GaN/oxide buffer/Si systems with and without DBR systems, the final GaN layer structure quality is not significantly influenced by the growth of the integrated DBR heterostructure. In terms of optoelectronic properties, it is demonstrated that—with respect to the basic GaN/oxide/Si system without DBR—the insertion of (a) the DBR heterostructures and (b) dark current suppressing MOS contacts enhances the photoresponsivity below the GaN band-gap related UV cut-off energy by almost up to two orders of magnitude. Given the in-situ oxide passivation capability of grown GaN surfaces and the one order of magnitude lower number of superlattice layers in case of higher refractive index contrast (oxide/Si) systems with respect to classical III-N DBR superlattices, virtual GaN substrates on Si via functional oxide buffer systems are thus a promising robust approach for future GaN-based UV detector technologies.« less

Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon-assisted tunneling.

PubMed

Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E

2007-05-01

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.

Improved Hot Carrier Reliability Characteristics of Metal Oxide Semiconductor Field Effect Transistors with High-k Gate Dielectric by Using High Pressure Deuterium Post Metallization Annealing

NASA Astrophysics Data System (ADS)

Park, Hokyung; Choi, Rino; Lee, Byoung Hun; Hwang, Hyunsang

2007-09-01

High pressure deuterium annealing on the hot carrier reliability characteristics of HfSiO metal oxide semiconductor field effect transistor (MOSFET) was investigated. Comparing with the conventional forming gas (H2/Ar=10%/96%, 480 °C, 30 min) annealed sample, MOSFET annealed in 5 atm pure deuterium ambient at 400 °C showed the improvement of linear drain current, reduction of interface trap density, and improvement of the hot carrier reliability characteristics. These improvements can be attributed to the effective passivation of the interface trap site after high pressure annealing and heavy mass effect of deuterium. These results indicate that high pressure pure deuterium annealing can be a promising process for improving device performance as well as hot carrier reliability, together.

Stress Characterization of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) using Raman Spectroscopy and the Finite Element Method.

PubMed

Yoshikawa, Masanobu; Kosaka, Kenichi; Seki, Hirohumi; Kimoto, Tsunenobu

2016-07-01

We measured the depolarized and polarized Raman spectra of a 4H-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) and found that compressive stress of approximately 20 MPa occurs under the source and gate electrodes and tensile stress of approximately 10 MPa occurs between the source and gate electrodes. The experimental result was in close agreement with the result obtained by calculation using the finite element method (FEM). A combination of Raman spectroscopy and FEM provides much data on the stresses in 4H-SiC MOSFET. © The Author(s) 2016.

Transport properties of silicon complementary-metal-oxide semiconductor quantum well field-effect transistors

NASA Astrophysics Data System (ADS)

Naquin, Clint Alan

Introducing explicit quantum transport into silicon (Si) transistors in a manner compatible with industrial fabrication has proven challenging, yet has the potential to transform the performance horizons of large scale integrated Si devices and circuits. Explicit quantum transport as evidenced by negative differential transconductances (NDTCs) has been observed in a set of quantum well (QW) n-channel metal-oxide-semiconductor (NMOS) transistors fabricated using industrial silicon complementary MOS processing. The QW potential was formed via lateral ion implantation doping on a commercial 45 nm technology node process line, and measurements of the transfer characteristics show NDTCs up to room temperature. Detailed gate length and temperature dependence characteristics of the NDTCs in these devices have been measured. Gate length dependence of NDTCs shows a correlation of the interface channel length with the number of NDTCs formed as well as with the gate voltage (VG) spacing between NDTCs. The VG spacing between multiple NDTCs suggests a quasi-parabolic QW potential profile. The temperature dependence is consistent with partial freeze-out of carrier concentration against a degenerately doped background. A folding amplifier frequency multiplier circuit using a single QW NMOS transistor to generate a folded current-voltage transfer function via a NDTC was demonstrated. Time domain data shows frequency doubling in the kHz range at room temperature, and Fourier analysis confirms that the output is dominated by the second harmonic of the input. De-embedding the circuit response characteristics from parasitic cable and contact impedances suggests that in the absence of parasitics the doubling bandwidth could be as high as 10 GHz in a monolithic integrated circuit, limited by the transresistance magnitude of the QW NMOS. This is the first example of a QW device fabricated by mainstream Si CMOS technology being used in a circuit application and establishes the feasibility

New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors.

PubMed

Shih, Cheng Wei; Chin, Albert

2016-08-03

At an ultrathin 5 nm, we report a new high-mobility tin oxide (SnO2) metal-oxide-semiconductor field-effect transistor (MOSFET) exhibiting extremely high field-effect mobility values of 279 and 255 cm(2)/V-s at 145 and 205 °C, respectively. These values are the highest reported mobility values among all wide-band-gap semiconductors of GaN, SiC, and metal-oxide MOSFETs, and they also exceed those of silicon devices at the aforementioned elevated temperatures. For the first time among existing semiconductor transistors, a new device physical phenomenon of a higher mobility value was measured at 45-205 °C than at 25 °C, which is due to the lower optical phonon scattering by the large SnO2 phonon energy. Moreover, the high on-current/off-current of 4 × 10(6) and the positive threshold voltage of 0.14 V at 25 °C are significantly better than those of a graphene transistor. This wide-band-gap SnO2 MOSFET exhibits high mobility in a 25-205 °C temperature range, a wide operating voltage of 1.5-20 V, and the ability to form on an amorphous substrate, rendering it an ideal candidate for multifunctional low-power integrated circuit (IC), display, and brain-mimicking three-dimensional IC applications.

Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

PubMed

Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

2017-06-28

β-gallium oxide (β-Ga 2 O 3 ) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga 2 O 3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga 2 O 3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

Channel scaling and field-effect mobility extraction in amorphous InZnO thin film transistors

NASA Astrophysics Data System (ADS)

Lee, Sunghwan; Song, Yang; Park, Hongsik; Zaslavsky, A.; Paine, D. C.

2017-09-01

Amorphous oxide semiconductors (AOSs) based on indium oxides are of great interest for next generation ultra-high definition displays that require much smaller pixel driving elements. We describe the scaling behavior in amorphous InZnO thin film transistors (TFTs) with a significant decrease in the extracted field-effect mobility μFE with channel length L (from 39.3 to 9.9 cm2/V·s as L is reduced from 50 to 5 μm). Transmission line model measurements reveal that channel scaling leads to a significant μFE underestimation due to contact resistance (RC) at the metallization/channel interface. Therefore, we suggest a method of extracting correct μFE when the TFT performance is significantly affected by RC. The corrected μFE values are higher (45.4 cm2/V·s) and nearly independent of L. The results show the critical effect of contact resistance on μFE measurements and suggest strategies to determine accurate μFE when a TFT channel is scaled.

Electrostatic analysis of n-doped SrTiO{sub 3} metal-insulator-semiconductor systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kamerbeek, A. M., E-mail: a.m.kamerbeek@rug.nl; Banerjee, T.; Hueting, R. J. E.

2015-12-14

Electron doped SrTiO{sub 3}, a complex-oxide semiconductor, possesses novel electronic properties due to its strong temperature and electric-field dependent permittivity. Due to the high permittivity, metal/n-SrTiO{sub 3} systems show reasonably strong rectification even when SrTiO{sub 3} is degenerately doped. Our experiments show that the insertion of a sub nanometer layer of AlO{sub x} in between the metal and n-SrTiO{sub 3} interface leads to a dramatic reduction of the Schottky barrier height (from around 0.90 V to 0.25 V). This reduces the interface resistivity by 4 orders of magnitude. The derived electrostatic analysis of the metal-insulator-semiconductor (n-SrTiO{sub 3}) system is consistent with thismore » trend. When compared with a Si based MIS system, the change is much larger and mainly governed by the high permittivity of SrTiO{sub 3}. The non-linear permittivity of n-SrTiO{sub 3} leads to unconventional properties such as a temperature dependent surface potential non-existent for semiconductors with linear permittivity such as Si. This allows tuning of the interfacial band alignment, and consequently the Schottky barrier height, in a much more drastic way than in conventional semiconductors.« less

Positive and negative gain exceeding unity magnitude in silicon quantum well metal-oxide-semiconductor transistors

NASA Astrophysics Data System (ADS)

Hu, Gangyi; Wijesinghe, Udumbara; Naquin, Clint; Maggio, Ken; Edwards, H. L.; Lee, Mark

2017-10-01

Intrinsic gain (AV) measurements on Si quantum well (QW) n-channel metal-oxide-semiconductor (NMOS) transistors show that these devices can have |AV| > 1 in quantum transport negative transconductance (NTC) operation at room temperature. QW NMOS devices were fabricated using an industrial 45 nm technology node process incorporating ion implanted potential barriers to define a lateral QW in the conduction channel under the gate. While NTC at room temperature arising from transport through gate-controlled QW bound states has been previously established, it was unknown whether the quantum NTC mechanism could support gain magnitude exceeding unity. Bias conditions were found giving both positive and negative AV with |AV| > 1 at room temperature. This result means that QW NMOS devices could be useful in amplifier and oscillator applications.

AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors using Sc2O3 as the gate oxide and surface passivation

NASA Astrophysics Data System (ADS)

Mehandru, R.; Luo, B.; Kim, J.; Ren, F.; Gila, B. P.; Onstine, A. H.; Abernathy, C. R.; Pearton, S. J.; Gotthold, D.; Birkhahn, R.; Peres, B.; Fitch, R.; Gillespie, J.; Jenkins, T.; Sewell, J.; Via, D.; Crespo, A.

2003-04-01

We demonstrated that Sc2O3 thin films deposited by plasma-assisted molecular-beam epitaxy can be used simultaneously as a gate oxide and as a surface passivation layer on AlGaN/GaN high electron mobility transistors (HEMTs). The maximum drain source current, IDS, reaches a value of over 0.8 A/mm and is ˜40% higher on Sc2O3/AlGaN/GaN transistors relative to conventional HEMTs fabricated on the same wafer. The metal-oxide-semiconductor HEMTs (MOS-HEMTs) threshold voltage is in good agreement with the theoretical value, indicating that Sc2O3 retains a low surface state density on the AlGaN/GaN structures and effectively eliminates the collapse in drain current seen in unpassivated devices. The MOS-HEMTs can be modulated to +6 V of gate voltage. In particular, Sc2O3 is a very promising candidate as a gate dielectric and surface passivant because it is more stable on GaN than is MgO.

Positron annihilation studies in the field induced depletion regions of metal-oxide-semiconductor structures

NASA Astrophysics Data System (ADS)

Asoka-Kumar, P.; Leung, T. C.; Lynn, K. G.; Nielsen, B.; Forcier, M. P.; Weinberg, Z. A.; Rubloff, G. W.

1992-06-01

The centroid shifts of positron annihilation spectra are reported from the depletion regions of metal-oxide-semiconductor (MOS) capacitors at room temperature and at 35 K. The centroid shift measurement can be explained using the variation of the electric field strength and depletion layer thickness as a function of the applied gate bias. An estimate for the relevant MOS quantities is obtained by fitting the centroid shift versus beam energy data with a steady-state diffusion-annihilation equation and a derivative-gaussian positron implantation profile. Inadequacy of the present analysis scheme is evident from the derived quantities and alternate methods are required for better predictions.

Metal Oxide Semi-Conductor Gas Sensors in Environmental Monitoring

PubMed Central

Fine, George F.; Cavanagh, Leon M.; Afonja, Ayo; Binions, Russell

2010-01-01

Metal oxide semiconductor gas sensors are utilised in a variety of different roles and industries. They are relatively inexpensive compared to other sensing technologies, robust, lightweight, long lasting and benefit from high material sensitivity and quick response times. They have been used extensively to measure and monitor trace amounts of environmentally important gases such as carbon monoxide and nitrogen dioxide. In this review the nature of the gas response and how it is fundamentally linked to surface structure is explored. Synthetic routes to metal oxide semiconductor gas sensors are also discussed and related to their affect on surface structure. An overview of important contributions and recent advances are discussed for the use of metal oxide semiconductor sensors for the detection of a variety of gases—CO, NOx, NH3 and the particularly challenging case of CO2. Finally a description of recent advances in work completed at University College London is presented including the use of selective zeolites layers, new perovskite type materials and an innovative chemical vapour deposition approach to film deposition. PMID:22219672

Ferroelectric-field-effect-enhanced electroresistance in metal/ferroelectric/semiconductor tunnel junctions

NASA Astrophysics Data System (ADS)

Wen, Zheng; Li, Chen; Wu, Di; Li, Aidong; Ming, Naiben

2013-07-01

Ferroelectric tunnel junctions (FTJs), composed of two metal electrodes separated by an ultrathin ferroelectric barrier, have attracted much attention as promising candidates for non-volatile resistive memories. Theoretical and experimental works have revealed that the tunnelling resistance switching in FTJs originates mainly from a ferroelectric modulation on the barrier height. However, in these devices, modulation on the barrier width is very limited, although the tunnelling transmittance depends on it exponentially as well. Here we propose a novel tunnelling heterostructure by replacing one of the metal electrodes in a normal FTJ with a heavily doped semiconductor. In these metal/ferroelectric/semiconductor FTJs, not only the height but also the width of the barrier can be electrically modulated as a result of a ferroelectric field effect, leading to a greatly enhanced tunnelling electroresistance. This idea is implemented in Pt/BaTiO3/Nb:SrTiO3 heterostructures, in which an ON/OFF conductance ratio above 104, about one to two orders greater than those reported in normal FTJs, can be achieved at room temperature. The giant tunnelling electroresistance, reliable switching reproducibility and long data retention observed in these metal/ferroelectric/semiconductor FTJs suggest their great potential in non-destructive readout non-volatile memories.

Multilevel metallization method for fabricating a metal oxide semiconductor device

NASA Technical Reports Server (NTRS)

Hollis, B. R., Jr.; Feltner, W. R.; Bouldin, D. L.; Routh, D. E. (Inventor)

1978-01-01

An improved method is described of constructing a metal oxide semiconductor device having multiple layers of metal deposited by dc magnetron sputtering at low dc voltages and low substrate temperatures. The method provides multilevel interconnections and cross over between individual circuit elements in integrated circuits without significantly reducing the reliability or seriously affecting the yield.

Instability analysis of charges trapped in the oxide of metal-ultra thin oxide-semiconductor structures

NASA Astrophysics Data System (ADS)

Aziz, A.; Kassmi, K.; Maimouni, R.; Olivié, F.; Sarrabayrouse, G.; Martinez, A.

2005-09-01

In this paper, we present the theoretical and experimental results of the influence of a charge trapped in ultra-thin oxide of metal/ultra-thin oxide/semiconductor structures (MOS) on the I(Vg) current-voltage characteristics when the conduction is of the Fowler-Nordheim (FN) tunneling type. The charge, which is negative, is trapped near the cathode (metal/oxide interface) after constant current injection by the metal (Vg<0). Of particular interest is the influence on the Δ Vg(Vg) shift over the whole I(Vg) characteristic at high field (greater than the injection field (>12.5 MV/cm)). It is shown that the charge centroid varies linearly with respect to the voltage Vg. The behavior at low field (<12.5 MV/cm) is analyzed in référence A. Aziz, K. Kassmi, Ka. Kassmi, F. Olivié, Semicond. Sci. Technol. 19, 877 (2004) and considers that the trapped charge centroid is fixed. The results obtained make it possible to analyze the influence of the injected charge and the applied field on the centroid position of the trapped charge, and to highlight the charge instability in the ultra-thin oxide of MOS structures.

Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2015-07-21

Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Technique for producing highly planar Si/SiO0.64Ge0.36/Si metal-oxide-semiconductor field effect transistor channels

NASA Astrophysics Data System (ADS)

Grasby, T. J.; Parry, C. P.; Phillips, P. J.; McGregor, B. M.; Morris, , R. J. H.; Braithwaite, G.; Whall, T. E.; Parker, E. H. C.; Hammond, R.; Knights, A. P.; Coleman, P. G.

1999-03-01

Si/Si0.64Ge0.36/Si heterostructures have been grown at low temperature (450 °C) to avoid the strain-induced roughening observed for growth temperatures of 550 °C and above. The electrical properties of these structures are poor, and thought to be associated with grown-in point defects as indicated in positron annihilation spectroscopy. However, after an in situ annealing procedure (800 °C for 30 min) the electrical properties dramatically improve, giving an optimum 4 K mobility of 2500 cm2 V-1 s-1 for a sheet density of 6.2×1011 cm-2. The low temperature growth yields highly planar interfaces, which are maintained after anneal as evidenced from transmission electron microscopy. This and secondary ion mass spectroscopy measurements demonstrate that the metastably strained alloy layer can endure the in situ anneal procedure necessary for enhanced electrical properties. Further studies have shown that the layers can also withstand a 120 min thermal oxidation at 800 °C, commensurate with metal-oxide-semiconductor device fabrication.

Dimensional optimization of nanowire--complementary metal oxide--semiconductor inverter.

PubMed

Hashim, Yasir; Sidek, Othman

2013-01-01

This study is the first to demonstrate dimensional optimization of nanowire-complementary metal-oxide-semiconductor inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on both dimensions ratio and digital voltage level (Vdd). Diameter optimization reveals that when Vdd increases, the optimized value of (Dp/Dn) decreases. Channel length optimization results show that when Vdd increases, the optimized value of Ln decreases and that of (Lp/Ln) increases. Dimension ratio optimization reveals that when Vdd increases, the optimized value of Kp/Kn decreases, and silicon nanowire transistor with suitable dimensions (higher Dp and Ln with lower Lp and Dn) can be fabricated.

Enhanced Performance of Gate-First p-Channel Metal-Insulator-Semiconductor Field-Effect Transistors with Polycrystalline Silicon/TiN/HfSiON Stacks Fabricated by Physical Vapor Deposition Based In situ Method

NASA Astrophysics Data System (ADS)

Kitano, Naomu; Horie, Shinya; Arimura, Hiroaki; Kawahara, Takaaki; Sakashita, Shinsuke; Nishida, Yukio; Yugami, Jiro; Minami, Takashi; Kosuda, Motomu; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2007-12-01

We demonstrated the use of an in situ metal/high-k fabrication method for improving the performance of metal-insulator-semiconductor field-effect transistors (MISFETs). Gate-first pMISFETs with polycrystalline silicon (poly-Si)/TiN/HfSiON stacks were fabricated by techniques based on low-damage physical vapor deposition, in which high-quality HfSiON dielectrics were formed by the interface reaction between an ultrathin metal-Hf layer (0.5 nm thick) and a SiO2 underlayer, and TiN electrodes were continuously deposited on the gate dielectrics without exposure to air. Gate-first pMISFETs with high carrier mobility and a low threshold voltage (Vth) were realized by reducing the carbon impurity in the gate stacks and improving the Vth stability against thermal treatment. As a result, we obtained superior current drivability (Ion = 350 μA/μm at Ioff = 200 pA/μm), which corresponds to a 13% improvement over that of conventional chemical vapor deposition-based metal/high-k devices.

Effect of proton irradiation dose on InAlN/GaN metal-oxide semiconductor high electron mobility transistors with Al 2O 3 gate oxide

DOE PAGES

Ahn, Shihyun; Kim, Byung -Jae; Lin, Yi -Hsuan; ...

2016-07-26

The effects of proton irradiation on the dc performance of InAlN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) with Al 2O 3 as the gate oxide were investigated. The InAlN/GaN MOSHEMTs were irradiated with doses ranging from 1×10 13 to 1×10 15cm –2 at a fixed energy of 5MeV. There was minimal damage induced in the two dimensional electron gas at the lowest irradiation dose with no measurable increase in sheet resistance, whereas a 9.7% increase of the sheet resistance was observed at the highest irradiation dose. By sharp contrast, all irradiation doses created more severe degradation in the Ohmic metalmore » contacts, with increases of specific contact resistance from 54% to 114% over the range of doses investigated. These resulted in source-drain current–voltage decreases ranging from 96 to 242 mA/mm over this dose range. The trap density determined from temperature dependent drain current subthreshold swing measurements increased from 1.6 × 10 13 cm –2 V –1 for the reference MOSHEMTs to 6.7 × 10 13 cm –2 V –1 for devices irradiated with the highest dose. In conclusion, the carrier removal rate was 1287 ± 64 cm –1, higher than the authors previously observed in AlGaN/GaN MOSHEMTs for the same proton energy and consistent with the lower average bond energy of the InAlN.« less

Mathematical Models of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field effect Transistor

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2013-01-01

Mathematical models of the common-source and common-gate amplifiers using metal-ferroelectric- semiconductor field effect transistors (MOSFETs) are developed in this paper. The models are compared against data collected with MOSFETs of varying channel lengths and widths, and circuit parameters such as biasing conditions are varied as well. Considerations are made for the capacitance formed by the ferroelectric layer present between the gate and substrate of the transistors. Comparisons between the modeled and measured data are presented in depth as well as differences and advantages as compared to the performance of each circuit using a MOSFET.

The electrical and interfacial properties of metal-high-k oxide-semiconductor field effect transistors with CeO2/HfO2 laminated gate dielectrics

NASA Astrophysics Data System (ADS)

Chang, Ingram Yin-ku; Chen, Chun-Heng; Chiu, Fu-Chien; Lee, Joseph Ya-min

2007-11-01

Metal-oxide-semiconductor field-effect transistors with CeO2/HfO2 laminated gate dielectrics were fabricated. The transistors have a subthreshold slope of 74.9mV/decade. The interfacial properties were measured using gated diodes. The surface state density Dit was 9.78×1011cm-2eV-1. The surface-recombination velocity (s0) and the minority carrier lifetime in the field-induced depletion region (τ0,FIJ) measured from the gated diode were about 6.11×103cm /s and 1.8×10-8s, respectively. The effective capture cross section of surface state (σs) extracted using the subthreshold-swing measurement and the gated diode was about 7.69×10-15cm2. The effective electron mobility of CeO2/HfO2 laminated gated transistors was determined to be 212cm2/Vs.

Method for manufacturing compound semiconductor field-effect transistors with improved DC and high frequency performance

DOEpatents

Zolper, John C.; Sherwin, Marc E.; Baca, Albert G.

2000-01-01

A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

A silicon metal-oxide-semiconductor electron spin-orbit qubit.

PubMed

Jock, Ryan M; Jacobson, N Tobias; Harvey-Collard, Patrick; Mounce, Andrew M; Srinivasa, Vanita; Ward, Dan R; Anderson, John; Manginell, Ron; Wendt, Joel R; Rudolph, Martin; Pluym, Tammy; Gamble, John King; Baczewski, Andrew D; Witzel, Wayne M; Carroll, Malcolm S

2018-05-02

The silicon metal-oxide-semiconductor (MOS) material system is a technologically important implementation of spin-based quantum information processing. However, the MOS interface is imperfect leading to concerns about 1/f trap noise and variability in the electron g-factor due to spin-orbit (SO) effects. Here we advantageously use interface-SO coupling for a critical control axis in a double-quantum-dot singlet-triplet qubit. The magnetic field-orientation dependence of the g-factors is consistent with Rashba and Dresselhaus interface-SO contributions. The resulting all-electrical, two-axis control is also used to probe the MOS interface noise. The measured inhomogeneous dephasing time, [Formula: see text], of 1.6 μs is consistent with 99.95% 28 Si enrichment. Furthermore, when tuned to be sensitive to exchange fluctuations, a quasi-static charge noise detuning variance of 2 μeV is observed, competitive with low-noise reports in other semiconductor qubits. This work, therefore, demonstrates that the MOS interface inherently provides properties for two-axis qubit control, while not increasing noise relative to other material choices.

Photochemical Hydrogen Doping Induced Embedded Two-Dimensional Metallic Channel Formation in InGaZnO at Room Temperature.

PubMed

Kim, Myeong-Ho; Lee, Young-Ahn; Kim, Jinseo; Park, Jucheol; Ahn, Seungbae; Jeon, Ki-Joon; Kim, Jeong Won; Choi, Duck-Kyun; Seo, Hyungtak

2015-10-27

The photochemical tunability of the charge-transport mechanism in metal-oxide semiconductors is of great interest since it may offer a facile but effective semiconductor-to-metal transition, which results from photochemically modified electronic structures for various oxide-based device applications. This might provide a feasible hydrogen (H)-radical doping to realize the effectively H-doped metal oxides, which has not been achieved by thermal and ion-implantation technique in a reliable and controllable way. In this study, we report a photochemical conversion of InGaZnO (IGZO) semiconductor to a transparent conductor via hydrogen doping to the local nanocrystallites formed at the IGZO/glass interface at room temperature. In contrast to thermal or ionic hydrogen doping, ultraviolet exposure of the IGZO surface promotes a photochemical reaction with H radical incorporation to surface metal-OH layer formation and bulk H-doping which acts as a tunable and stable highly doped n-type doping channel and turns IGZO to a transparent conductor. This results in the total conversion of carrier conduction property to the level of metallic conduction with sheet resistance of ∼16 Ω/□, room temperature Hall mobility of 11.8 cm(2) V(-1) sec(-1), the carrier concentration at ∼10(20) cm(-3) without any loss of optical transparency. We demonstrated successful applications of photochemically highly n-doped metal oxide via optical dose control to transparent conductor with excellent chemical and optical doping stability.

Positron studies of metal-oxide-semiconductor structures

NASA Astrophysics Data System (ADS)

Au, H. L.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K. G.

1993-03-01

Positron annihilation spectroscopy provides a new probe to study the properties of interface traps in metal-oxide semiconductors (MOS). Using positrons, we have examined the behavior of the interface traps as a function of gate bias. We propose a simple model to explain the positron annihilation spectra from the interface region of a MOS capacitor.

Fabrication of 4H-SiC n-channel IGBTs with ultra high blocking voltage

NASA Astrophysics Data System (ADS)

Yang, Xiaolei; Tao, Yonghong; Yang, Tongtong; Huang, Runhua; Song, Bai

2018-03-01

Owing to the conductivity modulation of silicon carbide (SiC) bipolar devices, n-channel insulated gate bipolar transistors (n-IGBTs) have a significant advantage over metal oxide semiconductor field effect transistors (MOSFETs) in ultra high voltage (UHV) applications. In this paper, backside grinding and laser annealing process were carried out to fabricate 4H-SiC n-IGBTs. The thickness of a drift layer was 120 μm, which was designed for a blocking voltage of 13 kV. The n-IGBTs carried a collector current density of 24 A/cm2 at a power dissipation of 300 W/cm2 when the gate voltage was 20 V, with a differential specific on-resistance of 140 mΩ·cm2.

A new era of semiconductor genetics using ion-sensitive field-effect transistors: the gene-sensitive integrated cell.

PubMed

Toumazou, Christofer; Thay, Tan Sri Lim Kok; Georgiou, Pantelis

2014-03-28

Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free real-time analysis based on ISFETs. This device is derived from the traditional metal-oxide semiconductor field-effect transistor (MOSFET) and has electrical performance identical to that of a MOSFET in a standard semiconductor process, yet is capable of incorporating DNA reaction chemistries for applications in single nucleotide polymorphism microarrays and DNA sequencing. Just as application-specific integrated circuits, which are developed in much the same way, have shaped our consumer electronics industry and modern communications and memory technology, so, too, do GSICs based on a single underlying technology principle have the capacity to transform the life science and healthcare industries.

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

PubMed

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

Technology of GaAs metal-oxide-semiconductor solar cells

NASA Technical Reports Server (NTRS)

Stirn, R. J.; Yeh, Y. C. M.

1977-01-01

The growth of an oxide interfacial layer was recently found to increase the open-circuit voltage (OCV) and efficiency by up to 60 per cent in GaAs metal-semiconductor solar cells. Details of oxidation techniques to provide the necessary oxide thickness and chemical structure and using ozone, water-vapor-saturated oxygen, or oxygen gas discharges are described, as well as apparent crystallographic orientation effects. Preliminary results of the oxide chemistry obtained from X-ray, photoelectron spectroscopy are given. Ratios of arsenic oxide to gallium oxide of unity or less seem to be preferable. Samples with the highest OVC predominantly have As(+3) in the arsenic oxide rather than As(+5). A major difficulty at this time is a reduction in OCV by 100-200 mV when the antireflection coating is vacuum deposited.

Prediction of the thermal annealing of thick oxide metal-oxide-semiconductor dosimeters irradiated in a harsh radiation environment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ravotti, F.; Glaser, M.; Saigne, F.

Radiation-sensing metal-oxide-semiconductor field-effect transistors produced by the laboratory LAAS-CNRS were exposed to a harsh hadron field that represents the real radiation environment expected at the CERN Large Hadron Collider experiments. The long-term stability of the transistor's I{sub ds}-V{sub gs} characteristic was investigated using the isochronal annealing technique. In this work, devices exposed to high intensity hadron levels ({phi}{>=}10{sup 12} neutrons/cm{sup 2}) show evidences of displacement damages in the I{sub ds}-V{sub gs} annealing behavior. By comparing experimental and simulated results over 14 months, the isochronal annealing method, originally devoted to oxide trapped charge, is shown to enable prediction of the recoverymore » of silicon bulk defects.« less

Modeling of Metal-Ferroelectric-Semiconductor Field Effect Transistors

NASA Technical Reports Server (NTRS)

Duen Ho, Fat; Macleod, Todd C.

1998-01-01

The characteristics for a MFSFET (metal-ferroelectric-semiconductor field effect transistor) is very different than a conventional MOSFET and must be modeled differently. The drain current has a hysteresis shape with respect to the gate voltage. The position along the hysteresis curve is dependent on the last positive or negative polling of the ferroelectric material. The drain current also has a logarithmic decay after the last polling. A model has been developed to describe the MFSFET drain current for both gate voltage on and gate voltage off conditions. This model takes into account the hysteresis nature of the MFSFET and the time dependent decay. The model is based on the shape of the Fermi-Dirac function which has been modified to describe the MFSFET's drain current. This is different from the model proposed by Chen et. al. and that by Wu.

Effect of Al-diffusion-induced positive flatband voltage shift on the electrical characteristics of Al-incorporated high-k metal-oxide-semiconductor field-effective transistor

NASA Astrophysics Data System (ADS)

Wang, Wenwu; Akiyama, Koji; Mizubayashi, Wataru; Nabatame, Toshihide; Ota, Hiroyuki; Toriumi, Akira

2009-03-01

We systematically studied what effect Al diffusion from high-k dielectrics had on the flatband voltage (Vfb) of Al-incorporated high-k gate stacks. An anomalous positive shift fin Vfb with the decreasing equivalent oxide thickness (EOT) of high-k gate stacks is reported. As the SiO2 interfacial layer is aggressively thinned in Al-incorporated HfxAl1-xOy gate stacks with a metal-gate electrode, the Vfb first lies on the well known linear Vfb-EOT plot and deviates toward the positive-voltage direction (Vfb roll-up), followed by shifting toward negative voltage (Vfb roll-off). We demonstrated that the Vfb roll-up behavior remarkably decreases the threshold voltage (Vth) of p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs), and does not cause severe degradation in the characteristics of hole mobility. The Vfb roll-up behavior, which is independent of gate materials but strongly dependent on high-k dielectrics, was ascribed to variations in fixed charges near the SiO2/Si interface, which are caused by Al diffusion from HfxAl1-xOy through SiO2 to the SiO2/Si interface. These results indicate that anomalous positive shift in Vfb, i.e., Vfb roll-up, should be taken into consideration in quantitatively adjusting Vfb in thin EOT regions and that it could be used to further tune Vth in p-MOSFETs.

Comparative Study of HfTa-based gate-dielectric Ge metal-oxide-semiconductor capacitors with and without AlON interlayer

NASA Astrophysics Data System (ADS)

Xu, J. P.; Zhang, X. F.; Li, C. X.; Chan, C. L.; Lai, P. T.

2010-04-01

The electrical properties and high-field reliability of HfTa-based gate-dielectric metal-oxide-semiconductor (MOS) devices with and without AlON interlayer on Ge substrate are investigated. Experimental results show that the MOS capacitor with HfTaON/AlON stack gate dielectric exhibits low interface-state/oxide-charge densities, low gate leakage, small capacitance equivalent thickness (˜1.1 nm), and high dielectric constant (˜20). All of these should be attributed to the blocking role of the ultrathin AlON interlayer against interdiffusions of Ge, Hf, and Ta and penetration of O into the Ge substrate, with the latter effectively suppressing the unintentional formation of unstable poor-quality low- k GeO x and giving a superior AlON/Ge interface. Moreover, incorporation of N into both the interlayer and high- k dielectric further improves the device reliability under high-field stress through the formation of strong N-related bonds.

A silicon metal-oxide-semiconductor electron spin-orbit qubit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jock, Ryan Michael; Jacobson, Noah Tobias; Harvey-Collard, Patrick

Here, the silicon metal-oxide-semiconductor (MOS) material system is a technologically important implementation of spin-based quantum information processing. However, the MOS interface is imperfect leading to concerns about 1/f trap noise and variability in the electron g-factor due to spin–orbit (SO) effects. Here we advantageously use interface–SO coupling for a critical control axis in a double-quantum-dot singlet–triplet qubit. The magnetic field-orientation dependence of the g-factors is consistent with Rashba and Dresselhaus interface–SO contributions. The resulting all-electrical, two-axis control is also used to probe the MOS interface noise. The measured inhomogeneous dephasing time, T* 2m, of 1.6 μs is consistent with 99.95%more » 28Si enrichment. Furthermore, when tuned to be sensitive to exchange fluctuations, a quasi-static charge noise detuning variance of 2 μeV is observed, competitive with low-noise reports in other semiconductor qubits. This work, therefore, demonstrates that the MOS interface inherently provides properties for two-axis qubit control, while not increasing noise relative to other material choices.« less

A silicon metal-oxide-semiconductor electron spin-orbit qubit

DOE PAGES

Jock, Ryan Michael; Jacobson, Noah Tobias; Harvey-Collard, Patrick; ...

2018-05-02

Here, the silicon metal-oxide-semiconductor (MOS) material system is a technologically important implementation of spin-based quantum information processing. However, the MOS interface is imperfect leading to concerns about 1/f trap noise and variability in the electron g-factor due to spin–orbit (SO) effects. Here we advantageously use interface–SO coupling for a critical control axis in a double-quantum-dot singlet–triplet qubit. The magnetic field-orientation dependence of the g-factors is consistent with Rashba and Dresselhaus interface–SO contributions. The resulting all-electrical, two-axis control is also used to probe the MOS interface noise. The measured inhomogeneous dephasing time, T* 2m, of 1.6 μs is consistent with 99.95%more » 28Si enrichment. Furthermore, when tuned to be sensitive to exchange fluctuations, a quasi-static charge noise detuning variance of 2 μeV is observed, competitive with low-noise reports in other semiconductor qubits. This work, therefore, demonstrates that the MOS interface inherently provides properties for two-axis qubit control, while not increasing noise relative to other material choices.« less

Chip-scale fluorescence microscope based on a silo-filter complementary metal-oxide semiconductor image sensor.

PubMed

Ah Lee, Seung; Ou, Xiaoze; Lee, J Eugene; Yang, Changhuei

2013-06-01

We demonstrate a silo-filter (SF) complementary metal-oxide semiconductor (CMOS) image sensor for a chip-scale fluorescence microscope. The extruded pixel design with metal walls between neighboring pixels guides fluorescence emission through the thick absorptive filter to the photodiode of a pixel. Our prototype device achieves 13 μm resolution over a wide field of view (4.8 mm × 4.4 mm). We demonstrate bright-field and fluorescence longitudinal imaging of living cells in a compact, low-cost configuration.

Semiconductor assisted metal deposition for nanolithography applications

DOEpatents

Rajh, Tijana; Meshkov, Natalia; Nedelijkovic, Jovan M.; Skubal, Laura R.; Tiede, David M.; Thurnauer, Marion

2001-01-01

An article of manufacture and method of forming nanoparticle sized material components. A semiconductor oxide substrate includes nanoparticles of semiconductor oxide. A modifier is deposited onto the nanoparticles, and a source of metal ions are deposited in association with the semiconductor and the modifier, the modifier enabling electronic hole scavenging and chelation of the metal ions. The metal ions and modifier are illuminated to cause reduction of the metal ions to metal onto the semiconductor nanoparticles.

Semiconductor assisted metal deposition for nanolithography applications

DOEpatents

Rajh, Tijana; Meshkov, Natalia; Nedelijkovic, Jovan M.; Skubal, Laura R.; Tiede, David M.; Thurnauer, Marion

2002-01-01

An article of manufacture and method of forming nanoparticle sized material components. A semiconductor oxide substrate includes nanoparticles of semiconductor oxide. A modifier is deposited onto the nanoparticles, and a source of metal ions are deposited in association with the semiconductor and the modifier, the modifier enabling electronic hole scavenging and chelation of the metal ions. The metal ions and modifier are illuminated to cause reduction of the metal ions to metal onto the semiconductor nanoparticles.

Monolithic Integration of a Silicon Nanowire Field-Effect Transistors Array on a Complementary Metal-Oxide Semiconductor Chip for Biochemical Sensor Applications

PubMed Central

Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

2017-01-01

We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I−V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs. PMID:26348408

Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

PubMed

Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

2015-10-06

We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

CMOS array design automation techniques. [metal oxide semiconductors

NASA Technical Reports Server (NTRS)

Ramondetta, P.; Feller, A.; Noto, R.; Lombardi, T.

1975-01-01

A low cost, quick turnaround technique for generating custom metal oxide semiconductor arrays using the standard cell approach was developed, implemented, tested and validated. Basic cell design topology and guidelines are defined based on an extensive analysis that includes circuit, layout, process, array topology and required performance considerations particularly high circuit speed.

Can p-channel tunnel field-effect transistors perform as good as n-channel?

DOE Office of Scientific and Technical Information (OSTI.GOV)

Verhulst, A. S., E-mail: anne.verhulst@imec.be; Pourghaderi, M. A.; Collaert, N.

2014-07-28

We show that bulk semiconductor materials do not allow perfectly complementary p- and n-channel tunnel field-effect transistors (TFETs), due to the presence of a heavy-hole band. When tunneling in p-TFETs is oriented towards the gate-dielectric, field-induced quantum confinement results in a highest-energy subband which is heavy-hole like. In direct-bandgap IIIV materials, the most promising TFET materials, phonon-assisted tunneling to this subband degrades the subthreshold swing and leads to at least 10× smaller on-current than the desired ballistic on-current. This is demonstrated with quantum-mechanical predictions for p-TFETs with tunneling orthogonal to the gate, made out of InP, In{sub 0.53}Ga{sub 0.47}As, InAs,more » and a modified version of In{sub 0.53}Ga{sub 0.47}As with an artificially increased conduction-band density-of-states. We further show that even if the phonon-assisted current would be negligible, the build-up of a heavy-hole-based inversion layer prevents efficient ballistic tunneling, especially at low supply voltages. For p-TFET, a strongly confined n-i-p or n-p-i-p configuration is therefore recommended, as well as a tensily strained line-tunneling configuration.« less

Coffee-Ring Defined Short Channels for Inkjet-Printed Metal Oxide Thin-Film Transistors.

PubMed

Li, Yuzhi; Lan, Linfeng; Xiao, Peng; Sun, Sheng; Lin, Zhenguo; Song, Wei; Song, Erlong; Gao, Peixiong; Wu, Weijing; Peng, Junbiao

2016-08-03

Short-channel electronic devices several micrometers in length are difficult to implement by direct inkjet printing due to the limitation of position accuracy of the common inkjet printer system and the spread of functional ink on substrates. In this report, metal oxide thin-film transistors (TFTs) with channel lengths of 3.5 ± 0.7 μm were successfully fabricated with a common inkjet printer without any photolithography steps. Hydrophobic CYTOP coffee stripes, made by inkjet-printing and plasma-treating processes, were utilized to define the channel area of TFTs with channel lengths as short as ∼3.5 μm by dewetting the inks of the source/drain (S/D) precursors. Furthermore, by introduction of an ultrathin layer of PVA to modify the S/D surfaces, the spreading of precursor ink of the InOx semiconductor layer was well-controlled. The inkjet-printed short-channel TFTs exhibited a maximum mobility of 4.9 cm(2) V(-1) s(-1) and an on/off ratio of larger than 10(9). This approach of fabricating short-channel TFTs by inkjet printing will promote the large-area fabrication of short-channel TFTs in a cost-effective manner.

Effect of NO annealing on charge traps in oxide insulator and transition layer for 4H-SiC metal-oxide-semiconductor devices

NASA Astrophysics Data System (ADS)

Jia, Yifan; Lv, Hongliang; Niu, Yingxi; Li, Ling; Song, Qingwen; Tang, Xiaoyan; Li, Chengzhan; Zhao, Yanli; Xiao, Li; Wang, Liangyong; Tang, Guangming; Zhang, Yimen; Zhang, Yuming

2016-09-01

The effect of nitric oxide (NO) annealing on charge traps in the oxide insulator and transition layer in n-type 4H-SiC metal-oxide-semiconductor (MOS) devices has been investigated using the time-dependent bias stress (TDBS), capacitance-voltage (C-V), and secondary ion mass spectroscopy (SIMS). It is revealed that two main categories of charge traps, near interface oxide traps (Nniot) and oxide traps (Not), have different responses to the TDBS and C-V characteristics in NO-annealed and Ar-annealed samples. The Nniot are mainly responsible for the hysteresis occurring in the bidirectional C-V characteristics, which are very close to the semiconductor interface and can readily exchange charges with the inner semiconductor. However, Not is mainly responsible for the TDBS induced C-V shifts. Electrons tunneling into the Not are hardly released quickly when suffering TDBS, resulting in the problem of the threshold voltage stability. Compared with the Ar-annealed sample, Nniot can be significantly suppressed by the NO annealing, but there is little improvement of Not. SIMS results demonstrate that the Nniot are distributed within the transition layer, which correlated with the existence of the excess silicon. During the NO annealing process, the excess Si atoms incorporate into nitrogen in the transition layer, allowing better relaxation of the interface strain and effectively reducing the width of the transition layer and the density of Nniot. Project supported by the National Natural Science Foundation of China (Grant Nos. 61404098 and 61274079), the Doctoral Fund of Ministry of Education of China (Grant No. 20130203120017), the National Key Basic Research Program of China (Grant No. 2015CB759600), the National Grid Science & Technology Project, China (Grant No. SGRI-WD-71-14-018), and the Key Specific Project in the National Science & Technology Program, China (Grant Nos. 2013ZX02305002-002 and 2015CB759600).

Damage free Ar ion plasma surface treatment on In{sub 0.53}Ga{sub 0.47}As-on-silicon metal-oxide-semiconductor device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Koh, Donghyi; Shin, Seung Heon; Ahn, Jaehyun

2015-11-02

In this paper, we investigated the effect of in-situ Ar ion plasma surface pre-treatment in order to improve the interface properties of In{sub 0.53}Ga{sub 0.47}As for high-κ top-gate oxide deposition. X-ray photoelectron spectroscopy (XPS) and metal-oxide-semiconductor capacitors (MOSCAPs) demonstrate that Ar ion treatment removes the native oxide on In{sub 0.53}Ga{sub 0.47}As. The XPS spectra of Ar treated In{sub 0.53}Ga{sub 0.47}As show a decrease in the AsO{sub x} and GaO{sub x} signal intensities, and the MOSCAPs show higher accumulation capacitance (C{sub acc}), along with reduced frequency dispersion. In addition, Ar treatment is found to suppress the interface trap density (D{sub it}),more » which thereby led to a reduction in the threshold voltage (V{sub th}) degradation during constant voltage stress and relaxation. These results outline the potential of surface treatment for III-V channel metal-oxide-semiconductor devices and application to non-planar device process.« less

Effects of radiation and temperature on gallium nitride (GaN) metal-semiconductor-metal ultraviolet photodetectors

NASA Astrophysics Data System (ADS)

Chiamori, Heather C.; Angadi, Chetan; Suria, Ateeq; Shankar, Ashwin; Hou, Minmin; Bhattacharya, Sharmila; Senesky, Debbie G.

2014-06-01

The development of radiation-hardened, temperature-tolerant materials, sensors and electronics will enable lightweight space sub-systems (reduced packaging requirements) with increased operation lifetimes in extreme harsh environments such as those encountered during space exploration. Gallium nitride (GaN) is a ceramic, semiconductor material stable within high-radiation, high-temperature and chemically corrosive environments due to its wide bandgap (3.4 eV). These material properties can be leveraged for ultraviolet (UV) wavelength photodetection. In this paper, current results of GaN metal-semiconductor-metal (MSM) UV photodetectors behavior after irradiation up to 50 krad and temperatures of 15°C to 150°C is presented. These initial results indicate that GaN-based sensors can provide robust operation within extreme harsh environments. Future directions for GaN-based photodetector technology for down-hole, automotive and space exploration applications are also discussed.

Role of point defects and HfO2/TiN interface stoichiometry on effective work function modulation in ultra-scaled complementary metal-oxide-semiconductor devices

NASA Astrophysics Data System (ADS)

Pandey, R. K.; Sathiyanarayanan, Rajesh; Kwon, Unoh; Narayanan, Vijay; Murali, K. V. R. M.

2013-07-01

We investigate the physical properties of a portion of the gate stack of an ultra-scaled complementary metal-oxide-semiconductor (CMOS) device. The effects of point defects, such as oxygen vacancy, oxygen, and aluminum interstitials at the HfO2/TiN interface, on the effective work function of TiN are explored using density functional theory. We compute the diffusion barriers of such point defects in the bulk TiN and across the HfO2/TiN interface. Diffusion of these point defects across the HfO2/TiN interface occurs during the device integration process. This results in variation of the effective work function and hence in the threshold voltage variation in the devices. Further, we simulate the effects of varying the HfO2/TiN interface stoichiometry on the effective work function modulation in these extremely-scaled CMOS devices. Our results show that the interface rich in nitrogen gives higher effective work function, whereas the interface rich in titanium gives lower effective work function, compared to a stoichiometric HfO2/TiN interface. This theoretical prediction is confirmed by the experiment, demonstrating over 700 meV modulation in the effective work function.

Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

NASA Astrophysics Data System (ADS)

Tripathi, Udbhav; Kaur, Ramneek

2016-05-01

Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

Thin film three-dimensional topological insulator metal-oxide-semiconductor field-effect-transistors: A candidate for sub-10 nm devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Akhavan, N. D., E-mail: nima.dehdashti@uwa.edu.au; Jolley, G.; Umana-Membreno, G. A.

2014-08-28

Three-dimensional (3D) topological insulators (TI) are a new state of quantum matter in which surface states reside in the bulk insulating energy bandgap and are protected by time-reversal symmetry. It is possible to create an energy bandgap as a consequence of the interaction between the conduction band and valence band surface states from the opposite surfaces of a TI thin film, and the width of the bandgap can be controlled by the thin film thickness. The formation of an energy bandgap raises the possibility of thin-film TI-based metal-oxide-semiconductor field-effect-transistors (MOSFETs). In this paper, we explore the performance of MOSFETs basedmore » on thin film 3D-TI structures by employing quantum ballistic transport simulations using the effective continuous Hamiltonian with fitting parameters extracted from ab-initio calculations. We demonstrate that thin film transistors based on a 3D-TI structure provide similar electrical characteristics compared to a Si-MOSFET for gate lengths down to 10 nm. Thus, such a device can be a potential candidate to replace Si-based MOSFETs in the sub-10 nm regime.« less

Trap densities and transport properties of pentacene metal-oxide-semiconductor transistors. I. Analytical modeling of time-dependent characteristics

NASA Astrophysics Data System (ADS)

Basile, A. F.; Cramer, T.; Kyndiah, A.; Biscarini, F.; Fraboni, B.

2014-06-01

Metal-oxide-semiconductor (MOS) transistors fabricated with pentacene thin films were characterized by temperature-dependent current-voltage (I-V) characteristics, time-dependent current measurements, and admittance spectroscopy. The channel mobility shows almost linear variation with temperature, suggesting that only shallow traps are present in the semiconductor and at the oxide/semiconductor interface. The admittance spectra feature a broad peak, which can be modeled as the sum of a continuous distribution of relaxation times. The activation energy of this peak is comparable to the polaron binding energy in pentacene. The absence of trap signals in the admittance spectra confirmed that both the semiconductor and the oxide/semiconductor interface have negligible density of deep traps, likely owing to the passivation of SiO2 before pentacene growth. Nevertheless, current instabilities were observed in time-dependent current measurements following the application of gate-voltage pulses. The corresponding activation energy matches the energy of a hole trap in SiO2. We show that hole trapping in the oxide can explain both the temperature and the time dependences of the current instabilities observed in pentacene MOS transistors. The combination of these experimental techniques allows us to derive a comprehensive model for charge transport in hybrid architectures where trapping processes occur at various time and length scales.

A room-temperature magnetic semiconductor from a ferromagnetic metallic glass

NASA Astrophysics Data System (ADS)

Liu, Wenjian; Zhang, Hongxia; Shi, Jin-An; Wang, Zhongchang; Song, Cheng; Wang, Xiangrong; Lu, Siyuan; Zhou, Xiangjun; Gu, Lin; Louzguine-Luzgin, Dmitri V.; Chen, Mingwei; Yao, Kefu; Chen, Na

2016-12-01

Emerging for future spintronic/electronic applications, magnetic semiconductors have stimulated intense interest due to their promises for new functionalities and device concepts. So far, the so-called diluted magnetic semiconductors attract many attentions, yet it remains challenging to increase their Curie temperatures above room temperature, particularly those based on III-V semiconductors. In contrast to the concept of doping magnetic elements into conventional semiconductors to make diluted magnetic semiconductors, here we propose to oxidize originally ferromagnetic metals/alloys to form new species of magnetic semiconductors. We introduce oxygen into a ferromagnetic metallic glass to form a Co28.6Fe12.4Ta4.3B8.7O46 magnetic semiconductor with a Curie temperature above 600 K. The demonstration of p-n heterojunctions and electric field control of the room-temperature ferromagnetism in this material reflects its p-type semiconducting character, with a mobility of 0.1 cm2 V-1 s-1. Our findings may pave a new way to realize high Curie temperature magnetic semiconductors with unusual multifunctionalities.

A room-temperature magnetic semiconductor from a ferromagnetic metallic glass.

PubMed

Liu, Wenjian; Zhang, Hongxia; Shi, Jin-An; Wang, Zhongchang; Song, Cheng; Wang, Xiangrong; Lu, Siyuan; Zhou, Xiangjun; Gu, Lin; Louzguine-Luzgin, Dmitri V; Chen, Mingwei; Yao, Kefu; Chen, Na

2016-12-08

Emerging for future spintronic/electronic applications, magnetic semiconductors have stimulated intense interest due to their promises for new functionalities and device concepts. So far, the so-called diluted magnetic semiconductors attract many attentions, yet it remains challenging to increase their Curie temperatures above room temperature, particularly those based on III-V semiconductors. In contrast to the concept of doping magnetic elements into conventional semiconductors to make diluted magnetic semiconductors, here we propose to oxidize originally ferromagnetic metals/alloys to form new species of magnetic semiconductors. We introduce oxygen into a ferromagnetic metallic glass to form a Co 28.6 Fe 12.4 Ta 4.3 B 8.7 O 46 magnetic semiconductor with a Curie temperature above 600 K. The demonstration of p-n heterojunctions and electric field control of the room-temperature ferromagnetism in this material reflects its p-type semiconducting character, with a mobility of 0.1 cm 2  V -1  s -1 . Our findings may pave a new way to realize high Curie temperature magnetic semiconductors with unusual multifunctionalities.

A room-temperature magnetic semiconductor from a ferromagnetic metallic glass

PubMed Central

Liu, Wenjian; Zhang, Hongxia; Shi, Jin-an; Wang, Zhongchang; Song, Cheng; Wang, Xiangrong; Lu, Siyuan; Zhou, Xiangjun; Gu, Lin; Louzguine-Luzgin, Dmitri V.; Chen, Mingwei; Yao, Kefu; Chen, Na

2016-01-01

Emerging for future spintronic/electronic applications, magnetic semiconductors have stimulated intense interest due to their promises for new functionalities and device concepts. So far, the so-called diluted magnetic semiconductors attract many attentions, yet it remains challenging to increase their Curie temperatures above room temperature, particularly those based on III–V semiconductors. In contrast to the concept of doping magnetic elements into conventional semiconductors to make diluted magnetic semiconductors, here we propose to oxidize originally ferromagnetic metals/alloys to form new species of magnetic semiconductors. We introduce oxygen into a ferromagnetic metallic glass to form a Co28.6Fe12.4Ta4.3B8.7O46 magnetic semiconductor with a Curie temperature above 600 K. The demonstration of p–n heterojunctions and electric field control of the room-temperature ferromagnetism in this material reflects its p-type semiconducting character, with a mobility of 0.1 cm2 V−1 s−1. Our findings may pave a new way to realize high Curie temperature magnetic semiconductors with unusual multifunctionalities. PMID:27929059

Low-frequency noise in AlN/AlGaN/GaN metal-insulator-semiconductor devices: A comparison with Schottky devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Le, Son Phuong; Nguyen, Tuan Quy; Shih, Hong-An

2014-08-07

We have systematically investigated low-frequency noise (LFN) in AlN/AlGaN/GaN metal-insulator-semiconductor (MIS) devices, where the AlN gate insulator layer was sputtering-deposited on the AlGaN surface, in comparison with LFN in AlGaN/GaN Schottky devices. By measuring LFN in ungated two-terminal devices and heterojunction field-effect transistors (HFETs), we extracted LFN characteristics in the intrinsic gated region of the HFETs. Although there is a bias regime of the Schottky-HFETs in which LFN is dominated by the gate leakage current, LFN in the MIS-HFETs is always dominated by only the channel current. Analyzing the channel-current-dominated LFN, we obtained Hooge parameters α for the gated regionmore » as a function of the sheet electron concentration n{sub s} under the gate. In a regime of small n{sub s}, both the MIS- and Schottky-HFETs exhibit α∝n{sub s}{sup −1}. On the other hand, in a middle n{sub s} regime of the MIS-HFETs, α decreases rapidly like n{sub s}{sup −ξ} with ξ ∼ 2-3, which is not observed for the Schottky-HFETs. In addition, we observe strong increase in α∝n{sub s}{sup 3} in a large n{sub s} regime for both the MIS- and Schottky-HFETs.« less

Carrier statistics and quantum capacitance effects on mobility extraction in two-dimensional crystal semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Ma, Nan; Jena, Debdeep

2015-03-01

In this work, the consequence of the high band-edge density of states on the carrier statistics and quantum capacitance in transition metal dichalcogenide two-dimensional semiconductor devices is explored. The study questions the validity of commonly used expressions for extracting carrier densities and field-effect mobilities from the transfer characteristics of transistors with such channel materials. By comparison to experimental data, a new method for the accurate extraction of carrier densities and mobilities is outlined. The work thus highlights a fundamental difference between these materials and traditional semiconductors that must be considered in future experimental measurements.

Biomolecular detection using a metal semiconductor field effect transistor

NASA Astrophysics Data System (ADS)

Estephan, Elias; Saab, Marie-Belle; Buzatu, Petre; Aulombard, Roger; Cuisinier, Frédéric J. G.; Gergely, Csilla; Cloitre, Thierry

2010-04-01

In this work, our attention was drawn towards developing affinity-based electrical biosensors, using a MESFET (Metal Semiconductor Field Effect Transistor). Semiconductor (SC) surfaces must be prepared before the incubations with biomolecules. The peptides route was adapted to exceed and bypass the limits revealed by other types of surface modification due to the unwanted unspecific interactions. As these peptides reveal specific recognition of materials, then controlled functionalization can be achieved. Peptides were produced by phage display technology using a library of M13 bacteriophage. After several rounds of bio-panning, the phages presenting affinities for GaAs SC were isolated; the DNA of these specific phages were sequenced, and the peptide with the highest affinity was synthesized and biotinylated. To explore the possibility of electrical detection, the MESFET fabricated with the GaAs SC were used to detect the streptavidin via the biotinylated peptide in the presence of the bovine Serum Albumin. After each surface modification step, the IDS (current between the drain and the source) of the transistor was measured and a decrease in the intensity was detected. Furthermore, fluorescent microscopy was used in order to prove the specificity of this peptide and the specific localisation of biomolecules. In conclusion, the feasibility of producing an electrical biosensor using a MESFET has been demonstrated. Controlled placement, specific localization and detection of biomolecules on a MESFET transistor were achieved without covering the drain and the source. This method of functionalization and detection can be of great utility for biosensing application opening a new way for developing bioFETs (Biomolecular Field-Effect Transistor).

Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor.

PubMed

Nomura, Kenji; Ohta, Hiromichi; Ueda, Kazushige; Kamiya, Toshio; Hirano, Masahiro; Hosono, Hideo

2003-05-23

We report the fabrication of transparent field-effect transistors using a single-crystalline thin-film transparent oxide semiconductor, InGaO3(ZnO)5, as an electron channel and amorphous hafnium oxide as a gate insulator. The device exhibits an on-to-off current ratio of approximately 106 and a field-effect mobility of approximately 80 square centimeters per volt per second at room temperature, with operation insensitive to visible light irradiation. The result provides a step toward the realization of transparent electronics for next-generation optoelectronics.

Role of order and disorder on the electronic performances of oxide semiconductor thin film transistors

NASA Astrophysics Data System (ADS)

Martins, R.; Barquinha, P.; Ferreira, I.; Pereira, L.; Gonçalves, G.; Fortunato, E.

2007-02-01

The role of order and disorder on the electronic performances of n-type ionic oxides such as zinc oxide, gallium zinc oxide, and indium zinc oxide used as active (channel) or passive (drain/source) layers in thin film transistors (TFTs) processed at room temperature are discussed, taking as reference the known behavior observed in conventional covalent semiconductors such as silicon. The work performed shows that while in the oxide semiconductors the Fermi level can be pinned up within the conduction band, independent of the state of order, the same does not happen with silicon. Besides, in the oxide semiconductors the carrier mobility is not bandtail limited and so disorder does not affect so strongly the mobility as it happens in covalent semiconductors. The electrical properties of the oxide films (resistivity, carrier concentration, and mobility) are highly dependent on the oxygen vacancies (source of free carriers), which can be controlled by changing the oxygen partial pressure during the deposition process and/or by adding other metal ions to the matrix. In this case, we make the oxide matrix less sensitive to the presence of oxygen, widening the range of oxygen partial pressures that can be used and thus improving the process control of the film resistivity. The results obtained in fully transparent TFT using polycrystalline ZnO or amorphous indium zinc oxide (IZO) as channel layers and highly conductive poly/nanocrystalline ZGO films or amorphous IZO as drain/source layers show that both devices work in the enhancement mode, but the TFT with the highest electronic saturation mobility and on/off ratio 49.9cm2/Vs and 4.3×108, respectively, are the ones in which the active and passive layers are amorphous. The ZnO TFT whose channel is based on polycrystalline ZnO, the mobility and on/off ratio are, respectively, 26cm2/Vs and 3×106. This behavior is attributed to the fact that the electronic transport is governed by the s-like metal cation conduction bands

Impact of oxygen plasma postoxidation process on Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor capacitors

NASA Astrophysics Data System (ADS)

Lechaux, Y.; Fadjie-Djomkam, A. B.; Bollaert, S.; Wichmann, N.

2016-09-01

Capacitance-voltage (C-V) measurements and x-ray photoelectron spectroscopy (XPS) analysis were performed in order to investigate the effect of a oxygen (O2) plasma after oxide deposition on the Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor structure passivated with ammonia NH4OH solution. From C-V measurements, an improvement of charge control is observed using the O2 plasma postoxidation process on In0.53Ga0.47As, while the minimum of interface trap density remains at a good value lower than 1 × 1012 cm-2 eV-1. From XPS measurements, we found that NH4OH passivation removes drastically the Ga and As native oxides on the In0.53Ga0.47As surface and the O2 plasma postoxidation process enables the reduction of interface re-oxidation after post deposition annealing (PDA) of the oxide. The advanced hypothesis is the formation of interfacial barrier between Al2O3 and In0.53Ga0.47As which prevents the diffusion of oxygen species into the semiconductor surface during PDA.

Black Phosphorus-Zinc Oxide Nanomaterial Heterojunction for p-n Diode and Junction Field-Effect Transistor.

PubMed

Jeon, Pyo Jin; Lee, Young Tack; Lim, June Yeong; Kim, Jin Sung; Hwang, Do Kyung; Im, Seongil

2016-02-10

Black phosphorus (BP) nanosheet is two-dimensional (2D) semiconductor with distinct band gap and attracting recent attention from researches because it has some similarity to gapless 2D semiconductor graphene in the following two aspects: single element (P) for its composition and quite high mobilities depending on its fabrication conditions. Apart from several electronic applications reported with BP nanosheet, here we report for the first time BP nanosheet-ZnO nanowire 2D-1D heterojunction applications for p-n diodes and BP-gated junction field effect transistors (JFETs) with n-ZnO channel on glass. For these nanodevices, we take advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO. As a result, our BP-ZnO nanodimension p-n diode displays a high ON/OFF ratio of ∼10(4) in static rectification and shows kilohertz dynamic rectification as well while ZnO nanowire channel JFET operations are nicely demonstrated by BP gate switching in both electrostatics and kilohertz dynamics.

Improvement of hot-carrier and radiation hardnesses in metal-oxide-nitride-oxide semiconductor devices by irradiation-then-anneal treatments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chang-Liao, K.S.; Hwu, J.G.

The hardnesses of hot-carrier and radiation of metal-oxide nitride-oxide semiconductor (MONOS) devices can be improved by the irradiation-then-anneal (ITA) treatments. Each treatment includes an irradiation of Co-60 with a total dose of 1M rads(SiO[sub 2]) and an anneal in N[sub 2] at 400 C for 10 min successively. This improvement can be explained by the release of SiO[sub 2]/Si interfacial strain.

Study on effective MOSFET channel length extracted from gate capacitance

NASA Astrophysics Data System (ADS)

Tsuji, Katsuhiro; Terada, Kazuo; Fujisaka, Hisato

2018-01-01

The effective channel length (L GCM) of metal-oxide-semiconductor field-effect transistors (MOSFETs) is extracted from the gate capacitances of actual-size MOSFETs, which are measured by charge-injection-induced-error-free charge-based capacitance measurement (CIEF CBCM). To accurately evaluate the capacitances between the gate and the channel of test MOSFETs, the parasitic capacitances are removed by using test MOSFETs having various channel sizes and a source/drain reference device. A strong linear relationship between the gate-channel capacitance and the design channel length is obtained, from which L GCM is extracted. It is found that L GCM is slightly less than the effective channel length (L CRM) extracted from the measured MOSFET drain current. The reason for this is discussed, and it is found that the capacitance between the gate electrode and the source and drain regions affects this extraction.

Graphene oxide-zinc oxide nanocomposite as channel layer for field effect transistors: effect of ZnO loading on field effect transport.

PubMed

Jilani, S Mahaboob; Banerji, Pallab

2014-10-08

The effects of ZnO on graphene oxide (GO)-ZnO nanocomposites are investigated to tune the conductivity in GO under field effect regime. Zinc oxides with different concentrations from 5 wt % to 25 wt % are used in a GO matrix to increase the conductivity in the composite. Six sets of field effect transistors with pristine GO and GO-ZnO as the channel layer at varying ZnO concentrations were fabricated. From the transfer characteristics, it is observed that GO exhibited an insulating behavior and the transistors with low ZnO (5 wt %) concentration initially showed p-type conductivity that changes to n-type with increases in ZnO loading. This n-type dominance in conductivity is a consequence of the transfer of electrons from ZnO to the GO matrix. From X-ray photoelectron spectroscopic measurements, it is observed that the progressive reduction in the C-OH oxygen group took place with increases in ZnO loading. Thus, from insulating GO to p- and then n-type, conductivity in GO could be achieved with reduction in the C-OH oxygen group by photocatalytic reduction of GO with varying degrees of ZnO. The restoration of sp(2) electron network in the GO matrix with the anchoring of ZnO nanostructures was observed from Raman spectra. From UV-visible spectra, the band gap in pristine GO was found to be 3.98 eV and reduced to 2.8 eV with increase in ZnO attachment.

Development of p-type oxide semiconductors based on tin oxide and its alloys: application to thin film transistors

NASA Astrophysics Data System (ADS)

Barros, Ana Raquel Xarouco de

In spite of the recent p-type oxide TFTs developments based on SnOx and CuxO, the results achieved so far refer to devices processed at high temperatures and are limited by a low hole mobility and a low On-Off ratio and still there is no report on p-type oxide TFTs with performance similar to n-type, especially when comparing their field-effect mobility values, which are at least one order of magnitude higher on n-type oxide TFTs. Achieving high performance p-type oxide TFTs will definitely promote a new era for electronics in rigid and flexible substrates, away from silicon. None of the few reported p-channel oxide TFTs is suitable for practical applications, which demand significant improvements in the device engineering to meet the real-world electronic requirements, where low processing temperatures together with high mobility and high On-Off ratio are required for TFT and CMOS applications. The present thesis focuses on the study and optimization of p-type thin film transistors based on oxide semiconductors deposited by r.f. magnetron sputtering without intentional substrate heating. In this work several p-type oxide semiconductors were studied and optimized based on undoped tin oxide, Cu-doped SnOx and In-doped SnO2.

Comparative analysis of breakdown mechanism in thin SiO2 oxide films in metal-oxide-semiconductor structures under the action of heavy charged particles and a pulsed voltage

NASA Astrophysics Data System (ADS)

Zinchenko, V. F.; Lavrent'ev, K. V.; Emel'yanov, V. V.; Vatuev, A. S.

2016-02-01

Regularities in the breakdown of thin SiO2 oxide films in metal-oxide-semiconductors structures of power field-effect transistors under the action of single heavy charged particles and a pulsed voltage are studied experimentally. Using a phenomenological approach, we carry out comparative analysis of physical mechanisms and energy criteria of the SiO2 breakdown in extreme conditions of excitation of the electron subsystem in the subpicosecond time range.

Graphene-graphite oxide field-effect transistors.

PubMed

Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

2012-03-14

Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

Interface states and internal photoemission in p-type GaAs metal-oxide-semiconductor surfaces

NASA Technical Reports Server (NTRS)

Kashkarov, P. K.; Kazior, T. E.; Lagowski, J.; Gatos, H. C.

1983-01-01

An interface photodischarge study of p-type GaAs metal-oxide-semiconductor (MOS) structures revealed the presence of deep interface states and shallow donors and acceptors which were previously observed in n-type GaAs MOS through sub-band-gap photoionization transitions. For higher photon energies, internal photoemission was observed, i.e., injection of electrons to the conduction band of the oxide from either the metal (Au) or from the GaAs valence band; the threshold energies were found to be 3.25 and 3.7 + or - 0.1 eV, respectively. The measured photoemission current exhibited a thermal activation energy of about 0.06 eV, which is consistent with a hopping mechanism of electron transport in the oxide.

Air-stable n-channel organic thin-film transistors with high field-effect mobility based on N ,N'-bis(heptafluorobutyl)-3,4:9,10-perylene diimide

NASA Astrophysics Data System (ADS)

Oh, Joon Hak; Liu, Shuhong; Bao, Zhenan; Schmidt, Rüdiger; Würthner, Frank

2007-11-01

The thin-film transistor characteristics of n-channel organic semiconductor, N ,N'-bis(2,2,3,3,4,4,4-heptafluorobutyl)-perylene tetracarboxylic diimide, are described. The slip-stacked face-to-face molecular packing allows a very dense parallel arrangement of the molecules, leading to field-effect mobility as high as 0.72cm2V-1s-1. The mobility only slightly decreased after exposure to air and remained stable for more than 50days. Our results reveal that molecular packing effects such as close stacking of perylene diimide units and segregation effects imparted by the fluorinated side chains are crucial for the air stability.

Poole Frenkel current and Schottky emission in SiN gate dielectric in AlGaN/GaN metal insulator semiconductor heterostructure field effect transistors

NASA Astrophysics Data System (ADS)

Hanna, Mina J.; Zhao, Han; Lee, Jack C.

2012-10-01

We analyze the anomalous I-V behavior in SiN prepared by plasma enhanced chemical vapor deposition for use as a gate insulator in AlGaN/GaN metal insulator semiconductor heterostructure filed effect transistors (HFETs). We observe leakage current across the dielectric with opposite polarity with respect to the applied electric field once the voltage sweep reaches a level below a determined threshold. This is observed as the absolute minimum of the leakage current does not occur at minimum voltage level (0 V) but occurs earlier in the sweep interval. Curve-fitting analysis suggests that the charge-transport mechanism in this region is Poole-Frenkel current, followed by Schottky emission due to band bending. Despite the current anomaly, the sample devices have shown a notable reduction of leakage current of over 2 to 6 order of magnitudes compared to the standard Schottky HFET. We show that higher pressures and higher silane concentrations produce better films manifesting less trapping. This conforms to our results that we reported in earlier publications. We found that higher chamber pressure achieves higher sheet carrier concentration that was found to be strongly dependent on the trapped space charge at the SiN/GaN interface. This would suggest that a lower chamber pressure induces more trap states into the SiN/GaN interface.

Negative bias-and-temperature stress-assisted activation of oxygen-vacancy hole traps in 4H-silicon carbide metal-oxide-semiconductor field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ettisserry, D. P., E-mail: deva@umd.edu, E-mail: neil@umd.edu; Goldsman, N., E-mail: deva@umd.edu, E-mail: neil@umd.edu; Akturk, A.

We use hybrid-functional density functional theory-based Charge Transition Levels (CTLs) to study the electrical activity of near-interfacial oxygen vacancies located in the oxide side of 4H-Silicon Carbide (4H-SiC) power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). Based on the “amorphousness” of their local atomic environment, oxygen vacancies are shown to introduce their CTLs either within (permanently electrically active) or outside of (electrically inactive) the 4H-SiC bandgap. The “permanently electrically active” centers are likely to cause threshold voltage (V{sub th}) instability at room temperature. On the other hand, we show that the “electrically inactive” defects could be transformed into various “electrically active” configurations undermore » simultaneous application of negative bias and high temperature stresses. Based on this observation, we present a model for plausible oxygen vacancy defects that could be responsible for the recently observed excessive worsening of V{sub th} instability in 4H-SiC power MOSFETs under high temperature-and-gate bias stress. This model could also explain the recent electrically detected magnetic resonance observations in 4H-SiC MOSFETs.« less

Charge-Transfer-Induced p-Type Channel in MoS2 Flake Field Effect Transistors.

PubMed

Min, Sung-Wook; Yoon, Minho; Yang, Sung Jin; Ko, Kyeong Rok; Im, Seongil

2018-01-31

The two-dimensional transition-metal dichalcogenide semiconductor MoS 2 has received extensive attention for decades because of its outstanding electrical and mechanical properties for next-generation devices. One weakness of MoS 2 , however, is that it shows only n-type conduction, revealing its limitations for homogeneous PN diodes and complementary inverters. Here, we introduce a charge-transfer method to modify the conduction property of MoS 2 from n- to p-type. We initially deposited an n-type InGaZnO (IGZO) film on top of the MoS 2 flake so that electron charges might be transferred from MoS 2 to IGZO during air ambient annealing. As a result, electron charges were depleted in MoS 2 . Such charge depletion lowered the MoS 2 Fermi level, which makes hole conduction favorable in MoS 2 when optimum source/drain electrodes with a high work function are selected. Our IGZO-supported MoS 2 flake field effect transistors (FETs) clearly display channel-type conversion from n- to p-channel in this way. Under short- and long-annealing conditions, n- and p-channel MoS 2 FETs are achieved, respectively, and a low-voltage complementary inverter is demonstrated using both channels in a single MoS 2 flake.

Control of Ga-oxide interlayer growth and Ga diffusion in SiO2/GaN stacks for high-quality GaN-based metal-oxide-semiconductor devices with improved gate dielectric reliability

NASA Astrophysics Data System (ADS)

Yamada, Takahiro; Watanabe, Kenta; Nozaki, Mikito; Yamada, Hisashi; Takahashi, Tokio; Shimizu, Mitsuaki; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

2018-01-01

A simple and feasible method for fabricating high-quality and highly reliable GaN-based metal-oxide-semiconductor (MOS) devices was developed. The direct chemical vapor deposition of SiO2 films on GaN substrates forming Ga-oxide interlayers was carried out to fabricate SiO2/GaO x /GaN stacked structures. Although well-behaved hysteresis-free GaN-MOS capacitors with extremely low interface state densities below 1010 cm-2 eV-1 were obtained by postdeposition annealing, Ga diffusion into overlying SiO2 layers severely degraded the dielectric breakdown characteristics. However, this problem was found to be solved by rapid thermal processing, leading to the superior performance of the GaN-MOS devices in terms of interface quality, insulating property, and gate dielectric reliability.

SOI N-Channel Field Effect Transistors, CHT-NMOS80, for Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Almad

2009-01-01

high temperature N-channel MOSFET (metal-oxide semiconductor field-effect transistor) device that was manufactured by CISSOID. This high voltage, medium-power transistor is fabricated using SOI processes and is designed for extreme wide temperature applications such as geothermal well logging, aerospace and avionics, and automotive industry. It has a high DC current capability and is specified for operation in the temperature range of -55 C to +225 C

Semiconductor quantum dot super-emitters: spontaneous emission enhancement combined with suppression of defect environment using metal-oxide plasmonic metafilms

NASA Astrophysics Data System (ADS)

Sadeghi, Seyed M.; Wing, Waylin J.; Gutha, Rithvik R.; Sharp, Christina

2018-01-01

We demonstrate that a metal-oxide plasmonic metafilm consisting of a Si/Al oxide junction in the vicinity of a thin gold layer can quarantine excitons in colloidal semiconductor quantum dots against their defect environments. This process happens while the plasmon fields of the gold layer enhance spontaneous emission decay rates of the quantum dots. We study the emission dynamics of such quantum dots when the distance between the Si/Al oxide junction and the gold thin layer is varied. The results show that for distances less than a critical value the lifetime of the quantum dots can be elongated while they experience intense plasmon fields. This suggests that the metal-oxide metafilm can keep photo-excited electrons in the cores of the quantum dots, suppressing their migration to the surface defect sites. This leads to suppression of Auger recombination, offering quantum dot super-emitters with emission that is enhanced not only by the plasmon fields (Purcell effect), but also by strong suppression of the non-radiative decay caused by the defect sites.

Rapid Transition of the Hole Rashba Effect from Strong Field Dependence to Saturation in Semiconductor Nanowires

NASA Astrophysics Data System (ADS)

Luo, Jun-Wei; Li, Shu-Shen; Zunger, Alex

2017-09-01

The electric field manipulation of the Rashba spin-orbit coupling effects provides a route to electrically control spins, constituting the foundation of the field of semiconductor spintronics. In general, the strength of the Rashba effects depends linearly on the applied electric field and is significant only for heavy-atom materials with large intrinsic spin-orbit interaction under high electric fields. Here, we illustrate in 1D semiconductor nanowires an anomalous field dependence of the hole (but not electron) Rashba effect (HRE). (i) At low fields, the strength of the HRE exhibits a steep increase with the field so that even low fields can be used for device switching. (ii) At higher fields, the HRE undergoes a rapid transition to saturation with a giant strength even for light-atom materials such as Si (exceeding 100 meV Å). (iii) The nanowire-size dependence of the saturation HRE is rather weak for light-atom Si, so size fluctuations would have a limited effect; this is a key requirement for scalability of Rashba-field-based spintronic devices. These three features offer Si nanowires as a promising platform for the realization of scalable complementary metal-oxide-semiconductor compatible spintronic devices.

Phosphorus Doping Effect in a Zinc Oxide Channel Layer to Improve the Performance of Oxide Thin-Film Transistors

NASA Astrophysics Data System (ADS)

Han, Dong-Suk; Moon, Yeon-Keon; Lee, Sih; Kim, Kyung-Taek; Moon, Dae-Yong; Lee, Sang-Ho; Kim, Woong-Sun; Park, Jong-Wan

2012-09-01

In this study, we fabricated phosphorus-doped zinc oxide-based thin-film transistors (TFTs) using direct current (DC) magnetron sputtering at a relatively low temperature of 100°C. To improve the TFT device performance, including field-effect mobility and bias stress stability, phosphorus dopants were employed to suppress the generation of intrinsic defects in the ZnO-based semiconductor. The positive and negative bias stress stabilities were dramatically improved by introducing the phosphorus dopants, which could prevent turn-on voltage ( V ON) shift in the TFTs caused by charge trapping within the active channel layer. The study showed that phosphorus doping in ZnO was an effective method to control the electrical properties of the active channel layers and improve the bias stress stability of oxide-based TFTs.

Recent Advances of Solution-Processed Metal Oxide Thin-Film Transistors.

PubMed

Xu, Wangying; Li, Hao; Xu, Jian-Bin; Wang, Lei

2018-03-06

Solution-processed metal oxide thin-film transistors (TFTs) are considered as one of the most promising transistor technologies for future large-area flexible electronics. This review surveys the recent advances in solution-based oxide TFTs, including n-type oxide semiconductors, oxide dielectrics and p-type oxide semiconductors. Firstly, we provide an introduction on oxide TFTs and the TFT configurations and operating principles. Secondly, we present the recent progress in solution-processed n-type transistors, with a special focus on low-temperature and large-area solution processed approaches as well as novel non-display applications. Thirdly, we give a detailed analysis of the state-of-the-art solution-processed oxide dielectrics for low-voltage electronics. Fourthly, we discuss the recent progress in solution-based p-type oxide semiconductors, which will enable the highly desirable future low-cost large-area complementary circuits. Finally, we draw the conclusions and outline the perspectives over the research field.

The fabrication of carbon nanotube field-effect transistors with semiconductors as the source and drain contact materials.

PubMed

Xiao, Z; Camino, F E

2009-04-01

Sb(2)Te(3) and Bi(2)Te(2)Se semiconductor materials were used as the source and drain contact materials in the fabrication of carbon nanotube field-effect transistors (CNTFETs). Ultra-purified single-walled carbon nanotubes (SWCNTs) were ultrasonically dispersed in N-methyl pyrrolidone solvent. Dielectrophoresis was used to deposit and align SWCNTs for fabrication of CNTFETs. The Sb(2)Te(3)- and Bi(2)Te(2)Se-based CNTFETs demonstrate p-type metal-oxide-silicon-like I-V curves with high on/off drain-source current ratio at large drain-source voltages and good saturation of drain-source current with increasing drain-source voltage. The fabrication process developed is novel and has general meaning, and could be used for the fabrication of SWCNT-based integrated devices and systems with semiconductor contact materials.

Determination of Insulator-to-Semiconductor Transition in Sol-Gel Oxide Semiconductors Using Derivative Spectroscopy.

PubMed

Lee, Woobin; Choi, Seungbeom; Kim, Kyung Tae; Kang, Jingu; Park, Sung Kyu; Kim, Yong-Hoon

2015-12-23

We report a derivative spectroscopic method for determining insulator-to-semiconductor transition during sol-gel metal-oxide semiconductor formation. When an as-spun sol-gel precursor film is photochemically activated and changes to semiconducting state, the light absorption characteristics of the metal-oxide film is considerable changed particularly in the ultraviolet region. As a result, a peak is generated in the first-order derivatives of light absorption ( A' ) vs. wavelength (λ) plots, and by tracing the peak center shift and peak intensity, transition from insulating-to-semiconducting state of the film can be monitored. The peak generation and peak center shift are described based on photon-energy-dependent absorption coefficient of metal-oxide films. We discuss detailed analysis method for metal-oxide semiconductor films and its application in thin-film transistor fabrication. We believe this derivative spectroscopy based determination can be beneficial for a non-destructive and a rapid monitoring of the insulator-to-semiconductor transition in sol-gel oxide semiconductor formation.

Nanophotonic Hot Electron Solar-Blind Ultraviolet Detectors with a Metal-Oxide-Semiconductor Structure

NASA Astrophysics Data System (ADS)

Wang, Zhiyuan

Solar-blind ultraviolet detection refers to photon detection specifically in the wavelength range of 200 nm to 320 nm. Without background noises from solar radiation, it has broad applications from homeland security to environmental monitoring. In this thesis, we design and fabricate a nanophotonic metal-oxide-semiconductor device for solar-blind UV detection. Instead of using semiconductors as the active absorber, we use metal Sn nano- grating structures to absorb UV photons and generate hot electrons for internal photoemission across the Sn/SiO 2 interfacial barrier, thereby generating photocurrent between metal and semiconductor region upon UV excitation. The large metal/oxide interfacial energy barrier enables solar-blind UV detection by blocking the less energetic electrons excited by visible photons. With optimized design, 85% UV absorption and hot electron excitation can be achieved within the mean free path of 20 nm from the metal/oxide interface. This feature greatly enhances hot electron transport across the interfacial barrier to generate photocurrent. Various fabrication techniques have been developed for preparing nano gratings. For nominally 20 nm-thick deposited Sn, the self- formed pseudo-periodic nanostructure help achieve 75% UV absorption from lambda=200 nm to 300 nm. With another layer of nominally 20 nm-thick Sn, similar UV absorption is maintained while conductivity is improved, which is beneficial for overall device efficiency. The Sn/SiO2/Si MOS devices show good solar-blind character while achieving 13% internal quantum efficiency for 260 nm UV with only 20 nm-thick Sn and some devices demonstrate much higher (even >100%) internal quantum efficiency. While a more accurate estimation of device effective area is needed for proving our calculation, these results indeed show a great potential for this type of hot-electron-based photodetectors and for Sn nanostructure as an effective UV absorber. The simple geometry of the self- assembled Sn

Comparison of effect of 5 MeV proton and Co-60 gamma irradiation on silicon NPN rf power transistors and N-channel depletion MOSFETs

NASA Astrophysics Data System (ADS)

Gnana Prakash, A. P.; Pradeep, T. M.; Hegde, Vinayakprasanna N.; Pushpa, N.; Bajpai, P. K.; Patel, S. P.; Trivedi, Tarkeshwar; Bhushan, K. G.

2017-12-01

NPN transistors and N-channel depletion metal oxide semiconductor field effect transistors (MOSFETs) were irradiated with 5 MeV protons and 60Co gamma radiation in the dose ranging from 1 Mrad(Si) to 100 Mrad(Si). The different electrical characteristics of the NPN transistor such as Gummel characteristics, excess base current (ΔIB), dc current gain (hFE), transconductance (gm), displacement damage factor (K) and output characteristics were studied as a function of total dose. The different electrical characteristics of N-channel MOSFETs such as threshold voltage (Vth), density of interface trapped charges (ΔNit), density of oxide trapped charges (ΔNot), transconductance (gm), mobility (µ) and drain saturation current (IDSat) were studied systematically before and after irradiation in the same dose ranges. A considerable increase in the base current (IB) and decrease in the hFE, gm and collector saturation current (ICSat) were observed after irradiation in the case of the NPN transistor. In the N-channel MOSFETs, the ΔNit and ΔNot were found to increase and Vth, gm, µ and IDSat were found to decrease with increase in the radiation dose. The 5 MeV proton irradiation results of both the NPN transistor and N-channel MOSFETs were compared with 60Co gamma-irradiated devices in the same dose ranges. It was observed that the degradation in 5 MeV proton-irradiated devices is more when compared with the 60Co gamma-irradiated devices at higher total doses.

Single Event Effects (SEE) for Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)

NASA Technical Reports Server (NTRS)

Lauenstein, Jean-Marie

2011-01-01

Single-event gate rupture (SEGR) continues to be a key failure mode in power MOSFETs. (1) SEGR is complex, making rate prediction difficult SEGR mechanism has two main components: (1) Oxide damage-- Reduces field required for rupture (2) Epilayer response -- Creates transient high field across the oxide.

Bias temperature instability in tunnel field-effect transistors

NASA Astrophysics Data System (ADS)

Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

2017-04-01

We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.

Investigation of 'surface donors' in Al2O3/AlGaN/GaN metal-oxide-semiconductor heterostructures: Correlation of electrical, structural, and chemical properties

NASA Astrophysics Data System (ADS)

Ťapajna, M.; Stoklas, R.; Gregušová, D.; Gucmann, F.; Hušeková, K.; Haščík, Š.; Fröhlich, K.; Tóth, L.; Pécz, B.; Brunner, F.; Kuzmík, J.

2017-12-01

III-N surface polarization compensating charge referred here to as 'surface donors' (SD) was analyzed in Al2O3/AlGaN/GaN metal-oxide-semiconductor (MOS) heterojunctions using scaled oxide films grown by metal-organic chemical vapor deposition at 600 °C. We systematically investigated impact of HCl pre-treatment prior to oxide deposition and post-deposition annealing (PDA) at 700 °C. SD density was reduced down to 1.9 × 1013 cm-2 by skipping HCl pre-treatment step as compared to 3.3 × 1013 cm-2 for structures with HCl pre-treatment followed by PDA. The nature and origin of SD was then analyzed based on the correlation between electrical, micro-structural, and chemical properties of the Al2O3/GaN interfaces with different SD density (NSD). From the comparison between distributions of interface traps of MOS heterojunction with different NSD, it is demonstrated that SD cannot be attributed to interface trapped charge. Instead, variation in the integrity of the GaOx interlayer confirmed by X-ray photoelectron spectroscopy is well correlated with NSD, indicating SD may be formed by border traps at the Al2O3/GaOx interface.

Metal Contacts in Semiconductors.

DTIC Science & Technology

1983-11-01

greater understanding of the role that imperfec- tions, defects etc. play in the formation of Schottk~y barriers and related devices. In section 1 of...these effects. In Section 2 of this report we consider the role of surface defects in the pinning of the Fermi level at free semiconductor surfaces and...in the adsorption and oxidation processes involved when these surfaces interact with gases and metals. The role of imperfections at metal

An underlap field-effect transistor for electrical detection of influenza

NASA Astrophysics Data System (ADS)

Lee, Kwang-Won; Choi, Sung-Jin; Ahn, Jae-Hyuk; Moon, Dong-Il; Park, Tae Jung; Lee, Sang Yup; Choi, Yang-Kyu

2010-01-01

An underlap channel-embedded field-effect transistor (FET) is proposed for label-free biomolecule detection. Specifically, silica binding protein fused with avian influenza (AI) surface antigen and avian influenza antibody (anti-AI) were designed as a receptor molecule and a target material, respectively. The drain current was significantly decreased after the binding of negatively charged anti-AI on the underlap channel. A set of control experiments supports that only the biomolecules on the underlap channel effectively modulate the drain current. With the merits of a simple fabrication process, complementary metal-oxide-semiconductor compatibility, and enhanced sensitivity, the underlap FET could be a promising candidate for a chip-based biosensor.

EDITORIAL: Oxide semiconductors

NASA Astrophysics Data System (ADS)

Kawasaki, M.; Makino, T.

2005-04-01

growth of p-type layers, ferromagnetic behaviour in transition-metal doped oxide is also fuelling renewed interest from the spintronic point of view. Since some of the related reports remain controversial, a critical discussion of the magnetic properties of these doped oxides is made by Fukumura et al. Before the observation of electro-luminescence from the ZnO p-n homojunction reported by Tsukazaki et al (2005 Nature Mater. 4 42), the afore-mentioned advantages have been explored and exploited by alternative methods, such as heteroepitaxy in which p-n heterostructures can be obtained by depositing n-type ZnO films on other p-type oxides while still utilizing ZnO as their active layer. Researchers in Hosono's group observed the high-intensity band-edge emission from such heterostructures for the first time (Ohta H et al 2000 Appl. Phys. Lett. 77 475). They have also successfully extended their research fields to the development of a transparent oxide transistor based on homologous compounds, which is reviewed by Kamiya and Hosono in this special issue. As can be seen from these demonstrations, the advantage of oxides is, of course, based on the fact that many elements in the periodic table can form compounds with oxygen. Since the discovery of high-temperature superconductors, these multi-component oxides have exploited the new field known as the science of strongly correlated-electron materials, whose recent progress is reviewed by Inoue. Although the collection of papers included in this special issue covers a good cross-section of the development of oxide semiconductors and correlated-electron oxides to date, this is not meant to be exhaustive. There are a number of unavoidable omissions, such as theoretical studies except for some theoretical predictions on the room-temperature Bose-Einstein condensation of exciton-polaritons found in the article by Chichibu et al. We hope this issue promotes further development of this exciting field. The guest editors would like to

Rapid Transition of the Hole Rashba Effect from Strong Field Dependence to Saturation in Semiconductor Nanowires.

PubMed

Luo, Jun-Wei; Li, Shu-Shen; Zunger, Alex

2017-09-22

The electric field manipulation of the Rashba spin-orbit coupling effects provides a route to electrically control spins, constituting the foundation of the field of semiconductor spintronics. In general, the strength of the Rashba effects depends linearly on the applied electric field and is significant only for heavy-atom materials with large intrinsic spin-orbit interaction under high electric fields. Here, we illustrate in 1D semiconductor nanowires an anomalous field dependence of the hole (but not electron) Rashba effect (HRE). (i) At low fields, the strength of the HRE exhibits a steep increase with the field so that even low fields can be used for device switching. (ii) At higher fields, the HRE undergoes a rapid transition to saturation with a giant strength even for light-atom materials such as Si (exceeding 100 meV Å). (iii) The nanowire-size dependence of the saturation HRE is rather weak for light-atom Si, so size fluctuations would have a limited effect; this is a key requirement for scalability of Rashba-field-based spintronic devices. These three features offer Si nanowires as a promising platform for the realization of scalable complementary metal-oxide-semiconductor compatible spintronic devices.

Numerical investigation of metal-semiconductor-insulator-semiconductor passivated hole contacts based on atomic layer deposited AlO x

NASA Astrophysics Data System (ADS)

Ke, Cangming; Xin, Zheng; Ling, Zhi Peng; Aberle, Armin G.; Stangl, Rolf

2017-08-01

Excellent c-Si tunnel layer surface passivation has been obtained recently in our lab, using atomic layer deposited aluminium oxide (ALD AlO x ) in the tunnel layer regime of 0.9 to 1.5 nm, investigated to be applied for contact passivation. Using the correspondingly measured interface properties, this paper compares the theoretical collection efficiency of a conventional metal-semiconductor (MS) contact on diffused p+ Si to a metal-semiconductor-insulator-semiconductor (MSIS) contact on diffused p+ Si or on undoped n-type c-Si. The influences of (1) the tunnel layer passivation quality at the tunnel oxide interface (Q f and D it), (2) the tunnel layer thickness and the electron and hole tunnelling mass, (3) the tunnel oxide material, and (4) the semiconductor capping layer material properties are investigated numerically by evaluation of solar cell efficiency, open-circuit voltage, and fill factor.

Monolithic integration of a vertical cavity surface emitting laser and a metal semiconductor field effect transistor

NASA Astrophysics Data System (ADS)

Yang, Y. J.; Dziura, T. G.; Bardin, T.; Wang, S. C.; Fernandez, R.; Liao, Andrew S. H.

1993-02-01

Monolithic integration of a vertical cavity surface emitting laser (VCSEL) and a metal semiconductor field effect transistor (MESFET) is reported for the first time. The epitaxial layers for both GaAs VCSELs and MESFETs are grown on an n-type GaAs substrate by molecular-beam epitaxy at the same time. The VCSELs with a 10-micron diam active region exhibit an average threshold current (Ith) of 6 mA and a continuous wave (CW) maximum power of 1.1 mW. The MESFETs with a 3-micron gate length have a transconductance of 50 mS/mm. The laser output is modulated by the gate voltage of the MESFETs and exhibits an optical/electrical conversion factor of 0.5 mW/V.

Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors

NASA Astrophysics Data System (ADS)

Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

2016-04-01

In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade-1 and 3.62 × 1011 eV-1 cm-2, respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

Artificial semiconductor/insulator superlattice channel structure for high-performance oxide thin-film transistors

PubMed Central

Ahn, Cheol Hyoun; Senthil, Karuppanan; Cho, Hyung Koun; Lee, Sang Yeol

2013-01-01

High-performance thin-film transistors (TFTs) are the fundamental building blocks in realizing the potential applications of the next-generation displays. Atomically controlled superlattice structures are expected to induce advanced electric and optical performance due to two-dimensional electron gas system, resulting in high-electron mobility transistors. Here, we have utilized a semiconductor/insulator superlattice channel structure comprising of ZnO/Al2O3 layers to realize high-performance TFTs. The TFT with ZnO (5 nm)/Al2O3 (3.6 nm) superlattice channel structure exhibited high field effect mobility of 27.8 cm2/Vs, and threshold voltage shift of only < 0.5 V under positive/negative gate bias stress test during 2 hours. These properties showed extremely improved TFT performance, compared to ZnO TFTs. The enhanced field effect mobility and stability obtained for the superlattice TFT devices were explained on the basis of layer-by-layer growth mode, improved crystalline nature of the channel layers, and passivation effect of Al2O3 layers. PMID:24061388

Metal oxides for optoelectronic applications.

PubMed

Yu, Xinge; Marks, Tobin J; Facchetti, Antonio

2016-04-01

Metal oxides (MOs) are the most abundant materials in the Earth's crust and are ingredients in traditional ceramics. MO semiconductors are strikingly different from conventional inorganic semiconductors such as silicon and III-V compounds with respect to materials design concepts, electronic structure, charge transport mechanisms, defect states, thin-film processing and optoelectronic properties, thereby enabling both conventional and completely new functions. Recently, remarkable advances in MO semiconductors for electronics have been achieved, including the discovery and characterization of new transparent conducting oxides, realization of p-type along with traditional n-type MO semiconductors for transistors, p-n junctions and complementary circuits, formulations for printing MO electronics and, most importantly, commercialization of amorphous oxide semiconductors for flat panel displays. This Review surveys the uniqueness and universality of MOs versus other unconventional electronic materials in terms of materials chemistry and physics, electronic characteristics, thin-film fabrication strategies and selected applications in thin-film transistors, solar cells, diodes and memories.

Metal oxides for optoelectronic applications

NASA Astrophysics Data System (ADS)

Yu, Xinge; Marks, Tobin J.; Facchetti, Antonio

2016-04-01

Metal oxides (MOs) are the most abundant materials in the Earth's crust and are ingredients in traditional ceramics. MO semiconductors are strikingly different from conventional inorganic semiconductors such as silicon and III-V compounds with respect to materials design concepts, electronic structure, charge transport mechanisms, defect states, thin-film processing and optoelectronic properties, thereby enabling both conventional and completely new functions. Recently, remarkable advances in MO semiconductors for electronics have been achieved, including the discovery and characterization of new transparent conducting oxides, realization of p-type along with traditional n-type MO semiconductors for transistors, p-n junctions and complementary circuits, formulations for printing MO electronics and, most importantly, commercialization of amorphous oxide semiconductors for flat panel displays. This Review surveys the uniqueness and universality of MOs versus other unconventional electronic materials in terms of materials chemistry and physics, electronic characteristics, thin-film fabrication strategies and selected applications in thin-film transistors, solar cells, diodes and memories.

Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

PubMed Central

Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

2016-01-01

Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

AlN and Al oxy-nitride gate dielectrics for reliable gate stacks on Ge and InGaAs channels

DOE Office of Scientific and Technical Information (OSTI.GOV)

Guo, Y.; Li, H.; Robertson, J.

2016-05-28

AlN and Al oxy-nitride dielectric layers are proposed instead of Al{sub 2}O{sub 3} as a component of the gate dielectric stacks on higher mobility channels in metal oxide field effect transistors to improve their positive bias stress instability reliability. It is calculated that the gap states of nitrogen vacancies in AlN lie further away in energy from the semiconductor band gap than those of oxygen vacancies in Al{sub 2}O{sub 3}, and thus AlN might be less susceptible to charge trapping and have a better reliability performance. The unfavourable defect energy level distribution in amorphous Al{sub 2}O{sub 3} is attributed tomore » its larger coordination disorder compared to the more symmetrically bonded AlN. Al oxy-nitride is also predicted to have less tendency for charge trapping.« less

Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

PubMed

Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

2018-01-01

Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Electrical hysteresis in p-GaN metal-oxide-semiconductor capacitor with atomic-layer-deposited Al2O3 as gate dielectric

NASA Astrophysics Data System (ADS)

Zhang, Kexiong; Liao, Meiyong; Imura, Masataka; Nabatame, Toshihide; Ohi, Akihiko; Sumiya, Masatomo; Koide, Yasuo; Sang, Liwen

2016-12-01

The electrical hysteresis in current-voltage (I-V) and capacitance-voltage characteristics was observed in an atomic-layer-deposited Al2O3/p-GaN metal-oxide-semiconductor capacitor (PMOSCAP). The absolute minimum leakage currents of the PMOSCAP for forward and backward I-V scans occurred not at 0 V but at -4.4 and +4.4 V, respectively. A negative flat-band voltage shift of 5.5 V was acquired with a capacitance step from +4.4 to +6.1 V during the forward scan. Mg surface accumulation on p-GaN was demonstrated to induce an Mg-Ga-Al-O oxidized layer with a trap density on the order of 1013 cm-2. The electrical hysteresis is attributed to the hole trapping and detrapping process in the traps of the Mg-Ga-Al-O layer via the Poole-Frenkel mechanism.

Valorization of GaN based metal-organic chemical vapor deposition dust a semiconductor power device industry waste through mechanochemical oxidation and leaching: A sustainable green process.

PubMed

Swain, Basudev; Mishra, Chinmayee; Lee, Chan Gi; Park, Kyung-Soo; Lee, Kun-Jae

2015-07-01

Dust generated during metal organic vapor deposition (MOCVD) process of GaN based semiconductor power device industry contains significant amounts of gallium and indium. These semiconductor power device industry wastes contain gallium as GaN and Ga0.97N0.9O0.09 is a concern for the environment which can add value through recycling. In the present study, this waste is recycled through mechanochemical oxidation and leaching. For quantitative recovery of gallium, two different mechanochemical oxidation leaching process flow sheets are proposed. In one process, first the Ga0.97N0.9O0.09 of the MOCVD dust is leached at the optimum condition. Subsequently, the leach residue is mechanochemically treated, followed by oxidative annealing and finally re-leached. In the second process, the MOCVD waste dust is mechanochemically treated, followed by oxidative annealing and finally leached. Both of these treatment processes are competitive with each other, appropriate for gallium leaching and treatment of the waste MOCVD dust. Without mechanochemical oxidation, 40.11 and 1.86 w/w% of gallium and Indium are leached using 4M HCl, 100°C and pulp density of 100 kg/m(3,) respectively. After mechanochemical oxidation, both these processes achieved 90 w/w% of gallium and 1.86 w/w% of indium leaching at their optimum condition. Copyright © 2015 Elsevier Inc. All rights reserved.

Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study

PubMed Central

Schulze, D; Wolff, J; Rottke, D

2014-01-01

Objectives: The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Methods: Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO® head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). Results: The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; −5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; −14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; −16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Conclusions: Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region. PMID:25143020

Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study.

PubMed

Koivisto, J; Schulze, D; Wolff, J; Rottke, D

2014-01-01

The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO(®) head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; -5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; -14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; -16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region.

Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

PubMed

Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

2011-02-22

Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

Fabrication of Hydrogenated Diamond Metal-Insulator-Semiconductor Field-Effect Transistors.

PubMed

Liu, Jiangwei; Koide, Yasuo

2017-01-01

Diamond is regarded as a promising material for fabrication of high-power and high-frequency electronic devices due to its remarkable intrinsic properties, such as wide band gap energy, high carrier mobility, and high breakdown field. Meanwhile, since diamond has good biocompatibility, long-term durability, good chemical inertness, and a large electron-chemical potential window, it is a suitable candidate for the fabrication of biosensors. Here, we demonstrate the fabrication of hydrogenated diamond (H-diamond) based metal-insulator-semiconductor field-effect transistors (MISFETs). The fabrication is based on the combination of laser lithography, dry-etching, atomic layer deposition (ALD), sputtering deposition (SD), electrode evaporation, and lift-off techniques. The gate insulator is high-k HfO 2 with a SD/ALD bilayer structure. The thin ALD-HfO 2 film (4.0 nm) acts as a buffer layer to prevent the hydrogen surface of the H-diamond from plasma discharge damage during the SD-HfO 2 deposition. The growth of H-diamond epitaxial layer, fabrication of H-diamond MISFETs, and electrical property measurements for the MISFETs is demonstrated. This chapter explains the fabrication of H-diamond FET based biosensors.

Thermal stability of atomic layer deposited WCxNy electrodes for metal oxide semiconductor devices

NASA Astrophysics Data System (ADS)

Zonensain, Oren; Fadida, Sivan; Fisher, Ilanit; Gao, Juwen; Danek, Michal; Eizenberg, Moshe

2018-01-01

This study is a thorough investigation of the chemical, structural, and electrical stability of W based organo-metallic films, grown by atomic layer deposition, for future use as gate electrodes in advanced metal oxide semiconductor structures. In an earlier work, we have shown that high effective work-function (4.7 eV) was produced by nitrogen enriched films (WCxNy) dominated by W-N chemical bonding, and low effective work-function (4.2 eV) was produced by hydrogen plasma resulting in WCx films dominated by W-C chemical bonding. In the current work, we observe, using x-ray diffraction analysis, phase transformation of the tungsten carbide and tungsten nitride phases after 900 °C annealing to the cubic tungsten phase. Nitrogen diffusion is also observed and is analyzed with time-of-flight secondary ion mass spectroscopy. After this 900 °C anneal, WCxNy effective work function tunability is lost and effective work-function values of 4.7-4.8 eV are measured, similar to stable effective work function values measured for PVD TiN up to 900 °C anneal. All the observed changes after annealing are discussed and correlated to the observed change in the effective work function.

Magnetoreflection spectroscopy of monolayer transition-metal dichalcogenide semiconductors in pulsed magnetic fields

DOE PAGES

Stier, Andreas V.; McCreary, Kathleen M.; Jonker, Berend T.; ...

2016-05-13

The authors describe recent experimental efforts to perform polarization-resolved optical spectroscopy of monolayer transition-metal dichalcogenide semiconductors in very large pulsed magnetic fields to 65 T. The experimental setup and technical challenges are discussed in detail, and temperature-dependent magnetoreflection spectra from atomically thin tungsten disulphide are presented. The data clearly reveal not only the valley Zeeman effect in these two-dimensional semiconductors but also the small quadratic exciton diamagnetic shift from which the very small exciton size can be directly inferred. Lastly, the authors present model calculations that demonstrate how the measured diamagnetic shifts can be used to constrain estimates of themore » exciton binding energy in this new family of monolayer semiconductors.« less

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

PubMed

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

PubMed

Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

2012-08-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

Electron mobility in InGaN channel heterostructure field effect transistor structures with different barriers

NASA Astrophysics Data System (ADS)

Xie, J.; Leach, J. H.; Ni, X.; Wu, M.; Shimada, R.; Özgür, Ü.; Morkoç, H.

2007-12-01

InGaN possesses higher electron mobility and velocity than GaN, and therefore is expected to lead to relatively better performances for heterostructure field effect transistors (HFETs). However, the reported mobilities for AlGaN /InGaN HFETs are lower than GaN channel HFETs. To address this issue, we studied the effect of different barriers on the Hall mobility for InGaN channel HFETs grown by metal organic chemical vapor deposition. Unlike the conventional AlGaN barrier, the AlInN barrier can be grown at the same temperature as the InGaN channel layer, alleviating some of the technological roadblocks. Specifically, this avoids possible degradation of the thin InGaN channel during AlGaN growth at high temperatures; and paves the way for better interfaces. An undoped In0.18Al0.82N/AlN/In0.04Ga0.96N HFET structure exhibited a μH=820cm2/Vs, with a ns=2.12×1013cm-2 at room temperature. Moreover, with an In-doped AlGaN barrier, namely, Al0.24In0.01Ga0.75N, grown at 900°C, the μH increased to 1230cm2/Vs with a ns of 1.09×1013cm-2 for a similar InGaN channel. Furthermore, when the barrier was replaced by Al0.25Ga0.75N grown at 1030°C, μH dropped to 870cm2/Vs with ns of 1.26×1013cm-2 at room temperature. Our results suggest that to fully realize the potential of the InGaN channel HFETs, AlInN or AlInGaN should be used as the barrier instead of the conventional AlGaN barrier.

Ferroelectric switching of poly(vinylidene difluoride-trifluoroethylene) in metal-ferroelectric-semiconductor non-volatile memories with an amorphous oxide semiconductor

NASA Astrophysics Data System (ADS)

Gelinck, G. H.; van Breemen, A. J. J. M.; Cobb, B.

2015-03-01

Ferroelectric polarization switching of poly(vinylidene difluoride-trifluoroethylene) is investigated in different thin-film device structures, ranging from simple capacitors to dual-gate thin-film transistors (TFT). Indium gallium zinc oxide, a high mobility amorphous oxide material, is used as semiconductor. We find that the ferroelectric can be polarized in both directions in the metal-ferroelectric-semiconductor (MFS) structure and in the dual-gate TFT under certain biasing conditions, but not in the single-gate thin-film transistors. These results disprove the common belief that MFS structures serve as a good model system for ferroelectric polarization switching in thin-film transistors.

Estimation of carrier mobility and charge behaviors of organic semiconductor films in metal-insulator-semiconductor diodes consisting of high-k oxide/organic semiconductor double layers

NASA Astrophysics Data System (ADS)

Chosei, Naoya; Itoh, Eiji

2018-02-01

We have comparatively studied the charge behaviors of organic semiconductor films based on charge extraction by linearly increasing voltage in a metal-insulator-semiconductor (MIS) diode structure (MIS-CELIV) and by classical capacitance-voltage measurement. The MIS-CELIV technique allows the selective measurement of electron and hole mobilities of n- and p-type organic films with thicknesses representative of those of actual devices. We used an anodic oxidized sputtered Ta or Hf electrode as a high-k layer, and it effectively blocked holes at the insulator/semiconductor interface. We estimated the hole mobilities of the polythiophene derivatives regioregular poly(3-hexylthiophene) (P3HT) and poly(3,3‧‧‧-didodecylquarterthiophene) (PQT-12) before and after heat treatment in the ITO/high-k/(thin polymer insulator)/semiconductor/MoO3/Ag device structure. The hole mobility of PQT-12 was improved from 1.1 × 10-5 to 2.1 × 10-5 cm2 V-1 s-1 by the heat treatment of the device at 100 °C for 30 min. An almost two orders of magnitude higher mobility was obtained in MIS diodes with P3HT as the p-type layer. We also determined the capacitance from the displacement current in MIS diodes at a relatively low-voltage sweep, and it corresponded well to the classical capacitance-voltage and frequency measurement results.

Microbially-mediated method for synthesis of non-oxide semiconductor nanoparticles

DOE Office of Scientific and Technical Information (OSTI.GOV)

Phelps, Tommy J.; Lauf, Robert J.; Moon, Ji-Won

The invention is directed to a method for producing non-oxide semiconductor nanoparticles, the method comprising: (a) subjecting a combination of reaction components to conditions conducive to microbially-mediated formation of non-oxide semiconductor nanoparticles, wherein said combination of reaction components comprises i) anaerobic microbes, ii) a culture medium suitable for sustaining said anaerobic microbes, iii) a metal component comprising at least one type of metal ion, iv) a non-metal component comprising at least one non-metal selected from the group consisting of S, Se, Te, and As, and v) one or more electron donors that provide donatable electrons to said anaerobic microbes duringmore » consumption of the electron donor by said anaerobic microbes; and (b) isolating said non-oxide semiconductor nanoparticles, which contain at least one of said metal ions and at least one of said non-metals. The invention is also directed to non-oxide semiconductor nanoparticle compositions produced as above and having distinctive properties.« less

Microbially-mediated method for synthesis of non-oxide semiconductor nanoparticles

DOEpatents

Phelps, Tommy J.; Lauf, Robert J.; Moon, Ji Won; Rondinone, Adam J.; Love, Lonnie J.; Duty, Chad Edward; Madden, Andrew Stephen; Li, Yiliang; Ivanov, Ilia N.; Rawn, Claudia Jeanette

2014-06-24

The invention is directed to a method for producing non-oxide semiconductor nanoparticles, the method comprising: (a) subjecting a combination of reaction components to conditions conducive to microbially-mediated formation of non-oxide semiconductor nanoparticles, wherein said combination of reaction components comprises i) anaerobic microbes, ii) a culture medium suitable for sustaining said anaerobic microbes, iii) a metal component comprising at least one type of metal ion, iv) a non-metal component containing at least one non-metal selected from the group consisting of S, Se, Te, and As, and v) one or more electron donors that provide donatable electrons to said anaerobic microbes during consumption of the electron donor by said anaerobic microbes; and (b) isolating said non-oxide semiconductor nanoparticles, which contain at least one of said metal ions and at least one of said non-metals. The invention is also directed to non-oxide semiconductor nanoparticle compositions produced as above and having distinctive properties.

Microscale Soft Patterning for Solution Processable Metal Oxide Thin Film Transistors.

PubMed

Jung, Sang Wook; Chae, Soo Sang; Park, Jee Ho; Oh, Jin Young; Bhang, Suk Ho; Baik, Hong Koo; Lee, Tae Il

2016-03-23

We introduce a microscale soft pattering (MSP) route utilizing contact printing of chemically inert sub-nanometer thick low molecular weight (LMW) poly(dimethylsiloxane) (PDMS) layers. These PDMS layers serve as a release agent layer between the n-type Ohmic metal and metal oxide semiconductors (MOSs) and provide a layer that protects the MOS from water in the surrounding environment. The feasibility of our MSP route was experimentally demonstrated by fabricating solution processable In2O3, IZO, and IGZO TFTs with aluminum (Al), a typical n-type Ohmic metal. We have demonstrated patterning gaps as small as 13 μm. The TFTs fabricated using MSP showed higher field-effect-mobility and lower hysteresis in comparison with those made using conventional photolithography.

Solution combustion synthesis of oxide semiconductors

NASA Astrophysics Data System (ADS)

Thomas, Abegayl Lorenda Shara-Lynn

The quest for stable and efficient photocatalytic materials beyond TiO2 and WO3 has over the years led to the development of new materials that possess varied interfacial energetics. This dissertation study focused on using for the first time a novel method, solution combustion synthesis (SCS), to prepare two distinct families of binary metal-based oxide semiconductor materials. Detailed studies on material characteristics and applications were carried out on tungsten- and niobium-based oxide semiconductors with varying principal metals. Initial emphasis was placed on the SCS of tungsten-based oxide semiconductors (ZnWO4, CuWO4, and Ag2WO4). The influence of different tungsten precursor's on the resultant product was of particular relevance to this study, with the most significant effects highlighted. Upon characterization, each sample's photocatalytic activity towards methyl orange dye degradation was studied, and benchmarked against their respective commercial oxide sample, obtained by solid-state ceramic synthesis. Detailed analysis highlighted the importance of the SCS process as a time- and energy-efficient method to produce crystalline nano-sized materials even without additional or excessive heat treatment. It was observed that using different tungstate precursors does influence the structural and morphological make-up of the resulting materials. The as-synthesized tungstate materials showed good photocatalytic performance for the degradation of methyl orange dye, while taking into account specific surface area and adsorbed dye amount on the surface of the material. Like the tungstate's, niobium-based oxide semiconductors CuNb 2O6 and ZnNb2O6 were the first to be synthesized via solution combustion synthesis. Particular attention was placed on the crystal structures formed while using an oxalate niobium precursor during the reaction process. X-ray patterns yielded a multiphase structure for the ZnNb2O6 and a single phase structure for CuNb 2O6

Metal Oxide Thin Film Transistors on Paper Substrate: Fabrication, Characterization, and Printing Process

NASA Astrophysics Data System (ADS)

Choi, Nack-Bong

Flexible electronics is an emerging next-generation technology that offers many advantages such as light weight, durability, comfort, and flexibility. These unique features enable many new applications such as flexible display, flexible sensors, conformable electronics, and so forth. For decades, a variety of flexible substrates have been demonstrated for the application of flexible electronics. Most of them are plastic films and metal foils so far. For the fundamental device of flexible circuits, thin film transistors (TFTs) using poly silicon, amorphous silicon, metal oxide and organic semiconductor have been successfully demonstrated. Depending on application, low-cost and disposable flexible electronics will be required for convenience. Therefore it is important to study inexpensive substrates and to explore simple processes such as printing technology. In this thesis, paper is introduced as a new possible substrate for flexible electronics due to its low-cost and renewable property, and amorphous indium gallium zinc oxide (a-IGZO) TFTs are realized as the promising device on the paper substrate. The fabrication process and characterization of a-IGZO TFT on the paper substrate are discussed. a-IGZO TFTs using a polymer gate dielectric on the paper substrate demonstrate excellent performances with field effect mobility of ˜20 cm2 V-1 s-1, on/off current ratio of ˜106, and low leakage current, which show the enormous potential for flexible electronics application. In order to complement the n-channel a-IGZO TFTs and then enable complementary metal-oxide semiconductor (CMOS) circuit architectures, cuprous oxide is studied as a candidate material of p-channel oxide TFTs. In this thesis, a printing process is investigated as an alternative method for the fabrication of low-cost and disposable electronics. Among several printing methods, a modified offset roll printing that prints high resolution patterns is presented. A new method to fabricate a high resolution

Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

NASA Astrophysics Data System (ADS)

Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

2018-01-01

Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

In-situ SiN{sub x}/InN structures for InN field-effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zervos, Ch., E-mail: hzervos@physics.uoc.gr; Georgakilas, A.; Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete

Critical aspects of InN channel field-effect transistors (FETs) have been investigated. SiN{sub x} dielectric layers were deposited in-situ, in the molecular beam epitaxy system, on the surface of 2 nm InN layers grown on GaN (0001) buffer layers. Metal-insulator-semiconductor Ni/SiN{sub x}/InN capacitors were analyzed by capacitance-voltage (C-V) and current-voltage measurements and were used as gates in InN FET transistors (MISFETs). Comparison of the experimental C-V results with self-consistent Schrödinger-Poisson calculations indicates the presence of a positive charge at the SiN{sub x}/InN interface of Q{sub if} ≈ 4.4 – 4.8 × 10{sup 13 }cm{sup −2}, assuming complete InN strain relaxation. Operation of InN MISFETs was demonstrated, but their performancemore » was limited by a catastrophic breakdown at drain-source voltages above 2.5–3.0 V, the low electron mobility, and high series resistances of the structures.« less

High-performance all-printed amorphous oxide FETs and logics with electronically compatible electrode/ channel interface.

PubMed

Sharma, Bhupendra Kumar; Stoesser, Anna; Mondal, Sandeep Kumar; Garlapati, Suresh K; Fawey, Mohammed H; Chakravadhanula, Venkata Sai Kiran; Kruk, Robert; Hahn, Horst; Dasgupta, Subho

2018-06-12

Oxide semiconductors typically show superior device performance compared to amorphous silicon or organic counterparts, especially, when they are physical vapor deposited. However, it is not easy to reproduce identical device characteristics when the oxide field-effect transistors (FETs) are solution-processed/ printed; the level of complexity further intensifies with the need to print the passive elements as well. Here, we developed a protocol for designing the most electronically compatible electrode/ channel interface based on the judicious material selection. Exploiting this newly developed fabrication schemes, we are now able to demonstrate high-performance all-printed FETs and logic circuits using amorphous indium-gallium-zinc oxide (a-IGZO) semiconductor, indium tin oxide (ITO) as electrodes and composite solid polymer electrolyte as the gate insulator. Interestingly, all-printed FETs demonstrate an optimal electrical performance in terms of threshold voltages and device mobility and may very well be compared with devices fabricated using sputtered ITO electrodes. This observation originates from the selection of electrode/ channel materials from the same transparent semiconductor oxide family, resulting in the formation of In-Sn-Zn-O (ITZO) based diffused a-IGZO/ ITO interface that controls doping density while ensuring high electrical performance. Compressive spectroscopic studies reveal that Sn doping mediated excellent band alignment of IGZO with ITO electrodes is responsible for the excellent device performance observed. All-printed n-MOS based logic circuits have also been demonstrated towards new-generation portable electronics.

Coulomb blockade based field-effect transistors exploiting stripe-shaped channel geometries of self-assembled metal nanoparticles.

PubMed

Lehmann, Hauke; Willing, Svenja; Möller, Sandra; Volkmann, Mirjam; Klinke, Christian

2016-08-14

Metallic nanoparticles offer possibilities to build basic electric devices with new functionality and improved performance. Due to the small volume and the resulting low self-capacitance, each single nanoparticle exhibits a high charging energy. Thus, a Coulomb-energy gap emerges during transport experiments that can be shifted by electric fields, allowing for charge transport whenever energy levels of neighboring particles match. Hence, the state of the device changes sequentially between conducting and non-conducting instead of just one transition from conducting to pinch-off as in semiconductors. To exploit this behavior for field-effect transistors, it is necessary to use uniform nanoparticles in ordered arrays separated by well-defined tunnel barriers. In this work, CoPt nanoparticles with a narrow size distribution are synthesized by colloidal chemistry. These particles are deposited via the scalable Langmuir-Blodgett technique as ordered, homogeneous monolayers onto Si/SiO2 substrates with pre-patterned gold electrodes. The resulting nanoparticle arrays are limited to stripes of adjustable lengths and widths. In such a defined channel with a limited number of conduction paths the current can be controlled precisely by a gate voltage. Clearly pronounced Coulomb oscillations are observed up to temperatures of 150 K. Using such systems as field-effect transistors yields unprecedented oscillating current modulations with on/off-ratios of around 70%.

Bipolar resistive switching in metal-insulator-semiconductor nanostructures based on silicon nitride and silicon oxide

NASA Astrophysics Data System (ADS)

Koryazhkina, M. N.; Tikhov, S. V.; Mikhaylov, A. N.; Belov, A. I.; Korolev, D. S.; Antonov, I. N.; Karzanov, V. V.; Gorshkov, O. N.; Tetelbaum, D. I.; Karakolis, P.; Dimitrakis, P.

2018-03-01

Bipolar resistive switching in metal-insulator-semiconductor (MIS) capacitor-like structures with an inert Au top electrode and a Si3N4 insulator nanolayer (6 nm thick) has been observed. The effect of a highly doped n +-Si substrate and a SiO2 interlayer (2 nm) is revealed in the changes in the semiconductor space charge region and small-signal parameters of parallel and serial equivalent circuit models measured in the high- and low-resistive capacitor states, as well as under laser illumination. The increase in conductivity of the semiconductor capacitor plate significantly reduces the charging and discharging times of capacitor-like structures.

Interfacial engineering of metal-insulator-semiconductor junctions for efficient and stable photoelectrochemical water oxidation

PubMed Central

Digdaya, Ibadillah A.; Adhyaksa, Gede W. P.; Trześniewski, Bartek J.; Garnett, Erik C.; Smith, Wilson A.

2017-01-01

Solar-assisted water splitting can potentially provide an efficient route for large-scale renewable energy conversion and storage. It is essential for such a system to provide a sufficiently high photocurrent and photovoltage to drive the water oxidation reaction. Here we demonstrate a photoanode that is capable of achieving a high photovoltage by engineering the interfacial energetics of metal–insulator–semiconductor junctions. We evaluate the importance of using two metals to decouple the functionalities for a Schottky contact and a highly efficient catalyst. We also illustrate the improvement of the photovoltage upon incidental oxidation of the metallic surface layer in KOH solution. Additionally, we analyse the role of the thin insulating layer to the pinning and depinning of Fermi level that is responsible to the resulting photovoltage. Finally, we report the advantage of using dual metal overlayers as a simple protection route for highly efficient metal–insulator–semiconductor photoanodes by showing over 200 h of operational stability. PMID:28660883

Novel photoinduced phase transitions in transition metal oxides and diluted magnetic semiconductors.

PubMed

Mizokawa, Takashi

2012-10-23

Some transition metal oxides have frustrated electronic states under multiphase competition due to strongly correlated d electrons with spin, charge, and orbital degrees of freedom and exhibit drastic responses to external stimuli such as optical excitation. Here, we present photoemission studies on Pr0.55(Ca1 - ySry)0.45MnO3 (y = 0.25), SrTiO3, and Ti1 - xCoxO2 (x = 0.05, 0.10) under laser illumination and discuss electronic structural changes induced by optical excitation in these strongly correlated oxides. We discuss the novel photoinduced phase transitions in these transition metal oxides and diluted magnetic semiconductors on the basis of polaronic pictures such as orbital, ferromagnetic, and ferroelectric polarons.

Recent progress in high performance and reliable n-type transition metal oxide-based thin film transistors

NASA Astrophysics Data System (ADS)

Kwon, Jang Yeon; Kyeong Jeong, Jae

2015-02-01

This review gives an overview of the recent progress in vacuum-based n-type transition metal oxide (TMO) thin film transistors (TFTs). Several excellent review papers regarding metal oxide TFTs in terms of fundamental electron structure, device process and reliability have been published. In particular, the required field-effect mobility of TMO TFTs has been increasing rapidly to meet the demands of the ultra-high-resolution, large panel size and three dimensional visual effects as a megatrend of flat panel displays, such as liquid crystal displays, organic light emitting diodes and flexible displays. In this regard, the effects of the TMO composition on the performance of the resulting oxide TFTs has been reviewed, and classified into binary, ternary and quaternary composition systems. In addition, the new strategic approaches including zinc oxynitride materials, double channel structures, and composite structures have been proposed recently, and were not covered in detail in previous review papers. Special attention is given to the advanced device architecture of TMO TFTs, such as back-channel-etch and self-aligned coplanar structure, which is a key technology because of their advantages including low cost fabrication, high driving speed and unwanted visual artifact-free high quality imaging. The integration process and related issues, such as etching, post treatment, low ohmic contact and Cu interconnection, required for realizing these advanced architectures are also discussed.

Evaluating nanoscale ultra-thin metal films by means of lateral photovoltaic effect in metal-semiconductor structure.

PubMed

Zheng, Diyuan; Yu, Chongqi; Zhang, Qian; Wang, Hui

2017-12-15

Nanoscale metal-semiconductor (MS) structure materials occupy an important position in semiconductor and microelectronic field due to their abundant physical phenomena and effects. The thickness of metal films is a critical factor in determining characteristics of MS devices. How to detect or evaluate the metal thickness is always a key issue for realizing high performance MS devices. In this work, we propose a direct surface detection by use of the lateral photovoltaic effect (LPE) in MS structure, which can not only measure nanoscale thickness, but also detect the fluctuation of metal films. This method is based on the fact that the output of lateral photovoltaic voltage (LPV) is closely linked with the metal thickness at the laser spot. We believe this laser-based contact-free detection is a useful supplement to the traditional methods, such as AFM, SEM, TEM or step profiler. This is because these traditional methods are always incapable of directly detecting ultra-thin metal films in MS structure materials.

Evaluating nanoscale ultra-thin metal films by means of lateral photovoltaic effect in metal-semiconductor structure

NASA Astrophysics Data System (ADS)

Zheng, Diyuan; Yu, Chongqi; Zhang, Qian; Wang, Hui

2017-12-01

Nanoscale metal-semiconductor (MS) structure materials occupy an important position in semiconductor and microelectronic field due to their abundant physical phenomena and effects. The thickness of metal films is a critical factor in determining characteristics of MS devices. How to detect or evaluate the metal thickness is always a key issue for realizing high performance MS devices. In this work, we propose a direct surface detection by use of the lateral photovoltaic effect (LPE) in MS structure, which can not only measure nanoscale thickness, but also detect the fluctuation of metal films. This method is based on the fact that the output of lateral photovoltaic voltage (LPV) is closely linked with the metal thickness at the laser spot. We believe this laser-based contact-free detection is a useful supplement to the traditional methods, such as AFM, SEM, TEM or step profiler. This is because these traditional methods are always incapable of directly detecting ultra-thin metal films in MS structure materials.

A comprehensive study of charge trapping in organic field-effect devices with promising semiconductors and different contact metals by displacement current measurements

NASA Astrophysics Data System (ADS)

Bisoyi, Sibani; Rödel, Reinhold; Zschieschang, Ute; Kang, Myeong Jin; Takimiya, Kazuo; Klauk, Hagen; Tiwari, Shree Prakash

2016-02-01

A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C10-DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm2 V-1 s-1. The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 1012 cm-2, despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior.

Velocity overshoot decay mechanisms in compound semiconductor field-effect transistors with a submicron characteristic length

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jyegal, Jang, E-mail: jjyegal@inu.ac.kr

Velocity overshoot is a critically important nonstationary effect utilized for the enhanced performance of submicron field-effect devices fabricated with high-electron-mobility compound semiconductors. However, the physical mechanisms of velocity overshoot decay dynamics in the devices are not known in detail. Therefore, a numerical analysis is conducted typically for a submicron GaAs metal-semiconductor field-effect transistor in order to elucidate the physical mechanisms. It is found that there exist three different mechanisms, depending on device bias conditions. Specifically, at large drain biases corresponding to the saturation drain current (dc) region, the velocity overshoot suddenly begins to drop very sensitively due to the onsetmore » of a rapid decrease of the momentum relaxation time, not the mobility, arising from the effect of velocity-randomizing intervalley scattering. It then continues to drop rapidly and decays completely by severe mobility reduction due to intervalley scattering. On the other hand, at small drain biases corresponding to the linear dc region, the velocity overshoot suddenly begins to drop very sensitively due to the onset of a rapid increase of thermal energy diffusion by electrons in the channel of the gate. It then continues to drop rapidly for a certain channel distance due to the increasing thermal energy diffusion effect, and later completely decays by a sharply decreasing electric field. Moreover, at drain biases close to a dc saturation voltage, the mechanism is a mixture of the above two bias conditions. It is suggested that a large secondary-valley energy separation is essential to increase the performance of submicron devices.« less

NIOSH field studies team assessment: Worker exposure to aerosolized metal oxide nanoparticles in a semiconductor fabrication facility.

PubMed

Brenner, Sara A; Neu-Baker, Nicole M; Eastlake, Adrienne C; Beaucham, Catherine C; Geraci, Charles L

2016-11-01

The ubiquitous use of engineered nanomaterials-particulate materials measuring approximately 1-100 nanometers (nm) on their smallest axis, intentionally engineered to express novel properties-in semiconductor fabrication poses unique issues for protecting worker health and safety. Use of new substances or substances in a new form may present hazards that have yet to be characterized for their acute or chronic health effects. Uncharacterized or emerging occupational health hazards may exist when there is insufficient validated hazard data available to make a decision on potential hazard and risk to exposed workers under condition of use. To advance the knowledge of potential worker exposure to engineered nanomaterials, the National Institute for Occupational Safety and Health Nanotechnology Field Studies Team conducted an on-site field evaluation in collaboration with on-site researchers at a semiconductor research and development facility on April 18-21, 2011. The Nanomaterial Exposure Assessment Technique (2.0) was used to perform a complete exposure assessment. A combination of filter-based sampling and direct-reading instruments was used to identify, characterize, and quantify the potential for worker inhalation exposure to airborne alumina and amorphous silica nanoparticles associated with th e chemical mechanical planarization wafer polishing process. Engineering controls and work practices were evaluated to characterize tasks that might contribute to potential exposures and to assess existing engineering controls. Metal oxide structures were identified in all sampling areas, as individual nanoparticles and agglomerates ranging in size from 60 nm to >1,000 nm, with varying structure morphology, from long and narrow to compact. Filter-based samples indicated very little aerosolized material in task areas or worker breathing zone. Direct-reading instrument data indicated increased particle counts relative to background in the wastewater treatment area; however

Ionic behavior of organic-inorganic metal halide perovskite based metal-oxide-semiconductor capacitors.

PubMed

Wang, Yucheng; Zhang, Yuming; Pang, Tiqiang; Xu, Jie; Hu, Ziyang; Zhu, Yuejin; Tang, Xiaoyan; Luan, Suzhen; Jia, Renxu

2017-05-24

Organic-inorganic metal halide perovskites are promising semiconductors for optoelectronic applications. Despite the achievements in device performance, the electrical properties of perovskites have stagnated. Ion migration is speculated to be the main contributing factor for the many unusual electrical phenomena in perovskite-based devices. Here, to understand the intrinsic electrical behavior of perovskites, we constructed metal-oxide-semiconductor (MOS) capacitors based on perovskite films and performed capacitance-voltage (C-V) and current-voltage (I-V) measurements of the capacitors. The results provide direct evidence for the mixed ionic-electronic transport behavior within perovskite films. In the dark, there is electrical hysteresis in both the C-V and I-V curves because the mobile negative ions take part in charge transport despite frequency modulation. However, under illumination, the large amount of photoexcited free carriers screens the influence of the mobile ions with a low concentration, which is responsible for the normal C-V properties. Validation of ion migration for the gate-control ability of MOS capacitors is also helpful for the investigation of perovskite MOS transistors and other gate-control photovoltaic devices.

Group IIB-VIA semiconductor oxide cluster ions

NASA Astrophysics Data System (ADS)

Jayasekharan, Thankan

2018-05-01

Metal oxide cluster ions, MnOm± (M = Zn, Cd) and HgnOm- of various stoichiometry have been generated from solid IIB-VIA semiconductor oxides targets, (ZnO(s), CdO(s), and HgO(s)) by using pulse laser desorption ionization time of flight mass spectrometry with a laser of λ = 355 nm. Analysis of mass spectral data indicates the formation of stoichiometric cluster ions viz., (ZnO)n=1-30+ and (CdO)n=1-40+ along with -O bound anions, (ZnO)n=1-30O-, (CdO)n=1-40O- and (HgO)n=1-36O- from their respective solids. Further, metal oxoanions such as ZnOn=2,3-, CdOn=2,3,6-, and HgOn=2,3,6,7- have also been noted signifying the higher coordination ability of both Cd and Hg with O/O2/O3 species.

Temperature dependent electrical characterisation of Pt/HfO{sub 2}/n-GaN metal-insulator-semiconductor (MIS) Schottky diodes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shetty, Arjun, E-mail: arjun@ece.iisc.ernet.in; Vinoy, K. J.; Roul, Basanta

2015-09-15

This paper reports an improvement in Pt/n-GaN metal-semiconductor (MS) Schottky diode characteristics by the introduction of a layer of HfO{sub 2} (5 nm) between the metal and semiconductor interface. The resulting Pt/HfO{sub 2}/n-GaN metal-insulator-semiconductor (MIS) Schottky diode showed an increase in rectification ratio from 35.9 to 98.9(@ 2V), increase in barrier height (0.52 eV to 0.63eV) and a reduction in ideality factor (2.1 to 1.3) as compared to the MS Schottky. Epitaxial n-type GaN films of thickness 300nm were grown using plasma assisted molecular beam epitaxy (PAMBE). The crystalline and optical qualities of the films were confirmed using high resolutionmore » X-ray diffraction and photoluminescence measurements. Metal-semiconductor (Pt/n-GaN) and metal-insulator-semiconductor (Pt/HfO{sub 2}/n-GaN) Schottky diodes were fabricated. To gain further understanding of the Pt/HfO{sub 2}/GaN interface, I-V characterisation was carried out on the MIS Schottky diode over a temperature range of 150 K to 370 K. The barrier height was found to increase (0.3 eV to 0.79 eV) and the ideality factor decreased (3.6 to 1.2) with increase in temperature from 150 K to 370 K. This temperature dependence was attributed to the inhomogeneous nature of the contact and the explanation was validated by fitting the experimental data into a Gaussian distribution of barrier heights.« less

Calculating Second-Order Effects in MOSFET's

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John A.; Coss, James R.

1990-01-01

Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.

Radiation induced failures of complementary metal oxide semiconductor containing pacemakers: a potentially lethal complication

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lewin, A.A.; Serago, C.F.; Schwade, J.G.

1984-10-01

New multi-programmable pacemakers frequently employ complementary metal oxide semiconductors (CMOS). This circuitry appears more sensitive to the effects of ionizing radiation when compared to the semiconductor circuits used in older pacemakers. A case of radiation induced runaway pacemaker in a CMOS device is described. Because of this and other recent reports of radiation therapy-induced CMOS type pacemaker failure, these pacemakers should not be irradiated. If necessary, the pacemaker can be shielded or moved to a site which can be shielded before institution of radiation therapy. This is done to prevent damage to the CMOS circuit and the life threatening arrythmiasmore » which may result from such damage.« less

Field effect in an n-GaAs metal-anodic oxide-film injunction

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tikhov, S.V.; Karpovich, I.A.; Martynov, V.V.

1986-10-01

In this paper the authors present results attained in parallel investigations of mobility ..mu../sub F/ in the field effect, capacitance C, and the active conductance component G for a wide range of frequencies and controlling voltages, as well as of the capacitor saturation photoelectron-motive force phi/sub sat/(V) in an n-GaAs metal-AO-epitaxial film structure. A new combined method is offered for the determination of separation-boundary parameters, based on an analysis of the relationships between ..mu../sub F/, C, and G and the controlling voltage and the test frequency

Nonvolatile gate effect in a ferroelectric-semiconductor quantum well.

PubMed

Stolichnov, Igor; Colla, Enrico; Setter, Nava; Wojciechowski, Tomasz; Janik, Elzbieta; Karczewski, Grzegorz

2006-12-15

Field effect transistors with ferroelectric gates would make ideal rewritable nonvolatile memories were it not for the severe problems in integrating the ferroelectric oxide directly on the semiconductor channel. We propose a powerful way to avoid these problems using a gate material that is ferroelectric and semiconducting simultaneously. First, ferroelectricity in semiconductor (Cd,Zn)Te films is proven and studied using modified piezoforce scanning probe microscopy. Then, a rewritable field effect device is demonstrated by local poling of the (Cd,Zn)Te layer of a (Cd,Zn)Te/CdTe quantum well, provoking a reversible, nonvolatile change in the resistance of the 2D electron gas. The results point to a potential new family of nanoscale one-transistor memories.

Nitride passivation reduces interfacial traps in atomic-layer-deposited Al2O3/GaAs (001) metal-oxide-semiconductor capacitors using atmospheric metal-organic chemical vapor deposition

NASA Astrophysics Data System (ADS)

Aoki, T.; Fukuhara, N.; Osada, T.; Sazawa, H.; Hata, M.; Inoue, T.

2014-07-01

Using an atmospheric metal-organic chemical vapor deposition system, we passivated GaAs with AlN prior to atomic layer deposition of Al2O3. This AlN passivation incorporated nitrogen at the Al2O3/GaAs interface, improving the capacitance-voltage (C-V) characteristics of the resultant metal-oxide-semiconductor capacitors (MOSCAPs). The C-V curves of these devices showed a remarkable reduction in the frequency dispersion of the accumulation capacitance. Using the conductance method at various temperatures, we extracted the interfacial density of states (Dit). The Dit was reduced over the entire GaAs band gap. In particular, these devices exhibited Dit around the midgap of less than 4 × 1012 cm-2eV-1, showing that AlN passivation effectively reduced interfacial traps in the MOS structure.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure

PubMed Central

2012-01-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal–semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials. PMID:22853458

Improved Stability and Performance of Visible Photoelectrochemical Water Splitting on Solution-Processed Organic Semiconductor Thin Films by Ultrathin Metal Oxide Passivation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Lei; Yan, Danhua; Shaffer, David W.

Solution-processable organic semiconductors have potentials as visible photoelectrochemical (PEC) water splitting photoelectrodes due to their tunable small band gap and electronic energy levels, but they are typically limited by poor stability and photocatalytic activity. In this study, we demonstrate the direct visible PEC water oxidation on solution-processed organic semiconductor thin films with improved stability and performance by ultrathin metal oxide passivation layers. N-type fullerene-derivative thin films passivated by sub-2 nm ZnO via atomic layer deposition enabled the visible PEC water oxidation at wavelengths longer than 600 nm in harsh alkaline electrolyte environments with up to 30 μA/cm 2 photocurrents atmore » the thermodynamic water-oxidation equilibrium potential and the photoanode half-lifetime extended to ~1000 s. The systematic investigation reveals the enhanced water oxidation catalytic activity afforded by ZnO passivation and the charge tunneling governing the hole transfer through passivation layers. Further enhanced PEC performances were realized by improving the bottom ohmic contact to the organic semiconductor, achieving ~60 μA/cm 2 water oxidation photocurrent at the equilibrium potential, the highest values reported for organic semiconductor thin films to our knowledge. The improved stability and performance of passivated organic photoelectrodes and discovered design rationales provide useful guidelines for realizing the stable visible solar PEC water splitting based on organic semiconductor thin films.« less

Improved Stability and Performance of Visible Photoelectrochemical Water Splitting on Solution-Processed Organic Semiconductor Thin Films by Ultrathin Metal Oxide Passivation

DOE PAGES

Wang, Lei; Yan, Danhua; Shaffer, David W.; ...

2017-12-27

Solution-processable organic semiconductors have potentials as visible photoelectrochemical (PEC) water splitting photoelectrodes due to their tunable small band gap and electronic energy levels, but they are typically limited by poor stability and photocatalytic activity. In this study, we demonstrate the direct visible PEC water oxidation on solution-processed organic semiconductor thin films with improved stability and performance by ultrathin metal oxide passivation layers. N-type fullerene-derivative thin films passivated by sub-2 nm ZnO via atomic layer deposition enabled the visible PEC water oxidation at wavelengths longer than 600 nm in harsh alkaline electrolyte environments with up to 30 μA/cm 2 photocurrents atmore » the thermodynamic water-oxidation equilibrium potential and the photoanode half-lifetime extended to ~1000 s. The systematic investigation reveals the enhanced water oxidation catalytic activity afforded by ZnO passivation and the charge tunneling governing the hole transfer through passivation layers. Further enhanced PEC performances were realized by improving the bottom ohmic contact to the organic semiconductor, achieving ~60 μA/cm 2 water oxidation photocurrent at the equilibrium potential, the highest values reported for organic semiconductor thin films to our knowledge. The improved stability and performance of passivated organic photoelectrodes and discovered design rationales provide useful guidelines for realizing the stable visible solar PEC water splitting based on organic semiconductor thin films.« less

Sample size requirements for estimating effective dose from computed tomography using solid-state metal-oxide-semiconductor field-effect transistor dosimetry

DOE Office of Scientific and Technical Information (OSTI.GOV)

Trattner, Sigal; Cheng, Bin; Pieniazek, Radoslaw L.

2014-04-15

Purpose: Effective dose (ED) is a widely used metric for comparing ionizing radiation burden between different imaging modalities, scanners, and scan protocols. In computed tomography (CT), ED can be estimated by performing scans on an anthropomorphic phantom in which metal-oxide-semiconductor field-effect transistor (MOSFET) solid-state dosimeters have been placed to enable organ dose measurements. Here a statistical framework is established to determine the sample size (number of scans) needed for estimating ED to a desired precision and confidence, for a particular scanner and scan protocol, subject to practical limitations. Methods: The statistical scheme involves solving equations which minimize the sample sizemore » required for estimating ED to desired precision and confidence. It is subject to a constrained variation of the estimated ED and solved using the Lagrange multiplier method. The scheme incorporates measurement variation introduced both by MOSFET calibration, and by variation in MOSFET readings between repeated CT scans. Sample size requirements are illustrated on cardiac, chest, and abdomen–pelvis CT scans performed on a 320-row scanner and chest CT performed on a 16-row scanner. Results: Sample sizes for estimating ED vary considerably between scanners and protocols. Sample size increases as the required precision or confidence is higher and also as the anticipated ED is lower. For example, for a helical chest protocol, for 95% confidence and 5% precision for the ED, 30 measurements are required on the 320-row scanner and 11 on the 16-row scanner when the anticipated ED is 4 mSv; these sample sizes are 5 and 2, respectively, when the anticipated ED is 10 mSv. Conclusions: Applying the suggested scheme, it was found that even at modest sample sizes, it is feasible to estimate ED with high precision and a high degree of confidence. As CT technology develops enabling ED to be lowered, more MOSFET measurements are needed to estimate ED with the

Sample size requirements for estimating effective dose from computed tomography using solid-state metal-oxide-semiconductor field-effect transistor dosimetry

PubMed Central

Trattner, Sigal; Cheng, Bin; Pieniazek, Radoslaw L.; Hoffmann, Udo; Douglas, Pamela S.; Einstein, Andrew J.

2014-01-01

Purpose: Effective dose (ED) is a widely used metric for comparing ionizing radiation burden between different imaging modalities, scanners, and scan protocols. In computed tomography (CT), ED can be estimated by performing scans on an anthropomorphic phantom in which metal-oxide-semiconductor field-effect transistor (MOSFET) solid-state dosimeters have been placed to enable organ dose measurements. Here a statistical framework is established to determine the sample size (number of scans) needed for estimating ED to a desired precision and confidence, for a particular scanner and scan protocol, subject to practical limitations. Methods: The statistical scheme involves solving equations which minimize the sample size required for estimating ED to desired precision and confidence. It is subject to a constrained variation of the estimated ED and solved using the Lagrange multiplier method. The scheme incorporates measurement variation introduced both by MOSFET calibration, and by variation in MOSFET readings between repeated CT scans. Sample size requirements are illustrated on cardiac, chest, and abdomen–pelvis CT scans performed on a 320-row scanner and chest CT performed on a 16-row scanner. Results: Sample sizes for estimating ED vary considerably between scanners and protocols. Sample size increases as the required precision or confidence is higher and also as the anticipated ED is lower. For example, for a helical chest protocol, for 95% confidence and 5% precision for the ED, 30 measurements are required on the 320-row scanner and 11 on the 16-row scanner when the anticipated ED is 4 mSv; these sample sizes are 5 and 2, respectively, when the anticipated ED is 10 mSv. Conclusions: Applying the suggested scheme, it was found that even at modest sample sizes, it is feasible to estimate ED with high precision and a high degree of confidence. As CT technology develops enabling ED to be lowered, more MOSFET measurements are needed to estimate ED with the same

Physicochemical and Electrophysical Properties of Metal/Semiconductor Containing Nanostructured Composites

NASA Astrophysics Data System (ADS)

Gerasimov, G. N.; Gromov, V. F.; Trakhtenberg, L. I.

2018-06-01

The properties of nanostructured composites based on metal oxides and metal-polymer materials are analyzed, along with ways of preparing them. The effect the interaction between metal and semiconductor nanoparticles has on the conductivity, photoconductivity, catalytic activity, and magnetic, dielectric, and sensor properties of nanocomposites is discussed. It is shown that as a result of this interaction, a material can acquire properties that do not exist in systems of isolated particles. The transfer of electrons between metal particles of different sizes in polymeric matrices leads to specific dielectric losses, and to an increase in the rate and a change in the direction of chemical reactions catalyzed by these particles. The interaction between metal-oxide semiconductor particles results in the electronic and chemical sensitization of sensor effects in nanostructured composite materials. Studies on creating molecular machines (Brownian motors), devices for magnetic recording of information, and high-temperature superconductors based on nanostructured systems are reviewed.

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

NASA Technical Reports Server (NTRS)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures

Valorization of GaN based metal-organic chemical vapor deposition dust a semiconductor power device industry waste through mechanochemical oxidation and leaching: A sustainable green process

DOE Office of Scientific and Technical Information (OSTI.GOV)

Swain, Basudev, E-mail: Swain@iae.re.kr; Mishra, Chinmayee; Lee, Chan Gi

2015-07-15

Dust generated during metal organic vapor deposition (MOCVD) process of GaN based semiconductor power device industry contains significant amounts of gallium and indium. These semiconductor power device industry wastes contain gallium as GaN and Ga{sub 0.97}N{sub 0.9}O{sub 0.09} is a concern for the environment which can add value through recycling. In the present study, this waste is recycled through mechanochemical oxidation and leaching. For quantitative recovery of gallium, two different mechanochemical oxidation leaching process flow sheets are proposed. In one process, first the Ga{sub 0.97}N{sub 0.9}O{sub 0.09} of the MOCVD dust is leached at the optimum condition. Subsequently, the leachmore » residue is mechanochemically treated, followed by oxidative annealing and finally re-leached. In the second process, the MOCVD waste dust is mechanochemically treated, followed by oxidative annealing and finally leached. Both of these treatment processes are competitive with each other, appropriate for gallium leaching and treatment of the waste MOCVD dust. Without mechanochemical oxidation, 40.11 and 1.86 w/w% of gallium and Indium are leached using 4 M HCl, 100 °C and pulp density of 100 kg/m{sup 3,} respectively. After mechanochemical oxidation, both these processes achieved 90 w/w% of gallium and 1.86 w/w% of indium leaching at their optimum condition. - Highlights: • Waste MOCVD dust is treated through mechanochemical leaching. • GaN is hardly leached, and converted to NaGaO{sub 2} through ball milling and annealing. • Process for gallium recovery from waste MOCVD dust has been developed. • Thermal analysis and phase properties of GaN to Ga{sub 2}O{sub 3} and GaN to NaGaO{sub 2} is revealed. • Solid-state chemistry involved in this process is reported.« less

Dopant distributions in n-MOSFET structure observed by atom probe tomography.

PubMed

Inoue, K; Yano, F; Nishida, A; Takamizawa, H; Tsunomura, T; Nagai, Y; Hasegawa, M

2009-11-01

The dopant distributions in an n-type metal-oxide-semiconductor field effect transistor (MOSFET) structure were analyzed by atom probe tomography. The dopant distributions of As, P, and B atoms in a MOSFET structure (gate, gate oxide, channel, source/drain extension, and halo) were obtained. P atoms were segregated at the interface between the poly-Si gate and the gate oxide, and on the grain boundaries of the poly-Si gate, which had an elongated grain structure along the gate height direction. The concentration of B atoms was enriched near the edge of the source/drain extension where the As atoms were implanted.

Infrared rectification in a nanoantenna-coupled metal-oxide-semiconductor tunnel diode.

PubMed

Davids, Paul S; Jarecki, Robert L; Starbuck, Andrew; Burckel, D Bruce; Kadlec, Emil A; Ribaudo, Troy; Shaner, Eric A; Peters, David W

2015-12-01

Direct rectification of electromagnetic radiation is a well-established method for wireless power conversion in the microwave region of the spectrum, for which conversion efficiencies in excess of 84% have been demonstrated. Scaling to the infrared or optical part of the spectrum requires ultrafast rectification that can only be obtained by direct tunnelling. Many research groups have looked to plasmonics to overcome antenna-scaling limits and to increase the confinement. Recently, surface plasmons on heavily doped Si surfaces were investigated as a way of extending surface-mode confinement to the thermal infrared region. Here we combine a nanostructured metallic surface with a heavily doped Si infrared-reflective ground plane designed to confine infrared radiation in an active electronic direct-conversion device. The interplay of strong infrared photon-phonon coupling and electromagnetic confinement in nanoscale devices is demonstrated to have a large impact on ultrafast electronic tunnelling in metal-oxide-semiconductor (MOS) structures. Infrared dispersion of SiO2 near a longitudinal optical (LO) phonon mode gives large transverse-field confinement in a nanometre-scale oxide-tunnel gap as the wavelength-dependent permittivity changes from 1 to 0, which leads to enhanced electromagnetic fields at material interfaces and a rectified displacement current that provides a direct conversion of infrared radiation into electric current. The spectral and electrical signatures of the nanoantenna-coupled tunnel diodes are examined under broadband blackbody and quantum-cascade laser (QCL) illumination. In the region near the LO phonon resonance, we obtained a measured photoresponsivity of 2.7 mA W(-1) cm(-2) at -0.1 V.

Assessment of radiation exposure in dental cone-beam computerized tomography with the use of metal-oxide semiconductor field-effect transistor (MOSFET) dosimeters and Monte Carlo simulations.

PubMed

Koivisto, J; Kiljunen, T; Tapiovaara, M; Wolff, J; Kortesniemi, M

2012-09-01

The aims of this study were to assess the organ and effective dose (International Commission on Radiological Protection (ICRP) 103) resulting from dental cone-beam computerized tomography (CBCT) imaging using a novel metal-oxide semiconductor field-effect transistor (MOSFET) dosimeter device, and to assess the reliability of the MOSFET measurements by comparing the results with Monte Carlo PCXMC simulations. Organ dose measurements were performed using 20 MOSFET dosimeters that were embedded in the 8 most radiosensitive organs in the maxillofacial and neck area. The dose-area product (DAP) values attained from CBCT scans were used for PCXMC simulations. The acquired MOSFET doses were then compared with the Monte Carlo simulations. The effective dose measurements using MOSFET dosimeters yielded, using 0.5-cm steps, a value of 153 μSv and the PCXMC simulations resulted in a value of 136 μSv. The MOSFET dosimeters placed in a head phantom gave results similar to Monte Carlo simulations. Minor vertical changes in the positioning of the phantom had a substantial affect on the overall effective dose. Therefore, the MOSFET dosimeters constitute a feasible method for dose assessment of CBCT units in the maxillofacial region. Copyright © 2012 Elsevier Inc. All rights reserved.

Effects of channel thickness on oxide thin film transistor with double-stacked channel layer

NASA Astrophysics Data System (ADS)

Lee, Kimoon; Kim, Yong-Hoon; Yoon, Sung-Min; Kim, Jiwan; Oh, Min Suk

2017-11-01

To improve the field effect mobility and control the threshold voltage ( V th ) of oxide thin film transistors (TFTs), we fabricated the oxide TFTs with double-stacked channel layers which consist of thick Zn-Sn-O (ZTO) and very thin In-Zn-O (IZO) layers. We investigated the effects of the thickness of thin conductive layer and the conductivity of thick layer on oxide TFTs with doublestacked channel layer. When we changed the thickness of thin conductive IZO channel layer, the resistivity values were changed. This resistivity of thin channel layer affected on the saturation field effect mobility and the off current of TFTs. In case of the thick ZTO channel layer which was deposited by sputtering in Ar: O2 = 10: 1, the device showed better performances than that which was deposited in Ar: O2 = 1: 1. Our TFTs showed high mobility ( μ FE ) of 40.7 cm2/Vs and V th of 4.3 V. We assumed that high mobility and the controlled V th were caused by thin conductive IZO layer and thick stable ZTO layer. Therefore, this double-stacked channel structure can be very promising way to improve the electrical characteristics of various oxide thin film transistors.

Improvement of Surge Protection by Using an AlGaN/GaN-Based Metal-Semiconductor-Metal Two-Dimensional Electron Gas Varactor

NASA Astrophysics Data System (ADS)

Ferng, Yi-Cherng; Chang, Liann-Be; Das, Atanu; Lin, Ching-Chi; Cheng, Chun-Yu; Kuei, Ping-Yu; Chow, Lee

2012-12-01

In this paper, a varactor with metal-semiconductor-metal diodes on top of the (NH4)2S/P2S5-treated AlGaN/GaN two-dimensional electron gas epitaxial structure (MSM-2DEG) is proposed to the surge protection for the first time. The sulfur-treated MSM-2DEG varactor properties, including current-voltage (I-V), capacitance-voltage (C-V), and frequency response of the proposed surge protection circuit, are presented. To verify its capability of surge protection, we replace the metal oxide varistor (MOV) and resistor (R) in a state-of-the-art surge protection circuit with the sulfur-treated MSM-2DEG varactor under the application conditions of system-level surge tests. The measured results show that the proposed surge protection circuit, consisted of a gas discharge arrester (GDA) and a sulfur-treated MSM-2DEG varactor, can suppress an electromagnetic pulse (EMP) voltage of 4000 to 360 V, a reduction of 91%, whereas suppression is to 1780 V, a reduction of 55%, when using only a GDA.

Studies on the InAlN/InGaN/InAlN/InGaN double channel heterostructures with low sheet resistance

NASA Astrophysics Data System (ADS)

Zhang, Yachao; Wang, Zhizhe; Xu, Shengrui; Chen, Dazheng; Bao, Weimin; Zhang, Jinfeng; Zhang, Jincheng; Hao, Yue

2017-11-01

High quality InAlN/InGaN/InAlN/InGaN double channel heterostructures were proposed and grown by metal organic chemical vapor deposition. Benefiting from the adoption of the pulsed growth method and Two-Step AlN interlayer, the material quality and interface characteristics of the double channel heterostructures are satisfactory. The results of the temperature-dependent Hall effect measurement indicated that the transport properties of the double channel heterostructures were superior to those of the traditional single channel heterostructures in the whole test temperature range. Meanwhile, the sheet resistance of the double channel heterostructures reached 218.5 Ω/□ at 300 K, which is the record of InGaN-based heterostructures. The good transport properties of the InGaN double channel heterostructures are beneficial to improve the performance of the microwave power devices based on nitride semiconductors.

Cross-plane thermal conductivity of (Ti,W)N/(Al,Sc)N metal/semiconductor superlattices

NASA Astrophysics Data System (ADS)

Saha, Bivas; Koh, Yee Rui; Comparan, Jonathan; Sadasivam, Sridhar; Schroeder, Jeremy L.; Garbrecht, Magnus; Mohammed, Amr; Birch, Jens; Fisher, Timothy; Shakouri, Ali; Sands, Timothy D.

2016-01-01

Reduction of cross-plane thermal conductivity and understanding of the mechanisms of heat transport in nanostructured metal/semiconductor superlattices are crucial for their potential applications in thermoelectric and thermionic energy conversion devices, thermal management systems, and thermal barrier coatings. We have developed epitaxial (Ti,W)N/(Al,Sc)N metal/semiconductor superlattices with periodicity ranging from 1 nm to 240 nm that show significantly lower thermal conductivity compared to the parent TiN/(Al,Sc)N superlattice system. The (Ti,W)N/(Al,Sc)N superlattices grow with [001] orientation on the MgO(001) substrates with well-defined coherent layers and are nominally single crystalline with low densities of extended defects. Cross-plane thermal conductivity (measured by time-domain thermoreflectance) decreases with an increase in the superlattice interface density in a manner that is consistent with incoherent phonon boundary scattering. Thermal conductivity values saturate at 1.7 W m-1K-1 for short superlattice periods possibly due to a delicate balance between long-wavelength coherent phonon modes and incoherent phonon scattering from heavy tungsten atomic sites and superlattice interfaces. First-principles density functional perturbation theory based calculations are performed to model the vibrational spectrum of the individual component materials, and transport models are used to explain the interface thermal conductance across the (Ti,W)N/(Al,Sc)N interfaces as a function of periodicity. The long-wavelength coherent phonon modes are expected to play a dominant role in the thermal transport properties of the short-period superlattices. Our analysis of the thermal transport properties of (Ti,W)N/(Al,Sc)N metal/semiconductor superlattices addresses fundamental questions about heat transport in multilayer materials.

Impact of GaN cap on charges in Al₂O₃/(GaN/)AlGaN/GaN metal-oxide-semiconductor heterostructures analyzed by means of capacitance measurements and simulations

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ťapajna, M., E-mail: milan.tapajna@savba.sk; Jurkovič, M.; Válik, L.

2014-09-14

Oxide/semiconductor interface trap density (D{sub it}) and net charge of Al₂O₃/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. D{sub it} distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher D{sub it} (∼5–8 × 10¹²eV⁻¹ cm⁻²) was found at trap energies ranging from E C-0.5 to 1 eV for structure with GaN cap compared to that (D{sub it} ∼ 2–3 × 10¹²eV⁻¹ cm⁻²) where the GaN cap was selectively etched away. D{sub it} distributions were then used for simulation of capacitance-voltage characteristics. A good agreement betweenmore » experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high D{sub it} (>10¹³eV⁻¹ cm⁻²) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher D{sub it} centered about E C-0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al₂O₃ thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.« less

Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields

DOEpatents

Chaffin, R.J.; Dawson, L.R.; Fritz, I.J.; Osbourn, G.C.; Zipperian, T.E.

1984-04-19

In a field-effect transistor comprising a semiconductor having therein a source, a drain, a channel and a gate in operational relationship, there is provided an improvement wherein said semiconductor is a superlattice comprising alternating quantum well and barrier layers, the quantum well layers comprising a first direct gap semiconductor material which in bulk form has a certain bandgap and a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, the barrier layers comprising a second semiconductor material having a bandgap wider than that of said first semiconductor material, wherein the layer thicknesses of said quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice having a curve of electron velocity versus applied electric field which has a maximum electron velocity at a certain electric field, and wherein the thicknesses of said quantum well layers are selected to provide a superlattice curve of electron velocity versus applied electric field whereby, at applied electric fields higher than that at which the maximum electron velocity occurs in said first material when in bulk form, the electron velocities are higher in said superlattice than they are in said first semiconductor material in bulk form.

Investigation of piezoresistive effect in p-channel metal–oxide–semiconductor field-effect transistors fabricated on circular silicon-on-insulator diaphragms using cost-effective minimal-fab process

NASA Astrophysics Data System (ADS)

Liu, Yongxun; Tanaka, Hiroyuki; Umeyama, Norio; Koga, Kazuhiro; Khumpuang, Sommawan; Nagao, Masayoshi; Matsukawa, Takashi; Hara, Shiro

2018-06-01

P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) with the 〈110〉 or 〈100〉 channel direction have been successfully fabricated on circular silicon-on-insulator (SOI) diaphragms using a cost-effective minimal-fab process, and their electrical characteristics have been systematically investigated before and after the SOI diaphragm formation. It was found that almost the same subthreshold slope (S-slope) and threshold voltage (V t) are observed in the fabricated PMOSFETs before and after the SOI diaphragm formation, and they are independent of the channel direction. On the other hand, significant variations in drain current were observed in the fabricated PMOSFETs with the 〈110〉 channel direction after the SOI diaphragm formation owing to the residual mechanical stress-induced piezoresistive effect. It was also confirmed that electrical characteristics of the fabricated PMOSFETs with the 〈100〉 channel direction are almost the same before and after the SOI diaphragm formation, i.e., not sensitive to the mechanical stress. Moreover, the drain current variations at different directions of mechanical stress and current flow were systematically investigated and discussed.

Extended Characterization of the Common-Source and Common-Gate Amplifiers using a Metal-Ferroelectric-Semiconductor Field Effect Transistor

NASA Technical Reports Server (NTRS)

Hunt, Mitchell; Sayyah, Rana; Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

2013-01-01

Collected data for both common-source and common-gate amplifiers is presented in this paper. Characterizations of the two amplifier circuits using metal-ferroelectric-semiconductor field effect transistors (MFSFETs) are developed with wider input frequency ranges and varying device sizes compared to earlier characterizations. The effects of the ferroelectric layer's capacitance and variation load, quiescent point, or input signal on each circuit are discussed. Comparisons between the MFSFET and MOSFET circuit operation and performance are discussed at length as well as applications and advantages for the MFSFETs.

Electro-plasmonic 2 × 2 channel-routing switch arranged on a thin-Si-doped metal/insulator/semiconductor/metal structure.

PubMed

Moazzam, Mostafa Keshavarz; Kaatuzian, Hassan

2016-01-20

Plasmonics as a new field of chip-scale technology is the interesting substrate of this study to propose and numerically investigate a metal/insulator/semiconductor/metal (MISM)-structure 2×2 plasmonic routing switch. As a planar subwavelength arrangement, the presented design has two npn-doped side-coupled dual waveguides whose duty is to route the propagating surface plasmon polaritons through the device. Relying on the MISM structure, which has a MOS-like thin-film arrangement of typically 45 nm doped silicon covered by a layer of 8 nm thick HfO(2) gate insulator, the routing configuration is electrically addressed based on the carrier-induced plasma dispersion effects as an external electro-plasmonic switching control. Finite-element-method-conducted electromagnetic simulations are employed to evaluate the switch optical response at telecom wavelength of λ=1550  nm, due to which the balanced operation measure of extinction ratios larger than 10 dB and insertion losses of around -1.8  dB are obtained for both channels of CROSS and STRAIGHT. Compared with other photonic and plasmonic switching counterparts, this configuration, besides its potential for CMOS compatibility, can be utilized as a high-speed compact building block to sustain higher-speed, more miniaturized, and less consuming electro-optic routing/switching protocols toward complicated optical integrated circuits and systems.

Semiconductor systems utilizing materials that form rectifying junctions in both N and P-type doping regions, whether metallurgically or field induced, and methods of use

DOEpatents

Welch, James D.

2000-01-01

Disclosed are semiconductor systems, such as integrated circuits utilizing Schotky barrier and/or diffused junction technology, which semiconductor systems incorporate material(s) that form rectifying junctions in both metallurgically and/or field induced N and P-type doping regions, and methods of their use. Disclosed are Schottky barrier based inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems and which can be operated as modulators, N and P-channel MOSFETS and CMOS formed therefrom, and (MOS) gate voltage controlled rectification direction and gate voltage controlled switching devices, and use of such material(s) to block parasitic current flow pathways. Simple demonstrative five mask fabrication procedures for inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.

An optical relay approach to very low cost hybrid polymer-complementary metal-oxide semiconductor electrophoresis instrumentation.

PubMed

Hall, Gordon H; Sloan, David L; Ma, Tianchi; Couse, Madeline H; Martel, Stephane; Elliott, Duncan G; Glerum, D Moira; Backhouse, Christopher J

2014-07-04

Electrophoresis is an integral part of many molecular diagnostics protocols and an inexpensive implementation would greatly facilitate point-of-care (POC) applications. However, the high instrumentation cost presents a substantial barrier, much of it associated with fluorescence detection. The cost of such systems could be substantially reduced by placing the fluidic channel and photodiode directly above the detector in order to collect a larger portion of the fluorescent light. In future, this could be achieved through the integration and monolithic fabrication of photoresist microchannels on complementary metal-oxide semiconductor microelectronics (CMOS). However, the development of such a device is expensive due to high non-recurring engineering costs. To facilitate that development, we present a system that utilises an optical relay to integrate low-cost polymeric microfluidics with a CMOS chip that provides a photodiode, analog-digital conversion and a standard serial communication interface. This system embodies an intermediate level of microelectronic integration, and significantly decreases development costs. With a limit of detection of 1.3±0.4nM of fluorescently end-labeled deoxyribonucleic acid (DNA), it is suitable for diagnostic applications. Copyright © 2014 Elsevier B.V. All rights reserved.

Thin Semiconductor/Metal Films For Infrared Devices

NASA Technical Reports Server (NTRS)

Lamb, James L.; Nagendra, Channamallappa L.

1995-01-01

Spectral responses of absorbers and reflectors tailored. Thin cermet films composites of metals and semiconductors undergoing development for use as broadband infrared reflectors and absorbers. Development extends concepts of semiconductor and dielectric films used as interference filters for infrared light and visible light. Composite films offer advantages over semiconductor films. Addition of metal particles contributes additional thermal conductivity, reducing thermal gradients and associated thermal stresses, with resultant enhancements of thermal stability. Because values of n in composite films made large, same optical effects achieved with lesser thicknesses. By decreasing thicknesses of films, one not only decreases weights but also contributes further to reductions of thermal stresses.

Field-effect P-N junction

DOEpatents

Regan, William; Zettl, Alexander

2015-05-05

This disclosure provides systems, methods, and apparatus related to field-effect p-n junctions. In one aspect, a device includes an ohmic contact, a semiconductor layer disposed on the ohmic contact, at least one rectifying contact disposed on the semiconductor layer, a gate including a layer disposed on the at least one rectifying contact and the semiconductor layer and a gate contact disposed on the layer. A lateral width of the rectifying contact is less than a semiconductor depletion width of the semiconductor layer. The gate contact is electrically connected to the ohmic contact to create a self-gating feedback loop that is configured to maintain a gate electric field of the gate.

Band structure engineering strategies of metal oxide semiconductor nanowires and related nanostructures: A review

NASA Astrophysics Data System (ADS)

Piyadasa, Adimali; Wang, Sibo; Gao, Pu-Xian

2017-07-01

The electronic band structure of a solid state semiconductor determines many of its physical and chemical characteristics such as electrical, optical, physicochemical, and catalytic activity. Alteration or modification of the band structure could lead to significant changes in these physical and chemical characteristics, therefore we introduce new mechanisms of creating novel solid state materials with interesting properties. Over the past three decades, research on band structure engineering has allowed development of various methods to modify the band structure of engineered materials. Compared to bulk counterparts, nanostructures generally exhibit higher band structure modulation capabilities due to the quantum confinement effect, prominent surface effect, and higher strain limit. In this review we will discuss various band structure engineering strategies in semiconductor nanowires and other related nanostructures, mostly focusing on metal oxide systems. Several important strategies of band structure modulation are discussed in detail, such as doping, alloying, straining, interface and core-shell nanostructuring.

Germanium Based Field-Effect Transistors: Challenges and Opportunities

PubMed Central

Goley, Patrick S.; Hudait, Mantu K.

2014-01-01

The performance of strained silicon (Si) as the channel material for today’s metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed. PMID:28788569

Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology.

PubMed

Emigh, Brent; Gordon, Christopher L; Connolly, Bairbre L; Falkiner, Michelle; Thomas, Karen E

2013-09-01

There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences <19%, T > 0.18). DAP-to-effective dose conversion factors ranged from 6.5 ×10(-4) mSv per Gy-cm(2) to 4.3 × 10(-3) mSv per Gy-cm(2) for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is < 1 mSv. Estimations of effective dose associated with pediatric UGI examinations can be made for children up to the age of 10 using the DAP-normalized conversion factors provided in this study. These estimates can be further refined to reflect individual hospital examination

Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

NASA Astrophysics Data System (ADS)

Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

2018-04-01

We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

Recent progress in n-channel organic thin-film transistors.

PubMed

Wen, Yugeng; Liu, Yunqi

2010-03-26

Particular attention has been focused on n-channel organic thin-film transistors (OTFTs) during the last few years, and the potentially cost-effective circuitry-based applications in flexible electronics, such as flexible radiofrequency identity tags, smart labels, and simple displays, will benefit from this fast development. This article reviews recent progress in performance and molecular design of n-channel semiconductors in the past five years, and limitations and practicable solutions for n-channel OTFTs are dealt with from the viewpoint of OTFT constitution and geometry, molecular design, and thin-film growth conditions. Strategy methodology is especially highlighted with an aim to investigate basic issues in this field.

Characterization of metal-ferroelectric-insulator-semiconductor structures based on ferroelectric Langmuir-Blodgett polyvinylidene fluoride copolymer films for nondestructive random access memory applications

NASA Astrophysics Data System (ADS)

Reece, Timothy James

Ferroelectric field effect transistors (FeFETs) have attracted much attention recently because of their ability to combine high speed, low power consumption, and fast nondestructive readout with the potential for high density nonvolatile memory. The polarization of the ferroelectric is used to switch the channel at the silicon surface between states of high and low conductance. Among the ferroelectric thin films used in FET devices; the ferroelectric copolymer of Polyvinylidene fluoride, PVDF (C2H2F 2), with trifluoroethylene, TrFE (C2HF3), has distinct advantages, including low dielectric constant, low processing temperature, low cost and compatibility with organic semiconductors. By employing the Langmuir-Blodgett technique, films as thin as 1.8 nm can be deposited, reducing the operating voltage. An MFIS structure consisting of aluminum, 170 nm P(VDF-TrFE), 100 nm silicon oxide and n-type silicon exhibited low leakage current (˜1x10 -8 A/cm2), a large memory window (4.2 V) and operated at 35 Volts. The operating voltage was lowered through use of high k insulators like cerium oxide. A sample consisting of 25 nm P(VDF-TrFE), 30 nm cerium oxide and p-type silicon exhibited a 1.9 V window with 7 Volt gate amplitude. The leakage current in this case was considerably higher (1x10 -6 A/cm2). The characterization, modeling, and fabrication of metal-ferroelectricinsulator semiconductor (MFIS) structures based on these films are discussed.

High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

2014-05-21

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

Oxide semiconductor thin-film transistors: a review of recent advances.

PubMed

Fortunato, E; Barquinha, P; Martins, R

2012-06-12

Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which

Organic-on-silicon complementary metal-oxide-semiconductor colour image sensors.

PubMed

Lim, Seon-Jeong; Leem, Dong-Seok; Park, Kyung-Bae; Kim, Kyu-Sik; Sul, Sangchul; Na, Kyoungwon; Lee, Gae Hwang; Heo, Chul-Joon; Lee, Kwang-Hee; Bulliard, Xavier; Satoh, Ryu-Ichi; Yagi, Tadao; Ro, Takkyun; Im, Dongmo; Jung, Jungkyu; Lee, Myungwon; Lee, Tae-Yon; Han, Moon Gyu; Jin, Yong Wan; Lee, Sangyoon

2015-01-12

Complementary metal-oxide-semiconductor (CMOS) colour image sensors are representative examples of light-detection devices. To achieve extremely high resolutions, the pixel sizes of the CMOS image sensors must be reduced to less than a micron, which in turn significantly limits the number of photons that can be captured by each pixel using silicon (Si)-based technology (i.e., this reduction in pixel size results in a loss of sensitivity). Here, we demonstrate a novel and efficient method of increasing the sensitivity and resolution of the CMOS image sensors by superposing an organic photodiode (OPD) onto a CMOS circuit with Si photodiodes, which consequently doubles the light-input surface area of each pixel. To realise this concept, we developed organic semiconductor materials with absorption properties selective to green light and successfully fabricated highly efficient green-light-sensitive OPDs without colour filters. We found that such a top light-receiving OPD, which is selective to specific green wavelengths, demonstrates great potential when combined with a newly designed Si-based CMOS circuit containing only blue and red colour filters. To demonstrate the effectiveness of this state-of-the-art hybrid colour image sensor, we acquired a real full-colour image using a camera that contained the organic-on-Si hybrid CMOS colour image sensor.

Thick layered semiconductor devices with water top-gates: High on-off ratio field-effect transistors and aqueous sensors.

PubMed

Huang, Yuan; Sutter, Eli; Wu, Liangmei; Xu, Hong; Bao, Lihong; Gao, Hong-Jun; Zhou, Xingjiang; Sutter, Peter

2018-06-21

Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for field-effect switching of layered semiconductors including SnS2, MoS2, and black phosphorus. The DI water gate is easily fabricated, can sustain rapid bias changes, and its efficient coupling to layered materials provides high on-off current ratios, near-ideal sub-threshold swing, and enhanced short-channel behavior even for FETs with thick, bulk-like channels where such control is difficult to realize with conventional back-gating. Screening by the high-k solution gate eliminates hysteresis due to surface and interface trap states and substantially enhances the field-effect mobility. The onset of water electrolysis sets the ultimate limit to DI water gating at large negative gate bias. Measurements in this regime show promise for aqueous sensing, demonstrated here by the amperometric detection of glucose in aqueous solution. DI water gating of layered semiconductors can be harnessed in research on novel materials and devices, and it may with further development find broad applications in microelectronics and sensing.

Effects of surface plasma treatment on threshold voltage hysteresis and instability in metal-insulator-semiconductor (MIS) AlGaN/GaN heterostructure HEMTs

NASA Astrophysics Data System (ADS)

Zaidi, Z. H.; Lee, K. B.; Roberts, J. W.; Guiney, I.; Qian, H.; Jiang, S.; Cheong, J. S.; Li, P.; Wallis, D. J.; Humphreys, C. J.; Chalker, P. R.; Houston, P. A.

2018-05-01

In a bid to understand the commonly observed hysteresis in the threshold voltage (VTH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium VTH, forward bias related VTH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations.

Synergistic effects of semiconductor substrate and noble metal nano-particles on SERS effect both theoretical and experimental aspects

NASA Astrophysics Data System (ADS)

Yang, Chen; Liang, Pei; Tang, Lisha; Zhou, Yongfeng; Cao, Yanting; Wu, Yanxiong; Zhang, De; Dong, Qianmin; Huang, Jie; He, Peng

2018-04-01

As a means of chemical identification and analysis, Surface enhanced Raman spectroscopy (SERS), with the advantages of high sensitivity and selectivity, non-destructive, high repeatability and in situ detection etc., has important significance in the field of composition detection, environmental science, biological medicine etc. Physical model of coupling effect between different semiconductor substrates and noble metal particles were investigated by using 3D-FDTD method. Mechanism and the effects of excitation wavelength, particle spacing and semiconductor substrate types on the SERS effect were discussed. The results showed that the optimal excitation wavelengths of three noble metals of Ag, Au, Cu, were located at 510, 600 and 630 nm, respectively; SERS effect of Ag, Au, Cu increases with the decreasing of the inter distance of particles, while the distance of the NPs reaches the critical value of 3 nm, the strength of SERS effect will be greatly enhanced. For the four different types of substrate of Ge, Si, SiO2 (glass) and Al2O3, the SERS effect of Ag on SiO2 > Ge > Al2O3 > Si. For Au and Cu nanoparticles, the SERS effect of them on oxide substrate is stronger than that on non-oxide substrate. In order to verify FDTD simulations, taking silver nanoparticles as an example, and silver nanoparticles prepared by chemical method were spinning coating on the four different substrates with R6G as probe molecules. The results show that the experimental results are consistent with FDTD theoretical simulations, and the SERS enhancement effect of Ag-SiO2 substrate is best. The results of this study have important theoretical significance to explain the variations of SERS enhancement on different noble metals, which is also an important guide for the preparation of SERS substrates, especially for the microfluidics. The better Raman effect can be realized by choosing proper substrate type, particle spacing and excitation wavelength, result in expanding the depth and width

Enhanced electrical properties of oxide semiconductor thin-film transistors with high conductivity thin layer insertion for the channel region

NASA Astrophysics Data System (ADS)

Nguyen, Cam Phu Thi; Raja, Jayapal; Kim, Sunbo; Jang, Kyungsoo; Le, Anh Huy Tuan; Lee, Youn-Jung; Yi, Junsin

2017-02-01

This study examined the performance and the stability of indium tin zinc oxide (ITZO) thin film transistors (TFTs) by inserting an ultra-thin indium tin oxide (ITO) layer at the active/insulator interface. The electrical properties of the double channel device (ITO thickness of 5 nm) were improved in comparison with the single channel ITZO or ITO devices. The TFT characteristics of the device with an ITO thickness of less than 5 nm were degraded due to the formation of an island-like morphology and the carriers scattering at the active/insulator interface. The 5 nm-thick ITO inserted ITZO TFTs (optimal condition) exhibited a superior field effect mobility (∼95 cm2/V·s) compared with the ITZO-only TFTs (∼34 cm2/V·s). The best characteristics of the TFT devices with double channel layer are due to the lowest surface roughness (0.14 nm) and contact angle (50.1°) that result in the highest hydrophicility, and the most effective adhesion at the surface. Furthermore, the threshold voltage shifts for the ITO/ITZO double layer device decreased to 0.80 and -2.39 V compared with 6.10 and -6.79 V (for the ITZO only device) under positive and negative bias stress, respectively. The falling rates of EA were 0.38 eV/V and 0.54 eV/V for the ITZO and ITO/ITZO bi-layer devices, respectively. The faster falling rate of the double channel devices suggests that the trap density, including interface trap and semiconductor bulk trap, can be decreased by the ion insertion of a very thin ITO film into the ITZO/SiO2 reference device. These results demonstrate that the double active layer TFT can potentially be applied to the flat panel display.

High performance printed oxide field-effect transistors processed using photonic curing.

PubMed

Garlapati, Suresh Kumar; Marques, Gabriel Cadilha; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Tahoori, Mehdi Baradaran; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-08

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV-visible light and UV-laser), we demonstrate facile fabrication of high performance In 2 O 3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

High performance printed oxide field-effect transistors processed using photonic curing

NASA Astrophysics Data System (ADS)

Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-01

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Hydrogen Sensors Using Nitride-Based Semiconductor Diodes: The Role of Metal/Semiconductor Interfaces

PubMed Central

Irokawa, Yoshihiro

2011-01-01

In this paper, I review my recent results in investigating hydrogen sensors using nitride-based semiconductor diodes, focusing on the interaction mechanism of hydrogen with the devices. Firstly, effects of interfacial modification in the devices on hydrogen detection sensitivity are discussed. Surface defects of GaN under Schottky electrodes do not play a critical role in hydrogen sensing characteristics. However, dielectric layers inserted in metal/semiconductor interfaces are found to cause dramatic changes in hydrogen sensing performance, implying that chemical selectivity to hydrogen could be realized. The capacitance-voltage (C–V) characteristics reveal that the work function change in the Schottky metal is not responsible mechanism for hydrogen sensitivity. The interface between the metal and the semiconductor plays a critical role in the interaction of hydrogen with semiconductor devises. Secondly, low-frequency C–V characterization is employed to investigate the interaction mechanism of hydrogen with diodes. As a result, it is suggested that the formation of a metal/semiconductor interfacial polarization could be attributed to hydrogen-related dipoles. In addition, using low-frequency C–V characterization leads to clear detection of 100 ppm hydrogen even at room temperature where it is hard to detect hydrogen by using conventional current-voltage (I–V) characterization, suggesting that low-frequency C–V method would be effective in detecting very low hydrogen concentrations. PMID:22346597

Aspect Ratio Model for Radiation-Tolerant Dummy Gate-Assisted n-MOSFET Layout.

PubMed

Lee, Min Su; Lee, Hee Chul

2014-01-01

In order to acquire radiation-tolerant characteristics in integrated circuits, a dummy gate-assisted n-type metal oxide semiconductor field effect transistor (DGA n-MOSFET) layout was adopted. The DGA n-MOSFET has a different channel shape compared with the standard n-MOSFET. The standard n-MOSFET has a rectangular channel shape, whereas the DGA n-MOSFET has an extended rectangular shape at the edge of the source and drain, which affects its aspect ratio. In order to increase its practical use, a new aspect ratio model is proposed for the DGA n-MOSFET and this model is evaluated through three-dimensional simulations and measurements of the fabricated devices. The proposed aspect ratio model for the DGA n-MOSFET exhibits good agreement with the simulation and measurement results.

Aspect Ratio Model for Radiation-Tolerant Dummy Gate-Assisted n-MOSFET Layout

PubMed Central

Lee, Min Su; Lee, Hee Chul

2014-01-01

In order to acquire radiation-tolerant characteristics in integrated circuits, a dummy gate-assisted n-type metal oxide semiconductor field effect transistor (DGA n-MOSFET) layout was adopted. The DGA n-MOSFET has a different channel shape compared with the standard n-MOSFET. The standard n-MOSFET has a rectangular channel shape, whereas the DGA n-MOSFET has an extended rectangular shape at the edge of the source and drain, which affects its aspect ratio. In order to increase its practical use, a new aspect ratio model is proposed for the DGA n-MOSFET and this model is evaluated through three-dimensional simulations and measurements of the fabricated devices. The proposed aspect ratio model for the DGA n-MOSFET exhibits good agreement with the simulation and measurement results. PMID:27350975

Shell Filling and Magnetic Anisotropy In A Few Hole Silicon Metal-Oxide-Semiconductor Quantum Dot

NASA Astrophysics Data System (ADS)

Hamilton, Alex; Li., R.; Liles, S. D.; Yang, C. H.; Hudson, F. E.; Veldhorst, M. E.; Dzurak, A. S.

There is growing interest in hole spin states in group IV materials for quantum information applications. The near-absence of nuclear spins in group IV crystals promises long spin coherence times, while the strong spin-orbit interaction of the hole states provides fast electrical spin manipulation methods. However, the level-mixing and magnetic field dependence of the p-orbital hole states is non-trivial in nanostructures, and is not as well understood as for electron systems. In this work, we study the hole states in a gate-defined silicon metal-oxide-semiconductor quantum dot. Using an adjacent charge sensor, we monitor quantum dot orbital level spacing down to the very last hole, and find the standard two-dimensional (2D) circular dot shell filling structure. We can change the shell filling sequence by applying an out-of-plane magnetic field. However, when the field is applied in-plane, the shell filling is not changed. This magnetic field anisotropy suggests that the confined hole states are Ising-like.

Screening-Engineered Field-Effect Solar Cells

DTIC Science & Technology

2012-01-01

virtually any semiconductor, including the promising but hard-to- dope metal oxides, sulfides, and phosphides.3 Prototype SFPV devices have been...MIS interface. Unfortu- nately, MIS cells, though sporting impressive efficiencies,4−6 typically have short operating lifetimes due to surface state...instability at the MIS interface.7 Methods aimed at direct field- effect “ doping ” of semiconductors, in which the voltage is externally applied to a gate

A high-performance complementary inverter based on transition metal dichalcogenide field-effect transistors.

PubMed

Cho, Ah-Jin; Park, Kee Chan; Kwon, Jang-Yeon

2015-01-01

For several years, graphene has been the focus of much attention due to its peculiar characteristics, and it is now considered to be a representative 2-dimensional (2D) material. Even though many research groups have studied on the graphene, its intrinsic nature of a zero band-gap, limits its use in practical applications, particularly in logic circuits. Recently, transition metal dichalcogenides (TMDs), which are another type of 2D material, have drawn attention due to the advantage of having a sizable band-gap and a high mobility. Here, we report on the design of a complementary inverter, one of the most basic logic elements, which is based on a MoS2 n-type transistor and a WSe2 p-type transistor. The advantages provided by the complementary metal-oxide-semiconductor (CMOS) configuration and the high-performance TMD channels allow us to fabricate a TMD complementary inverter that has a high-gain of 13.7. This work demonstrates the operation of the MoS2 n-FET and WSe2 p-FET on the same substrate, and the electrical performance of the CMOS inverter, which is based on a different driving current, is also measured.

Measurement of n-type Dry Thermally Oxidized 6H-SiC Metal-oxide Semiconductor Diodes by Quasistatic and High-Frequency Capacitance Versus Voltage and Capacitance Transient Techniques

NASA Technical Reports Server (NTRS)

Neudeck, P.; Kang, S.; Petit, J.; Tabib-Azar, M.

1994-01-01

Dry-oxidized n-type 6H-SiC metal-oxide-semiconductor capacitors are investigated using quasistatic capacitance versus voltage (C-V), high-frequency C-V, and pulsed high-frequency capacitance transient (C-t) analysis over the temperature range from 297 to 573 K. The quasistatic C - V characteristics presented are the first reported for 6H-SiC MOS capacitors, and exhibit startling nonidealities due to nonequilibrium conditions that arise from the fact that the recombination/generation process in 6H-SiC is extraordinarily slow even at the highest measurement temperature employed. The high-frequency dark C-V characteristics all showed deep depletion with no observable hysteresis. The recovery of the high-frequency capacitance from deep depletion to inversion was used to characterize the minority-carrier generation process as a function of temperature. Zerbst analysis conducted on the resulting C-t transients, which were longer than 1000 s at 573 K, showed a generation lifetime thermal activation energy of 0.49 eV.

Impact of open-core threading dislocations on the performance of AlGaN metal-semiconductor-metal photodetectors

NASA Astrophysics Data System (ADS)

Walde, S.; Brendel, M.; Zeimer, U.; Brunner, F.; Hagedorn, S.; Weyers, M.

2018-04-01

The influence of open-core threading dislocations on the bias-dependent external quantum efficiency (EQE) of bottom-illuminated Al0.5Ga0.5N/AlN metal-semiconductor-metal (MSM) photodetectors (PDs) is presented. These defects originate at the Al0.5Ga0.5N/AlN interface and terminate on the Al0.5Ga0.5N surface as hexagonal prisms. They work as electrically active paths bypassing the Al0.5Ga0.5N absorber layer and therefore alter the behavior of the MSM PDs under bias voltage. This effect is included in the model of carrier collection in the MSM PDs showing a good agreement with the experimental data. While such dislocations usually limit the device performance, the MSM PDs benefit by high EQE at a reduced bias voltage while maintaining a low dark current.

Accuracy of dielectric-dependent hybrid functionals in the prediction of optoelectronic properties of metal oxide semiconductors: a comprehensive comparison with many-body GW and experiments

NASA Astrophysics Data System (ADS)

Gerosa, M.; E Bottani, C.; Di Valentin, C.; Onida, G.; Pacchioni, G.

2018-01-01

Understanding the electronic structure of metal oxide semiconductors is crucial to their numerous technological applications, such as photoelectrochemical water splitting and solar cells. The needed experimental and theoretical knowledge goes beyond that of pristine bulk crystals, and must include the effects of surfaces and interfaces, as well as those due to the presence of intrinsic defects (e.g. oxygen vacancies), or dopants for band engineering. In this review, we present an account of the recent efforts in predicting and understanding the optoelectronic properties of oxides using ab initio theoretical methods. In particular, we discuss the performance of recently developed dielectric-dependent hybrid functionals, providing a comparison against the results of many-body GW calculations, including G 0 W 0 as well as more refined approaches, such as quasiparticle self-consistent GW. We summarize results in the recent literature for the band gap, the band level alignment at surfaces, and optical transition energies in defective oxides, including wide gap oxide semiconductors and transition metal oxides. Correlated transition metal oxides are also discussed. For each method, we describe successes and drawbacks, emphasizing the challenges faced by the development of improved theoretical approaches. The theoretical section is preceded by a critical overview of the main experimental techniques needed to characterize the optoelectronic properties of semiconductors, including absorption and reflection spectroscopy, photoemission, and scanning tunneling spectroscopy (STS).

A metallic metal oxide (Ti5O9)-metal oxide (TiO2) nanocomposite as the heterojunction to enhance visible-light photocatalytic activity

NASA Astrophysics Data System (ADS)

Li, L. H.; Deng, Z. X.; Xiao, J. X.; Yang, G. W.

2015-06-01

Coupling titanium dioxide (TiO2) with other semiconductors is a popular method to extend the optical response range of TiO2 and improve its photon quantum efficiency, as coupled semiconductors can increase the separation rate of photoinduced charge carriers in photocatalysts. Differing from normal semiconductors, metallic oxides have no energy gap separating occupied and unoccupied levels, but they can excite electrons between bands to create a high carrier mobility to facilitate kinetic charge separation. Here, we propose the first metallic metal oxide-metal oxide (Ti5O9-TiO2) nanocomposite as a heterojunction for enhancing the visible-light photocatalytic activity of TiO2 nanoparticles and we demonstrate that this hybridized TiO2-Ti5O9 nanostructure possesses an excellent visible-light photocatalytic performance in the process of photodegrading dyes. The TiO2-Ti5O9 nanocomposites are synthesized in one step using laser ablation in liquid under ambient conditions. The as-synthesized nanocomposites show strong visible-light absorption in the range of 300-800 nm and high visible-light photocatalytic activity in the oxidation of rhodamine B. They also exhibit excellent cycling stability in the photodegrading process. A working mechanism for the metallic metal oxide-metal oxide nanocomposite in the visible-light photocatalytic process is proposed based on first-principle calculations of Ti5O9. This study suggests that metallic metal oxides can be regarded as partners for metal oxide photocatalysts in the construction of heterojunctions to improve photocatalytic activity.

A metallic metal oxide (Ti5O9)-metal oxide (TiO2) nanocomposite as the heterojunction to enhance visible-light photocatalytic activity.

PubMed

Li, L H; Deng, Z X; Xiao, J X; Yang, G W

2015-01-26

Coupling titanium dioxide (TiO2) with other semiconductors is a popular method to extend the optical response range of TiO2 and improve its photon quantum efficiency, as coupled semiconductors can increase the separation rate of photoinduced charge carriers in photocatalysts. Differing from normal semiconductors, metallic oxides have no energy gap separating occupied and unoccupied levels, but they can excite electrons between bands to create a high carrier mobility to facilitate kinetic charge separation. Here, we propose the first metallic metal oxide-metal oxide (Ti5O9-TiO2) nanocomposite as a heterojunction for enhancing the visible-light photocatalytic activity of TiO2 nanoparticles and we demonstrate that this hybridized TiO2-Ti5O9 nanostructure possesses an excellent visible-light photocatalytic performance in the process of photodegrading dyes. The TiO2-Ti5O9 nanocomposites are synthesized in one step using laser ablation in liquid under ambient conditions. The as-synthesized nanocomposites show strong visible-light absorption in the range of 300-800 nm and high visible-light photocatalytic activity in the oxidation of rhodamine B. They also exhibit excellent cycling stability in the photodegrading process. A working mechanism for the metallic metal oxide-metal oxide nanocomposite in the visible-light photocatalytic process is proposed based on first-principle calculations of Ti5O9. This study suggests that metallic metal oxides can be regarded as partners for metal oxide photocatalysts in the construction of heterojunctions to improve photocatalytic activity.

Development of epitaxial Al xSc 1-xN for artificially structured metal/semiconductor superlattice metamaterials

DOE PAGES

Sands, Timothy D.; Stach, Eric A.; Saha, Bivas; ...

2015-02-01

Epitaxial nitride rocksalt metal/semiconductor superlattices are emerging as a novel class of artificially structured materials that have generated significant interest in recent years for their potential application in plasmonic and thermoelectric devices. Though most nitride metals are rocksalt, nitride semiconductors in general have hexagonal crystal structure. We report rocksalt aluminum scandium nitride (Al,Sc)N alloys as the semiconducting component in epitaxial rocksalt metal/semiconductor superlattices. The Al xSc 1-xN alloys when deposited directly on MgO substrates are stabilized in a homogeneous rocksalt (single) phase when x < 0.51. Employing 20 nm TiN as a seed layer on MgO substrates, the homogeneity rangemore » for stabilizing the rocksalt phase has been extended to x < 0.82 for a 120 nm film. The rocksalt Al xSc 1-xN alloys show moderate direct bandgap bowing with a bowing parameter, B = 1.41 ± 0.19 eV. The direct bandgap of metastable rocksalt AlN is extrapolated to be 4.70 ± 0.20 eV. The tunable lattice parameter, bandgap, dielectric permittivity, and electronic properties of rocksalt Al xSc 1-xN alloys enable high quality epitaxial rocksalt metal/Al xSc 1-xN superlattices with a wide range of accessible metamaterials properties.« less

Cryogenic measurements of aerojet GaAs n-JFETs

NASA Technical Reports Server (NTRS)

Goebel, John H.; Weber, Theodore T.

1993-01-01

The spectral noise characteristics of Aerojet gallium arsenide (GaAs) junction field effect transistors (JFET's) have been investigated down to liquid-helium temperatures. Noise characterization was performed with the field effect transistor (FET) in the floating-gate mode, in the grounded-gate mode to determine the lowest noise readings possible, and with an extrinsic silicon photodetector at various detector bias voltages to determine optimum operating conditions. The measurements indicate that the Aerojet GaAs JFET is a quiet and stable device at liquid helium temperatures. Hence, it can be considered a readout line driver or infrared detector preamplifier as well as a host of other cryogenic applications. Its noise performance is superior to silicon (Si) metal oxide semiconductor field effect transistor (MOSFET's) operating at liquid helium temperatures, and is equal to the best Si n channel junction field effect transistor (n-JFET's) operating at 300 K.

Visible light water splitting using dye-sensitized oxide semiconductors.

PubMed

Youngblood, W Justin; Lee, Seung-Hyun Anna; Maeda, Kazuhiko; Mallouk, Thomas E

2009-12-21

electron donors (EDTA(2-)) or non-sacrificial donors (I(-)). Through exfoliation of layered metal oxide semiconductors, we construct multilayer electron donor-acceptor thin films or sensitized colloids in which individual nanosheets mediate light-driven electron transfer reactions. When sensitizer molecules are "wired" to IrO(2).nH(2)O nanoparticles, a dye-sensitized TiO(2) electrode becomes the photoanode of a water-splitting photoelectrochemical cell. Although this system is an interesting proof-of-concept, the performance of these cells is still poor (approximately 1% quantum yield) and the dye photodegrades rapidly. We can understand the quantum efficiency and degradation in terms of competing kinetic pathways for water oxidation, back electron transfer, and decomposition of the oxidized dye molecules. Laser flash photolysis experiments allow us to measure these competing rates and, in principle, to improve the performance of the cell by changing the architecture of the electron transfer chain.

Disorder induced gap states as a cause of threshold voltage instabilities in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

NASA Astrophysics Data System (ADS)

Matys, M.; Kaneki, S.; Nishiguchi, K.; Adamowicz, B.; Hashizume, T.

2017-12-01

We proposed that the disorder induced gap states (DIGS) can be responsible for the threshold voltage (Vth) instability in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors. In order to verify this hypothesis, we performed the theoretical calculations of the capacitance voltage (C-V) curves for the Al2O3/AlGaN/GaN structures using the DIGS model and compared them with measured ones. We found that the experimental C-V curves with a complex hysteresis behavior varied with the maximum forward bias and the sweeping rate can be well reproduced theoretically by assuming a particular distribution in energy and space of the DIGS continuum near the Al2O3/AlGaN interface, i.e., a U-shaped energy density distribution and exponential depth decay from the interface into Al2O3 layer (up to 4 nm), as well as suitable DIGS capture cross sections (the order of magnitude of 10-15 cm2). Finally, we showed that the DIGS model can also explain the negative bias induced threshold voltage instability. We believe that these results should be critical for the successful development of the passivation techniques, which allows to minimize the Vth instability related effects.

Control of Ambipolar Transport in SnO Thin-Film Transistors by Back-Channel Surface Passivation for High Performance Complementary-like Inverters.

PubMed

Luo, Hao; Liang, Lingyan; Cao, Hongtao; Dai, Mingzhi; Lu, Yicheng; Wang, Mei

2015-08-12

For ultrathin semiconductor channels, the surface and interface nature are vital and often dominate the bulk properties to govern the field-effect behaviors. High-performance thin-film transistors (TFTs) rely on the well-defined interface between the channel and gate dielectric, featuring negligible charge trap states and high-speed carrier transport with minimum carrier scattering characters. The passivation process on the back-channel surface of the bottom-gate TFTs is indispensable for suppressing the surface states and blocking the interactions between the semiconductor channel and the surrounding atmosphere. We report a dielectric layer for passivation of the back-channel surface of 20 nm thick tin monoxide (SnO) TFTs to achieve ambipolar operation and complementary metal oxide semiconductor (CMOS) like logic devices. This chemical passivation reduces the subgap states of the ultrathin channel, which offers an opportunity to facilitate the Fermi level shifting upward upon changing the polarity of the gate voltage. With the advent of n-type inversion along with the pristine p-type conduction, it is now possible to realize ambipolar operation using only one channel layer. The CMOS-like logic inverters based on ambipolar SnO TFTs were also demonstrated. Large inverter voltage gains (>100) in combination with wide noise margins are achieved due to high and balanced electron and hole mobilities. The passivation also improves the long-term stability of the devices. The ability to simultaneously achieve field-effect inversion, electrical stability, and logic function in those devices can open up possibilities for the conventional back-channel surface passivation in the CMOS-like electronics.

Electric-Field-Driven Dual Vacancies Evolution in Ultrathin Nanosheets Realizing Reversible Semiconductor to Half-Metal Transition.

PubMed

Lyu, Mengjie; Liu, Youwen; Zhi, Yuduo; Xiao, Chong; Gu, Bingchuan; Hua, Xuemin; Fan, Shaojuan; Lin, Yue; Bai, Wei; Tong, Wei; Zou, Youming; Pan, Bicai; Ye, Bangjiao; Xie, Yi

2015-12-02

Fabricating a flexible room-temperature ferromagnetic resistive-switching random access memory (RRAM) device is of fundamental importance to integrate nonvolatile memory and spintronics both in theory and practice for modern information technology and has the potential to bring about revolutionary new foldable information-storage devices. Here, we show that a relatively low operating voltage (+1.4 V/-1.5 V, the corresponding electric field is around 20,000 V/cm) drives the dual vacancies evolution in ultrathin SnO2 nanosheets at room temperature, which causes the reversible transition between semiconductor and half-metal, accompanyied by an abrupt conductivity change up to 10(3) times, exhibiting room-temperature ferromagnetism in two resistance states. Positron annihilation spectroscopy and electron spin resonance results show that the Sn/O dual vacancies in the ultrathin SnO2 nanosheets evolve to isolated Sn vacancy under electric field, accounting for the switching behavior of SnO2 ultrathin nanosheets; on the other hand, the different defect types correspond to different conduction natures, realizing the transition between semiconductor and half-metal. Our result represents a crucial step to create new a information-storage device realizing the reversible transition between semiconductor and half-metal with flexibility and room-temperature ferromagnetism at low energy consumption. The as-obtained half-metal in the low-resistance state broadens the application of the device in spintronics and the semiconductor to half-metal transition on the basis of defects evolution and also opens up a new avenue for exploring random access memory mechanisms and finding new half-metals for spintronics.

Performance analysis of SOI MOSFET with rectangular recessed channel

NASA Astrophysics Data System (ADS)

Singh, M.; Mishra, S.; Mohanty, S. S.; Mishra, G. P.

2016-03-01

In this paper a two dimensional (2D) rectangular recessed channel-silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed.

Semiconductor metal oxide compounds based gas sensors: A literature review

NASA Astrophysics Data System (ADS)

Patil, Sunil Jagannath; Patil, Arun Vithal; Dighavkar, Chandrakant Govindrao; Thakare, Kashinath Shravan; Borase, Ratan Yadav; Nandre, Sachin Jayaram; Deshpande, Nishad Gopal; Ahire, Rajendra Ramdas

2015-03-01

This paper gives a statistical view about important contributions and advances on semiconductor metal oxide (SMO) compounds based gas sensors developed to detect the air pollutants such as liquefied petroleum gas (LPG), H2S, NH3, CO2, acetone, ethanol, other volatile compounds and hazardous gases. Moreover, it is revealed that the alloy/composite made up of SMO gas sensors show better gas response than their counterpart single component gas sensors, i.e., they are found to enhance the 4S characteristics namely speed, sensitivity, selectivity and stability. Improvement of such types of sensors used for detection of various air pollutants, which are reported in last two decades, is highlighted herein.

On Practical Charge Injection at the Metal/Organic Semiconductor Interface

PubMed Central

Kumatani, Akichika; Li, Yun; Darmawan, Peter; Minari, Takeo; Tsukagoshi, Kazuhito

2013-01-01

We have revealed practical charge injection at metal and organic semiconductor interface in organic field effect transistor configurations. We have developed a facile interface structure that consisted of double-layer electrodes in order to investigate the efficiency through contact metal dependence. The metal interlayer with few nanometers thickness between electrode and organic semiconductor drastically reduces the contact resistance at the interface. The improvement has clearly obtained when the interlayer is a metal with lower standard electrode potential of contact metals than large work function of the contact metals. The electrode potential also implies that the most dominant effect on the mechanism at the contact interface is induced by charge transfer. This mechanism represents a step forward towards understanding the fundamental physics of intrinsic charge injection in all organic devices. PMID:23293741

Sub-0.5 V Highly Stable Aqueous Salt Gated Metal Oxide Electronics

PubMed Central

Park, Sungjun; Lee, SeYeong; Kim, Chang-Hyun; Lee, Ilseop; Lee, Won-June; Kim, Sohee; Lee, Byung-Geun; Jang, Jae-Hyung; Yoon, Myung-Han

2015-01-01

Recently, growing interest in implantable bionics and biochemical sensors spurred the research for developing non-conventional electronics with excellent device characteristics at low operation voltages and prolonged device stability under physiological conditions. Herein, we report high-performance aqueous electrolyte-gated thin-film transistors using a sol-gel amorphous metal oxide semiconductor and aqueous electrolyte dielectrics based on small ionic salts. The proper selection of channel material (i.e., indium-gallium-zinc-oxide) and precautious passivation of non-channel areas enabled the development of simple but highly stable metal oxide transistors manifested by low operation voltages within 0.5 V, high transconductance of ~1.0 mS, large current on-off ratios over 107, and fast inverter responses up to several hundred hertz without device degradation even in physiologically-relevant ionic solutions. In conjunction with excellent transistor characteristics, investigation of the electrochemical nature of the metal oxide-electrolyte interface may contribute to the development of a viable bio-electronic platform directly interfacing with biological entities in vivo. PMID:26271456

Nitride passivation reduces interfacial traps in atomic-layer-deposited Al{sub 2}O{sub 3}/GaAs (001) metal-oxide-semiconductor capacitors using atmospheric metal-organic chemical vapor deposition

DOE Office of Scientific and Technical Information (OSTI.GOV)

Aoki, T., E-mail: aokit@sc.sumitomo-chem.co.jp; Fukuhara, N.; Osada, T.

2014-07-21

Using an atmospheric metal-organic chemical vapor deposition system, we passivated GaAs with AlN prior to atomic layer deposition of Al{sub 2}O{sub 3}. This AlN passivation incorporated nitrogen at the Al{sub 2}O{sub 3}/GaAs interface, improving the capacitance-voltage (C–V) characteristics of the resultant metal-oxide-semiconductor capacitors (MOSCAPs). The C–V curves of these devices showed a remarkable reduction in the frequency dispersion of the accumulation capacitance. Using the conductance method at various temperatures, we extracted the interfacial density of states (D{sub it}). The D{sub it} was reduced over the entire GaAs band gap. In particular, these devices exhibited D{sub it} around the midgap ofmore » less than 4 × 10{sup 12} cm{sup −2}eV{sup −1}, showing that AlN passivation effectively reduced interfacial traps in the MOS structure.« less

Electrical properties of zinc-oxide-based thin-film transistors using strontium-oxide-doped semiconductors

NASA Astrophysics Data System (ADS)

Wu, Shao-Hang; Zhang, Nan; Hu, Yong-Sheng; Chen, Hong; Jiang, Da-Peng; Liu, Xing-Yuan

2015-10-01

Strontium-zinc-oxide (SrZnO) films forming the semiconductor layers of thin-film transistors (TFTs) are deposited by using ion-assisted electron beam evaporation. Using strontium-oxide-doped semiconductors, the off-state current can be dramatically reduced by three orders of magnitude. This dramatic improvement is attributed to the incorporation of strontium, which suppresses carrier generation, thereby improving the TFT. Additionally, the presence of strontium inhibits the formation of zinc oxide (ZnO) with the hexagonal wurtzite phase and permits the formation of an unusual phase of ZnO, thus significantly changing the surface morphology of ZnO and effectively reducing the trap density of the channel. Project supported by the National Natural Science Foundation of China (Grant No. 6140031454) and the Innovation Program of Chinese Academy of Sciences and State Key Laboratory of Luminescence and Applications.

Enhancement-mode GaAs metal-oxide-semiconductor high-electron-mobility transistors with atomic layer deposited Al2O3 as gate dielectric

NASA Astrophysics Data System (ADS)

Lin, H. C.; Yang, T.; Sharifi, H.; Kim, S. K.; Xuan, Y.; Shen, T.; Mohammadi, S.; Ye, P. D.

2007-11-01

Enhancement-mode GaAs metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with ex situ atomic-layer-deposited Al2O3 as gate dielectrics are studied. Maximum drain currents of 211 and 263mA/mm are obtained for 1μm gate-length Al2O3 MOS-HEMTs with 3 and 6nm thick gate oxide, respectively. C-V characteristic shows negligible hysteresis and frequency dispersion. The gate leakage current density of the MOS-HEMTs is 3-5 orders of magnitude lower than the conventional HEMTs under similar bias conditions. The drain current on-off ratio of MOS-HEMTs is ˜3×103 with a subthreshold swing of 90mV/decade. A maximum cutoff frequency (fT) of 27.3GHz and maximum oscillation frequency (fmax) of 39.9GHz and an effective channel mobility of 4250cm2/Vs are measured for the 1μm gate-length Al2O3 MOS-HEMT with 6nm gate oxide. Hooge's constant measured by low frequency noise spectral density characterization is 3.7×10-5 for the same device.

Comparative study on nitridation and oxidation plasma interface treatment for AlGaN/GaN MIS-HEMTs with AlN gate dielectric

NASA Astrophysics Data System (ADS)

Zhu, Jie-Jie; Ma, Xiao-Hua; Hou, Bin; Chen, Li-Xiang; Zhu, Qing; Hao, Yue

2017-02-01

This paper demonstrated the comparative study on interface engineering of AlN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) by using plasma interface pre-treatment in various ambient gases. The 15 nm AlN gate dielectric grown by plasma-enhanced atomic layer deposition significantly suppressed the gate leakage current by about two orders of magnitude and increased the peak field-effect mobility by more than 50%. NH3/N2 nitridation plasma treatment (NPT) was used to remove the 3 nm poor-quality interfacial oxide layer and N2O/N2 oxidation plasma treatment (OPT) to improve the quality of interfacial layer, both resulting in improved dielectric/barrier interface quality, positive threshold voltage (V th) shift larger than 0.9 V, and negligible dispersion. In comparison, however, NPT led to further decrease in interface charges by 3.38 × 1012 cm-2 and an extra positive V th shift of 1.3 V. Analysis with fat field-effect transistors showed that NPT resulted in better sub-threshold characteristics and transconductance linearity for MIS-HEMTs compared with OPT. The comparative study suggested that direct removing the poor interfacial oxide layer by nitridation plasma was superior to improving the quality of interfacial layer by oxidation plasma for the interface engineering of GaN-based MIS-HEMTs.

Electrical and carrier transport properties of the Au/Y2O3/n-GaN metal-insulator-semiconductor (MIS) diode with rare-earth oxide interlayer

NASA Astrophysics Data System (ADS)

Venkata Prasad, C.; Rajagopal Reddy, V.; Choi, Chel-Jong

2017-04-01

The electrical and transport properties of rare-earth Y2O3 on n-type GaN with Au electrode have been investigated by current-voltage and capacitance-voltage techniques at room temperature. The Au/Y2O3/n-GaN metal-insulator-semiconductor (MIS) diode shows a good rectification behavior compared to the Au/n-GaN metal-semiconductor (MS) diode. Statistical analysis showed that a mean barrier height (BH) and ideality factor are 0.78 eV and 1.93, and 0.96 eV and 2.09 for the Au/n-GaN MS and Au/Y2O3/n-GaN MIS diodes, respectively. Results indicate that the high BH is obtained for the MIS diode compared to the MS diode. The BH, ideality factor and series resistance are also estimated by Cheung's function and Norde method. From the forward current-voltage data, the interface state density ( N SS) is estimated for both the MS and MIS Schottky diodes, and found that the estimated N SS is lower for the MIS diode compared to the MS diode. The results reveal that the introduction of Y2O3 interlayer facilitated the reduction of N SS of the Au/n-GaN interface. Experimental results suggest that the Poole-Frenkel emission is a dominant conduction mechanism in the reverse bias region of both Au/n-GaN MS and Au/Y2O3/n-GaN MIS diodes.

Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials

NASA Astrophysics Data System (ADS)

Saha, Bivas; Shakouri, Ali; Sands, Timothy D.

2018-06-01

Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.

Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method

NASA Astrophysics Data System (ADS)

Chidambaram, Thenappan

III-V semiconductors are potential candidates to replace Si as a channel material in next generation CMOS integrated circuits owing to their superior carrier mobilities. Low density of states (DOS) and typically high interface and border trap densities (Dit) in high mobility group III-V semiconductors provide difficulties in quantification of Dit near the conduction band edge. The trap response above the threshold voltage of a MOSFET can be very fast, and conventional Dit extraction methods, based on capacitance/conductance response (CV methods) of MOS capacitors at frequencies <1MHz, cannot distinguish conducting and trapped carriers. In addition, the CV methods have to deal with high dispersion in the accumulation region that makes it a difficult task to measure the true oxide capacitance, Cox value. Another implication of these properties of III-V interfaces is an ambiguity of determination of electron density in the MOSFET channel. Traditional evaluation of carrier density by integration of the C-V curve, gives incorrect values for D it and mobility. Here we employ gated Hall method to quantify the D it spectrum at the high-K oxide/III-V semiconductor interface for buried and surface channel devices using Hall measurement and capacitance-voltage data. Determination of electron density directly from Hall measurements allows for obtaining true mobility values.

Exploration of oxide-based diluted magnetic semiconductors toward transparent spintronics

NASA Astrophysics Data System (ADS)

Fukumura, T.; Yamada, Y.; Toyosaki, H.; Hasegawa, T.; Koinuma, H.; Kawasaki, M.

2004-02-01

A review is given for the recent progress of research in the field of oxide-based diluted magnetic semiconductor (DMS), which was triggered by combinatorial discovery of transparent ferromagnet. The possible advantages of oxide semiconductor as a host of DMS are described in comparison with conventional compound semiconductors. Limits and problems for identifying novel ferromagnetic DMS are described in view of recent reports in this field. Several characterization techniques are proposed in order to eliminate unidentified ferromagnetism of oxide-based DMS unidentified ferromagnetic oxide (UFO). Perspectives and possible devices are also given.

In-situ thermal annealing of on-membrane silicon-on-insulator semiconductor-based devices after high gamma dose irradiation.

PubMed

Amor, S; André, N; Kilchytska, V; Tounsi, F; Mezghani, B; Gérard, P; Ali, Z; Udrea, F; Flandre, D; Francis, L A

2017-05-05

In this paper, we investigate the recovery of some semiconductor-based components, such as N/P-type field-effect transistors (FETs) and a complementary metal-oxide-semiconductor (CMOS) inverter, after being exposed to a high total dose of gamma ray radiation. The employed method consists mainly of a rapid, low power and in situ annealing mitigation technique by silicon-on-insulator micro-hotplates. Due to the ionizing effect of the gamma irradiation, the threshold voltages showed an average shift of -580 mV for N-channel transistors, and -360 mV for P-MOSFETs. A 4 min double-cycle annealing of components with a heater temperature up to 465 °C, corresponding to a maximum power of 38 mW, ensured partial recovery but was not sufficient for full recovery. The degradation was completely recovered after the use of a built-in high temperature annealing process, up to 975 °C for 8 min corresponding to a maximum power of 112 mW, which restored the normal operating characteristics for all devices after their irradiation.

In-situ thermal annealing of on-membrane silicon-on-insulator semiconductor-based devices after high gamma dose irradiation

NASA Astrophysics Data System (ADS)

Amor, S.; André, N.; Kilchytska, V.; Tounsi, F.; Mezghani, B.; Gérard, P.; Ali, Z.; Udrea, F.; Flandre, D.; Francis, L. A.

2017-05-01

In this paper, we investigate the recovery of some semiconductor-based components, such as N/P-type field-effect transistors (FETs) and a complementary metal-oxide-semiconductor (CMOS) inverter, after being exposed to a high total dose of gamma ray radiation. The employed method consists mainly of a rapid, low power and in situ annealing mitigation technique by silicon-on-insulator micro-hotplates. Due to the ionizing effect of the gamma irradiation, the threshold voltages showed an average shift of -580 mV for N-channel transistors, and -360 mV for P-MOSFETs. A 4 min double-cycle annealing of components with a heater temperature up to 465 °C, corresponding to a maximum power of 38 mW, ensured partial recovery but was not sufficient for full recovery. The degradation was completely recovered after the use of a built-in high temperature annealing process, up to 975 °C for 8 min corresponding to a maximum power of 112 mW, which restored the normal operating characteristics for all devices after their irradiation.

Mechanistic analysis of temperature-dependent current conduction through thin tunnel oxide in n+-polySi/SiO2/n+-Si structures

NASA Astrophysics Data System (ADS)

Samanta, Piyas

2017-09-01

We present a detailed investigation on temperature-dependent current conduction through thin tunnel oxides grown on degenerately doped n-type silicon (n+-Si) under positive bias ( VG ) on heavily doped n-type polycrystalline silicon (n+-polySi) gate in metal-oxide-semiconductor devices. The leakage current measured between 298 and 573 K and at oxide fields ranging from 6 to 10 MV/cm is primarily attributed to Poole-Frenkel (PF) emission of trapped electrons from the neutral electron traps located in the silicon dioxide (SiO2) band gap in addition to Fowler-Nordheim (FN) tunneling of electrons from n+-Si acting as the drain node in FLOating gate Tunnel OXide Electrically Erasable Programmable Read-Only Memory devices. Process-induced neutral electron traps are located at 0.18 eV and 0.9 eV below the SiO2 conduction band. Throughout the temperature range studied here, PF emission current IPF dominates FN electron tunneling current IFN at oxide electric fields Eox between 6 and 10 MV/cm. A physics based new analytical formula has been developed for FN tunneling of electrons from the accumulation layer of degenerate semiconductors at a wide range of temperatures incorporating the image force barrier rounding effect. FN tunneling has been formulated in the framework of Wentzel-Kramers-Brilloiun taking into account the correction factor due to abrupt variation of the energy barrier at the cathode/oxide interface. The effect of interfacial and near-interfacial trapped-oxide charges on FN tunneling has also been investigated in detail at positive VG . The mechanism of leakage current conduction through SiO2 films plays a crucial role in simulation of time-dependent dielectric breakdown of the memory devices and to precisely predict the normal operating field or applied floating gate (FG) voltage for lifetime projection of the devices. In addition, we present theoretical results showing the effect of drain doping concentration on the FG leakage current.

Selective CO2 reduction conjugated with H2O oxidation utilizing semiconductor/metal-complex hybrid photocatalysts

NASA Astrophysics Data System (ADS)

Morikawa, T.; Sato, S.; Arai, T.; Uemura, K.; Yamanaka, K. I.; Suzuki, T. M.; Kajino, T.; Motohiro, T.

2013-12-01

We developed a new hybrid photocatalyst for CO2 reduction, which is composed of a semiconductor and a metal complex. In the hybrid photocatalyst, ΔG between the position of conduction band minimum (ECBM) of the semiconductor and the CO2 reduction potential of the complex is an essential factor for realizing fast electron transfer from the conduction band of semiconductor to metal complex leading to high photocatalytic activity. On the basis of this concept, the hybrid photocatalyst InP/Ru-complex, which functions in aqueous media, was developed. The photoreduction of CO2 to formate using water as an electron donor and a proton source was successfully achieved as a Z-scheme system by functionally conjugating the InP/Ru-complex photocatalyst for CO2 reduction with a TiO2 photocatalyst for water oxidation. The conversion efficiency from solar energy to chemical energy was ca. 0.04%, which approaches that for photosynthesis in a plant. Because this system can be applied to many other inorganic semiconductors and metal-complex catalysts, the efficiency and reaction selectivity can be enhanced by optimization of the electron transfer process including the energy-band configurations, conjugation conformations, and catalyst structures. This electrical-bias-free reaction is a huge leap forward for future practical applications of artificial photosynthesis under solar irradiation to produce organic species.

Lateral amorphous selenium metal-insulator-semiconductor-insulator-metal photodetectors using ultrathin dielectric blocking layers for dark current suppression

NASA Astrophysics Data System (ADS)

Chang, Cheng-Yi; Pan, Fu-Ming; Lin, Jian-Siang; Yu, Tung-Yuan; Li, Yi-Ming; Chen, Chieh-Yang

2016-12-01

We fabricated amorphous selenium (a-Se) photodetectors with a lateral metal-insulator-semiconductor-insulator-metal (MISIM) device structure. Thermal aluminum oxide, plasma-enhanced chemical vapor deposited silicon nitride, and thermal atomic layer deposited (ALD) aluminum oxide and hafnium oxide (ALD-HfO2) were used as the electron and hole blocking layers of the MISIM photodetectors for dark current suppression. A reduction in the dark current by three orders of magnitude can be achieved at electric fields between 10 and 30 V/μm. The effective dark current suppression is primarily ascribed to electric field lowering in the dielectric layers as a result of charge trapping in deep levels. Photogenerated carriers in the a-Se layer can be transported across the blocking layers to the Al electrodes via Fowler-Nordheim tunneling because a high electric field develops in the ultrathin dielectric layers under illumination. Since the a-Se MISIM photodetectors have a very low dark current without significant degradation in the photoresponse, the signal contrast is greatly improved. The MISIM photodetector with the ALD-HfO2 blocking layer has an optimal signal contrast more than 500 times the contrast of the photodetector without a blocking layer at 15 V/μm.

Electrical characteristics and thermal stability of n+ polycrystalline- Si/ZrO2/SiO2/Si metal-oxide-semiconductor capacitors

NASA Astrophysics Data System (ADS)

Lim, Kwan-Yong; Park, Dae-Gyu; Cho, Heung-Jae; Kim, Joong-Jung; Yang, Jun-Mo; Ii, Choi-Sang; Yeo, In-Seok; Park, Jin Won

2002-01-01

We have investigated the thermal stability of n+ polycrystalline-Si(poly-Si)/ZrO2(50-140 Å)/SiO2(7 Å)/p-Si metal-oxide-semiconductor (MOS) capacitors via electrical and material characterization. The ZrO2 gate dielectric was prepared by atomic layer chemical vapor deposition using ZrCl4 and H2O vapor. Capacitance-voltage hysteresis as small as ˜12 mV with the flatband voltage of -0.5 V and the interface trap density of ˜5×1010cm-2 eV-1 were attained with activation anneal at 750 °C. A high level of gate leakage current was observed at the activation temperatures over 750 °C and attributed to the interfacial reaction of poly-Si and ZrO2 during the poly-Si deposition and the following high temperature anneal. Because of this, the ZrO2 gate dielectric is incompatible with the conventional poly-Si gate process. In the MOS capacitors having a smaller active area (<50×50 μm2), fortunately, the electrical degradation by further severe silicidation does not occur up to an 800 °C anneal in N2 for 30 min.

Disorder induced semiconductor to metal transition and modifications of grain boundaries in nanocrystalline zinc oxide thin film

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singh, Fouran; Kumar, Vinod; Chaudhary, Babloo

2012-10-01

This paper report on the disorder induced semiconductor to metal transition (SMT) and modifications of grain boundaries in nanocrystalline zinc oxide thin film. Disorder is induced using energetic ion irradiation. It eliminates the possibility of impurities induced transition. However, it is revealed that some critical concentration of defects is needed for inducing such kind of SMT at certain critical temperature. Above room temperature, the current-voltage characteristics in reverse bias attributes some interesting phenomenon, such as electric field induced charge transfer, charge trapping, and diffusion of defects. The transition is explained by the defects induced disorder and strain in ZnO crystallitesmore » created by high density of electronic excitations.« less

A Comprehensive Review of One-Dimensional Metal-Oxide Nanostructure Photodetectors

PubMed Central

Zhai, Tianyou; Fang, Xiaosheng; Liao, Meiyong; Xu, Xijin; Zeng, Haibo; Yoshio, Bando; Golberg, Dmitri

2009-01-01

One-dimensional (1D) metal-oxide nanostructures are ideal systems for exploring a large number of novel phenomena at the nanoscale and investigating size and dimensionality dependence of nanostructure properties for potential applications. The construction and integration of photodetectors or optical switches based on such nanostructures with tailored geometries have rapidly advanced in recent years. Active 1D nanostructure photodetector elements can be configured either as resistors whose conductions are altered by a charge-transfer process or as field-effect transistors (FET) whose properties can be controlled by applying appropriate potentials onto the gates. Functionalizing the structure surfaces offers another avenue for expanding the sensor capabilities. This article provides a comprehensive review on the state-of-the-art research activities in the photodetector field. It mainly focuses on the metal oxide 1D nanostructures such as ZnO, SnO2, Cu2O, Ga2O3, Fe2O3, In2O3, CdO, CeO2, and their photoresponses. The review begins with a survey of quasi 1D metal-oxide semiconductor nanostructures and the photodetector principle, then shows the recent progresses on several kinds of important metal-oxide nanostructures and their photoresponses and briefly presents some additional prospective metal-oxide 1D nanomaterials. Finally, the review is concluded with some perspectives and outlook on the future developments in this area. PMID:22454597

Interface Schottky barrier engineering via strain in metal-semiconductor composites

NASA Astrophysics Data System (ADS)

Ma, Xiangchao; Dai, Ying; Yu, Lin; Huang, Baibiao

2016-01-01

The interfacial carrier transfer property, which is dominated by the interface Schottky barrier height (SBH), plays a crucial role in determining the performance of metal-semiconductor heterostructures in a variety of applications. Therefore, artificially controlling the interface SBH is of great importance for their industrial applications. As a model system, the Au/TiO2 (001) heterostructure is studied using first-principles calculations and the tight-binding method in the present study. Our investigation demonstrates that strain can be an effective way to decrease the interface SBH and that the n-type SBH can be more effectively decreased than the p-type SBH. Astonishingly, strain affects the interface SBH mainly by changing the intrinsic properties of Au and TiO2, whereas the interfacial potential alignment is almost independent of strain due to two opposite effects, which are induced by strain at the interfacial region. These observed trends can be understood on the basis of the general free-electron gas model of typical metals, the tight-binding theory and the crystal-field theory, which suggest that similar trends may be generalized for many other metal-semiconductor heterostructures. Given the commonness and tunability of strain in typical heterostructures, we anticipate that the tunability of the interface SBH with strain described here can provide an alternative effective way for realizing more efficient applications of relevant heterostructures.The interfacial carrier transfer property, which is dominated by the interface Schottky barrier height (SBH), plays a crucial role in determining the performance of metal-semiconductor heterostructures in a variety of applications. Therefore, artificially controlling the interface SBH is of great importance for their industrial applications. As a model system, the Au/TiO2 (001) heterostructure is studied using first-principles calculations and the tight-binding method in the present study. Our investigation

Graphene field-effect devices

NASA Astrophysics Data System (ADS)

Echtermeyer, T. J.; Lemme, M. C.; Bolten, J.; Baus, M.; Ramsteiner, M.; Kurz, H.

2007-09-01

In this article, graphene is investigated with respect to its electronic properties when introduced into field effect devices (FED). With the exception of manual graphene deposition, conventional top-down CMOS-compatible processes are applied. Few and monolayer graphene sheets are characterized by scanning electron microscopy, atomic force microscopy and Raman spectroscopy. The electrical properties of monolayer graphene sandwiched between two silicon dioxide films are studied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from double-gated Graphene-FEDs and silicon metal-oxide-semiconductor field-effect-transistors (MOSFETs).

Semiconducting transition metal oxides.

PubMed

Lany, Stephan

2015-07-22

Open shell transition metal oxides are usually described as Mott or charge transfer insulators, which are often viewed as being disparate from semiconductors. Based on the premise that the presence of a correlated gap and semiconductivity are not mutually exclusive, this work reviews electronic structure calculations on the binary 3d oxides, so to distill trends and design principles for semiconducting transition metal oxides. This class of materials possesses the potential for discovery, design, and development of novel functional semiconducting compounds, e.g. for energy applications. In order to place the 3d orbitals and the sp bands into an integrated picture, band structure calculations should treat both contributions on the same footing and, at the same time, account fully for electron correlation in the 3d shell. Fundamentally, this is a rather daunting task for electronic structure calculations, but quasi-particle energy calculations in GW approximation offer a viable approach for band structure predictions in these materials. Compared to conventional semiconductors, the inherent multivalent nature of transition metal cations is more likely to cause undesirable localization of electron or hole carriers. Therefore, a quantitative prediction of the carrier self-trapping energy is essential for the assessing the semiconducting properties and to determine whether the transport mechanism is a band-like large-polaron conduction or a small-polaron hopping conduction. An overview is given for the binary 3d oxides on how the hybridization between the 3d crystal field symmetries with the O-p orbitals of the ligands affects the effective masses and the likelihood of electron and hole self-trapping, identifying those situations where small masses and band-like conduction are more likely to be expected. The review concludes with an illustration of the implications of the increased electronic complexity of transition metal cations on the defect physics and doping, using

Model for determination of mid-gap states in amorphous metal oxides from thin film transistors

NASA Astrophysics Data System (ADS)

Bubel, S.; Chabinyc, M. L.

2013-06-01

The electronic density of states in metal oxide semiconductors like amorphous zinc oxide (a-ZnO) and its ternary and quaternary oxide alloys with indium, gallium, tin, or aluminum are different from amorphous silicon, or disordered materials such as pentacene, or P3HT. Many ZnO based semiconductors exhibit a steep decaying density of acceptor tail states (trap DOS) and a Fermi level (EF) close to the conduction band energy (EC). Considering thin film transistor (TFT) operation in accumulation mode, the quasi Fermi level for electrons (Eq) moves even closer to EC. Classic analytic TFT simulations use the simplification EC-EF> `several'kT and cannot reproduce exponential tail states with a characteristic energy smaller than 1/2 kT. We demonstrate an analytic model for tail and deep acceptor states, valid for all amorphous metal oxides and include the effect of trap assisted hopping instead of simpler percolation or mobility edge models, to account for the observed field dependent mobility.

Magnetic-field-controlled reconfigurable semiconductor logic.

PubMed

Joo, Sungjung; Kim, Taeyueb; Shin, Sang Hoon; Lim, Ju Young; Hong, Jinki; Song, Jin Dong; Chang, Joonyeon; Lee, Hyun-Woo; Rhie, Kungwon; Han, Suk Hee; Shin, Kyung-Ho; Johnson, Mark

2013-02-07

Logic devices based on magnetism show promise for increasing computational efficiency while decreasing consumed power. They offer zero quiescent power and yet combine novel functions such as programmable logic operation and non-volatile built-in memory. However, practical efforts to adapt a magnetic device to logic suffer from a low signal-to-noise ratio and other performance attributes that are not adequate for logic gates. Rather than exploiting magnetoresistive effects that result from spin-dependent transport of carriers, we have approached the development of a magnetic logic device in a different way: we use the phenomenon of large magnetoresistance found in non-magnetic semiconductors in high electric fields. Here we report a device showing a strong diode characteristic that is highly sensitive to both the sign and the magnitude of an external magnetic field, offering a reversible change between two different characteristic states by the application of a magnetic field. This feature results from magnetic control of carrier generation and recombination in an InSb p-n bilayer channel. Simple circuits combining such elementary devices are fabricated and tested, and Boolean logic functions including AND, OR, NAND and NOR are performed. They are programmed dynamically by external electric or magnetic signals, demonstrating magnetic-field-controlled semiconductor reconfigurable logic at room temperature. This magnetic technology permits a new kind of spintronic device, characterized as a current switch rather than a voltage switch, and provides a simple and compact platform for non-volatile reconfigurable logic devices.

Electroluminescence from metal-oxide-semiconductor devices with erbium-doped CeO{sub 2} films on silicon

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lv, Chunyan; Department of Chemistry, Huzhou University, Zhejiang, Huzhou 313000; Zhu, Chen

2015-04-06

We report on erbium (Er)-related electroluminescence (EL) in the visible and near-infrared (NIR) from metal-oxide-semiconductor (MOS) devices with Er-doped CeO{sub 2} (CeO{sub 2}:Er) films on silicon. The onset voltage of such EL under either forward or reverse bias is smaller than 10 V. Moreover, the EL quenching can be avoidable for the CeO{sub 2}:Er-based MOS devices. Analysis on the current-voltage characteristic of the device indicates that the electron transportation at the EL-enabling voltages under either forward or reverse bias is dominated by trap-assisted tunneling mechanism. Namely, electrons in n{sup +}-Si/ITO can tunnel into the conduction band of CeO{sub 2} host viamore » defect states at sufficiently high forward/reverse bias voltages. Then, a fraction of such electrons are accelerated by electric field to become hot electrons, which impact-excite the Er{sup 3+} ions, thus leading to characteristic emissions. It is believed that this work has laid the foundation for developing viable silicon-based emitters using CeO{sub 2}:Er films.« less

Enhancing the far-ultraviolet sensitivity of silicon complementary metal oxide semiconductor imaging arrays

NASA Astrophysics Data System (ADS)

Retherford, Kurt D.; Bai, Yibin; Ryu, Kevin K.; Gregory, James A.; Welander, Paul B.; Davis, Michael W.; Greathouse, Thomas K.; Winters, Gregory S.; Suntharalingam, Vyshnavi; Beletic, James W.

2015-10-01

We report our progress toward optimizing backside-illuminated silicon P-type intrinsic N-type complementary metal oxide semiconductor devices developed by Teledyne Imaging Sensors (TIS) for far-ultraviolet (UV) planetary science applications. This project was motivated by initial measurements at Southwest Research Institute of the far-UV responsivity of backside-illuminated silicon PIN photodiode test structures, which revealed a promising QE in the 100 to 200 nm range. Our effort to advance the capabilities of thinned silicon wafers capitalizes on recent innovations in molecular beam epitaxy (MBE) doping processes. Key achievements to date include the following: (1) representative silicon test wafers were fabricated by TIS, and set up for MBE processing at MIT Lincoln Laboratory; (2) preliminary far-UV detector QE simulation runs were completed to aid MBE layer design; (3) detector fabrication was completed through the pre-MBE step; and (4) initial testing of the MBE doping process was performed on monitoring wafers, with detailed quality assessments.

Charge-flow structures as polymeric early-warning fire alarm devices. M.S. Thesis; [metal oxide semiconductors

NASA Technical Reports Server (NTRS)

Sechen, C. M.; Senturia, S. D.

1977-01-01

The charge-flow transistor (CFT) and its applications for fire detection and gas sensing were investigated. The utility of various thin film polymers as possible sensing materials was determined. One polymer, PAPA, showed promise as a relative humidity sensor; two others, PFI and PSB, were found to be particularly suitable for fire detection. The behavior of the charge-flow capacitor, which is basically a parallel-plate capacitor with a polymer-filled gap in the metallic tip electrode, was successfully modeled as an RC transmission line. Prototype charge-flow transistors were fabricated and tested. The effective threshold voltage of this metal oxide semiconductor was found to be dependent on whether surface or bulk conduction in the thin film was dominant. Fire tests with a PFI-coated CFT indicate good sensitivity to smouldering fires.

Field-assisted nanopatterning of metals, metal oxides and metal salts

NASA Astrophysics Data System (ADS)

Liu, Jun-Fu; Miller, Glen P.

2009-02-01

The tip-based nanofabrication method called field-assisted nanopatterning or FAN has now been extended to the transfer of metals, metal oxides and metal salts onto various receiving substrates including highly ordered pyrolytic graphite, passivated gold and indium-tin oxide. Standard atomic force microscope tips were first dip-coated using suspensions of inorganic compounds in solvent. The films prepared in this manner were non-uniform and contained inorganic nanoparticles. Tip-based nanopatterning on chosen substrates was conducted under high electric field conditions. The same tip was used for both nanofabrication and imaging. Arbitrary patterns were formed with dimensions that ranged from tens of microns to sub-20 nm and were controlled by tuning the tip bias during fabrication. Most tip-based nanopatterning techniques are limited in terms of the type of species that can be deposited and the type of substrates onto which the deposition occurs. With the successful deposition of inorganic species reported here, FAN is demonstrated to be a truly versatile tip-based nanofabrication technique that is useful for the deposition of a wide variety of both organic and inorganic species including small molecules, large molecules and polymers.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET.

PubMed

Tan, Michael Loong Peng; Lentaris, Georgios; Amaratunga Aj, Gehan

2012-08-19

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.

Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors

PubMed Central

Maier, Konrad; Helwig, Andreas; Müller, Gerhard; Hille, Pascal; Eickhoff, Martin

2015-01-01

In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO2 and NH3, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high. PMID:28793583

Ambipolar Small-Molecule:Polymer Blend Semiconductors for Solution-Processable Organic Field-Effect Transistors.

PubMed

Kang, Minji; Hwang, Hansu; Park, Won-Tae; Khim, Dongyoon; Yeo, Jun-Seok; Kim, Yunseul; Kim, Yeon-Ju; Noh, Yong-Young; Kim, Dong-Yu

2017-01-25

We report on the fabrication of an organic thin-film semiconductor formed using a blend solution of soluble ambipolar small molecules and an insulating polymer binder that exhibits vertical phase separation and uniform film formation. The semiconductor thin films are produced in a single step from a mixture containing a small molecular semiconductor, namely, quinoidal biselenophene (QBS), and a binder polymer, namely, poly(2-vinylnaphthalene) (PVN). Organic field-effect transistors (OFETs) based on QBS/PVN blend semiconductor are then assembled using top-gate/bottom-contact device configuration, which achieve almost four times higher mobility than the neat QBS semiconductor. Depth profile via secondary ion mass spectrometry and atomic force microscopy images indicate that the QBS domains in the films made from the blend are evenly distributed with a smooth morphology at the bottom of the PVN layer. Bias stress test and variable-temperature measurements on QBS-based OFETs reveal that the QBS/PVN blend semiconductor remarkably reduces the number of trap sites at the gate dielectric/semiconductor interface and the activation energy in the transistor channel. This work provides a one-step solution processing technique, which makes use of soluble ambipolar small molecules to form a thin-film semiconductor for application in high-performance OFETs.

Modeling of Gate Bias Modulation in Carbon Nanotube Field-Effect-Transistor

NASA Technical Reports Server (NTRS)

Toshishige, Yamada; Biegel, Bryan A. (Technical Monitor)

2002-01-01

The threshold voltages of a carbon-nanotube (CNT) field-effect transistor (FET) are studied. The CNT channel is so thin that there is no voltage drop perpendicular to the gate electrode plane, and this makes the device characteristics quite unique. The relation between the voltage and the electrochemical potentials, and the mass action law for electrons and holes are examined in the context of CNTs, and inversion and accumulation threshold voltages (V(sub Ti), and V(sub Ta)) are derived. V(sub Ti) of the CNTFETs has a much stronger doping dependence than that of the metal-oxide- semiconductor FETs, while V(sub Ta) of both devices depends weakly on doping with the same functional form.

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

PubMed Central

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L.; Banyai, Douglas; Savaikar, Madhusudan A.; Jaszczak, John A.; Yap, Yoke Khin

2016-01-01

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (in-situ STM-TEM). As suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending. PMID:26846587

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

DOE PAGES

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; ...

2016-02-05

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under variousmore » bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.« less

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under variousmore » bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (insitu STM-TEM). Ultimately, as suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.« less

New Flexible Channels for Room Temperature Tunneling Field Effect Transistors.

PubMed

Hao, Boyi; Asthana, Anjana; Hazaveh, Paniz Khanmohammadi; Bergstrom, Paul L; Banyai, Douglas; Savaikar, Madhusudan A; Jaszczak, John A; Yap, Yoke Khin

2016-02-05

Tunneling field effect transistors (TFETs) have been proposed to overcome the fundamental issues of Si based transistors, such as short channel effect, finite leakage current, and high contact resistance. Unfortunately, most if not all TFETs are operational only at cryogenic temperatures. Here we report that iron (Fe) quantum dots functionalized boron nitride nanotubes (QDs-BNNTs) can be used as the flexible tunneling channels of TFETs at room temperatures. The electrical insulating BNNTs are used as the one-dimensional (1D) substrates to confine the uniform formation of Fe QDs on their surface as the flexible tunneling channel. Consistent semiconductor-like transport behaviors under various bending conditions are detected by scanning tunneling spectroscopy in a transmission electron microscopy system (in-situ STM-TEM). As suggested by computer simulation, the uniform distribution of Fe QDs enable an averaging effect on the possible electron tunneling pathways, which is responsible for the consistent transport properties that are not sensitive to bending.

Cross-plane electrical and thermal transport in oxide metal/semiconductor superlattices

NASA Astrophysics Data System (ADS)

Jha, Pankaj

Perovskite oxides display a rich variety of electronic properties as metals, ferroelectrics, ferromagnetics, multiferroics, and thermoelectrics. Cross-plane electron filtering transport in metal/semiconductor superlattices provides a potential approach to increase the thermoelectric figure of merit (ZT). La0.67Sr0.33MnO3 (LSMO) and LaMnO3 (LMO) thin-film depositions were optimized using pulsed laser deposition (PLD) to achieve low resistivity constituent materials for LSMO/LMO superlattice heterostructures on (100)-strontium titanate (STO) substrates. X-ray diffraction and high-resolution reciprocal space mapping (RSM) indicate that the superlattices are epitaxial and pseudomorphic. Cross-plane devices were fabricated by etching cylindrical pillar structures in superlattices using inductively-coupled-plasma reactive-ion etching. The cross-plane electrical conductivity data for LSMO/LMO superlattices reveal an effective barrier height of 220 meV. The cross-plane LSMO/LMO superlattices showed a giant Seebeck coefficient of 2560 microV/K at 300K that increases to 16640 microV/K at 360K. The large Seebeck coefficient may arise due to hot electron and spin filtering as LSMO/LMO superlattice constituent materials exhibit spintronic properties where charges and spin current are intertwined and can generate a spin-Seebeck effect. The room temperature thermal conductivity achieved in low resistivity superlattices was 0.92 W/mK, which indicates that cross-plane phonon scattering at interfaces reduces the lattice contribution to the thermal conductivity. The giant contribution of spin-Seebeck, the large temperature dependence of the cross-plane power factor, and the low thermal conductivity in low resistance LSMO/LMO superlattices may offer opportunities to realize spin-magnetic thermoelectric devices, and suggests a direction for further investigations of the potential of LSMO/LMO oxide superlattices for thermoelectric devices.

Use of a bilayer lattice-matched AlInGaN barrier for improving the channel carrier confinement of enhancement-mode AlInGaN/GaN hetero-structure field-effect transistors

NASA Astrophysics Data System (ADS)

Rahbardar Mojaver, Hassan; Gosselin, Jean-Lou; Valizadeh, Pouya

2017-06-01

A quaternary lattice-matched layer structure based on employing a bilayer barrier for improving the carrier confinement in the channel of enhancement-mode metal-face c-plane wurtzite AlInGaN/GaN hetero-structure field effect transistors (HFETs) is for the first time proposed. Using the commercial self-consistent Poisson-Schrödinger solver Nextnano, electronic properties of the proposed hetero-structure, including the sheet charge density and carrier confinement on the GaN side of the hetero-interface, are evaluated. Based on these evaluations, it is shown that while the proposed layer structure substantially improves the carrier confinement in the GaN channel layer, it also upholds the merits of employing a lattice-matched barrier towards achieving an enhancement-mode operation (i.e., in the absence of the piezoelectric effect). According to these simulations, in terms of maintaining the required positive threshold-voltage for the enhancement-mode operation, it is also shown that the proposed layer structure substantially outperforms the quaternary AlInGaN/GaN HFETs employing a thin AlN spacer layer.

Neutron and gamma irradiation effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high-power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Neutron and gamma irradiation effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

A silicon-on-insulator complementary-metal-oxide-semiconductor compatible flexible electronics technology

NASA Astrophysics Data System (ADS)

Tu, Hongen; Xu, Yong

2012-07-01

This paper reports a simple flexible electronics technology that is compatible with silicon-on-insulator (SOI) complementary-metal-oxide-semiconductor (CMOS) processes. Compared with existing technologies such as direct fabrication on flexible substrates and transfer printing, the main advantage of this technology is its post-SOI-CMOS compatibility. Consequently, high-performance and high-density CMOS circuits can be first fabricated on SOI wafers using commercial foundry and then be integrated into flexible substrates. The yield is also improved by eliminating the transfer printing step. Furthermore, this technology allows the integration of various sensors and microfluidic devices. To prove the concept of this technology, flexible MOSFETs have been demonstrated.

Metal mobilisation in hydrothermal sediments at the TAG Hydrothermal Field (MAR, 26°N)

NASA Astrophysics Data System (ADS)

Dutrieux, A. M.; Lichtschlag, A.; Martins, S.; Barriga, F. J.; Petersen, S.; Murton, B. J.

2017-12-01

Metalliferous sediments in the vicinity of hydrothermal systems are enriched in base metals, but few studies have addressed their potential as mineral resources. These metalliferous sediments have been accumulated by different processes and reflect modifications of the primary mineral deposits by: oxidation of the chimney materials, in situ precipitation of low-temperature minerals and mass wasting. To understand the post-formation processes in metalliferous sediments, we investigated sub-seafloor metal mobilisation in different geological environments. This presentation focuses on the TAG Hydrothermal Field (Mid-Atlantic Ridge, 26°N) and explores sediment and pore water compositions using ICP-MS and ICP-OES. We use reactive transport modelling to interpret the degree of metal remobilisation and to identify the most important geochemical reactions in the different sediments. The pore water concentrations measured in sediments above inactive sulphide mounds present constant major elements composition that indicates this environment is dominated by complete exchange with seawater. The sediments, that are mainly composed of hematite and goethite formed during the oxidation of sulphides, have low Cu concentrations (< 0.1%) and the main part of their primary Cu and Zn content has likely been mobilized. Cu concentrations increase at the edges of the mounds (up to wt. 20%) or in distal depositionary channels (up to wt.10%) where sulphide minerals (e.g. pyrite, chalcopyrite and sphalerite) are still present in the sediments and capped by more recent sediment slumping. In the depositionary channels, pore waters show metal concentrations affected by diagenesis and redox-sensitive metals are released at depth (e.g. Mn2+ and Cu2+). The leaching of the primary sulphides (e.g. deprecated grains of chalcopyrite), and metal mobilisation lead to an enrichment of Cu and Zn at shallower depth. Here, some stratigraphic horizons scavenge metallic cations back into solid phases and

Low-threshold voltage ultraviolet light-emitting diodes based on (Al,Ga)N metal-insulator-semiconductor structures

NASA Astrophysics Data System (ADS)

Liang, Yu-Han; Towe, Elias

2017-12-01

Al-rich III-nitride-based deep-ultraviolet (UV) (275-320 nm) light-emitting diodes are plagued with a low emission efficiency and high turn-on voltages. We report Al-rich (Al,Ga)N metal-insulator-semiconductor UV light-emitting Schottky diodes with low turn-on voltages of <3 V, which are about half those of typical (Al,Ga)N p-i-n diodes. Our devices use a thin AlN film as the insulator and an n-type Al0.58Ga0.42N film as the semiconductor. To improve the efficiency, we inserted a GaN quantum-well structure between the AlN insulator and the n-type Al x Ga1- x N semiconductor. The benefits of the quantum-well structure include the potential to tune the emission wavelength and the capability to confine carriers for more efficient radiative recombination.

Metal-Insulator-Semiconductor Photodetectors

PubMed Central

Lin, Chu-Hsuan; Liu, Chee Wee

2010-01-01

The major radiation of the Sun can be roughly divided into three regions: ultraviolet, visible, and infrared light. Detection in these three regions is important to human beings. The metal-insulator-semiconductor photodetector, with a simpler process than the pn-junction photodetector and a lower dark current than the MSM photodetector, has been developed for light detection in these three regions. Ideal UV photodetectors with high UV-to-visible rejection ratio could be demonstrated with III–V metal-insulator-semiconductor UV photodetectors. The visible-light detection and near-infrared optical communications have been implemented with Si and Ge metal-insulator-semiconductor photodetectors. For mid- and long-wavelength infrared detection, metal-insulator-semiconductor SiGe/Si quantum dot infrared photodetectors have been developed, and the detection spectrum covers atmospheric transmission windows. PMID:22163382

InxGa1-xSb Channel p-Metal-Oxide-Semiconductor Field Effect Transistors: Effect of Strain and Heterostructure Design

DTIC Science & Technology

2011-07-06

biaxial compressive strain is known to split the light- and heavy-hole bands, reducing the interband scattering and causing the light hole band to move up...and heterostructure design are presented. In Section V, we use temperature- dependent measurements and pulsed I-V measurements to analyze the results...minimal in our devices. The temperature dependence of hole mobility was stud- ied for both the surface and buried channel devices, as plot- ted in Fig

Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

PubMed

Kim, Sung Yoon; Seo, Jae Hwa; Yoon, Young Jun; Lee, Ho-Young; Lee, Seong Min; Cho, Seongjae; Kang, In Man

2015-10-01

In this work, we design and analyze complementary metal-oxide-semiconductor (CMOS)-compatible III-V compound electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) by using two-dimensional (2D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET exploits a bias-induced band-to-band tunneling (BTBT) across the electron-hole bilayer by an electric field from the top and bottom gates. This is in contrast to conventional planar p(+)-p(-)-n TFETs, which utilize BTBT across the source-to-channel junction. We applied III-V compound semiconductor materials to the EHB TFETs in order to enhance the current drivability and switching performance. Devices based on various compound semiconductor materials have been designed and analyzed in terms of their primary DC characteristics. In addition, the operational principles were validated by close examination of the electron concentrations and energy-band diagrams under various operation conditions. The simulation results of the optimally designed In0.533Ga0.47As EHB TFET show outstanding performance, with an on-state current (Ion) of 249.5 μA/μm, subthreshold swing (S) of 11.4 mV/dec, and threshold voltage (Vth) of 50 mV at VDS = 0.5 V. Based on the DC-optimized InGaAs EHB TFET, the CMOS inverter circuit was simulated in views of static and dynamic behaviors of the p-channel device with exchanges between top and bottom gates or between source and drain electrodes maintaining the device structure.

In0.15Ga0.85N visible-light metal-semiconductor-metal photodetector with GaN interlayers deposited by pulsed NH3

NASA Astrophysics Data System (ADS)

Wang, Hongxia; Zhang, Xiaohan; Wang, Hailong; Lv, Zesheng; Li, Yongxian; Li, Bin; Yan, Huan; Qiu, Xinjia; Jiang, Hao

2018-05-01

InGaN visible-light metal-semiconductor-metal photodetectors with GaN interlayers deposited by pulsed NH3 were fabricated and characterized. By periodically inserting the GaN thin interlayers, the surface morphology of InGaN active layer is improved and the phase separation is suppressed. At 5 V bias, the dark current reduced from 7.0 × 10-11 A to 7.0 × 10-13 A by inserting the interlayers. A peak responsivity of 85.0 mA/W was measured at 420 nm and 5 V bias, corresponding to an external quantum efficiency of 25.1%. The insertion of GaN interlayers also lead to a sharper spectral response cutoff.

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

PubMed Central

Rossi, Alessandro; Tanttu, Tuomo; Hudson, Fay E.; Sun, Yuxin; Möttönen, Mikko; Dzurak, Andrew S.

2015-01-01

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization. PMID:26067215

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

NASA Technical Reports Server (NTRS)

Schwarze, G. E.; Frasca, A. J.

1991-01-01

The effects of neutron and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10(exp 13) n/sq cm and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are presented. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

Graphene-based half-metal and spin-semiconductor for spintronic applications.

PubMed

Qi, Jingshan; Chen, Xiaofang; Hu, Kaige; Feng, Ji

2016-03-31

In this letter we propose a strategy to make graphene become a half-metal or spin-semiconductor by combining the magnetic proximity effects and sublattice symmetry breaking in graphone/graphene and graphone/graphene/BN heterostructures. Exchange interactions lift the spin degeneracy and sublattice symmetry breaking opens a band gap in graphene. More interestingly, the gap opening depends on the spin direction and the competition between the sublattice asymmetry and exchange field determines the system is a half-metal or a spin-semiconductor. By first-principles calculations and a low-energy effective model analysis, we elucidate the underlying physical mechanism of spin-dependent gap opening and spin degeneracy splitting. This offers an alternative practical platform for graphene-based spintronics.

Hall effect mobility for SiC MOSFETs with increasing dose of nitrogen implantation into channel region

NASA Astrophysics Data System (ADS)

Noguchi, Munetaka; Iwamatsu, Toshiaki; Amishiro, Hiroyuki; Watanabe, Hiroshi; Kita, Koji; Yamakawa, Satoshi

2018-04-01

The Hall effect mobility (μHall) of the Si-face 4H-SiC metal–oxide–semiconductor field effect transistor (MOSFET) with a nitrogen (N)-implanted channel region was investigated by increasing the N dose. The μHall in the channel region was systematically examined regarding channel structures, that is, the surface and buried channels. It was experimentally demonstrated that increasing the N dose results in an improvement in μHall in the channel region due to the formation of the buried channel. However, further increase in N dose was found to decrease the μHall in the channel region, owing to the decrease in the electron mobility in the N-implanted bulk region.

Study of SiO2-Si and metal-oxide-semiconductor structures using positrons

NASA Astrophysics Data System (ADS)

Leung, T. C.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K. G.

1993-01-01

Studies of SiO2-Si and metal-oxide-semiconductor (MOS) structures using positrons are summarized and a concise picture of the present understanding of positrons in these systems is provided. Positron annihilation line-shape S data are presented as a function of the positron incident energy, gate voltage, and annealing, and are described with a diffusion-annihilation equation for positrons. The data are compared with electrical measurements. Distinct annihilation characteristics were observed at the SiO2-Si interface and have been studied as a function of bias voltage and annealing conditions. The shift of the centroid (peak) of γ-ray energy distributions in the depletion region of the MOS structures was studied as a function of positron energy and gate voltage, and the shifts are explained by the corresponding variations in the strength of the electric field and thickness of the depletion layer. The potential role of the positron annihilation technique as a noncontact, nondestructive, and depth-sensitive characterization tool for the technologically important, deeply buried interface is shown.

Real-time photoelectron spectroscopy study of the oxidation reaction kinetics on p-type and n-type Si (001) surfaces

NASA Astrophysics Data System (ADS)

Yu, Zhou

Silicon oxides thermally grown on Si surface are the core gate materials of metal-oxide-semiconductor field effect transistor (MOSFET). This thin oxide layer insulates the gate terminals and the transistors substrate which make MOSFET has certain advantages over those conventional junctions, such as field-effect transistor (FET) and junction field effect transistor (JFET). With an oxide insulating layer, MOSFET is able to sustain higher input impedance and the corresponding gate leakage current can be minimized. Today, though the oxidation process on Si substrate is popular in industry, there are still some uncertainties about its oxidation kinetics. On a path to clarify and modeling the oxidation kinetics, a study of initial oxidation kinetics on Si (001) surface has attracted attentions due to having a relatively low surface electron density and few adsorption channels compared with other Si surface direction. Based on previous studies, there are two oxidation models of Si (001) that extensively accepted, which are dual oxide species mode and autocatalytic reaction model. These models suggest the oxidation kinetics on Si (001) mainly relies on the metastable oxygen atom on the surface and the kinetic is temperature dependent. Professor Yuji Takakuwa's group, Surface Physics laboratory, Institute of Multidisciplinary Research for Advanced Materials, Tohoku University, observed surface strain existed during the oxidation kinetics on Si (001) and this is the first time that strain was discovered during Si oxidation. Therefore, it is necessary to explain where the strain comes from since none of previous model research included the surface strain (defects generation) into considerations. Moreover, recent developing of complementary metal-oxide-semiconductor (CMOS) requires a simultaneous oxidation process on p- and n-type Si substrate. However, none of those previous models included the dopant factor into the oxidation kinetic modeling. All of these points that

Organic-inorganic hybrid materials as semiconducting channels in thin-film field-effect transistors

PubMed

Kagan; Mitzi; Dimitrakopoulos

1999-10-29

Organic-inorganic hybrid materials promise both the superior carrier mobility of inorganic semiconductors and the processability of organic materials. A thin-film field-effect transistor having an organic-inorganic hybrid material as the semiconducting channel was demonstrated. Hybrids based on the perovskite structure crystallize from solution to form oriented molecular-scale composites of alternating organic and inorganic sheets. Spin-coated thin films of the semiconducting perovskite (C(6)H(5)C(2)H(4)NH(3))(2)SnI(4) form the conducting channel, with field-effect mobilities of 0.6 square centimeters per volt-second and current modulation greater than 10(4). Molecular engineering of the organic and inorganic components of the hybrids is expected to further improve device performance for low-cost thin-film transistors.

Influence of cation choice on magnetic behavior of III-N dilute magnetic semiconductors

NASA Astrophysics Data System (ADS)

Frazier, Rachel Marian

With the increasing interest in spintronics, many attempts have been made at incorporating spin-based functionality into existing semiconductor technology. One approach, utilizing dilute magnetic semiconductors (DMS) formed via introduction of transition metal ions into III-Nitride hosts, would allow for integration of spin based phenomena into current wide bandgap device technology. To accomplish such device structures, it is necessary to achieve single phase transition metal doped GaN and AlN which exhibit room temperature magnetic behavior. Ion implantation is an effective survey method for introduction of various transition metals into AlN. In ion implanted AlN, the Co and Cr doped films showed hysteresis at 300K while the Mn doped material did not. However, it is not a technique which will allow for the development of advanced spin based devices. Such devices will require epitaxial methods of the sort currently used for synthesis of III-Nitride optoelectronics. One such technique, Gas Source Molecular Beam Epitaxy (GSMBE), has been used to synthesize AlN films doped with Cr and Mn. Room temperature ferromagnetism has been observed for AlMnN and AlCrN grown by GSMBE. In both cases, the magnetic signal was found to depend on the flux of the dopant. The magnetization of the AlCrN was found to be an order of magnitude greater than in the AlMnN. The temperature dependent magnetic behavior of AlCrN was also superior to AlMnN; however, the AlCrN was not resistant to thermal degradation. An all-semiconductor tunneling magnetoresistive device (TMR) was grown with GaMnN as a spin injector and AlMnN as a spin filter. The resistance of the device should change with applied magnetic field depending on the magnetization of the injector and filter. However, due to the impurity bands found in the AlMnN, the resistance was found to change very little with magnetic field. To overcome such obstacles as found in the transition metal doped AlN, another dopant must be used. One

Interface Trap Profiles in 4H- and 6H-SiC MOS Capacitors with Nitrogen- and Phosphorus-Doped Gate Oxides

NASA Astrophysics Data System (ADS)

Jiao, C.; Ahyi, A. C.; Dhar, S.; Morisette, D.; Myers-Ward, R.

2017-04-01

We report results on the interface trap density ( D it) of 4H- and 6H-SiC metal-oxide-semiconductor (MOS) capacitors with different interface chemistries. In addition to pure dry oxidation, we studied interfaces formed by annealing thermal oxides in NO or POCl3. The D it profiles, determined by the C- ψ s method, show that, although the as-oxidized 4H-SiC/SiO2 interface has a much higher D it profile than 6H-SiC/SiO2, after postoxidation annealing (POA), both polytypes maintain comparable D it near the conduction band edge for the gate oxides incorporated with nitrogen or phosphorus. Unlike most conventional C- V- or G- ω-based methods, the C- ψ s method is not limited by the maximum probe frequency, therefore taking into account the "fast traps" detected in previous work on 4H-SiC. The results indicate that such fast traps exist near the band edge of 6H-SiC also. For both polytypes, we show that the total interface trap density ( N it) integrated from the C- ψ s method is several times that obtained from the high-low method. The results suggest that the detected fast traps have a detrimental effect on electron transport in metal-oxide-semiconductor field-effect transistor (MOSFET) channels.

X-ray Characterization of Oxide-based Magnetic Semiconductors

NASA Astrophysics Data System (ADS)

Idzerda, Yves

2008-05-01

Although the evidence for magnetic semiconductors (not simply semiconductors which are ferromagnetic) is compelling, there is much uncertainty in the mechanism for the polarization of the carriers, suggesting that it must be quite novel. Recent experimental evidence suggests that this mechanism is similar to the polaron percolation theory proposed by Kaminski and Das Sarma,ootnotetextKaminski and S. Das Sarma, Physical Review Letters 88, 247202 (2002). which was recently applied specifically to doped oxides by Coey et al.ootnotetextJ. M. D. Coey, M. Venkatesan, and C. B. Fitzgerald, Nature Materials 4, 173 (2005). where the ferromagnetism is driven by the percolation of polarons generated by defects or dopants. We have used X-ray absorption spectroscopy at the L-edges and K-edges for low concentrations transition metal (TM) doped magnetic oxides (including TiO2, La1-xSrxO3, HfO2, and In2O3). We have found that in most cases, the transition metal assumes a valence consistent with being at a substitutional, and not interstitial site. We have also measured the X-ray Magnetic Circular Dichroism spectra. Although these materials show strong bulk magnetization, we are unable to detect a robust dichroism feature associated with magnetic elements in the host semiconductor. In the cases where a dichroism signal was observed, it was very weak and could be ascribed to a distinct ferromagnetic phase (TM metal cluster, TM oxide particulate, etc.) separate from the host material. This fascinating absence of a dichroic signal and its significant substantiation of important features of the polaron percolation model may help to finally resolve the issue of ferromagnetism in magnetically doped oxides.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET

PubMed Central

2012-01-01

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency. PMID:22901374

Effects of local field and inherent strain in reflectance anisotropy spectra of AIIIBV semiconductors with naturally oxidized surfaces

NASA Astrophysics Data System (ADS)

Berkovits, V. L.; Kosobukin, V. A.; Gordeeva, A. B.

2015-12-01

Reflectance anisotropy (RA) spectra of naturally oxidized (001) surfaces of GaAs and InAs crystals are measured for photon energies from 1.5 up to 5.5 eV. The differential high-accuracy RA spectra reveal features substantially different from those caused by either a reconstruction of clean surface or a built-in near-surface electric field. Models of atomic structure with anisotropic transition layers of excess arsenic atoms specific for GaAs(001)/oxide and InAs(001)/oxide interfaces are proposed. In conformity with these models, a general theory of reflectance anisotropy is developed for semiconductor/oxide interfaces within the Green's function technique. The theory takes into account the combined effect of local field due to interface dipoles and of intrinsic near-surface strain of the crystal. Measured RA spectra are analyzed in the model of valence-bond dipoles occupying a rectangular lattice in a multilayer medium. Comparing the measured and calculated spectra, we conclude that RA spectra of oxidized GaAs(001) and InAs(001) surfaces are simultaneously influenced by interface and near-surface anisotropies. The former is responsible for the broad-band spectral features which are associated with polarizability of the valence bonds attached to As atoms at the crystal/oxide interface. The near-surface anisotropy is due to inherent uniaxial straining the near-surface region of crystal. The effect of strain on RA spectra is experimentally and theoretically substantiated for GaAs crystal wafers undergone a uniaxial applied stress. Basically, this work results in the following. It establishes the physical nature of different levels of RA spectra observed in a majority of papers, but never analyzed. It demonstrates how the studied features of RA spectra could be applied for optical characterization of strained interfaces and atomic layers.

High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

PubMed

Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

2015-08-12

Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

Latest progress in gallium-oxide electronic devices

NASA Astrophysics Data System (ADS)

Higashiwaki, Masataka; Wong, Man Hoi; Konishi, Keita; Nakata, Yoshiaki; Lin, Chia-Hung; Kamimura, Takafumi; Ravikiran, Lingaparthi; Sasaki, Kohei; Goto, Ken; Takeyama, Akinori; Makino, Takahiro; Ohshima, Takeshi; Kuramata, Akito; Yamakoshi, Shigenobu; Murakami, Hisashi; Kumagai, Yoshinao

2018-02-01

Gallium oxide (Ga2O3) has emerged as a new competitor to SiC and GaN in the race toward next-generation power switching and harsh environment electronics by virtue of the excellent material properties and the relative ease of mass wafer production. In this proceedings paper, an overview of our recent development progress of Ga2O3 metal-oxide-semiconductor field-effect transistors and Schottky barrier diodes will be reported.

All oxide semiconductor-based bidirectional vertical p-n-p selectors for 3D stackable crossbar-array electronics

PubMed Central

Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo

2015-01-01

Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565

Fabrication of smooth patterned structures of refractory metals, semiconductors, and oxides via template stripping.

PubMed

Park, Jong Hyuk; Nagpal, Prashant; McPeak, Kevin M; Lindquist, Nathan C; Oh, Sang-Hyun; Norris, David J

2013-10-09

The template-stripping method can yield smooth patterned films without surface contamination. However, the process is typically limited to coinage metals such as silver and gold because other materials cannot be readily stripped from silicon templates due to strong adhesion. Herein, we report a more general template-stripping method that is applicable to a larger variety of materials, including refractory metals, semiconductors, and oxides. To address the adhesion issue, we introduce a thin gold layer between the template and the deposited materials. After peeling off the combined film from the template, the gold layer can be selectively removed via wet etching to reveal a smooth patterned structure of the desired material. Further, we demonstrate template-stripped multilayer structures that have potential applications for photovoltaics and solar absorbers. An entire patterned device, which can include a transparent conductor, semiconductor absorber, and back contact, can be fabricated. Since our approach can also produce many copies of the patterned structure with high fidelity by reusing the template, a low-cost and high-throughput process in micro- and nanofabrication is provided that is useful for electronics, plasmonics, and nanophotonics.

Fabrication of Smooth Patterned Structures of Refractory Metals, Semiconductors, and Oxides via Template Stripping

PubMed Central

2013-01-01

The template-stripping method can yield smooth patterned films without surface contamination. However, the process is typically limited to coinage metals such as silver and gold because other materials cannot be readily stripped from silicon templates due to strong adhesion. Herein, we report a more general template-stripping method that is applicable to a larger variety of materials, including refractory metals, semiconductors, and oxides. To address the adhesion issue, we introduce a thin gold layer between the template and the deposited materials. After peeling off the combined film from the template, the gold layer can be selectively removed via wet etching to reveal a smooth patterned structure of the desired material. Further, we demonstrate template-stripped multilayer structures that have potential applications for photovoltaics and solar absorbers. An entire patterned device, which can include a transparent conductor, semiconductor absorber, and back contact, can be fabricated. Since our approach can also produce many copies of the patterned structure with high fidelity by reusing the template, a low-cost and high-throughput process in micro- and nanofabrication is provided that is useful for electronics, plasmonics, and nanophotonics. PMID:24001174

Metal oxide, Group V-VI chalcogenides and GaN/AlGaN photodetectors

NASA Astrophysics Data System (ADS)

Hasan, Md. Rezaul

In this work, a simple, low-cost and catalyst free one-step solution processing of onedimensional Sb2S3 nanostructures on polyimide substrates was done. This structure demonstrated its potential application as a photoconductor in the UV and visible regime. Using-field emission scanning electron microscopy (SEM), grazing incidence X-Ray diffraction, Raman spectra and transmission electron microscopy measurements, it was shown that the Sb 2S3 films have high crystallinity, uniform morphology and nearstoichiometric composition. Further, using tauc plot, it was found that the films have a direct bandgap of 1.67 eV. MSM photodetectors, fabricated using these films showed a clear photo response in both UV as well as visible wavelength. These devices showed UV on/off ratio as high as 160 under the light intensity of 30 mW/cm2 and a small rise time and fall time of 44 ms 28 ms respectively. The effect of geometry of metal pad and bonding wire orientation of a multi-channel FET on the coupling of THz radiation was studied. The spatial variation images were taken by raster scan with the resolution of 0.07 mm steps in both x and y directions. An effective gate bias, where the effect of noise is minimum and photoresponse is maximum, was used for imaging. By applying VGS =-2.8V and VDS =380mV, the images were taken for all different combinations of activated bonding wires and metal pads. It was observed that, effect of bonding wire orientation is negligible for the large source pad as the radiation is coupled basically between drain and gate pad. Effect of drain bonding wire on coupling depends on the maximum width or diameter of metal pad and the incoming wavelength. In this work, Position of activated Drain pad and orientation of respective bonding wire defined the image tilting angle. Voltage drop across the shorting metal between drain pads, also played a role in increasing the asymmetry by selectively exciting a certain portion of FET Channels more than the other portion

Metal-insulator-semiconductor capacitors with bismuth oxide as insulator

NASA Astrophysics Data System (ADS)

Raju, T. A.; Talwai, A. S.

1981-07-01

Metal-insulator-semiconductor capacitors using aluminum Bi2O3 and silicon have been studied for varactor applications. Reactively sputtered Bi2O3 films which under suitable proportions of oxygen and argon and had high resistivity suitable for device applications showed a dielectric constant of 25.

Enhanced two dimensional electron gas transport characteristics in Al2O3/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

NASA Astrophysics Data System (ADS)

Freedsman, J. J.; Watanabe, A.; Urayama, Y.; Egawa, T.

2015-09-01

The authors report on Al2O3/Al0.85In0.15N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al2O3 as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al2O3/Al0.85In0.15N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics.

Effects of consecutive irradiation and bias temperature stress in p-channel power vertical double-diffused metal oxide semiconductor transistors

NASA Astrophysics Data System (ADS)

Davidović, Vojkan; Danković, Danijel; Ilić, Aleksandar; Manić, Ivica; Golubović, Snežana; Djorić-Veljković, Snežana; Prijić, Zoran; Prijić, Aneta; Stojadinović, Ninoslav

2018-04-01

The mechanisms responsible for the effects of consecutive irradiation and negative bias temperature (NBT) stress in p-channel power vertical double-diffused MOS (VDMOS) transistors are presented in this paper. The investigation was performed in order to clarify the mechanisms responsible for the effects of specific kind of stress in devices previously subjected to the other kind of stress. In addition, it may help in assessing the behaviour of devices subjected to simultaneous irradiation and NBT stressing. It is shown that irradiation of previously NBT stressed devices leads to additional build-up of oxide trapped charge and interface traps, while NBT stress effects in previously irradiated devices depend on gate bias applied during irradiation and on the total dose received. In the cases of low-dose irradiation or irradiation without gate bias, the subsequent NBT stress leads to slight further device degradation. On the other hand, in the cases of devices previously irradiated to high doses or with gate bias applied during irradiation, NBT stress may have a positive role, as it actually anneals a part of radiation-induced degradation.

Generic process for preparing a crystalline oxide upon a group IV semiconductor substrate

DOEpatents

McKee, Rodney A.; Walker, Frederick J.; Chisholm, Matthew F.

2000-01-01

A process for growing a crystalline oxide epitaxially upon the surface of a Group IV semiconductor, as well as a structure constructed by the process, is described. The semiconductor can be germanium or silicon, and the crystalline oxide can generally be represented by the formula (AO).sub.n (A'BO.sub.3).sub.m in which "n" and "m" are non-negative integer repeats of planes of the alkaline earth oxides or the alkaline earth-containing perovskite oxides. With atomic level control of interfacial thermodynamics in a multicomponent semiconductor/oxide system, a highly perfect interface between a semiconductor and a crystalline oxide can be obtained.

Spin-dependent transport and current modulation in a current-in-plane spin-valve field-effect transistor

NASA Astrophysics Data System (ADS)

Kanaki, Toshiki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2016-10-01

We propose a current-in-plane spin-valve field-effect transistor (CIP-SV-FET), which is composed of a ferromagnet/nonferromagnet/ferromagnet trilayer structure and a gate electrode. This is a promising device alternative to spin metal-oxide-semiconductor field-effect transistors. Here, we fabricate a ferromagnetic-semiconductor GaMnAs-based CIP-SV-FET and demonstrate its basic operation of the resistance modulation both by the magnetization configuration and by the gate electric field. Furthermore, we present the electric-field-assisted magnetization reversal in this device.

Influence of gate width on gate-channel carrier mobility in AlGaN/GaN heterostructure field-effect transistors

NASA Astrophysics Data System (ADS)

Yang, Ming; Ji, Qizheng; Gao, Zhiliang; Zhang, Shufeng; Lin, Zhaojun; Yuan, Yafei; Song, Bo; Mei, Gaofeng; Lu, Ziwei; He, Jihao

2017-11-01

For the fabricated AlGaN/GaN heterostructure field-effect transistors (HFETs) with different gate widths, the gate-channel carrier mobility is experimentally obtained from the measured current-voltage and capacitance-voltage curves. Under each gate voltage, the mobility gets lower with gate width increasing. Analysis shows that the phenomenon results from the polarization Coulomb field (PCF) scattering, which originates from the irregularly distributed polarization charges at the AlGaN/GaN interface. The device with a larger gate width is with a larger PCF scattering potential and a stronger PCF scattering intensity. As a function of gate width, PCF scattering potential shows a same trend with the mobility variation. And the theoretically calculated mobility values fits well with the experimentally obtained values. Varying gate widths will be a new perspective for the improvement of device characteristics by modulating the gate-channel carrier mobility.

H2 evolution at Si-based metal-insulator-semiconductor photoelectrodes enhanced by inversion channel charge collection and H spillover.

PubMed

Esposito, Daniel V; Levin, Igor; Moffat, Thomas P; Talin, A Alec

2013-06-01

Photoelectrochemical (PEC) water splitting represents a promising route for renewable production of hydrogen, but trade-offs between photoelectrode stability and efficiency have greatly limited the performance of PEC devices. In this work, we employ a metal-insulator-semiconductor (MIS) photoelectrode architecture that allows for stable and efficient water splitting using narrow bandgap semiconductors. Substantial improvement in the performance of Si-based MIS photocathodes is demonstrated through a combination of a high-quality thermal SiO2 layer and the use of bilayer metal catalysts. Scanning probe techniques were used to simultaneously map the photovoltaic and catalytic properties of the MIS surface and reveal the spillover-assisted evolution of hydrogen off the SiO2 surface and lateral photovoltage driven minority carrier transport over distances that can exceed 2 cm. The latter finding is explained by the photo- and electrolyte-induced formation of an inversion channel immediately beneath the SiO2/Si interface. These findings have important implications for further development of MIS photoelectrodes and offer the possibility of highly efficient PEC water splitting.

Passivation of oxide traps and interface states in GaAs metal-oxide-semiconductor capacitor by LaTaON passivation layer and fluorine incorporation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, L. N.; Choi, H. W.; Lai, P. T., E-mail: laip@eee.hku.hk

2015-11-23

GaAs metal-oxide-semiconductor capacitor with TaYON/LaTaON gate-oxide stack and fluorine-plasma treatment is fabricated and compared with its counterparts without the LaTaON passivation interlayer or the fluorine treatment. Experimental results show that the sample exhibits better characteristics: low interface-state density (8 × 10{sup 11 }cm{sup −2}/eV), small flatband voltage (0.69 V), good capacitance-voltage behavior, small frequency dispersion, and small gate leakage current (6.35 × 10{sup −6} A/cm{sup 2} at V{sub fb} + 1 V). These should be attributed to the suppressed growth of unstable Ga and As oxides on the GaAs surface during gate-oxide annealing by the LaTaON interlayer and fluorine incorporation, and the passivating effects of fluorine atoms on the acceptor-likemore » interface and near-interface traps.« less

Modifying the catalytic and adsorption properties of metals and oxides

NASA Astrophysics Data System (ADS)

Yagodovskii, V. D.

2015-11-01

A new approach to interpreting the effect of promoters (inhibitors) of nonmetals and metals added to a host metal (catalyst) is considered. Theoretical calculations are based on a model of an actual two-dimensional electron gas and adsorbate particles. An equation is derived for the isotherm of induced adsorption on metals and semiconductors with respect to small fillings of θ ~ 0.1-0.15. The applicability of this equation is verified experimentally for metals (Ag, Pd, Cu, Fe, and Ni), graphitized ash, and semiconductor oxides Ta2O5, ZnO, and Ni. The applicability of the theoretical model of promotion is verified by the hydrogenation reaction of CO on ultradispersed nickel powder. The use of plasmachemical surface treatments of metals and oxides, accompanied by an increase in activity and variation in selectivity, are investigated based on the dehydrocyclization reactions of n-hexane and the dehydrogenation and dehydration of alcohols. It is established that such treatments for metals (Pt, Cu, Ni, and Co) raise their activity due to the growth of the number of active centers upon an increase in the activation energy. Applying XPES and XRD methods to metallic catalysts, it is shown that the rise in activity is associated with a change in their surface states (variation in the structural characteristics of metal particles and localization of certain forms of carbon in catalytically active centers). It is shown that plasmachemical treatments also alter their surface composition, surface activity, and raise their activity when used with complex phosphate oxides of the NASICON type. It is shown by the example of conversion of butanol-2 that abrupt variations in selectivity (prevalence of dehydration over dehydrogenation and vice versa) occur, depending on the type of plasma. It is concluded that plasmachemical treatments of metals and ZnO and NiO alter the isosteric heats and entropies of adsorption of isopropanol.