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Sample records for nanocrystal nonvolatile memory

  1. Nonvolatile memory devices based on self-assembled nanocrystals

    NASA Astrophysics Data System (ADS)

    Lee, Jang-Sik

    2013-06-01

    Nonvolatile memory devices are one of the most important components in modern electronic devices. Many efforts have been made to fabricate high-density, low-cost, nonvolatile solid-state memory devices for use in portable/mobile electronic devices such as laptop computers, tablet devices, smart phones, etc. Among the many available nonvolatile memory devices, flash memory devices are of great interest to the electronics industry owing to their simple device structure, enabling high-density memory applications. Flash memory devices in which nanoparticles or nanocrystals are used as the charge-trapping elements have advantages over conventional flash memory devices because the charge-trapping layer and memory performance of the former can be readily optimized. Active research has recently been conducted to fabricate and characterize self-assembled-nanocrystal-based nonvolatile memory devices. We reviewed various strategies for fabricating nanocrystal-based nonvolatile memory devices and discussed the programmable memory properties and the device reliability characteristics of nanocrystal-based memory devices to possibly apply nanocrystal-based memory devices to those used in portable/mobile electronic devices. Finally, novel device applications such as printed/flexible/transparent electronic devices were explored based on nanocrystal-based memory devices.

  2. Nonvolatile memory characteristics of nickel-silicon-nitride nanocrystal

    SciTech Connect

    Chen, W.-R.; Chang, T.-C.; Liu, P.-T.; Yeh, J.-L.; Tu, C.-H.; Lou, J.-C.; Yeh, C.-F.; Chang, C.-Y.

    2007-08-20

    The formation of nickel-silicon-nitride nanocrystals by sputtering a comixed target in the argon and nitrogen environment is proposed in this letter. High resolution transmission electron microscope analysis clearly shows the nanocrystals embedded in the silicon nitride and x-ray photoelectron spectroscopy also shows the chemical material analysis of nanocrystals. The memory window of nickel-silicon-nitride nanocrystals enough to define 1 and 0 states is obviously observed, and a good data retention characteristic to get up to 10 years is exhibited for the nonvolatile memory application.

  3. Effects of Heavy Ion Exposure on Nanocrystal Nonvolatile Memory

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Suhail, Mohammed; Kuhn, Peter; Prinz, Erwin; Kim, Hak; LaBel, Kenneth A.

    2004-01-01

    We have irradiated engineering samples of Freescale 4M nonvolatile memories with heavy ions. They use Silicon nanocrystals as the storage element, rather than the more common floating gate. The irradiations were performed using the Texas A&M University cyclotron Single Event Effects Test Facility. The chips were tested in the static mode, and in the dynamic read mode, dynamic write (program) mode, and dynamic erase mode. All the errors observed appeared to be due to single, isolated bits, even in the program and erase modes. These errors appeared to be related to the micro-dose mechanism. All the errors corresponded to the loss of electrons from a programmed cell. The underlying physical mechanisms will be discussed in more detail later. There were no errors, which could be attributed to malfunctions of the control circuits. At the highest LET used in the test (85 MeV/mg/sq cm), however, there appeared to be a failure due to gate rupture. Failure analysis is being conducted to confirm this conclusion. There was no unambiguous evidence of latchup under any test conditions. Generally, the results on the nanocrystal technology compare favorably with results on currently available commercial floating gate technology, indicating that the technology is promising for future space applications, both civilian and military.

  4. A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

    PubMed Central

    Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

    2016-01-01

    Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827

  5. Non-Volatile Flash Memory Characteristics of Tetralayer Nickel-Germanide Nanocrystals Embedded Structure.

    PubMed

    Panda, D; Panda, M

    2016-01-01

    Formation of tetralayer memory structure having nickel-germanide nanocrystals using a Ge/Ni multilayers is proposed. X-ray diffraction study shows the NiGe (002) phase formation after proper annealing. Cross sectional HRTEM clearly shows the sharpness and the size (~4-6 nm) of the stacked nanocrystals embedded in the oxide matrix. A large anti-clockwise hysteresis memory win- dow of 13.4 Volt at ± 15 Volt is observed for the optimized samples. This large memory window indicates for the MLC applications. Frequency independent C-V curve confirms about the charge storage in the nanocrystals. A good charge retention and endurance characteristics are exhibited upto 125 °C for the nonvolatile memory application. PMID:27398590

  6. Nonvolatile memory characteristics of WSi2 nanocrystals embedded in SiO2 dielectrics.

    PubMed

    Seo, Ki Bong; Lee, Dong Uk; Han, Seung Jong; Kim, Seon Pil; Kim, Eun Kyu

    2011-01-01

    A nano-floating gate capacitor with WSi2 nanocrystals embedded in SiO2 dielectrics was fabricated. The WSi2 nanocrystals were created from ultrathin WSi2 film during rapid thermal annealing process and their average size and density were about 2.5 nm and 3.59 x 10(12) cm(-2), respectively. The flat-band voltage shift due to the carrier charging effect of WSi2 nanocrystals were measured up to 5.9 V when the gate voltage sweep in the range of +/- 9 V. The memory window was decreased from 3.7 V to 1.9 V after 1 h and remained about 3.7 V after 10(5) programming/erasing cycles. These results show that there is a possibility for the WSi2 nanocrystals to be applied to nonvolatile memory devices. PMID:21446472

  7. Fabrication of nanostructure and formation of nanocrystal for non-volatile memory.

    PubMed

    Jung, Sungwook; Parm, I O; Jang, Kyung Soo; Park, Dae-Ho; Sohn, Byeong-Hyeok; Jung, Jin Chul; Zin, Wang Cheol; Choi, Suk-Ho; Dhungel, S K; Yi, J

    2006-11-01

    In this work, we have demonstrated that the nanocrystal created by combining the self-assembled block copolymer thin film with regular semiconductor processing can be applicable to non-volatile memory device with increased charge storage capacity over planar structures. Self-assembled block copolymer thin film for nanostructures with critical dimensions below photolithographic resolution limits has been used during all experiments. Nanoporous thin film from PS-b-PMMA diblock copolymer thin film with selective removal of PMMA domains was used to fabricate nanostructure and nanocrystal. We have also reported about surface morphologies and electrical properties of the nano-needle structure formed by RIE technique. The details of nanoscale pattern of the very uniform arrays using RIE are presented. We fabricated different surface structure of nanoscale using block copolymer. We also deposited Si-rich SiNx layer using ICP-CVD on the silicon surface of nanostructure. The deposited films were studied after annealing. PL studies demonstrated nanocrystal in Si-rich SiNx film on nanostructure of silicon. PMID:17252830

  8. A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

    NASA Technical Reports Server (NTRS)

    Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

    2001-01-01

    Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

  9. An upconverted photonic nonvolatile memory

    NASA Astrophysics Data System (ADS)

    Zhou, Ye; Han, Su-Ting; Chen, Xian; Wang, Feng; Tang, Yong-Bing; Roy, V. A. L.

    2014-08-01

    Conventional flash memory devices are voltage driven and found to be unsafe for confidential data storage. To ensure the security of the stored data, there is a strong demand for developing novel nonvolatile memory technology for data encryption. Here we show a photonic flash memory device, based on upconversion nanocrystals, which is light driven with a particular narrow width of wavelength in addition to voltage bias. With the help of near-infrared light, we successfully manipulate the multilevel data storage of the flash memory device. These upconverted photonic flash memory devices exhibit high ON/OFF ratio, long retention time and excellent rewritable characteristics.

  10. Oxygen plasma immersion ion implantation treatment to enhance data retention of tungsten nanocrystal nonvolatile memory

    SciTech Connect

    Wang, Jer-Chyi Chang, Wei-Cheng; Lai, Chao-Sung; Chang, Li-Chun; Ai, Chi-Fong; Tsai, Wen-Fa

    2014-03-15

    Data retention characteristics of tungsten nanocrystal (W-NC) memory devices using an oxygen plasma immersion ion implantation (PIII) treatment are investigated. With an increase of oxygen PIII bias voltage and treatment time, the capacitance–voltage hysteresis memory window is increased but the data retention characteristics become degraded. High-resolution transmission electron microscopy images show that this poor data retention is a result of plasma damage on the tunneling oxide layer, which can be prevented by lowering the bias voltage to 7 kV. In addition, by using the elevated temperature retention measurement technique, the effective charge trapping level of the WO{sub 3} film surrounding the W-NCs can be extracted. This measurement reveals that a higher oxygen PIII bias voltage and treatment time induces more shallow traps within the WO{sub 3} film, degrading the retention behavior of the W-NC memory.

  11. Superior endurance performance of nonvolatile memory devices based on discrete storage in surface-nitrided Si nanocrystals

    NASA Astrophysics Data System (ADS)

    Yu, Jie; Chen, Kunji; Ma, Zhongyuan; Zhang, Xinxin; Jiang, Xiaofan; Huang, Xinfan; Zhang, Yongxing; Wang, Lingling

    2016-01-01

    The surface-nitrided silicon nanocrystals (Si-NCs) floating gate nonvolatile memory (NVM) devices were fabricated by 0.13 μm node CMOS technology. The surface-nitrided Si-NCs were formed in-situ by low-pressure chemical vapor deposition and followed by nitridation treatment in NH3 ambient. It is found that the nitridation treatment not only enhances the control effect of gate voltage on channel carriers by passivation of the Si-NCs surface defects but also suppresses releasing of the stored carriers among the neighboring Si-NCs and leakage from Si-NCs to channel through the tunneling oxide by a silicon nitride cover layer acted as potential barrier. Consequently, the storage carriers are fully discrete in the Si-NCs, which are different from that in the conventional poly-crystal Si or SONOS floating gate NVM devices. The surface-nitrided Si-NCs NVM devices show lower subthreshold swing value of 0.13 V/decade, faster P/E speed characteristics of 1 μs at ±7 V, and good retention characteristics at room temperature. Furthermore, due to the improvement of the tunneling oxide quality by nitridation treatment, the stable memory window of 1.7 V has been kept after 107 P/E cycles, showing superior endurance characteristics with the good retention characteristics. Our fabrication of surface-nitrided Si-NCs floating gate NVM is compatible with the standard CMOS technology, which may be employed in the 3-D NAND technology to further improve the device performance.

  12. Nonvolatile Memory Technology for Space Applications

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

    2010-01-01

    This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

  13. Controlled fabrication of Si nanocrystal delta-layers in thin SiO{sub 2} layers by plasma immersion ion implantation for nonvolatile memories

    SciTech Connect

    Bonafos, C.; Ben-Assayag, G.; Groenen, J.; Carrada, M.; Spiegel, Y.; Torregrosa, F.; Normand, P.; Dimitrakis, P.; Kapetanakis, E.; Sahu, B. S.; Slaoui, A.

    2013-12-16

    Plasma Immersion Ion Implantation (PIII) is a promising alternative to beam line implantation to produce a single layer of nanocrystals (NCs) in the gate insulator of metal-oxide semiconductor devices. We report herein the fabrication of two-dimensional Si-NCs arrays in thin SiO{sub 2} films using PIII and rapid thermal annealing. The effect of plasma and implantation conditions on the structural properties of the NC layers is examined by transmission electron microscopy. A fine tuning of the NCs characteristics is possible by optimizing the oxide thickness, implantation energy, and dose. Electrical characterization revealed that the PIII-produced-Si NC structures are appealing for nonvolatile memories.

  14. Nonvolatile Analog Memory

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C. (Inventor)

    2007-01-01

    A nonvolatile analog memory uses pairs of ferroelectric field effect transistors (FFETs). Each pair is defined by a first FFET and a second FFET. When an analog value is to be stored in one of the pairs, the first FFET has a saturation voltage applied thereto, and the second FFET has a storage voltage applied thereto that is indicative of the analog value. The saturation and storage voltages decay over time in accordance with a known decay function that is used to recover the original analog value when the pair of FFETs is read.

  15. Investigation of charge trapping mechanism for nanocrystal-based organic nonvolatile floating gate memory devices by band structure analysis

    NASA Astrophysics Data System (ADS)

    Lee, Dong-Hoon; Lim, Ki-Tae; Park, Eung-Kyu; Shin, Ha-Chul; Kim, Chung Soo; Park, Kee-Chan; Ahn, Joung-Real; Bang, Jin Ho; Kim, Yong-Sang

    2016-05-01

    This paper investigates the charge trapping mechanism and electrical performance of CdSe nanocrystals, such as nanoparticles and nanowires in organic floating gate memory devices. Despite of same chemical component, each nanocrystals show different electrical performances with distinct trapping mechanism. CdSe nanoparticles trap holes in the memory device; on the contrary, nanowires trap electrons. This phenomenon is mainly due to the difference of energy band structures between nanoparticles and nanowires, measured by the ultraviolet photoelectron spectroscopy. Also, we investigated the memory performance with C- V characteristics, charging and discharging phenomena, and retention time. The nanoparticle based hole trapping memory device has large memory window while the nanowire based electron trapping memory shows a narrow memory window. In spite of narrow memory window, the nanowire based memory device shows better retention performance of about 55% of the charge even after 104 sec of charging. The contrasting performance of nanoparticle and nanowire is attributed to the difference in their energy band and the morphology of thin layer in the device. [Figure not available: see fulltext.

  16. Silicon Nanocrystal Nonvolatile Memories

    NASA Astrophysics Data System (ADS)

    Muralidhar, R.; Sadd, M. A.; White, B. E.

    In 1959, physicist Richard Feynman delivered his "There's Plenty of Room Left at the Bottom" lecture [1] to the American Physical Society that spawned the field of nanotechnology. In that lecture, Feynman discussed two themes that are critical to the work presented here. The first was the recognition of the tremendous opportunities associated with the ability to miniaturize computers. At the time of his lecture, the most powerful computers consumed entire rooms, and Feynman realized the tremendous gains that could be realized in performance if the technology could be reduced to the size of one's thumbnail. The second important area Feynman touched on was the unique opportunities that surround the manipulation of matter at the atomic level to create materials with unique and, hopefully, useful properties. Both of these ideas have now been realized as evidenced by the exponential growth of the semiconductor industry over the last 40 years and the tremendous explosion in nanotechnology research, development, and product introduction over the last decade

  17. Nonvolatile random access memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor)

    1994-01-01

    A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a 0 or 1 state. The element remains in the 0 or 1 state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

  18. CF{sub 4} plasma treatment on nanostructure band engineered Gd{sub 2}O{sub 3}-nanocrystal nonvolatile memory

    SciTech Connect

    Wang, Jer-Chyi; Lin, Chih-Ting

    2011-03-15

    The effects of CF{sub 4} plasma treatment on Gd{sub 2}O{sub 3} nanocrystal (NC) memory were investigated. For material analysis, secondary ion mass spectrometry and x-ray photoelectron spectroscopy analyses were performed to characterize the fluorine depth profile of the Gd{sub 2}O{sub 3}-NC film. In addition, an UV-visible spectrophotometer was used to obtain the Gd{sub 2}O{sub 3} bandgap and analyzed to suggest the modified structure of the energy band. Moreover, the electrical properties, including the memory window, program/erase speed, charge retention, and endurance characteristics were significantly improved depending on the CF{sub 4} plasma treatment conditions. This can be explained by the physical model based on the built-in electric field in the Gd{sub 2}O{sub 3} nanostructure. However, it was observed that too much CF{sub 4} plasma caused large surface roughness induced by the plasma damage, leading to characteristics degradation. It was concluded that with suitable CF{sub 4} plasma treatment, this Gd{sub 2}O{sub 3}-NC memory can be applied to future nonvolatile memory applications.

  19. Light-bias coupling erase process for non-volatile zinc tin oxide TFT memory with a nickel nanocrystals charge trap layer

    NASA Astrophysics Data System (ADS)

    Li, Jeng-Ting; Liu, Li-Chih; Ke, Po-Hsien; Chen, Jen-Sue; Jeng, Jiann-Shing

    2016-03-01

    A nonvolatile charge trapping memory is demonstrated on a thin film transistor (TFT) using a solution processed ultra-thin (~7 nm) zinc tin oxide (ZTO) semiconductor layer with an Al2O3/Ni-nanocrystals (NCs)/SiO2 dielectric stack. A positive threshold voltage (V TH) shift of 7 V is achieved at gate programming voltage of 40 V for 1 s but the state will not be erased by applying negative gate voltage. However, the programmed V TH shift can be expediently erased by applying a gate voltage of  -10 V in conjunction with visible light illumination for 1 s. It is found that the sub-threshold swing (SS) deteriorates slightly under light illumination, indicating that photo-ionized oxygen vacancies (V\\text{o}+ and/or V\\text{o}++ ) are trapped at the interface between Al2O3 and ZTO, which assists the capture of electrons discharged from the Ni NCs charge trapping layer. The light-bias coupling action and the role of ultra-thin ZTO thickness are discussed to elucidate the efficient erasing mechanism.

  20. Analog Nonvolatile Computer Memory Circuits

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd

    2007-01-01

    In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value

  1. Securing non-volatile memory regions

    SciTech Connect

    Faraboschi, Paolo; Ranganathan, Parthasarathy; Muralimanohar, Naveen

    2013-08-20

    Methods, apparatus and articles of manufacture to secure non-volatile memory regions are disclosed. An example method disclosed herein comprises associating a first key pair and a second key pair different than the first key pair with a process, using the first key pair to secure a first region of a non-volatile memory for the process, and using the second key pair to secure a second region of the non-volatile memory for the same process, the second region being different than the first region.

  2. 2K nonvolatile shadow RAM and 265K EEPROM SONOS nonvolatile memory development

    SciTech Connect

    Nasby, R.D.; Murray, J.R.; Habermehl, S.D.; Bennett, R.S.; Tafoya-Porras, B.C.; Mahl, P.R.; Rodriguez, J.L.; Jones, R.V.; Knoll, M.G.

    1998-07-01

    This paper describes Silicon Oxide Nitride Oxide Semiconductor (SONOS) nonvolatile memory development at Sandia National Laboratories. A 256K EEPROM nonvolatile memory and a 2K nonvolatile shadow RAM are under development using an n-channel SONOS memory technology. The technology has 1.2 {micro}m minimum features in a twin well design using shallow trench isolation.

  3. Non-volatile memory for checkpoint storage

    SciTech Connect

    Blumrich, Matthias A.; Chen, Dong; Cipolla, Thomas M.; Coteus, Paul W.; Gara, Alan; Heidelberger, Philip; Jeanson, Mark J.; Kopcsay, Gerard V.; Ohmacht, Martin; Takken, Todd E.

    2014-07-22

    A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, the non-volatile memory is a pluggable flash memory card.

  4. Nonvolatile Rad-Hard Holographic Memory

    NASA Technical Reports Server (NTRS)

    Chao, Tien-Hsin; Zhou, Han-Ying; Reyes, George; Dragoi, Danut; Hanna, Jay

    2001-01-01

    We are investigating a nonvolatile radiation-hardened (rad-hard) holographic memory technology. Recently, a compact holographic data storage (CHDS) breadboard utilizing an innovative electro-optic scanner has been built and demonstrated for high-speed holographic data storage and retrieval. The successful integration of this holographic memory breadboard has paved the way for follow-on radiation resistance test of the photorefractive (PR) crystal, Fe:LiNbO3. We have also started the investigation of using two-photon PR crystals that are doubly doped with atoms of iron group (Ti, Cr, Mn, Cu) and of rare-earth group (Nd, Tb) for nonvolatile holographic recordings.

  5. Overview of emerging nonvolatile memory technologies

    PubMed Central

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

  6. Overview of emerging nonvolatile memory technologies.

    PubMed

    Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

  7. SONOS Nonvolatile Memory Cell Programming Characteristics

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2010-01-01

    Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

  8. Black phosphorus nonvolatile transistor memory.

    PubMed

    Lee, Dain; Choi, Yongsuk; Hwang, Euyheon; Kang, Moon Sung; Lee, Seungwoo; Cho, Jeong Ho

    2016-04-28

    We demonstrated nanofloating gate transistor memory devices (NFGTMs) using mechanically-exfoliated few-layered black phosphorus (BP) channels and gold nanoparticle (AuNPs) charge trapping layers. The resulting BP-NFGTMs exhibited excellent memory performances, including the five-level data storage, large memory window (58.2 V), stable retention (10(4) s), and cyclic endurance (1000 cycles). PMID:27074903

  9. Nonvolatile Memory Based on Nonlinear Magnetoelectric Effects

    NASA Astrophysics Data System (ADS)

    Shen, Jianxin; Cong, Junzhuang; Chai, Yisheng; Shang, Dashan; Shen, Shipeng; Zhai, Kun; Tian, Ying; Sun, Young

    2016-08-01

    The magnetoelectric effects in multiferroics have a great potential in creating next-generation memory devices. We use an alternative concept of nonvolatile memory based, on a type of nonlinear magnetoelectric effects showing a butterfly-shaped hysteresis loop. The principle is to utilize the states of the magnetoelectric coefficient, instead of magnetization, electric polarization, or resistance, to store binary information. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure clearly demonstrate that the sign of the magnetoelectric coefficient can be repeatedly switched between positive and negative by applying electric fields, confirming the feasibility of this principle. This kind of nonvolatile memory has outstanding practical virtues such as simple structure, easy operation in writing and reading, low power, fast speed, and diverse materials available.

  10. Black phosphorus nonvolatile transistor memory

    NASA Astrophysics Data System (ADS)

    Lee, Dain; Choi, Yongsuk; Hwang, Euyheon; Kang, Moon Sung; Lee, Seungwoo; Cho, Jeong Ho

    2016-04-01

    We demonstrated nanofloating gate transistor memory devices (NFGTMs) using mechanically-exfoliated few-layered black phosphorus (BP) channels and gold nanoparticle (AuNPs) charge trapping layers. The resulting BP-NFGTMs exhibited excellent memory performances, including the five-level data storage, large memory window (58.2 V), stable retention (104 s), and cyclic endurance (1000 cycles).We demonstrated nanofloating gate transistor memory devices (NFGTMs) using mechanically-exfoliated few-layered black phosphorus (BP) channels and gold nanoparticle (AuNPs) charge trapping layers. The resulting BP-NFGTMs exhibited excellent memory performances, including the five-level data storage, large memory window (58.2 V), stable retention (104 s), and cyclic endurance (1000 cycles). Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr02078j

  11. Towards the development of flexible non-volatile memories.

    PubMed

    Han, Su-Ting; Zhou, Ye; Roy, V A L

    2013-10-11

    Flexible non-volatile memories have attracted tremendous attentions for data storage for future electronics application. From device perspective, the advantages of flexible memory devices include thin, lightweight, printable, foldable and stretchable. The flash memories, resistive random access memories (RRAM) and ferroelectric random access memory/ferroelectric field-effect transistor memories (FeRAM/FeFET) are considered as promising candidates for next generation non-volatile memory device. Here, we review the general background knowledge on device structure, working principle, materials, challenges and recent progress with the emphasis on the flexibility of above three categories of non-volatile memories. PMID:24038631

  12. Non-volatile magnetic random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

    1994-01-01

    Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

  13. Improved reliability of Mo nanocrystal memory with ammonia plasma treatment

    SciTech Connect

    Lin, C.-C.; Tu, C.-H.; Chen, W.-R.; Hu, C.-W.; Sze, Simon M.; Tseng, T.-Y.; Chang, T.-C.; Chen, S.-C.; Lin, J.-Y.

    2009-02-09

    We investigated ammonia plasma treatment influence on the nonvolatile memory characteristics of the charge storage layer composed of Mo nanocrystals embedded in nonstoichiometry oxide (SiO{sub x}). X-ray photoelectron spectra analyses revealed that nitrogen was incorporated into the charge storage layer. Electric analyses indicated that the memory window was reduced and the retention and the endurance improved after the treatment. The reduction in the memory window and the improvement in retention were interpreted in terms of the nitrogen passivation of traps in the oxide around Mo nanocrystals. The robust endurance characteristic was attributed the improvement of the quality of the surrounding oxide by nitrogen passivation.

  14. Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films

    NASA Astrophysics Data System (ADS)

    Valentini, L.; Cardinali, M.; Fortunati, E.; Kenny, J. M.

    2014-10-01

    With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electric field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.

  15. Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films

    SciTech Connect

    Valentini, L. Cardinali, M.; Fortunati, E.; Kenny, J. M.

    2014-10-13

    With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electric field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.

  16. Cellulose Nanofiber Paper as an Ultra Flexible Nonvolatile Memory

    PubMed Central

    Nagashima, Kazuki; Koga, Hirotaka; Celano, Umberto; Zhuge, Fuwei; Kanai, Masaki; Rahong, Sakon; Meng, Gang; He, Yong; De Boeck, Jo; Jurczak, Malgorzata; Vandervorst, Wilfried; Kitaoka, Takuya; Nogi, Masaya; Yanagida, Takeshi

    2014-01-01

    On the development of flexible electronics, a highly flexible nonvolatile memory, which is an important circuit component for the portability, is necessary. However, the flexibility of existing nonvolatile memory has been limited, e.g. the smallest radius into which can be bent has been millimeters range, due to the difficulty in maintaining memory properties while bending. Here we propose the ultra flexible resistive nonvolatile memory using Ag-decorated cellulose nanofiber paper (CNP). The Ag-decorated CNP devices showed the stable nonvolatile memory effects with 6 orders of ON/OFF resistance ratio and the small standard deviation of switching voltage distribution. The memory performance of CNP devices can be maintained without any degradation when being bent down to the radius of 350 μm, which is the smallest value compared to those of existing any flexible nonvolatile memories. Thus the present device using abundant and mechanically flexible CNP offers a highly flexible nonvolatile memory for portable flexible electronics. PMID:24985164

  17. Radiation and Reliability Concerns for Modern Nonvolatile Memory Technology

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Friendlich, Mark R.; Kim, Hak S.; Berg, Melanie D.; LaBel, Kenneth A.; Buchner, S. P.; McMorrow, D.; Mavis, D. G.; Eaton, P. H.; Castillo, J.

    2011-01-01

    Commercial nonvolatile memory technology is attractive for space applications, but radiation issues are serious concerns. In addition, we discuss combined radiation/reliability concerns which are only beginning to be addressed.

  18. Non-Volatile Memory Technology Symposium 2000: Proceedings

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh (Editor)

    2000-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2000 that was held on November 15-16, 2000 in Arlington, Virginia. The proceedings contains a wide range of papers that cover the presentations of myriad advances in the nonvolatile memory technology during the recent past including memory cell design, simulations, radiation environment, and emerging memory technologies. The papers presented in the proceedings address the design challenges and applications and deals with newer, emerging memory technologies as well as related issues of radiation environment and die packaging.

  19. Method for refreshing a non-volatile memory

    DOEpatents

    Riekels, James E.; Schlesinger, Samuel

    2008-11-04

    A non-volatile memory and a method of refreshing a memory are described. The method includes allowing an external system to control refreshing operations within the memory. The memory may generate a refresh request signal and transmit the refresh request signal to the external system. When the external system finds an available time to process the refresh request, the external system acknowledges the refresh request and transmits a refresh acknowledge signal to the memory. The memory may also comprise a page register for reading and rewriting a data state back to the memory. The page register may comprise latches in lieu of supplemental non-volatile storage elements, thereby conserving real estate within the memory.

  20. EDITORIAL: Non-volatile memory based on nanostructures Non-volatile memory based on nanostructures

    NASA Astrophysics Data System (ADS)

    Kalinin, Sergei; Yang, J. Joshua; Demming, Anna

    2011-06-01

    Non-volatile memory refers to the crucial ability of computers to store information once the power source has been removed. Traditionally this has been achieved through flash, magnetic computer storage and optical discs, and in the case of very early computers paper tape and punched cards. While computers have advanced considerably from paper and punched card memory devices, there are still limits to current non-volatile memory devices that restrict them to use as secondary storage from which data must be loaded and carefully saved when power is shut off. Denser, faster, low-energy non-volatile memory is highly desired and nanostructures are the critical enabler. This special issue on non-volatile memory based on nanostructures describes some of the new physics and technology that may revolutionise future computers. Phase change random access memory, which exploits the reversible phase change between crystalline and amorphous states, also holds potential for future memory devices. The chalcogenide Ge2Sb2Te5 (GST) is a promising material in this field because it combines a high activation energy for crystallization and a relatively low crystallization temperature, as well as a low melting temperature and low conductivity, which accommodates localized heating. Doping is often used to lower the current required to activate the phase change or 'reset' GST but this often aggravates other problems. Now researchers in Korea report in-depth studies of SiO2-doped GST and identify ways of optimising the material's properties for phase-change random access memory [1]. Resistance switching is an area that has attracted a particularly high level of interest for non-volatile memory technology, and a great deal of research has focused on the potential of TiO2 as a model system in this respect. Researchers at HP labs in the US have made notable progress in this field, and among the work reported in this special issue they describe means to control the switch resistance and show

  1. Sericin for resistance switching device with multilevel nonvolatile memory.

    PubMed

    Wang, Hong; Meng, Fanben; Cai, Yurong; Zheng, Liyan; Li, Yuangang; Liu, Yuanjun; Jiang, Yueyue; Wang, Xiaotian; Chen, Xiaodong

    2013-10-11

    Resistance switching characteristics of natural sericin protein film is demonstrated for nonvolatile memory application for the first time. Excellent memory characteristics with a resistance OFF/ON ratio larger than 10(6) have been obtained and a multilevel memory based on sericin has been achieved. The environmentally friendly high performance biomaterial based memory devices may hold a place in the future of electronic device development. PMID:23893500

  2. Analytical Model of Nano-Electromechanical (NEM) Nonvolatile Memory Cells

    NASA Astrophysics Data System (ADS)

    Han, Boram; Choi, Woo Young

    The fringe field effects of nano-electromechanical (NEM) nonvolatile memory cells have been investigated analytically for the accurate evaluation of NEM memory cells. As the beam width is scaled down, fringe field effect becomes more severe. It has been observed that pull-in, release and hysteresis voltage decrease more than our prediction. Also, the fringe field on cell characteristics has been discussed.

  3. Endurance-write-speed tradeoffs in nonvolatile memories

    NASA Astrophysics Data System (ADS)

    Strukov, Dmitri B.

    2016-04-01

    We derive phenomenological model for endurance-write time switching tradeoff for nonvolatile memories with thermally activated switching mechanisms. The model predicts linear to cubic dependence of endurance on write time for metal oxide memristors and flash memories, which is partially supported by experimental data for the breakdown of metal oxide thin films.

  4. EDITORIAL: Non-volatile memory based on nanostructures Non-volatile memory based on nanostructures

    NASA Astrophysics Data System (ADS)

    Kalinin, Sergei; Yang, J. Joshua; Demming, Anna

    2011-06-01

    Non-volatile memory refers to the crucial ability of computers to store information once the power source has been removed. Traditionally this has been achieved through flash, magnetic computer storage and optical discs, and in the case of very early computers paper tape and punched cards. While computers have advanced considerably from paper and punched card memory devices, there are still limits to current non-volatile memory devices that restrict them to use as secondary storage from which data must be loaded and carefully saved when power is shut off. Denser, faster, low-energy non-volatile memory is highly desired and nanostructures are the critical enabler. This special issue on non-volatile memory based on nanostructures describes some of the new physics and technology that may revolutionise future computers. Phase change random access memory, which exploits the reversible phase change between crystalline and amorphous states, also holds potential for future memory devices. The chalcogenide Ge2Sb2Te5 (GST) is a promising material in this field because it combines a high activation energy for crystallization and a relatively low crystallization temperature, as well as a low melting temperature and low conductivity, which accommodates localized heating. Doping is often used to lower the current required to activate the phase change or 'reset' GST but this often aggravates other problems. Now researchers in Korea report in-depth studies of SiO2-doped GST and identify ways of optimising the material's properties for phase-change random access memory [1]. Resistance switching is an area that has attracted a particularly high level of interest for non-volatile memory technology, and a great deal of research has focused on the potential of TiO2 as a model system in this respect. Researchers at HP labs in the US have made notable progress in this field, and among the work reported in this special issue they describe means to control the switch resistance and show

  5. Non-volatile memory based on the ferroelectric photovoltaic effect

    PubMed Central

    Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

    2013-01-01

    The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

  6. HfO2 nanocrystal memory on SiGe channel

    NASA Astrophysics Data System (ADS)

    Lin, Yu-Hsien; Chien, Chao-Hsin

    2013-02-01

    This study proposes a novel HfO2 nanocrystal memory on epi-SiGe (Ge: 15%) channel. Because SiGe has a smaller bandgap than that of silicon, it increases electron/hole injection and the enhances program/erase speeds. This study compares the characteristics of HfO2 nanocrystal memories with different oxynitride tunnel oxide thicknesses on Si and epi-SiGe substrate. Results show that the proposed nonvolatile memory possesses superior characteristics in terms of considerably large memory window for two-bits operation, high speed program/erase for low power applications, long retention time, excellent endurance, and strong immunity to disturbance.

  7. Non-Volatile Memory Technology Symposium 2001: Proceedings

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh; Daud, Taher; Strauss, Karl

    2001-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

  8. Characterization of an Autonomous Non-Volatile Ferroelectric Memory Latch

    NASA Technical Reports Server (NTRS)

    John, Caroline S.; MacLeod, Todd C.; Evans, Joe; Ho, Fat D.

    2011-01-01

    We present the electrical characterization of an autonomous non-volatile ferroelectric memory latch using the principle that when an electric field is applied to a ferroelectriccapacitor,the positive and negative remnant polarization charge states of the capacitor are denoted as either data 0 or data 1. The properties of the ferroelectric material to store an electric polarization in the absence of an electric field make the device non-volatile. Further the memory latch is autonomous as it operates with the ground, power and output node connections, without any externally clocked control line. The unique quality of this latch circuit is that it can be written when powered off. The advantages of this latch over flash memories are: a) It offers unlimited reads/writes b) works on symmetrical read/write cycles. c) The latch is asynchronous. The circuit was initially developed by Radiant Technologies Inc., Albuquerque, New Mexico.

  9. Integrated photonics with programmable non-volatile memory

    PubMed Central

    Song, Jun-Feng; Luo, Xian-Shu; Lim, Andy Eu-Jin; Li, Chao; Fang, Qing; Liow, Tsung-Yang; Jia, Lian-Xi; Tu, Xiao-Guang; Huang, Ying; Zhou, Hai-Feng; Lo, Guo-Qiang

    2016-01-01

    Silicon photonics integrated circuits (Si-PIC) with well-established active and passive building elements are progressing towards large-scale commercialization in optical communications and high speed optical interconnects applications. However, current Si-PICs do not have memory capabilities, in particular, the non-volatile memory functionality for energy efficient data storage. Here, we propose an electrically programmable, multi-level non-volatile photonics memory cell (PMC) fabricated by standard complementary-metal-oxide-semiconductor (CMOS) compatible processes. A micro-ring resonator (MRR) was built using the PMC to optically read the memory states. Switching energy smaller than 20 pJ was achieved. Additionally, a MRR memory array was employed to demonstrate a four-bit memory read capacity. Theoretically, this can be increased up to ~400 times using a 100 nm free spectral range broadband light source. The fundamental concept of this design provides a route to eliminate the von Neumann bottleneck. The energy-efficient optical storage can complement on-chip optical interconnects for neutral networking, memory input/output interfaces and other computational intensive applications. PMID:26941113

  10. Integrated photonics with programmable non-volatile memory.

    PubMed

    Song, Jun-Feng; Luo, Xian-Shu; Lim, Andy Eu-Jin; Li, Chao; Fang, Qing; Liow, Tsung-Yang; Jia, Lian-Xi; Tu, Xiao-Guang; Huang, Ying; Zhou, Hai-Feng; Lo, Guo-Qiang

    2016-01-01

    Silicon photonics integrated circuits (Si-PIC) with well-established active and passive building elements are progressing towards large-scale commercialization in optical communications and high speed optical interconnects applications. However, current Si-PICs do not have memory capabilities, in particular, the non-volatile memory functionality for energy efficient data storage. Here, we propose an electrically programmable, multi-level non-volatile photonics memory cell (PMC) fabricated by standard complementary-metal-oxide-semiconductor (CMOS) compatible processes. A micro-ring resonator (MRR) was built using the PMC to optically read the memory states. Switching energy smaller than 20 pJ was achieved. Additionally, a MRR memory array was employed to demonstrate a four-bit memory read capacity. Theoretically, this can be increased up to ~400 times using a 100 nm free spectral range broadband light source. The fundamental concept of this design provides a route to eliminate the von Neumann bottleneck. The energy-efficient optical storage can complement on-chip optical interconnects for neutral networking, memory input/output interfaces and other computational intensive applications. PMID:26941113

  11. Integrated photonics with programmable non-volatile memory

    NASA Astrophysics Data System (ADS)

    Song, Jun-Feng; Luo, Xian-Shu; Lim, Andy Eu-Jin; Li, Chao; Fang, Qing; Liow, Tsung-Yang; Jia, Lian-Xi; Tu, Xiao-Guang; Huang, Ying; Zhou, Hai-Feng; Lo, Guo-Qiang

    2016-03-01

    Silicon photonics integrated circuits (Si-PIC) with well-established active and passive building elements are progressing towards large-scale commercialization in optical communications and high speed optical interconnects applications. However, current Si-PICs do not have memory capabilities, in particular, the non-volatile memory functionality for energy efficient data storage. Here, we propose an electrically programmable, multi-level non-volatile photonics memory cell (PMC) fabricated by standard complementary-metal-oxide-semiconductor (CMOS) compatible processes. A micro-ring resonator (MRR) was built using the PMC to optically read the memory states. Switching energy smaller than 20 pJ was achieved. Additionally, a MRR memory array was employed to demonstrate a four-bit memory read capacity. Theoretically, this can be increased up to ~400 times using a 100 nm free spectral range broadband light source. The fundamental concept of this design provides a route to eliminate the von Neumann bottleneck. The energy-efficient optical storage can complement on-chip optical interconnects for neutral networking, memory input/output interfaces and other computational intensive applications.

  12. Nonvolatile semiconductor memory having three dimension charge confinement

    DOEpatents

    Dawson, L. Ralph; Osbourn, Gordon C.; Peercy, Paul S.; Weaver, Harry T.; Zipperian, Thomas E.

    1991-01-01

    A layered semiconductor device with a nonvolatile three dimensional memory comprises a storage channel which stores charge carriers. Charge carriers flow laterally through the storage channel from a source to a drain. Isolation material, either a Schottky barrier or a heterojunction, located in a trench of an upper layer controllably retains the charge within the a storage portion determined by the confining means. The charge is retained for a time determined by the isolation materials' nonvolatile characteristics or until a change of voltage on the isolation material and the source and drain permit a read operation. Flow of charge through an underlying sense channel is affected by the presence of charge within the storage channel, thus the presences of charge in the memory can be easily detected.

  13. Nonvolatile GaAs Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan

    1994-01-01

    Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.

  14. Integrated, nonvolatile, high-speed analog random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

    1994-01-01

    This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

  15. Development of non-volatile semiconductor memory

    NASA Technical Reports Server (NTRS)

    Heikkila, W. W.

    1979-01-01

    A 256 word by 8-bit random access memory chip was developed utilizing p channel, metal gate metal-nitride-oxide-silicon (MNOS) technology; with operational characteristics of a 2.5 microsecond read cycle, a 6.0 microsecond write cycle, 800 milliwatts of power dissipation; and retention characteristics of 10 to the 8th power read cycles before data refresh and 5000 hours of no power retention. Design changes were implemented to reduce switching currents that caused parasitic bipolar transistors inherent in the MNOS structure to turn on. Final wafer runs exhibited acceptable yields for a die 250 mils on a side. Evaluation testing was performed on the device in order to determine the maturity of the device. A fixed gate breakdown mechanism was found when operated continuously at high temperature.

  16. Highly Stretchable Non-volatile Nylon Thread Memory

    PubMed Central

    Kang, Ting-Kuo

    2016-01-01

    Integration of electronic elements into textiles, to afford e-textiles, can provide an ideal platform for the development of lightweight, thin, flexible, and stretchable e-textiles. This approach will enable us to meet the demands of the rapidly growing market of wearable-electronics on arbitrary non-conventional substrates. However the actual integration of the e-textiles that undergo mechanical deformations during both assembly and daily wear or satisfy the requirements of the low-end applications, remains a challenge. Resistive memory elements can also be fabricated onto a nylon thread (NT) for e-textile applications. In this study, a simple dip-and-dry process using graphene-PEDOT:PSS (poly(3,4-ethylenedioxythiophene) polystyrene sulfonate) ink is proposed for the fabrication of a highly stretchable non-volatile NT memory. The NT memory appears to have typical write-once-read-many-times characteristics. The results show that an ON/OFF ratio of approximately 103 is maintained for a retention time of 106 s. Furthermore, a highly stretchable strain and a long-term digital-storage capability of the ON-OFF-ON states are demonstrated in the NT memory. The actual integration of the knitted NT memories into textiles will enable new design possibilities for low-cost and large-area e-textile memory applications. PMID:27072786

  17. Highly Stretchable Non-volatile Nylon Thread Memory

    NASA Astrophysics Data System (ADS)

    Kang, Ting-Kuo

    2016-04-01

    Integration of electronic elements into textiles, to afford e-textiles, can provide an ideal platform for the development of lightweight, thin, flexible, and stretchable e-textiles. This approach will enable us to meet the demands of the rapidly growing market of wearable-electronics on arbitrary non-conventional substrates. However the actual integration of the e-textiles that undergo mechanical deformations during both assembly and daily wear or satisfy the requirements of the low-end applications, remains a challenge. Resistive memory elements can also be fabricated onto a nylon thread (NT) for e-textile applications. In this study, a simple dip-and-dry process using graphene-PEDOT:PSS (poly(3,4-ethylenedioxythiophene) polystyrene sulfonate) ink is proposed for the fabrication of a highly stretchable non-volatile NT memory. The NT memory appears to have typical write-once-read-many-times characteristics. The results show that an ON/OFF ratio of approximately 103 is maintained for a retention time of 106 s. Furthermore, a highly stretchable strain and a long-term digital-storage capability of the ON-OFF-ON states are demonstrated in the NT memory. The actual integration of the knitted NT memories into textiles will enable new design possibilities for low-cost and large-area e-textile memory applications.

  18. Bioorganic nanodots for non-volatile memory devices

    NASA Astrophysics Data System (ADS)

    Amdursky, Nadav; Shalev, Gil; Handelman, Amir; Litsyn, Simon; Natan, Amir; Roizin, Yakov; Rosenwaks, Yossi; Szwarcman, Daniel; Rosenman, Gil

    2013-12-01

    In recent years we are witnessing an intensive integration of bio-organic nanomaterials in electronic devices. Here we show that the diphenylalanine bio-molecule can self-assemble into tiny peptide nanodots (PNDs) of ˜2 nm size, and can be embedded into metal-oxide-semiconductor devices as charge storage nanounits in non-volatile memory. For that purpose, we first directly observe the crystallinity of a single PND by electron microscopy. We use these nanocrystalline PNDs units for the formation of a dense monolayer on SiO2 surface, and study the electron/hole trapping mechanisms and charge retention ability of the monolayer, followed by fabrication of PND-based memory cell device.

  19. Bioorganic nanodots for non-volatile memory devices

    SciTech Connect

    Amdursky, Nadav; Shalev, Gil; Handelman, Amir; Natan, Amir; Rosenwaks, Yossi; Litsyn, Simon; Szwarcman, Daniel; Rosenman, Gil; Roizin, Yakov

    2013-12-01

    In recent years we are witnessing an intensive integration of bio-organic nanomaterials in electronic devices. Here we show that the diphenylalanine bio-molecule can self-assemble into tiny peptide nanodots (PNDs) of ∼2 nm size, and can be embedded into metal-oxide-semiconductor devices as charge storage nanounits in non-volatile memory. For that purpose, we first directly observe the crystallinity of a single PND by electron microscopy. We use these nanocrystalline PNDs units for the formation of a dense monolayer on SiO{sub 2} surface, and study the electron/hole trapping mechanisms and charge retention ability of the monolayer, followed by fabrication of PND-based memory cell device.

  20. PREFACE: Emerging non-volatile memories: magnetic and resistive technologies Emerging non-volatile memories: magnetic and resistive technologies

    NASA Astrophysics Data System (ADS)

    Dieny, B.; Jagadish, Chennupati

    2013-02-01

    In 2010, the International Technology Roadmap for Semiconductors (ITRS) published an assessment of the potential and maturity of selected emerging research on memory technologies. Eight different technologies of non-volatile memories were compared (ferroelectric gate field-effect transistor, nano-electro-mechanical switch, spin-transfer torque random access memories (STTRAM), various types of resistive RAM, in particular redox RAM, nanothermal phase change RAM, electronic effects RAM, macromolecular memories and molecular RAM). In this report, spin-transfer torque MRAM and redox RRAM were identified as two emerging memory technologies recommended for accelerated research and development leading to scaling and commercialization of non-volatile RAM to and beyond the 16nm generation. Nowadays, there is an intense research and development effort in microelectronics on these two technologies, one based on spintronic phenomena (tunnel magnetoresistance and spin-transfer torque), the other based on migration of vacancies or ions in an insulating matrix driven by oxydo-reduction potentials. Both technologies could be used for standalone or embedded applications. In this context, it appeared timely to publish a cluster of review articles related to these two technologies. In this cluster, the first two articles introduce the general principles of spin-transfer torque RAM and of thermally assisted RAM. The third presents a broader range of applications for this integrated CMOS/magnetic tunnel junction technology for low-power electronics. The fourth paper presents more advanced research on voltage control of magnetization switching with the aim of dramatically reducing the write energy in MRAM. The last two papers deal with two categories of resistive RAM, one based on the migration of cations, the other one based on nanowires. We thank all the authors and reviewers for their contribution to this cluster issue. Our special thanks are due to Dr Olivia Roche, Publisher, and Dr

  1. Nanopatterned ferroelectrics for ultrahigh density rad-hard nonvolatile memories.

    SciTech Connect

    Brennecka, Geoffrey L.; Stevens, Jeffrey; Scrymgeour, David; Gin, Aaron V.; Tuttle, Bruce Andrew

    2010-09-01

    Radiation hard nonvolatile random access memory (NVRAM) is a crucial component for DOE and DOD surveillance and defense applications. NVRAMs based upon ferroelectric materials (also known as FERAMs) are proven to work in radiation-rich environments and inherently require less power than many other NVRAM technologies. However, fabrication and integration challenges have led to state-of-the-art FERAMs still being fabricated using a 130nm process while competing phase-change memory (PRAM) has been demonstrated with a 20nm process. Use of block copolymer lithography is a promising approach to patterning at the sub-32nm scale, but is currently limited to self-assembly directly on Si or SiO{sub 2} layers. Successful integration of ferroelectrics with discrete and addressable features of {approx}15-20nm would represent a 100-fold improvement in areal memory density and would enable more highly integrated electronic devices required for systems advances. Towards this end, we have developed a technique that allows us to carry out block copolymer self-assembly directly on a huge variety of different materials and have investigated the fabrication, integration, and characterization of electroceramic materials - primarily focused on solution-derived ferroelectrics - with discrete features of {approx}20nm and below. Significant challenges remain before such techniques will be capable of fabricating fully integrated NVRAM devices, but the tools developed for this effort are already finding broader use. This report introduces the nanopatterned NVRAM device concept as a mechanism for motivating the subsequent studies, but the bulk of the document will focus on the platform and technology development.

  2. Total ionizing dose effects and reliability of graphene-based non-volatile memory devices

    NASA Astrophysics Data System (ADS)

    Zhang, Cher Xuan; Zhang, En Xia; Fleetwood, Daniel M.; Alles, Michael L.; Schrimpf, Ronald D.; Song, Emil B.; Galatsis, Kosmas; Newaz, A. K. M.; Bolotin, K. I.

    We discuss total ionizing dose effects and reliability of graphene-based electronics and non-volatile memory devices. The degradation after radiation exposure of these structures derives primarily from surface oxygen adsorption. Excellent stability and memory retention are observed for ionizing radiation exposure or constant-voltage stress. Cycling of the memory state leads to a significant degradation of the performance.

  3. A graphene-based non-volatile memory

    NASA Astrophysics Data System (ADS)

    Loisel, Loïc.; Maurice, Ange; Lebental, Bérengère; Vezzoli, Stefano; Cojocaru, Costel-Sorin; Tay, Beng Kang

    2015-09-01

    We report on the development and characterization of a simple two-terminal non-volatile graphene switch. After an initial electroforming step during which Joule heating leads to the formation of a nano-gap impeding the current flow, the devices can be switched reversibly between two well-separated resistance states. To do so, either voltage sweeps or pulses can be used, with the condition that VSET < VRESET , where SET is the process decreasing the resistance and RESET the process increasing the resistance. We achieve reversible switching on more than 100 cycles with resistance ratio values of 104. This approach of graphene memory is competitive as compared to other graphene approaches such as redox of graphene oxide, or electro-mechanical switches with suspended graphene. We suggest a switching model based on a planar electro-mechanical switch, whereby electrostatic, elastic and friction forces are competing to switch devices ON and OFF, and the stability in the ON state is achieved by the formation of covalent bonds between the two stretched sides of the graphene, hence bridging the nano-gap. Developing a planar electro-mechanical switch enables to obtain the advantages of electro-mechanical switches while avoiding most of their drawbacks.

  4. Electrostatic Switching in Vertically Oriented Nanotubes for Nonvolatile Memory Applications

    NASA Technical Reports Server (NTRS)

    Kaul, Anupama B.; Khan, Paul; Jennings, Andrew T.; Greer, Julia R.; Megerian, Krikor G.; Allmen, Paul von

    2009-01-01

    We have demonstrated electrostatic switching in vertically oriented nanotubes or nanofibers, where a nanoprobe was used as the actuating electrode inside an SEM. When the nanoprobe was manipulated to be in close proximity to a single tube, switching voltages between 10 V - 40 V were observed, depending on the geometrical parameters. The turn-on transitions appeared to be much sharper than the turn-off transitions which were limited by the tube-to-probe contact resistances. In many cases, stiction forces at these dimensions were dominant, since the tube appeared stuck to the probe even after the voltage returned to 0 V, suggesting that such structures are promising for nonvolatile memory applications. The stiction effects, to some extent, can be adjusted by engineering the switch geometry appropriately. Nanoscale mechanical measurements were also conducted on the tubes using a custom-built anoindentor inside an SEM, from which preliminary material parameters, such as the elastic modulus, were extracted. The mechanical measurements also revealed that the tubes appear to be well adhered to the substrate. The material parameters gathered from the mechanical measurements were then used in developing an electrostatic model of the switch using a commercially available finite-element simulator. The calculated pull-in voltages appeared to be in agreement to the experimentally obtained switching voltages to first order.

  5. Nonvolatile Memory Solution for Near-Term NASA Missions

    NASA Technical Reports Server (NTRS)

    Patel, J. U.; Blaes, B. R.; Mojarradi, M. M.

    2001-01-01

    Nonvolatile memory (NVM) system that could reliably function in extreme environments is one of the most critical components for many spacecrafts being developed for NASA missions to be launched in next four to seven years. NVM supports the computer system in saving and updating critical state data required for a warm restart after power cycling or in case of a power bus failure. It also provides a power independent mass storage capacity for the scientific data gathered by the instruments. In some cases the window for gathering such data is very small and occurs only once in a given mission. Commercially popular and fully developed Flash NVM technology is inappropriate for many reasons such as the limited read write cycles with slower access speeds, radiation intolerance, higher Single Event Upsets (SEU) rates, etc. It is desirable to have an NVM system based upon a robust cell technology making it immune to the SEUs and with sufficient radiation hardness. Availability of such NVM system seems to be still 5 to 10 years in the future. Meanwhile, it is possible to provide an interim hybrid solution by combining the existing rad-hard technologies. Additional information is contained in the original extended abstract.

  6. Ultra-flexible nonvolatile memory based on donor-acceptor diketopyrrolopyrrole polymer blends

    PubMed Central

    Zhou, Ye; Han, Su-Ting; Yan, Yan; Zhou, Li; Huang, Long-Biao; Zhuang, Jiaqing; Sonar, Prashant; Roy, V. A. L.

    2015-01-01

    Flexible memory cell array based on high mobility donor-acceptor diketopyrrolopyrrole polymer has been demonstrated. The memory cell exhibits low read voltage, high cell-to-cell uniformity and good mechanical flexibility, and has reliable retention and endurance memory performance. The electrical properties of the memory devices are systematically investigated and modeled. Our results suggest that the polymer blends provide an important step towards high-density flexible nonvolatile memory devices. PMID:26029856

  7. Novel nonvolatile memory with multibit storage based on a ZnO nanowire transistor.

    PubMed

    Sohn, Jung Inn; Choi, Su Seok; Morris, Stephen M; Bendall, James S; Coles, Harry J; Hong, Woong-Ki; Jo, Gunho; Lee, Takhee; Welland, Mark E

    2010-11-10

    We demonstrate a room temperature processed ferroelectric (FE) nonvolatile memory based on a ZnO nanowire (NW) FET where the NW channel is coated with FE nanoparticles. A single device exhibits excellent memory characteristics with the large modulation in channel conductance between ON and OFF states exceeding 10(4), a long retention time of over 4 × 10(4) s, and multibit memory storage ability. Our findings provide a viable way to create new functional high-density nonvolatile memory devices compatible with simple processing techniques at low temperature for flexible devices made on plastic substrates. PMID:20945844

  8. Determining the state of non-volatile memory cells with floating gate using scanning probe microscopy

    NASA Astrophysics Data System (ADS)

    Hanzii, D.; Kelm, E.; Luapunov, N.; Milovanov, R.; Molodcova, G.; Yanul, M.; Zubov, D.

    2013-01-01

    During a failure analysis of integrated circuits, containing non-volatile memory, it is often necessary to determine its contents while Standard memory reading procedures are not applicable. This article considers how the state of NVM cells with floating gate can be determined using scanning probe microscopy. Samples preparation and measuring procedure are described with the example of Microchip microcontrollers with the EPROM memory (PIC12C508) and flash-EEPROM memory (PIC16F876A).

  9. Printed dose-recording tag based on organic complementary circuits and ferroelectric nonvolatile memories

    PubMed Central

    Nga Ng, Tse; Schwartz, David E.; Mei, Ping; Krusor, Brent; Kor, Sivkheng; Veres, Janos; Bröms, Per; Eriksson, Torbjörn; Wang, Yong; Hagel, Olle; Karlsson, Christer

    2015-01-01

    We have demonstrated a printed electronic tag that monitors time-integrated sensor signals and writes to nonvolatile memories for later readout. The tag is additively fabricated on flexible plastic foil and comprises a thermistor divider, complementary organic circuits, and two nonvolatile memory cells. With a supply voltage below 30 V, the threshold temperatures can be tuned between 0 °C and 80 °C. The time-temperature dose measurement is calibrated for minute-scale integration. The two memory bits are sequentially written in a thermometer code to provide an accumulated dose record. PMID:26307438

  10. Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

    SciTech Connect

    Liu, Jie; Liu, Chang-Hai; She, Xiao-Jian; Sun, Qi-Jun; Gao, Xu; Wang, Sui-Dong

    2014-10-20

    High-performance organic field-effect transistor nonvolatile memories have been achieved using sputtered C nanoparticles as the nano-floating-gate. The sputtered C nano-floating-gate is prepared with low-cost material and simple process, forming uniform and discrete charge trapping sites covered by a smooth and complete polystyrene layer. The devices show large memory window, excellent retention capability, and programming/reading/erasing/reading endurance. The sputtered C nano-floating-gate can effectively trap both holes and electrons, and it is demonstrated to be suitable for not only p-type but also n-type organic field-effect transistor nonvolatile memories.

  11. Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2010

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.

    2010-01-01

    High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) and multi-level cell (MLC) NAND flash memories manufactured by Micron Technology.

  12. Radiation Tests of Highly scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories--Update 2011

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.

    2011-01-01

    High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) 32Gb and multi-level cell (MLC) 64Gb NAND flash memories manufactured by Micron Technology.

  13. Nonvolatile Quantum Dot Gate Memory (NVQDM): Tunneling Rate from Quantum Well Channel to Quantum Dot Gate

    NASA Astrophysics Data System (ADS)

    Hasaneen, El-Sayed; Heller, Evan; Bansal, Rajeev; Jain, Faquir

    2003-10-01

    In this paper, we compute the tunneling of electrons in a nonvolatile quantum dot memory (NVQDM) cell during the WRITE operation. The transition rate of electrons from a quantum well channel to the quantum dots forming the floating gate is calculated using a recently reported method by Chuang et al.[1]. Tunneling current is computed based on transport of electrons from the channel to the floating quantum dots. The maximum number of electrons on a dot is calculated using surface electric field and break down voltage of the tunneling dielectric material. Comparison of tunneling for silicon oxide and high-k dielectric gate insulators is also described. Capacitance-Voltage characteristics of a NVQDM device are calculated by solving the Schrodinger and Poisson equations self-consistently. In addition, the READ operation of the memory has been investigated analytically. Results for 70 nm channel length Si NVQDMs are presented. Threshold voltage is calculated including the effect of the charge on nanocrystal quantum dots. Current-voltage characteristics are obtained using BSIM3v3 model [2-3]. This work is supported by Office of Navel Research (N00014210883, Dr. D. Purdy, Program Monitor), Connecticut Innovations Inc./TranSwitch (CII # 00Y17), and National Science Foundation (CCR-0210428) grants. [1] S. L. Chuang and N. Holonyak, Appl. Phys. Lett., 80, pp. 1270, 2002. [2] Y. Chen et. al., BSIM3v3 Manual, Elect. Eng. and Comp. Dept., U. California, Berkeley, CA, 1996. [3] W. Liu, MOSFET Models for SPICE Simulation, John Wiley & Sons, Inc., 2001.

  14. An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

    NASA Technical Reports Server (NTRS)

    Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

    2001-01-01

    Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

  15. Non-volatile memory based on transition metal perovskite oxide resistance switching

    NASA Astrophysics Data System (ADS)

    Nian, Yibo

    Driven by the non-volatile memory market looking for new advanced materials, this dissertation focuses on the study of non-volatile resistive random access memory (RRAM) based on transition metal perovskite oxides. Pr0.7Ca0.3MnO3 (PCMO), one of the representative materials in this family, has demonstrated a large range of resistance change when short electrical pulses with different polarity are applied. Such electrical-pulse-induced resistance (EPIR), with attractive features such as fast response, low power, high-density and non-volatility, makes PCMO and related materials promising candidates for non-volatile RRAM application. The objective of this work is to investigate, optimize and understand the properties of this universal EPIR behavior in transition metal perovskite oxide, represented by PCMO thin film devices. The research work includes fabrication of PCMO thin film devices, characterization of these EPIR devices as non-volatile memories, and investigation of their resistive switching mechanisms. The functionality of this perovskite oxide RRAM, including pulse magnitude/width dependence, power consumption, retention, endurance and radiation-hardness has been investigated. By studying the "shuttle tail" in hysteresis switching loops of oxygen deficient devices, a diffusion model with oxygen ions/vacancies as active agents at the metal/oxide interface is proposed for the non-volatile resistance switching effect in transition metal perovskite oxide thin films. The change of EPIR switching behavior after oxygen/argon ion implantation also shows experiment support for the proposed model. Furthermore, the universality, scalability and comparison with other non-volatile memories are discussed for future application.

  16. Improving Memory Characteristics of Hydrogenated Nanocrystalline Silicon Germanium Nonvolatile Memory Devices by Controlling Germanium Contents.

    PubMed

    Kim, Jiwoong; Jang, Kyungsoo; Phu, Nguyen Thi Cam; Trinh, Thanh Thuy; Raja, Jayapal; Kim, Taeyong; Cho, Jaehyun; Kim, Sangho; Park, Jinjoo; Jung, Junhee; Lee, Youn-Jung; Yi, Junsin

    2016-05-01

    Nonvolatile memory (NVM) with silicon dioxide/silicon nitride/silicon oxynitride (ONO(n)) charge trap structure is a promising flash memory technology duo that will fulfill process compatibility for system-on-panel displays, down-scaling cell size and low operation voltage. In this research, charge trap flash devices were fabricated with ONO(n) stack gate insulators and an active layer using hydrogenated nanocrystalline silicon germanium (nc-SiGe:H) films at a low temperature. In this study, the effect of the interface trap density on the performance of devices, including memory window and retention, was investigated. The electrical characteristics of NVM devices were studied controlling Ge content from 0% to 28% in the nc-SiGe:H channel layer. The optimal Ge content in the channel layer was found to be around 16%. For nc-SiGe:H NVM with 16% Ge content, the memory window was 3.13 V and the retention data exceeded 77% after 10 years under the programming condition of 15 V for 1 msec. This showed that the memory window increased by 42% and the retention increased by 12% compared to the nc-Si:H NVM that does not contain Ge. However, when the Ge content was more than 16%, the memory window and retention property decreased. Finally, this research showed that the Ge content has an effect on the interface trap density and this enabled us to determine the optimal Ge content. PMID:27483856

  17. Multilevel resistive switching nonvolatile memory based on MoS2 nanosheet-embedded graphene oxide

    NASA Astrophysics Data System (ADS)

    Shin, Gwang Hyuk; Kim, Choong-Ki; Bang, Gyeong Sook; Kim, Jong Yun; Jang, Byung Chul; Koo, Beom Jun; Woo, Myung Hun; Choi, Yang-Kyu; Choi, Sung-Yool

    2016-09-01

    An increasing demand for nonvolatile memory has driven extensive research on resistive switching memory because it uses simple structures with high density, fast switching speed, and low power consumption. To improve the storage density, the application of multilevel cells is among the most promising solutions, including three-dimensional cross-point array architectures. Two-dimensional nanomaterials have several advantages as resistive switching media, including flexibility, low cost, and simple fabrication processes. However, few reports exist on multilevel nonvolatile memory and its switching mechanism. We herein present a multilevel resistive switching memory based on graphene oxide (GO) and MoS2 fabricated by a simple spin-coating process. Metallic 1T-MoS2 nanosheets, chemically exfoliated by Li intercalation, were successfully embedded between two GO layers as charge-trapping sites. The resulting stacks of GO/MoS2/GO exhibited excellent nonvolatile memory performance with at least four resistance states, >102 endurance cycles, and >104 s retention time. Furthermore, the charge transport mechanism was systematically investigated through the analysis of low-frequency 1/f noise in various resistance states, which could be modulated by the input voltage bias in the negative differential resistance region. Accordingly, we propose a strategy to achieve multilevel nonvolatile memory in which the stacked layers of two-dimensional nanosheets are utilized as resistive and charge-storage materials.

  18. The role of non-volatile memory from an application perspective

    SciTech Connect

    Kettering, Brett M; Nunez, James A

    2010-09-16

    Current, emerging, and future NVM (non-volatile memory) technologies give us hope that we will be able to architect HPC (high performance computing) systems that initially use them in a memory and storage hierarchy, and eventually use them as the memory and storage for the system, complete with ownership and protections as a HDD-based (hard-disk-drive-based) file system provides today.

  19. Physical principles and current status of emerging non-volatile solid state memories

    NASA Astrophysics Data System (ADS)

    Wang, L.; Yang, C.-H.; Wen, J.

    2015-07-01

    Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for

  20. A Nonvolatile MOSFET Memory Device Based on Mobile Protons in SiO(2) Thin Films

    SciTech Connect

    Vanheusden, K.; Warren, W.L.; Devine, R.A.B.; Fleetwood, D.M.; Draper, B.L.; Schwank, J.R.

    1999-03-02

    It is shown how mobile H{sup +} ions can be generated thermally inside the oxide layer of Si/SiO{sub 2}/Si structures. The technique involves only standard silicon processing steps: the nonvolatile field effect transistor (NVFET) is based on a standard MOSFET with thermally grown SiO{sub 2} capped with a poly-silicon layer. The capped thermal oxide receives an anneal at {approximately}1100 C that enables the incorporation of the mobile protons into the gate oxide. The introduction of the protons is achieved by a subsequent 500-800 C anneal in a hydrogen-containing ambient, such as forming gas (N{sub 2}:H{sub 2} 95:5). The mobile protons are stable and entrapped inside the oxide layer, and unlike alkali ions, their space-charge distribution can be controlled and rapidly rearranged at room temperature by an applied electric field. Using this principle, a standard MOS transistor can be converted into a nonvolatile memory transistor that can be switched between normally on and normally off. Switching speed, retention, endurance, and radiation tolerance data are presented showing that this non-volatile memory technology can be competitive with existing Si-based non-volatile memory technologies such as the floating gate technologies (e.g. Flash memory).

  1. Review of Emerging New Solid-State Non-Volatile Memories

    NASA Astrophysics Data System (ADS)

    Fujisaki, Yoshihisa

    2013-04-01

    The integration limit of flash memories is approaching, and many new types of memory to replace conventional flash memories have been proposed. Unlike flash memories, new nonvolatile memories do not require storage of electric charges. The possibility of phase-change random-access memories (PCRAMs) or resistive-change RAMs (ReRAMs) replacing ultrahigh-density NAND flash memories has been investigated; however, many issues remain to be overcome, making the replacement difficult. Nonetheless, ferroelectric RAMs (FeRAMs) and magnetoresistive RAMs (MRAMs) are gradually penetrating into fields where the shortcomings of flash memories, such as high operating voltage, slow rewriting speed, and limited number of rewrites, make their use inconvenient. For instance, FeRAMs are widely used in ICs that require low power consumption such as smart cards and wireless tags. MRAMs are used in many kinds of controllers in industrial equipment that require high speed and unlimited rewrite operations. For successful application of new non-volatile semiconductor memories, such memories must be practically utilized in new fields in which flash memories are not applicable, and their technologies must be further developed.

  2. Nonvolatile read/write memory element - A concept

    NASA Technical Reports Server (NTRS)

    Cricchi, J. R.; Lytle, W. J.

    1971-01-01

    Memory, with limited number of programming cycles, is achieved by using verticle, fusible links in series with oxide breakthrough elements. Memory elements are fabricated with integrated circuit technology and are ideal for low power digital computer application.

  3. Electrostatically transparent graphene quantum-dot trap layers for efficient nonvolatile memory

    NASA Astrophysics Data System (ADS)

    Kim, Young Rae; Jo, Yong Eun; Shin, Yong Seon; Kang, Won Tae; Sung, Yeo Hyun; Won, Ui Yeon; Lee, Young Hee; Yu, Woo Jong

    2015-03-01

    In this study, we have demonstrated nonvolatile memory devices using graphene quantum-dots (GQDs) trap layers with indium zinc oxide (IZO) semiconductor channel. The Fermi-level of GQD was effectively modulated by tunneling electrons near the Dirac point because of limited density of states and weak electrostatic screening in monolayer graphene. As a result, large gate modulation was driven in IZO channel to achieve a subthreshold swing of 5.21 V/dec (300 nm SiO2 gate insulator), while Au quantum-dots memory shows 15.52 V/dec because of strong electrostatic screening in metal quantum-dots. Together, discrete charge traps of GQDs enable stable performance in the endurance test beyond 800 cycles of programming and erasing. Our study suggests the exciting potential of GQD trap layers to be used for a highly promising material in non-volatile memory devices.

  4. Electrostatically transparent graphene quantum-dot trap layers for efficient nonvolatile memory

    SciTech Connect

    Kim, Young Rae; Jo, Yong Eun; Sung, Yeo Hyun; Won, Ui Yeon; Shin, Yong Seon; Kang, Won Tae; Yu, Woo Jong E-mail: micco21@skku.edu; Lee, Young Hee E-mail: micco21@skku.edu

    2015-03-09

    In this study, we have demonstrated nonvolatile memory devices using graphene quantum-dots (GQDs) trap layers with indium zinc oxide (IZO) semiconductor channel. The Fermi-level of GQD was effectively modulated by tunneling electrons near the Dirac point because of limited density of states and weak electrostatic screening in monolayer graphene. As a result, large gate modulation was driven in IZO channel to achieve a subthreshold swing of 5.21 V/dec (300 nm SiO{sub 2} gate insulator), while Au quantum-dots memory shows 15.52 V/dec because of strong electrostatic screening in metal quantum-dots. Together, discrete charge traps of GQDs enable stable performance in the endurance test beyond 800 cycles of programming and erasing. Our study suggests the exciting potential of GQD trap layers to be used for a highly promising material in non-volatile memory devices.

  5. Wafer-scale arrays of nonvolatile polymer memories with microprinted semiconducting small molecule/polymer blends.

    PubMed

    Bae, Insung; Hwang, Sun Kak; Kim, Richard Hahnkee; Kang, Seok Ju; Park, Cheolmin

    2013-11-13

    Nonvolatile ferroelectric-gate field-effect transistors (Fe-FETs) memories with solution-processed ferroelectric polymers are of great interest because of their potential for use in low-cost flexible devices. In particular, the development of a process for patterning high-performance semiconducting channel layers with mechanical flexibility is essential not only for proper cell-to-cell isolation but also for arrays of flexible nonvolatile memories. We demonstrate a robust route for printing large-scale micropatterns of solution-processed semiconducting small molecules/insulating polymer blends for high performance arrays of nonvolatile ferroelectric polymer memory. The nonvolatile memory devices are based on top-gate/bottom-contact Fe-FET with ferroelectric polymer insulator and micropatterned semiconducting blend channels. Printed micropatterns of a thin blended semiconducting film were achieved by our selective contact evaporation printing, with which semiconducting small molecules in contact with a micropatterned elastomeric poly(dimethylsiloxane) (PDMS) mold were preferentially evaporated and absorbed into the PDMS mold while insulating polymer remained intact. Well-defined micrometer-scale patterns with various shapes and dimensions were readily developed over a very large area on a 4 in. wafer, allowing for fabrication of large-scale printed arrays of Fe-FETs with highly uniform device performance. We statistically analyzed the memory properties of Fe-FETs, including ON/OFF ratio, operation voltage, retention, and endurance, as a function of the micropattern dimensions of the semiconducting films. Furthermore, roll-up memory arrays were produced by successfully detaching large-area Fe-FETs printed on a flexible substrate with a transient adhesive layer from a hard substrate and subsequently transferring them to a nonplanar surface. PMID:24070419

  6. Low-field Switching Four-state Nonvolatile Memory Based on Multiferroic Tunnel Junctions

    PubMed Central

    Yau, H. M.; Yan, Z. B.; Chan, N. Y.; Au, K.; Wong, C. M.; Leung, C. W.; Zhang, F.Y.; Gao, X. S.; Dai, J. Y.

    2015-01-01

    Multiferroic tunneling junction based four-state non-volatile memories are very promising for future memory industry since this kind of memories hold the advantages of not only the higher density by scaling down memory cell but also the function of magnetically written and electrically reading. In this work, we demonstrate a success of this four-state memory in a material system of NiFe/BaTiO3/La0.7Sr0.3MnO3 with improved memory characteristics such as lower switching field and larger tunneling magnetoresistance (TMR). Ferroelectric switching induced resistive change memory with OFF/ON ratio of 16 and 0.3% TMR effect have been achieved in this multiferroic tunneling structure. PMID:26239505

  7. Low-field Switching Four-state Nonvolatile Memory Based on Multiferroic Tunnel Junctions.

    PubMed

    Yau, H M; Yan, Z B; Chan, N Y; Au, K; Wong, C M; Leung, C W; Zhang, F Y; Gao, X S; Dai, J Y

    2015-01-01

    Multiferroic tunneling junction based four-state non-volatile memories are very promising for future memory industry since this kind of memories hold the advantages of not only the higher density by scaling down memory cell but also the function of magnetically written and electrically reading. In this work, we demonstrate a success of this four-state memory in a material system of NiFe/BaTiO3/La0.7Sr0.3MnO3 with improved memory characteristics such as lower switching field and larger tunneling magnetoresistance (TMR). Ferroelectric switching induced resistive change memory with OFF/ON ratio of 16 and 0.3% TMR effect have been achieved in this multiferroic tunneling structure. PMID:26239505

  8. Flexible non-volatile memory devices based on organic semiconductors

    NASA Astrophysics Data System (ADS)

    Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa

    2015-09-01

    The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.

  9. Integrated all-photonic non-volatile multi-level memory

    NASA Astrophysics Data System (ADS)

    Ríos, Carlos; Stegmaier, Matthias; Hosseini, Peiman; Wang, Di; Scherer, Torsten; Wright, C. David; Bhaskaran, Harish; Pernice, Wolfram H. P.

    2015-11-01

    Implementing on-chip non-volatile photonic memories has been a long-term, yet elusive goal. Photonic data storage would dramatically improve performance in existing computing architectures by reducing the latencies associated with electrical memories and potentially eliminating optoelectronic conversions. Furthermore, multi-level photonic memories with random access would allow for leveraging even greater computational capability. However, photonic memories have thus far been volatile. Here, we demonstrate a robust, non-volatile, all-photonic memory based on phase-change materials. By using optical near-field effects, we realize bit storage of up to eight levels in a single device that readily switches between intermediate states. Our on-chip memory cells feature single-shot readout and switching energies as low as 13.4 pJ at speeds approaching 1 GHz. We show that individual memory elements can be addressed using a wavelength multiplexing scheme. Our multi-level, multi-bit devices provide a pathway towards eliminating the von Neumann bottleneck and portend a new paradigm in all-photonic memory and non-conventional computing.

  10. Nonvolatile organic thin film transistor memory devices based on hybrid nanocomposites of semiconducting polymers: gold nanoparticles.

    PubMed

    Chang, Hsuan-Chun; Liu, Cheng-Liang; Chen, Wen-Chang

    2013-12-26

    We report the facile fabrication and characteristics of organic thin film transistor (OTFT)-based nonvolatile memory devices using the hybrid nanocomposites of semiconducting poly(9,9-dioctylfluorene-alt-bithiophene) (F8T2) and ligand-capped Au nanoparticles (NPs), thereby serving as a charge storage medium. Electrical bias sweep/excitation effectively modulates the current response of hybrid memory devices through the charge transfer between F8T2 channel and functionalized Au NPs trapping sites. The electrical performance of the hybrid memory devices can be effectively controlled though the loading concentrations (0-9 %) of Au NPs and organic thiolate ligands on Au NP surfaces with different carbon chain lengths (Au-L6, Au-L10, and Au-L18). The memory window induced by voltage sweep is considerably increased by the high content of Au NPs or short carbon chain on the ligand. The hybrid nanocomposite of F8T2:9% Au-L6 provides the OTFT memories with a memory window of ~41 V operated at ± 30 V and memory ratio of ~1 × 10(3) maintained for 1 × 10(4) s. The experimental results suggest that the hybrid materials of the functionalized Au NPs in F8T2 matrix have the potential applications for low voltage-driven high performance nonvolatile memory devices. PMID:24224739

  11. Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory

    PubMed Central

    Ng, Tse Nga; Schwartz, David E.; Lavery, Leah L.; Whiting, Gregory L.; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

    2012-01-01

    Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic. PMID:22900143

  12. Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory.

    PubMed

    Ng, Tse Nga; Schwartz, David E; Lavery, Leah L; Whiting, Gregory L; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

    2012-01-01

    Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic. PMID:22900143

  13. Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

    SciTech Connect

    Han, Jinhua; Wang, Wei Ying, Jun; Xie, Wenfa

    2014-01-06

    An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

  14. Integration of Flexible and Microscale Organic Nonvolatile Resistive Memory Devices Using Orthogonal Photolithography.

    PubMed

    Song, Younggul; Jang, Jingon; Yoo, Daekyoung; Jung, Seok-Heon; Jeong, Hyunhak; Hong, Seunghun; Lee, Jin-Kyun; Lee, Takhee

    2016-06-01

    We present the integration of flexible and microscale organic nonvolatile resistive memory devices fabricated in a cross-bar array structure on plastic substrates. This microscale integration was made via orthogonal photolithography method using fluorinated photoresist and solvents and was achieved without causing damage to the underlying organic memory materials. Our flexible microscale organic devices exhibited high ON/OFF ratio (I(ON/I(OFF) > 10(4)) under bending conditions. In addition, the ON and OFF states of our flexible and microscale memory devices were maintained for 10,000 seconds without any serious degradation. PMID:27427716

  15. Organic field-effect transistor nonvolatile memories based on hybrid nano-floating-gate

    NASA Astrophysics Data System (ADS)

    Gao, Xu; She, Xiao-Jian; Liu, Chang-Hai; Sun, Qi-Jun; Liu, Jie; Wang, Sui-Dong

    2013-01-01

    High performance organic field-effect transistor nonvolatile memory is achieved by integrating gold nanoparticles and graphene oxide sheets as the hybrid nano-floating-gate. The device shows a large memory window of about 40 V, high ON/OFF ratio of reading current over 104, excellent programming/erasing endurance, and retention ability. The hybrid nano-floating-gate can increase the density of charge trapping sites, which are electrically separate from each other and thus suppress the stored charge leakage. The memory window is increased under illumination, and the results indicate that the photon-generated carriers facilitate the electron trapping but have almost no effect on the hole trapping.

  16. Numerical simulation study of organic nonvolatile memory with polysilicon floating gate

    NASA Astrophysics Data System (ADS)

    Zhao-wen, Yan; Jiao, Wang; Jian-li, Qiao; Wen-jie, Chen; Pan, Yang; Tong, Xiao; Jian-hong, Yang

    2016-06-01

    A polysilicon-based organic nonvolatile floating-gate memory device with a bottom-gate top-contact configuration is investigated, in which polysilicon is sandwiched between oxide layers as a floating gate. Simulations for the electrical characteristics of the polysilicon floating gate-based memory device are performed. The shifted transfer characteristics and corresponding charge trapping mechanisms during programing and erasing (P/E) operations at various P/E voltages are discussed. The simulated results show that present memory exhibits a large memory window of 57.5 V, and a high read current on/off ratio of ≈ 103. Compared with the reported experimental results, these simulated results indicate that the polysilicon floating gate based memory device demonstrates remarkable memory effects, which shows great promise in device designing and practical application.

  17. Metal-organic molecular device for non-volatile memory storage

    SciTech Connect

    Radha, B. E-mail: kulkarni@jncasr.ac.in; Sagade, Abhay A.; Kulkarni, G. U. E-mail: kulkarni@jncasr.ac.in

    2014-08-25

    Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organic complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.

  18. Metal-organic molecular device for non-volatile memory storage

    NASA Astrophysics Data System (ADS)

    Radha, B.; Sagade, Abhay A.; Kulkarni, G. U.

    2014-08-01

    Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organic complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.

  19. Flexible Nonvolatile Polymer Memory Array on Plastic Substrate via Initiated Chemical Vapor Deposition.

    PubMed

    Jang, Byung Chul; Seong, Hyejeong; Kim, Sung Kyu; Kim, Jong Yun; Koo, Beom Jun; Choi, Junhwan; Yang, Sang Yoon; Im, Sung Gap; Choi, Sung-Yool

    2016-05-25

    Resistive random access memory based on polymer thin films has been developed as a promising flexible nonvolatile memory for flexible electronic systems. Memory plays an important role in all modern electronic systems for data storage, processing, and communication; thus, the development of flexible memory is essential for the realization of flexible electronics. However, the existing solution-processed, polymer-based RRAMs have exhibited serious drawbacks in terms of the uniformity, electrical stability, and long-term stability of the polymer thin films. Here, we present poly(1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane) (pV3D3)-based RRAM arrays fabricated via the solvent-free technique called initiated chemical vapor deposition (iCVD) process for flexible memory application. Because of the outstanding chemical stability of pV3D3 films, the pV3D3-RRAM arrays can be fabricated by a conventional photolithography process. The pV3D3-RRAM on flexible substrates showed unipolar resistive switching memory with an on/off ratio of over 10(7), stable retention time for 10(5) s, excellent cycling endurance over 10(5) cycles, and robust immunity to mechanical stress. In addition, pV3D3-RRAMs showed good uniformity in terms of device-to-device distribution. The pV3D3-RRAM will pave the way for development of next-generation flexible nonvolatile memory devices. PMID:27142537

  20. Non-volatile memory elements based on the intercalation of organic molecules inside carbon nanotubes

    SciTech Connect

    Meunier, Vincent; Kalinin, Sergei V; Sumpter, Bobby G

    2007-01-01

    We propose a novel class of non-volatile memory elements based on the modification of the transport properties of a conducting carbon nanotube by the presence of a guest molecule having multiple stable orientational states relative to the nanotube that correspond to conducting and non-conducting states. The mechanism, governed by a local gating effect of the molecule on the electronic properties of the nanotube host, is studied using density functional theory. The mechanisms of reversible reading and writing of information are illustrated with a F4 TCNQ molecule encap-sulated inside a metallic carbon nanotube. Our results suggest that this new type of non-volatile memory element is robust, fatigue-free, and can operate at room temperature.

  1. A fast and low-power microelectromechanical system-based non-volatile memory device

    PubMed Central

    Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E. B.; Park, Yung Woo

    2011-01-01

    Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559

  2. A fast and low-power microelectromechanical system-based non-volatile memory device.

    PubMed

    Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E B; Park, Yung Woo

    2011-01-01

    Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559

  3. Fabrication, characterization and simulation of high performance Si nanowire-based non-volatile memory cells

    NASA Astrophysics Data System (ADS)

    Zhu, Xiaoxiao; Li, Qiliang; Ioannou, Dimitris E.; Gu, Diefeng; Bonevich, John E.; Baumgart, Helmut; Suehle, John S.; Richter, Curt A.

    2011-06-01

    We report the fabrication, characterization and simulation of Si nanowire SONOS-like non-volatile memory with HfO2 charge trapping layers of varying thicknesses. The memory cells, which are fabricated by self-aligning in situ grown Si nanowires, exhibit high performance, i.e. fast program/erase operations, long retention time and good endurance. The effect of the trapping layer thickness of the nanowire memory cells has been experimentally measured and studied by simulation. As the thickness of HfO2 increases from 5 to 30 nm, the charge trap density increases as expected, while the program/erase speed and retention remain the same. These data indicate that the electric field across the tunneling oxide is not affected by HfO2 thickness, which is in good agreement with simulation results. Our work also shows that the Omega gate structure improves the program speed and retention time for memory applications.

  4. Progress on a New Non-Volatile Memory for Space Based on Chalcogenide Glass

    SciTech Connect

    Maimon, J.; Hunt, K.; Rodgers, J.; Burcin, L.; Knowles, K.

    2004-02-04

    We report on the progress of a recent addition to non-volatile solid state memory technologies suited for space and other ionizing radiation environments. We summarize the material and processing science behind the current generation of chalcogenide phase-change memories fabricated on CMOS structures. The chalcogenide material used for phase-change applications in rewritable optical storage (Ge2Sb2Te5) has been integrated with a radiation hardened CMOS process to produce 64kbit memory arrays. On selected arrays electrical testing demonstrated up to 100% memory cell yield, 100ns programming and read speeds, and write currents as low as 1mA/bit. Devices functioned normally from - 55 deg. C to 125 deg. C. Write/read endurance has been demonstrated to 1 x 108 before first bit failure. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase-change material. Future applications of the technology are discussed.

  5. Low-cost fabrication of ternary CuInSe{sub 2} nanocrystals by colloidal route using a novel combination of volatile and non-volatile capping agents

    SciTech Connect

    Chawla, Parul; Narain Sharma, Shailesh Singh, Son

    2014-11-15

    Wet-route synthesis of CuInSe{sub 2} (CISe) nanocrystals has been envisaged with the utilization of the unique combination of coordinating ligand and non coordinating solvent. Our work demonstrates the formation of a single-phase, nearly stoichiometric and monodispersive, stable and well-passivated colloidal ternary CISe nanocrystals (band gap (E{sub g})∼1.16 eV) using a novel combination of ligands; viz. volatile arylamine aniline and non-volatile solvent 1-octadecene. The synthesis and growth conditions have been manoeuvred using the colligative properties of the mixture and thus higher growth temperature (∼250 °C) could be attained that promoted larger grain growth. The beneficial influence of the capping agents (aniline and 1-octadecene) on the properties of chalcopyrite nanocrystals has enabled us to pictorally model the structural, morphological and optoelectronic aspects of CISe nanoparticles. - Graphical abstract: Without resorting to any post-selenization process and using the colligative properties of the mixture comprising of volatile aniline and non-volatile 1-octadecene to manoeuvre the growth conditions to promote Ostwald ripening, a single phase, monodispersive and nearly stoichiometric ternary CISe nanocrystals are formed by wet-synthesis route. - Highlights: • Wet-route synthesis of CISe nanocrystals reported without post-selenization process. • Single-phase, stable and well-passivated colloidal ternary CISe nanocrystals formed. • Novel combination of capping agents: volatile aniline and non-volatile 1-octadecene. • Higher growth temperature attained using the colligative properties of the mixture. • Metallic salts presence explains exp. and theoretical boiling point difference.

  6. Highly scalable non-volatile and ultra-low-power phase-change nanowire memory.

    PubMed

    Lee, Se-Ho; Jung, Yeonwoong; Agarwal, Ritesh

    2007-10-01

    The search for a universal memory storage device that combines rapid read and write speeds, high storage density and non-volatility is driving the exploration of new materials in nanostructured form. Phase-change materials, which can be reversibly switched between amorphous and crystalline states, are promising in this respect, but top-down processing of these materials into nanostructures often damages their useful properties. Self-assembled nanowire-based phase-change material memory devices offer an attractive solution owing to their sub-lithographic sizes and unique geometry, coupled with the facile etch-free processes with which they can be fabricated. Here, we explore the effects of nanoscaling on the memory-storage capability of self-assembled Ge2Sb2Te5 nanowires, an important phase-change material. Our measurements of write-current amplitude, switching speed, endurance and data retention time in these devices show that such nanowires are promising building blocks for non-volatile scalable memory and may represent the ultimate size limit in exploring current-induced phase transition in nanoscale systems. PMID:18654387

  7. Single-Wall Carbon Nanotube Field Effect Transistors with Non-Volatile Memory Operation

    NASA Astrophysics Data System (ADS)

    Sakurai, Tatsuya; Yoshimura, Takeshi; Akita, Seiji; Fujimura, Norifumi; Nakayama, Yoshikazu

    2006-10-01

    We describe the fabrication and electrical characteristics of single-wall carbon-nanotubes field-effect transistors (CNT-FETs) with a non-volatile memory function using ferroelectric thin films as gate insulators. The ferroelectric-gate CNT-FETs were fabricated using single-wall CNTs synthesized from alcohol by catalytic chemical vapor deposition and sol-gel derived PbZr0.5Ti0.5O3 thin films. The ferroelectric-gate CNT-FETs showed modulation of the drain current with the gate voltage and the threshold voltage shift (memory window) on the drain current-gate voltage characteristics. Moreover, the memory window was saturated around 1.1 V as the gate voltage sweeping range increased. These results indicate that carriers in CNTs are controlled by spontaneous polarization of the ferroelectric films. Because ferroelectrics exhibit complex couplings between their electrical, structural, mechanical, thermal, and optical properties, and because CNTs have unique mechanical and electrical properties, ferroelectric-gate CNT-FETs offer promise as potentially useful nanoelectronics devices not only for non-volatile memory elements but also for high-sensitivity sensors.

  8. High performance nonvolatile memory devices based on Cu2-xSe nanowires

    NASA Astrophysics Data System (ADS)

    Wu, Chun-Yan; Wu, Yi-Liang; Wang, Wen-Jian; Mao, Dun; Yu, Yong-Qiang; Wang, Li; Xu, Jun; Hu, Ji-Gang; Luo, Lin-Bao

    2013-11-01

    We report on the rational synthesis of one-dimensional Cu2-xSe nanowires (NWs) via a solution method. Electrical analysis of Cu2-xSe NWs based memory device exhibits a stable and reproducible bipolar resistive switching behavior with a low set voltage (0.3-0.6 V), which can enable the device to write and erase data efficiently. Remarkably, the memory device has a record conductance switching ratio of 108, much higher than other devices ever reported. At last, a conducting filaments model is introduced to account for the resistive switching behavior. The totality of this study suggests that the Cu2-xSe NWs are promising building blocks for fabricating high-performance and low-consumption nonvolatile memory devices.

  9. Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2012

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Allen, Gregory R.

    2012-01-01

    The space radiation environment poses a certain risk to all electronic components on Earth-orbiting and planetary mission spacecraft. In recent years, there has been increased interest in the use of high-density, commercial, nonvolatile flash memories in space because of ever-increasing data volumes and strict power requirements. They are used in a wide variety of spacecraft subsystems. At one end of the spectrum, flash memories are used to store small amounts of mission-critical data such as boot code or configuration files and, at the other end, they are used to construct multi-gigabyte data recorders that record mission science data. This report examines single-event effect (SEE) and total ionizing dose (TID) response in single-level cell (SLC) 32-Gb, multi-level cell (MLC) 64-Gb, and Triple-level (TLC) 64-Gb NAND flash memories manufactured by Micron Technology with feature size of 25 nm.

  10. Nonvolatile memory cells based on MoS2/graphene heterostructures.

    PubMed

    Bertolazzi, Simone; Krasnozhon, Daria; Kis, Andras

    2013-04-23

    Memory cells are an important building block of digital electronics. We combine here the unique electronic properties of semiconducting monolayer MoS2 with the high conductivity of graphene to build a 2D heterostructure capable of information storage. MoS2 acts as a channel in an intimate contact with graphene electrodes in a field-effect transistor geometry. Our prototypical all-2D transistor is further integrated with a multilayer graphene charge trapping layer into a device that can be operated as a nonvolatile memory cell. Because of its band gap and 2D nature, monolayer MoS2 is highly sensitive to the presence of charges in the charge trapping layer, resulting in a factor of 10(4) difference between memory program and erase states. The two-dimensional nature of both the contact and the channel can be harnessed for the fabrication of flexible nanoelectronic devices with large-scale integration. PMID:23510133

  11. Non-volatile resistive memory devices based on solution-processed ultrathin two-dimensional nanomaterials.

    PubMed

    Tan, Chaoliang; Liu, Zhengdong; Huang, Wei; Zhang, Hua

    2015-05-01

    Ultrathin two-dimensional (2D) nanomaterials, such as graphene and MoS2, hold great promise for electronics and optoelectronics due to their distinctive physical and electronic properties. Recent progress in high-yield, massive production of ultrathin 2D nanomaterials via various solution-based methods allows them to be easily integrated into electronic devices via solution processing techniques. Non-volatile resistive memory devices based on ultrathin 2D nanomaterials have been emerging as promising alternatives for the next-generation data storage devices due to their high flexibility, three-dimensional-stacking capability, simple structure, transparency, easy fabrication and low cost. In this tutorial review, we will summarize the recent progress in the utilization of solution-processed ultrathin 2D nanomaterials for fabrication of non-volatile resistive memory devices. Moreover, we demonstrate how to achieve excellent device performance by engineering the active layers, electrodes and/or device structure of resistive memory devices. On the basis of current status, the discussion is concluded with some personal insights into the challenges and opportunities in future research directions. PMID:25877687

  12. Characteristics of a Nonvolatile SRAM Memory Cell Utilizing a Ferroelectric Transistor

    NASA Technical Reports Server (NTRS)

    Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

    2011-01-01

    The SRAM cell circuit is a standard for volatile data storage. When utilizing one or more ferroelectric transistors, the hysteresis characteristics give unique properties to the SRAM circuit, providing for investigation into the development of a nonvolatile memory cell. This paper discusses various formations of the SRAM circuit, using ferroelectric transistors, n-channel and p-channel MOSFETs, and resistive loads. With varied source and supply voltages, the effects on the timing and retention characteristics are investigated, including retention times of up to 24 hours.

  13. Fully transparent nonvolatile memory employing amorphous oxides as charge trap and transistor's channel layer

    NASA Astrophysics Data System (ADS)

    Yin, Huaxiang; Kim, Sunil; Kim, Chang Jung; Song, Ihun; Park, Jaechul; Kim, Sangwook; Park, Youngsoo

    2008-10-01

    A fully transparent nonvolatile memory with the conventional sandwich gate insulator structure was demonstrated. Wide band gap amorphous GaInZnO (a-GIZO) thin films were employed as both the charge trap layer and the transistor channel layer. An excellent program window of 3.5 V with a stressing time of 100 ms was achieved through the well-known Fowler-Nordheim tunneling method. Due to the similar energy levels extracted from the experimental data, the asymmetrical program/erase characteristics are believed to be the result of the strong trapping of the injected negative charges in the shallow donor levels of the GIZO film.

  14. Wearable non-volatile memory devices based on topological insulator Bi2Se3/Pt fibers

    NASA Astrophysics Data System (ADS)

    Zhang, Xiaoyan; Wen, Fusheng; Xiang, Jianyong; Wang, Xiaochen; Wang, Limin; Hu, Wentao; Liu, Zhongyuan

    2015-09-01

    Pt fibers (15 μm) were coated with topological insulator Bi2Se3 nanoplates via a single mode microwave-assisted synthesis technique. With the Bi2Se3/Pt fibers, flexible memory devices were facilely assembled, and they were demonstrated to exhibit rewritable nonvolatile resistive switching characteristics of low switching voltage (-1.2 V and +0.7 V), high ON/OFF current ratio (106), and good retention (4500 s), showing the potential application in data storage. The resistive switching mechanism was analyzed on the bases of formation and rupture of conductive filaments.

  15. Hybrid Flexible Resistive Random Access Memory-Gated Transistor for Novel Nonvolatile Data Storage.

    PubMed

    Han, Su-Ting; Zhou, Ye; Chen, Bo; Wang, Chundong; Zhou, Li; Yan, Yan; Zhuang, Jiaqing; Sun, Qijun; Zhang, Hua; Roy, V A L

    2016-01-20

    Here, a single-device demonstration of novel hybrid architecture is reported to achieve programmable transistor nodes which have analogies to flash memory by incorporating a resistive switching random access memory (RRAM) device as a resistive switch gate for field effect transistor (FET) on a flexible substrate. A high performance flexible RRAM with a three-layered structure is fabricated by utilizing solution-processed MoS2 nanosheets sandwiched between poly(methyl methacrylate) polymer layers. Gate coupling with the pentacene-based transistor can be controlled by the RRAM memory state to produce a nonprogrammed state (inactive) and a programmed state (active) with a well-defined memory window. Compared to the reference flash memory device based on the MoS2 floating gate, the hybrid device presents robust access speed and retention ability. Furthermore, the hybrid RRAM-gated FET is used to build an integrated logic circuit and a wide logic window in inverter logic is achieved. The controllable, well-defined memory window, long retention time, and fast access speed of this novel hybrid device may open up new possibilities of realizing fully functional nonvolatile memory for high-performance flexible electronics. PMID:26578160

  16. Non-volatile memory devices with redox-active diruthenium molecular compound.

    PubMed

    Pookpanratana, S; Zhu, H; Bittle, E G; Natoli, S N; Ren, T; Richter, C A; Li, Q; Hacker, C A

    2016-03-01

    Reduction-oxidation (redox) active molecules hold potential for memory devices due to their many unique properties. We report the use of a novel diruthenium-based redox molecule incorporated into a non-volatile Flash-based memory device architecture. The memory capacitor device structure consists of a Pd/Al2O3/molecule/SiO2/Si structure. The bulky ruthenium redox molecule is attached to the surface by using a 'click' reaction and the monolayer structure is characterized by x-ray photoelectron spectroscopy to verify the Ru attachment and molecular density. The 'click' reaction is particularly advantageous for memory applications because of (1) ease of chemical design and synthesis, and (2) provides an additional spatial barrier between the oxide/silicon to the diruthenium molecule. Ultraviolet photoelectron spectroscopy data identified the energy of the electronic levels of the surface before and after surface modification. The molecular memory devices display an unsaturated charge storage window attributed to the intrinsic properties of the redox-active molecule. Our findings demonstrate the strengths and challenges with integrating molecular layers within solid-state devices, which will influence the future design of molecular memory devices. PMID:26871549

  17. Non-volatile memory devices with redox-active diruthenium molecular compound

    NASA Astrophysics Data System (ADS)

    Pookpanratana, S.; Zhu, H.; Bittle, E. G.; Natoli, S. N.; Ren, T.; Richter, C. A.; Li, Q.; Hacker, C. A.

    2016-03-01

    Reduction-oxidation (redox) active molecules hold potential for memory devices due to their many unique properties. We report the use of a novel diruthenium-based redox molecule incorporated into a non-volatile Flash-based memory device architecture. The memory capacitor device structure consists of a Pd/Al2O3/molecule/SiO2/Si structure. The bulky ruthenium redox molecule is attached to the surface by using a ‘click’ reaction and the monolayer structure is characterized by x-ray photoelectron spectroscopy to verify the Ru attachment and molecular density. The ‘click’ reaction is particularly advantageous for memory applications because of (1) ease of chemical design and synthesis, and (2) provides an additional spatial barrier between the oxide/silicon to the diruthenium molecule. Ultraviolet photoelectron spectroscopy data identified the energy of the electronic levels of the surface before and after surface modification. The molecular memory devices display an unsaturated charge storage window attributed to the intrinsic properties of the redox-active molecule. Our findings demonstrate the strengths and challenges with integrating molecular layers within solid-state devices, which will influence the future design of molecular memory devices.

  18. High speed switching in quantum Dot/Ti-TiOx nonvolatile memory device

    NASA Astrophysics Data System (ADS)

    Kannan, V.; Kim, Hyun-Seok; Park, Hyun-Chang

    2016-03-01

    We report a Ti-TiOx/CdSe-ZnS core-shell quantum dot based bipolar nonvolatile resistive memory device. The device exhibits an ON/OFF ratio of 100 and is reproducible. The memory device showed good retention characteristics under stress and excellent stability even after 100,000 cycles of switching operation. The switching speed measured was around 15 ns. The devices are solution processed at room temperature in ambient atmosphere. The operating mechanism is discussed based on charge trapping in quantum dots resulting in the Coulomb blockade effect with a ZnS shell layer and metal-oxide layer acting as the barrier to confine the trapped charges. The proposed mechanism is validated by a three terminal device designed exclusively for this purpose. [Figure not available: see fulltext.

  19. An embedded nonvolatile memory cell with spacer floating gate for power management integrated circuit applications

    NASA Astrophysics Data System (ADS)

    Na, Kee-Yeol; Baek, Ki-Ju; Lee, Gun-Woong; Kim, Yeong-Seuk

    2013-08-01

    This paper describes a simple nonvolatile memory cell with a poly-Si spacer floating gate for power management integrated circuit applications. The proposed memory cell is fabricated using a 0.35 μm double-poly high-voltage CMOS process which includes PIP capacitor, LV (5 V), and HV (20 V) CMOS devices. The floating gates of the proposed cell are buried under a LDD spacer oxide; thus the unit cell can be scaled easily in the channel length direction. In addition, any extra photo masking step is not required for the proposed cell in the applied fabrication process. The proposed cell shows an acceptable threshold voltage window of up to 104 cycles and less than 2% threshold voltage shifts in an 85 °C retention test.

  20. Physical implication of transition voltage in organic nano-floating-gate nonvolatile memories

    NASA Astrophysics Data System (ADS)

    Wang, Shun; Gao, Xu; Zhong, Ya-Nan; Zhang, Zhong-Da; Xu, Jian-Long; Wang, Sui-Dong

    2016-07-01

    High-performance pentacene-based organic field-effect transistor nonvolatile memories, using polystyrene as a tunneling dielectric and Au nanoparticles as a nano-floating-gate, show parallelogram-like transfer characteristics with a featured transition point. The transition voltage at the transition point corresponds to a threshold electric field in the tunneling dielectric, over which stored electrons in the nano-floating-gate will start to leak out. The transition voltage can be modulated depending on the bias configuration and device structure. For p-type active layers, optimized transition voltage should be on the negative side of but close to the reading voltage, which can simultaneously achieve a high ON/OFF ratio and good memory retention.

  1. Hot Carrier Trapping Induced Negative Photoconductance in InAs Nanowires toward Novel Nonvolatile Memory.

    PubMed

    Yang, Yiming; Peng, Xingyue; Kim, Hong-Seok; Kim, Taeho; Jeon, Sanghun; Kang, Hang Kyu; Choi, Wonjun; Song, Jindong; Doh, Yong-Joo; Yu, Dong

    2015-09-01

    We report a novel negative photoconductivity (NPC) mechanism in n-type indium arsenide nanowires (NWs). Photoexcitation significantly suppresses the conductivity with a gain up to 10(5). The origin of NPC is attributed to the depletion of conduction channels by light assisted hot electron trapping, supported by gate voltage threshold shift and wavelength-dependent photoconductance measurements. Scanning photocurrent microscopy excludes the possibility that NPC originates from the NW/metal contacts and reveals a competing positive photoconductivity. The conductivity recovery after illumination substantially slows down at low temperature, indicating a thermally activated detrapping mechanism. At 78 K, the spontaneous recovery of the conductance is completely quenched, resulting in a reversible memory device, which can be switched by light and gate voltage pulses. The novel NPC based optoelectronics may find exciting applications in photodetection and nonvolatile memory with low power consumption. PMID:26226506

  2. Nonvolatile memories by using charge traps in silicon-rich oxides

    NASA Astrophysics Data System (ADS)

    Lim, Keun Yong; Kim, Min Choul; Hong, Seung Hui; Choi, Suk-Ho; Kim, Kyung Joong

    2010-08-01

    The nonvolatile memory characteristics of silicon-rich oxide (SRO, SiOx) grown at room temperature for charge-trapping layer are first reported and shown to exhibit a strong dependence on oxygen content (x). The memory window that is estimated by capacitance-voltage curves monotonically decreases with increasing x from 1.0 to 1.8, possibly resulting from the x-dependent variation in the Si suboxide states responsible for the charge traps, as evidenced by x-ray photoelectron spectroscopy. The density of the charge traps is estimated to be (3.9-8.8)×1012 cm-2 for x=1.0-1.4. The charge-loss rate sharply decreases at x=1.2, but by further increase in x above 1.2, it gradually increases, which can be explained by the lowered SRO/SiO2 barrier due to the increased optical band gap of SRO at larger x

  3. Resistive switching behavior of reduced graphene oxide memory cells for low power nonvolatile device application

    PubMed Central

    Pradhan, Sangram K.; Xiao, Bo; Mishra, Saswat; Killam, Alex; Pradhan, Aswini K.

    2016-01-01

    Graphene Oxide (GO) based low cost flexible electronics and memory cell have recently attracted more attention for the fabrication of emerging electronic devices. As a suitable candidate for resistive random access memory technology, reduced graphene oxide (RGO) can be widely used for non-volatile switching memory applications because of its large surface area, excellent scalability, retention, and endurance properties. We demonstrated that the fabricated metal/RGO/metal memory device exhibited excellent switching characteristics, with on/off ratio of two orders of magnitude and operated threshold switching voltage of less than 1 V. The studies on different cell diameter, thickness, scan voltages and period of time corroborate the reliability of the device as resistive random access memory. The microscopic origin of switching operation is governed by the establishment of conducting filaments due to the interface amorphous layer rupturing and the movement of oxygen in the GO layer. This interesting experimental finding indicates that device made up of thermally reduced GO shows more reliability for its use in next generation electronics devices. PMID:27240537

  4. Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations

    NASA Astrophysics Data System (ADS)

    Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki

    2016-01-01

    Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.

  5. Vertically Stackable Novel One-Time Programmable Nonvolatile Memory Devices Based on Dielectric Breakdown Mechanism

    NASA Astrophysics Data System (ADS)

    Cho, Seongjae; Lee, Jung Hoon; Ryoo, Kyung-Chang; Jung, Sunghun; Lee, Jong-Ho; Park, Byung-Gook

    2011-12-01

    In this paper, a novel one-time programmable (OTP) nonvolatile memory (NVM) device and its array structures based on silicon technology are proposed. There have been many features of OTP NVM devices utilizing various combinations of channel, breakdown region, barrier, and contact materials. However, this invention can be realized by simple materials and fabrication methods: it is silicon-based materials and fully compatible with the conventional CMOS process. An individual memory cell is a silicon diode vertically integrated. Historically, OTP memories were widely used for read-only-memory (ROM) in the central processing unit (CPU) of the computer systems. By implanting the nanoscale fabrication technology into the concept of OTP memory, innovative high-density NVM appliances for massive storage media becomes very promising. The program operation is performed by breaking down the thin oxide layer between pn doped structure and wordline (WL) and its state can be sensed by the leakage current through the broken oxide. Since this invention is based on neither transistor structure nor charge-based mechanism, it is highly reliable and functional for the ultra-large scale integration. The feasibility of its stacked array will be also checked.

  6. Graphene–ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations

    PubMed Central

    Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki

    2016-01-01

    Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer. PMID:26813710

  7. Quasi-unipolar pentacene films embedded with fullerene for non-volatile organic transistor memories

    SciTech Connect

    Lee, Juhee; Lee, Sungpyo; Lee, Moo Hyung; Kang, Moon Sung

    2015-02-09

    Quasi-unipolar non-volatile organic transistor memory (NOTM) can combine the best characteristics of conventional unipolar and ambipolar NOTMs and, as a result, exhibit improved device performance. Unipolar NOTMs typically exhibit a large signal ratio between the programmed and erased current signals but also require a large voltage to program and erase the memory cells. Meanwhile, an ambipolar NOTM can be programmed and erased at lower voltages, but the resulting signal ratio is small. By embedding a discontinuous n-type fullerene layer within a p-type pentacene film, quasi-unipolar NOTMs are fabricated, of which the signal storage utilizes both electrons and holes while the electrical signal relies on only hole conduction. These devices exhibit superior memory performance relative to both pristine unipolar pentacene devices and ambipolar fullerene/pentacene bilayer devices. The quasi-unipolar NOTM exhibited a larger signal ratio between the programmed and erased states while also reducing the voltage required to program and erase a memory cell. This simple approach should be readily applicable for various combinations of advanced organic semiconductors that have been recently developed and thereby should make a significant impact on organic memory research.

  8. Resistive switching behavior of reduced graphene oxide memory cells for low power nonvolatile device application

    NASA Astrophysics Data System (ADS)

    Pradhan, Sangram K.; Xiao, Bo; Mishra, Saswat; Killam, Alex; Pradhan, Aswini K.

    2016-05-01

    Graphene Oxide (GO) based low cost flexible electronics and memory cell have recently attracted more attention for the fabrication of emerging electronic devices. As a suitable candidate for resistive random access memory technology, reduced graphene oxide (RGO) can be widely used for non-volatile switching memory applications because of its large surface area, excellent scalability, retention, and endurance properties. We demonstrated that the fabricated metal/RGO/metal memory device exhibited excellent switching characteristics, with on/off ratio of two orders of magnitude and operated threshold switching voltage of less than 1 V. The studies on different cell diameter, thickness, scan voltages and period of time corroborate the reliability of the device as resistive random access memory. The microscopic origin of switching operation is governed by the establishment of conducting filaments due to the interface amorphous layer rupturing and the movement of oxygen in the GO layer. This interesting experimental finding indicates that device made up of thermally reduced GO shows more reliability for its use in next generation electronics devices.

  9. Resistive switching behavior of reduced graphene oxide memory cells for low power nonvolatile device application.

    PubMed

    Pradhan, Sangram K; Xiao, Bo; Mishra, Saswat; Killam, Alex; Pradhan, Aswini K

    2016-01-01

    Graphene Oxide (GO) based low cost flexible electronics and memory cell have recently attracted more attention for the fabrication of emerging electronic devices. As a suitable candidate for resistive random access memory technology, reduced graphene oxide (RGO) can be widely used for non-volatile switching memory applications because of its large surface area, excellent scalability, retention, and endurance properties. We demonstrated that the fabricated metal/RGO/metal memory device exhibited excellent switching characteristics, with on/off ratio of two orders of magnitude and operated threshold switching voltage of less than 1 V. The studies on different cell diameter, thickness, scan voltages and period of time corroborate the reliability of the device as resistive random access memory. The microscopic origin of switching operation is governed by the establishment of conducting filaments due to the interface amorphous layer rupturing and the movement of oxygen in the GO layer. This interesting experimental finding indicates that device made up of thermally reduced GO shows more reliability for its use in next generation electronics devices. PMID:27240537

  10. Design of a Photoactive Hybrid Bilayer Dielectric for Flexible Nonvolatile Organic Memory Transistors.

    PubMed

    Chen, Hongliang; Cheng, Nongyi; Ma, Wei; Li, Mingliang; Hu, Shuxin; Gu, Lin; Meng, Sheng; Guo, Xuefeng

    2016-01-26

    Organic field-effect transistors (OFETs) featuring a photoactive hybrid bilayer dielectric (PHBD) that comprises a self-assembled monolayer (SAM) of photochromic diarylethenes (DAEs) and an ultrathin solution-processed hafnium oxide layer are described here. We photoengineer the energy levels of DAE SAMs to facilitate the charging and discharging of the interface of the two dielectrics, thus yielding an OFET that functions as a nonvolatile memory device. The transistors use light signals for programming and electrical signals for erasing (≤3 V) to produce a large, reversible threshold-voltage shift with long retention times and good nondestructive signal processing ability. The memory effect can be exercised by more than 10(4) memory cycles. Furthermore, these memory cells have demonstrated the capacity to be arrayed into a photosensor matrix on flexible plastic substrates to detect the spatial distribution of a confined light and then store the analog sensor input as a two-dimensional image with high precision over a long period of time. PMID:26673624

  11. Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications

    NASA Astrophysics Data System (ADS)

    Jayanti, Srikant

    Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Integration of thin metal FGs and high-k dielectrics into a dual floating gate memory structure to result in both volatile and non-volatile modes of operation has been demonstrated, for plausible application in future unified memory architectures. The electrical characterization was performed on simple MIS/MIM and memory capacitors, fabricated through CMOS compatible processes. Various analytical characterization techniques were done to gain more insight into the material behavior of the layers in the device structure. In the first part of this study, interfacial engineering was investigated by exploring La2O3 as SiO2 scavenging layer. Through the silicate formation, the consumption of low-k SiO2 was controlled and resulted in a significant improvement in dielectric leakage. The performance improvement was also gauged through memory capacitors. In the second part of the study, a novel memory structure consisting of continuous metal FG

  12. Ordered arrays of a defect-modified ferroelectric polymer for non-volatile memory with minimized energy consumption

    NASA Astrophysics Data System (ADS)

    Chen, Xiang-Zhong; Chen, Xin; Guo, Xu; Cui, Yu-Shuang; Shen, Qun-Dong; Ge, Hai-Xiong

    2014-10-01

    Ferroelectric polymers are among the most promising materials for flexible electronic devices. Highly ordered arrays of the defect-modified ferroelectric polymer P(VDF-TrFE-CFE) (poly(vinylidene fluoride-trifluoroethylene-chlorofluoroethylene)) are fabricated by nanoimprint lithography for nonvolatile memory application. The defective CFE units reduce the coercive field to one-fifth of that of the un-modified P(VDF-TrFE), which can help minimize the energy consumption and extend the lifespan of the device. The nanoimprint process leads to preferable orientation of polymer chains and delicately controlled distribution of the defects, and thus a bi-stable polarization that makes the memory nonvolatile, as revealed by the pulsed polarization experiment.Ferroelectric polymers are among the most promising materials for flexible electronic devices. Highly ordered arrays of the defect-modified ferroelectric polymer P(VDF-TrFE-CFE) (poly(vinylidene fluoride-trifluoroethylene-chlorofluoroethylene)) are fabricated by nanoimprint lithography for nonvolatile memory application. The defective CFE units reduce the coercive field to one-fifth of that of the un-modified P(VDF-TrFE), which can help minimize the energy consumption and extend the lifespan of the device. The nanoimprint process leads to preferable orientation of polymer chains and delicately controlled distribution of the defects, and thus a bi-stable polarization that makes the memory nonvolatile, as revealed by the pulsed polarization experiment. Electronic supplementary information (ESI) available. See DOI: 10.1039/c4nr03866e

  13. A Compute Capable SSD Architecture for Next-Generation Non-volatile Memories

    SciTech Connect

    De, Arup

    2014-01-01

    Existing storage technologies (e.g., disks and ash) are failing to cope with the processor and main memory speed and are limiting the overall perfor- mance of many large scale I/O or data-intensive applications. Emerging fast byte-addressable non-volatile memory (NVM) technologies, such as phase-change memory (PCM), spin-transfer torque memory (STTM) and memristor are very promising and are approaching DRAM-like performance with lower power con- sumption and higher density as process technology scales. These new memories are narrowing down the performance gap between the storage and the main mem- ory and are putting forward challenging problems on existing SSD architecture, I/O interface (e.g, SATA, PCIe) and software. This dissertation addresses those challenges and presents a novel SSD architecture called XSSD. XSSD o oads com- putation in storage to exploit fast NVMs and reduce the redundant data tra c across the I/O bus. XSSD o ers a exible RPC-based programming framework that developers can use for application development on SSD without dealing with the complication of the underlying architecture and communication management. We have built a prototype of XSSD on the BEE3 FPGA prototyping system. We implement various data-intensive applications and achieve speedup and energy ef- ciency of 1.5-8.9 and 1.7-10.27 respectively. This dissertation also compares XSSD with previous work on intelligent storage and intelligent memory. The existing ecosystem and these new enabling technologies make this system more viable than earlier ones.

  14. Biomolecule nanoparticle-induced nanocomposites with resistive switching nonvolatile memory properties

    NASA Astrophysics Data System (ADS)

    Ko, Yongmin; Ryu, Sook Won; Cho, Jinhan

    2016-04-01

    Resistive switching behavior-based memory devices are considered promising candidates for next-generation data storage because of their simple structure configuration, low power consumption, and rapid operating speed. Here, the resistive switching nonvolatile memory properties of Fe2O3 nanocomposite (NC) films prepared from the thermal calcination of layer-by-layer (LbL) assembled ferritin multilayers were successfully investigated. For this study, negatively charged ferritin nanoparticles were alternately deposited onto the Pt-coated Si substrate with positively charged poly(allylamine hydrochloride) (PAH) by solution-based electrostatic LbL assembly, and the formed multilayers were thermally calcinated to obtain a homogeneous transition metal oxide NC film through the elimination of organic components, including the protein shell of ferritin. The formed memory device exhibits a stable ON/OFF current ratio of approximately 103, with nanosecond switching times under an applied external bias. In addition, these reversible switching properties were kept stable during the repeated cycling tests of above 200 cycles and a test period of approximately 105 s under atmosphere. These solution-based approaches can provide a basis for large-area inorganic nanoparticle-based electric devices through the design of bio-nanomaterials at the molecular level.

  15. Vacancy associates-rich ultrathin nanosheets for high performance and flexible nonvolatile memory device.

    PubMed

    Liang, Lin; Li, Kun; Xiao, Chong; Fan, Shaojuan; Liu, Jiao; Zhang, Wenshuai; Xu, Wenhui; Tong, Wei; Liao, Jiaying; Zhou, Yingying; Ye, Bangjiao; Xie, Yi

    2015-03-01

    On the road of innovation in modern information technology, resistive switching random access memory (RRAM) has been considered to be the best potential candidate to replace the conventional Si-based technologies. In fact, the key prerequisite of high storage density and low power consumption as well as flexibility for the tangible next generation of nonvolatile memories has stimulated extensive research into RRAM. Herein, we highlight an inorganic graphene analogue, ultrathin WO3·H2O nanosheets with only 2-3 nm thickness, as a promising material to construct a high performance and flexible RRAM device. The abundant vacancy associates in the ultrathin nanosheets, revealed by the positron annihilation spectra, act not only carrier reservoir to provide carriers but also capture center to trap the actived Cu(2+) for the formation of conductive filaments, which synergistically realize the resistive switching memory with low operating voltage (+1.0 V/-1.14 V) and large resistance ON/OFF ratio (>10(5)). This ultrathin-nanosheets-based RRAM device also shows long retention time (>10(5) s), good endurance (>5000 cycles), and excellent flexibility. The finding of the existence of distinct defects in ultrathin nanosheets undoubtedly leads to an atomic level deep understanding of the underlying nature of the resistive switching behavior, which may serve as a guide to improve the performances and promote the rapid development of RRAM. PMID:25668153

  16. Improvement of memory window and retention with low trap density in hydrogenated-amorphous-silicon-germanium nonvolatile memory

    NASA Astrophysics Data System (ADS)

    Choi, Woojin; Jang, Kyungsoo; Raja, Jayapal; Cho, Jaehyun; Hanh Nguyen, Hong; Kim, Minbum; Kim, Jiwoong; Lee, YounJung; Nagarajan, Balaji; Yi, Junsin

    2013-03-01

    We report the SiO2/SiOX/SiOXNY (OOXON) stacked nonvolatile memory (NVM) using hydrogenated amorphous silicon germanium (a-SiXGe1-X:H) as an active channel layer. In NVMs, the reduction of interface trap density is one of the key issues to improve device performance including memory window and retention. The NVMs using a-SiGe:H as the active channel overcame the limitation of small memory window size and poor retention characteristics by controlling the interface trap density using different Ge contents in the surface SiGe layer. For a-Si:H NVM that does not contain Ge, the memory size is about 5.15 V, which is quite large, with a programming voltage of -7 V and an erasing voltage of +15 V. However, the retention time of over 10 years is almost impossible. For a-SiGe:H NVM with 20% Ge, the memory size is as large as 7.38 V and the retention data of ˜58% is possible even after 10 years due to the reduced trap density in OOXON and channel layers. When the Ge content is more than 20%, the memory size and retention property after 10 years decrease rapidly. When the contents of Ge in SiGe films reach a certain point, they act as defects lowering the properties. The results of NVM devices using a-SiGe:H (Ge 20%) as an active channel layer demonstrate that they have switching characteristics suitable for data storage such as a threshold voltage window.

  17. Low-Dimensional Polyoxometalate Molecules/Tantalum Oxide Hybrids for Non-Volatile Capacitive Memories.

    PubMed

    Balliou, Angelika; Papadimitropoulos, Giorgos; Skoulatakis, George; Kennou, Stella; Davazoglou, Dimitrios; Gardelis, Spiros; Glezos, Nikos

    2016-03-23

    Transition-metal-oxide hybrids composed of high surface-to-volume ratio Ta2O5 matrices and a molecular analogue of transition metal oxides, tungsten polyoxometalates ([PW12O40](3-)), are introduced herein as a charge storage medium in molecular nonvolatile capacitive memory cells. The polyoxometalate molecules are electrostatically self-assembled on a low-dimensional Ta2O5 matrix, functionalized with an aminosilane molecule with primary amines as the anchoring moiety. The charge trapping sites are located onto the metal framework of the electron-accepting molecular entities as well as on the molecule/oxide interfaces which can immobilize negatively charged mobile oxygen vacancies. The memory characteristics of this novel nanocomposite were tested using no blocking oxide for extraction of structure-specific characteristics. The film was formed on top of the 3.1 nm-thick SiO2/n-Si(001) substrates and has been found to serve as both SiO2/Si interface states' reducer (i.e., quality enhancer) and electron storage medium. The device with the polyoxometalates sandwiched between two Ta2O5 films results in enhanced internal scattering of carriers. Thanks to this, it exhibits a significantly larger memory window than the one containing the plain hybrid and comparable retention time, resulting in a memory window of 4.0 V for the write state and a retention time around 10(4) s without blocking medium. Differential distance of molecular trapping centers from the cell's gate and electronic coupling to the space charge region of the underlying Si substrate were identified as critical parameters for enhanced electron trapping for the first time in such devices. Implementing a numerical electrostatic model incorporating structural and electronic characteristics of the molecular nodes derived from scanning probe and spectroscopic characterization, we are able to interpret the hybrid's electrical response and gain some insight into the electrostatics of the trapping medium. PMID

  18. All-solution-processed nonvolatile flexible nano-floating gate memory devices

    NASA Astrophysics Data System (ADS)

    Kim, Chaewon; Song, Ji-Min; Lee, Jang-Sik; Lee, Mi Jung

    2014-01-01

    Organic semiconductors have great potential for future electronic applications owing to their inherent flexibility, low cost, light weight and ability to easily cover large areas. However, all of these advantageous material properties can only be harnessed if simple, cheap and low-temperature fabrication processes, which exclude the need for vacuum deposition and are compatible with flexible plastic substrates, are employed. There are a few solution-based techniques such as spin-coating and inkjet printing that meet the above criteria. In this paper, we describe a novel all-solution-processed nonvolatile memory device fabricated on a flexible plastic substrate. The source, drain and gate electrodes were printed using an inkjet printer with a conducting organic solution, while the semiconducting layer was spin-coated with an n-type polymer. The charge-trapping layer was composed of spin-coated reduced graphene oxide (rGO), which was prepared in the form of a solution using Hummer’s method. The fabricated device was characterized in order to confirm the memory characteristics. Device parameters such as threshold voltage shift, retention/endurance characteristics, mechanical robustness and reliability upon bending were also analyzed.

  19. Nonvolatile memory devices prepared from sol-gel derived niobium pentoxide films.

    PubMed

    Baek, Hyunhee; Lee, Chanwoo; Choi, Jungkyu; Cho, Jinhan

    2013-01-01

    We report on the resistive switching nonvolatile memory (RSNM) properties of niobium pentoxide (Nb(2)O(5)) films prepared using sol-gel chemistry. A sol-gel derived solution of niobium ethoxide, a precursor to Nb(2)O(5), was spin-coated on to a platinum (Pt)-coated silicon substrate, and was then annealed at approximately 620 and 450 °C to form a Nb(2)O(5) film of polycrystalline and amorphous structure, respectively. A top electrode consisting of Ag, W, Au, or Pt was then coated onto the Nb(2)O(5) films to complete the fabrication. After a forming process of limited current compliance up to 10 mA, known as "electroforming", a resistive switching phenomenon, independent of voltage polarity (unipolar switching), was observed at low operating voltages (0.59 ± 0.05 V(RESET) and 1.03 ± 0.06 V(SET)) with a high ON/OFF current ratio above 10(8). The reported approach offers opportunities for preparing Nb(2)O(5)-based resistive switching memory devices from solution process. PMID:23210494

  20. Reconfigurable magnetic logic combined with non-volatile memory in silicon

    NASA Astrophysics Data System (ADS)

    Luo, Zhaochu; Zhang, Xiaozhong

    Silicon-based complementary metal-oxide-semiconductor (CMOS) transistors have achieved great success and become the mainstream of integrated logic circuits. However, the traditional pathway to enhance computational performance and decrease cost by continuous miniaturization is approaching its fundamental limits. The recent emergence of magnetic logic devices, especially magnetic-field-based semiconductor logic devices, shows promise for surpassing the development limits of CMOS logic and arouses profound attentions. Based on our Si based magnetoresistance (MR) device, we proposed a Si based reconfigurable magnetic logic device by coupling nonlinear transport effect and Hall effect in Si, which could do all four basic Boolean logic operations including AND, OR, NOR and NAND combined with non-volatile memory. Further, we developed a Si based current-mode magnetic logic device, which allowed direct communication between different logic devices by current-induced magnetization switch effect without external intermediate magnetic-electric converters. This may result in a memory-logic integrated system leading to a non von Neumann computer.

  1. Silicon-based current-controlled reconfigurable magnetoresistance logic combined with non-volatile memory

    NASA Astrophysics Data System (ADS)

    Zhang, Xiaozhong; Luo, Zhaochu

    2015-03-01

    Silicon-based complementary metal-oxide-semiconductor (CMOS) transistors have achieved great success. However, the traditional development pathway is approaching its fundamental limits. Magnetoelectronics logic, especially magnetic-field-based logic, shows promise for surpassing the development limits of CMOS logic. Existing proposals of magnetic-field-based logic are based on exotic semiconductors and difficult for further technological implementation. We proposed a kind of diode-assisted geometry-enhanced low-magnetic-field magnetoresistance (MR) mechanism. It couples p-n junction's nonlinear transport characteristic and Lorentz force by geometry, and shows extremely large low-magnetic-field MR (>120% at 0.15 T) Further, it is applied to experimentally demonstrate current-controlled reconfigurable MR logic on the silicon platform at room temperature. This logic device could perform Boolean logic AND, OR, NAND and NOR in one device. Combined with non-volatile magnetic memory, this logic architecture has the advantages of current-controlled reconfiguration, zero refresh consumption, instant-on performance and would bridge the processor-memory gap.

  2. Development and characterization of a ferroelectric non-volatile memory for flexible electronics

    NASA Astrophysics Data System (ADS)

    Mao, Duo

    Flexible electronics have received significant attention recently because of the potential applications in displays, sensors, radio frequency identification (RFID) tags and other integrated circuits. Electrically addressable non-volatile memory is a key component for these applications. The major challenges are to fabricate the memory at a low temperature compatible with plastic substrates while maintaining good device reliability, by being compatible with process as needed to integrate with other electronic components for system-on-chip applications. In this work, ferroelectric capacitors fabricated at low temperature were developed. Based on that, a ferroelectric random access memory (FRAM) for flexible electronics was developed and characterized. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer was used as a ferroelectric material and a photolithographic process was developed to fabricate ferroelectric capacitors. Different characterization methods including atomic force microscopy, x-ray diffraction and Fourier-transform infrared reflection-absorption spectroscopy were used to study the material properties of the P(VDF-TrFE) film. The material properties were correlated with the electrical characteristics of the ferroelectric capacitors. To understand the polarization switching behavior of the P(VDF-TrFE) ferroelectric capacitors, a Nucleation-Limited-Switching (NLS) model was used to study the switching kinetics. The switching kinetics were characterized over the temperature range from -60 °C to 100 °C. Fatigue characteristics were studied at different electrical stress voltages and frequencies to evaluate the reliability of the ferroelectric capacitor. The degradation mechanism is attributed to the increase of the activation field and the suppression of the switchable polarization. To develop a FRAM circuit for flexible electronics, an n-channel thin film transistor (TFT) based on CdS as the semiconductor was integrated with a P

  3. Subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory for nonvolatile operation

    NASA Astrophysics Data System (ADS)

    Huh, In; Cheon, Woo Young; Choi, Woo Young

    2016-04-01

    A subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory (SAT RAM) has been proposed and fabricated for low-power nonvolatile memory applications. The proposed SAT RAM cell demonstrates adjustable subthreshold swing (SS) depending on stored information: small SS in the erase state ("1" state) and large SS in the program state ("0" state). Thus, SAT RAM cells can achieve low read voltage (Vread) with a large memory window in addition to the effective suppression of ambipolar behavior. These unique features of the SAT RAM are originated from the locally stored charge, which modulates the tunneling barrier width (Wtun) of the source-to-channel tunneling junction.

  4. Metal-oxide-semiconductor diodes containing C60 fullerenes for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Beckmeier, Daniel; Baumgärtner, Hermann

    2013-01-01

    For non-volatile memories, silicon-oxide-nitride-oxide-silicon or floating gate structures are used to store information by charging and discharging electronic states reversibly. In this article, we propose to replace the floating gate by C60 molecules. This would allow more defined programming voltages because of the discrete molecular energy levels and a higher resistance to tunneling oxide defects because of the weak electrical connection between the single molecules. Such C60 MOS diode structures are produced and their electrical properties are analyzed regarding current transport and charging mechanism of the molecules. To create the MOS structures, C60 molecules (5% of a monolayer) are evaporated onto a part of a clean silicon wafer and covered by amorphous silicon in situ in an ultra high vacuum system. Then the wafer is oxidized in wet atmosphere at just 710 °C through the C60 layer. The goal is to produce a clean oxide above and under the molecules without destroying them. Aluminum gate contacts are defined on top of these layers to perform complementary capacitance voltage (CV) and current voltage (IV) measurements. First, the gate voltage is swept to analyze the injection current, then CV measurements are performed after each sweep to analyze the charge state of the C60 layer and the oxide quality. Reference diodes without C60 on the same wafer show an identical Fowler-Nordheim (FN) tunneling behavior for currents injected from silicon or from aluminum, respectively. In the CV curves, no pronounced flatband voltage shift is observable. In diodes with C60, for negative gate voltages, a classical FN tunneling is observed and compared to theory. The electron injection from silicon shows a different tunneling current behavior. It starts at a lower electric field and has a smaller slope then a FN current would have. It is identified as a trap-assisted tunneling (TAT) current caused by oxidation-induced traps under the C60 layer. It is modeled by an

  5. Unipolar resistive switching in metal oxide/organic semiconductor non-volatile memories as a critical phenomenon

    SciTech Connect

    Bory, Benjamin F.; Meskers, Stefan C. J.; Rocha, Paulo R. F.; Gomes, Henrique L.; Leeuw, Dago M. de

    2015-11-28

    Diodes incorporating a bilayer of an organic semiconductor and a wide bandgap metal oxide can show unipolar, non-volatile memory behavior after electroforming. The prolonged bias voltage stress induces defects in the metal oxide with an areal density exceeding 10{sup 17 }m{sup −2}. We explain the electrical bistability by the coexistence of two thermodynamically stable phases at the interface between an organic semiconductor and metal oxide. One phase contains mainly ionized defects and has a low work function, while the other phase has mainly neutral defects and a high work function. In the diodes, domains of the phase with a low work function constitute current filaments. The phase composition and critical temperature are derived from a 2D Ising model as a function of chemical potential. The model predicts filamentary conduction exhibiting a negative differential resistance and nonvolatile memory behavior. The model is expected to be generally applicable to any bilayer system that shows unipolar resistive switching.

  6. A nonvolatile memory device made of a ferroelectric polymer gate nanodot and a single-walled carbon nanotube.

    PubMed

    Son, Jong Yeog; Ryu, Sangwoo; Park, Yoon-Cheol; Lim, Yun-Tak; Shin, Yun-Sok; Shin, Young-Han; Jang, Hyun Myung

    2010-12-28

    We demonstrate a field-effect nonvolatile memory device made of a ferroelectric copolymer gate nanodot and a single-walled carbon nanotube (SW-CNT). A position-controlled dip-pen nanolithography was performed to deposit a poly(vinylidene fluoride-ran-trifluoroethylene) (PVDF-TrFE) nanodot onto the SW-CNT channel with both a source and drain for field-effect transistor (FET) function. PVDF-TrFE was chosen as a gate dielectric nanodot in order to efficiently exploit its bipolar chemical nature. A piezoelectric force microscopy study confirmed the canonical ferroelectric responses of the PVDF-TrFE nanodot fabricated at the center of the SW-CNT channel. The two distinct ferroelectric polarization states with the stable current retention and fatigue-resistant characteristics make the present PVDF-TrFE-based FET suitable for nonvolatile memory applications. PMID:21050014

  7. Alloy perovskite oxide thin film as resistance switching non-volatile memory

    NASA Astrophysics Data System (ADS)

    Wang, Yudi

    Nonvolatile memory that permanently stores data is indispensable for computers and hand-held devices. In the last few years, resistance memory (RRAM) has emerged as an intriguing possibility that might replace flash memory one day, which is widely used in hand-held and portable-storage devices. The newest, rapidly growing interest in resistance switching is focused on semiconducting oxides and other related materials. In this dissertation, a novel material system for oxide RRAM that offers unique advantages over all the other existing oxide RRAM materials was designed and systematically investigated. The primary aim of these studies is to obtain a material system with the intrinsic property that allows electrically-induced metal-insulator transition, which is regulated by electron trapping and release at some interval sites. A series of alloy perovskite oxides thin film systems were designed by combining a wide band gap insulator (CaZrO3 or LaAlO3) and a conductor with a narrow bandwidth (SrRuO3 or LaNiO3 ), with the conductor concentration near the percolation threshold. These alloy perovskite oxides thin films are almost atomically flat without any defects, such as cracks or crosshatches, which is achieved using well controlled deposition conditions that favor domain-boundary relaxation of the large misfit strain. The bottom electrode is a single crystalline SrRuO 3 thin film, deposited on a single crystal substrate of SrTiO3 which exhibits high conductivity and ferromagnetic transition at ˜150K. The alloy thin films manifest an anisotropic percolation phenomenon: below a critical thickness a metallic conducting path always exists across the film thickness direction but not along the in-plane direction, which ensures electrical isolation between neighboring memory cells. These initially conducting films present excellent resistance switching properties: low switching voltages (1-3 V), high switching ratio (˜100), fast switching speed (50 ns), good switching

  8. Electric field mediated non-volatile tuning magnetism in CoPt/PMN-PT heterostructure for magnetoelectric memory devices

    NASA Astrophysics Data System (ADS)

    Yang, Y. T.; Li, J.; Peng, X. L.; Wang, X. Q.; Wang, D. H.; Cao, Q. Q.; Du, Y. W.

    2016-02-01

    We report a power efficient non-volatile magnetoelectric memory in the CoPt/(011)PMN-PT heterostructure. Two reversible and stable electric field induced coercivity states (i.e., high-HC or low-HC) are obtained due to the strain mediated converse magnetoelectric effect. The reading process of the different coercive field information written by electric fields is demonstrated by using a magnetoresistance read head. This result shows good prospects in the application of novel multiferroic devices.

  9. Investigation of metal oxide dielectrics for non-volatile floating gate and resistance switching memory applications

    NASA Astrophysics Data System (ADS)

    Chakrabarti, Bhaswar

    Floating gate transistor based flash memories have seen more than a decade of continuous growth as the prominent non-volatile memory technology. However, the recent trends indicate that the scaling of flash memory is expected to saturate in the near future. Several alternative technologies are being considered for the replacement of flash in the near future. The basic motivation for this work is to investigate the material properties of metal oxide based high-k dielectrics for potential applications in floating gate and resistance switching memory applications. This dissertation can be divided into two main sections. In the first section, the tunneling characteristics of the SiO2/HfO 2 stacks were investigated. Previous theoretical studies for thin SiO 2/ thick high-k stacks predict an increase in tunneling current in the high-bias regime (better programming) and a decrease in the low-bias regime (better retention) in comparison to pure SiO2 of same equivalent oxide thickness (EOT). However, our studies indicated that the performance improvement in SiO2/HfO2 stacks with thick HfO2 layer is difficult due to significant amount of charge traps in thick HfO2 layers. Oxygen anneal on the stacks did not improve the programming current and retention. X-ray photoelectron spectroscopy (XPS) studies indicated that this was due to formation of an interfacial oxide layer. The second part of the dissertation deals with the investigation of resistive switching in metal oxides. Although promising, practical applications of resistive random access memories (RRAM) require addressing several issues including high forming voltage, large operating currents and reliability. We first investigated resistive switching in HfTiOx nanolaminate with conventional TiN electrodes. The forming-free switching observed in the structures could be described by the quantum point contact model. The modelling results indicated that the forming-free characteristics can be due to a higher number of

  10. Resistive Switching in Al/Al2O3/TiO2/Al/PES Flexible Device for Nonvolatile Memory Application.

    PubMed

    Lin, Chun-Chieh; Lee, Wang-Ying; Lee, Han-Tang

    2016-05-01

    Resistive switching memory devices with superior properties are possibly used in next-generation nonvolatile memory to replace the flash memory. In addition, flexible electronics has also attracted much attention because of its light-weight and flexibility. Therefore, an Al/Al2O3/TiO2/Al/PES flexible resistive switching memory is employed in this study. The resistive switching characteristics and stability of the flexible device are improved by inserting the Al2O3 film. The resistive switching of the flexible device can be repeated over hundreds of times after the bending test. A possible resistive switching model of the flexible device is also proposed. In addition, the non-volatility of the flexible device is demonstrated. Based on our research results, the proposed Al2O3/TiO2-based resistive switching memory is possibly used in next-generation flexible electronics and nonvolatile memory applications. PMID:27483828

  11. Scalability of Phase Change Materials in Non-Volatile Memory Devices

    NASA Astrophysics Data System (ADS)

    Jackson, Biyun Li

    This dissertation presents a study of the scaling limit of Phase Change Materials (PCM) for non-volatile memory device application. The approach is to obtain isolated true nano size Phase Change Materials through controllable deposition of PCM onto a template - nano pitted substrate. The fabrication of nano pitted substrate started from a di-block copolymer (DBC) film in hexagonal nano arrangement coated on thin SiO2 on Si (100) substrate. Then the DBC pattern was transferred to SiO2 - Si substrate by anisotropic dry oxide etch. Subsequently, a wet KOH etch with high crystallographic selectivity changed the circular pattern into an inverted pyramidal pit substrate. Thus, the dimension of the pits are controlled by the hole size of DBC, and the density of the pits are controlled by the interspacing between holes. Characterization tools such as SEM and TEM are intensively used to analyze the morphology, crystallographic, atomic ratio and phase transformation of the PCM. The dissertation discusses the critical fabrication tricks to produce high yield nano pitted substrate, illustrating the size effect of phase change materials upon crystallization and melting as well as the scaling limit of PCM. A proposal is also discussed for extending the study to device fabrication level and branch out the nano pitted substrate for the study of other materials in size and pressure effect.

  12. Nonvolatile memory devices based on poly(vinyl alcohol) + graphene oxide hybrid composites.

    PubMed

    Sun, Yanmei; Lu, Junguo; Ai, Chunpeng; Wen, Dianzhong

    2016-04-20

    Nonvolatile memory devices based on active layers of poly(vinyl alcohol) (PVA) + graphene oxide (GO) hybrid composites have been fabricated. The performance of the ITO/PVA + GO/Al device was compared with that of the ITO/PVA/Al device. The ITO/PVA + GO/Al device showed excellent performance compared to the ITO/PVA/Al device (an ON/OFF resistance ratio of 1.2 × 10(2) at 1 V, VSET ∼ -1.45 V and VRESET ∼ 3.6 V), with a higher ON/OFF resistance ratio of 3 × 10(4) at 1 V and lower operating voltages of VSET ∼ -0.75 V and VRESET ∼ 3.0 V. Furthermore, endurance performance and write-read-erase-reread (WRER) cycle tests manifest that the presence of GO in ITO/PVA + GO/Al devices makes them have better stability and repeatability. The results show that the performance of hybrid devices can be effectively enhanced by the introduction of GO into the PVA matrix. PMID:27056548

  13. Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

    NASA Technical Reports Server (NTRS)

    Wu, Jiin C.; Katti, Romney R.; Stadler, Henry L.

    1991-01-01

    The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

  14. Characterization and 3D TCAD simulation of NOR-type flash non-volatile memories with emphasis on corner effects

    NASA Astrophysics Data System (ADS)

    Zaka, A.; Singer, J.; Dornel, E.; Garetto, D.; Rideau, D.; Rafhay, Q.; Clerc, R.; Manceau, J.-P.; Degors, N.; Boccaccio, C.; Tavernier, C.; Jaouen, H.

    2011-09-01

    The impact of 3D device architecture in aggressively scaled embedded non-volatile memories has been investigated by means of experiments and 3D TCAD simulations. A complete 3D calibration methodology covering DC and transient operating regimes has been introduced and validated against measurements for different technological options. This approach has been employed to determine the key features for device optimization. In particular, shallow trench isolation corners around the active area have been identified as critical regions of the memory cell for program and erase operations, as well as for gate coupling ratio optimization.

  15. Blackcomb: Hardware-Software Co-design for Non-Volatile Memory in Exascale Systems

    SciTech Connect

    Schreiber, Robert

    2014-11-26

    Summary of technical results of Blackcomb Memory Devices We explored various different memory technologies (STTRAM, PCRAM, FeRAM, and ReRAM). The progress can be classified into three categories, below. Modeling and Tool Releases Various modeling tools have been developed over the last decade to help in the design of SRAM or DRAM-based memory hierarchies. To explore new design opportunities that NVM technologies can bring to the designers, we have developed similar high-level models for NVM, including PCRAMsim [Dong 2009], NVSim [Dong 2012], and NVMain [Poremba 2012]. NVSim is a circuit-level model for NVM performance, energy, and area estimation, which supports various NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies. On the other side, NVMain is a cycle accurate main memory simulator designed to simulate emerging nonvolatile memories at the architectural level. We have released these models as open source tools and provided contiguous support to them. We also proposed PS3-RAM, which is a fast, portable and scalable statistical STT-RAM reliability analysis model [Wen 2012]. Design Space Exploration and Optimization With the support of these models, we explore different device/circuit optimization techniques. For example, in [Niu 2012a] we studied the power reduction technique for the application of ECC scheme in ReRAM designs and proposed to use ECC code to relax the BER (Bit Error Rate) requirement of a single memory to improve the write energy consumption and latency for both 1T1R and cross-point ReRAM designs. In [Xu 2011], we proposed a methodology to design STT-RAM for different optimization goals such as read performance, write performance and write energy by leveraging the trade-off between write current and write time of MTJ. We also studied the tradeoffs in building a reliable crosspoint Re

  16. Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory

    SciTech Connect

    Li, Y.; Zhong, Y. P.; Deng, Y. F.; Zhou, Y. X.; Xu, L.; Miao, X. S.

    2013-12-21

    Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.

  17. A Novel Non-Destructive Silicon-on-Insulator Nonvolatile Memory - LDRD 99-0750 Final Report

    SciTech Connect

    DRAPER,BRUCE L.; FLEETWOOD,D. M.; MEISENHEIMER,TIMOTHY L.; MURRAY,JAMES R.; SCHWANK,JAMES R.; SHANEYFELT,MARTY R.; SMITH,PAUL M.; VANHEUSDEN,KAREL J.; WARREN,WILLIAM L.

    1999-11-01

    Defects in silicon-on-insulator (SOI) buried oxides are normally considered deleterious to device operation. Similarly, exposing devices to hydrogen at elevated temperatures often can lead to radiation-induced charge buildup. However, in this work, we take advantage of as-processed defects in SOI buried oxides and moderate temperature hydrogen anneals to generate mobile protons in the buried oxide to form the basis of a ''protonic'' nonvolatile memory. Capacitors and fully-processed transistors were fabricated. SOI buried oxides are exposed to hydrogen at moderate temperatures using a variety of anneal conditions to optimize the density of mobile protons. A fast ramp cool down anneal was found to yield the maximum number of mobile protons. Unfortunately, we were unable to obtain uniform mobile proton concentrations across a wafer. Capacitors were irradiated to investigate the potential use of protonic memories for space and weapon applications. Irradiating under a negative top-gate bias or with no applied bias was observed to cause little degradation in the number of mobile protons. However, irradiating to a total dose of 100 krad(SiO{sub 2}) under a positive top-gate bias caused approximately a 100% reduction in the number of mobile protons. Cycling capacitors up to 10{sup 4} cycles had little effect on the switching characteristics. No change in the retention characteristics were observed for times up to 3 x 10{sup 4} s for capacitors stored unbiased at 200 C. These results show the proof-of-concept for a protonic nonvolatile memory. Two memory architectures are proposed for a protonic non-destructive, nonvolatile memory.

  18. GaAs metal-oxide-semiconductor based nonvolatile memory devices embedded with ZnO quantum dots

    NASA Astrophysics Data System (ADS)

    Kundu, Souvik; Rao Gollu, Sankara; Sharma, Ramakant; Halder, Nripendra. N.; Biswas, Pranab; Banerji, P.; Gupta, D.

    2013-08-01

    Ultrathin InP passivated GaAs non-volatile memory devices were fabricated with chemically synthesized 5 nm ZnO quantum dots embedded into ZrO2 high-k oxide matrix deposited through metal organic chemical vapor deposition. In these memory devices, the memory window was found to be 6.10 V and the obtained charge loss was only 15.20% after 105 s. The superior retention characteristics and a wide memory window are achieved due to presence of ZnO quantum dots between tunneling and control oxide layers. Room temperature Coulomb blockade effect was found in these devices and it was ascertained to be the main reason for low leakage. Electronic band diagram with program and erase operations were described on the basis of electrical characterizations.

  19. Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices.

    PubMed

    Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

    2016-01-21

    Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process. PMID:26695561

  20. Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices

    NASA Astrophysics Data System (ADS)

    Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

    2016-01-01

    Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr07377d

  1. Improved Retention Characteristic in Polycrystalline Silicon-Oxide-Hafnium Oxide-Oxide-Silicon-Type Nonvolatile Memory with Robust Tunnel Oxynitride

    NASA Astrophysics Data System (ADS)

    Hsieh, Chih Ren; Lai, Chiung Hui; Lin, Bo Chun; Zheng, Yuan Kai; Chung Lou, Jen; Lin, Gray

    2011-03-01

    In this paper, we present a simple novel process for forming a robust and reliable oxynitride dielectric with a high nitrogen content. It is highly suitable for n-channel metal-oxide-semiconductor field-effect transistor (nMOSFETs) and polycrystalline silicon-oxide-hafnium oxide-oxide-silicon (SOHOS)-type memory applications. The proposed approach is realized by using chemical oxide with ammonia (NH3) nitridation followed by reoxidation with oxygen (O2). The novel oxynitride process is not only compatible with the standard complementary metal-oxide-semiconductor (CMOS) process, but also can ensure the improvement of flash memory with low-cost manufacturing. The characteristics of nMOSFETs and SOHOS-type nonvolatile memories (NVMs) with a robust oxynitride as a gate oxide or tunnel oxide are studied to demonstrate their advantages such as the retardation of the stress-induced trap generation during constant-voltage stress (CVS), the program/erase behaviors, cycling endurance, and data retention. The results indicate that the proposed robust oxynitride is suitable for future nonvolatile flash memory technology application.

  2. Multi-dot floating-gates for nonvolatile semiconductor memories: Their ion beam synthesis and morphology

    SciTech Connect

    Mueller, T.; Heinig, K.-H.; Moeller, W.; Bonafos, C.; Coffin, H.; Cherkashin, N.; Assayag, G. Ben; Schamm, S.; Zanchi, G.; Claverie, A.; Tence, M.; Colliex, C.

    2004-09-20

    Scalability and performance of current flash memories can be improved substantially by replacing the floating polycrystalline-silicon gate by a layer of Si dots. Here, we present both experimental and theoretical studies on ion beam synthesis of multi-dot layers consisting of Si nanocrystals (NCs) embedded in the gate oxide. Former studies have suffered from the weak Z contrast between Si and SiO{sub 2} in transmission electron microscopy (TEM). This letter maps Si plasmon losses with a scanning TEM equipped with a parallel electron energy loss spectroscopy system. Kinetic Monte Carlo simulations of Si phase separation have been performed and compared with Si plasmon maps. Predicted and measured Si morphologies agree remarkably well, both change with increasing ion fluence from isolated NCs to spinodal pattern. However, the predicted fluences are lower than the experimental ones. We identify as the main reason of this discrepancy the partial oxidation of implanted Si by atmospheric humidity, which penetrates into the as-implanted SiO{sub 2}.

  3. MOSFET nonvolatile memory with a high-density tungsten nanodot floating gate formed by self-assembled nanodot deposition

    NASA Astrophysics Data System (ADS)

    Pei, Y.; Yin, C.; Bea, J. C.; Kino, H.; Fukushima, T.; Tanaka, T.; Koyanagi, M.

    2009-04-01

    Metal-oxide-semiconductor field-effect transistor (MOSFET) nonvolatile memories with high-density tungsten nanodots (W-NDs) dispersed in silicon nitride as a floating gate were fabricated and characterized. The W-NDs with a high density of ~5 × 1012 cm-2 and small sizes of 2-3 nm were formed by self-assembled nanodot deposition (SAND). A large memory window of ~1.7 V was observed with bi-directional gate voltage sweeping between -10 and +10 V. Considering that there is no hysteresis memory window for the reference sample without W-NDs, this result indicates the charge trapping in W-NDs or related defects. Finally, the program/erase speed and retention characteristics were investigated and discussed in this paper.

  4. Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

    PubMed

    Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

    2015-07-21

    Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use. PMID:26098677

  5. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    SciTech Connect

    Jovanović, B. E-mail: lionel.torres@lirmm.fr; Brum, R. M.; Torres, L.

    2014-04-07

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  6. Epitaxial Growth of Thin Ferroelectric Polymer Films on Graphene Layer for Fully Transparent and Flexible Nonvolatile Memory.

    PubMed

    Kim, Kang Lib; Lee, Wonho; Hwang, Sun Kak; Joo, Se Hun; Cho, Suk Man; Song, Giyoung; Cho, Sung Hwan; Jeong, Beomjin; Hwang, Ihn; Ahn, Jong-Hyun; Yu, Young-Jun; Shin, Tae Joo; Kwak, Sang Kyu; Kang, Seok Ju; Park, Cheolmin

    2016-01-13

    Enhancing the device performance of organic memory devices while providing high optical transparency and mechanical flexibility requires an optimized combination of functional materials and smart device architecture design. However, it remains a great challenge to realize fully functional transparent and mechanically durable nonvolatile memory because of the limitations of conventional rigid, opaque metal electrodes. Here, we demonstrate ferroelectric nonvolatile memory devices that use graphene electrodes as the epitaxial growth substrate for crystalline poly(vinylidene fluoride-trifluoroethylene) (PVDF-TrFE) polymer. The strong crystallographic interaction between PVDF-TrFE and graphene results in the orientation of the crystals with distinct symmetry, which is favorable for polarization switching upon the electric field. The epitaxial growth of PVDF-TrFE on a graphene layer thus provides excellent ferroelectric performance with high remnant polarization in metal/ferroelectric polymer/metal devices. Furthermore, a fully transparent and flexible array of ferroelectric field effect transistors was successfully realized by adopting transparent poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] semiconducting polymer. PMID:26618802

  7. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    NASA Astrophysics Data System (ADS)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-04-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  8. Bipolar resistive switching based on bis(8-hydroxyquinoline) cadmium complex: Mechanism and non-volatile memory application

    NASA Astrophysics Data System (ADS)

    Wang, Ying; Yang, Ting; Xie, Ji-Peng; Lü, Wen-Li; Fan, Guo-Ying; Liu, Su

    2013-07-01

    Stable and persistent bipolar resistive switching was observed in an organic diode with the structure of indium-tin oxide (ITO)/bis(8-hydroxyquinoline) cadmium (Cdq2)/Al. Aggregate formation and electric field driven trapping and de-trapping of charge carriers in the aggregate states that lie in the energy gap of the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO) of the organic molecule were proposed as the mechanism of the observed bipolar resistive switching, and this was solidly supported by the results of AFM investigations. Repeatedly set, read, and reset measurements demonstrated that the device is potentially applicable in non-volatile memories.

  9. Floating gate memory-based monolayer MoS2 transistor with metal nanocrystals embedded in the gate dielectrics.

    PubMed

    Wang, Jingli; Zou, Xuming; Xiao, Xiangheng; Xu, Lei; Wang, Chunlan; Jiang, Changzhong; Ho, Johnny C; Wang, Ti; Li, Jinchai; Liao, Lei

    2015-01-14

    Charge trapping layers are formed from different metallic nanocrystals in MoS2 -based nanocrystal floating gate memory cells in a process compatible with existing fabrication technologies. The memory cells with Au nanocrystals exhibit impressive performance with a large memory window of 10 V, a high program/erase ratio of approximately 10(5) and a long retention time of 10 years. PMID:25115804

  10. Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

    PubMed Central

    Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

    2014-01-01

    Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

  11. Functionalized graphitic carbon nitride for metal-free, flexible and rewritable nonvolatile memory device via direct laser-writing.

    PubMed

    Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

    2014-01-01

    Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 10(5), which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

  12. Investigating the bistability characteristics of GaN/AlN resonant tunneling diodes for ultrafast nonvolatile memory

    NASA Astrophysics Data System (ADS)

    Nagase, Masanori; Takahashi, Tokio; Shimizu, Mitsuaki

    2015-03-01

    The bistability characteristics of GaN/AlN resonant tunneling diodes (RTDs) grown on a sapphire substrate by metalorganic vapor phase epitaxy (MOVPE) were investigated to better understand their physical origin and explore their use in nonvolatile memories. The bistability current-voltage (I-V) characteristics of GaN/AlN RTDs, which were due to intersubband transitions and electron accumulation in the quantum well, were clearly observed over a wide temperature range between 50 and 300 K. However, the I-V characteristics sometimes degraded at temperatures above 250 K. Complex staircase structures were observed in the voltage region showing a negative differential resistance in the I-V curve, and the forward current increased or decreased rapidly as the forward-bias voltage increased. Repeated measurements of the I-V characteristics over the wide temperature range between 50 and 300 K revealed that the bistability characteristics of GaN/AlN RTDs degraded owing to the leakage of electrons accumulating in the quantum well through a deep level in the AlN barrier associated with crystal defects such as dislocations and impurities. Therefore, reduction in crystal defect and impurity densities in the AlN barrier, and a careful design that considers deep levels are important for realizing realize ultrafast nonvolatile memories based on the bistability characteristics of GaN/AlN RTDs.

  13. Improved Programming Efficiency through Additional Boron Implantation at the Active Area Edge in 90 nm Localized Charge-Trapping Non-volatile Memory

    NASA Astrophysics Data System (ADS)

    Xu, Yue; Yan, Feng; Chen, Dun-Jun; Shi, Yi; Wang, Yong-Gang; Li, Zhi-Guo; Yang, Fan; Wang, Jos-Hua; Lin, Peter; Chang, Jian-Guang

    2010-06-01

    As the scaling-down of non-volatile memory (NVM) cells continues, the impact of shallow trench isolation (STI) on NVM cells becomes more severe. It has been observed in the 90 nm localized charge-trapping non-volatile memory (NROM™) that the programming efficiency of edge cells adjacent to STI is remarkably lower than that of other cells when channel hot electron injection is applied. Boron segregation is found to be mainly responsible for the low programming efficiency of edge cells. Meanwhile, an additional boron implantation of 10° tilt at the active area edge as a new solution to solve this problem is developed.

  14. Colossal resistance switching effect in Pt/spinel-MgZnO/Pt devices for nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Chen, Xinman; Wu, Guangheng; Jiang, Peng; Liu, Weifang; Bao, Dinghua

    2009-01-01

    We reported the discovery of colossal resistance switching effect in polycrystalline spinel-like structure MgZnO thin films with high Mg contents sandwiched by Pt electrodes. The ultrahigh resistance ratio of high resistance state to low resistance state of about seven to nine orders of magnitude with a low reset voltage of less than 1 V was obtained in this thin film system. The resistance ratio shows an increase of several orders of magnitude compared with those of previously reported resistance switching material systems including metal oxides, semiconductors, and organic molecules. This colossal resistance switching effect will greatly improve the signal-to-noise ratio and simplify the process of reading memory state for nonvolatile memory applications. Our study also provides a material base for studying the origin of resistance switching phenomenon.

  15. Multifunctional organic phototransistor-based nonvolatile memory achieved by UV/ozone treatment of the Ta₂O₅ gate dielectric.

    PubMed

    Liu, Xiaohui; Zhao, Haoyan; Dong, Guifang; Duan, Lian; Li, Dong; Wang, Liduo; Qiu, Yong

    2014-06-11

    An organic phototransistor (OPT) shows nonvolatile memory effect due to its novel optical writing and electrical erasing processes. In this work, we utilize an organic light-emitting diode (OLED) as the light source to investigate OPT-based memory (OPTM) performance. It is found that the OPTM can be used as either flash memory or write-once read-many-times memory by adjusting the properties of the Ta2O5 gate dielectric layer. UV/ozone treatment is applied to effectively change dielectric properties of the Ta2O5 film. The mechanisms for this are examined by X-ray photoelectron spectroscopy and capacitance-voltage measurement. It turns out that the densities of oxygen vacancies and defects in the first 1.8 nm Ta2O5 films near the Ta2O5/semiconductor interface are reduced. Furthermore, for the first time, we use this multifunctional OPTM, which unites the photosensitive and memory properties in one single device, as an optical feedback system to tune the brightness of the OLED. Our study suggests that these OPTMs have potential applications in tuning the brightness uniformity, improving the display quality and prolonging the lifetime of flat panel displays. PMID:24813352

  16. A New Concept for Non-Volatile Memory: The Electric-Pulse Induced Resistive Change Effect in Colossal Magnetoresistive Thin Films

    NASA Technical Reports Server (NTRS)

    Liu, S. Q.; Wu, N. J.; Ignatiev, A.

    2001-01-01

    A novel electric pulse-induced resistive change (EPIR) effect has been found in thin film colossal magnetoresistive (CMR) materials, and has shown promise for the development of resistive, nonvolatile memory. The EPIR effect is induced by the application of low voltage (< 4 V) and short duration (< 20 ns) electrical pulses across a thin film sample of a CMR material at room temperature and under no applied magnetic field. The pulse can directly either increase or decrease the resistance of the thin film sample depending on pulse polarity. The sample resistance change has been shown to be over two orders of magnitude, and is nonvolatile after pulsing. The sample resistance can also be changed through multiple levels - as many as 50 have been shown. Such a device can provide a way for the development of a new kind of nonvolatile multiple-valued memory with high density, fast write/read speed, low power-consumption, and potential high radiation-hardness.

  17. NVL-C: Static Analysis Techniques for Efficient, Correct Programming of Non-Volatile Main Memory Systems

    SciTech Connect

    Lee, Seyong; Vetter, Jeffrey S

    2016-01-01

    Computer architecture experts expect that non-volatile memory (NVM) hierarchies will play a more significant role in future systems including mobile, enterprise, and HPC architectures. With this expectation in mind, we present NVL-C: a novel programming system that facilitates the efficient and correct programming of NVM main memory systems. The NVL-C programming abstraction extends C with a small set of intuitive language features that target NVM main memory, and can be combined directly with traditional C memory model features for DRAM. We have designed these new features to enable compiler analyses and run-time checks that can improve performance and guard against a number of subtle programming errors, which, when left uncorrected, can corrupt NVM-stored data. Moreover, to enable recovery of data across application or system failures, these NVL-C features include a flexible directive for specifying NVM transactions. So that our implementation might be extended to other compiler front ends and languages, the majority of our compiler analyses are implemented in an extended version of LLVM's intermediate representation (LLVM IR). We evaluate NVL-C on a number of applications to show its flexibility, performance, and correctness.

  18. Effect of electrode material on characteristics of non-volatile resistive memory consisting of Ag2S nanoparticles

    NASA Astrophysics Data System (ADS)

    Jang, Jaewon

    2016-07-01

    In this study, Ag2S nanoparticles are synthesized and used as the active material for two-terminal resistance switching memory devices. Sintered Ag2S films are successfully crystallized on plastic substrates with synthesized Ag2S nanoparticles, after a relatively low-temperature sintering process (200 °C). After the sintering process, the crystallite size is increased from 6.8 nm to 80.3 nm. The high ratio of surface atoms to inner atoms of nanoparticles reduces the melting point temperature, deciding the sintering process temperature. In order to investigate the resistance switching characteristics, metal/Ag2S/metal structures are fabricated and tested. The effect of the electrode material on the non-volatile resistive memory characteristics is studied. The bottom electrochemically inert materials, such as Au and Pt, were critical for maintaining stable memory characteristics. By using Au and Pt inert bottom electrodes, we are able to significantly improve the memory endurance and retention to more than 103 cycles and 104 sec, respectively.

  19. Effect of tunneling layers on the performances of floating-gate based organic thin-film transistor nonvolatile memories

    SciTech Connect

    Wang, Wei Han, Jinhua; Ying, Jun; Xiang, Lanyi; Xie, Wenfa

    2014-09-22

    Two types of floating-gate based organic thin-film transistor nonvolatile memories (FG-OTFT-NVMs) were demonstrated, with poly(methyl methacrylate co glycidyl methacrylate) (P(MMA-GMA)) and tetratetracontane (TTC) as the tunneling layer, respectively. Their device performances were measured and compared. In the memory with a P(MMA-GMA) tunneling layer, typical unipolar hole transport was obtained with a relatively small mobility of 0.16 cm{sup 2}/V s. The unidirectional shift of turn-on voltage (V{sub on}) due to only holes trapped/detrapped in/from the floating gate resulted in a small memory window of 12.5 V at programming/erasing voltages (V{sub P}/V{sub E}) of ±100 V and a nonzero reading voltage. Benefited from the well-ordered molecule orientation and the trap-free surface of TTC layer, a considerably high hole mobility of 1.7 cm{sup 2}/V s and a visible feature of electrons accumulated in channel and trapped in floating-gate were achieved in the memory with a TTC tunneling layer. High hole mobility resulted in a high on current and a large memory on/off ratio of 600 at the V{sub P}/V{sub E} of ±100 V. Both holes and electrons were injected into floating-gate and overwritten each other, which resulted in a bidirectional V{sub on} shift. As a result, an enlarged memory window of 28.6 V at the V{sub P}/V{sub E} of ±100 V and a zero reading voltage were achieved. Based on our results, a strategy is proposed to optimize FG-OTFT-NVMs by choosing a right tunneling layer to improve the majority carrier mobility and realize ambipolar carriers injecting and trapping in the floating-gate.

  20. Multi-Bit Nano-Electromechanical Nonvolatile Memory Cells (Zigzag T Cells) for the Suppression of Bit-to-Bit Interference.

    PubMed

    Choi, Woo Young; Han, Jae Hwan; Cha, Tae Min

    2016-05-01

    Multi-bit nano-electromechanical (NEM) nonvolatile memory cells such as T cells were proposed for higher memory density. However, they suffered from bit-to-bit interference (BI). In order to suppress BI without sacrificing cell size, this paper proposes zigzag T cell structures. The BI suppression of the proposed zigzag T cell is verified by finite-element modeling (FEM). Based on the FEM results, the design of zigzag T cells is optimized. PMID:27483893

  1. Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

    SciTech Connect

    Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin E-mail: chilf@suda.edu.cn Chi, Li-Feng E-mail: chilf@suda.edu.cn Wang, Sui-Dong E-mail: chilf@suda.edu.cn

    2015-03-23

    Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.

  2. Transparent photostable ZnO nonvolatile memory transistor with ferroelectric polymer and sputter-deposited oxide gate

    SciTech Connect

    Park, C. H.; Im, Seongil; Yun, Jungheum; Lee, Gun Hwan; Lee, Byoung H.; Sung, Myung M.

    2009-11-30

    We report on the fabrication of transparent top-gate ZnO nonvolatile memory thin-film transistors (NVM-TFTs) with 200 nm thick poly(vinylidene fluoride/trifluoroethylene) ferroelectric layer; semitransparent 10 nm thin AgO{sub x} and transparent 130 nm thick indium-zinc oxide (IZO) were deposited on the ferroelectric polymer as gate electrode by rf sputtering. Our semitransparent NVM-TFT with AgO{sub x} gate operates under low voltage write-erase (WR-ER) pulse of {+-}20 V, but shows some degradation in retention property. In contrast, our transparent IZO-gated device displays very good retention properties but requires anomalously higher pulse of {+-}70 V for WR and ER states. Both devices stably operated under visible illuminations.

  3. Investigation of Nonvolatile Memory Effect of Organic Thin-Film Transistors with Triple Dielectric Layers

    NASA Astrophysics Data System (ADS)

    Yu, Hsin-Chieh; Chen, Ying-Chih; Huang, Chun-Yuan; Su, Yan-Kuin

    2012-03-01

    Pentacene thin-film transistor (TFT) memory using poly(2-hydroxyethyl methacrylate) (PHEMA)-based polymer dielectric layers has been developed. The electric performance and memory behaviors of memory TFTs can be significantly improved by using triple polymer dielectric layers consisting of PHEMA/poly(methyl methacrylate) (PMMA)/PHEMA. This can be attributed to the improvement of the channel/dielectric interface. This memory effect is due to the charge storage of the dipolar group or molecules in the dielectric. The devices exhibit a wide memory window (ΔVth, >20 V), switchable channel current, and long retention time.

  4. Current-driven insulator{endash}conductor transition and nonvolatile memory in chromium-doped SrTiO{sub 3} single crystals

    SciTech Connect

    Watanabe, Y.; Bednorz, J. G.; Bietsch, A.; Gerber, Ch.; Widmer, D.; Beck, A.; Wind, S. J.

    2001-06-04

    Materials showing reversible resistive switching are attractive for today{close_quote}s semiconductor technology with its wide interest in nonvolatile random-access memories. In doped SrTiO{sub 3} single crystals, we found a dc-current-induced reversible insulator{endash}conductor transition with resistance changes of up to five orders of magnitude. This conducting state allows extremely reproducible switching between different impedance states by current pulses with a performance required for nonvolatile memories. The results indicate a type of charge-induced bulk electronic change as a prerequisite for the memory effect, scaling down to nanometer-range electrode sizes in thin films. {copyright} 2001 American Institute of Physics.

  5. Effects of thickness and geometric variations in the oxide gate stack on the nonvolatile memory behaviors of charge-trap memory thin-film transistors

    NASA Astrophysics Data System (ADS)

    Bak, Jun Yong; Kim, So-Jung; Byun, Chun-Won; Pi, Jae-Eun; Ryu, Min-Ki; Hwang, Chi Sun; Yoon, Sung-Min

    2015-09-01

    Device designs of charge-trap oxide memory thin-film transistors (CTM-TFTs) were investigated to enhance their nonvolatile memory performances. The first strategy was to optimize the film thicknesses of the tunneling and charge-trap (CT) layers in order to meet requirements of both higher operation speed and longer retention time. While the program speed and memory window were improved for the device with a thinner tunneling layer, a long retention time was obtained only for the device with a tunneling layer thicker than 5 nm. The carrier concentration and charge-trap densities were optimized in the 30-nm-thick CT layer. It was observed that 10-nm-thick tunneling, 30-nm-thick CT, and 50-nm-thick blocking layers were the best configuration for our proposed CTM-TFTs, where a memory on/off margin higher than 107 was obtained, and a memory margin of 6.6 × 103 was retained even after the lapse of 105 s. The second strategy was to examine the effects of the geometrical relations between the CT and active layers for the applications of memory elements embedded in circuitries. The CTM-TFTs fabricated without an overlap between the CT layer and the drain electrode showed an enhanced program speed by the reduced parasitic capacitance. The drain-bias disturbance for the memory off-state was effectively suppressed even when a higher read-out drain voltage was applied. Appropriate device design parameters, such as the film thicknesses of each component layer and the geometrical relations between them, can improve the memory performances and expand the application fields of the proposed CTM-TFTs.

  6. Redox-Active Molecular Nanowire Flash Memory for High-Endurance and High-Density Nonvolatile Memory Applications.

    PubMed

    Zhu, Hao; Pookpanratana, Sujitra J; Bonevich, John E; Natoli, Sean N; Hacker, Christina A; Ren, Tong; Suehle, John S; Richter, Curt A; Li, Qiliang

    2015-12-16

    In this work, high-performance top-gated nanowire molecular flash memory has been fabricated with redox-active molecules. Different molecules with one and two redox centers have been tested. The flash memory has clean solid/molecule and dielectric interfaces, due to the pristine molecular self-assembly and the nanowire device self-alignment fabrication process. The memory cells exhibit discrete charged states at small gate voltages. Such multi-bit memory in one cell is favorable for high-density storage. These memory devices exhibit fast speed, low power, long memory retention, and exceptionally good endurance (>10(9) cycles). The excellent characteristics are derived from the intrinsic charge-storage properties of the protected redox-active molecules. Such multi-bit molecular flash memory is very attractive for high-endurance and high-density on-chip memory applications in future portable electronics. PMID:26600234

  7. Ambipolar nonvolatile memory based on a quantum-dot transistor with a nanoscale floating gate

    NASA Astrophysics Data System (ADS)

    Che, Yongli; Zhang, Yating; Cao, Xiaolong; Song, Xiaoxian; Cao, Mingxuan; Dai, Haitao; Yang, Junbo; Zhang, Guizhong; Yao, Jianquan

    2016-07-01

    Using only solution processing methods, we developed ambipolar quantum-dot (QD) transistor floating-gate memory (FGM) that uses Au nanoparticles as a floating gate. Because of the bipolarity of the active channel of PbSe QDs, the memory could easily trap holes or electrons in the floating gate by programming/erasing (P/E) operations, which could shift the threshold voltage both up and down. As a result, the memory exhibited good programmable memory characteristics: a large memory window (ΔVth ˜ 15 V) and a long retention time (>105 s). The magnitude of ΔVth depended on both P/E voltages and the bias voltage (VDS): ΔVth was a cubic function to VP/E and linearly depended on VDS. Therefore, this FGM based on a QD transistor is a promising alternative to its inorganic counterparts owing to its advantages of bipolarity, high mobility, low cost, and large-area production.

  8. Reversible insulator-metal transition of LaAlO3/SrTiO3 interface for nonvolatile memory

    PubMed Central

    Lu, Hong-Liang; Liao, Zhi-Min; Zhang, Liang; Yuan, Wen-Tao; Wang, Yong; Ma, Xiu-Mei; Yu, Da-Peng

    2013-01-01

    We report a new type of memory device based on insulating LaAlO3/SrTiO3 (LAO/STO) hetero-interface. The microstructures of the LAO/STO interface are characterized by Cs-corrected scanning transmission electron microscopy, which reveals the element intermixing at the interface. The inhomogeneous element distribution may result in carrier localization, which is responsible for the insulating state. The insulating state of such interface can be converted to metallic state by light illumination and the metallic state maintains after light off due to giant persistent photoconductivity (PPC) effect. The on/off ratio between the PPC and the initial dark conductance is as large as 105. The metallic state also can be converted back to insulating state by applying gate voltage. Reversible and reproducible resistive switching makes LAO/STO interface promising as a nonvolatile memory. Our results deepen the understanding of PPC phenomenon in LAO/STO, and pave the way for the development of all-oxide electronics integrating information storage devices. PMID:24100438

  9. Surface-type nonvolatile electric memory elements based on organic-on-organic CuPc-H2Pc heterojunction

    NASA Astrophysics Data System (ADS)

    Khasan, S. Karimov; Zubair, Ahmad; Farid, Touati; Mahroof-Tahir, M.; M. Muqeet, Rehman; S. Zameer, Abbas

    2015-11-01

    A novel surface-type nonvolatile electric memory elements based on organic semiconductors CuPc and H2Pc are fabricated by vacuum deposition of the CuPc and H2Pc films on preliminary deposited metallic (Ag and Cu) electrodes. The gap between Ag and Cu electrodes is 30-40 μm. For the current-voltage (I-V) characteristics the memory effect, switching effect, and negative differential resistance regions are observed. The switching mechanism is attributed to the electric-field-induced charge transfer. As a result the device switches from a low to a high-conductivity state and then back to a low conductivity state if the opposite polarity voltage is applied. The ratio of resistance at the high resistance state to that at the low resistance state is equal to 120-150. Under the switching condition, the electric current increases ˜ 80-100 times. A comparison between the forward and reverse I-V characteristics shows the presence of rectifying behavior. Project supported by the GIK Institute of Engineering Science and Technology, Pakistan and Physical Technical Institute of Academy of Sciences of Tajikistan.

  10. Reversible insulator-metal transition of LaAlO3/SrTiO3 interface for nonvolatile memory

    NASA Astrophysics Data System (ADS)

    Lu, Hong-Liang; Liao, Zhi-Min; Zhang, Liang; Yuan, Wen-Tao; Wang, Yong; Ma, Xiu-Mei; Yu, Da-Peng

    2013-10-01

    We report a new type of memory device based on insulating LaAlO3/SrTiO3 (LAO/STO) hetero-interface. The microstructures of the LAO/STO interface are characterized by Cs-corrected scanning transmission electron microscopy, which reveals the element intermixing at the interface. The inhomogeneous element distribution may result in carrier localization, which is responsible for the insulating state. The insulating state of such interface can be converted to metallic state by light illumination and the metallic state maintains after light off due to giant persistent photoconductivity (PPC) effect. The on/off ratio between the PPC and the initial dark conductance is as large as 105. The metallic state also can be converted back to insulating state by applying gate voltage. Reversible and reproducible resistive switching makes LAO/STO interface promising as a nonvolatile memory. Our results deepen the understanding of PPC phenomenon in LAO/STO, and pave the way for the development of all-oxide electronics integrating information storage devices.

  11. Improved bipolar resistive switching memory characteristics in Ge0.5Se0.5 solid electrolyte by using dispersed silver nanocrystals on bottom electrode.

    PubMed

    Kim, Jang-Han; Nam, Ki-Hyun; Hwang, Inchan; Cho, Won-Ju; Park, Byoungchoo; Chung, Hong-Bay

    2014-12-01

    Resistive switching random-access memory (ReRAM) devices based on chalcogenide solid electrolytes have recently become a promising candidate for future low-power nanoscale nonvolatile memory application. The resistive switching mechanism of ReRAM is based on the formation and rupture of conductive filament (CF) in the chalcogenide solid electrolyte layers. However, the random diffusion of metal ions makes it hard to control the CF formation, which is one of the major obstacles to improving device performance of ReRAM devices. We demonstrate the spin-coated metal nanocrystals (NCs) enhance the bipolar resistive switching (BRS) memory characteristics. Compared to the Ag/Ge0.5Se0.5/Pt structure, excellent resistive switching memory characteristics were obtained from the Ag/Ge0.5Se0.5/Ag NCs/Pt structure. Ag NCs improve the uniformity of resistance values and reduce the reset voltage and current. A stable DC endurance (> 100 cycles) and a high data retention (> 10(4) sec) were achieved by spin coating the Ag NCs on the Pt bottom electrode for ReRAMs. PMID:25971090

  12. Nonvolatile modulation of electronic structure and correlative magnetism of L10-FePt films using significant strain induced by shape memory substrates

    PubMed Central

    Feng, Chun; Zhao, Jiancheng; Yang, Feng; Gong, Kui; Hao, Shijie; Cao, Yi; Hu, Chen; Zhang, Jingyan; Wang, Zhongqiang; Chen, Lei; Li, Sirui; Sun, Li; Cui, Lishan; Yu, Guanghua

    2016-01-01

    Tuning the lattice strain (εL) is a novel approach to manipulate the magnetic, electronic, and transport properties of spintronic materials. Achievable εL in thin film samples induced by traditional ferroelectric or flexible substrates is usually volatile and well below 1%. Such limits in the tuning capability cannot meet the requirements for nonvolatile applications of spintronic materials. This study answers to the challenge of introducing significant amount of elastic strain in deposited thin films so that noticeable tuning of the spintronic characteristics can be realized. Based on subtle elastic strain engineering of depositing L10-FePt films on pre-stretched NiTi(Nb) shape memory alloy substrates, steerable and nonvolatile lattice strain up to 2.18% has been achieved in the L10-FePt films by thermally controlling the shape memory effect of the substrates. Introduced strains at this level significantly modify the electronic density of state, orbital overlap, and spin-orbit coupling (SOC) strength in the FePt film, leading to nonvolatile modulation of magnetic anisotropy and magnetization reversal characteristics. This finding not only opens an efficient avenue for the nonvolatile tuning of SOC based magnetism and spintronic effects, but also helps to clarify the physical nature of pure strain effect. PMID:26830325

  13. Nonvolatile modulation of electronic structure and correlative magnetism of L10-FePt films using significant strain induced by shape memory substrates.

    PubMed

    Feng, Chun; Zhao, Jiancheng; Yang, Feng; Gong, Kui; Hao, Shijie; Cao, Yi; Hu, Chen; Zhang, Jingyan; Wang, Zhongqiang; Chen, Lei; Li, Sirui; Sun, Li; Cui, Lishan; Yu, Guanghua

    2016-01-01

    Tuning the lattice strain (εL) is a novel approach to manipulate the magnetic, electronic, and transport properties of spintronic materials. Achievable εL in thin film samples induced by traditional ferroelectric or flexible substrates is usually volatile and well below 1%. Such limits in the tuning capability cannot meet the requirements for nonvolatile applications of spintronic materials. This study answers to the challenge of introducing significant amount of elastic strain in deposited thin films so that noticeable tuning of the spintronic characteristics can be realized. Based on subtle elastic strain engineering of depositing L10-FePt films on pre-stretched NiTi(Nb) shape memory alloy substrates, steerable and nonvolatile lattice strain up to 2.18% has been achieved in the L10-FePt films by thermally controlling the shape memory effect of the substrates. Introduced strains at this level significantly modify the electronic density of state, orbital overlap, and spin-orbit coupling (SOC) strength in the FePt film, leading to nonvolatile modulation of magnetic anisotropy and magnetization reversal characteristics. This finding not only opens an efficient avenue for the nonvolatile tuning of SOC based magnetism and spintronic effects, but also helps to clarify the physical nature of pure strain effect. PMID:26830325

  14. Nonvolatile modulation of electronic structure and correlative magnetism of L10-FePt films using significant strain induced by shape memory substrates

    NASA Astrophysics Data System (ADS)

    Feng, Chun; Zhao, Jiancheng; Yang, Feng; Gong, Kui; Hao, Shijie; Cao, Yi; Hu, Chen; Zhang, Jingyan; Wang, Zhongqiang; Chen, Lei; Li, Sirui; Sun, Li; Cui, Lishan; Yu, Guanghua

    2016-02-01

    Tuning the lattice strain (εL) is a novel approach to manipulate the magnetic, electronic, and transport properties of spintronic materials. Achievable εL in thin film samples induced by traditional ferroelectric or flexible substrates is usually volatile and well below 1%. Such limits in the tuning capability cannot meet the requirements for nonvolatile applications of spintronic materials. This study answers to the challenge of introducing significant amount of elastic strain in deposited thin films so that noticeable tuning of the spintronic characteristics can be realized. Based on subtle elastic strain engineering of depositing L10-FePt films on pre-stretched NiTi(Nb) shape memory alloy substrates, steerable and nonvolatile lattice strain up to 2.18% has been achieved in the L10-FePt films by thermally controlling the shape memory effect of the substrates. Introduced strains at this level significantly modify the electronic density of state, orbital overlap, and spin-orbit coupling (SOC) strength in the FePt film, leading to nonvolatile modulation of magnetic anisotropy and magnetization reversal characteristics. This finding not only opens an efficient avenue for the nonvolatile tuning of SOC based magnetism and spintronic effects, but also helps to clarify the physical nature of pure strain effect.

  15. Nonvolatile multilevel data storage memory device from controlled ambipolar charge trapping mechanism

    PubMed Central

    Zhou, Ye; Han, Su-Ting; Sonar, Prashant; Roy, V. A. L.

    2013-01-01

    The capability of storing multi-bit information is one of the most important challenges in memory technologies. An ambipolar polymer which intrinsically has the ability to transport electrons and holes as a semiconducting layer provides an opportunity for the charge trapping layer to trap both electrons and holes efficiently. Here, we achieved large memory window and distinct multilevel data storage by utilizing the phenomena of ambipolar charge trapping mechanism. As fabricated flexible memory devices display five well-defined data levels with good endurance and retention properties showing potential application in printed electronics. PMID:23900459

  16. Nonvolatile multilevel data storage memory device from controlled ambipolar charge trapping mechanism.

    PubMed

    Zhou, Ye; Han, Su-Ting; Sonar, Prashant; Roy, V A L

    2013-01-01

    The capability of storing multi-bit information is one of the most important challenges in memory technologies. An ambipolar polymer which intrinsically has the ability to transport electrons and holes as a semiconducting layer provides an opportunity for the charge trapping layer to trap both electrons and holes efficiently. Here, we achieved large memory window and distinct multilevel data storage by utilizing the phenomena of ambipolar charge trapping mechanism. As fabricated flexible memory devices display five well-defined data levels with good endurance and retention properties showing potential application in printed electronics. PMID:23900459

  17. Solution-processed Al-chelated gelatin for highly transparent non-volatile memory applications

    SciTech Connect

    Chang, Yu-Chi; Wang, Yeong-Her

    2015-03-23

    Using the biomaterial of Al-chelated gelatin (ACG) prepared by sol-gel method in the ITO/ACG/ITO structure, a highly transparent resistive random access memory (RRAM) was obtained. The transmittance of the fabricated device is approximately 83% at 550 nm while that of Al/gelatin/ITO is opaque. As to the ITO/gelatin/ITO RRAM, no resistive switching behavior can be seen. The ITO/ACG/ITO RRAM shows high ON/OFF current ratio (>10{sup 5}), low operation voltage, good uniformity, and retention characteristics at room temperature and 85 °C. The mechanism of the ACG-based memory devices is presented. The enhancement of these electrical properties can be attributed to the chelate effect of Al ions with gelatin. Results show that transparent ACG-based memory devices possess the potential for next-generation resistive memories and bio-electronic applications.

  18. Flexible and stackable non-volatile resistive memory for high integration

    NASA Astrophysics Data System (ADS)

    Ali, Shawkat; Bae, Jinho; Lee, Chong Hyun

    2015-08-01

    We propose a novel flexible and stackable resistive random access memory (ReRAM) array with multi-layered crossbar structures fabricated on a PET flexible substrate through EHD system. The basic memory block of the proposed device is based on one resistor and multi-layered column memristors (1R-MCM) structure, which can be easily extended to 3 dimensional columns for a high integration. To fabricate the device, the materials Ag for top and bottom electrodes, PVP for memristor, and (MEH:PPV and PMMA in acetonitrile) for pull-up resistors are used. Memory single cell is consisted of a high OFF/ON ratio (~4663) memristor and a pull-up resistor (20 MΩ) that operate on the principles of voltage divider circuit. Memory logic data is retrieve in the form of voltage levels instead of sensing current the of crossbar array. Two memory crossbar arrays are stacked vertically and they are sharing column bars, each column's memristors are with a single pull-up resistor. A 3x3 stacked memory with two layers that can store 18 bits of data is demonstrated to realize on a small area for a high integration.

  19. Layer-by-layer charging in non-volatile memory devices using embedded sub-2 nm platinum nanoparticles

    SciTech Connect

    Ramalingam, Balavinayagam; Zheng, Haisheng; Gangopadhyay, Shubhra

    2014-04-07

    In this work, we demonstrate multi-level operation of a non-volatile memory metal oxide semiconductor capacitor by controlled layer-by-layer charging of platinum nanoparticle (PtNP) floating gate devices with defined gate voltage bias ranges. The device consists of two layers of ultra-fine, sub-2 nm PtNPs integrated between Al{sub 2}O{sub 3} tunneling and separation layers. PtNP size and interparticle distance were varied to control the particle self-capacitance and associated Coulomb charging energy. Likewise, the tunneling layer thicknesses were also varied to control electron tunneling to the first and second PtNP layers. The final device configuration with optimal charging behavior and multi-level programming was attained with a 3 nm Al{sub 2}O{sub 3} initial tunneling layer, initial PtNP layer with particle size 0.54 ± 0.12 nm and interparticle distance 4.65 ± 2.09 nm, 3 nm Al{sub 2}O{sub 3} layer to separate the PtNP layers, and second particle layer with 1.11 ± 0.28 nm PtNP size and interparticle distance 2.75 ± 1.05 nm. In this device, the memory window of the first PtNP layer saturated over a programming bias range of 7 V to 14 V, after which the second PtNP layer starts charging, exhibiting a multi-step memory window with layer-by-layer charging.

  20. Logic gates realized by nonvolatile GeTe/Sb2Te3 super lattice phase-change memory with a magnetic field input

    NASA Astrophysics Data System (ADS)

    Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui

    2016-07-01

    Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.

  1. Multilevel characteristics and memory mechanisms for nonvolatile memory devices based on CuInS{sub 2} quantum dot-polymethylmethacrylate nanocomposites

    SciTech Connect

    Zhou, Yang; Yun, Dong Yeol; Kim, Tae Whan; Kim, Sang Wook

    2014-12-08

    Nonvolatile memory devices based on CuInS{sub 2} (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10{sup −10} was maintained for 8 × 10{sup 3} cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10{sup 6} cycles converged to 2.40 × 10{sup −10}, indicative of the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams.

  2. High Performance Nonvolatile Transistor Memories Utilizing Functional Polyimide-Based Supramolecular Electrets.

    PubMed

    Tung, Wei-Yao; Li, Meng-Hsien; Wu, Hung-Chin; Liu, Hsin-Yu; Hsieh, Yun-Ting; Chen, Wen-Chang

    2016-05-20

    We report pentacene-based organic field-effect transistor memory devices utilizing supramolecular electrets, consisting of a polyimide, PI(6FOH-ODPA), containing hydroxyl groups for hydrogen bonding with amine functionalized aromatic rings (AM) of 1-aniline (AM1), 2-naphthylamine (AM2), 2-aminoanthracene (AM3), and 1-aminopyrene (AM4). The effect of the phenyl ring size and composition of AM1-AM4 on the hole-trapping capability of the fabricated devices was investigated systematically. Under an operating voltage under ±40 V, the prepared devices using the electrets of 100 % AM1-AM4/PI ratios exhibited a memory window of 0, 8.59, 25.97, and 29.95 V, respectively, suggesting that the hole-trapping capability increased with enhancing phenyl ring size. The memory window was enhanced as the amount of AM in PI increased. Furthermore, the devices showed a long charge-retention time of 10(4)  s with an ON/OFF current ratio of around 10(3) -10(4) and multiple switching stability over 100 cycles. This study demonstrated that the electrical characteristics of the OFET memory devices could be manipulated through the chemical compositions of the supramolecular electrets. PMID:27061212

  3. High-G testing of MEMS mechanical non-volatile memory and silicon re-entry switch.

    SciTech Connect

    Baker, Michael Sean; Pohl, Kenneth Roy

    2005-10-01

    Two different Sandia MEMS devices have been tested in a high-g environment to determine their performance and survivability. The first test was performed using a drop-table to produce a peak acceleration load of 1792 g's over a period of 1.5 ms. For the second test the MEMS devices were assembled in a gun-fired penetrator and shot into a cement target at the Army Waterways Experiment Station in Vicksburg Mississippi. This test resulted in a peak acceleration of 7191 g's for a duration of 5.5 ms. The MEMS devices were instrumented using the MEMS Diagnostic Extraction System (MDES), which is capable of driving the devices and recording the device output data during the high-g event, providing in-flight data to assess the device performance. A total of six devices were monitored during the experiments, four mechanical non-volatile memory devices (MNVM) and two Silicon Reentry Switches (SiRES). All six devices functioned properly before, during, and after each high-g test without a single failure. This is the first known test under flight conditions of an active, powered MEMS device at Sandia.

  4. The impact of tunnel oxide nitridation to reliability performance of charge storage non-volatile memory devices.

    PubMed

    Lee, Meng Chuan; Wong, Hin Yong

    2014-02-01

    This paper is written to review the development of critical research on the overall impact of tunnel oxide nitridation (TON) with the aim to mitigate reliability issues due to incessant technology scaling of charge storage NVM devices. For more than 30 years, charge storage non-volatile memory (NVM) has been critical in the evolution of intelligent electronic devices and continuous development of integrated technologies. Technology scaling is the primary strategy implemented throughout the semiconductor industry to increase NVM density and drive down average cost per bit. In this paper, critical reliability challenges and key innovative technical mitigation methods are reviewed. TON is one of the major candidates to replace conventional oxide layer for its superior quality and reliability performance. Major advantages and caveats of key TON process techniques are discussed. The impact of TON on quality and reliability performance of charge storage NVM devices is carefully reviewed with emphasis on major advantages and drawbacks of top and bottom nitridation. Physical mechanisms attributed to charge retention and V(t) instability phenomenon are also reviewed in this paper. PMID:24749438

  5. Improved memory characteristics by NH{sub 3}-nitrided GdO as charge storage layer for nonvolatile memory applications

    SciTech Connect

    Liu, L.; Xu, J. P.; Ji, F.; Chen, J. X.; Lai, P. T.

    2012-07-16

    Charge-trapping memory capacitor with nitrided gadolinium oxide (GdO) as charge storage layer (CSL) is fabricated, and the influence of post-deposition annealing in NH{sub 3} on its memory characteristics is investigated. Transmission electron microscopy, x-ray photoelectron spectroscopy, and x-ray diffraction are used to analyze the cross-section and interface quality, composition, and crystallinity of the stack gate dielectric, respectively. It is found that nitrogen incorporation can improve the memory window and achieve a good trade-off among the memory properties due to NH{sub 3}-annealing-induced reasonable distribution profile of a large quantity of deep-level bulk traps created in the nitrided GdO film and reduction of shallow traps near the CSL/SiO{sub 2} interface.

  6. A high performance triboelectric nanogenerator for self-powered non-volatile ferroelectric transistor memory

    NASA Astrophysics Data System (ADS)

    Fang, Huajing; Li, Qiang; He, Wenhui; Li, Jing; Xue, Qingtang; Xu, Chao; Zhang, Lijing; Ren, Tianling; Dong, Guifang; Chan, H. L. W.; Dai, Jiyan; Yan, Qingfeng

    2015-10-01

    We demonstrate an integrated module of self-powered ferroelectric transistor memory based on the combination of a ferroelectric FET and a triboelectric nanogenerator (TENG). The novel TENG was made of a self-assembled polystyrene nanosphere array and a poly(vinylidene fluoride) porous film. Owing to this unique structure, it exhibits an outstanding performance with an output voltage as high as 220 V per cycle. Meanwhile, the arch-shaped TENG is shown to be able to pole a bulk ferroelectric 0.65Pb(Mg1/3Nb2/3)O3-0.35PbTiO3 (PMN-PT) single crystal directly. Based on this effect, a bottom gate ferroelectric FET was fabricated using pentacene as the channel material and a PMN-PT single crystal as the gate insulator. Systematic tests illustrate that the ON/OFF current ratio of this transistor memory element is approximately 103. More importantly, we demonstrate the feasibility to switch the polarization state of this FET gate insulator, namely the stored information, by finger tapping the TENG with a designed circuit. These results may open up a novel application of TENGs in the field of self-powered memory systems.We demonstrate an integrated module of self-powered ferroelectric transistor memory based on the combination of a ferroelectric FET and a triboelectric nanogenerator (TENG). The novel TENG was made of a self-assembled polystyrene nanosphere array and a poly(vinylidene fluoride) porous film. Owing to this unique structure, it exhibits an outstanding performance with an output voltage as high as 220 V per cycle. Meanwhile, the arch-shaped TENG is shown to be able to pole a bulk ferroelectric 0.65Pb(Mg1/3Nb2/3)O3-0.35PbTiO3 (PMN-PT) single crystal directly. Based on this effect, a bottom gate ferroelectric FET was fabricated using pentacene as the channel material and a PMN-PT single crystal as the gate insulator. Systematic tests illustrate that the ON/OFF current ratio of this transistor memory element is approximately 103. More importantly, we demonstrate the

  7. Nonvolatile resistive switching memory properties of thermally annealed titania precursor/polyelectrolyte multilayers.

    PubMed

    Lee, Chanwoo; Kim, Inpyo; Shin, Hyunjung; Kim, Sanghyo; Cho, Jinhan

    2009-10-01

    We describe a novel and versatile approach for preparing resistive switching memory devices based on transition metal oxides. A titania precursor and poly(allyamine hydrochloride) (PAH) layers were deposited alternately onto platinum (Pt)-coated silicon substrates using electrostatic interactions. The multilayers were then converted to TiO2 nanocomposite (TiO2 NC) films after thermal annealing. A top electrode was coated on the TiO2 NC films to complete device fabrication. When an external bias was applied to the devices, a switching phenomenon independent of the voltage polarity (i.e., unipolar switching) was observed at low operating voltages (approximately 0.4 VRESET and 1.3 VSET), which is comparable to that observed in conventional devices fabricated by sputtering or metal organic chemical vapor deposition processes. The reported approach offers new opportunities for preparing inorganic material-based resistive switching memory devices with tailored electronic properties, allowing facile solution processing. PMID:19725555

  8. Non-volatile transistor memory devices using charge storage cross-linked core-shell nanoparticles.

    PubMed

    Lo, Chen-Tsyr; Watanabe, Yu; Oya, Hiroshi; Nakabayashi, Kazuhiro; Mori, Hideharu; Chen, Wen-Chang

    2016-06-01

    Solution processable cross-linked core-shell poly[poly(ethylene glycol)methylether methacrylate]-block-poly(2,5-dibromo-3-vinylthiophene) (poly(PEGMA)m-b-poly(DB3VT)n) nanoparticles are firstly explored as charge storage materials for transistor-type memory devices owing to their efficient and controllable ability in electric charge transfer and trapping. PMID:27180874

  9. A high performance triboelectric nanogenerator for self-powered non-volatile ferroelectric transistor memory.

    PubMed

    Fang, Huajing; Li, Qiang; He, Wenhui; Li, Jing; Xue, Qingtang; Xu, Chao; Zhang, Lijing; Ren, Tianling; Dong, Guifang; Chan, H L W; Dai, Jiyan; Yan, Qingfeng

    2015-11-01

    We demonstrate an integrated module of self-powered ferroelectric transistor memory based on the combination of a ferroelectric FET and a triboelectric nanogenerator (TENG). The novel TENG was made of a self-assembled polystyrene nanosphere array and a poly(vinylidene fluoride) porous film. Owing to this unique structure, it exhibits an outstanding performance with an output voltage as high as 220 V per cycle. Meanwhile, the arch-shaped TENG is shown to be able to pole a bulk ferroelectric 0.65Pb(Mg1/3Nb2/3)O3-0.35PbTiO3 (PMN-PT) single crystal directly. Based on this effect, a bottom gate ferroelectric FET was fabricated using pentacene as the channel material and a PMN-PT single crystal as the gate insulator. Systematic tests illustrate that the ON/OFF current ratio of this transistor memory element is approximately 10(3). More importantly, we demonstrate the feasibility to switch the polarization state of this FET gate insulator, namely the stored information, by finger tapping the TENG with a designed circuit. These results may open up a novel application of TENGs in the field of self-powered memory systems. PMID:26350823

  10. Modeling and simulation of floating gate nanocrystal FET devices and circuits

    NASA Astrophysics Data System (ADS)

    Hasaneen, El-Sayed A. M.

    The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to

  11. A study on low-power, nanosecond operation and multilevel bipolar resistance switching in Ti/ZrO2/Pt nonvolatile memory with 1T1R architecture

    NASA Astrophysics Data System (ADS)

    Wu, Ming-Chi; Jang, Wen-Yueh; Lin, Chen-Hsi; Tseng, Tseung-Yuen

    2012-06-01

    Low-power, bipolar resistive switching (RS) characteristics in the Ti/ZrO2/Pt nonvolatile memory with one transistor and one resistor (1T1R) architecture were reported. Multilevel storage behavior was observed by modulating the amplitude of the MOSFET gate voltage, in which the transistor functions as a current limiter. Furthermore, multilevel storage was also executed by controlling the reset voltage, leading the resistive random access memory (RRAM) to the multiple metastable low resistance state (LRS). The experimental results on the measured electrical properties of the various sized devices confirm that the RS mechanism of the Ti/ZrO2/Pt structure obeys the conducting filaments model. In application, the devices exhibit high-speed switching performances (250 ns) with suitable high/low resistance state ratio (HRS/LRS > 10). The LRS of the devices with 10 year retention ability at 80 °C, based on the Arrhenius equation, is also demonstrated in the thermal accelerating test. Furthermore, the ramping gate voltage method with fixed drain voltage is used to switch the 1T1R memory cells for upgrading the memory performances. Our experimental results suggest that the ZrO2-based RRAM is a prospective alternative for nonvolatile multilevel memory device applications.

  12. Effects of Postdeposition Annealing on Cobalt Nanodots Embedded in Silica for Nonvolatile Memory Application

    NASA Astrophysics Data System (ADS)

    Pei, Yanli; Kojima, Toshiya; Hiraki, Tatsuro; Fukushima, Takafumi; Tanaka, Tetsu; Koyanagi, Mitsumasa

    2010-06-01

    We studied the effects of postdeposition annealing (PDA) on the films of cobalt nanodots (Co-NDs) dispersed in silica formed by self-assembled nanodot deposition (SAND). High-resolution transmission electron microscopy (HRTEM) analysis showed that the as-grown Co-NDs have a high density of 8×1012/cm2 and a small size of ˜1.5 nm. After PDA at 800 °C, a monolayer of Co-NDs is produced by agglomeration. Under this PDA condition, the dot size and density are easily controlled by adjusting the thickness of the as-grown Co-ND film. In contrast, a high-temperature PDA of 900 °C induces the diffusion of cobalt into the silicon substrate and leads to the failure of memory effect. When the PDA temperature is between 600 and 800 °C, a large counterclockwise hysteresis memory window is obtained. Furthermore, in this region, the charge retention is enhanced by increasing the PDA temperature, which presumably contributes to the release of oxygen from oxidized cobalt.

  13. Effects of Postdeposition Annealing on Cobalt Nanodots Embedded in Silica for Nonvolatile Memory Application

    NASA Astrophysics Data System (ADS)

    Yanli Pei,; Toshiya Kojima,; Tatsuro Hiraki,; Takafumi Fukushima,; Tetsu Tanaka,; Mitsumasa Koyanagi,

    2010-06-01

    We studied the effects of postdeposition annealing (PDA) on the films of cobalt nanodots (Co-NDs) dispersed in silica formed by self-assembled nanodot deposition (SAND). High-resolution transmission electron microscopy (HRTEM) analysis showed that the as-grown Co-NDs have a high density of 8× 1012/cm2 and a small size of ˜1.5 nm. After PDA at 800 °C, a monolayer of Co-NDs is produced by agglomeration. Under this PDA condition, the dot size and density are easily controlled by adjusting the thickness of the as-grown Co-ND film. In contrast, a high-temperature PDA of 900 °C induces the diffusion of cobalt into the silicon substrate and leads to the failure of memory effect. When the PDA temperature is between 600 and 800 °C, a large counterclockwise hysteresis memory window is obtained. Furthermore, in this region, the charge retention is enhanced by increasing the PDA temperature, which presumably contributes to the release of oxygen from oxidized cobalt.

  14. Organic nonvolatile resistive memory devices based on thermally deposited Au nanoparticle

    NASA Astrophysics Data System (ADS)

    Jin, Zhiwen; Liu, Guo; Wang, Jizheng

    2013-05-01

    Uniform Au nanoparticles (NPs) are formed by thermally depositing nominal 2-nm thick Au film on a 10-nm thick polyimide film formed on a Al electrode, and then covered by a thin polymer semiconductor film, which acts as an energy barrier for electrons to be injected from the other Al electrode (on top of polymer film) into the Au NPs, which are energetically electron traps in such a resistive random access memory (RRAM) device. The Au NPs based RRAM device exhibits estimated retention time of 104 s, cycle times of more than 100, and ON-OFF ratio of 102 to 103. The carrier transport properties are also analyzed by fitting the measured I-V curves with several conduction models.

  15. High mechanical endurance RRAM based on amorphous gadolinium oxide for flexible nonvolatile memory application

    NASA Astrophysics Data System (ADS)

    Zhao, Hongbin; Tu, Hailing; Wei, Feng; Shi, Zhitian; Xiong, Yuhua; Zhang, Yan; Du, Jun

    2015-05-01

    In this paper, we use amorphous Gd2O3 as the switching layer for fabricated RRAM devices with novel high performance, excellent flexibility, and mechanical endurance properties as potential candidate memory for flexible electronics applications. The obtained Cu/Gd2O3/Pt devices on flexible polyethylene terephthalate (PET) substrates show bipolar switching characteristics, low voltage operation (<2 V) and long retention time (>106 s). No performance degradation occurs, and the stored information is not lost after the device has been bent to different angles and up to 104 times in the bending tests. Based on temperature-dependent switching characteristics, the formation of Cu conducting filaments stemming from electrochemical reactions is believed to be the reason for the resistance switching from a high resistance state to a low resistance state. The studies of the integrated experiment and mechanism lay the foundation for the development of high-performance flexible RRAM.

  16. Nonpolar resistive switching in Cu/SiC/Au non-volatile resistive memory devices

    NASA Astrophysics Data System (ADS)

    Zhong, L.; Jiang, L.; Huang, R.; de Groot, C. H.

    2014-03-01

    Amorphous silicon carbide (a-SiC) based resistive memory (RM) Cu/a-SiC/Au devices were fabricated and their resistive switching characteristics investigated. All four possible modes of nonpolar resistive switching were achieved with ON/OFF ratio in the range 106-108. Detailed current-voltage I-V characteristics analysis suggests that the conduction mechanism in low resistance state is due to the formation of metallic filaments. Schottky emission is proven to be the dominant conduction mechanism in high resistance state which results from the Schottky contacts between the metal electrodes and SiC. ON/OFF ratios exceeding 107 over 10 years were also predicted from state retention characterizations. These results suggest promising application potentials for Cu/a-SiC/Au RMs.

  17. High reliable and stable organic field-effect transistor nonvolatile memory with a poly(4-vinyl phenol) charge trapping layer based on a pn-heterojunction active layer

    NASA Astrophysics Data System (ADS)

    Xiang, Lanyi; Ying, Jun; Han, Jinhua; Zhang, Letian; Wang, Wei

    2016-04-01

    In this letter, we demonstrate a high reliable and stable organic field-effect transistor (OFET) based nonvolatile memory (NVM) with a polymer poly(4-vinyl phenol) (PVP) as the charge trapping layer. In the unipolar OFETs, the inreversible shifts of the turn-on voltage (Von) and severe degradation of the memory window (ΔVon) at programming (P) and erasing (E) voltages, respectively, block their application in NVMs. The obstacle is overcome by using a pn-heterojunction as the active layer in the OFET memory, which supplied a holes and electrons accumulating channel at the supplied P and E voltages, respectively. Both holes and electrons transferring from the channels to PVP layer and overwriting the trapped charges with an opposite polarity result in the reliable bidirectional shifts of Von at P and E voltages, respectively. The heterojunction OFET exhibits excellent nonvolatile memory characteristics, with a large ΔVon of 8.5 V, desired reading (R) voltage at 0 V, reliable P/R/E/R dynamic endurance over 100 cycles and a long retention time over 10 years.

  18. Control over variability in nonvolatile hafnium-oxide resistive-switching memory based on modeling of the switching processes

    NASA Astrophysics Data System (ADS)

    Butcher, Brian Jerad

    Resistive random access memory (ReRAM) technology presents an attractive option for embedded non-volatile (NV) memory systems if its variability (cycle-to-cycle and device-to-device) can be controlled. This dissertation has focused on investigations to identify key mechanisms and parameters which dominate ReRAM variability, and the development of subsequent experimental and simulation-based tools to address this variability. The first component of these efforts entailed identification of the modern-day non-volatile memory technological gaps that have driven the operational requirements and challenges for resistive memory as an emerging NV memory. Initial research confirmed the critical requirement of a sub-stoichiometric (HfO2-x) dielectric regarding the enablement of stable switching and suggested a defect-driven mechanism, which is discussed in detail. Preliminary experimental work was focused on the fabrication of a durable current-limiting (1T1R) testing structure; which was utilized to enable ReRAM device characterization, reduce unwanted parasitic capacitances, and overshoot-current. Initial electrical and physical characterization confirmed a filamentary based (defect-driven) mechanism based on ReRAM scalability-trends (in device sizes ranging from 50x50nm2 to 7x7microm2). Physical analysis (AFM, TEM and EELS) verified a `dominant-filament mechanism' in transmission-metal-oxide (specifically HfO2-x) based ReRAM. A novel characterization and analysis protocol for key electrical parameters affecting filament formation for HfO2-x-based ReRAMs was developed, focusing on the roles of current, voltage, and temperature. This protocol included characterization of the high-resistive-state (HRS) dependence on the maximum FORMING current (seen during 1st RESET Imax) and the characterization of low-power endurance. This characterization protocol was employed to investigate and develop an approach for ReRAM filament formation at elevated temperatures (hot FORMING) to

  19. Direct Observation of Room-Temperature Polar Ordering in Colloidal GeTe Nanocrystals

    SciTech Connect

    Polking, Mark J.; Zheng, Haimei; Urban, Jeffrey J.; Milliron, Delia J.; Chan, Emory; Caldwell, Marissa A.; Raoux, Simone; Kisielowski, Christian F.; Ager III, Joel W.; Ramesh, Ramamoorthy; Alivisatos, A.P.

    2009-12-07

    Ferroelectrics and other materials that exhibit spontaneous polar ordering have demonstrated immense promise for applications ranging from non-volatile memories to microelectromechanical systems. However, experimental evidence of polar ordering and effective synthetic strategies for accessing these materials are lacking for low-dimensional nanomaterials. Here, we demonstrate the synthesis of size-controlled nanocrystals of the polar material germanium telluride (GeTe) using colloidal chemistry and provide the first direct evidence of room-temperature polar ordering in nanocrystals less than 5 nm in size using aberration-corrected transmission electron microscopy. Synchrotron x-ray diffraction and Raman studies demonstrate a sizeable polar distortion and a reversible size-dependent polar phase transition in these nanocrystals. The stability of polar ordering in solution-processible nanomaterials suggests an economical avenue to Tbit/in2-density non-volatile memory devices and other applications.

  20. Nonvolatile Ferroelectric Memory Circuit Using Black Phosphorus Nanosheet-Based Field-Effect Transistors with P(VDF-TrFE) Polymer.

    PubMed

    Lee, Young Tack; Kwon, Hyeokjae; Kim, Jin Sung; Kim, Hong-Hee; Lee, Yun Jae; Lim, Jung Ah; Song, Yong-Won; Yi, Yeonjin; Choi, Won-Kook; Hwang, Do Kyung; Im, Seongil

    2015-10-27

    Two-dimensional van der Waals (2D vdWs) materials are a class of new materials that can provide important resources for future electronics and materials sciences due to their unique physical properties. Among 2D vdWs materials, black phosphorus (BP) has exhibited significant potential for use in electronic and optoelectronic applications because of its allotropic properties, high mobility, and direct and narrow band gap. Here, we demonstrate a few-layered BP-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. Experiments showed that our BP-based ferroelectric transistors operate satisfactorily at room temperature in ambient air and exhibit a clear memory window. Unlike conventional ambipolar BP transistors, our ferroelectric transistors showed only p-type characteristics due to the carbon-fluorine (C-F) dipole effect of the P(VDF-TrFE) layer, as well as the highest linear mobility value of 1159 cm(2) V(-1) s(-1) with a 10(3) on/off current ratio. For more advanced memory applications beyond unit memory devices, we implemented two memory inverter circuits, a resistive-load inverter circuit and a complementary inverter circuit, combined with an n-type molybdenum disulfide (MoS2) nanosheet. Our memory inverter circuits displayed a clear memory window of 15 V and memory output voltage efficiency of 95%. PMID:26370537

  1. High performance non-volatile ferroelectric copolymer memory based on a ZnO nanowire transistor fabricated on a transparent substrate

    SciTech Connect

    Nedic, Stanko; Welland, Mark E-mail: mew10@cam.ac.uk; Tea Chun, Young; Chu, Daping E-mail: mew10@cam.ac.uk; Hong, Woong-Ki

    2014-01-20

    A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ∼16.5 V, a high drain current on/off ratio of ∼10{sup 5}, a gate leakage current below ∼300 pA, and excellent retention characteristics for over 10{sup 4} s.

  2. 5 V driving organic non-volatile memory transistors with poly(vinyl alcohol) gate insulator and poly(3-hexylthiophene) channel layers

    NASA Astrophysics Data System (ADS)

    Nam, Sungho; Seo, Jooyeok; Kim, Hwajeong; Kim, Youngkyoo

    2015-10-01

    Organic non-volatile memory devices were fabricated by employing organic field-effect transistors (OFETs) with poly(vinyl alcohol) (PVA) and poly(3-hexylthiophene) as a gate insulating layer and a channel layer, respectively. The 10-nm-thick nickel layers were inserted for better charge injection between the channel layer and the top source/drain electrodes. The fabricated PVA-OFET memory devices could be operated at low voltages (≤5 V) and showed pronounced hysteresis characteristics in the transfer curves, even though very small hysteresis was measured from the output curves. The degree of hysteresis was considerably dependent on the ratio of channel width (W) to channel length (L). The PVA-OFET memory device with the smaller W/L ratio (25) exhibited better retention characteristics upon 700 cycles of writing-reading-erasing-reading operations, which was assigned to the stability of charged states in devices.

  3. A single poly-Si gate-all-around junctionless fin field-effect transistor for use in one-time programming nonvolatile memory

    PubMed Central

    2014-01-01

    This work demonstrates a feasible single poly-Si gate-all-around (GAA) junctionless fin field-effect transistor (JL-FinFET) for use in one-time programming (OTP) nonvolatile memory (NVM) applications. The advantages of this device include the simplicity of its use and the ease with which it can be embedded in Si wafer, glass, and flexible substrates. This device exhibits excellent retention, with a memory window maintained 2 V after 104 s. By extrapolation, 95% of the original charge can be stored for 10 years. In the future, this device will be applied to multi-layer Si ICs in fully functional systems on panels, active-matrix liquid-crystal displays, and three-dimensional (3D) stacked flash memory. PMID:25404873

  4. Flexible non-volatile optical memory thin-film transistor device with over 256 distinct levels based on an organic bicomponent blend.

    PubMed

    Leydecker, Tim; Herder, Martin; Pavlica, Egon; Bratina, Gvido; Hecht, Stefan; Orgiu, Emanuele; Samorì, Paolo

    2016-09-01

    Organic nanomaterials are attracting a great deal of interest for use in flexible electronic applications such as logic circuits, displays and solar cells. These technologies have already demonstrated good performances, but flexible organic memories are yet to deliver on all their promise in terms of volatility, operational voltage, write/erase speed, as well as the number of distinct attainable levels. Here, we report a multilevel non-volatile flexible optical memory thin-film transistor based on a blend of a reference polymer semiconductor, namely poly(3-hexylthiophene), and a photochromic diarylethene, switched with ultraviolet and green light irradiation. A three-terminal device featuring over 256 (8 bit storage) distinct current levels was fabricated, the memory states of which could be switched with 3 ns laser pulses. We also report robustness over 70 write-erase cycles and non-volatility exceeding 500 days. The device was implemented on a flexible polyethylene terephthalate substrate, validating the concept for integration into wearable electronics and smart nanodevices. PMID:27323302

  5. Reversible strain-induced magnetization switching in FeGa nanomagnets: Pathway to a rewritable, non-volatile, non-toggle, extremely low energy straintronic memory.

    PubMed

    Ahmad, Hasnain; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2015-01-01

    We report reversible strain-induced magnetization switching between two stable/metastable states in ~300 nm sized FeGa nanomagnets delineated on a piezoelectric PMN-PT substrate. Voltage of one polarity applied across the substrate generates compressive strain in a nanomagnet and switches its magnetization to one state, while voltage of the opposite polarity generates tensile strain and switches the magnetization back to the original state. The two states can encode the two binary bits, and, using the right voltage polarity, one can write either bit deterministically. This portends an ultra-energy-efficient non-volatile "non-toggle" memory. PMID:26657829

  6. Reversible strain-induced magnetization switching in FeGa nanomagnets: Pathway to a rewritable, non-volatile, non-toggle, extremely low energy straintronic memory

    NASA Astrophysics Data System (ADS)

    Ahmad, Hasnain; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2015-12-01

    We report reversible strain-induced magnetization switching between two stable/metastable states in ~300 nm sized FeGa nanomagnets delineated on a piezoelectric PMN-PT substrate. Voltage of one polarity applied across the substrate generates compressive strain in a nanomagnet and switches its magnetization to one state, while voltage of the opposite polarity generates tensile strain and switches the magnetization back to the original state. The two states can encode the two binary bits, and, using the right voltage polarity, one can write either bit deterministically. This portends an ultra-energy-efficient non-volatile “non-toggle” memory.

  7. Reversible strain-induced magnetization switching in FeGa nanomagnets: Pathway to a rewritable, non-volatile, non-toggle, extremely low energy straintronic memory

    PubMed Central

    Ahmad, Hasnain; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2015-01-01

    We report reversible strain-induced magnetization switching between two stable/metastable states in ~300 nm sized FeGa nanomagnets delineated on a piezoelectric PMN-PT substrate. Voltage of one polarity applied across the substrate generates compressive strain in a nanomagnet and switches its magnetization to one state, while voltage of the opposite polarity generates tensile strain and switches the magnetization back to the original state. The two states can encode the two binary bits, and, using the right voltage polarity, one can write either bit deterministically. This portends an ultra-energy-efficient non-volatile “non-toggle” memory. PMID:26657829

  8. Multi-stimulus-responsive shape-memory polymer nanocomposite network cross-linked by cellulose nanocrystals.

    PubMed

    Liu, Ye; Li, Ying; Yang, Guang; Zheng, Xiaotong; Zhou, Shaobing

    2015-02-25

    In this study, we developed a thermoresponsive and water-responsive shape-memory polymer nanocomposite network by chemically cross-linking cellulose nanocrystals (CNCs) with polycaprolactone (PCL) and polyethylene glycol (PEG). The nanocomposite network was fully characterized, including the microstructure, cross-link density, water contact angle, water uptake, crystallinity, thermal properties, and static and dynamic mechanical properties. We found that the PEG[60]-PCL[40]-CNC[10] nanocomposite exhibited excellent thermo-induced and water-induced shape-memory effects in water at 37 °C (close to body temperature), and the introduction of CNC clearly improved the mechanical properties of the mixture of both PEG and PCL polymers with low molecular weights. In addition, Alamar blue assays based on osteoblasts indicated that the nanocomposites possessed good cytocompatibility. Therefore, this thermoresponsive and water-responsive shape-memory nanocomposite could be potentially developed into a new smart biomaterial. PMID:25647407

  9. Impact of metal nano layer thickness on tunneling oxide and memory performance of core-shell iridium-oxide nanocrystals

    SciTech Connect

    Banerjee, W.; Maikap, S.; Tien, T.-C.; Li, W.-C.; Yang, J.-R.

    2011-10-01

    The impact of iridium-oxide (IrO{sub x}) nano layer thickness on the tunneling oxide and memory performance of IrO{sub x} metal nanocrystals in an n-Si/SiO{sub 2}/Al{sub 2}O{sub 3}/IrO{sub x}/Al{sub 2}O{sub 3}/IrO{sub x} structure has been investigated. A thinner (1.5 nm) IrO{sub x} nano layer has shown better memory performance than that of a thicker one (2.5 nm). Core-shell IrO{sub x} nanocrystals with a small average diameter of 2.4 nm and a high density of {approx}2 x 10{sup 12}/cm{sup 2} have been observed by scanning transmission electron microscopy. The IrO{sub x} nanocrystals are confirmed by x-ray photoelectron spectroscopy. A large memory window of 3.0 V at a sweeping gate voltage of {+-}5 V and 7.2 V at a sweeping gate voltage of {+-} 8 V has been observed for the 1.5 nm-thick IrO{sub x} nano layer memory capacitors with a small equivalent oxide thickness of 8 nm. The electrons and holes are trapped in the core and annular regions of the IrO{sub x} nanocrystals, respectively, which is explained by Gibbs free energy. High electron and hole-trapping densities are found to be 1.5 x 10{sup 13}/cm{sup 2} and 2 x 10{sup 13}/cm{sup 2}, respectively, due to the small size and high-density of IrO{sub x} nanocrystals. Excellent program/erase endurance of >10{sup 6} cycles and good retention of 10{sup 4} s with a good memory window of >1.2 V under a small operation voltage of {+-} 5 V are obtained. A large memory size of >10 Tbit/sq. in. can be designed by using the IrO{sub x} nanocrystals. This study is not only important for the IrO{sub x} nanocrystal charge-trapping memory investigation but it will also help to design future metal nanocrystal flash memory.

  10. Optical and electrical properties of undoped and doped Ge nanocrystals

    PubMed Central

    2012-01-01

    Size-dependent photoluminescence characteristics from Ge nanocrystals embedded in different oxide matrices have been studied to demonstrate the light emission in the visible wavelength from quantum-confined charge carriers. On the other hand, the energy transfer mechanism between Er ions and Ge nanocrystals has been exploited to exhibit the emission in the optical fiber communication wavelength range. A broad visible electroluminescence, attributed to electron hole recombination of injected carriers in Ge nanocrystals, has been achieved. Nonvolatile flash-memory devices using Ge nanocrystal floating gates with different tunneling oxides including SiO2, Al2O3, HfO2, and variable oxide thickness [VARIOT] tunnel barrier have been fabricated. An improved charge storage characteristic with enhanced retention time has been achieved for the devices using VARIOT oxide floating gate. PMID:22348653

  11. Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

    PubMed

    Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

    2015-03-01

    Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively. PMID:25679117

  12. Nonvolatile electrical bistability and operating mechanism of memory devices based on CdSe/ZnS nanoparticle/polymer hybrid composites

    NASA Astrophysics Data System (ADS)

    Li, Fushan; Son, Dong Ick; Kim, Bong Jun; Kim, Tae Whan

    2008-07-01

    Current-voltage (I-V) measurements on Al/(core/shell-type CdSe /ZnS nanoparticles embedded in polymer/indium tin oxide)/glass devices showed a nonvolatile electrical bistability behavior. Capacitance-voltage (C-V) measurements on the devices showed a counterclockwise hysteresis with a flatband voltage shift due to the existence of the CdSe /ZnS nanoparticles. The on/off ratio of the electrical bistability for memory devices with a hybrid [poly-N-vinylcarbazole (PVK) and polystyrene (PS)] matrix layer was larger than those for memory devices with a PVK or a PS layer. Possible operating mechanisms for the devices are described on the basis of the I-V and the C-V results.

  13. Electrical Bistabilities and Conduction Mechanisms of Nonvolatile Memories Based on a Polymethylsilsesquioxane Insulating Layer Containing CdSe/ZnS Quantum Dots

    NASA Astrophysics Data System (ADS)

    Ma, Zehao; Ooi, Poh Choon; Li, Fushan; Yun, Dong Yeol; Kim, Tae Whan

    2015-10-01

    Nonvolatile memory (NVM) devices based on a metal-insulator-metal structure consisting of CdSe/ZnS quantum dots embedded in polymethylsilsesquioxane dielectric layers were fabricated. The current-voltage ( I- V) curves showed a bistable current behavior and the presence of hysteresis. The current-time ( I- t) curves showed that the fabricated NVM memory devices were stable up to 1 × 104 s with a distinct ON/OFF ratio of 104 and were reprogrammable when the endurance test was performed. The extrapolation of the I- t curve to 105 s with corresponding current ON/OFF ratio 1 × 105 indicated a long performance stability of the NVM devices. Schottky emission, Poole-Frenkel emission, trapped-charge limited-current and Child-Langmuir law were proposed as the dominant conduction mechanisms for the fabricated NVM devices based on the obtained I- V characteristics.

  14. A simple device unit consisting of all NiO storage and switch elements for multilevel terabit nonvolatile random access memory.

    PubMed

    Lee, Myoung-Jae; Ahn, Seung-Eon; Lee, Chang Bum; Kim, Chang-Jung; Jeon, Sanghun; Chung, U-In; Yoo, In-Kyeong; Park, Gyeong-Su; Han, Seungwu; Hwang, In Rok; Park, Bae-Ho

    2011-11-01

    Present charge-based silicon memories are unlikely to reach terabit densities because of scaling limits. As the feature size of memory shrinks to just tens of nanometers, there is insufficient volume available to store charge. Also, process temperatures higher than 800 °C make silicon incompatible with three-dimensional (3D) stacking structures. Here we present a device unit consisting of all NiO storage and switch elements for multilevel terabit nonvolatile random access memory using resistance switching. It is demonstrated that NiO films are scalable to around 30 nm and compatible with multilevel cell technology. The device unit can be a building block for 3D stacking structure because of its simple structure and constituent, high performance, and process temperature lower than 300 °C. Memory resistance switching of NiO storage element is accompanied by an increase in density of grain boundary while threshold resistance switching of NiO switch element is controlled by current flowing through NiO film. PMID:21988144

  15. High performance non-volatile memory with the control of charge trapping states in an amorphous InSnZnO active channel

    NASA Astrophysics Data System (ADS)

    Phu Thi Nguyen, Cam; Thuy Trinh, Thanh; Raja, Jayapal; Le, Anh Huy Tuan; Jang, Kyungsoo; Lee, Youn-Jung; Yi, Junsin

    2015-07-01

    In this study, the influence of interface states between an indium tin zinc oxide (ITZO) active layer and a gate insulator on memory characteristics was examined as a function of annealing temperature. The annealing nonvolatile memory (NVM) devices have shown the best electrical characteristics such as high field effect mobility (27.22 cm2 V-1 s-1), low threshold voltage (0.15 V), low subthreshold slope (0.17 V dec-1), and high on/off current ratio (7.57 × 107) in comparison with as-deposited devices. By annealing at 250 °C, the number of ITZO/insulator interface trap densities was reduced. The effect of the remaining trap states on the retention characteristic of memory devices is negligible. The performance of NVM devices using different annealing temperatures of ITZO and a multi-stack gate insulator SiO2/SiOx/SiOxNy with Si-rich SiOx for the charge storage layer was also reported. The 250 °C annealed ITZO-based NVM device showed a retention exceeding ˜94% of the threshold voltage shift after 104 s and greater than ˜90% after 10 years with a low operating voltage of +11 V at only 1 μs programming duration time. Therefore, the NVM devices, which were fabricated by the low ITZO/insulator interface trap densities, were highly suitable for potential application in memory systems.

  16. Cycling endurance of silicon{endash}oxide{endash}nitride{endash}oxide{endash}silicon nonvolatile memory stacks prepared with nitrided SiO{sub 2}/Si(100) interfaces

    SciTech Connect

    Habermehl, S.; Nasby, R.D.; Rightley, M.J.

    1999-08-01

    The effects of nitrided SiO{sub 2}/Si(100) interfaces upon cycling endurance in silicon{endash}oxide{endash}nitride{endash}oxide{endash}silicon (SONOS) nonvolatile memory transistors are investigated. Analysis of metal{endash}oxide{endash}silicon field-effect transistor subthreshold characteristics indicate cycling degradation to be a manifestation of interface trap generation at the tunnel oxide/silicon interface. After 10{sup 6} write/erase cycles, SONOS film stacks prepared with nitrided tunnel oxides exhibit enhanced cycling endurance over stacks prepared with non-nitrided tunnel oxides. If the capping oxide is formed by steam oxidation, rather than by deposition, SONOS stacks prepared with non-nitrided tunnel oxides exhibit endurance characteristics similar to stacks with nitrided tunnel oxides. For this case, a mechanism for latent nitridation of the tunnel oxide/silicon interface is proposed. {copyright} {ital 1999 American Institute of Physics.}

  17. Sub-band transport mechanism and switching properties for resistive switching nonvolatile memories with structure of silver/aluminum oxide/p-type silicon

    SciTech Connect

    Liu, Yanhong; Li, La; Wang, Song; Gao, Ping; Pan, Lujun; Zhang, Jialiang; Zhou, Peng; Li, Jinhua; Weng, Zhankun

    2015-02-09

    In this paper, we discuss a model of sub-band in resistive switching nonvolatile memories with a structure of silver/aluminum oxide/p-type silicon (Ag/Al{sub x}O{sub y}/p-Si), in which the sub-band is formed by overlapping of wave functions of electron-occupied oxygen vacancies in Al{sub x}O{sub y} layer deposited by atomic layer deposition technology. The switching processes exhibit the characteristics of the bipolarity, discreteness, and no need of forming process, all of which are discussed deeply based on the model of sub-band. The relationships between the SET voltages and distribution of trap levels are analyzed qualitatively. The semiconductor-like behaviors of ON-state resistance affirm the sub-band transport mechanism instead of the metal filament mechanism.

  18. Four-state memory based on a giant and non-volatile converse magnetoelectric effect in FeAl/PIN-PMN-PT structure

    PubMed Central

    Wei, Yanping; Gao, Cunxu; Chen, Zhendong; Xi, Shibo; Shao, Weixia; Zhang, Peng; Chen, Guilin; Li, Jiangong

    2016-01-01

    We report a stable, tunable and non-volatile converse magnetoelectric effect (ME) in a new type of FeAl/PIN-PMN-PT heterostructure at room temperature, with a giant electrical modulation of magnetization for which the maximum relative magnetization change (ΔM/M) is up to 66%. The 109° ferroelastic domain switching in the PIN-PMN-PT and coupling with the ferromagnetic (FM) film via uniaxial anisotropy originating from the PIN-PMN-PT (011) surface are the key roles in converse ME effect. We also propose here a new, four-state memory through which it is possible to modify the remanent magnetism state by adjusting the electric field. This work represents a helpful approach to securing electric-writing magnetic-reading with low energy consumption for future high-density information storage applications. PMID:27417902

  19. Evaluation and Control of Break-Even Time of Nonvolatile Static Random Access Memory Based on Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions

    NASA Astrophysics Data System (ADS)

    Shuto, Yusuke; Yamamoto, Shuu'ichirou; Sugahara, Satoshi

    2012-04-01

    The energy performance of a nonvolatile static random access memory (NV-SRAM) cell for power gating applications was quantitatively analyzed for the first time using the performance index of break-even time (BET). The NV-SRAM cell is based on spin-transistor architecture using ordinary metal-oxide-semiconductor field-effect transistors (MOSFETs) and spin-transfer-torque magnetic tunnel junctions (STT-MTJs), whose circuit representation of spin-transistor is referred to as a pseudo-spin-MOSFET (PS-MOSFET). The cell is configured with a standard six-transistor SRAM cell and two PS-MOSFETs. The NV-SRAM cell basically has a short BET of submicroseconds. Although the write (store) operation to the STT-MTJs causes an increase in the BET, it can be successfully reduced by the proposed power-aware bias-control for the PS-MOSFETs.

  20. Four-state memory based on a giant and non-volatile converse magnetoelectric effect in FeAl/PIN-PMN-PT structure.

    PubMed

    Wei, Yanping; Gao, Cunxu; Chen, Zhendong; Xi, Shibo; Shao, Weixia; Zhang, Peng; Chen, Guilin; Li, Jiangong

    2016-01-01

    We report a stable, tunable and non-volatile converse magnetoelectric effect (ME) in a new type of FeAl/PIN-PMN-PT heterostructure at room temperature, with a giant electrical modulation of magnetization for which the maximum relative magnetization change (ΔM/M) is up to 66%. The 109° ferroelastic domain switching in the PIN-PMN-PT and coupling with the ferromagnetic (FM) film via uniaxial anisotropy originating from the PIN-PMN-PT (011) surface are the key roles in converse ME effect. We also propose here a new, four-state memory through which it is possible to modify the remanent magnetism state by adjusting the electric field. This work represents a helpful approach to securing electric-writing magnetic-reading with low energy consumption for future high-density information storage applications. PMID:27417902

  1. Four-state memory based on a giant and non-volatile converse magnetoelectric effect in FeAl/PIN-PMN-PT structure

    NASA Astrophysics Data System (ADS)

    Wei, Yanping; Gao, Cunxu; Chen, Zhendong; Xi, Shibo; Shao, Weixia; Zhang, Peng; Chen, Guilin; Li, Jiangong

    2016-07-01

    We report a stable, tunable and non-volatile converse magnetoelectric effect (ME) in a new type of FeAl/PIN-PMN-PT heterostructure at room temperature, with a giant electrical modulation of magnetization for which the maximum relative magnetization change (ΔM/M) is up to 66%. The 109° ferroelastic domain switching in the PIN-PMN-PT and coupling with the ferromagnetic (FM) film via uniaxial anisotropy originating from the PIN-PMN-PT (011) surface are the key roles in converse ME effect. We also propose here a new, four-state memory through which it is possible to modify the remanent magnetism state by adjusting the electric field. This work represents a helpful approach to securing electric-writing magnetic-reading with low energy consumption for future high-density information storage applications.

  2. Colossal Electroresistive Properties Of CSD Grown Pr{sub 0.7}Ca{sub 0.3}MnO{sub 3} Films For Nonvolatile Memory Applications

    SciTech Connect

    Bhavsar, K. H.; Joshi, U. S.

    2010-12-01

    Colossal electroresistance effects upon application of electric field in perovskite oxide Pr{sub 0.7}Ca{sub 0.3}MnO{sub 3}(PCMO) thin films, which is a promising candidate for resistance random access memory (RRAM) device have been investigated. Nanocrystalline PCMO films were grown on SiO{sub 2} substrates by chemical solution deposition and crystallized at 700 deg. C under different gas atmospheres. Four terminal current voltage characteristics of Ag/PCMO/Ag planar geometry exhibited a sharp transition from a low resistance state (LRS) to a high resistance state (HRS) with a resistance switching ratio of as high as 1100% at room temperature. Nonvolatility and high retention was confirmed by electric pulse induced resistive switching measurements. The resistance switching ratios were found to depend on the annealing conditions, suggesting an interaction between the nonlattice oxygen and oxygen vacancies and/or the cationic vacancy.

  3. Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications

    PubMed Central

    Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Priya, Shashank

    2015-01-01

    We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~106 s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062

  4. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    NASA Astrophysics Data System (ADS)

    Islam, Sk Masiul; Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P.; Chakraborty, S.; Mukherjee, Rabibrata

    2015-06-01

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO2 and ZrO2, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×1011 cm-2, respectively. The device with a structure Metal/ZrO2/InAs QDs/HfO2/GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10-6 A/cm2 and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO2 deposition.

  5. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    SciTech Connect

    Islam, Sk Masiul Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P.; Chakraborty, S.

    2015-06-24

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.

  6. Investing the effectiveness of retention performance in a non-volatile floating gate memory device with a core-shell structure of CdSe nanoparticles

    NASA Astrophysics Data System (ADS)

    Lee, Dong-Hoon; Kim, Jung-Min; Lim, Ki-Tae; Cho, Hyeong Jun; Bang, Jin Ho; Kim, Yong-Sang

    2016-03-01

    In this paper, we empirically investigate the retention performance of organic non-volatile floating gate memory devices with CdSe nanoparticles (NPs) as charge trapping elements. Core-structured CdSe NPs or core-shell-structured ZnS/CdSe NPs were mixed in PMMA and their performance in pentacene based device was compared. The NPs and self-organized thin tunneling PMMA inside the devices exhibited hysteresis by trapping hole during capacitance-voltage characterization. Despite of core-structured NPs showing a larger memory window, the retention time was too short to be adopted by an industry. By contrast core-shell structured NPs showed an improved retention time of >10000 seconds than core-structure NCs. Based on these results and the energy band structure, we propose the retention mechanism of each NPs. This investigation of retention performance provides a comparative and systematic study of the charging/discharging behaviors of NPs based memory devices. [Figure not available: see fulltext.

  7. Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications.

    PubMed

    Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N; Hudait, Mantu K; Banerji, Pallab; Priya, Shashank

    2015-01-01

    We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~10(6) s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062

  8. Resistive Switching of Individual Dislocations in Insulating Perovskites -- A Potential Route Towards Nanoscale Non-Volatile Memories.

    NASA Astrophysics Data System (ADS)

    Szot, Krzystof; Speier, Wolfgang; Bihlmayer, Gustav; Waser, Rainer

    2006-03-01

    Electrically controlled resistive switching effects have been reported for a broad variety of binary and multinary oxides in recent years. In particular, titanates, zirconates, and manganites have been in the focus of the studies. In many cases, the mechanism of the switching and the geometrical extension of the phenomenon (filaments vs. bulk) are still under discussion. In this work, we present evidence for a redox-based switching mechanism and we indicate a potential route towards highly scalable non-volatile memories based on this switching effect. The challenge our work is to utilize resistive switching mechanism with the aim to construct active electronic elements on a real nanoscale level, here by reversibly switching the electrical properties of individual dislocations by electrical stimuli. We demonstrate that standard undoped SrTiO3 single crystals, utilized as a model system, exhibit a switching behavior along filaments based on dislocations, mediated by oxygen transport. For this, we employed a three-step procedure: the crystals were, at first, annealed at elevated temperatures under reducing conditions, then exposed to 200mbar O2 pressure at room temperature, and finally subjected to an electric field under ultrahigh vacuum (electroformation). This treatment induced in a metal-insulator (SrTiO3)-metal (MIM) system a transition to metallic state. A hysteretic behavior appears after dynamical polarization of the MIM structure at the maximum electroforming currents. The shape of the I/V curve has the typical signature for bi-stable switching known for these types of perovskites. The positive temperature dependence of the resistance of the low- (LRS) and the high-resistance (HRS) state clearly identifies both states to be metallic in character. The inhomogeneity of the electrical transport becomes directly evident from a simple optical inspection and the conductivity maps as measured by LC-AFM of a planar structure. One can trace the formation of the

  9. Epitaxial iron oxide nanocrystals with memory function grown on Si substrates

    NASA Astrophysics Data System (ADS)

    Ishibe, Takafumi; Matsui, Hideki; Watanabe, Kentaro; Takeuchi, Shotaro; Sakai, Akira; Nakamura, Yoshiaki

    2016-05-01

    High-density Fe3O4‑δ nanocrystals (NCs) were epitaxially grown on Si substrates by molecular beam epitaxy with epitaxial Ge NCs being used as nucleation sites. Scanning tunneling spectroscopy measurements showed that the surface bandgap of the as-grown Fe3O4‑δ NCs was ∼0.2 eV, consistent with that reported for Fe3O4‑δ films. Conductive atomic force microscopy measurements of the NCs revealed hysteresis in the voltage–current curves, indicating bipolar resistive switching behavior. The measurement results established the superiority of the NCs to thin conventional polycrystalline Fe3O4‑δ films/Si in terms of resistive switching characteristics. This demonstrated the possibility of developing resistance random access memory devices composed of ubiquitous Fe3O4‑δ NC materials.

  10. Shape-memory bionanocomposites based on chitin nanocrystals and thermoplastic polyurethane with a highly crystalline soft segment.

    PubMed

    Saralegi, Ainara; Fernandes, Susana C M; Alonso-Varona, Ana; Palomares, Teodoro; Foster, E Johan; Weder, Christoph; Eceiza, Arantxa; Corcuera, Maria Angeles

    2013-12-01

    Shape-memory bionanocomposites based on a naturally sourced segmented thermoplastic polyurethane and chitin nanocrystals were synthesized, and their mechanical properties and thermally activated shape-memory behavior were studied. The chitin nanocrystals were incorporated during the synthesis of the prepolymer made from a castor oil-based difunctional polyol and hexamethylene diisocyanate. The polymerization was completed by addition of propanediol, as a corn-sugar based chain extender, bringing the weight content of components from renewable resources to >60%. Thermal analysis of the bionanocomposites revealed a phase-separated morphology, which is composed of soft and hard domains, which bestow the material with two melting transitions at 60 and 125 °C, that are exploitable for a shape memory effect. The soft segment is responsible for temporary shape fixing, while the hard segment crystallites are responsible for the permanent shape. The introduction of small amounts (0.25-2 wt %) of chitin nanocrystals was found to increase the crystallinity of the hard segment by way of nucleation, which in turn improves the shape recovery considerably. The thermally activated shape-memory behavior of the synthesized bionancomposites is exploitable with a programming and release temperature of 60 °C. The materials display good in vitro cell response, as shown by short-term cytotoxicity assays, and therefore, the bionanocomposites appear to be potentially useful for biomedical applications. PMID:24187934

  11. High-performance a MoS2 nanosheet-based nonvolatile memory transistor with a ferroelectric polymer and graphene source-drain electrode

    NASA Astrophysics Data System (ADS)

    Lee, Young Tack; Hwang, Do Kyung; Im, Seongil

    2015-11-01

    Two-dimensional (2D) van der Waals (vdWs) materials are a class of new materials due to their unique physical properties. Of the many 2D vdWs materials, molybdenum disulfide (MoS2) is a representative n-type transition-metal dichalcogenide (TMD) semiconductor. Here, we report on a high-performance MoS2 nanosheet-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. In order to enhance the ohmic contact property, we use graphene flakes as source/drain electrodes prepared by using the direct imprinting method with an elastomer stamp. The MoS2 ferroelectric field-effect transistor (FeFET) shows the highest linear electron mobility value of 175 cm2/Vs with a high on/off current ratio of more than 107, and a very clear memory window of more than 15 V. The program and erase dynamics and the static retention properties are also well demonstrated.

  12. Role of the nano amorphous interface in the crystallization of Sb2Te3 towards non-volatile phase change memory: insights from first principles.

    PubMed

    Wang, Xue-Peng; Chen, Nian-Ke; Li, Xian-Bin; Cheng, Yan; Liu, X Q; Xia, Meng-Jiao; Song, Z T; Han, X D; Zhang, S B; Sun, Hong-Bo

    2014-06-14

    The nano amorphous interface is important as it controls the phase transition for data storage. Yet, atomic scale insights into such kinds of systems are still rare. By first-principles calculations, we obtain the atomic interface between amorphous Si and amorphous Sb2Te3, which prevails in the series of Si-Sb-Te phase change materials. This interface model reproduces the experiment-consistent phenomena, i.e. the amorphous stability of Sb2Te3, which defines the data retention in phase change memory, and is greatly enhanced by the nano interface. More importantly, this method offers a direct platform to explore the intrinsic mechanism to understand the material function: (1) by steric effects through the atomic "channel" of the amorphous interface, the arrangement of the Te network is significantly distorted and is separated from the p-orbital bond angle in the conventional phase-change material; and (2) through the electronic "channel" of the amorphous interface, high localized electrons in the form of a lone pair are "projected" to Sb2Te3 from amorphous Si by a proximity effect. These factors set an effective barrier for crystallization and improve the amorphous stability, and thus data retention. The present research and scheme sheds new light on the engineering and manipulation of other key amorphous interfaces, such as Si3N4/Ge2Sb2Te5 and C/Sb2Te3, through first-principles calculations towards non-volatile phase change memory. PMID:24759902

  13. Multilevel nonvolatile flexible organic field-effect transistor memories employing polyimide electrets with different charge-transfer effects.

    PubMed

    Yu, An-Dih; Tung, Wei-Yao; Chiu, Yu-Cheng; Chueh, Chu-Chen; Liou, Guey-Sheng; Chen, Wen-Chang

    2014-06-01

    The electrical memory characteristics of the n-channel organic field-effect transistors (OFETs) employing diverse polyimide (PI) electrets are reported. The synthesized PIs comprise identical electron donor and three different building blocks with gradually increasing electron-accepting ability. The distinct charge-transfer capabilities of these PIs result in varied type of memory behaviors from the write-one-read-many (WORM) to flash type. Finally, a prominent flexible WORM-type transistor memory is demonstrated and shows not only promising write-many-read-many (WMRM) multilevel data storage but also excellent mechanical and retention stability. PMID:24700508

  14. Fabrication of InGaZnO Nonvolatile Memory Devices at Low Temperature of 150 degrees C for Applications in Flexible Memory Displays and Transparency Coating on Plastic Substrates.

    PubMed

    Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin

    2016-05-01

    We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays. PMID:27483835

  15. Magnetic Random Access Memory based non-volatile asynchronous Muller cell for ultra-low power autonomous applications

    NASA Astrophysics Data System (ADS)

    Di Pendina, G.; Zianbetov, E.; Beigne, E.

    2015-05-01

    Micro and nano electronic integrated circuit domain is today mainly driven by the advent of the Internet of Things for which the constraints are strong, especially in terms of power consumption and autonomy, not only during the computing phases but also during the standby or idle phases. In such ultra-low power applications, the circuit has to meet new constraints mainly linked to its changing energetic environment: long idle phases, automatic wake up, data back-up when the circuit is sporadically turned off, and ultra-low voltage power supply operation. Such circuits have to be completely autonomous regarding their unstable environment, while remaining in an optimum energetic configuration. Therefore, we propose in this paper the first MRAM-based non-volatile asynchronous Muller cell. This cell has been simulated and characterized in a very advanced 28 nm CMOS fully depleted silicon-on-insulator technology, presenting good power performance results due to an extremely efficient body biasing control together with ultra-wide supply voltage range from 160 mV up to 920 mV. The leakage current can be reduced to 154 pA thanks to reverse body biasing. We also propose an efficient standard CMOS bulk version of this cell in order to be compatible with different fabrication processes.

  16. Magnetic Random Access Memory based non-volatile asynchronous Muller cell for ultra-low power autonomous applications

    SciTech Connect

    Di Pendina, G. E-mail: eldar.zianbetov@cea.fr Zianbetov, E. E-mail: eldar.zianbetov@cea.fr; Beigne, E. E-mail: eldar.zianbetov@cea.fr

    2015-05-07

    Micro and nano electronic integrated circuit domain is today mainly driven by the advent of the Internet of Things for which the constraints are strong, especially in terms of power consumption and autonomy, not only during the computing phases but also during the standby or idle phases. In such ultra-low power applications, the circuit has to meet new constraints mainly linked to its changing energetic environment: long idle phases, automatic wake up, data back-up when the circuit is sporadically turned off, and ultra-low voltage power supply operation. Such circuits have to be completely autonomous regarding their unstable environment, while remaining in an optimum energetic configuration. Therefore, we propose in this paper the first MRAM-based non-volatile asynchronous Muller cell. This cell has been simulated and characterized in a very advanced 28 nm CMOS fully depleted silicon-on-insulator technology, presenting good power performance results due to an extremely efficient body biasing control together with ultra-wide supply voltage range from 160 mV up to 920 mV. The leakage current can be reduced to 154 pA thanks to reverse body biasing. We also propose an efficient standard CMOS bulk version of this cell in order to be compatible with different fabrication processes.

  17. Nonvolatile memory characteristics of organic thin film transistors using poly(2-hydroxyethyl methacrylate)-based polymer multilayer dielectric

    NASA Astrophysics Data System (ADS)

    Chen, Ying-Chih; Su, Yan-Kuin; Yu, Hsin-Chieh; Huang, Chun-Yuan; Huang, Tsung-Syun

    2011-10-01

    A wide hysteresis width characteristic (memory window) was observed in the organic thin film transistors (OTFTs) using poly(2-hydroxyethyl methacrylate) (PHEMA)-based polymer multilayers. In this study, a strong memory effect was also found in the pentacene-based OTFTs and the electric characteristics were improved by introducing PHEMA/poly(methyl methacrylate) (PMMA)/PHEMA trilayer to replace the conventional PHEMA monolayer or PMMA/PHEMA and PHEMA/PMMA bilayer as the dielectric layers of OTFTs. The memory effect was originated from the electron trapping and slow polarization of the dielectrics. The hydroxyl (-OH) groups inside the polymer dielectric were the main charge storage sites of the electrons. This charge-storage phenomenon could lead to a wide flat-band voltage shift (memory window, △VFB = 22 V) which is essential for the OTFTs' memory-related applications. Moreover, the fabricated transistors also exhibited significant switchable channel current due to the charge-storage and slow charge relaxation.

  18. Effect of hydrogen ion beam treatment on Si nanocrystal/SiO2 superlattice-based memory devices

    NASA Astrophysics Data System (ADS)

    Fu, Sheng-Wen; Chen, Hui-Ju; Wu, Hsuan-Ta; Chuang, Bing-Ru; Shih, Chuan-Feng

    2016-03-01

    This study presents a novel route for synthesizing silicon-rich oxide (SRO)/SiO2 superlattice-based memory devices with an improved memory window and retention properties. The SiO2 and SRO superlattices are deposited by reactive sputtering. Specifically, the hydrogen ion beam is used to irradiate the SRO layer immediately after its deposition in the vacuum chamber. The use of the hydrogen ion beam was determined to increase oxygen content and the density of the Si nanocrystals. The memory window increased from 16 to 25.6 V, and the leakage current decreased significantly by two orders, to under ±20 V, for the hydrogen ion beam-prepared devices. This study investigates the mechanism into how hydrogen ion beam treatment alters SRO films and influences memory properties.

  19. Enhanced non-volatile memory characteristics with quattro-layer graphene nanoplatelets vs. 2.85-nm Si nanoparticles with asymmetric Al2O 3/HfO 2 tunnel oxide.

    PubMed

    El-Atab, Nazek; Turgut, Berk Berkan; Okyay, Ali K; Nayfeh, Munir; Nayfeh, Ammar

    2015-12-01

    In this work, we demonstrate a non-volatile metal-oxide semiconductor (MOS) memory with Quattro-layer graphene nanoplatelets as charge storage layer with asymmetric Al2O3/HfO2 tunnel oxide and we compare it to the same memory structure with 2.85-nm Si nanoparticles charge trapping layer. The results show that graphene nanoplatelets with Al2O3/HfO2 tunnel oxide allow for larger memory windows at the same operating voltages, enhanced retention, and endurance characteristics. The measurements are further confirmed by plotting the energy band diagram of the structures, calculating the quantum tunneling probabilities, and analyzing the charge transport mechanism. Also, the required program time of the memory with ultra-thin asymmetric Al2O3/HfO2 tunnel oxide with graphene nanoplatelets storage layer is calculated under Fowler-Nordheim tunneling regime and found to be 4.1 ns making it the fastest fully programmed MOS memory due to the observed pure electrons storage in the graphene nanoplatelets. With Si nanoparticles, however, the program time is larger due to the mixed charge storage. The results confirm that band-engineering of both tunnel oxide and charge trapping layer is required to enhance the current non-volatile memory characteristics. PMID:26055483

  20. Determination of the optimal cation composition of ferroelectric (ZnxCd1-x)S thin films for applications to silicon-based nonvolatile memories

    NASA Astrophysics Data System (ADS)

    Hotta, Y.; Rokuta, E.; Jhoi, J.-H.; Tabata, H.; Kobayashi, H.; Kawai, T.

    2002-04-01

    Thin films of ferroelectric binary mixed II-VI compounds such as (ZnxCd1-x)S, as well as (ZnyCd1-y)Te and (ZnzCd1-z)Se (0⩽x,y,z⩽1), were examined from the standpoint of the application to Si-based nonvolatile memories. Electronic-band discontinuities at the ferroelectric-Si interface decreased significantly with increase in the atomic number of the constituent chalcogenide atoms, which favored (ZnxCd1-x)S as the most potential gate ferroelectrics among the three compounds. Polarization-field (P-E) characteristics of the (ZnxCd1-x)S films were found to largely depend on the cation composition. No hysteretic behaviors in the P-E curves were observed for high-Zn concentrations above x=0.5, while the P-E curves traced hysteretic loops due to the ferroelectricity for x<0.5. The remnant polarization was greatly dependent on the Zn concentration, and yielded a maximum of 0.03 μC/cm2 for x=0.3. On the other hand, the coercive field was not composition dependent, and was approximately 12 kV/cm.

  1. Laser-induced nondestructive patterning of a thin ferroelectric polymer film with controlled crystals using Ge8Sb2Te11 alloy layer for nonvolatile memory.

    PubMed

    Bae, Insung; Kim, Richard Hahnkee; Hwang, Sun Kak; Kang, Seok Ju; Park, Cheolmin

    2014-09-10

    We present a simple but robust nondestructive process for fabricating micropatterns of thin ferroelectric polymer films with controlled crystals. Our method is based on utilization of localized heat arising from thin Ge(8)Sb(2)Te(11) (GST) alloy layer upon exposure of 650 nm laser. The heat was generated on GST layer within a few hundred of nanosecond exposure and subsequently transferred to a thin poly(vinylidene fluoride-co-trifluoroethylene) film deposited on GST layer. By controlling exposure time and power of the scanned laser, ferroelectric patterns of one or two microns in size are fabricated with various shape. In the micropatterned regions, ferroelectric polymer crystals were efficiently controlled in both degree of the crystallinity and the molecular orientations. Nonvolatile memory devices with laser scanned ferroelectric polymer layers exhibited excellent device performance of large remnant polarization, ON/OFF current ratio and data retention. The results are comparable with devices containing ferroelectric films thermally annealed at least for 2 h, making our process extremely efficient for saving time. Furthermore, our approach can be conveniently combined with a number of other functional organic materials for the future electronic applications. PMID:25127181

  2. Simulation of Nanoscale Two-Bit Not-And-type Silicon-Oxide-Nitride-Oxide-Silicon Nonvolatile Memory Devices with a Separated Double-Gate Fin Field Effect Transistor Structure Containing Different Tunneling Oxide Thicknesses

    NASA Astrophysics Data System (ADS)

    Oh, Se Woong; Park, Sang Su; Kim, Dong Hun; Kim, Hyun Woo; Kim, Tae Whan

    2009-06-01

    Not-and (NAND)-type silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory (NVM) devices with a separated double-gate (SDG) Fin field effect transistor structure were proposed to reduce the unit cell size of such memory devices and increase their memory density in comparison with that of conventional NVM devices. The proposed memory device consisted of a pair of control gates separated along the length of the Fin channel direction. Each SDG had a different thickness of the tunneling oxide to operate the proposed memory device as a two-bit/cell device. A technology computer-aided design simulation was performed to investigate the program/erase and two-bit characteristics. The simulation results show that the proposed devices can be used to increase the scaling down capability and charge storage density of NAND-type SONOS NVM devices.

  3. High uniformity and improved nonlinearity by embedding nanocrystals in selector-less resistive random access memory.

    PubMed

    Banerjee, Writam; Lu, Nianduan; Li, Ling; Sun, Pengxiao; Liu, Qi; Lv, Hangbing; Long, Shibing; Liu, Ming

    2014-12-10

    The sneak path problem is one of the major hindrances for the application of high density 3D crossbar resistive random access memory (RRAM). For the selector-less RRAM devices, nonlinear (NL) current-voltage (I-V) characteristics are an alternative approach to minimize the sneak paths. In this work we have demonstrated metallic IrOx nanocrystal (IrOx-NC) based selector-less crossbar RRAM devices in an IrOx/AlOx/IrOx-NC/AlOx/W structure with very reliable hysteresis resistive switching of >10 000 cycles, stable multiple levels, and high temperature (HT) data retention. Moreover, an improvement in the NL behavior has been reported as compared to a pure high-κ AlOx RRAM. The origin of the NL nature has been discussed using the hopping model and Luittenger's 1D metal theory. The nonlinearity can be further improved by structure engineering and will improve the sensing margin of the devices, which is rewarding for crossbar array integration. PMID:25491764

  4. Size-dependent metal-insulator transition in platinum-dispersed silicon dioxide thin film: A candidate for future non-volatile memory

    NASA Astrophysics Data System (ADS)

    Chen, Albert B. K.

    Non-volatile random access memories (NVRAM) are promising data storage and processing devices. Various NVRAM, such as FeRAM and MRAM, have been studied in the past. But resistance switching random access memory (RRAM) has demonstrated the most potential for replacing flash memory in use today. In this dissertation, a novel RRAM material design that relies upon an electronic transition, rather than a phase change (as in chalcogenide Ovonic RRAM) or a structural change (such in oxide and halide filamentary RRAM), is investigated. Since the design is not limited to a single material but applicable to general combinations of metals and insulators, the goal of this study is to use a model material to delineate the intrinsic features of the electronic metal/insulator transition in random systems and to demonstrate their relevance to reliable memory storage and retrieval. We fabricated amorphous SiO2 thin films embedded with randomly dispersed Pt atoms. Macroscopically, this random material exhibits a percolation transition in electric conductivity similar to the one found in various insulator/metal granular materials. However, at Pt concentrations well below the bulk percolation limit, a distinct insulator to metal transition occurs in the thickness direction as the film thickness falls below electron's "diffusion" distance, which is the tunneling distance at 0K. The thickness-triggered metal- to-insulator transition (MIT) can be similarly triggered by other conditions: (a) a changing Pt concentration (a concentration-triggered MIT), (b) a changing voltage/polarity (voltage-triggered MIT), and (c) an UV irradiation (photon-triggered MIT). The resistance switching characteristics of this random material were further investigated in several device configurations under various test conditions. These include: materials for the top and bottom electrodes, fast pulsing, impedance spectroscopy, static stressing, retention, fatigue and temperature from 10K to 448K. The SiO2-Pt

  5. Defect states and charge trapping characteristics of HfO{sub 2} films for high performance nonvolatile memory applications

    SciTech Connect

    Zhang, Y.; Shao, Y. Y.; Lu, X. B. Zeng, M.; Zhang, Z.; Gao, X. S.; Zhang, X. J.; Liu, J.-M.; Dai, J. Y.

    2014-10-27

    In this work, we present significant charge trapping memory effects of the metal-hafnium oxide-SiO{sub 2}-Si (MHOS) structure. The devices based on 800 °C annealed HfO{sub 2} film exhibit a large memory window of ∼5.1 V under ±10 V sweeping voltages and excellent charge retention properties with only small charge loss of ∼2.6% after more than 10{sup 4 }s retention. The outstanding memory characteristics are attributed to the high density of deep defect states in HfO{sub 2} films. We investigated the defect states in the HfO{sub 2} films by photoluminescence and photoluminescence excitation measurements and found that the defect states distributed in deep energy levels ranging from 1.1 eV to 2.9 eV below the conduction band. Our work provides further insights for the charge trapping mechanisms of the HfO{sub 2} based MHOS devices.

  6. Resistive switching characteristics of ZnO thin film grown on stainless steel for flexible nonvolatile memory devices

    SciTech Connect

    Lee, Seunghyup; Kim, Heejin; Yong, Kijung; Yun, Dong-Jin; Rhee, Shi-Woo

    2009-12-28

    This paper reports a resistive switching device of Au/ZnO/stainless steel (SS) and its applicability as a flexible resistive random access memory (ReRAM). The Au/ZnO/SS structure was fabricated by radio frequency sputtering deposition of a ZnO thin film on the SS substrate. The fabricated device showed stable unipolar and bipolar resistive switching behaviors with reliable switching responses over 100 cycles. The device performance was not degraded upon bending, which indicates high potential for flexible ReRAM applications.

  7. Charge-trapping characteristics of fluorinated thin ZrO{sub 2} film for nonvolatile memory applications

    SciTech Connect

    Huang, X. D. E-mail: laip@eee.hku.hk; Shi, R. P.; Lai, P. T. E-mail: laip@eee.hku.hk

    2014-04-21

    The effects of fluorine treatment on the charge-trapping characteristics of thin ZrO{sub 2} film are investigated by physical and electrical characterization techniques. The formation of silicate interlayer at the ZrO{sub 2}/SiO{sub 2} interface is effectively suppressed by fluorine passivation. However, excessive fluorine diffusion into the Si substrate deteriorates the quality of the SiO{sub 2}/Si interface. Compared with the ZrO{sub 2}-based memory devices with no or excessive fluorine treatment, the one with suitable fluorine-treatment time shows higher operating speed and better retention due to less resistance of built-in electric field (formed by trapped electrons) against electron injection from the substrate and smaller trap-assisted tunneling leakage, resulting from improved ZrO{sub 2}/SiO{sub 2} and SiO{sub 2}/Si interfaces.

  8. LaTiON/LaON as band-engineered charge-trapping layer for nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Huang, X. D.; Lai, P. T.; Sin, Johnny K. O.

    2012-07-01

    Charge-trapping characteristics of stacked LaTiON/LaON film were investigated based on Al/Al2O3/LaTiON-LaON/SiO2/Si (band-engineered MONOS) capacitors. The physical properties of the high- k films were analyzed by X-ray diffraction, transmission electron microscopy and X-ray photoelectron spectroscopy. The band profile of this band-engineered MONOS device was characterized by investigating the current-conduction mechanism. By adopting stacked LaTiON/LaON film instead of LaON film as charge-trapping layer, improved electrical properties can be achieved in terms of larger memory window (5.4 V at ±10-V sweeping voltage), higher program speed with lower operating gate voltage (2.1 V at 100-μs +6 V), and smaller charge loss rate at 125 °C, mainly due to the variable tunneling path of charge carriers under program/erase and retention modes (realized by the band-engineered charge-trapping layer), high trap density of LaTiON, and large barrier height at LaTiON/SiO2 (2.3 eV).

  9. Multistability, ionic doping, and charge dynamics in electrosynthesized polypyrrole, polymer-nanoparticle blend nonvolatile memory, and fixed p-i-n junction polymer light-emitting electrochemical cells

    NASA Astrophysics Data System (ADS)

    Simon, Daniel Theodore

    A variety of factors make semiconducting polymers a fascinating alternative for both device development and new areas of fundamental research. Among these are solution processability, low cost, flexibility, and the strong dependence of conduction on the presence of charge compensating ions. With the lack of a complete fundamental understanding of the materials, and the growing demand for novel solutions to semiconductor device design, research in the field can take many, often multifaceted, routes. Due to ion-mediated conduction and versatility of fabrication, conducting polymers can provide a route to the study of neural signaling. In the first of three research topics presented, junctions of polypyrrole electropolymenzed on microelectrode arrays are demonstrated. Indi vidual junctions, when synthesized in a three-electrode configuration, exhibit current switching behavior analogous to neural weighting. Junctions copolymerized with thiophene exhibit current rectification and the nonlinear current-voltage behavior requisite for complex neural systems. Applications to larger networks, and eventual use in analysis of signaling, are discussed. In the second research topic, nonvolatile resistive memory consisting of gold nanoparticles embedded in a polymer film is examined using admittance spectroscopy. The frequency dependence of the devices indicates space-charge-limited transport in the high-conductivity "on" state, and similar transport in the lower-conductivity "off' state. Furthermore, a larger do capacitance of the on state indicates that a greater amount of filling of midgap trap levels introduced by the nanoparticles increases conductivity, leading to the memory effect. Implications on the question as to whether or not the on state is the result of percolation pathways is discussed. The third and final research topic is a presentation of enhanced efficiency of polymer light-emitting electrochemical cells (LECs) by means of forming a doping self

  10. Effect of ZnO channel thickness on the device behaviour of nonvolatile memory thin film transistors with double-layered gate insulators of Al2O3 and ferroelectric polymer

    NASA Astrophysics Data System (ADS)

    Yoon, Sung-Min; Yang, Shin-Hyuk; Park, Sang-Hee Ko; Jung, Soon-Won; Cho, Doo-Hee; Byun, Chun-Won; Kang, Seung-Youl; Hwang, Chi-Sun; Yu, Byoung-Gon

    2009-12-01

    Poly(vinylidene fluoride trifluoroethylene) and ZnO were employed for nonvolatile memory thin film transistors as ferroelectric gate insulator and oxide semiconducting channel layers, respectively. It was proposed that the thickness of the ZnO layer be carefully controlled for realizing the lower programming voltage, because the serially connected capacitor by the formation of a fully depleted ZnO channel had a critical effect on the off programming voltage. The fabricated memory transistor with Al/P(VDF-TrFE) (80 nm)/Al2O3 (4 nm)/ZnO (5 nm) exhibits encouraging behaviour such as a memory window of 3.8 V at the gate voltage of -10 to 12 V, and 107 on/off ratio, and a gate leakage current of 10-11 A.

  11. Active Flash: Performance-Energy Tradeoffs for Out-of-Core Processing on Non-Volatile Memory Devices

    SciTech Connect

    Boboila, Simona; Kim, Youngjae; Vazhkudai, Sudharshan S; Desnoyers, Peter; Shipman, Galen M

    2012-01-01

    In this abstract, we study the performance and energy tradeoffs involved in migrating data analysis into the flash device, a process we refer to as Active Flash. The Active Flash paradigm is similar to 'active disks', which has received considerable attention. Active Flash allows us to move processing closer to data, thereby minimizing data movement costs and reducing power consumption. It enables true out-of-core computation. The conventional definition of out-of-core solvers refers to an approach to process data that is too large to fit in the main memory and, consequently, requires access to disk. However, in Active Flash, processing outside the host CPU literally frees the core and achieves real 'out-of-core' analysis. Moving analysis to data has long been desirable, not just at this level, but at all levels of the system hierarchy. However, this requires a detailed study on the tradeoffs involved in achieving analysis turnaround under an acceptable energy envelope. To this end, we first need to evaluate if there is enough computing power on the flash device to warrant such an exploration. Flash processors require decent computing power to run the internal logic pertaining to the Flash Translation Layer (FTL), which is responsible for operations such as address translation, garbage collection (GC) and wear-leveling. Modern SSDs are composed of multiple packages and several flash chips within a package. The packages are connected using multiple I/O channels to offer high I/O bandwidth. SSD computing power is also expected to be high enough to exploit such inherent internal parallelism within the drive to increase the bandwidth and to handle fast I/O requests. More recently, SSD devices are being equipped with powerful processing units and are even embedded with multicore CPUs (e.g. ARM Cortex-A9 embedded processor is advertised to reach 2GHz frequency and deliver 5000 DMIPS; OCZ RevoDrive X2 SSD has 4 SandForce controllers, each with 780MHz max frequency

  12. Enhanced Memory Behavior in Phase-Change Nonvolatile-Memory Devices Using Multilayered Structure of Compositionally Modified Ge-Sb-Te Films

    NASA Astrophysics Data System (ADS)

    Yoon, Sung-Min; Lee, Seung-Yun; Jung, Soon-Won; Park, Young-Sam; Yu, Byoung-Gon

    2009-04-01

    A unique and novel phase-change memory device employing multilayered chalcogenide films was proposed and fabricated. In this structure, Ge18Sb39Te43, which corresponds to a 22 at. % Sb-excessive phase of typical stoichiometric Ge2Sb2Te5 (GST), was located in the middle and acted as the main operating region to exploit its superior properties, thus ensuring reliable memory operations. Thinner GST layers were inserted to above and below the middle layer. The introduction of a bottom GST layer promotes the temperature rise and the thermal insulation within the device operating volume owing to its lower thermal conductivity. The top GST layer effectively suppresses the undesirable interdiffusion between the top electrode of W and the Sb added to excess. Moreover, the upper and lower GST supplementary layers promote the initial crystallization stage during set operations owing to their higher crystallization rate compared with that of the Sb-rich phase of GST. As a result, the required current for reset, the required time for set, and the number of rewritable cycles of the proposed device with an active pore size of 0.5 ×0.5 µm2 were 6.1 mA, 80 ns, and 6.4 ×106, respectively, which are superior values compared with those for the device using a single layer of Ge18Sb39Te43. We can conclude that the proposed multilayered structure of compositionally modified GST films provides a very promising approach to enhancing all types of the memory behaviors required for the phase-change memory devices.

  13. Effect of embedded metal nanocrystals on the resistive switching characteristics in NiN-based resistive random access memory cells

    SciTech Connect

    Yun, Min Ju; Kim, Hee-Dong; Man Hong, Seok; Hyun Park, Ju; Su Jeon, Dong; Geun Kim, Tae

    2014-03-07

    The metal nanocrystals (NCs) embedded-NiN-based resistive random access memory cells are demonstrated using several metal NCs (i.e., Pt, Ni, and Ti) with different physical parameters in order to investigate the metal NC's dependence on resistive switching (RS) characteristics. First, depending on the electronegativity of metal, the size of metal NCs is determined and this affects the operating current of memory cells. If metal NCs with high electronegativity are incorporated, the size of the NCs is reduced; hence, the operating current is reduced owing to the reduced density of the electric field around the metal NCs. Second, the potential wells are formed by the difference of work function between the metal NCs and active layer, and the barrier height of the potential wells affects the level of operating voltage as well as the conduction mechanism of metal NCs embedded memory cells. Therefore, by understanding these correlations between the active layer and embedded metal NCs, we can optimize the RS properties of metal NCs embedded memory cells as well as predict their conduction mechanisms.

  14. A 600-µW ultra-low-power associative processor for image pattern recognition employing magnetic tunnel junction-based nonvolatile memories with autonomic intelligent power-gating scheme

    NASA Astrophysics Data System (ADS)

    Ma, Yitao; Miura, Sadahiko; Honjo, Hiroaki; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

    2016-04-01

    A novel associative processor using magnetic tunnel junction (MTJ)-based nonvolatile memories has been proposed and fabricated under a 90 nm CMOS/70 nm perpendicular-MTJ (p-MTJ) hybrid process for achieving the exceptionally low-power performance of image pattern recognition. A four-transistor 2-MTJ (4T-2MTJ) spin transfer torque magnetoresistive random access memory was adopted to completely eliminate the standby power. A self-directed intelligent power-gating (IPG) scheme specialized for this associative processor is employed to optimize the operation power by only autonomously activating currently accessed memory cells. The operations of a prototype chip at 20 MHz are demonstrated by measurement. The proposed processor can successfully carry out single texture pattern matching within 6.5 µs using 128-dimension bag-of-feature patterns, and the measured average operation power of the entire processor core is only 600 µW. Compared with the twin chip designed with 6T static random access memory, 91.2% power reductions are achieved. More than 88.0% power reductions are obtained compared with the latest associative memories. The further power performance analysis is discussed in detail, which verifies the special superiority of the proposed processor in power consumption for large-capacity memory-based VLSI systems.

  15. Bistable Magnetoresistance Switching in Exchange-Coupled CoFe2O4-Fe3O4 Binary Nanocrystal Superlattices by Self-Assembly and Thermal Annealing

    SciTech Connect

    Chen, J; Ye, XC; Oh, SJ; Kikkawa, JM; Kagan, CR; Murray, CB

    2013-02-01

    Self-assembly of multicomponent nanocrystal superlattices provides a modular approach to the design of metamaterials by choosing constituent nanocrystal building blocks with desired physical properties and engineering the interparticle coupling. In this work, we report the self-assembly of binary nanocrystal superlattices composed of magnetically hard CoFe2O4 nanocrystals and magnetically soft Fe3O4 nanocrystals. Both NaZn13- and MgZn2-type CoFe2O4-Fe3O4 binary nanocrystal superlattices have been formed by the liquid-air interfacial assembly approach. Exchange coupling is achieved in both types of binary superlattices after thermal annealing under vacuum at 400 degrees C. The exchange-coupled CoFe2O4-Fe3O4 binary nanocrystal superlattices show single-phase magnetization switching behavior and magnetoresistance switching behavior below 200 K. The NaZn13-type CoFe2O4-Fe3O4 binary nanocrystal superlattices annealed at 500 degrees C even exhibit bistable magnetoresistance switching behavior at room temperature constituting a simple nonvolatile memory function.

  16. Single-crystal C60 needle/CuPc nanoparticle double floating-gate for low-voltage organic transistors based non-volatile memory devices.

    PubMed

    Chang, Hsuan-Chun; Lu, Chien; Liu, Cheng-Liang; Chen, Wen-Chang

    2015-01-01

    Low-voltage organic field-effect transistor memory devices exhibiting a wide memory window, low power consumption, acceptable retention, endurance properties, and tunable memory performance are fabricated. The performance is achieved by employing single-crystal C60 needles and copper phthalocyanine nanoparticles to produce an ambipolar (hole/electron) trapping effect in a double floating-gate architecture. PMID:25358891

  17. Bipolar resistive switching performance of the nonvolatile memory cells based on (AgI){sub 0.2}(Ag{sub 2}MoO{sub 4}){sub 0.8} solid electrolyte films

    SciTech Connect

    Yan, X. B.; Guo, H. X.; Su, Y.; Xu, B.; Li, H. T.; Xia, Y. D.; Liu, Z. G.; Yin, J.; Yan, D. W.

    2009-09-01

    Resistive switching memory cells with polycrystalline (AgI){sub 0.2}(Ag{sub 2}MoO{sub 4}){sub 0.8} (AIMO) solid electrolyte films as storage medium were fabricated on SiO{sub 2}/Pt/Ti/Si substrates by using pulse laser deposition technique and focused ion beam lithography. X-ray diffraction, scanning electron microscopy, and energy dispersive x-ray analysis have been employed to investigate the structure, the surface morphology, and the composition of AIMO thin films. The Ag/AIMO/Pt memory cells with sandwich structure exhibit stable, reproducible, and reliable resistive switching characteristics. The ratio of resistance between high resistance states and low resistance states can reach approx10{sup 5}. Moreover, the low resistance is approx500 OMEGA at a compliance current of 0.5 mA, which is favorable to reduce the power dissipation of the entire circuit. The switching-on mechanism has been discussed and the metallic conduction characteristic has also been verified. The fast response speed and the good retention properties further indicate that polycrystalline AIMO thin film is a potential candidate for the next generation nonvolatile memory.

  18. Al2O3 nanocrystals embedded in amorphous Lu2O3 high-k gate dielectric for floating gate memory application

    NASA Astrophysics Data System (ADS)

    Yuan, C. L.; Chan, M. Y.; Lee, P. S.; Darmawan, P.; Setiawan, Y.

    2007-04-01

    The integration of nanoparticles has high potential in technological applications and opens up possibilities of the development of new devices. Compared to the conventional floating gate memory, a structure containing nanocrystals embedded in dielectrics shows high potential to produce a memory with high endurance, low operating voltage, fast write-erase speeds and better immunity to soft errors [S. Tiwari, F. Rana, H. Hanafi et al. 1996 Appl.Phys. Lett. 68, 1377]. A significant improvement on data retention [J. J. Lee, X. Wang et al. 2003 Proceedings of the VLSI Technol. Symposium, p33] can be observed when discrete nanodots are used instead of continuous floating gate as charge storage nodes because local defect related leakage can be reduced efficiently. Furthermore, using a high-k dielectric in place of the conventional SiO2 based dielectric, nanodots flash memory is able to achieve significantly improved programming efficiency and data retention [A. Thean and J. -P. Leburton, 2002 IEEE Potentials 21, 35; D. W. Kim, T. Kim and S. K. Banerjee, 2003 IEEE Trans. Electron Devices 50, 1823]. We have recently successfully developed a method to produce nanodots embedded in high-k gate dielectrics [C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Electrochemical and Solid-State Letters 9, F53; C. L. Yuan, P. Darmawan, Y. Setiawan and P. S. Lee, 2006 Europhys. Lett. 74, 177]. In this paper, we fabricated the memory structure of Al2O3 nanocrystals embedded in amorphous Lu2O3 high k dielectric using pulsed laser ablation. The mean size and density of the Al2O3 nanocrystals are estimated to be about 5 nm and 7x1011 cm-2, respectively. Good electrical performances in terms of large memory window and good data retention were observed. Our preparation method is simple, fast and economical.

  19. Nonvolatile Array Of Synapses For Neural Network

    NASA Technical Reports Server (NTRS)

    Tawel, Raoul

    1993-01-01

    Elements of array programmed with help of ultraviolet light. A 32 x 32 very-large-scale integrated-circuit array of electronic synapses serves as building-block chip for analog neural-network computer. Synaptic weights stored in nonvolatile manner. Makes information content of array invulnerable to loss of power, and, by eliminating need for circuitry to refresh volatile synaptic memory, makes architecture simpler and more compact.

  20. Charge storage and tunneling mechanism of Ni nanocrystals embedded HfOx film

    NASA Astrophysics Data System (ADS)

    Zhu, H. X.; Zhang, T.; Wang, R. X.; Zhang, Y. Y.; Li, L. T.; Qiu, X. Y.

    2016-05-01

    A nano-floating gate memory structure based on Ni nanocrystals (NCs) embedded HfOx film is deposited by means of radio-frequency magnetron sputtering. Microstructure investigations reveal that self-organized Ni-NCs with diameters of 4-8 nm are well dispersed in amorphous HfOx matrix. Pt/Ni-NCs embedded HfOx/Si/Ag capacitor structures exhibit voltage-dependent capacitance-voltage hysteresis, and a maximum flat-band voltage shift of 1.5 V, corresponding to a charge storage density of 6.0 × 1012 electrons/cm2, is achieved. These capacitor memory cells exhibit good endurance characteristic up to 4 × 104 cycles and excellent retention performance of 105 s, fulfilling the requirements of next generation non-volatile memory devices. Schottky tunneling is proven to be responsible for electrons tunneling in these capacitors.

  1. Mechanical memory

    DOEpatents

    Gilkey, Jeffrey C.; Duesterhaus, Michelle A.; Peter, Frank J.; Renn, Rosemarie A.; Baker, Michael S.

    2006-08-15

    A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

  2. Mechanical memory

    DOEpatents

    Gilkey, Jeffrey C.; Duesterhaus, Michelle A.; Peter, Frank J.; Renn, Rosemarie A.; Baker, Michael S.

    2006-05-16

    A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

  3. Overview of Non-Volatile Testing and Screening Methods

    NASA Technical Reports Server (NTRS)

    Irom, Farokh

    2001-01-01

    Testing methods for memories and non-volatile memories have become increasingly sophisticated as they become denser and more complex. High frequency and faster rewrite times as well as smaller feature sizes have led to many testing challenges. This paper outlines several testing issues posed by novel memories and approaches to testing for radiation and reliability effects. We discuss methods for measurements of Total Ionizing Dose (TID).

  4. Nonvolatile resistive switching in single crystalline ZnO nanowires.

    PubMed

    Yang, Yuchao; Zhang, Xiaoxian; Gao, Min; Zeng, Fei; Zhou, Weiya; Xie, Sishen; Pan, Feng

    2011-04-01

    We demonstrate nonvolatile resistive switching in single crystalline ZnO nanowires with high ON/OFF ratios and low threshold voltages. Unlike the mechanism of continuous metal filament formation along grain boundaries in polycrystalline films, the resistive switching in single crystalline ZnO nanowires is speculated to be induced by the formation of a metal island chain on the nanowire surface. Resistive memories based on bottom-up semiconductor nanowires hold potential for next generation ultra-dense nonvolatile memories. PMID:21394361

  5. Effect of Pb2Ru2O7-x (PRO) conductive interfacial layers on ferroelectric properties of Pt/Pb(Zr0.35Ti0.65)O3/Pt capacitors for nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Choi, K. J.; Yoon, S. G.

    2005-09-01

    A conductive material, Pb2Ru2O7-x (PRO), containing Pb in a cubic structure was introduced into a Pt/PZT interface in an attempt to improve the ferroelectric properties of PZT films. PRO and PZT films were prepared by rf magnetron sputtering and chemical solution deposition, respectively. The resistivity of PRO thin films in a hybrid-type electrode (PRO/Pt) structure was approximately 35 45 μΩ·cm and the surface roughness remained constant with increasing annealing temperature. The PRO interlayers suppressed the loss of Pb in PZT layers by diffusion to the Pt/PZT interface. The increase in remanent polarization was largely dependent on the PRO interlayers inserted at the bottom-Pt/PZT interface rather than at the top-Pt/PZT interface. In addition, the leakage-current behavior of PZT films in a sandwich structure was improved substantially compared to the case of PRO interlayers only at the bottom-Pt/PZT interface. Thus, the PRO interlayers play an important role in improving the ferroelectric properties of PZT thin films for use in nonvolatile memory device applications.

  6. Lead-free epitaxial ferroelectric material integration on semiconducting (100) Nb-doped SrTiO3 for low-power non-volatile memory and efficient ultraviolet ray detection

    NASA Astrophysics Data System (ADS)

    Kundu, Souvik; Clavel, Michael; Biswas, Pranab; Chen, Bo; Song, Hyun-Cheol; Kumar, Prashant; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Sanghadasa, Mohan; Priya, Shashank

    2015-07-01

    We report lead-free ferroelectric based resistive switching non-volatile memory (NVM) devices with epitaxial (1-x)BaTiO3-xBiFeO3 (x = 0.725) (BT-BFO) film integrated on semiconducting (100) Nb (0.7%) doped SrTiO3 (Nb:STO) substrates. The piezoelectric force microscopy (PFM) measurement at room temperature demonstrated ferroelectricity in the BT-BFO thin film. PFM results also reveal the repeatable polarization inversion by poling, manifesting its potential for read-write operation in NVM devices. The electroforming-free and ferroelectric polarization coupled electrical behaviour demonstrated excellent resistive switching with high retention time, cyclic endurance, and low set/reset voltages. X-ray photoelectron spectroscopy was utilized to determine the band alignment at the BT-BFO and Nb:STO heterojunction, and it exhibited staggered band alignment. This heterojunction is found to behave as an efficient ultraviolet photo-detector with low rise and fall time. The architecture also demonstrates half-wave rectification under low and high input signal frequencies, where the output distortion is minimal. The results provide avenue for an electrical switch that can regulate the pixels in low or high frequency images. Combined this work paves the pathway towards designing future generation low-power ferroelectric based microelectronic devices by merging both electrical and photovoltaic properties of BT-BFO materials.

  7. Effect of Mechanical Loads on Stability of Nanodomains in Ferroelectric Ultrathin Films: Towards Flexible Erasing of the Non-Volatile Memories

    NASA Astrophysics Data System (ADS)

    Chen, W. J.; Zheng, Yue; Xiong, W. M.; Feng, Xue; Wang, Biao; Wang, Ying

    2014-06-01

    Intensive investigations have been drawn on nanoscale ferroelectrics for their prospective applications such as developing memory devices. In contrast with the commonly used electrical means to process (i.e., read, write or erase) the information carried by ferroelectric domains, at present, mechanisms of non-electrical processing ferroelectric domains are relatively lacking. Here we make a systematical investigation on the stability of 180° cylindrical domains in ferroelectric nanofilms subjected to macroscopic mechanical loads, and explore the possibility of mechanical erasing. Effects of domain size, film thickness, temperature and different mechanical loads, including uniform strain, cylindrical bending and wavy bending, have been revealed. It is found that the stability of a cylindrical domain depends on its radius, temperature and film thickness. More importantly, mechanical loads have great controllability on the stability of cylindrical domains, with the critical radius nonlinearly sensitive to both strain and strain gradient. This indicates that erasing cylindrical domain can be achieved by changing the strain state of nanofilm. Based on the calculated phase diagrams, we successfully simulate several mechanical erasing processes on 4 × 4 bits memory devices. Our study sheds light on prospective device applications of ferroelectrics involving mechanical loads, such as flexible memory devices and other micro-electromechanical systems.

  8. Ferroelectric memory

    NASA Astrophysics Data System (ADS)

    Vorotilov, K. A.; Sigov, A. S.

    2012-05-01

    The current status of developments in the field of ferroelectric memory devices has been considered. The rapidly growing market of non-volatile memory devices has been analyzed, and the current state of the art and prospects for the scaling of parameters of non-volatile memory devices of different types have been considered. The basic constructive and technological solutions in the field of the design of ferroelectric memory devices, as well as the "roadmaps" of the development of this technology, have been discussed.

  9. Nanocrystal structures

    SciTech Connect

    Eisler, Hans J.; Sundar, Vikram C.; Walsh, Michael E.; Klimov, Victor I.; Bawendi, Moungi G.; Smith, Henry I.

    2008-12-30

    A structure including a grating and a semiconductor nanocrystal layer on the grating, can be a laser. The semiconductor nanocrystal layer can include a plurality of semiconductor nanocrystals including a Group II-VI compound, the nanocrystals being distributed in a metal oxide matrix. The grating can have a periodicity from 200 nm to 500 nm.

  10. Nanocrystal structures

    DOEpatents

    Eisler, Hans J.; Sundar, Vikram C.; Walsh, Michael E.; Klimov, Victor I.; Bawendi, Moungi G.; Smith, Henry I.

    2006-12-19

    A structure including a grating and a semiconductor nanocrystal layer on the grating, can be a laser. The semiconductor nanocrystal layer can include a plurality of semiconductor nanocrystals including a Group II–VI compound, the nanocrystals being distributed in a metal oxide matrix. The grating can have a periodicity from 200 nm to 500 nm.

  11. Acoustically assisted spin-transfer-torque switching of nanomagnets: An energy-efficient hybrid writing scheme for non-volatile memory

    SciTech Connect

    Biswas, Ayan K.; Bandyopadhyay, Supriyo; Atulasimha, Jayasimha

    2013-12-02

    We show that the energy dissipated to write bits in spin-transfer-torque random access memory can be reduced by an order of magnitude if a surface acoustic wave (SAW) is launched underneath the magneto-tunneling junctions (MTJs) storing the bits. The SAW-generated strain rotates the magnetization of every MTJs' soft magnet from the easy towards the hard axis, whereupon passage of a small spin-polarized current through a target MTJ selectively switches it to the desired state with > 99.99% probability at room temperature, thereby writing the bit. The other MTJs return to their original states at the completion of the SAW cycle.

  12. Reactive ion etching of Si(x)Sb2Te in CF4/Ar plasma for nonvolatile phase-change memory device.

    PubMed

    Gu, Yifeng; Song, Sannian; Song, Zhitang; Cheng, Yan; Liu, Xuyan; Du, Xiaofeng; Liu, Bo; Feng, Songlin

    2013-02-01

    Si(x)Sb2Te material system is novel for phase-change random access memory applications. Its properties are more outstanding than the widely used material Ge2Sb2Te5. Etching process is one of the critical steps in the device fabrication. The etching characteristics of phase-change material Si(x)Sb2Te were studied with CF4/Ar gas mixture by a reactive ion etching system. The changes of etching rate, etching profile and surface root-mean-square roughness resulted from variation of the gas-mixing ratio were investigated under constant pressure (50 mTorr) and applying power (200 W). Si0.34Sb2Te is with the highest phase-change speed and the lowest power consumption in the PCRAM memory among these compositions, which means it is the most promising candidate for the PCRAM applications. So the most optimized CF4/Ar gas ratio for Si0.34Sb2Te was studied, the value is 25/25. The etching rate is 155 nm/min, and the selectivity of Si0.34Sb2Te to SiO2 is as high as 3.4 times. Furthermore, the smooth surface was achieved with this optimized gas ratio. PMID:23646688

  13. Growth study of Ge xSb yTe z deposited by MOCVD under nitrogen for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Longo, M.; Salicio, O.; Wiemer, C.; Fallica, R.; Molle, A.; Fanciulli, M.; Giesen, C.; Seitzinger, B.; Baumann, P. K.; Heuken, M.; Rushworth, S.

    2008-11-01

    We report on the bubbler-type MOCVD growth of Ge xSb yTe z (GST) on SiO 2/Si substrates, potentially transferable to phase change memory (PCM) devices. Pure nitrogen was used as the process gas in order to reduce toxicity whilst increasing the simplicity of the process. This systematic study allowed the modification of the growth parameters on SiO 2 to move through initial sub-micrometric crystalline grain deposition on to lateral island growth. Temperature was observed to play a critical role in film quality with strong morphology and island shape/size changes for small thermal variations. Eventually, continuous layers of GST in the hcp phase and composition close to the 2:2:5 were studied. The deposition on different substrates was also investigated. Although crystal nucleation is still far from achieving the target step coverage required for uniform coating of patterned substrates, the electrical sheet resistance of GST films exhibited values corresponding to those expected for chalcogenide materials suitable to be integrated into PCM devices.

  14. Minimization of germanium penetration, nanocrystal formation, charge storage, and retention in a trilayer memory structure with silicon nitride/hafnium dioxide stack as the tunnel dielectric

    NASA Astrophysics Data System (ADS)

    Ng, T. H.; Chim, W. K.; Choi, W. K.; Ho, V.; Teo, L. W.; Du, A. Y.; Tung, C. H.

    2004-05-01

    Trilayer structures, consisting of a rapid thermal oxide (RTO) layer (2.5 or 5 nm thick) grown on silicon, a sputtered Ge middle layer (3-20 nm thick), and a 50-nm-thick sputtered silicon oxide capping layer, exhibit significant penetration of Ge atoms into the silicon substrate for devices with the smaller (2.5 nm) RTO thickness, resulting in negligible nanocrystal formation and hence no charge storage or memory effect. The Ge penetration is minimized by replacing the RTO layer with a high dielectric constant (high-κ) silicon nitride/hafnium dioxide stack (grown by metalorganic chemical vapor deposition) having a larger physical thickness but smaller equivalent oxide thickness of 1.9 nm. Results show that the high-κ trilayer structure exhibits better charge storage capability (in terms of a lower program voltage) and better charge retention performance as compared to the RTO trilayer structure.

  15. Modular nonvolatile solid state recorder (MONSSTR) update

    NASA Astrophysics Data System (ADS)

    Klang, Mark R.; Small, Martin B.; Beams, Tom

    2001-12-01

    Solid state recorders have begun replacing traditional tape recorders in fulfilling the requirement to record images on airborne platforms. With the advances in electro-optical, IR, SAR, Multi and Hyper-spectral sensors and video recording requirements, solid state recorders have become the recorder of choice. Solid state recorders provide the additional storage, higher sustained bandwidth, less power, less weight and smaller footprint to meet the current and future recording requirements. CALCULEX, Inc., manufactures a non-volatile flash memory solid state recorder called the MONSSTR (Modular Non-volatile Solid State Recorder). MONSSTR is being used to record images from many different digital sensors on high performance aircraft such as the RF- 4, F-16 and the Royal Air Force Tornado. MONSSTR, with its internal multiplexer, is also used to record instrumentation data. This includes multiple streams of PCM and multiple channels of 1553 data. Instrumentation data is being recorded by MONSSTR systems in a range of platforms including F-22, F-15, F-16, Comanche Helicopter and US Navy torpedos. MONSSTR can also be used as a cockpit video recorder. This paper will provide an update of the MONSSTR.

  16. Electrically programmable-erasable In-Ga-Zn-O thin-film transistor memory with atomic-layer-deposited Al2O3/Pt nanocrystals/Al2O3 gate stack

    NASA Astrophysics Data System (ADS)

    Qian, Shi-Bing; Zhang, Wen-Peng; Liu, Wen-Jun; Ding, Shi-Jin

    2015-12-01

    Amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistor (TFT) memory is very promising for transparent and flexible system-on-panel displays; however, electrical erasability has always been a severe challenge for this memory. In this article, we demonstrated successfully an electrically programmable-erasable memory with atomic-layer-deposited Al2O3/Pt nanocrystals/Al2O3 gate stack under a maximal processing temperature of 300 oC. As the programming voltage was enhanced from 14 to 19 V for a constant pulse of 0.2 ms, the threshold voltage shift increased significantly from 0.89 to 4.67 V. When the programmed device was subjected to an appropriate pulse under negative gate bias, it could return to the original state with a superior erasing efficiency. The above phenomena could be attributed to Fowler-Nordheim tunnelling of electrons from the IGZO channel to the Pt nanocrystals during programming, and inverse tunnelling of the trapped electrons during erasing. In terms of 0.2-ms programming at 16 V and 350-ms erasing at -17 V, a large memory window of 3.03 V was achieved successfully. Furthermore, the memory exhibited stable repeated programming/erasing (P/E) characteristics and good data retention, i.e., for 2-ms programming at 14 V and 250-ms erasing at -14 V, a memory window of 2.08 V was still maintained after 103 P/E cycles, and a memory window of 1.1 V was retained after 105 s retention time.

  17. Electrically programmable-erasable In-Ga-Zn-O thin-film transistor memory with atomic-layer-deposited Al{sub 2}O{sub 3}/Pt nanocrystals/Al{sub 2}O{sub 3} gate stack

    SciTech Connect

    Qian, Shi-Bing; Zhang, Wen-Peng; Liu, Wen-Jun; Ding, Shi-Jin

    2015-12-15

    Amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistor (TFT) memory is very promising for transparent and flexible system-on-panel displays; however, electrical erasability has always been a severe challenge for this memory. In this article, we demonstrated successfully an electrically programmable-erasable memory with atomic-layer-deposited Al{sub 2}O{sub 3}/Pt nanocrystals/Al{sub 2}O{sub 3} gate stack under a maximal processing temperature of 300 {sup o}C. As the programming voltage was enhanced from 14 to 19 V for a constant pulse of 0.2 ms, the threshold voltage shift increased significantly from 0.89 to 4.67 V. When the programmed device was subjected to an appropriate pulse under negative gate bias, it could return to the original state with a superior erasing efficiency. The above phenomena could be attributed to Fowler-Nordheim tunnelling of electrons from the IGZO channel to the Pt nanocrystals during programming, and inverse tunnelling of the trapped electrons during erasing. In terms of 0.2-ms programming at 16 V and 350-ms erasing at −17 V, a large memory window of 3.03 V was achieved successfully. Furthermore, the memory exhibited stable repeated programming/erasing (P/E) characteristics and good data retention, i.e., for 2-ms programming at 14 V and 250-ms erasing at −14 V, a memory window of 2.08 V was still maintained after 10{sup 3} P/E cycles, and a memory window of 1.1 V was retained after 10{sup 5} s retention time.

  18. Electrically Variable or Programmable Nonvolatile Capacitors

    NASA Technical Reports Server (NTRS)

    Shangqing, Liu; NaiJuan, Wu; Ignatieu, Alex; Jianren, Li

    2009-01-01

    Electrically variable or programmable capacitors based on the unique properties of thin perovskite films are undergoing development. These capacitors show promise of overcoming two important deficiencies of prior electrically programmable capacitors: Unlike in the case of varactors, it is not necessary to supply power continuously to make these capacitors retain their capacitance values. Hence, these capacitors may prove useful as components of nonvolatile analog and digital electronic memories. Unlike in the case of ferroelectric capacitors, it is possible to measure the capacitance values of these capacitors without changing the values. In other words, whereas readout of ferroelectric capacitors is destructive, readout of these capacitors can be nondestructive. A capacitor of this type is a simple two terminal device. It includes a thin film of a suitable perovskite as the dielectric layer, sandwiched between two metal or metal oxide electrodes (for example, see Figure 1). The utility of this device as a variable capacitor is based on a phenomenon, known as electrical-pulse-induced capacitance (EPIC), that is observed in thin perovskite films and especially in those thin perovskite films that exhibit the colossal magnetoresistive (CMR) effect. In EPIC, the application of one or more electrical pulses that exceed a threshold magnitude (typically somewhat less than 1 V) gives rise to a nonvolatile change in capacitance. The change in capacitance depends on the magnitude duration, polarity, and number of pulses. It is not necessary to apply a magnetic field or to cool the device below (or heat it above) room temperature to obtain EPIC. Examples of suitable CMR perovskites include Pr(1-x)Ca(x)MnO3, La(1-x)S-r(x)MnO3,and Nb(1-x)Ca(x)MnO3. Figure 2 is a block diagram showing an EPIC capacitor connected to a circuit that can vary the capacitance, measure the capacitance, and/or measure the resistance of the capacitor.

  19. Multistate nonvolatile straintronics controlled by a lateral electric field.

    PubMed

    Iurchuk, V; Doudin, B; Kundys, B

    2014-07-23

    We present a multifunctional and multistate permanent memory device based on lateral electric field control of a strained surface. Sub-coercive electrical writing of a remnant strain of a PZT substrate imprints stable and rewritable resistance changes on a CoFe overlayer. A proof-of-principle device, with the simplest resistance strain gage design, is shown as a memory cell exhibiting 17-memory states of high reproducibility and reliability for nonvolatile operations. Magnetoresistance of the film also depends on the cell state, and indicates a rewritable change of magnetic properties persisting in the remnant strain of the substrate. This makes it possible to combine strain, magnetic and resistive functionalities in a single memory element, and suggests that sub-coercive stress studies are of interest for straintronics applications. PMID:24990075

  20. Thermally reliable clocked non-volatile spin wave logic device

    NASA Astrophysics Data System (ADS)

    Dutta, Sourav; Nikonov, Dmitri; Manipatruni, Sasikanth; Young, Ian; Naeemi, Azad

    The possibility of utilizing spin waves for information transmission and computation has been an area of active research due to the unique ability to manipulate the amplitude and phase of the spin waves for building complex logic circuits. Here, we present a comprehensive scheme for building a thermally reliable clocked non-volatile spin wave logic device (SWLD) by introducing a charge-to-spin converter that translates information from electrical domain to spin domain, exploiting the magneto-electric effect for spin wave transmission, detection and non-volatile memory, utilizing the phase of the spin wave as information token, ensuring phase-dependent deterministic switching of the magnetoelectric spin wave detector in the presence of thermal noise via compensation of demagnetization and a novel clocking scheme that ensures sequential transmission of information in a cascaded SWLD and non- reciprocity

  1. Memory functions of nanocrystalline cadmium selenide embedded ZrHfO high-k dielectric stack

    SciTech Connect

    Lin, Chi-Chou; Kuo, Yue

    2014-02-28

    Metal-oxide-semiconductor capacitors made of the nanocrystalline cadmium selenide nc-CdSe embedded Zr-doped HfO{sub 2} high-k stack on the p-type silicon wafer have been fabricated and studied for their charge trapping, detrapping, and retention characteristics. Both holes and electrons can be trapped to the nanocrystal-embedded dielectric stack depending on the polarity of the applied gate voltage. With the same magnitude of applied gate voltage, the sample can trap more holes than electrons. A small amount of holes are loosely trapped at the nc-CdSe/high-k interface and the remaining holes are strongly trapped to the bulk nanocrystalline CdSe site. Charges trapped to the nanocrystals caused the Coulomb blockade effect in the leakage current vs. voltage curve, which is not observed in the control sample. The addition of the nanocrystals to the dielectric film changed the defect density and the physical thickness, which are reflected on the leakage current and the breakdown voltage. More than half of the originally trapped holes can be retained in the embedded nanocrystals for more than 10 yr. The nanocrystalline CdSe embedded high-k stack is a useful gate dielectric for this nonvolatile memory device.

  2. Flash drive memory apparatus and method

    NASA Technical Reports Server (NTRS)

    Hinchey, Michael G. (Inventor)

    2010-01-01

    A memory apparatus includes a non-volatile computer memory, a USB mass storage controller connected to the non-volatile computer memory, the USB mass storage controller including a daisy chain component, a male USB interface connected to the USB mass storage controller, and at least one other interface for a memory device, other than a USB interface, the at least one other interface being connected to the USB mass storage controller.

  3. Memory.

    ERIC Educational Resources Information Center

    McKean, Kevin

    1983-01-01

    Discusses current research (including that involving amnesiacs and snails) into the nature of the memory process, differentiating between and providing examples of "fact" memory and "skill" memory. Suggests that three brain parts (thalamus, fornix, mammilary body) are involved in the memory process. (JN)

  4. Thin dielectric technology and memory devices

    NASA Astrophysics Data System (ADS)

    King, Ya-Chin

    DRAM. In addition, it can be easily embedded into a CMOS process for low-power dynamic or quasi-nonvolatile memory applications. Another method of embedding charge storage nodes into the gate dielectric employs germanium nano-crystals formed by oxidation of Si1-xGex . The device consists of a MOSFET with Ge nano-crystals embedded within the gate dielectric. This trap-formation method provides for precise control of the thicknesses of the oxide layers which sandwich the charge-traps, via thermal oxidation. Memory devices with write/erase speed/voltage and retention time superior to previously reported nano-crystal memory devices are demonstrated. A novel method of growing multiple gate oxide thicknesses below 5nm using oxygen implantation is presented. Experimental results show that multiple thicknesses of gate oxide with differences of up to 20A can be achieved on the same wafer without de gradation of the oxide interface and bulk properties. Unlike oxides grown with nitrogen implantation, oxides fabricated by the proposed method exhibit comparable reliability to that of thermally grown oxides.

  5. Nanomagnetic triangles for a non-volatile logic applications

    NASA Astrophysics Data System (ADS)

    Kozhanov, Alexander; Allen, S. James

    2012-02-01

    Single domain triangular nanomagnet is a base element in the recently proposed non-volatile logic application [1]. Dependent on the triangle shape and dimensions ``Y'' or ``buckle'' magnetization alignment ground states are defined by configurational anisotropy. In the ``Y'' ground state the local magnetization is aligned to point either towards or away from the triangle vertexes. The three triangle vertexes are used for information storage while switching between different ground states performs logic operations. In this work we study nanomagnetic triangle ground states and switching between them using micromagnetic simulations. We show that triangle shape engineering within the fabrication method tolerance allows maintaining the ``Y'' ground state despite the shape distortions typical for fabrication process. We correlate the height and profile of the energy barrier between the triangle ground states with the triangle shape and dimensions. We discuss ground state switching mechanisms and asses the triangle use for non-volatile logic and memory applications. [4pt] [1] A. Kozhanov, C.J. Palmstrom, S.J Allen ``Spin Torque Triad for a non-volatile logic gates'' US Patent pending.

  6. Nonvolatile optically-erased colloidal memristors

    NASA Astrophysics Data System (ADS)

    Huebner, Christopher F.; Tsyalkovsky, Volodymyr; Bandera, Yuriy; Burdette, Mary K.; Shetzline, Jamie A.; Tonkin, Charles; Creager, Stephen E.; Foulger, Stephen H.

    2015-01-01

    A nonconjugated methacrylate terpolymer containing carbazole moieties (electron donors), 1,3,4-oxadiazole moieties (electron acceptors), and Coumarin-6 in the pendant groups was synthesized via free radical copolymerization of methacrylate monomers containing the respective functional groups. The terpolymer was formed into 57 nm particles through a mini-emulsion route. For a thin 100 nm film of the fused particles sandwiched between an indium-tin oxide (ITO) electrode and an Al electrode, the structure behaved as a nonvolatile flash (rewritable) memory with accessible electronic states that could be written, read, and optically erased. The device exhibited a turn-on voltage of ca. -4.5 VDC and a 106 current ratio. A device in the ON high conductance state could be reverted to the OFF state with a short exposure to a 360 nm light source. The development of semiconducting colloidal inks that can be converted into electroactive devices through a continuous processing method is a critical step in the widespread adoption of these 2D manufacturing technologies for printed electronics.

  7. Multilevel non-volatile data storage utilizing common current hysteresis of networked single walled carbon nanotubes.

    PubMed

    Hwang, Ihn; Wang, Wei; Hwang, Sun Kak; Cho, Sung Hwan; Kim, Kang Lib; Jeong, Beomjin; Huh, June; Park, Cheolmin

    2016-05-21

    The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 10(4), a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period. PMID:27129104

  8. Coexistence of nonvolatility and volatility in Pt/Nb-doped SrTiO3/In memristive devices

    NASA Astrophysics Data System (ADS)

    Yang, M.; Bao, D. H.; Li, S. W.

    2013-12-01

    Memristive devices are triggering innovations in the fields of nonvolatile memory, digital logic, analogue circuits, neuromorphic engineering, and so on. Creating new memristive devices with unique characteristics would be significant for these emergent applications. Here we report the coexistence of nonvolatility and volatility in Pt/Nb-doped SrTiO3 (NSTO)/In memristive devices. The Pt/NSTO interface contributes a nonvolatile resistive switching behaviour, whereas the NSTO/In interface displays a volatile hysteresis loop. Combining the two interfaces in the Pt/NSTO/In devices leads to the unique coexistence of nonvolatility and volatility. The results imply more opportunities to invent new memristive devices by engineering both interfaces in metal/insulator/metal structures.

  9. Preparing non-volatile resistive switching memories by tuning the content of Au@air@TiO2-h yolk-shell microspheres in a poly(3-hexylthiophene) layer

    NASA Astrophysics Data System (ADS)

    Wang, Peng; Liu, Quan; Zhang, Chun-Yu; Jiang, Jun; Wang, Li-Hua; Chen, Dong-Yun; Xu, Qing-Feng; Lu, Jian-Mei

    2015-11-01

    Crystalline hybrid microspheres, encapsulating a Au nanocore in the hollow cavity of a hairy semiconductor TiO2 shell (Au@air@TiO2-h microspheres) were prepared using template-assisted synthesis methods. The as-prepared microspheres are dispersed into a poly(3-hexylthiophene) (P3HT) matrix and used as a memory active layer. The electrical rewritable memory effects of Al/[Au@air@TiO2-h + P3HT]/ITO sandwich devices can be effectively and exactly controlled by tuning the microsphere content in the electroactive layer. To clarify the switching mechanism, different components in the device, such as P3HT and the microspheres, have been investigated. And it was determined that the switching mechanism can be attributed to the formation and rupture of oxygen vacancy filaments. These results suggest that the Au@air@TiO2-h microspheres are potentially capable of high density data storage. In addition, this finding could provide important guidelines for the reproducibility of nanocomposite-based memory devices and is helpful to demonstrate the switching mechanism of these devices.Crystalline hybrid microspheres, encapsulating a Au nanocore in the hollow cavity of a hairy semiconductor TiO2 shell (Au@air@TiO2-h microspheres) were prepared using template-assisted synthesis methods. The as-prepared microspheres are dispersed into a poly(3-hexylthiophene) (P3HT) matrix and used as a memory active layer. The electrical rewritable memory effects of Al/[Au@air@TiO2-h + P3HT]/ITO sandwich devices can be effectively and exactly controlled by tuning the microsphere content in the electroactive layer. To clarify the switching mechanism, different components in the device, such as P3HT and the microspheres, have been investigated. And it was determined that the switching mechanism can be attributed to the formation and rupture of oxygen vacancy filaments. These results suggest that the Au@air@TiO2-h microspheres are potentially capable of high density data storage. In addition, this

  10. Resistive switches and memories from silicon oxide.

    PubMed

    Yao, Jun; Sun, Zhengzong; Zhong, Lin; Natelson, Douglas; Tour, James M

    2010-10-13

    Because of its excellent dielectric properties, silicon oxide (SiO(x)) has long been used and considered as a passive, insulating component in the construction of electronic devices. In contrast, here we demonstrate resistive switches and memories that use SiO(x) as the sole active material and can be implemented in entirely metal-free embodiments. Through cross-sectional transmission electron microscopy, we determine that the switching takes place through the voltage-driven formation and modification of silicon (Si) nanocrystals (NCs) embedded in the SiO(x) matrix, with SiO(x) itself also serving as the source of the formation of this Si pathway. The small sizes of the Si NCs (d ∼ 5 nm) suggest that scaling to ultrasmall domains could be feasible. Meanwhile, the switch also shows robust nonvolatile properties, high ON/OFF ratios (>10(5)), fast switching (sub-100-ns), and good endurance (10(4) write-erase cycles). These properties in a SiO(x)-based material composition showcase its potentials in constructing memory or logic devices that are fully CMOS compatible. PMID:20806916

  11. Preparing non-volatile resistive switching memories by tuning the content of Au@air@TiO2-h yolk-shell microspheres in a poly(3-hexylthiophene) layer.

    PubMed

    Wang, Peng; Liu, Quan; Zhang, Chun-Yu; Jiang, Jun; Wang, Li-Hua; Chen, Dong-Yun; Xu, Qing-Feng; Lu, Jian-Mei

    2015-12-14

    Crystalline hybrid microspheres, encapsulating a Au nanocore in the hollow cavity of a hairy semiconductor TiO2 shell (Au@air@TiO2-h microspheres) were prepared using template-assisted synthesis methods. The as-prepared microspheres are dispersed into a poly(3-hexylthiophene) (P3HT) matrix and used as a memory active layer. The electrical rewritable memory effects of Al/[Au@air@TiO2-h + P3HT]/ITO sandwich devices can be effectively and exactly controlled by tuning the microsphere content in the electroactive layer. To clarify the switching mechanism, different components in the device, such as P3HT and the microspheres, have been investigated. And it was determined that the switching mechanism can be attributed to the formation and rupture of oxygen vacancy filaments. These results suggest that the Au@air@TiO2-h microspheres are potentially capable of high density data storage. In addition, this finding could provide important guidelines for the reproducibility of nanocomposite-based memory devices and is helpful to demonstrate the switching mechanism of these devices. PMID:26541116

  12. Excellent resistive switching properties of atomic layer-deposited Al2O3/HfO2/Al2O3 trilayer structures for non-volatile memory applications.

    PubMed

    Wang, Lai-Guo; Qian, Xu; Cao, Yan-Qiang; Cao, Zheng-Yi; Fang, Guo-Yong; Li, Ai-Dong; Wu, Di

    2015-01-01

    We have demonstrated a flexible resistive random access memory unit with trilayer structure by atomic layer deposition (ALD). The device unit is composed of Al2O3/HfO2/Al2O3-based functional stacks on TiN-coated Si substrate. The cross-sectional HRTEM image and XPS depth profile of Al2O3/HfO2/Al2O3 on TiN-coated Si confirm the existence of interfacial layers between trilayer structures of Al2O3/HfO2/Al2O3 after 600°C post-annealing. The memory units of Pt/Al2O3/HfO2/Al2O3/TiN/Si exhibit a typical bipolar, reliable, and reproducible resistive switching behavior, such as stable resistance ratio (>10) of OFF/ON states, sharp distribution of set and reset voltages, better switching endurance up to 10(3) cycles, and longer data retention at 85°C over 10 years. The possible switching mechanism of trilayer structure of Al2O3/HfO2/Al2O3 has been proposed. The trilayer structure device units of Al2O3/HfO2/Al2O3 on TiN-coated Si prepared by ALD may be a potential candidate for oxide-based resistive random access memory. PMID:25852426

  13. Implementation of Ferroelectric Memories for Space Applications

    NASA Technical Reports Server (NTRS)

    Philpy, Stephen C.; Derbenwick, Gary F.; Kamp, David A.; Isaacson, Alan F.

    2000-01-01

    Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

  14. Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic

    NASA Astrophysics Data System (ADS)

    Yamamoto, Shuu'ichirou; Shuto, Yusuke; Sugahara, Satoshi

    2013-07-01

    We computationally analyzed performance and power-gating (PG) ability of a new nonvolatile delay flip-flop (NV-DFF) based on pseudo-spin-MOSFET (PS-MOSFET) architecture using spin-transfer-torque magnetic tunnel junctions (STT-MTJs). The high-performance energy-efficient PG operations of the NV-DFF can be achieved owing to its cell structure employing PS-MOSFETs that can electrically separate the STT-MTJs from the ordinary DFF part of the NV-DFF. This separation also makes it possible that the break-even time (BET) of the NV-DFF is designed by the size of the PS-MOSFETs without performance degradation of the normal DFF operations. The effect of the area occupation ratio of the NV-DFFs to a CMOS logic system on the BET was also analyzed. Although the optimized BET was varied depending on the area occupation ratio, energy-efficient fine-grained PG with a BET of several sub-microseconds was revealed to be achieved. We also proposed microprocessors and system-on-chip (SoC) devices using nonvolatile hierarchical-memory systems wherein NV-DFF and nonvolatile static random access memory (NV-SRAM) circuits are used as fundamental building blocks. Contribution to the Topical Issue “International Semiconductor Conference Dresden-Grenoble - ISCDG 2012”, Edited by Gérard Ghibaudo, Francis Balestra and Simon Deleonibus.

  15. Garnet Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.

    1995-01-01

    Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.

  16. Nonvolatile programmable neural network synaptic array

    NASA Technical Reports Server (NTRS)

    Tawel, Raoul (Inventor)

    1994-01-01

    A floating-gate metal oxide semiconductor (MOS) transistor is implemented for use as a nonvolatile analog storage element of a synaptic cell used to implement an array of processing synaptic cells. These cells are based on a four-quadrant analog multiplier requiring both X and Y differential inputs, where one Y input is UV programmable. These nonvolatile synaptic cells are disclosed fully connected in a 32 x 32 synaptic cell array using standard very large scale integration (VLSI) complementary MOS (CMOS) technology.

  17. Two-bit memory and quantized storage phenomenon in conventional MOS structures with double-stacked Pt-NCs in an HfAlO matrix.

    PubMed

    Zhou, Guangdong; Wu, Bo; Liu, Xiaoqin; Li, Ping; Zhang, Shuangju; Sun, Bai; Zhou, Ankun

    2016-03-01

    A two-bit memory and quantized storage phenomenon are observed at room temperature for a device based on the traditional MOS structure with double-stacked Pt-nanocrystals (Pt-NCs). A 2.68 and 1.72 V flat band voltage shift (memory window) has been obtained when applying a ±7 V programming/erasing voltage to the structures with double-stacked Pt-NCs. The memory windows of 2.40 and 1.44 V can be retained after stress for 10(5) seconds, which correspond to 89.55% and 83.72% stored charges reserved. The quantized charge storage phenomenon characterized by current-voltage (J-V) hysteresis curves was detected at room temperature. The shrinkage of the memory window results from the decreasing tunneling probability, which strongly depends on the number of stacks. The traps, de-traps and quantum confinement effects of Pt-NCs may contribute to the improvement of dielectric characteristics and the two-bit memory behavior. The multi-bit memory and quantized storage behavior observed in the Pt-NCs stacks structure at room temperature might provide a feasible method for realizing the multi-bit storage in non-volatile flash memory devices. PMID:26864686

  18. Memories.

    ERIC Educational Resources Information Center

    Brand, Judith, Ed.

    1998-01-01

    This theme issue of the journal "Exploring" covers the topic of "memories" and describes an exhibition at San Francisco's Exploratorium that ran from May 22, 1998 through January 1999 and that contained over 40 hands-on exhibits, demonstrations, artworks, images, sounds, smells, and tastes that demonstrated and depicted the biological,…

  19. Solid State Memory Study Final Report

    NASA Technical Reports Server (NTRS)

    Katti, R.

    1994-01-01

    Existing and future solid state nonvolatile memory technologies are described and evaluated in this report. Solid state memory technologies can offer size, speed, power, weight, and ruggedness advantages over conventional moving media storage technologoies such as disk or tape. This technology list is a broad sampling of past, present, emerging, and future solid state memory technologies.

  20. Pulsed supersonic expansion of nonvolatile solids

    SciTech Connect

    Christen, Wolfgang; Geggier, Stephanie; Grigorenko, Svitlana; Rademann, Klaus

    2004-11-01

    A compact apparatus for transferring nonvolatile particles into the gas phase and depositing them on a solid surface has been built and tested successfully. As initial experiment, solid caffeine with a vanishingly low vapor pressure has been dissolved in supercritical carbon dioxide, expanded into vacuum using a pulsed, supersonic molecular beam, and detected using a simple residual gas analyzer.

  1. Growth of platinum nanocrystals

    SciTech Connect

    2009-01-01

    Movie showing the growth of platinum nanocrystals in a liquid cell observed in situ using the JEOL 3010 TEM at the National Center for Electron Microscopy. This is the first ever-real time movie showing nucleation and growth by monomer attachment or by smaller nanocrystals coalescing to form larger nanocrystals. All the nanocrystals end up being roughly the same shape and size. http://newscenter.lbl.gov/feature-stories/2009/08/04/growth-spurts/

  2. Silicon and germanium nanocrystals: properties and characterization

    PubMed Central

    Carvalho, Alexandra; Coutinho, José

    2014-01-01

    Summary Group-IV nanocrystals have emerged as a promising group of materials that extends the realm of application of bulk diamond, silicon, germanium and related materials beyond their traditional boundaries. Over the last two decades of research, their potential for application in areas such as optoelectronic applications and memory devices has been progressively unraveled. Nevertheless, new challenges with no parallel in the respective bulk material counterparts have arisen. In this review, we consider what has been achieved and what are the current limitations with regard to growth, characterization and modeling of silicon and germanium nanocrystals and related materials. PMID:25383290

  3. Multilevel non-volatile data storage utilizing common current hysteresis of networked single walled carbon nanotubes

    NASA Astrophysics Data System (ADS)

    Hwang, Ihn; Wang, Wei; Hwang, Sun Kak; Cho, Sung Hwan; Kim, Kang Lib; Jeong, Beomjin; Huh, June; Park, Cheolmin

    2016-05-01

    The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period.The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the

  4. Integrated semiconductor-magnetic random access memory system

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

    2001-01-01

    The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

  5. Nonvolatile Bio-Memristor Fabricated with Egg Albumen Film

    NASA Astrophysics Data System (ADS)

    Chen, Ying-Chih; Yu, Hsin-Chieh; Huang, Chun-Yuan; Chung, Wen-Lin; Wu, San-Lein; Su, Yan-Kuin

    2015-05-01

    This study demonstrates the fabrication and characterization of chicken egg albumen-based bio-memristors. By introducing egg albumen as an insulator to fabricate memristor devices comprising a metal/insulator/metal sandwich structure, significant bipolar resistive switching behavior can be observed. The 1/f noise characteristics of the albumen devices were measured, and results suggested that their memory behavior results from the formation and rupture of conductive filaments. Oxygen diffusion and electrochemical redox reaction of metal ions under a sufficiently large electric field are the principal physical mechanisms of the formation and rupture of conductive filaments; these mechanisms were observed by analysis of the time-of-flight secondary ion mass spectrometry (TOF-SIMS) and resistance-temperature (R-T) measurement results. The switching property of the devices remarkably improved by heat-denaturation of proteins; reliable switching endurance of over 500 cycles accompanied by an on/off current ratio (Ion/off) of higher than 103 were also observed. Both resistance states could be maintained for a suitably long time (>104 s). Taking the results together, the present study reveals for the first time that chicken egg albumen is a promising material for nonvolatile memory applications.

  6. Nonvolatile bio-memristor fabricated with egg albumen film.

    PubMed

    Chen, Ying-Chih; Yu, Hsin-Chieh; Huang, Chun-Yuan; Chung, Wen-Lin; Wu, San-Lein; Su, Yan-Kuin

    2015-01-01

    This study demonstrates the fabrication and characterization of chicken egg albumen-based bio-memristors. By introducing egg albumen as an insulator to fabricate memristor devices comprising a metal/insulator/metal sandwich structure, significant bipolar resistive switching behavior can be observed. The 1/f noise characteristics of the albumen devices were measured, and results suggested that their memory behavior results from the formation and rupture of conductive filaments. Oxygen diffusion and electrochemical redox reaction of metal ions under a sufficiently large electric field are the principal physical mechanisms of the formation and rupture of conductive filaments; these mechanisms were observed by analysis of the time-of-flight secondary ion mass spectrometry (TOF-SIMS) and resistance-temperature (R-T) measurement results. The switching property of the devices remarkably improved by heat-denaturation of proteins; reliable switching endurance of over 500 cycles accompanied by an on/off current ratio (Ion/off) of higher than 10(3) were also observed. Both resistance states could be maintained for a suitably long time (>10(4) s). Taking the results together, the present study reveals for the first time that chicken egg albumen is a promising material for nonvolatile memory applications. PMID:25950812

  7. Nonvolatile Bio-Memristor Fabricated with Egg Albumen Film

    PubMed Central

    Chen, Ying-Chih; Yu, Hsin-Chieh; Huang, Chun-Yuan; Chung, Wen-Lin; Wu, San-Lein; Su, Yan-Kuin

    2015-01-01

    This study demonstrates the fabrication and characterization of chicken egg albumen-based bio-memristors. By introducing egg albumen as an insulator to fabricate memristor devices comprising a metal/insulator/metal sandwich structure, significant bipolar resistive switching behavior can be observed. The 1/f noise characteristics of the albumen devices were measured, and results suggested that their memory behavior results from the formation and rupture of conductive filaments. Oxygen diffusion and electrochemical redox reaction of metal ions under a sufficiently large electric field are the principal physical mechanisms of the formation and rupture of conductive filaments; these mechanisms were observed by analysis of the time-of-flight secondary ion mass spectrometry (TOF-SIMS) and resistance–temperature (R–T) measurement results. The switching property of the devices remarkably improved by heat-denaturation of proteins; reliable switching endurance of over 500 cycles accompanied by an on/off current ratio (Ion/off) of higher than 103 were also observed. Both resistance states could be maintained for a suitably long time (>104 s). Taking the results together, the present study reveals for the first time that chicken egg albumen is a promising material for nonvolatile memory applications. PMID:25950812

  8. Architectural Techniques For Managing Non-volatile Caches

    SciTech Connect

    Mittal, Sparsh

    2013-01-01

    As chip power dissipation becomes a critical challenge in scaling processor performance, computer architects are forced to fundamentally rethink the design of modern processors and hence, the chip-design industry is now at a major inflection point in its hardware roadmap. The high leakage power and low density of SRAM poses serious obstacles in its use for designing large on-chip caches and for this reason, researchers are exploring non-volatile memory (NVM) devices, such as spin torque transfer RAM, phase change RAM and resistive RAM. However, since NVMs are not strictly superior to SRAM, effective architectural techniques are required for making them a universal memory solution. This book discusses techniques for designing processor caches using NVM devices. It presents algorithms and architectures for improving their energy efficiency, performance and lifetime. It also provides both qualitative and quantitative evaluation to help the reader gain insights and motivate them to explore further. This book will be highly useful for beginners as well as veterans in computer architecture, chip designers, product managers and technical marketing professionals.

  9. Ferroelectric memory based on nanostructures

    NASA Astrophysics Data System (ADS)

    Liu, Xingqiang; Liu, Yueli; Chen, Wen; Li, Jinchai; Liao, Lei

    2012-06-01

    In the past decades, ferroelectric materials have attracted wide attention due to their applications in nonvolatile memory devices (NVMDs) rendered by the electrically switchable spontaneous polarizations. Furthermore, the combination of ferroelectric and nanomaterials opens a new route to fabricating a nanoscale memory device with ultrahigh memory integration, which greatly eases the ever increasing scaling and economic challenges encountered in the traditional semiconductor industry. In this review, we summarize the recent development of the nonvolatile ferroelectric field effect transistor (FeFET) memory devices based on nanostructures. The operating principles of FeFET are introduced first, followed by the discussion of the real FeFET memory nanodevices based on oxide nanowires, nanoparticles, semiconductor nanotetrapods, carbon nanotubes, and graphene. Finally, we present the opportunities and challenges in nanomemory devices and our views on the future prospects of NVMDs.

  10. Ferroelectric memory based on nanostructures

    PubMed Central

    2012-01-01

    In the past decades, ferroelectric materials have attracted wide attention due to their applications in nonvolatile memory devices (NVMDs) rendered by the electrically switchable spontaneous polarizations. Furthermore, the combination of ferroelectric and nanomaterials opens a new route to fabricating a nanoscale memory device with ultrahigh memory integration, which greatly eases the ever increasing scaling and economic challenges encountered in the traditional semiconductor industry. In this review, we summarize the recent development of the nonvolatile ferroelectric field effect transistor (FeFET) memory devices based on nanostructures. The operating principles of FeFET are introduced first, followed by the discussion of the real FeFET memory nanodevices based on oxide nanowires, nanoparticles, semiconductor nanotetrapods, carbon nanotubes, and graphene. Finally, we present the opportunities and challenges in nanomemory devices and our views on the future prospects of NVMDs. PMID:22655750

  11. Nonvolatile read/write memory element - A concept

    NASA Technical Reports Server (NTRS)

    Cricchi, J. R.

    1971-01-01

    Bidirectional MOS driver, integrated with diode matrix reduces fuse read current to only that of junction leakage and transient MOS gate charging current. No current, except junction leakage current, flows in unaddressed cells. Current required to drive MOS gate flows through unfused branch only during read mode.

  12. Nanocrystal doped matrixes

    DOEpatents

    Parce, J. Wallace; Bernatis, Paul; Dubrow, Robert; Freeman, William P.; Gamoras, Joel; Kan, Shihai; Meisel, Andreas; Qian, Baixin; Whiteford, Jeffery A.; Ziebarth, Jonathan

    2010-01-12

    Matrixes doped with semiconductor nanocrystals are provided. In certain embodiments, the semiconductor nanocrystals have a size and composition such that they absorb or emit light at particular wavelengths. The nanocrystals can comprise ligands that allow for mixing with various matrix materials, including polymers, such that a minimal portion of light is scattered by the matrixes. The matrixes of the present invention can also be utilized in refractive index matching applications. In other embodiments, semiconductor nanocrystals are embedded within matrixes to form a nanocrystal density gradient, thereby creating an effective refractive index gradient. The matrixes of the present invention can also be used as filters and antireflective coatings on optical devices and as down-converting layers. Processes for producing matrixes comprising semiconductor nanocrystals are also provided. Nanostructures having high quantum efficiency, small size, and/or a narrow size distribution are also described, as are methods of producing indium phosphide nanostructures and core-shell nanostructures with Group II-VI shells.

  13. Electrochromic nanocrystal quantum dots.

    PubMed

    Wang, C; Shim, M; Guyot-Sionnest, P

    2001-03-23

    Incorporating nanocrystals into future electronic or optoelectronic devices will require a means of controlling charge-injection processes and an understanding of how the injected charges affect the properties of nanocrystals. We show that the optical properties of colloidal semiconductor nanocrystal quantum dots can be tuned by an electrochemical potential. The injection of electrons into the quantum-confined states of the nanocrystal leads to an electrochromic response, including a strong, size-tunable, midinfrared absorption corresponding to an intraband transition, a bleach of the visible interband exciton transitions, and a quench of the narrow band-edge photoluminescence. PMID:11264530

  14. General observation of the memory effect in metal-insulator-ITO structures due to indium diffusion

    NASA Astrophysics Data System (ADS)

    Wu, Xiaojing; Xu, Huihua; Wang, Yu; Rogach, Andrey L.; Shen, Yingzhong; Zhao, Ni

    2015-07-01

    Resistive random access memory (RRAM) devices based on metal oxides, organic molecules and inorganic nanocrystals (NCs) have been studied extensively in recent years. Different memory switching mechanisms have been proposed and shown to be closely related to the device architectures. In this work, we demonstrate that the use of an ITO/active layer/InGa structure can yield nonvolatile resistive memory behavior in a variety of active materials, including polymers, organic small molecules, and colloidal NCs. Through the electrode material and thickness-dependent study, we show that the ON state of the devices is associated with filamentary conduction induced by indium diffusion from the ITO electrode, occurring mostly within around 40-50 nm from the ITO/active layer interface. A negative differential resistance (NDR) regime is observed during transition from the ON to OFF state, and is explained by the space charge limited current (SCLC) effect due to hole injection at the ITO/active layer interface. Our study reveals the impact of indium diffusion at the ITO/active layer interface, an important factor that should be taken into consideration when designing thin printed RRAM devices.

  15. Measurement of nonvolatile particle number size distribution

    NASA Astrophysics Data System (ADS)

    Gkatzelis, G. I.; Papanastasiou, D. K.; Florou, K.; Kaltsonoudis, C.; Louvaris, E.; Pandis, S. N.

    2016-01-01

    An experimental methodology was developed to measure the nonvolatile particle number concentration using a thermodenuder (TD). The TD was coupled with a high-resolution time-of-flight aerosol mass spectrometer, measuring the chemical composition and mass size distribution of the submicrometer aerosol and a scanning mobility particle sizer (SMPS) that provided the number size distribution of the aerosol in the range from 10 to 500 nm. The method was evaluated with a set of smog chamber experiments and achieved almost complete evaporation (> 98 %) of secondary organic as well as freshly nucleated particles, using a TD temperature of 400 °C and a centerline residence time of 15 s. This experimental approach was applied in a winter field campaign in Athens and provided a direct measurement of number concentration and size distribution for particles emitted from major pollution sources. During periods in which the contribution of biomass burning sources was dominant, more than 80 % of particle number concentration remained after passing through the thermodenuder, suggesting that nearly all biomass burning particles had a nonvolatile core. These remaining particles consisted mostly of black carbon (60 % mass contribution) and organic aerosol (OA; 40 %). Organics that had not evaporated through the TD were mostly biomass burning OA (BBOA) and oxygenated OA (OOA) as determined from AMS source apportionment analysis. For periods during which traffic contribution was dominant 50-60 % of the particles had a nonvolatile core while the rest evaporated at 400 °C. The remaining particle mass consisted mostly of black carbon with an 80 % contribution, while OA was responsible for another 15-20 %. Organics were mostly hydrocarbon-like OA (HOA) and OOA. These results suggest that even at 400 °C some fraction of the OA does not evaporate from particles emitted from common combustion processes, such as biomass burning and car engines, indicating that a fraction of this type of OA

  16. Interactions between volatile and nonvolatile coffee components. 1. Screening of nonvolatile components.

    PubMed

    Charles-Bernard, Marielle; Kraehenbuehl, Karin; Rytz, Andreas; Roberts, Deborah D

    2005-06-01

    This study is the first of two publications that investigate the phenomena of coffee nonvolatiles interacting with coffee volatile compounds. The purpose was to identify which coffee nonvolatile(s) are responsible for the interactions observed between nonvolatile coffee brew constituents and thiols, sulfides, pyrroles, and diketones. The overall interaction of these compounds with coffee brews prepared with green coffee beans roasted at three different roasting levels (light, medium, and dark), purified nonvolatiles, and medium roasted coffee brew fractions (1% solids after 1 or 24 h) was measured using a headspace solid-phase microextraction technique. The dark roasted coffee brew was slightly more reactive toward the selected compounds than the light roasted coffee brew. Selected pure coffee constituents, such as caffeine, trigonelline, arabinogalactans, chlorogenic acid, and caffeic acid, showed few interactions with the coffee volatiles. Upon fractionation of medium roasted coffee brew by solid-phase extraction, dialysis, size exclusion chromatography, or anion exchange chromatography, characterization of each fraction, evaluation of the interactions with the aromas, and correlation between the chemical composition of the fractions and the magnitude of the interactions, the following general conclusions were drawn. (1) Low molecular weight and positively charged melanoidins present significant interactions. (2) Strong correlations were shown between the melanoidin and protein/peptide content, on one hand, and the extent of interactions, on the other hand (R = 0.83-0.98, depending on the volatile compound). (3) Chlorogenic acids and carbohydrates play a secondary role, because only weak correlations with the interactions were found in complex matrixes. PMID:15913304

  17. Three dimensional magnetic abacus memory

    NASA Astrophysics Data System (ADS)

    Zhang, Shilei; Zhang, Jingyan; Baker, Alexander; Wang, Shouguo; Yu, Guanghua; Hesjedal, Thorsten

    2015-03-01

    Stacking nonvolatile memory cells into a three-dimensional matrix represents a powerful solution for the future of magnetic memory. However, it is technologically challenging to access the individual data in the storage medium if large numbers of bits are stacked on top of each other. Here we introduce a new type of multilevel, nonvolatile magnetic memory concept, the magnetic abacus. Instead of storing information in individual magnetic layers, thereby having to read out each magnetic layer separately, the magnetic abacus adopts a new encoding scheme which envisages a classical abacus with the beads operated by electron spins. It is inspired by the idea of second quantization, dealing with the memory state of the entire stack simultaneously. Direct read operations are implemented by measuring the artificially engineered `quantized' Hall voltage, representing a count of the spin-up and spin-down layers in the stack. This concept of `second quantization of memory' realizes the 3D memory architecture with superior reading and operation efficiency, thus is a promising approach for future nonvolatile magnetic random access memory.

  18. Biomineralization: Nanocrystals by design

    NASA Astrophysics Data System (ADS)

    Shang, Li; Nienhaus, Gerd Ulrich

    2015-10-01

    Nanocrystals with precisely defined structures offer promise as components of advanced materials yet they are challenging to create. Now, a nanocrystal made up of seven cadmium and twelve chloride ions has been synthesized via a biotemplating approach that uses a de novo designed protein.

  19. Doping semiconductor nanocrystals.

    PubMed

    Erwin, Steven C; Zu, Lijun; Haftel, Michael I; Efros, Alexander L; Kennedy, Thomas A; Norris, David J

    2005-07-01

    Doping--the intentional introduction of impurities into a material--is fundamental to controlling the properties of bulk semiconductors. This has stimulated similar efforts to dope semiconductor nanocrystals. Despite some successes, many of these efforts have failed, for reasons that remain unclear. For example, Mn can be incorporated into nanocrystals of CdS and ZnSe (refs 7-9), but not into CdSe (ref. 12)--despite comparable bulk solubilities of near 50 per cent. These difficulties, which have hindered development of new nanocrystalline materials, are often attributed to 'self-purification', an allegedly intrinsic mechanism whereby impurities are expelled. Here we show instead that the underlying mechanism that controls doping is the initial adsorption of impurities on the nanocrystal surface during growth. We find that adsorption--and therefore doping efficiency--is determined by three main factors: surface morphology, nanocrystal shape, and surfactants in the growth solution. Calculated Mn adsorption energies and equilibrium shapes for several nanocrystals lead to specific doping predictions. These are confirmed by measuring how the Mn concentration in ZnSe varies with nanocrystal size and shape. Finally, we use our predictions to incorporate Mn into previously undopable CdSe nanocrystals. This success establishes that earlier difficulties with doping are not intrinsic, and suggests that a variety of doped nanocrystals--for applications from solar cells to spintronics--can be anticipated. PMID:16001066

  20. Nonvolatile data storage using mechanical force-induced polarization switching in ferroelectric polymer

    SciTech Connect

    Chen, Xin; Tang, Xin; Chen, Xiang-Zhong; Chen, Yu-Lei; Shen, Qun-Dong; Guo, Xu; Ge, Hai-Xiong

    2015-01-26

    Ferroelectric polymers offer the promise of low-cost and flexible electronic products. They are attractive for information storage due to their spontaneous polarization which is usually switched by electric field. Here, we demonstrate that electrical signals can be readily written on ultra-thin ferroelectric polymer films by strain gradient-induced polarization switching (flexoelectric effect). A force with magnitude as small as 64nN is enough to induce highly localized (40 nm feature size) change in the polarization states. The methodology is capable of realizing nonvolatile memory devices with miniaturized cell size and storage density of tens to hundreds Gbit per square inch.

  1. Three-Dimensional Vertical-Bloch-Line Memory System

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Wu, Jiin-Chuan; Stadler, Henry L.

    1994-01-01

    In proposed magnetic memory system without moving parts, data is stored in stack of two-dimensional vertical-Bloch-line (VBL) memory chips or modules. System similar to one described in "Three-Dimensional Magnetic-Bubble Memory System" (NPO-18533). Each VBL module in this memory system silimar to module described in "Vertical-Bloch-Line Memory" (NPO-18467). Advantages include high storage density, high speed, nonvolatility, and insensitivity to ionizing radiation.

  2. Skin-Inspired Haptic Memory Arrays with an Electrically Reconfigurable Architecture.

    PubMed

    Zhu, Bowen; Wang, Hong; Liu, Yaqing; Qi, Dianpeng; Liu, Zhiyuan; Wang, Hua; Yu, Jiancan; Sherburne, Matthew; Wang, Zhaohui; Chen, Xiaodong

    2016-02-24

    Skin-inspired haptic-memory devices, which can retain pressure information after the removel of external pressure by virtue of the nonvolatile nature of the memory devices, are achieved. The rise of haptic-memory devices will allow for mimicry of human sensory memory, opening new avenues for the design of next-generation high-performance sensing devices and systems. PMID:26676965

  3. Three dimensional magnetic abacus memory

    NASA Astrophysics Data System (ADS)

    Zhang, Shilei; Zhang, Jingyan; Baker, Alexander A.; Wang, Shouguo; Yu, Guanghua; Hesjedal, Thorsten

    2014-08-01

    Stacking nonvolatile memory cells into a three-dimensional matrix represents a powerful solution for the future of magnetic memory. However, it is technologically challenging to access the data in the storage medium if large numbers of bits are stacked on top of each other. Here we introduce a new type of multilevel, nonvolatile magnetic memory concept, the magnetic abacus. Instead of storing information in individual magnetic layers, thereby having to read out each magnetic layer separately, the magnetic abacus adopts a new encoding scheme. It is inspired by the idea of second quantisation, dealing with the memory state of the entire stack simultaneously. Direct read operations are implemented by measuring the artificially engineered `quantised' Hall voltage, each representing a count of the spin-up and spin-down layers in the stack. This new memory system further allows for both flexible scaling of the system and fast communication among cells. The magnetic abacus provides a promising approach for future nonvolatile 3D magnetic random access memory.

  4. Three dimensional magnetic abacus memory.

    PubMed

    Zhang, ShiLei; Zhang, JingYan; Baker, Alexander A; Wang, ShouGuo; Yu, GuangHua; Hesjedal, Thorsten

    2014-01-01

    Stacking nonvolatile memory cells into a three-dimensional matrix represents a powerful solution for the future of magnetic memory. However, it is technologically challenging to access the data in the storage medium if large numbers of bits are stacked on top of each other. Here we introduce a new type of multilevel, nonvolatile magnetic memory concept, the magnetic abacus. Instead of storing information in individual magnetic layers, thereby having to read out each magnetic layer separately, the magnetic abacus adopts a new encoding scheme. It is inspired by the idea of second quantisation, dealing with the memory state of the entire stack simultaneously. Direct read operations are implemented by measuring the artificially engineered 'quantised' Hall voltage, each representing a count of the spin-up and spin-down layers in the stack. This new memory system further allows for both flexible scaling of the system and fast communication among cells. The magnetic abacus provides a promising approach for future nonvolatile 3D magnetic random access memory. PMID:25146338

  5. Coexistence of diode-like volatile and multilevel nonvolatile resistive switching in a ZrO2/TiO2 stack structure.

    PubMed

    Li, Yingtao; Yuan, Peng; Fu, Liping; Li, Rongrong; Gao, Xiaoping; Tao, Chunlan

    2015-10-01

    Diode-like volatile resistive switching as well as nonvolatile resistive switching behaviors in a Cu/ZrO₂/TiO₂/Ti stack are investigated. Depending on the current compliance during the electroforming process, either volatile resistive switching or nonvolatile resistive switching is observed. With a lower current compliance (<10 μA), the Cu/ZrO₂/TiO₂/Ti device exhibits diode-like volatile resistive switching with a rectifying ratio over 10(6). The permanent transition from volatile to nonvolatile resistive switching can be obtained by applying a higher current compliance of 100 μA. Furthermore, by using different reset voltages, the Cu/ZrO₂/TiO₂/Ti device exhibits multilevel memory characteristics with high uniformity. The coexistence of nonvolatile multilevel memory and diode-like volatile resistive switching behaviors in the same Cu/ZrO₂/TiO₂/Ti device opens areas of applications in high-density storage, logic circuits, neural networks, and passive crossbar memory selectors. PMID:26358828

  6. Nanocrystal dispersed amorphous alloys

    NASA Technical Reports Server (NTRS)

    Perepezko, John H. (Inventor); Allen, Donald R. (Inventor); Foley, James C. (Inventor)

    2001-01-01

    Compositions and methods for obtaining nanocrystal dispersed amorphous alloys are described. A composition includes an amorphous matrix forming element (e.g., Al or Fe); at least one transition metal element; and at least one crystallizing agent that is insoluble in the resulting amorphous matrix. During devitrification, the crystallizing agent causes the formation of a high density nanocrystal dispersion. The compositions and methods provide advantages in that materials with superior properties are provided.

  7. Nanocrystal-Powered Nanomotor

    SciTech Connect

    Regan, B.C.; Aloni, S.; Jensen, K.; Ritchie, R.O.; Zettl, A.

    2005-07-05

    We have constructed and operated a nanoscale linear motorpowered by a single metal nanocrystal ram sandwiched between mechanicallever arms. Low-level electrical voltages applied to the carbon nanotubelever arms cause the nanocrystal to grow or shrink in a controlledmanner. The length of the ram is adjustable from 0 to more than 150 nm,with extension speeds exceeding 1900 nm/s. The thermodynamic principlesgoverning motor operation resemble those driving frost heave, a naturalsolid-state linear motor.

  8. Nanoporous silicon oxide memory.

    PubMed

    Wang, Gunuk; Yang, Yang; Lee, Jae-Hwang; Abramova, Vera; Fei, Huilong; Ruan, Gedeng; Thomas, Edwin L; Tour, James M

    2014-08-13

    Oxide-based two-terminal resistive random access memory (RRAM) is considered one of the most promising candidates for next-generation nonvolatile memory. We introduce here a new RRAM memory structure employing a nanoporous (NP) silicon oxide (SiOx) material which enables unipolar switching through its internal vertical nanogap. Through the control of the stochastic filament formation at low voltage, the NP SiOx memory exhibited an extremely low electroforming voltage (∼ 1.6 V) and outstanding performance metrics. These include multibit storage ability (up to 9-bits), a high ON-OFF ratio (up to 10(7) A), a long high-temperature lifetime (≥ 10(4) s at 100 °C), excellent cycling endurance (≥ 10(5)), sub-50 ns switching speeds, and low power consumption (∼ 6 × 10(-5) W/bit). Also provided is the room temperature processability for versatile fabrication without any compliance current being needed during electroforming or switching operations. Taken together, these metrics in NP SiOx RRAM provide a route toward easily accessed nonvolatile memory applications. PMID:24992278

  9. NONVOLATILE ORGANICS IN DISINFECTED WASTEWATER EFFLUENTS: CHEMICAL CHARACTERIZATION AND MUTAGENICITY

    EPA Science Inventory

    Principal objectives of this research program were to examine the effects of disinfection by chlorine, ozone, and ultraviolet light irradiation on nonvolatile organic constituents in secondary effluents relative to chemical effects and formation of mutagenic substances. In a comp...

  10. From Secure Memories to Smart Card Security

    NASA Astrophysics Data System (ADS)

    Handschuh, Helena; Trichina, Elena

    Non-volatile memory is essential in most embedded security applications. It will store the key and other sensitive materials for cryptographic and security applications. In this chapter, first an overview is given of current flash memory architectures. Next the standard security features which form the basis of so-called secure memories are described in more detail. Smart cards are a typical embedded application that is very vulnerable to attacks and that at the same time has a high need for secure non-volatile memory. In the next part of this chapter, the secure memories of so-called flash-based high-density smart cards are described. It is followed by a detailed analysis of what the new security challenges for such objects are.

  11. Multiple-anion nonvolatile acetal (MANA) resists

    NASA Astrophysics Data System (ADS)

    Guevremont, Jeffrey M.; Brainard, Robert L.; Reeves, Scott D.; Zhou, Xin; Nguyen, Thinh B.; Mackevich, Joseph F.; Anderson, Erik H.; Taylor, Gary N.

    2001-08-01

    New acetal or ketal blocking reagents were investigated for use in e-beam lithography and compared with the performance of ethyl vinyl either (EVE). Three blocking groups, (alpha) -Angelicalactone (AL), 6-methylene-5,6-benzo-1,4- dioxane (MBD), and MANA50 (an undisclosed blocking group used to show the potential of this chemistry) were reacted with poly(p-hydroxystyrene) (PHS) under acid catalyzed conditions to form AL-PHS, MBD-PHS, MANA50-PHS. The performance objectives pursued in the design of these new materials was to use acetal (ketal) chemistry to deliver wide process latitudes (e.g. good PED performance and minimal PEB sensitivity), use high molecular weight blocking groups to eliminate outgassing, and use the novel concept of multiple anions to deliver lithographic performance. These new materials are called Multiple Anion Nonvolatile Acetal (MANA) resists. Resists films were exposed with 50kV electrons, post exposure baked (PEB), and developed with 0.26 N TMAH. Resists prepared with the third blocking group, MANA50, gave contrast and imaging performance independent of PEB humidity and were relatively insensitive to PEB temperature and post exposure delay (PED). These resists gave the best resolution (90 nm) and profiles of all the materials tested, as well as showing no outgassing (as measured by film thickness loss).

  12. Programmable Analog Memory Resistors For Electronic Neural Networks

    NASA Technical Reports Server (NTRS)

    Ramesham, Rajeshuni; Thakoor, Sarita; Daud, Taher; Thakoor, Anilkumar P.

    1990-01-01

    Electrical resistance of new solid-state device altered repeatedly by suitable control signals, yet remains at steady value when control signal removed. Resistance set at low value ("on" state), high value ("off" state), or at any convenient intermediate value and left there until new value desired. Circuits of this type particularly useful in nonvolatile, associative electronic memories based on models of neural networks. Such programmable analog memory resistors ideally suited as synaptic interconnects in "self-learning" neural nets. Operation of device depends on electrochromic property of WO3, which when pure is insulator. Potential uses include nonvolatile, erasable, electronically programmable read-only memories.

  13. Nanocrystal Solar Cells

    SciTech Connect

    Gur, Ilan

    2006-12-15

    This dissertation presents the results of a research agenda aimed at improving integration and stability in nanocrystal-based solar cells through advances in active materials and device architectures. The introduction of 3-dimensional nanocrystals illustrates the potential for improving transport and percolation in hybrid solar cells and enables novel fabrication methods for optimizing integration in these systems. Fabricating cells by sequential deposition allows for solution-based assembly of hybrid composites with controlled and well-characterized dispersion and electrode contact. Hyperbranched nanocrystals emerge as a nearly ideal building block for hybrid cells, allowing the controlled morphologies targeted by templated approaches to be achieved in an easily fabricated solution-cast device. In addition to offering practical benefits to device processing, these approaches offer fundamental insight into the operation of hybrid solar cells, shedding light on key phenomena such as the roles of electrode-contact and percolation behavior in these cells. Finally, all-inorganic nanocrystal solar cells are presented as a wholly new cell concept, illustrating that donor-acceptor charge transfer and directed carrier diffusion can be utilized in a system with no organic components, and that nanocrystals may act as building blocks for efficient, stable, and low-cost thin-film solar cells.

  14. The future of memory

    NASA Astrophysics Data System (ADS)

    Marinella, M.

    In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

  15. Reversible and Nonvolatile Modulations of Magnetization Switching Characteristic and Domain Configuration in L10-FePt Films via Nonelectrically Controlled Strain Engineering.

    PubMed

    Feng, Chun; Zhao, Jiancheng; Yang, Feng; Hao, Shijie; Gong, Kui; Hu, Di; Cao, Yi; Jiang, Xumin; Wang, Zhongqiang; Chen, Lei; Li, Sirui; Sun, Li; Cui, Lishan; Yu, Guanghua

    2016-03-23

    Reversible and nonvolatile modulation of magnetization switching characteristic in ferromagnetic materials is crucial in developing spintronic devices with low power consumption. It is recently discovered that strain engineering can be an active and effective approach in tuning the magnetic/transport properties of thin films. The primary method in strain modulation is via the converse piezoelectric effect of ferroelectrics, which is usually volatile due to the reliance of the required electric field. Also the maximum amount of deformation in ferroelectrics is usually limited to be less than 1%, and the corresponding magnetoelastic strain energy introduced to ferromagnetic films is on the order of 10(4) J/m(3), not enough to overcome magnetocrystalline anisotropy energy (Ku) in many materials. Different from using conventional strain inducing substrates, this paper reports on the significantly large, reversible, and nonvolatile lattice strain in the L10-FePt films (up to 2.18%) using nonelectrically controlled shape memory alloy substrates. Introduced lattice strain can be large enough to effectively affect domain structure and magnetic reversal in FePt. A noticeable decrease of coercivity field by 80% is observed. Moreover, the coercivity field tunability using such substrates is nonvolatile at room temperature and is also reversible due to the characteristics of the shape memory effect. This finding provides an efficient avenue for developing strain assisted spintronic devices such as logic memory device, magnetoresistive random-access memory, and memristor. PMID:26939773

  16. Ultra-dense billion year memory chip

    SciTech Connect

    2009-01-01

    This video shows an iron nanoparticle shuttle moving through a carbon nanotube in the presence of a low voltage electrical current. The shuttles position inside the tube can function as a high-density nonvolatile memory element. (Courtesy of /Zettl Research Group, Lawrence Berkeley National Laboratory and University of California at Berkeley.)

  17. Non-volatile Clocked Spin Wave Interconnect for Beyond-CMOS Nanomagnet Pipelines

    NASA Astrophysics Data System (ADS)

    Dutta, Sourav; Chang, Sou-Chi; Kani, Nickvash; Nikonov, Dmitri E.; Manipatruni, Sasikanth; Young, Ian A.; Naeemi, Azad

    2015-05-01

    The possibility of using spin waves for information transmission and processing has been an area of active research due to the unique ability to manipulate the amplitude and phase of the spin waves for building complex logic circuits with less physical resources and low power consumption. Previous proposals on spin wave logic circuits have suggested the idea of utilizing the magneto-electric effect for spin wave amplification and amplitude- or phase-dependent switching of magneto-electric cells. Here, we propose a comprehensive scheme for building a clocked non-volatile spin wave device by introducing a charge-to-spin converter that translates information from electrical domain to spin domain, magneto-electric spin wave repeaters that operate in three different regimes - spin wave transmitter, non-volatile memory and spin wave detector, and a novel clocking scheme that ensures sequential transmission of information and non-reciprocity. The proposed device satisfies the five essential requirements for logic application: nonlinearity, amplification, concatenability, feedback prevention, and complete set of Boolean operations.

  18. Non-volatile Clocked Spin Wave Interconnect for Beyond-CMOS Nanomagnet Pipelines

    PubMed Central

    Dutta, Sourav; Chang, Sou-Chi; Kani, Nickvash; Nikonov, Dmitri E.; Manipatruni, Sasikanth; Young, Ian A.; Naeemi, Azad

    2015-01-01

    The possibility of using spin waves for information transmission and processing has been an area of active research due to the unique ability to manipulate the amplitude and phase of the spin waves for building complex logic circuits with less physical resources and low power consumption. Previous proposals on spin wave logic circuits have suggested the idea of utilizing the magneto-electric effect for spin wave amplification and amplitude- or phase-dependent switching of magneto-electric cells. Here, we propose a comprehensive scheme for building a clocked non-volatile spin wave device by introducing a charge-to-spin converter that translates information from electrical domain to spin domain, magneto-electric spin wave repeaters that operate in three different regimes - spin wave transmitter, non-volatile memory and spin wave detector, and a novel clocking scheme that ensures sequential transmission of information and non-reciprocity. The proposed device satisfies the five essential requirements for logic application: nonlinearity, amplification, concatenability, feedback prevention, and complete set of Boolean operations. PMID:25955353

  19. Non-volatile Clocked Spin Wave Interconnect for Beyond-CMOS Nanomagnet Pipelines.

    PubMed

    Dutta, Sourav; Chang, Sou-Chi; Kani, Nickvash; Nikonov, Dmitri E; Manipatruni, Sasikanth; Young, Ian A; Naeemi, Azad

    2015-01-01

    The possibility of using spin waves for information transmission and processing has been an area of active research due to the unique ability to manipulate the amplitude and phase of the spin waves for building complex logic circuits with less physical resources and low power consumption. Previous proposals on spin wave logic circuits have suggested the idea of utilizing the magneto-electric effect for spin wave amplification and amplitude- or phase-dependent switching of magneto-electric cells. Here, we propose a comprehensive scheme for building a clocked non-volatile spin wave device by introducing a charge-to-spin converter that translates information from electrical domain to spin domain, magneto-electric spin wave repeaters that operate in three different regimes--spin wave transmitter, non-volatile memory and spin wave detector, and a novel clocking scheme that ensures sequential transmission of information and non-reciprocity. The proposed device satisfies the five essential requirements for logic application: nonlinearity, amplification, concatenability, feedback prevention, and complete set of Boolean operations. PMID:25955353

  20. Magnetic Analog Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Wu, Jiin-Chuan; Stadler, Henry L.

    1991-01-01

    Proposed integrated, solid-state, analog random-access memory base on principle of magnetic writing and magnetoresistive reading. Current in writing conductor magnetizes storage layer. Remanent magnetization in storage layer penetrates readout layer and detected by magnetoresistive effect or Hall effect. Memory cells are part of integrated circuit including associated reading and writing transistors. Intended to provide high storage density and rapid access, nonvolatile, consumes little power, and relatively invulnerable to ionizing radiation.

  1. Investigation of the non-volatile resistance change in noncentrosymmetric compounds

    PubMed Central

    Herng, T. S.; Kumar, A.; Ong, C. S.; Feng, Y. P.; Lu, Y. H.; Zeng, K. Y.; Ding, J.

    2012-01-01

    Coexistence of polarization and resistance-switching characteristics in single compounds has been long inspired scientific and technological interests. Here, we report the non-volatile resistance change in noncentrosymmetric compounds investigated by using defect nanotechnology and contact engineering. Using a noncentrosymmetric material of ZnO as example, we first transformed ZnO into high resistance state. Then ZnO electrical polarization was probed and its domains polarized 180° along the [001]-axis with long-lasting memory effect (>25 hours). Based on our experimental observations, we have developed a vacancy-mediated pseudoferroelectricity model. Our first-principle calculations propose that vacancy defects initiate a spontaneous inverted domains nucleation at grain boundaries, and then they grow in the presence of an electrical field. The propagation of inverted domains follows the scanning tip motion under applied electrical field, leading to the growth of polarized domains over large areas. PMID:22905318

  2. Simple Preparation and Stabilization of Nickel Nanocrystals on Cellulose Nanocrystal

    SciTech Connect

    Shin, Yongsoon; Bae, In-Tae; Arey, Bruce W.; Exarhos, Gregory J.

    2007-06-01

    Nickel nanocrystals were simply prepared on the carbon through a thermal reduction process at 400-500oC under N2 after Ni(II) ions were deposited and stabilized on cellulose nanocrystal (CNXL) surface. Hydroxyl groups on the CNXL anchor and stabilize Ni(II) ions. Well-dispersed Ni nanocrystals on the carbonized CNXL were about 5-12 nm in size. XRD, FESEM, and TEM were employed to characterize the products.

  3. A Real-Time Nonvolatile Residue (NVR) Monitor

    NASA Technical Reports Server (NTRS)

    Bowers, William D.; Chuan, Raymond L.

    1995-01-01

    New development and application of device described in "Surface-Acoustic-Wave Piezoelectric Microbalance," (LAR-14476). Active sensing element of Real-Time NVR Monitor comprises pair of piezoelectric surface-acoustic-wave resonators resonating at frequency of 200 MHz. Bare, uncoated resonator exposed to atmosphere and directly in contact with airborne volatile and nonvolatile materials leaving residues on surface. Resonant frequency of exposed resonator decreases with increasing mass of adsorbed residue; resulting beat frequency between two resonators increases with mass and serves as sensitive real-time indication of airborne contaminants or non-volatile residue.

  4. Nanocrystal Inks without Ligands: Stable Colloids of Bare Germanium Nanocrystals

    SciTech Connect

    Holman, Zachary C.; Kortshagen, Uwe R.

    2011-05-11

    Colloidal semiconductor nanocrystals typically have ligands attached to their surfaces that afford solubility in common solvents but hinder charge transport in nanocrystal films. Here, an alternative route is explored in which bare germanium nanocrystals are solubilized by select solvents to form stable colloids without the use of ligands. A survey of candidate solvents shows that germanium nanocrystals are completely solubilized by benzonitrile, likely because of electrostatic stabilization. Films cast from these dispersions are uniform, dense, and smooth, making them suitable for device applications without postdeposition treatment.

  5. Modeling of Sonos Memory Cell Erase Cycle

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeond, Todd C.; Ho, Fat D.

    2010-01-01

    Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

  6. Modeling of SONOS Memory Cell Erase Cycle

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat H.

    2011-01-01

    Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

  7. Non Volatile Flash Memory Radiation Tests

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.; Allen, Greg

    2012-01-01

    Commercial flash memory industry has experienced a fast growth in the recent years, because of their wide spread usage in cell phones, mp3 players and digital cameras. On the other hand, there has been increased interest in the use of high density commercial nonvolatile flash memories in space because of ever increasing data requirements and strict power requirements. Because of flash memories complex structure; they cannot be treated as just simple memories in regards to testing and analysis. It becomes quite challenging to determine how they will respond in radiation environments.

  8. Sorting fluorescent nanocrystals with DNA

    SciTech Connect

    Gerion, Daniele; Parak, Wolfgang J.; Williams, Shara C.; Zanchet, Daniela; Micheel, Christine M.; Alivisatos, A. Paul

    2001-12-10

    Semiconductor nanocrystals with narrow and tunable fluorescence are covalently linked to oligonucleotides. These biocompounds retain the properties of both nanocrystals and DNA. Therefore, different sequences of DNA can be coded with nanocrystals and still preserve their ability to hybridize to their complements. We report the case where four different sequences of DNA are linked to four nanocrystal samples having different colors of emission in the range of 530-640 nm. When the DNA-nanocrystal conjugates are mixed together, it is possible to sort each type of nanoparticle using hybridization on a defined micrometer -size surface containing the complementary oligonucleotide. Detection of sorting requires only a single excitation source and an epifluorescence microscope. The possibility of directing fluorescent nanocrystals towards specific biological targets and detecting them, combined with their superior photo-stability compared to organic dyes, opens the way to improved biolabeling experiments, such as gene mapping on a nanometer scale or multicolor microarray analysis.

  9. NAND FLASH Radiation Tolerant Intelligent Memory Stack (RTIMS FLASH)

    NASA Astrophysics Data System (ADS)

    Sellier, Charles; Wang, Pierre

    2014-08-01

    The NAND Flash Radiation Tolerant and Intelligent Memory Stack (RTIMS FLASH) is a User's Friendly, Plug-and- Play and Radiation Protected high density NAND Flash Memory. It provides a very high density, radiation hardened by design and non-volatile memory module suitable for all space applications such as commercial or scientific geo-stationary missions, earth observation, navigation, manned space vehicles and deep space scientific exploration. The Intelligent Memory Module embeds a very high density of non-volatile NAND Flash memory and one Intelligent Flash Memory Controller (FMC). The FMC provides the module with a full protection against the radiation effects such as SEL, SEFI and SEU. It's also granting the module with bad block immunity as well as high level service functions that will benefit to the user's applications.

  10. Three-Dimensional Magnetic-Bubble Memory System

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Wu, Jiin-Chuan; Stadler, Henry L.

    1993-01-01

    Proposed magnetic-bubble memory system includes stack of two-dimensional memory modules. Design enables overall storage density of system to be greater than prior magnetic-bubble memories. Provides nonvolatile storage, with readout access times in millisecond range. Has partly parallel input/output configuration supporting high-performance computing. Also relatively invulnerable to damage by ionizing radiation. Binary data, as represented by direction of magnetization of magnetic bubbles, reads out via Faraday effect.

  11. Nanocrystal waveguide (NOW) laser

    DOEpatents

    Simpson, John T.; Simpson, Marcus L.; Withrow, Stephen P.; White, Clark W.; Jaiswal, Supriya L.

    2005-02-08

    A solid state laser includes an optical waveguide and a laser cavity including at least one subwavelength mirror disposed in or on the optical waveguide. A plurality of photoluminescent nanocrystals are disposed in the laser cavity. The reflective subwavelength mirror can be a pair of subwavelength resonant gratings (SWG), a pair of photonic crystal structures (PC), or a distributed feedback structure. In the case of a pair of mirrors, a PC which is substantially transmissive at an operating wavelength of the laser can be disposed in the laser cavity between the subwavelength mirrors to improve the mode structure, coherence and overall efficiency of the laser. A method for forming a solid state laser includes the steps of providing an optical waveguide, creating a laser cavity in the optical waveguide by disposing at least one subwavelength mirror on or in the waveguide, and positioning a plurality of photoluminescent nanocrystals in the laser cavity.

  12. Doped semiconductor nanocrystal junctions

    NASA Astrophysics Data System (ADS)

    Borowik, Ł.; Nguyen-Tran, T.; Roca i Cabarrocas, P.; Mélin, T.

    2013-11-01

    Semiconductor junctions are the basis of electronic and photovoltaic devices. Here, we investigate junctions formed from highly doped (ND≈1020-1021cm-3) silicon nanocrystals (NCs) in the 2-50 nm size range, using Kelvin probe force microscopy experiments with single charge sensitivity. We show that the charge transfer from doped NCs towards a two-dimensional layer experimentally follows a simple phenomenological law, corresponding to formation of an interface dipole linearly increasing with the NC diameter. This feature leads to analytically predictable junction properties down to quantum size regimes: NC depletion width independent of the NC size and varying as ND-1/3, and depleted charge linearly increasing with the NC diameter and varying as ND1/3. We thus establish a "nanocrystal counterpart" of conventional semiconductor planar junctions, here however valid in regimes of strong electrostatic and quantum confinements.

  13. Patterning nanocrystals using DNA

    SciTech Connect

    Williams, Shara Carol

    2003-09-01

    One of the goals of nanotechnology is to enable programmed self-assembly of patterns made of various materials with nanometer-sized control. This dissertation describes the results of experiments templating arrangements of gold and semiconductor nanocrystals using 2'-deoxyribonucleic acid (DNA). Previously, simple DNA-templated linear arrangements of two and three nanocrystals structures have been made.[1] Here, we have sought to assemble larger and more complex nanostructures. Gold-DNA conjugates with 50 to 100 bases self-assembled into planned arrangements using strands of DNA containing complementary base sequences. We used two methods to increase the complexity of the arrangements: using branched synthetic doublers within the DNA covalent backbone to create discrete nanocrystal groupings, and incorporating the nanocrystals into a previously developed DNA lattice structure [2][3] that self-assembles from tiles made of DNA double-crossover molecules to create ordered nanoparticle arrays. In the first project, the introduction of a covalently-branched synthetic doubler reagent into the backbone of DNA strands created a branched DNA ''trimer.'' This DNA trimer templated various structures that contained groupings of three and four gold nanoparticles, giving promising, but inconclusive transmission electron microscopy (TEM) results. Due to the presence of a variety of possible structures in the reaction mixtures, and due to the difficulty of isolating the desired structures, the TEM and gel electrophoresis results for larger structures having four particles, and for structures containing both 5 and 10 nm gold nanoparticles were inconclusive. Better results may come from using optical detection methods, or from improved sample preparation. In the second project, we worked toward making two-dimensional ordered arrays of nanocrystals. We replicated and improved upon previous results for making DNA lattices, increasing the size of the lattices to a length greater than

  14. Electronic spectra of semiconductor nanocrystals

    SciTech Connect

    Alivisatos, A.P.

    1993-12-31

    Semiconductor nanocrystals smaller than the bulk exciton show substantial quantum confinement effects. Recent experiments including Stark effect, resonance Raman, valence band photoemission, and near edge X-ray adsorption will be used to put together a picture of the nanocrystal electronic states.

  15. Photoemission studies of semiconductor nanocrystals

    SciTech Connect

    Hamad, K. S.; Roth, R.; Alivisatos, A. P.

    1997-04-01

    Semiconductor nanocrystals have been the focus of much attention in the last ten years due predominantly to their size dependent optical properties. Namely, the band gap of nanocrystals exhibits a shift to higher energy with decreasing size due to quantum confinement effects. Research in this field has employed primarily optical techniques to study nanocrystals, and in this respect this system has been investigated extensively. In addition, one is able to synthesize monodisperse, crystalline particles of CdS, CdSe, Si, InP, InAs, as well as CdS/HgS/CdS and CdSe/CdS composites. However, optical spectroscopies have proven ambiguous in determining the degree to which electronic excitations are interior or surface admixtures or giving a complete picture of the density of states. Photoemission is a useful technique for understanding the electronic structure of nanocrystals and the effects of quantum confinement, chemical environments of the nanocrystals, and surface coverages. Of particular interest to the authors is the surface composition and structure of these particles, for they have found that much of the behavior of nanocrystals is governed by their surface. Previously, the authors had performed x-ray photoelectron spectroscopy (XPS) on CdSe nanocrystals. XPS has proven to be a powerful tool in that it allows one to determine the composition of the nanocrystal surface.

  16. Method of synthesizing pyrite nanocrystals

    DOEpatents

    Wadia, Cyrus; Wu, Yue

    2013-04-23

    A method of synthesizing pyrite nanocrystals is disclosed which in one embodiment includes forming a solution of iron (III) diethyl dithiophosphate and tetra-alkyl-ammonium halide in water. The solution is heated under pressure. Pyrite nanocrystal particles are then recovered from the solution.

  17. Nanocrystal/sol-gel nanocomposites

    DOEpatents

    Petruska, Melissa A.; Klimov, Victor L.

    2012-06-12

    The present invention is directed to solid composites including colloidal nanocrystals within a sol-gel host or matrix and to processes of forming such solid composites. The present invention is further directed to alcohol soluble colloidal nanocrystals useful in formation of sol-gel based solid composites

  18. Nanocrystal/sol-gel nanocomposites

    DOEpatents

    Petruska, Melissa A.; Klimov, Victor L.

    2007-06-05

    The present invention is directed to solid composites including colloidal nanocrystals within a sol-gel host or matrix and to processes of forming such solid composites. The present invention is further directed to alcohol soluble colloidal nanocrystals useful in formation of sol-gel based solid composites.

  19. Nanocrystal/sol-gel nanocomposites

    DOEpatents

    Klimov, Victor L.; Petruska, Melissa A.

    2010-05-25

    The present invention is directed to a process for preparing a solid composite having colloidal nanocrystals dispersed within a sol-gel matrix, the process including admixing colloidal nanocrystals with an amphiphilic polymer including hydrophilic groups selected from the group consisting of --COOH, --OH, --SO.sub.3H, --NH.sub.2, and --PO.sub.3H.sub.2 within a solvent to form an alcohol-soluble colloidal nanocrystal-polymer complex, admixing the alcohol-soluble colloidal nanocrystal-polymer complex and a sol-gel precursor material, and, forming the solid composite from the admixture. The present invention is also directed to the resultant solid composites and to the alcohol-soluble colloidal nanocrystal-polymer complexes.

  20. Mechanical Properties of Nanocrystal Supercrystals

    SciTech Connect

    Tam, Enrico; Podsiadlo, Paul; Shevchenko, Elena; Ogletree, D. Frank; Delplancke-Ogletree, Marie-Paule; Ashby, Paul D.

    2009-12-30

    Colloidal nanocrystals attract significant interest due to their potential applications in electronic, magnetic, and optical devices. Nanocrystal supercrystals (NCSCs) are particularly appealing for their well ordered structure and homogeneity. The interactions between organic ligands that passivate the inorganic nanocrystal cores critically influence their self-organization into supercrystals, By investigating the mechanical properties of supercrystals, we can directly characterize the particle-particle interactions in a well-defined geometry, and gain insight into both the self-assembly process and the potential applications of nanocrystal supercrystals. Here we report nanoindentation studies of well ordered lead-sulfide (Pbs) nanocrystal supercrystals. Their modulus and hardness were found to be similar to soft polymers at 1.7 GPa and 70 MPa respectively and the fractures toughness was 39 KPa/m1/2, revealing the extremely brittle nature of these materials.

  1. Germanium Nanocrystals Embedded in Sapphire

    SciTech Connect

    Xu, Q.; Sharp, I.D.; Liao, C.Y.; Yi, D.O.; Ager III, J.W.; Beeman, J.W.; Yu, K.M.; Chrzan, D.C.; Haller, E.E.

    2005-04-15

    {sup 74}Ge nanocrystals are formed in a sapphire matrix by ion implantation followed by damage. Embedded nanocrystals experience large compressive stress relative to bulk, as embedded in sapphire melt very close to the bulk melting point (Tm = 936 C) whereas experience considerably lower stresses. Also, in situ TEM reveals that nanocrystals ion-beam-synthesized nanocrystals embedded in silica are observed to be spherical and measured by Raman spectroscopy of the zone center optical phonon. In contrast, reveals that the nanocrystals are faceted and have a bi-modal size distribution. Notably, the matrix remains crystalline despite the large implantation dose and corresponding thermal annealing. Transmission electron microscopy (TEM) of as-grown samples those embedded in silica exhibit a significant melting point hysteresis around T{sub m}.

  2. Langmuir-Blodgettry of nanocrystals and nanowires.

    PubMed

    Tao, Andrea R; Huang, Jiaxing; Yang, Peidong

    2008-12-01

    Although nanocrystals and nanowires have proliferated new scientific avenues in the study of their physics and chemistries, the bottom-up assembly of these small-scale building blocks remains a formidable challenge for device fabrication and processing. An attractive nanoscale assembly strategy should be cheap, fast, defect tolerant, compatible with a variety of materials, and parallel in nature, ideally utilizing the self-assembly to generate the core of a device, such as a memory chip or optical display. Langmuir-Blodgett (LB) assembly is a good candidate for arranging vast numbers of nanostructures on solid surfaces. In the LB technique, uniaxial compression of a nanocrystal or nanowire monolayer floating on an aqueous subphase causes the nanostructures to assemble and pack over a large area. The ordered monolayer can then be transferred to a solid surface en masse and with fidelity. In this Account, we present the Langmuir-Blodgett technique as a low-cost method for the massively parallel, controlled organization of nanostructures. The isothermal compression of fluid-supported nanoparticles or nanowires is unique in its ability to achieve control over nanoscale assembly by tuning a macroscopic property such as surface pressure. Under optimized conditions (e.g., surface pressure, substrate hydrophobicity, and pulling speed), it allows continuous variation of particle density, spacing, and even arrangement. For practical application and device fabrication, LB compression is ideal for forming highly dense assemblies of nanowires and nanocrystals over unprecedented surface areas. In addition, the dewetting properties of LB monolayers can be used to further achieve patterning within the range of micrometers to tens of nanometers without a predefined template. The LB method should allow for easy integration of nanomaterials into current manufacturing schemes, in addition to fast device prototyping and multiplexing capability. PMID:18683954

  3. Silicon nanocrystal inks, films, and methods

    DOEpatents

    Wheeler, Lance Michael; Kortshagen, Uwe Richard

    2015-09-01

    Silicon nanocrystal inks and films, and methods of making and using silicon nanocrystal inks and films, are disclosed herein. In certain embodiments the nanocrystal inks and films include halide-terminated (e.g., chloride-terminated) and/or halide and hydrogen-terminated nanocrystals of silicon or alloys thereof. Silicon nanocrystal inks and films can be used, for example, to prepare semiconductor devices.

  4. Multilevel Nonvolatile Memristive and Memcapacitive Switching in Stacked Graphene Sheets.

    PubMed

    Park, Minji; Park, Sungjin; Yoo, Kyung-Hwa

    2016-06-01

    We fabricated devices consisting of single and double graphene sheets embedded in organic polymer layers. These devices had binary and ternary nonvolatile resistive switching behaviors, respectively. Capacitance-voltage (C-V) curves and scanning capacitance microscopy (SCM) images were obtained to investigate the switching mechanism. The C-V curves exhibited a large hysteresis, implying that the graphene sheets acted as charging and discharging layers and that resistive switching was caused by charges trapped in the graphene layers. In addition, binary capacitive switching behaviors were observed for the device with a single graphene sheet, and ternary capacitive switching behaviors were observed for the device with the double graphene sheets. These results demonstrated that devices consisting of graphene sheets embedded in the polymer layers can be applied to multilevel nonvolatile memcapacitive devices as well as memristive devices. PMID:27203557

  5. Desorption Mass Spectrometry for Nonvolatile Compounds Using an Ultrasonic Cutter

    NASA Astrophysics Data System (ADS)

    Habib, Ahsan; Ninomiya, Satoshi; Chen, Lee Chuin; Usmanov, Dilshadbek T.; Hiraoka, Kenzo

    2014-07-01

    In this work, desorption of nonvolatile analytes induced by friction was studied. The nonvolatile compounds deposited on the perfluoroalkoxy substrate were gently touched by an ultrasonic cutter oscillating with a frequency of 40 kHz. The desorbed molecules were ionized by a dielectric barrier discharge (DBD) ion source. Efficient desorption of samples such as drugs, pharmaceuticals, amino acids, and explosives was observed. The limits of detection for these compounds were about 1 ng. Many compounds were detected in their protonated forms without undergoing significant fragmentation. When the DBD was off, no ions for the neutral samples could be detected, meaning that only desorption along with little ionization took place by the present technique.

  6. Radiation Test Challenges for Scaled Commerical Memories

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Ladbury, Ray L.; Cohn, Lewis M.; Oldham, Timothy

    2007-01-01

    As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.

  7. Flash Memory Reliability: Read, Program, and Erase Latency Versus Endurance Cycling

    NASA Technical Reports Server (NTRS)

    Heidecker, Jason

    2010-01-01

    This report documents the efforts and results of the fiscal year (FY) 2010 NASA Electronic Parts and Packaging Program (NEPP) task for nonvolatile memory (NVM) reliability. This year's focus was to measure latency (read, program, and erase) of NAND Flash memories and determine how these parameters drift with erase/program/read endurance cycling.

  8. Biomolecular Assembly of Gold Nanocrystals

    SciTech Connect

    Micheel, Christine Marya

    2005-05-20

    Over the past ten years, methods have been developed to construct discrete nanostructures using nanocrystals and biomolecules. While these frequently consist of gold nanocrystals and DNA, semiconductor nanocrystals as well as antibodies and enzymes have also been used. One example of discrete nanostructures is dimers of gold nanocrystals linked together with complementary DNA. This type of nanostructure is also known as a nanocrystal molecule. Discrete nanostructures of this kind have a number of potential applications, from highly parallel self-assembly of electronics components and rapid read-out of DNA computations to biological imaging and a variety of bioassays. My research focused in three main areas. The first area, the refinement of electrophoresis as a purification and characterization method, included application of agarose gel electrophoresis to the purification of discrete gold nanocrystal/DNA conjugates and nanocrystal molecules, as well as development of a more detailed understanding of the hydrodynamic behavior of these materials in gels. The second area, the development of methods for quantitative analysis of transmission electron microscope data, used computer programs written to find pair correlations as well as higher order correlations. With these programs, it is possible to reliably locate and measure nanocrystal molecules in TEM images. The final area of research explored the use of DNA ligase in the formation of nanocrystal molecules. Synthesis of dimers of gold particles linked with a single strand of DNA possible through the use of DNA ligase opens the possibility for amplification of nanostructures in a manner similar to polymerase chain reaction. These three areas are discussed in the context of the work in the Alivisatos group, as well as the field as a whole.

  9. Doped semiconductor nanocrystal junctions

    SciTech Connect

    Borowik, Ł.; Mélin, T.; Nguyen-Tran, T.; Roca i Cabarrocas, P.

    2013-11-28

    Semiconductor junctions are the basis of electronic and photovoltaic devices. Here, we investigate junctions formed from highly doped (N{sub D}≈10{sup 20}−10{sup 21}cm{sup −3}) silicon nanocrystals (NCs) in the 2–50 nm size range, using Kelvin probe force microscopy experiments with single charge sensitivity. We show that the charge transfer from doped NCs towards a two-dimensional layer experimentally follows a simple phenomenological law, corresponding to formation of an interface dipole linearly increasing with the NC diameter. This feature leads to analytically predictable junction properties down to quantum size regimes: NC depletion width independent of the NC size and varying as N{sub D}{sup −1/3}, and depleted charge linearly increasing with the NC diameter and varying as N{sub D}{sup 1/3}. We thus establish a “nanocrystal counterpart” of conventional semiconductor planar junctions, here however valid in regimes of strong electrostatic and quantum confinements.

  10. Nanocrystal solids: Order and progress

    NASA Astrophysics Data System (ADS)

    Delerue, Christophe

    2016-05-01

    Quantification of structural disorder and electron localization in superlattices of colloidal nanocrystals shows that minimizing variations in size and epitaxial connections is key to enhance the electronic properties of these materials.

  11. Early stage of nanocrystal growth

    SciTech Connect

    2012-01-01

    Berkeley Lab researchers at the Molecular Foundry have elucidated important mechanisms behind oriented attachment, the phenomenon that drives biomineralization and the growth of nanocrystals. This electron microscopy movie shows the early stage of nanocrystal growth. Nanoparticles make transient contact at many points and orientations until their lattices are perfectly matched. The particles then make a sudden jump-to-contact to form attached aggregates. (Movie courtesy of Jim DeYoreo)

  12. Organic nano-floating-gate transistor memory with metal nanoparticles

    NASA Astrophysics Data System (ADS)

    Van Tho, Luu; Baeg, Kang-Jun; Noh, Yong-Young

    2016-04-01

    Organic non-volatile memory is advanced topics for various soft electronics applications as lightweight, low-cost, flexible, and printable solid-state data storage media. As a key building block, organic field-effect transistors (OFETs) with a nano-floating gate are widely used and promising structures to store digital information stably in a memory cell. Different types of nano-floating-gates and their various synthesis methods have been developed and applied to fabricate nanoparticle-based non-volatile memory devices. In this review, recent advances in the classes of nano-floating-gate OFET memory devices using metal nanoparticles as charge-trapping sites are briefly reviewed. Details of device fabrication, characterization, and operation mechanisms are reported based on recent research activities reported in the literature.

  13. Assemblies of Cellulose Nanocrystals

    NASA Astrophysics Data System (ADS)

    Kumacheva, Eugenia

    The entropically driven coassembly of nanorods (cellulose nanocrystals, CNCs) and different types of nanoparticles (NPs), including dye-labeled latex NPs, carbon dots and plasmonic NPs was experimentally studied in aqueous suspensions and in solid films. In mixed CNC-NP suspensions, phase separation into an isotropic NP-rich and a chiral nematic CNC-rich phase took place; the latter contained a significant amount of NPs. Drying the mixed suspension resulted in CNC-NP films with planar disordered layers of NPs, which alternated with chiral nematic CNC-rich regions. In addition, NPs were embedded in the chiral nematic domains. The stratified morphology of the films, together with a random distribution of NPs in the anisotropic phase, led to the films having close-to-uniform fluorescence, birefringence, and circular dichroism properties.

  14. Mixed semiconductor nanocrystal compositions

    DOEpatents

    Maskaly, Garry R.; Schaller, Richard D.; Klimov, Victor I.

    2011-02-15

    Composition comprising one or more energy donors and one or more energy acceptors, wherein energy is transferred from the energy donor to the energy acceptor and wherein: the energy acceptor is a colloidal nanocrystal having a lower band gap energy than the energy donor; the energy donor and the energy acceptor are separated by a distance of 40 nm or less; wherein the average peak absorption energy of the acceptor is at least 20 meV greater than the average peak emission energy of the energy donor; and wherein the ratio of the number of energy donors to the number of energy acceptors is from about 2:1 to about 1000:1.

  15. Luminescent nanocrystal stress gauge

    PubMed Central

    Choi, Charina L.; Koski, Kristie J.; Olson, Andrew C. K.; Alivisatos, A. Paul

    2010-01-01

    Microscale mechanical forces can determine important outcomes ranging from the site of material fracture to stem cell fate. However, local stresses in a vast majority of systems cannot be measured due to the limitations of current techniques. In this work, we present the design and implementation of the CdSe-CdS core-shell tetrapod nanocrystal, a local stress sensor with bright luminescence readout. We calibrate the tetrapod luminescence response to stress and use the luminescence signal to report the spatial distribution of local stresses in single polyester fibers under uniaxial strain. The bright stress-dependent emission of the tetrapod, its nanoscale size, and its colloidal nature provide a unique tool that may be incorporated into a variety of micromechanical systems including materials and biological samples to quantify local stresses with high spatial resolution. PMID:21098301

  16. Data-Intensive Memory-Map simulator and runtime

    Energy Science and Technology Software Center (ESTSC)

    2012-05-01

    DI-MMAP is a simulator for modeling the performance of next generation non-volatile random access memory technologies (NVRAM) and a high-perfromance memory-map runtime for the Linux operating system. It is implemented as a device driver for the Linux operating system. It will be used by algorithm designers to unserstand the impact of future NVRAM on their algorithms and will be used by application developers for high-performance access to NVRAM storage.

  17. Non-Volatile Ferroelectric Switching of Ferromagnetic Resonance in NiFe/PLZT Multiferroic Thin Film Heterostructures

    PubMed Central

    Hu, Zhongqiang; Wang, Xinjun; Nan, Tianxiang; Zhou, Ziyao; Ma, Beihai; Chen, Xiaoqin; Jones, John G.; Howe, Brandon M.; Brown, Gail J.; Gao, Yuan; Lin, Hwaider; Wang, Zhiguang; Guo, Rongdi; Chen, Shuiyuan; Shi, Xiaoling; Shi, Wei; Sun, Hongzhi; Budil, David; Liu, Ming; Sun, Nian X.

    2016-01-01

    Magnetoelectric effect, arising from the interfacial coupling between magnetic and electrical order parameters, has recently emerged as a robust means to electrically manipulate the magnetic properties in multiferroic heterostructures. Challenge remains as finding an energy efficient way to modify the distinct magnetic states in a reliable, reversible, and non-volatile manner. Here we report ferroelectric switching of ferromagnetic resonance in multiferroic bilayers consisting of ultrathin ferromagnetic NiFe and ferroelectric Pb0.92La0.08Zr0.52Ti0.48O3 (PLZT) films, where the magnetic anisotropy of NiFe can be electrically modified by low voltages. Ferromagnetic resonance measurements confirm that the interfacial charge-mediated magnetoelectric effect is dominant in NiFe/PLZT heterostructures. Non-volatile modification of ferromagnetic resonance field is demonstrated by applying voltage pulses. The ferroelectric switching of magnetic anisotropy exhibits extensive applications in energy-efficient electronic devices such as magnetoelectric random access memories, magnetic field sensors, and tunable radio frequency (RF)/microwave devices. PMID:27581071

  18. An error-resilient non-volatile magneto-elastic universal logic gate with ultralow energy-delay product

    PubMed Central

    Biswas, Ayan K.; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2014-01-01

    A long-standing goal of computer technology is to process and store digital information with the same device in order to implement new architectures. One way to accomplish this is to use nanomagnetic logic gates that can perform Boolean operations and then store the output data in the magnetization states of nanomagnets, thereby doubling as both logic and memory. Unfortunately, many of these nanomagnetic devices do not possess the seven essential characteristics of a Boolean logic gate : concatenability, non-linearity, isolation between input and output, gain, universal logic implementation, scalability and error resilience. More importantly, their energy-delay products and error rates tend to vastly exceed that of conventional transistor-based logic gates, which is unacceptable. Here, we propose a non-volatile voltage-controlled nanomagnetic logic gate that possesses all the necessary characteristics of a logic gate and whose energy-delay product is two orders of magnitude less than that of other nanomagnetic (non-volatile) logic gates. The error rate is also superior. PMID:25532757

  19. Non-Volatile Ferroelectric Switching of Ferromagnetic Resonance in NiFe/PLZT Multiferroic Thin Film Heterostructures.

    PubMed

    Hu, Zhongqiang; Wang, Xinjun; Nan, Tianxiang; Zhou, Ziyao; Ma, Beihai; Chen, Xiaoqin; Jones, John G; Howe, Brandon M; Brown, Gail J; Gao, Yuan; Lin, Hwaider; Wang, Zhiguang; Guo, Rongdi; Chen, Shuiyuan; Shi, Xiaoling; Shi, Wei; Sun, Hongzhi; Budil, David; Liu, Ming; Sun, Nian X

    2016-01-01

    Magnetoelectric effect, arising from the interfacial coupling between magnetic and electrical order parameters, has recently emerged as a robust means to electrically manipulate the magnetic properties in multiferroic heterostructures. Challenge remains as finding an energy efficient way to modify the distinct magnetic states in a reliable, reversible, and non-volatile manner. Here we report ferroelectric switching of ferromagnetic resonance in multiferroic bilayers consisting of ultrathin ferromagnetic NiFe and ferroelectric Pb0.92La0.08Zr0.52Ti0.48O3 (PLZT) films, where the magnetic anisotropy of NiFe can be electrically modified by low voltages. Ferromagnetic resonance measurements confirm that the interfacial charge-mediated magnetoelectric effect is dominant in NiFe/PLZT heterostructures. Non-volatile modification of ferromagnetic resonance field is demonstrated by applying voltage pulses. The ferroelectric switching of magnetic anisotropy exhibits extensive applications in energy-efficient electronic devices such as magnetoelectric random access memories, magnetic field sensors, and tunable radio frequency (RF)/microwave devices. PMID:27581071

  20. An error-resilient non-volatile magneto-elastic universal logic gate with ultralow energy-delay product.

    PubMed

    Biswas, Ayan K; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2014-01-01

    A long-standing goal of computer technology is to process and store digital information with the same device in order to implement new architectures. One way to accomplish this is to use nanomagnetic logic gates that can perform Boolean operations and then store the output data in the magnetization states of nanomagnets, thereby doubling as both logic and memory. Unfortunately, many of these nanomagnetic devices do not possess the seven essential characteristics of a Boolean logic gate : concatenability, non-linearity, isolation between input and output, gain, universal logic implementation, scalability and error resilience. More importantly, their energy-delay products and error rates tend to vastly exceed that of conventional transistor-based logic gates, which is unacceptable. Here, we propose a non-volatile voltage-controlled nanomagnetic logic gate that possesses all the necessary characteristics of a logic gate and whose energy-delay product is two orders of magnitude less than that of other nanomagnetic (non-volatile) logic gates. The error rate is also superior. PMID:25532757

  1. An error-resilient non-volatile magneto-elastic universal logic gate with ultralow energy-delay product

    NASA Astrophysics Data System (ADS)

    Biswas, Ayan K.; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2014-12-01

    A long-standing goal of computer technology is to process and store digital information with the same device in order to implement new architectures. One way to accomplish this is to use nanomagnetic logic gates that can perform Boolean operations and then store the output data in the magnetization states of nanomagnets, thereby doubling as both logic and memory. Unfortunately, many of these nanomagnetic devices do not possess the seven essential characteristics of a Boolean logic gate : concatenability, non-linearity, isolation between input and output, gain, universal logic implementation, scalability and error resilience. More importantly, their energy-delay products and error rates tend to vastly exceed that of conventional transistor-based logic gates, which is unacceptable. Here, we propose a non-volatile voltage-controlled nanomagnetic logic gate that possesses all the necessary characteristics of a logic gate and whose energy-delay product is two orders of magnitude less than that of other nanomagnetic (non-volatile) logic gates. The error rate is also superior.

  2. Measurement of non-volatile particle number size distribution

    NASA Astrophysics Data System (ADS)

    Gkatzelis, G. I.; Papanastasiou, D. K.; Florou, K.; Kaltsonoudis, C.; Louvaris, E.; Pandis, S. N.

    2015-06-01

    An experimental methodology was developed to measure the non-volatile particle number concentration using a thermodenuder (TD). The TD was coupled with a high-resolution time-of-flight aerosol mass spectrometer, measuring the chemical composition and mass size distribution of the submicrometer aerosol and a scanning mobility particle sizer (SMPS) that provided the number size distribution of the aerosol in the range from 10 to 500 nm. The method was evaluated with a set of smog chamber experiments and achieved almost complete evaporation (> 98 %) of secondary organic as well as freshly nucleated particles, using a TD temperature of 400 °C and a centerline residence time of 15 s. This experimental approach was applied in a winter field campaign in Athens and provided a direct measurement of number concentration and size distribution for particles emitted from major pollution sources. During periods in which the contribution of biomass burning sources was dominant, more than 80 % of particle number concentration remained after passing through the thermodenuder, suggesting that nearly all biomass burning particles had a non-volatile core. These remaining particles consisted mostly of black carbon (60 % mass contribution) and organic aerosol, OA (40 %). Organics that had not evaporated through the TD were mostly biomass burning OA (BBOA) and oxygenated OA (OOA) as determined from AMS source apportionment analysis. For periods during which traffic contribution was dominant 50-60 % of the particles had a non-volatile core while the rest evaporated at 400 °C. The remaining particle mass consisted mostly of black carbon (BC) with an 80 % contribution, while OA was responsible for another 15-20 %. Organics were mostly hydrocarbon-like OA (HOA) and OOA. These results suggest that even at 400 °C some fraction of the OA does not evaporate from particles emitted from common combustion processes, such as biomass burning and car engines, indicating that a fraction of this type

  3. FTIR investigation of non-volatile molecular nanoparticles

    NASA Astrophysics Data System (ADS)

    Signorell, R.; Kunzmann, M. K.; Suhm, M. A.

    2000-10-01

    A new approach for the spectroscopic investigation of non-volatile molecular nanoparticles with diameters in the range between 10 and 100 nm is proposed. The nanoparticles are produced in an electrospray with subsequent solvent evaporation. The number size distribution of the generated aerosol is determined with a scanning mobility particle sizer. Fourier transform infrared spectroscopy is used to study the vibrational dynamics of the nanoparticles. As an example, we have investigated sucrose nanoparticles with six different diameters between 36 and 82 nm. From a comparison with different bulk phase spectra, we conclude that sucrose aerosols are formed in a solid amorphous state.

  4. Analysis of Nonvolatile Residue (NVR) from Spacecraft Systems

    NASA Technical Reports Server (NTRS)

    Colony, J. A.

    1985-01-01

    Organic contamination on critical spacecraft surfaces can cause electronic problems, serious attenuation of various optical signals, thermal control changes, and adhesion problems. Such contaminants can be detected early by the controlled use of witness mirrors, witness plates, wipe sampling, or direct solvent extraction. Each method requires careful control of variables of technique and materials to attain the ultimate sensitivities inherent to that procedure. Subsequent chemical analysis of the contaminant sample by infrared and mass spectrometry identifies the components, gives semiquantitative estimates of contaminant thickness, indicates possible sources of the nonvolatile residue (NVR), and provides guidance for effective cleanup procedures.

  5. The nonvolatile metabolome of sunflower linear glandular trichomes.

    PubMed

    Spring, Otmar; Pfannstiel, Jens; Klaiber, Iris; Conrad, Jürgen; Beifuß, Uwe; Apel, Lysanne; Aschenbrenner, Anna-Katharina; Zipper, Reinhard

    2015-11-01

    Uniseriate linear glandular trichomes occur on stems, leaves and flowering parts of Helianthus species and related taxa. Their metabolic activity and biological function are still poorly understood. A phytochemical study documented the accumulation of bisabolene type sesquiterpenes and flavonoids as the major constituents of the non-volatile metabolome of linear glandular trichomes in the common sunflower, Helianthus annuus. Besides known sesquiterpenes of the glandulone, helibisabonol and heliannuol type, four previously undescribed sesquiterpenes named glandulone D, E, F and helibisabonol C were identified by spectroscopic analysis. In addition, four known nevadensin type flavonoids varying in O-methoxy substitutions were found. None of them has previously been reported from Helianthus annuus. PMID:26412774

  6. Radiation Issues and Applications of Floating Gate Memories

    NASA Technical Reports Server (NTRS)

    Scheick, L. Z.; Nguyen, D. N.

    2000-01-01

    The radiation effects that affect various systems that comprise floating gate memories are presented. The wear-out degradation results of unirradiated flash memories are compared to irradiated flash memories. The procedure analyzes the failure to write and erase caused by wear-out and degradation of internal charge pump circuits. A method is described for characterizing the radiation effects of the floating gate itself. The rate dependence, stopping power dependence, SEU susceptibility and applications of floating gate in radiation environment are presented. The ramifications for dosimetry and cell failure are discussed as well as for the long term use aspects of non-volatile memories.

  7. Semiconductor nanocrystal-based phagokinetic tracking

    DOEpatents

    Alivisatos, A Paul; Larabell, Carolyn A; Parak, Wolfgang J; Le Gros, Mark; Boudreau, Rosanne

    2014-11-18

    Methods for determining metabolic properties of living cells through the uptake of semiconductor nanocrystals by cells. Generally the methods require a layer of neutral or hydrophilic semiconductor nanocrystals and a layer of cells seeded onto a culture surface and changes in the layer of semiconductor nanocrystals are detected. The observed changes made to the layer of semiconductor nanocrystals can be correlated to such metabolic properties as metastatic potential, cell motility or migration.

  8. Nanocrystal-polymer solar cells

    NASA Astrophysics Data System (ADS)

    Huynh, Wendy Uyen

    The ability to structure materials on a nanometer dimension enables the processes of solar energy conversion to be optimized at their most fundamental length scale. In semiconducting nanocrystals, optical absorption and electrical transport can be tailored by changing their radius and length, respectively. The unique features of quantum confinement and shape manipulation characteristic for inorganic nanocrystals can be utilized to fabricate solar cells with properties not observed in organic or conventional inorganic solar cells. Furthermore, their solution processibility provides fabrication advantages in the production of low cost, large area, and flexible solar cells. By blending organic conjugated polymers with CdSe nanocrystals efficient thin film solar cells have been constructed. Intimate contact for efficient charge transfer between the polymer and nanocrystal components of the blend was achieved by removing the organic ligands on the surface of the nanocrystal and by using solvent mixtures. Control of the nanocrystal length and therefore the distance on which electrons are transported directly through a thin film device enabled the creation of direct pathways for the transport of electrons. In addition, tuning the band gap by altering the nanocrystal radius as well as using alternate materials such as CdTe the overlap between the absorption spectrum of the cell and the solar emission spectrum could be optimized. A photovoltaic device consisting of 7nm by 60nm CdSe nanorods and the conjugated polymer poly-3(hexylthiophene) was assembled from solution with an external quantum efficiency of over 54% and a monochromatic power conversion efficiency of up to 7% under illumination at low light intensity. Under AM 1.5 Global solar conditions, we obtained a power conversion efficiency of 1.7%.

  9. Flexible Hybrid Organic-Inorganic Perovskite Memory.

    PubMed

    Gu, Chungwan; Lee, Jang-Sik

    2016-05-24

    Active research has been done on hybrid organic-inorganic perovskite materials for application to solar cells with high power conversion efficiency. However, this material often shows hysteresis, which is undesirable, shift in the current-voltage curve. The hysteresis may come from formation of defects and their movement in perovskite materials. Here, we utilize the defects in perovskite materials to be used in memory operations. We demonstrate flexible nonvolatile memory devices based on hybrid organic-inorganic perovskite as the resistive switching layer on a plastic substrate. A uniform perovskite layer is formed on a transparent electrode-coated plastic substrate by solvent engineering. Flexible nonvolatile memory based on the perovskite layer shows reproducible and reliable memory characteristics in terms of program/erase operations, data retention, and endurance properties. The memory devices also show good mechanical flexibility. It is suggested that resistive switching is done by migration of vacancy defects and formation of conducting filaments under the electric field in the perovskite layer. It is believed that organic-inorganic perovskite materials have great potential to be used in high-performance, flexible memory devices. PMID:27093096

  10. Enhanced non-volatile resistive switching in suspended single-crystalline ZnO nanowire with controllable multiple states

    NASA Astrophysics Data System (ADS)

    Zhang, Rui; Pang, Wei; Zhang, Qing; Chen, Yan; Chen, Xuejiao; Feng, Zhihong; Yang, Jianhua; Zhang, Daihua

    2016-08-01

    Resistive switching nanostructures are a promising candidate for next-generation non-volatile memories. In this report, we investigate the switching behaviors of single-crystalline ZnO nanowires suspended in air. They exhibit significantly higher current density, lower switching voltage, and more pronounced multiple conductance states compared to nanowires in direct contact with substrate. We attribute the effect to enhanced Joule heating efficiency, reduced surface scattering, and more significantly, the positive feedback established between the current density and local temperature in the suspended nanowires. The proposed mechanism has been quantitatively examined by finite element simulations. We have also demonstrated an innovative approach to initiating the current–temperature mutual enhancement through illumination by ultraviolet light, which further confirmed our hypothesis and enabled even greater enhancement. Our work provides further insight into the resistive switching mechanism of single-crystalline one-dimensional nanostructures, and suggests an effective means of performance enhancement and device optimization.

  11. LastingNVCache: A Technique for Improving the Lifetime of Non-volatile Caches

    SciTech Connect

    Mittal, Sparsh; Vetter, Jeffrey S; Li, Dong

    2014-01-01

    Use of NVM (Non-volatile memory) devices such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches holds the promise of providing a high-density, low-leakage alternative to SRAM. However, low write endurance of NVMs, along with the write-variation introduced by existing cache management schemes may significantly limit the lifetime of NVM caches. We present LastingNVCache, a technique for improving lifetime of NVM caches by mitigating the intra-set write variation. LastingNVCache works on the key idea that by periodically flushing a frequently-written data-item, the next time the block can be made to load into a cold block in the set. Through this, the future writes to that data-item can be redirected from a hot block to a cold block, which leads to improvement in the cache lifetime. Microarchitectural simulations have shown that LastingNVCache provides 6.36X, 9.79X, and 10.94X improvement in lifetime for single, dual and quad-core systems. Also, its implementation overhead is small and it outperforms a recently proposed technique for improving lifetime of NVM caches.

  12. Non-volatile resistive photo-switches for flexible image detector arrays

    NASA Astrophysics Data System (ADS)

    Nau, Sebastian; Wolf, Christoph; Sax, Stefan; List-Kratochvil, Emil J. W.

    2015-09-01

    The increasing quest to find lightweight, conformable or flexible image detectors for machine vision or medical imaging brings organic electronics into the spotlight for these fields of application. Here were we introduce a unique imaging device concept and its utilization in an organic, flexible detector array with simple passive matrix wiring. We present a flexible organic image detector array built up from non-volatile resistive multi-bit photo-switchable elements. This unique realization is based on an organic photodiode combined with an organic resistive memory device wired in a simple crossbar configuration. The presented concept exhibits significant advantages compared to present organic and inorganic detector array technologies, facilitating the detection and simultaneous storage of the image information in one detector pixel, yet also allowing for simple read-out of the information from a simple passive-matrix crossbar wiring. This concept is demonstrated for single photo-switchable pixels as well as for arrays with sizes up to 32 by 32 pixels (1024 bit). The presented results pave the way for a versatile flexible and easy-to-fabricate sensor array technology. In a final step, the concept was expanded to detection of x-rays.

  13. Inkjet-printing of non-volatile organic resistive devices and crossbar array structures

    NASA Astrophysics Data System (ADS)

    Sax, Stefan; Nau, Sebastian; Popovic, Karl; Bluemel, Alexander; Klug, Andreas; List-Kratochvil, Emil J. W.

    2015-09-01

    Due to the increasing demand for storage capacity in various electronic gadgets like mobile phones or tablets, new types of non-volatile memory devices have gained a lot of attention over the last few years. Especially multilevel conductance switching elements based on organic semiconductors are of great interest due to their relatively simple device architecture and their small feature size. Since organic semiconductors combine the electronic properties of inorganic materials with the mechanical characteristics of polymers, this class of materials is suitable for solution based large area device preparation techniques. Consequently, inkjet based deposition techniques are highly capable of facing preparation related challenges. By gradually replacing the evaporated electrodes with inkjet printed silver, the preparation related influence onto device performance parameters such as the ON/OFF ratio was investigated with IV measurements and high resolution transmission electron microscopy. Due to the electrode surface roughness the solvent load during the printing of the top electrode as well as organic layer inhomogeneity's the utilization in array applications is hampered. As a prototypical example a 1diode-1resistor element and a 2×2 subarray from 5×5 array matrix were fully characterized demonstrating the versatility of inkjet printing for device preparation.

  14. Linearly arranged polytypic CZTSSe nanocrystals

    PubMed Central

    Fan, Feng-Jia; Wu, Liang; Gong, Ming; Chen, Shi You; Liu, Guang Yao; Yao, Hong-Bin; Liang, Hai-Wei; Wang, Yi-Xiu; Yu, Shu-Hong

    2012-01-01

    Even colloidal polytypic nanostructures show promising future in band-gap tuning and alignment, researches on them have been much less reported than the standard nano-heterostructures because of the difficulties involved in synthesis. Up to now, controlled synthesis of colloidal polytypic nanocrsytals has been only realized in II-VI tetrapod and octopod nanocrystals with branched configurations. Herein, we report a colloidal approach for synthesizing non-branched but linearly arranged polytypic I2-II-IV-VI4 nanocrystals, with a focus on polytypic non-stoichiometric Cu2ZnSnSxSe4−x nanocrystals. Each synthesized polytypic non-stoichiometric Cu2ZnSnSxSe4−x nanocrystal is consisted of two zinc blende-derived ends and one wurtzite-derived center part. The formation mechanism has been studied and the phase composition can be tuned through adjusting the reaction temperature, which brings a new band-gap tuning approach to Cu2ZnSnSxSe4-x nanocrystals. PMID:23233871

  15. Vapor condensation onto a non-volatile liquid drop

    SciTech Connect

    Inci, Levent; Bowles, Richard K.

    2013-12-07

    Molecular dynamics simulations of miscible and partially miscible binary Lennard–Jones mixtures are used to study the dynamics and thermodynamics of vapor condensation onto a non-volatile liquid drop in the canonical ensemble. When the system volume is large, the driving force for condensation is low and only a submonolayer of the solvent is adsorbed onto the liquid drop. A small degree of mixing of the solvent phase into the core of the particles occurs for the miscible system. At smaller volumes, complete film formation is observed and the dynamics of film growth are dominated by cluster-cluster coalescence. Mixing into the core of the droplet is also observed for partially miscible systems below an onset volume suggesting the presence of a solubility transition. We also develop a non-volatile liquid drop model, based on the capillarity approximations, that exhibits a solubility transition between small and large drops for partially miscible mixtures and has a hysteresis loop similar to the one observed in the deliquescence of small soluble salt particles. The properties of the model are compared to our simulation results and the model is used to study the formulation of classical nucleation theory for systems with low free energy barriers.

  16. Ferroelastic switching for nanoscale non-volatile magnetoelectric devices

    SciTech Connect

    Baek, S. H.; Jang, H. W.; Folkman, C. M.; Li, Yulan; Winchester, B.; Zhang, J. X.; He, Q.; Chu, Y. H.; Nelson, C. T.; Rzchowski, M. S.; Pan, X. Q.; Ramesh, R.; Chen , L.Q.; Eom, C.B.

    2010-04-01

    Multiferroics, where (anti-) ferromagnetic, ferroelectric, and ferroelastic order parameters coexist [1-5], enables manipulation of magnetic ordering by electric field through switching of the electric polarization [6-9]. It has been shown that realization of magnetoelectric coupling in single-phase multiferroic such as BiFeO3 requires ferroelastic (71o, 109o) rather than ferroelectric (180o) domain switching [6]. However, the control of such ferroleastic switching in a singlephase system has been a significant challenge as elastic interactions tend to destabilize small switched volumes, resulting in subsequent ferroelastic backswitching at zero electric field, thus disappearance of nonvolatile information storage [10, 11]. Guided by our phase-field simulations, we here report an approach to stabilize ferroelastic switching by eliminating the stress-induced instability responsible for back-switching using isolated monodomain BiFeO3islands. This work demonstrates a critical step to control and utilize nonvolatile magnetoelectric coupling at the nanoscale. Beyond magnetoelectric coupling, it provides a framework for exploring a route to control multiple order parameters coupled to ferroelastic order in other low-symmetry materials.

  17. Phase transformation controlled tetragonality of MnNi-based nanocrystals

    NASA Astrophysics Data System (ADS)

    Shen, Jian; Dai, Qilin; Ren, Shenqiang

    2016-03-01

    The phase transformation controlled tetragonality of MnNi nanostructures has attracted wide interest for their shape memory effect. In this study, MnNi nanocrystals were selected to epitaxially grow an FeCo shell, where the antiferromagnetic L10 phase transformation of the MnNi core triggers the tetragonal distortion in the magnetically soft FeCo shell. The tetragonality change of L10 MnNi under thermal annealing enables the control of the tetragonality of the FeCo phase, ultimately increasing magnetocrystalline anisotropy and coercivity. This study opens up a new route to fabricate functional nanostructures with unique magnetic properties.

  18. Nanocrystal targeting in vivo

    NASA Astrophysics Data System (ADS)

    Åkerman, Maria E.; Chan, Warren C. W.; Laakkonen, Pirjo; Bhatia, Sangeeta N.; Ruoslahti, Erkki

    2002-10-01

    Inorganic nanostructures that interface with biological systems have recently attracted widespread interest in biology and medicine. Nanoparticles are thought to have potential as novel intravascular probes for both diagnostic (e.g., imaging) and therapeutic purposes (e.g., drug delivery). Critical issues for successful nanoparticle delivery include the ability to target specific tissues and cell types and escape from the biological particulate filter known as the reticuloendothelial system. We set out to explore the feasibility of in vivo targeting by using semiconductor quantum dots (qdots). Qdots are small (<10 nm) inorganic nanocrystals that possess unique luminescent properties; their fluorescence emission is stable and tuned by varying the particle size or composition. We show that ZnS-capped CdSe qdots coated with a lung-targeting peptide accumulate in the lungs of mice after i.v. injection, whereas two other peptides specifically direct qdots to blood vessels or lymphatic vessels in tumors. We also show that adding polyethylene glycol to the qdot coating prevents nonselective accumulation of qdots in reticuloendothelial tissues. These results encourage the construction of more complex nanostructures with capabilities such as disease sensing and drug delivery.

  19. Nanocrystal powered nanomotor

    DOEpatents

    Regan, Brian C.; Zettl, Alexander K.; Aloni, Shaul

    2011-01-04

    A nanoscale nanocrystal which may be used as a reciprocating motor is provided, comprising a substrate having an energy differential across it, e.g. an electrical connection to a voltage source at a proximal end; an atom reservoir on the substrate distal to the electrical connection; a nanoparticle ram on the substrate distal to the atom reservoir; a nanolever contacting the nanoparticle ram and having an electrical connection to a voltage source, whereby a voltage applied between the electrical connections on the substrate and the nanolever causes movement of atoms between the reservoir and the ram. Movement of the ram causes movement of the nanolever relative to the substrate. The substrate and nanolever preferably comprise multiwalled carbon nanotubes (MWNTs) and the atom reservoir and nanoparticle ram are preferably metal (e.g. indium) deposited as small particles on the MWNTs. The substrate may comprise a silicon chip that has been fabricated to provide the necessary electrodes and other electromechanical structures, and further supports an atomic track, which may comprise an MWNT.

  20. Nanocrystal assembly for tandem catalysis

    DOEpatents

    Yang, Peidong; Somorjai, Gabor; Yamada, Yusuke; Tsung, Chia-Kuang; Huang, Wenyu

    2014-10-14

    The present invention provides a nanocrystal tandem catalyst comprising at least two metal-metal oxide interfaces for the catalysis of sequential reactions. One embodiment utilizes a nanocrystal bilayer structure formed by assembling sub-10 nm platinum and cerium oxide nanocube monolayers on a silica substrate. The two distinct metal-metal oxide interfaces, CeO.sub.2--Pt and Pt--SiO.sub.2, can be used to catalyze two distinct sequential reactions. The CeO.sub.2--Pt interface catalyzed methanol decomposition to produce CO and H.sub.2, which were then subsequently used for ethylene hydroformylation catalyzed by the nearby Pt--SiO.sub.2 interface. Consequently, propanal was selectively produced on this nanocrystal bilayer tandem catalyst.

  1. Optical Properties of Semiconductor Nanocrystals

    NASA Astrophysics Data System (ADS)

    Gaponenko, S. V.

    1998-10-01

    Low-dimensional semiconductor structures, often referred to as nanocrystals or quantum dots, exhibit fascinating behavior and have a multitude of potential applications, especially in the field of communications. This book examines in detail the optical properties of these structures, gives full coverage of theoretical and experimental results, and discusses their technological applications. The author begins by setting out the basic physics of electron states in crystals (adopting a "cluster-to-crystal" approach), and goes on to discuss the growth of nanocrystals, absorption and emission of light by nanocrystals, optical nonlinearities, interface effects, and photonic crystals. He illustrates the physical principles with references to actual devices such as novel light-emitters and optical switches. The book covers a rapidly developing, interdisciplinary field. It will be of great interest to graduate students of photonics or microelectronics, and to researchers in electrical engineering, physics, chemistry, and materials science.

  2. Towards Terabit Memories

    NASA Astrophysics Data System (ADS)

    Hoefflinger, Bernd

    Memories have been the major yardstick for the continuing validity of Moore's law. In single-transistor-per-Bit dynamic random-access memories (DRAM), the number of bits per chip pretty much gives us the number of transistors. For decades, DRAM's have offered the largest storage capacity per chip. However, DRAM does not scale any longer, both in density and voltage, severely limiting its power efficiency to 10 fJ/b. A differential DRAM would gain four-times in density and eight-times in energy. Static CMOS RAM (SRAM) with its six transistors/cell is gaining in reputation because it scales well in cell size and operating voltage so that its fundamental advantage of speed, non-destructive read-out and low-power standby could lead to just 2.5 electrons/bit in standby and to a dynamic power efficiency of 2aJ/b. With a projected 2020 density of 16 Gb/cm², the SRAM would be as dense as normal DRAM and vastly better in power efficiency, which would mean a major change in the architecture and market scenario for DRAM versus SRAM. Non-volatile Flash memory have seen two quantum jumps in density well beyond the roadmap: Multi-Bit storage per transistor and high-density TSV (through-silicon via) technology. The number of electrons required per Bit on the storage gate has been reduced since their first realization in 1996 by more than an order of magnitude to 400 electrons/Bit in 2010 for a complexity of 32Gbit per chip at the 32 nm node. Chip stacking of eight chips with TSV has produced a 32GByte solid-state drive (SSD). A stack of 32 chips with 2 b/cell at the 16 nm node will reach a density of 2.5 Terabit/cm². Non-volatile memory with a density of 10 × 10 nm²/Bit is the target for widespread development. Phase-change memory (PCM) and resistive memory (RRAM) lead in cell density, and they will reach 20 Gb/cm² in 2D and higher with 3D chip stacking. This is still almost an order-of-magnitude less than Flash. However, their read-out speed is ~10-times faster, with as yet

  3. Injected nanocrystals for targeted drug delivery

    PubMed Central

    Lu, Yi; Li, Ye; Wu, Wei

    2016-01-01

    Nanocrystals are pure drug crystals with sizes in the nanometer range. Due to the advantages of high drug loading, platform stability, and ease of scaling-up, nanocrystals have been widely used to deliver poorly water-soluble drugs. Nanocrystals in the blood stream can be recognized and sequestered as exogenous materials by mononuclear phagocytic system (MPS) cells, leading to passive accumulation in MPS-rich organs, such as liver, spleen and lung. Particle size, morphology and surface modification affect the biodistribution of nanocrystals. Ligand conjugation and stimuli-responsive polymers can also be used to target nanocrystals to specific pathogenic sites. In this review, the progress on injected nanocrystals for targeted drug delivery is discussed following a brief introduction to nanocrystal preparation methods, i.e., top-down and bottom-up technologies. PMID:27006893

  4. Application of the ferroelectric materials to ULSI memories

    NASA Astrophysics Data System (ADS)

    Tarui, Yasuo; Hirai, Tadahiko; Teramoto, Kazuhiro; Koike, Hiroshi; Nagashima, Kazuhito

    1997-04-01

    Memory is essential to electronic data processing and continuous efforts are being made to develop improved memory devices. In the era of VLSI, difficulties have arisen with respect to storage capacitance, which must be kept to a certain value while the device dimensions are reduced. This has prompted the adoption of complicated structures like the trench or stack, causing the number of process steps to be increased. The use of high dielectric constant materials has been researched for the extension of DRAM development. Recently, the development of the memories which use the polarization reversal current of the ferroelectric material is rapidly progressing because it enables high speed nonvolatile memory action which generally needed in recent electronic systems. These memories will replace a large portion of the existing memory systems in the near future. However, this is not a perfect solution to the problem, because they are not in accordance with the scaling rule. In this paper, it is shown that ferroelectric memories using the field effect current of a semiconductor by the remanent polarization of the ferroelectric material are in accordance with the scaling rule. The first experimental verification of the non-volatile memory action was reported by Moll and Tarui in 1963 [1]. This basic memory action has been successively used in MFS (metal-ferroelectric-semiconductor) transistors. The ferroelectric memories are nonvolatile and are expected to be high-speed devices, making them suitable for universal applications. However, it is necessary to optimize the interface between the semiconductor and ferroelectric material. Experiments for the prospective devices using CeO 2 or Ce xZr (1- x) O 2 as the buffer insulator layers of the MFIS (metal-ferroelectric-insulator-semiconductor) transistors are described.

  5. Semiconductor Nanocrystals for Biological Imaging

    SciTech Connect

    Fu, Aihua; Gu, Weiwei; Larabell, Carolyn; Alivisatos, A. Paul

    2005-06-28

    Conventional organic fluorophores suffer from poor photo stability, narrow absorption spectra and broad emission feature. Semiconductor nanocrystals, on the other hand, are highly photo-stable with broad absorption spectra and narrow size-tunable emission spectra. Recent advances in the synthesis of these materials have resulted in bright, sensitive, extremely photo-stable and biocompatible semiconductor fluorophores. Commercial availability facilitates their application in a variety of unprecedented biological experiments, including multiplexed cellular imaging, long-term in vitro and in vivo labeling, deep tissue structure mapping and single particle investigation of dynamic cellular processes. Semiconductor nanocrystals are one of the first examples of nanotechnology enabling a new class of biomedical applications.

  6. Oxygenated amorphous carbon for resistive memory applications

    NASA Astrophysics Data System (ADS)

    Santini, Claudia A.; Sebastian, Abu; Marchiori, Chiara; Jonnalagadda, Vara Prasad; Dellmann, Laurent; Koelmans, Wabe W.; Rossell, Marta D.; Rossel, Christophe P.; Eleftheriou, Evangelos

    2015-10-01

    Carbon-based electronics is a promising alternative to traditional silicon-based electronics as it could enable faster, smaller and cheaper transistors, interconnects and memory devices. However, the development of carbon-based memory devices has been hampered either by the complex fabrication methods of crystalline carbon allotropes or by poor performance. Here we present an oxygenated amorphous carbon (a-COx) produced by physical vapour deposition that has several properties in common with graphite oxide. Moreover, its simple fabrication method ensures excellent reproducibility and tuning of its properties. Memory devices based on a-COx exhibit outstanding non-volatile resistive memory performance, such as switching times on the order of 10 ns and cycling endurance in excess of 104 times. A detailed investigation of the pristine, SET and RESET states indicates a switching mechanism based on the electrochemical redox reaction of carbon. These results suggest that a-COx could play a key role in non-volatile memory technology and carbon-based electronics.

  7. Ferroelectric random access memories.

    PubMed

    Ishiwara, Hiroshi

    2012-10-01

    Ferroelectric random access memory (FeRAM) is a nonvolatile memory, in which data are stored using hysteretic P-E (polarization vs. electric field) characteristics in a ferroelectric film. In this review, history and characteristics of FeRAMs are first introduced. It is described that there are two types of FeRAMs, capacitor-type and FET-type, and that only the capacitor-type FeRAM is now commercially available. In chapter 2, properties of ferroelectric films are discussed from a viewpoint of FeRAM application, in which particular attention is paid to those of Pb(Zr,Ti)O3, SrBi2Ta2O9, and BiFeO3. Then, cell structures and operation principle of the capacitor-type FeRAMs are discussed in chapter 3. It is described that the stacked technology of ferroelectric capacitors and development of new materials with large remanent polarization are important for fabricating high-density memories. Finally, in chapter 4, the optimized gate structure in ferroelectric-gate field-effect transistors is discussed and experimental results showing excellent data retention characteristics are presented. PMID:23421123

  8. Photorefractive materials for nonvolatile volume holographic data storage

    PubMed

    Hesselink; Orlov; Liu; Akella; Lande; Neurgaonkar

    1998-11-01

    Optically gated recording and nonvolatile readout in a digital volume holographic data storage system that uses a pair of mutually incoherent light sources during recording and only one for readout were demonstrated recently. This approach used stoichiometric lithium niobate, which after post-growth processing gave rise to an at least two orders of magnitude improvement in sensitivity over the best materials reported previously. It is also shown that by adding certain dopants (iron and manganese) to near-stoichiometric lithium niobate, the dark storage time and gating efficiency can be increased compared with previous work. The underlying physical mechanisms of gated recording and the effectiveness of the gating process responsible for this manifold improved performance are discussed, and bipolarons and small polarons are identified as the responsible photorefractive species. PMID:9804540

  9. Characterization of Monomethyihydrazine (MMH) Non-Volatile Residue

    NASA Technical Reports Server (NTRS)

    Davis, Chuck; Howard, Philip M.

    2009-01-01

    The Space Shuttle program has a unique propellant purity requirement for determination of nonvolatile residue (NVR) in monomethylhydrazine (MMH). TIis requirement differs from the Military Specification procurement specification by requiring a NVR analysis with a limit of less than or equal to 10 milligrams per liter. In June 2008, a routine MMH replenishment delivery was transferred into a NASA KSC owned tanker for future delivery to the Space Shuffle pad MMH storage tank. Per Shuffle standard operating procedure, the receiving tanker was sampled and analyzed for purity and surprisingly it failed the Shuttle use NVR specification limit. Detailed examination of the NVR revealed that it was fundamentally different than the typical MMH NVR. This paper will examine various aspects of NVR determination in MMH and the analytical characterization processes used to identify the NVR.

  10. Non-volatile polarization switch of magnetic domain wall velocity

    SciTech Connect

    Huang, Z.; Stolichnov, I.; Setter, N.; Bernand-Mantel, A.; Schott, Marine; Pizzini, S.; Ranno, L.; Auffret, S.; Gaudin, G.

    2015-12-21

    Controlled propagation speed of individual magnetic domains in metal channels at the room temperature is obtained via the non-volatile field effect associated with the switchable polarization of P(VDF-TrFE) (polyvinylidene fluoride-trifluoroethylene) ferroelectric polymer. Polarization domains directly written using conducting atomic force microscope probe locally accelerate/decelerate the magnetic domains in the 0.6 nm thick Co film. The change of the magnetic domain wall velocity is consistent with the magnetic anisotropy energy modulation through the polarization upward/downward orientation. Excellent retention is observed. The demonstrated local non-destructive and reversible change of magnetic properties via rewritable patterning of ferroelectric domains could be attractive for exploring the ultimate limit of miniaturization in devices based on ferromagnetic/ferroelectric bilayers.

  11. Reconfigurable and non-volatile vertical magnetic logic gates

    SciTech Connect

    Butler, J. Lee, B.; Shachar, M.; Garcia, D.; Hu, B.; Hong, J.; Amos, N.; Khizroev, S.

    2014-04-28

    In this paper, we discuss the concept and prototype fabrication of reconfigurable and non-volatile vertical magnetic logic gates. These gates consist of two input layers and a RESET layer. The RESET layer allows the structure to be used as either an AND or an OR gate, depending on its magnetization state. To prove this concept, the gates were fabricated using a multi-layered patterned magnetic media, in which three magnetic layers are stacked and exchange-decoupled via non-magnetic interlayers. We demonstrate the functionality of these logic gates by conducting atomic force microscopy and magnetic force microscopy (MFM) analysis of the multi-layered patterned magnetic media. The logic gates operation mechanism and fabrication feasibility are both validated by the MFM imaging results.

  12. Nanographene charge trapping memory with a large memory window

    NASA Astrophysics Data System (ADS)

    Meng, Jianling; Yang, Rong; Zhao, Jing; He, Congli; Wang, Guole; Shi, Dongxia; Zhang, Guangyu

    2015-11-01

    Nanographene is a promising alternative to metal nanoparticles or semiconductor nanocrystals for charge trapping memory. In general, a high density of nanographene is required in order to achieve high charge trapping capacity. Here, we demonstrate a strategy of fabrication for a high density of nanographene for charge trapping memory with a large memory window. The fabrication includes two steps: (1) direct growth of continuous nanographene film; and (2) isolation of the as-grown film into high-density nanographene by plasma etching. Compared with directly grown isolated nanographene islands, abundant defects and edges are formed in nanographene under argon or oxygen plasma etching, i.e. more isolated nanographene islands are obtained, which provides more charge trapping sites. As-fabricated nanographene charge trapping memory shows outstanding memory properties with a memory window as wide as ∼9 V at a relative low sweep voltage of ±8 V, program/erase speed of ∼1 ms and robust endurance of >1000 cycles. The high-density nanographene charge trapping memory provides an outstanding alternative for downscaling technology beyond the current flash memory.

  13. Nanographene charge trapping memory with a large memory window.

    PubMed

    Meng, Jianling; Yang, Rong; Zhao, Jing; He, Congli; Wang, Guole; Shi, Dongxia; Zhang, Guangyu

    2015-11-13

    Nanographene is a promising alternative to metal nanoparticles or semiconductor nanocrystals for charge trapping memory. In general, a high density of nanographene is required in order to achieve high charge trapping capacity. Here, we demonstrate a strategy of fabrication for a high density of nanographene for charge trapping memory with a large memory window. The fabrication includes two steps: (1) direct growth of continuous nanographene film; and (2) isolation of the as-grown film into high-density nanographene by plasma etching. Compared with directly grown isolated nanographene islands, abundant defects and edges are formed in nanographene under argon or oxygen plasma etching, i.e. more isolated nanographene islands are obtained, which provides more charge trapping sites. As-fabricated nanographene charge trapping memory shows outstanding memory properties with a memory window as wide as ∼9 V at a relative low sweep voltage of ±8 V, program/erase speed of ∼1 ms and robust endurance of >1000 cycles. The high-density nanographene charge trapping memory provides an outstanding alternative for downscaling technology beyond the current flash memory. PMID:26489448

  14. Reduction of metastasis using a non-volatile buffer.

    PubMed

    Ibrahim Hashim, Arig; Cornnell, Heather H; Coelho Ribeiro, Maria de Lourdes; Abrahams, Dominique; Cunningham, Jessica; Lloyd, Mark; Martinez, Gary V; Gatenby, Robert A; Gillies, Robert J

    2011-12-01

    The tumor microenvironment is acidic as a consequence of upregulated glycolysis and poor perfusion and this acidity, in turn, promotes invasion and metastasis. We have recently demonstrated that chronic consumption of sodium bicarbonate increased tumor pH and reduced spontaneous and experimental metastases. This occurred without affecting systemic pH, which was compensated. Additionally, these prior data did not rule out the possibility that bicarbonate was working though effects on carbonic anhydrase, and not as a buffer per se. Here, we present evidence that chronic ingestion of a non-volatile buffer, 2-imidazole-1-yl-3-ethoxycarbonylpropionic acid (IEPA) with a pK (a) of 6.9 also reduced metastasis in an experimental PC3M prostate cancer mouse model. Animals (n = 30) were injected with luciferase expressing PC3M prostate cancer cells either subcutaneously (s.c., n = 10) or intravenously (i.v., n = 20). Four days prior to inoculations, half of the animals for each experiment were provided drinking water containing 200 mM IEPA buffer. Animals were imaged weekly to follow metastasis, and these data showed that animals treated with IEPA had significantly fewer experimental lung metastasis compared to control groups (P < 0.04). Consistent with prior work, the pH of treated tumors was elevated compared to controls. IEPA is observable by in vivo magnetic resonance spectroscopy and this was used to measure the presence of IEPA in the bladder, confirming that it was orally available. The results of this study indicate that metastasis can be reduced by non-volatile buffers as well as bicarbonate and thus the effect appears to be due to pH buffering per se. PMID:21861189

  15. "Nanocrystal bilayer for tandem catalysis"

    SciTech Connect

    Yamada, Yusuke; Tsung, Chia Kuang; Huang, Wenyu; Huo, Ziyang; E.Habas, Susan E; Soejima, Tetsuro; Aliaga, Cesar E; Samorjai, Gabor A; Yang, Peidong

    2011-01-24

    Supported catalysts are widely used in industry and can be optimized by tuning the composition and interface of the metal nanoparticles and oxide supports. Rational design of metal-metal oxide interfaces in nanostructured catalysts is critical to achieve better reaction activities and selectivities. We introduce here a new class of nanocrystal tandem catalysts that have multiple metal-metal oxide interfaces for the catalysis of sequential reactions. We utilized a nanocrystal bilayer structure formed by assembling platinum and cerium oxide nanocube monolayers of less than 10 nm on a silica substrate. The two distinct metal-metal oxide interfaces, CeO2-Pt and Pt-SiO2, can be used to catalyse two distinct sequential reactions. The CeO2-Pt interface catalysed methanol decomposition to produce CO and H2, which were subsequently used for ethylene hydroformylation catalysed by the nearby Pt-SiO2 interface. Consequently, propanal was produced selectively from methanol and ethylene on the nanocrystal bilayer tandem catalyst. This new concept of nanocrystal tandem catalysis represents a powerful approach towards designing high-performance, multifunctional nanostructured catalysts

  16. Nanocrystals Research for Energy Efficient and Clean Energy Technologies:

    SciTech Connect

    Rosenthal, Sandra J

    2013-12-17

    Efforts centered on: nanocrystal photovoltaic fabrication, ultrafast dynamics and aberration-corrected STEM characterization of II-VI core, core/shell and alloyed nanocrystals, and fundamental investigation and applications of ultrasmall white light-emitting CdSe nanocrystal.

  17. Electrospinnability of bionanocomposites with high nanocrystal loadings: The effect of nanocrystal surface characteristics.

    PubMed

    Naseri, Narges; Mathew, Aji P; Oksman, Kristiina

    2016-08-20

    This paper deals with the effect of solution properties and nanoparticle surface chemistry on the spinnability of a chitosan/polyethylene oxide (PEO) with high concentration (50wt%) of chitin and cellulose nanocrystals and the properties of the resultant nanocomposite fibers/fiber mats. Electrospinning dispersions with cellulose nanocrystals having sulphate surface groups showed poor spinnability compared to chitin nanocrystals with amide and amino groups. Chitin nanocrystal based dispersions showed good spinnability and continuous fiber formation whereas cellulose nanocrystal system showed discontinuous fibers and branching. The viscosity and surface tension are shown to impact this behavior, but conductivity did not. Poor spinnability observed for cellulose nanocrystal based fibers was attributed to the coagulation of negatively charged cellulose nanocrystals and positively charged chitosan. The study showed that the nanocrystal surface charge and interactions with the chitosan/PEO matrix have a significant impact on the spinnability of bionanocomposites. PMID:27178953

  18. Area-efficient nonvolatile carry chain based on pass-transistor/atom-switch hybrid logic

    NASA Astrophysics Data System (ADS)

    Bai, Xu; Tsuji, Yukihide; Sakamoto, Toshitsugu; Morioka, Ayuka; Miyamura, Makoto; Tada, Munehiro; Banno, Naoki; Okamoto, Koichiro; Iguchi, Noriyuki; Hada, Hiromitsu

    2016-04-01

    For the first time, an area-efficient nonvolatile carry chain combining look-up tables and a pass-transistor-logic-based adder is newly developed using complementary atom switches without additional CMOS circuits. A proposed tristate switch composed of three pairs of complementary atom switches selects one of “0”, “1”, and the “carry_in” signal as the input of a common multiplexer for both a look-up table and an adder. The developed nonvolatile carry chain achieves the reductions of 20% area, 17% delay, and 17% power consumption, respectively, in comparison with a conventional nonvolatile carry chain using dedicated CMOS gates.

  19. Memory functions of magnetic skyrmions

    NASA Astrophysics Data System (ADS)

    Koshibae, Wataru; Kaneko, Yoshio; Iwasaki, Junichi; Kawasaki, Masashi; Tokura, Yoshinori; Nagaosa, Naoto

    2015-05-01

    We study, by microsimulation on the chiral magnets, the elementary functions of magnetic skyrmions and the design principles of skyrmionic memory devices. The external stimuli, such as local heating, magnetic field, electric field and electric current, trigger the creation and annihilation of the skyrmion. These procedures, corresponding to the writing and erasing operations, are achieved typically within of the order of nano or pico seconds. We also examine the current driven motion of the skyrmions and find that the gyro-dynamics, which is induced by the topological nature of the skyrmion, leads to the variety of useful functions including the remarkable enhancement of the spin-transfer-torque effect. These features are shown to be advantageous for (a) high-density data-storage, (b) nonvolatile memory, and (c) ultra-low current and energy cost manipulation.

  20. Cellulose nanocrystals: synthesis, functional properties, and applications.

    PubMed

    George, Johnsy; Sabapathi, S N

    2015-01-01

    Cellulose nanocrystals are unique nanomaterials derived from the most abundant and almost inexhaustible natural polymer, cellulose. These nanomaterials have received significant interest due to their mechanical, optical, chemical, and rheological properties. Cellulose nanocrystals primarily obtained from naturally occurring cellulose fibers are biodegradable and renewable in nature and hence they serve as a sustainable and environmentally friendly material for most applications. These nanocrystals are basically hydrophilic in nature; however, they can be surface functionalized to meet various challenging requirements, such as the development of high-performance nanocomposites, using hydrophobic polymer matrices. Considering the ever-increasing interdisciplinary research being carried out on cellulose nanocrystals, this review aims to collate the knowledge available about the sources, chemical structure, and physical and chemical isolation procedures, as well as describes the mechanical, optical, and rheological properties, of cellulose nanocrystals. Innovative applications in diverse fields such as biomedical engineering, material sciences, electronics, catalysis, etc, wherein these cellulose nanocrystals can be used, are highlighted. PMID:26604715

  1. Phase transitions and doping in semiconductor nanocrystals

    NASA Astrophysics Data System (ADS)

    Sahu, Ayaskanta

    Colloidal semiconductor nanocrystals are a promising technological material because their size-dependent optical and electronic properties can be exploited for a diverse range of applications such as light-emitting diodes, bio-labels, transistors, and solar cells. For many of these applications, electrical current needs to be transported through the devices. However, while their solution processability makes these colloidal nanocrystals attractive candidates for device applications, the bulky surfactants that render these nanocrystals dispersible in common solvents block electrical current. Thus, in order to realize the full potential of colloidal semiconductor nanocrystals in the next-generation of solid-state devices, methods must be devised to make conductive films from these nanocrystals. One way to achieve this would be to add minute amounts of foreign impurity atoms (dopants) to increase their conductivity. Electronic doping in nanocrystals is still very much in its infancy with limited understanding of the underlying mechanisms that govern the doping process. This thesis introduces an innovative synthesis of doped nanocrystals and aims at expanding the fundamental understanding of charge transport in these doped nanocrystal films. The list of semiconductor nanocrystals that can be doped is large, and if one combines that with available dopants, an even larger set of materials with interesting properties and applications can be generated. In addition to doping, another promising route to increase conductivity in nanocrystal films is to use nanocrystals with high ionic conductivities. This thesis also examines this possibility by studying new phases of mixed ionic and electronic conductors at the nanoscale. Such a versatile approach may open new pathways for interesting fundamental research, and also lay the foundation for the creation of novel materials with important applications. In addition to their size-dependence, the intentional incorporation of

  2. Cellulose nanocrystals: synthesis, functional properties, and applications

    PubMed Central

    George, Johnsy; Sabapathi, SN

    2015-01-01

    Cellulose nanocrystals are unique nanomaterials derived from the most abundant and almost inexhaustible natural polymer, cellulose. These nanomaterials have received significant interest due to their mechanical, optical, chemical, and rheological properties. Cellulose nanocrystals primarily obtained from naturally occurring cellulose fibers are biodegradable and renewable in nature and hence they serve as a sustainable and environmentally friendly material for most applications. These nanocrystals are basically hydrophilic in nature; however, they can be surface functionalized to meet various challenging requirements, such as the development of high-performance nanocomposites, using hydrophobic polymer matrices. Considering the ever-increasing interdisciplinary research being carried out on cellulose nanocrystals, this review aims to collate the knowledge available about the sources, chemical structure, and physical and chemical isolation procedures, as well as describes the mechanical, optical, and rheological properties, of cellulose nanocrystals. Innovative applications in diverse fields such as biomedical engineering, material sciences, electronics, catalysis, etc, wherein these cellulose nanocrystals can be used, are highlighted. PMID:26604715

  3. Anisotropic Gold Nanocrystals:. Synthesis and Characterization

    NASA Astrophysics Data System (ADS)

    Stiufiuc, R.; Toderas, F.; Iosin, M.; Stiufiuc, G.

    In this letter we report on successful preparation and characterization of anisotropic gold nanocrystals bio-synthesized by reduction of aqueous chloroaurate ions in pelargonium plant extract. The nanocrystals have been characterized by means of Transmission Electron Microscopy (TEM), UV-VIS absorption spectroscopy and tapping mode atomic force microscopy (TM-AFM). Using these investigation techniques, the successful formation of anisotropic single nanocrystals with the preferential growth direction along the gold (111) plane has been confirmed. The high detail phase images could give us an explanation concerning the growth mechanism of the nanocrystals.

  4. Al-doped ZnO nanocrystals

    NASA Astrophysics Data System (ADS)

    Kadam, Pratibha; Agashe, Chitra; Mahamuni, Shailaja

    2008-11-01

    Al3+-doped ZnO nanocrystals were differently obtained by wet chemical and an electrochemical route. An increase in forbidden gap due to change in crystal size and also due to Al3+ doping in ZnO is critically analyzed. The Moss-Burstein type shift in Al3+-doped ZnO nanocrystals provides an evidence of successful Al3+ doping in ZnO nanocrystals. The possibility of varying the carrier concentration in ZnO nanocrystals is the indirect implication of the present investigations.

  5. Electronic structure of cobalt nanocrystals suspended inliquid

    SciTech Connect

    Liu, Hongjian; Guo, Jinghua; Yin, Yadong; Augustsson, Andreas; Dong, Chungli; Nordgren, Joseph; Chang, Chinglin; Alivisatos, Paul; Thornton, Geoff; Ogletree, D. Frank; Requejo, Felix G.; de Groot, Frank; Salmeron, Miquel

    2007-07-16

    The electronic structure of cobalt nanocrystals suspended in liquid as a function of size has been investigated using in-situ x-ray absorption and emission spectroscopy. A sharp absorption peak associated with the ligand molecules is found that increases in intensity upon reducing the nanocrystal size. X-ray Raman features due to d-d and to charge-transfer excitations of ligand molecules are identified. The study reveals the local symmetry of the surface of {var_epsilon}-Co phase nanocrystals, which originates from a dynamic interaction between Co nanocrystals and surfactant + solvent molecules.

  6. Germanium Nanocrystal Solar Cells

    NASA Astrophysics Data System (ADS)

    Holman, Zachary Charles

    Greenhouse gas concentrations in the atmosphere are approaching historically unprecedented levels from burning fossil fuels to meet the ever-increasing world energy demand. A rapid transition to clean energy sources is necessary to avoid the potentially catastrophic consequences of global warming. The sun provides more than enough energy to power the world, and solar cells that convert sunlight to electricity are commercially available. However, the high cost and low efficiency of current solar cells prevent their widespread implementation, and grid parity is not anticipated to be reached for at least 15 years without breakthrough technologies. Semiconductor nanocrystals (NCs) show promise for cheap multi-junction photovoltaic devices. To compete with photovoltaic materials that are currently commercially available, NCs need to be inexpensively cast into dense thin films with bulk-like electrical mobilities and absorption spectra that can be tuned by altering the NC size. The Group II-VI and IV-VI NC communities have had some success in achieving this goal by drying and then chemically treating colloidal particles, but the more abundant and less toxic Group IV NCs have proven more challenging. This thesis reports thin films of plasma-synthesized Ge NCs deposited using three different techniques, and preliminary solar cells based on these films. Germanium tetrachloride is dissociated in the presence of hydrogen in a nonthermal plasma to nucleate Ge NCs. Transmission electron microscopy and X-ray diffraction indicate that the particles are nearly monodisperse (standard deviations of 10-15% the mean particle diameter) and the mean diameter can be tuned from 4-15 nm by changing the residence time of the Ge NCs in the plasma. In the first deposition scheme, a Ge NC colloid is formed by reacting nanocrystalline powder with 1-dodecene and dispersing the functionalized NCs in a solvent. Films are then formed on substrates by drop-casting the colloid and allowing it to dry

  7. Neural network based feed-forward high density associative memory

    NASA Technical Reports Server (NTRS)

    Daud, T.; Moopenn, A.; Lamb, J. L.; Ramesham, R.; Thakoor, A. P.

    1987-01-01

    A novel thin film approach to neural-network-based high-density associative memory is described. The information is stored locally in a memory matrix of passive, nonvolatile, binary connection elements with a potential to achieve a storage density of 10 to the 9th bits/sq cm. Microswitches based on memory switching in thin film hydrogenated amorphous silicon, and alternatively in manganese oxide, have been used as programmable read-only memory elements. Low-energy switching has been ascertained in both these materials. Fabrication and testing of memory matrix is described. High-speed associative recall approaching 10 to the 7th bits/sec and high storage capacity in such a connection matrix memory system is also described.

  8. Lead sulphide nanocrystal photodetector technologies

    NASA Astrophysics Data System (ADS)

    Saran, Rinku; Curry, Richard J.

    2016-02-01

    Light detection is the underlying principle of many optoelectronic systems. For decades, semiconductors including silicon carbide, silicon, indium gallium arsenide and germanium have dominated the photodetector industry. They can show excellent photosensitivity but are limited by one or more aspects, such as high production cost, high-temperature processing, flexible substrate incompatibility, limited spectral range or a requirement for cryogenic cooling for efficient operation. Recently lead sulphide (PbS) nanocrystals have emerged as one of the most promising new materials for photodetector fabrication. They offer several advantages including low-cost manufacturing, solution processability, size-tunable spectral sensitivity and flexible substrate compatibility, and they have achieved figures of merit outperforming conventional photodetectors. We review the underlying concepts, breakthroughs and remaining challenges in photodetector technologies based on PbS nanocrystals.

  9. Quantitative tunneling spectroscopy of nanocrystals

    SciTech Connect

    First, Phillip N; Whetten, Robert L; Schaaff, T Gregory

    2007-05-25

    The proposed goals of this collaborative work were to systematically characterize the electronic structure and dynamics of 3-dimensional metal and semiconducting nanocrystals using scanning tunneling microscopy/spectroscopy (STM/STS) and ballistic electron emission spectroscopy (BEES). This report describes progress in the spectroscopic work and in the development of methods for creating and characterizing gold nanocrystals. During the grant period, substantial effort also was devoted to the development of epitaxial graphene (EG), a very promising materials system with outstanding potential for nanometer-scale ballistic and coherent devices ("graphene" refers to one atomic layer of graphitic, sp2 -bonded carbon atoms [or more loosely, few layers]). Funding from this DOE grant was critical for the initial development of epitaxial graphene for nanoelectronics

  10. The Surface Chemistry of Metal Chalcogenide Nanocrystals

    NASA Astrophysics Data System (ADS)

    Anderson, Nicholas Charles

    The surface chemistry of metal chalcogenide nanocrystals is explored through several interrelated analytical investigations. After a brief discussion of the nanocrystal history and applications, molecular orbital theory is used to describe the electronic properties of semiconductors, and how these materials behave on the nanoscale. Quantum confinement plays a major role in dictating the optical properties of metal chalcogenide nanocrystals, however surface states also have an equally significant contribution to the electronic properties of nanocrystals due to the high surface area to volume ratio of nanoscale semiconductors. Controlling surface chemistry is essential to functionalizing these materials for biological imaging and photovoltaic device applications. To better understand the surface chemistry of semiconducting nanocrystals, three competing surface chemistry models are presented: 1.) The TOPO model, 2.) the Non-stoichiometric model, and 3.) the Neutral Fragment model. Both the non-stoichiometric and neutral fragment models accurately describe the behavior of metal chalcogenide nanocrystals. These models rely on the covalent bond classification system, which divides ligands into three classes: 1.) X-type, 1-electron donating ligands that balance charge with excess metal at the nanocrystal surface, 2.) L-type, 2-electron donors that bind metal sites, and 3.) Z-type, 2-electron acceptors that bind chalcogenide sites. Each of these ligand classes is explored in detail to better understand the surface chemistry of metal chalcogenide nanocrystals. First, chloride-terminated, tri-n-butylphosphine (Bu 3P) bound CdSe nanocrystals were prepared by cleaving carboxylate ligands from CdSe nanocrystals with chlorotrimethylsilane in Bu3P solution. 1H and 31P{1H} nuclear magnetic resonance spectra of the isolated nanocrystals allowed assignment of distinct signals from several free and bound species, including surface-bound Bu3P and [Bu3P-H]+[Cl]- ligands as well as a Bu

  11. Real-time observation of local strain effects on nonvolatile ferroelectric memory storage mechanisms.

    PubMed

    Winkler, Christopher R; Jablonski, Michael L; Ashraf, Khalid; Damodaran, Anoop R; Jambunathan, Karthik; Hart, James L; Wen, Jianguo G; Miller, Dean J; Martin, Lane W; Salahuddin, Sayeef; Taheri, Mitra L

    2014-06-11

    We use in situ transmission electron microscopy to directly observe, at high temporal and spatial resolution, the interaction of ferroelectric domains and dislocation networks within BiFeO3 thin films. The experimental observations are compared with a phase field model constructed to simulate the dynamics of domains in the presence of dislocations and their resulting strain fields. We demonstrate that a global network of misfit dislocations at the film-substrate interface can act as nucleation sites and slow down domain propagation in the vicinity of the dislocations. Networks of individual threading dislocations emanating from the film-electrode interface play a more dramatic role in pinning domain motion. These dislocations may be responsible for the domain behavior in ferroelectric thin-film devices deviating from conventional Kolmogorov-Avrami-Ishibashi dynamics toward a Nucleation Limited Switching model. PMID:24801618

  12. Charge retention in scaled SONOS nonvolatile semiconductor memory devices—Modeling and characterization

    NASA Astrophysics Data System (ADS)

    Hu, Yin; White, Marvin H.

    1993-10-01

    A new analytical model is developed to investigate the influence of the charge loss processes in the retention mode of the SONOS NVSM device. The model considers charge loss by the following processes: (1) electron back-tunneling from the nitride traps to the Si conduction band, (2) electron back-tunneling from the nitride traps to the Si/SiO 2 interface traps and (3) hole injection from the Si valence band to the nitride traps. An amphoteric trap charge distribution is used in this model. The new charge retention model predicts that process (1) determines the short term retention, while processes (2) and (3) determine the long term retention. Good agreement has been reached between the results of analytical calculations and the experimental retention data on both surface channel and buried channel SONOS devices.

  13. Ferroelectric/electrode interfaces: Polarization switching and reliability of PZT capacitors in nonvolatile memories

    NASA Astrophysics Data System (ADS)

    Chen, Ye (Mike)

    The objective of this work was to investigate how the interface between electrode and PZT influences the PZT capacitor reliability. In order to conduct a well controlled experiment only the top-electrode PZT film interface was modified to study its effect on switching characteristics (i.e. hysteresis loop), voltage switching endurance and polarization retention of state of the art MOCVD grown film (nominally identical). The polycrystalline PZT film (50 -- 90 nm thick) are dominantly tetragonal with small fractions of the rhombohedral phase. XPS analyses of the as-deposited PZT film found the existence of a Pb-rich carbonate surface layer on all PZT film provided by industrial collaborators. Using materials characterizations such as in-situ XPS and ARXPS in tandem with electrical measurements it was determined that the Pb-rich surface layer appears to be an engineered sacrificial layer, which is beneficial in maximizing the switchable polarization and in improving the endurance and opposite-state retention behavior of PZT based FRAM capacitors with Pt electrode. This is because the excess Pb on the PZT surface and the Pb in the surface PZT reacts readily with the Pt during the Pt top electrode deposition creating a Pb-deficient non-ferroelectric interface layer between the top electrode and the PZT film. ARXPS analyses showed that this defective layer was approximately one nanometer thick and this is consistent with the hysteresis loop measurements that indicated a similar interface layer thickness. Inferior switching endurance and polarization retention was found in PZT film with an engineered initial thicker defective interface layer (via a HNO3-clean of the PZT surface prior to the top electrode deposition). This could be due to the fact that this defective interface layer may have thickened during the voltage cycling and/or retention bake. The thickening could be caused by greater carrier trapping and/or interface reaction between the Pb and the Pt. This thickening effectively stretched out the hysteresis curve and decreased remanent polarization that can be measured. To further investigate the interface effect on the switching phenomena and ferroelectric reliability, a monolayer HfO2 interface layer (experimentally determined optimal thickness) was inserted between the Pt top electrode and the PZT film by depositing the HfO2 monolayer coat by atomic layer deposition prior to room temperature Pt electrode deposition. Materials and electrical measurements showed that most of the applied electrical field was lost over this engineered interface layer (lower dielectric material) if its thickness was greater than 5 nanometer, effectively eliminating the switching phenomena. However, PZT capacitor with the monolayer HfO2 coat showed improved switching endurance and polarization retention. This is consistent with the preceding discussion because the engineering HfO 2 interface layer may have prevented the thickening of the interface layer during cycling and retention bake. Lastly, it was determined that the superior switching characteristics and reliability found in nominally identical PZT film with IrO2 top electrode was due to the inert chemical interface between the PZT and the top electrode. In-situ XPS analyses did not find any chemical reaction between the Pb in PZT surface and the IrO2 during the simulated IrO2 deposition. This is consistent with the higher switching polarization and greater voltage switching endurance found in PZT film with IrO2 top electrode.

  14. Carbon Nanofibers Synthesized on Selective Substrates for Nonvolatile Memory and 3D Electronics

    NASA Technical Reports Server (NTRS)

    Kaul, Anupama B.; Khan, Abdur R.

    2011-01-01

    A plasma-enhanced chemical vapor deposition (PECVD) growth technique has been developed where the choice of starting substrate was found to influence the electrical characteristics of the resulting carbon nanofiber (CNF) tubes. It has been determined that, if the tubes are grown on refractory metallic nitride substrates, then the resulting tubes formed with dc PECVD are also electrically conducting. Individual CNFs were formed by first patterning Ni catalyst islands using ebeam evaporation and liftoff. The CNFs were then synthesized using dc PECVD with C2H2:NH3 = [1:4] at 5 Torr and 700 C, and approximately equal to 200-W plasma power. Tubes were grown directly on degenerately doped silicon <100> substrates with resistivity rho approximately equal to 1-5 meterohm-centimeter, as well as NbTiN. The approximately equal to 200-nanometer thick refractory NbTiN deposited using magnetron sputtering had rho approximately equal to 113 microohm-centimeter and was also chemically compatible with CNF synthesis. The sample was then mounted on a 45 beveled Al holder, and placed inside a SEM (scanning electron microscope). A nanomanipulator probe stage was placed inside the SEM equipped with an electrical feed-through, where tungsten probes were used to make two-terminal electrical measurements with an HP 4156C parameter analyzer. The positive terminal nanoprobe was mechanically manipulated to physically contact an individual CNF grown directly on NbTiN as shown by the SEM image in the inset of figure (a), while the negative terminal was grounded to the substrate. This revealed the tube was electrically conductive, although measureable currents could not be detected until approximately equal to 6 V, after which point current increased sharply until compliance (approximately equal to 50 nA) was reached at approximately equal to 9.5 V. A native oxide on the tungsten probe tips may contribute to a tunnel barrier, which could be the reason for the suppressed transport at low biases. Currents up to approximately 100 nA could be cycled, which are likely to propagate via the tube surface, or sidewalls, rather than the body, which is shown by the I-V in figure (a). Electrical conduction via the sidewalls is a necessity for dc NEMS (nanoelectromechanical system) applications, more so than for the field emission applications of such tubes. During the tests, high conductivity was expected, because both probes were shorted to the substrate, as shown by curve 1 in the I-V characteristic in figure (b). When a tube grown on NbTiN was probed, the response was similar to the approximately equal to 100 nA and is represented by curve 2 in figure (b), which could be cycled and propagated via the tube surface or the sidewalls. However, no measureable currents for the tube grown directly on Si were observed as shown by curve 3 in figure (b), even after testing over a range of samples. This could arise from a dielectric coating on the sidewalls for tubes on Si. As a result of the directional nature of ion bombardment during dc PECVD, Si from the substrate is likely re-sputtered and possibly coats the sidewalls.

  15. Unipolar resistive switching behavior of amorphous YCrO{sub 3} films for nonvolatile memory applications

    SciTech Connect

    Sharma, Yogesh E-mail: rkatiyar@uprrp.edu; Misra, Pankaj; Katiyar, Ram S. E-mail: rkatiyar@uprrp.edu

    2014-08-28

    Amorphous YCrO{sub 3} (YCO) films were prepared on Pt/TiO{sub 2}/SiO{sub 2}/Si substrate by pulsed laser deposition in order to investigate resistive switching (RS) phenomenon. The Pt/YCO/Pt device showed stable unipolar RS with resistance ratio of ∼10{sup 5} between low and high resistance states, excellent endurance and retention characteristics, as well as, non-overlapping switching voltages with narrow dispersions. Based on the x-ray photoelectron spectroscopy and temperature dependent switching characteristics, observed RS was mainly ascribed to the oxygen vacancies. Moreover, current-voltage characteristics of the device in low and high resistance states were described by Ohmic and trap controlled space–charge limited conduction mechanisms, respectively.

  16. Electroluminescence in SrTiO3:Cr single-crystal nonvolatile memory cells

    NASA Astrophysics Data System (ADS)

    Alvarado, S. F.; La Mattina, F.; Bednorz, J. G.

    2007-10-01

    Materials chemistry has emerged as one of the most consistent fabrication tools for the rational delivery of high purity functional nanomaterials, engineered from molecular to microscopic scale at low cost and large scale. An overview of the major achievements and latest advances of a recently developed growth concept and low temperature aqueous synthesis method, for the fabrication of purpose-built large bandgap metal oxide semiconductor materials and oriented nano-arrays is presented. Important insight of direct relevance for semiconductor technology, optoelectronics, photovoltaics and photocatalysis for solar hydrogen generation, are revealed by in-depth investigations of the electronic structure of metal oxide nanostructures with new morphology and architecture, carried out at synchrotron radiation facilities.

  17. A high sensitivity real-time NVR monitor. [Nonvolatile Residue

    NASA Technical Reports Server (NTRS)

    Bowers, William D.; Chuan, R. L.

    1992-01-01

    The use of a temperature-controlled 200-MHz SAW resonator piezoelectric mass microbalance to monitor the mass of nonvolatile residue (NVR) deposited on its surface in real time is reported. The fundamental frequency of this device is mainly dependent on the configuration of the transducers and not on the thickness of the substrate. Therefore, higher operating frequencies can be achieved without reducing the thickness of the crystal. The real-time instrument was integrated onto a conventional stainless steel NVR plate and operated flawlessly over a 14-d period at Kennedy Space Center and successfully measured less than 1 ng/sq cm d NVR contamination. Contamination episodes detected by the instrument were correlated with scheduled activities on the test stand. Under the assumption of a baseline noise level of +/- 2 Hz, the absolute mass lower limit of detection would be 0.065 ng/sq cm. This would enable the detection of a daily NVR deposition rate of less than 0.1 ng/sq cm d.

  18. Non-volatile, solid state bistable electrical switch

    NASA Technical Reports Server (NTRS)

    Williams, Roger M. (Inventor)

    1994-01-01

    A bistable switching element is made of a material whose electrical resistance reversibly decreases in response to intercalation by positive ions. Flow of positive ions between the bistable switching element and a positive ion source is controlled by means of an electrical potential applied across a thermal switching element. The material of the thermal switching element generates heat in response to electrical current flow therethrough, which in turn causes the material to undergo a thermal phase transition from a high electrical resistance state to a low electrical resistance state as the temperature increases above a predetermined value. Application of the electrical potential in one direction renders the thermal switching element conductive to pass electron current out of the ion source. This causes positive ions to flow from the source into the bistable switching element and intercalate the same to produce a non-volatile, low resistance logic state. Application of the electrical potential in the opposite direction causes reverse current flow which de-intercalates the bistable logic switching element and produces a high resistance logic state.

  19. Floating-gated memory based on carbon nanotube field-effect transistors with Si floating dots

    NASA Astrophysics Data System (ADS)

    Seike, Kohei; Fujii, Yusuke; Ohno, Yasuhide; Maehashi, Kenzo; Inoue, Koichi; Matsumoto, Kazuhiko

    2014-01-01

    We have fabricated a carbon nanotube field-effect transistor (CNTFET)-based nonvolatile memory device with Si floating dots. The electrical characteristics of this memory device were compared with those of devices with a HfO2 charge storage layer or Au floating dots. For a sweep width of 6 V, the memory window of the devices with the Si floating dots increased twofold as compared with that of the devices with the HfO2 layer. Moreover, the retention characteristics revealed that, for the device with the Au floating dots, the off-state had almost the same current as the on-state at the 400th s. However, the devices with the Si floating dots had longer-retention characteristics. The results indicate that CNTFET-based devices with Si floating dots are promising candidates for low-power consumption nonvolatile memory devices.

  20. Organic ferroelectric/semiconducting nanowire hybrid layer for memory storage.

    PubMed

    Cai, Ronggang; Kassa, Hailu G; Haouari, Rachid; Marrani, Alessio; Geerts, Yves H; Ruzié, Christian; van Breemen, Albert J J M; Gelinck, Gerwin H; Nysten, Bernard; Hu, Zhijun; Jonas, Alain M

    2016-03-21

    Ferroelectric materials are important components of sensors, actuators and non-volatile memories. However, possible device configurations are limited due to the need to provide screening charges to ferroelectric interfaces to avoid depolarization. Here we show that, by alternating ferroelectric and semiconducting nanowires over an insulating substrate, the ferroelectric dipole moment can be stabilized by injected free charge carriers accumulating laterally in the neighboring semiconducting nanowires. This lateral electrostatic coupling between ferroelectric and semiconducting nanowires offers new opportunities to design new device architectures. As an example, we demonstrate the fabrication of an elementary non-volatile memory device in a transistor-like configuration, of which the source-drain current exhibits a typical hysteretic behavior with respect to the poling voltage. The potential for size reduction intrinsic to the nanostructured hybrid layer offers opportunities for the development of strongly miniaturized ferroelectric and piezoelectric devices. PMID:26927694

  1. Conditions of steady switching in phase-transition memory cells

    SciTech Connect

    Popov, A. I. Salnikov, S. M.; Anufriev, Yu. V.

    2015-04-15

    Three types of non-volatile memory cells of different designs based on phase transitions are developed and implemented. The effect of the design features of the cells and their active-region sizes on the switching characteristics and normal operation of the cells is considered as a whole. The causes of failure of the cells are analyzed from the obtained series of scanning electron images upon level-by-level etching of the samples. It is shown that the cell design is the most critical factor from the viewpoint of switching to the high-resistance state. The causes of this fact are analyzed and the criterion for providing the steady operation of cells of non-volatile memory based on phase transitions is formulated.

  2. Space Radiation Effects in Advanced Flash Memories

    NASA Technical Reports Server (NTRS)

    Johnston, A. H.

    2001-01-01

    Memory storage requirements in space systems have steadily increased, much like storage requirements in terrestrial systems. Large arrays of dynamic memories (DRAMs) have been used in solid-state recorders, relying on a combination of shielding and error-detection-and correction (EDAC) to overcome the extreme sensitivity of DRAMs to space radiation. For example, a 2-Gbit memory (with 4-Mb DRAMs) used on the Clementine mission functioned perfectly during its moon mapping mission, in spite of an average of 71 memory bit flips per day from heavy ions. Although EDAC worked well with older types of memory circuits, newer DRAMs use extremely complex internal architectures which has made it increasingly difficult to implement EDAC. Some newer DRAMs have also exhibited catastrophic latchup. Flash memories are an intriguing alternative to DRAMs because of their nonvolatile storage and extremely high storage density, particularly for applications where writing is done relatively infrequently. This paper discusses radiation effects in advanced flash memories, including general observations on scaling and architecture as well as the specific experience obtained at the Jet Propulsion Laboratory in evaluating high-density flash memories for use on the NASA mission to Europa, one of Jupiter's moons. This particular mission must pass through the Jovian radiation belts, which imposes a very demanding radiation requirement.

  3. Structure Map for Embedded Binary Alloy Nanocrystals

    SciTech Connect

    Yuan, C.W.; Shin, S.J.; Liao, C.Y.; Guzman, J.; Stone, P.R.; Watanabe, M.; Ager III, J.W.; Haller, E.E.; Chrzan, D.C.

    2008-09-20

    The equilibrium structure of embedded nanocrystals formed from strongly segregating binary-alloys is considered within a simple thermodynamic model. The model identifies two dimensionlessinterface energies that dictate the structure, and allows prediction of the stable structure for anychoice of these parameters. The resulting structure map includes three distinct nanocrystal mor-phologies: core/shell, lobe/lobe, and completely separated spheres.

  4. Electronic displays using optically pumped luminescent semiconductor nanocrystals

    DOEpatents

    Weiss, Shimon; Schlamp, Michael C.; Alivisatos, A. Paul

    2011-09-27

    A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit light of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.

  5. Electronic displays using optically pumped luminescent semiconductor nanocrystals

    DOEpatents

    Weiss, Shimon; Schlamp, Michael C.; Alivisatos, A. Paul

    2005-03-08

    A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit light of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.

  6. Electronic displays using optically pumped luminescent semiconductor nanocrystals

    DOEpatents

    Weiss, Shimon; Schlamp, Michael C.; Alivisatos, A. Paul

    2015-06-23

    A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit light of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.

  7. Electronic displays using optically pumped luminescent semiconductor nanocrystals

    DOEpatents

    Weiss, Shimon; Schlamp, Michael C; Alivisatos, A. Paul

    2014-02-11

    A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit light of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.

  8. Electronic displays using optically pumped luminescent semiconductor nanocrystals

    DOEpatents

    Weiss, Shimon; Schlam, Michael C; Alivisatos, A. Paul

    2014-03-25

    A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit tight of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.

  9. Electronic displays using optically pumped luminescent semiconductor nanocrystals

    DOEpatents

    Weiss, Shimon; Schlamp, Michael C.; Alivisatos, Paul A.

    2015-11-10

    A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit tight of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.

  10. Electronic displays using optically pumped luminescent semiconductor nanocrystals

    DOEpatents

    Weiss, Shimon; Schlamp, Michael C.; Alivisatos, A. Paul

    2010-04-13

    A multicolor electronic display is based on an array of luminescent semiconductor nanocrystals. Nanocrystals which emit light of different colors are grouped into pixels. The nanocrystals are optically pumped to produce a multicolor display. Different sized nanocrystals are used to produce the different colors. A variety of pixel addressing systems can be used.

  11. Organic ferroelectric/semiconducting nanowire hybrid layer for memory storage

    NASA Astrophysics Data System (ADS)

    Cai, Ronggang; Kassa, Hailu G.; Haouari, Rachid; Marrani, Alessio; Geerts, Yves H.; Ruzié, Christian; van Breemen, Albert J. J. M.; Gelinck, Gerwin H.; Nysten, Bernard; Hu, Zhijun; Jonas, Alain M.

    2016-03-01

    Ferroelectric materials are important components of sensors, actuators and non-volatile memories. However, possible device configurations are limited due to the need to provide screening charges to ferroelectric interfaces to avoid depolarization. Here we show that, by alternating ferroelectric and semiconducting nanowires over an insulating substrate, the ferroelectric dipole moment can be stabilized by injected free charge carriers accumulating laterally in the neighboring semiconducting nanowires. This lateral electrostatic coupling between ferroelectric and semiconducting nanowires offers new opportunities to design new device architectures. As an example, we demonstrate the fabrication of an elementary non-volatile memory device in a transistor-like configuration, of which the source-drain current exhibits a typical hysteretic behavior with respect to the poling voltage. The potential for size reduction intrinsic to the nanostructured hybrid layer offers opportunities for the development of strongly miniaturized ferroelectric and piezoelectric devices.Ferroelectric materials are important components of sensors, actuators and non-volatile memories. However, possible device configurations are limited due to the need to provide screening charges to ferroelectric interfaces to avoid depolarization. Here we show that, by alternating ferroelectric and semiconducting nanowires over an insulating substrate, the ferroelectric dipole moment can be stabilized by injected free charge carriers accumulating laterally in the neighboring semiconducting nanowires. This lateral electrostatic coupling between ferroelectric and semiconducting nanowires offers new opportunities to design new device architectures. As an example, we demonstrate the fabrication of an elementary non-volatile memory device in a transistor-like configuration, of which the source-drain current exhibits a typical hysteretic behavior with respect to the poling voltage. The potential for size reduction

  12. Physically Transient Resistive Switching Memory Based on Silk Protein.

    PubMed

    Wang, Hong; Zhu, Bowen; Ma, Xiaohua; Hao, Yue; Chen, Xiaodong

    2016-05-01

    Physically transient resistive switching devices based on silk protein are successfully demonstrated. The devices can be absolutely dissolved in deionized water or in phosphate-buffered saline in 2 h. At the same time, a reasonable resistance OFF/ON ratio of larger than 10(2) and a retention time of more than 10(4) s are achieved for nonvolatile memory applications. PMID:27028213

  13. Nanocrystal technology, drug delivery and clinical applications

    PubMed Central

    Junghanns, Jens-Uwe A H; Müller, Rainer H

    2008-01-01

    Nanotechnology will affect our lives tremendously over the next decade in very different fields, including medicine and pharmacy. Transfer of materials into the nanodimension changes their physical properties which were used in pharmaceutics to develop a new innovative formulation principle for poorly soluble drugs: the drug nanocrystals. The drug nanocrystals do not belong to the future; the first products are already on the market. The industrially relevant production technologies, pearl milling and high pressure homogenization, are reviewed. The physics behind the drug nanocrystals and changes of their physical properties are discussed. The marketed products are presented and the special physical effects of nanocrystals explained which are utilized in each market product. Examples of products in the development pipelines (clinical phases) are presented and the benefits for in vivo administration of drug nanocrystals are summarized in an overview. PMID:18990939

  14. Copper Selenide Nanocrystals for Photothermal Therapy

    PubMed Central

    Hessel, Colin M.; Pattani, Varun; Rasch, Michael; Panthani, Matthew G.; Koo, Bonil; Tunnell, James W.; Korgel, Brian A.

    2011-01-01

    Ligand-stabilized copper selenide (Cu2−xSe) nanocrystals, approximately 16 nm in diameter, were synthesized by a colloidal hot injection method and coated with amphiphilic polymer. The nanocrystals readily disperse in water and exhibit strong near infrared (NIR) optical absorption with a high molar extinction coefficient of 7.7 × 107 cm−1 M−1 at 980 nm. When excited with 800 nm light, the Cu2−xSe nanocrystals produce significant photothermal heating with a photothermal transduction efficiency of 22%, comparable to nanorods and nanoshells of gold (Au). In vitro photothermal heating of Cu2−xSe nanocrystals in the presence of human colorectal cancer cell (HCT-116) led to cell destruction after 5 minutes of laser irradiation at 33 W/cm2, demonstrating the viabilitiy of Cu2−xSe nanocrystals for photothermal therapy applications. PMID:21553924

  15. Synthesis of colloidal uranium-dioxide nanocrystals.

    PubMed

    Wu, Huimeng; Yang, Yongan; Cao, Y Charles

    2006-12-27

    In this paper, we have developed an organic-phase synthesis method for producing size-controlled, nearly monodispersed, colloidal uranium-dioxide nanocrystals. These UO2 nanocrystals are potentially important to applications such as nuclear fuel materials, catalysts, and thermopower materials. In addition, we have systematically mapped out the functions of the solvents (oleic acid, oleylamine, and 1-octadecene) in the synthesis, and we found that N-(cis-9-octadecenyl)oleamide-a product of the condensation of oleic acid and oleylamine-can substantially affect the formation of UO2 nanocrystals. Importantly, these results provide fundamental insight into the mechanisms of UO2 nanocrystal synthesis. Moreover, because a mixture of oleic acid and oleylamine has been widely used in synthesizing a variety of high-quality metal or metal-oxide nanocrystals, the results herein should also be important for understanding the detailed mechanisms of these syntheses. PMID:17177400

  16. Copper selenide nanocrystals for photothermal therapy.

    PubMed

    Hessel, Colin M; Pattani, Varun P; Rasch, Michael; Panthani, Matthew G; Koo, Bonil; Tunnell, James W; Korgel, Brian A

    2011-06-01

    Ligand-stabilized copper selenide (Cu(2-x)Se) nanocrystals, approximately 16 nm in diameter, were synthesized by a colloidal hot injection method and coated with amphiphilic polymer. The nanocrystals readily disperse in water and exhibit strong near-infrared (NIR) optical absorption with a high molar extinction coefficient of 7.7 × 10(7) cm(-1) M(-1) at 980 nm. When excited with 800 nm light, the Cu(2-x)Se nanocrystals produce significant photothermal heating with a photothermal transduction efficiency of 22%, comparable to nanorods and nanoshells of gold (Au). In vitro photothermal heating of Cu(2-x)Se nanocrystals in the presence of human colorectal cancer cell (HCT-116) led to cell destruction after 5 min of laser irradiation at 33 W/cm(2), demonstrating the viabilitiy of Cu(2-x)Se nanocrystals for photothermal therapy applications. PMID:21553924

  17. Exploiting the colloidal nanocrystal library to construct electronic devices

    NASA Astrophysics Data System (ADS)

    Choi, Ji-Hyuk; Wang, Han; Oh, Soong Ju; Paik, Taejong; Sung, Pil; Sung, Jinwoo; Ye, Xingchen; Zhao, Tianshuo; Diroll, Benjamin T.; Murray, Christopher B.; Kagan, Cherie R.

    2016-04-01

    Synthetic methods produce libraries of colloidal nanocrystals with tunable physical properties by tailoring the nanocrystal size, shape, and composition. Here, we exploit colloidal nanocrystal diversity and design the materials, interfaces, and processes to construct all-nanocrystal electronic devices using solution-based processes. Metallic silver and semiconducting cadmium selenide nanocrystals are deposited to form high-conductivity and high-mobility thin-film electrodes and channel layers of field-effect transistors. Insulating aluminum oxide nanocrystals are assembled layer by layer with polyelectrolytes to form high–dielectric constant gate insulator layers for low-voltage device operation. Metallic indium nanocrystals are codispersed with silver nanocrystals to integrate an indium supply in the deposited electrodes that serves to passivate and dope the cadmium selenide nanocrystal channel layer. We fabricate all-nanocrystal field-effect transistors on flexible plastics with electron mobilities of 21.7 square centimeters per volt-second.

  18. Exploiting the colloidal nanocrystal library to construct electronic devices.

    PubMed

    Choi, Ji-Hyuk; Wang, Han; Oh, Soong Ju; Paik, Taejong; Sung, Pil; Sung, Jinwoo; Ye, Xingchen; Zhao, Tianshuo; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

    2016-04-01

    Synthetic methods produce libraries of colloidal nanocrystals with tunable physical properties by tailoring the nanocrystal size, shape, and composition. Here, we exploit colloidal nanocrystal diversity and design the materials, interfaces, and processes to construct all-nanocrystal electronic devices using solution-based processes. Metallic silver and semiconducting cadmium selenide nanocrystals are deposited to form high-conductivity and high-mobility thin-film electrodes and channel layers of field-effect transistors. Insulating aluminum oxide nanocrystals are assembled layer by layer with polyelectrolytes to form high-dielectric constant gate insulator layers for low-voltage device operation. Metallic indium nanocrystals are codispersed with silver nanocrystals to integrate an indium supply in the deposited electrodes that serves to passivate and dope the cadmium selenide nanocrystal channel layer. We fabricate all-nanocrystal field-effect transistors on flexible plastics with electron mobilities of 21.7 square centimeters per volt-second. PMID:27124455

  19. Scaling Analysis of Nanoelectromechanical Memory Devices

    NASA Astrophysics Data System (ADS)

    Nagami, Tasuku; Tsuchiya, Yoshishige; Uchida, Ken; Mizuta, Hiroshi; Oda, Shunri

    2010-04-01

    Numerical simulation of electromechanical switching for bistable bridges in non-volatile nanoelectromechanical (NEM) memory devices suggests that performance of memory characteristics enhanced by decreasing suspended floating gate length. By conducting a two-dimensional finite element electromechanical simulation combined with a drift-diffusion analysis, we analyze the electromechanical switching operation of miniaturized structures. By shrinking the NEM floating gate length from 1000 to 100 nm, the switching (set/reset) voltage reduces from 7.2 to 2.8 V, switching time from 63 to 4.6 ns, power consumption from 16.9 to 0.13 fJ. This indicates the advantage of fast and low-power memory characteristics.

  20. Memory device using movement of protons

    DOEpatents

    Warren, W.L.; Vanheusden, K.J.R.; Fleetwood, D.M.; Devine, R.A.B.

    1998-11-03

    An electrically written memory element is disclosed utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element. 19 figs.

  1. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

    1998-01-01

    An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

  2. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

    2000-01-01

    An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

  3. Continuous Growth of Metal Oxide Nanocrystals: Enhanced Control of Nanocrystal Size and Radial Dopant Distribution.

    PubMed

    Jansons, Adam W; Hutchison, James E

    2016-07-26

    The ability to precisely control the composition of nanocrystals, similar to the way organic chemists control the structure of small molecules, remains an important challenge in nanoscience. Rather than dictating nanocrystal size through the nucleation event, growth of nanocrystals through continuous precursor addition would allow fine structural control. Herein, we present a method of growth for indium oxide nanocrystals that relies on the slow addition of an indium carboxylate precursor into hot oleyl alcohol. Nanocrystal size and structure can be governed at a subnanometer scale, and it is possible to precisely control core size over a range of three to at least 22 nm with dispersities as low as 7%. Growth can be stopped and restarted repeatedly without aggregation or passivation. We show that the volume of the nanocrystal core (and thus molecular weight) increases linearly with added monomer and the number of nanocrystals remains constant throughout the growth process, yielding an extremely predictable approach to size control. It is also possible to place metal oxide shells (e.g., Sn-doped In2O3 (ITO)) at various radial positions within the nanocrystal, and we use this approach to synthesize ITO/In2O3 core/shell nanocrystals as well as In2O3/ITO/In2O3 core/shell/shell nanocrystals. PMID:27328328

  4. Three-terminal resistive switching memory in a transparent vertical-configuration device

    SciTech Connect

    Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

    2014-01-06

    The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies.

  5. Charge trap memory based on few-layer black phosphorus

    NASA Astrophysics Data System (ADS)

    Feng, Qi; Yan, Faguang; Luo, Wengang; Wang, Kaiyou

    2016-01-01

    Atomically thin layered two-dimensional materials, including transition-metal dichalcogenide (TMDC) and black phosphorus (BP), have been receiving much attention, because of their promising physical properties and potential applications in flexible and transparent electronic devices. Here, for the first time we show nonvolatile charge-trap memory devices, based on field-effect transistors with large hysteresis, consisting of a few-layer black phosphorus channel and a three dimensional (3D) Al2O3/HfO2/Al2O3 charge-trap gate stack. An unprecedented memory window exceeding 12 V is observed, due to the extraordinary trapping ability of the high-k HfO2. The device shows a high endurance of over 120 cycles and a stable retention of ~30% charge loss after 10 years, even lower than the reported MoS2 flash memory. The high program/erase current ratio, large memory window, stable retention and high on/off current ratio, provide a promising route towards flexible and transparent memory devices utilising atomically thin two-dimensional materials. The combination of 2D materials with traditional high-k charge-trap gate stacks opens up an exciting field of nonvolatile memory devices.

  6. Charge trap memory based on few-layer black phosphorus.

    PubMed

    Feng, Qi; Yan, Faguang; Luo, Wengang; Wang, Kaiyou

    2016-02-01

    Atomically thin layered two-dimensional materials, including transition-metal dichalcogenide (TMDC) and black phosphorus (BP), have been receiving much attention, because of their promising physical properties and potential applications in flexible and transparent electronic devices. Here, for the first time we show nonvolatile charge-trap memory devices, based on field-effect transistors with large hysteresis, consisting of a few-layer black phosphorus channel and a three dimensional (3D) Al2O3/HfO2/Al2O3 charge-trap gate stack. An unprecedented memory window exceeding 12 V is observed, due to the extraordinary trapping ability of the high-k HfO2. The device shows a high endurance of over 120 cycles and a stable retention of ∼30% charge loss after 10 years, even lower than the reported MoS2 flash memory. The high program/erase current ratio, large memory window, stable retention and high on/off current ratio, provide a promising route towards flexible and transparent memory devices utilising atomically thin two-dimensional materials. The combination of 2D materials with traditional high-k charge-trap gate stacks opens up an exciting field of nonvolatile memory devices. PMID:26758336

  7. Memory Matters

    MedlinePlus

    ... different parts. Some of them are important for memory. The hippocampus (say: hih-puh-KAM-pus) is one of the more important parts of the brain that processes memories. Old information and new information, or memories, are ...

  8. Superconductivity in colloidal lead nanocrystals

    NASA Astrophysics Data System (ADS)

    Zolotavin, Pavlo

    Monodisperse colloidal lead nanoparticles with diameters ranging from 4.4 to 20 nm were prepared by a self-limiting growth method. The nanoparticles are protected from oxidation by an amorphous lead-tin oxide shell of 1.5-2 nm thickness. The magnetic susceptibility of the particles was measured as a function of size, temperature and magnetic field. The Meissner effect was observed indicating the superconducting transition. For the 20 and 16 nm particles, the critical temperature is suppressed to 6.9 K from the bulk value of 7.2 K and is further reduced for smaller particles. Depending on the size of the particles, the critical field is enhanced by 60 to 140 times. The coupling between particles was in situ controlled through the conversion of the oxides present on the surface of the nanoparticles to chalcogenides. This transformation allows for a 109-fold increase in the conductivity. The temperature of the onset of the superconductivity was found to depend upon the degree of coupling of the nanoparticles in the vicinity of the insulator - superconductor transition. The critical current density of the best sample of Pb/PbSe nanocrystals at zero magnetic field was determined to be 4 x 103 A/cm 2. In turn, the critical field of the sample shows 50-fold enhancement compared to bulk Pb. A method to convert the original Pb/PbO nanocrystals into colloidal Pb/PbS (Se, Te) particle was developed. This alleviates the necessity of chemical post processing and provides a truly colloidal superconductor. Paramagnetic Meissner effect of abnormally large amplitude is observed for Pb/PbTe nanocrystal assemblies. The material described in this manuscript is the first nanostructured superconductor prepared by the bottom-up approach starting from colloidal nanoparticles.

  9. Green and scalable production of colloidal perovskite nanocrystals and transparent sols by a controlled self-collection process

    NASA Astrophysics Data System (ADS)

    Liu, Shuangyi; Huang, Limin; Li, Wanlu; Liu, Xiaohua; Jing, Shui; Li, Jackie; O'Brien, Stephen

    2015-07-01

    Colloidal perovskite oxide nanocrystals have attracted a great deal of interest owing to the ability to tune physical properties by virtue of the nanoscale, and generate thin film structures under mild chemical conditions, relying on self-assembly or heterogeneous mixing. This is particularly true for ferroelectric/dielectric perovskite oxide materials, for which device applications cover piezoelectrics, MEMs, memory, gate dielectrics and energy storage. The synthesis of complex oxide nanocrystals, however, continues to present issues pertaining to quality, yield, % crystallinity, purity and may also suffer from tedious separation and purification processes, which are disadvantageous to scaling production. We report a simple, green and scalable ``self-collection'' growth method that produces uniform and aggregate-free colloidal perovskite oxide nanocrystals including BaTiO3 (BT), BaxSr1-xTiO3 (BST) and quaternary oxide BaSrTiHfO3 (BSTH) in high crystallinity and high purity. The synthesis approach is solution processed, based on the sol-gel transformation of metal alkoxides in alcohol solvents with controlled or stoichiometric amounts of water and in the stark absence of surfactants and stabilizers, providing pure colloidal nanocrystals in a remarkably low temperature range (15 °C-55 °C). Under a static condition, the nanoscale hydrolysis of the metal alkoxides accomplishes a complete transformation to fully crystallized single domain perovskite nanocrystals with a passivated surface layer of hydroxyl/alkyl groups, such that the as-synthesized nanocrystals can exist in the form of super-stable and transparent sol, or self-accumulate to form a highly crystalline solid gel monolith of nearly 100% yield for easy separation/purification. The process produces high purity ligand-free nanocrystals excellent dispersibility in polar solvents, with no impurity remaining in the mother solution other than trace alcohol byproducts (such as isopropanol). The afforded stable

  10. Progress in the study of drug nanocrystals.

    PubMed

    Shi, Jing; Guo, Fei; Zheng, Aiping; Zhang, Xiaoyan; Sun, Jianxu

    2015-12-01

    The poor water solubility of many candidate drugs remains a major obstacle to their development and clinical use, especially for oral drug delivery. Nanocrystal technology can improve the solubility and dissolution rates of many poorly water-soluble drugs very effectively, significantly improving their oral bioavailability and decreasing the food effect. For this reason, this technology is becoming a key area of drug delivery research. This review presents much of the recent progress in nanocrystal drug pharmaceuticals, including the characteristics, composition, preparation technology, and clinical applications of these drugs. Finally, the effect of nanocrystal technology on insoluble drugs is quantified and described. PMID:26817271

  11. Stacked-Gate FET's For Analog Memory Elements

    NASA Technical Reports Server (NTRS)

    Thakoor, Anilkumar P.; Moopenn, Alexander W.

    1991-01-01

    Three-terminal, double-stacked-gate field-effect transistor (FET), developed as analog memory element. Particularly suited for use as synapse with variable connection strength in electronic neural network. Provides programmable, nonvolatile resistive connection, somewhat in manner of porous-gate FET described in "Porous-Floating-Gate Field-Effect Transistor" (NPO-17532). Resembles commercial erasable programmable read-only memory (EPROM) device, except for thickness of layers of silicon dioxide electrically isolating gates. Either p-channel or n-channel device.

  12. Voltage-impulse-induced nonvolatile tunable magnetoelectric inductor based on multiferroic bilayer structure

    NASA Astrophysics Data System (ADS)

    Su, Hua; Tang, Xiaoli; Zhang, Huaiwu; Sun, Nian X.

    2016-07-01

    In this study, we developed a voltage-impulse-induced nonvolatile tunable magnetoelectric inductor, which used an amorphous magnetic ribbon/lead zirconate titanate (PZT) multiferroic bilayer structure as a magnetic core. The PZT substrate, which contained defect dipoles through acceptor doping, was used in the bilayer structure to obtain an asymmetric strain–E “butterfly” curve. Different and stable voltage-impulse-induced in-plane residual stain states could be obtained by applying specific voltage impulse excitation modes. These residual strain states induced a nonvolatile inductance variation in the inductor through strain-mediated magnetoelectric coupling. This method provided a promising approach to realize nonvolatile tunable inductors for miniaturized circuits and systems.

  13. Nonvolatile photorefractive properties in triply doped stoichiometric Mg:Fe:Mn:LiTaO3 crystals

    NASA Astrophysics Data System (ADS)

    Sun, Ting; Zhang, Xiao-Dong; Sun, Liang; Wang, Rui

    2014-01-01

    We have grown triply doped Mg:Fe:Mn:LiTaO3 crystals with near stoichiometry using the top seeded solution growth technique. The defect structure was investigated by infrared absorption spectra and Curie temperature. Using a blue laser as the source, excellent photorefractive properties were obtained. Nonvolatile holographic storage properties were investigated using the dual wavelength technique. We got a very high fixed diffraction efficiency and nonvolatile holographic storage sensitivity. The blue light has more than enough energy to excite holes of deep (Mn) and shallow (Fe) trap centers with the same phase, which enhance dramatically the blue photorefractive properties and the nonvolatile holographic storage. Mg2+ ion is no longer damage resistant at blue laser, but enhances photorefractive characteristics.

  14. [Memory systems and memory disorders].

    PubMed

    Van der Linden, Martial; Juillerat, Anne-Claude

    2003-02-15

    Recent cognitive models suggest that memory has a complex structure, composed of several independent systems (working memory, and four long-term memory systems: episodic memory, semantic memory, perceptual representation system, and procedural memory). Furthermore, neuropsychological studies show that a brain lesion can selectively impair some systems or some particular process in a system, while others are spared. In this theoretical context, the objective of assessment is to detect the impaired memory systems and processes as well as those, which remain intact. To do this, the clinician has to use various-tests specifically designed to assess the integrity of each memory system and process. PMID:12708274

  15. Electrically Variable Resistive Memory Devices

    NASA Technical Reports Server (NTRS)

    Liu, Shangqing; Wu, Nai-Juan; Ignatiev, Alex; Charlson, E. J.

    2010-01-01

    Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

  16. Diffusion in multi-component polymeric systems: Diffusion of non-volatile species in thin films

    NASA Astrophysics Data System (ADS)

    Müller, M.; Kind, M.; Cairncross, R.; Schabel, W.

    2009-01-01

    Polymeric films for high-tech products like LCD-panels, transdermal patches or medical test strips typically consist of a polymer and one or more non-volatile additives. If during the production process a multi-component solution is coated and subsequently dried, the diffusion of solvents and non-volatile species in the polymeric systems plays an important role. Recent experiments revealed that the drying conditions can have a significant influence on the formation of inhomogeneous distribution of the non-volatile components in the final foil and therefore affects desired product properties. The distribution of the non-volatile components in the final film has an important impact on the physical and chemical properties, including mechanical and optical properties, wetting behavior or drug release rates i.e. the product quality of the polymeric system. To be able to describe the diffusion of non-volatile species in a multi-component polymeric system during drying correctly, reliable information about the influence of the solvent concentration on the mobility of the additive are essential. To obtain information about the mobility of the additive in the polymeric solution new experiments were performed and observed by means of Inverse-Micro-Raman-Spectroscopy (IMRS). By fitting simulated concentration profiles to the experimental data, the temperature and concentration dependent diffusion coefficient of the non-volatile additive in the polymer solution was determined. The investigations are part of a bilateral funding of NFG in the US and DFG in Germany. Diffusion of volatile species in multicomponent polymeric systems are investigated by the group of Richard Cairncross.

  17. Integration of lead zirconium titanate thin films for high density ferroelectric random access memory

    NASA Astrophysics Data System (ADS)

    Kim, Kinam; Lee, Sungyung

    2006-09-01

    Interests are being focused on types of nonvolatile memories such as ferroelectric random access memory (FRAM), phase change random access memory, or magnetoresistance random access memory due to their distinct memory properties such as excellent write performance which conventional nonvolatile memories do not possess. Among these types of nonvolatile memories, FRAM whose cell structure and operation are almost identical to dynamic random access memory (DRAM) can ideally realize cell size and speed of DRAM. Thus FRAM is the most appropriate candidate for future universal memory where all memory functions are performed with a single chip solution. Due to the poor ferroelectric properties of downscaled ultrathin lead zirconium titanate (PZT) capacitors as well as technical issues such as hydrogen and plasma related degradation arising from embedding ferroelectric metal-insulator-metal capacitors into conventional complementary metal oxide semiconductor processes, current FRAM still falls far below its ideally attainable cell size and performance. In this paper, based upon PZT capacitor, current mass-productive one pass transistor and one storage capacitor (1T1C), capacitor over bit line (COB) cell technologies are introduced upon which cell size of 0.937μm2 at 250nm minimum feature size technology node has been realized. And then, most recent 1T1C, COB cell technologies are discussed from which cell size of 0.27μm2 at 150nm minimum feature size technology node has been realized, and finally future three dimensional capacitor technologies for the FRAM with cell size of less than 0.08μm2 beyond 100nm minimum feature size technology node are suggested.

  18. EqualWrites: Reducing Intra-set Write Variations for Enhancing Lifetime of Non-volatile Caches

    SciTech Connect

    Mittal, Sparsh; Vetter, Jeffrey S.

    2015-01-29

    Driven by the trends of increasing core-count and bandwidth-wall problem, the size of last level caches (LLCs) has greatly increased and hence, the researchers have explored non-volatile memories (NVMs) which provide high density and consume low-leakage power. Since NVMs have low write-endurance and the existing cache management policies are write variation-unaware, effective wear-leveling techniques are required for achieving reasonable cache lifetimes using NVMs. We present EqualWrites, a technique for mitigating intra-set write variation. In this paper, our technique works by recording the number of writes on a block and changing the cache-block location of a hot data-item to redirect the future writes to a cold block to achieve wear-leveling. Simulation experiments have been performed using an x86-64 simulator and benchmarks from SPEC06 and HPC (high-performance computing) field. The results show that for single, dual and quad-core system configurations, EqualWrites improves cache lifetime by 6.31X, 8.74X and 10.54X, respectively. In addition, its implementation overhead is very small and it provides larger improvement in lifetime than three other intra-set wear-leveling techniques and a cache replacement policy.

  19. EqualWrites: Reducing Intra-set Write Variations for Enhancing Lifetime of Non-volatile Caches

    DOE PAGESBeta

    Mittal, Sparsh; Vetter, Jeffrey S.

    2015-01-29

    Driven by the trends of increasing core-count and bandwidth-wall problem, the size of last level caches (LLCs) has greatly increased and hence, the researchers have explored non-volatile memories (NVMs) which provide high density and consume low-leakage power. Since NVMs have low write-endurance and the existing cache management policies are write variation-unaware, effective wear-leveling techniques are required for achieving reasonable cache lifetimes using NVMs. We present EqualWrites, a technique for mitigating intra-set write variation. In this paper, our technique works by recording the number of writes on a block and changing the cache-block location of a hot data-item to redirect themore » future writes to a cold block to achieve wear-leveling. Simulation experiments have been performed using an x86-64 simulator and benchmarks from SPEC06 and HPC (high-performance computing) field. The results show that for single, dual and quad-core system configurations, EqualWrites improves cache lifetime by 6.31X, 8.74X and 10.54X, respectively. In addition, its implementation overhead is very small and it provides larger improvement in lifetime than three other intra-set wear-leveling techniques and a cache replacement policy.« less

  20. EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches

    SciTech Connect

    Mittal, Sparsh; Vetter, Jeffrey S

    2014-01-01

    To address the limitations of SRAM such as high-leakage and low-density, researchers have explored use of non-volatile memory (NVM) devices, such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches. A crucial limitation of NVMs, however, is that their write endurance is low and the large intra-set write variation introduced by existing cache management policies may further exacerbate this problem, thereby reducing the cache lifetime significantly. We present EqualChance, a technique to increase cache lifetime by reducing intra-set write variation. EqualChance works by periodically changing the physical cache-block location of a write-intensive data item within a set to achieve wear-leveling. Simulations using workloads from SPEC CPU2006 suite and HPC (high-performance computing) field show that EqualChance improves the cache lifetime by 4.29X. Also, its implementation overhead is small, and it incurs very small performance and energy loss.