Sample records for nonvolatile memory devices

  1. Titanium oxide nonvolatile memory device and its application

    NASA Astrophysics Data System (ADS)

    Wang, Wei

    In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be

  2. Nonvolatile Ionic Two-Terminal Memory Device

    NASA Technical Reports Server (NTRS)

    Williams, Roger M.

    1990-01-01

    Conceptual solid-state memory device nonvolatile and erasable and has only two terminals. Proposed device based on two effects: thermal phase transition and reversible intercalation of ions. Transfer of sodium ions between source of ions and electrical switching element increases or decreases electrical conductance of element, turning switch "on" or "off". Used in digital computers and neural-network computers. In neural networks, many small, densely packed switches function as erasable, nonvolatile synaptic elements.

  3. Metal-organic molecular device for non-volatile memory storage

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Radha, B., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in; Sagade, Abhay A.; Kulkarni, G. U., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in

    Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organicmore » complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.« less

  4. Flexible graphene-PZT ferroelectric nonvolatile memory.

    PubMed

    Lee, Wonho; Kahya, Orhan; Toh, Chee Tat; Ozyilmaz, Barbaros; Ahn, Jong-Hyun

    2013-11-29

    We report the fabrication of a flexible graphene-based nonvolatile memory device using Pb(Zr0.35,Ti0.65)O3 (PZT) as the ferroelectric material. The graphene and PZT ferroelectric layers were deposited using chemical vapor deposition and sol–gel methods, respectively. Such PZT films show a high remnant polarization (Pr) of 30 μC cm−2 and a coercive voltage (Vc) of 3.5 V under a voltage loop over ±11 V. The graphene–PZT ferroelectric nonvolatile memory on a plastic substrate displayed an on/off current ratio of 6.7, a memory window of 6 V and reliable operation. In addition, the device showed one order of magnitude lower operation voltage range than organic-based ferroelectric nonvolatile memory after removing the anti-ferroelectric behavior incorporating an electrolyte solution. The devices showed robust operation in bent states of bending radii up to 9 mm and in cycling tests of 200 times. The devices exhibited remarkable mechanical properties and were readily integrated with plastic substrates for the production of flexible circuits.

  5. Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Hong, Augustin Jinwoo

    Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

  6. High performance nonvolatile memory devices based on Cu2-xSe nanowires

    NASA Astrophysics Data System (ADS)

    Wu, Chun-Yan; Wu, Yi-Liang; Wang, Wen-Jian; Mao, Dun; Yu, Yong-Qiang; Wang, Li; Xu, Jun; Hu, Ji-Gang; Luo, Lin-Bao

    2013-11-01

    We report on the rational synthesis of one-dimensional Cu2-xSe nanowires (NWs) via a solution method. Electrical analysis of Cu2-xSe NWs based memory device exhibits a stable and reproducible bipolar resistive switching behavior with a low set voltage (0.3-0.6 V), which can enable the device to write and erase data efficiently. Remarkably, the memory device has a record conductance switching ratio of 108, much higher than other devices ever reported. At last, a conducting filaments model is introduced to account for the resistive switching behavior. The totality of this study suggests that the Cu2-xSe NWs are promising building blocks for fabricating high-performance and low-consumption nonvolatile memory devices.

  7. An upconverted photonic nonvolatile memory.

    PubMed

    Zhou, Ye; Han, Su-Ting; Chen, Xian; Wang, Feng; Tang, Yong-Bing; Roy, V A L

    2014-08-21

    Conventional flash memory devices are voltage driven and found to be unsafe for confidential data storage. To ensure the security of the stored data, there is a strong demand for developing novel nonvolatile memory technology for data encryption. Here we show a photonic flash memory device, based on upconversion nanocrystals, which is light driven with a particular narrow width of wavelength in addition to voltage bias. With the help of near-infrared light, we successfully manipulate the multilevel data storage of the flash memory device. These upconverted photonic flash memory devices exhibit high ON/OFF ratio, long retention time and excellent rewritable characteristics.

  8. Carbon nanomaterials for non-volatile memories

    NASA Astrophysics Data System (ADS)

    Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

    2018-03-01

    Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

  9. A flexible nonvolatile resistive switching memory device based on ZnO film fabricated on a foldable PET substrate.

    PubMed

    Sun, Bai; Zhang, Xuejiao; Zhou, Guangdong; Yu, Tian; Mao, Shuangsuo; Zhu, Shouhui; Zhao, Yong; Xia, Yudong

    2018-06-15

    In this work, a flexible resistive switching memory device based on ZnO film was fabricated using a foldable Polyethylene terephthalate (PET) film as substrate while Ag and Ti acts top and bottom electrode. Our as-prepared device represents an outstanding nonvolatile memory behavior with good "write-read-erase-read" stability at room temperature. Finally, a physical model of Ag conductive filament is constructed to understanding the observed memory characteristics. The work provides a new way for the preparation of flexible memory devices based on ZnO films, and especially provides an experimental basis for the exploration of high-performance and portable nonvolatile resistance random memory (RRAM). Copyright © 2018 Elsevier Inc. All rights reserved.

  10. A multilevel nonvolatile magnetoelectric memory

    NASA Astrophysics Data System (ADS)

    Shen, Jianxin; Cong, Junzhuang; Shang, Dashan; Chai, Yisheng; Shen, Shipeng; Zhai, Kun; Sun, Young

    2016-09-01

    The coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories have been proposed and explored in the past decade. Here we propose a new principle to realize a multilevel nonvolatile memory based on the multiple states of the magnetoelectric coefficient (α) of multiferroics. Because the states of α depends on the relative orientation between magnetization and polarization, one can reach different levels of α by controlling the ratio of up and down ferroelectric domains with external electric fields. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure confirm that the states of α can be well controlled between positive and negative by applying selective electric fields. Consequently, two-level, four-level, and eight-level nonvolatile memory devices are demonstrated at room temperature. This kind of multilevel magnetoelectric memory retains all the advantages of ferroelectric random access memory but overcomes the drawback of destructive reading of polarization. In contrast, the reading of α is nondestructive and highly efficient in a parallel way, with an independent reading coil shared by all the memory cells.

  11. A fast and low-power microelectromechanical system-based non-volatile memory device

    PubMed Central

    Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E. B.; Park, Yung Woo

    2011-01-01

    Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559

  12. Nonvolatile Memory Technology for Space Applications

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

    2010-01-01

    This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

  13. Overview of emerging nonvolatile memory technologies

    PubMed Central

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

  14. Overview of emerging nonvolatile memory technologies.

    PubMed

    Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

  15. Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure.

    PubMed

    Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee

    2009-01-14

    The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 microm(2) to 200 x 200 nm(2). From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I(ON)/I(OFF) approximately 10(4)), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10,000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.

  16. Non-volatile memory for checkpoint storage

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Blumrich, Matthias A.; Chen, Dong; Cipolla, Thomas M.

    A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, themore » non-volatile memory is a pluggable flash memory card.« less

  17. Evaluation of switchable organic devices for nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Campbell Scott, J.

    2007-03-01

    Many organic electronic devices exhibit switching behavior and have therefore been proposed as the basis for a nonvolatile memory technology. In particular, bistable resistive elements, in which a high or low current state is selected by application of a specific voltage, may be used as the elements of a crosspoint memory array. This architecture places very stringent requirements on the electrical response of the individual devices, in terms of on-state current density, switching and retention times, cycling endurance, rectification and size-scaling. In this talk, I will describe the progress that we and others have made towards satisfying these requirements. In many cases, the mechanisms responsible for conduction and switching are not fully understood. In some devices, it has been shown that current flows in a few highly localized regions. These so-called ``filaments'' are not necessarily metallic bridges between the electrodes, but may be associated with chains of nanoparticles introduced into the organic matrix either deliberately or accidentally. Coulomb blockade effects can then explain the switching behavior observed in some devices. This work was done in collaboration with L. D. Bozano, M. Beinhoff, K. R. Carter, V. R. Deline, B. W. Kean, G. M. McClelland, D. C. Miller, P. M. Rice, J. R. Salem, and S. A. Swanson.

  18. Composition-dependent nanoelectronics of amido-phenazines: non-volatile RRAM and WORM memory devices.

    PubMed

    Maiti, Dilip K; Debnath, Sudipto; Nawaz, Sk Masum; Dey, Bapi; Dinda, Enakhi; Roy, Dipanwita; Ray, Sudipta; Mallik, Abhijit; Hussain, Syed A

    2017-10-17

    A metal-free three component cyclization reaction with amidation is devised for direct synthesis of DFT-designed amido-phenazine derivative bearing noncovalent gluing interactions to fabricate organic nanomaterials. Composition-dependent organic nanoelectronics for nonvolatile memory devices are discovered using mixed phenazine-stearic acid (SA) nanomaterials. We discovered simultaneous two different types of nonmagnetic and non-moisture sensitive switching resistance properties of fabricated devices utilizing mixed organic nanomaterials: (a) sample-1(8:SA = 1:3) is initially off, turning on at a threshold, but it does not turn off again with the application of any voltage, and (b) sample-2 (8:SA = 3:1) is initially off, turning on at a sharp threshold and off again by reversing the polarity. No negative differential resistance is observed in either type. These samples have different device implementations: sample-1 is attractive for write-once-read-many-times memory devices, such as novel non-editable database, archival memory, electronic voting, radio frequency identification, sample-2 is useful for resistive-switching random access memory application.

  19. Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films

    NASA Astrophysics Data System (ADS)

    Valentini, L.; Cardinali, M.; Fortunati, E.; Kenny, J. M.

    2014-10-01

    With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electric field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.

  20. Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Valentini, L., E-mail: luca.valentini@unipg.it; Cardinali, M.; Fortunati, E.

    2014-10-13

    With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electricmore » field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.« less

  1. Nonvolatile floating gate organic memory device based on pentacene/CdSe quantum dot heterojuction

    NASA Astrophysics Data System (ADS)

    Shin, Ik-Soo; Kim, Jung-Min; Jeun, Jun-Ho; Yoo, Seok-Hyun; Ge, Ziyi; Hong, Jong-In; Ho Bang, Jin; Kim, Yong-Sang

    2012-04-01

    An organic floating-gate memory device using CdSe quantum dots (QDs) as a charge-trapping element was fabricated. CdSe QDs were localized beneath a pentacene without any tunneling insulator, and the QD layer played a role as hole-trapping sites. The band bending formed at the junction between pentacene and QD layers inhibited back-injection of holes trapped in CdSe into pentacene, which appeared as a hysteretic capacitance-voltage response during the operation of the device. Nearly, 60% of trapped charge was sustained even after 104 s in programmed state, and this long retention time can be potentially useful in practical applications of non-volatile memory.

  2. EDITORIAL: Non-volatile memory based on nanostructures Non-volatile memory based on nanostructures

    NASA Astrophysics Data System (ADS)

    Kalinin, Sergei; Yang, J. Joshua; Demming, Anna

    2011-06-01

    Non-volatile memory refers to the crucial ability of computers to store information once the power source has been removed. Traditionally this has been achieved through flash, magnetic computer storage and optical discs, and in the case of very early computers paper tape and punched cards. While computers have advanced considerably from paper and punched card memory devices, there are still limits to current non-volatile memory devices that restrict them to use as secondary storage from which data must be loaded and carefully saved when power is shut off. Denser, faster, low-energy non-volatile memory is highly desired and nanostructures are the critical enabler. This special issue on non-volatile memory based on nanostructures describes some of the new physics and technology that may revolutionise future computers. Phase change random access memory, which exploits the reversible phase change between crystalline and amorphous states, also holds potential for future memory devices. The chalcogenide Ge2Sb2Te5 (GST) is a promising material in this field because it combines a high activation energy for crystallization and a relatively low crystallization temperature, as well as a low melting temperature and low conductivity, which accommodates localized heating. Doping is often used to lower the current required to activate the phase change or 'reset' GST but this often aggravates other problems. Now researchers in Korea report in-depth studies of SiO2-doped GST and identify ways of optimising the material's properties for phase-change random access memory [1]. Resistance switching is an area that has attracted a particularly high level of interest for non-volatile memory technology, and a great deal of research has focused on the potential of TiO2 as a model system in this respect. Researchers at HP labs in the US have made notable progress in this field, and among the work reported in this special issue they describe means to control the switch resistance and show

  3. Analog Nonvolatile Computer Memory Circuits

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd

    2007-01-01

    In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value

  4. A FPGA-based Measurement System for Nonvolatile Semiconductor Memory Characterization

    NASA Astrophysics Data System (ADS)

    Bu, Jiankang; White, Marvin

    2002-03-01

    Low voltage, long retention, high density SONOS nonvolatile semiconductor memory (NVSM) devices are ideally suited for PCMCIA, FLASH and 'smart' cards. The SONOS memory transistor requires characterization with an accurate, rapid measurement system with minimum disturbance to the device. The FPGA-based measurement system includes three parts: 1) a pattern generator implemented with XILINX FPGAs and corresponding software, 2) a high-speed, constant-current, threshold voltage detection circuit, 3) and a data evaluation program, implemented with a LABVIEW program. Fig. 1 shows the general block diagram of the FPGA-based measurement system. The function generator is designed and simulated with XILINX Foundation Software. Under the control of the specific erase/write/read pulses, the analog detect circuit applies operational modes to the SONOS device under test (DUT) and determines the change of the memory-state of the SONOS nonvolatile memory transistor. The TEK460 digitizes the analog threshold voltage output and sends to the PC computer. The data is filtered and averaged with a LABVIEWTM program running on the PC computer and displayed on the monitor in real time. We have implemented the pattern generator with XILINX FPGAs. Fig. 2 shows the block diagram of the pattern generator. We realized the logic control by a method of state machine design. Fig. 3 shows a small part of the state machine. The flexibility of the FPGAs enhances the capabilities of this system and allows measurement variations without hardware changes. The characterization of the nonvolatile memory transistor device under test (DUT), as function of programming voltage and time, is achieved by a high-speed, constant-current threshold voltage detection circuit. The analog detection circuit incorporating fast analog switches controlled digitally with the FPGAs. The schematic circuit diagram is shown in Fig. 4. The various operational modes for the DUT are realized with control signals applied to the

  5. Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices

    NASA Astrophysics Data System (ADS)

    Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

    2016-01-01

    Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr07377d

  6. Securing non-volatile memory regions

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Faraboschi, Paolo; Ranganathan, Parthasarathy; Muralimanohar, Naveen

    Methods, apparatus and articles of manufacture to secure non-volatile memory regions are disclosed. An example method disclosed herein comprises associating a first key pair and a second key pair different than the first key pair with a process, using the first key pair to secure a first region of a non-volatile memory for the process, and using the second key pair to secure a second region of the non-volatile memory for the same process, the second region being different than the first region.

  7. Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

    NASA Astrophysics Data System (ADS)

    Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

    2018-01-01

    Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these

  8. An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

    NASA Technical Reports Server (NTRS)

    Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

    2001-01-01

    Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

  9. Non-volatile memory based on the ferroelectric photovoltaic effect

    PubMed Central

    Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

    2013-01-01

    The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

  10. Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices.

    PubMed

    Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

    2016-01-21

    Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.

  11. Physical principles and current status of emerging non-volatile solid state memories

    NASA Astrophysics Data System (ADS)

    Wang, L.; Yang, C.-H.; Wen, J.

    2015-07-01

    Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for

  12. Multilevel characteristics and memory mechanisms for nonvolatile memory devices based on CuInS{sub 2} quantum dot-polymethylmethacrylate nanocomposites

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Zhou, Yang; Yun, Dong Yeol; Kim, Tae Whan, E-mail: twk@hanyang.ac.kr

    2014-12-08

    Nonvolatile memory devices based on CuInS{sub 2} (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10{sup −10} was maintained for 8 × 10{sup 3} cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10{sup 6} cycles converged to 2.40 × 10{sup −10}, indicative ofmore » the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams.« less

  13. Nonvolatile semiconductor memory having three dimension charge confinement

    DOEpatents

    Dawson, L. Ralph; Osbourn, Gordon C.; Peercy, Paul S.; Weaver, Harry T.; Zipperian, Thomas E.

    1991-01-01

    A layered semiconductor device with a nonvolatile three dimensional memory comprises a storage channel which stores charge carriers. Charge carriers flow laterally through the storage channel from a source to a drain. Isolation material, either a Schottky barrier or a heterojunction, located in a trench of an upper layer controllably retains the charge within the a storage portion determined by the confining means. The charge is retained for a time determined by the isolation materials' nonvolatile characteristics or until a change of voltage on the isolation material and the source and drain permit a read operation. Flow of charge through an underlying sense channel is affected by the presence of charge within the storage channel, thus the presences of charge in the memory can be easily detected.

  14. A memristor-based nonvolatile latch circuit

    NASA Astrophysics Data System (ADS)

    Robinett, Warren; Pickett, Matthew; Borghetti, Julien; Xia, Qiangfei; Snider, Gregory S.; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

    2010-06-01

    Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

  15. Makalu: fast recoverable allocation of non-volatile memory

    DOE PAGES

    Bhandari, Kumud; Chakrabarti, Dhruva R.; Boehm, Hans-J.

    2016-10-19

    Byte addressable non-volatile memory (NVRAM) is likely to supplement, and perhaps eventually replace, DRAM. Applications can then persist data structures directly in memory instead of serializing them and storing them onto a durable block device. However, failures during execution can leave data structures in NVRAM unreachable or corrupt. In this paper, we present Makalu, a system that addresses non-volatile memory management. Makalu offers an integrated allocator and recovery-time garbage collector that maintains internal consistency, avoids NVRAM memory leaks, and is efficient, all in the face of failures. We show that a careful allocator design can support a less restrictive andmore » a much more familiar programming model than existing persistent memory allocators. Our allocator significantly reduces the per allocation persistence overhead by lazily persisting non-essential metadata and by employing a post-failure recovery-time garbage collector. Experimental results show that the resulting online speed and scalability of our allocator are comparable to well-known transient allocators, and significantly better than state-of-the-art persistent allocators.« less

  16. Makalu: fast recoverable allocation of non-volatile memory

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Bhandari, Kumud; Chakrabarti, Dhruva R.; Boehm, Hans-J.

    Byte addressable non-volatile memory (NVRAM) is likely to supplement, and perhaps eventually replace, DRAM. Applications can then persist data structures directly in memory instead of serializing them and storing them onto a durable block device. However, failures during execution can leave data structures in NVRAM unreachable or corrupt. In this paper, we present Makalu, a system that addresses non-volatile memory management. Makalu offers an integrated allocator and recovery-time garbage collector that maintains internal consistency, avoids NVRAM memory leaks, and is efficient, all in the face of failures. We show that a careful allocator design can support a less restrictive andmore » a much more familiar programming model than existing persistent memory allocators. Our allocator significantly reduces the per allocation persistence overhead by lazily persisting non-essential metadata and by employing a post-failure recovery-time garbage collector. Experimental results show that the resulting online speed and scalability of our allocator are comparable to well-known transient allocators, and significantly better than state-of-the-art persistent allocators.« less

  17. A review of emerging non-volatile memory (NVM) technologies and applications

    NASA Astrophysics Data System (ADS)

    Chen, An

    2016-11-01

    This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

  18. Hafnia-based resistive switching devices for non-volatile memory applications and effects of gamma irradiation on device performance

    NASA Astrophysics Data System (ADS)

    Arun, N.; Kumar, K. Vinod; Pathak, A. P.; Avasthi, D. K.; Nageswara Rao, S. V. S.

    2018-04-01

    Non-volatile memory (NVM) devices were fabricated as a Metal- Insulator-Metal (MIM) structures by sandwiching Hafnium dioxide (HfO2) thin film in between two metal electrodes. The top and bottom metal electrodes were deposited by using the thermal evaporation, and the oxide layer was deposited by using the RF magnetron sputtering technique. The Resistive Random Access Memory (RRAM) device structures such as Ag/HfO2/Au/Si were fabricated and I-V characteristics for the pristine and gamma-irradiated devices with a dose 24 kGy were measured. Further we have studied the thermal annealing effects, in the range of 100°-400°C in a tubular furnace for the HfO2/Au/Si samples. The X-ray diffraction (XRD), Rutherford Backscattering Spectrometry (RBS), field emission-scanning electron microscopy (FESEM) analysis measurements were performed to determine the thickness, crystallinity and stoichiometry of these films. The electrical characteristics such as resistive switching, endurance, retention time and switching speed were measured by a semiconductor device analyser. The effects of gamma irradiation on the switching properties of these RRAM devices have been studied.

  19. Nonvolatile memory chips: critical technology for high-performance recce systems

    NASA Astrophysics Data System (ADS)

    Kaufman, Bruce

    2000-11-01

    Airborne recce systems universally require nonvolatile storage of recorded data. Both present and next generation designs make use of flash memory chips. Flash memory devices are in high volume use for a variety of commercial products ranging form cellular phones to digital cameras. Fortunately, commercial applications call for increasing capacities and fast write times. These parameters are important to the designer of recce recorders. Of economic necessity COTS devices are used in recorders that must perform in military avionics environments. Concurrently, recording rates are moving to $GTR10Gb/S. Thus to capture imagery for even a few minutes of record time, tactically meaningful solid state recorders will require storage capacities in the 100s of Gbytes. Even with memory chip densities at present day 512Mb, such capacities require thousands of chips. The demands on packaging technology are daunting. This paper will consider the differing flash chip architectures, both available and projected and discuss the impact on recorder architecture and performance. Emerging nonvolatile memory technologies, FeRAM AND MIRAM will be reviewed with regard to their potential use in recce recorders.

  20. Evolutionary Metal Oxide Clusters for Novel Applications: Toward High-Density Data Storage in Nonvolatile Memories.

    PubMed

    Chen, Xiaoli; Zhou, Ye; Roy, Vellaisamy A L; Han, Su-Ting

    2018-01-01

    Because of current fabrication limitations, miniaturizing nonvolatile memory devices for managing the explosive increase in big data is challenging. Molecular memories constitute a promising candidate for next-generation memories because their properties can be readily modulated through chemical synthesis. Moreover, these memories can be fabricated through mild solution processing, which can be easily scaled up. Among the various materials, polyoxometalate (POM) molecules have attracted considerable attention for use as novel data-storage nodes for nonvolatile memories. Here, an overview of recent advances in the development of POMs for nonvolatile memories is presented. The general background knowledge of the structure and property diversity of POMs is also summarized. Finally, the challenges and perspectives in the application of POMs in memories are discussed. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

    NASA Astrophysics Data System (ADS)

    Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

    2014-07-01

    Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices.

  2. Electrical reliability, multilevel data storage and mechanical stability of MoS2-PMMA nanocomposite-based non-volatile memory device

    NASA Astrophysics Data System (ADS)

    Bhattacharjee, Snigdha; Sarkar, Pranab Kumar; Prajapat, Manoj; Roy, Asim

    2017-07-01

    Molybdenum disulfide (MoS2) is of great interest for its applicability in various optoelectronic devices. Here we report the resistive switching properties of polymethylmethacrylate embedding MoS2 nano-crystals. The devices are developed on an ITO-coated PET substrate with copper as the top electrode. Systematic evaluation of resistive switching parameters, on the basis of MoS2 content, suggests non-volatile memory characteristics. A decent ON/OFF ratio, high retention time and long endurance of 3  ×  103, 105 s and 105 cycles are respectively recorded in a device with 1 weight percent (wt%) of MoS2. The bending cyclic measurements confirm the flexibility of the memory devices with good electrical reliability as well as mechanical stability. In addition, multilevel storage has been demonstrated by controlling the current compliance and span of voltage sweeping in the memory device.

  3. Ferroelectric Memory Devices and a Proposed Standardized Test System Design

    DTIC Science & Technology

    1992-06-01

    positive clock transition. This provides automatic data protection in case of power loss. The device is being evaluated for applications such as automobile ...systems requiring nonvolatile memory and as these systems become more complex, the demand for reprogrammable nonvolatile memory increases. The...complexity and cost in making conventional nonvolatile memory reprogrammable also increases, so the potential for using ferroelectric memory as a replacement

  4. Characterization of an Autonomous Non-Volatile Ferroelectric Memory Latch

    NASA Technical Reports Server (NTRS)

    John, Caroline S.; MacLeod, Todd C.; Evans, Joe; Ho, Fat D.

    2011-01-01

    We present the electrical characterization of an autonomous non-volatile ferroelectric memory latch using the principle that when an electric field is applied to a ferroelectriccapacitor,the positive and negative remnant polarization charge states of the capacitor are denoted as either data 0 or data 1. The properties of the ferroelectric material to store an electric polarization in the absence of an electric field make the device non-volatile. Further the memory latch is autonomous as it operates with the ground, power and output node connections, without any externally clocked control line. The unique quality of this latch circuit is that it can be written when powered off. The advantages of this latch over flash memories are: a) It offers unlimited reads/writes b) works on symmetrical read/write cycles. c) The latch is asynchronous. The circuit was initially developed by Radiant Technologies Inc., Albuquerque, New Mexico.

  5. Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

    NASA Astrophysics Data System (ADS)

    Yu, Jie; Chen, Kun-ji; Ma, Zhong-yuan; Zhang, Xin-xin; Jiang, Xiao-fan; Wu, Yang-qing; Huang, Xin-fan; Oda, Shunri

    2016-09-01

    Based on the charge storage mode, it is important to investigate the scaling dependence of memory performance in silicon nanocrystal (Si-NC) nonvolatile memory (NVM) devices for its scaling down limit. In this work, we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor (CMOS) technology. It is found that the memory windows of eight kinds of test key cells are almost the same of about 1.64 V @ ± 7 V/1 ms, which are independent of the gate area, but mainly determined by the average size (12 nm) and areal density (1.8 × 1011/cm2) of Si-NCs. The program/erase (P/E) speed characteristics are almost independent of gate widths and lengths. However, the erase speed is faster than the program speed of test key cells, which is due to the different charging behaviors between electrons and holes during the operation processes. Furthermore, the data retention characteristic is also independent of the gate area. Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration. Project supported by the State Key Development Program for Basic Research of China (Grant No. 2010CB934402) and the National Natural Science Foundation of China (Grant Nos. 11374153, 61571221, and 61071008).

  6. Biologically active nanocomposite of DNA-PbS nanoparticles: A new material for non-volatile memory devices

    NASA Astrophysics Data System (ADS)

    Murgunde, B. K.; Rabinal, M. K.; Kalasad, M. N.

    2018-01-01

    Composite films of deoxyribonucleic acid (DNA) and lead sulfide (PbS) nanoparticles are prepared to fabricate biological memory devices. A simple solution based electrografting is developed to deposit large (few cm2) uniform films of DNA:PbS on conducting substrates. The films are studied by X-ray photoelectron spectroscopy, field emission SEM, FTIR and optical spectroscopy to understand their properties. Charge transport measurements are carried out on ITO-DNA:PbS-metal junctions by cyclic voltage scans, electrical bi-stability is observed with ON/OFF ratio more than ∼104 times with good stability and endurance, such performance being rarely reported. The observed results are interpreted in the light of strong electrostatic binding of nanoparticles and DNA stands, which leads doping of Pb atoms into DNA. As a result, these devices exhibit negative differential resistance (NDR) effect due to oxidation of doped metal atoms. These composites can be the potential materials in the development of new generation non-volatile memory devices.

  7. Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory

    PubMed Central

    Ng, Tse Nga; Schwartz, David E.; Lavery, Leah L.; Whiting, Gregory L.; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

    2012-01-01

    Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic. PMID:22900143

  8. Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory.

    PubMed

    Ng, Tse Nga; Schwartz, David E; Lavery, Leah L; Whiting, Gregory L; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

    2012-01-01

    Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic.

  9. Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

    PubMed Central

    Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

    2014-01-01

    Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

  10. Non-Volatile Memory Technology Symposium 2000: Proceedings

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh (Editor)

    2000-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2000 that was held on November 15-16, 2000 in Arlington, Virginia. The proceedings contains a wide range of papers that cover the presentations of myriad advances in the nonvolatile memory technology during the recent past including memory cell design, simulations, radiation environment, and emerging memory technologies. The papers presented in the proceedings address the design challenges and applications and deals with newer, emerging memory technologies as well as related issues of radiation environment and die packaging.

  11. Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Li, Y.; Zhong, Y. P.; Deng, Y. F.

    2013-12-21

    Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.

  12. Method for refreshing a non-volatile memory

    DOEpatents

    Riekels, James E.; Schlesinger, Samuel

    2008-11-04

    A non-volatile memory and a method of refreshing a memory are described. The method includes allowing an external system to control refreshing operations within the memory. The memory may generate a refresh request signal and transmit the refresh request signal to the external system. When the external system finds an available time to process the refresh request, the external system acknowledges the refresh request and transmits a refresh acknowledge signal to the memory. The memory may also comprise a page register for reading and rewriting a data state back to the memory. The page register may comprise latches in lieu of supplemental non-volatile storage elements, thereby conserving real estate within the memory.

  13. Solution-Processed Wide-Bandgap Organic Semiconductor Nanostructures Arrays for Nonvolatile Organic Field-Effect Transistor Memory.

    PubMed

    Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei

    2018-01-01

    In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Floating-Gate Manipulated Graphene-Black Phosphorus Heterojunction for Nonvolatile Ambipolar Schottky Junction Memories, Memory Inverter Circuits, and Logic Rectifiers.

    PubMed

    Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing

    2017-10-11

    The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.

  15. Nitrogen-doped partially reduced graphene oxide rewritable nonvolatile memory.

    PubMed

    Seo, Sohyeon; Yoon, Yeoheung; Lee, Junghyun; Park, Younghun; Lee, Hyoyoung

    2013-04-23

    As memory materials, two-dimensional (2D) carbon materials such as graphene oxide (GO)-based materials have attracted attention due to a variety of advantageous attributes, including their solution-processability and their potential for highly scalable device fabrication for transistor-based memory and cross-bar memory arrays. In spite of this, the use of GO-based materials has been limited, primarily due to uncontrollable oxygen functional groups. To induce the stable memory effect by ionic charges of a negatively charged carboxylic acid group of partially reduced graphene oxide (PrGO), a positively charged pyridinium N that served as a counterion to the negatively charged carboxylic acid was carefully introduced on the PrGO framework. Partially reduced N-doped graphene oxide (PrGODMF) in dimethylformamide (DMF) behaved as a semiconducting nonvolatile memory material. Its optical energy band gap was 1.7-2.1 eV and contained a sp2 C═C framework with 45-50% oxygen-functionalized carbon density and 3% doped nitrogen atoms. In particular, rewritable nonvolatile memory characteristics were dependent on the proportion of pyridinum N, and as the proportion of pyridinium N atom decreased, the PrGODMF film lost memory behavior. Polarization of charged PrGODMF containing pyridinium N and carboxylic acid under an electric field produced N-doped PrGODMF memory effects that followed voltage-driven rewrite-read-erase-read processes.

  16. Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

    PubMed

    Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

    2015-07-21

    Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

  17. Investigation of multilayer WS2 flakes as charge trapping stack layers in non-volatile memories

    NASA Astrophysics Data System (ADS)

    Wang, Hong; Ren, Deliang; Lu, Chao; Yan, Xiaobing

    2018-06-01

    In this study, the non-volatile flash memory devices utilize tungsten sulfide flakes as the charge trapping stack layers were fabricated. The sandwiched structure of Pd/ZHO/WS2/ZHO/WS2/SiO2/Si manifests a memory window of 2.26 V and a high density of trapped charges 4.88 × 1012/cm2 under a ±5 V gate sweeping voltage. Moreover, the data retention results of as-fabricated non-volatile memories demonstrate that the high and low capacitance states are enhanced by 3.81% and 3.11%, respectively, after a measurement duration of 1.20 × 104 s. These remarkable achievements are probably attributed to the defects and band gap of WS2 flakes. Besides, the proposed memory fabrication is not only compatible with CMOS manufacturing processes but also gets rid of the high-temperature annealing process. Overall, this proposed non-volatile memory is highly attractive for low voltage, long data retention applications.

  18. Role of Non-Volatile Memories in Automotive and IoT Markets

    DTIC Science & Technology

    2017-03-01

    Role of Non-Volatile Memories in Automotive and IoT Markets Vipin Tiwari Director, Business Development and Product Marketing SST – A Wholly Own...automotive and Internet of Things (IoT) markets . Keywords: Embedded flash; Microcontrollers, Automotive; Internet of Things, IoT; Non-volatile memories...variou s types of non-volatile memories available in the market , bu t the floating-poly based embedded flash memories have been around the longest and

  19. A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement.

    PubMed

    Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

    2016-01-01

    Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.

  20. Multistate storage nonvolatile memory device based on ferroelectricity and resistive switching effects of SrBi2Ta2O9 films

    NASA Astrophysics Data System (ADS)

    Song, Zhiwei; Li, Gang; Xiong, Ying; Cheng, Chuanpin; Zhang, Wanli; Tang, Minghua; Li, Zheng; He, Jiangheng

    2018-05-01

    A memory device with a Pt/SrBi2Ta2O9(SBT)/Pt(111) structure was shown to have excellent combined ferroelectricity and resistive switching properties, leading to higher multistate storage memory capacity in contrast to ferroelectric memory devices. In this device, SBT polycrystalline thin films with significant (115) orientation were fabricated on Pt(111)/Ti/SiO2/Si(100) substrates using CVD (chemical vapor deposition) method. Measurement results of the electric properties exhibit reproducible and reliable ferroelectricity switching behavior and bipolar resistive switching effects (BRS) without an electroforming process. The ON/OFF ratio of the resistive switching was found to be about 103. Switching mechanisms for the low resistance state (LRS) and high resistance state (HRS) currents are likely attributed to the Ohmic and space charge-limited current (SCLC) behavior, respectively. Moreover, the ferroelectricity and resistive switching effects were found to be mutually independent, and the four logic states were obtained by controlling the periodic sweeping voltage. This work holds great promise for nonvolatile multistate memory devices with high capacity and low cost.

  1. Epitaxial Growth of Thin Ferroelectric Polymer Films on Graphene Layer for Fully Transparent and Flexible Nonvolatile Memory.

    PubMed

    Kim, Kang Lib; Lee, Wonho; Hwang, Sun Kak; Joo, Se Hun; Cho, Suk Man; Song, Giyoung; Cho, Sung Hwan; Jeong, Beomjin; Hwang, Ihn; Ahn, Jong-Hyun; Yu, Young-Jun; Shin, Tae Joo; Kwak, Sang Kyu; Kang, Seok Ju; Park, Cheolmin

    2016-01-13

    Enhancing the device performance of organic memory devices while providing high optical transparency and mechanical flexibility requires an optimized combination of functional materials and smart device architecture design. However, it remains a great challenge to realize fully functional transparent and mechanically durable nonvolatile memory because of the limitations of conventional rigid, opaque metal electrodes. Here, we demonstrate ferroelectric nonvolatile memory devices that use graphene electrodes as the epitaxial growth substrate for crystalline poly(vinylidene fluoride-trifluoroethylene) (PVDF-TrFE) polymer. The strong crystallographic interaction between PVDF-TrFE and graphene results in the orientation of the crystals with distinct symmetry, which is favorable for polarization switching upon the electric field. The epitaxial growth of PVDF-TrFE on a graphene layer thus provides excellent ferroelectric performance with high remnant polarization in metal/ferroelectric polymer/metal devices. Furthermore, a fully transparent and flexible array of ferroelectric field effect transistors was successfully realized by adopting transparent poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] semiconducting polymer.

  2. A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

    PubMed Central

    Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong

    2016-01-01

    Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827

  3. Core-Shell Zn x Cd1- x Se/Zn y Cd1- y Se Quantum Dots for Nonvolatile Memory and Electroluminescent Device Applications

    NASA Astrophysics Data System (ADS)

    Al-Amoody, Fuad; Suarez, Ernesto; Rodriguez, Angel; Heller, E.; Huang, Wenli; Jain, F.

    2011-08-01

    This paper presents a floating quantum dot (QD) gate nonvolatile memory device using high-energy-gap Zn y Cd1- y Se-cladded Zn x Cd1- x Se quantum dots ( y > x) with tunneling layers comprising nearly lattice-matched semiconductors (e.g., ZnS/ZnMgS) on Si channels. Also presented is the fabrication of an electroluminescent (EL) device with embedded cladded ZnCdSe quantum dots. These ZnCdSe quantum dots were embedded between indium tin oxide (ITO) on glass and a top Schottky metal electrode deposited on a thin CsF barrier. These QDs, which were nucleated in a photo-assisted microwave plasma (PMP) metalorganic chemical vapor deposition (MOCVD) reactor, were grown between the source and drain regions on a p-type silicon substrate of the nonvolatile memory device. The composition of QD cladding, which relates to the value of y in Zn y Cd1- y Se, was engineered by the intensity of ultraviolet light, which controlled the incorporation of zinc in ZnCdSe. The QD quality is comparable to those deposited by other methods. Characteristics and modeling of the II-VI quantum dots as well as two diverse types of devices are presented in this paper.

  4. Flexible non-volatile memory devices based on organic semiconductors

    NASA Astrophysics Data System (ADS)

    Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa

    2015-09-01

    The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.

  5. Opportunities for nonvolatile memory systems in extreme-scale high-performance computing

    DOE PAGES

    Vetter, Jeffrey S.; Mittal, Sparsh

    2015-01-12

    For extreme-scale high-performance computing systems, system-wide power consumption has been identified as one of the key constraints moving forward, where DRAM main memory systems account for about 30 to 50 percent of a node's overall power consumption. As the benefits of device scaling for DRAM memory slow, it will become increasingly difficult to keep memory capacities balanced with increasing computational rates offered by next-generation processors. However, several emerging memory technologies related to nonvolatile memory (NVM) devices are being investigated as an alternative for DRAM. Moving forward, NVM devices could offer solutions for HPC architectures. Researchers are investigating how to integratemore » these emerging technologies into future extreme-scale HPC systems and how to expose these capabilities in the software stack and applications. In addition, current results show several of these strategies could offer high-bandwidth I/O, larger main memory capacities, persistent data structures, and new approaches for application resilience and output postprocessing, such as transaction-based incremental checkpointing and in situ visualization, respectively.« less

  6. Opportunity of spinel ferrite materials in nonvolatile memory device applications based on their resistive switching performances.

    PubMed

    Hu, Wei; Qin, Ni; Wu, Guangheng; Lin, Yanting; Li, Shuwei; Bao, Dinghua

    2012-09-12

    The opportunity of spinel ferrites in nonvolatile memory device applications has been demonstrated by the resistive switching performance characteristics of a Pt/NiFe(2)O(4)/Pt structure, such as low operating voltage, high device yield, long retention time (up to 10(5) s), and good endurance (up to 2.2 × 10(4) cycles). The dominant conduction mechanisms are Ohmic conduction in the low-resistance state and in the lower-voltage region of the high-resistance state and Schottky emission in the higher-voltage region of the high-resistance state. On the basis of measurements of the temperature dependence of the resistances and magnetic properties in different resistance states, we explain the physical mechanism of resistive switching of Pt/NiFe(2)O(4)/Pt devices using the model of formation and rupture of conducting filaments by considering the thermal effect of oxygen vacancies and changes in the valences of cations due to the redox effect.

  7. A bi-stable nanoelectromechanical non-volatile memory based on van der Waals force

    NASA Astrophysics Data System (ADS)

    Soon, Bo Woon; Jiaqiang Ng, Eldwin; Qian, You; Singh, Navab; Julius Tsai, Minglin; Lee, Chengkuo

    2013-07-01

    By using complementary-metal-oxide-semiconductor processes, a silicon based bi-stable nanoelectromechanical non-volatile memory is fabricated and characterized. The main feature of this device is an 80 nm wide and 3 μm high silicon nanofin (SiNF) of a high aspect ratio (1:35). The switching mechanism is realized by electrostatic actuation between two lateral electrodes, i.e., terminals. Bi-stable hysteresis behavior is demonstrated when the SiNF maintains its contact to one of the two terminals by leveraging on van der Waals force even after voltage bias is turned off. The compelling results indicate that this design is promising for realization of high density non-volatile memory application due to its nano-scale footprint and zero on-hold power consumption.

  8. Investing the effectiveness of retention performance in a non-volatile floating gate memory device with a core-shell structure of CdSe nanoparticles

    NASA Astrophysics Data System (ADS)

    Lee, Dong-Hoon; Kim, Jung-Min; Lim, Ki-Tae; Cho, Hyeong Jun; Bang, Jin Ho; Kim, Yong-Sang

    2016-03-01

    In this paper, we empirically investigate the retention performance of organic non-volatile floating gate memory devices with CdSe nanoparticles (NPs) as charge trapping elements. Core-structured CdSe NPs or core-shell-structured ZnS/CdSe NPs were mixed in PMMA and their performance in pentacene based device was compared. The NPs and self-organized thin tunneling PMMA inside the devices exhibited hysteresis by trapping hole during capacitance-voltage characterization. Despite of core-structured NPs showing a larger memory window, the retention time was too short to be adopted by an industry. By contrast core-shell structured NPs showed an improved retention time of >10000 seconds than core-structure NCs. Based on these results and the energy band structure, we propose the retention mechanism of each NPs. This investigation of retention performance provides a comparative and systematic study of the charging/discharging behaviors of NPs based memory devices. [Figure not available: see fulltext.

  9. Electrical bistabilities and memory mechanisms of nonvolatile organic bistable devices based on exfoliated muscovite-type mica nanoparticle/poly(methylmethacrylate) nanocomposites

    NASA Astrophysics Data System (ADS)

    Lim, Won Gyu; Lee, Dea Uk; Na, Han Gil; Kim, Hyoun Woo; Kim, Tae Whan

    2018-02-01

    Organic bistable devices (OBDs) with exfoliated mica nanoparticles (NPs) embedded into an insulating poly(methylmethacrylate) (PMMA) layer were fabricated by using a spin-coating method. Current-voltage (I-V) curves for the Al/PMMA/exfoliated mica NP/PMMA/indium-tin-oxide/glass devices at 300 K showed a clockwise current hysteresis behavior due to the existence of the exfoliated muscovite-type mica NPs, which is an essential feature for bistable devices. Write-read-erase-read data showed that the OBDs had rewritable nonvolatile memories and an endurance number of ON/OFF switching for the OBDs of 102 cycles. An ON/OFF ratio of 1 × 103 was maintained for retention times larger than 1 × 104 s. The memory mechanisms of the fabricated OBDs were described by using the trapping and the tunneling processes within a PMMA active layer containing exfoliated muscovite-type mica NPs on the basis of the energy band diagram and the I-V curves.

  10. Active non-volatile memory post-processing

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Kannan, Sudarsun; Milojicic, Dejan S.; Talwar, Vanish

    A computing node includes an active Non-Volatile Random Access Memory (NVRAM) component which includes memory and a sub-processor component. The memory is to store data chunks received from a processor core, the data chunks comprising metadata indicating a type of post-processing to be performed on data within the data chunks. The sub-processor component is to perform post-processing of said data chunks based on said metadata.

  11. High-Performance Nonvolatile Organic Field-Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers.

    PubMed

    Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei

    2017-08-01

    Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.

  12. High‐Performance Nonvolatile Organic Field‐Effect Transistor Memory Based on Organic Semiconductor Heterostructures of Pentacene/P13/Pentacene as Both Charge Transport and Trapping Layers

    PubMed Central

    Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Wang, Laiyuan; Wu, Dequn

    2017-01-01

    Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory. PMID:28852619

  13. Peroxide induced volatile and non-volatile switching behavior in ZnO-based electrochemical metallization memory cell

    NASA Astrophysics Data System (ADS)

    Mangasa Simanjuntak, Firman; Chandrasekaran, Sridhar; Pattanayak, Bhaskar; Lin, Chun-Chieh; Tseng, Tseung-Yuen

    2017-09-01

    We explore the use of cubic-zinc peroxide (ZnO2) as a switching material for electrochemical metallization memory (ECM) cell. The ZnO2 was synthesized with a simple peroxide surface treatment. Devices made without surface treatment exhibits a high leakage current due to the self-doped nature of the hexagonal-ZnO material. Thus, its switching behavior can only be observed when a very high current compliance is employed. The synthetic ZnO2 layer provides a sufficient resistivity to the Cu/ZnO2/ZnO/ITO devices. The high resistivity of ZnO2 encourages the formation of a conducting bridge to activate the switching behavior at a lower operation current. Volatile and non-volatile switching behaviors with sufficient endurance and an adequate memory window are observed in the surface-treated devices. The room temperature retention of more than 104 s confirms the non-volatility behavior of the devices. In addition, our proposed device structure is able to work at a lower operation current among other reported ZnO-based ECM cells.

  14. Layer-by-layer charging in non-volatile memory devices using embedded sub-2 nm platinum nanoparticles

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Ramalingam, Balavinayagam; Zheng, Haisheng; Gangopadhyay, Shubhra, E-mail: gangopadhyays@missouri.edu

    In this work, we demonstrate multi-level operation of a non-volatile memory metal oxide semiconductor capacitor by controlled layer-by-layer charging of platinum nanoparticle (PtNP) floating gate devices with defined gate voltage bias ranges. The device consists of two layers of ultra-fine, sub-2 nm PtNPs integrated between Al{sub 2}O{sub 3} tunneling and separation layers. PtNP size and interparticle distance were varied to control the particle self-capacitance and associated Coulomb charging energy. Likewise, the tunneling layer thicknesses were also varied to control electron tunneling to the first and second PtNP layers. The final device configuration with optimal charging behavior and multi-level programming was attainedmore » with a 3 nm Al{sub 2}O{sub 3} initial tunneling layer, initial PtNP layer with particle size 0.54 ± 0.12 nm and interparticle distance 4.65 ± 2.09 nm, 3 nm Al{sub 2}O{sub 3} layer to separate the PtNP layers, and second particle layer with 1.11 ± 0.28 nm PtNP size and interparticle distance 2.75 ± 1.05 nm. In this device, the memory window of the first PtNP layer saturated over a programming bias range of 7 V to 14 V, after which the second PtNP layer starts charging, exhibiting a multi-step memory window with layer-by-layer charging.« less

  15. Fabrication of InGaZnO Nonvolatile Memory Devices at Low Temperature of 150 degrees C for Applications in Flexible Memory Displays and Transparency Coating on Plastic Substrates.

    PubMed

    Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin

    2016-05-01

    We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays.

  16. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu

    2015-06-24

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. Themore » device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.« less

  17. Development of novel nonvolatile memory devices using the colossal magnetoresistive oxide praseodymium-calcium-manganese trioxide

    NASA Astrophysics Data System (ADS)

    Papagianni, Christina

    Pr0.7Ca0.3MnO3 (PCMO) manganese oxide belongs in the family of materials known as transition metal oxides. These compounds have received increased attention due to their perplexing properties such as Colossal Magnetoresistance effect, Charge-Ordered phase, existence of phase-separated states etc. In addition, it was recently discovered that short electrical pulses in amplitude and duration are sufficient to induce reversible and non-volatile resistance changes in manganese perovskite oxide thin films at room temperature, known as the EPIR effect. The existence of the EPIR effect in PCMO thin films at room temperature opens a viable way for the realization of fast, high-density, low power non-volatile memory devices in the near future. The purpose of this study is to investigate, optimize and understand the properties of Pr0.7Ca0.3MnO 3 (PCMO) thin film devices and to identify how these properties affect the EPIR effect. PCMO thin films were deposited on various substrates, such as metals, and conducting and insulating oxides, by pulsed laser and radio frequency sputtering methods. Our objective was to understand and compare the induced resistive states. We attempted to identify the induced resistance changes by considering two resistive models to be equivalent to our devices. Impedance spectroscopy was also utilized in a wide temperature range that was extended down to 70K. Fitted results of the temperature dependence of the resistance states were also included in this study. In the same temperature range, we probed the resistance changes in PCMO thin films and we examined whether the phase transitions affect the EPIR effect. In addition, we included a comparison of devices with electrodes consisting of different size and different materials. We demonstrated a direct relation between the EPIR effect and the phase diagram of bulk PCMO samples. A model that could account for the observed EPIR effect is presented.

  18. SONOS Nonvolatile Memory Cell Programming Characteristics

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2010-01-01

    Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

  19. Ferroelectric FET for nonvolatile memory application with two-dimensional MoSe2 channels

    NASA Astrophysics Data System (ADS)

    Wang, Xudong; Liu, Chunsen; Chen, Yan; Wu, Guangjian; Yan, Xiao; Huang, Hai; Wang, Peng; Tian, Bobo; Hong, Zhenchen; Wang, Yutao; Sun, Shuo; Shen, Hong; Lin, Tie; Hu, Weida; Tang, Minghua; Zhou, Peng; Wang, Jianlu; Sun, Jinglan; Meng, Xiangjian; Chu, Junhao; Li, Zheng

    2017-06-01

    Graphene and other two-dimensional materials have received considerable attention regarding their potential applications in nano-electronics. Here, we report top-gate nonvolatile memory field-effect transistors (FETs) with different layers of MoSe2 nanosheets channel gated by ferroelectric film. The conventional gate dielectric of FETs was replaced by a ferroelectric thin film that provides a ferroelectric polarization electric field, and therefore defined as an Fe-FET where the poly (vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) was used as the gate dielectric. Among the devices with MoSe2 channels of different thicknesses, the device with a single layer of MoSe2 exhibited a large hysteresis of electronic transport with an over 105 write/erase ratio, and displayed excellent retention and endurance performance. The possible mechanism of the device’s good properties was qualitatively analyzed using band theory. Additionally, a comprehensive study comparing the memory properties of MoSe2 channels of different thicknesses is presented. Increasing the numbers of MoSe2 layers was found to cause a reduced memory window. However, MoSe2 thickness of 5 nm yielded a write/erase ratio of more than 103. The results indicate that, based on a Fe-FET structure, the combination of two-dimensional semiconductors and organic ferroelectric gate dielectrics shows good promise for future applications in nonvolatile ferroelectric memory.

  20. Nonvolatile Analog Memory

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C. (Inventor)

    2007-01-01

    A nonvolatile analog memory uses pairs of ferroelectric field effect transistors (FFETs). Each pair is defined by a first FFET and a second FFET. When an analog value is to be stored in one of the pairs, the first FFET has a saturation voltage applied thereto, and the second FFET has a storage voltage applied thereto that is indicative of the analog value. The saturation and storage voltages decay over time in accordance with a known decay function that is used to recover the original analog value when the pair of FFETs is read.

  1. Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures

    PubMed Central

    Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo

    2018-01-01

    Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS2/PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 104 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS2 to PbS. The demonstrated MoS2 heterostructure–based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices. PMID:29770356

  2. Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures.

    PubMed

    Wang, Qisheng; Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo; He, Jun

    2018-04-01

    Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS 2 /PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 10 4 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS 2 to PbS. The demonstrated MoS 2 heterostructure-based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices.

  3. Biomolecule nanoparticle-induced nanocomposites with resistive switching nonvolatile memory properties

    NASA Astrophysics Data System (ADS)

    Ko, Yongmin; Ryu, Sook Won; Cho, Jinhan

    2016-04-01

    Resistive switching behavior-based memory devices are considered promising candidates for next-generation data storage because of their simple structure configuration, low power consumption, and rapid operating speed. Here, the resistive switching nonvolatile memory properties of Fe2O3 nanocomposite (NC) films prepared from the thermal calcination of layer-by-layer (LbL) assembled ferritin multilayers were successfully investigated. For this study, negatively charged ferritin nanoparticles were alternately deposited onto the Pt-coated Si substrate with positively charged poly(allylamine hydrochloride) (PAH) by solution-based electrostatic LbL assembly, and the formed multilayers were thermally calcinated to obtain a homogeneous transition metal oxide NC film through the elimination of organic components, including the protein shell of ferritin. The formed memory device exhibits a stable ON/OFF current ratio of approximately 103, with nanosecond switching times under an applied external bias. In addition, these reversible switching properties were kept stable during the repeated cycling tests of above 200 cycles and a test period of approximately 105 s under atmosphere. These solution-based approaches can provide a basis for large-area inorganic nanoparticle-based electric devices through the design of bio-nanomaterials at the molecular level.

  4. Non-Volatile Memory Technology Symposium 2001: Proceedings

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh; Daud, Taher; Strauss, Karl

    2001-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

  5. Extraction of the gate capacitance coupling coefficient in floating gate non-volatile memories: Statistical study of the effect of mismatching between floating gate memory and reference transistor in dummy cell extraction methods

    NASA Astrophysics Data System (ADS)

    Rafhay, Quentin; Beug, M. Florian; Duane, Russell

    2007-04-01

    This paper presents an experimental comparison of dummy cell extraction methods of the gate capacitance coupling coefficient for floating gate non-volatile memory structures from different geometries and technologies. These results show the significant influence of mismatching floating gate devices and reference transistors on the extraction of the gate capacitance coupling coefficient. In addition, it demonstrates the accuracy of the new bulk bias dummy cell extraction method and the importance of the β function, introduced recently in [Duane R, Beug F, Mathewson A. Novel capacitance coupling coefficient measurement methodology for floating gate non-volatile memory devices. IEEE Electr Dev Lett 2005;26(7):507-9], to determine matching pairs of floating gate memory and reference transistor.

  6. E-field induced resistive switch in metal/praseodymium calcium manganite interfaces: A model for future nonvolatile memory devices

    NASA Astrophysics Data System (ADS)

    Das, Nilanjan

    Among the various candidates for non-volatile random access memory (RAM), interfacial resistive switch in Ag/Pr0.7Ca0.3 MnO3 (PCMO) configuration has drawn major attention in recent years due to its potential as a high storage density (˜ terabyte) device. However, the diverse nature of the resistive switch in different systems makes the development of a unifying model for its underlying physics very difficult. This dissertation will address both issues, namely, characterization of switches for device applications and development of a system-independent generic model, in detail. In our work, we have studied the properties electric pulse induced interfacial switch in electrode/PCMO system. A very fast speed ("write speed") of 100 ns, threshold ("programming voltage") as low as 2 V (for micro electrodes), and non-volatility ("data retention") of switched states have been achieved. A clear distinction between fast switch and sub-threshold slow quasistatic-dc switch has been made. Results obtained from time-dependence studies and impedance spectroscopy suggest that defect creation/annihilation, such as broken bonds (under very high field at interface, 107V/cm), is likely the mechanism for the sub-micros fast switching. On the other hand, slow accumulative process, such as electromigration of point defects, are responsible for the subthreshold quasi-dc switch. Scanning probe imaging has revealed the nanoscale inhomogeneity of the switched surfaces, essential for observing a resistive switch. Evolution of such structures has been observed under surface pre-training. Device scalability has been tested by creating reversible modification of surface conductivities with atomic force microscopy, thus creating the "nano-switch" (limited to a region of 10--100 nm).

  7. Highly conducting leakage-free electrolyte for SrCoOx-based non-volatile memory device

    NASA Astrophysics Data System (ADS)

    Katase, Takayoshi; Suzuki, Yuki; Ohta, Hiromichi

    2017-10-01

    The electrochemical switching of SrCoOx-based non-volatile memory with a thin-film-transistor structure was examined by using liquid-leakage-free electrolytes with different conductivities (σ) as the gate insulator. We first examined leakage-free water, which is incorporated in the amorphous (a-) 12CaO.7Al2O3 film with a nanoporous structure (Calcium Aluminate with Nanopore), but the electrochemical oxidation/reduction of the SrCoOx layer required the application of a high gate voltage (Vg) up to 20 V for a very long current-flowing-time (t) ˜40 min, primarily due to the low σ [2.0 × 10-8 S cm-1 at room temperature (RT)] of leakage-free water. We then controlled the σ of the leakage-free electrolyte, infiltrated in the a-NaxTaO3 film with a nanopillar array structure, from 8.0 × 10-8 S cm-1 to 2.5 × 10-6 S cm-1 at RT by changing the x = 0.01-1.0. As the result, the t, required for the metallization of the SrCoOx layer under small Vg = -3 V, becomes two orders of magnitude shorter with increase of the σ of the a-NaxTaO3 leakage-free electrolyte. These results indicate that the ion migration in the leakage-free electrolyte is the rate-determining step for the electrochemical switching, compared to the other electrochemical process, and the high σ of the leakage-free electrolyte is the key factor for the development of the non-volatile SrCoOx-based electro-magnetic phase switching device.

  8. SONOS technology for commercial and military nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Adams, D.; Farrell, P.; Jacunski, M.; Williams, D.; Jakubczak, J.; Knoll, M.; Murray, J.

    Silicon Oxide Nitride Oxide Semiconductor (SONOS) technology is well suited for military and commercial nonvolatile memory applications. Excellent long term memory retention, radiation hardness, and endurance has been demonstrated with this technology. This paper summarizes our data in these areas for SONOS technology.

  9. Capacitance-voltage measurement in memory devices using ferroelectric polymer

    NASA Astrophysics Data System (ADS)

    Nguyen, Chien A.; Lee, Pooi See

    2006-01-01

    Application of thin polymer film as storing mean for non-volatile memory devices is investigated. Capacitance-voltage (C-V) measurement of metal-ferroelectric-metal device using ferroelectric copolymer P(VDF-TrFE) as dielectric layer shows stable 'butter-fly' curve. The two peaks in C-V measurement corresponding to the largest capacitance are coincidental at the coercive voltages that give rise to zero polarization in the polarization hysteresis measurement. By comparing data of C-V and P-E measurement, a correlation between two types of hysteresis is established in which it reveals simultaneous electrical processes occurring inside the device. These processes are caused by the response of irreversible and reversible polarization to the applied electric field that can be used to present a memory window. The memory effect of ferroelectric copolymer is further demonstrated for fabricating polymeric non-volatile memory devices using metal-ferroelectric-insulator-semiconductor structure (MFIS). By applying different sweeping voltages at the gate, bidirectional flat-band voltage shift is observed in the ferroelectric capacitor. The asymmetrical shift after negative sweeping is resulted from charge accumulation at the surface of Si substrate caused by the dipole direction in the polymer layer. The effect is reversed for positive voltage sweeping.

  10. A graphene-based non-volatile memory

    NASA Astrophysics Data System (ADS)

    Loisel, Loïc.; Maurice, Ange; Lebental, Bérengère; Vezzoli, Stefano; Cojocaru, Costel-Sorin; Tay, Beng Kang

    2015-09-01

    We report on the development and characterization of a simple two-terminal non-volatile graphene switch. After an initial electroforming step during which Joule heating leads to the formation of a nano-gap impeding the current flow, the devices can be switched reversibly between two well-separated resistance states. To do so, either voltage sweeps or pulses can be used, with the condition that VSET < VRESET , where SET is the process decreasing the resistance and RESET the process increasing the resistance. We achieve reversible switching on more than 100 cycles with resistance ratio values of 104. This approach of graphene memory is competitive as compared to other graphene approaches such as redox of graphene oxide, or electro-mechanical switches with suspended graphene. We suggest a switching model based on a planar electro-mechanical switch, whereby electrostatic, elastic and friction forces are competing to switch devices ON and OFF, and the stability in the ON state is achieved by the formation of covalent bonds between the two stretched sides of the graphene, hence bridging the nano-gap. Developing a planar electro-mechanical switch enables to obtain the advantages of electro-mechanical switches while avoiding most of their drawbacks.

  11. A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

    NASA Astrophysics Data System (ADS)

    Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

    2016-06-01

    The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

  12. Microwave-Assisted Size Control of Colloidal Nickel Nanocrystals for Colloidal Nanocrystals-Based Non-volatile Memory Devices

    NASA Astrophysics Data System (ADS)

    Yadav, Manoj; Velampati, Ravi Shankar R.; Mandal, D.; Sharma, Rohit

    2018-03-01

    Colloidal synthesis and size control of nickel (Ni) nanocrystals (NCs) below 10 nm are reported using a microwave synthesis method. The synthesised colloidal NCs have been characterized using x-ray diffraction, transmission electron microscopy (TEM) and dynamic light scattering (DLS). XRD analysis highlights the face centred cubic crystal structure of synthesised NCs. The size of NCs observed using TEM and DLS have a distribution between 2.6 nm and 10 nm. Furthermore, atomic force microscopy analysis of spin-coated NCs over a silicon dioxide surface has been carried out to identify an optimum spin condition that can be used for the fabrication of a metal oxide semiconductor (MOS) non-volatile memory (NVM) capacitor. Subsequently, the fabrication of a MOS NVM capacitor is reported to demonstrate the potential application of colloidal synthesized Ni NCs in NVM devices. We also report the capacitance-voltage (C-V) and capacitance-time (C-t) response of the fabricated MOS NVM capacitor. The C-V and C-t characteristics depict a large flat band voltage shift (V FB) and high retention time, respectively, which indicate that colloidal Ni NCs are excellent candidates for applications in next-generation NVM devices.

  13. Self-assembled phase-change nanowire for nonvolatile electronic memory

    NASA Astrophysics Data System (ADS)

    Jung, Yeonwoong

    One of the most important subjects in nanosciences is to identify and exploit the relationship between size and structural/physical properties of materials and to explore novel material properties at a small-length scale. Scale-down of materials is not only advantageous in realizing miniaturized devices but nanometer-sized materials often exhibit intriguing physical/chemical properties that greatly differ from their bulk counterparts. This dissertation studies self-assembled phase-change nanowires for future nonvolatile electronic memories, mainly focusing on their size-dependent memory switching properties. Owing to the one-dimensional, unique geometry coupled with the small and tunable sizes, bottom-designed nanowires offer great opportunities in terms for both fundamental science and practical engineering perspectives, which would be difficult to realize in conventional top-down based approaches. We synthesized chalcogenide phase-change nanowires of different compositions and sizes, and studied their electronic memory switching owing to the structural change between crystalline and amorphous phases. In particular, we investigated nanowire size-dependent memory switching parameters, including writing current, power consumption, and data retention times, as well as studying composition-dependent electronic properties. The observed size and composition-dependent switching and recrystallization kinetics are explained based on the heat transport model and heterogeneous nucleation theories, which help to design phase-change materials with better properties. Moreover, we configured unconventional heterostructured phase-change nanowire memories and studied their multiple memory states in single nanowire devices. Finally, by combining in-situ/ex-situ electron microscopy techniques and electrical measurements, we characterized the structural states involved in electrically-driven phase-change in order to understand the atomistic mechanism that governs the electronic

  14. Physical implication of transition voltage in organic nano-floating-gate nonvolatile memories

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wang, Shun; Gao, Xu, E-mail: wangsd@suda.edu.cn, E-mail: gaoxu@suda.edu.cn; Zhong, Ya-Nan

    High-performance pentacene-based organic field-effect transistor nonvolatile memories, using polystyrene as a tunneling dielectric and Au nanoparticles as a nano-floating-gate, show parallelogram-like transfer characteristics with a featured transition point. The transition voltage at the transition point corresponds to a threshold electric field in the tunneling dielectric, over which stored electrons in the nano-floating-gate will start to leak out. The transition voltage can be modulated depending on the bias configuration and device structure. For p-type active layers, optimized transition voltage should be on the negative side of but close to the reading voltage, which can simultaneously achieve a high ON/OFF ratio andmore » good memory retention.« less

  15. Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

    NASA Astrophysics Data System (ADS)

    Riente, Fabrizio; Ziemys, Grazvydas; Mattersdorfer, Clemens; Boche, Silke; Turvani, Giovanna; Raberg, Wolfgang; Luber, Sebastian; Breitkreutz-v. Gamm, Stephan

    2017-05-01

    Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML) is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

  16. Nonvolatile GaAs Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan

    1994-01-01

    Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.

  17. Radiation and Reliability Concerns for Modern Nonvolatile Memory Technology

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Friendlich, Mark R.; Kim, Hak S.; Berg, Melanie D.; LaBel, Kenneth A.; Buchner, S. P.; McMorrow, D.; Mavis, D. G.; Eaton, P. H.; Castillo, J.

    2011-01-01

    Commercial nonvolatile memory technology is attractive for space applications, but radiation issues are serious concerns. In addition, we discuss combined radiation/reliability concerns which are only beginning to be addressed.

  18. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    NASA Astrophysics Data System (ADS)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-04-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  19. A New Concept for Non-Volatile Memory: The Electric-Pulse Induced Resistive Change Effect in Colossal Magnetoresistive Thin Films

    NASA Technical Reports Server (NTRS)

    Liu, S. Q.; Wu, N. J.; Ignatiev, A.

    2001-01-01

    A novel electric pulse-induced resistive change (EPIR) effect has been found in thin film colossal magnetoresistive (CMR) materials, and has shown promise for the development of resistive, nonvolatile memory. The EPIR effect is induced by the application of low voltage (< 4 V) and short duration (< 20 ns) electrical pulses across a thin film sample of a CMR material at room temperature and under no applied magnetic field. The pulse can directly either increase or decrease the resistance of the thin film sample depending on pulse polarity. The sample resistance change has been shown to be over two orders of magnitude, and is nonvolatile after pulsing. The sample resistance can also be changed through multiple levels - as many as 50 have been shown. Such a device can provide a way for the development of a new kind of nonvolatile multiple-valued memory with high density, fast write/read speed, low power-consumption, and potential high radiation-hardness.

  20. Quantum Dot Gate Three-State and Nonvolatile Memory Field-Effect Transistors Using a ZnS/ZnMgS/ZnS Heteroepitaxial Stack as a Tunnel Insulator on Silicon-on-Insulator Substrates

    NASA Astrophysics Data System (ADS)

    Suarez, Ernesto; Chan, Pik-Yiu; Lingalugari, Murali; Ayers, John E.; Heller, Evan; Jain, Faquir

    2013-11-01

    This paper describes the use of II-VI lattice-matched gate insulators in quantum dot gate three-state and flash nonvolatile memory structures. Using silicon-on-insulator wafers we have fabricated GeO x -cladded Ge quantum dot (QD) floating gate nonvolatile memory field-effect transistor devices using ZnS-Zn0.95Mg0.05S-ZnS tunneling layers. The II-VI heteroepitaxial stack is nearly lattice-matched and is grown using metalorganic chemical vapor deposition on a silicon channel. This stack reduces the interface state density, improving threshold voltage variation, particularly in sub-22-nm devices. Simulations using self-consistent solutions of the Poisson and Schrödinger equations show the transfer of charge to the QD layers in three-state as well as nonvolatile memory cells.

  1. Forced Ion Migration for Chalcogenide Phase Change Memory Device

    NASA Technical Reports Server (NTRS)

    Campbell, Kristy A (Inventor)

    2013-01-01

    Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

  2. A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

    NASA Technical Reports Server (NTRS)

    Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

    2001-01-01

    Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

  3. Solution-processed flexible NiO resistive random access memory device

    NASA Astrophysics Data System (ADS)

    Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon

    2018-04-01

    Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).

  4. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

    1998-01-01

    An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

  5. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

    2000-01-01

    An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

  6. High-performance black phosphorus top-gate ferroelectric transistor for nonvolatile memory applications

    NASA Astrophysics Data System (ADS)

    Lee, Young Tack; Hwang, Do Kyung; Choi, Won Kook

    2016-10-01

    Two-dimensional (2D) van der Waals (vdW) atomic crystals have been extensively studied and significant progress has been made. The newest 2D vdW material, called black phosphorus (BP), has attracted considerable attention due to its unique physical properties, such as its being a singlecomponent material like graphene, and its having a high mobility and direct band gap. Here, we report on a high-performance BP nanosheet based ferroelectric field effect transistor (FeFET) with a poly(vinylidenefluoride-trifluoroethylene) top-gate insulator for a nonvolatile memory application. The BP FeFETs show the highest linear hole mobility of 563 cm2/Vs and a clear memory window of more than 15 V. For more advanced nonvolatile memory circuit applications, two different types of resistive-load and complementary ferroelectric memory inverters were implemented, which showed distinct memory on/off switching characteristics.

  7. Organic memory device with self-assembly monolayered aptamer conjugated nanoparticles

    NASA Astrophysics Data System (ADS)

    Oh, Sewook; Kim, Minkeun; Kim, Yejin; Jung, Hunsang; Yoon, Tae-Sik; Choi, Young-Jin; Jung Kang, Chi; Moon, Myeong-Ju; Jeong, Yong-Yeon; Park, In-Kyu; Ho Lee, Hyun

    2013-08-01

    An organic memory structure using monolayered aptamer conjugated gold nanoparticles (Au NPs) as charge storage nodes was demonstrated. Metal-pentacene-insulator-semiconductor device was adopted for the non-volatile memory effect through self assembly monolayer of A10-aptamer conjugated Au NPs, which was formed on functionalized insulator surface with prostate-specific membrane antigen protein. The capacitance versus voltage (C-V) curves obtained for the monolayered Au NPs capacitor exhibited substantial flat-band voltage shift (ΔVFB) or memory window of 3.76 V under (+/-)7 V voltage sweep. The memory device format can be potentially expanded to a highly specific capacitive sensor for the aptamer-specific biomolecule detection.

  8. Printed dose-recording tag based on organic complementary circuits and ferroelectric nonvolatile memories

    PubMed Central

    Nga Ng, Tse; Schwartz, David E.; Mei, Ping; Krusor, Brent; Kor, Sivkheng; Veres, Janos; Bröms, Per; Eriksson, Torbjörn; Wang, Yong; Hagel, Olle; Karlsson, Christer

    2015-01-01

    We have demonstrated a printed electronic tag that monitors time-integrated sensor signals and writes to nonvolatile memories for later readout. The tag is additively fabricated on flexible plastic foil and comprises a thermistor divider, complementary organic circuits, and two nonvolatile memory cells. With a supply voltage below 30 V, the threshold temperatures can be tuned between 0 °C and 80 °C. The time-temperature dose measurement is calibrated for minute-scale integration. The two memory bits are sequentially written in a thermometer code to provide an accumulated dose record. PMID:26307438

  9. Nanopatterned ferroelectrics for ultrahigh density rad-hard nonvolatile memories.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Brennecka, Geoffrey L.; Stevens, Jeffrey; Scrymgeour, David

    2010-09-01

    Radiation hard nonvolatile random access memory (NVRAM) is a crucial component for DOE and DOD surveillance and defense applications. NVRAMs based upon ferroelectric materials (also known as FERAMs) are proven to work in radiation-rich environments and inherently require less power than many other NVRAM technologies. However, fabrication and integration challenges have led to state-of-the-art FERAMs still being fabricated using a 130nm process while competing phase-change memory (PRAM) has been demonstrated with a 20nm process. Use of block copolymer lithography is a promising approach to patterning at the sub-32nm scale, but is currently limited to self-assembly directly on Si or SiO{submore » 2} layers. Successful integration of ferroelectrics with discrete and addressable features of {approx}15-20nm would represent a 100-fold improvement in areal memory density and would enable more highly integrated electronic devices required for systems advances. Towards this end, we have developed a technique that allows us to carry out block copolymer self-assembly directly on a huge variety of different materials and have investigated the fabrication, integration, and characterization of electroceramic materials - primarily focused on solution-derived ferroelectrics - with discrete features of {approx}20nm and below. Significant challenges remain before such techniques will be capable of fabricating fully integrated NVRAM devices, but the tools developed for this effort are already finding broader use. This report introduces the nanopatterned NVRAM device concept as a mechanism for motivating the subsequent studies, but the bulk of the document will focus on the platform and technology development.« less

  10. Three-terminal resistive switching memory in a transparent vertical-configuration device

    NASA Astrophysics Data System (ADS)

    Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

    2014-01-01

    The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies.

  11. High performance non-volatile ferroelectric copolymer memory based on a ZnO nanowire transistor fabricated on a transparent substrate

    NASA Astrophysics Data System (ADS)

    Nedic, Stanko; Tea Chun, Young; Hong, Woong-Ki; Chu, Daping; Welland, Mark

    2014-01-01

    A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ˜16.5 V, a high drain current on/off ratio of ˜105, a gate leakage current below ˜300 pA, and excellent retention characteristics for over 104 s.

  12. Forced ion migration for chalcogenide phase change memory device

    NASA Technical Reports Server (NTRS)

    Campbell, Kristy A. (Inventor)

    2011-01-01

    Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.

  13. Forced ion migration for chalcogenide phase change memory device

    NASA Technical Reports Server (NTRS)

    Campbell, Kristy A. (Inventor)

    2012-01-01

    Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

  14. Memory device using movement of protons

    DOEpatents

    Warren, W.L.; Vanheusden, K.J.R.; Fleetwood, D.M.; Devine, R.A.B.

    1998-11-03

    An electrically written memory element is disclosed utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element. 19 figs.

  15. Non-volatile magnetic random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

    1994-01-01

    Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

  16. Logic gates realized by nonvolatile GeTe/Sb2Te3 super lattice phase-change memory with a magnetic field input

    NASA Astrophysics Data System (ADS)

    Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui

    2016-07-01

    Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.

  17. In situ and nonvolatile photoluminescence tuning and nanodomain writing demonstrated by all-solid-state devices based on graphene oxide.

    PubMed

    Tsuchiya, Takashi; Tsuruoka, Tohru; Terabe, Kazuya; Aono, Masakazu

    2015-02-24

    In situ and nonvolatile tuning of photoluminescence (PL) has been achieved based on graphene oxide (GO), the PL of which is receiving much attention because of various potential applications of the oxide (e.g., display, lighting, and nano-biosensor). The technique is based on in situ and nonvolatile tuning of the sp(2) domain fraction to the sp(3) domain fraction (sp(2)/sp(3) fraction) in GO through an electrochemical redox reaction achieved by solid electrolyte thin films. The all-solid-state variable PL device was fabricated by GO and proton-conducting mesoporous SiO2 thin films, which showed an extremely low PL background. The device successfully tuned the PL peak wavelength in a very wide range from 393 to 712 nm, covering that for chemically tuned GO, by adjusting the applied DC voltage within several hundred seconds. We also demonstrate the sp(2)/sp(3) fraction tuning using a conductive atomic force microscope. The device achieved not only writing, but also erasing of the sp(2)/sp(3)-fraction-tuned nanodomain (both directions operation). The combination of these techniques is applicable to a wide range of nano-optoelectronic devices including nonvolatile PL memory devices and on-demand rewritable biosensors that can be integrated into nano- and microtips which are transparent, ultrathin, flexible, and inexpensive.

  18. Origami-based tunable truss structures for non-volatile mechanical memory operation.

    PubMed

    Yasuda, Hiromi; Tachi, Tomohiro; Lee, Mia; Yang, Jinkyu

    2017-10-17

    Origami has recently received significant interest from the scientific community as a method for designing building blocks to construct metamaterials. However, the primary focus has been placed on their kinematic applications by leveraging the compactness and auxeticity of planar origami platforms. Here, we present volumetric origami cells-specifically triangulated cylindrical origami (TCO)-with tunable stability and stiffness, and demonstrate their feasibility as non-volatile mechanical memory storage devices. We show that a pair of TCO cells can develop a double-well potential to store bit information. What makes this origami-based approach more appealing is the realization of two-bit mechanical memory, in which two pairs of TCO cells are interconnected and one pair acts as a control for the other pair. By assembling TCO-based truss structures, we experimentally verify the tunable nature of the TCO units and demonstrate the operation of purely mechanical one- and two-bit memory storage prototypes.Origami is a popular method to design building blocks for mechanical metamaterials. Here, the authors assemble a volumetric origami-based structure, predict its axial and rotational movements during folding, and demonstrate the operation of mechanical one- and two-bit memory storage.

  19. Bulk heterojunction polymer memory devices with reduced graphene oxide as electrodes.

    PubMed

    Liu, Juqing; Yin, Zongyou; Cao, Xiehong; Zhao, Fei; Lin, Anping; Xie, Linghai; Fan, Quli; Boey, Freddy; Zhang, Hua; Huang, Wei

    2010-07-27

    A unique device structure with a configuration of reduced graphene oxide (rGO) /P3HT:PCBM/Al has been designed for the polymer nonvolatile memory device. The current-voltage (I-V) characteristics of the fabricated device showed the electrical bistability with a write-once-read-many-times (WORM) memory effect. The memory device exhibits a high ON/OFF ratio (10(4)-10(5)) and low switching threshold voltage (0.5-1.2 V), which are dependent on the sheet resistance of rGO electrode. Our experimental results confirm that the carrier transport mechanisms in the OFF and ON states are dominated by the thermionic emission current and ohmic current, respectively. The polarization of PCBM domains and the localized internal electrical field formed among the adjacent domains are proposed to explain the electrical transition of the memory device.

  20. Evaluation of Recent Technologies of Nonvolatile RAM

    NASA Astrophysics Data System (ADS)

    Nuns, Thierry; Duzellier, Sophie; Bertrand, Jean; Hubert, Guillaume; Pouget, Vincent; Darracq, FrÉdÉric; David, Jean-Pierre; Soonckindt, Sabine

    2008-08-01

    Two types of recent nonvolatile random access memories (NVRAM) were evaluated for radiation effects: total dose and single event upset and latch-up under heavy ions and protons. Complementary irradiation with a laser beam provides information on sensitive areas of the devices.

  1. Blackcomb: Hardware-Software Co-design for Non-Volatile Memory in Exascale Systems

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Schreiber, Robert

    Summary of technical results of Blackcomb Memory Devices We explored various different memory technologies (STTRAM, PCRAM, FeRAM, and ReRAM). The progress can be classified into three categories, below. Modeling and Tool Releases Various modeling tools have been developed over the last decade to help in the design of SRAM or DRAM-based memory hierarchies. To explore new design opportunities that NVM technologies can bring to the designers, we have developed similar high-level models for NVM, including PCRAMsim [Dong 2009], NVSim [Dong 2012], and NVMain [Poremba 2012]. NVSim is a circuit-level model for NVM performance, energy, and area estimation, which supports variousmore » NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies. On the other side, NVMain is a cycle accurate main memory simulator designed to simulate emerging nonvolatile memories at the architectural level. We have released these models as open source tools and provided contiguous support to them. We also proposed PS3-RAM, which is a fast, portable and scalable statistical STT-RAM reliability analysis model [Wen 2012]. Design Space Exploration and Optimization With the support of these models, we explore different device/circuit optimization techniques. For example, in [Niu 2012a] we studied the power reduction technique for the application of ECC scheme in ReRAM designs and proposed to use ECC code to relax the BER (Bit Error Rate) requirement of a single memory to improve the write energy consumption and latency for both 1T1R and cross-point ReRAM designs. In [Xu 2011], we proposed a methodology to design STT-RAM for different optimization goals such as read performance, write performance and write energy by leveraging the trade-off between write current and write time of MTJ. We also studied the tradeoffs in building a reliable

  2. Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors

    NASA Astrophysics Data System (ADS)

    Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu

    2012-02-01

    Through the structural modification of a three-dimensional silicon nanowire field-effect transistor, i.e., a double-gate FinFET, a structural platform was developed which allowed for us to utilize graphene oxide (GO) as a charge trapping layer in a nonvolatile memory device. By creating a nanogap between the gate and the channel, GO was embedded after the complete device fabrication. By applying a proper gate voltage, charge trapping, and de-trapping within the GO was enabled and resulted in large threshold voltage shifts. The employment of GO with FinFET in our work suggests that graphitic materials can potentially play a significant role for future nanoelectronic applications.

  3. Robust resistive memory devices using solution-processable metal-coordinated azo aromatics

    NASA Astrophysics Data System (ADS)

    Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.

    2017-12-01

    Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (<=30 ns), excellent endurance (~1012 cycles), stability (>106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.

  4. Electrically Variable Resistive Memory Devices

    NASA Technical Reports Server (NTRS)

    Liu, Shangqing; Wu, Nai-Juan; Ignatiev, Alex; Charlson, E. J.

    2010-01-01

    Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

  5. Coexistence of diode-like volatile and multilevel nonvolatile resistive switching in a ZrO2/TiO2 stack structure.

    PubMed

    Li, Yingtao; Yuan, Peng; Fu, Liping; Li, Rongrong; Gao, Xiaoping; Tao, Chunlan

    2015-10-02

    Diode-like volatile resistive switching as well as nonvolatile resistive switching behaviors in a Cu/ZrO₂/TiO₂/Ti stack are investigated. Depending on the current compliance during the electroforming process, either volatile resistive switching or nonvolatile resistive switching is observed. With a lower current compliance (<10 μA), the Cu/ZrO₂/TiO₂/Ti device exhibits diode-like volatile resistive switching with a rectifying ratio over 10(6). The permanent transition from volatile to nonvolatile resistive switching can be obtained by applying a higher current compliance of 100 μA. Furthermore, by using different reset voltages, the Cu/ZrO₂/TiO₂/Ti device exhibits multilevel memory characteristics with high uniformity. The coexistence of nonvolatile multilevel memory and diode-like volatile resistive switching behaviors in the same Cu/ZrO₂/TiO₂/Ti device opens areas of applications in high-density storage, logic circuits, neural networks, and passive crossbar memory selectors.

  6. Electric-field-controlled interface dipole modulation for Si-based memory devices.

    PubMed

    Miyata, Noriyuki

    2018-05-31

    Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.

  7. An Investigation of Quantum Dot Super Lattice Use in Nonvolatile Memory and Transistors

    NASA Astrophysics Data System (ADS)

    Mirdha, P.; Parthasarathy, B.; Kondo, J.; Chan, P.-Y.; Heller, E.; Jain, F. C.

    2018-02-01

    Site-specific self-assembled colloidal quantum dots (QDs) will deposit in two layers only on p-type substrate to form a QD superlattice (QDSL). The QDSL structure has been integrated into the floating gate of a nonvolatile memory component and has demonstrated promising results in multi-bit storage, ease of fabrication, and memory retention. Additionally, multi-valued logic devices and circuits have been created by using QDSL structures which demonstrated ternary and quaternary logic. With increasing use of site-specific self-assembled QDSLs, fundamental understanding of silicon and germanium QDSL charge storage capability, self-assembly on specific surfaces, uniform distribution, and mini-band formation has to be understood for successful implementation in devices. In this work, we investigate the differences in electron charge storage by building metal-oxide semiconductor (MOS) capacitors and using capacitance and voltage measurements to quantify the storage capabilities. The self-assembly process and distribution density of the QDSL is done by obtaining atomic force microscopy (AFM) results on line samples. Additionally, we present a summary of the theoretical density of states in each of the QDSLs.

  8. Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

    PubMed

    Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

    2015-03-04

    Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

  9. Transparent photostable ZnO nonvolatile memory transistor with ferroelectric polymer and sputter-deposited oxide gate

    NASA Astrophysics Data System (ADS)

    Park, C. H.; Im, Seongil; Yun, Jungheum; Lee, Gun Hwan; Lee, Byoung H.; Sung, Myung M.

    2009-11-01

    We report on the fabrication of transparent top-gate ZnO nonvolatile memory thin-film transistors (NVM-TFTs) with 200 nm thick poly(vinylidene fluoride/trifluoroethylene) ferroelectric layer; semitransparent 10 nm thin AgOx and transparent 130 nm thick indium-zinc oxide (IZO) were deposited on the ferroelectric polymer as gate electrode by rf sputtering. Our semitransparent NVM-TFT with AgOx gate operates under low voltage write-erase (WR-ER) pulse of ±20 V, but shows some degradation in retention property. In contrast, our transparent IZO-gated device displays very good retention properties but requires anomalously higher pulse of ±70 V for WR and ER states. Both devices stably operated under visible illuminations.

  10. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.; Archer, Leo B.; Brown, George A.; Wallace, Robert M.

    2000-01-01

    An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.

  11. Integrated, nonvolatile, high-speed analog random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

    1994-01-01

    This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

  12. Bipolar resistive switching in Cu/AlN/Pt nonvolatile memory device

    NASA Astrophysics Data System (ADS)

    Chen, C.; Yang, Y. C.; Zeng, F.; Pan, F.

    2010-08-01

    Highly stable and reproducible bipolar resistive switching effects are reported on Cu/AlN/Pt devices. Memory characteristics including large memory window of 103, long retention time of >106 s and good endurance of >103 were demonstrated. It is concluded that the reset current decreases as compliance current decreases, which provides an approach to suppress power consumption. The dominant conduction mechanisms of low resistance state and high resistance state were verified by Ohmic behavior and trap-controlled space charge limited current, respectively. The memory effect is explained by the model concerning redox reaction mediated formation and rupture of the conducting filament in AlN films.

  13. A graphene integrated highly transparent resistive switching memory device

    NASA Astrophysics Data System (ADS)

    Dugu, Sita; Pavunny, Shojan P.; Limbu, Tej B.; Weiner, Brad R.; Morell, Gerardo; Katiyar, Ram S.

    2018-05-01

    We demonstrate the hybrid fabrication process of a graphene integrated highly transparent resistive random-access memory (TRRAM) device. The indium tin oxide (ITO)/Al2O3/graphene nonvolatile memory device possesses a high transmittance of >82% in the visible region (370-700 nm) and exhibits stable and non-symmetrical bipolar switching characteristics with considerably low set and reset voltages (<±1 V). The vertical two-terminal device shows an excellent resistive switching behavior with a high on-off ratio of ˜5 × 103. We also fabricated a ITO/Al2O3/Pt device and studied its switching characteristics for comparison and a better understanding of the ITO/Al2O3/graphene device characteristics. The conduction mechanisms in high and low resistance states were analyzed, and the observed polarity dependent resistive switching is explained based on electro-migration of oxygen ions.

  14. Analogue spin-orbit torque device for artificial-neural-network-based associative memory operation

    NASA Astrophysics Data System (ADS)

    Borders, William A.; Akima, Hisanao; Fukami, Shunsuke; Moriya, Satoshi; Kurihara, Shouta; Horio, Yoshihiko; Sato, Shigeo; Ohno, Hideo

    2017-01-01

    We demonstrate associative memory operations reminiscent of the brain using nonvolatile spintronics devices. Antiferromagnet-ferromagnet bilayer-based Hall devices, which show analogue-like spin-orbit torque switching under zero magnetic fields and behave as artificial synapses, are used. An artificial neural network is used to associate memorized patterns from their noisy versions. We develop a network consisting of a field-programmable gate array and 36 spin-orbit torque devices. An effect of learning on associative memory operations is successfully confirmed for several 3 × 3-block patterns. A discussion on the present approach for realizing spintronics-based artificial intelligence is given.

  15. Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2010

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.

    2010-01-01

    High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) and multi-level cell (MLC) NAND flash memories manufactured by Micron Technology.

  16. Highly Stretchable Non-volatile Nylon Thread Memory

    NASA Astrophysics Data System (ADS)

    Kang, Ting-Kuo

    2016-04-01

    Integration of electronic elements into textiles, to afford e-textiles, can provide an ideal platform for the development of lightweight, thin, flexible, and stretchable e-textiles. This approach will enable us to meet the demands of the rapidly growing market of wearable-electronics on arbitrary non-conventional substrates. However the actual integration of the e-textiles that undergo mechanical deformations during both assembly and daily wear or satisfy the requirements of the low-end applications, remains a challenge. Resistive memory elements can also be fabricated onto a nylon thread (NT) for e-textile applications. In this study, a simple dip-and-dry process using graphene-PEDOT:PSS (poly(3,4-ethylenedioxythiophene) polystyrene sulfonate) ink is proposed for the fabrication of a highly stretchable non-volatile NT memory. The NT memory appears to have typical write-once-read-many-times characteristics. The results show that an ON/OFF ratio of approximately 103 is maintained for a retention time of 106 s. Furthermore, a highly stretchable strain and a long-term digital-storage capability of the ON-OFF-ON states are demonstrated in the NT memory. The actual integration of the knitted NT memories into textiles will enable new design possibilities for low-cost and large-area e-textile memory applications.

  17. Nonvolatile gate effect in a ferroelectric-semiconductor quantum well.

    PubMed

    Stolichnov, Igor; Colla, Enrico; Setter, Nava; Wojciechowski, Tomasz; Janik, Elzbieta; Karczewski, Grzegorz

    2006-12-15

    Field effect transistors with ferroelectric gates would make ideal rewritable nonvolatile memories were it not for the severe problems in integrating the ferroelectric oxide directly on the semiconductor channel. We propose a powerful way to avoid these problems using a gate material that is ferroelectric and semiconducting simultaneously. First, ferroelectricity in semiconductor (Cd,Zn)Te films is proven and studied using modified piezoforce scanning probe microscopy. Then, a rewritable field effect device is demonstrated by local poling of the (Cd,Zn)Te layer of a (Cd,Zn)Te/CdTe quantum well, provoking a reversible, nonvolatile change in the resistance of the 2D electron gas. The results point to a potential new family of nanoscale one-transistor memories.

  18. Nonvolatile reconfigurable sequential logic in a HfO2 resistive random access memory array.

    PubMed

    Zhou, Ya-Xiong; Li, Yi; Su, Yu-Ting; Wang, Zhuo-Rui; Shih, Ling-Yi; Chang, Ting-Chang; Chang, Kuan-Chang; Long, Shi-Bing; Sze, Simon M; Miao, Xiang-Shui

    2017-05-25

    Resistive random access memory (RRAM) based reconfigurable logic provides a temporal programmable dimension to realize Boolean logic functions and is regarded as a promising route to build non-von Neumann computing architecture. In this work, a reconfigurable operation method is proposed to perform nonvolatile sequential logic in a HfO 2 -based RRAM array. Eight kinds of Boolean logic functions can be implemented within the same hardware fabrics. During the logic computing processes, the RRAM devices in an array are flexibly configured in a bipolar or complementary structure. The validity was demonstrated by experimentally implemented NAND and XOR logic functions and a theoretically designed 1-bit full adder. With the trade-off between temporal and spatial computing complexity, our method makes better use of limited computing resources, thus provides an attractive scheme for the construction of logic-in-memory systems.

  19. The floating-gate non-volatile semiconductor memory--from invention to the digital age.

    PubMed

    Sze, S M

    2012-10-01

    In the past 45 years (from 1967 to 2012), the non-volatile semiconductor memory (NVSM) has emerged from a floating-gate concept to the prime technology driver of the largest industry in the world-the electronics industry. In this paper, we briefly review the historical development of NVSM and project its future trends to the year 2020. In addition, we consider NVSM's wide-range of applications from the digital cellular phone to tablet computer to digital television. As the device dimension is scaled down to the deca-nanometer regime, we expect that many innovations will be made to meet the scaling challenges, and NVSM-inspired technology will continue to enrich and improve our lives for decades to come.

  20. A study on carbon nanotube bridge as a electromechanical memory device

    NASA Astrophysics Data System (ADS)

    Kang, Jeong Won; Ha Lee, Jun; Joo Lee, Hoong; Hwang, Ho Jung

    2005-04-01

    A nanoelectromechanical (NEM) nanotube random access memory (NRAM) device based on carbon nanotube (CNT) was investigated using atomistic simulations. For the CNT-based NEM memory, the mechanical properties of the CNT-bridge and van der Waals interactions between the CNT-bridge and substrate were very important. The critical amplitude of the CNT-bridge was 16% of the length of the CNT-bridge. As molecular dynamics time increased, the CNT-bridge went to the steady state under the electrostatic force with the damping of the potential and the kinetic energies of the CNT-bridge. The interatomic interaction between the CNT-bridge and substrate, value of the CNT-bridge slack, and damping rate of the CNT-bridge were very important for the operation of the NEM memory device as a nonvolatile memory.

  1. Fabrication and electrical characterization of a MOS memory device containing self-assembled metallic nanoparticles

    NASA Astrophysics Data System (ADS)

    Sargentis, Ch.; Giannakopoulos, K.; Travlos, A.; Tsamakis, D.

    2007-04-01

    Floating gate devices with nanoparticles embedded in dielectrics have recently attracted much attention due to the fact that these devices operate as non-volatile memories with high speed, high density and low power consumption. In this paper, memory devices containing gold (Au) nanoparticles have been fabricated using e-gun evaporation. The Au nanoparticles are deposited on a very thin SiO 2 layer and are then fully covered by a HfO 2 layer. The HfO 2 is a high- k dielectric and gives good scalability to the fabricated devices. We studied the effect of the deposition parameters to the size and the shape of the Au nanoparticles using capacitance-voltage and conductance-voltage measurements, we demonstrated that the fabricated device can indeed operate as a low-voltage memory device.

  2. Multilevel non-volatile data storage utilizing common current hysteresis of networked single walled carbon nanotubes

    NASA Astrophysics Data System (ADS)

    Hwang, Ihn; Wang, Wei; Hwang, Sun Kak; Cho, Sung Hwan; Kim, Kang Lib; Jeong, Beomjin; Huh, June; Park, Cheolmin

    2016-05-01

    The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the NSWNT channel serves as an efficient gate voltage dependent charge trapping and de-trapping site. A systematic investigation evidences that the water mixed in a polymer passivation solution is critical for reliable non-volatile memory operation. The optimized device is air-stable and temperature-resistive up to 80 °C and exhibits excellent non-volatile memory performance with an on/off current ratio greater than 104, a switching time less than 100 ms, data retention longer than 4000 s, and write/read endurance over 100 cycles. Furthermore, the gate voltage dependent charge injection mediated by water in the passivation layer allowed for multilevel operation of our memory in which 4 distinct current states were programmed repetitively and preserved over a long time period.The characteristic source-drain current hysteresis frequently observed in field-effect transistors with networked single walled carbon-nanotube (NSWNT) channels is problematic for the reliable switching and sensing performance of devices. But the two distinct current states of the hysteresis curve at a zero gate voltage can be useful for memory applications. In this work, we demonstrate a novel non-volatile transistor memory with solution-processed NSWNTs which are suitable for multilevel data programming and reading. A polymer passivation layer with a small amount of water employed on the top of the

  3. Electrical Bistabilities and Conduction Mechanisms of Nonvolatile Memories Based on a Polymethylsilsesquioxane Insulating Layer Containing CdSe/ZnS Quantum Dots

    NASA Astrophysics Data System (ADS)

    Ma, Zehao; Ooi, Poh Choon; Li, Fushan; Yun, Dong Yeol; Kim, Tae Whan

    2015-10-01

    Nonvolatile memory (NVM) devices based on a metal-insulator-metal structure consisting of CdSe/ZnS quantum dots embedded in polymethylsilsesquioxane dielectric layers were fabricated. The current-voltage ( I- V) curves showed a bistable current behavior and the presence of hysteresis. The current-time ( I- t) curves showed that the fabricated NVM memory devices were stable up to 1 × 104 s with a distinct ON/OFF ratio of 104 and were reprogrammable when the endurance test was performed. The extrapolation of the I- t curve to 105 s with corresponding current ON/OFF ratio 1 × 105 indicated a long performance stability of the NVM devices. Schottky emission, Poole-Frenkel emission, trapped-charge limited-current and Child-Langmuir law were proposed as the dominant conduction mechanisms for the fabricated NVM devices based on the obtained I- V characteristics.

  4. Radiation Tests of Highly scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories--Update 2011

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.

    2011-01-01

    High-density, commercial, nonvolatile flash memories with NAND architecture are now available from several manufacturers. This report examines SEE effects and TID response in single-level cell (SLC) 32Gb and multi-level cell (MLC) 64Gb NAND flash memories manufactured by Micron Technology.

  5. Inkjet-printing of non-volatile organic resistive devices and crossbar array structures

    NASA Astrophysics Data System (ADS)

    Sax, Stefan; Nau, Sebastian; Popovic, Karl; Bluemel, Alexander; Klug, Andreas; List-Kratochvil, Emil J. W.

    2015-09-01

    Due to the increasing demand for storage capacity in various electronic gadgets like mobile phones or tablets, new types of non-volatile memory devices have gained a lot of attention over the last few years. Especially multilevel conductance switching elements based on organic semiconductors are of great interest due to their relatively simple device architecture and their small feature size. Since organic semiconductors combine the electronic properties of inorganic materials with the mechanical characteristics of polymers, this class of materials is suitable for solution based large area device preparation techniques. Consequently, inkjet based deposition techniques are highly capable of facing preparation related challenges. By gradually replacing the evaporated electrodes with inkjet printed silver, the preparation related influence onto device performance parameters such as the ON/OFF ratio was investigated with IV measurements and high resolution transmission electron microscopy. Due to the electrode surface roughness the solvent load during the printing of the top electrode as well as organic layer inhomogeneity's the utilization in array applications is hampered. As a prototypical example a 1diode-1resistor element and a 2×2 subarray from 5×5 array matrix were fully characterized demonstrating the versatility of inkjet printing for device preparation.

  6. Nonvolatile Memory Materials for Neuromorphic Intelligent Machines.

    PubMed

    Jeong, Doo Seok; Hwang, Cheol Seong

    2018-04-18

    Recent progress in deep learning extends the capability of artificial intelligence to various practical tasks, making the deep neural network (DNN) an extremely versatile hypothesis. While such DNN is virtually built on contemporary data centers of the von Neumann architecture, physical (in part) DNN of non-von Neumann architecture, also known as neuromorphic computing, can remarkably improve learning and inference efficiency. Particularly, resistance-based nonvolatile random access memory (NVRAM) highlights its handy and efficient application to the multiply-accumulate (MAC) operation in an analog manner. Here, an overview is given of the available types of resistance-based NVRAMs and their technological maturity from the material- and device-points of view. Examples within the strategy are subsequently addressed in comparison with their benchmarks (virtual DNN in deep learning). A spiking neural network (SNN) is another type of neural network that is more biologically plausible than the DNN. The successful incorporation of resistance-based NVRAM in SNN-based neuromorphic computing offers an efficient solution to the MAC operation and spike timing-based learning in nature. This strategy is exemplified from a material perspective. Intelligent machines are categorized according to their architecture and learning type. Also, the functionality and usefulness of NVRAM-based neuromorphic computing are addressed. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. Direct probing of electron and hole trapping into nano-floating-gate in organic field-effect transistor nonvolatile memories

    NASA Astrophysics Data System (ADS)

    Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin; Chi, Li-Feng; Wang, Sui-Dong

    2015-03-01

    Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.

  8. Highly stable, extremely high-temperature, nonvolatile memory based on resistance switching in polycrystalline Pt nanogaps

    PubMed Central

    Suga, Hiroshi; Suzuki, Hiroya; Shinomura, Yuma; Kashiwabara, Shota; Tsukagoshi, Kazuhito; Shimizu, Tetsuo; Naitoh, Yasuhisa

    2016-01-01

    Highly stable, nonvolatile, high-temperature memory based on resistance switching was realized using a polycrystalline platinum (Pt) nanogap. The operating temperature of the memory can be drastically increased by the presence of a sharp-edged Pt crystal facet in the nanogap. A short distance between the facet edges maintains the nanogap shape at high temperature, and the sharp shape of the nanogap densifies the electric field to maintain a stable current flow due to field migration. Even at 873 K, which is a significantly higher temperature than feasible for conventional semiconductor memory, the nonvolatility of the proposed memory allows stable ON and OFF currents, with fluctuations of less than or equal to 10%, to be maintained for longer than eight hours. An advantage of this nanogap scheme for high-temperature memory is its secure operation achieved through the assembly and disassembly of a Pt needle in a high electric field. PMID:27725705

  9. Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices

    NASA Astrophysics Data System (ADS)

    Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang

    2017-12-01

    Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.

  10. Status and Prospects of ZnO-Based Resistive Switching Memory Devices

    NASA Astrophysics Data System (ADS)

    Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen

    2016-08-01

    In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

  11. Piezoelectric control of magnetoelectric coupling driven non-volatile memory switching and self cooling effects in FE/FSMA multiferroic heterostructures

    NASA Astrophysics Data System (ADS)

    Singh, Kirandeep; Kaur, Davinder

    2017-02-01

    The manipulation of magnetic states and materials' spin degree-of-freedom via a control of an electric (E-) field has been recently pursued to develop magnetoelectric (ME) coupling-driven electronic data storage devices with high read/write endurance, fast dynamic response, and low energy dissipation. One major hurdle for this approach is to develop reliable materials which should be compatible with prevailing silicon (Si)-based complementary metal-oxide-semiconductor (CMOS) technology, simultaneously allowing small voltage for the tuning of magnetization switching. In this regard, multiferroic heterostructures where ferromagnetic (FM) and ferroelectric (FE) layers are alternatively grown on conventional Si substrates are promising as the piezoelectric control of magnetization switching is anticipated to be possible by an E-field. In this work, we study the ferromagnetic shape memory alloys based PbZr0.52Ti0.48O3/Ni50Mn35In15 (PZT/Ni-Mn-In) multiferroic heterostructures, and investigate their potential for CMOS compatible non-volatile magnetic data storage applications. We demonstrate the voltage-impulse controlled nonvolatile, reversible, and bistable magnetization switching at room temperature in Si-integrated PZT/Ni-Mn-In thin film multiferroic heterostructures. We also thoroughly unveil the various intriguing features in these materials, such as E-field tuned ME coupling and magnetocaloric effect, shape memory induced ferroelectric modulation, improved fatigue endurance as well as Refrigeration Capacity (RC). This comprehensive study suggests that these novel materials have a great potential for the development of unconventional nanoscale memory and refrigeration devices with self-cooling effect and enhanced refrigeration efficiency, thus providing a new venue for their applications.

  12. Ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory

    NASA Astrophysics Data System (ADS)

    Han, Jinhua; Wang, Wei; Ying, Jun; Xie, Wenfa

    2014-01-01

    An ambipolar organic thin-film transistor-based nano-floating-gate nonvolatile memory was demonstrated, with discrete distributed gold nanoparticles, tetratetracontane (TTC), pentacene as the floating-gate layer, tunneling layer, and active layer, respectively. The electron traps at the TTC/pentacene interface were significantly suppressed, which resulted in an ambipolar operation in present memory. As both electrons and holes were supplied in the channel and trapped in the floating-gate by programming/erasing operations, respectively, i.e., one type of charge carriers was used to overwrite the other, trapped, one, a large memory window, extending on both sides of the initial threshold voltage, was realized.

  13. Bipolar resistive switching in graphene oxide based metal insulator metal structure for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Singh, Rakesh; Kumar, Ravi; Kumar, Anil; Kashyap, Rajesh; Kumar, Mukesh; Kumar, Dinesh

    2018-05-01

    Graphene oxide based devices have attracted much attention recently because of their possible application in next generation electronic devices. In this study, bipolar resistive switching characteristics of graphene oxide based metal insulator metal structure were investigated for nonvolatile memories. The graphene oxide was prepared by the conventional Hummer's method and deposited on ITO coated glass by spin-coating technique. The dominant mechanism of resistive switching is the formation and rupture of the conductive filament inside the graphene oxide. The conduction mechanism for low and high resistance states are dominated by two mechanism the ohmic conduction and space charge limited current (SCLC) mechanism, respectively. Atomic Force Microscopy, X-ray diffraction, Cyclic-Voltammetry were conducted to observe the morphology, structure and behavior of the material. The fabricated device with Al/GO/ITO structure exhibited reliable bipolar resistive switching with set & reset voltage of -2.3 V and 3V respectively.

  14. Flash drive memory apparatus and method

    NASA Technical Reports Server (NTRS)

    Hinchey, Michael G. (Inventor)

    2010-01-01

    A memory apparatus includes a non-volatile computer memory, a USB mass storage controller connected to the non-volatile computer memory, the USB mass storage controller including a daisy chain component, a male USB interface connected to the USB mass storage controller, and at least one other interface for a memory device, other than a USB interface, the at least one other interface being connected to the USB mass storage controller.

  15. A room-temperature non-volatile CNT-based molecular memory cell

    NASA Astrophysics Data System (ADS)

    Ye, Senbin; Jing, Qingshen; Han, Ray P. S.

    2013-04-01

    Recent experiments with a carbon nanotube (CNT) system confirmed that the innertube can oscillate back-and-forth even under a room-temperature excitation. This demonstration of relative motion suggests that it is now feasible to build a CNT-based molecular memory cell (MC), and the key to bring the concept to reality is the precision control of the moving tube for sustained and reliable read/write (RW) operations. Here, we show that by using a 2-section outertube design, we are able to suitably recalibrate the system energetics and obtain the designed performance characteristics of a MC. Further, the resulting energy modification enables the MC to operate as a non-volatile memory element at room temperatures. Our paper explores a fundamental understanding of a MC and its response at the molecular level to roadmap a novel approach in memory technologies that can be harnessed to overcome the miniaturization limit and memory volatility in memory technologies.

  16. Impact of gate work-function on memory characteristics in Al2O3/HfOx/Al2O3/graphene charge-trap memory devices

    NASA Astrophysics Data System (ADS)

    Lee, Sejoon; Song, Emil B.; Kim, Sungmin; Seo, David H.; Seo, Sunae; Won Kang, Tae; Wang, Kang L.

    2012-01-01

    Graphene-based non-volatile memory devices composed of a single-layer graphene channel and an Al2O3/HfOx/Al2O3 charge-storage layer exhibit memory functionality. The impact of the gate material's work-function (Φ) on the memory characteristics is investigated using different types of metals [Ti (ΦTi = 4.3 eV) and Ni (ΦNi = 5.2 eV)]. The ambipolar carrier conduction of graphene results in an enlargement of memory window (ΔVM), which is ˜4.5 V for the Ti-gate device and ˜9.1 V for the Ni-gate device. The increase in ΔVM is attributed to the change in the flat-band condition and the suppression of electron back-injection within the gate stack.

  17. Development and characterization of a ferroelectric non-volatile memory for flexible electronics

    NASA Astrophysics Data System (ADS)

    Mao, Duo

    Flexible electronics have received significant attention recently because of the potential applications in displays, sensors, radio frequency identification (RFID) tags and other integrated circuits. Electrically addressable non-volatile memory is a key component for these applications. The major challenges are to fabricate the memory at a low temperature compatible with plastic substrates while maintaining good device reliability, by being compatible with process as needed to integrate with other electronic components for system-on-chip applications. In this work, ferroelectric capacitors fabricated at low temperature were developed. Based on that, a ferroelectric random access memory (FRAM) for flexible electronics was developed and characterized. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer was used as a ferroelectric material and a photolithographic process was developed to fabricate ferroelectric capacitors. Different characterization methods including atomic force microscopy, x-ray diffraction and Fourier-transform infrared reflection-absorption spectroscopy were used to study the material properties of the P(VDF-TrFE) film. The material properties were correlated with the electrical characteristics of the ferroelectric capacitors. To understand the polarization switching behavior of the P(VDF-TrFE) ferroelectric capacitors, a Nucleation-Limited-Switching (NLS) model was used to study the switching kinetics. The switching kinetics were characterized over the temperature range from -60 °C to 100 °C. Fatigue characteristics were studied at different electrical stress voltages and frequencies to evaluate the reliability of the ferroelectric capacitor. The degradation mechanism is attributed to the increase of the activation field and the suppression of the switchable polarization. To develop a FRAM circuit for flexible electronics, an n-channel thin film transistor (TFT) based on CdS as the semiconductor was integrated with a P

  18. High Performance Transparent Transistor Memory Devices Using Nano-Floating Gate of Polymer/ZnO Nanocomposites

    NASA Astrophysics Data System (ADS)

    Shih, Chien-Chung; Lee, Wen-Ya; Chiu, Yu-Cheng; Hsu, Han-Wen; Chang, Hsuan-Chun; Liu, Cheng-Liang; Chen, Wen-Chang

    2016-02-01

    Nano-floating gate memory devices (NFGM) using metal nanoparticles (NPs) covered with an insulating polymer have been considered as a promising electronic device for the next-generation nonvolatile organic memory applications NPs. However, the transparency of the device with metal NPs is restricted to 60~70% due to the light absorption in the visible region caused by the surface plasmon resonance effects of metal NPs. To address this issue, we demonstrate a novel NFGM using the blends of hole-trapping poly (9-(4-vinylphenyl) carbazole) (PVPK) and electron-trapping ZnO NPs as the charge storage element. The memory devices exhibited a remarkably programmable memory window up to 60 V during the program/erase operations, which was attributed to the trapping/detrapping of charge carriers in ZnO NPs/PVPK composite. Furthermore, the devices showed the long-term retention time (>105 s) and WRER test (>200 cycles), indicating excellent electrical reliability and stability. Additionally, the fabricated transistor memory devices exhibited a relatively high transparency of 90% at the wavelength of 500 nm based on the spray-coated PEDOT:PSS as electrode, suggesting high potential for transparent organic electronic memory devices.

  19. Non-exponential resistive switching in Ag2S memristors: a key to nanometer-scale non-volatile memory devices.

    PubMed

    Gubicza, Agnes; Csontos, Miklós; Halbritter, András; Mihály, György

    2015-03-14

    The dynamics of resistive switchings in nanometer-scale metallic junctions formed between an inert metallic tip and an Ag film covered by a thin Ag2S layer are investigated. Our thorough experimental analysis and numerical simulations revealed that the resistance change upon a switching bias voltage pulse exhibits a strongly non-exponential behaviour yielding markedly different response times at different bias levels. Our results demonstrate the merits of Ag2S nanojunctions as nanometer-scale non-volatile memory cells with stable switching ratios, high endurance as well as fast response to write/erase, and an outstanding stability against read operations at technologically optimal bias and current levels.

  20. Organic nonvolatile resistive memory devices based on thermally deposited Au nanoparticle

    NASA Astrophysics Data System (ADS)

    Jin, Zhiwen; Liu, Guo; Wang, Jizheng

    2013-05-01

    Uniform Au nanoparticles (NPs) are formed by thermally depositing nominal 2-nm thick Au film on a 10-nm thick polyimide film formed on a Al electrode, and then covered by a thin polymer semiconductor film, which acts as an energy barrier for electrons to be injected from the other Al electrode (on top of polymer film) into the Au NPs, which are energetically electron traps in such a resistive random access memory (RRAM) device. The Au NPs based RRAM device exhibits estimated retention time of 104 s, cycle times of more than 100, and ON-OFF ratio of 102 to 103. The carrier transport properties are also analyzed by fitting the measured I-V curves with several conduction models.

  1. Reversible Negative Resistive Switching in an Individual Fe@Al2O3 Hybrid Nanotube for Nonvolatile Memory.

    PubMed

    Ye, Yalong; Zhao, Jie; Xiao, Li; Cheng, Baochang; Xiao, Yanhe; Lei, Shuijin

    2018-06-06

    Hybrid nanostructures can show enormous potential in different areas because of their unique structural configurations. Herein, Fe@Al 2 O 3 hybrid nanotubes are constructed via a homogeneous coprecipitation method followed by subsequent annealing in a reducing atmosphere. The introduction of zero band gap Fe nanocrystals in the wall of ultrawide band gap Al 2 O 3 insulator nanotubes results in the formation of charge trap centers, and correspondingly a single hybrid nanotube-based two-terminal device can show reversible negative resistive switching (RS) characteristics with symmetrical negative differential resistance (NDR) at relatively high operation bias voltages. At a large bias voltage, holes and electrons can be injected into traps at two ends from electrodes, respectively, and then captured. The bias voltage dependence of asymmetrical filling of charges can lead to a reversible variation of built-in electromotive force, and therefore the symmetrical negative RS with NDR arises from two reversible back-to-back series bipolar RS. At a low readout voltage, the single Fe@Al 2 O 3 hybrid nanotube can show an excellent nonvolatile memory feature with a relatively large switching ratio of ∼30. The bias-governed reversible negative RS with superior stability, reversibility, nondestructive readout, and remarkable cycle performance makes it a potential candidate in next-generation erasable nonvolatile resistive random access memories.

  2. Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic

    NASA Astrophysics Data System (ADS)

    Yamamoto, Shuu'ichirou; Shuto, Yusuke; Sugahara, Satoshi

    2013-07-01

    We computationally analyzed performance and power-gating (PG) ability of a new nonvolatile delay flip-flop (NV-DFF) based on pseudo-spin-MOSFET (PS-MOSFET) architecture using spin-transfer-torque magnetic tunnel junctions (STT-MTJs). The high-performance energy-efficient PG operations of the NV-DFF can be achieved owing to its cell structure employing PS-MOSFETs that can electrically separate the STT-MTJs from the ordinary DFF part of the NV-DFF. This separation also makes it possible that the break-even time (BET) of the NV-DFF is designed by the size of the PS-MOSFETs without performance degradation of the normal DFF operations. The effect of the area occupation ratio of the NV-DFFs to a CMOS logic system on the BET was also analyzed. Although the optimized BET was varied depending on the area occupation ratio, energy-efficient fine-grained PG with a BET of several sub-microseconds was revealed to be achieved. We also proposed microprocessors and system-on-chip (SoC) devices using nonvolatile hierarchical-memory systems wherein NV-DFF and nonvolatile static random access memory (NV-SRAM) circuits are used as fundamental building blocks. Contribution to the Topical Issue “International Semiconductor Conference Dresden-Grenoble - ISCDG 2012”, Edited by Gérard Ghibaudo, Francis Balestra and Simon Deleonibus.

  3. Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications

    PubMed Central

    Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Priya, Shashank

    2015-01-01

    We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~106 s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062

  4. Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications

    NASA Astrophysics Data System (ADS)

    Jayanti, Srikant

    Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Integration of thin metal FGs and high-k dielectrics into a dual floating gate memory structure to result in both volatile and non-volatile modes of operation has been demonstrated, for plausible application in future unified memory architectures. The electrical characterization was performed on simple MIS/MIM and memory capacitors, fabricated through CMOS compatible processes. Various analytical characterization techniques were done to gain more insight into the material behavior of the layers in the device structure. In the first part of this study, interfacial engineering was investigated by exploring La2O3 as SiO2 scavenging layer. Through the silicate formation, the consumption of low-k SiO2 was controlled and resulted in a significant improvement in dielectric leakage. The performance improvement was also gauged through memory capacitors. In the second part of the study, a novel memory structure consisting of continuous metal FG

  5. BLACKCOMB2: Hardware-software co-design for non-volatile memory in exascale systems

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mudge, Trevor

    This work was part of a larger project, Blackcomb2, centered at Oak Ridge National Labs (Jeff Vetter PI) to investigate the opportunities for replacing or supplementing DRAM main memory with nonvolatile memory (NVmemory) in Exascale memory systems. The goal was to reduce the energy consumed by in future supercomputer memory systems and to improve their resiliency. Building on the accomplishments of the original Blackcomb Project, funded in 2010, the goal for Blackcomb2 was to identify, evaluate, and optimize the most promising emerging memory technologies, architecture hardware and software technologies, which are essential to provide the necessary memory capacity, performance, resilience,more » and energy efficiency in Exascale systems. Capacity and energy are the key drivers.« less

  6. Four-state non-volatile memory in a multiferroic spin filter tunnel junction

    NASA Astrophysics Data System (ADS)

    Ruan, Jieji; Li, Chen; Yuan, Zhoushen; Wang, Peng; Li, Aidong; Wu, Di

    2016-12-01

    We report a spin filter type multiferroic tunnel junction with a ferromagnetic/ferroelectric bilayer barrier. Memory functions of a spin filter magnetic tunnel junction and a ferroelectric tunnel junction are combined in this single device, producing four non-volatile resistive states that can be read out in a non-destructive manner. This concept is demonstrated in a LaNiO3/Pr0.8Ca0.2MnO3/BaTiO3/La0.7Sr0.3MnO3 all-oxide tunnel junction. The ferromagnetic insulator Pr0.8Ca0.2MnO3 serves as the spin filter and the ferromagnetic metal La0.7Sr0.3MnO3 is the spin analyzer. The ferroelectric polarization reversal in the BaTiO3 barrier switches the tunneling barrier height to produce a tunneling electroresistance. The ferroelectric switching also modulates the spin polarization and the spin filtering efficiency in Pr0.8Ca0.2MnO3.

  7. Garnet Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.

    1995-01-01

    Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.

  8. Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations.

    PubMed

    Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki

    2016-01-27

    Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.

  9. Graphene-ferroelectric metadevices for nonvolatile memory and reconfigurable logic-gate operations

    NASA Astrophysics Data System (ADS)

    Kim, Woo Young; Kim, Hyeon-Don; Kim, Teun-Teun; Park, Hyun-Sung; Lee, Kanghee; Choi, Hyun Joo; Lee, Seung Hoon; Son, Jaehyeon; Park, Namkyoo; Min, Bumki

    2016-01-01

    Memory metamaterials are artificial media that sustain transformed electromagnetic properties without persistent external stimuli. Previous memory metamaterials were realized with phase-change materials, such as vanadium dioxide or chalcogenide glasses, which exhibit memory behaviour with respect to electrically/optically induced thermal stimuli. However, they require a thermally isolated environment for longer retention or strong optical pump for phase-change. Here we demonstrate electrically programmable nonvolatile memory metadevices realised by the hybridization of graphene, a ferroelectric and meta-atoms/meta-molecules, and extend the concept further to establish reconfigurable logic-gate metadevices. For a memory metadevice having a single electrical input, amplitude, phase and even the polarization multi-states were clearly distinguishable with a retention time of over 10 years at room temperature. Furthermore, logic-gate functionalities were demonstrated with reconfigurable logic-gate metadevices having two electrical inputs, with each connected to separate ferroelectric layers that act as the multi-level controller for the doping level of the sandwiched graphene layer.

  10. Design of a memory-access controller with 3.71-times-enhanced energy efficiency for Internet-of-Things-oriented nonvolatile microcontroller unit

    NASA Astrophysics Data System (ADS)

    Natsui, Masanori; Hanyu, Takahiro

    2018-04-01

    In realizing a nonvolatile microcontroller unit (MCU) for sensor nodes in Internet-of-Things (IoT) applications, it is important to solve the data-transfer bottleneck between the central processing unit (CPU) and the nonvolatile memory constituting the MCU. As one circuit-oriented approach to solving this problem, we propose a memory access minimization technique for magnetoresistive-random-access-memory (MRAM)-embedded nonvolatile MCUs. In addition to multiplexing and prefetching of memory access, the proposed technique realizes efficient instruction fetch by eliminating redundant memory access while considering the code length of the instruction to be fetched and the transition of the memory address to be accessed. As a result, the performance of the MCU can be improved while relaxing the performance requirement for the embedded MRAM, and compact and low-power implementation can be performed as compared with the conventional cache-based one. Through the evaluation using a system consisting of a general purpose 32-bit CPU and embedded MRAM, it is demonstrated that the proposed technique increases the peak efficiency of the system up to 3.71 times, while a 2.29-fold area reduction is achieved compared with the cache-based one.

  11. A triple quantum dot based nano-electromechanical memory device

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Pozner, R.; Lifshitz, E.; Solid State Institute, Technion-Israel Institute of Technology, Haifa 32000

    Colloidal quantum dots (CQDs) are free-standing nano-structures with chemically tunable electronic properties. This tunability offers intriguing possibilities for nano-electromechanical devices. In this work, we consider a nano-electromechanical nonvolatile memory (NVM) device incorporating a triple quantum dot (TQD) cluster. The device operation is based on a bias induced motion of a floating quantum dot (FQD) located between two bound quantum dots (BQDs). The mechanical motion is used for switching between two stable states, “ON” and “OFF” states, where ligand-mediated effective interdot forces between the BQDs and the FQD serve to hold the FQD in each stable position under zero bias. Consideringmore » realistic microscopic parameters, our quantum-classical theoretical treatment of the TQD reveals the characteristics of the NVM.« less

  12. Effect of electrode material on characteristics of non-volatile resistive memory consisting of Ag{sub 2}S nanoparticles

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Jang, Jaewon, E-mail: j1jang@knu.ac.kr

    2016-07-15

    In this study, Ag{sub 2}S nanoparticles are synthesized and used as the active material for two-terminal resistance switching memory devices. Sintered Ag{sub 2}S films are successfully crystallized on plastic substrates with synthesized Ag{sub 2}S nanoparticles, after a relatively low-temperature sintering process (200 °C). After the sintering process, the crystallite size is increased from 6.8 nm to 80.3 nm. The high ratio of surface atoms to inner atoms of nanoparticles reduces the melting point temperature, deciding the sintering process temperature. In order to investigate the resistance switching characteristics, metal/Ag{sub 2}S/metal structures are fabricated and tested. The effect of the electrode materialmore » on the non-volatile resistive memory characteristics is studied. The bottom electrochemically inert materials, such as Au and Pt, were critical for maintaining stable memory characteristics. By using Au and Pt inert bottom electrodes, we are able to significantly improve the memory endurance and retention to more than 10{sup 3} cycles and 10{sup 4} sec, respectively.« less

  13. Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2007-01-01

    Increasing the memory density and utilizing the unique characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes the characterization of a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determinethe amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. This paper presents measurements of an actual prototype memory cell. This prototype is not a complete implementation of a device, but instead, a prototype of the storage and retrieval portion of an actual device. The performance of this prototype is presented with the projected performance of the overall device. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

  14. Non-volatile resistive switching in the Mott insulator (V1-xCrx)2O3

    NASA Astrophysics Data System (ADS)

    Querré, M.; Tranchant, J.; Corraze, B.; Cordier, S.; Bouquet, V.; Députier, S.; Guilloux-Viry, M.; Besland, M.-P.; Janod, E.; Cario, L.

    2018-05-01

    The discovery of non-volatile resistive switching in Mott insulators related to an electric-field-induced insulator to metal transition (IMT) has paved the way for their use in a new type of non-volatile memories, the Mott memories. While most of the previous studies were dedicated to uncover the resistive switching mechanism and explore the memory potential of chalcogenide Mott insulators, we present here a comprehensive study of resistive switching in the canonical oxide Mott insulator (V1-xCrx)2O3. Our work demonstrates that this compound undergoes a non-volatile resistive switching under electric field. This resistive switching is induced by a Mott transition at the local scale which creates metallic domains closely related to existing phases of the temperature-pressure phase diagram of (V1-xCrx)2O3. Our work demonstrates also reversible resistive switching in (V1-xCrx)2O3 crystals and thin film devices. Preliminary performances obtained on 880 nm thick layers with 500 nm electrodes show the strong potential of Mott memories based on the Mott insulator (V1-xCrx)2O3.

  15. Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures.

    PubMed

    Abhijith, T; Kumar, T V Arun; Reddy, V S

    2017-03-03

    Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO 3 ) between two tris-(8-hydroxyquinoline)aluminum (Alq 3 ) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 10 3 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO 3 layer thickness and its location in the Alq 3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO 3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.

  16. Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures

    NASA Astrophysics Data System (ADS)

    Abhijith, T.; Kumar, T. V. Arun; Reddy, V. S.

    2017-03-01

    Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO3) between two tris-(8-hydroxyquinoline)aluminum (Alq3) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 103 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO3 layer thickness and its location in the Alq3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.

  17. Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

    NASA Astrophysics Data System (ADS)

    Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.

    2012-06-01

    High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

  18. Device and methods for writing and erasing analog information in small memory units via voltage pulses

    DOEpatents

    El Gabaly Marquez, Farid; Talin, Albert Alec

    2018-04-17

    Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.

  19. Evaluation of reinitialization-free nonvolatile computer systems for energy-harvesting Internet of things applications

    NASA Astrophysics Data System (ADS)

    Onizawa, Naoya; Tamakoshi, Akira; Hanyu, Takahiro

    2017-08-01

    In this paper, reinitialization-free nonvolatile computer systems are designed and evaluated for energy-harvesting Internet of things (IoT) applications. In energy-harvesting applications, as power supplies generated from renewable power sources cause frequent power failures, data processed need to be backed up when power failures occur. Unless data are safely backed up before power supplies diminish, reinitialization processes are required when power supplies are recovered, which results in low energy efficiencies and slow operations. Using nonvolatile devices in processors and memories can realize a faster backup than a conventional volatile computer system, leading to a higher energy efficiency. To evaluate the energy efficiency upon frequent power failures, typical computer systems including processors and memories are designed using 90 nm CMOS or CMOS/magnetic tunnel junction (MTJ) technologies. Nonvolatile ARM Cortex-M0 processors with 4 kB MRAMs are evaluated using a typical computing benchmark program, Dhrystone, which shows a few order-of-magnitude reductions in energy in comparison with a volatile processor with SRAM.

  20. Programmable Analog Memory Resistors For Electronic Neural Networks

    NASA Technical Reports Server (NTRS)

    Ramesham, Rajeshuni; Thakoor, Sarita; Daud, Taher; Thakoor, Anilkumar P.

    1990-01-01

    Electrical resistance of new solid-state device altered repeatedly by suitable control signals, yet remains at steady value when control signal removed. Resistance set at low value ("on" state), high value ("off" state), or at any convenient intermediate value and left there until new value desired. Circuits of this type particularly useful in nonvolatile, associative electronic memories based on models of neural networks. Such programmable analog memory resistors ideally suited as synaptic interconnects in "self-learning" neural nets. Operation of device depends on electrochromic property of WO3, which when pure is insulator. Potential uses include nonvolatile, erasable, electronically programmable read-only memories.

  1. Application of nanomaterials in two-terminal resistive-switching memory devices

    PubMed Central

    Ouyang, Jianyong

    2010-01-01

    Nanometer materials have been attracting strong attention due to their interesting structure and properties. Many important practical applications have been demonstrated for nanometer materials based on their unique properties. This article provides a review on the fabrication, electrical characterization, and memory application of two-terminal resistive-switching devices using nanomaterials as the active components, including metal and semiconductor nanoparticles (NPs), nanotubes, nanowires, and graphenes. There are mainly two types of device architectures for the two-terminal devices with NPs. One has a triple-layer structure with a metal film sandwiched between two organic semiconductor layers, and the other has a single polymer film blended with NPs. These devices can be electrically switched between two states with significant different resistances, i.e. the ‘ON’ and ‘OFF’ states. These render the devices important application as two-terminal non-volatile memory devices. The electrical behavior of these devices can be affected by the materials in the active layer and the electrodes. Though the mechanism for the electrical switches has been in argument, it is generally believed that the resistive switches are related to charge storage on the NPs. Resistive switches were also observed on crossbars formed by nanotubes, nanowires, and graphene ribbons. The resistive switches are due to nanoelectromechanical behavior of the materials. The Coulombic interaction of transient charges on the nanomaterials affects the configurable gap of the crossbars, which results into significant change in current through the crossbars. These nanoelectromechanical devices can be used as fast-response and high-density memory devices as well. PMID:22110862

  2. Review of radiation effects on ReRAM devices and technology

    NASA Astrophysics Data System (ADS)

    Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.

    2017-08-01

    A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.

  3. Novel Organic Phototransistor-Based Nonvolatile Memory Integrated with UV-Sensing/Green-Emissive Aggregation Enhanced Emission (AEE)-Active Aromatic Polyamide Electret Layer.

    PubMed

    Cheng, Shun-Wen; Han, Ting; Huang, Teng-Yung; Chang Chien, Yu-Hsin; Liu, Cheng-Liang; Tang, Ben Zhong; Liou, Guey-Sheng

    2018-05-30

    A novel aggregation enhanced emission (AEE)-active polyamide TPA-CN-TPE with a high photoluminesence characteristic was successfully synthesized by the direct polymerization of 4-cyanotriphenyl diamine (TPA-CN) and tetraphenylethene (TPE)-containing dicarboxylic acid. The obtained luminescent polyamide plays a significant role as the polymer electret layer in organic field-effect transistors (OFETs)-type memory. The strong green emission of TPA-CN-TPE under ultraviolet (UV) irradiation can be directly absorbed by the pentacene channel, displaying a light-induced programming and voltage-driven erasing organic phototransistor-based nonvolatile memory. Memory window can be effectively manipulated between the programming and erasing states by applying UV light illumination and electrical field, respectively. The photoinduced memory behavior can be maintained for over 10 4 s between these two states with an on/off ratio of 10 4 , and the memory switching can be steadily operated for many cycles. With high photoresponsivity ( R) and photosensitivity ( S), this organic phototransistor integrated with AEE-active polyamide electret layer could serve as an excellent candidate for UV photodetectors in optical applications. For comparison, an AEE-inactive aromatic polyimide TPA-PIS electret with much weaker solid-state emission was also applied in the same OFETs device architecture, but this device did not show any UV-sensitive and UV-induced memory characteristics, which further confirmed the significance of the light-emitting capability of the electret layer.

  4. Nonvolatile Ferroelectric Memory Circuit Using Black Phosphorus Nanosheet-Based Field-Effect Transistors with P(VDF-TrFE) Polymer.

    PubMed

    Lee, Young Tack; Kwon, Hyeokjae; Kim, Jin Sung; Kim, Hong-Hee; Lee, Yun Jae; Lim, Jung Ah; Song, Yong-Won; Yi, Yeonjin; Choi, Won-Kook; Hwang, Do Kyung; Im, Seongil

    2015-10-27

    Two-dimensional van der Waals (2D vdWs) materials are a class of new materials that can provide important resources for future electronics and materials sciences due to their unique physical properties. Among 2D vdWs materials, black phosphorus (BP) has exhibited significant potential for use in electronic and optoelectronic applications because of its allotropic properties, high mobility, and direct and narrow band gap. Here, we demonstrate a few-layered BP-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. Experiments showed that our BP-based ferroelectric transistors operate satisfactorily at room temperature in ambient air and exhibit a clear memory window. Unlike conventional ambipolar BP transistors, our ferroelectric transistors showed only p-type characteristics due to the carbon-fluorine (C-F) dipole effect of the P(VDF-TrFE) layer, as well as the highest linear mobility value of 1159 cm(2) V(-1) s(-1) with a 10(3) on/off current ratio. For more advanced memory applications beyond unit memory devices, we implemented two memory inverter circuits, a resistive-load inverter circuit and a complementary inverter circuit, combined with an n-type molybdenum disulfide (MoS2) nanosheet. Our memory inverter circuits displayed a clear memory window of 15 V and memory output voltage efficiency of 95%.

  5. Fabrication of poly(methyl methacrylate)-MoS{sub 2}/graphene heterostructure for memory device application

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Shinde, Sachin M.; Tanemura, Masaki; Kalita, Golap, E-mail: kalita.golap@nitech.ac.jp

    2014-12-07

    Combination of two dimensional graphene and semi-conducting molybdenum disulfide (MoS{sub 2}) is of great interest for various electronic device applications. Here, we demonstrate fabrication of a hybridized structure with the chemical vapor deposited graphene and MoS{sub 2} crystals to configure a memory device. Elongated hexagonal and rhombus shaped MoS{sub 2} crystals are synthesized by sulfurization of thermally evaporated molybdenum oxide (MoO{sub 3}) thin film. Scanning transmission electron microscope studies reveal atomic level structure of the synthesized high quality MoS{sub 2} crystals. In the prospect of a memory device fabrication, poly(methyl methacrylate) (PMMA) is used as an insulating dielectric material asmore » well as a supporting layer to transfer the MoS{sub 2} crystals. In the fabricated device, PMMA-MoS{sub 2} and graphene layers act as the functional and electrode materials, respectively. Distinctive bistable electrical switching and nonvolatile rewritable memory effect is observed in the fabricated PMMA-MoS{sub 2}/graphene heterostructure. The developed material system and demonstrated memory device fabrication can be significant for next generation data storage applications.« less

  6. Unified random access memory (URAM) by integration of a nanocrystal floating gate for nonvolatile memory and a partially depleted floating body for capacitorless 1T-DRAM

    NASA Astrophysics Data System (ADS)

    Ryu, Seong-Wan; Han, Jin-Woo; Kim, Chung-Jin; Kim, Sungho; Choi, Yang-Kyu

    2009-03-01

    This paper describes a unified memory (URAM) that utilizes a nanocrystal SOI MOSFET for multi-functional applications of both nonvolatile memory (NVM) and capacitorless 1T-DRAM. By using a discrete storage node (Ag nanocrystal) as the floating gate of the NVM, high defect immunity and 2-bit/cell operation were achieved. The embedded nanocrystal NVM also showed 1T-DRAM operation (program/erase time = 100 ns) characteristics, which were realized by storing holes in the floating body of the SOI MOSFET, without requiring an external capacitor. Three-bit/cell operation was accomplished for different applications - 2-bits for nonvolatility and 1-bit for fast operation.

  7. Novel Quantum Dot Gate FETs and Nonvolatile Memories Using Lattice-Matched II-VI Gate Insulators

    NASA Astrophysics Data System (ADS)

    Jain, F. C.; Suarez, E.; Gogna, M.; Alamoody, F.; Butkiewicus, D.; Hohner, R.; Liaskas, T.; Karmakar, S.; Chan, P.-Y.; Miller, B.; Chandy, J.; Heller, E.

    2009-08-01

    This paper presents the successful use of ZnS/ZnMgS and other II-VI layers (lattice-matched or pseudomorphic) as high- k gate dielectrics in the fabrication of quantum dot (QD) gate Si field-effect transistors (FETs) and nonvolatile memory structures. Quantum dot gate FETs and nonvolatile memories have been fabricated in two basic configurations: (1) monodispersed cladded Ge nanocrystals (e.g., GeO x -cladded-Ge quantum dots) site-specifically self-assembled over the lattice-matched ZnMgS gate insulator in the channel region, and (2) ZnTe-ZnMgTe quantum dots formed by self-organization, using metalorganic chemical vapor-phase deposition (MOCVD), on ZnS-ZnMgS gate insulator layers grown epitaxially on Si substrates. Self-assembled GeO x -cladded Ge QD gate FETs, exhibiting three-state behavior, are also described. Preliminary results on InGaAs-on-InP FETs, using ZnMgSeTe/ZnSe gate insulator layers, are presented.

  8. Characteristics of a Nonvolatile SRAM Memory Cell Utilizing a Ferroelectric Transistor

    NASA Technical Reports Server (NTRS)

    Mitchell, Cody; Laws, Crystal; MacLeod, Todd C.; Ho, Fat D.

    2011-01-01

    The SRAM cell circuit is a standard for volatile data storage. When utilizing one or more ferroelectric transistors, the hysteresis characteristics give unique properties to the SRAM circuit, providing for investigation into the development of a nonvolatile memory cell. This paper discusses various formations of the SRAM circuit, using ferroelectric transistors, n-channel and p-channel MOSFETs, and resistive loads. With varied source and supply voltages, the effects on the timing and retention characteristics are investigated, including retention times of up to 24 hours.

  9. Non-volatile main memory management methods based on a file system.

    PubMed

    Oikawa, Shuichi

    2014-01-01

    There are upcoming non-volatile (NV) memory technologies that provide byte addressability and high performance. PCM, MRAM, and STT-RAM are such examples. Such NV memory can be used as storage because of its data persistency without power supply while it can be used as main memory because of its high performance that matches up with DRAM. There are a number of researches that investigated its uses for main memory and storage. They were, however, conducted independently. This paper presents the methods that enables the integration of the main memory and file system management for NV memory. Such integration makes NV memory simultaneously utilized as both main memory and storage. The presented methods use a file system as their basis for the NV memory management. We implemented the proposed methods in the Linux kernel, and performed the evaluation on the QEMU system emulator. The evaluation results show that 1) the proposed methods can perform comparably to the existing DRAM memory allocator and significantly better than the page swapping, 2) their performance is affected by the internal data structures of a file system, and 3) the data structures appropriate for traditional hard disk drives do not always work effectively for byte addressable NV memory. We also performed the evaluation of the effects caused by the longer access latency of NV memory by cycle-accurate full-system simulation. The results show that the effect on page allocation cost is limited if the increase of latency is moderate.

  10. Nonvolatile random access memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor)

    1994-01-01

    A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a 0 or 1 state. The element remains in the 0 or 1 state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

  11. Effect of AlN layer on the bipolar resistive switching behavior in TiN thin film based ReRAM device for non-volatile memory application

    NASA Astrophysics Data System (ADS)

    Prakash, Ravi; Kaur, Davinder

    2018-05-01

    The effect of an additional AlN layer in the Cu/TiN/AlN/Pt stack configuration deposited using sputtering has been investigated. The Cu/TiN/AlN/Pt device shows a tristate resistive switching. Multilevel switching is facilitated by ionic and metallic filament formation, and the nature of the filaments formed is confirmed by performing a resistance vs. temperature measurement. Ohmic behaviour and trap controlled space charge limited current (SCLC) conduction mechanisms are confirmed as dominant conduction mechanism at low resistance state (LRS) and high resistance state (HRS). High resistance ratio (102) corresponding to HRS and LRS, good write/erase endurance (105) and non-volatile long retention (105s) are also observed. Higher thermal conductivity of the AlN layer is the main reasons for the enhancement of resistive switching performance in Cu/TiN/AlN/Pt cell. The above result suggests the feasibility of Cu/TiN/AlN/Pt devices for multilevel nonvolatile ReRAM application.

  12. Proposed model for bistability in nanowire nonvolatile memory

    NASA Astrophysics Data System (ADS)

    Pokalyakin, V.; Tereshin, S.; Varfolomeev, A.; Zaretsky, D.; Baranov, A.; Banerjee, A.; Wang, Y.; Ramanathan, S.; Bandyopadhyay, S.

    2005-06-01

    Cadmium sulfide nanowires of 10-nm diameter, electrodeposited in porous anodic alumina films, exhibit an electronic bistability that can be harnessed for nonvolatile memory. The current-voltage characteristics of the wires show two stable conductance states that are well separated (conductances differ by more than four orders of magnitude) and long lived (longevity>1yr at room temperature). These two states can encode binary bits 0 and 1. It is possible to switch between them by varying the voltage across the wires, thus "writing" data. Transport behavior of this system has been investigated at different temperatures in an effort to understand the origin of bistability, and a model is presented to explain the observed features. Based on this model, we estimate that about 40 trapped electrons per nanowire are responsible for the bistability.

  13. Recent Advances of Flexible Data Storage Devices Based on Organic Nanoscaled Materials.

    PubMed

    Zhou, Li; Mao, Jingyu; Ren, Yi; Han, Su-Ting; Roy, Vellaisamy A L; Zhou, Ye

    2018-03-01

    Following the trend of miniaturization as per Moore's law, and facing the strong demand of next-generation electronic devices that should be highly portable, wearable, transplantable, and lightweight, growing endeavors have been made to develop novel flexible data storage devices possessing nonvolatile ability, high-density storage, high-switching speed, and reliable endurance properties. Nonvolatile organic data storage devices including memory devices on the basis of floating-gate, charge-trapping, and ferroelectric architectures, as well as organic resistive memory are believed to be favorable candidates for future data storage applications. In this Review, typical information on device structure, memory characteristics, device operation mechanisms, mechanical properties, challenges, and recent progress of the above categories of flexible data storage devices based on organic nanoscaled materials is summarized. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. Design and fabrication of memory devices based on nanoscale polyoxometalate clusters

    NASA Astrophysics Data System (ADS)

    Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy

    2014-11-01

    Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.

  15. Low operation voltage and high thermal stability of a WSi2 nanocrystal memory device using an Al2O3/HfO2/Al2O3 tunnel layer

    NASA Astrophysics Data System (ADS)

    Uk Lee, Dong; Jun Lee, Hyo; Kyu Kim, Eun; You, Hee-Wook; Cho, Won-Ju

    2012-02-01

    A WSi2 nanocrystal nonvolatile memory device was fabricated with an Al2O3/HfO2/Al2O3 (AHA) tunnel layer and its electrical characteristics were evaluated at 25, 50, 70, 100, and 125 °C. The program/erase (P/E) speed at 125 °C was approximately 500 μs under threshold voltage shifts of 1 V during voltage sweeping of 8 V/-8 V. When the applied pulse voltage was ±9 V for 1 s for the P/E conditions, the memory window at 125 °C was approximately 1.25 V after 105 s. The activation energies for the charge losses of 5%, 10%, 15%, 20%, 25%, 30%, and 35% were approximately 0.05, 0.11, 0.17, 0.21, 0.23, 0.23, and 0.23 eV, respectively. The charge loss mechanisms were direct tunneling and Pool-Frenkel emission between the WSi2 nanocrystals and the AHA barrier engineered tunneling layer. The WSi2 nanocrystal memory device with multi-stacked high-K tunnel layers showed strong potential for applications in nonvolatile memory devices.

  16. Feasibility and limitations of anti-fuses based on bistable non-volatile switches for power electronic applications

    NASA Astrophysics Data System (ADS)

    Erlbacher, T.; Huerner, A.; Bauer, A. J.; Frey, L.

    2012-09-01

    Anti-fuse devices based on non-volatile memory cells and suitable for power electronic applications are demonstrated for the first time using silicon technology. These devices may be applied as stand alone devices or integrated using standard junction-isolation into application-specific and smart-power integrated circuits. The on-resistance of such devices can be permanently switched by nine orders of magnitude by triggering the anti-fuse with a positive voltage pulse. Extrapolation of measurement data and 2D TCAD process and device simulations indicate that 20 A anti-fuses with 10 mΩ can be reliably fabricated in 0.35 μm technology with a footprint of 2.5 mm2. Moreover, this concept offers distinguished added-values compared to existing mechanical relays, e.g. pre-test, temporary and permanent reset functions, gradual turn-on mode, non-volatility, and extendibility to high voltage capability.

  17. Design of a Multi-Level/Analog Ferroelectric Memory Device

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2006-01-01

    Increasing the memory density and utilizing the dove1 characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used as a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

  18. Non-volatile Clocked Spin Wave Interconnect for Beyond-CMOS Nanomagnet Pipelines

    PubMed Central

    Dutta, Sourav; Chang, Sou-Chi; Kani, Nickvash; Nikonov, Dmitri E.; Manipatruni, Sasikanth; Young, Ian A.; Naeemi, Azad

    2015-01-01

    The possibility of using spin waves for information transmission and processing has been an area of active research due to the unique ability to manipulate the amplitude and phase of the spin waves for building complex logic circuits with less physical resources and low power consumption. Previous proposals on spin wave logic circuits have suggested the idea of utilizing the magneto-electric effect for spin wave amplification and amplitude- or phase-dependent switching of magneto-electric cells. Here, we propose a comprehensive scheme for building a clocked non-volatile spin wave device by introducing a charge-to-spin converter that translates information from electrical domain to spin domain, magneto-electric spin wave repeaters that operate in three different regimes - spin wave transmitter, non-volatile memory and spin wave detector, and a novel clocking scheme that ensures sequential transmission of information and non-reciprocity. The proposed device satisfies the five essential requirements for logic application: nonlinearity, amplification, concatenability, feedback prevention, and complete set of Boolean operations. PMID:25955353

  19. Modeling and simulation of floating gate nanocrystal FET devices and circuits

    NASA Astrophysics Data System (ADS)

    Hasaneen, El-Sayed A. M.

    The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to

  20. Nonvolatile memory thin film transistors using CdSe/ZnS quantum dot-poly(methyl methacrylate) composite layer formed by a two-step spin coating technique

    NASA Astrophysics Data System (ADS)

    Chen, Ying-Chih; Huang, Chun-Yuan; Yu, Hsin-Chieh; Su, Yan-Kuin

    2012-08-01

    The nonvolatile memory thin film transistors (TFTs) using a core/shell CdSe/ZnS quantum dot (QD)-poly(methyl methacrylate) (PMMA) composite layer as the floating gate have been demonstrated, with the device configuration of n+-Si gate/SiO2 insulator/QD-PMMA composite layer/pentacene channel/Au source-drain being proposed. To achieve the QD-PMMA composite layer, a two-step spin coating technique was used to successively deposit QD-PMMA composite and PMMA on the insulator. After the processes, the variation of crystal quality and surface morphology of the subsequent pentacene films characterized by x-ray diffraction spectra and atomic force microscopy was correlated to the two-step spin coating. The crystalline size of pentacene was improved from 147.9 to 165.2 Å, while the degree of structural disorder was decreased from 4.5% to 3.1% after the adoption of this technique. In pentacene-based TFTs, the improvement of the performance was also significant, besides the appearances of strong memory characteristics. The memory behaviors were attributed to the charge storage/discharge effect in QD-PMMA composite layer. Under the programming and erasing operations, programmable memory devices with the memory window (Δ Vth) = 23 V and long retention time were obtained.

  1. Light-Gated Memristor with Integrated Logic and Memory Functions.

    PubMed

    Tan, Hongwei; Liu, Gang; Yang, Huali; Yi, Xiaohui; Pan, Liang; Shang, Jie; Long, Shibing; Liu, Ming; Wu, Yihong; Li, Run-Wei

    2017-11-28

    Memristive devices are able to store and process information, which offers several key advantages over the transistor-based architectures. However, most of the two-terminal memristive devices have fixed functions once made and cannot be reconfigured for other situations. Here, we propose and demonstrate a memristive device "memlogic" (memory logic) as a nonvolatile switch of logic operations integrated with memory function in a single light-gated memristor. Based on nonvolatile light-modulated memristive switching behavior, a single memlogic cell is able to achieve optical and electrical mixed basic Boolean logic of reconfigurable "AND", "OR", and "NOT" operations. Furthermore, the single memlogic cell is also capable of functioning as an optical adder and digital-to-analog converter. All the memlogic outputs are memristive for in situ data storage due to the nonvolatile resistive switching and persistent photoconductivity effects. Thus, as a memdevice, the memlogic has potential for not only simplifying the programmable logic circuits but also building memristive multifunctional optoelectronics.

  2. Titanium-tungsten nanocrystals embedded in a SiO(2)/Al(2)O(3) gate dielectric stack for low-voltage operation in non-volatile memory.

    PubMed

    Yang, Shiqian; Wang, Qin; Zhang, Manhong; Long, Shibing; Liu, Jing; Liu, Ming

    2010-06-18

    Titanium-tungsten nanocrystals (NCs) were fabricated by a self-assembly rapid thermal annealing (RTA) process. Well isolated Ti(0.46)W(0.54) NCs were embedded in the gate dielectric stack of SiO(2)/Al(2)O(3). A metal-oxide-semiconductor (MOS) capacitor was fabricated to investigate its application in a non-volatile memory (NVM) device. It demonstrated a large memory window of 6.2 V in terms of flat-band voltage (V(FB)) shift under a dual-directional sweeping gate voltage of - 10 to 10 V. A 1.1 V V(FB) shift under a low dual-directional sweeping gate voltage of - 4 to 4 V was also observed. The retention characteristic of this MOS capacitor was demonstrated by a 0.5 V memory window after 10(4) s of elapsed time at room temperature. The endurance characteristic was demonstrated by a program/erase cycling test.

  3. Architectural Techniques For Managing Non-volatile Caches

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mittal, Sparsh

    As chip power dissipation becomes a critical challenge in scaling processor performance, computer architects are forced to fundamentally rethink the design of modern processors and hence, the chip-design industry is now at a major inflection point in its hardware roadmap. The high leakage power and low density of SRAM poses serious obstacles in its use for designing large on-chip caches and for this reason, researchers are exploring non-volatile memory (NVM) devices, such as spin torque transfer RAM, phase change RAM and resistive RAM. However, since NVMs are not strictly superior to SRAM, effective architectural techniques are required for making themmore » a universal memory solution. This book discusses techniques for designing processor caches using NVM devices. It presents algorithms and architectures for improving their energy efficiency, performance and lifetime. It also provides both qualitative and quantitative evaluation to help the reader gain insights and motivate them to explore further. This book will be highly useful for beginners as well as veterans in computer architecture, chip designers, product managers and technical marketing professionals.« less

  4. Spatial profile of charge storage in organic field-effect transistor nonvolatile memory using polymer electret

    NASA Astrophysics Data System (ADS)

    She, Xiao-Jian; Liu, Jie; Zhang, Jing-Yu; Gao, Xu; Wang, Sui-Dong

    2013-09-01

    Spatial profile of the charge storage in the pentacene-based field-effect transistor nonvolatile memories using poly(2-vinyl naphthalene) electret is probed. The electron trapping into the electret after programming can be space dependent with more electron storage in the region closer to the contacts, and reducing the channel length is an effective approach to improve the memory performance. The deficient electron supply in pentacene is proposed to be responsible for the inhomogeneous electron storage in the electret. The hole trapping into the electret after erasing is spatially homogeneous, arising from the sufficient hole accumulation in the pentacene channel.

  5. Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide

    NASA Astrophysics Data System (ADS)

    Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

    2009-04-01

    We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 × 10-13-1.0 × 10-14 S cm-1. The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 1010. Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 1011. The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

  6. Programmable digital memory devices based on nanoscale thin films of a thermally dimensionally stable polyimide.

    PubMed

    Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor

    2009-04-01

    We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 x 10(-13)-1.0 x 10(-14) S cm(-1). The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 10(10). Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 10(11). The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.

  7. Unipolar resistive switching behaviors and mechanisms in an annealed Ni/ZrO2/TaN memory device

    NASA Astrophysics Data System (ADS)

    Tsai, Tsung-Ling; Ho, Tsung-Han; Tseng, Tseung-Yuen

    2015-01-01

    The effects of Ni/ZrO2/TaN resistive switching memory devices without and with a 400 °C annealing process on switching properties are investigated. The devices exhibit unipolar resistive switching behaviors with low set and reset voltages because of a large amount of Ni diffusion with no reaction with ZrO2 after the annealing process, which is confirmed by ToF-SIMS and XPS analyses. A physical model based on a Ni filament is constructed to explain such phenomena. The device that undergoes the 400 °C annealing process exhibits an excellent endurance of more than 1.5  ×  104 cycles. The improvement can be attributed to the enhancement of oxygen ion migration along grain boundaries, which result in less oxygen ion consumption during the reset process. The device also performs good retention up to 105 s at 150 °C. Therefore, it has great potential for high-density nonvolatile memory applications.

  8. Nonvolatile Bio-Memristor Fabricated with Egg Albumen Film

    NASA Astrophysics Data System (ADS)

    Chen, Ying-Chih; Yu, Hsin-Chieh; Huang, Chun-Yuan; Chung, Wen-Lin; Wu, San-Lein; Su, Yan-Kuin

    2015-05-01

    This study demonstrates the fabrication and characterization of chicken egg albumen-based bio-memristors. By introducing egg albumen as an insulator to fabricate memristor devices comprising a metal/insulator/metal sandwich structure, significant bipolar resistive switching behavior can be observed. The 1/f noise characteristics of the albumen devices were measured, and results suggested that their memory behavior results from the formation and rupture of conductive filaments. Oxygen diffusion and electrochemical redox reaction of metal ions under a sufficiently large electric field are the principal physical mechanisms of the formation and rupture of conductive filaments; these mechanisms were observed by analysis of the time-of-flight secondary ion mass spectrometry (TOF-SIMS) and resistance-temperature (R-T) measurement results. The switching property of the devices remarkably improved by heat-denaturation of proteins; reliable switching endurance of over 500 cycles accompanied by an on/off current ratio (Ion/off) of higher than 103 were also observed. Both resistance states could be maintained for a suitably long time (>104 s). Taking the results together, the present study reveals for the first time that chicken egg albumen is a promising material for nonvolatile memory applications.

  9. A study of selenium nanoparticles as charge storage element for flexible semi-transparent memory devices

    NASA Astrophysics Data System (ADS)

    Alotaibi, Sattam; Nama Manjunatha, Krishna; Paul, Shashi

    2017-12-01

    Flexible Semi-Transparent electronic memory would be useful in coming years for integrated flexible transparent electronic devices. However, attaining such flexibility and semi-transparency leads to the boundaries in material composition. Thus, impeding processing speed and device performance. In this work, we present the use of inorganic stable selenium nanoparticles (Se-NPs) as a storage element and hydrogenated amorphous carbon (a-C:H) as an insulating layer in two terminal non-volatile physically flexible and semi-transparent capacitive memory devices (2T-NMDs). Furthermore, a-C:H films can be deposited at very low temperature (<40° C) on a variety of substrates (including many kinds of plastic substrates) by an industrial technique called Plasma Enhanced Chemical Vapour Deposition (PECVD) which is available in many existing fabrication labs. Self-assembled Se-NPs has several unique features including deposition at room temperature by simple vacuum thermal evaporation process without the need for further optimisation. This facilitates the fabrication of memory on a flexible substrate. Moreover, the memory behaviour of the Se-NPs was found to be more distinct than those of the semiconductor and metal nanostructures due to higher work function compared to the commonly used semiconductor and metal species. The memory behaviour was observed from the hysteresis of current-voltage (I-V) measurements while the two distinguishable electrical conductivity states (;0; and "1") were studied by current-time (I-t) measurements.

  10. A Compute Capable SSD Architecture for Next-Generation Non-volatile Memories

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    De, Arup

    2014-01-01

    Existing storage technologies (e.g., disks and ash) are failing to cope with the processor and main memory speed and are limiting the overall perfor- mance of many large scale I/O or data-intensive applications. Emerging fast byte-addressable non-volatile memory (NVM) technologies, such as phase-change memory (PCM), spin-transfer torque memory (STTM) and memristor are very promising and are approaching DRAM-like performance with lower power con- sumption and higher density as process technology scales. These new memories are narrowing down the performance gap between the storage and the main mem- ory and are putting forward challenging problems on existing SSD architecture, I/O interfacemore » (e.g, SATA, PCIe) and software. This dissertation addresses those challenges and presents a novel SSD architecture called XSSD. XSSD o oads com- putation in storage to exploit fast NVMs and reduce the redundant data tra c across the I/O bus. XSSD o ers a exible RPC-based programming framework that developers can use for application development on SSD without dealing with the complication of the underlying architecture and communication management. We have built a prototype of XSSD on the BEE3 FPGA prototyping system. We implement various data-intensive applications and achieve speedup and energy ef- ciency of 1.5-8.9 and 1.7-10.27 respectively. This dissertation also compares XSSD with previous work on intelligent storage and intelligent memory. The existing ecosystem and these new enabling technologies make this system more viable than earlier ones.« less

  11. Ferroelectricity in Covalently functionalized Two-dimensional Materials: Integration of High-mobility Semiconductors and Nonvolatile Memory.

    PubMed

    Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng

    2016-11-09

    Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS 2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.

  12. Influence of Thermal Annealing Treatment on Bipolar Switching Properties of Vanadium Oxide Thin-Film Resistance Random-Access Memory Devices

    NASA Astrophysics Data System (ADS)

    Chen, Kai-Huang; Cheng, Chien-Min; Kao, Ming-Cheng; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Wu, Sean; Su, Feng-Yi

    2017-04-01

    The bipolar switching properties and electrical conduction mechanism of vanadium oxide thin-film resistive random-access memory (RRAM) devices obtained using a rapid thermal annealing (RTA) process have been investigated in high-resistive status/low-resistive status (HRS/LRS) and are discussed herein. In addition, the resistance switching properties and quality improvement of the vanadium oxide thin-film RRAM devices were measured by x-ray diffraction (XRD) analysis, x-ray photoelectron spectrometry (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM), and current-voltage ( I- V) measurements. The activation energy of the hopping conduction mechanism in the devices was investigated based on Arrhenius plots in HRS and LRS. The hopping conduction distance and activation energy barrier were obtained as 12 nm and 45 meV, respectively. The thermal annealing process is recognized as a candidate method for fabrication of thin-film RRAM devices, being compatible with integrated circuit technology for nonvolatile memory devices.

  13. Radiation Tests of Highly Scaled, High-Density, Commercial, Nonvolatile NAND Flash Memories - Update 2012

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Allen, Gregory R.

    2012-01-01

    The space radiation environment poses a certain risk to all electronic components on Earth-orbiting and planetary mission spacecraft. In recent years, there has been increased interest in the use of high-density, commercial, nonvolatile flash memories in space because of ever-increasing data volumes and strict power requirements. They are used in a wide variety of spacecraft subsystems. At one end of the spectrum, flash memories are used to store small amounts of mission-critical data such as boot code or configuration files and, at the other end, they are used to construct multi-gigabyte data recorders that record mission science data. This report examines single-event effect (SEE) and total ionizing dose (TID) response in single-level cell (SLC) 32-Gb, multi-level cell (MLC) 64-Gb, and Triple-level (TLC) 64-Gb NAND flash memories manufactured by Micron Technology with feature size of 25 nm.

  14. Two-dimensional non-volatile programmable p-n junctions

    NASA Astrophysics Data System (ADS)

    Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M.; Zhang, Zengxing

    2017-09-01

    Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe2/hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 104 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

  15. Two-dimensional non-volatile programmable p-n junctions.

    PubMed

    Li, Dong; Chen, Mingyuan; Sun, Zhengzong; Yu, Peng; Liu, Zheng; Ajayan, Pulickel M; Zhang, Zengxing

    2017-09-01

    Semiconductor p-n junctions are the elementary building blocks of most electronic and optoelectronic devices. The need for their miniaturization has fuelled the rapid growth of interest in two-dimensional (2D) materials. However, the performance of a p-n junction considerably degrades as its thickness approaches a few nanometres and traditional technologies, such as doping and implantation, become invalid at the nanoscale. Here we report stable non-volatile programmable p-n junctions fabricated from the vertically stacked all-2D semiconductor/insulator/metal layers (WSe 2 /hexagonal boron nitride/graphene) in a semifloating gate field-effect transistor configuration. The junction exhibits a good rectifying behaviour with a rectification ratio of 10 4 and photovoltaic properties with a power conversion efficiency up to 4.1% under a 6.8 nW light. Based on the non-volatile programmable properties controlled by gate voltages, the 2D p-n junctions have been exploited for various electronic and optoelectronic applications, such as memories, photovoltaics, logic rectifiers and logic optoelectronic circuits.

  16. A novel architecture of non-volatile magnetic arithmetic logic unit using magnetic tunnel junctions

    NASA Astrophysics Data System (ADS)

    Guo, Wei; Prenat, Guillaume; Dieny, Bernard

    2014-04-01

    Complementary metal-oxide-semiconductor (CMOS) technology is facing increasingly difficult obstacles such as power consumption and interconnection delay. Novel hybrid technologies and architectures are being investigated with the aim to circumvent some of these limits. In particular, hybrid CMOS/magnetic technology based on magnetic tunnel junctions (MTJs) is considered as a very promising approach thanks to the full compatibility of MTJs with CMOS technology. By tightly merging the conventional electronics with magnetism, both logic and memory functions can be implemented in the same device. As a result, non-volatility is directly brought into logic circuits, yielding significant improvement of device performances and new functionalities as well. We have conceived an innovative methodology to construct non-volatile magnetic arithmetic logic units (MALUs) combining spin-transfer torque MTJs with MOS transistors. The present 4-bit MALU utilizes 4 MTJ pairs to store its operation code (opcode). Its operations and performances have been confirmed and evaluated through electrical simulations.

  17. Semiconductor-based, large-area, flexible, electronic devices

    DOEpatents

    Goyal, Amit [Knoxville, TN

    2011-03-15

    Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  18. Indium-oxide nanoparticles for RRAM devices compatible with CMOS back-end-off-line

    NASA Astrophysics Data System (ADS)

    León Pérez, Edgar A. A.; Guenery, Pierre-Vincent; Abouzaid, Oumaïma; Ayadi, Khaled; Brottet, Solène; Moeyaert, Jérémy; Labau, Sébastien; Baron, Thierry; Blanchard, Nicholas; Baboux, Nicolas; Militaru, Liviu; Souifi, Abdelkader

    2018-05-01

    We report on the fabrication and characterization of Resistive Random Access Memory (RRAM) devices based on nanoparticles in MIM structures. Our approach is based on the use of indium oxide (In2O3) nanoparticles embedded in a dielectric matrix using CMOS-full-compatible fabrication processes in view of back-end-off-line integration for non-volatile memory (NVM) applications. A bipolar switching behavior has been observed using current-voltage measurements (I-V) for all devices. Very high ION/IOFF ratios have been obtained up to 108. Our results provide insights for further integration of In2O3 nanoparticles-based devices for NVM applications. He is currently a Postdoctoral Researcher in the Institute of Nanotechnologies of Lyon (INL), INSA de Lyon, France, in the Electronics Department. His current research include indium oxide nanoparticles for non-volatile memory applications, and the integrations of these devices in CMOS BEOL.

  19. Effect of tunneling layers on the performances of floating-gate based organic thin-film transistor nonvolatile memories

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wang, Wei, E-mail: wwei99@jlu.edu.cn; Han, Jinhua; Ying, Jun

    2014-09-22

    Two types of floating-gate based organic thin-film transistor nonvolatile memories (FG-OTFT-NVMs) were demonstrated, with poly(methyl methacrylate co glycidyl methacrylate) (P(MMA-GMA)) and tetratetracontane (TTC) as the tunneling layer, respectively. Their device performances were measured and compared. In the memory with a P(MMA-GMA) tunneling layer, typical unipolar hole transport was obtained with a relatively small mobility of 0.16 cm{sup 2}/V s. The unidirectional shift of turn-on voltage (V{sub on}) due to only holes trapped/detrapped in/from the floating gate resulted in a small memory window of 12.5 V at programming/erasing voltages (V{sub P}/V{sub E}) of ±100 V and a nonzero reading voltage. Benefited from the well-ordered moleculemore » orientation and the trap-free surface of TTC layer, a considerably high hole mobility of 1.7 cm{sup 2}/V s and a visible feature of electrons accumulated in channel and trapped in floating-gate were achieved in the memory with a TTC tunneling layer. High hole mobility resulted in a high on current and a large memory on/off ratio of 600 at the V{sub P}/V{sub E} of ±100 V. Both holes and electrons were injected into floating-gate and overwritten each other, which resulted in a bidirectional V{sub on} shift. As a result, an enlarged memory window of 28.6 V at the V{sub P}/V{sub E} of ±100 V and a zero reading voltage were achieved. Based on our results, a strategy is proposed to optimize FG-OTFT-NVMs by choosing a right tunneling layer to improve the majority carrier mobility and realize ambipolar carriers injecting and trapping in the floating-gate.« less

  20. Electrically erasable non-volatile memory via electrochemical deposition of multifractal aggregates

    NASA Astrophysics Data System (ADS)

    West, William Clark

    An electrically erasable non-volatile memory system based on the electrochemical deposition of Ag or Cu from a solid electrolyte is presented. This memory system, referred to as Metal Dendrite Memory, is characterized by its simplicity of design and operation, low power consumption, and potentially high cell density. By applying a small DC voltage (2.5-5V) across a Cu or Ag doped As-S amorphous chalcogenide film sandwiched between two metal electrodes, a metal filament can be electrodeposited, shorting the large impedance solid electrolyte ("on" state). Application of smaller amplitude voltage pulses (1-1.5V) across the metal filament ruptures the short, returning the cell to the high impedance state ("off" state). The state of the cell is read by applying very small amplitude voltage pulses (0.25V). These "read" voltage pulses do not disturb the state of the cell even after 10sp7 pulses. Due to difficulties in characterizing this solid electrolyte system via conventional techniques, the MDM cells have been examined using low excitation characterization methods such as Impedance Spectroscopy (IS) and polarization measurements. These studies have yielded a self-consistent equivalent circuit model as well as parameters such as ionic diffusivity and conductivity, double layer and geometric capacitances. In addition to materials characterization, the speed at which the MDM cells operate has been systematically studied using a series of statistically designed experiments, demonstrating the importance of photodoping time and applied voltage on device speed. These results were further examined using IS and Rutherford Backscattering Spectrometry (RBS). The morphology of the growing electrodeposit was studied in several different electrode arrangements and excitation conditions. Under migrationally limited conditions, the electrodeposit grew in multifractal patterns, as measured using lacunarity analysis. If a conducting film was deposited parallel to the growth direction

  1. Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

    NASA Technical Reports Server (NTRS)

    Wu, Jiin C.; Katti, Romney R.; Stadler, Henry L.

    1991-01-01

    The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

  2. Non-Volatile Ferroelectric Switching of Ferromagnetic Resonance in NiFe/PLZT Multiferroic Thin Film Heterostructures.

    PubMed

    Hu, Zhongqiang; Wang, Xinjun; Nan, Tianxiang; Zhou, Ziyao; Ma, Beihai; Chen, Xiaoqin; Jones, John G; Howe, Brandon M; Brown, Gail J; Gao, Yuan; Lin, Hwaider; Wang, Zhiguang; Guo, Rongdi; Chen, Shuiyuan; Shi, Xiaoling; Shi, Wei; Sun, Hongzhi; Budil, David; Liu, Ming; Sun, Nian X

    2016-09-01

    Magnetoelectric effect, arising from the interfacial coupling between magnetic and electrical order parameters, has recently emerged as a robust means to electrically manipulate the magnetic properties in multiferroic heterostructures. Challenge remains as finding an energy efficient way to modify the distinct magnetic states in a reliable, reversible, and non-volatile manner. Here we report ferroelectric switching of ferromagnetic resonance in multiferroic bilayers consisting of ultrathin ferromagnetic NiFe and ferroelectric Pb0.92La0.08Zr0.52Ti0.48O3 (PLZT) films, where the magnetic anisotropy of NiFe can be electrically modified by low voltages. Ferromagnetic resonance measurements confirm that the interfacial charge-mediated magnetoelectric effect is dominant in NiFe/PLZT heterostructures. Non-volatile modification of ferromagnetic resonance field is demonstrated by applying voltage pulses. The ferroelectric switching of magnetic anisotropy exhibits extensive applications in energy-efficient electronic devices such as magnetoelectric random access memories, magnetic field sensors, and tunable radio frequency (RF)/microwave devices.

  3. Non-Volatile Ferroelectric Switching of Ferromagnetic Resonance in NiFe/PLZT Multiferroic Thin Film Heterostructures

    PubMed Central

    Hu, Zhongqiang; Wang, Xinjun; Nan, Tianxiang; Zhou, Ziyao; Ma, Beihai; Chen, Xiaoqin; Jones, John G.; Howe, Brandon M.; Brown, Gail J.; Gao, Yuan; Lin, Hwaider; Wang, Zhiguang; Guo, Rongdi; Chen, Shuiyuan; Shi, Xiaoling; Shi, Wei; Sun, Hongzhi; Budil, David; Liu, Ming; Sun, Nian X.

    2016-01-01

    Magnetoelectric effect, arising from the interfacial coupling between magnetic and electrical order parameters, has recently emerged as a robust means to electrically manipulate the magnetic properties in multiferroic heterostructures. Challenge remains as finding an energy efficient way to modify the distinct magnetic states in a reliable, reversible, and non-volatile manner. Here we report ferroelectric switching of ferromagnetic resonance in multiferroic bilayers consisting of ultrathin ferromagnetic NiFe and ferroelectric Pb0.92La0.08Zr0.52Ti0.48O3 (PLZT) films, where the magnetic anisotropy of NiFe can be electrically modified by low voltages. Ferromagnetic resonance measurements confirm that the interfacial charge-mediated magnetoelectric effect is dominant in NiFe/PLZT heterostructures. Non-volatile modification of ferromagnetic resonance field is demonstrated by applying voltage pulses. The ferroelectric switching of magnetic anisotropy exhibits extensive applications in energy-efficient electronic devices such as magnetoelectric random access memories, magnetic field sensors, and tunable radio frequency (RF)/microwave devices. PMID:27581071

  4. Non-Volatile Ferroelectric Switching of Ferromagnetic Resonance in NiFe/PLZT Multiferroic Thin Film Heterostructures

    NASA Astrophysics Data System (ADS)

    Hu, Zhongqiang; Wang, Xinjun; Nan, Tianxiang; Zhou, Ziyao; Ma, Beihai; Chen, Xiaoqin; Jones, John G.; Howe, Brandon M.; Brown, Gail J.; Gao, Yuan; Lin, Hwaider; Wang, Zhiguang; Guo, Rongdi; Chen, Shuiyuan; Shi, Xiaoling; Shi, Wei; Sun, Hongzhi; Budil, David; Liu, Ming; Sun, Nian X.

    2016-09-01

    Magnetoelectric effect, arising from the interfacial coupling between magnetic and electrical order parameters, has recently emerged as a robust means to electrically manipulate the magnetic properties in multiferroic heterostructures. Challenge remains as finding an energy efficient way to modify the distinct magnetic states in a reliable, reversible, and non-volatile manner. Here we report ferroelectric switching of ferromagnetic resonance in multiferroic bilayers consisting of ultrathin ferromagnetic NiFe and ferroelectric Pb0.92La0.08Zr0.52Ti0.48O3 (PLZT) films, where the magnetic anisotropy of NiFe can be electrically modified by low voltages. Ferromagnetic resonance measurements confirm that the interfacial charge-mediated magnetoelectric effect is dominant in NiFe/PLZT heterostructures. Non-volatile modification of ferromagnetic resonance field is demonstrated by applying voltage pulses. The ferroelectric switching of magnetic anisotropy exhibits extensive applications in energy-efficient electronic devices such as magnetoelectric random access memories, magnetic field sensors, and tunable radio frequency (RF)/microwave devices.

  5. Non-Volatile High Speed & Low Power Charge Trapping Devices

    NASA Astrophysics Data System (ADS)

    Kim, Moon Kyung; Tiwari, Sandip

    2007-06-01

    We report the operational characteristics of ultra-small-scaled SONOS (below 50 nm gate width and length) and SiO2/SiO2 structural devices with 0.5 um gate width and length where trapping occurs in a very narrow region. The experimental work summarizes the memory characteristics of retention time, endurance cycles, and speed in SONOS and SiO2/SiO2 structures. Silicon nitride has many defects to hold electrons as charge storage media in SONOS memory. Defects are also incorporated during growth and deposition in device processing. Our experiments show that the interface between two oxides, one grown and one deposited, provides a remarkable media for electron storage with a smaller gate stack and thus lower operating voltage. The exponential dependence of the time on the voltage is reflected in the characteristic energy. It is ˜0.44 eV for the write process and ˜0.47 eV for the erase process in SiO2/SiO2 structural device which is somewhat more efficient than those of SONOS structure memory.

  6. Characterization of Au/PbTi0.5Fe0.5O3/Si structure for possible multiferroic based non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Nawaz, S.; Roy, S.; Tulapurkar, A. A.; Palkar, V. R.

    2017-03-01

    Magnetoelectric multiferroic PbTi0.5Fe0.5O3 films are deposited on a ⟨100⟩ conducting p-Si substrate without any buffer layer by using pulsed laser deposition and characterized for possible non-volatile memory applications. Their crystalline structure and surface morphology were characterized by using x-ray diffraction and AFM techniques. HRTEM was employed to determine the film-substrate interface. The electronic structure of the film was investigated by XPS, and no signature of metal was found for all the elements. The chemical shift of the Ti 2p XPS peak is attributed to the replacement of Ti with Fe in the PbTiO3 matrix. Piezoelectric force microscopy (PFM) results indicate the 180° phase shift of ferroelectric polarization. The upward self-polarization phenomenon is also observed in the PFM study. Magnetic and magneto-electric coupling measurements were carried out to confirm the magnetic nature and electro-magnetic coupling characteristics. C-V measurements exhibit clock-wise hysteresis loops with a maximum memory window of 1.2 V and a sweep voltage of ±7 V. This study could influence the fabrication of silicon compatible multiple memory device structures.

  7. Migration of interfacial oxygen ions modulated resistive switching in oxide-based memory devices

    NASA Astrophysics Data System (ADS)

    Chen, C.; Gao, S.; Zeng, F.; Tang, G. S.; Li, S. Z.; Song, C.; Fu, H. D.; Pan, F.

    2013-07-01

    Oxides-based resistive switching memory induced by oxygen ions migration is attractive for future nonvolatile memories. Numerous works had focused their attentions on the sandwiched oxide materials for depressing the characteristic variations, but the comprehensive studies of the dependence of electrodes on the migration behavior of oxygen ions are overshadowed. Here, we investigated the interaction of various metals (Ni, Co, Al, Ti, Zr, and Hf) with oxygen atoms at the metal/Ta2O5 interface under electric stress and explored the effect of top electrode on the characteristic variations of Ta2O5-based memory device. It is demonstrated that chemically inert electrodes (Ni and Co) lead to the scattering switching characteristics and destructive gas bubbles, while the highly chemically active metals (Hf and Zr) formed a thick and dense interfacial intermediate oxide layer at the metal/Ta2O5 interface, which also degraded the resistive switching behavior. The relatively chemically active metals (Al and Ti) can absorb oxygen ions from the Ta2O5 film and avoid forming the problematic interfacial layer, which is benefit to the formation of oxygen vacancies composed conduction filaments in Ta2O5 film thus exhibit the minimum variations of switching characteristics. The clarification of oxygen ions migration behavior at the interface can lead further optimization of resistive switching performance in Ta2O5-based memory device and guide the rule of electrode selection for other oxide-based resistive switching memories.

  8. Investigation of Hafnium oxide/Copper resistive memory for advanced encryption applications

    NASA Astrophysics Data System (ADS)

    Briggs, Benjamin D.

    The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its advantages over flash include ease of fabrication, speed, and lower power consumption. In addition to memory, ReRAM can also be used in advanced logic implementations given its purely resistive behavior. The combination of a new non-volatile memory element ReRAM along with high performance, low power CMOS opens new avenues for logic implementations. This dissertation will cover the design and process implementation of a ReRAM-CMOS hybrid circuit, built using IBM's 10LPe process, for the improvement of hardware AES implementations. Further the device characteristics of ReRAM, specifically the HfO2/Cu memory system, and mechanisms for operation are not fully correlated. Of particular interest to this work is the role of material properties such as the stoichiometry, crystallinity, and doping of the HfO2 layer and their effect on the switching characteristics of resistive memory. Material properties were varied by a combination of atomic layer deposition and reactive sputtering of the HfO2 layer. Several studies will be discussed on how the above mentioned material properties influence switching parameters, and change the underlying physics of device operation.

  9. A complementary switching mechanism for organic memory devices to regulate the conductance of binary states

    NASA Astrophysics Data System (ADS)

    Vyas, Giriraj; Dagar, Parveen; Sahu, Satyajit

    2016-06-01

    We have fabricated an organic non-volatile memory device wherein the ON/OFF current ratio has been controlled by varying the concentration of a small organic molecule, 2,3-Dichloro-5,6-dicyano-p-benzoquinone (DDQ), in an insulating matrix of a polymer Poly(4-vinylphenol) (PVP). A maximum ON-OFF ratio of 106 is obtained when the concentration of DDQ is half or 10 wt. % of PVP. In this process, the switching direction for the devices has also been altered, indicating the disparity in conduction mechanism. Conduction due to metal filament formation through the active material and the voltage dependent conformational change of the organic molecule seem to be the motivation behind the gradual change in the switching direction.

  10. Overview of Non-Volatile Testing and Screening Methods

    NASA Technical Reports Server (NTRS)

    Irom, Farokh

    2001-01-01

    Testing methods for memories and non-volatile memories have become increasingly sophisticated as they become denser and more complex. High frequency and faster rewrite times as well as smaller feature sizes have led to many testing challenges. This paper outlines several testing issues posed by novel memories and approaches to testing for radiation and reliability effects. We discuss methods for measurements of Total Ionizing Dose (TID).

  11. Optically Addressable, Ferroelectric Memory With NDRO

    NASA Technical Reports Server (NTRS)

    Thakoor, Sarita

    1994-01-01

    For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.

  12. Switching mechanism transition induced by annealing treatment in nonvolatile Cu/ZnO/Cu/ZnO/Pt resistive memory: From carrier trapping/detrapping to electrochemical metallization

    NASA Astrophysics Data System (ADS)

    Yang, Y. C.; Pan, F.; Zeng, F.; Liu, M.

    2009-12-01

    ZnO/Cu/ZnO trilayer films sandwiched between Cu and Pt electrodes were prepared for nonvolatile resistive memory applications. These structures show resistance switching under electrical bias both before and after a rapid thermal annealing (RTA) treatment, while it is found that the resistive switching effects in the two cases exhibit distinct characteristics. Compared with the as-fabricated device, the memory cell after RTA demonstrates remarkable device parameter improvements including lower threshold voltages, lower write current, and higher Roff/Ron ratio. A high-voltage forming process is avoided in the annealed device as well. Furthermore, the RTA treatment has triggered a switching mechanism transition from a carrier trapping/detrapping type to an electrochemical-redox-reaction-controlled conductive filament formation/rupture process, as indicated by different features in current-voltage characteristics. Both scanning electron microscopy observations and Auger electron spectroscopy depth profiles reveal that the Cu charge trapping layer in ZnO/Cu/ZnO disperses uniformly into the storage medium after RTA, while x-ray diffraction and x-ray photoelectron spectroscopy analyses demonstrate that the Cu atoms have lost electrons to become Cu2+ ions after dispersion. The above experimental facts indicate that the altered status of Cu in the ZnO/Cu/ZnO trilayer films during RTA treatment should be responsible for the switching mechanism transition. This study is envisioned to open the door for understanding the interrelation between different mechanisms that currently exist in the field of resistive memories.

  13. An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices.

    PubMed

    Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

    2017-12-01

    Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag 5 In 5 Sb 60 Te 30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

  14. An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices

    NASA Astrophysics Data System (ADS)

    Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

    2017-12-01

    Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag5In5Sb60Te30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

  15. Radiation Test Challenges for Scaled Commerical Memories

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Ladbury, Ray L.; Cohn, Lewis M.; Oldham, Timothy

    2007-01-01

    As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.

  16. A Novel Bat-Shaped Dicyanomethylene-4H-pyran-Functionalized Naphthalimide for Highly Efficient Solution-Processed Multilevel Memory Devices.

    PubMed

    Zhang, Qi-Jian; Miao, Shi-Feng; Li, Hua; He, Jing-Hui; Li, Na-Jun; Xu, Qing-Feng; Chen, Dong-Yun; Lu, Jian-Mei

    2017-06-19

    Small-molecule-based multilevel memory devices have attracted increasing attention because of their advantages, such as super-high storage density, fast reading speed, light weight, low energy consumption, and shock resistance. However, the fabrication of small-molecule-based devices always requires expensive vacuum-deposition techniques or high temperatures for spin-coating. Herein, through rational tailoring of a previous molecule, DPCNCANA (4,4'-(6,6'-bis(2-octyl-1,3-dioxo-2,3-dihydro-1H-benzo[de]isoquinolin-6-yl)-9H,9'H-[3,3'-bicarbazole]-9,9'-diyl)dibenzonitrile), a novel bat-shaped A-D-A-type (A-D-A=acceptor-donor-acceptor) symmetric framework has been successfully synthesized and can be dissolved in common solvents at room temperature. Additionally, it has a low-energy bandgap and dense intramolecular stacking in the film state. The solution-processed memory devices exhibited high-performance nonvolatile multilevel data-storage properties with low switching threshold voltages of about -1.3 and -2.7 V, which is beneficial for low power consumption. Our result should prompt the study of highly efficient solution-processed multilevel memory devices in the field of organic electronics. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. [100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

    DOEpatents

    Goyal, Amit

    2015-03-24

    Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  18. Resistive switching effect in the planar structure of all-printed, flexible and rewritable memory device based on advanced 2D nanocomposite of graphene quantum dots and white graphene flakes

    NASA Astrophysics Data System (ADS)

    Muqeet Rehman, Muhammad; Uddin Siddiqui, Ghayas; Kim, Sowon; Choi, Kyung Hyun

    2017-08-01

    Pursuit of the most appropriate materials and fabrication methods is essential for developing a reliable, rewritable and flexible memory device. In this study, we have proposed an advanced 2D nanocomposite of white graphene (hBN) flakes embedded with graphene quantum dots (GQDs) as the functional layer of a flexible memory device owing to their unique electrical, chemical and mechanical properties. Unlike the typical sandwich type structure of a memory device, we developed a cost effective planar structure, to simplify device fabrication and prevent sneak current. The entire device fabrication was carried out using printing technology followed by encapsulation in an atomically thin layer of aluminum oxide (Al2O3) for protection against environmental humidity. The proposed memory device exhibited attractive bipolar switching characteristics of high switching ratio, large electrical endurance and enhanced lifetime, without any crosstalk between adjacent memory cells. The as-fabricated device showed excellent durability for several bending cycles at various bending diameters without any degradation in bistable resistive states. The memory mechanism was deduced to be conductive filamentary; this was validated by illustrating the temperature dependence of bistable resistive states. Our obtained results pave the way for the execution of promising 2D material based next generation flexible and non-volatile memory (NVM) applications.

  19. Solution processed molecular floating gate for flexible flash memories

    NASA Astrophysics Data System (ADS)

    Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

    2013-10-01

    Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices.

  20. Solution processed molecular floating gate for flexible flash memories

    PubMed Central

    Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

    2013-01-01

    Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758

  1. Thermal annealing and temperature dependences of memory effect in organic memory transistor

    NASA Astrophysics Data System (ADS)

    Ren, X. C.; Wang, S. M.; Leung, C. W.; Yan, F.; Chan, P. K. L.

    2011-07-01

    We investigate the annealing and thermal effects of organic non-volatile memory with floating silver nanoparticles by real-time transfer curve measurements. During annealing, the memory window shows shrinkage of 23% due to structural variation of the nanoparticles. However, by increasing the device operating temperature from 20 to 90 °C after annealing, the memory window demonstrates an enlargement up to 100%. The differences in the thermal responses are explained and confirmed by the co-existence of electron and hole traps. Our findings provide a better understanding of organic memory performances under various operating temperatures and validate their applications for temperature sensing or thermal memories.

  2. Multilevel Resistance Programming in Conductive Bridge Resistive Memory

    NASA Astrophysics Data System (ADS)

    Mahalanabis, Debayan

    This work focuses on the existence of multiple resistance states in a type of emerging non-volatile resistive memory device known commonly as Programmable Metallization Cell (PMC) or Conductive Bridge Random Access Memory (CBRAM), which can be important for applications such as multi-bit memory as well as non-volatile logic and neuromorphic computing. First, experimental data from small signal, quasi-static and pulsed mode electrical characterization of such devices are presented which clearly demonstrate the inherent multi-level resistance programmability property in CBRAM devices. A physics based analytical CBRAM compact model is then presented which simulates the ion-transport dynamics and filamentary growth mechanism that causes resistance change in such devices. Simulation results from the model are fitted to experimental dynamic resistance switching characteristics. The model designed using Verilog-a language is computation-efficient and can be integrated with industry standard circuit simulation tools for design and analysis of hybrid circuits involving both CMOS and CBRAM devices. Three main circuit applications for CBRAM devices are explored in this work. Firstly, the susceptibility of CBRAM memory arrays to single event induced upsets is analyzed via compact model simulation and experimental heavy ion testing data that show possibility of both high resistance to low resistance and low resistance to high resistance transitions due to ion strikes. Next, a non-volatile sense amplifier based flip-flop architecture is proposed which can help make leakage power consumption negligible by allowing complete shutdown of power supply while retaining its output data in CBRAM devices. Reliability and energy consumption of the flip-flop circuit for different CBRAM low resistance levels and supply voltage values are analyzed and compared to CMOS designs. Possible extension of this architecture for threshold logic function computation using the CBRAM devices as re

  3. Development of non-volatile semiconductor memory

    NASA Technical Reports Server (NTRS)

    Heikkila, W. W.

    1979-01-01

    A 256 word by 8-bit random access memory chip was developed utilizing p channel, metal gate metal-nitride-oxide-silicon (MNOS) technology; with operational characteristics of a 2.5 microsecond read cycle, a 6.0 microsecond write cycle, 800 milliwatts of power dissipation; and retention characteristics of 10 to the 8th power read cycles before data refresh and 5000 hours of no power retention. Design changes were implemented to reduce switching currents that caused parasitic bipolar transistors inherent in the MNOS structure to turn on. Final wafer runs exhibited acceptable yields for a die 250 mils on a side. Evaluation testing was performed on the device in order to determine the maturity of the device. A fixed gate breakdown mechanism was found when operated continuously at high temperature.

  4. Electrical and ferroelectric properties of RF sputtered PZT/SBN on silicon for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Singh, Prashant; Jha, Rajesh Kumar; Singh, Rajat Kumar; Singh, B. R.

    2018-02-01

    We report the integration of multilayer ferroelectric film deposited by RF magnetron sputtering and explore the electrical characteristics for its application as the gate of ferroelectric field effect transistor for non-volatile memories. PZT (Pb[Zr0.35Ti0.65]O3) and SBN (SrBi2Nb2O9) ferroelectric materials were selected for the stack fabrication due to their large polarization and fatigue free properties respectively. Electrical characterization has been carried out to obtain memory window, leakage current density, PUND and endurance characteristics. Fabricated multilayer ferroelectric film capacitor structure shows large memory window of 17.73 V and leakage current density of the order 10-6 A cm-2 for the voltage sweep of -30 to +30 V. This multilayer gate stack of PZT/SBN shows promising endurance property with no degradation in the remnant polarization for the read/write iteration cycles upto 108.

  5. Memory properties of a Ge nanoring MOS device fabricated by pulsed laser deposition.

    PubMed

    Ma, Xiying

    2008-07-09

    The non-volatile charge-storage properties of memory devices with MOS structure based on Ge nanorings have been studied. The two-dimensional Ge nanorings were prepared on a p-Si(100) matrix by means of pulsed laser deposition (PLD) using the droplet technique combined with rapid annealing. Complete planar nanorings with well-defined sharp inner and outer edges were formed via an elastic self-transformation droplet process, which is probably driven by the lateral strain of the Ge/Si layers and the surface tension in the presence of Ar gas. The low leakage current was attributed to the small roughness and the few interface states in the planar Ge nanorings, and also to the effect of Coulomb blockade preventing injection. A significant threshold-voltage shift of 2.5 V was observed when an operating voltage of 8 V was implemented on the device.

  6. Semiconductor-based, large-area, flexible, electronic devices on {110}<100> oriented substrates

    DOEpatents

    Goyal, Amit

    2014-08-05

    Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110}<100> textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  7. DIFMOS - A floating-gate electrically erasable nonvolatile semiconductor memory technology. [Dual Injector Floating-gate MOS

    NASA Technical Reports Server (NTRS)

    Gosney, W. M.

    1977-01-01

    Electrically alterable read-only memories (EAROM's) or reprogrammable read-only memories (RPROM's) can be fabricated using a single-level metal-gate p-channel MOS technology with all conventional processing steps. Given the acronym DIFMOS for dual-injector floating-gate MOS, this technology utilizes the floating-gate technique for nonvolatile storage of data. Avalanche injection of hot electrons through gate oxide from a special injector diode in each bit is used to charge the floating gates. A second injector structure included in each bit permits discharge of the floating gate by avalanche injection of holes through gate oxide. The overall design of the DIFMOS bit is dictated by the physical considerations required for each of the avalanche injector types. The end result is a circuit technology which can provide fully decoded bit-erasable EAROM-type circuits using conventional manufacturing techniques.

  8. Carrier transport mechanisms of nonvolatile write-once-read-many-times memory devices with InP-ZnS core-shell nanoparticles embedded in a polymethyl methacrylate layer

    NASA Astrophysics Data System (ADS)

    Ham, Jung Hoon; Oh, Do Hyun; Cho, Sung Hwan; Jung, Jae Hun; Kim, Tae Whan; Ryu, Eui Dock; Kim, Sang Wook

    2009-03-01

    Current-voltage (I-V) curves at 300 K for Al/InP-ZnS nanoparticles embedded in a polymethyl methacrylate layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. From the I-V curves, the ON/OFF ratio for the device with InP-ZnS nanoparticles was significantly larger than that for the device without InP-ZnS nanoparticles, indicative of the existence of charge capture in the InP nanoparticles. The estimated retention time of the ON state for the WORM memory device was more than 10 years. The carrier transport mechanisms for the WORM memory devices are described by using several models to fit the experimental I-V data.

  9. Electrically Variable or Programmable Nonvolatile Capacitors

    NASA Technical Reports Server (NTRS)

    Shangqing, Liu; NaiJuan, Wu; Ignatieu, Alex; Jianren, Li

    2009-01-01

    Electrically variable or programmable capacitors based on the unique properties of thin perovskite films are undergoing development. These capacitors show promise of overcoming two important deficiencies of prior electrically programmable capacitors: Unlike in the case of varactors, it is not necessary to supply power continuously to make these capacitors retain their capacitance values. Hence, these capacitors may prove useful as components of nonvolatile analog and digital electronic memories. Unlike in the case of ferroelectric capacitors, it is possible to measure the capacitance values of these capacitors without changing the values. In other words, whereas readout of ferroelectric capacitors is destructive, readout of these capacitors can be nondestructive. A capacitor of this type is a simple two terminal device. It includes a thin film of a suitable perovskite as the dielectric layer, sandwiched between two metal or metal oxide electrodes (for example, see Figure 1). The utility of this device as a variable capacitor is based on a phenomenon, known as electrical-pulse-induced capacitance (EPIC), that is observed in thin perovskite films and especially in those thin perovskite films that exhibit the colossal magnetoresistive (CMR) effect. In EPIC, the application of one or more electrical pulses that exceed a threshold magnitude (typically somewhat less than 1 V) gives rise to a nonvolatile change in capacitance. The change in capacitance depends on the magnitude duration, polarity, and number of pulses. It is not necessary to apply a magnetic field or to cool the device below (or heat it above) room temperature to obtain EPIC. Examples of suitable CMR perovskites include Pr(1-x)Ca(x)MnO3, La(1-x)S-r(x)MnO3,and Nb(1-x)Ca(x)MnO3. Figure 2 is a block diagram showing an EPIC capacitor connected to a circuit that can vary the capacitance, measure the capacitance, and/or measure the resistance of the capacitor.

  10. Solution-processed Al-chelated gelatin for highly transparent non-volatile memory applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Chang, Yu-Chi; Wang, Yeong-Her, E-mail: yhw@ee.ncku.edu.tw

    2015-03-23

    Using the biomaterial of Al-chelated gelatin (ACG) prepared by sol-gel method in the ITO/ACG/ITO structure, a highly transparent resistive random access memory (RRAM) was obtained. The transmittance of the fabricated device is approximately 83% at 550 nm while that of Al/gelatin/ITO is opaque. As to the ITO/gelatin/ITO RRAM, no resistive switching behavior can be seen. The ITO/ACG/ITO RRAM shows high ON/OFF current ratio (>10{sup 5}), low operation voltage, good uniformity, and retention characteristics at room temperature and 85 °C. The mechanism of the ACG-based memory devices is presented. The enhancement of these electrical properties can be attributed to the chelate effect ofmore » Al ions with gelatin. Results show that transparent ACG-based memory devices possess the potential for next-generation resistive memories and bio-electronic applications.« less

  11. Fully transparent, non-volatile bipolar resistive memory based on flexible copolyimide films

    NASA Astrophysics Data System (ADS)

    Yu, Hwan-Chul; Kim, Moon Young; Hong, Minki; Nam, Kiyong; Choi, Ju-Young; Lee, Kwang-Hun; Baeck, Kyoung Koo; Kim, Kyoung-Kook; Cho, Soohaeng; Chung, Chan-Moon

    2017-01-01

    Partially aliphatic homopolyimides and copolyimides were prepared from rel-(1'R,3S,5'S)-spiro[furan-3(2H),6'-[3]oxabicyclo[3.2.1]octane]-2,2',4',5(4H)-tetrone (DAn), 2,6-diaminoanthracene (AnDA), and 4,4'-oxydianiline (ODA) by varying the molar ratio of AnDA and ODA. We utilized these polyimide films as the resistive switching layer in transparent memory devices. While WORM memory behavior was obtained with the PI-A100-O0-based device (molar feed ratio of DAn : AnDA : ODA = 1 : 1 : 0), the PI-A70-O30-based device (molar feed ratio of DAn : AnDA : ODA = 1 : 0.7 : 0.3) exhibited bipolar resistive switching behavior with stable retention for 104 s. This result implies that the memory properties can be controlled by changing the polyimide composition. The two devices prepared from PI-A100-O0 and PI-A70-O30 showed over 90% transmittance in the visible wavelength range from 400 to 800 nm. The behavior of the memory devices is considered to be governed by trap-controlled, space-charge limited conduction (SCLC) and local filament formation. [Figure not available: see fulltext.

  12. The future of memory

    NASA Astrophysics Data System (ADS)

    Marinella, M.

    In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

  13. Investigation of resistive switching behaviours in WO3-based RRAM devices

    NASA Astrophysics Data System (ADS)

    Li, Ying-Tao; Long, Shi-Bing; Lü, Hang-Bing; Liu, Qi; Wang, Qin; Wang, Yan; Zhang, Sen; Lian, Wen-Tai; Liu, Su; Liu, Ming

    2011-01-01

    In this paper, a WO3-based resistive random access memory device composed of a thin film of WO3 sandwiched between a copper top and a platinum bottom electrodes is fabricated by electron beam evaporation at room temperature. The reproducible resistive switching, low power consumption, multilevel storage possibility, and good data retention characteristics demonstrate that the Cu/WO3/Pt memory device is very promising for future nonvolatile memory applications. The formation and rupture of localised conductive filaments is suggested to be responsible for the observed resistive switching behaviours.

  14. System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices

    NASA Technical Reports Server (NTRS)

    Hall, William A. (Inventor)

    1993-01-01

    A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.

  15. Nanogap-Engineerable Electromechanical System for Ultralow Power Memory.

    PubMed

    Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei; Chu, Weiguo; Zhou, Haiqing; Sun, Lianfeng

    2018-02-01

    Nanogap engineering of low-dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub-5 nm nanogaped single-walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10 -19 J bit -1 ), ON/OFF ratio of 10 5 , stable switching ON operations, and over 30 h retention time in ambient conditions.

  16. Nanogap‐Engineerable Electromechanical System for Ultralow Power Memory

    PubMed Central

    Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei

    2017-01-01

    Abstract Nanogap engineering of low‐dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub‐5 nm nanogaped single‐walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10−19 J bit−1), ON/OFF ratio of 105, stable switching ON operations, and over 30 h retention time in ambient conditions. PMID:29619307

  17. Nonvolatile Memories Using Quantum Dot (QD) Floating Gates Assembled on II-VI Tunnel Insulators

    NASA Astrophysics Data System (ADS)

    Suarez, E.; Gogna, M.; Al-Amoody, F.; Karmakar, S.; Ayers, J.; Heller, E.; Jain, F.

    2010-07-01

    This paper presents preliminary data on quantum dot gate nonvolatile memories using nearly lattice-matched ZnS/Zn0.95Mg0.05S/ZnS tunnel insulators. The GeO x -cladded Ge and SiO x -cladded Si quantum dots (QDs) are self-assembled site-specifically on the II-VI insulator grown epitaxially over the Si channel (formed between the source and drain region). The pseudomorphic II-VI stack serves both as a tunnel insulator and a high- κ dielectric. The effect of Mg incorporation in ZnMgS is also investigated. For the control gate insulator, we have used Si3N4 and SiO2 layers grown by plasma- enhanced chemical vapor deposition.

  18. Role of Al2O3 thin layer on improving the resistive switching properties of Ta5Si3-based conductive bridge random accesses memory device

    NASA Astrophysics Data System (ADS)

    Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen

    2018-04-01

    Ta5Si3-based conductive bridge random access memory (CBRAM) devices have been investigated to improve their resistive switching characteristics for their application in future nonvolatile memory technology. Changes in the switching characteristics by the addition of a thin Al2O3 layer of different thicknesses at the bottom electrode interface of a Ta5Si3-based CBRAM devices have been studied. The double-layer device with a 1 nm Al2O3 layer has shown improved resistive switching characteristics over the single layer one with a high on/off resistance ratio of 102, high endurance of more than 104 cycles, and good retention for more than 105 s at the temperature of 130 °C. The higher thermal conductivity of Al2O3 over Ta5Si3 has been attributed to the enhanced switching properties of the double-layer devices.

  19. A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5-x/TaO2-x bilayer structures

    NASA Astrophysics Data System (ADS)

    Lee, Myoung-Jae; Lee, Chang Bum; Lee, Dongsoo; Lee, Seung Ryul; Chang, Man; Hur, Ji Hyun; Kim, Young-Bae; Kim, Chang-Jung; Seo, David H.; Seo, Sunae; Chung, U.-In; Yoo, In-Kyeong; Kim, Kinam

    2011-08-01

    Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaOx-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 1012. Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

  20. Multiple switching modes and multiple level states in memristive devices

    NASA Astrophysics Data System (ADS)

    Miao, Feng; Yang, J. Joshua; Borghetti, Julien; Strachan, John Paul; Zhang, M.-X.; Goldfarb, Ilan; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley

    2011-03-01

    As one of the most promising technologies for next generation non-volatile memory, metal oxide based memristive devices have demonstrated great advantages on scalability, operating speed and power consumption. Here we report the observation of multiple switching modes and multiple level states in different memristive systems. The multiple switching modes can be obtained by limiting the current during electroforming, and related transport behaviors, including ionic and electronic motions, are characterized. Such observation can be rationalized by a model of two effective switching layers adjacent to the bottom and top electrodes. Multiple level states, corresponding to different composition of the conducting channel, will also be discussed in the context of multiple-level storage for high density, non-volatile memory applications.

  1. Projected phase-change memory devices.

    PubMed

    Koelmans, Wabe W; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos

    2015-09-03

    Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.

  2. Enhanced organic memory devices (OMEM) with a photochromic perhydro DTE as a transduction layer (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Cordes, Sandra; Kranz, Darius; Maibach, Eduard; Kempf, Maxim; Meerholz, Klaus

    2016-09-01

    In modern electronic systems memory elements are of fundamental importance for data storage. Especially solution-processable nonvolatile organic memories, which are inexpensive and can be manufactured on flexible substrates, are a promising alternative to brittle inorganic devices. Organic photochromic switchable compounds, mostly dithienylethenes (DTEs), are thermally stable, fatigue resistant and can undergo an electrically- or/and photo-induced ring-opening and -closing reaction which results in a change of energy levels. Due to the energetic difference in the highest occupied molecular orbital (HOMO) between the open and closed isomer, the DTE layer can be exploited as a switchable hole injection barrier that controls the electrical current in the diode. We demonstrated that a light-emitting organic memory (LE-OMEM) device with a perfluoro DTE transduction layer can be switched electrically via high current densities pulses and optically by irradiated light, with impressive current ON/OFF Ratios (OOR) of 10Λ2, 10Λ4 respectively. Currently we aim to minimize the barrier of the ON state and maximize the barrier of the OFF state by designing DTE molecules with larger differences in the HOMO energies of the two isomers yielding improved OOR values. By synthesizing perhydro derivates of DTE we achieved molecules with high HOMO levels and large ΔHOMO energies providing OMEM devices with excellent physical properties (OOR 1.4 x higher than perfluoro DTE). Due to the high HOMO level of the perhydro DTE utilization of hole transport layers (HTLs) is not necessary and thus manufacturing of OMEM devices is simplified.

  3. Memory Device and Nanofabrication Techniques Using Electrically Configurable Materials

    NASA Astrophysics Data System (ADS)

    Ascenso Simões, Bruno

    Development of novel nanofabrication techniques and single-walled carbon nanotubes field configurable transistor (SWCNT-FCT) memory devices using electrically configurable materials is presented. A novel lithographic technique, electric lithography (EL), that uses electric field for pattern generation has been demonstrated. It can be used for patterning of biomolecules on a polymer surface and patterning of resist as well. Using electrical resist composed of a polymer having Boc protected amine group and iodonium salt, Boc group on the surface of polymer was modified to free amine by applying an electric field. On the modified surface of the polymer, Streptavidin pattern was fabricated with a sub-micron scale. Also patterning of polymer resin composed of epoxy monomers and diaryl iodonium salt by EL has been demonstrated. Reaction mechanism for electric resist configuration is believed to be induced by an acid generation via electrochemical reduction in the resist. We show a novel field configurable transistor (FCT) based on single-walled carbon nanotube network field-effect transistors in which poly (ethylene glycol) crosslinked by electron-beam is incorporated into the gate. The device conductance can be configured to arbitrary states reversibly and repeatedly by applying external gate voltages. Raman spectroscopy revealed that evolution of the ratio of D- to G-band intensity in the SWCNTs of the FCT progressively increases as the device is configured to lower conductance states. Electron transport studies at low temperatures showed a strong temperature dependence of the resistance. Band gap widening of CNTs up to ˜ 4 eV has been observed by examining the differential conductance-gate voltage-bias voltage relationship. The switching mechanism of the FCT is attributed a structural transformation of CNTs via reversible hydrogenation and dehydrogenations induced by gate voltages, which tunes the CNT bandgap continuously and reversibly to non-volatile analog values

  4. High reliable and stable organic field-effect transistor nonvolatile memory with a poly(4-vinyl phenol) charge trapping layer based on a pn-heterojunction active layer

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Xiang, Lanyi; Ying, Jun; Han, Jinhua

    2016-04-25

    In this letter, we demonstrate a high reliable and stable organic field-effect transistor (OFET) based nonvolatile memory (NVM) with a polymer poly(4-vinyl phenol) (PVP) as the charge trapping layer. In the unipolar OFETs, the inreversible shifts of the turn-on voltage (V{sub on}) and severe degradation of the memory window (ΔV{sub on}) at programming (P) and erasing (E) voltages, respectively, block their application in NVMs. The obstacle is overcome by using a pn-heterojunction as the active layer in the OFET memory, which supplied a holes and electrons accumulating channel at the supplied P and E voltages, respectively. Both holes and electronsmore » transferring from the channels to PVP layer and overwriting the trapped charges with an opposite polarity result in the reliable bidirectional shifts of V{sub on} at P and E voltages, respectively. The heterojunction OFET exhibits excellent nonvolatile memory characteristics, with a large ΔV{sub on} of 8.5 V, desired reading (R) voltage at 0 V, reliable P/R/E/R dynamic endurance over 100 cycles and a long retention time over 10 years.« less

  5. Effects of Heavy Ion Exposure on Nanocrystal Nonvolatile Memory

    NASA Technical Reports Server (NTRS)

    Oldham, Timothy R.; Suhail, Mohammed; Kuhn, Peter; Prinz, Erwin; Kim, Hak; LaBel, Kenneth A.

    2004-01-01

    We have irradiated engineering samples of Freescale 4M nonvolatile memories with heavy ions. They use Silicon nanocrystals as the storage element, rather than the more common floating gate. The irradiations were performed using the Texas A&M University cyclotron Single Event Effects Test Facility. The chips were tested in the static mode, and in the dynamic read mode, dynamic write (program) mode, and dynamic erase mode. All the errors observed appeared to be due to single, isolated bits, even in the program and erase modes. These errors appeared to be related to the micro-dose mechanism. All the errors corresponded to the loss of electrons from a programmed cell. The underlying physical mechanisms will be discussed in more detail later. There were no errors, which could be attributed to malfunctions of the control circuits. At the highest LET used in the test (85 MeV/mg/sq cm), however, there appeared to be a failure due to gate rupture. Failure analysis is being conducted to confirm this conclusion. There was no unambiguous evidence of latchup under any test conditions. Generally, the results on the nanocrystal technology compare favorably with results on currently available commercial floating gate technology, indicating that the technology is promising for future space applications, both civilian and military.

  6. Different importance of the volatile and non-volatile fractions of an olfactory signature for individual social recognition in rats versus mice and short-term versus long-term memory.

    PubMed

    Noack, Julia; Richter, Karin; Laube, Gregor; Haghgoo, Hojjat Allah; Veh, Rüdiger W; Engelmann, Mario

    2010-11-01

    When tested in the olfactory cued social recognition/discrimination test, rats and mice differ in their retention of a recognition memory for a previously encountered conspecific juvenile: Rats are able to recognize a given juvenile for approximately 45 min only whereas mice show not only short-term, but also long-term recognition memory (≥ 24 h). Here we modified the social recognition/social discrimination procedure to investigate the neurobiological mechanism(s) underlying the species differences. We presented a conspecific juvenile repeatedly to the experimental subjects and monitored the investigation duration as a measure for recognition. Presentation of only the volatile fraction of the juvenile olfactory signature was sufficient for both short- and long-term recognition in mice but not rats. Applying additional volatile, mono-molecular odours to the "to be recognized" juveniles failed to affect short-term memory in both species, but interfered with long-term recognition in mice. Finally immunocytochemical analysis of c-Fos as a marker for cellular activation, revealed that juvenile exposure stimulated areas involved in the processing of olfactory signals in both the main and the accessory olfactory bulb in mice. In rats, we measured an increased c-Fos synthesis almost exclusively in cells of the accessory olfactory bulb. Our data suggest that the species difference in the retention of social recognition memory is based on differences in the processing of the volatile versus non-volatile fraction of the individuals' olfactory signature. The non-volatile fraction is sufficient for retaining a short-term social memory only. Long-term social memory - as observed in mice - requires a processing of both the volatile and non-volatile fractions of the olfactory signature. Copyright © 2010 Elsevier Inc. All rights reserved.

  7. Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Cohn, Lewis M.

    2008-01-01

    At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

  8. PIYAS-proceeding to intelligent service oriented memory allocation for flash based data centric sensor devices in wireless sensor networks.

    PubMed

    Rizvi, Sanam Shahla; Chung, Tae-Sun

    2010-01-01

    Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS). This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks.

  9. Intermediate memory devices

    NASA Technical Reports Server (NTRS)

    Basalayev, G. V.; Kmet, A. B.; Rakov, M. A.; Tarasevich, V. A.

    1974-01-01

    Several methods of transfer and processing of data whose practical implementation requires operational memory devices are described. Devices incorporating multistable elements are proposed and their main parameters are given. The possibility of using the proposed devices for storing information for transmission in space radio communications channels is examined.

  10. {100}<100> or 45.degree.-rotated {100}<100>, semiconductor-based, large-area, flexible, electronic devices

    DOEpatents

    Goyal, Amit [Knoxville, TN

    2012-05-15

    Novel articles and methods to fabricate the same resulting in flexible, {100}<100> or 45.degree.-rotated {100}<100> oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  11. Modeling of Sonos Memory Cell Erase Cycle

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeond, Todd C.; Ho, Fat D.

    2010-01-01

    Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

  12. Models for Total-Dose Radiation Effects in Non-Volatile Memory

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Campbell, Philip Montgomery; Wix, Steven D.

    The objective of this work is to develop models to predict radiation effects in non- volatile memory: flash memory and ferroelectric RAM. In flash memory experiments have found that the internal high-voltage generators (charge pumps) are the most sensitive to radiation damage. Models are presented for radiation effects in charge pumps that demonstrate the experimental results. Floating gate models are developed for the memory cell in two types of flash memory devices by Intel and Samsung. These models utilize Fowler-Nordheim tunneling and hot electron injection to charge and erase the floating gate. Erase times are calculated from the models andmore » compared with experimental results for different radiation doses. FRAM is less sensitive to radiation than flash memory, but measurements show that above 100 Krad FRAM suffers from a large increase in leakage current. A model for this effect is developed which compares closely with the measurements.« less

  13. Nonvolatile memories using deep traps formed in HfO2 by Nb ion implantation

    NASA Astrophysics Data System (ADS)

    Choul Kim, Min; Oh Kim, Chang; Taek Oh, Houng; Choi, Suk-Ho; Belay, K.; Elliman, R. G.; Russo, S. P.

    2011-03-01

    We report nonvolatile memories (NVMs) based on deep-energy trap levels formed in HfO2 by metal ion implantation. A comparison of Nb- and Ta-implanted samples shows that suitable charge-trapping centers are formed in Nb-implanted samples, but not in Ta-implanted samples. This is consistent with density-functional theory calculations which predict that only Nb will form deep-energy levels in the bandgap of HfO2. Photocurrent spectroscopy exhibits characteristics consistent with one of the trap levels predicted in these calculations. Nb-implanted samples showing memory windows in capacitance-voltage (V) curves always exhibit current (I) peaks in I-V curves, indicating that NVM effects result from deep traps in HfO2. In contrast, Ta-implanted samples show dielectric breakdowns during the I-V sweeps between 5 and 11 V, consistent with the fact that no trap levels are present. For a sample implanted with a fluence of 1013 Nb cm-2, the charge losses after 104 s are ˜9.8 and ˜25.5% at room temperature (RT) and 85°C, respectively, and the expected charge loss after 10 years is ˜34% at RT, very promising for commercial NVMs.

  14. Strain-controlled nonvolatile magnetization switching

    NASA Astrophysics Data System (ADS)

    Geprägs, S.; Brandlmaier, A.; Brandt, M. S.; Gross, R.; Goennenwein, S. T. B.

    2014-11-01

    We investigate different approaches towards a nonvolatile switching of the remanent magnetization in single-crystalline ferromagnets at room temperature via elastic strain using ferromagnetic thin film/piezoelectric actuator hybrids. The piezoelectric actuator induces a voltage-controllable strain along different crystalline directions of the ferromagnetic thin film, resulting in modifications of its magnetization by converse magnetoelastic effects. We quantify the magnetization changes in the hybrids via ferromagnetic resonance spectroscopy and superconducting quantum interference device magnetometry. These measurements demonstrate a significant strain-induced change of the magnetization, limited by an inefficient strain transfer and domain formation in the particular system studied. To overcome these obstacles, we address practicable engineering concepts and use a model to demonstrate that a strain-controlled, nonvolatile magnetization switching should be possible in appropriately engineered ferromagnetic/piezoelectric actuator hybrids.

  15. Low-voltage operating flexible ferroelectric organic field-effect transistor nonvolatile memory with a vertical phase separation P(VDF-TrFE-CTFE)/PS dielectric

    NASA Astrophysics Data System (ADS)

    Xu, Meili; Xiang, Lanyi; Xu, Ting; Wang, Wei; Xie, Wenfa; Zhou, Dayu

    2017-10-01

    Future flexible electronic systems require memory devices combining low-power operation and mechanical bendability. However, high programming/erasing voltages, which are universally needed to switch the storage states in previously reported ferroelectric organic field-effect transistor (Fe-OFET) nonvolatile memories (NVMs), severely prevent their practical applications. In this work, we develop a route to achieve a low-voltage operating flexible Fe-OFET NVM. Utilizing vertical phase separation, an ultrathin self-organized poly(styrene) (PS) buffering layer covers the surface of the ferroelectric polymer layer by one-step spin-coating from their blending solution. The ferroelectric polymer with a low coercive field contributes to low-voltage operation in the Fe-OFET NVM. The polymer PS contributes to the improvement of mobility, attributing to screening the charge scattering and decreasing the surface roughness. As a result, a high performance flexible Fe-OFET NVM is achieved at the low P/E voltages of ±10 V, with a mobility larger than 0.2 cm2 V-1 s-1, a reliable P/E endurance over 150 cycles, stable data storage retention capability over 104 s, and excellent mechanical bending durability with a slight performance degradation after 1000 repetitive tensile bending cycles at a curvature radius of 5.5 mm.

  16. Nonvolatile Array Of Synapses For Neural Network

    NASA Technical Reports Server (NTRS)

    Tawel, Raoul

    1993-01-01

    Elements of array programmed with help of ultraviolet light. A 32 x 32 very-large-scale integrated-circuit array of electronic synapses serves as building-block chip for analog neural-network computer. Synaptic weights stored in nonvolatile manner. Makes information content of array invulnerable to loss of power, and, by eliminating need for circuitry to refresh volatile synaptic memory, makes architecture simpler and more compact.

  17. A Vertical Organic Transistor Architecture for Fast Nonvolatile Memory.

    PubMed

    She, Xiao-Jian; Gustafsson, David; Sirringhaus, Henning

    2017-02-01

    A new device architecture for fast organic transistor memory is developed, based on a vertical organic transistor configuration incorporating high-performance ambipolar conjugated polymers and unipolar small molecules as the transport layers, to achieve reliable and fast programming and erasing of the threshold voltage shift in less than 200 ns. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  18. Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

    NASA Technical Reports Server (NTRS)

    Thakoor, Sarita (Inventor)

    1992-01-01

    Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

  19. Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

    NASA Technical Reports Server (NTRS)

    Thakoor, Sarita (Inventor)

    1994-01-01

    Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

  20. Fabrication of Nano-Crossbar Resistive Switching Memory Based on the Copper-Tantalum Pentoxide-Platinum Device Structure

    NASA Astrophysics Data System (ADS)

    Olga Gneri, Paula; Jardim, Marcos

    Resistive switching memory has been of interest lately not only for its simple metal-insulator-metal (MIM) structure but also for its promising ease of scalability an integration into current CMOS technologies like the Field Programmable Gate Arrays and other non-volatile memory applications. There are several resistive switching MIM combinations but under this scope of research, attention will be paid to the bipolar resistive switching characteristics and fabrication of Tantalum Pentaoxide sandwiched between platinum and copper. By changing the polarity of the voltage bias, this metal-insulator-metal (MIM) device can be switched between a high resistive state (OFF) and low resistive state (ON). The change in states is induced by an electrochemical metallization process, which causes a formation or dissolution of Cu metal filamentary paths in the Tantalum Pentaoxide insulator. There is very little thorough experimental information about the Cu-Ta 2O5-Pt switching characteristics when scaled to nanometer dimensions. In this light, the MIM structure was fabricated in a two-dimensional crossbar format. Also, with the limited available resources, a multi-spacer technique was formulated to localize the active device area in this MIM configuration to less than 20nm. This step is important in understanding the switching characteristics and reliability of this structure when scaled to nanometer dimensions.

  1. Signal and noise extraction from analog memory elements for neuromorphic computing.

    PubMed

    Gong, N; Idé, T; Kim, S; Boybat, I; Sebastian, A; Narayanan, V; Ando, T

    2018-05-29

    Dense crossbar arrays of non-volatile memory (NVM) can potentially enable massively parallel and highly energy-efficient neuromorphic computing systems. The key requirements for the NVM elements are continuous (analog-like) conductance tuning capability and switching symmetry with acceptable noise levels. However, most NVM devices show non-linear and asymmetric switching behaviors. Such non-linear behaviors render separation of signal and noise extremely difficult with conventional characterization techniques. In this study, we establish a practical methodology based on Gaussian process regression to address this issue. The methodology is agnostic to switching mechanisms and applicable to various NVM devices. We show tradeoff between switching symmetry and signal-to-noise ratio for HfO 2 -based resistive random access memory. Then, we characterize 1000 phase-change memory devices based on Ge 2 Sb 2 Te 5 and separate total variability into device-to-device variability and inherent randomness from individual devices. These results highlight the usefulness of our methodology to realize ideal NVM devices for neuromorphic computing.

  2. Logic computation in phase change materials by threshold and memory switching.

    PubMed

    Cassinerio, M; Ciocchini, N; Ielmini, D

    2013-11-06

    Memristors, namely hysteretic devices capable of changing their resistance in response to applied electrical stimuli, may provide new opportunities for future memory and computation, thanks to their scalable size, low switching energy and nonvolatile nature. We have developed a functionally complete set of logic functions including NOR, NAND and NOT gates, each utilizing a single phase-change memristor (PCM) where resistance switching is due to the phase transformation of an active chalcogenide material. The logic operations are enabled by the high functionality of nanoscale phase change, featuring voltage comparison, additive crystallization and pulse-induced amorphization. The nonvolatile nature of memristive states provides the basis for developing reconfigurable hybrid logic/memory circuits featuring low-power and high-speed switching. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications

    PubMed Central

    Chen, Min-Cheng; Chen, Hao-Yu; Lin, Chia-Yi; Chien, Chao-Hsin; Hsieh, Tsung-Fan; Horng, Jim-Tong; Qiu, Jian-Tai; Huang, Chien-Chao; Ho, Chia-Hua; Yang, Fu-Liang

    2012-01-01

    This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically Vth-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady Vth adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording. PMID:22666012

  4. Design of a magnetic-tunnel-junction-oriented nonvolatile lookup table circuit with write-operation-minimized data shifting

    NASA Astrophysics Data System (ADS)

    Suzuki, Daisuke; Hanyu, Takahiro

    2018-04-01

    A magnetic-tunnel-junction (MTJ)-oriented nonvolatile lookup table (LUT) circuit, in which a low-power data-shift function is performed by minimizing the number of write operations in MTJ devices is proposed. The permutation of the configuration memory cell for read/write access is performed as opposed to conventional direct data shifting to minimize the number of write operations, which results in significant write energy savings in the data-shift function. Moreover, the hardware cost of the proposed LUT circuit is small since the selector is shared between read access and write access. In fact, the power consumption in the data-shift function and the transistor count are reduced by 82 and 52%, respectively, compared with those in a conventional static random-access memory-based implementation using a 90 nm CMOS technology.

  5. Conductive bridge random access memory characteristics of SiCN based transparent device due to indium diffusion

    NASA Astrophysics Data System (ADS)

    Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen

    2018-03-01

    In this work, the transparent bipolar resistive switching characteristics of a SiCN-based ITO/SiCN/AZO structure due to In diffusion from ITO is studied. The SiCN based device is found to be 80% transparent in the visible wavelength region. This device, with AZO as both top and bottom electrodes, does not show any RRAM property due to deposition of the high quality O2-free SiCN film. Replacing the AZO top electrode with ITO in this device results in good resistive switching (RS) characteristics with a high on/off ratio and long retention. Replacing the SiCN film with ZrO2 also results in excellent RS characteristics due to the formation of an oxygen vacancies filament inside the ZrO2 film. A resistance ratio of on/off is found to be higher in the SiCN based device compared to that of the ZrO2 device. Diffusion of In from ITO into the SiCN film on application of high positive voltage during forming can be attributed to the occurrence of RS in the device, which is confirmed by the analyses of energy dispersive spectroscopy and secondary-ion mass spectrometry. This study shows a pathway for the fabrication of CBRAM based transparent devices for non-volatile memory application.

  6. From MEMRISTOR to MEMImpedance device

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wakrim, T.; Univ. Grenoble Alpes, G2Elab, F-38000 Grenoble; Vallée, C., E-mail: christophe.vallee@cea.fr

    2016-02-01

    The behavior of the capacitance switching of HfO{sub 2} Resistive non-volatile Memories is investigated in view of realizing a MEMImpedance (MEM-Z) device. In such a Metal Insulator Metal structure, the impedance value can be tuned by the adjustment of both resistance and capacitance values. We observe a strong variation of capacitance from positive to negative values in a single layer Metal Insulator Metal device made of HfO{sub 2} deposited by Atomic Layer Deposition, but unfortunately no memory effect is observed. However, in the case of a two layer structure, a device has been obtained with a memory effect where bothmore » resistance and capacitance values can be tuned simultaneously, with a variation of capacitance down to negative values to get an inductive behavior. Negative capacitance values are observed for voltage values near SET voltage. A schematic model based on shaped oxygen vacancy density is proposed to account for this capacitance variation. The oxygen vacancies can be either isolated or connected in the bulk of the oxide.« less

  7. Achieving high mobility, low-voltage operating organic field-effect transistor nonvolatile memory by an ultraviolet-ozone treating ferroelectric terpolymer

    PubMed Central

    Xiang, Lanyi; Wang, Wei; Xie, Wenfa

    2016-01-01

    Poly(vinylidene fluoride–trifluoroethylene) has been widely used as a dielectric of the ferroelectric organic field-effect transistor (FE-OFET) nonvolatile memory (NVM). Some critical issues, including low mobility and high operation voltage, existed in these FE-OFET NVMs, should be resolved before considering to their commercial application. In this paper, we demonstrated low-voltage operating FE-OFET NVMs based on a ferroelectric terpolymer poly(vinylidene-fluoride-trifluoroethylene-chlorotrifluoroethylene) [P(VDF-TrFE-CTFE)] owed to its low coercive field. By applying an ultraviolet-ozone (UVO) treatment to modify the surface of P(VDF-TrFE-CTFE) films, the growth model of the pentacene film was changed, which improved the pentacene grain size and the interface morphology of the pentacene/P(VDF-TrFE-CTFE). Thus, the mobility of the FE-OFET was significantly improved. As a result, a high performance FE-OFET NVM, with a high mobility of 0.8 cm2 V−1 s−1, large memory window of 15.4~19.2, good memory on/off ratio of 103, the reliable memory endurance over 100 cycles and stable memory retention ability, was achieved at a low operation voltage of ±15 V. PMID:27824101

  8. Electrostatic Switching in Vertically Oriented Nanotubes for Nonvolatile Memory Applications

    NASA Technical Reports Server (NTRS)

    Kaul, Anupama B.; Khan, Paul; Jennings, Andrew T.; Greer, Julia R.; Megerian, Krikor G.; Allmen, Paul von

    2009-01-01

    We have demonstrated electrostatic switching in vertically oriented nanotubes or nanofibers, where a nanoprobe was used as the actuating electrode inside an SEM. When the nanoprobe was manipulated to be in close proximity to a single tube, switching voltages between 10 V - 40 V were observed, depending on the geometrical parameters. The turn-on transitions appeared to be much sharper than the turn-off transitions which were limited by the tube-to-probe contact resistances. In many cases, stiction forces at these dimensions were dominant, since the tube appeared stuck to the probe even after the voltage returned to 0 V, suggesting that such structures are promising for nonvolatile memory applications. The stiction effects, to some extent, can be adjusted by engineering the switch geometry appropriately. Nanoscale mechanical measurements were also conducted on the tubes using a custom-built anoindentor inside an SEM, from which preliminary material parameters, such as the elastic modulus, were extracted. The mechanical measurements also revealed that the tubes appear to be well adhered to the substrate. The material parameters gathered from the mechanical measurements were then used in developing an electrostatic model of the switch using a commercially available finite-element simulator. The calculated pull-in voltages appeared to be in agreement to the experimentally obtained switching voltages to first order.

  9. Large-area, flexible imaging arrays constructed by light-charge organic memories

    PubMed Central

    Zhang, Lei; Wu, Ti; Guo, Yunlong; Zhao, Yan; Sun, Xiangnan; Wen, Yugeng; Yu, Gui; Liu, Yunqi

    2013-01-01

    Existing organic imaging circuits, which offer attractive benefits of light weight, low cost and flexibility, are exclusively based on phototransistor or photodiode arrays. One shortcoming of these photo-sensors is that the light signal should keep invariant throughout the whole pixel-addressing and reading process. As a feasible solution, we synthesized a new charge storage molecule and embedded it into a device, which we call light-charge organic memory (LCOM). In LCOM, the functionalities of photo-sensor and non-volatile memory are integrated. Thanks to the deliberate engineering of electronic structure and self-organization process at the interface, 92% of the stored charges, which are linearly controlled by the quantity of light, retain after 20000 s. The stored charges can also be non-destructively read and erased by a simple voltage program. These results pave the way to large-area, flexible imaging circuits and demonstrate a bright future of small molecular materials in non-volatile memory. PMID:23326636

  10. An associative capacitive network based on nanoscale complementary resistive switches for memory-intensive computing

    NASA Astrophysics Data System (ADS)

    Kavehei, Omid; Linn, Eike; Nielen, Lutz; Tappertzhofen, Stefan; Skafidas, Efstratios; Valov, Ilia; Waser, Rainer

    2013-05-01

    We report on the implementation of an Associative Capacitive Network (ACN) based on the nondestructive capacitive readout of two Complementary Resistive Switches (2-CRSs). ACNs are capable of performing a fully parallel search for Hamming distances (i.e. similarity) between input and stored templates. Unlike conventional associative memories where charge retention is a key function and hence, they require frequent refresh cycles, in ACNs, information is retained in a nonvolatile resistive state and normal tasks are carried out through capacitive coupling between input and output nodes. Each device consists of two CRS cells and no selective element is needed, therefore, CMOS circuitry is only required in the periphery, for addressing and read-out. Highly parallel processing, nonvolatility, wide interconnectivity and low-energy consumption are significant advantages of ACNs over conventional and emerging associative memories. These characteristics make ACNs one of the promising candidates for applications in memory-intensive and cognitive computing, switches and routers as binary and ternary Content Addressable Memories (CAMs) and intelligent data processing.

  11. Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

    NASA Technical Reports Server (NTRS)

    Swift, G.

    2002-01-01

    JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

  12. Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits

    NASA Astrophysics Data System (ADS)

    Sahay, Shubham; Suri, Manan

    2017-12-01

    This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.

  13. Ferroelectric memory evaluation and development system

    NASA Astrophysics Data System (ADS)

    Bondurant, David W.

    Attention is given to the Ramtron FEDS-1, an IBM PC/AT compatible single-board 16-b microcomputer with 8-kbyte program/data memory implemented with nonvolatile ferroelectric dynamic RAM. This is the first demonstration of a new type of solid state nonvolatile read/write memory, the ferroelectric RAM (FRAM). It is suggested that this memory technology will have a significant impact on avionics system performance and reliability.

  14. Switching behavior of resistive change memory using oxide nanowires

    NASA Astrophysics Data System (ADS)

    Aono, Takashige; Sugawa, Kosuke; Shimizu, Tomohiro; Shingubara, Shoso; Takase, Kouichi

    2018-06-01

    Resistive change random access memory (ReRAM), which is expected to be the next-generation nonvolatile memory, often has wide switching voltage distributions due to many kinds of conductive filaments. In this study, we have tried to suppress the distribution through the structural restriction of the filament-forming area using NiO nanowires. The capacitor with Ni metal nanowires whose surface is oxidized showed good switching behaviors with narrow distributions. The knowledge gained from our study will be very helpful in producing practical ReRAM devices.

  15. Adaptive microwave impedance memory effect in a ferromagnetic insulator.

    PubMed

    Lee, Hanju; Friedman, Barry; Lee, Kiejin

    2016-12-14

    Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures.

  16. Adaptive microwave impedance memory effect in a ferromagnetic insulator

    PubMed Central

    Lee, Hanju; Friedman, Barry; Lee, Kiejin

    2016-01-01

    Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures. PMID:27966536

  17. Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

    PubMed Central

    Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

    2016-01-01

    Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced. PMID:27834352

  18. Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic.

    PubMed

    Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

    2016-11-11

    Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

  19. Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

    NASA Astrophysics Data System (ADS)

    Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

    2016-11-01

    Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

  20. Memory and Spin Injection Devices Involving Half Metals

    DOE PAGES

    Shaughnessy, M.; Snow, Ryan; Damewood, L.; ...

    2011-01-01

    We suggest memory and spin injection devices fabricated with half-metallic materials and based on the anomalous Hall effect. Schematic diagrams of the memory chips, in thin film and bulk crystal form, are presented. Spin injection devices made in thin film form are also suggested. These devices do not need any external magnetic field but make use of their own magnetization. Only a gate voltage is needed. The carriers are 100% spin polarized. Memory devices may potentially be smaller, faster, and less volatile than existing ones, and the injection devices may be much smaller and more efficient than existing spin injectionmore » devices.« less

  1. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    PubMed

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  2. Implementation of Ferroelectric Memories for Space Applications

    NASA Technical Reports Server (NTRS)

    Philpy, Stephen C.; Derbenwick, Gary F.; Kamp, David A.; Isaacson, Alan F.

    2000-01-01

    Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

  3. Tuning the Electrical Memory Behavior from Nonvolatile to Volatile in Functional Copolyimides Bearing Varied Fluorene and Pyrene Moieties

    NASA Astrophysics Data System (ADS)

    Jia, Nanfang; Qi, Shengli; Tian, Guofeng; Wang, Xiaodong; Wu, Dezhen

    2017-04-01

    For producing polymer based electronics with good memory behavior, a series of functional copolyimides were designed and synthesized in this work by copolymerizing 3,3',4,4'-diphenylsulfonetetracarboxylic dianhydride (DSDA) with (9,9'-bis(4-aminophenyl)fluorene) (BAPF) and N, N-bis(4-aminophenyl) aminopyrene (DAPAP) diamines. The synthesized copolyimides DSDA/(DAPAP/BAPF) were denoted as coPI-DAPAP x ( x = 100, 50, 20, 10, 5, 1, 0), where x% represents the molar fraction of the DAPAP unit in the diamines. Characterization results indicate that the coPI-DAPAP x exhibits tunable electrical switching behaviors from write once read many times (WORM, nonvolatile, coPI-DAPAP100, coPI-DAPAP50, coPI-DAPAP20, coPI-DAPAP10) to the static random access memory (SRAM, volatile, coPI-DAPAP5, coPI-DAPAP1) with the variation of the DAPAP content. Optical and electrochemical characterization show gradually decreasing highest occupied molecular orbital levels and enlarged energy gap with the decrease of the DAPAP moiety, suggesting decreasing charge-transfer effect in the copolyimides, which can account for the observed WORM-SRAM memory conversion. Meanwhile, the charge transfer process was elucidated by quantum chemical calculation at B3LYP/6-31G(d) theory level. This work shows the effect of electron donor content on the memory behavior of polymer electronic materials.

  4. Lead-free epitaxial ferroelectric material integration on semiconducting (100) Nb-doped SrTiO3 for low-power non-volatile memory and efficient ultraviolet ray detection

    PubMed Central

    Kundu, Souvik; Clavel, Michael; Biswas, Pranab; Chen, Bo; Song, Hyun-Cheol; Kumar, Prashant; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Sanghadasa, Mohan; Priya, Shashank

    2015-01-01

    We report lead-free ferroelectric based resistive switching non-volatile memory (NVM) devices with epitaxial (1-x)BaTiO3-xBiFeO3 (x = 0.725) (BT-BFO) film integrated on semiconducting (100) Nb (0.7%) doped SrTiO3 (Nb:STO) substrates. The piezoelectric force microscopy (PFM) measurement at room temperature demonstrated ferroelectricity in the BT-BFO thin film. PFM results also reveal the repeatable polarization inversion by poling, manifesting its potential for read-write operation in NVM devices. The electroforming-free and ferroelectric polarization coupled electrical behaviour demonstrated excellent resistive switching with high retention time, cyclic endurance, and low set/reset voltages. X-ray photoelectron spectroscopy was utilized to determine the band alignment at the BT-BFO and Nb:STO heterojunction, and it exhibited staggered band alignment. This heterojunction is found to behave as an efficient ultraviolet photo-detector with low rise and fall time. The architecture also demonstrates half-wave rectification under low and high input signal frequencies, where the output distortion is minimal. The results provide avenue for an electrical switch that can regulate the pixels in low or high frequency images. Combined this work paves the pathway towards designing future generation low-power ferroelectric based microelectronic devices by merging both electrical and photovoltaic properties of BT-BFO materials. PMID:26202946

  5. Lead-free epitaxial ferroelectric material integration on semiconducting (100) Nb-doped SrTiO3 for low-power non-volatile memory and efficient ultraviolet ray detection.

    PubMed

    Kundu, Souvik; Clavel, Michael; Biswas, Pranab; Chen, Bo; Song, Hyun-Cheol; Kumar, Prashant; Halder, Nripendra N; Hudait, Mantu K; Banerji, Pallab; Sanghadasa, Mohan; Priya, Shashank

    2015-07-23

    We report lead-free ferroelectric based resistive switching non-volatile memory (NVM) devices with epitaxial (1-x)BaTiO3-xBiFeO3 (x = 0.725) (BT-BFO) film integrated on semiconducting (100) Nb (0.7%) doped SrTiO3 (Nb:STO) substrates. The piezoelectric force microscopy (PFM) measurement at room temperature demonstrated ferroelectricity in the BT-BFO thin film. PFM results also reveal the repeatable polarization inversion by poling, manifesting its potential for read-write operation in NVM devices. The electroforming-free and ferroelectric polarization coupled electrical behaviour demonstrated excellent resistive switching with high retention time, cyclic endurance, and low set/reset voltages. X-ray photoelectron spectroscopy was utilized to determine the band alignment at the BT-BFO and Nb:STO heterojunction, and it exhibited staggered band alignment. This heterojunction is found to behave as an efficient ultraviolet photo-detector with low rise and fall time. The architecture also demonstrates half-wave rectification under low and high input signal frequencies, where the output distortion is minimal. The results provide avenue for an electrical switch that can regulate the pixels in low or high frequency images. Combined this work paves the pathway towards designing future generation low-power ferroelectric based microelectronic devices by merging both electrical and photovoltaic properties of BT-BFO materials.

  6. Oxide Structure Dependence of SiO2/SiOx/3C-SiC/n-Type Si Nonvolatile Resistive Memory on Memory Operation Characteristics

    NASA Astrophysics Data System (ADS)

    Yamaguchi, Yuichiro; Shouji, Masatsugu; Suda, Yoshiyuki

    2012-11-01

    We have investigated the dependence of the oxide layer structure of our previously proposed metal/SiO2/SiOx/3C-SiC/n-Si/metal metal-insulator-semiconductor (MIS) resistive memory device on the memory operation characteristics. The current-voltage (I-V) measurement and X-ray photoemission spectroscopy results suggest that SiOx defect states mainly caused by the oxidation of 3C-SiC at temperatures below 1000 °C are related to the hysteresis memory behavior in the I-V curve. By restricting the SiOx interface region, the number of switching cycles and the on/off current ratio are more enhanced. Compared with a memory device formed by one-step or two-step oxidation of 3C-SiC, a memory device formed by one-step oxidation of Si/3C-SiC exhibits a more restrictive SiOx interface with a more definitive SiO2 layer and higher memory performances for both the endurance switching cycle and on/off current ratio.

  7. Feasibility of self-structured current accessed bubble devices in spacecraft recording systems

    NASA Technical Reports Server (NTRS)

    Nelson, G. L.; Krahn, D. R.; Dean, R. H.; Paul, M. C.; Lo, D. S.; Amundsen, D. L.; Stein, G. A.

    1985-01-01

    The self-structured, current aperture approach to magnetic bubble memory is described. Key results include: (1) demonstration that self-structured bubbles (a lattice of strongly interacting bubbles) will slip by one another in a storage loop at spacings of 2.5 bubble diameters, (2) the ability of self-structured bubbles to move past international fabrication defects (missing apertures) in the propagation conductors (defeat tolerance), and (3) moving bubbles at mobility limited speeds. Milled barriers in the epitaxial garnet are discussed for containment of the bubble lattice. Experimental work on input/output tracks, storage loops, gates, generators, and magneto-resistive detectors for a prototype device are discussed. Potential final device architectures are described with modeling of power consumption, data rates, and access times. Appendices compare the self-structured bubble memory from the device and system perspectives with other non-volatile memory technologies.

  8. Direct Observation of Conducting Filaments in Tungsten Oxide Based Transparent Resistive Switching Memory.

    PubMed

    Qian, Kai; Cai, Guofa; Nguyen, Viet Cuong; Chen, Tupei; Lee, Pooi See

    2016-10-05

    Transparent nonvolatile memory has great potential in integrated transparent electronics. Here, we present highly transparent resistive switching memory using stoichiometric WO 3 film produced by cathodic electrodeposition with indium tin oxide electrodes. The memory device demonstrates good optical transmittance, excellent operative uniformity, low operating voltages (+0.25 V/-0.42 V), and long retention time (>10 4 s). Conductive atomic force microscopy, ex situ transmission electron microscopy, and X-ray photoelectron spectroscopy experiments directly confirm that the resistive switching effects occur due to the electric field-induced formation and annihilation of the tungsten-rich conductive channel between two electrodes. Information on the physical and chemical nature of conductive filaments offers insightful design strategies for resistive switching memories with excellent performances. Moreover, we demonstrate the promising applicability of the cathodic electrodeposition method for future resistive memory devices.

  9. A non-volatile organic electrochemical device as a low-voltage artificial synapse for neuromorphic computing

    DOE PAGES

    van de Burgt, Yoeri; Lubberman, Ewout; Fuller, Elliot J.; ...

    2017-02-20

    The brain is capable of massively parallel information processing while consuming only ~1- 100 fJ per synaptic event. Inspired by the efficiency of the brain, CMOS-based neural architectures and memristors are being developed for pattern recognition and machine learning. However, the volatility, design complexity and high supply voltages for CMOS architectures, and the stochastic and energy-costly switching of memristors complicate the path to achieve the interconnectivity, information density, and energy efficiency of the brain using either approach. Here we describe an electrochemical neuromorphic organic device (ENODe) operating with a fundamentally different mechanism from existing memristors. ENODe switches at low energymore » (<10 pJ for 10 3 μm 2 devices) and voltage, displays >500 distinct, non-volatile conductance states within a ~1 V range, and achieves high classification accuracy when implemented in neural network simulations. Plastic ENODEs are also fabricated on flexible substrates enabling the integration of neuromorphic functionality in stretchable electronic systems. Mechanical flexibility makes ENODes compatible with 3D architectures, opening a path towards extreme interconnectivity comparable to the human brain.« less

  10. A non-volatile organic electrochemical device as a low-voltage artificial synapse for neuromorphic computing.

    PubMed

    van de Burgt, Yoeri; Lubberman, Ewout; Fuller, Elliot J; Keene, Scott T; Faria, Grégorio C; Agarwal, Sapan; Marinella, Matthew J; Alec Talin, A; Salleo, Alberto

    2017-04-01

    The brain is capable of massively parallel information processing while consuming only ∼1-100 fJ per synaptic event. Inspired by the efficiency of the brain, CMOS-based neural architectures and memristors are being developed for pattern recognition and machine learning. However, the volatility, design complexity and high supply voltages for CMOS architectures, and the stochastic and energy-costly switching of memristors complicate the path to achieve the interconnectivity, information density, and energy efficiency of the brain using either approach. Here we describe an electrochemical neuromorphic organic device (ENODe) operating with a fundamentally different mechanism from existing memristors. ENODe switches at low voltage and energy (<10 pJ for 10 3  μm 2 devices), displays >500 distinct, non-volatile conductance states within a ∼1 V range, and achieves high classification accuracy when implemented in neural network simulations. Plastic ENODes are also fabricated on flexible substrates enabling the integration of neuromorphic functionality in stretchable electronic systems. Mechanical flexibility makes ENODes compatible with three-dimensional architectures, opening a path towards extreme interconnectivity comparable to the human brain.

  11. A non-volatile organic electrochemical device as a low-voltage artificial synapse for neuromorphic computing

    NASA Astrophysics Data System (ADS)

    van de Burgt, Yoeri; Lubberman, Ewout; Fuller, Elliot J.; Keene, Scott T.; Faria, Grégorio C.; Agarwal, Sapan; Marinella, Matthew J.; Alec Talin, A.; Salleo, Alberto

    2017-04-01

    The brain is capable of massively parallel information processing while consuming only ~1-100 fJ per synaptic event. Inspired by the efficiency of the brain, CMOS-based neural architectures and memristors are being developed for pattern recognition and machine learning. However, the volatility, design complexity and high supply voltages for CMOS architectures, and the stochastic and energy-costly switching of memristors complicate the path to achieve the interconnectivity, information density, and energy efficiency of the brain using either approach. Here we describe an electrochemical neuromorphic organic device (ENODe) operating with a fundamentally different mechanism from existing memristors. ENODe switches at low voltage and energy (<10 pJ for 103 μm2 devices), displays >500 distinct, non-volatile conductance states within a ~1 V range, and achieves high classification accuracy when implemented in neural network simulations. Plastic ENODes are also fabricated on flexible substrates enabling the integration of neuromorphic functionality in stretchable electronic systems. Mechanical flexibility makes ENODes compatible with three-dimensional architectures, opening a path towards extreme interconnectivity comparable to the human brain.

  12. Fabrication of cross-shaped Cu-nanowire resistive memory devices using a rapid, scalable, and designable inorganic-nanowire-digital-alignment technique (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Xu, Wentao; Lee, Yeongjun; Min, Sung-Yong; Park, Cheolmin; Lee, Tae-Woo

    2016-09-01

    Resistive random-access memory (RRAM) is a candidate next generation nonvolatile memory due to its high access speed, high density and ease of fabrication. Especially, cross-point-access allows cross-bar arrays that lead to high-density cells in a two-dimensional planar structure. Use of such designs could be compatible with the aggressive scaling down of memory devices, but existing methods such as optical or e-beam lithographic approaches are too complicated. One-dimensional inorganic nanowires (i-NWs) are regarded as ideal components of nanoelectronics to circumvent the limitations of conventional lithographic approaches. However, post-growth alignment of these i-NWs precisely on a large area with individual control is still a difficult challenge. Here, we report a simple, inexpensive, and rapid method to fabricate two-dimensional arrays of perpendicularly-aligned, individually-conductive Cu-NWs with a nanometer-scale CuxO layer sandwiched at each cross point, by using an inorganic-nanowire-digital-alignment technique (INDAT) and a one-step reduction process. In this approach, the oxide layer is self-formed and patterned, so conventional deposition and lithography are not necessary. INDAT eliminates the difficulties of alignment and scalable fabrication that are encountered when using currently-available techniques that use inorganic nanowires. This simple process facilitates fabrication of cross-point nonvolatile memristor arrays. Fabricated arrays had reproducible resistive switching behavior, high on/off current ratio (Ion/Ioff) 10 6 and extensive cycling endurance. This is the first report of memristors with the resistive switching oxide layer self-formed, self-patterned and self-positioned; we envision that the new features of the technique will provide great opportunities for future nano-electronic circuits.

  13. Homogeneous-oxide stack in IGZO thin-film transistors for multi-level-cell NAND memory application

    NASA Astrophysics Data System (ADS)

    Ji, Hao; Wei, Yehui; Zhang, Xinlei; Jiang, Ran

    2017-11-01

    A nonvolatile charge-trap-flash memory that is based on amorphous indium-gallium-zinc-oxide thin film transistors was fabricated with a homogeneous-oxide structure for a multi-level-cell application. All oxide layers, i.e., tunneling layer, charge trapping layer, and blocking layer, were fabricated with Al2O3 films. The fabrication condition (including temperature and deposition method) of the charge trapping layer was different from those of the other oxide layers. This device demonstrated a considerable large memory window of 4 V between the states fully erased and programmed with the operation voltage less than 14 V. This kind of device shows a good prospect for multi-level-cell memory applications.

  14. Electronic device aspects of neural network memories

    NASA Technical Reports Server (NTRS)

    Lambe, J.; Moopenn, A.; Thakoor, A. P.

    1985-01-01

    The basic issues related to the electronic implementation of the neural network model (NNM) for content addressable memories are examined. A brief introduction to the principles of the NNM is followed by an analysis of the information storage of the neural network in the form of a binary connection matrix and the recall capability of such matrix memories based on a hardware simulation study. In addition, materials and device architecture issues involved in the future realization of such networks in VLSI-compatible ultrahigh-density memories are considered. A possible space application of such devices would be in the area of large-scale information storage without mechanical devices.

  15. Scientific developments of liquid crystal-based optical memory: a review

    NASA Astrophysics Data System (ADS)

    Prakash, Jai; Chandran, Achu; Biradar, Ashok M.

    2017-01-01

    The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.

  16. Scientific developments of liquid crystal-based optical memory: a review.

    PubMed

    Prakash, Jai; Chandran, Achu; Biradar, Ashok M

    2017-01-01

    The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.

  17. Ultra-low power, highly uniform polymer memory by inserted multilayer graphene electrode

    NASA Astrophysics Data System (ADS)

    Jang, Byung Chul; Seong, Hyejeong; Kim, Jong Yun; Koo, Beom Jun; Kim, Sung Kyu; Yang, Sang Yoon; Gap Im, Sung; Choi, Sung-Yool

    2015-12-01

    Filament type resistive random access memory (RRAM) based on polymer thin films is a promising device for next generation, flexible nonvolatile memory. However, the resistive switching nonuniformity and the high power consumption found in the general filament type RRAM devices present critical issues for practical memory applications. Here, we introduce a novel approach not only to reduce the power consumption but also to improve the resistive switching uniformity in RRAM devices based on poly(1,3,5-trimethyl-3,4,5-trivinyl cyclotrisiloxane) by inserting multilayer graphene (MLG) at the electrode/polymer interface. The resistive switching uniformity was thereby significantly improved, and the power consumption was markedly reduced by 250 times. Furthermore, the inserted MLG film enabled a transition of the resistive switching operation from unipolar resistive switching to bipolar resistive switching and induced self-compliance behavior. The findings of this study can pave the way toward a new area of application for graphene in electronic devices.

  18. Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory

    NASA Astrophysics Data System (ADS)

    Kim, Sang-Koog

    2011-03-01

    An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.

  19. Organic transistor memory with a charge storage molecular double-floating-gate monolayer.

    PubMed

    Tseng, Chiao-Wei; Huang, Ding-Chi; Tao, Yu-Tai

    2015-05-13

    A flexible, low-voltage, and nonvolatile memory device was fabricated by implanting a functional monolayer on an aluminum oxide dielectric surface in a pentacene-based organic transistor. The monolayer-forming molecule contains a phosphonic acid group as the anchoring moiety and a charge-trapping core group flanked between two alkyl chain spacers as the charge trapping site. The memory characteristics strongly depend on the monolayer used due to the localized charge-trapping capability for different core groups, including the diacetylenic (DA) unit as the hole carrier trap, the naphthalenetetracarboxyldiimide (ND) unit as the electron carrier trap, and the one with both DA and ND units present, respectively. The device with the monolayer carrying both DA and ND groups has a larger memory window than that for the one containing DA only and a longer retention time than that for the one containing DA or ND only, giving a memory window of 1.4 V and a retention time around 10(9) s. This device with hybrid organic monolayer/inorganic dielectrics also exhibited rather stable device characteristics upon bending of the polymeric substrate.

  20. Resistive Switching in All-Printed, Flexible and Hybrid MoS2-PVA Nanocomposite based Memristive Device Fabricated by Reverse Offset

    PubMed Central

    Rehman, Muhammad Muqeet; Siddiqui, Ghayas Uddin; Gul, Jahan Zeb; Kim, Soo-Wan; Lim, Jong Hwan; Choi, Kyung Hyun

    2016-01-01

    Owing to the increasing interest in the nonvolatile memory devices, resistive switching based on hybrid nanocomposite of a 2D material, molybdenum disulphide (MoS2) and polyvinyl alcohol (PVA) is explored in this work. As a proof of concept, we have demonstrated the fabrication of a memory device with the configuration of PET/Ag/MoS2-PVA/Ag via an all printed, hybrid, and state of the art fabrication approach. Bottom Ag electrodes, active layer of hybrid MoS2-PVA nanocomposite and top Ag electrode are deposited by reverse offset, electrohydrodynamic (EHD) atomization and electrohydrodynamic (EHD) patterning respectively. The fabricated device displayed characteristic bistable, nonvolatile and rewritable resistive switching behavior at a low operating voltage. A decent off/on ratio, high retention time, and large endurance of 1.28 × 102, 105 sec and 1000 voltage sweeps were recorded respectively. Double logarithmic curve satisfy the trap controlled space charge limited current (TCSCLC) model in high resistance state (HRS) and ohmic model in low resistance state (LRS). Bendability test at various bending diameters (50-2 mm) for 1500 cycles was carried out to show the mechanical robustness of fabricated device. PMID:27811977

  1. Development of bubble memory recorder onboard Japan Earth Resources Satellite-1

    NASA Astrophysics Data System (ADS)

    Araki, Tsunehiko; Ishida, Chu; Ochiai, Kiyoshi; Nozue, Tatsuhiro; Tachibana, Kyozo; Yoshida, Kazutoshi

    The Bubble Memory Recorder (BMR) developed for use on the Earth Resources Satellite is described in terms of its design, capabilities, and functions. The specifications of the BMR are given listing memory capacity, functions, and interface types for data, command, and telemetry functions. The BMR has an emergency signal interface to provide contingency recording, and a satellite-separation signal interface can be turned on automatically by signal input. Data are stored in a novolatile memory device so that the memory is retained during power outages. The BMR is characterized by a capability for random access, nonvolatility, and a solid-state design that is useful for space operations since it does not disturb spacecraft attitude.

  2. High-performance a MoS2 nanosheet-based nonvolatile memory transistor with a ferroelectric polymer and graphene source-drain electrode

    NASA Astrophysics Data System (ADS)

    Lee, Young Tack; Hwang, Do Kyung; Im, Seongil

    2015-11-01

    Two-dimensional (2D) van der Waals (vdWs) materials are a class of new materials due to their unique physical properties. Of the many 2D vdWs materials, molybdenum disulfide (MoS2) is a representative n-type transition-metal dichalcogenide (TMD) semiconductor. Here, we report on a high-performance MoS2 nanosheet-based nonvolatile memory transistor with a poly(vinylidenefluoride-trifluoroethylene) (P(VDF-TrFE)) ferroelectric top gate insulator. In order to enhance the ohmic contact property, we use graphene flakes as source/drain electrodes prepared by using the direct imprinting method with an elastomer stamp. The MoS2 ferroelectric field-effect transistor (FeFET) shows the highest linear electron mobility value of 175 cm2/Vs with a high on/off current ratio of more than 107, and a very clear memory window of more than 15 V. The program and erase dynamics and the static retention properties are also well demonstrated.

  3. A Retina-Like Dual Band Organic Photosensor Array for Filter-Free Near-Infrared-to-Memory Operations.

    PubMed

    Wang, Hanlin; Liu, Hongtao; Zhao, Qiang; Ni, Zhenjie; Zou, Ye; Yang, Jie; Wang, Lifeng; Sun, Yanqiu; Guo, Yunlong; Hu, Wenping; Liu, Yunqi

    2017-08-01

    Human eyes use retina photoreceptor cells to absorb and distinguish photons from different wavelengths to construct an image. Mimicry of such a process and extension of its spectral response into the near-infrared (NIR) is indispensable for night surveillance, retinal prosthetics, and medical imaging applications. Currently, NIR organic photosensors demand optical filters to reduce visible interference, thus making filter-free and anti-visible NIR imaging a challenging task. To solve this limitation, a filter-free and conformal, retina-inspired NIR organic photosensor is presented. Featuring an integration of photosensing and floating-gate memory modules, the device possesses an acute color distinguishing capability. In general, the retina-like photosensor transduces NIR (850 nm) into nonvolatile memory and acts as a dynamic photoswitch under green light (550 nm). In doing this, a filter-free but color-distinguishing photosensor is demonstrated that selectively converts NIR optical signals into nonvolatile memory. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Low-voltage all-inorganic perovskite quantum dot transistor memory

    NASA Astrophysics Data System (ADS)

    Chen, Zhiliang; Zhang, Yating; Zhang, Heng; Yu, Yu; Song, Xiaoxian; Zhang, Haiting; Cao, Mingxuan; Che, Yongli; Jin, Lufan; Li, Yifan; Li, Qingyan; Dai, Haitao; Yang, Junbo; Yao, Jianquan

    2018-05-01

    An all-inorganic cesium lead halide quantum dot (QD) based Au nanoparticle (NP) floating-gate memory with a solution processed layer-by-layer method is demonstrated. Easy synthesis at room temperature and excellent stability make all-inorganic CsPbBr3 perovskite QDs suitable as a semiconductor layer in low voltage nonvolatile transistor memory. The bipolarity of QDs has both electrons and holes stored in the Au NP floating gate, resulting in bidirectional shifts of initial threshold voltage according to the applied programing and erasing pulses. Under low operation voltage (±5 V), the memory achieved a great memory window (˜2.4 V), long retention time (>105 s), and stable endurance properties after 200 cycles. So the proposed memory device based on CsPbBr3 perovskite QDs has a great potential in the flash memory market.

  5. Fabrication and properties of nanoscale multiferroic heterostructures for application in magneto-electric random access memory (MERAM) devices

    NASA Astrophysics Data System (ADS)

    Kim, Gunwoo

    Magnetoelectric random access memory (MERAM) has emerged as a promising new class of non-volatile solid-state memory device. It offers nondestructive reading along with low power consumption during the write operation. A common implementation of MERAM involves use of multiferroic tunneling junctions (MFTJs), which besides offering non-volatility are both electrically and magnetically tunable. Fundamentally, a MFTJ consists of a heterostructure of an ultrathin multiferroic or ferroelectric material as the active tunneling barrier sandwiched between ferromagnetic electrodes. Thereby, the MFTJ exhibits both tunnel electroresistance (TER) and tunnel magnetoresistance (TMR) effects with application of an electric and magnetic field, respectively. In this thesis work, we have developed two-dimensional (2D) thin-film multiferroic heterostructure METJ prototypes consisting of ultrathin ferroelectric BaTiO3 (BTO) layer and a conducting ferromagnetic La0.67Sr 0.33MnO3 (LSMO) electrode. The heteroepitaxial films are grown using the pulsed laser deposition (PLD) technique. This oxide heterostructure offers the opportunity to study the nano-scale details of the tunnel electroresistance (TER) effect using scanning probe microscopy techniques. We performed the measurements using the MFP-3D (Asylum Research) scanning probe microscope. The ultrathin BTO films (1.2-2.0 nm) grown on LSMO electrodes display both ferro- and piezo-electric properties and exhibit large tunnel resistance effect. We have explored the growth and properties of one-dimensional (1D) heterostructures, referred to as multiferoric nanowire (NW) heterostructures. The ferromagnetic/ferroelectric composite heterostructures are grown as sheath layers using PLD on lattice-matched template NWs, e.g. MgO, that are deposited by chemical vapor deposition utilizing the vapor-liquid-solid (VLS) mechanism. The one-dimensional geometry can substantially overcome the clamping effect of the substrate present in two

  6. Performance of current-in-plane pseudo-spin-valve devices on CMOS silicon-on-insulator underlayers

    NASA Astrophysics Data System (ADS)

    Katti, R. R.; Zou, D.; Reed, D.; Schipper, D.; Hynes, O.; Shaw, G.; Kaakani, H.

    2003-05-01

    Prior work has shown that current-in-plane (CIP) giant magnetoresistive (GMR) pseudo-spin-valve (PSV) devices grown on bulk Si wafers and bulk complementary metal-oxide semiconductor (CMOS) underlayers exhibit write and read characteristics that are suitable for application as nonvolatile memory devices. In this work, CIP GMR PSV devices fabricated on silicon-on-insulator CMOS underlayers are shown to support write and read performance. Reading and writing fields for selected devices are shown to be approximately 25%-50% that of unselected devices, which provides a margin for reading and writing specific bits in a memory without overwriting bits and without disturbing other bits. The switching characteristics of experimental devices were compared to and found to be similar with Landau-Lifschitz-Gilbert micromagnetic modeling results, which allowed inferring regions of reversible and irreversible rotations in magnetic reversal processes.

  7. Low latency and persistent data storage

    DOEpatents

    Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E

    2014-02-18

    Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

  8. Voltage-impulse-induced dual-range nonvolatile magnetization modulation in metglas/PZT heterostructure

    NASA Astrophysics Data System (ADS)

    Tang, Xiaoli; Su, Hua; Zhang, Huaiwu; Sun, Nian X.

    2016-11-01

    Dual-range, nonvolatile magnetization modulation induced by voltage impulses was investigated in the metglas/lead zirconate titanate (PZT) heterostructure at room temperature. The heterostructure was obtained by bonding a square metglas ribbon on the top electrode of the PZT substrate, which contained defect dipoles resulting from acceptor doping. The PZT substrate achieved two strain hysteretic loops with the application of specific voltage impulse excitation modes. Through strain-mediated magnetoelectric coupling between the metglas ribbon and the PZT substrate, two strain hysteretic loops led to a dual-range nonvolatile magnetization modulation in the heterostructure. Reversible and stable voltage-impulse-induced nonvolatile modulation in the ferromagnetic resonance field and magnetic hysteresis characteristics were also realized. This method provides a promising approach in reducing energy consumption in magnetization modulation and other related devices.

  9. Novel synaptic memory device for neuromorphic computing

    NASA Astrophysics Data System (ADS)

    Mandal, Saptarshi; El-Amin, Ammaarah; Alexander, Kaitlyn; Rajendran, Bipin; Jha, Rashmi

    2014-06-01

    This report discusses the electrical characteristics of two-terminal synaptic memory devices capable of demonstrating an analog change in conductance in response to the varying amplitude and pulse-width of the applied signal. The devices are based on Mn doped HfO2 material. The mechanism behind reconfiguration was studied and a unified model is presented to explain the underlying device physics. The model was then utilized to show the application of these devices in speech recognition. A comparison between a 20 nm × 20 nm sized synaptic memory device with that of a state-of-the-art VLSI SRAM synapse showed ~10× reduction in area and >106 times reduction in the power consumption per learning cycle.

  10. A Strategy to Design High-Density Nanoscale Devices utilizing Vapor Deposition of Metal Halide Perovskite Materials.

    PubMed

    Hwang, Bohee; Lee, Jang-Sik

    2017-08-01

    The demand for high memory density has increased due to increasing needs of information storage, such as big data processing and the Internet of Things. Organic-inorganic perovskite materials that show nonvolatile resistive switching memory properties have potential applications as the resistive switching layer for next-generation memory devices, but, for practical applications, these materials should be utilized in high-density data-storage devices. Here, nanoscale memory devices are fabricated by sequential vapor deposition of organolead halide perovskite (OHP) CH 3 NH 3 PbI 3 layers on wafers perforated with 250 nm via-holes. These devices have bipolar resistive switching properties, and show low-voltage operation, fast switching speed (200 ns), good endurance, and data-retention time >10 5 s. Moreover, the use of sequential vapor deposition is extended to deposit CH 3 NH 3 PbI 3 as the memory element in a cross-point array structure. This method to fabricate high-density memory devices could be used for memory cells that occupy large areas, and to overcome the scaling limit of existing methods; it also presents a way to use OHPs to increase memory storage capacity. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Memory device for two-dimensional radiant energy array computers

    NASA Technical Reports Server (NTRS)

    Schaefer, D. H.; Strong, J. P., III (Inventor)

    1977-01-01

    A memory device for two dimensional radiant energy array computers was developed, in which the memory device stores digital information in an input array of radiant energy digital signals that are characterized by ordered rows and columns. The memory device contains a radiant energy logic storing device having a pair of input surface locations for receiving a pair of separate radiant energy digital signal arrays and an output surface location adapted to transmit a radiant energy digital signal array. A regenerative feedback device that couples one of the input surface locations to the output surface location in a manner for causing regenerative feedback is also included

  12. An overview of Experimental Condensed Matter Physics in Argentina by 2014, and Oxides for Non Volatile Memory Devices: The MeMOSat Project

    NASA Astrophysics Data System (ADS)

    Levy, Pablo

    2015-03-01

    In the first part of my talk, I will describe the status of the experimental research in Condensed Matter Physics in Argentina, biased towards developments related to micro and nanotechnology. In the second part, I will describe the MeMOSat Project, a consortium aimed at producing non-volatile memory devices to work in aggressive environments, like those found in the aerospace and nuclear industries. Our devices rely on the Resistive Switching mechanism, which produces a permanent but reversible change in the electrical resistance across a metal-insulator-metal structure by means of a pulsed protocol of electrical stimuli. Our project is devoted to the study of Memory Mechanisms in Oxides (MeMO) in order to establish a technological platform that tests the Resistive RAM (ReRAM) technology for aerospace applications. A review of MeMOSat's activities is presented, covering the initial Proof of Concept in ceramic millimeter sized samples; the study of different oxide-metal couples including (LaPr)2/3Ca1/3MnO, La2/3Ca1/3MnO3, YBa2Cu3O7, TiO2, HfO2, MgO and CuO; and recent miniaturized arrays of micrometer sized devices controlled by in-house designed electronics, which were launched with the BugSat01 satellite in June2014 by the argentinian company Satellogic.

  13. High Density Memory Based on Quantum Device Technology

    NASA Technical Reports Server (NTRS)

    vanderWagt, Paul; Frazier, Gary; Tang, Hao

    1995-01-01

    We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

  14. Transparent resistive switching memory using aluminum oxide on a flexible substrate

    NASA Astrophysics Data System (ADS)

    Yeom, Seung-Won; Shin, Sang-Chul; Kim, Tan-Young; Ha, Hyeon Jun; Lee, Yun-Hi; Shim, Jae Won; Ju, Byeong-Kwon

    2016-02-01

    Resistive switching memory (ReRAM) has attracted much attention in recent times owing to its fast switching, simple structure, and non-volatility. Flexible and transparent electronic devices have also attracted considerable attention. We therefore fabricated an Al2O3-based ReRAM with transparent indium-zinc-oxide (IZO) electrodes on a flexible substrate. The device transmittance was found to be higher than 80% in the visible region (400-800 nm). Bended states (radius = 10 mm) of the device also did not affect the memory performance because of the flexibility of the two transparent IZO electrodes and the thin Al2O3 layer. The conduction mechanism of the resistive switching of our device was explained by ohmic conduction and a Poole-Frenkel emission model. The conduction mechanism was proved by oxygen vacancies in the Al2O3 layer, as analyzed by x-ray photoelectron spectroscopy analysis. These results encourage the application of ReRAM in flexible and transparent electronic devices.

  15. One bipolar transistor selector - One resistive random access memory device for cross bar memory array

    NASA Astrophysics Data System (ADS)

    Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.

    2017-09-01

    A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

  16. Realization of Minimum and Maximum Gate Function in Ta2O5-based Memristive Devices

    NASA Astrophysics Data System (ADS)

    Breuer, Thomas; Nielen, Lutz; Roesgen, Bernd; Waser, Rainer; Rana, Vikas; Linn, Eike

    2016-04-01

    Redox-based resistive switching devices (ReRAM) are considered key enablers for future non-volatile memory and logic applications. Functionally enhanced ReRAM devices could enable new hardware concepts, e.g. logic-in-memory or neuromorphic applications. In this work, we demonstrate the implementation of ReRAM-based fuzzy logic gates using Ta2O5 devices to enable analogous Minimum and Maximum operations. The realized gates consist of two anti-serially connected ReRAM cells offering two inputs and one output. The cells offer an endurance up to 106 cycles. By means of exemplary input signals, each gate functionality is verified and signal constraints are highlighted. This realization could improve the efficiency of analogous processing tasks such as sorting networks in the future.

  17. Piezostrain tuning non-volatile 90° magnetic easy axis rotation in Co2FeAl Heusler alloy film grown on Pb(Mg1/3Nb2/3)O3-PbTiO3 heterostructures

    NASA Astrophysics Data System (ADS)

    Zhou, Cai; Wang, Fenglong; Dunzhu, Gesang; Yao, Jinli; Jiang, Changjun

    2016-11-01

    Non-volatile electric field-based control of magnetic anisotropy in Co2FeAl/ Pb(Mg1/3Nb2/3)O3-PbTiO3 (CFA/PMN-PT) heterostructures is investigated at room temperature. The remnant magnetization response under different electric fields shows a asymmetric butterfly-like behavior; specifically, this behavior is consistent with the asymmetric butterfly-like piezostrain versus applied electric field curve. Thus electric field-induced non-volatile 90° magnetic easy axis rotation can be attributed to the piezostrain effect. Further, the result measured by rotating-angle ferromagnetic resonance demonstrates piezostrain-mediated non-volatile 90° magnetic easy axis rotation at the initial state and the two remnant polarization states after application of the poling fields of 10 and  -10 kV cm-1 turned off. The angular dependence of magnetic damping also indicates a 90° phase shift at the above mentioned three different states. Additionally, the piezostrain-mediated non-volatile stable magnetization reversal in the two directions of easy and hard magnetization axes are observed under positive and negative pulsed electric fields, which can be used to improve the performance of low-loss multiple-state memory devices.

  18. Low latency and persistent data storage

    DOEpatents

    Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd

    2014-11-04

    Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

  19. Role of nanorods insertion layer in ZnO-based electrochemical metallization memory cell

    NASA Astrophysics Data System (ADS)

    Mangasa Simanjuntak, Firman; Singh, Pragya; Chandrasekaran, Sridhar; Juanda Lumbantoruan, Franky; Yang, Chih-Chieh; Huang, Chu-Jie; Lin, Chun-Chieh; Tseng, Tseung-Yuen

    2017-12-01

    An engineering nanorod array in a ZnO-based electrochemical metallization device for nonvolatile memory applications was investigated. A hydrothermally synthesized nanorod layer was inserted into a Cu/ZnO/ITO device structure. Another device was fabricated without nanorods for comparison, and this device demonstrated a diode-like behavior with no switching behavior at a low current compliance (CC). The switching became clear only when the CC was increased to 75 mA. The insertion of a nanorods layer induced switching characteristics at a low operation current and improve the endurance and retention performances. The morphology of the nanorods may control the switching characteristics. A forming-free electrochemical metallization memory device having long switching cycles (>104 cycles) with a sufficient memory window (103 times) for data storage application, good switching stability and sufficient retention was successfully fabricated by adjusting the morphology and defect concentration of the inserted nanorod layer. The nanorod layer not only contributed to inducing resistive switching characteristics but also acted as both a switching layer and a cation diffusion control layer.

  20. Mechanical memory

    DOEpatents

    Gilkey, Jeffrey C [Albuquerque, NM; Duesterhaus, Michelle A [Albuquerque, NM; Peter, Frank J [Albuquerque, NM; Renn, Rosemarie A [Alburquerque, NM; Baker, Michael S [Albuquerque, NM

    2006-08-15

    A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

  1. Mechanical memory

    DOEpatents

    Gilkey, Jeffrey C [Albuquerque, NM; Duesterhaus, Michelle A [Albuquerque, NM; Peter, Frank J [Albuquerque, NM; Renn, Rosemarie A [Albuquerque, NM; Baker, Michael S [Albuquerque, NM

    2006-05-16

    A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

  2. Ultralow power switching in a silicon-rich SiNy/SiNx double-layer resistive memory device.

    PubMed

    Kim, Sungjun; Chang, Yao-Feng; Kim, Min-Hwi; Bang, Suhyun; Kim, Tae-Hyeon; Chen, Ying-Chen; Lee, Jong-Ho; Park, Byung-Gook

    2017-07-26

    Here we demonstrate low-power resistive switching in a Ni/SiN y /SiN x /p ++ -Si device by proposing a double-layered structure (SiN y /SiN x ), where the two SiN layers have different trap densities. The LRS was measured to be as low as 1 nA at a voltage of 1 V, because the SiN x layer maintains insulating properties for the LRS. The single-layered device suffers from uncontrollability of the conducting path, accompanied by the inherent randomness of switching parameters, weak immunity to breakdown during the reset process, and a high operating current. On the other hand, for a double-layered device, the effective conducting path in each layer, which can determine the operating current, can be well controlled by the I CC during the initial forming and set processes. A one-step forming and progressive reset process is observed for a low-power mode, which differs from the high-power switching mode that shows a two-step forming and reset process. Moreover, nonlinear behavior in the LRS, whose origin can be attributed to the P-F conduction and F-N tunneling driven by abundant traps in the silicon-rich SiN x layer, would be beneficial for next-generation nonvolatile memory applications by using a conventional passive SiN x layer as an active dielectric.

  3. Radiation-hardened MRAM-based LUT for non-volatile FPGA soft error mitigation with multi-node upset tolerance

    NASA Astrophysics Data System (ADS)

    Zand, Ramtin; DeMara, Ronald F.

    2017-12-01

    In this paper, we have developed a radiation-hardened non-volatile lookup table (LUT) circuit utilizing spin Hall effect (SHE)-magnetic random access memory (MRAM) devices. The design is motivated by modeling the effect of radiation particles striking hybrid complementary metal oxide semiconductor/spin based circuits, and the resistive behavior of SHE-MRAM devices via established and precise physics equations. The models developed are leveraged in the SPICE circuit simulator to verify the functionality of the proposed design. The proposed hardening technique is based on using feedback transistors, as well as increasing the radiation capacity of the sensitive nodes. Simulation results show that our proposed LUT circuit can achieve multiple node upset (MNU) tolerance with more than 38% and 60% power-delay product improvement as well as 26% and 50% reduction in device count compared to the previous energy-efficient radiation-hardened LUT designs. Finally, we have performed a process variation analysis showing that the MNU immunity of our proposed circuit is realized at the cost of increased susceptibility to transistor and MRAM variations compared to an unprotected LUT design.

  4. Transistor and memory devices based on novel organic and biomaterials

    NASA Astrophysics Data System (ADS)

    Tseng, Jia-Hung

    Organic semiconductor devices have aroused considerable interest because of the enormous potential in many technological applications. Organic electroluminescent devices have been extensively applied in display technology. Rapid progress has also been made in transistor and memory devices. This thesis considers aspects of the transistor based on novel organic single crystals and memory devices using hybrid nanocomposites comprising polymeric/inorganic nanoparticles, and biomolecule/quantum dots. Organic single crystals represent highly ordered structures with much less imperfections compared to amorphous thin films for probing the intrinsic charge transport in transistor devices. We demonstrate that free-standing, thin organic single crystals with natural flexing ability can be fabricated as flexible transistors. We study the surface properties of the organic crystals to determine a nearly perfect surface leading to high performance transistors. The flexible transistors can maintain high performance under reversible bending conditions. Because of the high quality crystal technique, we further develop applications on organic complementary circuits and organic single crystal photovoltaics. In the second part, two aspects of memory devices are studied. We examine the charge transfer process between conjugated polymers and metal nanoparticles. This charge transfer process is essential for the conductance switching in nanoseconds to induce the memory effect. Under the reduction condition, the charge transfer process is eliminated as well as the memory effect, raising the importance of coupling between conjugated systems and nanoparticle accepters. The other aspect of memory devices focuses on the interaction of virus biomolecules with quantum dots or metal nanoparticles in the devices. We investigate the impact of memory function on the hybrid bio-inorganic system. We perform an experimental analysis of the charge storage activation energy in tobacco mosaic virus with

  5. Modular nonvolatile solid state recorder (MONSSTR) update

    NASA Astrophysics Data System (ADS)

    Klang, Mark R.; Small, Martin B.; Beams, Tom

    2001-12-01

    Solid state recorders have begun replacing traditional tape recorders in fulfilling the requirement to record images on airborne platforms. With the advances in electro-optical, IR, SAR, Multi and Hyper-spectral sensors and video recording requirements, solid state recorders have become the recorder of choice. Solid state recorders provide the additional storage, higher sustained bandwidth, less power, less weight and smaller footprint to meet the current and future recording requirements. CALCULEX, Inc., manufactures a non-volatile flash memory solid state recorder called the MONSSTR (Modular Non-volatile Solid State Recorder). MONSSTR is being used to record images from many different digital sensors on high performance aircraft such as the RF- 4, F-16 and the Royal Air Force Tornado. MONSSTR, with its internal multiplexer, is also used to record instrumentation data. This includes multiple streams of PCM and multiple channels of 1553 data. Instrumentation data is being recorded by MONSSTR systems in a range of platforms including F-22, F-15, F-16, Comanche Helicopter and US Navy torpedos. MONSSTR can also be used as a cockpit video recorder. This paper will provide an update of the MONSSTR.

  6. An UV photochromic memory effect in proton-based WO3 electrochromic devices

    NASA Astrophysics Data System (ADS)

    Zhang, Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

    2008-11-01

    We report an UV photochromic memory effect on a standard proton-based WO3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices.

  7. CMOS-compatible spintronic devices: a review

    NASA Astrophysics Data System (ADS)

    Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

    2016-11-01

    For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

  8. From Secure Memories to Smart Card Security

    NASA Astrophysics Data System (ADS)

    Handschuh, Helena; Trichina, Elena

    Non-volatile memory is essential in most embedded security applications. It will store the key and other sensitive materials for cryptographic and security applications. In this chapter, first an overview is given of current flash memory architectures. Next the standard security features which form the basis of so-called secure memories are described in more detail. Smart cards are a typical embedded application that is very vulnerable to attacks and that at the same time has a high need for secure non-volatile memory. In the next part of this chapter, the secure memories of so-called flash-based high-density smart cards are described. It is followed by a detailed analysis of what the new security challenges for such objects are.

  9. Active Flash: Performance-Energy Tradeoffs for Out-of-Core Processing on Non-Volatile Memory Devices

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Boboila, Simona; Kim, Youngjae; Vazhkudai, Sudharshan S

    2012-01-01

    In this abstract, we study the performance and energy tradeoffs involved in migrating data analysis into the flash device, a process we refer to as Active Flash. The Active Flash paradigm is similar to 'active disks', which has received considerable attention. Active Flash allows us to move processing closer to data, thereby minimizing data movement costs and reducing power consumption. It enables true out-of-core computation. The conventional definition of out-of-core solvers refers to an approach to process data that is too large to fit in the main memory and, consequently, requires access to disk. However, in Active Flash, processing outsidemore » the host CPU literally frees the core and achieves real 'out-of-core' analysis. Moving analysis to data has long been desirable, not just at this level, but at all levels of the system hierarchy. However, this requires a detailed study on the tradeoffs involved in achieving analysis turnaround under an acceptable energy envelope. To this end, we first need to evaluate if there is enough computing power on the flash device to warrant such an exploration. Flash processors require decent computing power to run the internal logic pertaining to the Flash Translation Layer (FTL), which is responsible for operations such as address translation, garbage collection (GC) and wear-leveling. Modern SSDs are composed of multiple packages and several flash chips within a package. The packages are connected using multiple I/O channels to offer high I/O bandwidth. SSD computing power is also expected to be high enough to exploit such inherent internal parallelism within the drive to increase the bandwidth and to handle fast I/O requests. More recently, SSD devices are being equipped with powerful processing units and are even embedded with multicore CPUs (e.g. ARM Cortex-A9 embedded processor is advertised to reach 2GHz frequency and deliver 5000 DMIPS; OCZ RevoDrive X2 SSD has 4 SandForce controllers, each with 780MHz max frequency

  10. 82 FR 28354 - Certain Non-Volatile Memory Devices and Products Containing Same Commission Determination Not To...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2017-06-21

    ...Notice is hereby given that the U.S. International Trade Commission has determined not to review an initial determination (``ID'') (Order No. 11) of the presiding administrative law judge (``ALJ'') granting an unopposed motion for leave to amend the complaint and notice of investigation to add Toshiba Memory Corporation of Tokyo, Japan (``Toshiba Memory'') as a respondent to the investigation.

  11. Improvement of Bipolar Switching Properties of Gd:SiOx RRAM Devices on Indium Tin Oxide Electrode by Low-Temperature Supercritical CO2 Treatment.

    PubMed

    Chen, Kai-Huang; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Liang, Shu-Ping; Young, Tai-Fa; Syu, Yong-En; Sze, Simon M

    2016-12-01

    Bipolar switching resistance behaviors of the Gd:SiO2 resistive random access memory (RRAM) devices on indium tin oxide electrode by the low-temperature supercritical CO2-treated technology were investigated. For physical and electrical measurement results obtained, the improvement on oxygen qualities, properties of indium tin oxide electrode, and operation current of the Gd:SiO2 RRAM devices were also observed. In addition, the initial metallic filament-forming model analyses and conduction transferred mechanism in switching resistance properties of the RRAM devices were verified and explained. Finally, the electrical reliability and retention properties of the Gd:SiO2 RRAM devices for low-resistance state (LRS)/high-resistance state (HRS) in different switching cycles were also measured for applications in nonvolatile random memory devices.

  12. Electrochromic conductive polymer fuses for hybrid organic/inorganic semiconductor memories

    NASA Astrophysics Data System (ADS)

    Möller, Sven; Forrest, Stephen R.; Perlov, Craig; Jackson, Warren; Taussig, Carl

    2003-12-01

    We demonstrate a nonvolatile, write-once-read-many-times (WORM) memory device employing a hybrid organic/inorganic semiconductor architecture consisting of thin film p-i-n silicon diode on a stainless steel substrate integrated in series with a conductive polymer fuse. The nonlinearity of the silicon diodes enables a passive matrix memory architecture, while the conductive polyethylenedioxythiophene:polystyrene sulfonic acid polymer serves as a reliable switch with fuse-like behavior for data storage. The polymer can be switched at ˜2 μs, resulting in a permanent decrease of conductivity of the memory pixel by up to a factor of 103. The switching mechanism is primarily due to a current and thermally dependent redox reaction in the polymer, limited by the double injection of both holes and electrons. The switched device performance does not degrade after many thousand read cycles in ambient at room temperature. Our results suggest that low cost, organic/inorganic WORM memories are feasible for light weight, high density, robust, and fast archival storage applications.

  13. Effect of Atomic Layer Depositions (ALD)-Deposited Titanium Oxide (TiO2) Thickness on the Performance of Zr40Cu35Al15Ni10 (ZCAN)/TiO2/Indium (In)-Based Resistive Random Access Memory (RRAM) Structures

    DTIC Science & Technology

    2015-08-01

    metal structures, memristors, resistive random access memory, RRAM, titanium dioxide, Zr40Cu35Al15Ni10, ZCAN, resistive memory, tunnel junction 16...TiO2 thickness ........................6 1 1. Introduction Resistive-switching memory elements based on metal-insulator-metal (MIM) diodes ...have attracted great interest due to their potential as components for simple, inexpensive, and high-density non-volatile storage devices. MIM diodes

  14. Demonstration of Novel Sampling Techniques for Measurement of Turbine Engine Volatile and Non-Volatile Particulate Matter (PM) Emissions

    DTIC Science & Technology

    2015-12-30

    FINAL REPORT Demonstration of Novel Sampling Techniques for Measurement of Turbine Engine Volatile and Non-Volatile Particulate Matter (PM...Novel Sampling Techniques for Measurement of Turbine Engine Volatile and Non-Volatile Particulate Matter (PM) Emissions 6. AUTHOR(S) E. Corporan, M...report contains color. 14. ABSTRACT This project consists of demonstrating the performance and viability of two devices to condition aircraft turbine

  15. Nonvolatile ferroelectric memory based on PbTiO3 gated single-layer MoS2 field-effect transistor

    NASA Astrophysics Data System (ADS)

    Shin, Hyun Wook; Son, Jong Yeog

    2018-01-01

    We fabricated ferroelectric non-volatile random access memory (FeRAM) based on a field effect transistor (FET) consisting of a monolayer MoS2 channel and a ferroelectric PbTiO3 (PTO) thin film of gate insulator. An epitaxial PTO thin film was deposited on a Nb-doped SrTiO3 (Nb:STO) substrate via pulsed laser deposition. A monolayer MoS2 sheet was exfoliated from a bulk crystal and transferred to the surface of the PTO/Nb:STO. Structural and surface properties of the PTO thin film were characterized by X-ray diffraction and atomic force microscopy, respectively. Raman spectroscopy analysis was performed to identify the single-layer MoS2 sheet on the PTO/Nb:STO. We obtained mobility value (327 cm2/V·s) of the MoS2 channel at room temperature. The MoS2-PTO FeRAM FET showed a wide memory window with 17 kΩ of resistance variation which was attributed to high remnant polarization of the epitaxially grown PTO thin film. According to the fatigue resistance test for the FeRAM FET, however, the resistance states gradually varied during the switching cycles of 109. [Figure not available: see fulltext.

  16. Two-dimensional molybdenum disulphide nanosheet-covered metal nanoparticle array as a floating gate in multi-functional flash memories

    NASA Astrophysics Data System (ADS)

    Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.

    2015-10-01

    Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal

  17. Biomaterial-based Memory Device Development by Conducting Metallic DNA

    DTIC Science & Technology

    2013-05-28

    time. Therefore, we have created a multiple-states memory system . This is the first multi-states resistance memory device by using bio-nanowire of the...world. Based on this achievement, logic device and application will be developed in the near future, too. Moreover, by using Ni-DNA detection system ...ions in DNA can change the resistance of Ni-DNA by applying different polar bias and time. Therefore, we have created a multiple-states memory system

  18. Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

    NASA Astrophysics Data System (ADS)

    Ando, K.; Fujita, S.; Ito, J.; Yuasa, S.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.; Yoda, H.

    2014-05-01

    Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

  19. A High-Performance Optical Memory Array Based on Inhomogeneity of Organic Semiconductors.

    PubMed

    Pei, Ke; Ren, Xiaochen; Zhou, Zhiwen; Zhang, Zhichao; Ji, Xudong; Chan, Paddy Kwok Leung

    2018-03-01

    Organic optical memory devices keep attracting intensive interests for diverse optoelectronic applications including optical sensors and memories. Here, flexible nonvolatile optical memory devices are developed based on the bis[1]benzothieno[2,3-d;2',3'-d']naphtho[2,3-b;6,7-b']dithiophene (BBTNDT) organic field-effect transistors with charge trapping centers induced by the inhomogeneity (nanosprouts) of the organic thin film. The devices exhibit average mobility as high as 7.7 cm 2 V -1 s -1 , photoresponsivity of 433 A W -1 , and long retention time for more than 6 h with a current ratio larger than 10 6 . Compared with the standard floating gate memory transistors, the BBTNDT devices can reduce the fabrication complexity, cost, and time. Based on the reasonable performance of the single device on a rigid substrate, the optical memory transistor is further scaled up to a 16 × 16 active matrix array on a flexible substrate with operating voltage less than 3 V, and it is used to map out 2D optical images. The findings reveal the potentials of utilizing [1]benzothieno[3,2-b][1]benzothiophene (BTBT) derivatives as organic semiconductors for high-performance optical memory transistors with a facile structure. A detailed study on the charge trapping mechanism in the derivatives of BTBT materials is also provided, which is closely related to the nanosprouts formed inside the organic active layer. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  20. A chiral-based magnetic memory device without a permanent magnet

    PubMed Central

    Dor, Oren Ben; Yochelis, Shira; Mathew, Shinto P.; Naaman, Ron; Paltiel, Yossi

    2013-01-01

    Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices. PMID:23922081

  1. A chiral-based magnetic memory device without a permanent magnet.

    PubMed

    Ben Dor, Oren; Yochelis, Shira; Mathew, Shinto P; Naaman, Ron; Paltiel, Yossi

    2013-01-01

    Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices.

  2. High performance devices enabled by epitaxial, preferentially oriented, nanodots and/or nanorods

    DOEpatents

    Goyal, Amit [Knoxville, TN

    2011-10-11

    Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic, superconducting and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

  3. Broadband nonvolatile photonic switching based on optical phase change materials: beyond the classical figure-of-merit.

    PubMed

    Zhang, Qihang; Zhang, Yifei; Li, Junying; Soref, Richard; Gu, Tian; Hu, Juejun

    2018-01-01

    In this Letter, we propose a broadband, nonvolatile on-chip switch design in the telecommunication C-band with record low loss and crosstalk. The unprecedented device performance builds on: 1) a new optical phase change material (O-PCM) Ge 2 Sb 2 Se 4 Te 1 (GSST), which exhibits significantly reduced optical attenuation compared to traditional O-PCMs, and 2) a nonperturbative design that enables low-loss device operation beyond the classical figure-of-merit (FOM) limit. We further demonstrate that the 1-by-2 and 2-by-2 switches can serve as basic building blocks to construct nonblocking and nonvolatile on-chip switching fabric supporting arbitrary numbers of input and output ports.

  4. Dynamic-load-enabled ultra-low power multiple-state RRAM devices.

    PubMed

    Yang, Xiang; Chen, I-Wei

    2012-01-01

    Bipolar resistance-switching materials allowing intermediate states of wide-varying resistance values hold the potential of drastically reduced power for non-volatile memory. To exploit this potential, we have introduced into a nanometallic resistance-random-access-memory (RRAM) device an asymmetric dynamic load, which can reliably lower switching power by orders of magnitude. The dynamic load is highly resistive during on-switching allowing access to the highly resistive intermediate states; during off-switching the load vanishes to enable switching at low voltage. This approach is entirely scalable and applicable to other bipolar RRAM with intermediate states. The projected power is 12 nW for a 100 × 100 nm(2) device and 500 pW for a 10 × 10 nm(2) device. The dynamic range of the load can be increased to allow power to be further decreased by taking advantage of the exponential decay of wave-function in a newly discovered nanometallic random material, reaching possibly 1 pW for a 10×10 nm(2) nanometallic RRAM device.

  5. Nanoscale superconducting memory based on the kinetic inductance of asymmetric nanowire loops

    NASA Astrophysics Data System (ADS)

    Murphy, Andrew; Averin, Dmitri V.; Bezryadin, Alexey

    2017-06-01

    The demand for low-dissipation nanoscale memory devices is as strong as ever. As Moore’s law is staggering, and the demand for a low-power-consuming supercomputer is high, the goal of making information processing circuits out of superconductors is one of the central goals of modern technology and physics. So far, digital superconducting circuits could not demonstrate their immense potential. One important reason for this is that a dense superconducting memory technology is not yet available. Miniaturization of traditional superconducting quantum interference devices is difficult below a few micrometers because their operation relies on the geometric inductance of the superconducting loop. Magnetic memories do allow nanometer-scale miniaturization, but they are not purely superconducting (Baek et al 2014 Nat. Commun. 5 3888). Our approach is to make nanometer scale memory cells based on the kinetic inductance (and not geometric inductance) of superconducting nanowire loops, which have already shown many fascinating properties (Aprili 2006 Nat. Nanotechnol. 1 15; Hopkins et al 2005 Science 308 1762). This allows much smaller devices and naturally eliminates magnetic-field cross-talk. We demonstrate that the vorticity, i.e., the winding number of the order parameter, of a closed superconducting loop can be used for realizing a nanoscale nonvolatile memory device. We demonstrate how to alter the vorticity in a controlled fashion by applying calibrated current pulses. A reliable read-out of the memory is also demonstrated. We present arguments that such memory can be developed to operate without energy dissipation.

  6. Self-assembled nanostructured resistive switching memory devices fabricated by templated bottom-up growth

    PubMed Central

    Song, Ji-Min; Lee, Jang-Sik

    2016-01-01

    Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition. PMID:26739122

  7. Giant Electroresistance in Edge Metal-Insulator-Metal Tunnel Junctions Induced by Ferroelectric Fringe Fields

    PubMed Central

    Jung, Sungchul; Jeon, Youngeun; Jin, Hanbyul; Lee, Jung-Yong; Ko, Jae-Hyeon; Kim, Nam; Eom, Daejin; Park, Kibog

    2016-01-01

    An enormous amount of research activities has been devoted to developing new types of non-volatile memory devices as the potential replacements of current flash memory devices. Theoretical device modeling was performed to demonstrate that a huge change of tunnel resistance in an Edge Metal-Insulator-Metal (EMIM) junction of metal crossbar structure can be induced by the modulation of electric fringe field, associated with the polarization reversal of an underlying ferroelectric layer. It is demonstrated that single three-terminal EMIM/Ferroelectric structure could form an active memory cell without any additional selection devices. This new structure can open up a way of fabricating all-thin-film-based, high-density, high-speed, and low-power non-volatile memory devices that are stackable to realize 3D memory architecture. PMID:27476475

  8. Fast, Capacious Disk Memory Device

    NASA Technical Reports Server (NTRS)

    Muller, Ronald M.

    1990-01-01

    Device for recording digital data on, and playing back data from, memory disks has high recording or playback rate and utilizes available recording area more fully. Two disks, each with own reading/writing head, used to record data at same time. Head on disk A operates on one of tracks numbered from outside in; head on disk B operates on track of same number in sequence from inside out. Underlying concept of device applicable to magnetic or optical disks.

  9. Stretchable inorganic nanomembrane electronics for healthcare devices

    NASA Astrophysics Data System (ADS)

    Kim, Dae-Hyeong; Son, Donghee; Kim, Jaemin

    2015-05-01

    Flexible or stretchable electronic devices for healthcare technologies have attracted much attention in terms of usefulness to assist doctors in their operating rooms and to monitor patients' physical conditions for a long period of time. Each device to monitor the patients' physiological signals real-time, such as strain, pressure, temperature, and humidity, etc. has been reported recently. However, their limitations are found in acquisition of various physiological signals simultaneously because all the functions are not assembled in one skin-like electronic system. Here, we describe a skin-like, multi-functional healthcare system, which includes single crystalline silicon nanomembrane based sensors, nanoparticle-integrated non-volatile memory modules, electro-resistive thermal actuators, and drug delivery. Smart prosthetics coupled with therapeutic electronic system would provide new approaches to personalized healthcare.

  10. Programmable synaptic devices for electronic neural nets

    NASA Technical Reports Server (NTRS)

    Moopenn, A.; Thakoor, A. P.

    1990-01-01

    The architecture, design, and operational characteristics of custom VLSI and thin film synaptic devices are described. The devices include CMOS-based synaptic chips containing 1024 reprogrammable synapses with a 6-bit dynamic range, and nonvolatile, write-once, binary synaptic arrays based on memory switching in hydrogenated amorphous silicon films. Their suitability for embodiment of fully parallel and analog neural hardware is discussed. Specifically, a neural network solution to an assignment problem of combinatorial global optimization, implemented in fully parallel hardware using the synaptic chips, is described. The network's ability to provide optimal and near optimal solutions over a time scale of few neuron time constants has been demonstrated and suggests a speedup improvement of several orders of magnitude over conventional search methods.

  11. Printing an ITO-free flexible poly (4-vinylphenol) resistive switching device

    NASA Astrophysics Data System (ADS)

    Ali, Junaid; Rehman, Muhammad Muqeet; Siddiqui, Ghayas Uddin; Aziz, Shahid; Choi, Kyung Hyun

    2018-02-01

    Resistive switching in a sandwich structure of silver (Ag)/Polyvinyl phenol (PVP)/carbon nanotube (CNTs)-silver nanowires (AgNWs) coated on a flexible PET substrate is reported in this work. Densely populated networks of one dimensional nano materials (1DNM), CNTs-AgNWs have been used as the conductive bottom electrode with the prominent features of high flexibility and low sheet resistance of 90 Ω/sq. Thin, yet uniform active layer of PVP was deposited on top of the spin coated 1DNM thin film through state of the art printing technique of electrohydrodynamic atomization (EHDA) with an average thickness of 170 ± 28 nm. Ag dots with an active area of ∼0.1 mm2 were deposited through roll to plate printing system as the top electrodes to complete the device fabrication of flexible memory device. Our memory device exhibited suitable electrical characteristics with OFF/ON ratio of 100:1, retention time of 60 min and electrical endurance for 100 voltage sweeps without any noticeable decay in performance. The resistive switching characteristics at a low current compliance of 3 nA were also evaluated for the application of low power consumption. This memory device is flexible and can sustain more than 100 bending cycles at a bending diameter of 2 cm with stable HRS and LRS values. Our proposed device shows promise to be used as a future potential nonvolatile memory device in flexible electronics.

  12. High performance superconducting devices enabled by three dimensionally ordered nanodots and/or nanorods

    DOEpatents

    Goyal, Amit

    2013-09-17

    Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

  13. 76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-09-07

    ... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

  14. NAND FLASH Radiation Tolerant Intelligent Memory Stack (RTIMS FLASH)

    NASA Astrophysics Data System (ADS)

    Sellier, Charles; Wang, Pierre

    2014-08-01

    The NAND Flash Radiation Tolerant and Intelligent Memory Stack (RTIMS FLASH) is a User's Friendly, Plug-and- Play and Radiation Protected high density NAND Flash Memory. It provides a very high density, radiation hardened by design and non-volatile memory module suitable for all space applications such as commercial or scientific geo-stationary missions, earth observation, navigation, manned space vehicles and deep space scientific exploration. The Intelligent Memory Module embeds a very high density of non-volatile NAND Flash memory and one Intelligent Flash Memory Controller (FMC). The FMC provides the module with a full protection against the radiation effects such as SEL, SEFI and SEU. It's also granting the module with bad block immunity as well as high level service functions that will benefit to the user's applications.

  15. Scandium doped Ge2Sb2Te5 for high-speed and low-power-consumption phase change memory

    NASA Astrophysics Data System (ADS)

    Wang, Yong; Zheng, Yonghui; Liu, Guangyu; Li, Tao; Guo, Tianqi; Cheng, Yan; Lv, Shilong; Song, Sannian; Ren, Kun; Song, Zhitang

    2018-03-01

    To bridge the gap of access time between memories and storage systems, the concept of storage class memory has been put forward based on emerging nonvolatile memory technologies. For all the nonvolatile memory candidates, the unpleasant tradeoff between operation speed and retention seems to be inevitable. To promote both the write speed and the retention of phase change memory (PCM), Sc doped Ge2Sb2Te5 (SGST) has been proposed as the storage medium. Octahedral Sc-Te motifs, acting as crystallization precursors to shorten the nucleation incubation period, are the possible reason for the high write speed of 6 ns in PCM cells, five-times faster than that of Ge2Sb2Te5 (GST) cells. Meanwhile, an enhanced 10-year data retention of 119 °C has been achieved. Benefiting from both the increased crystalline resistance and the inhibited formation of the hexagonal phase, the SGST cell has a 77% reduction in power consumption compared to the GST cell. Adhesion of the SGST/SiO2 interface has been strengthened, attributed to the reduced stress by forming smaller grains during crystallization, guaranteeing the reliability of the device. These improvements have made the SGST material a promising candidate for PCM application.

  16. Integrated semiconductor-magnetic random access memory system

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

    2001-01-01

    The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

  17. EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Mittal, Sparsh; Vetter, Jeffrey S

    To address the limitations of SRAM such as high-leakage and low-density, researchers have explored use of non-volatile memory (NVM) devices, such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches. A crucial limitation of NVMs, however, is that their write endurance is low and the large intra-set write variation introduced by existing cache management policies may further exacerbate this problem, thereby reducing the cache lifetime significantly. We present EqualChance, a technique to increase cache lifetime by reducing intra-set write variation. EqualChance works by periodically changing the physical cache-block location of a write-intensive data item withinmore » a set to achieve wear-leveling. Simulations using workloads from SPEC CPU2006 suite and HPC (high-performance computing) field show that EqualChance improves the cache lifetime by 4.29X. Also, its implementation overhead is small, and it incurs very small performance and energy loss.« less

  18. Direct observation of conductive filament formation in Alq3 based organic resistive memories

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Busby, Y., E-mail: yan.busby@unamur.be; Pireaux, J.-J.; Nau, S.

    2015-08-21

    This work explores resistive switching mechanisms in non-volatile organic memory devices based on tris(8-hydroxyquinolie)aluminum (Alq{sub 3}). Advanced characterization tools are applied to investigate metal diffusion in ITO/Alq{sub 3}/Ag memory device stacks leading to conductive filament formation. The morphology of Alq{sub 3}/Ag layers as a function of the metal evaporation conditions is studied by X-ray reflectivity, while depth profile analysis with X-ray photoelectron spectroscopy and time-of-flight secondary ion mass spectrometry is applied to characterize operational memory elements displaying reliable bistable current-voltage characteristics. 3D images of the distribution of silver inside the organic layer clearly point towards the existence of conductive filamentsmore » and allow for the identification of the initial filament formation and inactivation mechanisms during switching of the device. Initial filament formation is suggested to be driven by field assisted diffusion of silver from abundant structures formed during the top electrode evaporation, whereas thermochemical effects lead to local filament inactivation.« less

  19. Eliminating Overerase Behavior by Designing Energy Band in High-Speed Charge-Trap Memory Based on WSe2.

    PubMed

    Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei

    2017-05-01

    Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  20. Enabling Universal Memory by Overcoming the Contradictory Speed and Stability Nature of Phase-Change Materials

    PubMed Central

    Wang, Weijie; Loke, Desmond; Shi, Luping; Zhao, Rong; Yang, Hongxin; Law, Leong-Tat; Ng, Lung-Tat; Lim, Kian-Guan; Yeo, Yee-Chia; Chong, Tow-Chong; Lacaita, Andrea L.

    2012-01-01

    The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. Phase-change materials are highly promising in this respect. However, their contradictory speed and stability properties present a key challenge towards this ambition. We reveal that as the device size decreases, the phase-change mechanism changes from the material inherent crystallization mechanism (either nucleation- or growth-dominated), to the hetero-crystallization mechanism, which resulted in a significant increase in PCRAM speeds. Reducing the grain size can further increase the speed of phase-change. Such grain size effect on speed becomes increasingly significant at smaller device sizes. Together with the nano-thermal and electrical effects, fast phase-change, good stability and high endurance can be achieved. These findings lead to a feasible solution to achieve a universal memory. PMID:22496956

  1. Enabling universal memory by overcoming the contradictory speed and stability nature of phase-change materials.

    PubMed

    Wang, Weijie; Loke, Desmond; Shi, Luping; Zhao, Rong; Yang, Hongxin; Law, Leong-Tat; Ng, Lung-Tat; Lim, Kian-Guan; Yeo, Yee-Chia; Chong, Tow-Chong; Lacaita, Andrea L

    2012-01-01

    The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. Phase-change materials are highly promising in this respect. However, their contradictory speed and stability properties present a key challenge towards this ambition. We reveal that as the device size decreases, the phase-change mechanism changes from the material inherent crystallization mechanism (either nucleation- or growth-dominated), to the hetero-crystallization mechanism, which resulted in a significant increase in PCRAM speeds. Reducing the grain size can further increase the speed of phase-change. Such grain size effect on speed becomes increasingly significant at smaller device sizes. Together with the nano-thermal and electrical effects, fast phase-change, good stability and high endurance can be achieved. These findings lead to a feasible solution to achieve a universal memory.

  2. Graphene as a platform for novel nanoelectronic devices

    NASA Astrophysics Data System (ADS)

    Standley, Brian

    Graphene's superlative electrical and mechanical properties, combined with its compatibility with existing planar silicon-based technology, make it an attractive platform for novel nanoelectronic devices. The development of two such devices is reported--a nonvolatile memory element exploiting the nanoscale graphene edge and a field-effect transistor using graphene for both the conducting channel and, in oxidized form, the gate dielectric. These experiments were enabled by custom software written to fully utilize both instrument-based and computer-based data acquisition hardware and provide a simple measurement automation system. Graphene break junctions were studied and found to exhibit switching behavior in response to an electric field. This switching allows the devices to act as nonvolatile memory elements which have demonstrated thousands of writing cycles and long retention times. A model for device operation is proposed based on the formation and breaking of carbon-atom chains that bridge the junctions. Information storage was demonstrated using the concept of rank coding, in which information is stored in the relative conductance of multiple graphene switches in a memory cell. The high mobility and two dimensional nature of graphene make it an attractive material for field-effect transistors. Another ultrathin layered materialmd graphene's insulating analogue, graphite oxidemd was studied as an alternative to bulk gate dielectric materials such as Al2O3 or HfO 2. Transistors were fabricated comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. Electron transport measurements reveal minimal leakage through the graphite oxide at room temperature. Its breakdown electric field was found to be comparable to SiO2, typically ˜1-3 x 108 V/m, while its dielectric constant is slightly higher, kappa ≈ 4.3. As nanoelectronics experiments and their associated instrumentation continue to grow in complexity the need for

  3. Resistively heated shape memory polymer device

    DOEpatents

    Marion, III, John E.; Bearinger, Jane P.; Wilson, Thomas S.; Maitland, Duncan J.

    2017-09-05

    A resistively heated shape memory polymer device is made by providing a rod, sheet or substrate that includes a resistive medium. The rod, sheet or substrate is coated with a first shape memory polymer providing a coated intermediate unit. The coated intermediate unit is in turn coated with a conductive material providing a second intermediate unit. The second coated intermediate unit is in turn coated with an outer shape memory polymer. The rod, sheet or substrate is exposed and an electrical lead is attached to the rod, sheet or substrate. The conductive material is exposed and an electrical lead is attached to the conductive material.

  4. Resistively heated shape memory polymer device

    DOEpatents

    Marion, III, John E.; Bearinger, Jane P.; Wilson, Thomas S.; Maitland, Duncan J.

    2016-10-25

    A resistively heated shape memory polymer device is made by providing a rod, sheet or substrate that includes a resistive medium. The rod, sheet or substrate is coated with a first shape memory polymer providing a coated intermediate unit. The coated intermediate unit is in turn coated with a conductive material providing a second intermediate unit. The second coated intermediate unit is in turn coated with an outer shape memory polymer. The rod, sheet or substrate is exposed and an electrical lead is attached to the rod, sheet or substrate. The conductive material is exposed and an electrical lead is attached to the conductive material.

  5. Electroforming free controlled bipolar resistive switching in Al/CoFe2O4/FTO device with self-compliance effect

    NASA Astrophysics Data System (ADS)

    Munjal, Sandeep; Khare, Neeraj

    2018-02-01

    Controlled bipolar resistive switching (BRS) has been observed in nanostructured CoFe2O4 (CFO) films using an Al (aluminum)/CoFe2O4/FTO (fluorine-doped tin oxide) device. The fabricated device shows electroforming-free uniform BRS with two clearly distinguished and stable resistance states without any application of compliance current, with a resistance ratio of the high resistance state (HRS) and the low resistance state (LRS) of >102. Small switching voltage (<1 volt) and lower current in both the resistance states confirm the fabrication of a low power consumption device. In the LRS, the conduction mechanism was found to be Ohmic in nature, while the high-resistance state (HRS/OFF state) was governed by the space charge-limited conduction mechanism, which indicates the presence of an interfacial layer with an imperfect microstructure near the top Al/CFO interface. The device shows nonvolatile behavior with good endurance properties, an acceptable resistance ratio, uniform resistive switching due to stable, less random filament formation/rupture, and a control over the resistive switching properties by choosing different stop voltages, which makes the device suitable for its application in future nonvolatile resistive random access memory.

  6. Magnetization switching schemes for nanoscale three-terminal spintronics devices

    NASA Astrophysics Data System (ADS)

    Fukami, Shunsuke; Ohno, Hideo

    2017-08-01

    Utilizing spintronics-based nonvolatile memories in integrated circuits offers a promising approach to realize ultralow-power and high-performance electronics. While two-terminal devices with spin-transfer torque switching have been extensively developed nowadays, there has been a growing interest in devices with a three-terminal structure. Of primary importance for applications is the efficient manipulation of magnetization, corresponding to information writing, in nanoscale devices. Here we review the studies of current-induced domain wall motion and spin-orbit torque-induced switching, which can be applied to the write operation of nanoscale three-terminal spintronics devices. For domain wall motion, the size dependence of device properties down to less than 20 nm will be shown and the underlying mechanism behind the results will be discussed. For spin-orbit torque-induced switching, factors governing the threshold current density and strategies to reduce it will be discussed. A proof-of-concept demonstration of artificial intelligence using an analog spin-orbit torque device will also be reviewed.

  7. Some Improvements in Utilization of Flash Memory Devices

    NASA Technical Reports Server (NTRS)

    Gender, Thomas K.; Chow, James; Ott, William E.

    2009-01-01

    Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.

  8. Multifunctional graphene optoelectronic devices capable of detecting and storing photonic signals.

    PubMed

    Jang, Sukjae; Hwang, Euyheon; Lee, Youngbin; Lee, Seungwoo; Cho, Jeong Ho

    2015-04-08

    The advantages of graphene photodetectors were utilized to design a new multifunctional graphene optoelectronic device. Organic semiconductors, gold nanoparticles (AuNPs), and graphene were combined to fabricate a photodetecting device with a nonvolatile memory function for storing photonic signals. A pentacene organic semiconductor acted as a light absorption layer in the device and provided a high hole photocurrent to the graphene channel. The AuNPs, positioned between the tunneling and blocking dielectric layers, acted as both a charge trap layer and a plasmonic light scatterer, which enable storing of the information about the incident light. The proposed pentacene-graphene-AuNP hybrid photodetector not only performed well as a photodetector in the visible light range, it also was able to store the photonic signal in the form of persistent current. The good photodetection performance resulted from the plasmonics-enabled enhancement of the optical absorption and from the photogating mechanisms in the pentacene. The device provided a photoresponse that depended on the wavelength of incident light; therefore, the signal information (both the wavelength and intensity) of the incident light was effectively committed to memory. The simple process of applying a negative pulse gate voltage could then erase the programmed information. The proposed photodetector with the capacity to store a photonic signal in memory represents a significant step toward the use of graphene in optoelectronic devices.

  9. Improved speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer

    NASA Astrophysics Data System (ADS)

    Zheng, Zhiwei; Huo, Zongliang; Zhang, Manhong; Zhu, Chenxin; Liu, Jing; Liu, Ming

    2011-10-01

    This paper reports the simultaneous improvements in erase speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer. In comparison to a memory capacitor with a single HfO2 trapping layer, the erase speed of a memory capacitor with a stacked HfO2/Ta2O5 charge-trapping layer is 100 times faster and its memory window is enlarged from 2.7 to 4.8 V for the same ±16 V sweeping voltage range. With the same initial window of ΔVFB = 4 V, the device with a stacked HfO2/Ta2O5 charge-trapping layer has a 3.5 V extrapolated 10-year retention window, while the control device with a single HfO2 trapping layer has only 2.5 V for the extrapolated 10-year window. The present results demonstrate that the device with the stacked HfO2/Ta2O5 charge-trapping layer has a strong potential for future high-performance nonvolatile memory application.

  10. Ga-doped indium oxide nanowire phase change random access memory cells

    NASA Astrophysics Data System (ADS)

    Jin, Bo; Lim, Taekyung; Ju, Sanghyun; Latypov, Marat I.; Kim, Hyoung Seop; Meyyappan, M.; Lee, Jeong-Soo

    2014-02-01

    Phase change random access memory (PCRAM) devices are usually constructed using tellurium based compounds, but efforts to seek other materials providing desirable memory characteristics have continued. We have fabricated PCRAM devices using Ga-doped In2O3 nanowires with three different Ga compositions (Ga/(In+Ga) atomic ratio: 2.1%, 11.5% and 13.0%), and investigated their phase switching properties. The nanowires (˜40 nm in diameter) can be repeatedly switched between crystalline and amorphous phases, and Ga concentration-dependent memory switching behavior in the nanowires was observed with ultra-fast set/reset rates of 80 ns/20 ns, which are faster than for other competitive phase change materials. The observations of fast set/reset rates and two distinct states with a difference in resistance of two to three orders of magnitude appear promising for nonvolatile information storage. Moreover, we found that increasing the Ga concentration can reduce the power consumption and resistance drift; however, too high a level of Ga doping may cause difficulty in achieving the phase transition.

  11. MemFlash device: floating gate transistors as memristive devices for neuromorphic computing

    NASA Astrophysics Data System (ADS)

    Riggert, C.; Ziegler, M.; Schroeder, D.; Krautschneider, W. H.; Kohlstedt, H.

    2014-10-01

    Memristive devices are promising candidates for future non-volatile memory applications and mixed-signal circuits. In the field of neuromorphic engineering these devices are especially interesting to emulate neuronal functionality. Therefore, new materials and material combinations are currently investigated, which are often not compatible with Si-technology processes. The underlying mechanisms of the device often remain unclear and are paired with low device endurance and yield. These facts define the current most challenging development tasks towards a reliable memristive device technology. In this respect, the MemFlash concept is of particular interest. A MemFlash device results from a diode configuration wiring scheme of a floating gate transistor, which enables the persistent device resistance to be varied according to the history of the charge flow through the device. In this study, we investigate the scaling conditions of the floating gate oxide thickness with respect to possible applications in the field of neuromorphic engineering. We show that MemFlash cells exhibit essential features with respect to neuromorphic applications. In particular, cells with thin floating gate oxides show a limited synaptic weight growth together with low energy dissipation. MemFlash cells present an attractive alternative for state-of-art memresitive devices. The emulation of associative learning is discussed by implementing a single MemFlash cell in an analogue circuit.

  12. Impacts of Co doping on ZnO transparent switching memory device characteristics

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Simanjuntak, Firman Mangasa; Wei, Kung-Hwa; Prasad, Om Kumar

    2016-05-02

    The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnOmore » device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.« less

  13. CMOS compatible electrode materials selection in oxide-based memory devices

    NASA Astrophysics Data System (ADS)

    Zhuo, V. Y.-Q.; Li, M.; Guo, Y.; Wang, W.; Yang, Y.; Jiang, Y.; Robertson, J.

    2016-07-01

    Electrode materials selection guidelines for oxide-based memory devices are constructed from the combined knowledge of observed device operation characteristics, ab-initio calculations, and nano-material characterization. It is demonstrated that changing the top electrode material from Ge to Cr to Ta in the Ta2O5-based memory devices resulted in a reduction of the operation voltages and current. Energy Dispersed X-ray (EDX) Spectrometer analysis clearly shows that the different top electrode materials scavenge oxygen ions from the Ta2O5 memory layer at various degrees, leading to different oxygen vacancy concentrations within the Ta2O5, thus the observed trends in the device performance. Replacing the Pt bottom electrode material with CMOS compatible materials (Ru and Ir) further reduces the power consumption and can be attributed to the modification of the Schottky barrier height and oxygen vacancy concentration at the electrode/oxide interface. Both trends in the device performance and EDX results are corroborated by the ab-initio calculations which reveal that the electrode material tunes the oxygen vacancy concentration via the oxygen chemical potential and defect formation energy. This experimental-theoretical approach strongly suggests that the proper selection of CMOS compatible electrode materials will create the critical oxygen vacancy concentration to attain low power memory performance.

  14. High performance electrical, magnetic, electromagnetic and electrooptical devices enabled by three dimensionally ordered nanodots and nanorods

    DOEpatents

    Goyal, Amit , Kang; Sukill, [Knoxville, TN

    2012-02-21

    Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

  15. Flexible and twistable non-volatile memory cell array with all-organic one diode-one resistor architecture.

    PubMed

    Ji, Yongsung; Zeigler, David F; Lee, Dong Su; Choi, Hyejung; Jen, Alex K-Y; Ko, Heung Cho; Kim, Tae-Wook

    2013-01-01

    Flexible organic memory devices are one of the integral components for future flexible organic electronics. However, high-density all-organic memory cell arrays on malleable substrates without cross-talk have not been demonstrated because of difficulties in their fabrication and relatively poor performances to date. Here we demonstrate the first flexible all-organic 64-bit memory cell array possessing one diode-one resistor architectures. Our all-organic one diode-one resistor cell exhibits excellent rewritable switching characteristics, even during and after harsh physical stresses. The write-read-erase-read output sequence of the cells perfectly correspond to the external pulse signal regardless of substrate deformation. The one diode-one resistor cell array is clearly addressed at the specified cells and encoded letters based on the standard ASCII character code. Our study on integrated organic memory cell arrays suggests that the all-organic one diode-one resistor cell architecture is suitable for high-density flexible organic memory applications in the future.

  16. Crystal that remembers: several ways to utilize nanocrystals in resistive switching memory

    NASA Astrophysics Data System (ADS)

    Banerjee, Writam; Liu, Qi; Long, Shibing; Lv, Hangbing; Liu, Ming

    2017-08-01

    The attractive usability of quantum phenomena in futuristic devices is possible by using zero-dimensional systems like nanocrystals (NCs). The performance of nonvolatile flash memory devices has greatly benefited from the use of NCs over recent decades. The quantum abilities of NCs have been used to improve the reliability of flash devices. Its appeal is extended to the design of emerging devices such as resistive random-access memory (RRAM), a technology where the use of silicon is optional. Here, we are going to review the recent progress in the design, characterization, and utilization of NCs in RRAM devices. We will first introduce the physical design of the RRAM devices using NCs and the improvement of electrical performance in NC-RRAM over conventional ones. In particular, special care has been taken to review the ways of development provided by the NCs in the RRAM devices. In a broad sense, the NCs can play a charge trapping role in the NC-RRAM structure or it can be responsible for the localization and improvement of the stability of the conductive filament or it can play a part in the formation of the conductive filament chain by the NC migration under applied bias. Finally, the scope of NCs in the RRAM devices has also been discussed.

  17. Resistive switching mechanisms in random access memory devices incorporating transition metal oxides: TiO2, NiO and Pr0.7Ca0.3MnO3.

    PubMed

    Magyari-Köpe, Blanka; Tendulkar, Mihir; Park, Seong-Geon; Lee, Hyung Dong; Nishi, Yoshio

    2011-06-24

    Resistance change random access memory (RRAM) cells, typically built as MIM capacitor structures, consist of insulating layers I sandwiched between metal layers M, where the insulator performs the resistance switching operation. These devices can be electrically switched between two or more stable resistance states at a speed of nanoseconds, with long retention times, high switching endurance, low read voltage, and large switching windows. They are attractive candidates for next-generation non-volatile memory, particularly as a flash successor, as the material properties can be scaled to the nanometer regime. Several resistance switching models have been suggested so far for transition metal oxide based devices, such as charge trapping, conductive filament formation, Schottky barrier modulation, and electrochemical migration of point defects. The underlying fundamental principles of the switching mechanism still lack a detailed understanding, i.e. how to control and modulate the electrical characteristics of devices incorporating defects and impurities, such as oxygen vacancies, metal interstitials, hydrogen, and other metallic atoms acting as dopants. In this paper, state of the art ab initio theoretical methods are employed to understand the effects that filamentary types of stable oxygen vacancy configurations in TiO(2) and NiO have on the electronic conduction. It is shown that strong electronic interactions between metal ions adjacent to oxygen vacancy sites results in the formation of a conductive path and thus can explain the 'ON' site conduction in these materials. Implication of hydrogen doping on electroforming is discussed for Pr(0.7)Ca(0.3)MnO(3) devices based on electrical characterization and FTIR measurements.

  18. Multifunctional tunneling devices based on graphene/h-BN/MoSe2 van der Waals heterostructures

    NASA Astrophysics Data System (ADS)

    Cheng, Ruiqing; Wang, Feng; Yin, Lei; Xu, Kai; Ahmed Shifa, Tofik; Wen, Yao; Zhan, Xueying; Li, Jie; Jiang, Chao; Wang, Zhenxing; He, Jun

    2017-04-01

    The vertically stacked devices based on van der Waals heterostructures (vdWHs) of two-dimensional layered materials (2DLMs) have attracted considerable attention due to their superb properties. As a typical structure, graphene/hexagonal boron nitride (h-BN)/graphene vdWH has been proved possible to make tunneling devices. Compared with graphene, transition metal dichalcogenides possess intrinsic bandgap, leading to high performance of electronic devices. Here, tunneling devices based on graphene/h-BN/MoSe2 vdWHs are designed for multiple functions. On the one hand, the device shows a typical tunneling field-effect transistor behavior. A high on/off ratio of tunneling current (5 × 103) and an ultrahigh current rectification ratio (7 × 105) are achieved, which are attributed to relatively small electronic affinity of MoSe2 and optimized thickness of h-BN. On the other hand, the same structure also realizes 2D non-volatile memory with a high program/erase current ratio (>105), large memory window (˜150 V from ±90 V), and good retention characteristic. These results could enhance the fundamental understanding of tunneling behavior in vdWHs and contribute to the design of ultrathin rectifiers and memory based on 2DLMs.

  19. High-Performance Flexible Organic Nano-Floating Gate Memory Devices Functionalized with Cobalt Ferrite Nanoparticles.

    PubMed

    Jung, Ji Hyung; Kim, Sunghwan; Kim, Hyeonjung; Park, Jongnam; Oh, Joon Hak

    2015-10-07

    Nano-floating gate memory (NFGM) devices are transistor-type memory devices that use nanostructured materials as charge trap sites. They have recently attracted a great deal of attention due to their excellent performance, capability for multilevel programming, and suitability as platforms for integrated circuits. Herein, novel NFGM devices have been fabricated using semiconducting cobalt ferrite (CoFe2O4) nanoparticles (NPs) as charge trap sites and pentacene as a p-type semiconductor. Monodisperse CoFe2O4 NPs with different diameters have been synthesized by thermal decomposition and embedded in NFGM devices. The particle size effects on the memory performance have been investigated in terms of energy levels and particle-particle interactions. CoFe2O4 NP-based memory devices exhibit a large memory window (≈73.84 V), a high read current on/off ratio (read I(on)/I(off)) of ≈2.98 × 10(3), and excellent data retention. Fast switching behaviors are observed due to the exceptional charge trapping/release capability of CoFe2O4 NPs surrounded by the oleate layer, which acts as an alternative tunneling dielectric layer and simplifies the device fabrication process. Furthermore, the NFGM devices show excellent thermal stability, and flexible memory devices fabricated on plastic substrates exhibit remarkable mechanical and electrical stability. This study demonstrates a viable means of fabricating highly flexible, high-performance organic memory devices. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  20. A low switching voltage organic-on-inorganic heterojunction memory element utilizing a conductive polymer fuse on a doped silicon substrate

    NASA Astrophysics Data System (ADS)

    Smith, Shawn; Forrest, Stephen R.

    2004-06-01

    We present a simple, nonvolatile, write-once-read-many-times (WORM) memory device utilizing an organic-on-inorganic heterojunction (OI-HJ) diode with a conductive polymer fuse consisting of polyethylene dioxythiophene:polysterene sulfonic acid (PEDOT:PSS) forming one side of the rectifying junction. Current transients are used to change the fuse from a conducting to a nonconducting state to record a logical "1" or "0", while the nonlinearity of the OI-HJ allows for passive matrix memory addressing. The device switches at 2 and 4 V for 50 nm thick PEDOT:PSS films on p-type Si and n-type Si, respectively. This is significantly lower than the switching voltage used in PEDOT:PSS/p-i-n Si memory elements [J. Appl Phys. 94, 7811 (2003)]. The switching results in a permanent reduction of forward-bias current by approximately five orders of magnitude. These results suggest that the OI-HJ structure has potential for use in low-cost passive matrix WORM memories for archival storage applications.

  1. Graphene-based nonvolatile terahertz switch with asymmetric electrodes.

    PubMed

    Li, Yan; Yu, Hui; Qiu, Xinyu; Dai, Tingge; Jiang, Jianfei; Wang, Gencheng; Zhang, Qiang; Qin, Yali; Yang, Jianyi; Jiang, Xiaoqing

    2018-01-24

    We propose a nonvolatile terahertz (THz) switch which is able to perform the switching with transient stimulus. The device utilizes graphene as its floating-gate layer, which changes the transmissivity of THz signal by trapping the tunneling charges. The conventional top-down electrode configuration is replaced by a left-right electrode configuration, so THz signals could transmit through this device with the transmissivity being controlled by voltage pulses. The two electrodes are made of metals with different work functions. The resultant asymmetrical energy band structure ensures that both electrical programming and erasing are viable. With the aid of localized surface plasmon resonances in graphene ribbon arrays, the modulation depth is 89% provided that the Femi level of graphene is tuned between 0 and 0.2 eV by proper voltage pulses.

  2. Nanoscale CuO solid-electrolyte-based conductive-bridging, random-access memory cell with a TiN liner

    NASA Astrophysics Data System (ADS)

    Lee, Jong-Sun; Kim, Dong-Won; Kim, Hea-Jee; Jin, Soo-Min; Song, Myung-Jin; Kwon, Ki-Hyun; Park, Jea-Gun; Jalalah, Mohammed; Al-Hajry, Ali

    2018-01-01

    The Conductive-bridge random-access memory (CBRAM) cell is a promising candidate for a terabit-level non-volatile memory due to its remarkable advantages. We present for the first time TiN as a diffusion barrier in CBRAM cells for enhancing their reliability. CuO solid-electrolyte-based CBRAM cells implemented with a 0.1-nm TiN liner demonstrated better non-volatile memory characteristics such as 106 AC write/erase endurance cycles with 100-μs AC pulse width and a long retention time of 7.4-years at 85 °C. In addition, the analysis of Ag diffusion in the CBRAM cell suggests that the morphology of the Ag filaments in the electrolyte can be effectively controlled by tuning the thickness of the TiN liner. These promising results pave the way for faster commercialization of terabit-level non-volatile memories.

  3. Oxygen plasma immersion ion implantation treatment to enhance data retention of tungsten nanocrystal nonvolatile memory

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Wang, Jer-Chyi, E-mail: jcwang@mail.cgu.edu.tw; Chang, Wei-Cheng; Lai, Chao-Sung, E-mail: cslai@mail.cgu.edu.tw

    Data retention characteristics of tungsten nanocrystal (W-NC) memory devices using an oxygen plasma immersion ion implantation (PIII) treatment are investigated. With an increase of oxygen PIII bias voltage and treatment time, the capacitance–voltage hysteresis memory window is increased but the data retention characteristics become degraded. High-resolution transmission electron microscopy images show that this poor data retention is a result of plasma damage on the tunneling oxide layer, which can be prevented by lowering the bias voltage to 7 kV. In addition, by using the elevated temperature retention measurement technique, the effective charge trapping level of the WO{sub 3} film surrounding themore » W-NCs can be extracted. This measurement reveals that a higher oxygen PIII bias voltage and treatment time induces more shallow traps within the WO{sub 3} film, degrading the retention behavior of the W-NC memory.« less

  4. Guide wire extension for shape memory polymer occlusion removal devices

    DOEpatents

    Maitland, Duncan J [Pleasant Hill, CA; Small, IV, Ward; Hartman, Jonathan [Sacramento, CA

    2009-11-03

    A flexible extension for a shape memory polymer occlusion removal device. A shape memory polymer instrument is transported through a vessel via a catheter. A flexible elongated unit is operatively connected to the distal end of the shape memory polymer instrument to enhance maneuverability through tortuous paths en route to the occlusion.

  5. Combating Memory Corruption Attacks On Scada Devices

    NASA Astrophysics Data System (ADS)

    Bellettini, Carlo; Rrushi, Julian

    Memory corruption attacks on SCADA devices can cause significant disruptions to control systems and the industrial processes they operate. However, despite the presence of numerous memory corruption vulnerabilities, few, if any, techniques have been proposed for addressing the vulnerabilities or for combating memory corruption attacks. This paper describes a technique for defending against memory corruption attacks by enforcing logical boundaries between potentially hostile data and safe data in protected processes. The technique encrypts all input data using random keys; the encrypted data is stored in main memory and is decrypted according to the principle of least privilege just before it is processed by the CPU. The defensive technique affects the precision with which attackers can corrupt control data and pure data, protecting against code injection and arc injection attacks, and alleviating problems posed by the incomparability of mitigation techniques. An experimental evaluation involving the popular Modbus protocol demonstrates the feasibility and efficiency of the defensive technique.

  6. Redefining the Speed Limit of Phase Change Memory Revealed by Time-resolved Steep Threshold-Switching Dynamics of AgInSbTe Devices

    NASA Astrophysics Data System (ADS)

    Shukla, Krishna Dayal; Saxena, Nishant; Durai, Suresh; Manivannan, Anbarasu

    2016-11-01

    Although phase-change memory (PCM) offers promising features for a ‘universal memory’ owing to high-speed and non-volatility, achieving fast electrical switching remains a key challenge. In this work, a correlation between the rate of applied voltage and the dynamics of threshold-switching is investigated at picosecond-timescale. A distinct characteristic feature of enabling a rapid threshold-switching at a critical voltage known as the threshold voltage as validated by an instantaneous response of steep current rise from an amorphous off to on state is achieved within 250 picoseconds and this is followed by a slower current rise leading to crystallization. Also, we demonstrate that the extraordinary nature of threshold-switching dynamics in AgInSbTe cells is independent to the rate of applied voltage unlike other chalcogenide-based phase change materials exhibiting the voltage dependent transient switching characteristics. Furthermore, numerical solutions of time-dependent conduction process validate the experimental results, which reveal the electronic nature of threshold-switching. These findings of steep threshold-switching of ‘sub-50 ps delay time’, opens up a new way for achieving high-speed non-volatile memory for mainstream computing.

  7. Interfacial interactions and their impact on redox-based resistive switching memories (ReRAMs)

    NASA Astrophysics Data System (ADS)

    Valov, Ilia

    2017-09-01

    Redox-based resistive switching memories are nowadays one of the most studied systems in both academia and industrial communities. These devices are scalable down to an almost atomic level and are supposed to be applicable not only for next-generation nonvolatile memories, but also for neuromorphic computing, alternative logic operations and selector devices. The main characteristic feature of these cells is their nano- to sub-nano dimension. This makes the control and especially prediction of their properties very challenging. One of the ways to achieve better understanding and to improve the control of these systems is to study and modify their interfaces. In this review, first the fundamentals will be discussed, as these are essential for understanding which factors control the nanoscale interface properties. Further, different types of interactions at the electrode/solid electrolyte interface reported for ECM- and VCM-type cells will be exemplarily shown. Finally, the strategies and different solutions used to modify the interfaces and overcome the existing problems on the way to more stable and reliable devices will be highlighted.

  8. Spectromicroscopic insights for rational design of redox-based memristive devices

    PubMed Central

    Baeumer, Christoph; Schmitz, Christoph; Ramadan, Amr H. H.; Du, Hongchu; Skaja, Katharina; Feyer, Vitaliy; Müller, Philipp; Arndt, Benedikt; Jia, Chun-Lin; Mayer, Joachim; De Souza, Roger A.; Michael Schneider, Claus; Waser, Rainer; Dittmann, Regina

    2015-01-01

    The demand for highly scalable, low-power devices for data storage and logic operations is strongly stimulating research into resistive switching as a novel concept for future non-volatile memory devices. To meet technological requirements, it is imperative to have a set of material design rules based on fundamental material physics, but deriving such rules is proving challenging. Here, we elucidate both switching mechanism and failure mechanism in the valence-change model material SrTiO3, and on this basis we derive a design rule for failure-resistant devices. Spectromicroscopy reveals that the resistance change during device operation and failure is indeed caused by nanoscale oxygen migration resulting in localized valence changes between Ti4+ and Ti3+. While fast reoxidation typically results in retention failure in SrTiO3, local phase separation within the switching filament stabilizes the retention. Mimicking this phase separation by intentionally introducing retention-stabilization layers with slow oxygen transport improves retention times considerably. PMID:26477940

  9. Charge Carrier Transport Mechanism Based on Stable Low Voltage Organic Bistable Memory Device.

    PubMed

    Ramana, V V; Moodley, M K; Kumar, A B V Kiran; Kannan, V

    2015-05-01

    A solution processed two terminal organic bistable memory device was fabricated utilizing films of polymethyl methacrylate PMMA/ZnO/PMMA on top of ITO coated glass. Electrical characterization of the device structure showed that the two terminal device exhibited favorable switching characteristics with an ON/OFF ratio greater than 1 x 10(4) when the voltage was swept between - 2 V and +3 V. The device maintained its state after removal of the bias voltage. The device did not show degradation after a 1-h retention test at 120 degrees C. The memory functionality was consistent even after fifty cycles of operation. The charge transport switching mechanism is discussed on the basis of carrier transport mechanism and our analysis of the data shows that the charge carrier trans- port mechanism of the device during the writing process can be explained by thermionic emission (TE) and space-charge-limited-current (SCLC) mechanism models while erasing process could be explained by the FN tunneling mechanism. This demonstration provides a class of memory devices with the potential for low-cost, low-power consumption applications, such as a digital memory cell.

  10. Logic and memory concepts for all-magnetic computing based on transverse domain walls

    NASA Astrophysics Data System (ADS)

    Vandermeulen, J.; Van de Wiele, B.; Dupré, L.; Van Waeyenberge, B.

    2015-06-01

    We introduce a non-volatile digital logic and memory concept in which the binary data is stored in the transverse magnetic domain walls present in in-plane magnetized nanowires with sufficiently small cross sectional dimensions. We assign the digital bit to the two possible orientations of the transverse domain wall. Numerical proofs-of-concept are presented for a NOT-, AND- and OR-gate, a FAN-out as well as a reading and writing device. Contrary to the chirality based vortex domain wall logic gates introduced in Omari and Hayward (2014 Phys. Rev. Appl. 2 044001), the presented concepts remain applicable when miniaturized and are driven by electrical currents, making the technology compatible with the in-plane racetrack memory concept. The individual devices can be easily combined to logic networks working with clock speeds that scale linearly with decreasing design dimensions. This opens opportunities to an all-magnetic computing technology where the digital data is stored and processed under the same magnetic representation.

  11. A non-volatile flip-flop based on diode-selected PCM for ultra-low power systems

    NASA Astrophysics Data System (ADS)

    Ye, Yong; Du, Yuan; Gao, Dan; Kang, Yong; Song, Zhitang; Chen, Bomy

    2016-10-01

    As the process technology is continuously shrinking, low power consumption is a major issue in VLSI Systems-on-Chip (SoCs), especially for standby-power-critical applications. Recently, the emerging CMOS-compatible non-volatile memories (NVMs), such as Phase Change Memory (PCM), have been used as on-chip storage elements, which can obtain non-volatile processing, nearly-zero standby power and instant-on capability. PCM has been considered as the best candidate for the next generation of NVMs for its low cost, high density and high resistance transformation ratio. In this paper, for the first time, we present a diode-selected PCM based non-volatile flip-flop (NVFF) which is optimized for better power consumption and process variation tolerance. With dual trench isolation process, the diode-selected PCM realizes ultra small area, which is very suitable for multi-context configuration and large scale flip-flops matrix. Since the MOS-selected PCM is hard to shrink further due to large amount of PCM write current, the proposed NVFF achieves higher power efficiency without loss of current driving capability. Using the 40nm manufacturing process, the area of the cell (1D1R) is as small as 0.016 μm2. Simulation results show that the energy consumption during the recall operation is 62 fJ with 1.1 standard supply voltage, which is reduced by 54.9% compared to the previous 2T2R based NVFF. When the supply voltage reduces to 0.7 V, the recall energy is as low as 17 fJ. With the great advantages in cell size and energy, the proposed diode-selected NVFF is very applicable and cost-effective for ULP systems.

  12. Impact of process parameters on the structural and electrical properties of metal/PZT/Al2O3/silicon gate stack for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Singh, Prashant; Jha, Rajesh Kumar; Singh, Rajat Kumar; Singh, B. R.

    2018-02-01

    In this paper, we present the structural and electrical properties of the Al2O3 buffer layer on non-volatile memory behavior using Metal/PZT/Al2O3/Silicon structures. Metal/PZT/Silicon and Metal/Al2O3/Silicon structures were also fabricated and characterized to obtain capacitance and leakage current parameters. Lead zirconate titanate (PZT::35:65) and Al2O3 films were deposited by sputtering on the silicon substrate. Memory window, PUND, endurance, breakdown voltage, effective charges, flat-band voltage and leakage current density parameters were measured and the effects of process parameters on the structural and electrical characteristics were investigated. X-ray data show dominant (110) tetragonal phase of the PZT film, which crystallizes at 500 °C. The sputtered Al2O3 film annealed at different temperatures show dominant (312) orientation and amorphous nature at 425 °C. Multiple angle laser ellipsometric analysis reveals the temperature dependence of PZT film refractive index and extinction coefficient. Electrical characterization shows the maximum memory window of 3.9 V and breakdown voltage of 25 V for the Metal/Ferroelectric/Silicon (MFeS) structures annealed at 500 °C. With 10 nm Al2O3 layer in the Metal/Ferroelectric/Insulator/Silicon (MFeIS) structure, the memory window and breakdown voltage was improved to 7.21 and 35 V, respectively. Such structures show high endurance with no significant reduction polarization charge for upto 2.2 × 109 iteration cycles.

  13. Enhancement of memory margins in the polymer composite of [6,6]-phenyl-C61-butyric acid methyl ester and polystyrene.

    PubMed

    Sun, Yanmei; Lu, Junguo; Ai, Chunpeng; Wen, Dianzhong; Bai, Xuduo

    2016-11-09

    Memory devices based on composites of polystyrene (PS) and [6,6]-phenyl-C 61 -butyric acid methyl ester (PCBM) were investigated with bistable resistive switching behavior. Current-voltage (I-V) curves for indium-tin-oxide (ITO)/PS + PCBM/Al devices with 33 wt% PCBM showed non-volatile, rewritable, flash memory properties with a maximum ON/OFF current ratio of 1 × 10 4 , which was 100 times larger than the ON/OFF ratio of the device with 5 wt% PCBM. For ITO/PS + PCBM/Al devices with 33 wt% PCBM, the write-read-erase-read test cycles demonstrated the bistable devices with ON and OFF states at the same voltage. The programmable ON and OFF states endured up to 10 4 read pulses and possessed a retention time of over 10 5 s, indicative of the memory stability of the device. In the OFF state, the I-V curve at lower voltages up to 0.45 V was attributed to the thermionic emission mechanism, and the I-V characteristics in the applied voltage above 0.5 V dominantly followed the space-charge-limited-current behaviors. In the ON state, the curve in the applied voltage range was related to an Ohmic mechanism.

  14. Light programmable organic transistor memory device based on hybrid dielectric

    NASA Astrophysics Data System (ADS)

    Ren, Xiaochen; Chan, Paddy K. L.

    2013-09-01

    We have fabricated the transistor memory devices based on SiO2 and polystyrene (PS) hybrid dielectric. The trap states densities with different semiconductors have been investigated and a maximum 160V memory window between programming and erasing is realized. For DNTT based transistor, the trapped electron density is limited by the number of mobile electrons in semiconductor. The charge transport mechanism is verified by light induced Vth shift effect. Furthermore, in order to meet the low operating power requirement of portable electronic devices, we fabricated the organic memory transistor based on AlOx/self-assembly monolayer (SAM)/PS hybrid dielectric, the effective capacitance of hybrid dielectric is 210 nF cm-2 and the transistor can reach saturation state at -3V gate bias. The memory window in transfer I-V curve is around 1V under +/-5V programming and erasing bias.

  15. Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell

    NASA Astrophysics Data System (ADS)

    Gao, Shuang; Yang, Guang; Cui, Bin; Wang, Shouguo; Zeng, Fei; Song, Cheng; Pan, Feng

    2016-06-01

    Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future.Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis

  16. Highly reliable top-gated thin-film transistor memory with semiconducting, tunneling, charge-trapping, and blocking layers all of flexible polymers.

    PubMed

    Wang, Wei; Hwang, Sun Kak; Kim, Kang Lib; Lee, Ju Han; Cho, Suk Man; Park, Cheolmin

    2015-05-27

    The core components of a floating-gate organic thin-film transistor nonvolatile memory (OTFT-NVM) include the semiconducting channel layer, tunneling layer, floating-gate layer, and blocking layer, besides three terminal electrodes. In this study, we demonstrated OTFT-NVMs with all four constituent layers made of polymers based on consecutive spin-coating. Ambipolar charges injected and trapped in a polymer electret charge-controlling layer upon gate program and erase field successfully allowed for reliable bistable channel current levels at zero gate voltage. We have observed that the memory performance, in particular the reliability of a device, significantly depends upon the thickness of both blocking and tunneling layers, and with an optimized layer thickness and materials selection, our device exhibits a memory window of 15.4 V, on/off current ratio of 2 × 10(4), read and write endurance cycles over 100, and time-dependent data retention of 10(8) s, even when fabricated on a mechanically flexible plastic substrate.

  17. Materials and other needs for advanced phase change memory (Presentation Recording)

    NASA Astrophysics Data System (ADS)

    Sosa, Norma E.

    2015-09-01

    Phase change memory (PCM), with its long history, may now hold its brightest promise to date. This bright future is being fueled by the "push" from big data. PCM is a non-volatile memory technology used to create solid-state random access memory devices that operate based the resistance properties of materials. Employing the electrical resistance differences-as opposed to differences in charge stored-between the amorphous and crystalline phases of the material, PCM can store bits, namely one's and zero's. Indeed, owing to the method of storage, PCM can in fact be designed to hold multiple bits thus leading to a high-density technology twice the storage density and less than half the cost of DRAM, the main kind found in typical personal computers. It has been long known that PCM can fill a need gap that spans 3 decades in performance from DRAM to solid state drive (NAND Flash). Furthermore, PCM devices can lead to performance and reliability improvements essential to enabling significant steps forward to supporting big data centric computing. This talk will focus on the science and challenges of aggressive scaling to realize the density needed, how this scaling challenge is intertwined with materials needs for endurance into the giga-cycles, and the associated forefront research aiming to realizing multi-level functionality into these nanoscale programmable resistor devices.

  18. 4D Printing of Shape Memory-Based Personalized Endoluminal Medical Devices.

    PubMed

    Zarek, Matt; Mansour, Nicola; Shapira, Shir; Cohn, Daniel

    2017-01-01

    The convergence of additive manufacturing and shape-morphing materials is promising for the advancement of personalized medical devices. The capability to transform 3D objects from one shape to another, right off the print bed, is known as 4D printing. Shape memory thermosets can be tailored to have a range of thermomechanical properties favorable to medical devices, but processing them is a challenge because they are insoluble and do not flow at any temperature. This study presents here a strategy to capitalize on a series of medical imaging modalities to construct a printable shape memory endoluminal device, exemplified by a tracheal stent. A methacrylated polycaprolactone precursor with a molecular weight of 10 000 g mol -1 is printed with a UV-LED stereolithography printer based on anatomical data. This approach converges with the zeitgeist of personalized medicine and it is anticipated that it will broadly expand the application of shape memory-exhibiting biomedical devices to myriad clinical indications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  19. Fast Magnetoresistive Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

    1991-01-01

    Magnetoresistive binary digital memories of proposed new type expected to feature high speed, nonvolatility, ability to withstand ionizing radiation, high density, and low power. In memory cell, magnetoresistive effect exploited more efficiently by use of ferromagnetic material to store datum and adjacent magnetoresistive material to sense datum for readout. Because relative change in sensed resistance between "zero" and "one" states greater, shorter sampling and readout access times achievable.

  20. Modeling of SONOS Memory Cell Erase Cycle

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat H.

    2011-01-01

    Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

  1. Electrically-controlled nonlinear switching and multi-level storage characteristics in WOx film-based memory cells

    NASA Astrophysics Data System (ADS)

    Duan, W. J.; Wang, J. B.; Zhong, X. L.

    2018-05-01

    Resistive switching random access memory (RRAM) is considered as a promising candidate for the next generation memory due to its scalability, high integration density and non-volatile storage characteristics. Here, the multiple electrical characteristics in Pt/WOx/Pt cells are investigated. Both of the nonlinear switching and multi-level storage can be achieved by setting different compliance current in the same cell. The correlations among the current, time and temperature are analyzed by using contours and 3D surfaces. The switching mechanism is explained in terms of the formation and rupture of conductive filament which is related to oxygen vacancies. The experimental results show that the non-stoichiometric WOx film-based device offers a feasible way for the applications of oxide-based RRAMs.

  2. Electrical Study of Trapped Charges in Copper-Doped Zinc Oxide Films by Scanning Probe Microscopy for Nonvolatile Memory Applications

    PubMed Central

    Su, Ting; Zhang, Haifeng

    2017-01-01

    Charge trapping properties of electrons and holes in copper-doped zinc oxide (ZnO:Cu) films have been studied by scanning probe microscopy. We investigated the surface potential dependence on the voltage and duration applied to the copper-doped ZnO films by Kelvin probe force microscopy. It is found that the Fermi Level of the 8 at.% Cu-doped ZnO films shifted by 0.53 eV comparing to undoped ZnO films. This shift indicates significant change in the electronic structure and energy balance in Cu-doped ZnO films. The Fermi Level (work function) of zinc oxide films can be tuned by Cu doping, which are important for developing this functional material. In addition, Kelvin probe force microscopy measurements demonstrate that the nature of contact at Pt-coated tip/ZnO:Cu interface is changed from Schottky contact to Ohmic contact by increasing sufficient amount of Cu ions. The charge trapping property of the ZnO films enhance greatly by Cu doping (~10 at.%). The improved stable bipolar charge trapping properties indicate that copper-doped ZnO films are promising for nonvolatile memory applications. PMID:28135335

  3. Nonvolatile programmable neural network synaptic array

    NASA Technical Reports Server (NTRS)

    Tawel, Raoul (Inventor)

    1994-01-01

    A floating-gate metal oxide semiconductor (MOS) transistor is implemented for use as a nonvolatile analog storage element of a synaptic cell used to implement an array of processing synaptic cells. These cells are based on a four-quadrant analog multiplier requiring both X and Y differential inputs, where one Y input is UV programmable. These nonvolatile synaptic cells are disclosed fully connected in a 32 x 32 synaptic cell array using standard very large scale integration (VLSI) complementary MOS (CMOS) technology.

  4. Theoretical potential for low energy consumption phase change memory utilizing electrostatically-induced structural phase transitions in 2D materials

    NASA Astrophysics Data System (ADS)

    Rehn, Daniel A.; Li, Yao; Pop, Eric; Reed, Evan J.

    2018-01-01

    Structural phase-change materials are of great importance for applications in information storage devices. Thermally driven structural phase transitions are employed in phase-change memory to achieve lower programming voltages and potentially lower energy consumption than mainstream nonvolatile memory technologies. However, the waste heat generated by such thermal mechanisms is often not optimized, and could present a limiting factor to widespread use. The potential for electrostatically driven structural phase transitions has recently been predicted and subsequently reported in some two-dimensional materials, providing an athermal mechanism to dynamically control properties of these materials in a nonvolatile fashion while achieving potentially lower energy consumption. In this work, we employ DFT-based calculations to make theoretical comparisons of the energy required to drive electrostatically-induced and thermally-induced phase transitions. Determining theoretical limits in monolayer MoTe2 and thin films of Ge2Sb2Te5, we find that the energy consumption per unit volume of the electrostatically driven phase transition in monolayer MoTe2 at room temperature is 9% of the adiabatic lower limit of the thermally driven phase transition in Ge2Sb2Te5. Furthermore, experimentally reported phase change energy consumption of Ge2Sb2Te5 is 100-10,000 times larger than the adiabatic lower limit due to waste heat flow out of the material, leaving the possibility for energy consumption in monolayer MoTe2-based devices to be orders of magnitude smaller than Ge2Sb2Te5-based devices.

  5. Non Volatile Flash Memory Radiation Tests

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Nguyen, Duc N.; Allen, Greg

    2012-01-01

    Commercial flash memory industry has experienced a fast growth in the recent years, because of their wide spread usage in cell phones, mp3 players and digital cameras. On the other hand, there has been increased interest in the use of high density commercial nonvolatile flash memories in space because of ever increasing data requirements and strict power requirements. Because of flash memories complex structure; they cannot be treated as just simple memories in regards to testing and analysis. It becomes quite challenging to determine how they will respond in radiation environments.

  6. RFID and Memory Devices Fabricated Integrally on Substrates

    NASA Technical Reports Server (NTRS)

    Schramm, Harry F.

    2004-01-01

    Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for

  7. Low-power, high-uniform, and forming-free resistive memory based on Mg-deficient amorphous MgO film with rough surface

    NASA Astrophysics Data System (ADS)

    Guo, Jiajun; Ren, Shuxia; Wu, Liqian; Kang, Xin; Chen, Wei; Zhao, Xu

    2018-03-01

    Saving energy and reducing operation parameter fluctuations remain crucial for enabling resistive random access memory (RRAM) to emerge as a universal memory. In this work, we report a resistive memory device based on an amorphous MgO (a-MgO) film that not only exhibits ultralow programming voltage (just 0.22 V) and low power consumption (less than 176.7 μW) but also shows excellent operative uniformity (the coefficient of variation is only 1.7% and 2.2% for SET and RESET voltage, respectively). Moreover, it also shows a forming-free characteristic. Further analysis indicates that these distinctive properties can be attributed to the unstable local structures and the rough surface of the Mg-deficient a-MgO film. These findings show the potential of using a-MgO in high-performance nonvolatile memory applications.

  8. Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

    NASA Technical Reports Server (NTRS)

    Schwab, Andrew J. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor); Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Moyer, Stephen A. (Inventor); Klenke, Robert (Inventor)

    2000-01-01

    A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

  9. Electrical studies of Ge4Sb1Te5 devices for memory applications

    NASA Astrophysics Data System (ADS)

    Sangeetha, B. G.; Shylashree, N.

    2018-05-01

    In this paper, the Ge4Sb1Te5 thin film device preparation and electrical studies for memory devices were carried out. The device was deposited using vapor-evaporation technique. RESET to SET state switching was shown using current-voltage characterization. The current-voltage characterization shows the switching between SET to RESET state and it was found that it requires a low energy for transition. Switching between amorphous to crystalline nature was studied using resistance-voltage characteristics. The endurance showed the effective use of this composition for memory device.

  10. Realization of the Switching Mechanism in Resistance Random Access Memory™ Devices: Structural and Electronic Properties Affecting Electron Conductivity in a Hafnium Oxide-Electrode System Through First-Principles Calculations

    NASA Astrophysics Data System (ADS)

    Aspera, Susan Meñez; Kasai, Hideaki; Kishi, Hirofumi; Awaya, Nobuyoshi; Ohnishi, Shigeo; Tamai, Yukio

    2013-01-01

    The resistance random access memory (RRAM™) device, with its electrically induced nanoscale resistive switching capacity, has attracted considerable attention as a future nonvolatile memory device. Here, we propose a mechanism of switching based on an oxygen vacancy migration-driven change in the electronic properties of the transition-metal oxide film stimulated by set pulse voltages. We used density functional theory-based calculations to account for the effect of oxygen vacancies and their migration on the electronic properties of HfO2 and Ta/HfO2 systems, thereby providing a complete explanation of the RRAM™ switching mechanism. Furthermore, computational results on the activation energy barrier for oxygen vacancy migration were found to be consistent with the set and reset pulse voltage obtained from experiments. Understanding this mechanism will be beneficial to effectively realizing the materials design in these devices.

  11. Analysis of the Negative-SET Behaviors in Cu/ZrO2/Pt Devices

    NASA Astrophysics Data System (ADS)

    Liu, Sen; Zhao, Xiaolong; Li, Qingjiang; Li, Nan; Wang, Wei; Liu, Qi; Xu, Hui

    2016-12-01

    Metal oxide-based electrochemical metallization memory (ECM) shows promising performance for next generation non-volatile memory. The negative-SET behavior has been observed in various oxide-based ECM devices. But the underlying mechanism of this behavior remains unaddressed and the role of the metal cation and oxygen vacancy in this behavior is unclear. In this work, we have observed two kinds of negative-SET (labeled as N-SET1 and N-SET2) behaviors in our Cu/ZrO2/Pt devices. Both the two behaviors can result in hard breakdown due to the high compliance current in reset process. The I-V characteristic shows that the two negative-SET behaviors have an obvious difference in operation voltage. Using four-probe resistance measurement method, the resistance-temperature characteristics of the ON-state after various negative-SET behaviors have been studied. The temperature dependence results demonstrate that the N-SET1 behavior is dominated by Cu conductive filament (CF) reformation caused by the Cu CF overgrowth phenomenon while the N-SET2 is related to the formation of oxygen vacancy CF. This work may provide a comprehensive understanding of the switching mechanism in oxide-based ECM devices.

  12. 76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-11-29

    ... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...

  13. Voltage switching of a VO{sub 2} memory metasurface using ionic gel

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Goldflam, M. D.; Liu, M. K.; Chapler, B. C.

    2014-07-28

    We demonstrate an electrolyte-based voltage tunable vanadium dioxide (VO{sub 2}) memory metasurface. Large spatial scale, low voltage, non-volatile switching of terahertz (THz) metasurface resonances is achieved through voltage application using an ionic gel to drive the insulator-to-metal transition in an underlying VO{sub 2} layer. Positive and negative voltage application can selectively tune the metasurface resonance into the “off” or “on” state by pushing the VO{sub 2} into a more conductive or insulating regime respectively. Compared to graphene based control devices, the relatively long saturation time of resonance modification in VO{sub 2} based devices suggests that this voltage-induced switching originates primarilymore » from electrochemical effects related to oxygen migration across the electrolyte–VO{sub 2} interface.« less

  14. Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

    NASA Astrophysics Data System (ADS)

    Tripathi, Udbhav; Kaur, Ramneek

    2016-05-01

    Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

  15. Identification of nonvolatile compounds in clove (Syzygium aromaticum) from Manado

    NASA Astrophysics Data System (ADS)

    Fathoni, A.; Saepudin, E.; Cahyana, A. H.; Rahayu, D. U. C.; Haib, J.

    2017-07-01

    Syzygium aromaticum (clove) are native to Indonesia and have been widely used in food industry due to their flavor. Nonvolatile compounds contribute to flavor, mainly in their taste. Currently, there is very little information available about nonvolatile compounds in clove. Identification of nonvolatile compounds is important to improve clove's value. Compound extraction was conducted by maceration in ethanol. Fractionations of the extract were performed by using gravity column chromatography on silica gel and Sephadex LH-20 as stationary phase. Nonvolatile compounds were identified by Liquid Chromatography-Tandem Mass Spectrometry (LC-MS/MS). LC-MS/MS was operated in negative mode with 0.1 % formic acid in water and acetonitrile as mobile phase. Nonvolatile compounds were identified by fragment analysis and compared to references. Several compounds had been identified and characterized asquinic acid, monogalloylglucose, gallic acid, digalloylglucose, isobiflorin, biflorin, ellagic acid, hydroxygallic acid, luteolin, quercetin, naringenin, kaempferol, isorhamnetin, dimethoxyluteolin, and rhamnetin. These compounds had two main flavor perceptions, i.e. astringent, and bitter.

  16. Device applications and structural and optical properties of Indigo - A biodegradable, low-cost organic semiconductor

    NASA Astrophysics Data System (ADS)

    Wang, Zhengjun; Pisane, Kelly L.; Sierros, Konstantinos; Seehra, Mohindar S.; Korakakis, Dimitris

    2015-03-01

    Currently, memory devices based on organic materials are attracting great attention due to their simplicity in device structure, mechanical flexibility, potential for scalability, low-cost potential, low-power operation, and large capacity for data storage. In a recent paper from our group, Indigo-based nonvolatile organic write-once-read-many-times (WORM) memory device, consisting of a 100nm layer of indigo sandwiched between an indium tin oxide (ITO) cathode and an Al anode, has been reported. This device is found to be at its low resistance state (ON state) and can be switched to high resistance state (OFF state) by applying a positive bias with ON/OFF current ratio of the device being up to 1.02 × e6. A summary of these results along with the structural and optical properties of indigo powder will be reported. Analysis of x-ray diffraction shows a monoclinic structure with lattice parameters a(b)[c] = 0.924(0.577)[0.1222]nm and β =117° . Optical absorption shows a band edge at 1.70 eV with peak of absorption occurring at 1.90 eV. These results will be interpreted in terms of the HOMO-LUMO bands of Indigo.

  17. Multifunctional BiFeO{sub 3}/TiO{sub 2} nano-heterostructure: Photo-ferroelectricity, rectifying transport, and nonvolatile resistive switching property

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Sarkar, Ayan; Khan, Gobinda Gopal, E-mail: gobinda.gk@gmail.com; Chaudhuri, Arka

    Multifunctional BiFeO{sub 3} nanostructure anchored TiO{sub 2} nanotubes are fabricated by coupling wet chemical and electrochemical routes. BiFeO{sub 3}/TiO{sub 2} nano-heterostructure exhibits white-light-induced ferroelectricity at room temperature. Studies reveal that the photogenerated electrons trapped at the domain/grain boundaries tune the ferroelectric polarization in BiFeO{sub 3} nanostructures. The photon controlled saturation and remnant polarization opens up the possibility to design ferroelectric devices based on BiFeO{sub 3.} The nano-heterostructure also exhibits substantial photovoltaic effect and rectifying characteristics. Photovoltaic property is found to be correlated with the ferroelectric polarization. Furthermore, the nonvolatile resistive switching in BiFeO{sub 3}/TiO{sub 2} nano-heterostructure has been studied, whichmore » demonstrates that the observed resistive switching is most likely caused by the electric-field-induced carrier injection/migration and trapping/detrapping process at the hetero-interfaces. Therefore, BiFeO{sub 3}/TiO{sub 2} nano-heterostructure coupled with logic, photovoltaics and memory characteristics holds promises for long-term technological applications in nanoelectronics devices.« less

  18. Application of graphene oxide-poly (vinyl alcohol) polymer nanocomposite for memory devices

    NASA Astrophysics Data System (ADS)

    Kaushal, Jyoti; Kaur, Ravneet; Sharma, Jadab; Tripathi, S. K.

    2018-05-01

    Significant attention has been gained by polymer nanocomposites because of their possible demands in future electronic memory devices. In the present work, device based on Graphene Oxide (GO) and polyvinyl alcohol (PVA) has been made and examined for the memory device application. The prepared Graphene oxide (GO) and GO-PVA nanocomposite (NC) has been characterized by X-ray Diffraction (XRD). GO nanosheets show the diffraction peak at 2θ = 11.60° and the interlayer spacing of 0.761 nm. The XRD of GO-PVA NC shows the diffraction peak at 2θ =18.56°. The fabricated device shows bipolar switching behavior having ON/OFF current ratio ˜102. The Write-Read-Erase-Read (WRER) cycles test shows that the Al/GO-PVA/Ag device has good stability and repeatability.

  19. Overcoming thermal noise in non-volatile spin wave logic.

    PubMed

    Dutta, Sourav; Nikonov, Dmitri E; Manipatruni, Sasikanth; Young, Ian A; Naeemi, Azad

    2017-05-15

    Spin waves are propagating disturbances in magnetically ordered materials, analogous to lattice waves in solid systems and are often described from a quasiparticle point of view as magnons. The attractive advantages of Joule-heat-free transmission of information, utilization of the phase of the wave as an additional degree of freedom and lower footprint area compared to conventional charge-based devices have made spin waves or magnon spintronics a promising candidate for beyond-CMOS wave-based computation. However, any practical realization of an all-magnon based computing system must undergo the essential steps of a careful selection of materials and demonstrate robustness with respect to thermal noise or variability. Here, we aim at identifying suitable materials and theoretically demonstrate the possibility of achieving error-free clocked non-volatile spin wave logic device, even in the presence of thermal noise and clock jitter or clock skew.

  20. Magnetic vortex racetrack memory

    NASA Astrophysics Data System (ADS)

    Geng, Liwei D.; Jin, Yongmei M.

    2017-02-01

    We report a new type of racetrack memory based on current-controlled movement of magnetic vortices in magnetic nanowires with rectangular cross-section and weak perpendicular anisotropy. Data are stored through the core polarity of vortices and each vortex carries a data bit. Besides high density, non-volatility, fast data access, and low power as offered by domain wall racetrack memory, magnetic vortex racetrack memory has additional advantages of no need for constrictions to define data bits, changeable information density, adjustable current magnitude for data propagation, and versatile means of ultrafast vortex core switching. By using micromagnetic simulations, current-controlled motion of magnetic vortices in cobalt nanowire is demonstrated for racetrack memory applications.

  1. Spatial nonuniformity in resistive-switching memory effects of NiO.

    PubMed

    Oka, Keisuke; Yanagida, Takeshi; Nagashima, Kazuki; Kanai, Masaki; Kawai, Tomoji; Kim, Jin-Soo; Park, Bae Ho

    2011-08-17

    Electrically driven resistance change phenomenon in metal/NiO/metal junctions, so-called resistive switching (RS), is a candidate for next-generation universal nonvolatile memories. However, the knowledge as to RS mechanisms is unfortunately far from comprehensive, especially the spatial switching location, which is crucial information to design reliable devices. In this communication, we demonstrate the identification of the spatial switching location of bipolar RS by introducing asymmetrically passivated planar NiO nanowire junctions. We have successfully identified that the bipolar RS in NiO occurs near the cathode rather than the anode. This trend can be interpreted in terms of an electrochemical redox model based on ion migration and p-type conduction.

  2. Variable-Resistivity Material For Memory Circuits

    NASA Technical Reports Server (NTRS)

    Nagasubramanian, Ganesan; Distefano, Salvador; Moacanin, Jovan

    1989-01-01

    Nonvolatile memory elements packed densely. Electrically-erasable, programmable, read-only memory matrices made with newly-synthesized organic material of variable electrical resistivity. Material, polypyrrole doped with tetracyanoquinhydrone (TCNQ), changes reversibly between insulating or higher-resistivity state and conducting or low-resistivity state. Thin film of conductive polymer separates layer of row conductors from layer of column conductors. Resistivity of film at each intersection and, therefore, resistance of memory element defined by row and column, increased or decreased by application of suitable switching voltage. Matrix circuits made with this material useful for experiments in associative electronic memories based on models of neural networks.

  3. Reconfigurable Electronics and Non-Volatile Memory Research

    DTIC Science & Technology

    2015-11-10

    Kirtland AFB, NM 87117-5776 2 cys Official Record Copy AFRL /RVSE/Arthur Edwards 1 cy... AFRL -RV-PS- AFRL -RV-PS- TR-2015-0151 TR-2015-0151 RECONFIGURABLE ELECTRONICS AND NON- VOLATILE MEMORY RESEARCH Kristy A. Campbell Boise State... KIRTLAND AIR FORCE BASE, NM 87117-5776 NOTICE AND SIGNATURE PAGE Using Government drawings, specifications, or other data included in this document for

  4. Design and Verification of a Shape Memory Polymer Peripheral Occlusion Device

    PubMed Central

    Landsman, Todd L.; Bush, Ruth L.; Glowczwski, Alan; Horn, John; Jessen, Staci L.; Ungchusri, Ethan; Diguette, Katelin; Smith, Harrison R.; Hasan, Sayyeda M.; Nash, Daniel; Clubb, Fred J.; Maitland, Duncan J.

    2017-01-01

    Shape memory polymer foams have been previously investigated for their safety and efficacy in treating a porcine aneurysm model. Their biocompatibility, rapid thrombus formation, and ability for endovascular catheter-based delivery to a variety of vascular beds makes these foams ideal candidates for use in numerous embolic applications, particularly within the peripheral vasculature. This study sought to investigate the material properties, safety, and efficacy of a shape memory polymer peripheral embolization device in vitro. The material characteristics of the device were analyzed to show tunability of the glass transition temperature (Tg) and the expansion rate of the polymer to ensure adequate time to deliver the device through a catheter prior to excessive foam expansion. Mechanical analysis and flow migration studies were performed to ensure minimal risk of vessel perforation and undesired thromboembolism upon device deployment. The efficacy of the device was verified by performing blood flow studies that established affinity for thrombus formation and blood penetration throughout the foam and by delivery of the device in an ultrasound phantom that demonstrated flow stagnation and diversion of flow to collateral pathways. PMID:27419615

  5. Origin of negative resistance in anion migration controlled resistive memory

    NASA Astrophysics Data System (ADS)

    Banerjee, Writam; Wu, Facai; Hu, Yuan; Wu, Quantan; Wu, Zuheng; Liu, Qi; Liu, Ming

    2018-03-01

    Resistive random access memory (RRAM) is one of the most promising emerging nonvolatile technologies for the futuristic memory devices. Resistive switching behavior often shows negative resistance (NR), either voltage controlled or current controlled. In this work, the origin of a current compliance dependent voltage controlled NR effect during the resetting of anion migration based RRAM devices is discussed. The N-type voltage controlled NR is a high field driven phenomena. The current conduction within the range of a certain negative voltage is mostly dominated by space charge limited current. But with the higher negative voltage, a field induced tunneling effect is generated in the NR region. The voltage controlled NR is strongly dependent on the compliance current. The area independent behavior indicates the filamentary switching. The peak to valley ratio (PVR) is > 5. The variation of PVR as a function of the conduction band offset is achieved. Compared to other reported works, based on the PVR, it is possible to distinguish the RRAM types. Generally, due to the higher electric field effect on the metallic bridge during RESET, the electrochemical metallization type RRAM shows much higher PVR than the valance change type RRAM.

  6. Hierarchically Self-Assembled Block Copolymer Blends for Templating Hollow Phase-Change Nanostructures with an Extremely Low Switching Current

    DOE PAGES

    Park, Woon Ik; Kim, Jong Min; Jeong, Jae Won; ...

    2015-03-17

    Phase change memory (PCM) is one of the most promising candidates for next-generation nonvolatile memory devices because of its high speed, excellent reliability, and outstanding scalability. But, the high switching current of PCM devices has been a critical hurdle to realize low-power operation. Although one solution is to reduce the switching volume of the memory, the resolution limit of photolithography hinders further miniaturization of device dimensions. Here, we employed unconventional self-assembly geometries obtained from blends of block copolymers (BCPs) to form ring-shaped hollow PCM nanostructures with an ultrasmall contact area between a phase-change material (Ge 2Sb 2Te 5) and amore » heater (TiN) electrode. The high-density (approximately 0.1 terabits per square inch) PCM nanoring arrays showed extremely small switching current of 2-3 mu A. Furthermore, the relatively small reset current of the ring-shaped PCM compared to the pillar-shaped devices is attributed to smaller switching volume, which is well supported by electro-thermal simulation results. Our approach may also be extended to other nonvolatile memory device applications such as resistive switching memory and magnetic storage devices, where the control of nanoscale geometry can significantly affect device performances.« less

  7. Novel nano materials for high performance logic and memory devices

    NASA Astrophysics Data System (ADS)

    Das, Saptarshi

    After decades of relentless progress, the silicon CMOS industry is approaching a stall in device performance for both logic and memory devices due to fundamental scaling limitations. In order to reinforce the accelerating pace, novel materials with unique properties are being proposed on an urgent basis. This list includes one dimensional nanotubes, quasi one dimensional nanowires, two dimensional atomistically thin layered materials like graphene, hexagonal boron nitride and the more recently the rich family of transition metal di-chalcogenides comprising of MoS2, WSe2, WS2 and many more for logic applications and organic and inorganic ferroelectrics, phase change materials and magnetic materials for memory applications. Only time will tell who will win, but exploring these novel materials allow us to revisit the fundamentals and strengthen our understanding which will ultimately be beneficial for high performance device design. While there has been growing interest in two-dimensional (2D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancies due to the lack of a complete picture of their performance potential. The fact that the 2-D layered semiconducting di-chalcogenides need to be connected to the "outside" world in order to capitalize on their ultimate potential immediately emphasizes the importance of a thorough understanding of the contacts. This thesis demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS2 layers the excellent intrinsic properties of this 2D material can be harvested. A comprehensive experimental study on the dependence of carrier mobility on the layer thickness of back gated multilayer MoS 2 field effect transistors is also provided. A resistor network model that comprises of Thomas-Fermi charge screening and interlayer coupling is used to explain the non-monotonic trend in the extracted field effect

  8. Comparison of resistive switching characteristics using copper and aluminum electrodes on GeOx/W cross-point memories

    PubMed Central

    2013-01-01

    Comparison of resistive switching memory characteristics using copper (Cu) and aluminum (Al) electrodes on GeOx/W cross-points has been reported under low current compliances (CCs) of 1 nA to 50 μA. The cross-point memory devices are observed by high-resolution transmission electron microscopy (HRTEM). Improved memory characteristics are observed for the Cu/GeOx/W structures as compared to the Al/GeOx/W cross-points owing to AlOx formation at the Al/GeOx interface. The RESET current increases with the increase of the CCs varying from 1 nA to 50 μA for the Cu electrode devices, while the RESET current is high (>1 mA) and independent of CCs varying from 1 nA to 500 μA for the Al electrode devices. An extra formation voltage is needed for the Al/GeOx/W devices, while a low operation voltage of ±2 V is needed for the Cu/GeOx/W cross-point devices. Repeatable bipolar resistive switching characteristics of the Cu/GeOx/W cross-point memory devices are observed with CC varying from 1 nA to 50 μA, and unipolar resistive switching is observed with CC >100 μA. High resistance ratios of 102 to 104 for the bipolar mode (CCs of 1 nA to 50 μA) and approximately 108 for the unipolar mode are obtained for the Cu/GeOx/W cross-points. In addition, repeatable switching cycles and data retention of 103 s are observed under a low current of 1 nA for future low-power, high-density, nonvolatile, nanoscale memory applications. PMID:24305116

  9. Influence of metal electrode on the performance of ZnO based resistance switching memories

    NASA Astrophysics Data System (ADS)

    Wang, Xueting; Qian, Haolei; Guan, Liao; Wang, Wei; Xing, Boran; Yan, Xiaoyuan; Zhang, Shucheng; Sha, Jian; Wang, Yewu

    2017-10-01

    Resistance random access memory (RRAM) is considered a promising candidate for the next generation of non-volatile memory. In this work, we fabricate metal (Ag, Ti, or Pt)/ZnO/Pt RRAM cells and then systematically investigate the effects of different top electrodes and their performance. With the formation and rupture of Ag-bridge and the shapeless oxygen vacancy filaments under a series of positive and negative bias, the set and reset processes have been successfully conducted in the Ag/ZnO/Pt device with very low work voltage, high on-off ratio, and good endurance. When applying the voltage bias to the Ti/ZnO/Pt device, the interfacial oxygen ions' migration causes the redox reaction of the conducting filament's oxygen vacancies, leading to the formation and rupture of the conducting filaments but in a relatively poor endurance. At the same time, for the Pt/ZnO/Pt device, once the filaments in the functional layer consisting of oxygen vacancies are formed, it is difficult to disrupt, resulting in the permanent low resistance state after a forming-like process. The results demonstrated that the devices with a metallic conductive bridge mechanism show much better switching behaviors than those with an oxygen ion/vacancy filament mechanism.

  10. Phase-change memory function of correlated electrons in organic conductors

    NASA Astrophysics Data System (ADS)

    Oike, H.; Kagawa, F.; Ogawa, N.; Ueda, A.; Mori, H.; Kawasaki, M.; Tokura, Y.

    2015-01-01

    Phase-change memory (PCM), a promising candidate for next-generation nonvolatile memories, exploits quenched glassy and thermodynamically stable crystalline states as reversibly switchable state variables. We demonstrate PCM functions emerging from a charge-configuration degree of freedom in strongly correlated electron systems. Nonvolatile reversible switching between a high-resistivity charge-crystalline (or charge-ordered) state and a low-resistivity quenched state, charge glass, is achieved experimentally via heat pulses supplied by optical or electrical means in organic conductors θ -(BEDT-TTF)2X . Switching that is one order of magnitude faster is observed in another isostructural material that requires faster cooling to kinetically avoid charge crystallization, indicating that the material's critical cooling rate can be useful guidelines for pursuing a faster correlated-electron PCM function.

  11. Development of Curie point switching for thin film, random access, memory device

    NASA Technical Reports Server (NTRS)

    Lewicki, G. W.; Tchernev, D. I.

    1967-01-01

    Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.

  12. First-principles thermodynamics and defect kinetics guidelines for engineering a tailored RRAM device

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Clima, Sergiu, E-mail: clima@imec.be; Chen, Yang Yin; Goux, Ludovic

    Resistive Random Access Memories are among the most promising candidates for the next generation of non-volatile memory. Transition metal oxides such as HfOx and TaOx attracted a lot of attention due to their CMOS compatibility. Furthermore, these materials do not require the inclusion of extrinsic conducting defects since their operation is based on intrinsic ones (oxygen vacancies). Using Density Functional Theory, we evaluated the thermodynamics of the defects formation and the kinetics of diffusion of the conducting species active in transition metal oxide RRAM materials. The gained insights based on the thermodynamics in the Top Electrode, Insulating Matrix and Bottommore » Electrode and at the interfaces are used to design a proper defect reservoir, which is needed for a low-energy reliable switching device. The defect reservoir has also a direct impact on the retention of the Low Resistance State due to the resulting thermodynamic driving forces. The kinetics of the diffusing conducting defects in the Insulating Matrix determine the switching dynamics and resistance retention. The interface at the Bottom Electrode has a significant impact on the low-current operation and long endurance of the memory cell. Our first-principles findings are confirmed by experimental measurements on fabricated RRAM devices.« less

  13. Comparisons of switching characteristics between Ti/Al2O3/Pt and TiN/Al2O3/Pt RRAM devices with various compliance currents

    NASA Astrophysics Data System (ADS)

    Qi, Yanfei; Zhao, Ce Zhou; Liu, Chenguang; Fang, Yuxiao; He, Jiahuan; Luo, Tian; Yang, Li; Zhao, Chun

    2018-04-01

    In this study, the influence of the Ti and TiN top electrodes on the switching behaviors of the Al2O3/Pt resistive random access memory devices with various compliance currents (CCs, 1-15 mA) has been compared. Based on the similar statistical results of the resistive switching (RS) parameters such as V set/V reset, R HRS/R LRS (measured at 0.10 V) and resistance ratio with various CCs for both devices, the Ti/Al2O3/Pt device differs from the TiN/Al2O3/Pt device mainly in the forming process rather than in the following switching cycles. Apart from the initial isolated state, the Ti/Al2O3/Pt device has the initial intermediate state as well. In addition, its forming voltage is relatively lower. The conduction mechanisms of the ON and OFF state for both devices are demonstrated as ohmic conduction and Frenkel-Poole emission, respectively. Therefore, with the combined modulations of the CCs and the stop voltages, the TiN/Al2O3/Pt device is more stable for nonvolatile memory applications to further improve the RS performance.

  14. Exploration of perpendicular magnetic anisotropy material system for application in spin transfer torque - Random access memory

    NASA Astrophysics Data System (ADS)

    Natarajarathinam, Anusha

    Perpendicular magnetic anisotropy (PMA) materials have unique advantages when used in magnetic tunnel junctions (MTJ) which are the most critical part of spin-torque transfer random access memory devices (STT-RAMs) that are being researched intensively as future non-volatile memory technology. They have high magnetoresistance which improves their sensitivity. The STT-RAM has several advantages over competing technologies, for instance, low power consumption, non-volatility, ultra-fast read and write speed and high endurance. In personal computers, it can replace SRAM for high-speed applications, Flash for non-volatility, and PSRAM and DRAM for high-speed program execution. The main aim of this research is to identify and optimize the best perpendicular magnetic anisotropy (PMA) material system for application to STT-RAM technology. Preliminary search for perpendicular magnetic anisotropy (PMA) materials for pinned layer for MTJs started with the exploration and optimization of crystalline alloys such as Co50Pd50 alloy, Mn50Al50 and amorphous alloys such as Tb21Fe72Co7 and are first presented in this work. Further optimization includes the study of Co/[Pd/Pt]x multilayers (ML), and the development of perpendicular synthetic antiferromagnets (SAF) utilizing these multilayers. Focused work on capping and seed layers to evaluate interfacial perpendicular anisotropy in free layers for pMTJs is then discussed. Optimization of the full perpendicular magnetic tunnel junction (pMTJ) includes the CoFeB/MgO/CoFeB trilayer coupled to a pinned/pinning layer with perpendicular Co/[Pd/Pt]x SAF and a thin Ta seeded CoFeB free layer. Magnetometry, simulations, annealing studies, transport measurements and TEM analysis on these samples will then be presented.

  15. All-spin logic operations: Memory device and reconfigurable computing

    NASA Astrophysics Data System (ADS)

    Patra, Moumita; Maiti, Santanu K.

    2018-02-01

    Exploiting spin degree of freedom of electron a new proposal is given to characterize spin-based logical operations using a quantum interferometer that can be utilized as a programmable spin logic device (PSLD). The ON and OFF states of both inputs and outputs are described by spin state only, circumventing spin-to-charge conversion at every stage as often used in conventional devices with the inclusion of extra hardware that can eventually diminish the efficiency. All possible logic functions can be engineered from a single device without redesigning the circuit which certainly offers the opportunities of designing new generation spintronic devices. Moreover, we also discuss the utilization of the present model as a memory device and suitable computing operations with proposed experimental setups.

  16. A learnable parallel processing architecture towards unity of memory and computing

    NASA Astrophysics Data System (ADS)

    Li, H.; Gao, B.; Chen, Z.; Zhao, Y.; Huang, P.; Ye, H.; Liu, L.; Liu, X.; Kang, J.

    2015-08-01

    Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named “iMemComp”, where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped “iMemComp” with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on “iMemComp” can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.

  17. A learnable parallel processing architecture towards unity of memory and computing.

    PubMed

    Li, H; Gao, B; Chen, Z; Zhao, Y; Huang, P; Ye, H; Liu, L; Liu, X; Kang, J

    2015-08-14

    Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named "iMemComp", where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped "iMemComp" with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on "iMemComp" can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.

  18. Design and verification of a shape memory polymer peripheral occlusion device.

    PubMed

    Landsman, Todd L; Bush, Ruth L; Glowczwski, Alan; Horn, John; Jessen, Staci L; Ungchusri, Ethan; Diguette, Katelin; Smith, Harrison R; Hasan, Sayyeda M; Nash, Daniel; Clubb, Fred J; Maitland, Duncan J

    2016-10-01

    Shape memory polymer foams have been previously investigated for their safety and efficacy in treating a porcine aneurysm model. Their biocompatibility, rapid thrombus formation, and ability for endovascular catheter-based delivery to a variety of vascular beds makes these foams ideal candidates for use in numerous embolic applications, particularly within the peripheral vasculature. This study sought to investigate the material properties, safety, and efficacy of a shape memory polymer peripheral embolization device in vitro. The material characteristics of the device were analyzed to show tunability of the glass transition temperature (Tg) and the expansion rate of the polymer to ensure adequate time to deliver the device through a catheter prior to excessive foam expansion. Mechanical analysis and flow migration studies were performed to ensure minimal risk of vessel perforation and undesired thromboembolism upon device deployment. The efficacy of the device was verified by performing blood flow studies that established affinity for thrombus formation and blood penetration throughout the foam and by delivery of the device in an ultrasound phantom that demonstrated flow stagnation and diversion of flow to collateral pathways. Copyright © 2016 Elsevier Ltd. All rights reserved.

  19. Flash Memory Reliability: Read, Program, and Erase Latency Versus Endurance Cycling

    NASA Technical Reports Server (NTRS)

    Heidecker, Jason

    2010-01-01

    This report documents the efforts and results of the fiscal year (FY) 2010 NASA Electronic Parts and Packaging Program (NEPP) task for nonvolatile memory (NVM) reliability. This year's focus was to measure latency (read, program, and erase) of NAND Flash memories and determine how these parameters drift with erase/program/read endurance cycling.

  20. Spin torque switching of 20 nm magnetic tunnel junctions with perpendicular anisotropy

    NASA Astrophysics Data System (ADS)

    Gajek, M.; Nowak, J. J.; Sun, J. Z.; Trouilloud, P. L.; O'Sullivan, E. J.; Abraham, D. W.; Gaidis, M. C.; Hu, G.; Brown, S.; Zhu, Y.; Robertazzi, R. P.; Gallagher, W. J.; Worledge, D. C.

    2012-03-01

    Spin-transfer torque magnetic random access memory (STT-MRAM) is one of the most promising emerging non-volatile memory technologies. MRAM has so far been demonstrated with a unique combination of density, speed, and non-volatility in a single chip, however, without the capability to replace any single mainstream memory. In this paper, we demonstrate the basic physics of spin torque switching in 20 nm diameter magnetic tunnel junctions with perpendicular magnetic anisotropy materials. This deep scaling capability clearly indicates the STT MRAM device itself may be suitable for integration at much higher densities than previously proven.

  1. Organic memory capacitor device fabricated with Ag nanoparticles.

    PubMed

    Kim, Yo-Han; Jung, Sung Mok; Hu, Quanli; Kim, Yong-Sang; Yoon, Tae-Sik; Lee, Hyun Ho

    2011-07-01

    In this study, it is demonstrated that an organic memory structure using pentacene and citrate-stabilized silver nanoparticles (Ag NPs) as charge storage elements on dielectric SiO2 layer and silicon substrate. The Ag NPs were synthesized by thermal reduction method of silver trifluoroacetate with oleic acid. The synthesized Ag NPs were analyzed with high resolution transmission electron microscopy (HRTEM) and selected area electron diffraction (SAED) for their crystalline structure. The capacitance versus voltage (C-V) curves obtained for the Ag NPs embedded capacitor exhibited flat-band voltage shifts, which demonstrated the presence of charge storages. The citrate-capping of the Ag NPs was confirmed by ultraviolet-visible (UV-VIS) and Fourier transformed infrared (FTIR) spectroscopy. With voltage sweeping of +/-7 V, a hysteresis loop having flatband voltage shift of 7.1 V was obtained. The hysteresis loop showed a counter-clockwise direction. In addition, electrical performance test for charge storage showed more than 10,000 second charge retention time. The device with Ag NPs can be applied to an organic memory device for flexible electronics.

  2. Towards Terabit Memories

    NASA Astrophysics Data System (ADS)

    Hoefflinger, Bernd

    Memories have been the major yardstick for the continuing validity of Moore's law. In single-transistor-per-Bit dynamic random-access memories (DRAM), the number of bits per chip pretty much gives us the number of transistors. For decades, DRAM's have offered the largest storage capacity per chip. However, DRAM does not scale any longer, both in density and voltage, severely limiting its power efficiency to 10 fJ/b. A differential DRAM would gain four-times in density and eight-times in energy. Static CMOS RAM (SRAM) with its six transistors/cell is gaining in reputation because it scales well in cell size and operating voltage so that its fundamental advantage of speed, non-destructive read-out and low-power standby could lead to just 2.5 electrons/bit in standby and to a dynamic power efficiency of 2aJ/b. With a projected 2020 density of 16 Gb/cm², the SRAM would be as dense as normal DRAM and vastly better in power efficiency, which would mean a major change in the architecture and market scenario for DRAM versus SRAM. Non-volatile Flash memory have seen two quantum jumps in density well beyond the roadmap: Multi-Bit storage per transistor and high-density TSV (through-silicon via) technology. The number of electrons required per Bit on the storage gate has been reduced since their first realization in 1996 by more than an order of magnitude to 400 electrons/Bit in 2010 for a complexity of 32Gbit per chip at the 32 nm node. Chip stacking of eight chips with TSV has produced a 32GByte solid-state drive (SSD). A stack of 32 chips with 2 b/cell at the 16 nm node will reach a density of 2.5 Terabit/cm². Non-volatile memory with a density of 10 × 10 nm²/Bit is the target for widespread development. Phase-change memory (PCM) and resistive memory (RRAM) lead in cell density, and they will reach 20 Gb/cm² in 2D and higher with 3D chip stacking. This is still almost an order-of-magnitude less than Flash. However, their read-out speed is ~10-times faster, with as yet

  3. Camera memory study for large space telescope. [charge coupled devices

    NASA Technical Reports Server (NTRS)

    Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.

    1975-01-01

    Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

  4. Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Sims, W. Herb; Varnavas, Kosta A.; Ho, Fat D.

    2011-01-01

    NASA is planning on going beyond Low Earth orbit with manned exploration missions. The radiation environment for most Low Earth orbit missions is harsher than at the Earth's surface but much less harsh than deep space. Development of new electronics is needed to meet the requirements of high performance, radiation tolerance, and reliability. The need for both Volatile and Non-volatile memory has been identified. Emerging Non-volatile memory technologies (FRAM, C-RAM,M-RAM, R-RAM, Radiation Tolerant FLASH, SONOS, etc.) need to be investigated for use in Space missions. An opportunity arose to fly a small memory experiment on a high inclination satellite (FASTSAT). An off-the-shelf 512K Ramtron FRAM was chosen to be tested in the experiment.

  5. Improvement of multi-level resistive switching characteristics in solution-processed AlO x -based non-volatile resistive memory using microwave irradiation

    NASA Astrophysics Data System (ADS)

    Kim, Seung-Tae; Cho, Won-Ju

    2018-01-01

    We fabricated a resistive random access memory (ReRAM) device on a Ti/AlO x /Pt structure with solution-processed AlO x switching layer using microwave irradiation (MWI), and demonstrated multi-level cell (MLC) operation. To investigate the effect of MWI power on the MLC characteristics, post-deposition annealing was performed at 600-3000 W after AlO x switching layer deposition, and the MLC operation was compared with as-deposited (as-dep) and conventional thermally annealing (CTA) treated devices. All solution-processed AlO x -based ReRAM devices exhibited bipolar resistive switching (BRS) behavior. We found that these devices have four-resistance states (2 bits) of MLC operation according to the modulation of the high-resistance state (HRSs) through reset voltage control. Particularly, compared to the as-dep and CTA ReRAM devices, the MWI-treated ReRAM devices showed a significant increase in the memory window and stable endurance for multi-level operation. Moreover, as the MWI power increased, excellent MLC characteristics were exhibited because the resistance ratio between each resistance state was increased. In addition, it exhibited reliable retention characteristics without deterioration at 25 °C and 85 °C for 10 000 s. Finally, the relationship between the chemical characteristics of the solution-processed AlO x switching layer and BRS-based multi-level operation according to the annealing method and MWI power was investigated using x-ray photoelectron spectroscopy.

  6. Flexible ferroelectric element based on van der Waals heteroepitaxy.

    PubMed

    Jiang, Jie; Bitla, Yugandhar; Huang, Chun-Wei; Do, Thi Hien; Liu, Heng-Jui; Hsieh, Ying-Hui; Ma, Chun-Hao; Jang, Chi-Yuan; Lai, Yu-Hong; Chiu, Po-Wen; Wu, Wen-Wei; Chen, Yi-Chun; Zhou, Yi-Chun; Chu, Ying-Hao

    2017-06-01

    We present a promising technology for nonvolatile flexible electronic devices: A direct fabrication of epitaxial lead zirconium titanate (PZT) on flexible mica substrate via van der Waals epitaxy. These single-crystalline flexible ferroelectric PZT films not only retain their performance, reliability, and thermal stability comparable to those on rigid counterparts in tests of nonvolatile memory elements but also exhibit remarkable mechanical properties with robust operation in bent states (bending radii down to 2.5 mm) and cycling tests (1000 times). This study marks the technological advancement toward realizing much-awaited flexible yet single-crystalline nonvolatile electronic devices for the design and development of flexible, lightweight, and next-generation smart devices with potential applications in electronics, robotics, automotive, health care, industrial, and military systems.

  7. Flexible ferroelectric element based on van der Waals heteroepitaxy

    PubMed Central

    Jiang, Jie; Bitla, Yugandhar; Huang, Chun-Wei; Do, Thi Hien; Liu, Heng-Jui; Hsieh, Ying-Hui; Ma, Chun-Hao; Jang, Chi-Yuan; Lai, Yu-Hong; Chiu, Po-Wen; Wu, Wen-Wei; Chen, Yi-Chun; Zhou, Yi-Chun; Chu, Ying-Hao

    2017-01-01

    We present a promising technology for nonvolatile flexible electronic devices: A direct fabrication of epitaxial lead zirconium titanate (PZT) on flexible mica substrate via van der Waals epitaxy. These single-crystalline flexible ferroelectric PZT films not only retain their performance, reliability, and thermal stability comparable to those on rigid counterparts in tests of nonvolatile memory elements but also exhibit remarkable mechanical properties with robust operation in bent states (bending radii down to 2.5 mm) and cycling tests (1000 times). This study marks the technological advancement toward realizing much-awaited flexible yet single-crystalline nonvolatile electronic devices for the design and development of flexible, lightweight, and next-generation smart devices with potential applications in electronics, robotics, automotive, health care, industrial, and military systems. PMID:28630922

  8. Effect of a PEDOT:PSS modified layer on the electrical characteristics of flexible memristive devices based on graphene oxide:polyvinylpyrrolidone nanocomposites

    NASA Astrophysics Data System (ADS)

    Kim, Woo Kyum; Wu, Chaoxing; Kim, Tae Whan

    2018-06-01

    The electrical characteristics of flexible memristive devices utilizing a graphene oxide (GO):polyvinylpyrrolidone (PVP) nanocomposite charge-trapping layer with a poly(3,4-ethylenedioxythiophene):poly(styrene sulfonate) (PEDOT:PSS)-modified layer fabricated on an indium-tin-oxide (ITO)-coated polyethylene glycol naphthalate (PEN) substrate were investigated. Current-voltage (I-V) curves for the Al/GO:PVP/PEDOT:PSS/ITO/PEN devices showed remarkable hysteresis behaviors before and after bending. The maximum memory margins of the devices before and after 100 bending cycles were approximately 7.69 × 103 and 5.16 × 102, respectively. The devices showed nonvolatile memory effect with a retention time of more than 1 × 104 s. The "Reset" voltages were distributed between 2.3 and 3.5 V, and the "Set" voltages were dispersed between -0.7 and -0.2 V, indicative of excellent, uniform electrical performance. The endurance number of ON/OFF-switching and bending cycles for the devices was 1 × 102, respectively. The bipolar resistive switching behavior was explained on the basis of I-V results. In particular, the bipolar resistive switching behaviors of the LRS and the HRS for the devices are dominated by the Ohmic and space charge current mechanisms, respectively.

  9. Azurin/CdSe-ZnS-Based Bio-Nano Hybrid Structure for Nanoscale Resistive Memory Device.

    PubMed

    Yagati, Ajay Kumar; Lee, Taek; Choi, Jeong-Woo

    2017-07-15

    In the present study, we propose a method for bio-nano hybrid formation by coupling a redox metalloprotein, Azurin, with CdSe-ZnS quantum dot for the development of a nanoscale resistive memory device. The covalent interaction between the two nanomaterials enables a strong and effective binding to form an azurin/CdSe-ZnS hybrid, and also enabled better controllability to couple with electrodes to examine the memory function properties. Morphological and optical properties were performed to confirm both hybrid formations and also their individual components. Current-Voltage (I-V) measurements on the hybrid nanostructures exhibited bistable current levels towards the memory function device, that and those characteristics were unnoticeable on individual nanomaterials. The hybrids showed good retention characteristics with high stability and durability, which is a promising feature for future nanoscale memory devices.

  10. Radiation Issues and Applications of Floating Gate Memories

    NASA Technical Reports Server (NTRS)

    Scheick, L. Z.; Nguyen, D. N.

    2000-01-01

    The radiation effects that affect various systems that comprise floating gate memories are presented. The wear-out degradation results of unirradiated flash memories are compared to irradiated flash memories. The procedure analyzes the failure to write and erase caused by wear-out and degradation of internal charge pump circuits. A method is described for characterizing the radiation effects of the floating gate itself. The rate dependence, stopping power dependence, SEU susceptibility and applications of floating gate in radiation environment are presented. The ramifications for dosimetry and cell failure are discussed as well as for the long term use aspects of non-volatile memories.

  11. Organic electronic devices via interface engineering

    NASA Astrophysics Data System (ADS)

    Xu, Qianfei

    This dissertation focuses on interface engineering and its influence on organic electronic devices. A comprehensive review of interface studies in organic electronic devices is presented in Chapter 1. By interface engineering at the cathode contact, an ultra-high efficiency green polymer light emitting diode is demonstrated in Chapter 2. The interface modification turns out to be solution processable by using calcium acetylacetonate, donated by Ca(acac)2. The device structure is Induim Tin Oxide (ITO)/3,4-polyethylenedioxythiophene-polystyrene-sulfonate (PEDOT)/Green polyfluorene/Ca(acac) 2/Al. Based on this structure, we obtained device efficiencies as high as 28 cd/A at 2650 cd/m2, which is about a 3 times improvement over previous devices. The mechanism of this nano-layer has been studied by I-L-V measurements, photovoltaic measurements, XPS/UPS studies, impedance measurements as well as transient EL studies. The interfacial layer plays a crucial role for the efficiency improvement. It is believed to work as a hole blocking layer as well as an electron injection layer. Meanwhile, a systematic study on ITO electrodes is also carried out in Chapter 4. By engineering the interface at ITO electrode, the device lifetime has been improved. In Chapter 5, very bright white emission PLEDs are fabricated based on blue polyfluorene (PF) doped with 1 wt% 6, 8, 15, 17-tetraphyenyl-1.18, 4.5, 9.10, 13.14-tetrabenzoheptacene (TBH). The maximum luminance exceeds 20,000 cd/m2. The maximum luminance efficiency is 3.55 cd/A at 4228 cd/m2 while the maximum power efficiency is 1.6 lm/W at 310 cd/m2. The white color is achieved by an incomplete energy transfer from blue PF to TBH. The devices show super stable CIE coordinates as a function of current density. The interface engineering is also applied to memory devices. In Chapter 6, a novel nonvolatile memory device is fabricated by inserting a buffer layer at the anode contact. Devices with the structure of Cu

  12. Realisation of all 16 Boolean logic functions in a single magnetoresistance memory cell.

    PubMed

    Gao, Shuang; Yang, Guang; Cui, Bin; Wang, Shouguo; Zeng, Fei; Song, Cheng; Pan, Feng

    2016-07-07

    Stateful logic circuits based on next-generation nonvolatile memories, such as magnetoresistance random access memory (MRAM), promise to break the long-standing von Neumann bottleneck in state-of-the-art data processing devices. For the successful commercialisation of stateful logic circuits, a critical step is realizing the best use of a single memory cell to perform logic functions. In this work, we propose a method for implementing all 16 Boolean logic functions in a single MRAM cell, namely a magnetoresistance (MR) unit. Based on our experimental results, we conclude that this method is applicable to any MR unit with a double-hump-like hysteresis loop, especially pseudo-spin-valve magnetic tunnel junctions with a high MR ratio. Moreover, after simply reversing the correspondence between voltage signals and output logic values, this method could also be applicable to any MR unit with a double-pit-like hysteresis loop. These results may provide a helpful solution for the final commercialisation of MRAM-based stateful logic circuits in the near future.

  13. Semiconductor diode with external field modulation

    DOEpatents

    Nasby, Robert D.

    2000-01-01

    A non-destructive-readout nonvolatile semiconductor diode switching device that may be used as a memory element is disclosed. The diode switching device is formed with a ferroelectric material disposed above a rectifying junction to control the conduction characteristics therein by means of a remanent polarization. The invention may be used for the formation of integrated circuit memories for the storage of information.

  14. FPGA-based prototype storage system with phase change memory

    NASA Astrophysics Data System (ADS)

    Li, Gezi; Chen, Xiaogang; Chen, Bomy; Li, Shunfen; Zhou, Mi; Han, Wenbing; Song, Zhitang

    2016-10-01

    With the ever-increasing amount of data being stored via social media, mobile telephony base stations, and network devices etc. the database systems face severe bandwidth bottlenecks when moving vast amounts of data from storage to the processing nodes. At the same time, Storage Class Memory (SCM) technologies such as Phase Change Memory (PCM) with unique features like fast read access, high density, non-volatility, byte-addressability, positive response to increasing temperature, superior scalability, and zero standby leakage have changed the landscape of modern computing and storage systems. In such a scenario, we present a storage system called FLEET which can off-load partial or whole SQL queries to the storage engine from CPU. FLEET uses an FPGA rather than conventional CPUs to implement the off-load engine due to its highly parallel nature. We have implemented an initial prototype of FLEET with PCM-based storage. The results demonstrate that significant performance and CPU utilization gains can be achieved by pushing selected query processing components inside in PCM-based storage.

  15. Material Engineering for Phase Change Memory

    NASA Astrophysics Data System (ADS)

    Cabrera, David M.

    As semiconductor devices continue to scale downward, and portable consumer electronics become more prevalent there is a need to develop memory technology that will scale with devices and use less energy, while maintaining performance. One of the leading prototypical memories that is being investigated is phase change memory. Phase change memory (PCM) is a non-volatile memory composed of 1 transistor and 1 resistor. The resistive structure includes a memory material alloy which can change between amorphous and crystalline states repeatedly using current/voltage pulses of different lengths and magnitudes. The most widely studied PCM materials are chalcogenides - Germanium-Antimony-Tellerium (GST) with Ge2Sb2Te3 and Germanium-Tellerium (GeTe) being some of the most popular stochiometries. As these cells are scaled downward, the current/voltage needed to switch these materials becomes comparable to the voltage needed to sense the cell's state. The International Roadmap for Semiconductors aims to raise the threshold field of these devices from 66.6 V/mum to be at least 375 V/mum for the year 2024. These cells are also prone to resistance drift between states, leading to bit corruption and memory loss. Phase change material properties are known to influence PCM device performance such as crystallization temperature having an effect on data retention and litetime, while resistivity values in the amorphous and crystalline phases have an effect on the current/voltage needed to write/erase the cell. Addition of dopants is also known to modify the phase change material parameters. The materials G2S2T5, GeTe, with dopants - nitrogen, silicon, titanium, and aluminum oxide and undoped Gallium-Antimonide (GaSb) are studied for these desired characteristics. Thin films of these compositions are deposited via physical vapor deposition at IBM Watson Research Center. Crystallization temperatures are investigated using time resolved x-ray diffraction at Brookhaven National Laboratory

  16. On-chip photonic memory elements employing phase-change materials.

    PubMed

    Rios, Carlos; Hosseini, Peiman; Wright, C David; Bhaskaran, Harish; Pernice, Wolfram H P

    2014-03-05

    Phase-change materials integrated into nanophotonic circuits provide a flexible way to realize tunable optical components. Relying on the enormous refractive-index contrast between the amorphous and crystalline states, such materials are promising candidates for on-chip photonic memories. Nonvolatile memory operation employing arrays of microring resonators is demonstrated as a route toward all-photonic chipscale information processing. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. A Supramolecular Nanofiber-Based Passive Memory Device for Remembering Past Humidity.

    PubMed

    Mogera, Umesha; Gedda, Murali; George, Subi J; Kulkarni, Giridhar U

    2017-09-20

    Memorizing the magnitude of a physical parameter such as relative humidity in a consignment may be useful for maintaining recommended conditions over a period of time. In relation to cost and energy considerations, it is important that the memorizing device works in the unpowered passive state. In this article, we report the fabrication of a humidity-responsive device that can memorize the humidity condition it had experienced while being unpowered. The device makes use of supramolecular nanofibers obtained from the self-assembly of donor-acceptor (D-A) molecules, coronene tetracarboxylate salt (CS) and dodecyl methyl viologen (DMV), respectively, from aqueous medium. The fibers, while being highly sensitive to humidity, tend to develop electrically induced disorder under constant voltage, leading to increased resistance with time. The conducting state can be regained via self-assembly by exposing the device to humidity in the absence of applied voltage, the extent of recovery depending on the magnitude of the humidity applied under no bias. This nature of the fibers has been exploited in reading the humidity memory state, which interestingly is independent of the lapsed time since the humidity exposure as well as the duration of exposure. Importantly, the device is capable of differentiating the profiles of varying humidity conditions from its memory. The device finds use in applications requiring stringent condition monitoring.

  18. Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd; Ho, Fat D.

    2012-01-01

    The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere

  19. Write once read many memory device from Tris-8 (-hydroxyquinoline) aluminum and Indium tin oxide nano particles

    NASA Astrophysics Data System (ADS)

    Aneesh, J.; Predeep, P.

    2011-10-01

    Consequent to the fast increase in data storage requirements new materials and device structures are explored in a war footing. Organic memory devices are attracting lot of interest among the researchers and are becoming a hot topic of investigations. This study is an attempt to develop a tri-layer organic memory device using indium tin oxide (ITO) nanoparticles as charge trapping middle layer between tris-8(-hydroxyquinoline)aluminum (Alq3) layers employing spin coating technique. Device switching is studied by applying a current-voltage (I-V) sweep. On increasing the applied bias the device switched from the initial high resistance (OFF) state to a low resistance (ON) state at a switch on voltage of around 4 V. ON/OFF ratio is of the order of 100 at a read voltage of 2 V. The device is found to remain in the low resistance state on further scans, showing the applicability of this device as a write once read many times (WORM) memory.

  20. 76 FR 80964 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-12-27

    ... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-821] Certain Dynamic Random Access Memory... importation, and the sale within the United States after importation of certain dynamic random access memory... certain dynamic random access memory devices, and products containing same that infringe one or more of...

  1. Voltage-controlled low-energy switching of nanomagnets through Ruderman-Kittel-Kasuya-Yosida interactions for magnetoelectric device applications

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Ghosh, Bahniman, E-mail: bghosh@utexas.edu; Dey, Rik; Register, Leonard F.

    2016-07-21

    In this article, we consider through simulation low-energy switching of nanomagnets via electrostatically gated inter-magnet Ruderman-Kittel-Kasuya-Yosida (RKKY) interactions on the surface of three-dimensional topological insulators, for possible memory and nonvolatile logic applications. We model the possibility and dynamics of RKKY-based switching of one nanomagnet by coupling to one or more nanomagnets of set orientation. Potential applications to both memory and nonvolatile logic are illustrated. Sub-attojoule switching energies, far below conventional spin transfer torque (STT)-based memories and even below CMOS logic appear possible. Switching times on the order of a few nanoseconds, comparable to times for STT switching, are estimated formore » ferromagnetic nanomagnets, but the approach also appears compatible with the use of antiferromagnets which may allow for faster switching.« less

  2. Anisotropic modulation of magnetic properties and the memory effect in a wide-band (011)-Pr0.7Sr0.3MnO3/PMN-PT heterostructure.

    PubMed

    Zhao, Ying-Ying; Wang, Jing; Kuang, Hao; Hu, Feng-Xia; Liu, Yao; Wu, Rong-Rong; Zhang, Xi-Xiang; Sun, Ji-Rong; Shen, Bao-Gen

    2015-04-24

    Memory effect of electric-field control on magnetic behavior in magnetoelectric composite heterostructures has been a topic of interest for a long time. Although the piezostrain and its transfer across the interface of ferroelectric/ferromagnetic films are known to be important in realizing magnetoelectric coupling, the underlying mechanism for nonvolatile modulation of magnetic behaviors remains a challenge. Here, we report on the electric-field control of magnetic properties in wide-band (011)-Pr0.7Sr0.3MnO3/0.7Pb(Mg1/3Nb2/3)O3-0.3PbTiO3 heterostructures. By introducing an electric-field-induced in-plane anisotropic strain field during the cooling process from room temperature, we observe an in-plane anisotropic, nonvolatile modulation of magnetic properties in a wide-band Pr0.7Sr0.3MnO3 film at low temperatures. We attribute this anisotropic memory effect to the preferential seeding and growth of ferromagnetic (FM) domains under the anisotropic strain field. In addition, we find that the anisotropic, nonvolatile modulation of magnetic properties gradually diminishes as the temperature approaches FM transition, indicating that the nonvolatile memory effect is temperature dependent. By taking into account the competition between thermal energy and the potential barrier of the metastable magnetic state induced by the anisotropic strain field, this distinct memory effect is well explained, which provides a promising approach for designing novel electric-writing magnetic memories.

  3. Resistive switching characteristics of HfO2-based memory devices on flexible plastics.

    PubMed

    Han, Yong; Cho, Kyoungah; Park, Sukhyung; Kim, Sangsig

    2014-11-01

    In this study, we examine the characteristics of HfO2-based resistive switching random access memory (ReRAM) devices on flexible plastics. The Pt/HfO2/Au ReRAM devices exhibit the unipolar resistive switching behaviors caused by the conducting filaments. From the Auger depth profiles of the HfO2 thin film, it is confirmed that the relatively lower oxygen content in the interface of the bottom electrode is responsible for the resistive switching by oxygen vacancies. And the unipolar resistive switching behaviors are analyzed from the C-V characteristics in which negative and positive capacitances are measured in the low-resistance state and the high-resistance state, respectively. The devices have a high on/off ratio of 10(4) and the excellent retention properties even after a continuous bending test of two thousand cycles. The correlation between the device size and the memory characteristics is investigated as well. A relatively smaller-sized device having a higher on/off ratio operates at a higher voltage than a relatively larger-sized device.

  4. Realization of transient memory-loss with NiO-based resistive switching device

    NASA Astrophysics Data System (ADS)

    Hu, S. G.; Liu, Y.; Chen, T. P.; Liu, Z.; Yu, Q.; Deng, L. J.; Yin, Y.; Hosaka, Sumio

    2012-11-01

    A resistive switching device based on a nickel-rich nickel oxide thin film, which exhibits inherent learning and memory-loss abilities, is reported in this work. The conductance of the device gradually increases and finally saturates with the number of voltage pulses (or voltage sweepings), which is analogous to the behavior of the short-term and long-term memory in the human brain. Furthermore, the number of the voltage pulses (or sweeping cycles) required to achieve a given conductance state increases with the interval between two consecutive voltage pulses (or sweeping cycles), which is attributed to the heat diffusion in the material of the conductive filaments formed in the nickel oxide thin film. The phenomenon resembles the behavior of the human brain, i.e., forgetting starts immediately after an impression, a larger interval of the impressions leads to more memory loss, thus the memorization needs more impressions to enhance.

  5. Neural network based feed-forward high density associative memory

    NASA Technical Reports Server (NTRS)

    Daud, T.; Moopenn, A.; Lamb, J. L.; Ramesham, R.; Thakoor, A. P.

    1987-01-01

    A novel thin film approach to neural-network-based high-density associative memory is described. The information is stored locally in a memory matrix of passive, nonvolatile, binary connection elements with a potential to achieve a storage density of 10 to the 9th bits/sq cm. Microswitches based on memory switching in thin film hydrogenated amorphous silicon, and alternatively in manganese oxide, have been used as programmable read-only memory elements. Low-energy switching has been ascertained in both these materials. Fabrication and testing of memory matrix is described. High-speed associative recall approaching 10 to the 7th bits/sec and high storage capacity in such a connection matrix memory system is also described.

  6. Investigation of the non-volatile resistance change in noncentrosymmetric compounds

    PubMed Central

    Herng, T. S.; Kumar, A.; Ong, C. S.; Feng, Y. P.; Lu, Y. H.; Zeng, K. Y.; Ding, J.

    2012-01-01

    Coexistence of polarization and resistance-switching characteristics in single compounds has been long inspired scientific and technological interests. Here, we report the non-volatile resistance change in noncentrosymmetric compounds investigated by using defect nanotechnology and contact engineering. Using a noncentrosymmetric material of ZnO as example, we first transformed ZnO into high resistance state. Then ZnO electrical polarization was probed and its domains polarized 180° along the [001]-axis with long-lasting memory effect (>25 hours). Based on our experimental observations, we have developed a vacancy-mediated pseudoferroelectricity model. Our first-principle calculations propose that vacancy defects initiate a spontaneous inverted domains nucleation at grain boundaries, and then they grow in the presence of an electrical field. The propagation of inverted domains follows the scanning tip motion under applied electrical field, leading to the growth of polarized domains over large areas. PMID:22905318

  7. Highly-Ordered 3D Vertical Resistive Switching Memory Arrays with Ultralow Power Consumption and Ultrahigh Density.

    PubMed

    Al-Haddad, Ahmed; Wang, Chengliang; Qi, Haoyuan; Grote, Fabian; Wen, Liaoyong; Bernhard, Jörg; Vellacheri, Ranjith; Tarish, Samar; Nabi, Ghulam; Kaiser, Ute; Lei, Yong

    2016-09-07

    Resistive switching random access memories (RRAM) have attracted great scientific and industrial attention for next generation data storage because of their advantages of nonvolatile properties, high density, low power consumption, fast writing/erasing speed, good endurance, and simple and small operation system. Here, by using a template-assisted technique, we demonstrate a three-dimensional highly ordered vertical RRAM device array with density as high as that of the nanopores of the template (10(8)-10(9) cm(-2)), which can also be fabricated in large area. The high crystallinity of the materials, the large contact area and the intimate semiconductor/electrode interface (3 nm interfacial layer) make the ultralow voltage operation (millivolt magnitude) and ultralow power consumption (picowatt) possible. Our procedure for fabrication of the nanodevice arrays in large area can be used for producing many other different materials and such three-dimensional electronic device arrays with the capability to adjust the device densities can be extended to other applications of the next generation nanodevice technology.

  8. PMMA interlayer-modulated memory effects by space charge polarization in resistive switching based on CuSCN-nanopyramids/ZnO-nanorods p-n heterojunction

    PubMed Central

    Cheng, Baochang; Zhao, Jie; Xiao, Li; Cai, Qiangsheng; Guo, Rui; Xiao, Yanhe; Lei, Shuijin

    2015-01-01

    Resistive switching (RS) devices are commonly believed as a promising candidate for next generation nonvolatile resistance random access memory. Here, polymethylmethacrylate (PMMA) interlayer was introduced at the heterointerface of p-CuSCN hollow nanopyramid arrays and n-ZnO nanorod arrays, resulting in a typical bipolar RS behavior. We propose the mechanism of nanostructure trap-induced space charge polarization modulated by PMMA interlayer. At low reverse bias, PMMA insulator can block charges through the heterointerface, and and trapped states are respectively created on both sides of PMMA, resulting in a high resistance state (HRS) due to wider depletion region. At high reverse bias, however, electrons and holes can cross PMMA interlayer by Fowler-Nordeim tunneling due to a massive tilt of energy band, and then inject into the traps of ZnO and CuSCN, respectively. and trapped states are created, resulting in the formation of degenerate semiconductors on both sides of PMMA. Therefore, quantum tunneling and space charge polarization lead to a low resistance state (LRS). At relatively high forward bias, subsequently, the trapped states of and are recreated due to the opposite injection of charges, resulting in a recovery of HRS. The introduction of insulating interlayer at heterointerface, point a way to develop next-generation nonvolatile memories. PMID:26648249

  9. Multi-layered nanocomposite dielectrics for high density organic memory devices

    NASA Astrophysics Data System (ADS)

    Kang, Moonyeong; Chung, Kyungwha; Baeg, Kang-Jun; Kim, Dong Ha; Kim, Choongik

    2015-01-01

    We fabricated organic memory devices with metal-pentacene-insulator-silicon structure which contain double dielectric layers comprising 3D pattern of Au nanoparticles (Au NPs) and block copolymer (PS-b-P2VP). The role of Au NPs is to charge/discharge carriers upon applied voltage, while block copolymer helps to form highly ordered Au NP patterns in the dielectric layer. Double-layered nanocomposite dielectrics enhanced the charge trap density (i.e., trapped charge per unit area) by Au NPs, resulting in increase of the memory window (ΔVth).

  10. Analysis of the Bipolar Resistive Switching Behavior of a Biocompatible Glucose Film for Resistive Random Access Memory.

    PubMed

    Park, Sung Pyo; Tak, Young Jun; Kim, Hee Jun; Lee, Jin Hyeok; Yoo, Hyukjoon; Kim, Hyun Jae

    2018-06-01

    Resistive random access memory (RRAM) devices are fabricated through a simple solution process using glucose, which is a natural biomaterial for the switching layer of RRAM. The fabricated glucose-based RRAM device shows nonvolatile bipolar resistive switching behavior, with a switching window of 10 3 . In addition, the endurance and data retention capability of glucose-based RRAM exhibit stable characteristics up to 100 consecutive cycles and 10 4 s under constant voltage stress at 0.3 V. The interface between the top electrode and the glucose film is carefully investigated to demonstrate the bipolar switching mechanism of the glucose-based RRAM device. The glucose based-RRAM is also evaluated on a polyimide film to verify the possibility of a flexible platform. Additionally, a cross-bar array structure with a magnesium electrode is prepared on various substrates to assess the degradability and biocompatibility for the implantable bioelectronic devices, which are harmless and nontoxic to the human body. It is expected that this research can provide meaningful insights for developing the future bioelectronic devices. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis

    NASA Astrophysics Data System (ADS)

    Younis, Adnan; Chu, Dewei; Li, Sean

    2015-09-01

    Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective.

  12. Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis

    PubMed Central

    Younis, Adnan; Chu, Dewei; Li, Sean

    2015-01-01

    Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective. PMID:26324073

  13. Nonvolatile and Cryogenic-compatible Quantum Memory Devices (QuMEM)

    DTIC Science & Technology

    2016-06-01

    construction including: • 4” SiO2 /Si substrates and wafer/sample holders • Tweezers and wafer scribe • Safety glasses , gloves, and fab wipes • Probe tips...Cleaving of NbSe2 with Scotch™ Tape method ............................................................ 56 59. Transfer of NbSe2 atomic crystals to SiO2 ...O2 plasma + optional CF4 5 Top superconductor electrode evaporation Thermal Evaporation at SDSU MEMS Lab P+ Si Handle Wafer SiO2 (Oxide

  14. Nonvolatile and Cryogenic-Compatible Quantum Memory Devices (QuMEM)

    DTIC Science & Technology

    2016-06-01

    construction including: • 4” SiO2 /Si substrates and wafer/sample holders • Tweezers and wafer scribe • Safety glasses , gloves, and fab wipes • Probe tips...Cleaving of NbSe2 with Scotch™ Tape method ............................................................ 56 59. Transfer of NbSe2 atomic crystals to SiO2 ...O2 plasma + optional CF4 5 Top superconductor electrode evaporation Thermal Evaporation at SDSU MEMS Lab P+ Si Handle Wafer SiO2 (Oxide

  15. Quantitative Observation of Threshold Defect Behavior in Memristive Devices with Operando X-ray Microscopy.

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Liu, Huajun; Dong, Yongqi; Cherukara, Matthew J.

    Memristive devices are an emerging technology that enables both rich interdisciplinary science and novel device functionalities, such as nonvolatile memories and nanoionics-based synaptic electronics. Recent work has shown that the reproducibility and variability of the devices depend sensitively on the defect structures created during electroforming as well as their continued evolution under dynamic electric fields. However, a fundamental principle guiding the material design of defect structures is still lacking due to the difficulty in understanding dynamic defect behavior under different resistance states. Here, we unravel the existence of threshold behavior by studying model, single-crystal devices: resistive switching requires that themore » pristine oxygen vacancy concentration reside near a critical value. Theoretical calculations show that the threshold oxygen vacancy concentration lies at the boundary for both electronic and atomic phase transitions. Through operando, multimodal X-ray imaging, we show that field tuning of the local oxygen vacancy concentration below or above the threshold value is responsible for switching between different electrical states. These results provide a general strategy for designing functional defect structures around threshold concentrations to create dynamic, field-controlled phases for memristive devices.« less

  16. 83 FR 22712 - Certain Non-Volatile Memory Devices and Products Containing the Same; Notice of Request for...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2018-05-16

    ...Notice is hereby given that the presiding administrative law judge has issued a Final Initial Determination and Recommended Determination on Remedy and Bonding in the above-captioned investigation. The Commission is soliciting comments on public interest issues raised by the recommended relief, specifically a limited exclusion order directed to respondents Toshiba Corporation of Tokyo, Japan; Toshiba Memory Corporation of Tokyo, Japan; Toshiba America, Inc. of New York, New York; Toshiba America Electronic Components, Inc. of Irvine, California; Toshiba America Information Systems, Inc. of Irvine, California; and Toshiba Information Equipment (Philippines), Inc. of Binan, Philippines, and cease and desist orders directed to the domestic respondents. This notice is soliciting public interest comments from the public only. Parties are to file public interest submissions pursuant to Commission rules.

  17. Natural Attenuation of Nonvolatile Contaminants in the Capillary Fringe.

    PubMed

    Kurt, Zohre; Mack, E Erin; Spain, Jim C

    2016-09-20

    When anoxic polluted groundwater encounters the overlying vadose zone an oxic/anoxic interface is created, often near the capillary fringe. Biodegradation of volatile contaminants in the capillary fringe can prevent vapor migration. In contrast, the biodegradation of nonvolatile contaminants in the vadose zone has received comparatively little attention. Nonvolatile compounds do not cause vapor intrusion, but they still move with the groundwater and are major contaminants. Aniline (AN) and diphenylamine (DPA) are examples of toxic nonvolatile contaminants found often at dye and munitions manufacturing sites. In this study, we tested the hypothesis that bacteria can aerobically biodegrade AN and DPA in the capillary fringe and decrease the contaminant concentrations in the anoxic plume beneath the vadose zone. Laboratory multiport columns that represented the unsaturated zone were used to evaluate degradation of AN or DPA in contaminated water. The biodegradation fluxes of the contaminants were estimated to be 113 ± 26 mg AN·m(-2)·h(-1) and 76 ± 18 mg DPA·m(-2)·h(-1) in the presence of bacteria known to degrade AN and DPA. Oxygen and contaminant profiles along with enumeration of bacterial populations indicated that most of the biodegradation took place within the lower part of the capillary fringe. The results indicate that bacteria capable of contaminant biodegradation in the capillary fringe can create a sink for nonvolatile contaminants.

  18. Sub-10 nm Ta Channel Responsible for Superior Performance of a HfO 2 Memristor

    DOE Office of Scientific and Technical Information (OSTI.GOV)

    Jiang, Hao; Han, Lili; Lin, Peng

    Memristive devices are promising candidates for the next generation non-volatile memory and neuromorphic computing. It has been widely accepted that the motion of oxygen anions leads to the resistance changes for valence-change-memory (VCM) type of materials. Only very recently it was speculated that metal cations could also play an important role, but no direct physical characterizations have been reported yet. We report a Ta/HfO 2/Pt memristor with fast switching speed, record high endurance (120 billion cycles) and reliable retention. We also programmed the device to 24 discrete resistance levels, and also demonstrated over a million (220) epochs of potentiation andmore » depression, suggesting that our devices can be used for both multi-level non-volatile memory and neuromorphic computing applications. More importantly, we directly observed a sub-10 nm Ta-rich and O-deficient conduction channel within the HfO 2 layer that is responsible for the switching. Our work deepens our understanding of the resistance switching mechanism behind oxide-based memristive devices and paves the way for further device performance optimization for a broad spectrum of applications.« less

  19. Sub-10 nm Ta Channel Responsible for Superior Performance of a HfO 2 Memristor

    DOE PAGES

    Jiang, Hao; Han, Lili; Lin, Peng; ...

    2016-06-23

    Memristive devices are promising candidates for the next generation non-volatile memory and neuromorphic computing. It has been widely accepted that the motion of oxygen anions leads to the resistance changes for valence-change-memory (VCM) type of materials. Only very recently it was speculated that metal cations could also play an important role, but no direct physical characterizations have been reported yet. We report a Ta/HfO 2/Pt memristor with fast switching speed, record high endurance (120 billion cycles) and reliable retention. We also programmed the device to 24 discrete resistance levels, and also demonstrated over a million (220) epochs of potentiation andmore » depression, suggesting that our devices can be used for both multi-level non-volatile memory and neuromorphic computing applications. More importantly, we directly observed a sub-10 nm Ta-rich and O-deficient conduction channel within the HfO 2 layer that is responsible for the switching. Our work deepens our understanding of the resistance switching mechanism behind oxide-based memristive devices and paves the way for further device performance optimization for a broad spectrum of applications.« less

  20. An insight into the dopant selection for CeO2-based resistive-switching memory system: a DFT and experimental study

    NASA Astrophysics Data System (ADS)

    Hussain, Fayyaz; Imran, Muhammad; Rana, Anwar Manzoor; Khalil, R. M. Arif; Khera, Ejaz Ahmad; Kiran, Saira; Javid, M. Arshad; Sattar, M. Atif; Ismail, Muhammad

    2018-03-01

    The aim of this study is to figure out better metal dopants for CeO2 for designing highly efficient non-volatile memory (NVM) devices. The present DFT work involves four different metals doped interstitially and substitutionally in CeO2 thin films. First principle calculations involve electron density of states (DOS) and partial density of states (PDOS), and isosurface charge densities are carried out within the plane-wave density functional theory using GGA and GGA + U approach by employing the Vienna ab initio simulation package VASP. Isosurface charge density plots confirmed that interstitial doping of Zr and Ti metals truly assists in generating conduction filaments (CFs), while substitutional doping of these metals cannot do so. Substitutional doping of W may contribute in generating CFs in CeO2 directly, but its interstitial doping improves conductivity of CeO2. However, Ni-dopant is capable of directly generating CFs both as substitutional and interstitial dopants in ceria. Such a capability of Ni appears acting as top electrode in Ni/CeO2/Pt memory devices, but its RS behavior is not so good. On inserting Zr layer to make Ni/Zr:CeO2/Pt memory stacks, Ni does not contribute in RS characteristics, but Zr plays a vital role in forming CFs by creating oxygen vacancies and forming ZrO2 interfacial layer. Therefore, Zr-doped devices exhibit high-resistance ratio of 104 and good endurance as compared to undoped devices suitable for RRAM applications.