A Parallel Genetic Algorithm for Automated Electronic Circuit Design

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris; Norvig, Peter (Technical Monitor)

2000-01-01

We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.

Parameters Design of Series Resonant Inverter Circuit

NASA Astrophysics Data System (ADS)

Qi, Xingkun; Peng, Yonglong; Li, Yabin

This paper analyzes the main circuit structure of series resonant inverter, and designs the components parameters of the main circuit.That provides a theoretical method for the design of series resonant inverter.

Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

Analog integrated circuits design for processing physiological signals.

PubMed

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

Negative Difference Resistance and Its Application to Construct Boolean Logic Circuits

NASA Astrophysics Data System (ADS)

Nikodem, Maciej; Bawiec, Marek A.; Surmacz, Tomasz R.

Electronic circuits based on nanodevices and quantum effect are the future of logic circuits design. Today's technology allows constructing resonant tunneling diodes, quantum cellular automata and nanowires/nanoribbons that are the elementary components of threshold gates. However, synthesizing a threshold circuit for an arbitrary logic function is still a challenging task where no efficient algorithms exist. This paper focuses on Generalised Threshold Gates (GTG), giving the overview of threshold circuit synthesis methods and presenting an algorithm that considerably simplifies the task in case of GTG circuits.

Spacecraft transformer and inductor design

NASA Technical Reports Server (NTRS)

Mclyman, W. T.

1977-01-01

The conversion process in spacecraft power electronics requires the use of magnetic components which frequently are the heaviest and bulkiest items in the conversion circuit. This handbook pertains to magnetic material selection, transformer and inductor design tradeoffs, transformer design, iron core dc inductor design, toroidal power core inductor design, window utilization factors, regulation, and temperature rise. Relationships are given which simplify and standardize the design of transformers and the analysis of the circuits in which they are used. The interactions of the various design parameters are also presented in simplified form so that tradeoffs and optimizations may easily be made.

Documentation of Stainless Steel Lithium Circuit Test Section Design

NASA Technical Reports Server (NTRS)

Godfroy, T. J.; Martin, J. J.; Stewart, E. T.; Rhys, N. O.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005.

Assessing Design Activity in Complex CMOS Circuit Design.

ERIC Educational Resources Information Center

Biswas, Gautam; And Others

This report characterizes human problem solving in digital circuit design. Protocols of 11 different designers with varying degrees of training were analyzed by identifying the designers' problem solving strategies and discussing activity patterns that differentiate the designers. These methods are proposed as a tentative basis for assessing…

Robust Design of Biological Circuits: Evolutionary Systems Biology Approach

PubMed Central

Chen, Bor-Sen; Hsu, Chih-Yuan; Liou, Jing-Jia

2011-01-01

Artificial gene circuits have been proposed to be embedded into microbial cells that function as switches, timers, oscillators, and the Boolean logic gates. Building more complex systems from these basic gene circuit components is one key advance for biologic circuit design and synthetic biology. However, the behavior of bioengineered gene circuits remains unstable and uncertain. In this study, a nonlinear stochastic system is proposed to model the biological systems with intrinsic parameter fluctuations and environmental molecular noise from the cellular context in the host cell. Based on evolutionary systems biology algorithm, the design parameters of target gene circuits can evolve to specific values in order to robustly track a desired biologic function in spite of intrinsic and environmental noise. The fitness function is selected to be inversely proportional to the tracking error so that the evolutionary biological circuit can achieve the optimal tracking mimicking the evolutionary process of a gene circuit. Finally, several design examples are given in silico with the Monte Carlo simulation to illustrate the design procedure and to confirm the robust performance of the proposed design method. The result shows that the designed gene circuits can robustly track desired behaviors with minimal errors even with nontrivial intrinsic and external noise. PMID:22187523

Robust design of biological circuits: evolutionary systems biology approach.

PubMed

Chen, Bor-Sen; Hsu, Chih-Yuan; Liou, Jing-Jia

2011-01-01

Artificial gene circuits have been proposed to be embedded into microbial cells that function as switches, timers, oscillators, and the Boolean logic gates. Building more complex systems from these basic gene circuit components is one key advance for biologic circuit design and synthetic biology. However, the behavior of bioengineered gene circuits remains unstable and uncertain. In this study, a nonlinear stochastic system is proposed to model the biological systems with intrinsic parameter fluctuations and environmental molecular noise from the cellular context in the host cell. Based on evolutionary systems biology algorithm, the design parameters of target gene circuits can evolve to specific values in order to robustly track a desired biologic function in spite of intrinsic and environmental noise. The fitness function is selected to be inversely proportional to the tracking error so that the evolutionary biological circuit can achieve the optimal tracking mimicking the evolutionary process of a gene circuit. Finally, several design examples are given in silico with the Monte Carlo simulation to illustrate the design procedure and to confirm the robust performance of the proposed design method. The result shows that the designed gene circuits can robustly track desired behaviors with minimal errors even with nontrivial intrinsic and external noise.

Dynamical Systems in Circuit Designer's Eyes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Odyniec, M.

Examples of nonlinear circuit design are given. Focus of the design process is on theory and engineering methods (as opposed to numerical analysis). Modeling is related to measurements It is seen that the phase plane is still very useful with proper models Harmonic balance/describing function offers powerful insight (via the combination of simulation with circuit and ODE theory). Measurement and simulation capabilities increased, especially harmonics measurements (since sinusoids are easy to generate)

Simplifying microbial electrosynthesis reactor design.

PubMed

Giddings, Cloelle G S; Nevin, Kelly P; Woodward, Trevor; Lovley, Derek R; Butler, Caitlyn S

2015-01-01

Microbial electrosynthesis, an artificial form of photosynthesis, can efficiently convert carbon dioxide into organic commodities; however, this process has only previously been demonstrated in reactors that have features likely to be a barrier to scale-up. Therefore, the possibility of simplifying reactor design by both eliminating potentiostatic control of the cathode and removing the membrane separating the anode and cathode was investigated with biofilms of Sporomusa ovata. S. ovata reduces carbon dioxide to acetate and acts as the microbial catalyst for plain graphite stick cathodes as the electron donor. In traditional 'H-cell' reactors, where the anode and cathode chambers were separated with a proton-selective membrane, the rates and columbic efficiencies of microbial electrosynthesis remained high when electron delivery at the cathode was powered with a direct current power source rather than with a potentiostat-poised cathode utilized in previous studies. A membrane-less reactor with a direct-current power source with the cathode and anode positioned to avoid oxygen exposure at the cathode, retained high rates of acetate production as well as high columbic and energetic efficiencies. The finding that microbial electrosynthesis is feasible without a membrane separating the anode from the cathode, coupled with a direct current power source supplying the energy for electron delivery, is expected to greatly simplify future reactor design and lower construction costs.

A simplified genetic design for mammalian enamel

PubMed Central

Snead, ML; Zhu, D; Lei, YP; Luo, W; Bringas, P.; Sucov, H.; Rauth, RJ; Paine, ML; White, SN

2011-01-01

A biomimetic replacement for tooth enamel is urgently needed because dental caries is the most prevalent infectious disease to affect man. Here, design specifications for an enamel replacement material inspired by Nature are deployed for testing in an animal model. Using genetic engineering we created a simplified enamel protein matrix precursor where only one, rather than dozens of amelogenin isoforms, contributed to enamel formation. Enamel function and architecture were unaltered, but the balance between the competing materials properties of hardness and toughness was modulated. While the other amelogenin isoforms make a modest contribution to optimal biomechanical design, the enamel made with only one amelogenin isoform served as a functional substitute. Where enamel has been lost to caries or trauma a suitable biomimetic replacement material could be fabricated using only one amelogenin isoform, thereby simplifying the protein matrix parameters by one order of magnitude. PMID:21295848

Simplified Design Equations for Class-E Neural Prosthesis Transmitters

PubMed Central

Troyk, Philip; Hu, Zhe

2013-01-01

Extreme miniaturization of implantable electronic devices is recognized as essential for the next generation of neural prostheses, owing to the need for minimizing the damage and disruption of the surrounding neural tissue. Transcutaneous power and data transmission via a magnetic link remains the most effective means of powering and controlling implanted neural prostheses. Reduction in the size of the coil, within the neural prosthesis, demands the generation of a high-intensity radio frequency magnetic field from the extracoporeal transmitter. The Class-E power amplifier circuit topology has been recognized as a highly effective means of producing large radio frequency currents within the transmitter coil. Unfortunately, design of a Class-E circuit is most often fraught by the need to solve a complex set of equations so as to implement both the zero-voltage-switching and zero-voltage-derivative-switching conditions that are required for efficient operation. This paper presents simple explicit design equations for designing the Class-E circuit topology. Numerical design examples are presented to illustrate the design procedure. PMID:23292784

On stethoscope design: a challenge for biomedical circuit designers.

PubMed

Hahn, A W

2001-01-01

Most clinicians learned the art and science of auscultation using an acoustic stethoscope. While many models of electronic stethoscopes have been marketed over the years, none of them seem to do a very good job of emulating the most common forms of acoustic stethoscopes available. This paper is an appeal to biomedical circuit designers to learn more about the acoustics of commonly used stethoscopes and to develop an appropriate group of circuits which would emulate them much like music synthesizers can emulate almost any musical instrument. The implications are for creative designers to move toward a rational and acceptable design for both personal physician use and for telemedicine.

Design and implementation of GaAs HBT circuits with ACME

NASA Technical Reports Server (NTRS)

Hutchings, Brad L.; Carter, Tony M.

1993-01-01

GaAs HBT circuits offer high performance (5-20 GHz) and radiation hardness (500 Mrad) that is attractive for space applications. ACME is a CAD tool specifically developed for HBT circuits. ACME implements a novel physical schematic-capture design technique where designers simultaneously view the structure and physical organization of a circuit. ACME's design interface is similar to schematic capture; however, unlike conventional schematic capture, designers can directly control the physical placement of both function and interconnect at the schematic level. In addition, ACME provides design-time parasitic extraction, complex wire models, and extensions to Multi-Chip Modules (MCM's). A GaAs HBT gate-array and semi-custom circuits have been developed with ACME; several circuits have been fabricated and found to be fully functional .

Lithium Circuit Test Section Design and Fabrication

NASA Technical Reports Server (NTRS)

Godfroy, Thomas; Garber, Anne

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper will discuss the overall system design and build and the component testing findings.

Lithium Circuit Test Section Design and Fabrication

NASA Astrophysics Data System (ADS)

Godfroy, Thomas; Garber, Anne; Martin, James

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper discusses the overall system design and build and the component testing findings.

Documentation of Stainless Steel Lithium Circuit Test Section Design. Suppl

NASA Technical Reports Server (NTRS)

Godfroy, Thomas J. (Compiler); Martin, James J.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005. This supplement contains drawings, analysis, and calculations

Programming languages for circuit design.

PubMed

Pedersen, Michael; Yordanov, Boyan

2015-01-01

This chapter provides an overview of a programming language for Genetic Engineering of Cells (GEC). A GEC program specifies a genetic circuit at a high level of abstraction through constraints on otherwise unspecified DNA parts. The GEC compiler then selects parts which satisfy the constraints from a given parts database. GEC further provides more conventional programming language constructs for abstraction, e.g., through modularity. The GEC language and compiler is available through a Web tool which also provides functionality, e.g., for simulation of designed circuits.

Petri-net-based 2D design of DNA walker circuits.

PubMed

Gilbert, David; Heiner, Monika; Rohr, Christian

2018-01-01

We consider localised DNA computation, where a DNA strand walks along a binary decision graph to compute a binary function. One of the challenges for the design of reliable walker circuits consists in leakage transitions, which occur when a walker jumps into another branch of the decision graph. We automatically identify leakage transitions, which allows for a detailed qualitative and quantitative assessment of circuit designs, design comparison, and design optimisation. The ability to identify leakage transitions is an important step in the process of optimising DNA circuit layouts where the aim is to minimise the computational error inherent in a circuit while minimising the area of the circuit. Our 2D modelling approach of DNA walker circuits relies on coloured stochastic Petri nets which enable functionality, topology and dimensionality all to be integrated in one two-dimensional model. Our modelling and analysis approach can be easily extended to 3-dimensional walker systems.

Design principles for elementary gene circuits: Elements, methods, and examples

NASA Astrophysics Data System (ADS)

Savageau, Michael A.

2001-03-01

The control of gene expression involves complex circuits that exhibit enormous variation in design. For years the most convenient explanation for these variations was historical accident. According to this view, evolution is a haphazard process in which many different designs are generated by chance; there are many ways to accomplish the same thing, and so no further meaning can be attached to such different but equivalent designs. In recent years a more satisfying explanation based on design principles has been found for at least certain aspects of gene circuitry. By design principle we mean a rule that characterizes some biological feature exhibited by a class of systems such that discovery of the rule allows one not only to understand known instances but also to predict new instances within the class. The central importance of gene regulation in modern molecular biology provides strong motivation to search for more of these underlying design principles. The search is in its infancy and there are undoubtedly many design principles that remain to be discovered. The focus of this three-part review will be the class of elementary gene circuits in bacteria. The first part reviews several elements of design that enter into the characterization of elementary gene circuits in prokaryotic organisms. Each of these elements exhibits a variety of realizations whose meaning is generally unclear. The second part reviews mathematical methods used to represent, analyze, and compare alternative designs. Emphasis is placed on particular methods that have been used successfully to identify design principles for elementary gene circuits. The third part reviews four design principles that make specific predictions regarding (1) two alternative modes of gene control, (2) three patterns of coupling gene expression in elementary circuits, (3) two types of switches in inducible gene circuits, and (4) the realizability of alternative gene circuits and their response to phased

Pulse Detecting Genetic Circuit - A New Design Approach.

PubMed

Noman, Nasimul; Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C

2016-01-01

A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse-analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event.

PUZZLE - A program for computer-aided design of printed circuit artwork

NASA Technical Reports Server (NTRS)

Harrell, D. A. W.; Zane, R.

1971-01-01

Program assists in solving spacing problems encountered in printed circuit /PC/ design. It is intended to have maximum use for two-sided PC boards carrying integrated circuits, and also aids design of discrete component circuits.

Fast and Accurate Circuit Design Automation through Hierarchical Model Switching.

PubMed

Huynh, Linh; Tagkopoulos, Ilias

2015-08-21

In computer-aided biological design, the trifecta of characterized part libraries, accurate models and optimal design parameters is crucial for producing reliable designs. As the number of parts and model complexity increase, however, it becomes exponentially more difficult for any optimization method to search the solution space, hence creating a trade-off that hampers efficient design. To address this issue, we present a hierarchical computer-aided design architecture that uses a two-step approach for biological design. First, a simple model of low computational complexity is used to predict circuit behavior and assess candidate circuit branches through branch-and-bound methods. Then, a complex, nonlinear circuit model is used for a fine-grained search of the reduced solution space, thus achieving more accurate results. Evaluation with a benchmark of 11 circuits and a library of 102 experimental designs with known characterization parameters demonstrates a speed-up of 3 orders of magnitude when compared to other design methods that provide optimality guarantees.

DESIGN METHODOLOGIES AND TOOLS FOR SINGLE-FLUX QUANTUM LOGIC CIRCUITS

DTIC Science & Technology

2017-10-01

DESIGN METHODOLOGIES AND TOOLS FOR SINGLE-FLUX QUANTUM LOGIC CIRCUITS UNIVERSITY OF SOUTHERN CALIFORNIA OCTOBER 2017 FINAL...SUBTITLE DESIGN METHODOLOGIES AND TOOLS FOR SINGLE-FLUX QUANTUM LOGIC CIRCUITS 5a. CONTRACT NUMBER FA8750-15-C-0203 5b. GRANT NUMBER N/A 5c. PROGRAM...of this project was to investigate the state-of-the-art in design and optimization of single-flux quantum (SFQ) logic circuits, e.g., RSFQ and ERSFQ

Computer-aided design of large-scale integrated circuits - A concept

NASA Technical Reports Server (NTRS)

Schansman, T. T.

1971-01-01

Circuit design and mask development sequence are improved by using general purpose computer with interactive graphics capability establishing efficient two way communications link between design engineer and system. Interactive graphics capability places design engineer in direct control of circuit development.

Biomedically relevant circuit-design strategies in mammalian synthetic biology

PubMed Central

Bacchus, William; Aubel, Dominique; Fussenegger, Martin

2013-01-01

The development and progress in synthetic biology has been remarkable. Although still in its infancy, synthetic biology has achieved much during the past decade. Improvements in genetic circuit design have increased the potential for clinical applicability of synthetic biology research. What began as simple transcriptional gene switches has rapidly developed into a variety of complex regulatory circuits based on the transcriptional, translational and post-translational regulation. Instead of compounds with potential pharmacologic side effects, the inducer molecules now used are metabolites of the human body and even members of native cell signaling pathways. In this review, we address recent progress in mammalian synthetic biology circuit design and focus on how novel designs push synthetic biology toward clinical implementation. Groundbreaking research on the implementation of optogenetics and intercellular communications is addressed, as particularly optogenetics provides unprecedented opportunities for clinical application. Along with an increase in synthetic network complexity, multicellular systems are now being used to provide a platform for next-generation circuit design. PMID:24061539

A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

ERIC Educational Resources Information Center

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

On Polymorphic Circuits and Their Design Using Evolutionary Algorithms

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo; Keymeulen, Didier; Lohn, Jason; Clancy, Daniel (Technical Monitor)

2002-01-01

This paper introduces the concept of polymorphic electronics (polytronics) - referring to electronics with superimposed built-in functionality. A function change does not require switches/reconfiguration as in traditional approaches. Instead the change comes from modifications in the characteristics of devices involved in the circuit, in response to controls such as temperature, power supply voltage (VDD), control signals, light, etc. The paper illustrates polytronic circuits in which the control is done by temperature, morphing signals, and VDD respectively. Polytronic circuits are obtained by evolutionary design/evolvable hardware techniques. These techniques are ideal for the polytronics design, a new area that lacks design guidelines, know-how,- yet the requirements/objectives are easy to specify and test. The circuits are evolved/synthesized in two different modes. The first mode explores an unstructured space, in which transistors can be interconnected freely in any arrangement (in simulations only). The second mode uses a Field Programmable Transistor Array (FPTA) model, and the circuit topology is sought as a mapping onto a programmable architecture (these experiments are performed both in simulations and on FPTA chips). The experiments demonstrated the synthesis. of polytronic circuits by evolution. The capacity of storing/hiding "extra" functions provides for watermark/invisible functionality, thus polytronics may find uses in intelligence/security applications.

A design of driving circuit for star sensor imaging camera

NASA Astrophysics Data System (ADS)

Li, Da-wei; Yang, Xiao-xu; Han, Jun-feng; Liu, Zhao-hui

2016-01-01

The star sensor is a high-precision attitude sensitive measuring instruments, which determine spacecraft attitude by detecting different positions on the celestial sphere. Imaging camera is an important portion of star sensor. The purpose of this study is to design a driving circuit based on Kodak CCD sensor. The design of driving circuit based on Kodak KAI-04022 is discussed, and the timing of this CCD sensor is analyzed. By the driving circuit testing laboratory and imaging experiments, it is found that the driving circuits can meet the requirements of Kodak CCD sensor.

Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Design and analysis of APD photoelectric detecting circuit

NASA Astrophysics Data System (ADS)

Fang, R.; Wang, C.

2015-11-01

In LADAR system, photoelectric detecting circuit is the key part in photoelectric conversion, which determines speed of respond, sensitivity and fidelity of the system. This paper presents the design of a matched APD Photoelectric detecting circuit. The circuit accomplishes low-noise readout and high-gain amplification of the weak photoelectric signal. The main performances, especially noise and transient response of the circuit are analyzed. In order to obtain large bandwidth, decompensated operational amplifiers are applied. Circuit simulations allow the architecture validation and the global performances to be predicted. The simulation results show that the gain of the detecting circuit is 630kΩ while the bandwidth is 100MHz, and 28dB dynamic range is achieved. Furthermore, the variation of the output pulse width is less than 0.9ns.

Representation and design of wavelets using unitary circuits

NASA Astrophysics Data System (ADS)

Evenbly, Glen; White, Steven R.

2018-05-01

The representation of discrete, compact wavelet transformations (WTs) as circuits of local unitary gates is discussed. We employ a similar formalism as used in the multiscale representation of quantum many-body wave functions using unitary circuits, further cementing the relation established in the literature between classical and quantum multiscale methods. An algorithm for constructing the circuit representation of known orthogonal, dyadic, discrete WTs is presented, and the explicit representation for Daubechies wavelets, coiflets, and symlets is provided. Furthermore, we demonstrate the usefulness of the circuit formalism in designing WTs, including various classes of symmetric wavelets and multiwavelets, boundary wavelets, and biorthogonal wavelets.

Nucleic acids for the rational design of reaction circuits.

PubMed

Padirac, Adrien; Fujii, Teruo; Rondelez, Yannick

2013-08-01

Nucleic acid-based circuits are rationally designed in vitro assemblies that can perform complex preencoded programs. They can be used to mimic in silico computations. Recent works emphasized the modularity and robustness of these circuits, which allow their scaling-up. Another new development has led to dynamic, time-responsive systems that can display emergent behaviors like oscillations. These are closely related to biological architectures and provide an in vitro model of in vivo information processing. Nucleic acid circuits have already been used to handle various processes for technological or biotechnological purposes. Future applications of these chemical smart systems will benefit from the rapidly growing ability to design, construct, and model nucleic acid circuits of increasing size. Copyright © 2012 Elsevier Ltd. All rights reserved.

DESIGN OF CIRCUITS FOR THE PATTERN ARTICULATION UNIT. Report No. 127

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, K.C.

1962-08-31

The Pattern Articulation Unit embodies a central core of 1024 identical processing modules called stalactites'' arranged in a two-dimensional array with only local connectivity. Two possible complete circuit realizations of the stalactite are described. Stalactites of either design contain about 50 transistors, 250 diodes, 250 resistors, and 50 capacitors. Stalactite organization, signal flow, the bubbling register connection, the requirements of a working register, design of stacking logic, mode of operation, circuit design, direct and conditional input, design of bubbling logic, complement circuits, output and circuit, up and down drivers, and cable diivers and terminators are described. Experimental verification of variousmore » components is discussed. (M.C.G.)« less

Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Pulse Detecting Genetic Circuit – A New Design Approach

PubMed Central

Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C.

2016-01-01

A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse–analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event. PMID:27907045

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

PubMed Central

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-01-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design. PMID:28145438

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

NASA Astrophysics Data System (ADS)

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-02-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design.

Compiler-aided systematic construction of large-scale DNA strand displacement circuits using unpurified components

NASA Astrophysics Data System (ADS)

Thubagere, Anupama J.; Thachuk, Chris; Berleant, Joseph; Johnson, Robert F.; Ardelean, Diana A.; Cherry, Kevin M.; Qian, Lulu

2017-02-01

Biochemical circuits made of rationally designed DNA molecules are proofs of concept for embedding control within complex molecular environments. They hold promise for transforming the current technologies in chemistry, biology, medicine and material science by introducing programmable and responsive behaviour to diverse molecular systems. As the transformative power of a technology depends on its accessibility, two main challenges are an automated design process and simple experimental procedures. Here we demonstrate the use of circuit design software, combined with the use of unpurified strands and simplified experimental procedures, for creating a complex DNA strand displacement circuit that consists of 78 distinct species. We develop a systematic procedure for overcoming the challenges involved in using unpurified DNA strands. We also develop a model that takes synthesis errors into consideration and semi-quantitatively reproduces the experimental data. Our methods now enable even novice researchers to successfully design and construct complex DNA strand displacement circuits.

A Parallel Genetic Algorithm for Automated Electronic Circuit Design

NASA Technical Reports Server (NTRS)

Long, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris

2000-01-01

Parallelized versions of genetic algorithms (GAs) are popular primarily for three reasons: the GA is an inherently parallel algorithm, typical GA applications are very compute intensive, and powerful computing platforms, especially Beowulf-style computing clusters, are becoming more affordable and easier to implement. In addition, the low communication bandwidth required allows the use of inexpensive networking hardware such as standard office ethernet. In this paper we describe a parallel GA and its use in automated high-level circuit design. Genetic algorithms are a type of trial-and-error search technique that are guided by principles of Darwinian evolution. Just as the genetic material of two living organisms can intermix to produce offspring that are better adapted to their environment, GAs expose genetic material, frequently strings of 1s and Os, to the forces of artificial evolution: selection, mutation, recombination, etc. GAs start with a pool of randomly-generated candidate solutions which are then tested and scored with respect to their utility. Solutions are then bred by probabilistically selecting high quality parents and recombining their genetic representations to produce offspring solutions. Offspring are typically subjected to a small amount of random mutation. After a pool of offspring is produced, this process iterates until a satisfactory solution is found or an iteration limit is reached. Genetic algorithms have been applied to a wide variety of problems in many fields, including chemistry, biology, and many engineering disciplines. There are many styles of parallelism used in implementing parallel GAs. One such method is called the master-slave or processor farm approach. In this technique, slave nodes are used solely to compute fitness evaluations (the most time consuming part). The master processor collects fitness scores from the nodes and performs the genetic operators (selection, reproduction, variation, etc.). Because of dependency

Simplify Web Development for Faculty and Promote Instructional Design.

ERIC Educational Resources Information Center

Pedersen, David C.

Faculty members are often overwhelmed with the prospect of implementing Web-based instruction. In an effort to simplify the process and incorporate some basic instructional design elements, the Educational Technology Team at Embry Riddle Aeronautical University created a course template for WebCT. Utilizing rapid prototyping, the template…

Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

PubMed

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...

30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2011 CFR

2011-07-01

... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...

30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2013 CFR

2013-07-01

... 30 Mineral Resources 1 2013-07-01 2013-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...

30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2012 CFR

2012-07-01

... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...

30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2014 CFR

2014-07-01

... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...

Design techniques for low-voltage analog integrated circuits

NASA Astrophysics Data System (ADS)

Rakús, Matej; Stopjaková, Viera; Arbet, Daniel

2017-08-01

In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.

Multistability in Chua's circuit with two stable node-foci

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bao, B. C.; Wang, N.; Xu, Q.

2016-04-15

Only using one-stage op-amp based negative impedance converter realization, a simplified Chua's diode with positive outer segment slope is introduced, based on which an improved Chua's circuit realization with more simpler circuit structure is designed. The improved Chua's circuit has identical mathematical model but completely different nonlinearity to the classical Chua's circuit, from which multiple attractors including coexisting point attractors, limit cycle, double-scroll chaotic attractor, or coexisting chaotic spiral attractors are numerically simulated and experimentally captured. Furthermore, with dimensionless Chua's equations, the dynamical properties of the Chua's system are studied including equilibrium and stability, phase portrait, bifurcation diagram, Lyapunov exponentmore » spectrum, and attraction basin. The results indicate that the system has two symmetric stable nonzero node-foci in global adjusting parameter regions and exhibits the unusual and striking dynamical behavior of multiple attractors with multistability.« less

Local Random Quantum Circuits are Approximate Polynomial-Designs

NASA Astrophysics Data System (ADS)

Brandão, Fernando G. S. L.; Harrow, Aram W.; Horodecki, Michał

2016-09-01

We prove that local random quantum circuits acting on n qubits composed of O( t 10 n 2) many nearest neighbor two-qubit gates form an approximate unitary t-design. Previously it was unknown whether random quantum circuits were a t-design for any t > 3. The proof is based on an interplay of techniques from quantum many-body theory, representation theory, and the theory of Markov chains. In particular we employ a result of Nachtergaele for lower bounding the spectral gap of frustration-free quantum local Hamiltonians; a quasi-orthogonality property of permutation matrices; a result of Oliveira which extends to the unitary group the path-coupling method for bounding the mixing time of random walks; and a result of Bourgain and Gamburd showing that dense subgroups of the special unitary group, composed of elements with algebraic entries, are ∞-copy tensor-product expanders. We also consider pseudo-randomness properties of local random quantum circuits of small depth and prove that circuits of depth O( t 10 n) constitute a quantum t-copy tensor-product expander. The proof also rests on techniques from quantum many-body theory, in particular on the detectability lemma of Aharonov, Arad, Landau, and Vazirani. We give applications of the results to cryptography, equilibration of closed quantum dynamics, and the generation of topological order. In particular we show the following pseudo-randomness property of generic quantum circuits: Almost every circuit U of size O( n k ) on n qubits cannot be distinguished from a Haar uniform unitary by circuits of size O( n ( k-9)/11) that are given oracle access to U.

Servo Platform Circuit Design of Pendulous Gyroscope Based on DSP

NASA Astrophysics Data System (ADS)

Tan, Lilong; Wang, Pengcheng; Zhong, Qiyuan; Zhang, Cui; Liu, Yunfei

2018-03-01

In order to solve the problem when a certain type of pendulous gyroscope in the initial installation deviation more than 40 degrees, that the servo platform can not be up to the speed of the gyroscope in the rough north seeking phase. This paper takes the digital signal processor TMS320F28027 as the core, uses incremental digital PID algorithm, carries out the circuit design of the servo platform. Firstly, the hardware circuit is divided into three parts: DSP minimum system, motor driving circuit and signal processing circuit, then the mathematical model of incremental digital PID algorithm is established, based on the model, writes the PID control program in CCS3.3, finally, the servo motor tracking control experiment is carried out, it shows that the design can significantly improve the tracking ability of the servo platform, and the design has good engineering practice.

[Design of blood-pressure parameter auto-acquisition circuit].

PubMed

Chen, Y P; Zhang, D L; Bai, H W; Zhang, D A

2000-02-01

This paper presents the realization and design of a kind of blood-pressure parameter auto-acquisition circuit. The auto-acquisition of blood-pressure parameter controlled by 89C2051 single chip microcomputer is accomplished by collecting and processing the driving signal of LCD. The circuit that is successfully applied in the home unit of telemedicine system has the simple and reliable properties.

Design of An Energy Efficient Hydraulic Regenerative circuit

NASA Astrophysics Data System (ADS)

Ramesh, S.; Ashok, S. Denis; Nagaraj, Shanmukha; Adithyakumar, C. R.; Reddy, M. Lohith Kumar; Naulakha, Niranjan Kumar

2018-02-01

Increasing cost and power demand, leads to evaluation of new method to increase through productivity and help to solve the power demands. Many researchers have break through to increase the efficiency of a hydraulic power pack, one of the promising methods is the concept of regenerative. The objective of this research work is to increase the efficiency of a hydraulic circuit by introducing a concept of regenerative circuit. A Regenerative circuit is a system that is used to speed up the extension stroke of the double acting single rod hydraulic cylinder. The output is connected to the input in the directional control value. By this concept, increase in velocity of the piston and decrease the cycle time. For the research, a basic hydraulic circuit and a regenerative circuit are designated and compared both with their results. The analysis was based on their time taken for extension and retraction of the piston. From the detailed analysis of both the hydraulic circuits, it is found that the efficiency by introducing hydraulic regenerative circuit increased by is 5.3%. The obtained results conclude that, implementing hydraulic regenerative circuit in a hydraulic power pack decreases power consumption, reduces cycle time and increases productivity in a longer run.

Circuit Design Features of a Stable Two-Cell System.

PubMed

Zhou, Xu; Franklin, Ruth A; Adler, Miri; Jacox, Jeremy B; Bailis, Will; Shyer, Justin A; Flavell, Richard A; Mayo, Avi; Alon, Uri; Medzhitov, Ruslan

2018-02-08

Cell communication within tissues is mediated by multiple paracrine signals including growth factors, which control cell survival and proliferation. Cells and the growth factors they produce and receive constitute a circuit with specific properties that ensure homeostasis. Here, we used computational and experimental approaches to characterize the features of cell circuits based on growth factor exchange between macrophages and fibroblasts, two cell types found in most mammalian tissues. We found that the macrophage-fibroblast cell circuit is stable and robust to perturbations. Analytical screening of all possible two-cell circuit topologies revealed the circuit features sufficient for stability, including environmental constraint and negative-feedback regulation. Moreover, we found that cell-cell contact is essential for the stability of the macrophage-fibroblast circuit. These findings illustrate principles of cell circuit design and provide a quantitative perspective on cell interactions. Copyright © 2018 Elsevier Inc. All rights reserved.

Electromagnetic Compatibility Design of the Computer Circuits

NASA Astrophysics Data System (ADS)

Zitai, Hong

2018-02-01

Computers and the Internet have gradually penetrated into every aspect of people’s daily work. But with the improvement of electronic equipment as well as electrical system, the electromagnetic environment becomes much more complex. Electromagnetic interference has become an important factor to hinder the normal operation of electronic equipment. In order to analyse the computer circuit compatible with the electromagnetic compatibility, this paper starts from the computer electromagnetic and the conception of electromagnetic compatibility. And then, through the analysis of the main circuit and system of computer electromagnetic compatibility problems, we can design the computer circuits in term of electromagnetic compatibility. Finally, the basic contents and methods of EMC test are expounded in order to ensure the electromagnetic compatibility of equipment.

Design of pressure-driven microfluidic networks using electric circuit analogy.

PubMed

Oh, Kwang W; Lee, Kangsun; Ahn, Byungwook; Furlani, Edward P

2012-02-07

This article reviews the application of electric circuit methods for the analysis of pressure-driven microfluidic networks with an emphasis on concentration- and flow-dependent systems. The application of circuit methods to microfluidics is based on the analogous behaviour of hydraulic and electric circuits with correlations of pressure to voltage, volumetric flow rate to current, and hydraulic to electric resistance. Circuit analysis enables rapid predictions of pressure-driven laminar flow in microchannels and is very useful for designing complex microfluidic networks in advance of fabrication. This article provides a comprehensive overview of the physics of pressure-driven laminar flow, the formal analogy between electric and hydraulic circuits, applications of circuit theory to microfluidic network-based devices, recent development and applications of concentration- and flow-dependent microfluidic networks, and promising future applications. The lab-on-a-chip (LOC) and microfluidics community will gain insightful ideas and practical design strategies for developing unique microfluidic network-based devices to address a broad range of biological, chemical, pharmaceutical, and other scientific and technical challenges.

Expediting analog design retargeting by design knowledge re-use and circuit synthesis: a practical example on a Delta-Sigma modulator

NASA Astrophysics Data System (ADS)

Webb, Matthew; Tang, Hua

2016-08-01

In the past decade or two, due to constant and rapid technology changes, analog design re-use or design retargeting to newer technologies has been brought to the table in order to expedite the design process and improve time-to-market. If properly conducted, analog design retargeting could significantly cut down design cycle compared to designs starting from the scratch. In this article, we present an empirical and general method for efficient analog design retargeting by design knowledge re-use and circuit synthesis (CS). The method first identifies circuit blocks that compose the source system and extracts the performance parameter specifications of each circuit block. Then, for each circuit block, it scales the values of design variables (DV) from the source design to derive an initial design in the target technology. Depending on the performance of this initial target design, a design space is defined for synthesis. Subsequently, each circuit block is automatically synthesised using state-of-art analog synthesis tools based on a combination of global and local optimisation techniques to achieve comparable performance specifications to those extracted from the source system. Finally, the overall system is composed of those synthesised circuit blocks in the target technology. We illustrate the method using a practical example of a complex Delta-Sigma modulator (DSM) circuit.

Computer-Aided Design of Low-Noise Microwave Circuits

NASA Astrophysics Data System (ADS)

Wedge, Scott William

1991-02-01

Devoid of most natural and manmade noise, microwave frequencies have detection sensitivities limited by internally generated receiver noise. Low-noise amplifiers are therefore critical components in radio astronomical antennas, communications links, radar systems, and even home satellite dishes. A general technique to accurately predict the noise performance of microwave circuits has been lacking. Current noise analysis methods have been limited to specific circuit topologies or neglect correlation, a strong effect in microwave devices. Presented here are generalized methods, developed for computer-aided design implementation, for the analysis of linear noisy microwave circuits comprised of arbitrarily interconnected components. Included are descriptions of efficient algorithms for the simultaneous analysis of noisy and deterministic circuit parameters based on a wave variable approach. The methods are therefore particularly suited to microwave and millimeter-wave circuits. Noise contributions from lossy passive components and active components with electronic noise are considered. Also presented is a new technique for the measurement of device noise characteristics that offers several advantages over current measurement methods.

Design of remote laser-induced fluorescence system's acquisition circuit

NASA Astrophysics Data System (ADS)

Wang, Guoqing; Lou, Yue; Wang, Ran; Yan, Debao; Li, Xin; Zhao, Xin; Chen, Dong; Zhao, Qi

2017-10-01

Laser-induced fluorescence system(LIfS) has been found its significant application in identifying one kind of substance from another by its properties even it's thimbleful, and becomes useful in plenty of fields. Many superior works have reported LIfS' theoretical analysis , designs and uses. However, the usual LIPS is always constructed in labs to detect matter quite closely, for the system using low-power laser as excitation source and charge coupled device (CCD) as detector. Promoting the detectivity of LIfS is of much concern to spread its application. Here, we take a high-energy narrow-pulse laser instead of commonly used continuous wave laser to operate sample, thus we can get strong fluorescent. Besides, photomultiplier (PMT) with high sensitivity is adopted in our system to detect extremely weak fluorescence after a long flight time from the sample to the detector. Another advantage in our system, as the fluorescence collected into spectroscopy, multiple wavelengths of light can be converted to the corresponding electrical signals with the linear array multichannel PMT. Therefore, at the cost of high-powered incentive and high-sensitive detector, a remote LIFS is get. In order to run this system, it is of importance to turn light signal to digital signal which can be processed by computer. The pulse width of fluorescence is deeply associated with excitation laser, at the nanosecond(ns) level, which has a high demand for acquisition circuit. We design an acquisition circuit including, I/V conversion circuit, amplifying circuit and peak-holding circuit. The simulation of circuit shows that peak-holding circuit can be one effective approach to reducing difficulty of acquisition circuit.

Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

A novel surrogate-based approach for optimal design of electromagnetic-based circuits

NASA Astrophysics Data System (ADS)

Hassan, Abdel-Karim S. O.; Mohamed, Ahmed S. A.; Rabie, Azza A.; Etman, Ahmed S.

2016-02-01

A new geometric design centring approach for optimal design of central processing unit-intensive electromagnetic (EM)-based circuits is introduced. The approach uses norms related to the probability distribution of the circuit parameters to find distances from a point to the feasible region boundaries by solving nonlinear optimization problems. Based on these normed distances, the design centring problem is formulated as a max-min optimization problem. A convergent iterative boundary search technique is exploited to find the normed distances. To alleviate the computation cost associated with the EM-based circuits design cycle, space-mapping (SM) surrogates are used to create a sequence of iteratively updated feasible region approximations. In each SM feasible region approximation, the centring process using normed distances is implemented, leading to a better centre point. The process is repeated until a final design centre is attained. Practical examples are given to show the effectiveness of the new design centring method for EM-based circuits.

A Simple Model of Circuit Design.

DTIC Science & Technology

1980-05-01

mathematicians who discover mathematical ideas (i.cnat>, programmers who write code <Manna> <Barstow>, physicists who solve mechanics problems <de Kiecr-l...rules and shows how - they result in the design of circuits. ’l’he design rules must not only capture the purely mathematical constralints given by VICs...K VI.. *? and KCI, but also how those constraints can implement mechanism. Mathematical constraints tell us an amplifier’s input and output voltages

Design, Fabrication and Integration of a NaK-Cooled Circuit

NASA Technical Reports Server (NTRS)

Garber, Anne; Godfroy, Thomas

2006-01-01

The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed for use with a eutectic mixture of sodium potassium (NaK), was redesigned to for use with lithium. Due to a shi$ in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature circuit include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a fill design) was selected for fabrication and test. This paper summarizes the integration and preparations for the fill of the pumped liquid metal NaK flow circuit.

Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

IODC 1998 Lens Design Problem Revisited: A Strategy for Simplifying Glass Choices in an Apochromatic Design

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seppala, L G

2000-09-15

A glass-choice strategy, based on separately designing an achromatic lens before progressing to an apochromatic lens, simplified my approach to solving the International Optical Design Conference (IODC) 1998 lens design problem. The glasses that are needed to make the lens apochromatic are combined into triplet correctors with two ''buried'' surfaces. By applying this strategy, I reached successful solutions that used only six glasses--three glasses for the achromatic design and three additional glasses for the apochromatic design.

A New Automated Design Method Based on Machine Learning for CMOS Analog Circuits

NASA Astrophysics Data System (ADS)

Moradi, Behzad; Mirzaei, Abdolreza

2016-11-01

A new simulation based automated CMOS analog circuit design method which applies a multi-objective non-Darwinian-type evolutionary algorithm based on Learnable Evolution Model (LEM) is proposed in this article. The multi-objective property of this automated design of CMOS analog circuits is governed by a modified Strength Pareto Evolutionary Algorithm (SPEA) incorporated in the LEM algorithm presented here. LEM includes a machine learning method such as the decision trees that makes a distinction between high- and low-fitness areas in the design space. The learning process can detect the right directions of the evolution and lead to high steps in the evolution of the individuals. The learning phase shortens the evolution process and makes remarkable reduction in the number of individual evaluations. The expert designer's knowledge on circuit is applied in the design process in order to reduce the design space as well as the design time. The circuit evaluation is made by HSPICE simulator. In order to improve the design accuracy, bsim3v3 CMOS transistor model is adopted in this proposed design method. This proposed design method is tested on three different operational amplifier circuits. The performance of this proposed design method is verified by comparing it with the evolutionary strategy algorithm and other similar methods.

Designable DNA-binding domains enable construction of logic circuits in mammalian cells.

PubMed

Gaber, Rok; Lebar, Tina; Majerle, Andreja; Šter, Branko; Dobnikar, Andrej; Benčina, Mojca; Jerala, Roman

2014-03-01

Electronic computer circuits consisting of a large number of connected logic gates of the same type, such as NOR, can be easily fabricated and can implement any logic function. In contrast, designed genetic circuits must employ orthogonal information mediators owing to free diffusion within the cell. Combinatorial diversity and orthogonality can be provided by designable DNA- binding domains. Here, we employed the transcription activator-like repressors to optimize the construction of orthogonal functionally complete NOR gates to construct logic circuits. We used transient transfection to implement all 16 two-input logic functions from combinations of the same type of NOR gates within mammalian cells. Additionally, we present a genetic logic circuit where one input is used to select between an AND and OR function to process the data input using the same circuit. This demonstrates the potential of designable modular transcription factors for the construction of complex biological information-processing devices.

Design and implementation of a simple acousto optic dual control circuit

NASA Astrophysics Data System (ADS)

Li, Biqing; Li, Zhao

2017-04-01

This page proposed a simple light control circuit which designed by using power supply circuit, sonic circuits, electric circuit and delay circuit four parts. The main chip for CD4011, have inside of the four and to complete the sonic or circuit, electric, delay logic circuit. During the day, no matter how much a pedestrian voice, is ever shine light bulb. Dark night, circuit in a body to make the microphone as long as testing noise, and will automatically be bright for pedestrians lighting, several minutes after the automatic and put out, effective energy saving. Applicable scope and the working principle of the circuit principle diagram and given device parameters selection, power saving effect is obvious, at the same time greatly reduce the maintenance quantity, saving money, use effect is good.

Design of synthetic biological logic circuits based on evolutionary algorithm.

PubMed

Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei

2013-08-01

The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.

Energy efficient circuit design using nanoelectromechanical relays

NASA Astrophysics Data System (ADS)

Venkatasubramanian, Ramakrishnan

Nano-electromechanical (NEM) relays are a promising class of emerging devices that offer zero off-state leakage and behave like an ideal switch. Recent advances in planar fabrication technology have demonstrated that microelectromechanical (MEMS) scale miniature relays could be manufactured reliably and could be used to build fully functional, complex integrated circuits. The zero leakage operation of relays has renewed the interest in relay based low power logic design. This dissertation explores circuit architectures using NEM relays and NEMS-CMOS heterogeneous integration. Novel circuit topologies for sequential logic, memory, and power management circuits have been proposed taking into consideration the NEM relay device properties and optimizing for energy efficiency and area. In nanoscale electromechanical devices, dispersion forces like Van der Waals' force (vdW) affect the pull-in stability of the relay devices significantly. Verilog-A electromechanical model of the suspended gate relay operating at 1V with a nominal air gap of 5 - 10nm has been developed taking into account all the electrical, mechanical and dispersion effects. This dissertation explores different relay based latch and flip-flop topologies. It has been shown that as few as 4 relay cells could be used to build flip-flops. An integrated voltage doubler based flip flop that improves the performance by 2X by overdriving Vgb has been proposed. Three NEM relay based parallel readout memory bitcell architectures have been proposed that have faster access time, and remove the reliability issues associated with previously reported serial readout architectures. A paradigm shift in design of power switches using NEM relays is proposed. An interesting property of the relay device is that the ON state resistance (Ron) of the NEM relay switch is constant and is insensitive to the gate slew rate. This coupled with infinite OFF state resistance (Roff ) offers significant area and power advantages over CMOS

Design and implementation of JOM-3 Overhauser magnetometer analog circuit

NASA Astrophysics Data System (ADS)

Zhang, Xiao; Jiang, Xue; Zhao, Jianchang; Zhang, Shuang; Guo, Xin; Zhou, Tingting

2017-09-01

Overhauser magnetometer, a kind of static-magnetic measurement system based on the Overhauser effect, has been widely used in archaeological exploration, mineral resources exploration, oil and gas basin structure detection, prediction of engineering exploration environment, earthquakes and volcanic eruotions, object magnetic measurement and underground buried booty exploration. Overhauser magnetometer plays an important role in the application of magnetic field measurement for its characteristics of small size, low power consumption and high sensitivity. This paper researches the design and the application of the analog circuit of JOM-3 Overhauser magnetometer. First, the Larmor signal output by the probe is very weak. In order to obtain the signal with high signal to noise rstio(SNR), the design of pre-amplifier circuit is the key to improve the quality of the system signal. Second, in this paper, the effectual step which could improve the frequency characters of bandpass filter amplifier circuit were put forward, and theoretical analysis was made for it. Third, the shaping circuit shapes the amplified sine signal into a square wave signal which is suitable for detecting the rising edge. Fourth, this design elaborated the optimized choice of tuning circuit, so the measurement range of the magnetic field can be covered. Last, integrated analog circuit testing system was formed to detect waveform of each module. By calculating the standard deviation, the sensitivity of the improved Overhauser magnetometer is 0.047nT for Earth's magnetic field observation. Experimental results show that the new magnetometer is sensitive to earth field measurement.

Function-Oriented Synthesis: How to Design Simplified Analogues of Antibacterial Nucleoside Natural Products?

PubMed

Ichikawa, Satoshi

2016-06-01

It is important to pursue function-oriented synthesis (FOS), a strategy for the design of less structurally complex targets with comparable or superior activity that can be made in a practical manner, because compared to synthetic drugs, many biologically relevant natural products possess large and complex chemical structures that may restrict chemical modifications in a structure-activity relationship study. In this account, we describe recent efforts to simplify complex nucleoside natural products including caprazamycins. Considering the structure-activity relationship study with several truncated analogues, three types of simplified derivatives, namely, oxazolidine, isoxazolidine, and lactam-fused isoxazolidine-containing uridine derivatives, were designed and efficiently synthesized. These simplified derivatives have exhibited promising antibacterial activities. A significant feature of our studies is the rational and drastic simplification of the molecular architecture of caprazamycins. This study provides a novel strategy for the development of a new type of antibacterial agent effective against drug-resistant bacteria. © 2016 The Chemical Society of Japan & Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Automated ILA design for synchronous sequential circuits

NASA Technical Reports Server (NTRS)

Liu, M. N.; Liu, K. Z.; Maki, G. K.; Whitaker, S. R.

1991-01-01

An iterative logic array (ILA) architecture for synchronous sequential circuits is presented. This technique utilizes linear algebra to produce the design equations. The ILA realization of synchronous sequential logic can be fully automated with a computer program. A programmable design procedure is proposed to fullfill the design task and layout generation. A software algorithm in the C language has been developed and tested to generate 1 micron CMOS layouts using the Hewlett-Packard FUNGEN module generator shell.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1989-05-01

The objectives of this research are to develop analytical and computer aided design techniques for monolithic microwave and millimeter wave integrated circuits (MMIC and MIMIC) and subsystems and to design and fabricate those ICs. Emphasis was placed on heterojunction-based devices, especially the High Electron Mobility Transition (HEMT), for both low noise and medium power microwave and millimeter wave applications. Circuits to be considered include monolithic low noise amplifiers, power amplifiers, and distributed and feedback amplifiers. Interactive computer aided design programs were developed, which include large signal models of InP MISFETs and InGaAs HEMTs. Further, a new unconstrained optimization algorithm POSM was developed and implemented in the general Analysis and Design program for Integrated Circuit (ADIC) for assistance in the design of largesignal nonlinear circuits.

CIRCAL-2 - General-purpose on-line circuit design.

NASA Technical Reports Server (NTRS)

Dertouzos, M. L.; Jessel, G. P.; Stinger, J. R.

1972-01-01

CIRCAL-2 is a second-generation general-purpose on-line circuit-design program with the following main features: (1) multiple-analysis capability; (2) uniform and general data structures for handling text editing, network representations, and output results, regardless of analysis; (3) special techniques and structures for minimizing and controlling user-program interaction; (4) use of functionals for the description of hysteresis and heat effects; and (5) ability to define optimization procedures that 'replace' the user. The paper discusses the organization of CIRCAL-2, the aforementioned main features, and their consequences, such as a set of network elements and models general enough for most analyses and a set of functions tailored to circuit-design requirements. The presentation is descriptive, concentrating on conceptual rather than on program implementation details.

Area efficient layout design of CMOS circuit for high-density ICs

NASA Astrophysics Data System (ADS)

Mishra, Vimal Kumar; Chauhan, R. K.

2018-01-01

Efficient layouts have been an active area of research to accommodate the greater number of devices fabricated on a given chip area. In this work a new layout of CMOS circuit is proposed, with an aim to improve its electrical performance and reduce the chip area consumed. The study shows that the design of CMOS circuit and SRAM cells comprising tapered body reduced source fully depleted silicon on insulator (TBRS FD-SOI)-based n- and p-type MOS devices. The proposed TBRS FD-SOI n- and p-MOSFET exhibits lower sub-threshold slope and higher Ion to Ioff ratio when compared with FD-SOI MOSFET and FinFET technology. Other parameters like power dissipation, delay time and signal-to-noise margin of CMOS inverter circuits show improvement when compared with available inverter designs. The above device design is used in 6-T SRAM cell so as to see the effect of proposed layout on high density integrated circuits (ICs). The SNM obtained from the proposed SRAM cell is 565 mV which is much better than any other SRAM cell designed at 50 nm gate length MOS device. The Sentaurus TCAD device simulator is used to design the proposed MOS structure.

Design of an improved RCD buffer circuit for full bridge circuit

NASA Astrophysics Data System (ADS)

Yang, Wenyan; Wei, Xueye; Du, Yongbo; Hu, Liang; Zhang, Liwei; Zhang, Ou

2017-05-01

In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubber circuit with the improved RCD snubber circuit. By comparing and analyzing, it is proved that the improved buffer circuit can absorb surge voltage. Finally, experiments are demonstrated to validate that the correctness of the RC formula and the improved RCD snubber circuit.

System Guidelines for EMC Safety-Critical Circuits: Design, Selection, and Margin Demonstration

NASA Technical Reports Server (NTRS)

Lawton, R. M.

1996-01-01

Demonstration of required safety margins on critical electrical/electronic circuits in large complex systems has become an implementation and cost problem. These margins are the difference between the activation level of the circuit and the electrical noise on the circuit in the actual operating environment. This document discusses the origin of the requirement and gives a detailed process flow for the identification of the system electromagnetic compatibility (EMC) critical circuit list. The process flow discusses the roles of engineering disciplines such as systems engineering, safety, and EMC. Design and analysis guidelines are provided to assist the designer in assuring the system design has a high probability of meeting the margin requirements. Examples of approaches used on actual programs (Skylab and Space Shuttle Solid Rocket Booster) are provided to show how variations of the approach can be used successfully.

Exploration and design of smart home circuit based on ZigBee

NASA Astrophysics Data System (ADS)

Luo, Huirong

2018-05-01

To apply ZigBee technique in smart home circuit design, in the hardware design link of ZigBee node, TI Company's ZigBee wireless communication chip CC2530 was used to complete the design of ZigBee RF module circuit and peripheral circuit. In addition, the function demand and the overall scheme of the intelligent system based on smart home furnishing were proposed. Finally, the smart home system was built by combining ZigBee network and intelligent gateway. The function realization, reliability and power consumption of ZigBee network were tested. The results showed that ZigBee technology was applied to smart home system, making it have some advantages in terms of flexibility, scalability, power consumption and indoor aesthetics. To sum up, the system has high application value.

Design of Timer Circuit for Dynamic Data System

NASA Technical Reports Server (NTRS)

Young, Nathaniel, III

2004-01-01

The Branch That I work in is in the Aero Electronic Test Branch, which is part of the Research and Testing Division. The Aero Electronic Test Branch deals with electronic control and instrumentation systems. This branch supports the research and test study of wind tunnels such as the l0x10,9x15, and 8x6. Wind tunnels are used in research to test certain parts of a jet, plane, shuttle or any other flying object in certain test conditions. My assignment is to design a programmable trigger circuit on a 19 standard rack mount that will allow the circuit to latch and hold for a predefined amount of time entered by the user when receiving a signal. It should then re-arm itself within 0.25 seconds after the time is finished. The time should be able to be seen on a display showing the time entered. The time range has to be from 0-600 seconds in 0.01 second increments (600.00). From the information given, counters will be needed to design and build this circuit. A counter, in it s simplest form, is a group of flip flops that can temporarily store bits of information put into the circuit. They can be constructed in many different ways, such as in 4 flip flops (4-bit counter) or 8 flip flops and even higher. Counters are usually cascaded with other counters to reach higher bits, such as 16 or 24 bit counters. The application in which I will use the counters will be to count down from any programmable number that I input either by a keyboard or a thumbwheel. Also, I will use counters that will be used specifically as a frequency divider to divide the pulses that enter the circuit through an input signal from a crystal clock. The pulses will need to be divided so that it will function as a 100Hz clock putting out 100 pulses per second. A switch will be used to load my inputs in and more than likely a button also so that I can stop and hold the count at any point of time. I will use 5 BCD up/down programmable counters, and a certain amount (depending on what kind of "divide by N

Circuit Design Optimization Using Genetic Algorithm with Parameterized Uniform Crossover

NASA Astrophysics Data System (ADS)

Bao, Zhiguo; Watanabe, Takahiro

Evolvable hardware (EHW) is a new research field about the use of Evolutionary Algorithms (EAs) to construct electronic systems. EHW refers in a narrow sense to use evolutionary mechanisms as the algorithmic drivers for system design, while in a general sense to the capability of the hardware system to develop and to improve itself. Genetic Algorithm (GA) is one of typical EAs. We propose optimal circuit design by using GA with parameterized uniform crossover (GApuc) and with fitness function composed of circuit complexity, power, and signal delay. Parameterized uniform crossover is much more likely to distribute its disruptive trials in an unbiased manner over larger portions of the space, then it has more exploratory power than one and two-point crossover, so we have more chances of finding better solutions. Its effectiveness is shown by experiments. From the results, we can see that the best elite fitness, the average value of fitness of the correct circuits and the number of the correct circuits of GApuc are better than that of GA with one-point crossover or two-point crossover. The best case of optimal circuits generated by GApuc is 10.18% and 6.08% better in evaluating value than that by GA with one-point crossover and two-point crossover, respectively.

Design and characterization of a 20 Gbit/s clock recovery circuit

NASA Astrophysics Data System (ADS)

Monteiro, Paulo M.; Matos, J. N.; Gameiro, Atilio M. S.; da Rocha, Jose F.

1995-02-01

In this communication we report the design of a clock recovery circuit produced for the 20 Gbit/s demonstrator of the RACE 2011 project `TRAVEL' of the European Community. The clock recovery circuit is based on an open loop structure using a dielectric resonator narrow bandpass filter with a high quality factor. A detailed electrical characterization of the circuit and also its sensitivity to temperature and detuning variations are presented. The experimental results show that the circuit is a very attractive solution for the forthcoming STM-128 optical links.

Design of MSR primary circuit with minimum pressure losses

NASA Astrophysics Data System (ADS)

Noga, Tomáš; Žitek, Pavel; Valenta, Václav

This article describes a design of a MSR primary circuit with minimum pressure losses. It includes a brief description of this type of a reactor and its integral layout, properties, purpose, etc. The objective of this paper is to define problems of pressure losses calculation and to design a proper device for a primary circuit of MSR reactor, including its basic dimensions. Thanks to this, it can become an initial project for a construction of a real piece of work. This is the main contribution of the carried out study. Of course, this article is not a detailed solution, but it points out facts and problems, which future designers may have to face. The further step of our work will be a reconstruction of the current experiment for a two-stage flowing.

Circuit design advances for ultra-low power sensing platforms

NASA Astrophysics Data System (ADS)

Wieckowski, Michael; Dreslinski, Ronald G.; Mudge, Trevor; Blaauw, David; Sylvester, Dennis

2010-04-01

This paper explores the recent advances in circuit structures and design methodologies that have enabled ultra-low power sensing platforms and opened up a host of new applications. Central to this theme is the development of Near Threshold Computing (NTC) as a viable design space for low power sensing platforms. In this paradigm, the system's supply voltage is approximately equal to the threshold voltage of its transistors. Operating in this "near-threshold" region provides much of the energy savings previously demonstrated for subthreshold operation while offering more favorable performance and variability characteristics. This makes NTC applicable to a broad range of power-constrained computing segments including energy constrained sensing platforms. This paper explores the barriers to the adoption of NTC and describes current work aimed at overcoming these obstacles in the circuit design space.

Integrated Circuit Design of 3 Electrode Sensing System Using Two-Stage Operational Amplifier

NASA Astrophysics Data System (ADS)

Rani, S.; Abdullah, W. F. H.; Zain, Z. M.; N, Aqmar N. Z.

2018-03-01

This paper presents the design of a two-stage operational amplifier(op amp) for 3-electrode sensing system readout circuits. The designs have been simulated using 0.13μm CMOS technology from Silterra (Malaysia) with Mentor graphics tools. The purpose of this projects is mainly to design a miniature interfacing circuit to detect the redox reaction in the form of current using standard analog modules. The potentiostat consists of several op amps combined together in order to analyse the signal coming from the 3-electrode sensing system. This op amp design will be used in potentiostat circuit device and to analyse the functionality for each module of the system.

Design of Arithmetic Circuits for Complex Binary Number System

NASA Astrophysics Data System (ADS)

Jamil, Tariq

2011-08-01

Complex numbers play important role in various engineering applications. To represent these numbers efficiently for storage and manipulation, a (-1+j)-base complex binary number system (CBNS) has been proposed in the literature. In this paper, designs of nibble-size arithmetic circuits (adder, subtractor, multiplier, divider) have been presented. These circuits can be incorporated within von Neumann and associative dataflow processors to achieve higher performance in both sequential and parallel computing paradigms.

Computer programs: Electronic circuit design criteria: A compilation

NASA Technical Reports Server (NTRS)

1973-01-01

A Technology Utilization Program for the dissemination of information on technological developments which have potential utility outside the aerospace community is presented. The 21 items reported herein describe programs that are applicable to electronic circuit design procedures.

Functional design criteria for interim stabilization safety class 1 trip circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Larson, R.E., Westinghouse Hanford

1996-06-10

This Functional Design Criteria document outlines the basic requirements for the Safety Class 1 Trip Circuit. The objective of the Safety Class 1 Trip Circuit is to isolate the power circuitry to the Class 1 Division 2, Group B or lesser grade electrically fed loads located in the pump pit. The electrically fed load circuits need to have power isolated to them upon receipt of the following conditions, loss of flammable gases being released (above a predetermined threshold), and seismic(greater than 0.12g acceleration) activity. The two circuits requiring power isolation are the pump and heat trace power circuits. The Safetymore » Class 1 Trip Circuit will be used to support salt well pumping in SST`s containing potentially flammable gas-bearing / gas-producing radioactive waste.« less

Kick Stick Hands-on Challenge: Discover Circuits with PBS's "Design Squad Nation"[TM

ERIC Educational Resources Information Center

Feinberg, Lauren

2011-01-01

This article describes the "Kick Stick" activity from Design Squad Nation, in which kids turn a wooden paint stirrer and circuit into a motorized, spinning arm--then use it to kick a Ping-Pong[R] ball across the floor. Teachers can enrich their students' exploration of circuits and emphasize the engineering design process with "Design Squad…

Memristor-Based Computing Architecture: Design Methodologies and Circuit Techniques

DTIC Science & Technology

2013-03-01

MEMRISTOR-BASED COMPUTING ARCHITECTURE : DESIGN METHODOLOGIES AND CIRCUIT TECHNIQUES POLYTECHNIC INSTITUTE OF NEW YORK UNIVERSITY...TECHNICAL REPORT 3. DATES COVERED (From - To) OCT 2010 – OCT 2012 4. TITLE AND SUBTITLE MEMRISTOR-BASED COMPUTING ARCHITECTURE : DESIGN METHODOLOGIES...schemes for a memristor-based reconfigurable architecture design have not been fully explored yet. Therefore, in this project, we investigated

On the SCTC-OCTC Method for the Analysis and Design of Circuits

ERIC Educational Resources Information Center

Salvatori, S.; Conte, G.

2009-01-01

This paper discusses guidelines that emphasize the relevance of short-circuit- and open-circuit-time constant (SCTC and OCTC, respectively) methods in the analysis and design of electronic amplifiers. It is demonstrated that it is only necessary to grasp a few concepts in order to understand that the two short- and open-circuit cases fall into a…

Automatic Design of Synthetic Gene Circuits through Mixed Integer Non-linear Programming

PubMed Central

Huynh, Linh; Kececioglu, John; Köppe, Matthias; Tagkopoulos, Ilias

2012-01-01

Automatic design of synthetic gene circuits poses a significant challenge to synthetic biology, primarily due to the complexity of biological systems, and the lack of rigorous optimization methods that can cope with the combinatorial explosion as the number of biological parts increases. Current optimization methods for synthetic gene design rely on heuristic algorithms that are usually not deterministic, deliver sub-optimal solutions, and provide no guaranties on convergence or error bounds. Here, we introduce an optimization framework for the problem of part selection in synthetic gene circuits that is based on mixed integer non-linear programming (MINLP), which is a deterministic method that finds the globally optimal solution and guarantees convergence in finite time. Given a synthetic gene circuit, a library of characterized parts, and user-defined constraints, our method can find the optimal selection of parts that satisfy the constraints and best approximates the objective function given by the user. We evaluated the proposed method in the design of three synthetic circuits (a toggle switch, a transcriptional cascade, and a band detector), with both experimentally constructed and synthetic promoter libraries. Scalability and robustness analysis shows that the proposed framework scales well with the library size and the solution space. The work described here is a step towards a unifying, realistic framework for the automated design of biological circuits. PMID:22536398

Automatic design of synthetic gene circuits through mixed integer non-linear programming.

PubMed

Huynh, Linh; Kececioglu, John; Köppe, Matthias; Tagkopoulos, Ilias

2012-01-01

Automatic design of synthetic gene circuits poses a significant challenge to synthetic biology, primarily due to the complexity of biological systems, and the lack of rigorous optimization methods that can cope with the combinatorial explosion as the number of biological parts increases. Current optimization methods for synthetic gene design rely on heuristic algorithms that are usually not deterministic, deliver sub-optimal solutions, and provide no guaranties on convergence or error bounds. Here, we introduce an optimization framework for the problem of part selection in synthetic gene circuits that is based on mixed integer non-linear programming (MINLP), which is a deterministic method that finds the globally optimal solution and guarantees convergence in finite time. Given a synthetic gene circuit, a library of characterized parts, and user-defined constraints, our method can find the optimal selection of parts that satisfy the constraints and best approximates the objective function given by the user. We evaluated the proposed method in the design of three synthetic circuits (a toggle switch, a transcriptional cascade, and a band detector), with both experimentally constructed and synthetic promoter libraries. Scalability and robustness analysis shows that the proposed framework scales well with the library size and the solution space. The work described here is a step towards a unifying, realistic framework for the automated design of biological circuits.

A quantitative framework for the forward design of synthetic miRNA circuits.

PubMed

Bloom, Ryan J; Winkler, Sally M; Smolke, Christina D

2014-11-01

Synthetic genetic circuits incorporating regulatory components based on RNA interference (RNAi) have been used in a variety of systems. A comprehensive understanding of the parameters that determine the relationship between microRNA (miRNA) and target expression levels is lacking. We describe a quantitative framework supporting the forward engineering of gene circuits that incorporate RNAi-based regulatory components in mammalian cells. We developed a model that captures the quantitative relationship between miRNA and target gene expression levels as a function of parameters, including mRNA half-life and miRNA target-site number. We extended the model to synthetic circuits that incorporate protein-responsive miRNA switches and designed an optimized miRNA-based protein concentration detector circuit that noninvasively measures small changes in the nuclear concentration of β-catenin owing to induction of the Wnt signaling pathway. Our results highlight the importance of methods for guiding the quantitative design of genetic circuits to achieve robust, reliable and predictable behaviors in mammalian cells.

Design of simplified maximum-likelihood receivers for multiuser CPM systems.

PubMed

Bing, Li; Bai, Baoming

2014-01-01

A class of simplified maximum-likelihood receivers designed for continuous phase modulation based multiuser systems is proposed. The presented receiver is built upon a front end employing mismatched filters and a maximum-likelihood detector defined in a low-dimensional signal space. The performance of the proposed receivers is analyzed and compared to some existing receivers. Some schemes are designed to implement the proposed receivers and to reveal the roles of different system parameters. Analysis and numerical results show that the proposed receivers can approach the optimum multiuser receivers with significantly (even exponentially in some cases) reduced complexity and marginal performance degradation.

Design of replica bit line control circuit to optimize power for SRAM

NASA Astrophysics Data System (ADS)

Pengjun, Wang; Keji, Zhou; Huihong, Zhang; Daohui, Gong

2016-12-01

A design of a replica bit line control circuit to optimize power for SRAM is proposed. The proposed design overcomes the limitations of the traditional replica bit line control circuit, which cannot shut off the word line in time. In the novel design, the delay of word line enable and disable paths are balanced. Thus, the word line can be opened and shut off in time. Moreover, the chip select signal is decomposed, which prevents feedback oscillations caused by the replica bit line and the replica word line. As a result, the switch power caused by unnecessary discharging of the bit line is reduced. A 2-kb SRAM is fully custom designed in an SMIC 65-nm CMOS process. The traditional replica bit line control circuit and the new replica bit line control circuit are used in the designed SRAM, and their performances are compared with each other. The experimental results show that at a supply voltage of 1.2 V, the switch power consumption of the memory array can be reduced by 53.7%. Project supported by the Zhejiang Provincial Natural Science Foundation of China (No. LQ14F040001), the National Natural Science Foundation of China (Nos. 61274132, 61234002, 61474068), and the K. C. Wong Magna Fund in Ningbo University.

Design and simulation of proportional biological operational Mu-circuit.

PubMed

Xu, Dechang; Cai, Zhipeng; Liu, Ke; Zeng, Xiangmiao; Ouyang, Yujing; Dai, Cuihong; Hou, Aiju; Cheng, Dayou; Li, Jianzhong

2015-03-01

It is challenging yet desirable to quantitatively control the expression of a target gene in practice. We design a device-Proportional Biological Operational Mu-circuit (P-BOM) incorporating AND/OR gate and operational amplifier into one circuit and explore its behaviors through simulation. The results imply that will be possible to regulate input-output proportionally by manipulating the RBS of hrpR, hrpS, tetR and output gene and used in the sensing of environmental weak signals such as dioxins.

Advances in genetic circuit design: novel biochemistries, deep part mining, and precision gene expression.

PubMed

Nielsen, Alec A K; Segall-Shapiro, Thomas H; Voigt, Christopher A

2013-12-01

Cells use regulatory networks to perform computational operations to respond to their environment. Reliably manipulating such networks would be valuable for many applications in biotechnology; for example, in having genes turn on only under a defined set of conditions or implementing dynamic or temporal control of expression. Still, building such synthetic regulatory circuits remains one of the most difficult challenges in genetic engineering and as a result they have not found widespread application. Here, we review recent advances that address the key challenges in the forward design of genetic circuits. First, we look at new design concepts, including the construction of layered digital and analog circuits, and new approaches to control circuit response functions. Second, we review recent work to apply part mining and computational design to expand the number of regulators that can be used together within one cell. Finally, we describe new approaches to obtain precise gene expression and to reduce context dependence that will accelerate circuit design by more reliably balancing regulators while reducing toxicity. Copyright © 2013. Published by Elsevier Ltd.

Fault-tolerant computer study. [logic designs for building block circuits

NASA Technical Reports Server (NTRS)

Rennels, D. A.; Avizienis, A. A.; Ercegovac, M. D.

1981-01-01

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

Synthetic gene circuits for metabolic control: design trade-offs and constraints

PubMed Central

Oyarzún, Diego A.; Stan, Guy-Bart V.

2013-01-01

A grand challenge in synthetic biology is to push the design of biomolecular circuits from purely genetic constructs towards systems that interface different levels of the cellular machinery, including signalling networks and metabolic pathways. In this paper, we focus on a genetic circuit for feedback regulation of unbranched metabolic pathways. The objective of this feedback system is to dampen the effect of flux perturbations caused by changes in cellular demands or by engineered pathways consuming metabolic intermediates. We consider a mathematical model for a control circuit with an operon architecture, whereby the expression of all pathway enzymes is transcriptionally repressed by the metabolic product. We address the existence and stability of the steady state, the dynamic response of the network under perturbations, and their dependence on common tuneable knobs such as the promoter characteristic and ribosome binding site (RBS) strengths. Our analysis reveals trade-offs between the steady state of the enzymes and the intermediates, together with a separation principle between promoter and RBS design. We show that enzymatic saturation imposes limits on the parameter design space, which must be satisfied to prevent metabolite accumulation and guarantee the stability of the network. The use of promoters with a broad dynamic range and a small leaky expression enlarges the design space. Simulation results with realistic parameter values also suggest that the control circuit can effectively upregulate enzyme production to compensate flux perturbations. PMID:23054953

Mechanically and electrically robust metal-mask design for organic CMOS circuits

NASA Astrophysics Data System (ADS)

Shintani, Michihiro; Qin, Zhaoxing; Kuribara, Kazunori; Ogasahara, Yasuhiro; Hiromoto, Masayuki; Sato, Takashi

2018-04-01

The design of metal masks for fabricating organic CMOS circuits requires the consideration of not only the electrical property of the circuits, but also the mechanical strength of the masks. In this paper, we propose a new design flow for metal masks that realizes coanalysis of the mechanical and electrical properties and enables design exploration considering the trade-off between the two properties. As a case study, we apply a “stitching technique” to the mask design of a ring oscillator and explore the best design. With this technique, mask patterns are divided into separate parts using multiple mask layers to improve the mechanical strength at the cost of high resistance of the vias. By a numerical experiment, the design trade-off of the stitching technique is quantitatively analyzed, and it is demonstrated that the proposed flow is useful for the exploration of the designs of metal masks.

Superior model for fault tolerance computation in designing nano-sized circuit systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singh, N. S. S., E-mail: narinderjit@petronas.com.my; Muthuvalu, M. S., E-mail: msmuthuvalu@gmail.com; Asirvadam, V. S., E-mail: vijanth-sagayan@petronas.com.my

2014-10-24

As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalizationmore » of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than the reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines.« less

Waveguide design, modeling, and optimization: from photonic nanodevices to integrated photonic circuits

NASA Astrophysics Data System (ADS)

Bordovsky, Michal; Catrysse, Peter; Dods, Steven; Freitas, Marcio; Klein, Jackson; Kotacka, Libor; Tzolov, Velko; Uzunov, Ivan M.; Zhang, Jiazong

2004-05-01

We present the state of the art for commercial design and simulation software in the 'front end' of photonic circuit design. One recent advance is to extend the flexibility of the software by using more than one numerical technique on the same optical circuit. There are a number of popular and proven techniques for analysis of photonic devices. Examples of these techniques include the Beam Propagation Method (BPM), the Coupled Mode Theory (CMT), and the Finite Difference Time Domain (FDTD) method. For larger photonic circuits, it may not be practical to analyze the whole circuit by any one of these methods alone, but often some smaller part of the circuit lends itself to at least one of these standard techniques. Later the whole problem can be analyzed on a unified platform. This kind of approach can enable analysis for cases that would otherwise be cumbersome, or even impossible. We demonstrate solutions for more complex structures ranging from the sub-component layout, through the entire device characterization, to the mask layout and its editing. We also present recent advances in the above well established techniques. This includes the analysis of nano-particles, metals, and non-linear materials by FDTD, photonic crystal design and analysis, and improved models for high concentration Er/Yb co-doped glass waveguide amplifiers.

Design and Application of a Circuit for Measuring Frequency and Duty Cycle of Stimulated Bioelectrical Signal

NASA Astrophysics Data System (ADS)

Tang, Li-Ming; Chang, Ben-Kang; Liu, Tie-Bing; Wu, Min; Ling, Gang

2002-12-01

To design a new type of circuit for measuring frequency & duty cycle of stimulated bioelectrical signal for the project of 'the map of neuron-threshold in human brain and its clinical application'. This circuit was designed according to the character of stimulated bioelectrical signals. It was tested and improved and then used in the neuron -threshold stimulator. The circuit was found to be very accurate for measuring frequency and the error for measuring duty cycle was below 0.2%. This circuit is well-designed, simple, easy to use, and can be applied in many systems.

Design of a biochemical circuit motif for learning linear functions

PubMed Central

Lakin, Matthew R.; Minnich, Amanda; Lane, Terran; Stefanovic, Darko

2014-01-01

Learning and adaptive behaviour are fundamental biological processes. A key goal in the field of bioengineering is to develop biochemical circuit architectures with the ability to adapt to dynamic chemical environments. Here, we present a novel design for a biomolecular circuit capable of supervised learning of linear functions, using a model based on chemical reactions catalysed by DNAzymes. To achieve this, we propose a novel mechanism of maintaining and modifying internal state in biochemical systems, thereby advancing the state of the art in biomolecular circuit architecture. We use simulations to demonstrate that the circuit is capable of learning behaviour and assess its asymptotic learning performance, scalability and robustness to noise. Such circuits show great potential for building autonomous in vivo nanomedical devices. While such a biochemical system can tell us a great deal about the fundamentals of learning in living systems and may have broad applications in biomedicine (e.g. autonomous and adaptive drugs), it also offers some intriguing challenges and surprising behaviours from a machine learning perspective. PMID:25401175

Design of a biochemical circuit motif for learning linear functions.

PubMed

Lakin, Matthew R; Minnich, Amanda; Lane, Terran; Stefanovic, Darko

2014-12-06

Learning and adaptive behaviour are fundamental biological processes. A key goal in the field of bioengineering is to develop biochemical circuit architectures with the ability to adapt to dynamic chemical environments. Here, we present a novel design for a biomolecular circuit capable of supervised learning of linear functions, using a model based on chemical reactions catalysed by DNAzymes. To achieve this, we propose a novel mechanism of maintaining and modifying internal state in biochemical systems, thereby advancing the state of the art in biomolecular circuit architecture. We use simulations to demonstrate that the circuit is capable of learning behaviour and assess its asymptotic learning performance, scalability and robustness to noise. Such circuits show great potential for building autonomous in vivo nanomedical devices. While such a biochemical system can tell us a great deal about the fundamentals of learning in living systems and may have broad applications in biomedicine (e.g. autonomous and adaptive drugs), it also offers some intriguing challenges and surprising behaviours from a machine learning perspective.

Analytical design equations for self-tuned Class-E power amplifier.

PubMed

Hu, Zhe; Troyk, Philip

2011-01-01

For many emerging neural prosthesis designs that are powered by inductive coupling, their small physical size requires large current in the extracorporeal transmitter coil, and the Class-E power amplifier topology is often used for the transmitter design. Tuning of Class-E circuits for efficient operation is difficult and a self-tuned circuit can facilitate the tuning. The coil current is sensed and used to tune the switching of the transistor switch in the Class-E circuit in order to maintain its high-efficiency operation. Although mathematically complex, the analysis and design procedure for the self-tuned Class-E circuit can be simplified due to the current feedback control, which makes the phase angle between the switching pulse and the coil current predetermined. In this paper explicit analytical design equations are derived and a detailed design procedure is presented and compared with the conventional Class-E design approaches.

Digi Island: A Serious Game for Teaching and Learning Digital Circuit Optimization

NASA Technical Reports Server (NTRS)

Harper, Michael; Miller, Joseph; Shen, Yuzhong

2011-01-01

Karnaugh maps, also known as K-maps, are a tool used to optimize or simplify digital logic circuits. A K-map is a graphical display of a logic circuit. K-map optimization is essentially the process of finding a minimum number of maximal aggregations of K-map cells. with values of 1 according to a set of rules. The Digi Island is a serious game designed for aiding students to learn K-map optimization. The game takes place on an exotic island (called Digi Island) in the Pacific Ocean . The player is an adventurer to the Digi Island and will transform it into a tourist attraction by developing real estates, such as amusement parks.and hotels. The Digi Island game elegantly converts boring 1s and Os in digital circuits into usable and unusable spaces on a beautiful island and transforms K-map optimization into real estate development, an activity with which many students are familiar and also interested in. This paper discusses the design, development, and some preliminary results of the Digi Island game.

Integrated circuits, and design and manufacture thereof

DOEpatents

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Circuit design of an EMCCD camera

NASA Astrophysics Data System (ADS)

Li, Binhua; Song, Qian; Jin, Jianhui; He, Chun

2012-07-01

EMCCDs have been used in the astronomical observations in many ways. Recently we develop a camera using an EMCCD TX285. The CCD chip is cooled to -100°C in an LN2 dewar. The camera controller consists of a driving board, a control board and a temperature control board. Power supplies and driving clocks of the CCD are provided by the driving board, the timing generator is located in the control board. The timing generator and an embedded Nios II CPU are implemented in an FPGA. Moreover the ADC and the data transfer circuit are also in the control board, and controlled by the FPGA. The data transfer between the image workstation and the camera is done through a Camera Link frame grabber. The software of image acquisition is built using VC++ and Sapera LT. This paper describes the camera structure, the main components and circuit design for video signal processing channel, clock driver, FPGA and Camera Link interfaces, temperature metering and control system. Some testing results are presented.

Improved equivalent circuit for twin slot terahertz receivers

NASA Technical Reports Server (NTRS)

McGrath, W. R.

2002-01-01

Series-fed coplanar waveguide embedding circuits are being developed for terahertz mixers using, in particular, submicron-sized superconducting devices, such as hot electron bolometers as the nonlinear element. Although these mixers show promising performance, they usually also show a considerable downward shift in the center frequency, when compared with simulations obtained by using simplified models. This makes it very difficult to design low-noise mixers for a given THz frequency. This shiftis principally caused by parasitics due to the extremely small details (in terms of wavelength) of the device, and by the electrical properties of the RF choke filter in the DC/IF line. In this paper, we present an improved equivalent network model of such mixer circuits which agrees with measured results at THz frequencies and we propose a new set of THz bolometric mixers that have been fabricated and are currently being tested.

Modular design of synthetic gene circuits with biological parts and pools.

PubMed

Marchisio, Mario Andrea

2015-01-01

Synthetic gene circuits can be designed in an electronic fashion by displaying their basic components-Standard Biological Parts and Pools of molecules-on the computer screen and connecting them with hypothetical wires. This procedure, achieved by our add-on for the software ProMoT, was successfully applied to bacterial circuits. Recently, we have extended this design-methodology to eukaryotic cells. Here, highly complex components such as promoters and Pools of mRNA contain hundreds of species and reactions whose calculation demands a rule-based modeling approach. We showed how to build such complex modules via the joint employment of the software BioNetGen (rule-based modeling) and ProMoT (modularization). In this chapter, we illustrate how to utilize our computational tool for synthetic biology with the in silico implementation of a simple eukaryotic gene circuit that performs the logic AND operation.

76 FR 14437 - Economic Simplified Boiling Water Reactor Standard Design: GE Hitachi Nuclear Energy; Issuance of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-16

... NUCLEAR REGULATORY COMMISSION [NRC-2011-0055] Economic Simplified Boiling Water Reactor Standard Design: GE Hitachi Nuclear Energy; Issuance of Final Design Approval The U.S. Nuclear Regulatory Commission has issued a final design approval (FDA) to GE Hitachi Nuclear Energy (GEH) for the economic...

Analytical Study on Thermal and Mechanical Design of Printed Circuit Heat Exchanger

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yoon, Su-Jong; Sabharwall, Piyush; Kim, Eung-Soo

2013-09-01

The analytical methodologies for the thermal design, mechanical design and cost estimation of printed circuit heat exchanger are presented in this study. In this study, three flow arrangements of parallel flow, countercurrent flow and crossflow are taken into account. For each flow arrangement, the analytical solution of temperature profile of heat exchanger is introduced. The size and cost of printed circuit heat exchangers for advanced small modular reactors, which employ various coolants such as sodium, molten salts, helium, and water, are also presented.

Principles of Genetic Circuit Design

PubMed Central

Brophy, Jennifer A.N.; Voigt, Christopher A.

2014-01-01

Cells are able to navigate environments, communicate, and build complex patterns by initiating gene expression in response to specific signals. Engineers need to harness this capability to program cells to perform tasks or build chemicals and materials that match the complexity seen in nature. This review describes new tools that aid the construction of genetic circuits. We show how circuit dynamics can be influenced by the choice of regulators and changed with expression “tuning knobs.” We collate the failure modes encountered when assembling circuits, quantify their impact on performance, and review mitigation efforts. Finally, we discuss the constraints that arise from operating within a living cell. Collectively, better tools, well-characterized parts, and a comprehensive understanding of how to compose circuits are leading to a breakthrough in the ability to program living cells for advanced applications, from living therapeutics to the atomic manufacturing of functional materials. PMID:24781324

Design of RISC Processor Using VHDL and Cadence

NASA Astrophysics Data System (ADS)

Moslehpour, Saeid; Puliroju, Chandrasekhar; Abu-Aisheh, Akram

The project deals about development of a basic RISC processor. The processor is designed with basic architecture consisting of internal modules like clock generator, memory, program counter, instruction register, accumulator, arithmetic and logic unit and decoder. This processor is mainly used for simple general purpose like arithmetic operations and which can be further developed for general purpose processor by increasing the size of the instruction register. The processor is designed in VHDL by using Xilinx 8.1i version. The present project also serves as an application of the knowledge gained from past studies of the PSPICE program. The study will show how PSPICE can be used to simplify massive complex circuits designed in VHDL Synthesis. The purpose of the project is to explore the designed RISC model piece by piece, examine and understand the Input/ Output pins, and to show how the VHDL synthesis code can be converted to a simplified PSPICE model. The project will also serve as a collection of various research materials about the pieces of the circuit.

A Cost-Effective Energy-Recovering Sustain Driving Circuit for ac Plasma Display Panels

NASA Astrophysics Data System (ADS)

Lim, Jae Kwang; Tae, Heung-Sik; Choi, Byungcho; Kim, Seok Gi

A new sustain driving circuit, featuring an energy-recovering function with simple structure and minimal component count, is proposed as a cost-effective solution for driving plasma display panels during the sustaining period. Compared with existing solutions, the proposed circuit reduces the number of semiconductor switches and reactive circuit components without compromising the circuit performance and gas-discharging characteristics. In addition, the proposed circuit utilizes the harness wire as an inductive circuit component, thereby further simplifying the circuit structure. The performance of the proposed circuit is confirmed with a 42-inch plasma display panel.

Design and Characterization of DNA Strand-Displacement Circuits in Serum-Supplemented Cell Medium.

PubMed

Fern, Joshua; Schulman, Rebecca

2017-09-15

The functional stability and lifetimes of synthetic molecular circuits in biological environments are important for long-term, stable sensors or controllers of cell or tissue behavior. DNA-based molecular circuits, in particular DNA strand-displacement circuits, provide simple and effective biocompatible control mechanisms and sensors, but are vulnerable to digestion by nucleases present in living tissues and serum-supplemented cell culture. The stability of double-stranded and single-stranded DNA circuit components in serum-supplemented cell medium and the corresponding effect of nuclease-mediated degradation on circuit performance were characterized to determine the major routes of degradation and DNA strand-displacement circuit failure. Simple circuit design choices, such as the use of 5' toeholds within the DNA complexes used as reactants in the strand-displacement reactions and the termination of single-stranded components with DNA hairpin domains at the 3' termini, significantly increase the functional lifetime of the circuit components in the presence of nucleases. Simulations of multireaction circuits, guided by the experimentally measured operation of single-reaction circuits, enable predictive realization of multilayer and competitive-reaction circuit behavior. Together, these results provide a basic route to increased DNA circuit stability in cell culture environments.

Quantum memristor in a superconducting circuit

NASA Astrophysics Data System (ADS)

Salmilehto, Juha; Sanz, Mikel; di Ventra, Massimiliano; Solano, Enrique

Memristors, resistive elements that retain information of their past, have garnered interest due to their paradigm-changing potential in information processing and electronics. The emergent hysteretic behaviour allows for novel architectural applications and has recently been classically demonstrated in a simplified superconducting setup using the phase-dependent conductance in the tunnel-junction-microscopic model. In this contribution, we present a truly quantum model for a memristor constructed using established elements and techniques in superconducting nanoelectronics, and explore the parameters for feasible operation as well as refine the methods for quantifying the memory retention. In particular, the memristive behaviour is shown to arise from quasiparticle-induced tunneling in the full dissipative model and can be observed in the phase-driven tunneling current. The relevant hysteretic behaviour should be observable using current state-of-the-art measurements for detecting quasiparticle excitations. Our theoretical findings constitute the first quantum memristor in a superconducting circuit and act as the starting point for designing further circuit elements that have non-Markovian characteristics The authors acknowledge support from the CCQED EU project and the Finnish Cultural Foundation.

Simplifying the design of microstructured optical fibre pressure sensors.

PubMed

Osório, Jonas H; Chesini, Giancarlo; Serrão, Valdir A; Franco, Marcos A R; Cordeiro, Cristiano M B

2017-06-07

In this paper, we propose a way to simplify the design of microstructured optical fibres with high sensitivity to applied pressure. The use of a capillary fibre with an embedded core allows the exploration of the pressure-induced material birefringence due to the capillary wall displacements and the photoelastic effect. An analytical description of pressure-induced material birefringence is provided, and fibre modal characteristics are explored through numerical simulations. Moreover, a capillary fibre with an embedded core is fabricated and used to probe pressure variations. Even though the embedded-core fibre has a non-optimized structure, measurements showed a pressure sensitivity of (1.04 ± 0.01) nm/bar, which compares well with more complex, specially designed fibre geometries reported in the literature. These results demonstrate that this geometry enables a novel route towards the simplification of microstructured fibre-based pressure sensors.

Design and Characterization of DNA Strand-Displacement Circuits in Serum-Supplemented Cell Medium

DOE PAGES

Fern, Joshua; Schulman, Rebecca

2017-05-30

The functional stability and lifetimes of synthetic molecular circuits in biological environments are important for long-term, stable sensors or controllers of cell or tissue behavior. DNA-based molecular circuits, particularly DNA strand-displacement circuits, provide simple and effective biocompatible control mechanisms and sensors, but are vulnerable to digestion by nucleases present in living tissues and serum-supplemented cell culture. The stability of double-stranded and single-stranded DNA circuit components in serum-supplemented cell medium and the corresponding effect of nuclease-mediated degradation on circuit performance were characterized to determine the major routes of degradation and DNA strand-displacement circuit failure. Simple circuit design choices, such as themore » use of 5' toeholds within the DNA complexes used as reactants in the strand-displacement reactions and the termination of single-stranded components with DNA hairpin domains at the 3' termini, significantly increase the functional lifetime of the circuit components in the presence of nucleases. Furthermore, simulations of multireaction circuits, guided by the experimentally measured operation of single-reaction circuits, enable predictive realization of multilayer and competitive-reaction circuit behavior. Altogether, these results provide a basic route to increased DNA circuit stability in cell culture environments.« less

Design and Characterization of DNA Strand-Displacement Circuits in Serum-Supplemented Cell Medium

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fern, Joshua; Schulman, Rebecca

The functional stability and lifetimes of synthetic molecular circuits in biological environments are important for long-term, stable sensors or controllers of cell or tissue behavior. DNA-based molecular circuits, particularly DNA strand-displacement circuits, provide simple and effective biocompatible control mechanisms and sensors, but are vulnerable to digestion by nucleases present in living tissues and serum-supplemented cell culture. The stability of double-stranded and single-stranded DNA circuit components in serum-supplemented cell medium and the corresponding effect of nuclease-mediated degradation on circuit performance were characterized to determine the major routes of degradation and DNA strand-displacement circuit failure. Simple circuit design choices, such as themore » use of 5' toeholds within the DNA complexes used as reactants in the strand-displacement reactions and the termination of single-stranded components with DNA hairpin domains at the 3' termini, significantly increase the functional lifetime of the circuit components in the presence of nucleases. Furthermore, simulations of multireaction circuits, guided by the experimentally measured operation of single-reaction circuits, enable predictive realization of multilayer and competitive-reaction circuit behavior. Altogether, these results provide a basic route to increased DNA circuit stability in cell culture environments.« less

Analog circuit for controlling acoustic transducer arrays

DOEpatents

Drumheller, Douglas S.

1991-01-01

A simplified ananlog circuit is presented for controlling electromechanical transducer pairs in an acoustic telemetry system. The analog circuit of this invention comprises a single electrical resistor which replaces all of the digital components in a known digital circuit. In accordance with this invention, a first transducer in a transducer pair of array is driven in series with the resistor. The voltage drop across this resistor is then amplified and used to drive the second transducer. The voltage drop across the resistor is proportional and in phase with the current to the transducer. This current is approximately 90 degrees out of phase with the driving voltage to the transducer. This phase shift replaces the digital delay required by the digital control circuit of the prior art.

Toward scalable parts families for predictable design of biological circuits.

PubMed

Lucks, Julius B; Qi, Lei; Whitaker, Weston R; Arkin, Adam P

2008-12-01

Our current ability to engineer biological circuits is hindered by design cycles that are costly in terms of time and money, with constructs failing to operate as desired, or evolving away from the desired function once deployed. Synthetic biologists seek to understand biological design principles and use them to create technologies that increase the efficiency of the genetic engineering design cycle. Central to the approach is the creation of biological parts--encapsulated functions that can be composited together to create new pathways with predictable behaviors. We define five desirable characteristics of biological parts--independence, reliability, tunability, orthogonality and composability, and review studies of small natural and synthetic biological circuits that provide insights into each of these characteristics. We propose that the creation of appropriate sets of families of parts with these properties is a prerequisite for efficient, predictable engineering of new function in cells and will enable a large increase in the sophistication of genetic engineering applications.

Analysis and Simple Circuit Design of Double Differential EMG Active Electrode.

PubMed

Guerrero, Federico Nicolás; Spinelli, Enrique Mario; Haberman, Marcelo Alejandro

2016-06-01

In this paper we present an analysis of the voltage amplifier needed for double differential (DD) sEMG measurements and a novel, very simple circuit for implementing DD active electrodes. The three-input amplifier that standalone DD active electrodes require is inherently different from a differential amplifier, and general knowledge about its design is scarce in the literature. First, the figures of merit of the amplifier are defined through a decomposition of its input signal into three orthogonal modes. This analysis reveals a mode containing EMG crosstalk components that the DD electrode should reject. Then, the effect of finite input impedance is analyzed. Because there are three terminals, minimum bounds for interference rejection ratios due to electrode and input impedance unbalances with two degrees of freedom are obtained. Finally, a novel circuit design is presented, including only a quadruple operational amplifier and a few passive components. This design is nearly as simple as the branched electrode and much simpler than the three instrumentation amplifier design, while providing robust EMG crosstalk rejection and better input impedance using unity gain buffers for each electrode input. The interference rejection limits of this input stage are analyzed. An easily replicable implementation of the proposed circuit is described, together with a parameter design guideline to adjust it to specific needs. The electrode is compared with the established alternatives, and sample sEMG signals are obtained, acquired on different body locations with dry contacts, successfully rejecting interference sources.

[Design of High Frequency Signal Detecting Circuit of Human Body Impedance Used for Ultrashort Wave Diathermy Apparatus].

PubMed

Fan, Xu; Wang, Yunguang; Cheng, Haiping; Chong, Xiaochen

2016-02-01

The present circuit was designed to apply to human tissue impedance tuning and matching device in ultra-short wave treatment equipment. In order to judge if the optimum status of circuit parameter between energy emitter circuit and accepter circuit is in well syntony, we designed a high frequency envelope detect circuit to coordinate with automatic adjust device of accepter circuit, which would achieve the function of human tissue impedance matching and tuning. Using the sampling coil to receive the signal of amplitude-modulated wave, we compared the voltage signal of envelope detect circuit with electric current of energy emitter circuit. The result of experimental study was that the signal, which was transformed by the envelope detect circuit, was stable and could be recognized by low speed Analog to Digital Converter (ADC) and was proportional to the electric current signal of energy emitter circuit. It could be concluded that the voltage, transformed by envelope detect circuit can mirror the real circuit state of syntony and realize the function of human tissue impedance collecting.

Simplified analytical model and balanced design approach for light-weight wood-based structural panel in bending

Treesearch

Jinghao Li; John F. Hunt; Shaoqin Gong; Zhiyong Cai

2016-01-01

This paper presents a simplified analytical model and balanced design approach for modeling lightweight wood-based structural panels in bending. Because many design parameters are required to input for the model of finite element analysis (FEA) during the preliminary design process and optimization, the equivalent method was developed to analyze the mechanical...

Design and implementation of a programming circuit in radiation-hardened FPGA

NASA Astrophysics Data System (ADS)

Lihua, Wu; Xiaowei, Han; Yan, Zhao; Zhongli, Liu; Fang, Yu; Chen, Stanley L.

2011-08-01

We present a novel programming circuit used in our radiation-hardened field programmable gate array (FPGA) chip. This circuit provides the ability to write user-defined configuration data into an FPGA and then read it back. The proposed circuit adopts the direct-access programming point scheme instead of the typical long token shift register chain. It not only saves area but also provides more flexible configuration operations. By configuring the proposed partial configuration control register, our smallest configuration section can be conveniently configured as a single data and a flexible partial configuration can be easily implemented. The hierarchical simulation scheme, optimization of the critical path and the elaborate layout plan make this circuit work well. Also, the radiation hardened by design programming point is introduced. This circuit has been implemented in a static random access memory (SRAM)-based FPGA fabricated by a 0.5 μm partial-depletion silicon-on-insulator CMOS process. The function test results of the fabricated chip indicate that this programming circuit successfully realizes the desired functions in the configuration and read-back. Moreover, the radiation test results indicate that the programming circuit has total dose tolerance of 1 × 105 rad(Si), dose rate survivability of 1.5 × 1011 rad(Si)/s and neutron fluence immunity of 1 × 1014 n/cm2.

Compact self-powered synchronous energy extraction circuit design with enhanced performance

NASA Astrophysics Data System (ADS)

Liu, Weiqun; Zhao, Caiyou; Badel, Adrien; Formosa, Fabien; Zhu, Qiao; Hu, Guangdi

2018-04-01

Synchronous switching circuit is viewed as an effective solution of enhancing the generator’s performance and providing better adaptability for load variations. A critical issue for these synchronous switching circuits is the self-powered realization. In contrast with other methods, the electronic breaker possesses the advantage of simplicity and reliability. However, beside the energy consumption of the electronic breakers, the parasitic capacitance decreases the available piezoelectric voltage. In this technical note, a new compact design of the self-powered switching circuit using electronic breaker is proposed. The envelope diodes are excluded and only a single envelope capacitor is used. The parasitic capacitance is reduced to half with boosted performance while the components are reduced with cost saved.

Design and application of cotranscriptional non-enzymatic RNA circuits and signal transducers

PubMed Central

Bhadra, Sanchita; Ellington, Andrew D.

2014-01-01

Nucleic acid circuits are finding increasing real-life applications in diagnostics and synthetic biology. Although DNA has been the main operator in most nucleic acid circuits, transcriptionally produced RNA circuits could provide powerful alternatives for reagent production and their use in cells. Towards these goals, we have implemented a particular nucleic acid circuit, catalytic hairpin assembly, using RNA for both information storage and processing. Our results demonstrated that the design principles developed for DNA circuits could be readily translated to engineering RNA circuits that operated with similar kinetics and sensitivities of detection. Not only could purified RNA hairpins perform amplification reactions but RNA hairpins transcribed in vitro also mediated amplification, even without purification. Moreover, we could read the results of the non-enzymatic amplification reactions using a fluorescent RNA aptamer ‘Spinach’ that was engineered to undergo sequence-specific conformational changes. These advances were applied to the end-point and real-time detection of the isothermal strand displacement amplification reaction that produces single-stranded DNAs as part of its amplification cycle. We were also able to readily engineer gate structures with RNA similar to those that have previously formed the basis of DNA circuit computations. Taken together, these results validate an entirely new chemistry for the implementation of nucleic acid circuits. PMID:24493736

Analog design optimization methodology for ultralow-power circuits using intuitive inversion-level and saturation-level parameters

NASA Astrophysics Data System (ADS)

Eimori, Takahisa; Anami, Kenji; Yoshimatsu, Norifumi; Hasebe, Tetsuya; Murakami, Kazuaki

2014-01-01

A comprehensive design optimization methodology using intuitive nondimensional parameters of inversion-level and saturation-level is proposed, especially for ultralow-power, low-voltage, and high-performance analog circuits with mixed strong, moderate, and weak inversion metal-oxide-semiconductor transistor (MOST) operations. This methodology is based on the synthesized charge-based MOST model composed of Enz-Krummenacher-Vittoz (EKV) basic concepts and advanced-compact-model (ACM) physics-based equations. The key concept of this methodology is that all circuit and system characteristics are described as some multivariate functions of inversion-level parameters, where the inversion level is used as an independent variable representative of each MOST. The analog circuit design starts from the first step of inversion-level design using universal characteristics expressed by circuit currents and inversion-level parameters without process-dependent parameters, followed by the second step of foundry-process-dependent design and the last step of verification using saturation-level criteria. This methodology also paves the way to an intuitive and comprehensive design approach for many kinds of analog circuit specifications by optimization using inversion-level log-scale diagrams and saturation-level criteria. In this paper, we introduce an example of our design methodology for a two-stage Miller amplifier.

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm

NASA Astrophysics Data System (ADS)

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm.

PubMed

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.

Solar cell circuit and method for manufacturing solar cells

NASA Technical Reports Server (NTRS)

Mardesich, Nick (Inventor)

2010-01-01

The invention is a novel manufacturing method for making multi-junction solar cell circuits that addresses current problems associated with such circuits by allowing the formation of integral diodes in the cells and allows for a large number of circuits to readily be placed on a single silicon wafer substrate. The standard Ge wafer used as the base for multi-junction solar cells is replaced with a thinner layer of Ge or a II-V semiconductor material on a silicon/silicon dioxide substrate. This allows high-voltage cells with multiple multi-junction circuits to be manufactured on a single wafer, resulting in less array assembly mass and simplified power management.

Designing Thin, Ultrastretchable Electronics with Stacked Circuits and Elastomeric Encapsulation Materials.

PubMed

Xu, Renxiao; Lee, Jung Woo; Pan, Taisong; Ma, Siyi; Wang, Jiayi; Han, June Hyun; Ma, Yinji; Rogers, John A; Huang, Yonggang

2017-01-26

Many recently developed soft, skin-like electronics with high performance circuits and low modulus encapsulation materials can accommodate large bending, stretching, and twisting deformations. Their compliant mechanics also allows for intimate, nonintrusive integration to the curvilinear surfaces of soft biological tissues. By introducing a stacked circuit construct, the functional density of these systems can be greatly improved, yet their desirable mechanics may be compromised due to the increased overall thickness. To address this issue, the results presented here establish design guidelines for optimizing the deformable properties of stretchable electronics with stacked circuit layers. The effects of three contributing factors (i.e., the silicone inter-layer, the composite encapsulation, and the deformable interconnects) on the stretchability of a multilayer system are explored in detail via combined experimental observation, finite element modeling, and theoretical analysis. Finally, an electronic module with optimized design is demonstrated. This highly deformable system can be repetitively folded, twisted, or stretched without observable influences to its electrical functionality. The ultrasoft, thin nature of the module makes it suitable for conformal biointegration.

Designing Thin, Ultrastretchable Electronics with Stacked Circuits and Elastomeric Encapsulation Materials

PubMed Central

Xu, Renxiao; Lee, Jung Woo; Pan, Taisong; Ma, Siyi; Wang, Jiayi; Han, June Hyun; Ma, Yinji

2017-01-01

Many recently developed soft, skin-like electronics with high performance circuits and low modulus encapsulation materials can accommodate large bending, stretching, and twisting deformations. Their compliant mechanics also allows for intimate, nonintrusive integration to the curvilinear surfaces of soft biological tissues. By introducing a stacked circuit construct, the functional density of these systems can be greatly improved, yet their desirable mechanics may be compromised due to the increased overall thickness. To address this issue, the results presented here establish design guidelines for optimizing the deformable properties of stretchable electronics with stacked circuit layers. The effects of three contributing factors (i.e., the silicone inter-layer, the composite encapsulation, and the deformable interconnects) on the stretchability of a multilayer system are explored in detail via combined experimental observation, finite element modeling, and theoretical analysis. Finally, an electronic module with optimized design is demonstrated. This highly deformable system can be repetitively folded, twisted, or stretched without observable influences to its electrical functionality. The ultrasoft, thin nature of the module makes it suitable for conformal biointegration. PMID:29046624

Signal transfer within a cultured asymmetric cortical neuron circuit

NASA Astrophysics Data System (ADS)

Isomura, Takuya; Shimba, Kenta; Takayama, Yuzo; Takeuchi, Akimasa; Kotani, Kiyoshi; Jimbo, Yasuhiko

2015-12-01

Objective. Simplified neuronal circuits are required for investigating information representation in nervous systems and for validating theoretical neural network models. Here, we developed patterned neuronal circuits using micro fabricated devices, comprising a micro-well array bonded to a microelectrode-array substrate. Approach. The micro-well array consisted of micrometre-scale wells connected by tunnels, all contained within a silicone slab called a micro-chamber. The design of the micro-chamber confined somata to the wells and allowed axons to grow through the tunnels bidirectionally but with a designed, unidirectional bias. We guided axons into the point of the arrow structure where one of the two tunnel entrances is located, making that the preferred direction. Main results. When rat cortical neurons were cultured in the wells, their axons grew through the tunnels and connected to neurons in adjoining wells. Unidirectional burst transfers and other asymmetric signal-propagation phenomena were observed via the substrate-embedded electrodes. Seventy-nine percent of burst transfers were in the forward direction. We also observed rapid propagation of activity from sites of local electrical stimulation, and significant effects of inhibitory synapse blockade on bursting activity. Significance. These results suggest that this simple, substrate-controlled neuronal circuit can be applied to develop in vitro models of the function of cortical microcircuits or deep neural networks, better to elucidate the laws governing the dynamics of neuronal networks.

Signal transfer within a cultured asymmetric cortical neuron circuit.

PubMed

Isomura, Takuya; Shimba, Kenta; Takayama, Yuzo; Takeuchi, Akimasa; Kotani, Kiyoshi; Jimbo, Yasuhiko

2015-12-01

Simplified neuronal circuits are required for investigating information representation in nervous systems and for validating theoretical neural network models. Here, we developed patterned neuronal circuits using micro fabricated devices, comprising a micro-well array bonded to a microelectrode-array substrate. The micro-well array consisted of micrometre-scale wells connected by tunnels, all contained within a silicone slab called a micro-chamber. The design of the micro-chamber confined somata to the wells and allowed axons to grow through the tunnels bidirectionally but with a designed, unidirectional bias. We guided axons into the point of the arrow structure where one of the two tunnel entrances is located, making that the preferred direction. When rat cortical neurons were cultured in the wells, their axons grew through the tunnels and connected to neurons in adjoining wells. Unidirectional burst transfers and other asymmetric signal-propagation phenomena were observed via the substrate-embedded electrodes. Seventy-nine percent of burst transfers were in the forward direction. We also observed rapid propagation of activity from sites of local electrical stimulation, and significant effects of inhibitory synapse blockade on bursting activity. These results suggest that this simple, substrate-controlled neuronal circuit can be applied to develop in vitro models of the function of cortical microcircuits or deep neural networks, better to elucidate the laws governing the dynamics of neuronal networks.

Error correcting circuit design with carbon nanotube field effect transistors

NASA Astrophysics Data System (ADS)

Liu, Xiaoqiang; Cai, Li; Yang, Xiaokuo; Liu, Baojun; Liu, Zhongyong

2018-03-01

In this work, a parallel error correcting circuit based on (7, 4) Hamming code is designed and implemented with carbon nanotube field effect transistors, and its function is validated by simulation in HSpice with the Stanford model. A grouping method which is able to correct multiple bit errors in 16-bit and 32-bit application is proposed, and its error correction capability is analyzed. Performance of circuits implemented with CNTFETs and traditional MOSFETs respectively is also compared, and the former shows a 34.4% decrement of layout area and a 56.9% decrement of power consumption.

Design and simulation of the circuit of SWIR hyper-spectral imaging spectrometer

NASA Astrophysics Data System (ADS)

Ren, Bin; Li, Zi-tian; Meng, Nan

2009-07-01

With the requirement of the SWIR Hyper-spectral Imaging Spectrometer, this article describes a project of SWIR image circuit based on IRFPA detector. First, the structure of the SWIR Hyper-spectral Imaging Spectrometer is introduced in this paper, and then the infrared imaging circuit design is proposed, which is based on MCT SWIR FPA with 500*256 pixels, the detector NEPTURN, in Safradir Company. According to the scheme, several key technologies have been studied in particular, such as driving circuit, time control circuit, high-speed A/D converter, LVDS (Low Voltage Differential Signaling) transmission circuit. At last, An improved two-point Correction Method was chosen to correct the Non-uniformity of image. The simulation results demonstrate that the proposed method can effectively suppress noises and work with low power consumption. The electric system not only has the advantages of simplicity and compactness but also can work stably, providing 500×256 image at the frame frequency of 200 Hz in good quality.

Design principles and realization of electro-optical circuit boards

NASA Astrophysics Data System (ADS)

Betschon, Felix; Lamprecht, Tobias; Halter, Markus; Beyer, Stefan; Peterson, Harry

2013-02-01

The manufacturing of electro-optical circuit boards (EOCB) is based to a large extent on established technologies. First products with embedded polymer waveguides are currently produced in series. The range of applications within the sensor and data communication markets is growing with the increasing maturity level. EOCBs require design flows, processes and techniques similar to existing printed circuit board (PCB) manufacturing and appropriate for optical signal transmission. A key aspect is the precise and automated assembly of active and passive optical components to the optical waveguides which has to be supported by the technology. The design flow is described after a short introduction into the build-up of EOCBs and the motivation for the usage of this technology within the different application fields. Basis for the design of EOCBs are the required optical signal transmission properties. Thereafter, the devices for the electro-optical conversion are chosen and the optical coupling approach is defined. Then, the planar optical elements (waveguides, splitters, couplers) are designed and simulated. This phase already requires co-design of the optical and electrical domain using novel design flows. The actual integration of an optical system into a PCB is shown in the last part. The optical layer is thereby laminated to the purely electrical PCB using a conventional PCB-lamination process to form the EOCB. The precise alignment of the various electrical and optical layers is thereby essential. Electrical vias are then generated, penetrating also the optical layer, to connect the individual electrical layers. Finally, the board has to be tested electrically and optically.

Experiences in Digital Circuit Design Courses: A Self-Study Platform for Learning Support

ERIC Educational Resources Information Center

Bañeres, David; Clarisó, Robert; Jorba, Josep; Serra, Montse

2014-01-01

The synthesis of digital circuits is a basic skill in all the bachelor programmes around the ICT area of knowledge, such as Computer Science, Telecommunication Engineering or Electrical Engineering. An important hindrance in the learning process of this skill is that the existing educational tools for the design of circuits do not allow the…

A compact design for the Josephson mixer: The lumped element circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pillet, J.-D.; Collège de France, 11 place Marcelin Berthelot, 75005 Paris; Flurin, E.

2015-06-01

We present a compact and efficient design in terms of gain, bandwidth, and dynamical range for the Josephson mixer, the superconducting circuit performing three-wave mixing at microwave frequencies. In an all lumped-element based circuit with galvanically coupled ports, we demonstrate nondegenerate amplification for microwave signals over a bandwidth up to 50 MHz for a power gain of 20 dB. The quantum efficiency of the mixer is shown to be about 70%, and its saturation power reaches −112 dBm.

Design and optimization of LCL-VSC grid-tied converter having short circuit fault current limiting ability

NASA Astrophysics Data System (ADS)

Liu, Mengqi; Liu, Haijun; Wang, Zhikai

2017-01-01

Traditional LCL grid-tied converters haven't the ability to limit the short-circuit fault current and only remove grid-connected converter using the breaker. However, the VSC converters become uncontrollable after the short circuit fault cutting off and the power switches may be damaged if the circuit breaker removes slowly. Compared to the filter function of the LCL passive components in traditional VSC converters, the novel LCL-VSC converter has the ability of limiting the short circuit fault current using the reasonable designed LCL parameters. In this paper the mathematical model of the LCL converter is established and the characteristics of the short circuit fault current generated by the ac side and dc side are analyzed. Thus one design and optimization scheme of the reasonable LCL passive parameter is proposed for the LCL-VSC converter having short circuit fault current limiting ability. In addition to ensuring the LCL passive components filtering the high-frequency harmonic, this scheme also considers the impedance characteristics to limit the fault current of AC and DC short circuit fault respectively flowing through the power switch no more than the maximum allowable operating current, in order to make the LCL converter working continuously. Finally, the 200kW simulation system is set up to prove the validity and feasibility of the theoretical analysis using the proposed design and optimization scheme.

Improved Simplified Methods for Effective Seismic Analysis and Design of Isolated and Damped Bridges in Western and Eastern North America

NASA Astrophysics Data System (ADS)

Koval, Viacheslav

The seismic design provisions of the CSA-S6 Canadian Highway Bridge Design Code and the AASHTO LRFD Seismic Bridge Design Specifications have been developed primarily based on historical earthquake events that have occurred along the west coast of North America. For the design of seismic isolation systems, these codes include simplified analysis and design methods. The appropriateness and range of application of these methods are investigated through extensive parametric nonlinear time history analyses in this thesis. It was found that there is a need to adjust existing design guidelines to better capture the expected nonlinear response of isolated bridges. For isolated bridges located in eastern North America, new damping coefficients are proposed. The applicability limits of the code-based simplified methods have been redefined to ensure that the modified method will lead to conservative results and that a wider range of seismically isolated bridges can be covered by this method. The possibility of further improving current simplified code methods was also examined. By transforming the quantity of allocated energy into a displacement contribution, an idealized analytical solution is proposed as a new simplified design method. This method realistically reflects the effects of ground-motion and system design parameters, including the effects of a drifted oscillation center. The proposed method is therefore more appropriate than current existing simplified methods and can be applicable to isolation systems exhibiting a wider range of properties. A multi-level-hazard performance matrix has been adopted by different seismic provisions worldwide and will be incorporated into the new edition of the Canadian CSA-S6-14 Bridge Design code. However, the combined effect and optimal use of isolation and supplemental damping devices in bridges have not been fully exploited yet to achieve enhanced performance under different levels of seismic hazard. A novel Dual-Level Seismic

Design and characterization of integrated components for SiN photonic quantum circuits.

PubMed

Poot, Menno; Schuck, Carsten; Ma, Xiao-Song; Guo, Xiang; Tang, Hong X

2016-04-04

The design, fabrication, and detailed calibration of essential building blocks towards fully integrated linear-optics quantum computation are discussed. Photonic devices are made from silicon nitride rib waveguides, where measurements on ring resonators show small propagation losses. Directional couplers are designed to be insensitive to fabrication variations. Their offset and coupling lengths are measured, as well as the phase difference between the transmitted and reflected light. With careful calibrations, the insertion loss of the directional couplers is found to be small. Finally, an integrated controlled-NOT circuit is characterized by measuring the transmission through different combinations of inputs and outputs. The gate fidelity for the CNOT operation with this circuit is estimated to be 99.81% after post selection. This high fidelity is due to our robust design, good fabrication reproducibility, and extensive characterizations.

Synthetic Gene Expression Circuits for Designing Precision Tools in Oncology

PubMed Central

Re, Angela

2017-01-01

Precision medicine in oncology needs to enhance its capabilities to match diagnostic and therapeutic technologies to individual patients. Synthetic biology streamlines the design and construction of functionalized devices through standardization and rational engineering of basic biological elements decoupled from their natural context. Remarkable improvements have opened the prospects for the availability of synthetic devices of enhanced mechanism clarity, robustness, sensitivity, as well as scalability and portability, which might bring new capabilities in precision cancer medicine implementations. In this review, we begin by presenting a brief overview of some of the major advances in the engineering of synthetic genetic circuits aimed to the control of gene expression and operating at the transcriptional, post-transcriptional/translational, and post-translational levels. We then focus on engineering synthetic circuits as an enabling methodology for the successful establishment of precision technologies in oncology. We describe significant advancements in our capabilities to tailor synthetic genetic circuits to specific applications in tumor diagnosis, tumor cell- and gene-based therapy, and drug delivery. PMID:28894736

Design of a lock-amplifier circuit

NASA Astrophysics Data System (ADS)

Liu, H.; Huang, W. J.; Song, X.; Zhang, W. Y.; Sa, L. B.

2017-01-01

The lock-in amplifier is recovered by phase sensitive detection technique for the weak signal submerged in the noise background. This design is based on the TI ultra low power LM358, INA129, OPA227, OP07 and other chips as the core design and production of the lock-in amplifier. Signal generator by 10m ohms /1K ohm resistance points pressure network 10 mu V 1mV adjustable sine wave signal s (T). The concomitant interference signal together through the AC amplifier and band-pass filter signal x (T), on the other hand reference signal R (T) driven by square wave phase shift etc. steps to get the signal R (T), two signals and by phase sensitive detector are a DC full wave, again through its low pass filter and a DC amplifier to be measured signal more accurate detection, the final circuit through the AD conversion and the use of single-chip will display the output.

MEMS 3-DoF gyroscope design, modeling and simulation through equivalent circuit lumped parameter model

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mian, Muhammad Umer, E-mail: umermian@gmail.com; Khir, M. H. Md.; Tang, T. B.

Pre-fabrication, behavioural and performance analysis with computer aided design (CAD) tools is a common and fabrication cost effective practice. In light of this we present a simulation methodology for a dual-mass oscillator based 3 Degree of Freedom (3-DoF) MEMS gyroscope. 3-DoF Gyroscope is modeled through lumped parameter models using equivalent circuit elements. These equivalent circuits consist of elementary components which are counterpart of their respective mechanical components, used to design and fabricate 3-DoF MEMS gyroscope. Complete designing of equivalent circuit model, mathematical modeling and simulation are being presented in this paper. Behaviors of the equivalent lumped models derived for themore » proposed device design are simulated in MEMSPRO T-SPICE software. Simulations are carried out with the design specifications following design rules of the MetalMUMPS fabrication process. Drive mass resonant frequencies simulated by this technique are 1.59 kHz and 2.05 kHz respectively, which are close to the resonant frequencies found by the analytical formulation of the gyroscope. The lumped equivalent circuit modeling technique proved to be a time efficient modeling technique for the analysis of complex MEMS devices like 3-DoF gyroscopes. The technique proves to be an alternative approach to the complex and time consuming couple field analysis Finite Element Analysis (FEA) previously used.« less

The design of infrared information collection circuit based on embedded technology

NASA Astrophysics Data System (ADS)

Liu, Haoting; Zhang, Yicong

2013-07-01

S3C2410 processor is a 16/32 bit RISC embedded processor which based on ARM920T core and AMNA bus, and mainly for handheld devices, and high cost, low-power applications. This design introduces a design plan of the PIR sensor system, circuit and its assembling, debugging. The Application Circuit of the passive PIR alarm uses the invisibility of the infrared radiation well into the alarm system, and in order to achieve the anti-theft alarm and security purposes. When the body goes into the range of PIR sensor detection, sensors will detect heat sources and then the sensor will output a weak signal. The Signal should be amplified, compared and delayed; finally light emitting diodes emit light, playing the role of a police alarm.

Reducing Printed Circuit Board Emissions with Low-Noise Design Practices

NASA Technical Reports Server (NTRS)

Bradley, Arthur T.; Fowler, Jennifer; Yavoich, Brian J.; Jennings, Stephen A.

2012-01-01

This paper presents the results of an experiment designed to determine the effectiveness of adopting several low-noise printed circuit board (PCB) design practices. Two boards were designed and fabricated, each consisting of identical mixed signal circuitry. Several important differences were introduced between the board layouts: one board was constructed using recommended low-noise practices and the other constructed without such attention. The emissions from the two boards were then measured and compared, demonstrating an improvement in radiated emissions of up to 22 dB.

Topological Properties of Some Integrated Circuits for Very Large Scale Integration Chip Designs

NASA Astrophysics Data System (ADS)

Swanson, S.; Lanzerotti, M.; Vernizzi, G.; Kujawski, J.; Weatherwax, A.

2015-03-01

This talk presents topological properties of integrated circuits for Very Large Scale Integration chip designs. These circuits can be implemented in very large scale integrated circuits, such as those in high performance microprocessors. Prior work considered basic combinational logic functions and produced a mathematical framework based on algebraic topology for integrated circuits composed of logic gates. Prior work also produced an historically-equivalent interpretation of Mr. E. F. Rent's work for today's complex circuitry in modern high performance microprocessors, where a heuristic linear relationship was observed between the number of connections and number of logic gates. This talk will examine topological properties and connectivity of more complex functionally-equivalent integrated circuits. The views expressed in this article are those of the author and do not reflect the official policy or position of the United States Air Force, Department of Defense or the U.S. Government.

Digital circuits using universal logic gates

NASA Technical Reports Server (NTRS)

Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

2004-01-01

According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

Circuit-based versus full-wave modelling of active microwave circuits

NASA Astrophysics Data System (ADS)

Bukvić, Branko; Ilić, Andjelija Ž.; Ilić, Milan M.

2018-03-01

Modern full-wave computational tools enable rigorous simulations of linear parts of complex microwave circuits within minutes, taking into account all physical electromagnetic (EM) phenomena. Non-linear components and other discrete elements of the hybrid microwave circuit are then easily added within the circuit simulator. This combined full-wave and circuit-based analysis is a must in the final stages of the circuit design, although initial designs and optimisations are still faster and more comfortably done completely in the circuit-based environment, which offers real-time solutions at the expense of accuracy. However, due to insufficient information and general lack of specific case studies, practitioners still struggle when choosing an appropriate analysis method, or a component model, because different choices lead to different solutions, often with uncertain accuracy and unexplained discrepancies arising between the simulations and measurements. We here design a reconfigurable power amplifier, as a case study, using both circuit-based solver and a full-wave EM solver. We compare numerical simulations with measurements on the manufactured prototypes, discussing the obtained differences, pointing out the importance of measured parameters de-embedding, appropriate modelling of discrete components and giving specific recipes for good modelling practices.

9 CFR 306.1 - Designation of circuit supervisor and assistants.

Code of Federal Regulations, 2014 CFR

2014-01-01

... 9 Animals and Animal Products 2 2014-01-01 2014-01-01 false Designation of circuit supervisor and assistants. 306.1 Section 306.1 Animals and Animal Products FOOD SAFETY AND INSPECTION SERVICE, DEPARTMENT OF AGRICULTURE AGENCY ORGANIZATION AND TERMINOLOGY; MANDATORY MEAT AND POULTRY PRODUCTS INSPECTION AND VOLUNTARY...

9 CFR 306.1 - Designation of circuit supervisor and assistants.

Code of Federal Regulations, 2010 CFR

2010-01-01

... 9 Animals and Animal Products 2 2010-01-01 2010-01-01 false Designation of circuit supervisor and assistants. 306.1 Section 306.1 Animals and Animal Products FOOD SAFETY AND INSPECTION SERVICE, DEPARTMENT OF AGRICULTURE AGENCY ORGANIZATION AND TERMINOLOGY; MANDATORY MEAT AND POULTRY PRODUCTS INSPECTION AND VOLUNTARY...

Vectorized program architectures for supercomputer-aided circuit design

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rizzoli, V.; Ferlito, M.; Neri, A.

1986-01-01

Vector processors (supercomputers) can be effectively employed in MIC or MMIC applications to solve problems of large numerical size such as broad-band nonlinear design or statistical design (yield optimization). In order to fully exploit the capabilities of a vector hardware, any program architecture must be structured accordingly. This paper presents a possible approach to the ''semantic'' vectorization of microwave circuit design software. Speed-up factors of the order of 50 can be obtained on a typical vector processor (Cray X-MP), with respect to the most powerful scaler computers (CDC 7600), with cost reductions of more than one order of magnitude. Thismore » could broaden the horizon of microwave CAD techniques to include problems that are practically out of the reach of conventional systems.« less

Improving Design Efficiency for Large-Scale Heterogeneous Circuits

NASA Astrophysics Data System (ADS)

Gregerson, Anthony

Despite increases in logic density, many Big Data applications must still be partitioned across multiple computing devices in order to meet their strict performance requirements. Among the most demanding of these applications is high-energy physics (HEP), which uses complex computing systems consisting of thousands of FPGAs and ASICs to process the sensor data created by experiments at particles accelerators such as the Large Hadron Collider (LHC). Designing such computing systems is challenging due to the scale of the systems, the exceptionally high-throughput and low-latency performance constraints that necessitate application-specific hardware implementations, the requirement that algorithms are efficiently partitioned across many devices, and the possible need to update the implemented algorithms during the lifetime of the system. In this work, we describe our research to develop flexible architectures for implementing such large-scale circuits on FPGAs. In particular, this work is motivated by (but not limited in scope to) high-energy physics algorithms for the Compact Muon Solenoid (CMS) experiment at the LHC. To make efficient use of logic resources in multi-FPGA systems, we introduce Multi-Personality Partitioning, a novel form of the graph partitioning problem, and present partitioning algorithms that can significantly improve resource utilization on heterogeneous devices while also reducing inter-chip connections. To reduce the high communication costs of Big Data applications, we also introduce Information-Aware Partitioning, a partitioning method that analyzes the data content of application-specific circuits, characterizes their entropy, and selects circuit partitions that enable efficient compression of data between chips. We employ our information-aware partitioning method to improve the performance of the hardware validation platform for evaluating new algorithms for the CMS experiment. Together, these research efforts help to improve the efficiency

Design and Analysis of Broad-Band Fixed-Tuned Submillimeter-Waveguide Multipliers using MMIC Style Circuit Topology

NASA Technical Reports Server (NTRS)

Bruston, J.; Kim, M.; Martin, S. C.; Mehdi, I.; Smith, R. P.; Siegel, P. H.

1996-01-01

The design and analysis of varactor diode doubler, quadrupler and cascaded doubler circuits for 320 and 640 GHz have been completed. A new approach has been employed to produce a tunerless waveguide mount with a very flexible, frequency scaleable, MMIC style multiplier circuit. The concept, design, predicted performance and measurements on some of the constituent mount elements are presented.

Off-Line Quality Control In Integrated Circuit Fabrication Using Experimental Design

NASA Astrophysics Data System (ADS)

Phadke, M. S.; Kackar, R. N.; Speeney, D. V.; Grieco, M. J.

1987-04-01

Off-line quality control is a systematic method of optimizing production processes and product designs. It is widely used in Japan to produce high quality products at low cost. The method was introduced to us by Professor Genichi Taguchi who is a Deming-award winner and a former Director of the Japanese Academy of Quality. In this paper we will i) describe the off-line quality control method, and ii) document our efforts to optimize the process for forming contact windows in 3.5 Aim CMOS circuits fabricated in the Murray Hill Integrated Circuit Design Capability Laboratory. In the fabrication of integrated circuits it is critically important to produce contact windows of size very near the target dimension. Windows which are too small or too large lead to loss of yield. The off-line quality control method has improved both the process quality and productivity. The variance of the window size has been reduced by a factor of four. Also, processing time for window photolithography has been substantially reduced. The key steps of off-line quality control are: i) Identify important manipulatable process factors and their potential working levels. ii) Perform fractional factorial experiments on the process using orthogonal array designs. iii) Analyze the resulting data to determine the optimum operating levels of the factors. Both the process mean and the process variance are considered in this analysis. iv) Conduct an additional experiment to verify that the new factor levels indeed give an improvement.

Novel high-gain, improved-bandwidth, finned-ladder V-band Traveling-Wave Tube slow-wave circuit design

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Wilson, Jeffrey D.

1994-01-01

The V-band frequency range of 59-64 GHz is a region of the millimeter-wave spectrum that has been designated for inter-satellite communications. As a first effort to develop a high-efficiency V-band Traveling-Wave Tube (TWT), variations on a ring-plane slow-wave circuit were computationally investigated to develop an alternative to the more conventional ferruled coupled-cavity circuit. The ring-plane circuit was chosen because of its high interaction impedance, large beam aperture, and excellent thermal dissipation properties. Despite these advantages, however, low bandwidth and high voltage requirements have, until now, prevented its acceptance outside the laboratory. In this paper, the three-dimensional electrodynamic simulation code MAFIA (solution of MAxwell's Equation by the Finite-Integration-Algorithm) is used to investigate methods of increasing the bandwidth and lowering the operating voltage of the ring-plane circuit. Calculations of frequency-phase dispersion, beam on-axis interaction impedance, attenuation and small-signal gain per wavelength were performed for various geometric variations and loading distributions of the ring-plane TWT slow-wave circuit. Based on the results of the variations, a circuit termed the finned-ladder TWT slow-wave circuit was designed and is compared here to the scaled prototype ring-plane and a conventional ferruled coupled-cavity TWT circuit over the V-band frequency range. The simulation results indicate that this circuit has a much higher gain, significantly wider bandwidth, and a much lower voltage requirement than the scaled ring-plane prototype circuit, while retaining its excellent thermal dissipation properties. The finned-ladder circuit has a much larger small-signal gain per wavelength than the ferruled coupled-cavity circuit, but with a moderate sacrifice in bandwidth.

9 CFR 306.1 - Designation of circuit supervisor and assistants.

Code of Federal Regulations, 2012 CFR

2012-01-01

... 9 Animals and Animal Products 2 2012-01-01 2012-01-01 false Designation of circuit supervisor and assistants. 306.1 Section 306.1 Animals and Animal Products FOOD SAFETY AND INSPECTION SERVICE, DEPARTMENT OF AGRICULTURE AGENCY ORGANIZATION AND TERMINOLOGY; MANDATORY MEAT AND POULTRY PRODUCTS INSPECTION AND VOLUNTARY INSPECTION AND CERTIFICATION...

9 CFR 306.1 - Designation of circuit supervisor and assistants.

Code of Federal Regulations, 2013 CFR

2013-01-01

... 9 Animals and Animal Products 2 2013-01-01 2013-01-01 false Designation of circuit supervisor and assistants. 306.1 Section 306.1 Animals and Animal Products FOOD SAFETY AND INSPECTION SERVICE, DEPARTMENT OF AGRICULTURE AGENCY ORGANIZATION AND TERMINOLOGY; MANDATORY MEAT AND POULTRY PRODUCTS INSPECTION AND VOLUNTARY INSPECTION AND CERTIFICATION...

9 CFR 306.1 - Designation of circuit supervisor and assistants.

Code of Federal Regulations, 2011 CFR

2011-01-01

... 9 Animals and Animal Products 2 2011-01-01 2011-01-01 false Designation of circuit supervisor and assistants. 306.1 Section 306.1 Animals and Animal Products FOOD SAFETY AND INSPECTION SERVICE, DEPARTMENT OF AGRICULTURE AGENCY ORGANIZATION AND TERMINOLOGY; MANDATORY MEAT AND POULTRY PRODUCTS INSPECTION AND VOLUNTARY INSPECTION AND CERTIFICATION...

Design of the NDUV detection circuit for the NO concentration of the vehicle exhaust emissions

NASA Astrophysics Data System (ADS)

Zhang, Kai; Zhang, Yujun; He, Ying; You, Kun; Gao, Yanwei; Chen, Chen; Liu, Guohua; He, Chungui; Lu, Yibing; Liu, Wenqing

2016-10-01

With the increasing number of vehicles, the harm from NO to the environment becomes more and more prominent. So the monitoring of the NO concentration of the vehicle exhaust emissions is very important to assess the emission levels. In this paper, the NO detection system designing for vehicle exhaust emissions based on the non-dispersive ultraviolet principle (NDUV) has been researched. The technical indexes of the two-way modulation UV signal detection circuit are discussed in detail. And then a precision detection circuit is designed, which is composed of a trans-impedance amplifier and a lock-in amplifier, with which the output of the UV photoelectric detector can be amplified to a suitable voltage range, and the DC noise of the pre-stage amplifier is effectively removed by the lock-in amplifier. An experimental system was set up to test the designed circuit. To ensure the consistency of the two channels, the method of exchange calibration was adopted in the test. It's drawn that the designed circuit is of high SNR, measuring accuracy and a large dynamic range from the test results. The NO concentration detection limit of vehicle emissions can reach 1ppm, and the detection precision is +/-15ppm.

Design of two-channel oscilloscope and basic circuit simulations in LabView

NASA Astrophysics Data System (ADS)

Balzhiev, Plamen; Makal, Jaroslaw

2008-01-01

The project is realized as a diploma thesis in Bialystok Technical University, Poland). The main aim is to develop a useful educational tool which presents the time and frequency characteristics in basic electrical circuits. It is designed as a helpful instrument for lectures and laboratory classes. The predominant audience will be students of electrical engineering from first semester of the higher education. Therefore the level of knowledge at this stage of education is not high enough and different techniques are necessary to increase the students' interest and the efficiency of teaching process. This educational instrument provides the needed knowledge concerning the basic circuits and its parameters. Graphics and animations of the general processes in the electrical circuits make the problems more interesting, comprehensive and easier to understand. For designing such an instrument the National Instruments' programming environment LabView is used. It is preferred to the other simulation software because of its simplicity flexibility and also availability (the free demo version is sufficient to make a simple virtual instrument). LabView uses graphical programming language and has powerful mathematical functions for analysis and simulations. The useful visualization tools for presenting different diagrams are worth recommending, too. It is also specialized in measurement and control and it supports a wide variety of hardware. Therefore this software is suitable for laboratory classes to present the dependencies between the simulated characteristics in basic electrical circuits and the real one measured with the hardware device. For this purpose a two-channel oscilloscope is designed as part of the described project. The main purpose of this instrument as part of the educational process is to present the desired characteristics of the electrical circuits and to become familiar with the general functions of the oscilloscope. This project combines several important

Effective Teaching of the Physical Design of Integrated Circuits Using Educational Tools

ERIC Educational Resources Information Center

Aziz, Syed Mahfuzul; Sicard, Etienne; Ben Dhia, Sonia

2010-01-01

This paper presents the strategies used for effective teaching and skill development in integrated circuit (IC) design using project-based learning (PBL) methodologies. It presents the contexts in which these strategies are applied to IC design courses at the University of South Australia, Adelaide, Australia, and the National Institute of Applied…

Design and engineering of intracellular-metabolite-sensing/regulation gene circuits in Saccharomyces cerevisiae.

PubMed

Wang, Meng; Li, Sijin; Zhao, Huimin

2016-01-01

The development of high-throughput phenotyping tools is lagging far behind the rapid advances of genotype generation methods. To bridge this gap, we report a new strategy for design, construction, and fine-tuning of intracellular-metabolite-sensing/regulation gene circuits by repurposing bacterial transcription factors and eukaryotic promoters. As proof of concept, we systematically investigated the design and engineering of bacterial repressor-based xylose-sensing/regulation gene circuits in Saccharomyces cerevisiae. We demonstrated that numerous properties, such as induction ratio and dose-response curve, can be fine-tuned at three different nodes, including repressor expression level, operator position, and operator sequence. By applying these gene circuits, we developed a cell sorting based, rapid and robust high-throughput screening method for xylose transporter engineering and obtained a sugar transporter HXT14 mutant with 6.5-fold improvement in xylose transportation capacity. This strategy should be generally applicable and highly useful for evolutionary engineering of proteins, pathways, and genomes in S. cerevisiae. © 2015 Wiley Periodicals, Inc.

A low noise interface circuit design of micro-machined gyroscope

NASA Astrophysics Data System (ADS)

Fu, Qiang; Di, Xipeng; Yin, Liang; Liu, Xiaowei

2017-07-01

The analyses of MEMS gyroscope interface circuit on thermal noise, 1/f noise and phase noise are made in this paper. A closed-loop differential driving circuit and a low-noise differential detecting circuit based on the high frequency modulation are designed to limit the noise. The interface chip is implemented in a standard 0.5 μm CMOS process. The test results show that the resolution of sensitive capacity can reach to 6.47 × 10-20 F at the bandwidth of 60 Hz. The measuring range is ± 200°/s and the nonlinearity is 310 ppm. The output noise density is 5.8^\\circ/({{h}}\\cdot \\sqrt{{Hz}}). The angular random walk (allen-variance) is 0.092^\\circ/\\sqrt{{{h}}} and the bias instability is 2.63°/h. Project supported by the National Natural Science Foundation of China (No. 61204121), the National Hi-Tech Research and Development Program of China (No. 2013AA041107), and the Fundamental Research Funds for the Central Universities (No. HIT.NSRIF.2013040).

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

Polymorphic Electronic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

Design and implementation of a RF powering circuit for RFID tags or other batteryless embedded devices.

PubMed

Liu, Dongsheng; Wang, Rencai; Yao, Ke; Zou, Xuecheng; Guo, Liang

2014-08-13

A RF powering circuit used in radio-frequency identification (RFID) tags and other batteryless embedded devices is presented in this paper. The RF powering circuit harvests energy from electromagnetic waves and converts the RF energy to a stable voltage source. Analysis of a NMOS gate-cross connected bridge rectifier is conducted to demonstrate relationship between device sizes and power conversion efficiency (PCE) of the rectifier. A rectifier with 38.54% PCE under normal working conditions is designed. Moreover, a stable voltage regulator with a temperature and voltage optimizing strategy including adoption of a combination resistor is developed, which is able to accommodate a large input range of 4 V to 12 V and be immune to temperature variations. Latch-up prevention and noise isolation methods in layout design are also presented. Designed with the HJTC 0.25 μm process, this regulator achieves 0.04 mV/°C temperature rejection ratio (TRR) and 2.5 mV/V voltage rejection ratio (VRR). The RF powering circuit is also fabricated in the HJTC 0.25 μm process. The area of the RF powering circuit is 0.23 × 0.24 mm². The RF powering circuit is successfully integrated with ISO/IEC 15693-compatible and ISO/IEC 14443-compatible RFID tag chips.

Design and Implementation of a RF Powering Circuit for RFID Tags or Other Batteryless Embedded Devices

PubMed Central

Liu, Dongsheng; Wang, Rencai; Yao, Ke; Zou, Xuecheng; Guo, Liang

2014-01-01

A RF powering circuit used in radio-frequency identification (RFID) tags and other batteryless embedded devices is presented in this paper. The RF powering circuit harvests energy from electromagnetic waves and converts the RF energy to a stable voltage source. Analysis of a NMOS gate-cross connected bridge rectifier is conducted to demonstrate relationship between device sizes and power conversion efficiency (PCE) of the rectifier. A rectifier with 38.54% PCE under normal working conditions is designed. Moreover, a stable voltage regulator with a temperature and voltage optimizing strategy including adoption of a combination resistor is developed, which is able to accommodate a large input range of 4 V to 12 V and be immune to temperature variations. Latch-up prevention and noise isolation methods in layout design are also presented. Designed with the HJTC 0.25 μm process, this regulator achieves 0.04 mV/°C temperature rejection ratio (TRR) and 2.5 mV/V voltage rejection ratio (VRR). The RF powering circuit is also fabricated in the HJTC 0.25 μm process. The area of the RF powering circuit is 0.23 × 0.24 mm2. The RF powering circuit is successfully integrated with ISO/IEC 15693-compatible and ISO/IEC 14443-compatible RFID tag chips. PMID:25123466

Application of source biasing technique for energy efficient DECODER circuit design: memory array application

NASA Astrophysics Data System (ADS)

Gupta, Neha; Parihar, Priyanka; Neema, Vaibhav

2018-04-01

Researchers have proposed many circuit techniques to reduce leakage power dissipation in memory cells. If we want to reduce the overall power in the memory system, we have to work on the input circuitry of memory architecture i.e. row and column decoder. In this research work, low leakage power with a high speed row and column decoder for memory array application is designed and four new techniques are proposed. In this work, the comparison of cluster DECODER, body bias DECODER, source bias DECODER, and source coupling DECODER are designed and analyzed for memory array application. Simulation is performed for the comparative analysis of different DECODER design parameters at 180 nm GPDK technology file using the CADENCE tool. Simulation results show that the proposed source bias DECODER circuit technique decreases the leakage current by 99.92% and static energy by 99.92% at a supply voltage of 1.2 V. The proposed circuit also improves dynamic power dissipation by 5.69%, dynamic PDP/EDP 65.03% and delay 57.25% at 1.2 V supply voltage.

Architectures and Design for Next-Generation Hybrid Circuit/Packet Networks

NASA Astrophysics Data System (ADS)

Vadrevu, Sree Krishna Chaitanya

Internet traffic is increasing rapidly at an annual growth rate of 35% with aggregate traffic exceeding several Exabyte's per month. The traffic is also becoming heterogeneous in bandwidth and quality-of-service (QoS) requirements with growing popularity of cloud computing, video-on-demand (VoD), e-science, etc. Hybrid circuit/packet networks which can jointly support circuit and packet services along with the adoption of high-bit-rate transmission systems form an attractive solution to address the traffic growth. 10 Gbps and 40 Gbps transmission systems are widely deployed in telecom backbone networks such as Comcast, AT&T, etc., and network operators are considering migration to 100 Gbps and beyond. This dissertation proposes robust architectures, capacity migration strategies, and novel service frameworks for next-generation hybrid circuit/packet architectures. In this dissertation, we study two types of hybrid circuit/packet networks: a) IP-over-WDM networks, in which the packet (IP) network is overlaid on top of the circuit (optical WDM) network and b) Hybrid networks in which the circuit and packet networks are deployed side by side such as US DoE's ESnet. We investigate techniques to dynamically migrate capacity between the circuit and packet sections by exploiting traffic variations over a day, and our methods show that significant bandwidth savings can be obtained with improved reliability of services. Specifically, we investigate how idle backup circuit capacity can be used to support packet services in IP-over-WDM networks, and similarly, excess capacity in packet network to support circuit services in ESnet. Control schemes that enable our mechanisms are also discussed. In IP-over-WDM networks, with upcoming 100 Gbps and beyond, dedicated protection will induce significant under-utilization of backup resources. We investigate design strategies to loan idle circuit backup capacity to support IP/packet services. However, failure of backup circuits will

An Integrated Magnetic Circuit Model and Finite Element Model Approach to Magnetic Bearing Design

NASA Technical Reports Server (NTRS)

Provenza, Andrew J.; Kenny, Andrew; Palazzolo, Alan B.

2003-01-01

A code for designing magnetic bearings is described. The code generates curves from magnetic circuit equations relating important bearing performance parameters. Bearing parameters selected from the curves by a designer to meet the requirements of a particular application are input directly by the code into a three-dimensional finite element analysis preprocessor. This means that a three-dimensional computer model of the bearing being developed is immediately available for viewing. The finite element model solution can be used to show areas of magnetic saturation and make more accurate predictions of the bearing load capacity, current stiffness, position stiffness, and inductance than the magnetic circuit equations did at the start of the design process. In summary, the code combines one-dimensional and three-dimensional modeling methods for designing magnetic bearings.

Mixed logic style adder circuit designed and fabricated using SOI substrate for irradiation-hardened experiment

NASA Astrophysics Data System (ADS)

Yuan, Shoucai; Liu, Yamei

2016-08-01

This paper proposed a rail to rail swing, mixed logic style 28-transistor 1-bit full adder circuit which is designed and fabricated using silicon-on-insulator (SOI) substrate with 90 nm gate length technology. The main goal of our design is space application where circuits may be damaged by outer space radiation; so the irradiation-hardened technique such as SOI structure should be used. The circuit's delay, power and power-delay product (PDP) of our proposed gate diffusion input (GDI)-based adder are HSPICE simulated and compared with other reported high-performance 1-bit adder. The GDI-based 1-bit adder has 21.61% improvement in delay and 18.85% improvement in PDP, over the reported 1-bit adder. However, its power dissipation is larger than that reported with 3.56% increased but is still comparable. The worst case performance of proposed 1-bit adder circuit is also seen to be less sensitive to variations in power supply voltage (VDD) and capacitance load (CL), over a wide range from 0.6 to 1.8 V and 0 to 200 fF, respectively. The proposed and reported 1-bit full adders are all layout designed and wafer fabricated with other circuits/systems together on one chip. The chip measurement and analysis has been done at VDD = 1.2 V, CL = 20 fF, and 200 MHz maximum input signal frequency with temperature of 300 K.

Learning Abstract Physical Concepts from Experience: Design and Use of an RC Circuit

NASA Astrophysics Data System (ADS)

Parra, Alfredo; Ordenes, Jorge; de la Fuente, Milton

2018-05-01

Science learning for undergraduate students requires grasping a great number of theoretical concepts in a rather short time. In our experience, this is especially difficult when students are required to simultaneously use abstract concepts, mathematical reasoning, and graphical analysis, such as occurs when learning about RC circuits. We present a simple experimental model in this work that allows students to easily design, build, and analyze RC circuits, thus providing an opportunity to test personal ideas, build graphical descriptions, and explore the meaning of the respective mathematical models, ultimately gaining a better grasp of the concepts involved. The result suggests that the simple setup indeed helps untrained students to visualize the essential points of this kind of circuit.

Simplified method for calculating shear deflections of beams.

Treesearch

I. Orosz

1970-01-01

When one designs with wood, shear deflections can become substantial compared to deflections due to moments, because the modulus of elasticity in bending differs from that in shear by a large amount. This report presents a simplified energy method to calculate shear deflections in bending members. This simplified approach should help designers decide whether or not...

High Quality Acquisition of Surface Electromyography - Conditioning Circuit Design

NASA Astrophysics Data System (ADS)

Shobaki, Mohammed M.; Malik, Noreha Abdul; Khan, Sheroz; Nurashikin, Anis; Haider, Samnan; Larbani, Sofiane; Arshad, Atika; Tasnim, Rumana

2013-12-01

The acquisition of Surface Electromyography (SEMG) signals is used for many applications including the diagnosis of neuromuscular diseases, and prosthesis control. The diagnostic quality of the SEMG signal is highly dependent on the conditioning circuit of the SEMG acquisition system. This paper presents the design of an SEMG conditioning circuit that can guarantee to collect high quality signal with high SNR such that it is immune to environmental noise. The conditioning circuit consists of four stages; consisting of an instrumentation amplifier that is used with a gain of around 250; 4th order band pass filter in the 20-500Hz frequency range as the two initial stages. The third stage is an amplifier with adjustable gain using a variable resistance; the gain could be changed from 1000 to 50000. In the final stage the signal is translated to meet the input requirements of data acquisition device or the ADC. Acquisition of accurate signals allows it to be analyzed for extracting the required characteristic features for medical and clinical applications. According to the experimental results, the value of SNR for collected signal is 52.4 dB which is higher than the commercial system, the power spectrum density (PSD) graph is also presented and it shows that the filter has eliminated the noise below 20 Hz.

Analysis and design of a genetic circuit for dynamic metabolic engineering.

PubMed

Anesiadis, Nikolaos; Kobayashi, Hideki; Cluett, William R; Mahadevan, Radhakrishnan

2013-08-16

Recent advances in synthetic biology have equipped us with new tools for bioprocess optimization at the genetic level. Previously, we have presented an integrated in silico design for the dynamic control of gene expression based on a density-sensing unit and a genetic toggle switch. In the present paper, analysis of a serine-producing Escherichia coli mutant shows that an instantaneous ON-OFF switch leads to a maximum theoretical productivity improvement of 29.6% compared to the mutant. To further the design, global sensitivity analysis is applied here to a mathematical model of serine production in E. coli coupled with a genetic circuit. The model of the quorum sensing and the toggle switch involves 13 parameters of which 3 are identified as having a significant effect on serine concentration. Simulations conducted in this reduced parameter space further identified the optimal ranges for these 3 key parameters to achieve productivity values close to the maximum theoretical values. This analysis can now be used to guide the experimental implementation of a dynamic metabolic engineering strategy and reduce the time required to design the genetic circuit components.

Analysis and Design of Power Factor Pre-Regulator Based on a Symmetrical Charge Pump Circuit Applied to Electronic Ballast

NASA Astrophysics Data System (ADS)

Lazcano Olea, Miguel; Ramos Astudillo, Reynaldo; Sanhueza Robles, René; Rodriguez Rubke, Leopoldo; Ruiz-Caballero, Domingo Antonio

This paper presents the analysis and design of a power factor pre-regulator based on a symmetrical charge pump circuit applied to electronic ballast. The operation stages of the circuit are analyzed and its main design equations are obtained. Simulation and experimental results are presented in order to show the design methodology feasibility.

Design and performance evaluation of a simplified dynamic model for combined sewer overflows in pumped sewer systems

NASA Astrophysics Data System (ADS)

van Daal-Rombouts, Petra; Sun, Siao; Langeveld, Jeroen; Bertrand-Krajewski, Jean-Luc; Clemens, François

2016-07-01

Optimisation or real time control (RTC) studies in wastewater systems increasingly require rapid simulations of sewer systems in extensive catchments. To reduce the simulation time calibrated simplified models are applied, with the performance generally based on the goodness of fit of the calibration. In this research the performance of three simplified and a full hydrodynamic (FH) model for two catchments are compared based on the correct determination of CSO event occurrences and of the total discharged volumes to the surface water. Simplified model M1 consists of a rainfall runoff outflow (RRO) model only. M2 combines the RRO model with a static reservoir model for the sewer behaviour. M3 comprises the RRO model and a dynamic reservoir model. The dynamic reservoir characteristics were derived from FH model simulations. It was found that M2 and M3 are able to describe the sewer behaviour of the catchments, contrary to M1. The preferred model structure depends on the quality of the information (geometrical database and monitoring data) available for the design and calibration of the model. Finally, calibrated simplified models are shown to be preferable to uncalibrated FH models when performing optimisation or RTC studies.

Design of portable valuables touch alarm circuit

NASA Astrophysics Data System (ADS)

Li, Biqing; Li, Zhao

2017-03-01

In this paper, the name of the alarm is portable touch burglar alarm. It not only has the advantages of high sensitivity, small size and light weight, but it is easy on the trigger, the circuit is simple and easy to be implemented, besides, it works stably. This alarm is featured with simple design, convenient use, strong flexibility and reliable performance, thus it can be installed on the door or window and even can be carried on human's body. When the human body touches the metal valuables that need to be protected, the device will start the alarm equipment so as to make the bell keep ringing, and the alarm sound stops until the power is cut off.

Simplified Parallel Domain Traversal

DOE Office of Scientific and Technical Information (OSTI.GOV)

Erickson III, David J

2011-01-01

Many data-intensive scientific analysis techniques require global domain traversal, which over the years has been a bottleneck for efficient parallelization across distributed-memory architectures. Inspired by MapReduce and other simplified parallel programming approaches, we have designed DStep, a flexible system that greatly simplifies efficient parallelization of domain traversal techniques at scale. In order to deliver both simplicity to users as well as scalability on HPC platforms, we introduce a novel two-tiered communication architecture for managing and exploiting asynchronous communication loads. We also integrate our design with advanced parallel I/O techniques that operate directly on native simulation output. We demonstrate DStep bymore » performing teleconnection analysis across ensemble runs of terascale atmospheric CO{sub 2} and climate data, and we show scalability results on up to 65,536 IBM BlueGene/P cores.« less

Engineering a robust DNA split proximity circuit with minimized circuit leakage

PubMed Central

Ang, Yan Shan; Tong, Rachel; Yung, Lin-Yue Lanry

2016-01-01

DNA circuit is a versatile and highly-programmable toolbox which can potentially be used for the autonomous sensing of dynamic events, such as biomolecular interactions. However, the experimental implementation of in silico circuit designs has been hindered by the problem of circuit leakage. Here, we systematically analyzed the sources and characteristics of various types of leakage in a split proximity circuit which was engineered to spatially probe for target sites held within close proximity. Direct evidence that 3′-truncated oligonucleotides were the major impurity contributing to circuit leakage was presented. More importantly, a unique strategy of translocating a single nucleotide between domains, termed ‘inter-domain bridging’, was introduced to eliminate toehold-independent leakages while enhancing the strand displacement kinetics across a three-way junction. We also analyzed the dynamics of intermediate complexes involved in the circuit computation in order to define the working range of domain lengths for the reporter toehold and association region respectively. The final circuit design was successfully implemented on a model streptavidin-biotin system and demonstrated to be robust against both circuit leakage and biological interferences. We anticipate that this simple signal transduction strategy can be used to probe for diverse biomolecular interactions when used in conjunction with specific target recognition moieties. PMID:27207880

User-friendly design approach for analog layout design

NASA Astrophysics Data System (ADS)

Li, Yongfu; Lee, Zhao Chuan; Tripathi, Vikas; Perez, Valerio; Ong, Yoong Seang; Hui, Chiu Wing

2017-03-01

Analog circuits are sensitives to the changes in the layout environment conditions, manufacturing processes, and variations. This paper presents analog verification flow with five types of analogfocused layout constraint checks to assist engineers in identifying any potential device mismatch and layout drawing mistakes. Compared to several solutions, our approach only requires layout design, which is sufficient to recognize all the matched devices. Our approach simplifies the data preparation and allows seamless integration into the layout environment with minimum disruption to the custom layout flow. Our user-friendly analog verification flow provides the engineer with more confident with their layouts quality.

Mechanical Designs for Inorganic Stretchable Circuits in Soft Electronics.

PubMed

Wang, Shuodao; Huang, Yonggang; Rogers, John A

2015-09-01

Mechanical concepts and designs in inorganic circuits for different levels of stretchability are reviewed in this paper, through discussions of the underlying mechanics and material theories, fabrication procedures for the constituent microscale/nanoscale devices, and experimental characterization. All of the designs reported here adopt heterogeneous structures of rigid and brittle inorganic materials on soft and elastic elastomeric substrates, with mechanical design layouts that isolate large deformations to the elastomer, thereby avoiding potentially destructive plastic strains in the brittle materials. The overall stiffnesses of the electronics, their stretchability, and curvilinear shapes can be designed to match the mechanical properties of biological tissues. The result is a class of soft stretchable electronic systems that are compatible with traditional high-performance inorganic semiconductor technologies. These systems afford promising options for applications in portable biomedical and health-monitoring devices. Mechanics theories and modeling play a key role in understanding the underlining physics and optimization of these systems.

Mechanical Designs for Inorganic Stretchable Circuits in Soft Electronics

PubMed Central

Wang, Shuodao; Huang, Yonggang; Rogers, John A.

2016-01-01

Mechanical concepts and designs in inorganic circuits for different levels of stretchability are reviewed in this paper, through discussions of the underlying mechanics and material theories, fabrication procedures for the constituent microscale/nanoscale devices, and experimental characterization. All of the designs reported here adopt heterogeneous structures of rigid and brittle inorganic materials on soft and elastic elastomeric substrates, with mechanical design layouts that isolate large deformations to the elastomer, thereby avoiding potentially destructive plastic strains in the brittle materials. The overall stiffnesses of the electronics, their stretchability, and curvilinear shapes can be designed to match the mechanical properties of biological tissues. The result is a class of soft stretchable electronic systems that are compatible with traditional high-performance inorganic semiconductor technologies. These systems afford promising options for applications in portable biomedical and health-monitoring devices. Mechanics theories and modeling play a key role in understanding the underlining physics and optimization of these systems. PMID:27668126

Defense Industrial Base Assessment: U.S. Integrated Circuit Design and Fabrication Capability

DTIC Science & Technology

2009-05-01

in the U.S for the period 2003-2006, with projections to 2011.6 The resulting draft OTE survey was field tested for accuracy and usability with a...custom application specific integrated circuits (ASICs) to field programmable gate arrays (FPGAs). Companies of all sizes can manufacture these IC...able to design one-time Electronically Programmable Gate Arrays (EPGAs) while nine are able to design Field Programmable Gate Arrays (FPGAs). Eight

Digital MOS integrated circuits

NASA Astrophysics Data System (ADS)

Elmasry, M. I.

MOS in digital circuit design is considered along with aspects of digital VLSI, taking into account a comparison of MOSFET logic circuits, 1-micrometer MOSFET VLSI technology, a generalized guide for MOSFET miniaturization, processing technologies, novel circuit structures for VLSI, and questions of circuit and system design for VLSI. MOS memory cells and circuits are discussed, giving attention to a survey of high-density dynamic RAM cell concepts, one-device cells for dynamic random-access memories, variable resistance polysilicon for high density CMOS Ram, high performance MOS EPROMs using a stacked-gate cell, and the optimization of the latching pulse for dynamic flip-flop sensors. Programmable logic arrays are considered along with digital signal processors, microprocessors, static RAMs, and dynamic RAMs.

Electronic Circuit Analysis Language (ECAL)

NASA Astrophysics Data System (ADS)

Chenghang, C.

1983-03-01

The computer aided design technique is an important development in computer applications and it is an important component of computer science. The special language for electronic circuit analysis is the foundation of computer aided design or computer aided circuit analysis (abbreviated as CACD and CACA) of simulated circuits. Electronic circuit analysis language (ECAL) is a comparatively simple and easy to use circuit analysis special language which uses the FORTRAN language to carry out the explanatory executions. It is capable of conducting dc analysis, ac analysis, and transient analysis of a circuit. Futhermore, the results of the dc analysis can be used directly as the initial conditions for the ac and transient analyses.

Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges

NASA Astrophysics Data System (ADS)

Elsobky, Mourad; Mahsereci, Yigit; Keck, Jürgen; Richter, Harald; Burghartz, Joachim N.

2017-09-01

Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI) substrate to form a Hybrid System-in-Foil (HySiF), which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing) of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA) in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC). The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC), a differential difference amplifier (DDA), and a 10-bit successive approximation register (SAR) ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.

Design and implementation of therapeutic ultrasound generating circuit for dental tissue formation and tooth-root healing.

PubMed

Woon Tiong Ang; Scurtescu, C; Wing Hoy; El-Bialy, T; Ying Yin Tsui; Jie Chen

2010-02-01

Biological tissue healing has recently attracted a great deal of research interest in various medical fields. Trauma to teeth, deep and root caries, and orthodontic treatment can all lead to various degrees of root resorption. In our previous study, we showed that low-intensity pulsed ultrasound (LIPUS) enhances the growth of lower incisor apices and accelerates their rate of eruption in rabbits by inducing dental tissue growth. We also performed clinical studies and demonstrated that LIPUS facilitates the healing of orthodontically induced teeth-root resorption in humans. However, the available LIPUS devices are too large to be used comfortably inside the mouth. In this paper, the design and implementation of a low-power LIPUS generator is presented. The generator is the core of the final intraoral device for preventing tooth root loss and enhancing tooth root tissue healing. The generator consists of a power-supply subsystem, an ultrasonic transducer, an impedance-matching circuit, and an integrated circuit composed of a digital controller circuitry and the associated driver circuit. Most of our efforts focus on the design of the impedance-matching circuit and the integrated system-on-chip circuit. The chip was designed and fabricated using 0.8- ¿m high-voltage technology from Dalsa Semiconductor, Inc. The power supply subsystem and its impedance-matching network are implemented using discrete components. The LIPUS generator was tested and verified to function as designed and is capable of producing ultrasound power up to 100 mW in the vicinity of the transducer's resonance frequency at 1.5 MHz. The power efficiency of the circuitry, excluding the power supply subsystem, is estimated at 70%. The final products will be tailored to the exact size of teeth or biological tissue, which is needed to be used for stimulating dental tissue (dentine and cementum) healing.

Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E-Mode FETs for Large-Area Electronics.

PubMed

Yu, Lili; El-Damak, Dina; Radhakrishna, Ujwal; Ling, Xi; Zubair, Ahmad; Lin, Yuxuan; Zhang, Yuhao; Chuang, Meng-Hsi; Lee, Yi-Hsien; Antoniadis, Dimitri; Kong, Jing; Chandrakasan, Anantha; Palacios, Tomas

2016-10-12

Two-dimensional electronics based on single-layer (SL) MoS 2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS 2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS 2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.

Design of magnetic Circuit Simulation for Curing Device of Anisotropic MRE

NASA Astrophysics Data System (ADS)

Hapipi, N.; Ubaidillah; Mazlan, S. A.; Widodo, P. J.

2018-03-01

The strength of magnetic field during fabrication of magnetorheological elastomer (MRE) plays a crucial role in order to form a pre-structured MRE. So far, gaussmeter were used to determine the magnetic intensity subjected to the MRE during curing. However, the magnetic flux reading through that measurement considered less accurate. Therefore, a simulation should be done to figure out the magnetic flux concentration around the sample. This paper investigates the simulation of magnetic field distribution in a curing device used during curing stage of anisotropic magnetorheological elastomer (MRE). The target in designing the magnetic circuit is to ensure a sufficient and uniform magnetic field to all the MRE surfaces during the curing process. The magnetic circuit design for the curing device was performed using Finite Element Method Magnetic (FEMM) to examine the magnetic flux density distribution in the device. The material selection was first done instantaneously during a magnetic simulation process. Then, the experimental validation of simulation was performed by measuring and comparing the actual flux generated within the specimen type and the one from the FEMM simulation. İt apparent that the data from FEMM simulation shows an agreement with the actual measurement. Furthermore, the FEMM results showed that the magnetic design is able to provide sufficient and uniform magnetic field all over the surfaces of the MRE.

Simplified power processing for ion-thruster subsystems

NASA Technical Reports Server (NTRS)

Wessel, F. J.; Hancock, D. J.

1983-01-01

A design for a greatly simplified power-processing unit (SPPU) for the 8-cm diameter mercury-ion-thruster subsystem is discussed. This SPPU design will provide a tenfold reduction in parts count, a decrease in system mass and cost, and an increase in system reliability compared to the existing power-processing unit (PPU) used in the Hughes/NASA Lewis Research Center Ion Auxiliary Propulsion Subsystem. The simplifications achieved in this design will greatly increase the attractiveness of ion propulsion in near-term and future spacecraft propulsion applications. A description of a typical ion-thruster subsystem is given. An overview of the thruster/power-processor interface requirements is given. Simplified thruster power processing is discussed.

Amplifier improvement circuit

NASA Technical Reports Server (NTRS)

Sturman, J.

1968-01-01

Stable input stage was designed for the use with a integrated circuit operational amplifier to provide improved performance as an instrumentation-type amplifier. The circuit provides high input impedance, stable gain, good common mode rejection, very low drift, and low output impedance.

VLSI circuits implementing computational models of neocortical circuits.

PubMed

Wijekoon, Jayawan H B; Dudek, Piotr

2012-09-15

This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. Copyright © 2012 Elsevier B.V. All rights reserved.

Design of micro-ring optical sensors and circuits for integration on optical printed circuit boards (O-PCBs)

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, Hyun S.; Lee, S. G.; O, B. H.; Park, S. G.; Kim, K. H.

2007-05-01

We report on the design of micro-ring resonator optical sensors for integration on what we call optical printed circuit boards (O-PCBs). The objective is to realize application-specific O-PCBs, either on hard board or on flexible board, by integrating micro/nano-scale optical sensors for compact, light-weight, low-energy, high-speed, intelligent, and environmentally friendly processing of information. The O-PCBs consist of two-dimensional planar arrays of micro/nano-scale optical wires, circuits and devices that are interconnected and integrated to perform the functions of sensing and then storing, transporting, processing, switching, routing and distributing optical signals that have been collected by means of sensors. For fabrication, the polymer and organic optical wires and waveguides are first fabricated on a board and are used to interconnect and integrate sensors and other micro/ nano-scale photonic devices. Here, in our study, we focus on the sensors based on the micro-ring structures. We designed bio-sensors using silicon based micro-ring resonator. We investigate the characteristics such as sensitivity and selectivity (or quality factor) of micro-ring resonator for their use in bio-sensing application. We performed simulation studies on the quality factor of micro-ring resonators by varying the radius of the ring resonators and the separation between adjacent waveguides. We introduce the effective coupling coefficient as a realistic value to describe the strength of the coupling in micro-ring resonators.

Faster Evolution of More Multifunctional Logic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo

2005-01-01

A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.

A verified design of a fault-tolerant clock synchronization circuit: Preliminary investigations

NASA Technical Reports Server (NTRS)

Miner, Paul S.

1992-01-01

Schneider demonstrates that many fault tolerant clock synchronization algorithms can be represented as refinements of a single proven correct paradigm. Shankar provides mechanical proof that Schneider's schema achieves Byzantine fault tolerant clock synchronization provided that 11 constraints are satisfied. Some of the constraints are assumptions about physical properties of the system and cannot be established formally. Proofs are given that the fault tolerant midpoint convergence function satisfies three of the constraints. A hardware design is presented, implementing the fault tolerant midpoint function, which is shown to satisfy the remaining constraints. The synchronization circuit will recover completely from transient faults provided the maximum fault assumption is not violated. The initialization protocol for the circuit also provides a recovery mechanism from total system failure caused by correlated transient faults.

Fabric-based active electrode design and fabrication for health monitoring clothing.

PubMed

Merritt, Carey R; Nagle, H Troy; Grant, Edward

2009-03-01

In this paper, two versions of fabric-based active electrodes are presented to provide a wearable solution for ECG monitoring clothing. The first version of active electrode involved direct attachment of surface-mountable components to a textile screen-printed circuit using polymer thick film techniques. The second version involved attaching a much smaller, thinner, and less obtrusive interposer containing the active electrode circuitry to a simplified textile circuit. These designs explored techniques for electronic textile interconnection, chip attachment to textiles, and packaging of circuits on textiles for durability. The results from ECG tests indicate that the performance of each active electrode is comparable to commercial Ag/AgCl electrodes. The interposer-based active electrodes survived a five-cycle washing test while maintaining good signal integrity.

Toolbox for the design of LiNbO3-based passive and active integrated quantum circuits

NASA Astrophysics Data System (ADS)

Sharapova, P. R.; Luo, K. H.; Herrmann, H.; Reichelt, M.; Meier, T.; Silberhorn, C.

2017-12-01

We present and discuss perspectives of current developments on advanced quantum optical circuits monolithically integrated in the lithium niobate platform. A set of basic components comprising photon pair sources based on parametric down conversion (PDC), passive routing elements and active electro-optically controllable switches and polarisation converters are building blocks of a toolbox which is the basis for a broad range of diverse quantum circuits. We review the state-of-the-art of these components and provide models that properly describe their performance in quantum circuits. As an example for applications of these models we discuss design issues for a circuit providing on-chip two-photon interference. The circuit comprises a PDC section for photon pair generation followed by an actively controllable modified mach-Zehnder structure for observing Hong-Ou-Mandel interference. The performance of such a chip is simulated theoretically by taking even imperfections of the properties of the individual components into account.

a Simplified Method to Design Suspended Cabs for Counterbalance Trucks

NASA Astrophysics Data System (ADS)

LEMERLE, P.; BOULANGER, P.; POIROT, R.

2002-05-01

A “low-frequency” suspension system, placed between the driving cab and chassis of an existing fork lift truck was designed. The aim of this project was to develop a design procedure which is easy to implement and suitable for all types of fork lift trucks. It was also to show how the use of numerical simulation could be helpful to optimize the efficiency of such suspension systems. The cab specifications were: (1) to achieve a vertical vibration attenuation of at least 50% when this truck is tested under severe but realistic conditions, (2) to operate with no specific adjustment for drivers weighing between 60 and 100 kg, (3) to be efficient with a reasonable dynamic stroke (about 3 cm maximum). The suspended cab was modelled using ADAMS software. In the simplified method, the input acceleration signals (at the four fixing points of the cab) were not computed from a vehicle model (chassis and wheels) but directly measured under various driving conditions (passage of two or four wheels over an obstacle with a loaded or unloaded fork lift truck). This model allowed evaluation of the theoretical attenuation, obtained below the driver's seat along the three axes, in comparison with an infinitely rigid suspension. The attenuation ratio was calculated for several values of the characteristics of the suspension components (stiffness and damping). Similarly, for every design value tested, the design constraints were evaluated and at the end of this parametrical study, optimal suspension components were found. Finally, the suspended cab was built according to the results of the parametrical study and measurements subsequently confirmed that the attenuation of vertical accelerations was more than 50%.

Design and Measurement of Self-Matched, Dual-Frequency Coplanar-Waveguide-Fed Slot Antennas

NASA Technical Reports Server (NTRS)

Omar, Amjad A.; Scardelletti, Maxmilian C.; Hejazi, Zuhair M.; Dib, Nihad

2007-01-01

This report presents two new designs of dual-frequency, coplanar-waveguide-fed, double-folded slot antennas. An important advantage of these antennas is that, because they are self-matched to the feeding coplanar waveguide, they do not need an external matching circuit. This reduces the antenna size and simplifies its design. To verify the designs, the authors measured and compared the return loss and radiation patterns with those obtained using available commercial software with good agreement. Dual-frequency slot antennas;

A design concept for an MMIC (Monolithic Microwave Integrated Circuit) microstrip phased array

NASA Technical Reports Server (NTRS)

Lee, Richard Q.; Smetana, Jerry; Acosta, Roberto

1987-01-01

A conceptual design for a microstrip phased array with monolithic microwave integrated circuit (MMIC) amplitude and phase controls is described. The MMIC devices used are 20 GHz variable power amplifiers and variable phase shifters recently developed by NASA contractors for applications in future Ka proposed design, which concept is for a general NxN element array of rectangular lattice geometry. Subarray excitation is incorporated in the MMIC phased array design to reduce the complexity of the beam forming network and the number of MMIC components required.

Equivalent circuit and optimum design of a multilayer laminated piezoelectric transformer.

PubMed

Dong, Shuxiang; Carazo, Alfredo Vazquez; Park, Seung Ho

2011-12-01

A multilayer laminated piezoelectric Pb(Zr(1-x)Ti(x))O(3) (PZT) ceramic transformer, operating in a half- wavelength longitudinal resonant mode (λ/2 mode), has been analyzed. This piezoelectric transformer is composed of one thickness-polarized section (T-section) for exciting the longitudinal mechanical vibrations, two longitudinally polarized sections (L-section) for generating high-voltage output, and two insulating layers laminated between the T-section and L-section layers to provide insulation between the input and output sections. Based on the piezoelectric constitutive and motion equations, an electro-elasto-electric (EEE) equivalent circuit has been developed, and correspondingly, an effective EEE coupling coefficient was proposed for optimum design of this multilayer transformer. Commercial finite element analysis software is used to determine the validity of the developed equivalent circuit. Finally, a prototype sample was manufactured and experimental data was collected to verify the model's validity.

Design and implementation of improved LsCpLp resonant circuit for power supply for high-power electromagnetic acoustic transducer excitation

NASA Astrophysics Data System (ADS)

Zao, Yongming; Ouyang, Qi; Chen, Jiawei; Zhang, Xinglan; Hou, Shuaicheng

2017-08-01

This paper investigates the design and implementation of an improved series-parallel inductor-capacitor-inductor (LsCpLp) resonant circuit power supply for excitation of electromagnetic acoustic transducers (EMATs). The main advantage of the proposed resonant circuit is the absence of a high-permeability dynamic transformer. A high-frequency pulsating voltage gain can be achieved through a double resonance phenomenon. Both resonant tailing behavior and higher harmonics are suppressed by the improved resonant circuit, which also contributes to the generation of ultrasonic waves. Additionally, the proposed circuit can realize impedance matching and can also optimize the transduction efficiency. The complete design and implementation procedure for the power supply is described and has been validated by implementation of the proposed power supply to drive a portable EMAT. The circuit simulation results show close agreement with the experimental results and thus confirm the validity of the proposed topology. The proposed circuit is suitable for use as a portable EMAT excitation power supply that is fed by a low-voltage source.

RADC SCAT automated sneak circuit analysis tool

NASA Astrophysics Data System (ADS)

Depalma, Edward L.

The sneak circuit analysis tool (SCAT) provides a PC-based system for real-time identification (during the design phase) of sneak paths and design concerns. The tool utilizes an expert system shell to assist the analyst so that prior experience with sneak analysis is not necessary for performance. Both sneak circuits and design concerns are targeted by this tool, with both digital and analog circuits being examined. SCAT focuses the analysis at the assembly level, rather than the entire system, so that most sneak problems can be identified and corrected by the responsible design engineer in a timely manner. The SCAT program identifies the sneak circuits to the designer, who then decides what course of action is necessary.

Circuit design for the retina-like image sensor based on space-variant lens array

NASA Astrophysics Data System (ADS)

Gao, Hongxun; Hao, Qun; Jin, Xuefeng; Cao, Jie; Liu, Yue; Song, Yong; Fan, Fan

2013-12-01

Retina-like image sensor is based on the non-uniformity of the human eyes and the log-polar coordinate theory. It has advantages of high-quality data compression and redundant information elimination. However, retina-like image sensors based on the CMOS craft have drawbacks such as high cost, low sensitivity and signal outputting efficiency and updating inconvenience. Therefore, this paper proposes a retina-like image sensor based on space-variant lens array, focusing on the circuit design to provide circuit support to the whole system. The circuit includes the following parts: (1) A photo-detector array with a lens array to convert optical signals to electrical signals; (2) a strobe circuit for time-gating of the pixels and parallel paths for high-speed transmission of the data; (3) a high-precision digital potentiometer for the I-V conversion, ratio normalization and sensitivity adjustment, a programmable gain amplifier for automatic generation control(AGC), and a A/D converter for the A/D conversion in every path; (4) the digital data is displayed on LCD and stored temporarily in DDR2 SDRAM; (5) a USB port to transfer the data to PC; (6) the whole system is controlled by FPGA. This circuit has advantages as lower cost, larger pixels, updating convenience and higher signal outputting efficiency. Experiments have proved that the grayscale output of every pixel basically matches the target and a non-uniform image of the target is ideally achieved in real time. The circuit can provide adequate technical support to retina-like image sensors based on space-variant lens array.

Simulation of absolute amplitudes of ultrasound signals using equivalent circuits.

PubMed

Johansson, Jonny; Martinsson, Pär-Erik; Delsing, Jerker

2007-10-01

Equivalent circuits for piezoelectric devices and ultrasonic transmission media can be used to cosimulate electronics and ultrasound parts in simulators originally intended for electronics. To achieve efficient system-level optimization, it is important to simulate correct, absolute amplitude of the ultrasound signal in the system, as this determines the requirements on the electronics regarding dynamic range, circuit noise, and power consumption. This paper presents methods to achieve correct, absolute amplitude of an ultrasound signal in a simulation of a pulse-echo system using equivalent circuits. This is achieved by taking into consideration loss due to diffraction and the effect of the cable that connects the electronics and the piezoelectric transducer. The conductive loss in the transmission line that models the propagation media of the ultrasound pulse is used to model the loss due to diffraction. Results show that the simulated amplitude of the echo follows measured values well in both near and far fields, with an offset of about 10%. The use of a coaxial cable introduces inductance and capacitance that affect the amplitude of a received echo. Amplitude variations of 60% were observed when the cable length was varied between 0.07 m and 2.3 m, with simulations predicting similar variations. The high precision in the achieved results show that electronic design and system optimization can rely on system simulations alone. This will simplify the development of integrated electronics aimed at ultrasound systems.

Simplified filtered Smith predictor for MIMO processes with multiple time delays.

PubMed

Santos, Tito L M; Torrico, Bismark C; Normey-Rico, Julio E

2016-11-01

This paper proposes a simplified tuning strategy for the multivariable filtered Smith predictor. It is shown that offset-free control can be achieved with step references and disturbances regardless of the poles of the primary controller, i.e., integral action is not explicitly required. This strategy reduces the number of design parameters and simplifies tuning procedure because the implicit integrative poles are not considered for design purposes. The simplified approach can be used to design continuous-time or discrete-time controllers. Three case studies are used to illustrate the advantages of the proposed strategy if compared with the standard approach, which is based on the explicit integrative action. Copyright © 2016 ISA. Published by Elsevier Ltd. All rights reserved.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.; Gang, Guan-Wan; He, J. Q.; Ichitsubo, I.

1988-05-01

This final technical report presents results on the computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems. New results include analytical and computer aided device models of GaAs MESFETs and HEMTs or MODFETs, new synthesis techniques for monolithic feedback and distributed amplifiers and a new nonlinear CAD program for MIMIC called CADNON. This program incorporates the new MESFET and HEMT model and has been successfully applied to the design of monolithic millimeter-wave mixers.

Towards Evolving Electronic Circuits for Autonomous Space Applications

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

2000-01-01

The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.

An RC active filter design handbook

NASA Technical Reports Server (NTRS)

Deboo, G. J.

1977-01-01

The design of filters is described. Emphasis is placed on simplified procedures that can be used by the reader who has minimum knowledge about circuit design and little acquaintance with filter theory. The handbook has three main parts. The first part is a review of some information that is essential for work with filters. The second part includes design information for specific types of filter circuitry and describes simple procedures for obtaining the component values for a filter that will have a desired set of characteristics. Pertinent information relating to actual performance is given. The third part (appendix) is a review of certain topics in filter theory and is intended to provide some basic understanding of how filters are designed.

Universal programmable quantum circuit schemes to emulate an operator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Daskin, Anmer; Grama, Ananth; Kollias, Giorgos

Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are determined from the elements of the given matrix-which can be non-unitary-in an efficient way. We also give both the classical and quantummore » complexity analysis for these circuits and show that the circuits require a few classical computations. For the electronic structure simulation on a quantum computer, one has to perform the following steps: prepare the initial wave function of the system; present the evolution operator U=e{sup -iHt} for a given atomic and molecular Hamiltonian H in terms of quantum gates array and apply the phase estimation algorithm to find the energy eigenvalues. Thus, in the circuit model of quantum computing for quantum chemistry, a crucial step is presenting the evolution operator for the atomic and molecular Hamiltonians in terms of quantum gate arrays. Since the presented circuit designs are independent from the matrix decomposition techniques and the global optimization processes used to find quantum circuits for a given operator, high accuracy simulations can be done for the unitary propagators of molecular Hamiltonians on quantum computers. As an example, we show how to build the circuit design for the hydrogen molecule.« less

Development, Integration and Testing of Automated Triggering Circuit for Hybrid DC Circuit Breaker

NASA Astrophysics Data System (ADS)

Kanabar, Deven; Roy, Swati; Dodiya, Chiragkumar; Pradhan, Subrata

2017-04-01

A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed.

Self-Calibration Approach for Mixed Signal Circuits in Systems-on-Chip

NASA Astrophysics Data System (ADS)

Jung, In-Seok

MOSFET scaling has served industry very well for a few decades by proving improvements in transistor performance, power, and cost. However, they require high test complexity and cost due to several issues such as limited pin count and integration of analog and digital mixed circuits. Therefore, self-calibration is an excellent and promising method to improve yield and to reduce manufacturing cost by simplifying the test complexity, because it is possible to address the process variation effects by means of self-calibration technique. Since the prior published calibration techniques were developed for a specific targeted application, it is not easy to be utilized for other applications. In order to solve the aforementioned issues, in this dissertation, several novel self-calibration design techniques in mixed-signal mode circuits are proposed for an analog to digital converter (ADC) to reduce mismatch error and improve performance. These are essential components in SOCs and the proposed self-calibration approach also compensates the process variations. The proposed novel self-calibration approach targets the successive approximation (SA) ADC. First of all, the offset error of the comparator in the SA-ADC is reduced using the proposed approach by enabling the capacitor array in the input nodes for better matching. In addition, the auxiliary capacitors for each capacitor of DAC in the SA-ADC are controlled by using synthesized digital controller to minimize the mismatch error of the DAC. Since the proposed technique is applied during foreground operation, the power overhead in SA-ADC case is minimal because the calibration circuit is deactivated during normal operation time. Another benefit of the proposed technique is that the offset voltage of the comparator is continuously adjusted for every step to decide one-bit code, because not only the inherit offset voltage of the comparator but also the mismatch of DAC are compensated simultaneously. Synthesized digital

Standardization of Schwarz-Christoffel transformation for engineering design of semiconductor and hybrid integrated-circuit elements

NASA Astrophysics Data System (ADS)

Yashin, A. A.

1985-04-01

A semiconductor or hybrid structure into a calculable two-dimensional region mapped by the Schwarz-Christoffel transformation and a universal algorithm can be constructed on the basis of Maxwell's electro-magnetic-thermal similarity principle for engineering design of integrated-circuit elements. The design procedure involves conformal mapping of the original region into a polygon and then the latter into a rectangle with uniform field distribution, where conductances and capacitances are calculated, using tabulated standard mapping functions. Subsequent synthesis of a device requires inverse conformal mapping. Devices adaptable as integrated-circuit elements are high-resistance film resistors with periodic serration, distributed-resistance film attenuators with high transformation ratio, coplanar microstrip lines, bipolar transistors, directional couplers with distributed coupling to microstrip lines for microwave bulk devices, and quasirregular smooth matching transitions from asymmetric to coplanar microstrip lines.

Neural circuits. Labeling of active neural circuits in vivo with designed calcium integrators.

PubMed

Fosque, Benjamin F; Sun, Yi; Dana, Hod; Yang, Chao-Tsung; Ohyama, Tomoko; Tadross, Michael R; Patel, Ronak; Zlatic, Marta; Kim, Douglas S; Ahrens, Misha B; Jayaraman, Vivek; Looger, Loren L; Schreiter, Eric R

2015-02-13

The identification of active neurons and circuits in vivo is a fundamental challenge in understanding the neural basis of behavior. Genetically encoded calcium (Ca(2+)) indicators (GECIs) enable quantitative monitoring of cellular-resolution activity during behavior. However, such indicators require online monitoring within a limited field of view. Alternatively, post hoc staining of immediate early genes (IEGs) indicates highly active cells within the entire brain, albeit with poor temporal resolution. We designed a fluorescent sensor, CaMPARI, that combines the genetic targetability and quantitative link to neural activity of GECIs with the permanent, large-scale labeling of IEGs, allowing a temporally precise "activity snapshot" of a large tissue volume. CaMPARI undergoes efficient and irreversible green-to-red conversion only when elevated intracellular Ca(2+) and experimenter-controlled illumination coincide. We demonstrate the utility of CaMPARI in freely moving larvae of zebrafish and flies, and in head-fixed mice and adult flies. Copyright © 2015, American Association for the Advancement of Science.

46 CFR 169.670 - Circuit breakers.

Code of Federal Regulations, 2010 CFR

2010-10-01

... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening of... 46 Shipping 7 2010-10-01 2010-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST...

Gate drive latching circuit for an auxiliary resonant commutation circuit

NASA Technical Reports Server (NTRS)

Delgado, Eladio Clemente (Inventor); Kheraluwala, Mustansir Hussainy (Inventor)

1999-01-01

A gate drive latching circuit for an auxiliary resonant commutation circuit for a power switching inverter includes a current monitor circuit providing a current signal to a pair of analog comparators to implement latching of one of a pair of auxiliary switching devices which are used to provide commutation current for commutating switching inverters in the circuit. Each of the pair of comparators feeds a latching circuit which responds to an active one of the comparators for latching the associated gate drive circuit for one of the pair of auxiliary commutating switches. An initial firing signal is applied to each of the commutating switches to gate each into conduction and the resulting current is monitored to determine current direction and therefore the one of the switches which is carrying current. The comparator provides a latching signal to the one of the auxiliary power switches which is actually conducting current and latches that particular power switch into an on state for the duration of current through the device. The latching circuit is so designed that the only time one of the auxiliary switching devices can be latched on is during the duration of an initial firing command signal.

Parallel LC circuit model for multi-band absorption and preliminary design of radiative cooling.

PubMed

Feng, Rui; Qiu, Jun; Liu, Linhua; Ding, Weiqiang; Chen, Lixue

2014-12-15

We perform a comprehensive analysis of multi-band absorption by exciting magnetic polaritons in the infrared region. According to the independent properties of the magnetic polaritons, we propose a parallel inductance and capacitance(PLC) circuit model to explain and predict the multi-band resonant absorption peaks, which is fully validated by using the multi-sized structure with identical dielectric spacing layer and the multilayer structure with the same strip width. More importantly, we present the application of the PLC circuit model to preliminarily design a radiative cooling structure realized by merging several close peaks together. This omnidirectional and polarization insensitive structure is a good candidate for radiative cooling application.

Design of Tunable Oscillatory Dynamics in a Synthetic NF-κB Signaling Circuit.

PubMed

Zhang, Zhi-Bo; Wang, Qiu-Yue; Ke, Yu-Xi; Liu, Shi-Yu; Ju, Jian-Qi; Lim, Wendell A; Tang, Chao; Wei, Ping

2017-11-22

Although oscillatory circuits are prevalent in transcriptional regulation, it is unclear how a circuit's structure and the specific parameters that describe its components determine the shape of its oscillations. Here, we engineer a minimal, inducible human nuclear factor κB (NF-κB)-based system that is composed of NF-κB (RelA) and degradable inhibitor of NF-κB (IκBα), into the yeast, Saccharomyces cerevisiae. We define an oscillation's waveform quantitatively as a function of signal amplitude, rest time, rise time, and decay time; by systematically tuning RelA concentration, the strength of negative feedback, and the degradation rate of IκBα, we demonstrate that peak shape and frequency of oscillations can be controlled in vivo and predicted mathematically. In addition, we show that nested negative feedback loops can be employed to specifically tune the frequency of oscillations while leaving their peak shape unchanged. In total, this work establishes design principles that enable function-guided design of oscillatory signaling controllers in diverse synthetic biology applications. Copyright © 2017 Elsevier Inc. All rights reserved.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1987-08-01

This interim technical report presents results of research on the computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems. A specific objective is to extend the state-of-the-art of the Computer Aided Design (CAD) of the monolithic microwave and millimeter wave integrated circuits (MIMIC). In this reporting period, we have derived a new model for the high electron mobility transistor (HEMT) based on a nonlinear charge control formulation which takes into consideration the variation of the 2DEG distance offset from the heterointerface as a function of bias. Pseudomorphic InGaAs/GaAs HEMT devices have been successfully fabricated at UCSD. For a 1 micron gate length, a maximum transconductance of 320 mS/mm was obtained. In cooperation with TRW, devices with 0.15 micron and 0.25 micron gate lengths have been successfully fabricated and tested. New results on the design of ultra-wideband distributed amplifiers using 0.15 micron pseudomorphic InGaAs/GaAs HEMT's have also been obtained. In addition, two-dimensional models of the submicron MESFET's, HEMT's and HBT's are currently being developed for the CRAY X-MP/48 supercomputer. Preliminary results obtained are also presented in this report.

Design of high-linear CMOS circuit using a constant transconductance method for gamma-ray spectroscopy system

NASA Astrophysics Data System (ADS)

Jung, I. I.; Lee, J. H.; Lee, C. S.; Choi, Y.-W.

2011-02-01

We propose a novel circuit to be applied to the front-end integrated circuits of gamma-ray spectroscopy systems. Our circuit is designed as a type of current conveyor (ICON) employing a constant- gm (transconductance) method which can significantly improve the linearity in the amplified signals by using a large time constant and the time-invariant characteristics of an amplifier. The constant- gm method is obtained by a feedback control which keeps the transconductance of the input transistor constant. To verify the performance of the propose circuit, the time constant variations for the channel resistances are simulated with the TSMC 0.18 μm transistor parameters using HSPICE, and then compared with those of a conventional ICON. As a result, the proposed ICON shows only 0.02% output linearity variation and 0.19% time constant variation for the input amplitude up to 100 mV. These are significantly small values compared to a conventional ICON's 1.39% and 19.43%, respectively, for the same conditions.

C-MOS bulk metal design handbook. [LSI standard cell (circuits)

NASA Technical Reports Server (NTRS)

Edge, T. M.

1977-01-01

The LSI standard cell array technique was used in the fabrication of more than 20 CMOS custom arrays. This technique consists of a series of computer programs and design automation techniques referred to as the Computer Aided Design And Test (CADAT) system that automatically translate a partitioned logic diagram into a set of instructions for driving an automatic plotter which generates precision mask artwork for complex LSI arrays of CMOS standard cells. The standard cell concept for producing LSI arrays begins with the design, layout, and validation of a group of custom circuits called standard cells. Once validated, these cells are given identification or pattern numbers and are permanently stored. To use one of these cells in a logic design, the user calls for the desired cell by pattern number. The Place, Route in Two Dimension (PR2D) computer program is then used to automatically generate the metalization and/or tunnels to interconnect the standard cells into the required function. Data sheets that describe the function, artwork, and performance of each of the standard cells, the general procedure for implementation of logic in CMOS standard cells, and additional detailed design information are presented.

Mathematical neuroscience: from neurons to circuits to systems.

PubMed

Gutkin, Boris; Pinto, David; Ermentrout, Bard

2003-01-01

Applications of mathematics and computational techniques to our understanding of neuronal systems are provided. Reduction of membrane models to simplified canonical models demonstrates how neuronal spike-time statistics follow from simple properties of neurons. Averaging over space allows one to derive a simple model for the whisker barrel circuit and use this to explain and suggest several experiments. Spatio-temporal pattern formation methods are applied to explain the patterns seen in the early stages of drug-induced visual hallucinations.

General analytical solutions for DC/AC circuit-network analysis

NASA Astrophysics Data System (ADS)

Rubido, Nicolás; Grebogi, Celso; Baptista, Murilo S.

2017-06-01

In this work, we present novel general analytical solutions for the currents that are developed in the edges of network-like circuits when some nodes of the network act as sources/sinks of DC or AC current. We assume that Ohm's law is valid at every edge and that charge at every node is conserved (with the exception of the source/sink nodes). The resistive, capacitive, and/or inductive properties of the lines in the circuit define a complex network structure with given impedances for each edge. Our solution for the currents at each edge is derived in terms of the eigenvalues and eigenvectors of the Laplacian matrix of the network defined from the impedances. This derivation also allows us to compute the equivalent impedance between any two nodes of the circuit and relate it to currents in a closed circuit which has a single voltage generator instead of many input/output source/sink nodes. This simplifies the treatment that could be done via Thévenin's theorem. Contrary to solving Kirchhoff's equations, our derivation allows to easily calculate the redistribution of currents that occurs when the location of sources and sinks changes within the network. Finally, we show that our solutions are identical to the ones found from Circuit Theory nodal analysis.

Binary selectable detector holdoff circuit: Design, testing, and application. [to laser radar data acquisition system

NASA Technical Reports Server (NTRS)

Kadrmas, K. A.

1973-01-01

A very high speed switching circuit, part of a laser radar data acquisition system, has been designed and tested. The primary function of this circuit was to provide computer controlled switching of photodiode detector preamplifier power supply voltages, typically less than plus or minus 20 volts, in approximately 10 nanoseconds. Thus, in actual use, detector and/or detector preamplifier damage can be avoided as a result of sudden extremely large values of backscattered radiation being detected, such as might be due to short range, very thin atmospheric dust layers. Switching of the power supply voltages was chosen over direct switching the photodiode detector input to the preamplifier, based on system noise considerations. Also, the circuit provides a synchronized trigger pulse output for triggering devices such as the Biomation Model 8100 100 MHz analog to digital converter.

A programming language for composable DNA circuits.

PubMed

Phillips, Andrew; Cardelli, Luca

2009-08-06

Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing.

A programming language for composable DNA circuits

PubMed Central

Phillips, Andrew; Cardelli, Luca

2009-01-01

Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing. PMID:19535415

49 CFR 236.786 - Principle, closed circuit.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Principle, closed circuit. 236.786 Section 236.786 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Principle, closed circuit. The principle of circuit design where a normally energized electric circuit which...

A simplified analysis of propulsion installation losses for computerized aircraft design

NASA Technical Reports Server (NTRS)

Morris, S. J., Jr.; Nelms, W. P., Jr.; Bailey, R. O.

1976-01-01

A simplified method is presented for computing the installation losses of aircraft gas turbine propulsion systems. The method has been programmed for use in computer aided conceptual aircraft design studies that cover a broad range of Mach numbers and altitudes. The items computed are: inlet size, pressure recovery, additive drag, subsonic spillage drag, bleed and bypass drags, auxiliary air systems drag, boundary-layer diverter drag, nozzle boattail drag, and the interference drag on the region adjacent to multiple nozzle installations. The methods for computing each of these installation effects are described and computer codes for the calculation of these effects are furnished. The results of these methods are compared with selected data for the F-5A and other aircraft. The computer program can be used with uninstalled engine performance information which is currently supplied by a cycle analysis program. The program, including comments, is about 600 FORTRAN statements long, and uses both theoretical and empirical techniques.

Four-terminal circuit element with photonic core

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sampayan, Stephen

A four-terminal circuit element is described that includes a photonic core inside of the circuit element that uses a wide bandgap semiconductor material that exhibits photoconductivity and allows current flow through the material in response to the light that is incident on the wide bandgap material. The four-terminal circuit element can be configured based on various hardware structures using a single piece or multiple pieces or layers of a wide bandgap semiconductor material to achieve various designed electrical properties such as high switching voltages by using the photoconductive feature beyond the breakdown voltages of semiconductor devices or circuits operated basedmore » on electrical bias or control designs. The photonic core aspect of the four-terminal circuit element provides unique features that enable versatile circuit applications to either replace the semiconductor transistor-based circuit elements or semiconductor diode-based circuit elements.« less

The test of VLSI circuits

NASA Astrophysics Data System (ADS)

Baviere, Ph.

Tests which have proven effective for evaluating VLSI circuits for space applications are described. It is recommended that circuits be examined after each manfacturing step to gain fast feedback on inadequacies in the production system. Data from failure modes which occur during operational lifetimes of circuits also permit redefinition of the manufacturing and quality control process to eliminate the defects identified. Other tests include determination of the operational envelope of the circuits, examination of the circuit response to controlled inputs, and the performance and functional speeds of ROM and RAM memories. Finally, it is desirable that all new circuits be designed with testing in mind.

Optimizing MOS-gated thyristor using voltage-based equivalent circuit model for designing steep-subthreshold-slope PN-body-tied silicon-on-insulator FET

NASA Astrophysics Data System (ADS)

Ueda, Daiki; Takeuchi, Kiyoshi; Kobayashi, Masaharu; Hiramoto, Toshiro

2018-04-01

A new circuit model that provides a clear guide on designing a MOS-gated thyristor (MGT) is reported. MGT plays a significant role in achieving a steep subthreshold slope of a PN-body tied silicon-on-insulator (SOI) FET (PNBTFET), which is an SOI MOSFET merged with an MGT. The effects of design parameters on MGT and the proposed equivalent circuit model are examined to determine how to regulate the voltage response of MGT and how to suppress power dissipation. It is demonstrated that MGT with low threshold voltages, small hysteresis widths, and small power dissipation can be designed by tuning design parameters. The temperature dependence of MGT is also examined, and it is confirmed that hysteresis width decreases with the average threshold voltage kept nearly constant as temperature rises. The equivalent circuit model can be conveniently used to design low-power PNBTFET.

Simplified power processing for ion-thruster subsystems

NASA Technical Reports Server (NTRS)

Wessel, F. J.; Hancock, D. J.

1983-01-01

Compared to chemical propulsion, ion propulsion offers distinct payload-mass increases for many future low-thrust earth-orbital and deep-space missions. Despite this advantage, the high initial cost and complexity of ion-propulsion subsystems reduce their attractiveness for most present and near-term spacecraft missions. Investigations have, therefore, been conducted with the objective to attempt to simplify the power-processing unit (PPU), which is the single most complex and expensive component in the thruster subsystem. The present investigation is concerned with a program to simplify the design of the PPU employed in a 8-cm mercury-ion-thruster subsystem. In this program a dramatic simplification in the design of the PPU could be achieved, while retaining essential thruster control and subsystem operational flexibility.

Maximum Acceleration Recording Circuit

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr.

1995-01-01

Coarsely digitized maximum levels recorded in blown fuses. Circuit feeds power to accelerometer and makes nonvolatile record of maximum level to which output of accelerometer rises during measurement interval. In comparison with inertia-type single-preset-trip-point mechanical maximum-acceleration-recording devices, circuit weighs less, occupies less space, and records accelerations within narrower bands of uncertainty. In comparison with prior electronic data-acquisition systems designed for same purpose, circuit simpler, less bulky, consumes less power, costs and analysis of data recorded in magnetic or electronic memory devices. Circuit used, for example, to record accelerations to which commodities subjected during transportation on trucks.

Feedback circuit design of an auto-gating power supply for low-light-level image intensifier

NASA Astrophysics Data System (ADS)

Yang, Ye; Yan, Bo; Zhi, Qiang; Ni, Xiao-bing; Li, Jun-guo; Wang, Yu; Yao, Ze

2015-11-01

This paper introduces the basic principle of auto-gating power supply which using a hybrid automatic brightness control scheme. By the analysis of current as image intensifier to special requirements of auto-gating power supply, a feedback circuit of the auto-gating power supply is analyzed. Find out the reason of the screen flash after the auto-gating power supply assembled image intensifier. This paper designed a feedback circuit which can shorten the response time of auto-gating power supply and improve screen slight flicker phenomenon which the human eye can distinguish under the high intensity of illumination.

Design, development and evaluation of a resistor-based multiplexing circuit for a 20×20 SiPM array

NASA Astrophysics Data System (ADS)

Wang, Zhonghai; Sun, Xishan; Lou, Kai; Meier, Joseph; Zhou, Rong; Yang, Chaowen; Zhu, Xiaorong; Shao, Yiping

2016-04-01

One technical challenge in developing a large-size scintillator detector with multiple Silicon Photomultiplier (SiPM) arrays is to read out a large number of detector output channels. To achieve this, different signal multiplexing circuits have been studied and applied with different performances and cost-effective tradeoffs. Resistor-based multiplexing circuits exhibit simplicity and signal integrity, but also present the disadvantage of timing shift among different channels. In this study, a resistor-based multiplexing circuit for a large-sized SiPM array readout was developed and evaluated by simulation and experimental studies. Similarly to a multiplexing circuit used for multi-anode PMT, grounding and branching resistors were connected to each SiPM output channel. The grounding resistor was used to simultaneously reduce the signal crosstalk among different channels and to improve timing performance. Both grounding and branching resistor values were optimized to maintain a balanced performance of the event energy, timing, and positioning. A multiplexing circuit was implemented on a compact PCB and applied for a flat-panel detector which consisted of a 32×32 LYSO scintillator crystals optically coupled to 5×5 SiPM arrays for a total 20×20 output channels. Test results showed excellent crystal identification for all 1024 LYSO crystals (each with 2×2×30 mm3 size) with 22Na flood-source irradiation. The measured peak-to-valley ratio from typical crystal map profile is around 3:1 to 6.6:1, an average single crystal energy resolution of about 17.3%, and an average single crystal timing resolution of about 2 ns. Timing shift among different crystals, as reported in some other resistor-based multiplexing circuit designs, was not observed. In summary, we have designed and implemented a practical resistor-based multiplexing circuit that can be readily applied for reading out a large SiPM array with good detector performance.

Design of Complex BPF with Automatic Digital Tuning Circuit for Low-IF Receivers

NASA Astrophysics Data System (ADS)

Kondo, Hideaki; Sawada, Masaru; Murakami, Norio; Masui, Shoichi

This paper describes the architecture and implementations of an automatic digital tuning circuit for a complex bandpass filter (BPF) in a low-power and low-cost transceiver for applications such as personal authentication and wireless sensor network systems. The architectural design analysis demonstrates that an active RC filter in a low-IF architecture can be at least 47.7% smaller in area than a conventional gm-C filter; in addition, it features a simple implementation of an associated tuning circuit. The principle of simultaneous tuning of both the center frequency and bandwidth through calibration of a capacitor array is illustrated as based on an analysis of filter characteristics, and a scalable automatic digital tuning circuit with simple analog blocks and control logic having only 835 gates is introduced. The developed capacitor tuning technique can achieve a tuning error of less than ±3.5% and lower a peaking in the passband filter characteristics. An experimental complex BPF using 0.18µm CMOS technology can successfully reduce the tuning error from an initial value of -20% to less than ±2.5% after tuning. The filter block dimensions are 1.22mm × 1.01mm; and in measurement results of the developed complex BPF with the automatic digital tuning circuit, current consumption is 705µA and the image rejection ratio is 40.3dB. Complete evaluation of the BPF indicates that this technique can be applied to low-power, low-cost transceivers.

Electronic circuits for communications systems: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

The compilation of electronic circuits for communications systems is divided into thirteen basic categories, each representing an area of circuit design and application. The compilation items are moderately complex and, as such, would appeal to the applications engineer. However, the rationale for the selection criteria was tailored so that the circuits would reflect fundamental design principles and applications, with an additional requirement for simplicity whenever possible.

Design and Analysis of Compact DNA Strand Displacement Circuits for Analog Computation Using Autocatalytic Amplifiers.

PubMed

Song, Tianqi; Garg, Sudhanshu; Mokhtar, Reem; Bui, Hieu; Reif, John

2018-01-19

A main goal in DNA computing is to build DNA circuits to compute designated functions using a minimal number of DNA strands. Here, we propose a novel architecture to build compact DNA strand displacement circuits to compute a broad scope of functions in an analog fashion. A circuit by this architecture is composed of three autocatalytic amplifiers, and the amplifiers interact to perform computation. We show DNA circuits to compute functions sqrt(x), ln(x) and exp(x) for x in tunable ranges with simulation results. A key innovation in our architecture, inspired by Napier's use of logarithm transforms to compute square roots on a slide rule, is to make use of autocatalytic amplifiers to do logarithmic and exponential transforms in concentration and time. In particular, we convert from the input that is encoded by the initial concentration of the input DNA strand, to time, and then back again to the output encoded by the concentration of the output DNA strand at equilibrium. This combined use of strand-concentration and time encoding of computational values may have impact on other forms of molecular computation.

14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2013 CFR

2013-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...

14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2012 CFR

2012-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...

14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2014 CFR

2014-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...

14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2011 CFR

2011-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...

Design issues of a low cost lock-in amplifier readout circuit for an infrared detector

NASA Astrophysics Data System (ADS)

Scheepers, L.; Schoeman, J.

2014-06-01

In the past, high resolution thermal sensors required expensive cooling techniques making the early thermal imagers expensive to operate and cumbersome to transport, limiting them mainly to military applications. However, the introduction of uncooled microbolometers has overcome many of earlier problems and now shows great potential for commercial optoelectric applications. The structure of uncooled microbolometer sensors, especially their smaller size, makes them attractive in low cost commercial applications requiring high production numbers with relatively low performance requirements. However, the biasing requirements of these microbolometers cause these sensors to generate a substantial amount of noise on the output measurements due to self-heating. Different techniques to reduce this noise component have been attempted, such as pulsed biasing currents and the use of blind bolometers as common mode reference. These techniques proved to either limit the performance of the microbolometer or increase the cost of their implementation. The development of a low cost lock-in amplifier provides a readout technique to potentially overcome these challenges. High performance commercial lock-in amplifiers are very expensive. Using this as a readout circuit for a microbolometer will take away from the low manufacturing cost of the detector array. Thus, the purpose of this work was to develop a low cost readout circuit using the technique of phase sensitive detection and customizing this as a readout circuit for microbolometers. The hardware and software of the readout circuit was designed and tested for improvement of the signal-to-noise ratio (SNR) of the microbolometer signal. An optical modulation system was also developed in order to effectively identify the desired signal from the noise with the use of the readout circuit. A data acquisition and graphical user interface sub system was added in order to display the signal recovered by the readout circuit. The readout

Sensing circuits for multiwire proportional chambers

NASA Technical Reports Server (NTRS)

Peterson, H. T.; Worley, E. R.

1977-01-01

Integrated sensing circuits were designed, fabricated, and packaged for use in determining the direction and fluence of ionizing radiation passing through a multiwire proportional chamber. CMOS on sapphire was selected because of its high speed and low power capabilities. The design of the proposed circuits is described and the results of computer simulations are presented. The fabrication processes for the CMOS on sapphire sensing circuits and hybrid substrates are outlined. Several design options are described and the cost implications of each discussed. To be most effective, each chip should handle not more than 32 inputs, and should be mounted on its own hybrid substrate.

Studying light-harvesting models with superconducting circuits.

PubMed

Potočnik, Anton; Bargerbos, Arno; Schröder, Florian A Y N; Khan, Saeed A; Collodo, Michele C; Gasparinetti, Simone; Salathé, Yves; Creatore, Celestino; Eichler, Christopher; Türeci, Hakan E; Chin, Alex W; Wallraff, Andreas

2018-03-02

The process of photosynthesis, the main source of energy in the living world, converts sunlight into chemical energy. The high efficiency of this process is believed to be enabled by an interplay between the quantum nature of molecular structures in photosynthetic complexes and their interaction with the environment. Investigating these effects in biological samples is challenging due to their complex and disordered structure. Here we experimentally demonstrate a technique for studying photosynthetic models based on superconducting quantum circuits, which complements existing experimental, theoretical, and computational approaches. We demonstrate a high degree of freedom in design and experimental control of our approach based on a simplified three-site model of a pigment protein complex with realistic parameters scaled down in energy by a factor of 10 5 . We show that the excitation transport between quantum-coherent sites disordered in energy can be enabled through the interaction with environmental noise. We also show that the efficiency of the process is maximized for structured noise resembling intramolecular phononic environments found in photosynthetic complexes.

Trap Design and Construction for High-Power Multinuclear Magnetic Resonance Experiments

PubMed Central

Rispoli, Joseph V.; Dimitrov, Ivan E.; Cheshkov, Sergey; Malloy, Craig; Wright, Steven M.; McDougall, Mary P.

2016-01-01

Performing multinuclear experiments requires one or more radiofrequency (RF) coils operating at both the proton and second-nucleus frequencies; however, inductive coupling between coils must be mitigated to retain proton sensitivity and coil tuning stability. The inclusion of trap circuits simplifies placement of multinuclear RF coils while maintaining inter-element isolation. Of the commonly investigated non-proton nuclei, perhaps the most technically demanding is carbon-13, particularly when applying a proton decoupling scheme to improve the resulting spectra. This work presents experimental data for trap circuits withstanding high-power broadband proton decoupling of carbon-13 at 7 T. The advantages and challenges of building trap circuits with various inductor and capacitor components are discussed. Multiple trap designs are evaluated on the bench and utilized on an RF coil at 7 T to detect broadband proton-decoupled carbon-13 spectra from a lipid phantom. A particular trap design, built from a coaxial stub inductor and high-voltage ceramic chip capacitors, is highlighted owing to both its performance and adaptability for planar array coil elements with diverse spatial orientations. PMID:28529464

Selection of wires and circuit protective devices for STS Orbiter vehicle payload electrical circuits

NASA Technical Reports Server (NTRS)

Gaston, Darilyn M.

1991-01-01

Electrical designers of Orbiter payloads face the challenge of determining proper circuit protection/wire size parameters to satisfy Orbiter engineering and safety requirements. This document is the result of a program undertaken to review test data from all available aerospace sources and perform additional testing to eliminate extrapolation errors. The resulting compilation of data was used to develop guidelines for the selection of wire sizes and circuit protection ratings. The purpose is to provide guidance to the engineering to ensure a design which meets Orbiter standards and which should be applicable to any aerospace design.

Electronic control circuits: A compilation

NASA Technical Reports Server (NTRS)

1973-01-01

A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

Compact beam splitters with deep gratings for miniature photonic integrated circuits: design and implementation aspects.

PubMed

Chen, Chin-Hui; Klamkin, Jonathan; Nicholes, Steven C; Johansson, Leif A; Bowers, John E; Coldren, Larry A

2009-09-01

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 microm long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs.

Design of surface acoustic wave filters for the multiplex transmission system of multilevel inverter circuits

NASA Astrophysics Data System (ADS)

Kubo, Keita; Kanai, Nanae; Kobayashi, Fumiya; Goka, Shigeyoshi; Wada, Keiji; Kakio, Shoji

2017-07-01

We designed surface acoustic wave (SAW) filters for a multiplex transmission system of multilevel inverter circuits, and applied them to a single-phase three-level inverter. To reduce the transmission delay time of the SAW filters, a four-channel SAW filter array was fabricated and its characteristics were measured. The delay time of the SAW filters was <350 ns, and the delay time difference was reduced to ≤184 ns, less than half that previously reported. The SAW filters withstood up to 990 V, which is sufficient for the inverters used in most domestic appliances. A single-phase three-level inverter with the fabricated SAW filters worked with a total delay time shorter than our target delay time of 2.5 µs. The delay time difference of the proposed system was 0.26 µs, which is sufficient for preventing the inverter circuit from short-circuiting. The SAW filters controlled a multilevel inverter system with simple signal wiring and high dielectric withstanding voltages.

Design of parity generator and checker circuit using electro-optic effect of Mach-Zehnder interferometers

NASA Astrophysics Data System (ADS)

Kumar, Santosh; Chanderkanta; Amphawan, Angela

2016-04-01

Parity is an extra bit which is used to add in digital information to detect error at the receiver end. It can be even and odd parity. In case of even parity, the number of one's will be even included the parity and reverse in the case of odd parity. The circuit which is used to generate the parity at the transmitter side, called the parity generator and the circuit which is used to detect the parity at receiver side is called as parity checker. In this paper, an even and odd parity generator and checker circuits are designed using electro-optic effect inside lithium niobate based Mach-Zehnder Interferometers (MZIs). The MZIs structures collectively show powerful capability in switching an input optical signal to a desired output port from a collection of output ports. The paper constitutes a mathematical description of the proposed device and thereafter simulation using MATLAB. The study is verified using beam propagation method (BPM).

Educational Support System for Experiments Involving Construction of Sound Processing Circuits

ERIC Educational Resources Information Center

Takemura, Atsushi

2012-01-01

This paper proposes a novel educational support system for technical experiments involving the production of practical electronic circuits for sound processing. To support circuit design and production, each student uses a computer during the experiments, and can learn circuit design, virtual circuit making, and real circuit making. In the…

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Performance of differential pair circuits designed with line tunnel FET devices at different temperatures

NASA Astrophysics Data System (ADS)

Martino, M. D. V.; Martino, J. A.; Agopian, P. G. D.; Rooyackers, R.; Simoen, E.; Collaert, N.; Claeys, C.

2018-07-01

This work studies differential pair circuits designed with Line tunnel field effect transistors (TFETs), comparing their suitability with conventional Point TFETs. Differential voltage gain (A d), compliance voltage and sensitivity to channel length mismatch are analyzed experimentally for different temperatures. The first part highlights individual characteristics of Line TFETs, focusing on behaviors that affect analog circuits. In comparison to Point TFETs, Line TFETs present higher drive current, better transconductance and worse output conductance. In the second part, differential pairs are studied at room temperature for different dimensions and bias conditions. Line TFETs present the highest A d, while Point TFET decrease the susceptibility to channel length mismatch. In the last part, the temperature impact is investigated. Based on the activation energy, the impact of band-to-band tunneling and trap-assisted tunneling is discussed for different bias conditions. A general equation is proposed, including the technology and the susceptibility to temperature and dimensions. It was observed that Line TFETs are a good option to design differential pairs with higher A d and ON-state current than Point TFETs.

Circuit Training: Exercise That Counts.

ERIC Educational Resources Information Center

Mosher, Patricia E.; Underwood, Steven A.

1992-01-01

Describes how to assess and implement aerobic circuit training, which involves multistation weight training apparatus, handweights, and aerobic activity equipment to increase cardiovascular fitness and strength. Designed for high school and college students, the circuit requires 25 minutes to complete. (SM)

Implementation of integrated circuit and design of SAR ADC for fully implantable hearing aids.

PubMed

Kim, Jong Hoon; Lee, Jyung Hyun; Cho, Jin-Ho

2017-07-20

The hearing impaired population has been increasing; many people suffer from hearing problems. To deal with this difficulty, various types of hearing aids are being rapidly developed. In particular, fully implantable hearing aids are being actively studied to improve the performance of existing hearing aids and to reduce the stigma of hearing loss patients. It has to be of small size and low-power consumption for easy implantation and long-term use. The objective of the study was to implement a small size and low-power consumption successive approximation register analog-to-digital converter (SAR ADC) for fully implantable hearing aids. The ADC was selected as the SAR ADC because its analog circuit components are less required by the feedback circuit of the SAR ADC than the sigma-delta ADC which is conventionally used in hearing aids, and it has advantages in the area and power consumption. So, the circuit of SAR ADC is designed considering the speech region of humans because the objective is to deliver the speech signals of humans to hearing loss patients. If the switch of sample and hold works in the on/off positions, the charge injection and clock feedthrough are produced by a parasitic capacitor. These problems affect the linearity of the hold voltage, and as a result, an error of the bit conversion is generated. In order to solve the problem, a CMOS switch that consists of NMOS and PMOS was used, and it reduces the charge injection because the charge carriers in the NMOS and PMOS have inversed polarity. So, 16 bit conversion is performed before the occurrence of the Least Significant Bit (LSB) error. In order to minimize the offset voltage and power consumption of the designed comparator, we designed a preamplifier with current mirror. Therefore, the power consumption was reduced by the power control switch used in the comparator. The layout of the designed SAR ADC was performed by Virtuoso Layout Editor (Cadence, USA). In the layout result, the size of the

A plasma model for reversed field pinch circuit design

NASA Astrophysics Data System (ADS)

Johnston, J. W.

1981-03-01

A plasma model has been developed for use in the design of circuits for reversed field pinch experiments. The magnetic field is assumed to evolve through a given series of relaxed states with the plasma resistivity specified as a function of time. At any instant the magnetic field configuration is determined by the field energy and the toroidal flux. If the Bessel function model is chosen as the relaxed state then the magnetic helicity can be used as an alternative to the magnetic energy without altering the results. Simulations of discharges on ZETA and ETA BETA II are presented. By suitable choices of the relaxed field configuration and plasma resistivity it is possible to obtain close agreement with the experimental waveforms. Application to the proposed RFX device is discussed.

EMG circuit design and AR analysis of EMG signs.

PubMed

Hardalaç, Firat; Canal, Rahmi

2004-12-01

In this study, electromyogram (EMG) circuit was designed and tested on 27 people. Autoregressive (AR) analysis of EMG signals recorded on the ulnar nerve region of the right hand in resting position was performed. AR method, especially in the calculation of the spectrums of stable signs, is used for frequency analysis of signs, which give frequency response as sharp peaks and valleys. In this study, as the result of AR method analysis of EMG signals frequency-time domain, frequency spectrum curves (histogram curves) were obtained. As the images belonging to these histograms were evaluated, fibrillation potential widths of the muscle fibers of the ulnar nerve region of the people (material of the study) were examined. According to the degeneration degrees of the motor nerves, nine people had myopathy, nine had neuropathy, and nine were normal.

Engineering-Aligned 3D Neural Circuit in Microfluidic Device.

PubMed

Bang, Seokyoung; Na, Sangcheol; Jang, Jae Myung; Kim, Jinhyun; Jeon, Noo Li

2016-01-07

The brain is one of the most important and complex organs in the human body. Although various neural network models have been proposed for in vitro 3D neuronal networks, it has been difficult to mimic functional and structural complexity of the in vitro neural circuit. Here, a microfluidic model of a simplified 3D neural circuit is reported. First, the microfluidic device is filled with Matrigel and continuous flow is delivered across the device during gelation. The fluidic flow aligns the extracellular matrix (ECM) components along the flow direction. Following the alignment of ECM fibers, neurites of primary rat cortical neurons are grown into the Matrigel at the average speed of 250 μm d(-1) and form axon bundles approximately 1500 μm in length at 6 days in vitro (DIV). Additionally, neural networks are developed from presynaptic to postsynaptic neurons at 14 DIV. The establishment of aligned 3D neural circuits is confirmed with the immunostaining of PSD-95 and synaptophysin and the observation of calcium signal transmission. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Microwave Photonic Architecture for Direction Finding of LPI Emitters: Front End Analog Circuit Design and Component Characterization

DTIC Science & Technology

2016-09-01

design to control the phase shifters was complex, and the calibration process was time consuming. During the redesign process, we carried out...signals in time domain with a maximum sampling frequency of 20 Giga samples per second. In the previous tests of the design , the performance of...PHOTONIC ARCHITECTURE FOR DIRECTION FINDING OF LPI EMITTERS: FRONT-END ANALOG CIRCUIT DESIGN AND COMPONENT CHARACTERIZATION by Chew K. Tan

Cost optimization in low volume VLSI circuits

NASA Technical Reports Server (NTRS)

Cook, K. B., Jr.; Kerns, D. V., Jr.

1982-01-01

The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.

Another Nulling Hall-Effect Current-Measuring Circuit

NASA Technical Reports Server (NTRS)

Thibodeau, Phillip E.; Sullender, Craig C.

1993-01-01

Lightweight, low-power circuit provides noncontact measurement of alternating or direct current of many ampheres in main conductor. Advantages of circuit over other nulling Hall-effect current-measuring circuits is stability and accuracy increased by putting both analog-to-digital and digital-to-analog converters in nulling feedback loop. Converters and rest of circuit designed for operation at sampling rate of 100 kHz, but rate changed to alter time or frequency response of circuit.

DIFFERENTIAL FAULT SENSING CIRCUIT

DOEpatents

Roberts, J.H.

1961-09-01

A differential fault sensing circuit is designed for detecting arcing in high-voltage vacuum tubes arranged in parallel. A circuit is provided which senses differences in voltages appearing between corresponding elements likely to fault. Sensitivity of the circuit is adjusted to some level above which arcing will cause detectable differences in voltage. For particular corresponding elements, a group of pulse transformers are connected in parallel with diodes connected across the secondaries thereof so that only voltage excursions are transmitted to a thyratron which is biased to the sensitivity level mentioned.

Faster Hall-Effect Current-Measuring Circuit

NASA Technical Reports Server (NTRS)

Sullender, Craig C.; Johnson, Daniel D.; Walker, Daniel D.

1993-01-01

Current-measuring circuit operates on Hall-effect-sensing and magnetic-field-nulling principles similar to those described in article, "Nulling Hall-Effect Current-Measuring Circuit" (LEW-15023), but simpler and responds faster. Designed without feedback loop, and analog pulse-width-modulated output indicates measured current. Circuit measures current at frequency higher than bandwidth of its Hall-effect sensor.

Architecture design of resistor/FET-logic demultiplexer for hybrid CMOS/nanodevice circuit interconnect.

PubMed

Li, Shu; Zhang, Tong

2008-05-07

Hybrid nanoelectronics consisting of nanodevice crossbars on top of CMOS backplane circuits is emerging as one viable option to sustain Moore's law after the CMOS scaling limit is reached. One main design challenge in such hybrid nanoelectronics is the interface between the highly dense nanowires in nanodevice crossbars and relatively coarse microwires in the CMOS domain. Such an interface can be realized through a logic circuit called a demultiplexer (demux). In this context, all the prior work on demux design uses a single type of device, such as resistor, diode or field effect transistor (FET), to realize the demultiplexing function. However, different types of devices have their own advantages and disadvantages in terms of functionality, manufacturability, speed and power consumption. This makes none of them provide a satisfactory solution. To tackle this challenge, this work proposes to combine resistor with FET to implement the demux, leading to the hybrid resistor/FET-logic demux. Such hybrid demux architecture can make these two types of devices complement each other well to improve the overall demux design effectiveness. Furthermore, due to the inevitable fabrication process variations at the nanoscale, the effects of resistor conductance and FET threshold voltage variability are analyzed and evaluated based on computer simulations. The simulation results provide the requirement on the fabrication process to ensure a high demux reliability, and promise the hybrid resistor/FET-logic demux an improved addressability and process variance tolerance.

Towards a standard design model for quad-rotors: A review of current models, their accuracy and a novel simplified model

NASA Astrophysics Data System (ADS)

Amezquita-Brooks, Luis; Liceaga-Castro, Eduardo; Gonzalez-Sanchez, Mario; Garcia-Salazar, Octavio; Martinez-Vazquez, Daniel

2017-11-01

Applications based on quad-rotor-vehicles (QRV) are becoming increasingly wide-spread. Many of these applications require accurate mathematical representations for control design, simulation and estimation. However, there is no consensus on a standardized model for these purposes. In this article a review of the most common elements included in QRV models reported in the literature is presented. This survey shows that some elements are recurrent for typical non-aerobatic QRV applications; in particular, for control design and high-performance simulation. By synthesising the common features of the reviewed models a standard generic model SGM is proposed. The SGM is cast as a typical state-space model without memory-less transformations, a structure which is useful for simulation and controller design. The survey also shows that many QRV applications use simplified representations, which may be considered simplifications of the SGM here proposed. In order to assess the effectiveness of the simplified models, a comprehensive comparison based on digital simulations is presented. With this comparison, it is possible to determine the accuracy of each model under particular operating ranges. Such information is useful for the selection of a model according to a particular application. In addition to the models found in the literature, in this article a novel simplified model is derived. The main characteristics of this model are that its inner dynamics are linear, it has low complexity and it has a high level of accuracy in all the studied operating ranges, a characteristic found only in more complex representations. To complement the article the main elements of the SGM are evaluated with the aid of experimental data and the computational complexity of all surveyed models is briefly analysed. Finally, the article presents a discussion on how the structural characteristics of the models are useful to suggest particular QRV control structures.

Interface Circuit Board For Space-Shuttle Communications

NASA Technical Reports Server (NTRS)

Parrish, Brett T.

1995-01-01

Report describes interface electronic circuit developed to enable ground controllers to send commands and data via Ku-band radio uplink to multiple circuits connected to standard IEEE-488 general-purpose interface bus in space shuttle. Design of circuit extends data-throughput capability of communication system.

Optimization study on inductive-resistive circuit for broadband piezoelectric energy harvesters

NASA Astrophysics Data System (ADS)

Tan, Ting; Yan, Zhimiao

2017-03-01

The performance of cantilever-beam piezoelectric energy harvester is usually analyzed with pure resistive circuit. The optimal performance of such a vibration-based energy harvesting system is limited by narrow bandwidth around its modified natural frequency. For broadband piezoelectric energy harvesting, series and parallel inductive-resistive circuits are introduced. The electromechanical coupled distributed parameter models for such systems under harmonic base excitations are decoupled with modified natural frequency and electrical damping to consider the coupling effect. Analytical solutions of the harvested power and tip displacement for the electromechanical decoupled model are confirmed with numerical solutions for the coupled model. The optimal performance of piezoelectric energy harvesting with inductive-resistive circuits is revealed theoretically as constant maximal power at any excitation frequency. This is achieved by the scenarios of matching the modified natural frequency with the excitation frequency and equating the electrical damping to the mechanical damping. The inductance and load resistance should be simultaneously tuned to their optimal values, which may not be applicable for very high electromechanical coupling systems when the excitation frequency is higher than their natural frequencies. With identical optimal performance, the series inductive-resistive circuit is recommended for relatively small load resistance, while the parallel inductive-resistive circuit is suggested for relatively large load resistance. This study provides a simplified optimization method for broadband piezoelectric energy harvesters with inductive-resistive circuits.

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2013 CFR

2013-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2014 CFR

2014-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2011 CFR

2011-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2012 CFR

2012-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...

Creating single-copy genetic circuits

PubMed Central

Lee, Jeong Wook; Gyorgy, Andras; Cameron, D. Ewen; Pyenson, Nora; Choi, Kyeong Rok; Way, Jeffrey C.; Silver, Pamela A.; Del Vecchio, Domitilla; Collins, James J.

2017-01-01

SUMMARY Synthetic biology is increasingly used to develop sophisticated living devices for basic and applied research. Many of these genetic devices are engineered using multi-copy plasmids, but as the field progresses from proof-of-principle demonstrations to practical applications, it is important to develop single-copy synthetic modules that minimize consumption of cellular resources and can be stably maintained as genomic integrants. Here we use empirical design, mathematical modeling and iterative construction and testing to build single-copy, bistable toggle switches with improved performance and reduced metabolic load that can be stably integrated into the host genome. Deterministic and stochastic models led us to focus on basal transcription to optimize circuit performance and helped to explain the resulting circuit robustness across a large range of component expression levels. The design parameters developed here provide important guidance for future efforts to convert functional multi-copy gene circuits into optimized single-copy circuits for practical, real-world use. PMID:27425413

Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

Rearchitecting IT: Simplify. Simplify

ERIC Educational Resources Information Center

Panettieri, Joseph C.

2006-01-01

Simplifying and securing an IT infrastructure is not easy. It frequently requires rethinking years of hardware and software investments, and a gradual migration to modern systems. Even so, writes the author, universities can take six practical steps to success: (1) Audit software infrastructure; (2) Evaluate current applications; (3) Centralize…

Simplifying Operational Design

DTIC Science & Technology

2012-05-01

centuries of historical case studies, tracing the 9 evolution and development of what was then in 1997 operational theory. Naveh called his...major cases against operational design is the IDF’s application of SOD in 2006 against Hezbollah in Lebanon. While many blamed Israel’s lack of success...networked centricity.68 This is not the case . War, like ecosystems and economies, is a complex adaptive system. The interactive complexity that comprises

Voltage linear transformation circuit design

NASA Astrophysics Data System (ADS)

Sanchez, Lucas R. W.; Jin, Moon-Seob; Scott, R. Phillip; Luder, Ryan J.; Hart, Michael

2017-09-01

Many engineering projects require automated control of analog voltages over a specified range. We have developed a computer interface comprising custom hardware and MATLAB code to provide real-time control of a Thorlabs adaptive optics (AO) kit. The hardware interface includes an op amp cascade to linearly shift and scale a voltage range. With easy modifications, any linear transformation can be accommodated. In AO applications, the design is suitable to drive a range of different types of deformable and fast steering mirrors (FSM's). Our original motivation and application was to control an Optics in Motion (OIM) FSM which requires the customer to devise a unique interface to supply voltages to the mirror controller to set the mirror's angular deflection. The FSM is in an optical servo loop with a wave front sensor (WFS), which controls the dynamic behavior of the mirror's deflection. The code acquires wavefront data from the WFS and fits a plane, which is subsequently converted into its corresponding angular deflection. The FSM provides +/-3° optical angular deflection for a +/-10 V voltage swing. Voltages are applied to the mirror via a National Instruments digital-to-analog converter (DAC) followed by an op amp cascade circuit. This system has been integrated into our Thorlabs AO testbed which currently runs at 11 Hz, but with planned software upgrades, the system update rate is expected to improve to 500 Hz. To show that the FSM subsystem is ready for this speed, we conducted two different PID tuning runs at different step commands. Once 500 Hz is achieved, we plan to make the code and method for our interface solution freely available to the community.

A Simplified GCS-DCSK Modulation and Its Performance Optimization

NASA Astrophysics Data System (ADS)

Xu, Weikai; Wang, Lin; Chi, Chong-Yung

2016-12-01

In this paper, a simplified Generalized Code-Shifted Differential Chaos Shift Keying (GCS-DCSK) whose transmitter never needs any delay circuits, is proposed. However, its performance is deteriorated because the orthogonality between substreams cannot be guaranteed. In order to optimize its performance, the system model of the proposed GCS-DCSK with power allocations on substreams is presented. An approximate bit error rate (BER) expression of the proposed model, which is a function of substreams’ power, is derived using Gaussian Approximation. Based on the BER expression, an optimal power allocation strategy between information substreams and reference substream is obtained. Simulation results show that the BER performance of the proposed GCS-DCSK with the optimal power allocation can be significantly improved when the number of substreams M is large.

Simplified, inverse, ejector design tool

NASA Technical Reports Server (NTRS)

Dechant, Lawrence J.

1993-01-01

A simple lumped parameter based inverse design tool has been developed which provides flow path geometry and entrainment estimates subject to operational, acoustic, and design constraints. These constraints are manifested through specification of primary mass flow rate or ejector thrust, fully-mixed exit velocity, and static pressure matching. Fundamentally, integral forms of the conservation equations coupled with the specified design constraints are combined to yield an easily invertible linear system in terms of the flow path cross-sectional areas. Entrainment is computed by back substitution. Initial comparison with experimental and analogous one-dimensional methods show good agreement. Thus, this simple inverse design code provides an analytically based, preliminary design tool with direct application to High Speed Civil Transport (HSCT) design studies.

Modeling cortical circuits.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.

2010-09-01

The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approachmore » is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.« less

Nonlinear relaxation algorithms for circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saleh, R.A.

Circuit simulation is an important Computer-Aided Design (CAD) tool in the design of Integrated Circuits (IC). However, the standard techniques used in programs such as SPICE result in very long computer-run times when applied to large problems. In order to reduce the overall run time, a number of new approaches to circuit simulation were developed and are described. These methods are based on nonlinear relaxation techniques and exploit the relative inactivity of large circuits. Simple waveform-processing techniques are described to determine the maximum possible speed improvement that can be obtained by exploiting this property of large circuits. Three simulation algorithmsmore » are described, two of which are based on the Iterated Timing Analysis (ITA) method and a third based on the Waveform-Relaxation Newton (WRN) method. New programs that incorporate these techniques were developed and used to simulate a variety of industrial circuits. The results from these simulations are provided. The techniques are shown to be much faster than the standard approach. In addition, a number of parallel aspects of these algorithms are described, and a general space-time model of parallel-task scheduling is developed.« less

Implementation of a quantum controlled-SWAP gate with photonic circuits

NASA Astrophysics Data System (ADS)

Ono, Takafumi; Okamoto, Ryo; Tanida, Masato; Hofmann, Holger F.; Takeuchi, Shigeki

2017-03-01

Quantum information science addresses how the processing and transmission of information are affected by uniquely quantum mechanical phenomena. Combination of two-qubit gates has been used to realize quantum circuits, however, scalability is becoming a critical problem. The use of three-qubit gates may simplify the structure of quantum circuits dramatically. Among them, the controlled-SWAP (Fredkin) gates are essential since they can be directly applied to important protocols, e.g., error correction, fingerprinting, and optimal cloning. Here we report a realization of the Fredkin gate for photonic qubits. We achieve a fidelity of 0.85 in the computational basis and an output state fidelity of 0.81 for a 3-photon Greenberger-Horne-Zeilinger state. The estimated process fidelity of 0.77 indicates that our Fredkin gate can be applied to various quantum tasks.

Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

1995-01-01

Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

Process design kit and circuits at a 2 µm technology node for flexible wearable electronics applications (Conference Presentation)

NASA Astrophysics Data System (ADS)

Torres-Miranda, Miguel; Petritz, Andreas; Gold, Herbert; Stadlober, Barbara

2016-09-01

In this work we present our most advanced technology node of organic thin film transistors (OTFTs) manufactured with a channel length as short as 2 μm by contact photolithography and a self-alignment process directly on a plastic substrate. Our process design kit (PDK) is described with P-type transistors, capacitors and 3 metal layers for connections of complex circuits. The OTFTs are composed of a double dielectric layer with a photopatternable ultra thin polymer (PNDPE) and alumina, with a thickness on the order of 100 nm. The organic semiconductor is either Pentacene or DNTT, which have a stable average mobility up to 0.1 cm2/Vs. Finally, a polymer (e.g.: Parylene-C) is used as a passivation layer. We describe also our design rules for the placement of standard circuit cells. A "plastic wafer" is fabricated containing 49 dies. Each die of 1 cm2 has between 25 to 50 devices, proving larger scale integration in such a small space, unique in organic technologies. Finally, we present the design (by simulations using a Spice model for OTFTs) and the test of analog and digital basic circuits: amplifiers with DC gains of about 20 dB, comparators, inverters and logic gates working in the frequency range of 1-10 kHz. These standard circuit cells could be used for signal conditioning and integrated as active matrices for flexible sensors from 3rd party institutions, thus opening our fab to new ideas and sophisticated pre-industrial low cost applications for the emerging fields of biomedical devices and wearable electronics for virtual/augmented reality.

Circuit-level optimisation of a:Si TFT-based AMOLED pixel circuits for maximum hold current

NASA Astrophysics Data System (ADS)

Foroughi, Aidin; Mehrpoo, Mohammadreza; Ashtiani, Shahin J.

2013-11-01

Design of AMOLED pixel circuits has manifold constraints and trade-offs which provides incentive for circuit designers to seek optimal solutions for different objectives. In this article, we present a discussion on the viability of an optimal solution to achieve the maximum hold current. A compact formula for component sizing in a conventional 2T1C pixel is, therefore, derived. Compared to SPICE simulation results, for several pixel sizes, our predicted optimum sizing yields maximum currents with errors less than 0.4%.

Variability-aware double-patterning layout optimization for analog circuits

NASA Astrophysics Data System (ADS)

Li, Yongfu; Perez, Valerio; Tripathi, Vikas; Lee, Zhao Chuan; Tseng, I.-Lun; Ong, Jonathan Yoong Seang

2018-03-01

The semiconductor industry has adopted multi-patterning techniques to manage the delay in the extreme ultraviolet lithography technology. During the design process of double-patterning lithography layout masks, two polygons are assigned to different masks if their spacing is less than the minimum printable spacing. With these additional design constraints, it is very difficult to find experienced layout-design engineers who have a good understanding of the circuit to manually optimize the mask layers in order to minimize color-induced circuit variations. In this work, we investigate the impact of double-patterning lithography on analog circuits and provide quantitative analysis for our designers to select the optimal mask to minimize the circuit's mismatch. To overcome the problem and improve the turn-around time, we proposed our smart "anchoring" placement technique to optimize mask decomposition for analog circuits. We have developed a software prototype that is capable of providing anchoring markers in the layout, allowing industry standard tools to perform automated color decomposition process.

Differential transimpedance amplifier circuit for correlated differential amplification

DOEpatents

Gresham, Christopher A [Albuquerque, NM; Denton, M Bonner [Tucson, AZ; Sperline, Roger P [Tucson, AZ

2008-07-22

A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.

Algorithms and architecture for multiprocessor based circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deutsch, J.T.

Accurate electrical simulation is critical to the design of high performance integrated circuits. Logic simulators can verify function and give first-order timing information. Switch level simulators are more effective at dealing with charge sharing than standard logic simulators, but cannot provide accurate timing information or discover DC problems. Delay estimation techniques and cell level simulation can be used in constrained design methods, but must be tuned for each application, and circuit simulation must still be used to generate the cell models. None of these methods has the guaranteed accuracy that many circuit designers desire, and none can provide detailed waveformmore » information. Detailed electrical-level simulation can predict circuit performance if devices and parasitics are modeled accurately. However, the computational requirements of conventional circuit simulators make it impractical to simulate current large circuits. In this dissertation, the implementation of Iterated Timing Analysis (ITA), a relaxation-based technique for accurate circuit simulation, on a special-purpose multiprocessor is presented. The ITA method is an SOR-Newton, relaxation-based method which uses event-driven analysis and selective trace to exploit the temporal sparsity of the electrical network. Because event-driven selective trace techniques are employed, this algorithm lends itself to implementation on a data-driven computer.« less

Nonequilibrium Quantum Simulation in Circuit QED

NASA Astrophysics Data System (ADS)

Raftery, James John

Superconducting circuits have become a leading architecture for quantum computing and quantum simulation. In particular, the circuit QED framework leverages high coherence qubits and microwave resonators to construct systems realizing quantum optics models with exquisite precision. For example, the Jaynes-Cummings model has been the focus of significant theoretical interest as a means of generating photon-photon interactions. Lattices of such strongly correlated photons are an exciting new test bed for exploring non-equilibrium condensed matter physics such as dissipative phase transitions of light. This thesis covers a series of experiments which establish circuit QED as a powerful tool for exploring condensed matter physics with photons. The first experiment explores the use of ultra high speed arbitrary waveform generators for the direct digital synthesis of complex microwave waveforms. This new technique dramatically simplifies the classical control chain for quantum experiments and enables high bandwidth driving schemes expected to be essential for generating interesting steady-states and dynamical behavior. The last two experiments explore the rich physics of interacting photons, with an emphasis on small systems where a high degree of control is possible. The first experiment realizes a two-site system called the Jaynes-Cummings dimer, which undergoes a self-trapping transition where the strong photon-photon interactions block photon hopping between sites. The observation of this dynamical phase transition and the related dissipation-induced transition are key results of this thesis. The final experiment augments the Jaynes-Cummings dimer by redesigning the circuit to include in-situ control over photon hopping between sites using a tunable coupler. This enables the study of the dimer's localization transition in the steady-state regime.

Considerations on Circuit Design and Data Acquisition of a Portable Surface Plasmon Resonance Biosensing System.

PubMed

Chang, Keke; Chen, Ruipeng; Wang, Shun; Li, Jianwei; Hu, Xinran; Liang, Hao; Cao, Baiqiong; Sun, Xiaohui; Ma, Liuzheng; Zhu, Juanhua; Jiang, Min; Hu, Jiandong

2015-08-19

The aim of this study was to develop a circuit for an inexpensive portable biosensing system based on surface plasmon resonance spectroscopy. This portable biosensing system designed for field use is characterized by a special structure which consists of a microfluidic cell incorporating a right angle prism functionalized with a biomolecular identification membrane, a laser line generator and a data acquisition circuit board. The data structure, data memory capacity and a line charge-coupled device (CCD) array with a driving circuit for collecting the photoelectric signals are intensively focused on and the high performance analog-to-digital (A/D) converter is comprehensively evaluated. The interface circuit and the photoelectric signal amplifier circuit are first studied to obtain the weak signals from the line CCD array in this experiment. Quantitative measurements for validating the sensitivity of the biosensing system were implemented using ethanol solutions of various concentrations indicated by volume fractions of 5%, 8%, 15%, 20%, 25%, and 30%, respectively, without a biomembrane immobilized on the surface of the SPR sensor. The experiments demonstrated that it is possible to detect a change in the refractive index of an ethanol solution with a sensitivity of 4.99838 × 10(5) ΔRU/RI in terms of the changes in delta response unit with refractive index using this SPR biosensing system, whereby the theoretical limit of detection of 3.3537 × 10(-5) refractive index unit (RIU) and a high linearity at the correlation coefficient of 0.98065. The results obtained from a series of tests confirmed the practicality of this cost-effective portable SPR biosensing system.

Simplified hydraulic model of French vertical-flow constructed wetlands.

PubMed

Arias, Luis; Bertrand-Krajewski, Jean-Luc; Molle, Pascal

2014-01-01

Designing vertical-flow constructed wetlands (VFCWs) to treat both rain events and dry weather flow is a complex task due to the stochastic nature of rain events. Dynamic models can help to improve design, but they usually prove difficult to handle for designers. This study focuses on the development of a simplified hydraulic model of French VFCWs using an empirical infiltration coefficient--infiltration capacity parameter (ICP). The model was fitted using 60-second-step data collected on two experimental French VFCW systems and compared with Hydrus 1D software. The model revealed a season-by-season evolution of the ICP that could be explained by the mechanical role of reeds. This simplified model makes it possible to define time-course shifts in ponding time and outlet flows. As ponding time hinders oxygen renewal, thus impacting nitrification and organic matter degradation, ponding time limits can be used to fix a reliable design when treating both dry and rain events.

A programmable heater control circuit for spacecraft

NASA Technical Reports Server (NTRS)

Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

1994-01-01

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Active quench and reset integrated circuit with novel hold-off time control logic for Geiger-mode avalanche photodiodes.

PubMed

Deng, Shijie; Morrison, Alan P

2012-09-15

This Letter presents an active quench-and-reset circuit for Geiger-mode avalanche photodiodes (GM-APDs). The integrated circuit was fabricated using a conventional 0.35 μm complementary metal oxide semiconductor process. Experimental results show that the circuit is capable of linearly setting the hold-off time from several nanoseconds to microseconds with a resolution of 6.5 ns. This allows the selection of the optimal afterpulse-free hold-off time for the GM-APD via external digital inputs or additional signal processing circuitry. Moreover, this circuit resets the APD automatically following the end of the hold-off period, thus simplifying the control for the end user. Results also show that a minimum dead time of 28.4 ns is achieved, demonstrating a saturated photon-counting rate of 35.2 Mcounts/s.

Analysis and application of two-current-source circuit as a signal conditioner for resistive sensors

NASA Astrophysics Data System (ADS)

Idzkowski, Adam; Gołębiowski, Jerzy; Walendziuk, Wojciech

2017-05-01

The article presents the analysis of metrological properties of a two-current-source supplied circuit. It includes such data as precise and simplified equations for two circuit output voltages in the function of relative resistance increments of sensors. Moreover, graphs showing nonlinearity coefficients of both output voltages for two resistance increments varying widely are presented. Graphs of transfer resistances, depending on relative increments of sensors resistance were also created. The article also contains a description of bridge-based circuit realization with the use of a computer and a data acquisition (DAQ) card. Laboratory measurement of the difference and sum of relative resistance increments of two resistance decade boxes were carried out indirectly with the use of the created measurement system. Measurement errors were calculated and included in the article, as well.

Circuit for Communication Over Power Lines

NASA Technical Reports Server (NTRS)

Krasowski, Michael J.; Prokop, Normal F.; Greer, Lawrence C., III; Nappier, Jennifer

2011-01-01

Many distributed systems share common sensors and instruments along with a common power line supplying current to the system. A communication technique and circuit has been developed that allows for the simple inclusion of an instrument, sensor, or actuator node within any system containing a common power bus. Wherever power is available, a node can be added, which can then draw power for itself, its associated sensors, and actuators from the power bus all while communicating with other nodes on the power bus. The technique modulates a DC power bus through capacitive coupling using on-off keying (OOK), and receives and demodulates the signal from the DC power bus through the same capacitive coupling. The circuit acts as serial modem for the physical power line communication. The circuit and technique can be made of commercially available components or included in an application specific integrated circuit (ASIC) design, which allows for the circuit to be included in current designs with additional circuitry or embedded into new designs. This device and technique moves computational, sensing, and actuation abilities closer to the source, and allows for the networking of multiple similar nodes to each other and to a central processor. This technique also allows for reconfigurable systems by adding or removing nodes at any time. It can do so using nothing more than the in situ power wiring of the system.

Simplified tools for evaluating domestic ventilation systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Maansson, L.G.; Orme, M.

1999-07-01

Within an International Energy Agency (IEA) project, Annex 27, experts from 8 countries (Canada, France, Italy, Japan, The Netherlands, Sweden, UK and USA) have developed simplified tools for evaluating domestic ventilation systems during the heating season. Tools for building and user aspects, thermal comfort, noise, energy, life cycle cost, reliability and indoor air quality (IAQ) have been devised. The results can be used both for dwellings at the design stage and after construction. The tools lead to immediate answers and indications about the consequences of different choices that may arise during discussion with clients. This paper presents an introduction tomore » these tools. Examples applications of the indoor air quality and energy simplified tools are also provided. The IAQ tool accounts for constant emission sources, CO{sub 2}, cooking products, tobacco smoke, condensation risks, humidity levels (i.e., for judging the risk for mould and house dust mites), and pressure difference (for identifying the risk for radon or land fill spillage entering the dwelling or problems with indoor combustion appliances). An elaborated set of design parameters were worked out that resulted in about 17,000 combinations. By using multi-variate analysis it was possible to reduce this to 174 combinations for IAQ. In addition, a sensitivity analysis was made using 990 combinations. The results from all the runs were used to develop a simplified tool, as well as quantifying equations relying on the design parameters. A computerized energy tool has also been developed within this project, which takes into account air tightness, climate, window airing pattern, outdoor air flow rate and heat exchange efficiency.« less

Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

Hardware implementation of Lorenz circuit systems for secure chaotic communication applications.

PubMed

Chen, Hsin-Chieh; Liau, Ben-Yi; Hou, Yi-You

2013-02-18

This paper presents the synchronization between the master and slave Lorenz chaotic systems by slide mode controller (SMC)-based technique. A proportional-integral (PI) switching surface is proposed to simplify the task of assigning the performance of the closed-loop error system in sliding mode. Then, extending the concept of equivalent control and using some basic electronic components, a secure communication system is constructed. Experimental results show the feasibility of synchronizing two Lorenz circuits via the proposed SMC. 

Simplified Recipes for Day Care Centers.

ERIC Educational Resources Information Center

Asmussen, Patricia D.

The spiral-bound collection of 156 simplified recipes is designed to help those who prepare food for groups of children at day care centers. The recipes provide for 25 child-size servings to meet the nutritional needs and appetites of children from 2 to 6 years of age. The first section gives general information on ladle and scoop sizes, weights…

Circuit for monitoring temperature of high-voltage equipment

DOEpatents

Jacobs, Martin E.

1976-01-01

This invention relates to an improved circuit for measuring temperature in a region at high electric potential and generating a read-out of the same in a region at lower potential. The circuit is specially designed to combine high sensitivity, stability, and accuracy. A major portion of the circuit situated in the high-potential region can take the form of an integrated circuit. The preferred form of the circuit includes an input section which is situated in the high-potential region and comprises a temperature-compensated thermocouple circuit for sensing temperature, an oscillator circuit for generating a train of ramp voltages whose rise time varies inversely with the thermocouple output, a comparator and switching circuit for converting the oscillator output to pulses whose frequency is proportional to the thermocouple output, and a light-emitting diode which is energized by these pulses. An optical coupling transmits the light pulses generated by the diode to an output section of the circuit, situated in a region at ground. The output section comprises means for converting the transmitted pulses to electrical pulses of corresponding frequency, means for amplifying the electrical pulses, and means for displaying the frequency of the same. The preferred embodiment of the overall circuit is designed so that the frequency of the output signal in hertz and tenths of hertz is equal to the sensed temperature in degrees and tenths of degrees.

Energy-efficient neuron, synapse and STDP integrated circuits.

PubMed

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

Simple photometer circuits using modular electronic components

NASA Technical Reports Server (NTRS)

Wampler, J. E.

1975-01-01

Operational and peak holding amplifiers are discussed as useful circuits for bioluminescence assays. Circuit diagrams are provided. While analog methods can give a good integration on short time scales, digital methods were found best for long term integration in bioluminescence assays. Power supplies, a general photometer circuit with ratio capability, and variations in the basic photometer design are also considered.

Circuit design and simulation of a transmit beamforming ASIC for high-frequency ultrasonic imaging systems.

PubMed

Athanasopoulos, Georgios I; Carey, Stephen J; Hatfield, John V

2011-07-01

This paper describes the design of a programmable transmit beamformer application-specific integrated circuit (ASIC) with 8 channels for ultrasound imaging systems. The system uses a 20-MHz reference clock. A digital delay-locked loop (DLL) was designed with 50 variable delay elements, each of which provides a clock with different phase from a single reference. Two phase detectors compare the phase difference of the reference clock with the feedback clock, adjusting the delay of the delay elements to bring the feedback clock signal in phase with the reference clock signal. Two independent control voltages for the delay elements ensure that the mark space ratio of the pulses remain at 50%. By combining a 10- bit asynchronous counter with the delays from the DLL, each channel can be programmed to give a maximum time delay of 51 μs with 1 ns resolution. It can also give bursts of up to 64 pulses. Finally, for a single pulse, it can adjust the pulse width between 9 ns and 100 ns by controlling the current flowing through a capacitor in a one-shot circuit, for use with 40-MHz and 5-MHz transducers, respectively.

Design of an Intelligent Front-End Signal Conditioning Circuit for IR Sensors

NASA Astrophysics Data System (ADS)

de Arcas, G.; Ruiz, M.; Lopez, J. M.; Gutierrez, R.; Villamayor, V.; Gomez, L.; Montojo, Mª. T.

2008-02-01

This paper presents the design of an intelligent front-end signal conditioning system for IR sensors. The system has been developed as an interface between a PbSe IR sensor matrix and a TMS320C67x digital signal processor. The system architecture ensures its scalability so it can be used for sensors with different matrix sizes. It includes an integrator based signal conditioning circuit, a data acquisition converter block, and a FPGA based advanced control block that permits including high level image preprocessing routines such as faulty pixel detection and sensor calibration in the signal conditioning front-end. During the design phase virtual instrumentation technologies proved to be a very valuable tool for prototyping when choosing the best A/D converter type for the application. Development time was significantly reduced due to the use of this technology.

Electronic circuits: A compilation. [for electronic equipment in telecommunication

NASA Technical Reports Server (NTRS)

1976-01-01

A compilation containing articles on newly developed electronic circuits and systems is presented. It is divided into two sections: (1) section 1 on circuits and techniques of particular interest in communications technology, and (2) section 2 on circuits designed for a variety of specific applications. The latest patent information available is also given. Circuit diagrams are shown.

Measurements of complex impedance in microwave high power systems with a new bluetooth integrated circuit.

PubMed

Roussy, Georges; Dichtel, Bernard; Chaabane, Haykel

2003-01-01

By using a new integrated circuit, which is marketed for bluetooth applications, it is possible to simplify the method of measuring the complex impedance, complex reflection coefficient and complex transmission coefficient in an industrial microwave setup. The Analog Devices circuit AD 8302, which measures gain and phase up to 2.7 GHz, operates with variable level input signals and is less sensitive to both amplitude and frequency fluctuations of the industrial magnetrons than are mixers and AM crystal detectors. Therefore, accurate gain and phase measurements can be performed with low stability generators. A mechanical setup with an AD 8302 is described; the calibration procedure and its performance are presented.

Circuit models applied to the design of a novel uncooled infrared focal plane array structure

NASA Astrophysics Data System (ADS)

Shi, Shali; Chen, Dapeng; Li, Chaobo; Jiao, Binbin; Ou, Yi; Jing, Yupeng; Ye, Tianchun; Guo, Zheying; Zhang, Qingchuan; Wu, Xiaoping

2007-05-01

This paper describes a circuit model applied to the simulation of the thermal response frequency of a novel substrate-free single-layer bi-material cantilever microstructure used as the focal plane array (FPA) in an uncooled opto-mechanical infrared imaging system. In order to obtain a high detection of the IR object, gold (Au) is coated alternately on the silicon nitride (SiNx) cantilevers of the pixels (Shi S et al Sensors and Actuators A at press), whereas the thermal response frequency decreases (Zhao Y 2002 Dissertation University of California, Berkeley). A circuit model for such a cantilever microstructure is proposed to be applied to evaluate the thermal response performance. The pixel's thermal frequency (1/τth) is calculated to be 10 Hz under the optimized design parameters, which is compatible with the response of optical readout systems and human eyes.

Design and testing of a low impedance transceiver circuit for nitrogen-14 nuclear quadrupole resonance.

PubMed

Sato-Akaba, Hideo

2014-01-01

A low impedance transceiver circuit consisting of a transmit-receive switch circuit, a class-D amplifier and a transimpedance amplifier (TIA) was newly designed and tested for a nitrogen-14 NQR. An NQR signal at 1.37MHz from imidazole was successfully observed with the dead time of ~85µs under the high Q transmission (Q~120) and reception (Q~140). The noise performance of the low impedance TIA with an NQR probe was comparable with a commercial low noise 50Ω amplifier (voltage input noise: 0.25 nV/Hz) which was also connected to the probe. The protection voltage for the pre-amplifier using the low impedance transceiver was ~10 times smaller than that for the pre-amplifier using a 50Ω conventional transceiver, which is suitable for NQR remote sensing applications. Copyright © 2014 Elsevier Inc. All rights reserved.

Protection circuits for very high frequency ultrasound systems.

PubMed

Choi, Hojong; Shung, K Kirk

2014-04-01

The purpose of protection circuits in ultrasound applications is to block noise signals from the transmitter from reaching the transducer and also to prevent unwanted high voltage signals from reaching the receiver. The protection circuit using a resistor and diode pair is widely used due to its simple architecture, however, it may not be suitable for very high frequency (VHF) ultrasound transducer applications (>100 MHz) because of its limited bandwidth. Therefore, a protection circuit using MOSFET devices with unique structure is proposed in this paper. The performance of the designed protection circuit was compared with that of other traditional protection schemes. The performance characteristics measured were the insertion loss (IL), total harmonic distortion (THD) and transient response time (TRT). The new protection scheme offers the lowest IL (-1.0 dB), THD (-69.8 dB) and TRT (78 ns) at 120 MHz. The pulse-echo response using a 120 MHz LiNbO3 transducer with each protection circuit was measured to validate the feasibility of the protection circuits in VHF ultrasound applications. The sensitivity and bandwidth of the transducer using the new protection circuit improved by 252.1 and 50.9 %, respectively with respect to the protection circuit using a resistor and diode pair. These results demonstrated that the new protection circuit design minimizes the IL, THD and TRT for VHF ultrasound transducer applications.

Protection Circuits for Very High Frequency Ultrasound Systems

PubMed Central

Shung, K. Kirk

2014-01-01

The purpose of protection circuits in ultrasound applications is to block noise signals from the transmitter from reaching the transducer and also to prevent unwanted high voltage signals from reaching the receiver. The protection circuit using a resistor and diode pair is widely used due to its simple architecture, however, it may not be suitable for very high frequency (VHF) ultrasound transducer applications (>100 MHz) because of its limited bandwidth. Therefore, a protection circuit using MOSFET devices with unique structure is proposed in this paper. The performance of the designed protection circuit was compared with that of other traditional protection schemes. The performance characteristics measured were the insertion loss (IL), total harmonic distortion (THD) and transient response time (TRT). The new protection scheme offers the lowest IL (−1.0 dB), THD (−69.8 dB) and TRT (78 ns) at 120 MHz. The pulse-echo response using a 120 MHz LiNbO3 transducer with each protection circuit was measured to validate the feasibility of the protection circuits in VHF ultrasound applications. The sensitivity and bandwidth of the transducer using the new protection circuit improved by 252.1 and 50.9 %, respectively with respect to the protection circuit using a resistor and diode pair. These results demonstrated that the new protection circuit design minimizes the IL, THD and TRT for VHF ultrasound transducer applications. PMID:24682684

A general design strategy for block copolymer directed self-assembly patterning of integrated circuits contact holes using an alphabet approach.

PubMed

Yi, He; Bao, Xin-Yu; Tiberio, Richard; Wong, H-S Philip

2015-02-11

Directed self-assembly (DSA) is a promising lithography candidate for technology nodes beyond 14 nm. Researchers have shown contact hole patterning for random logic circuits using DSA with small physical templates. This paper introduces an alphabet approach that uses a minimal set of small physical templates to pattern all contacts configurations on integrated circuits. We illustrate, through experiments, a general and scalable template design strategy that links the DSA material properties to the technology node requirements.

75 FR 81459 - Simplified Proceedings

Federal Register 2010, 2011, 2012, 2013, 2014

2010-12-28

... FEDERAL MINE SAFETY AND HEALTH REVIEW COMMISSION 29 CFR Part 2700 Simplified Proceedings AGENCY... Commission is publishing a final rule to simplify the procedures for handling certain civil penalty.... Electronic comments should state ``Comments on Simplified Proceedings'' in the subject line and be sent to...

Validation of Simplified Load Equations Through Loads Measurement and Modeling of a Small Horizontal-Axis Wind Turbine Tower

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dana, Scott; Van Dam, Jeroen J; Damiani, Rick R

As part of an ongoing effort to improve the modeling and prediction of small wind turbine dynamics, the National Renewable Energy Laboratory (NREL) tested a small horizontal-axis wind turbine in the field at the National Wind Technology Center. The test turbine was a 2.1-kW downwind machine mounted on an 18-m multi-section fiberglass composite tower. The tower was instrumented and monitored for approximately 6 months. The collected data were analyzed to assess the turbine and tower loads and further validate the simplified loads equations from the International Electrotechnical Commission (IEC) 61400-2 design standards. Field-measured loads were also compared to the outputmore » of an aeroelastic model of the turbine. In particular, we compared fatigue loads as measured in the field, predicted by the aeroelastic model, and calculated using the simplified design equations. Ultimate loads at the tower base were assessed using both the simplified design equations and the aeroelastic model output. The simplified design equations in IEC 61400-2 do not accurately model fatigue loads and a discussion about the simplified design equations is discussed.« less

Initial Experience With a New Mitral Ring Designed to Simplify Length Determination of Neochords.

PubMed

Prinzing, Anatol; Bleiziffer, Sabine; Krane, Markus; Lange, Ruediger

2018-06-01

Artificial chord implantation has become one of the most applied techniques for mitral valve repair (MVR). Many techniques have been described, with the goal of optimizing neochord implantation. A new annuloplasty device designed to simplify the determination of the appropriate neochord length has been recently introduced. We describe our initial experience with this new device. The semirigid device is equipped with removable loops on the posterior aspect of the ring. Neochords are tied to the loops, which are subsequently removed. The device was implanted in 47 symptomatic patients from January 2015 to August 2016 through a median sternotomy in 33 patients (70.2%) and a right anterolateral minithoracotomy in 14 (29.8%). The cause of mitral valve insufficiency was degenerative in all patients, and most patients presented with isolated prolapse of the posterior leaflet. Before and after cardiopulmonary bypass, all patients underwent evaluation with transesophageal echocardiography, and transthoracic echocardiography was performed at discharge. A median of 2 neochords were implanted (minimum, 1; maximum, 6). Mean cardiopulmonary bypass time and aortic cross-clamp times were 141.7 ± 32.3 and 104.8 ± 28.5 minutes for combined and 133 ± 53.9 and 98.3 ± 41.6 minutes for isolated MVR. At discharge, echocardiography revealed no or only mild mitral insufficiency in 45 patients (mean gradient, 2.9 ± 1.3 mm Hg). This new annuloplasty ring facilitated determination of appropriate neochord length and was used to successfully treat different degenerative pathologies affecting both leaflets. This new device simplified length determination of the neochords. Copyright © 2018 The Society of Thoracic Surgeons. Published by Elsevier Inc. All rights reserved.

CMOS analogue amplifier circuits optimisation using hybrid backtracking search algorithm with differential evolution

NASA Astrophysics Data System (ADS)

Mallick, S.; Kar, R.; Mandal, D.; Ghoshal, S. P.

2016-07-01

This paper proposes a novel hybrid optimisation algorithm which combines the recently proposed evolutionary algorithm Backtracking Search Algorithm (BSA) with another widely accepted evolutionary algorithm, namely, Differential Evolution (DE). The proposed algorithm called BSA-DE is employed for the optimal designs of two commonly used analogue circuits, namely Complementary Metal Oxide Semiconductor (CMOS) differential amplifier circuit with current mirror load and CMOS two-stage operational amplifier (op-amp) circuit. BSA has a simple structure that is effective, fast and capable of solving multimodal problems. DE is a stochastic, population-based heuristic approach, having the capability to solve global optimisation problems. In this paper, the transistors' sizes are optimised using the proposed BSA-DE to minimise the areas occupied by the circuits and to improve the performances of the circuits. The simulation results justify the superiority of BSA-DE in global convergence properties and fine tuning ability, and prove it to be a promising candidate for the optimal design of the analogue CMOS amplifier circuits. The simulation results obtained for both the amplifier circuits prove the effectiveness of the proposed BSA-DE-based approach over DE, harmony search (HS), artificial bee colony (ABC) and PSO in terms of convergence speed, design specifications and design parameters of the optimal design of the analogue CMOS amplifier circuits. It is shown that BSA-DE-based design technique for each amplifier circuit yields the least MOS transistor area, and each designed circuit is shown to have the best performance parameters such as gain, power dissipation, etc., as compared with those of other recently reported literature.

Laser dynamics: The system dynamics and network theory of optoelectronic integrated circuit design

NASA Astrophysics Data System (ADS)

Tarng, Tom Shinming-T. K.

Laser dynamics is the system dynamics, communication and network theory for the design of opto-electronic integrated circuit (OEIC). Combining the optical network theory and optical communication theory, the system analysis and design for the OEIC fundamental building blocks is considered. These building blocks include the direct current modulation, inject light modulation, wideband filter, super-gain optical amplifier, E/O and O/O optical bistability and current-controlled optical oscillator. Based on the rate equations, the phase diagram and phase portrait analysis is applied to the theoretical studies and numerical simulation. The OEIC system design methodologies are developed for the OEIC design. Stimulating-field-dependent rate equations are used to model the line-width narrowing/broadening mechanism for the CW mode and frequency chirp of semiconductor lasers. The momentary spectra are carrier-density-dependent. Furthermore, the phase portrait analysis and the nonlinear refractive index is used to simulate the single mode frequency chirp. The average spectra of chaos, period doubling, period pulsing, multi-loops and analog modulation are generated and analyzed. The bifurcation-chirp design chart with modulation depth and modulation frequency as parameters is provided for design purpose.

Note: Circuit design for direct current and alternating current electrochemical etching of scanning probe microscopy tips.

PubMed

Jobbins, Matthew M; Raigoza, Annette F; Kandel, S Alex

2012-03-01

We present control circuits designed for electrochemically etching, reproducibly sharp STM probes. The design uses an Arduino UNO microcontroller to allow for both ac and dc operation, as well as a comparator driven shut-off that allows for etching to be stopped in 0.5-1 μs. The Arduino allows the instrument to be customized to suit a wide variety of potential applications without significant changes to hardware. Data is presented for coarse chemical etching of 80:20 platinum-iridium, tungsten, and nickel tips.

Construction of an easy-to-use CRISPR-Cas9 system by patching a newly designed EXIT circuit.

PubMed

Tang, Qiang; Lou, Chunbo; Liu, Shuang-Jiang

2017-01-01

Plasmid-borne genetic editing tools, including the widely used CRISPR-Cas9 system, have greatly facilitated bacterial programming to obtain novel functionalities. However, the lack of effective post-editing plasmid elimination methods impedes follow-up genetic manipulation or application. Conventional strategies including exposure to physical and chemical treatments, or exploiting temperature-sensitive replication origins have several drawbacks (e.g., they are limited for efficiency and are time-consuming). Therefore, the demand is apparent for easy and rapid elimination of the tool plasmids from their bacterial hosts after genetic manipulation. To bridge this gap, we designed a novel EXIT circuit with the homing endonuclease, which can be exploited for rapid and efficient elimination of various plasmids with diverse replication origins. As a proof of concept, we validated the EXIT circuit in Escherichia coli by harnessing homing endonuclease I- Sce I and its cleavage site. When integrated into multiple plasmids with different origins, the EXIT circuit allowed them to be eliminated from the host cells, simultaneously. By combining the widely used plasmid-borne CRISPR-Cas9 system and the EXIT circuit, we constructed an easy-to-use CRISPR-Cas9 system that eliminated the Cas9- and the single-guide RNA (sgRNA)-encoding plasmids in one-step. Within 3 days, we successfully constructed an atrazine-degrading E. coli strain, thus further demonstrating the advantage of this new CRISPR-Cas9 system for bacterial genome editing. Our novel EXIT circuit, which exploits the homing endonuclease I- Sce I, enables plasmid(s) with different replication origins to be eliminated from their host cells rapidly and efficiently. We also developed an easy-to-use CRISPR-Cas9 system with the EXIT circuit, and this new system can be widely applied to bacterial genome editing.

A transfer function type of simplified electrochemical model with modified boundary conditions and Padé approximation for Li-ion battery: Part 2. Modeling and parameter estimation

NASA Astrophysics Data System (ADS)

Yuan, Shifei; Jiang, Lei; Yin, Chengliang; Wu, Hongjie; Zhang, Xi

2017-06-01

The electrochemistry-based battery model can provide physics-meaningful knowledge about the lithium-ion battery system with extensive computation burdens. To motivate the development of reduced order battery model, three major contributions have been made throughout this paper: (1) the transfer function type of simplified electrochemical model is proposed to address the current-voltage relationship with Padé approximation method and modified boundary conditions for electrolyte diffusion equations. The model performance has been verified under pulse charge/discharge and dynamic stress test (DST) profiles with the standard derivation less than 0.021 V and the runtime 50 times faster. (2) the parametric relationship between the equivalent circuit model and simplified electrochemical model has been established, which will enhance the comprehension level of two models with more in-depth physical significance and provide new methods for electrochemical model parameter estimation. (3) four simplified electrochemical model parameters: equivalent resistance Req, effective diffusion coefficient in electrolyte phase Deeff, electrolyte phase volume fraction ε and open circuit voltage (OCV), have been identified by the recursive least square (RLS) algorithm with the modified DST profiles under 45, 25 and 0 °C. The simulation results indicate that the proposed model coupled with RLS algorithm can achieve high accuracy for electrochemical parameter identification in dynamic scenarios.

A statistical-based material and process guidelines for design of carbon nanotube field-effect transistors in gigascale integrated circuits.

PubMed

Ghavami, Behnam; Raji, Mohsen; Pedram, Hossein

2011-08-26

Carbon nanotube field-effect transistors (CNFETs) show great promise as building blocks of future integrated circuits. However, synthesizing single-walled carbon nanotubes (CNTs) with accurate chirality and exact positioning control has been widely acknowledged as an exceedingly complex task. Indeed, density and chirality variations in CNT growth can compromise the reliability of CNFET-based circuits. In this paper, we present a novel statistical compact model to estimate the failure probability of CNFETs to provide some material and process guidelines for the design of CNFETs in gigascale integrated circuits. We use measured CNT spacing distributions within the framework of detailed failure analysis to demonstrate that both the CNT density and the ratio of metallic to semiconducting CNTs play dominant roles in defining the failure probability of CNFETs. Besides, it is argued that the large-scale integration of these devices within an integrated circuit will be feasible only if a specific range of CNT density with an acceptable ratio of semiconducting to metallic CNTs can be adjusted in a typical synthesis process.

Simplified Interface to Complex Memory Hierarchies 1.x

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lang, Michael; Ionkov, Latchesar; Williams, Sean

2017-02-21

Memory systems are expected to get evermore complicated in the coming years, and it isn't clear exactly what form that complexity will take. On the software side, a simple, flexible way of identifying and working with memory pools is needed. Additionally, most developers seek code portability and do not want to learn the intricacies of complex memory. Hence, we believe that a library for interacting with complex memory systems should expose two kinds of abstraction: First, a low-level, mechanism-based interface designed for the runtime or advanced user that wants complete control, with its focus on simplified representation but with allmore » decisions left to the caller. Second, a high-level, policy-based interface designed for ease of use for the application developer, in which we aim for best-practice decisions based on application intent. We have developed such a library, called SICM: Simplified Interface to Complex Memory.« less

Design optimization of integrated BiDi triplexer optical filter based on planar lightwave circuit.

PubMed

Xu, Chenglin; Hong, Xiaobin; Huang, Wei-Ping

2006-05-29

Design optimization of a novel integrated bi-directional (BiDi) triplexer filter based on planar lightwave circuit (PLC) for fiber-to-the premise (FTTP) applications is described. A multi-mode interference (MMI) device is used to filter the up-stream 1310nm signal from the down-stream 1490nm and 1555nm signals. An array waveguide grating (AWG) device performs the dense WDM function by further separating the two down-stream signals. The MMI and AWG are built on the same substrate with monolithic integration. The design is validated by simulation, which shows excellent performance in terms of filter spectral characteristics (e.g., bandwidth, cross-talk, etc.) as well as insertion loss.

Design optimization of integrated BiDi triplexer optical filter based on planar lightwave circuit

NASA Astrophysics Data System (ADS)

Xu, Chenglin; Hong, Xiaobin; Huang, Wei-Ping

2006-05-01

Design optimization of a novel integrated bi-directional (BiDi) triplexer filter based on planar lightwave circuit (PLC) for fiber-to-the premise (FTTP) applications is described. A multi-mode interference (MMI) device is used to filter the up-stream 1310nm signal from the down-stream 1490nm and 1555nm signals. An array waveguide grating (AWG) device performs the dense WDM function by further separating the two down-stream signals. The MMI and AWG are built on the same substrate with monolithic integration. The design is validated by simulation, which shows excellent performance in terms of filter spectral characteristics (e.g., bandwidth, cross-talk, etc.) as well as insertion loss.

Design and status of the RF-digitizer integrated circuit

NASA Technical Reports Server (NTRS)

Rayhrer, B.; Lam, B.; Young, L. E.; Srinivasan, J. M.; Thomas, J. B.

1991-01-01

An integrated circuit currently under development samples a bandpass-limited signal at a radio frequency in quadrature and then performs a simple sum-and-dump operation in order to filter and lower the rate of the samples. Downconversion to baseband is carried out by the sampling step itself through the aliasing effect of an appropriately selected subharmonic sampling frequency. Two complete RF digitizer circuits with these functions will be implemented with analog and digital elements on one GaAs substrate. An input signal, with a carrier frequency as high as 8 GHz, can be sampled at a rate as high as 600 Msamples/sec for each quadrature component. The initial version of the chip will sign-sample (1-bit) the input RF signal. The chip will contain a synthesizer to generate a sample frequency that is a selectable integer multiple of an input reference frequency. In addition to the usual advantages of compactness and reliability associated with integrated circuits, the single chip will replace several steps required by standard analog downconversion. Furthermore, when a very high initial sample rate is selected, the presampling analog filters can be given very large bandwidths, thereby greatly reducing phase and delay instabilities typically introduced by such filters, as well as phase and delay variation due to Doppler changes.

Synthetic Biology: A Unifying View and Review Using Analog Circuits.

PubMed

Teo, Jonathan J Y; Woo, Sung Sik; Sarpeshkar, Rahul

2015-08-01

We review the field of synthetic biology from an analog circuits and analog computation perspective, focusing on circuits that have been built in living cells. This perspective is well suited to pictorially, symbolically, and quantitatively representing the nonlinear, dynamic, and stochastic (noisy) ordinary and partial differential equations that rigorously describe the molecular circuits of synthetic biology. This perspective enables us to construct a canonical analog circuit schematic that helps unify and review the operation of many fundamental circuits that have been built in synthetic biology at the DNA, RNA, protein, and small-molecule levels over nearly two decades. We review 17 circuits in the literature as particular examples of feedforward and feedback analog circuits that arise from special topological cases of the canonical analog circuit schematic. Digital circuit operation of these circuits represents a special case of saturated analog circuit behavior and is automatically incorporated as well. Many issues that have prevented synthetic biology from scaling are naturally represented in analog circuit schematics. Furthermore, the deep similarity between the Boltzmann thermodynamic equations that describe noisy electronic current flow in subthreshold transistors and noisy molecular flux in biochemical reactions has helped map analog circuit motifs in electronics to analog circuit motifs in cells and vice versa via a `cytomorphic' approach. Thus, a body of knowledge in analog electronic circuit design, analysis, simulation, and implementation may also be useful in the robust and efficient design of molecular circuits in synthetic biology, helping it to scale to more complex circuits in the future.

Novel Quaternary Quantum Decoder, Multiplexer and Demultiplexer Circuits

NASA Astrophysics Data System (ADS)

Haghparast, Majid; Monfared, Asma Taheri

2017-05-01

Multiple valued logic is a promising approach to reduce the width of the reversible or quantum circuits, moreover, quaternary logic is considered as being a good choice for future quantum computing technology hence it is very suitable for the encoded realization of binary logic functions through its grouping of 2-bits together into quaternary values. The Quaternary decoder, multiplexer, and demultiplexer are essential units of quaternary digital systems. In this paper, we have initially designed a quantum realization of the quaternary decoder circuit using quaternary 1-qudit gates and quaternary Muthukrishnan-Stroud gates. Then we have presented quantum realization of quaternary multiplexer and demultiplexer circuits using the constructed quaternary decoder circuit and quaternary controlled Feynman gates. The suggested circuits in this paper have a lower quantum cost and hardware complexity than the existing designs that are currently used in quaternary digital systems. All the scales applied in this paper are based on Nanometric area.

Digitally Programmable Analogue Circuits for Sensor Conditioning Systems

PubMed Central

Zatorre, Guillermo; Medrano, Nicolás; Sanz, María Teresa; Aldea, Concepción; Calvo, Belén; Celma, Santiago

2009-01-01

This work presents two current-mode integrated circuits designed for sensor signal preprocessing in embedded systems. The proposed circuits have been designed to provide good signal transfer and fulfill their function, while minimizing the load effects due to building complex conditioning architectures. The processing architecture based on the proposed building blocks can be reconfigured through digital programmability. Thus, sensor useful range can be expanded, changes in the sensor operation can be compensated for and furthermore, undesirable effects such as device mismatching and undesired physical magnitudes sensor sensibilities are reduced. The circuits were integrated using a 0.35 μm standard CMOS process. Experimental measurements, load effects and a study of two different tuning strategies are presented. From these results, system performance is tested in an application which entails extending the linear range of a magneto-resistive sensor. Circuit area, average power consumption and programmability features allow these circuits to be included in embedded sensing systems as a part of the analogue conditioning components. PMID:22412331

Multiplier less high-speed squaring circuit for binary numbers

NASA Astrophysics Data System (ADS)

Sethi, Kabiraj; Panda, Rutuparna

2015-03-01

The squaring operation is important in many applications in signal processing, cryptography etc. In general, squaring circuits reported in the literature use fast multipliers. A novel idea of a squaring circuit without using multipliers is proposed in this paper. Ancient Indian method used for squaring decimal numbers is extended here for binary numbers. The key to our success is that no multiplier is used. Instead, one squaring circuit is used. The hardware architecture of the proposed squaring circuit is presented. The design is coded in VHDL and synthesised and simulated in Xilinx ISE Design Suite 10.1 (Xilinx Inc., San Jose, CA, USA). It is implemented in Xilinx Vertex 4vls15sf363-12 device (Xilinx Inc.). The results in terms of time delay and area is compared with both modified Booth's algorithm and squaring circuit using Vedic multipliers. Our proposed squaring circuit seems to have better performance in terms of both speed and area.

Smart Phase Tuning in Microwave Photonic Integrated Circuits Toward Automated Frequency Multiplication by Design

NASA Astrophysics Data System (ADS)

Nabavi, N.

2018-07-01

The author investigates the monitoring methods for fine adjustment of the previously proposed on-chip architecture for frequency multiplication and translation of harmonics by design. Digital signal processing (DSP) algorithms are utilized to create an optimized microwave photonic integrated circuit functionality toward automated frequency multiplication. The implemented DSP algorithms are formed on discrete Fourier transform and optimization-based algorithms (Greedy and gradient-based algorithms), which are analytically derived and numerically compared based on the accuracy and speed of convergence criteria.

GaAs VLSI technology and circuit elements for DSP

NASA Astrophysics Data System (ADS)

Mikkelson, James M.

1990-10-01

Recent progress in digital GaAs circuit performance and complexity is presented to demonstrate the current capabilities of GaAs components. High density GaAs process technology and circuit design techniques are described and critical issues for achieving favorable complexity speed power and cost tradeoffs are reviewed. Some DSP building blocks are described to provide examples of what types of DSP systems could be implemented with present GaAs technology. DIGITAL GaAs CIRCUIT CAPABILITIES In the past few years the capabilities of digital GaAs circuits have dramatically increased to the VLSI level. Major gains in circuit complexity and power-delay products have been achieved by the use of silicon-like process technologies and simple circuit topologies. The very high speed and low power consumption of digital GaAs VLSI circuits have made GaAs a desirable alternative to high performance silicon in hardware intensive high speed system applications. An example of the performance and integration complexity available with GaAs VLSI circuits is the 64x64 crosspoint switch shown in figure 1. This switch which is the most complex GaAs circuit currently available is designed on a 30 gate GaAs gate array. It operates at 200 MHz and dissipates only 8 watts of power. The reasons for increasing the level of integration of GaAs circuits are similar to the reasons for the continued increase of silicon circuit complexity. The market factors driving GaAs VLSI are system design methodology system cost power and reliability. System designers are hesitant or unwilling to go backwards to previous design techniques and lower levels of integration. A more highly integrated system in a lower performance technology can often approach the performance of a system in a higher performance technology at a lower level of integration. Higher levels of integration also lower the system component count which reduces the system cost size and power consumption while improving the system reliability

Asymmetric Memory Circuit Would Resist Soft Errors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Perlman, Marvin

1990-01-01

Some nonlinear error-correcting codes more efficient in presence of asymmetry. Combination of circuit-design and coding concepts expected to make integrated-circuit random-access memories more resistant to "soft" errors (temporary bit errors, also called "single-event upsets" due to ionizing radiation). Integrated circuit of new type made deliberately more susceptible to one kind of bit error than to other, and associated error-correcting code adapted to exploit this asymmetry in error probabilities.

Simplified Model to Predict Deflection and Natural Frequency of Steel Pole Structures

NASA Astrophysics Data System (ADS)

Balagopal, R.; Prasad Rao, N.; Rokade, R. P.

2018-04-01

Steel pole structures are suitable alternate to transmission line towers, due to difficulty encountered in finding land for the new right of way for installation of new lattice towers. The steel poles have tapered cross section and they are generally used for communication, power transmission and lighting purposes. Determination of deflection of steel pole is important to decide its functionality requirement. The excessive deflection of pole may affect the signal attenuation and short circuiting problems in communication/transmission poles. In this paper, a simplified method is proposed to determine both primary and secondary deflection based on dummy unit load/moment method. The predicted deflection from proposed method is validated with full scale experimental investigation conducted on 8 m and 30 m high lighting mast, 132 and 400 kV transmission pole and found to be in close agreement with each other. Determination of natural frequency is an important criterion to examine its dynamic sensitivity. A simplified semi-empirical method using the static deflection from the proposed method is formulated to determine its natural frequency. The natural frequency predicted from proposed method is validated with FE analysis results. Further the predicted results are validated with experimental results available in literature.

Assessment of SOI Devices and Circuits at Extreme Temperatures

NASA Technical Reports Server (NTRS)

Elbuluk, Malik; Hammoud, Ahmad; Patterson, Richard L.

2007-01-01

Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.

Tool for Crimping Flexible Circuit Leads

NASA Technical Reports Server (NTRS)

Hulse, Aaron; Diftler, Myron A.

2009-01-01

A hand tool has been developed for crimping leads in flexible tails that are parts of some electronic circuits -- especially some sensor circuits. The tool is used to cut the tails to desired lengths and attach solder tabs to the leads. For tailoring small numbers of circuits for special applications, this hand tool is a less expensive alternative to a commercially available automated crimping tool. The crimping tool consists of an off-the-shelf hand crimping tool plus a specialized crimping insert designed specifically for the intended application.

Design and implementation of Gm-APD array readout integrated circuit for infrared 3D imaging

NASA Astrophysics Data System (ADS)

Zheng, Li-xia; Yang, Jun-hao; Liu, Zhao; Dong, Huai-peng; Wu, Jin; Sun, Wei-feng

2013-09-01

A single-photon detecting array of readout integrated circuit (ROIC) capable of infrared 3D imaging by photon detection and time-of-flight measurement is presented in this paper. The InGaAs avalanche photon diodes (APD) dynamic biased under Geiger operation mode by gate controlled active quenching circuit (AQC) are used here. The time-of-flight is accurately measured by a high accurate time-to-digital converter (TDC) integrated in the ROIC. For 3D imaging, frame rate controlling technique is utilized to the pixel's detection, so that the APD related to each pixel should be controlled by individual AQC to sense and quench the avalanche current, providing a digital CMOS-compatible voltage pulse. After each first sense, the detector is reset to wait for next frame operation. We employ counters of a two-segmental coarse-fine architecture, where the coarse conversion is achieved by a 10-bit pseudo-random linear feedback shift register (LFSR) in each pixel and a 3-bit fine conversion is realized by a ring delay line shared by all pixels. The reference clock driving the LFSR counter can be generated within the ring delay line Oscillator or provided by an external clock source. The circuit is designed and implemented by CSMC 0.5μm standard CMOS technology and the total chip area is around 2mm×2mm for 8×8 format ROIC with 150μm pixel pitch. The simulation results indicate that the relative time resolution of the proposed ROIC can achieve less than 1ns, and the preliminary test results show that the circuit function is correct.

Design and flight performance evaluation of the Mariners 6, 7, and 9 short-circuit current, open-circuit voltage transducers

NASA Technical Reports Server (NTRS)

Patterson, R. E.

1973-01-01

The purpose of the short-circuit voltage transducer is to provide engineering data to aid the evaluation of array performance during flight. The design, fabrication, calibration, and in-flight performance of the transducers onboard the Mariner 6, 7 and 9 spacecrafts are described. No significant differences were observed in the in-flight electrical performance of the three transducers. The transducers did experience significant losses due to coverslides or adhesive darkening, increased surface reflection, or spectral shifts within coverslide assembly. Mariner 6, 7 and 9 transducers showed non-cell current degradations of 3-1/2%, 3%, and 4%, respectively at Mars encounter and 6%, 3%, and 4-12%, respectively at end of mission. Mariner 9 solar Array Test 2 showed 3-12% current degradation while the transducer showed 4-12% degradation.

A miniature microcontroller curve tracing circuit for space flight testing transistors.

PubMed

Prokop, N; Greer, L; Krasowski, M; Flatico, J; Spina, D

2015-02-01

This paper describes a novel miniature microcontroller based curve tracing circuit, which was designed to monitor the environmental effects on Silicon Carbide Junction Field Effect Transistor (SiC JFET) device performance, while exposed to the low earth orbit environment onboard the International Space Station (ISS) as a resident experiment on the 7th Materials on the International Space Station Experiment (MISSE7). Specifically, the microcontroller circuit was designed to operate autonomously and was flown on the external structure of the ISS for over a year. This curve tracing circuit is capable of measuring current vs. voltage (I-V) characteristics of transistors and diodes. The circuit is current limited for low current devices and is specifically designed to test high temperature, high drain-to-source resistance SiC JFETs. The results of each I-V data set are transmitted serially to an external telemetered communication interface. This paper discusses the circuit architecture, its design, and presents example results.

Design of New Power Management Circuit for Light Energy Harvesting System

PubMed Central

Jafer, Issa; Stack, Paul; MacNamee, Kevin

2016-01-01

Nowadays, it can be observed that Wireless Sensors Networks (WSN) are taking increasingly vital roles in many applications, such as building energy monitoring and control, which is the focus of the work in this paper. However, the main challenging issue with adopting WSN technology is the use of power sources such as batteries, which have a limited lifetime. A smart solution that could tackle this problem is using Energy Harvesting technology. The work in this paper will be focused on proposing a new power management design through harvesting indoor light intensity. The new approach is inspired by the use of the Fractional Open Circuit Voltage based Maximum Power Point tracking (MPPT) concept for sub mw Photo Voltaic (PV) cells. The new design adopts two main features: First, it minimizes the power consumed by the power management section; and second, it maximizes the MPPT-converted output voltage and consequently improves the efficiency of the power conversion in the sub mw power level. The new experimentally-tested design showed an improvement of 81% in the efficiency of MPPT conversion using 0.5 mW input power in comparison with the other presented solutions that showed less efficiency with higher input power. PMID:26907300

Placement of clock gates in time-of-flight optoelectronic circuits

NASA Astrophysics Data System (ADS)

Feehrer, John R.; Jordan, Harry F.

1995-12-01

Time-of-flight synchronized optoelectronic circuits capitalize on the highly controllable delays of optical waveguides. Circuits have no latches; synchronization is achieved by adjustment of the lengths of waveguides that connect circuit elements. Clock gating and pulse stretching are used to restore timing and power. A functional circuit requires that every feedback loop contain at least one clock gate to prevent cumulative timing drift and power loss. A designer specifies an ideal circuit, which contains no or very few clock gates. To make the circuit functional, we must identify locations in which to place clock gates. Because clock gates are expensive, add area, and increase delay, a minimal set of locations is desired. We cast this problem in graph-theoretical form as the minimum feedback edge set problem and solve it by using an adaptation of an algorithm proposed in 1966 [IEEE Trans. Circuit Theory CT-13, 399 (1966)]. We discuss a computer-aided-design implementation of the algorithm that reduces computational complexity and demonstrate it on a set of circuits.

Connecting Time and Frequency in the RC Circuit

NASA Astrophysics Data System (ADS)

Moya, A. A.

2017-04-01

frequency domains, which plays a central role in the advanced analysis of electric circuits, once the concept of Laplace transform has been introduced in order to simplify the problem of dealing with differential equations in the time domain by converting them into algebraic equations within the frequency domain.

Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

NASA Astrophysics Data System (ADS)

Chang, S. S. L.

State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

Materials and noncoplanar mesh designs for integrated circuits with linear elastic responses to extreme mechanical deformations.

PubMed

Kim, Dae-Hyeong; Song, Jizhou; Choi, Won Mook; Kim, Hoon-Sik; Kim, Rak-Hwan; Liu, Zhuangjian; Huang, Yonggang Y; Hwang, Keh-Chih; Zhang, Yong-wei; Rogers, John A

2008-12-02

Electronic systems that offer elastic mechanical responses to high-strain deformations are of growing interest because of their ability to enable new biomedical devices and other applications whose requirements are impossible to satisfy with conventional wafer-based technologies or even with those that offer simple bendability. This article introduces materials and mechanical design strategies for classes of electronic circuits that offer extremely high stretchability, enabling them to accommodate even demanding configurations such as corkscrew twists with tight pitch (e.g., 90 degrees in approximately 1 cm) and linear stretching to "rubber-band" levels of strain (e.g., up to approximately 140%). The use of single crystalline silicon nanomaterials for the semiconductor provides performance in stretchable complementary metal-oxide-semiconductor (CMOS) integrated circuits approaching that of conventional devices with comparable feature sizes formed on silicon wafers. Comprehensive theoretical studies of the mechanics reveal the way in which the structural designs enable these extreme mechanical properties without fracturing the intrinsically brittle active materials or even inducing significant changes in their electrical properties. The results, as demonstrated through electrical measurements of arrays of transistors, CMOS inverters, ring oscillators, and differential amplifiers, suggest a valuable route to high-performance stretchable electronics.

A compact ADPLL based on symmetrical binary frequency searching with the same circuit

NASA Astrophysics Data System (ADS)

Li, Hangbiao; Zhang, Bo; Luo, Ping; Liao, Pengfei; Liu, Junjie; Li, Zhaoji

2015-03-01

A compact all-digital phase-locked loop (C-ADPLL) based on symmetrical binary frequency searching (BFS) with the same circuit is presented in this paper. The minimising relative frequency variation error Δη (MFE) rule is derived as guidance of design and is used to weigh the accuracy of the digitally controlled oscillator (DCO) clock frequency. The symmetrical BFS is used in the coarse-tuning process and the fine-tuning process of DCO clock frequency to achieve the minimum Δη of the locked DCO clock, which simplifies the circuit architecture and saves the die area. The C-ADPLL is implemented in a 0.13 μm one-poly-eight-metal (1P8M) CMOS process and the on-chip area is only 0.043 mm2, which is much smaller. The measurement results show that the peak-to-peak (Pk-Pk) jitter and the root-mean-square jitter of the DCO clock frequency are 270 ps at 72.3 MHz and 42 ps at 79.4 MHz, respectively, while the power consumption of the proposed ADPLL is only 2.7 mW (at 115.8 MHz) with a 1.2 V power supply. The measured Δη is not more than 1.14%. Compared with other ADPLLs, the proposed C-ADPLL has simpler architecture, smaller size and lower Pk-Pk jitter.

Predicting the behavior of microfluidic circuits made from discrete elements

PubMed Central

Bhargava, Krisna C.; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

2015-01-01

Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand. PMID:26516059

Fabric circuits and method of manufacturing fabric circuits

NASA Technical Reports Server (NTRS)

Chu, Andrew W. (Inventor); Dobbins, Justin A. (Inventor); Scully, Robert C. (Inventor); Trevino, Robert C. (Inventor); Lin, Greg Y. (Inventor); Fink, Patrick W. (Inventor)

2011-01-01

A flexible, fabric-based circuit comprises a non-conductive flexible layer of fabric and a conductive flexible layer of fabric adjacent thereto. A non-conductive thread, an adhesive, and/or other means may be used for attaching the conductive layer to the non-conductive layer. In some embodiments, the layers are attached by a computer-driven embroidery machine at pre-determined portions or locations in accordance with a pre-determined attachment layout before automated cutting. In some other embodiments, an automated milling machine or a computer-driven laser using a pre-designed circuit trace as a template cuts the conductive layer so as to separate an undesired portion of the conductive layer from a desired portion of the conductive layer. Additional layers of conductive fabric may be attached in some embodiments to form a multi-layer construct.

Neuromorphic Silicon Neuron Circuits

PubMed Central

Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

2011-01-01

Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

Circuit Sense for Elementary Teachers and Students: Understanding and Building Simple Logic Circuits.

ERIC Educational Resources Information Center

Houghton, Janaye Matteson; Houghton, Robert S.

Today and in the future, critical toolmaking advances will need to be made in the area of circuit design, construction, and implementation. Traditional school curriculum has sidestepped the area of tool design, especially at the elementary level. This publication addresses a calling for a new curriculum direction, based not only on the study of…

Commutation circuit for an HVDC circuit breaker

DOEpatents

Premerlani, William J.

1981-01-01

A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

Commutation circuit for an HVDC circuit breaker

DOEpatents

Premerlani, W.J.

1981-11-10

A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

Fluid Power Multi-actuator Circuit Board with Microcomputer Control Option.

ERIC Educational Resources Information Center

McKechnie, R. E.; Vickers, G. W.

1981-01-01

Describes a portable fluid power engineering laboratory and class demonstration apparatus designed to enable students to design, build, and test multi-actuator circuits. Features a variety of standard pneumatic values and actuators fitted with quick disconnect couplings. Discusses sequencing circuit boards, microcomputer control, cost, and…

Probabilistic switching circuits in DNA

PubMed Central

Wilhelm, Daniel; Bruck, Jehoshua

2018-01-01

A natural feature of molecular systems is their inherent stochastic behavior. A fundamental challenge related to the programming of molecular information processing systems is to develop a circuit architecture that controls the stochastic states of individual molecular events. Here we present a systematic implementation of probabilistic switching circuits, using DNA strand displacement reactions. Exploiting the intrinsic stochasticity of molecular interactions, we developed a simple, unbiased DNA switch: An input signal strand binds to the switch and releases an output signal strand with probability one-half. Using this unbiased switch as a molecular building block, we designed DNA circuits that convert an input signal to an output signal with any desired probability. Further, this probability can be switched between 2n different values by simply varying the presence or absence of n distinct DNA molecules. We demonstrated several DNA circuits that have multiple layers and feedback, including a circuit that converts an input strand to an output strand with eight different probabilities, controlled by the combination of three DNA molecules. These circuits combine the advantages of digital and analog computation: They allow a small number of distinct input molecules to control a diverse signal range of output molecules, while keeping the inputs robust to noise and the outputs at precise values. Moreover, arbitrarily complex circuit behaviors can be implemented with just a single type of molecular building block. PMID:29339484

Characteristics of Radio-Frequency Circuits Utilizing Ferroelectric Capacitors

NASA Technical Reports Server (NTRS)

Eskridge, Michael; Gui, Xiao; MacLeod, Todd; Ho, Fat D.

2011-01-01

Ferroelectric capacitors, most commonly used in memory circuits and variable components, were studied in simple analog radio-frequency circuits such as the RLC resonator and Colpitts oscillator. The goal was to characterize the RF circuits in terms of frequency of oscillation, gain, etc, using ferroelectric capacitors. Frequencies of oscillation of both circuits were measured and studied a more accurate resonant frequency can be obtained using the ferroelectric capacitors. Many experiments were conducted and data collected. A model to simulate the experimental results will be developed. Discrepancies in gain and frequency in these RF circuits when conventional capacitors are replaced with ferroelectric ones were studied. These results will enable circuit designers to anticipate the effects of using ferroelectric components in their radio- frequency applications.

Understanding the Behaviour of Infinite Ladder Circuits

ERIC Educational Resources Information Center

Ucak, C.; Yegin, K.

2008-01-01

Infinite ladder circuits are often encountered in undergraduate electrical engineering and physics curricula when dealing with series and parallel combination of impedances, as a part of filter design or wave propagation on transmission lines. The input impedance of such infinite ladder circuits is derived by assuming that the input impedance does…

Small Sized Drone Fall Recover Mechanism Design

NASA Astrophysics Data System (ADS)

LIU, Tzu-Heng; CHAO, Fang-Lin; LIOU, Jhen-Yuan

2017-12-01

Drones uses four motors to rotate clockwise, counter-clockwise, or change in rotational speed to change its status of motion. The problem of Unmanned Aerial Vehicle turnover causes personal loses and harm local environment. Designs of devices that can let falling drones recover are discussed. The models attempt to change the orientation, so that the drone may be able to improve to the point where it can take off again. The design flow included looking for functional elements, using simplify model to estimate primary functional characteristics, and find the appropriate design parameters. For reducing the complexity, we adopted the simple rotate mechanism with rotating arms to change the fuselage angle and reduce the dependence on the extra-components. A rough model was built to verify structure, and then the concept drawing and prototype were constructed. We made the prototype through the integration of mechanical part and the electronic control circuit. The electronic control module that selected is Arduino-mini pro. Through the Bluetooth modules, user can start the rebound mechanism by the motor control signal. Protections frames are added around each propeller to improve the body rotate problem. Limited by current size of Arduino module, motor and rebound mechanism make the main chassis more massive than the commercial product. However, built-in sensor and circuit miniaturization will improve it in future.

30 CFR 75.800 - High-voltage circuits; circuit breakers.

Code of Federal Regulations, 2010 CFR

2010-07-01

... shall be equipped with devices to provide protection against under-voltage grounded phase, short circuit... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. [Statutory Provisions] High-voltage circuits entering...

Circuit engineering principles for construction of bipolar large-scale integrated circuit storage devices and very large-scale main memory

NASA Astrophysics Data System (ADS)

Neklyudov, A. A.; Savenkov, V. N.; Sergeyez, A. G.

1984-06-01

Memories are improved by increasing speed or the memory volume on a single chip. The most effective means for increasing speeds in bipolar memories are current control circuits with the lowest extraction times for a specific power consumption (1/4 pJ/bit). The control current circuitry involves multistage current switches and circuits accelerating transient processes in storage elements and links. Circuit principles for the design of bipolar memories with maximum speeds for an assigned minimum of circuit topology are analyzed. Two main classes of storage with current control are considered: the ECL type and super-integrated injection type storage with data capacities of N = 1/4 and N 4/16, respectively. The circuits reduce logic voltage differentials and the volumes of lexical and discharge buses and control circuit buses. The limiting speed is determined by the antiinterference requirements of the memory in storage and extraction modes.

Research of vibration control based on current mode piezoelectric shunt damping circuit

NASA Astrophysics Data System (ADS)

Liu, Weiwei; Mao, Qibo

2017-12-01

The piezoelectric shunt damping circuit using current mode approach is imposed to control the vibration of a cantilever beam. Firstly, the simulated inductance with large values are designed for the corresponding RL series shunt circuits. Moreover, with an example of cantilever beam, the second natural frequency of the beam is targeted to control for experiment. By adjusting the values of the equivalent inductance and equivalent resistance of the shunt circuit, the optimal damping of the shunt circuit is obtained. Meanwhile, the designed piezoelectric shunt damping circuit stability is experimental verified. Experimental results show that the proposed piezoelectric shunt damping circuit based on current mode circuit has good vibration control performance. However, the control performance will be reduced if equivalent inductance and equivalent resistance values deviate from optimal values.

Off-line, built-in test techniques for VLSI circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Sievers, M. W.

1982-01-01

It is shown that the use of redundant on-chip circuitry improves the testability of an entire VLSI circuit. In the study described here, five techniques applied to a two-bit ripple carry adder are compared. The techniques considered are self-oscillation, self-comparison, partition, scan path, and built-in logic block observer. It is noted that both classical stuck-at faults and nonclassical faults, such as bridging faults (shorts), stuck-on x faults where x may be 0, 1, or vary between the two, and parasitic flip-flop faults occur in IC structures. To simplify the analysis of the testing techniques, however, a stuck-at fault model is assumed.

Modular electron transfer circuits for synthetic biology

PubMed Central

Agapakis, Christina M

2010-01-01

Electron transfer is central to a wide range of essential metabolic pathways, from photosynthesis to fermentation. The evolutionary diversity and conservation of proteins that transfer electrons makes these pathways a valuable platform for engineered metabolic circuits in synthetic biology. Rational engineering of electron transfer pathways containing hydrogenases has the potential to lead to industrial scale production of hydrogen as an alternative source of clean fuel and experimental assays for understanding the complex interactions of multiple electron transfer proteins in vivo. We designed and implemented a synthetic hydrogen metabolism circuit in Escherichia coli that creates an electron transfer pathway both orthogonal to and integrated within existing metabolism. The design of such modular electron transfer circuits allows for facile characterization of in vivo system parameters with applications toward further engineering for alternative energy production. PMID:21468209

VS30 – A site-characterization parameter for use in building Codes, simplified earthquake resistant design, GMPEs, and ShakeMaps

USGS Publications Warehouse

Borcherdt, Roger D.

2012-01-01

VS30, defined as the average seismic shear-wave velocity from the surface to a depth of 30 meters, has found wide-spread use as a parameter to characterize site response for simplified earthquake resistant design as implemented in building codes worldwide. VS30 , as initially introduced by the author for the US 1994 NEHRP Building Code, provides unambiguous definitions of site classes and site coefficients for site-dependent response spectra based on correlations derived from extensive borehole logging and comparative ground-motion measurement programs in California. Subsequent use of VS30 for development of strong ground motion prediction equations (GMPEs) and measurement of extensive sets of VS borehole data have confirmed the previous empirical correlations and established correlations of SVS30 with VSZ at other depths. These correlations provide closed form expressions to predict S30 V at a large number of additional sites and further justify S30 V as a parameter to characterize site response for simplified building codes, GMPEs, ShakeMap, and seismic hazard mapping.

Study of Piezoelectric Vibration Energy Harvester with non-linear conditioning circuit using an integrated model

NASA Astrophysics Data System (ADS)

Manzoor, Ali; Rafique, Sajid; Usman Iftikhar, Muhammad; Mahmood Ul Hassan, Khalid; Nasir, Ali

2017-08-01

Piezoelectric vibration energy harvester (PVEH) consists of a cantilever bimorph with piezoelectric layers pasted on its top and bottom, which can harvest power from vibrations and feed to low power wireless sensor nodes through some power conditioning circuit. In this paper, a non-linear conditioning circuit, consisting of a full-bridge rectifier followed by a buck-boost converter, is employed to investigate the issues of electrical side of the energy harvesting system. An integrated mathematical model of complete electromechanical system has been developed. Previously, researchers have studied PVEH with sophisticated piezo-beam models but employed simplistic linear circuits, such as resistor, as electrical load. In contrast, other researchers have worked on more complex non-linear circuits but with over-simplified piezo-beam models. Such models neglect different aspects of the system which result from complex interactions of its electrical and mechanical subsystems. In this work, authors have integrated the distributed parameter-based model of piezo-beam presented in literature with a real world non-linear electrical load. Then, the developed integrated model is employed to analyse the stability of complete energy harvesting system. This work provides a more realistic and useful electromechanical model having realistic non-linear electrical load unlike the simplistic linear circuit elements employed by many researchers.

A simplified computational fluid-dynamic approach to the oxidizer injector design in hybrid rockets

NASA Astrophysics Data System (ADS)

Di Martino, Giuseppe D.; Malgieri, Paolo; Carmicino, Carmine; Savino, Raffaele

2016-12-01

Fuel regression rate in hybrid rockets is non-negligibly affected by the oxidizer injection pattern. In this paper a simplified computational approach developed in an attempt to optimize the oxidizer injector design is discussed. Numerical simulations of the thermo-fluid-dynamic field in a hybrid rocket are carried out, with a commercial solver, to investigate into several injection configurations with the aim of increasing the fuel regression rate and minimizing the consumption unevenness, but still favoring the establishment of flow recirculation at the motor head end, which is generated with an axial nozzle injector and has been demonstrated to promote combustion stability, and both larger efficiency and regression rate. All the computations have been performed on the configuration of a lab-scale hybrid rocket motor available at the propulsion laboratory of the University of Naples with typical operating conditions. After a preliminary comparison between the two baseline limiting cases of an axial subsonic nozzle injector and a uniform injection through the prechamber, a parametric analysis has been carried out by varying the oxidizer jet flow divergence angle, as well as the grain port diameter and the oxidizer mass flux to study the effect of the flow divergence on heat transfer distribution over the fuel surface. Some experimental firing test data are presented, and, under the hypothesis that fuel regression rate and surface heat flux are proportional, the measured fuel consumption axial profiles are compared with the predicted surface heat flux showing fairly good agreement, which allowed validating the employed design approach. Finally an optimized injector design is proposed.

Circuit bounds on stochastic transport in the Lorenz equations

NASA Astrophysics Data System (ADS)

Weady, Scott; Agarwal, Sahil; Wilen, Larry; Wettlaufer, J. S.

2018-07-01

In turbulent Rayleigh-Bénard convection one seeks the relationship between the heat transport, captured by the Nusselt number, and the temperature drop across the convecting layer, captured by the Rayleigh number. In experiments, one measures the Nusselt number for a given Rayleigh number, and the question of how close that value is to the maximal transport is a key prediction of variational fluid mechanics in the form of an upper bound. The Lorenz equations have traditionally been studied as a simplified model of turbulent Rayleigh-Bénard convection, and hence it is natural to investigate their upper bounds, which has previously been done numerically and analytically, but they are not as easily accessible in an experimental context. Here we describe a specially built circuit that is the experimental analogue of the Lorenz equations and compare its output to the recently determined upper bounds of the stochastic Lorenz equations [1]. The circuit is substantially more efficient than computational solutions, and hence we can more easily examine the system. Because of offsets that appear naturally in the circuit, we are motivated to study unique bifurcation phenomena that arise as a result. Namely, for a given Rayleigh number, we find a reentrant behavior of the transport on noise amplitude and this varies with Rayleigh number passing from the homoclinic to the Hopf bifurcation.

A Simple Memristor Model for Circuit Simulations

NASA Astrophysics Data System (ADS)

Fullerton, Farrah-Amoy; Joe, Aaleyah; Gergel-Hackett, Nadine; Department of Chemistry; Physics Team

This work describes the development of a model for the memristor, a novel nanoelectronic technology. The model was designed to replicate the real-world electrical characteristics of previously fabricated memristor devices, but was constructed with basic circuit elements using a free widely available circuit simulator, LT Spice. The modeled memrsistors were then used to construct a circuit that performs material implication. Material implication is a digital logic that can be used to perform all of the same basic functions as traditional CMOS gates, but with fewer nanoelectronic devices. This memristor-based digital logic could enable memristors' use in new paradigms of computer architecture with advantages in size, speed, and power over traditional computing circuits. Additionally, the ability to model the real-world electrical characteristics of memristors in a free circuit simulator using its standard library of elements could enable not only the development of memristor material implication, but also the development of a virtually unlimited array of other memristor-based circuits.

Measuring circuit

DOEpatents

Sun, Shan C.; Chaprnka, Anthony G.

1977-01-11

An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

Logic circuits from zero forcing.

PubMed

Burgarth, Daniel; Giovannetti, Vittorio; Hogben, Leslie; Severini, Simone; Young, Michael

We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.

Materials and noncoplanar mesh designs for integrated circuits with linear elastic responses to extreme mechanical deformations

PubMed Central

Kim, Dae-Hyeong; Song, Jizhou; Choi, Won Mook; Kim, Hoon-Sik; Kim, Rak-Hwan; Liu, Zhuangjian; Huang, Yonggang Y.; Hwang, Keh-Chih; Zhang, Yong-wei; Rogers, John A.

2008-01-01

Electronic systems that offer elastic mechanical responses to high-strain deformations are of growing interest because of their ability to enable new biomedical devices and other applications whose requirements are impossible to satisfy with conventional wafer-based technologies or even with those that offer simple bendability. This article introduces materials and mechanical design strategies for classes of electronic circuits that offer extremely high stretchability, enabling them to accommodate even demanding configurations such as corkscrew twists with tight pitch (e.g., 90° in ≈1 cm) and linear stretching to “rubber-band” levels of strain (e.g., up to ≈140%). The use of single crystalline silicon nanomaterials for the semiconductor provides performance in stretchable complementary metal-oxide-semiconductor (CMOS) integrated circuits approaching that of conventional devices with comparable feature sizes formed on silicon wafers. Comprehensive theoretical studies of the mechanics reveal the way in which the structural designs enable these extreme mechanical properties without fracturing the intrinsically brittle active materials or even inducing significant changes in their electrical properties. The results, as demonstrated through electrical measurements of arrays of transistors, CMOS inverters, ring oscillators, and differential amplifiers, suggest a valuable route to high-performance stretchable electronics. PMID:19015528

The design of preamplifier and ADC circuit base on weak e-optical signal

NASA Astrophysics Data System (ADS)

Fen, Leng; Ying-ping, Yang; Ya-nan, Yu; Xiao-ying, Xu

2011-02-01

Combined with the demand of the process of weak e-optical signal in QPD detection system, the article introduced the circuit principle of deigning preamplifier and ADC circuit with I/V conversion, instrumentation amplifier, low-pass filter and 16-bit A/D transformation. At the same time the article discussed the circuit's noise suppression and isolation according to the characteristics of the weak signal, and gave the method of software rectification. Finally, tested the weak signal with keithley2000, and got a good effect.

Cancellation Circuit for Transmit-Receive Isolation

DTIC Science & Technology

2010-09-01

non -ideal hardware, and the performance of the circuit is limited. One of the major problems is the leakage from the circulator. The leakage disrupts...cancellation circuit was investigated by a series of simulations using Agilent ADS (Agilent Advanced Design System), and hardware tests were conducted to...developed in the WDDPA application, allowing coherent processing of the data from all elements. There are limitations encountered due to non -ideal

Deconstructing the core dynamics from a complex time-lagged regulatory biological circuit.

PubMed

Eriksson, O; Brinne, B; Zhou, Y; Björkegren, J; Tegnér, J

2009-03-01

Complex regulatory dynamics is ubiquitous in molecular networks composed of genes and proteins. Recent progress in computational biology and its application to molecular data generate a growing number of complex networks. Yet, it has been difficult to understand the governing principles of these networks beyond graphical analysis or extensive numerical simulations. Here the authors exploit several simplifying biological circumstances which thereby enable to directly detect the underlying dynamical regularities driving periodic oscillations in a dynamical nonlinear computational model of a protein-protein network. System analysis is performed using the cell cycle, a mathematically well-described complex regulatory circuit driven by external signals. By introducing an explicit time delay and using a 'tearing-and-zooming' approach the authors reduce the system to a piecewise linear system with two variables that capture the dynamics of this complex network. A key step in the analysis is the identification of functional subsystems by identifying the relations between state-variables within the model. These functional subsystems are referred to as dynamical modules operating as sensitive switches in the original complex model. By using reduced mathematical representations of the subsystems the authors derive explicit conditions on how the cell cycle dynamics depends on system parameters, and can, for the first time, analyse and prove global conditions for system stability. The approach which includes utilising biological simplifying conditions, identification of dynamical modules and mathematical reduction of the model complexity may be applicable to other well-characterised biological regulatory circuits. [Includes supplementary material].

Test Structures For Bumpy Integrated Circuits

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Sayah, Hoshyar R.

1989-01-01

Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

Distinct neural and neuromuscular strategies underlie independent evolution of simplified advertisement calls

PubMed Central

Leininger, Elizabeth C.; Kelley, Darcy B.

2013-01-01

Independent or convergent evolution can underlie phenotypic similarity of derived behavioural characters. Determining the underlying neural and neuromuscular mechanisms sheds light on how these characters arose. One example of evolutionarily derived characters is a temporally simple advertisement call of male African clawed frogs (Xenopus) that arose at least twice independently from a more complex ancestral pattern. How did simplification occur in the vocal circuit? To distinguish shared from divergent mechanisms, we examined activity from the calling brain and vocal organ (larynx) in two species that independently evolved simplified calls. We find that each species uses distinct neural and neuromuscular strategies to produce the simplified calls. Isolated  Xenopus borealis brains produce fictive vocal patterns that match temporal patterns of actual male calls; the larynx converts nerve activity faithfully into muscle contractions and single clicks. In contrast, fictive patterns from isolated Xenopus boumbaensis brains are short bursts of nerve activity; the isolated larynx requires stimulus bursts to produce a single click of sound. Thus, unlike X. borealis, the output of the X. boumbaensis hindbrain vocal pattern generator is an ancestral burst-type pattern, transformed by the larynx into single clicks. Temporally simple advertisement calls in genetically distant species of Xenopus have thus arisen independently via reconfigurations of central and peripheral vocal neuroeffectors. PMID:23407829

Distinct neural and neuromuscular strategies underlie independent evolution of simplified advertisement calls.

PubMed

Leininger, Elizabeth C; Kelley, Darcy B

2013-04-07

Independent or convergent evolution can underlie phenotypic similarity of derived behavioural characters. Determining the underlying neural and neuromuscular mechanisms sheds light on how these characters arose. One example of evolutionarily derived characters is a temporally simple advertisement call of male African clawed frogs (Xenopus) that arose at least twice independently from a more complex ancestral pattern. How did simplification occur in the vocal circuit? To distinguish shared from divergent mechanisms, we examined activity from the calling brain and vocal organ (larynx) in two species that independently evolved simplified calls. We find that each species uses distinct neural and neuromuscular strategies to produce the simplified calls. Isolated Xenopus borealis brains produce fictive vocal patterns that match temporal patterns of actual male calls; the larynx converts nerve activity faithfully into muscle contractions and single clicks. In contrast, fictive patterns from isolated Xenopus boumbaensis brains are short bursts of nerve activity; the isolated larynx requires stimulus bursts to produce a single click of sound. Thus, unlike X. borealis, the output of the X. boumbaensis hindbrain vocal pattern generator is an ancestral burst-type pattern, transformed by the larynx into single clicks. Temporally simple advertisement calls in genetically distant species of Xenopus have thus arisen independently via reconfigurations of central and peripheral vocal neuroeffectors.

Scaling up digital circuit computation with DNA strand displacement cascades.

PubMed

Qian, Lulu; Winfree, Erik

2011-06-03

To construct sophisticated biochemical circuits from scratch, one needs to understand how simple the building blocks can be and how robustly such circuits can scale up. Using a simple DNA reaction mechanism based on a reversible strand displacement process, we experimentally demonstrated several digital logic circuits, culminating in a four-bit square-root circuit that comprises 130 DNA strands. These multilayer circuits include thresholding and catalysis within every logical operation to perform digital signal restoration, which enables fast and reliable function in large circuits with roughly constant switching time and linear signal propagation delays. The design naturally incorporates other crucial elements for large-scale circuitry, such as general debugging tools, parallel circuit preparation, and an abstraction hierarchy supported by an automated circuit compiler.

30 CFR 77.800 - High-voltage circuits; circuit breakers.

Code of Federal Regulations, 2010 CFR

2010-07-01

... devices to provide protection against under voltage, grounded phase, short circuit and overcurrent. High... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High...

Project Circuits in a Basic Electric Circuits Course

ERIC Educational Resources Information Center

Becker, James P.; Plumb, Carolyn; Revia, Richard A.

2014-01-01

The use of project circuits (a photoplethysmograph circuit and a simple audio amplifier), introduced in a sophomore-level electric circuits course utilizing active learning and inquiry-based methods, is described. The development of the project circuits was initiated to promote enhanced engagement and deeper understanding of course content among…

A programmable CCD driver circuit for multiphase CCD operation

NASA Technical Reports Server (NTRS)

Ewin, Audrey J.; Reed, Kenneth V.

1989-01-01

A programmable CCD (charge-coupled device) driver circuit was designed to drive CCDs in multiphased modes. The purpose of the drive electronics is to operate developmental CCD imaging arrays for NASA's tiltable moderate resolution imaging spectrometer (MODIS-T). Five objectives for the driver were considered during its design: (1) the circuit drives CCD electrode voltages between 0 V and +30 V to produce reasonable potential wells, (2) the driving sequence is started with one input signal, (3) the driving sequence is started with one input signal, (4) the circuit allows programming of frame sequences required by arrays of any size, (5) it produces interfacing signals for the CCD and the DTF (detector test facility). Simulation of the driver verified its function with the master clock running up to 10 MHz. This suggests a maximum rate of 400,000 pixels/s. Timing and packaging parameters were verified. The design uses 54 TTL (transistor-transistor logic) chips. Two versions of hardware were fabricated: wirewrap and printed circuit board. Both were verified functionally with a logic analyzer.

A clocking discipline for two-phase digital integrated circuits

NASA Astrophysics Data System (ADS)

Noice, D. C.

1983-09-01

Sooner or later a designer of digital circuits must face the problem of timing verification so he can avoid errors caused by clock skew, critical races, and hazards. Unlike previous verification methods, such as timing simulation and timing analysis, the approach presented here guarantees correct operation despite uncertainty about delays in the circuit. The result is a clocking discipline that deals with timing abstractions only. It is not based on delay calculations; it is only concerned with the correct, synchronous operation at some clock rate. Accordingly, it may be used earlier in the design cycle, which is particularly important to integrated circuit designs. The clocking discipline consists of a notation of clocking types, and composition rules for using the types. Together, the notation and rules define a formal theory of two phase clocking. The notation defines the names and exact characteristics for different signals that are used in a two phase digital system. The notation makes it possible to develop rules for propagating the clocking types through particular circuits.

Hierarchical MFMO Circuit Modules for an Energy-Efficient SDR DBF

NASA Astrophysics Data System (ADS)

Mar, Jeich; Kuo, Chi-Cheng; Wu, Shin-Ru; Lin, You-Rong

The hierarchical multi-function matrix operation (MFMO) circuit modules are designed using coordinate rotations digital computer (CORDIC) algorithm for realizing the intensive computation of matrix operations. The paper emphasizes that the designed hierarchical MFMO circuit modules can be used to develop a power-efficient software-defined radio (SDR) digital beamformer (DBF). The formulas of the processing time for the scalable MFMO circuit modules implemented in field programmable gate array (FPGA) are derived to allocate the proper logic resources for the hardware reconfiguration. The hierarchical MFMO circuit modules are scalable to the changing number of array branches employed for the SDR DBF to achieve the purpose of power saving. The efficient reuse of the common MFMO circuit modules in the SDR DBF can also lead to energy reduction. Finally, the power dissipation and reconfiguration function in the different modes of the SDR DBF are observed from the experiment results.

Electronic circuits

NASA Technical Reports Server (NTRS)

1976-01-01

Twenty-nine circuits and circuit techniques developed for communications and instrumentation technology are described. Topics include pulse-code modulation, phase-locked loops, data coding, data recording, detection circuits, logic circuits, oscillators, and amplifiers.

Flexible circuits with integrated switches for robotic shape sensing

NASA Astrophysics Data System (ADS)

Harnett, C. K.

2016-05-01

Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

Simplified Design Method for Tension Fasteners

NASA Astrophysics Data System (ADS)

Olmstead, Jim; Barker, Paul; Vandersluis, Jonathan

2012-07-01

Tension fastened joints design has traditionally been an iterative tradeoff between separation and strength requirements. This paper presents equations for the maximum external load that a fastened joint can support and the optimal preload to achieve this load. The equations, based on linear joint theory, account for separation and strength safety factors and variations in joint geometry, materials, preload, load-plane factor and thermal loading. The strength-normalized versions of the equations are applicable to any fastener and can be plotted to create a "Fastener Design Space", FDS. Any combination of preload and tension that falls within the FDS represents a safe joint design. The equation for the FDS apex represents the optimal preload and load capacity of a set of joints. The method can be used for preliminary design or to evaluate multiple pre-existing joints.

Logic circuits based on molecular spider systems.

PubMed

Mo, Dandan; Lakin, Matthew R; Stefanovic, Darko

2016-08-01

Spatial locality brings the advantages of computation speed-up and sequence reuse to molecular computing. In particular, molecular walkers that undergo localized reactions are of interest for implementing logic computations at the nanoscale. We use molecular spider walkers to implement logic circuits. We develop an extended multi-spider model with a dynamic environment wherein signal transmission is triggered via localized reactions, and use this model to implement three basic gates (AND, OR, NOT) and a cascading mechanism. We develop an algorithm to automatically generate the layout of the circuit. We use a kinetic Monte Carlo algorithm to simulate circuit computations, and we analyze circuit complexity: our design scales linearly with formula size and has a logarithmic time complexity. Copyright © 2016 Elsevier Ireland Ltd. All rights reserved.

Modeling neural circuits in Parkinson's disease.

PubMed

Psiha, Maria; Vlamos, Panayiotis

2015-01-01

Parkinson's disease (PD) is caused by abnormal neural activity of the basal ganglia which are connected to the cerebral cortex in the brain surface through complex neural circuits. For a better understanding of the pathophysiological mechanisms of PD, it is important to identify the underlying PD neural circuits, and to pinpoint the precise nature of the crucial aberrations in these circuits. In this paper, the general architecture of a hybrid Multilayer Perceptron (MLP) network for modeling the neural circuits in PD is presented. The main idea of the proposed approach is to divide the parkinsonian neural circuitry system into three discrete subsystems: the external stimuli subsystem, the life-threatening events subsystem, and the basal ganglia subsystem. The proposed model, which includes the key roles of brain neural circuit in PD, is based on both feed-back and feed-forward neural networks. Specifically, a three-layer MLP neural network with feedback in the second layer was designed. The feedback in the second layer of this model simulates the dopamine modulatory effect of compacta on striatum.

Safety and performance enhancement circuit for primary explosive detonators

DOEpatents

Davis, Ronald W [Tracy, CA

2006-04-04

A safety and performance enhancement arrangement for primary explosive detonators. This arrangement involves a circuit containing an energy storage capacitor and preset self-trigger to protect the primary explosive detonator from electrostatic discharge (ESD). The circuit does not discharge into the detonator until a sufficient level of charge is acquired on the capacitor. The circuit parameters are designed so that normal ESD environments cannot charge the protection circuit to a level to achieve discharge. When functioned, the performance of the detonator is also improved because of the close coupling of the stored energy.

High performance protection circuit for power electronics applications

NASA Astrophysics Data System (ADS)

Tudoran, Cristian D.; Dǎdârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

2015-12-01

In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a "sensor" or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

Spring Break: A Lesson in Circuits. "This Old House" College Style.

ERIC Educational Resources Information Center

Duch, Barbara

2001-01-01

Introduces students to the topics of electricity and circuits within the context of house wiring. Explores the properties of series and parallel circuits, researches local wiring codes, calculates the current used by appliances based on their power ratings, and designs circuits in a typical kitchen. (Author/ASK)

A Magnetic Circuit Demonstration.

ERIC Educational Resources Information Center

Vanderkooy, John; Lowe, June

1995-01-01

Presents a demonstration designed to illustrate Faraday's, Ampere's, and Lenz's laws and to reinforce the concepts through the analysis of a two-loop magnetic circuit. Can be made dramatic and challenging for sophisticated students but is suitable for an introductory course in electricity and magnetism. (JRH)

30 CFR 75.800-2 - Approved circuit schemes.

Code of Federal Regulations, 2010 CFR

2010-07-01

... necessary protection to the circuits required by § 75.800: (a) Ground check relays may be used for undervoltage protection if the relay coils are designed to trip the circuit breaker when line voltage decreases to 40 percent to 60 percent of the nominal line voltage; (b) Ground trip relays on resistance...

30 CFR 75.800-2 - Approved circuit schemes.

Code of Federal Regulations, 2011 CFR

2011-07-01

... necessary protection to the circuits required by § 75.800: (a) Ground check relays may be used for undervoltage protection if the relay coils are designed to trip the circuit breaker when line voltage decreases to 40 percent to 60 percent of the nominal line voltage; (b) Ground trip relays on resistance...

Integrated circuit electrometer and sweep circuitry for an atmospheric probe

NASA Technical Reports Server (NTRS)

Zimmerman, L. E.

1971-01-01

The design of electrometer circuitry using an integrated circuit operational amplifier with a MOSFET input is described. Input protection against static voltages is provided by a dual ultra low leakage diode or a neon lamp. Factors affecting frequency response leakage resistance, and current stability are discussed, and methods are suggested for increasing response speed and for eliminating leakage resistance and current instabilities. Based on the above, two practical circuits, one having a linear response and the other a logarithmic response, were designed and evaluated experimentally. The design of a sweep circuit to implement mobility measurements using atmospheric probes is presented. A triangular voltage waveform is generated and shaped to contain a step in voltage from zero volts in both positive and negative directions.

Exact Synthesis of Reversible Circuits Using A* Algorithm

NASA Astrophysics Data System (ADS)

Datta, K.; Rathi, G. K.; Sengupta, I.; Rahaman, H.

2015-06-01

With the growing emphasis on low-power design methodologies, and the result that theoretical zero power dissipation is possible only if computations are information lossless, design and synthesis of reversible logic circuits have become very important in recent years. Reversible logic circuits are also important in the context of quantum computing, where the basic operations are reversible in nature. Several synthesis methodologies for reversible circuits have been reported. Some of these methods are termed as exact, where the motivation is to get the minimum-gate realization for a given reversible function. These methods are computationally very intensive, and are able to synthesize only very small functions. There are other methods based on function transformations or higher-level representation of functions like binary decision diagrams or exclusive-or sum-of-products, that are able to handle much larger circuits without any guarantee of optimality or near-optimality. Design of exact synthesis algorithms is interesting in this context, because they set some kind of benchmarks against which other methods can be compared. This paper proposes an exact synthesis approach based on an iterative deepening version of the A* algorithm using the multiple-control Toffoli gate library. Experimental results are presented with comparisons with other exact and some heuristic based synthesis approaches.

[Modeling and analysis of volume conduction based on field-circuit coupling].

PubMed

Tang, Zhide; Liu, Hailong; Xie, Xiaohui; Chen, Xiufa; Hou, Deming

2012-08-01

Numerical simulations of volume conduction can be used to analyze the process of energy transfer and explore the effects of some physical factors on energy transfer efficiency. We analyzed the 3D quasi-static electric field by the finite element method, and developed A 3D coupled field-circuit model of volume conduction basing on the coupling between the circuit and the electric field. The model includes a circuit simulation of the volume conduction to provide direct theoretical guidance for energy transfer optimization design. A field-circuit coupling model with circular cylinder electrodes was established on the platform of the software FEM3.5. Based on this, the effects of electrode cross section area, electrode distance and circuit parameters on the performance of volume conduction system were obtained, which provided a basis for optimized design of energy transfer efficiency.

[Simplified identification and filter device of carbon dioxide].

PubMed