Science.gov

Sample records for 12-bit analog-to-digital converter

  1. Minus 55 to plus 200 deg C 12 bit analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Smith, L. R.; Prazak, P. R.

    1981-01-01

    A 12 bit successive approximation analog to digital converter that offers moderately high speed precision data conversion at a reasonable level of cost and complexity is studied. The ADCH10HT extends this capability over a temperature range of -55 to +200 C. No missing-code performance is maintained over the entire temperature range. The converter is completely self-contained with internal clock and +10 volt reference. The CMOS devices offer low power dissipation, so that the internal temperature of the hybrid circuit does not rise as much from self heating. In CMOS circuits, pn junction leakage currents are returned to the supplies so that the logic keeps working at temperatures up to 250 C.

  2. The total ionizing dose effect in 12-bit, 125 MSPS analog-to-digital converters

    NASA Astrophysics Data System (ADS)

    Xue, Wu; Wu, Lu; Yudong, Li; Qi, Guo; Xin, Wang; Xingyao, Zhang; Xin, Yu; Wuying, Ma

    2014-04-01

    This paper presents the total ionizing dose test results at different biases and dose rates for AD9233, which is fabricated using a modern CMOS process. The experimental results show that the digital parts are more sensitive than the other parts. Power down is the worst-case bias, and this phenomenon is first found in the total ionizing dose effect of analog-to-digital converters. We also find that the AC as well as DC parameters are sensitive to the total ionizing dose at a high dose rate, whereas none of the parameters are sensitive at a low dose rate. The test facilities, results and analysis are presented in detail.

  3. Total Ionizing Dose Effects in 12-Bit Successive-Approximation Analog-To-Digital Converters

    NASA Technical Reports Server (NTRS)

    Lee, C. I.; Rax, B. G.; Johnston, A. H.

    1993-01-01

    Analog-to-digital (A/D) converters are critical components in many space and military systems, and there have been numerous advances in A/D converter technology that have increased the resolution and conversion time. The increased performance is due to two factors: (1) advances in circuit design and complexity, which have increased the number of components and the integration density; and (2) new process technologies, such as BiCMOS, which provide better performance, cost, and smaller size in mixed-signal circuits. High-speed A/D converters, with conversion rates above 1 MHz, present a challenge to circuit designers and test engineers. Their complex architectures and high-performance specifications result in numerous possible failure modes when they are subjected to ionizing radiation. The dominant failure mode may depend on the specific application because the fundamental effects on MOS and bipolar transistors are strongly affected by bias conditions.

  4. A 12-bit high-speed column-parallel two-step single-slope analog-to-digital converter (ADC) for CMOS image sensors.

    PubMed

    Lyu, Tao; Yao, Suying; Nie, Kaiming; Xu, Jiangtao

    2014-11-17

    A 12-bit high-speed column-parallel two-step single-slope (SS) analog-to-digital converter (ADC) for CMOS image sensors is proposed. The proposed ADC employs a single ramp voltage and multiple reference voltages, and the conversion is divided into coarse phase and fine phase to improve the conversion rate. An error calibration scheme is proposed to correct errors caused by offsets among the reference voltages. The digital-to-analog converter (DAC) used for the ramp generator is based on the split-capacitor array with an attenuation capacitor. Analysis of the DAC's linearity performance versus capacitor mismatch and parasitic capacitance is presented. A prototype 1024 × 32 Time Delay Integration (TDI) CMOS image sensor with the proposed ADC architecture has been fabricated in a standard 0.18 μm CMOS process. The proposed ADC has average power consumption of 128 μW and a conventional rate 6 times higher than the conventional SS ADC. A high-quality image, captured at the line rate of 15.5 k lines/s, shows that the proposed ADC is suitable for high-speed CMOS image sensors.

  5. A power-efficient 12-bit analog-to-digital converter with a novel constant-resistance CMOS input sampling switch

    NASA Astrophysics Data System (ADS)

    Xin, Jing; Yiqi, Zhuang; Hualian, Tang; Li, Dai; Yongqian, Du; Li, Zhang; Hongbo, Duan

    2014-02-01

    A power-efficient 12-bit 40-MS/s pipeline analog-to-digital converter (ADC) implemented in a 0.13 μm CMOS technology is presented. A novel CMOS bootstrapping switch, which offers a constant on-resistance over the entire input signal range, is used at the sample-and-hold front-end to enhance the dynamic performance of the pipelined ADC. By implementing with 2.5-bit-per-stage and a simplified amplifier sharing architecture between two successive pipeline stages, a very competitive power consumption and small die area can be achieved. Meanwhile, the substrate-biasing-effect attenuated T-type switches are introduced to reduce the crosstalk between the two opamp sharing successive stages. Moreover, a two-stage gain boosted recycling folded cascode (RFC) amplifier with hybrid frequency compensation is developed to further reduce the power consumption and maintain the ADC's performance simultaneously. The measured results imply that the ADC achieves a spurious-free dynamic range (SFDR) of 75.7 dB and a signal-to-noise-plus-distortion ratio (SNDR) of 62.74 dB with a 4.3 MHz input signal; the SNDR maintains over 58.25 dB for input signals up to 19.3MHz. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.43 to +0.48 LSB and -1.62 to +1.89 LSB respectively. The prototype ADC consumes 28.4 mW under a 1.2-V nominal power supply and 40 MHz sampling rate, transferring to a figure-of-merit (FOM) of 0.63 pJ per conversion-step.

  6. Programmable Analog-To-Digital Converter

    NASA Technical Reports Server (NTRS)

    Kist, Edward H., Jr.

    1993-01-01

    High-speed analog-to-digital converter with programmable voltage steps that can be changed during operation. Allows concentration of converter resolution over specific portion of waveform. Particularly useful in digitizing wind-shear radar and lidar return signals, in digital oscilloscopes, and other applications in which desirable to increase digital resolution over specific area of waveform while accepting lower resolution over rest of waveform. Effective increase in dynamic range achieved without increase in number of analog-to-digital converter bits. Enabling faster analog-to-digital conversion.

  7. A quadratic analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Harrison, D. C.; Staples, M. H.

    1980-01-01

    An analog-to-digital converter with a square root transfer function has been developed for use with a pair of CCD imaging detectors in the White Light Coronagraph/X-ray XUV Telescope experiment to be flown as part of the Internal Solar Polar Mission. It is shown that in background-noise-limited instrumentation systems a quadratic analog-to-digital converter will allow a maximum dynamic range with a fixed number of data bits. Low power dissipation, moderately fast conversion time, and reliability are achieved in the proposed design using standard components and avoiding nonlinear elements.

  8. Optical analog-to-digital converter

    DOEpatents

    Vawter, G. Allen; Raring, James; Skogen, Erik J.

    2009-07-21

    An optical analog-to-digital converter (ADC) is disclosed which converts an input optical analog signal to an output optical digital signal at a sampling rate defined by a sampling optical signal. Each bit of the digital representation is separately determined using an optical waveguide interferometer and an optical thresholding element. The interferometer uses the optical analog signal and the sampling optical signal to generate a sinusoidally-varying output signal using cross-phase-modulation (XPM) or a photocurrent generated from the optical analog signal. The sinusoidally-varying output signal is then digitized by the thresholding element, which includes a saturable absorber or at least one semiconductor optical amplifier, to form the optical digital signal which can be output either in parallel or serially.

  9. Serial Pixel Analog-to-Digital Converter

    SciTech Connect

    Larson, E D

    2010-02-01

    This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator. The resulting encoded pixel data is then decoded into a standard hexadecimal format before storage. The high-speed serial pixel ADC concept is based on the single-slope integrating pixel ADC architecture. Previous work has described a massively parallel pixel readout of a similar architecture. The serial ADC connection is similar to the state-of-the art method with the exception that the pixel ADC register is a shift register and the data path is a single bit. A state-of-the-art individual-pixel ADC uses a single-slope charge integration converter architecture with integral registers and “one-hot” counters. This implies that parallel data bits are routed among the counter and the individual on-chip pixel ADC registers. The data path bit-width to the pixel is therefore equivalent to the pixel ADC bit resolution.

  10. Resonant Tunneling Analog-To-Digital Converter

    NASA Technical Reports Server (NTRS)

    Broekaert, T. P. E.; Seabaugh, A. C.; Hellums, J.; Taddiken, A.; Tang, H.; Teng, J.; vanderWagt, J. P. A.

    1995-01-01

    As sampling rates continue to increase, current analog-to-digital converter (ADC) device technologies will soon reach a practical resolution limit. This limit will most profoundly effect satellite and military systems used, for example, for electronic countermeasures, electronic and signal intelligence, and phased array radar. New device and circuit concepts will be essential for continued progress. We describe a novel, folded architecture ADC which could enable a technological discontinuity in ADC performance. The converter technology is based on the integration of multiple resonant tunneling diodes (RTD) and hetero-junction transistors on an indium phosphide substrate. The RTD consists of a layered semiconductor hetero-structure AlAs/InGaAs/AlAs(2/4/2 nm) clad on either side by heavily doped InGaAs contact layers. Compact quantizers based around the RTD offer a reduction in the number of components and a reduction in the input capacitance Because the component count and capacitance scale with the number of bits N, rather than by 2 (exp n) as in the flash ADC, speed can be significantly increased, A 4-bit 2-GSps quantizer circuit is under development to evaluate the performance potential. Circuit designs for ADC conversion with a resolution of 6-bits at 25GSps may be enabled by the resonant tunneling approach.

  11. Photonic analog-to-digital converters

    NASA Astrophysics Data System (ADS)

    Valley, George C.

    2007-03-01

    This paper reviews over 30 years of work on photonic analog-to-digital converters. The review is limited to systems in which the input is a radio-frequency (RF) signal in the electronic domain and the output is a digital version of that signal also in the electronic domain, and thus the review excludes photonic systems directed towards digitizing images or optical communication signals. The state of the art in electronic ADCs, basic properties of ADCs and properties of analog optical links, which are found in many photonic ADCs, are reviewed as background information for understanding photonic ADCs. Then four classes of photonic ADCs are reviewed: 1) photonic assisted ADC in which a photonic device is added to an electronic ADC to improve performance, 2) photonic sampling and electronic quantizing ADC, 3) electronic sampling and photonic quantizing ADC, and 4) photonic sampling and quantizing ADC. It is noted, however, that all 4 classes of “photonic ADC” require some electronic sampling and quantization. After reviewing all known photonic ADCs in the four classes, the review concludes with a discussion of the potential for photonic ADCs in the future.

  12. Optical analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Evanchuk, Vincent L. (Inventor)

    1984-01-01

    A method and apparatus for converting the intensity of an unknown optical signal (B) into an electrical signal in digital form utilizes two elongated optical attenuators (11, 13), one for the unknown optical signal from a source (10) and one for a known optical signal (A) from a variable source (12), a plurality of photodetectors (e.g., 17, 18) along each attenuator for detecting the intensity of the optical signals, and a plurality of comparators (e.g., 21) connected to the photodetectors in pairs to determine at what points being compared the attenuated known signal equals the attenuated unknown signal. The intensity of the unknown relative to the known is thus determined by the output of a particular comparator. That output is automatically encoded to a relative intensity value in digital form through a balancing feedback control (24) and encoder (23). The digital value may be converted to analog form in a D-to-A converter (27) and used to vary the source of the known signal so that the attenuated intensity of the known signal at a predetermined point (comparator 16) equals the attenuated intensity of the unknown signal at the predetermined point of comparison. If the known signal is then equal to the unknown, there is verification of the analog-to-digital conversion being complete. Otherwise the output of the comparator indicating equality at some other point along the attenuators will provide an output which is encoded and added, through an accumulator comprised of a register (25) and an adder (26), to a previous relative intensity value thereby to further vary the intensity of the known signal source. The steps are repeated until full conversion is verified.

  13. Small, low power analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Dunn, R. D.; Fullerton, D. H.

    1968-01-01

    A small, low-power, high-speed, 8-bit analog-to-digital converter using silicon chip integrated circuits is suitable for use in airborne test data systems. The successive approximation method of analog-to-digital conversion is used to generate the digital output.

  14. Highly linear, sensitive analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Cox, J.; Finley, W. R.

    1969-01-01

    Analog-to-digital converter converts 10 volt full scale input signal into 13 bit digital output. Advantages include high sensitivity, linearity, low quantitizing error, high resistance to mechanical shock and vibration loads, and temporary data storage capabilities.

  15. ANALOG-TO-DIGITAL DATA CONVERTER

    DOEpatents

    Rodgers, G.W.; Althouse, J.E.; Anderson, D.P.; Bussey, G.R.; Minnear, L.H.

    1960-09-01

    Electrical apparatus is described, particularly useful in telemetry work, for converting analog signals into electrical pulses and recording them. An electronic editor commands the taking of signal readings at a frequency which varies according to linearity of the analog signal being converted. Readings of information signals are recorded, along with time base readings and serial numbering, if desired, on magnetic tape and the latter may be used to operate a computer or the like. Magnetic tape data may be transferred to punched cards.

  16. Three-channel integrating analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Stevens, G. L.

    1978-01-01

    A three-channel integrating analog-to-digital converter was added to the complex mixer system to accept the baseband, complex signals generated by the complex mixers and output binary data to the digital demodulator for further processing and recording. The converter was first used for processing multistation data in radar experiments in the spring of 1977.

  17. New technologies for radiation-hardening analog to digital converters

    NASA Technical Reports Server (NTRS)

    Gauthier, M. K.

    1982-01-01

    Surveys of available Analog to Digital Converters (ADC) suitable for precision applications showed that none have the proper combination of accuracy and radiation hardness to meet space and/or strategic weapon requirements. A development program which will result in an ADC device which will serve a number of space and strategic applications. Emphasis was placed on approaches that could be integrated onto a single chip within three to five years.

  18. Latchup in CMOS analog-to-digital converters

    NASA Technical Reports Server (NTRS)

    Miyahira, T.; Johnston, A.

    2001-01-01

    Heavy-ion latchup is investigated for analog-to-digital converters. Differences in cross section for various ions shows that charge is collected at depths beyond 50 um, causing the cross section to be underestimated unless long-range ions are used. Current distributions and thermal imaging were used to identify latchup-sensitive regions. Latchup in one of the circuittypes was catastrophic, even when the power was turned off within 10 ms of a latchup event.

  19. Error Models of the Analog to Digital Converters

    NASA Astrophysics Data System (ADS)

    Michaeli, Linus; Šaliga, Ján

    2014-04-01

    Error models of the Analog to Digital Converters describe metrological properties of the signal conversion from analog to digital domain in a concise form using few dominant error parameters. Knowledge of the error models allows the end user to provide fast testing in the crucial points of the full input signal range and to use identified error models for post correction in the digital domain. The imperfections of the internal ADC structure determine the error characteristics represented by the nonlinearities as a function of the output code. Progress in the microelectronics and missing information about circuital details together with the lack of knowledge about interfering effects caused by ADC installation prefers another modeling approach based on the input-output behavioral characterization by the input-output error box. Internal links in the ADC structure cause that the input-output error function could be described in a concise form by suitable function. Modeled functional parameters allow determining the integral error parameters of ADC. Paper is a survey of error models starting from the structural models for the most common architectures and their linkage with the behavioral models represented by the simple look up table or the functional description of nonlinear errors for the output codes.

  20. Optimizing analog-to-digital converters for sampling extracellular potentials.

    PubMed

    Artan, N Sertac; Xu, Xiaoxiang; Shi, Wei; Chao, H Jonathan

    2012-01-01

    In neural implants, an analog-to-digital converter (ADC) provides the delicate interface between the analog signals generated by neurological processes and the digital signal processor that is tasked to interpret these signals for instance for epileptic seizure detection or limb control. In this paper, we propose a low-power ADC architecture for neural implants that process extracellular potentials. The proposed architecture uses the spike detector that is readily available on most of these implants in a closed-loop with an ADC. The spike detector determines whether the current input signal is part of a spike or it is part of noise to adaptively determine the instantaneous sampling rate of the ADC. The proposed architecture can reduce the power consumption of a traditional ADC by 62% when sampling extracellular potentials without any significant impact on spike detection accuracy.

  1. Serial pixel analog-to-digital converter (ADC)

    NASA Astrophysics Data System (ADS)

    Larson, Eric D.

    2010-02-01

    This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator. The resulting encoded pixel data is then decoded into a standard hexadecimal format before storage. The high-speed serial pixel ADC concept is based on the single-slope integrating pixel ADC architecture. Previous work has described a massively parallel pixel readout of a similar architecture. The serial ADC connection is similar to the state-of-the art method with the exception that the pixel ADC register is a shift register and the data path is a single bit. A state-of-the-art individual-pixel ADC uses a single-slope charge integration converter architecture with integral registers and "one-hot" counters. This implies that parallel data bits are routed among the counter and the individual on-chip pixel ADC registers. The data path bit-width to the pixel is therefore equivalent to the pixel ADC bit resolution.

  2. Photonic analog-to-digital converter via asynchronous oversampling

    NASA Astrophysics Data System (ADS)

    Carver, Spencer; Reeves, Erin; Siahmakoun, Azad; Granieri, Sergio

    2012-06-01

    This paper presents a hybrid opto-electronic asynchronous delta-sigma modulator, implemented in the form of a fiber-optic Analog-to-Digital converter (ADC). This architecture was chosen for its independence of an external clock and ease of demodulation through a single low-pass filter stage. The fiber-optic prototype consists of an input laser (wavelength λ1) which is modulated with an input RF signal, a high-speed comparator circuit working as bi-stable quantizer, and a fiber-optic loop that includes a SOA and a band-pass filter that act as a leaky integrator. The fiber-optic loop acts as a fiber-ring resonator (FRR), and defines the resonance wavelength λ2 of the system. The gain within this loop is modified through cross-gain modulation (XGM) by the input wavelength λ1, and thus achieves the desired modulation effect. The proposed architecture has been constructed and characterized at a sampling rate of 15.4 MS/s processing input analog signals in the range of dc-3 MHz with a signal-to-noise ratio of 36 dB and an effective number of bits of 5.7.

  3. High fidelity, radiation tolerant analog-to-digital converters

    NASA Technical Reports Server (NTRS)

    Wang, Charles Chang-I (Inventor); Linscott, Ivan Richard (Inventor); Inan, Umran S. (Inventor)

    2012-01-01

    Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-.mu.m CMOS technology (1 .mu.m=12.sup.-6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).

  4. Automatic Synthesis of CMOS Algorithmic Analog To-Digital Converter.

    NASA Astrophysics Data System (ADS)

    Jusuf, Gani

    The steady decrease in technological feature size is allowing increasing levels of integration in analog/digital interface functions. These functions consist of analog as well as digital circuits. While the turn around time for an all digital IC chip is very short due to the maturity of digital IC computer-aided design (CAD) tools over the last ten years, most analog circuits have to be designed manually due to the lack of analog IC CAD tools. As a result, analog circuit design becomes the bottleneck in the design of mixed signal processing chips. One common analog function in a mixed signal processing chip is an analog-to-digital conversion (ADC) function. This function recurs frequently but with varying performance requirements. The objective of this research is to study the design methodology of a compilation program capable of synthesizing ADC's with a broad range of sampling rates and resolution, and silicon area and performance comparable with the manual approach. The automatic compilation of the ADC function is a difficult problem mainly because ADC techniques span such a wide spectrum of performance, with radically different implementations being optimum for different ranges of conversion range, resolution, and power dissipation. We will show that a proper choice of the ADC architectures and the incorporation of many analog circuit design techniques will simplify the synthesis procedure tremendously. Moreover, in order to speed up the device sizing, hierarchical optimization procedure and behavioral simulation are implemented into the ADC module generation steps. As a result of this study, a new improved algorithmic ADC without the need of high precision comparators has been developed. This type of ADC lends itself to automatic generation due to its modularity, simplicity, small area consumption, moderate speed, low power dissipation, and single parameter trim capability that can be added at high resolution. Furthermore, a performance-driven CMOS ADC module

  5. [Principles of design of neural-network analog-to-digital converters of bioelectric signals].

    PubMed

    Loktiukhin, V N; Chelebaev, S V

    2007-01-01

    A design principle and a procedure for synthesis of neural-network analog-to-digital converters of bioelectric signals are suggested. An example of implementation of an FPGA-based neural-network converter for classification of bioparameters is presented.

  6. Photonic analog-to-digital converter using soliton self-frequency shift and interleaving spectral filters.

    PubMed

    Xu, Chris; Liu, Xiang

    2003-06-15

    We propose a novel ultrafast photonic analog-to-digital converter that uses the soliton self-frequency shift in an optical fiber as an optical power-to-frequency conversion mechanism and a set of interleaving spectral filters as the optical comparators. Our method does all the signal processing in the optical domain and requires binary receivers in only the electronic domain. In contrast to the usual exponential scaling, the simultaneous binary search architecture that we propose results in a flash analog-to-digital converter with remarkable linear scaling between the number of comparators and the number of bits resolved.

  7. Charge integration successive approximation analog-to-digital converter for focal plane applications using a single amplifier

    NASA Technical Reports Server (NTRS)

    Zhou, Zhimin (Inventor); Pain, Bedabrata (Inventor)

    1999-01-01

    An analog-to-digital converter for on-chip focal-plane image sensor applications. The analog-to-digital converter utilizes a single charge integrating amplifier in a charge balancing architecture to implement successive approximation analog-to-digital conversion. This design requires minimal chip area and has high speed and low power dissipation for operation in the 2-10 bit range. The invention is particularly well suited to CMOS on-chip applications requiring many analog-to-digital converters, such as column-parallel focal-plane architectures.

  8. A high-speed Analog-to-Digital converter using Josephson Self-Gating-AND comparators

    NASA Astrophysics Data System (ADS)

    Petersen, D. A.; Ho, H.; Jewett, R. E.; Nakajima, K.; Nandakumar, V.; Spargo, J. W.; van Duzer, T.

    1985-03-01

    A Josephson Analog-to-Digital (A/D) converter which employs Self-Gating-AND (SGA) circuits as comparators has been designed and experimentally investigated. A functional description of the SGA is presented and the design of a four-bit A/D converter is described. High-speed measurements demonstrate four-bit quantization of 280 MHz sinusiodal inputs, and three-bit quantization of 499 MHz inputs at a 1.0 GHz conversion rate.

  9. Effects of Analog-to-Digital Converter Nonlinearities on Radar Range-Doppler Maps

    SciTech Connect

    Doerry, Armin Walter; Dubbert, Dale F.; Tise, Bertice L.

    2014-07-01

    Radar operation, particularly Ground Moving Target Indicator (GMTI) radar modes, are very sensitive to anomalous effects of system nonlinearities. These throw off harmonic spurs that are sometimes detected as false alarms. One significant source of nonlinear behavior is the Analog to Digital Converter (ADC). One measure of its undesired nonlinearity is its Integral Nonlinearity (INL) specification. We examine in this report the relationship of INL to GMTI performance.

  10. A Low-Cost BIST Based on Histogram Testing for Analog to Digital Converters

    NASA Astrophysics Data System (ADS)

    Kim, Kicheol; Kim, Youbean; Kim, Incheol; Son, Hyeonuk; Kang, Sungho

    In this letter a histogram-based BIST (Built-In Self-Test) approach for deriving the main characteristic parameters of an ADC (Analog to Digital Converter) such as offset, gain and non-linearities is proposed. The BIST uses a ramp signal as an input signal and two counters as a response analyzer to calculate the derived static parameters. Experimental results show that the proposed method reduces the hardware overhead and testing time while detecting any static faults in an ADC.

  11. Radiation-hard analog-to-digital converters for space and strategic applications

    NASA Technical Reports Server (NTRS)

    Gauthier, M. K.; Dantas, A. R. V.

    1985-01-01

    During the course of the Jet Propulsion Laboratory's program to study radiation-hardened analog-to-digital converters (ADCs), numerous milestones have been reached in manufacturers' awareness and technology development and transfer, as well as in user awareness of these developments. The testing of ADCs has also continued with twenty different ADCs from seven manufacturers, all tested for total radiation dose and three tested for neutron effects. Results from these tests are reported.

  12. Low-Power Radio-Frequency SiGe Analog-to-Digital Converter

    NASA Technical Reports Server (NTRS)

    Thompson, Willie L, II; Hall, Wesley G.; Piepmeier, Jeffrey R.; Johnson-Bey, Charles T.

    2003-01-01

    A low-power, radio-frequency analog-to-digital converter (RF-ADC) for soil moisture remote sensing was designed and fabricated. The RF-ADC is the fundamental component used in a direct-sampling digital radiometer, which is proposed to minimize the power dissipation and system complexity for synthetic thinned array radiometer. The circuit was implemented using 0.8 micron 35-GHz silicon germanium BiCMOS technology. The total power dissipation was 222 mW.

  13. A photonic analog-to-digital converter based on an unbalanced Mach-Zehnder quantizer.

    PubMed

    Sarantos, Chris H; Dagli, Nadir

    2010-07-05

    A Mach-Zehnder modulator (MZM) based analog to digital converter (ADC) is described. The signal to be digitized is applied to a single electrode of a high speed unbalanced modulator that acts as a quantizer. The rest of the system consists of commercially available wavelength division multiplexing (WDM) components. Analysis indicates that 6 bit operation at 40 Giga Samples per second (GS/s) is possible with moderate optical carrier power.

  14. Multichannel analog front-end and analog-to-digital converter ICs for silicon photomultipliers

    NASA Astrophysics Data System (ADS)

    Bocharov, Y. I.; Butuzov, V. A.

    2016-10-01

    Integrated circuit (IC) of multichannel analog front-end and a mixed-signal chip of multichannel analog-to-digital converter are presented. A chipset of these two ICs is intended for readout, analog preprocessing and analog to digital conversion of silicon photomultiplier array signals. The number of channels of the analog front-end IC as well as the types of their input stages depends on the application. The current test version of the chip contains three current-input channels and three voltage-input channels. Each of the channels includes a programmable pre-amplifier, integrator with baseline-holder, code-controlled amplifier, amplitude discriminator, two programmable timers, pulse-shaping low-pass filter, peak detector, and an output buffer with baseline tuning circuitry. The analog IC has code-configurable architecture. The mixed-signal IC includes nine main channels and one auxiliary channel, containing 10-bit analog-to-digital converter in each channel. It also has a buffer memory and a voltage reference. The chip features low power consumption, which is less than 0.5 mW per channel at a sampling rate of 100 kHz. Both ICs are implemented in 0.35 μm CMOS technology.

  15. Predictive analog-to-digital converter for Fourier-transform spectrometers.

    PubMed

    Deschênes, Jean-Daniel; Potvin, Simon; Ash, Jean-Simon; Genest, Jérôme

    2010-09-10

    This paper proposes the use of predictive analog-to-digital converters (ADC) to handle dynamic range issues in Fourier-transform spectrometers. Several predictive approaches are proposed, and one is implemented experimentally to show that the technique works. A system was implemented with 16 bit (13 bits effective) ADCs and digital-to-analog converters (DACs) operated at 8 bits to provide a comparison basis. Measurements of a blackbody at 900 °C performed using the setup show a 13 bit effective performance, limited by the input noise of the data acquisition card.

  16. Inflight characterization and correction of Planck/HFI analog to digital converter nonlinearity

    NASA Astrophysics Data System (ADS)

    Sauvé, A.; Couchot, F.; Patanchon, G.; Montier, L.

    2016-07-01

    The Planck Satellite launched in 2009 was targeted to observe the anisotropies of the Cosmic Microwave Back-ground (CMB) to an unprecedented sensitivity. While the Analog to Digital Converter of the HFI (High Frequency Instrument) readout electronics had not been properly characterized on ground, it has been shown to add a systematic nonlinearity effect up to 2% of the cosmological signal. This was a limiting factor for CMB science at large angular scale. We will present the in-flight analysis and method used to characterize and correct this effect down to 0.05% level. We also discuss how to avoid this kind of complex issue for future missions.

  17. Analog-To-Digital Converter For Sum-Of-Squares Measurements

    NASA Technical Reports Server (NTRS)

    Osborn, Stephen H.; Davies, Bryan L.; Sullender, Craig C.

    1993-01-01

    Analog-to-digital converter (ADC) circuit designed as part of larger circuit intended to measure root-mean-square current on 20-kHz powerline. Provides digital output of 11 bits of data plus 1-bit overflow signal at sampling rate of 4 MHz. Output processed by multiplying-and-accumulating circuitry to obtain sum of squares and digitized current samples accumulated during preset number of consecutive sampling periods. Used to digitize current samples from ADC directly as alternative or auxiliary output. Notable features include low power and fast conversion.

  18. Resolution-enhanced all-optical analog-to-digital converter employing cascade optical quantization operation.

    PubMed

    Kang, Zhe; Zhang, Xianting; Yuan, Jinhui; Sang, Xinzhu; Wu, Qiang; Farrell, Gerald; Yu, Chongxiu

    2014-09-08

    In this paper, a cascade optical quantization scheme is proposed to realize all-optical analog-to-digital converter with efficiently enhanced quantization resolution and achievable high analog bandwidth of larger than 20 GHz. Employing the cascade structure of an unbalanced Mach-zehnder modulator and a specially designed optical directional coupler, we predict the enhancement of number-of-bits can be up to 1.59-bit. Simulation results show that a 25 GHz RF signal is efficiently digitalized with the signal-to-noise ratio of 33.58 dB and effective-number-of-bits of 5.28-bit.

  19. Optical folding-flash analog-to-digital converter with analog encoding.

    PubMed

    Jalali, B; Xie, Y M

    1995-09-15

    We describe an optically assisted folding-flash analog-to-digital converter. The periodic transfer function of the Mach-Zehnder interferometer is used to perform analog folding on the electronic signal to be quantized. A novel analog encoding scheme for efficient generation of gray code digital data is proposed. The new encoding scheme eliminates the requirement for interferometers with ultralow V(pi), which, so far, has hindered the development of such systems. The encoding concept is experimentally demonstrated through the use of LiNbO(3) modulators.

  20. Compendium of Single-Event Latchup and Total Ionizing Dose Test Results of Commercial Analog to Digital Converters

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Agarwal, Shri G.

    2012-01-01

    This paper reports single-event latchup and total dose results for a variety of analog to digital converters targeted for possible use in NASA spacecraft's. The compendium covers devices tested over the last 15 years.

  1. Multi-gigahertz performance of a superconducting analog-to-digital converter

    SciTech Connect

    Luong, H.C.; Van Duzer, T.

    1994-12-31

    This paper presents the progress the authors have made on their design, fabrication, and testing of a fully parallel superconducting analog-to-digital converter (ADC) with multi-gigahertz clock frequencies and input bandwidth. To their best knowledge, this converter is the first flash-type analog-to-digital converter ever reported in Josephson technology that fully integrates a quantizer and a thermometer-to-binary encoder to achieve binary outputs. In this design, the quantizer consists of 2{sup N}-1 comparators, each of which is realized using a hysteretic one-junction sampling SQUID driving a two-junction readout SQUID. A new logic family has been designed based on the same comparator building block and has been used to implement the thermometer-to-binary encoder. Taking advantage of the fact that the encoder`s input is thermometer-coded, They have designed three-input and four-input quasi-XOR gates with only three NAND gates and therefore reduced significantly the total gate count. Functionalities of all the sub-circuits have been verified experimentally at clock frequencies up to 3 GHz, which is limited by their currently available testing equipment.

  2. Two bit optical analog-to-digital converter based on photonic crystals.

    PubMed

    Miao, Binglin; Chen, Caihua; Sharkway, Ahmed; Shi, Shouyuan; Prather, Dennis W

    2006-08-21

    In this paper, we demonstrate a 2-bit optical analog-to-digital (A/D) converter. This converter consists of three cascaded splitters constructed in a self-guiding photonic crystal through the perturbation of the uniform lattice. The A/D conversion is achieved by adjusting splitting ratios of the splitters through changing the degree of perturbation. In this way, output ports reach a state of '1' at different input power levels to generate unique states desired for an A/D converter. To validate this design concept, we first experimentally characterize the relation between the splitting ratio and the degree of lattice perturbation. Based on this understanding, we then fabricate the 2-bit A/D converter and successfully observe four unique states corresponding to different power levels of input analog signal.

  3. Active-Pixel Image Sensor With Analog-To-Digital Converters

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.; Mendis, Sunetra K.; Pain, Bedabrata; Nixon, Robert H.

    1995-01-01

    Proposed single-chip integrated-circuit image sensor contains 128 x 128 array of active pixel sensors at 50-micrometer pitch. Output terminals of all pixels in each given column connected to analog-to-digital (A/D) converter located at bottom of column. Pixels scanned in semiparallel fashion, one row at time; during time allocated to scanning row, outputs of all active pixel sensors in row fed to respective A/D converters. Design of chip based on complementary metal oxide semiconductor (CMOS) technology, and individual circuit elements fabricated according to 2-micrometer CMOS design rules. Active pixel sensors designed to operate at video rate of 30 frames/second, even at low light levels. A/D scheme based on first-order Sigma-Delta modulation.

  4. SEM analysis of ionizing radiation effects in an analog to digital converter /AD571/

    NASA Technical Reports Server (NTRS)

    Gauthier, M. K.; Perret, J.; Evans, K. C.

    1981-01-01

    The considered investigation is concerned with the study of the total-dose degradation mechanisms in an IIL analog to digital (A/D) converter. The A/D converter is a 10 digit device having nine separate functional units on the chip which encompass several hundred transistors and circuit elements. It was the objective of the described research to find the radiation sensitive elements by a systematic search of the devices on the LSI chip. The employed technique using a scanning electron microscope to determine the functional blocks of an integrated circuit which are sensitive to ionizing radiation and then progressively zeroing in on the soft components within those blocks, proved extremely successful on the AD571. Four functional blocks were found to be sensitive to radiation, including the Voltage Reference, DAC, IIL Clock, and IIL SAR.

  5. Analog to digital converter for two-dimensional radiant energy array computers

    NASA Technical Reports Server (NTRS)

    Shaefer, D. H.; Strong, J. P., III (Inventor)

    1977-01-01

    The analog to digital converter stage derives a bit array of digital radiant energy signals representative of the amplitudes of an input radiant energy analog signal array and derives an output radiant energy analog signal array to serve as an input to succeeding stages. The converter stage includes a digital radiant energy array device which contains radiant energy array positions so that the analog array is less than a predetermined threshold level. A scaling device amplifies the radiant signal levels of the input array and the digital array so that the radiant energy signal level carried by the digital array corresponds to the threshold level. An adder device adds the signals of the scaled input and digital arrays at corresponding array positions to form the output analog array.

  6. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  7. High precision (14 bit), high density (octal) analog to digital converter for spectroscopy applications

    NASA Astrophysics Data System (ADS)

    Subramaniam, E. T.; Jain, Mamta; Bhowmik, R. K.; Tripon, Michel

    2008-10-01

    Nuclear and particle physics experiments with large number of detectors require signal processing and data collection strategies that call for the ability to collect large amount of data while not sacrificing the precision and accuracy of the data being collected. This paper deals with the development of a high precision pulse peak detection, analog to digital converter (ADC) module with eight independent channels in plug-in daughter card motherboard model, best suited for spectroscopy experiments. This module provides multiple channels without cross-talk and of 14 bit resolution, while maintaining high density (each daughter card has an area of just 4.2″×0.51″) and exhibiting excellent integral nonlinearity (≤±2 mV or ±0.02% full scale reading) and differential nonlinearity (≤±1%). It was designed, developed and tested, in house, and gives added advantages of cost effectiveness and ease of maintenance.

  8. Time-warp correction and calibration in photonic time-stretch analog-to-digital converter.

    PubMed

    Gupta, Shalabh; Jalali, Bahram

    2008-11-15

    We show how time warps caused by nonuniform wavelength-to-time mapping in the photonic time-stretch analog-to-digital converter (ADC) can be digitally measured and removed. This is combined with digital correction of wavelength-dependent Mach-Zehnder modulator (MZM) bias offset to attain a 10 GHz bandwidth digitizer with >7 effective bits of resolution and 52 dB spur-free dynamic range. To the best of our knowledge, this is the highest resolution ADC in 10 GHz bandwidth range, with at least 1 order of magnitude higher signal-to-noise ratio than ever achieved. We also demonstrate concatenation of 30 wavelength interleaved time segments with high fidelity on the path to achieving continuous time operation.

  9. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2000-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  10. Dynamic demonstration of diffractive optic analog-to-digital converter scheme.

    PubMed

    Galt, Sheila; Magnusson, Anders; Hård, Sverker

    2003-01-10

    Dynamic behavior of an analog-to-digital converter (ADC) based on diffractive optical element(s) (DOE)(s) was studied and found to be in agreement with predictions. The analog signal was translated to an angular deflection of a laser beam by means of an acousto-optic (AO) cell. The number of bits in this experimental demonstration was three, using an eight-element DOE array. The maximum sample rate was found to be 2.5 MS/s, the limiting factor being the transit time for the acoustic wave across the width of the laser beam in the AO cell. The study is intended as a first dynamic demonstration of a proposed ADC scheme previously demonstrated in a quasi-static version. The full potential of the ADC scheme will require the use of a fast tunable diode laser to replace the AO deflection scheme used here.

  11. A cryogenic analog to digital converter operating from 300 K down to 4.4 K.

    PubMed

    Okcan, Burak; Merken, Patrick; Gielen, Georges; Van Hoof, Chris

    2010-02-01

    This paper presents a cryogenic successive approximation register (SAR) based analog to digital converter (ADC) implemented in a standard 0.35 microm complementary metal oxide semiconductor (CMOS) process. It operates from room temperature down to 4.4 K, achieving 10.47 effective number of bits (ENOB) at room temperature. At 4.4 K, the ADC achieves 8.53 ENOB at 50 kS/s sampling rate with a current consumption of 90 microA from a 3.3 V supply. The ADC utilizes an improved comparator architecture, which performs offset cancellation by using preamplifiers designed for cryogenic operation. The conventional offset cancellation algorithm is also modified in order to eliminate the effect of cryogenic anomalies below freeze-out temperature. The power efficiency is significantly improved compared to the state of the art semiconductor ADCs operating in the same temperature range.

  12. High precision (14 bit), high density (octal) analog to digital converter for spectroscopy applications.

    PubMed

    Subramaniam, E T; Jain, Mamta; Bhowmik, R K; Tripon, Michel

    2008-10-01

    Nuclear and particle physics experiments with large number of detectors require signal processing and data collection strategies that call for the ability to collect large amount of data while not sacrificing the precision and accuracy of the data being collected. This paper deals with the development of a high precision pulse peak detection, analog to digital converter (ADC) module with eight independent channels in plug-in daughter card motherboard model, best suited for spectroscopy experiments. This module provides multiple channels without cross-talk and of 14 bit resolution, while maintaining high density (each daughter card has an area of just 4.2(")x0.51(")) and exhibiting excellent integral nonlinearity (< or = +/-2 mV or +/-0.02% full scale reading) and differential nonlinearity (< or = +/-1%). It was designed, developed and tested, in house, and gives added advantages of cost effectiveness and ease of maintenance.

  13. Designed cell consortia as fragrance-programmable analog-to-digital converters.

    PubMed

    Müller, Marius; Ausländer, Simon; Spinnler, Andrea; Ausländer, David; Sikorski, Julian; Folcher, Marc; Fussenegger, Martin

    2017-03-01

    Synthetic biology advances the rational engineering of mammalian cells to achieve cell-based therapy goals. Synthetic gene networks have nearly reached the complexity of digital electronic circuits and enable single cells to perform programmable arithmetic calculations or to provide dynamic remote control of transgenes through electromagnetic waves. We designed a synthetic multilayered gaseous-fragrance-programmable analog-to-digital converter (ADC) allowing for remote control of digital gene expression with 2-bit AND-, OR- and NOR-gate logic in synchronized cell consortia. The ADC consists of multiple sampling-and-quantization modules sensing analog gaseous fragrance inputs; a gas-to-liquid transducer converting fragrance intensity into diffusible cell-to-cell signaling compounds; a digitization unit with a genetic amplifier circuit to improve the signal-to-noise ratio; and recombinase-based digital expression switches enabling 2-bit processing of logic gates. Synthetic ADCs that can remotely control cellular activities with digital precision may enable the development of novel biosensors and may provide bioelectronic interfaces synchronizing analog metabolic pathways with digital electronics.

  14. Cryogenic analog-to-digital converters using spread spectrum technology for coherent receivers

    NASA Astrophysics Data System (ADS)

    Shiao, Yu-Shao Jerry; Chiueh, Tzihong; Hu, Robert

    2012-09-01

    We propose analog-to-digital converters (ADCs) using spread spectrum technology in cryogenic receivers or at warm room temperature for coherent receiver backend systems. As receiver signals are processed and stored digitally, ADCs play a critical role in backend read-out systems. To minimize signal distortion, the down-converted signals should be digitized without further transportation. However, digitizing the signals in or near receivers may cause radio frequency interference. We suggest that spread spectrum technology can reduce the interference significantly. Moreover, cryogenic ADCs at regulated temperature in receiver dewars may also increase the bandwidth usage and simplify the backend digital signal process with fewer temperature-dependant components. While industrial semiconductor technology continuously reduces transistor power consumption, low power high speed cryogenic ADCs may become a better solution for coherent receivers. To examine the performance of cooled ADCs, first, we design 4 bit 65 nm and 40 nm CMOS ADCs specifically at 10 K temperature, which commonly is the second stage temperature in dewars. While the development of 65 nm and 40 nm CMOS ADCs are still on-going, we estimate the ENOB is 2.4 at 10 GSPS, corresponding to the correlation efficiency, 0.87. The power consumption is less than 20 mW.

  15. Robust symmetrical number system preprocessing for minimizing encoding errors in photonic analog-to-digital converters

    NASA Astrophysics Data System (ADS)

    Arvizo, Mylene R.; Calusdian, James; Hollinger, Kenneth B.; Pace, Phillip E.

    2011-08-01

    A photonic analog-to-digital converter (ADC) preprocessing architecture based on the robust symmetrical number system (RSNS) is presented. The RSNS preprocessing architecture is a modular scheme in which a modulus number of comparators are used at the output of each Mach-Zehnder modulator channel. The number of comparators with a logic 1 in each channel represents the integer values within each RSNS modulus sequence. When considered together, the integers within each sequence change one at a time at the next code position, resulting in an integer Gray code property. The RSNS ADC has the feature that the maximum nonlinearity is less than a least significant bit (LSB). Although the observed dynamic range (greatest length of combined sequences that contain no ambiguities) of the RSNS ADC is less than the optimum symmetrical number system ADC, the integer Gray code properties make it attractive for error control. A prototype is presented to demonstrate the feasibility of the concept and to show the important RSNS property that the largest nonlinearity is always less than a LSB. Also discussed are practical considerations related to multi-gigahertz implementations.

  16. LDRD final report: photonic analog-to-digital converter (ADC) technology

    SciTech Connect

    Bowers, M; Deri, B; Haigh, R; Lowry, M; Sargis, P; Stafford, R; Tong, T

    1999-02-18

    We report on an LDRD seed program of novel technology development (started by an FY98 Engineering Tech-base project) that will enable extremely high-fidelity analog-to-digital converters for a variety of national security missions. High speed (l0+ GS/s ), high precision (l0+ bits) ADC technology requires extremely short aperture times ({approx}1ps ) with very low jitter requirements (sub 10fs ). These fundamental requirements, along with other technological barriers, are difficult to realize with electronics: However, we outline here, a way to achieve these timing apertures using a novel multi-wavelength optoelectronic short-pulse optical source. Our approach uses an optoelectronic feedback scheme with high optical Q to produce an optical pulse train with ultra-low jitter ( sub 5fs) and high amplitude stability (<10{sup 10}). This approach requires low power and can be integrated into an optoelectronic integrated circuit to minimize the size. Under this seed program we have demonstrated that the optical feedback mechanism can be used to generate a high Q resonator. This has reduced the technical risk for further development, making it an attractive candidate for outside funding.

  17. High Speed High Resolution Current Comparator and its Application to Analog to Digital Converter

    NASA Astrophysics Data System (ADS)

    Sridhar, Ranjana; Pandey, Neeta; Bhattacharyya, Asok; Bhatia, Veepsa

    2016-06-01

    This paper introduces a high speed high resolution current comparator which includes the current differencing stage and employs non linear feedback in the gain stage. The usefulness of the proposed comparator is demonstrated by implementing a 3-bit current mode flash analog-to-digital converter (ADC). Simulation program with integrated circuit emphasis (SPICE) simulations have been carried out to verify theoretical proposition and performance parameters of both comparator and ADC are obtained using TSMC 0.18 µm CMOS technology parameters. The current comparator shows a resolution of ±5 nA and a delay of 0.86 ns for current difference of ±1 µA. The impact of process variation on proposed comparator propagation delay has been studied through Monte Carlo simulation and it is found that percentage change in propagation delay in best case is 1.3 % only and in worst case is 9 % only. The ADC exhibits an offset, gain error, differential nonlinearity (DNL) and integral nonlinearity (INL) of 0.102 µA, 0.99, -0.34 LSB and 0.0267 LSB, respectively. The impact of process variation on ADC has also been studied at different process corners.

  18. Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat

    SciTech Connect

    Turqueti, Marcos; Prestemon, Soren; Albright, Robert

    2015-07-15

    LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal–oxide–semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signals captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.

  19. Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat

    DOE PAGES

    Turqueti, Marcos; Prestemon, Soren; Albright, Robert

    2015-07-15

    LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal–oxide–semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signalsmore » captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.« less

  20. High-Performance Photonic Analog-to-Digital Converter and Low-Noise Mode-Locked Fiber Lasers

    DTIC Science & Technology

    2007-11-02

    resolution of the modulator. Advances in electro-optic modulator technology allow low electrical losses, halfwave voltages approaching a few volts, DARPA...unlimited. Naval Research Laboratory Washington, DC 20375-5320 May 26, 2003 Photonics Technology Branch Optical Sciences Division NRL/MR/5650--03-8679 i...James Murphy Analog-to-digital converter; Optical clocks; Mode-locked fiber laser Final report Defense Advanced Research Projects Agency 3701 North

  1. Photonic preprocessor for analog-to-digital-converter using a cavity-less pulse source.

    PubMed

    Wiberg, Andreas O J; Liu, Lan; Tong, Zhi; Myslivets, Evgeny; Ataie, Vahid; Kuo, Bill P-P; Alic, Nikola; Radic, Stojan

    2012-12-10

    A photonic preprocessor for analog to digital conversion is demonstrated and characterized using a cavity-less optical pulse source. The pulse source generates high fidelity pulses at 2 GHz repetition rate with temporal width of 3 ps. Chirped pulses are formed by cascaded amplitude and phase modulators, and subsequently compressed in dispersion compensating fiber. Sampling operation is performed with a dual-output Mach-Zehnder modulator, where the complimentary output enables a reduction of noise by 3 dB. Phase noise characterization shows that the phase noise of the generated pulses is fully dictated by the RF source. The high quality of the pulse source used in a sampling preprocessor experiment was verified by measuring 8 effective number of bits at 10 GHz and 7.0 effective number of bits at 40 GHz.

  2. Digital broadband linearization technique and its application to photonic time-stretch analog-to-digital converter.

    PubMed

    Fard, Ali; Gupta, Shalabh; Jalali, Bahram

    2011-04-01

    Suppression of distortion induced by nonlinearity in a dynamical system (such as an analog optical link) is very challenging, particularly for a wide-bandwidth signal. Conventional compensation techniques are computationally intensive, significantly limiting their realization in real-time applications. Here, we propose and demonstrate an efficient digital postprocessing technique to suppress distortions added to a wideband signal by a nonlinear system with memory effect. Experimentally, digital broadband linearization of the photonic time-stretch analog-to-digital converter (TSADC) is demonstrated. In case of TSADC, a dynamic range improvement of >15 dB compared to conventional memory-less correction method is achieved.

  3. Analysis of the resolution-bandwidth-noise trade-off in wavelength-based photonic analog-to-digital converters.

    PubMed

    Stigwall, Johan; Galt, Sheila

    2006-06-20

    The performance of wavelength-based photonic analog-to-digital converters (ADCs) is theoretically analyzed in terms of resolution and bandwidth as well as of noise tolerance. The analysis applies to any photonic ADC in which the analog input signal is converted into the wavelength of an optical carrier, but special emphasis is put on the spectrometerlike setup in which the wavelength is mapped to a spatial spot position. The binary output signals are then retrieved by an array of fan-out diffractive optical elements that redirect the beam onto the correct detectors. In particular, the case when the input signal controls the wavelength directly such that it will chirp in frequency during each sampling pulse or interval is studied. This chirping obviously broadens the spot on the diffractive optical element array; the effect of this broadening on noise tolerance and comparator accuracy is analytically analyzed, and accurate numerical calculations of the probability of error are presented.

  4. Modeling and Experimental Demonstration of a Hopfield Network Analog-to-Digital Converter with Hybrid CMOS/Memristor Circuits

    PubMed Central

    Guo, Xinjie; Merrikh-Bayat, Farnood; Gao, Ligang; Hoskins, Brian D.; Alibart, Fabien; Linares-Barranco, Bernabe; Theogarajan, Luke; Teuscher, Christof; Strukov, Dmitri B.

    2015-01-01

    The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC) with up to 8 bits of precision. Major shortcomings affecting the ADC's precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2−x/Pt memristors and CMOS integrated circuit components. PMID:26732664

  5. A photonic analog-to-digital converter using phase modulation and self-coherent detection with spatial oversampling.

    PubMed

    Golani, Ori; Mauri, Luca; Pasinato, Fabiano; Cattaneo, Cristian; Consonnni, Guido; Balsamo, Stefano; Marom, Dan M

    2014-05-19

    We propose a new type of photonic analog-to-digital converter (ADC), designed for high-resolution (>7 bit) and high sampling rates (scalable to tens of GS/s). It is based on encoding the input analog voltage signal onto the phase of an optical pulse stream originating from a mode-locked laser, and uses spatial oversampling as a means to improve the conversion resolution. This paper describes the concept of spatial oversampling and draws its similarities to the commonly used temporal oversampling. The design and fabrication of a LiNbO(3)/silica hybrid photonic integrated circuit for implementing the spatial oversampling is shown, and its abilities are demonstrated experimentally by digitizing gigahertz signals (frequencies up to 18GHz) at an undersampled rate of 2.56GS/s with a conversion resolution of up to 7.6 effective bits. Oversampling factors of 1-4 are demonstrated.

  6. Identification and correction of analog-to-digital-converter nonlinearities and their implications for differential absorption lidar measurements.

    PubMed

    Langford, A O

    1995-12-20

    Differential absorption lidar (DIAL) is a powerful remote-sensing technique widely used to probe the spatial and temporal distribution of ozone and other gaseous atmospheric trace constituents. Although conceptually simple, the DIAL technique presents many challenging and often subtle technical difficulties that can limit its useful range and accuracy. One potentially serious source of error for many DIAL experiments is nonlinearity in the analog-to-digital converters used to capture lidar return signals. The impact of digitizer nonlinearity on DIAL measurements is examined, and a simple and inexpensive low-frequency dithering technique that significantly reduces the effects of ADC nonlinearity in DIAL and other applications in which the signal is repetitively averaged is described.

  7. Modeling and Experimental Demonstration of a Hopfield Network Analog-to-Digital Converter with Hybrid CMOS/Memristor Circuits.

    PubMed

    Guo, Xinjie; Merrikh-Bayat, Farnood; Gao, Ligang; Hoskins, Brian D; Alibart, Fabien; Linares-Barranco, Bernabe; Theogarajan, Luke; Teuscher, Christof; Strukov, Dmitri B

    2015-01-01

    The purpose of this work was to demonstrate the feasibility of building recurrent artificial neural networks with hybrid complementary metal oxide semiconductor (CMOS)/memristor circuits. To do so, we modeled a Hopfield network implementing an analog-to-digital converter (ADC) with up to 8 bits of precision. Major shortcomings affecting the ADC's precision, such as the non-ideal behavior of CMOS circuitry and the specific limitations of memristors, were investigated and an effective solution was proposed, capitalizing on the in-field programmability of memristors. The theoretical work was validated experimentally by demonstrating the successful operation of a 4-bit ADC circuit implemented with discrete Pt/TiO2- x /Pt memristors and CMOS integrated circuit components.

  8. An adaptive multiple-input multiple-output analog-to-digital converter for high density neuroprosthetic electrode arrays.

    PubMed

    Chakrabartty, Shantanu; Gore, Amit; Oweiss, Karim G

    2006-01-01

    On chip signal compression is one of the key technologies driving development of energy efficient biotelemetry devices. In this paper, we describe a novel architecture for analog-to-digital (A/D) conversion that combines sigma delta conversion with the spatial data compression in a single module. The architecture called multiple-input multiple-output (MIMO) sigma-delta is based on a min-max gradient descent optimization of a regularized cost function that naturally leads to an A/D formulation. Experimental results with simulated and recorded multichannel data demonstrate the effectiveness of the proposed architecture to eliminate cross-channel redundancy in high density microelectrode data, thus superceding the performance of parallel independent data converters in terms of its energy efficiency.

  9. Total Ionizing Dose Effects on High Resolution (12-/14-bit) Analog-to-Digital Converters

    NASA Technical Reports Server (NTRS)

    Lee, C. I.; Rax, B. G.; Johnson, A. H.

    1994-01-01

    This paper reports total dose radiation test results for high resolution 12-/14-bit A/D converters. Small changes in internal components can cause these devices to fail their specifications at relatively low total dose levels. Degradation of signal-to-noise ratio becomes increasingly importamt for high accuracy converters. Rebound effects in the thick-oxide MOS devices causes these responses to be different at low and high dose rates, which is a major concern for space applications.

  10. Experimental implementation of analog-to-digital converter based on the reversible ripple counter

    SciTech Connect

    Filippenko, L.V.; Kaplunenko, V.K.; Khabipov, M.I.; Vystavkin, A.N. ); Koshelets, V.P.; Likharev, K.K.; Mukhanov, O.A.; Rylov, S.V.; Semenov, V.K. )

    1991-03-01

    This paper reports on A/D converter which includes a comparator, reversible binary counter with DC outputs designed, fabricated and tested. The comparator generates two trains of the SFQ pulses in response to increasing or decreasing of the input signal. The pulses are transferred through SFQ transmission lines to the adding and diminishing inputs of a reversible counter. The reversible counter has been realized by supplementing to the usual counter the SFQ transmission lines, splitters, and confluence elements for sending diminish pulses directly to each bit. Non-destructive read-out of the counter contents is carried out by SFQ/DC converters connected to each counter bit.

  11. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor.

    PubMed

    Chakir, Mostafa; Akhamal, Hicham; Qjidaa, Hassan

    2017-01-01

    The CMOS Monolithic Active Pixel Sensor (MAPS) for the International Linear Collider (ILC) vertex detector (VXD) expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC). This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18 μm CMOS process with a pixel pitch of 35 μm. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76 μm(2). The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/-0.0787 LSB and 0.0811/-0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz.

  12. Multichannel analog-to-digital converters based on current mirrors for the optical systems

    NASA Astrophysics Data System (ADS)

    Krasilenko, Vladimir G.; Nikolskyy, A. I.; Nikolska, M. A.; Lobodzinska, R. F.

    2011-12-01

    The paper considers results of designing and modeling analogue-digital converters (ADC) based on current mirrors for the optical systems and neural networks with parallel inputs-outputs. Such ADC, named us multichannel analog-todigital converters based on current mirrors (M ADC CM). Compared with usual converters, for example, reading, a bitby- bit equilibration, and so forth, have a number of advantages: high speed and reliability, simplicity, small power consumption, the big degree of integration in linear and matrix structures. The considered aspects of designing of M_ADC CM in binary codes. Base digit cells (ABC) of such M_ADC CM, series-pipelined are connected in structures, consist from 20-30 CMOS the transistors, one photodiode, have low (1,5-3,5) supply voltage, work in current modes with the maximum values of currents (10-40)μA. Therefore such new principles of realization high-speed low-discharge M_ADC CM have allowed, as have shown modeling experiments, to reach time of transformation less than 20-30 nS at 5-6 bits of a binary code and the general power 1-5 mW. The quantity easily cascadable ABC depends on wordlength ADC, and makes n, and provides quantity of levels of quantization equal N=2n. Such simple enough on structure M ADC CM, having low power consumption <= 3 ÷ 5mW, supply voltage (3-7)V, is provided at the same time with good dynamic characteristics (frequency of digitization even for 1,5μm or 0,35 μm- CMOS-technologies has made 40 MHz, and can be increased 10 times) and accuracy (Δquantization 156,25nA for I max10μA) characteristics is show. The range can be transformed optical signals, taking into account sensitivity of modern photodetectors makes 20-200 μW in such ADC. M_ADC CM open new prospects for realization linear and matrix (with picture operands) micro photoelectronic structures which are necessary for neural networks, digital optoelectronic processors, neurofuzzy controllers, and so forth.

  13. High-accuracy fourier transform interferometry, without oversampling, with a 1-bit analog-to-digital converter.

    PubMed

    Daria, V R; Saloma, C

    2000-01-01

    We demonstrate a new technique for performing accurate Fourier transform interferometry with a 1-bit analog-to-digital (AD) converter that does not require oversampling of the interferogram, unlike in other 1-bit coding schemes that rely on delta-sigma modulation. Sampling aims at locating the intersections {z(i)} of the modulation term s(z) of the interferogram and a reference sinusoid r(z) = A cos(2pif(r)z), where z is the optical path difference. A new autocorrelation-based procedure that includes the accurate recovery of the equally sampled amplitude representation {s(k)} of s(z) from {z(i)} is utilized to calculate the square of the emission spectrum of the light source (sample). The procedure is suitable for interferograms that are corrupted with additive noise. Sinusoid-crossing sampling satisfies the Nyquist sampling criterion, and a z(i) exists within each sampling interval Delta = 1/2f(r), if A >or= |s(z)| for all z, and f(r) >or= f(c), where f(c) is the highest frequency component of s(z). By locating a crossing at an accuracy of 1 part in 2(16), we determine the multimode spectrum of an argon-ion laser with a 1-bit AD converter that performs like a 13-bit amplitude-sampling AD converter.

  14. Specifications of analog-to-digital converter for uncooled infrared readout circuits

    NASA Astrophysics Data System (ADS)

    Robert, Patrick; Durand, Alain; Gravot, Vincent; Pochic, David; Tissot, Jean-Luc

    2011-10-01

    This paper presents how to specify an ADC to digitalize the analog video of the uncooled infrared readout circuit. In a first part the main features will be discussed to select the right resolution, SNR, THD and ENOB of the converter. In a second part the characteristics more specifically sensitive for an ADC integrated in the readout circuit will be presented: architecture, power consumption, electrical dynamic range, crosstalk issues. Indeed, the increasing demand for integrated functions in uncooled readout circuits leads to on-chip ADC design as interface between the internal analog core and the digital processing electronic. In addition this IP could be seen as an inescapable link to integrate also NUC, BPR or all other processing functions on-chip. However specifying an on-chip ADC dedicated to focal plane array raises many questions about its architecture and its performance requirements. We show two architectural approaches are needed to cover the different sensor features in term of array size and frame speed. Finally we will conclude with a trade-off between external or internal approach taking into account the application of the camera, the cost and the ADC state of art.

  15. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor

    PubMed Central

    Qjidaa, Hassan

    2017-01-01

    The CMOS Monolithic Active Pixel Sensor (MAPS) for the International Linear Collider (ILC) vertex detector (VXD) expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC). This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18 μm CMOS process with a pixel pitch of 35 μm. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76 μm2. The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/−0.0787 LSB and 0.0811/−0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz. PMID:28243628

  16. Analog-to-digital converters nonlinear errors correction in thermal diagnostics for the laser interferometer space antenna mission

    NASA Astrophysics Data System (ADS)

    Sanjuán, J.; Lobo, A.; Ramos-Castro, J.

    2009-11-01

    Low-noise temperature measurements at frequencies in the millihertz range are required in the laser interferometer space antenna (LISA) and LISA PathFinder missions. The required temperature stability for LISA is around 10 μK Hz-1/2 at frequencies down to 0.1 mHz. In this paper we focus on the identification and reduction in a source of excess noise detected when measuring time-varying temperature signals. This is shown to be due to nonidealities in the analog-to-digital converter (ADC) transfer curve, and degrades the measurement by about one order of magnitude in the measurement bandwidth when the measured temperature drifts by a few ~μK s-1. In a suitable measuring system for the LISA mission, this noise needs to be reduced. Two different methods based on the same technique have been implemented, both consisting in the addition of dither signals out of band to mitigate the ADC nonideality errors. Excess noise of this nature has been satisfactorily reduced by using these methods when measuring temperature ramps up to 10 μK s-1.

  17. The initial characterization of a revised 10-Gsps analog-to-digital converter board for radio telescopes

    NASA Astrophysics Data System (ADS)

    Jiango, Homin; Liuo, Howard; Guzzino, Kim

    2016-07-01

    In this study, the design of a 4 bit, 10-gigasamples-per-second analog-to-digital converter (ADC) printed circuit board assembly (PCBA) was revised, manufactured, and tested. It is used for digitizing radio telescopes. An Adsantec ANST7120-KMA flash ADC chip was used, as in the original design. Associated with the field-programmable gate array platform developed by the Collaboration for Astronomy Signal Processing and Electronics Research community, the developed PCBA provides data acquisition systems with a wider bandwidth and simplifies the intermediate frequency section. The current version of the PCBA exhibits an analog bandwidth of up to 10 GHz (3 dB loss), and the chip exhibits an analog bandwidth of up to 18 GHz. This facilitates second and third Nyquist sampling. The following worstcase performance parameters were obtained from the revised PCBA at over 5 GHz: spurious-free dynamic range of 12 dB, signal-to-noise and distortion ratio of 2 dB, and effective number of bits of 0.7. The design bugs in the ADC chip caused the poor performance. The vendor created a new batch run and confirmed that the ADC chips of the new batch will meet the specifications addressed in its data sheet.

  18. Analog-to-digital converters nonlinear errors correction in thermal diagnostics for the laser interferometer space antenna mission.

    PubMed

    Sanjuán, J; Lobo, A; Ramos-Castro, J

    2009-11-01

    Low-noise temperature measurements at frequencies in the millihertz range are required in the laser interferometer space antenna (LISA) and LISA PathFinder missions. The required temperature stability for LISA is around 10 microK Hz(-1/2) at frequencies down to 0.1 mHz. In this paper we focus on the identification and reduction in a source of excess noise detected when measuring time-varying temperature signals. This is shown to be due to nonidealities in the analog-to-digital converter (ADC) transfer curve, and degrades the measurement by about one order of magnitude in the measurement bandwidth when the measured temperature drifts by a few approximately microK s(-1). In a suitable measuring system for the LISA mission, this noise needs to be reduced. Two different methods based on the same technique have been implemented, both consisting in the addition of dither signals out of band to mitigate the ADC nonideality errors. Excess noise of this nature has been satisfactorily reduced by using these methods when measuring temperature ramps up to 10 microK s(-1).

  19. Compensation of multi-channel mismatches in high-speed high-resolution photonic analog-to-digital converter.

    PubMed

    Yang, Guang; Zou, Weiwen; Yu, Lei; Wu, Kan; Chen, Jianping

    2016-10-17

    We demonstrate a method to compensate multi-channel mismatches that intrinsically exist in a photonic analog-to-digital converter (ADC) system. This system, nominated time-wavelength interleaved photonic ADC (TWI-PADC), is time-interleaved via wavelength demultiplexing/multiplexing before photonic sampling, wavelength demultiplexing channelization, and electronic quantization. Mismatches among multiple channels are estimated in frequency domain and hardware adjustment are used to approach the device-limited accuracy. A multi-channel mismatch compensation algorithm, inspired from the time-interleaved electronic ADC, is developed to effectively improve the performance of TWI-PADC. In the experiment, we configure out a 4-channel TWI-PADC system with 40 GS/s sampling rate based on a 10-GHz actively mode-locked fiber laser. After multi-channel mismatch compensation, the effective number of bit (ENOB) of the 40-GS/s TWI-PADC system is enhanced from ~6 bits to >8.5 bits when the RF frequency is within 0.1-3.1 GHz and from ~6 bits to >7.5 bits within 3.1-12.1 GHz. The enhanced performance of the TWI-PADC system approaches the limitation determined by the timing jitter and noise.

  20. Mixed Linear/Square-Root Encoded Single Slope Ramp Provides a Fast, Low Noise Analog to Digital Converter with Very High Linearity for Focal Plane Arrays

    NASA Technical Reports Server (NTRS)

    Wrigley, Christopher James (Inventor); Hancock, Bruce R. (Inventor); Newton, Kenneth W. (Inventor); Cunningham, Thomas J. (Inventor)

    2014-01-01

    An analog-to-digital converter (ADC) converts pixel voltages from a CMOS image into a digital output. A voltage ramp generator generates a voltage ramp that has a linear first portion and a non-linear second portion. A digital output generator generates a digital output based on the voltage ramp, the pixel voltages, and comparator output from an array of comparators that compare the voltage ramp to the pixel voltages. A return lookup table linearizes the digital output values.

  1. Microprocessor Control of a Fast Analog-to-Digital Converter for an Underwater Fiber Optic Data Link

    DTIC Science & Technology

    1988-03-01

    in the next chapter presents the reasoning for multiplexing the N input channels between the analog-to-digital (A/D) conversion and encoding functions...elopment for a number of reasons . The added flexibilit,’ diLCUssed in the previou section was the most compelling advantage. Being A first design effort...The 80C86 manufactured by Harris Semi conductor was chosen for a multitude of reasons , but foremost was that it was a CMOS device and readil

  2. A 400-MS/s 12-bit current-steering D/A converter

    NASA Astrophysics Data System (ADS)

    Shaopeng, Wang; Yannan, Ren; Fule, Li; Zhihua, Wang

    2012-08-01

    This paper presents a 400-MS/s 12-bit CMOS current-steering digital-to-analog converter (DAC). The proposed DAC adapts 6+2+4 segmented architecture and a modified switching scheme to improve dynamic and static performance. The measured spurious-free dynamic range is up to 77.18 dB at 400 MS/s with a 10 MHz input signal. The full-scale output current is 20 mA with a 1.8 V single power supply. The core area occupies 0.6 mm2 in a standard 1P-6M 0.18-μm CMOS process.

  3. PIC microcontroller based external fast analog to digital converter to acquire wide-lined solid NMR spectra by BRUKER DRX and Avance-I spectrometers.

    PubMed

    Koczor, Bálint; Rohonczy, János

    2015-01-01

    Concerning many former liquid or hybrid liquid/solid NMR consoles, the built in Analog-to-Digital Converters (ADCs) are incapable of digitizing the fids at sampling rates in the MHz range. Regarding both strong anisotropic interactions in the solid state and wide chemical shift dispersion nuclei in solution phase such as (195)Pt, (119)Sn, (207)Pb etc., the spectrum range of interest might be in the MHz range. As determining the informative tensor components of anisotropic NMR interactions requires nonlinear fitting over the whole spectrum including the asymptotic baseline, it is prohibited by low sampling rates of the ADCs. Wide spectrum width is also useful in solution NMR, since windowing of wide chemical shift ranges is avoidable. We built an external analog to digital converter with 10 MHz maximal sampling rate, which can work simultaneously with the built in ADC of the spectrometer. The ADC was tested on both Bruker DRX and Avance-I NMR consoles. In addition to the analog channels it only requires three external digital lines of the NMR console. The ADC sends data to PC via USB. The whole process is controlled by software written in JAVA which is implemented under TopSpin.

  4. A low-power inverter-based CMOS level-crossing analog-to-digital converter for low-frequency biosignal sensing

    NASA Astrophysics Data System (ADS)

    Tanaka, Suiki; Niitsu, Kiichi; Nakazato, Kazuo

    2016-03-01

    Low-power analog-to-digital conversion is a key technique for power-limited biomedical applications such as power-limited continuous glucose monitoring. However, a conventional uniform-sampling analog-to-digital converter (ADC) is not suitable for nonuniform biosignals. A level-crossing ADC (LC-ADC) is a promising candidate for low-power biosignal processing because of its event-driven properties. The LC-ADC acquires data by level-crossing sampling. When an input signal crosses the threshold level, the LC-ADC samples the signal. The conventional LC-ADC employs a power-hungry comparator. In this paper, we present a low-power inverter-based LC-ADC. By adjusting the threshold level of the inverter, it can be used as a threshold-fixed window comparator. By using the inverter as an alternative to a comparator, power consumption can be markedly reduced. As a result, the total power consumption is successfully reduced by 90% of that of previous LC-ADC. The inverter-based LC-ADC was found to be very suitable for use in power-limited biomedical devices.

  5. Estimation of channel mismatches in time-interleaved analog-to-digital converters based on fractional delay and sine curve fitting.

    PubMed

    Guo, Lianping; Tian, Shulin; Jiang, Jun

    2015-03-01

    This paper proposes an algorithm to estimate the channel mismatches in time-interleaved analog-to-digital converter (TIADC) based on fractional delay (FD) and sine curve fitting. Choose one channel as the reference channel and apply FD to the output samples of reference channel to obtain the ideal samples of non-reference channels with no mismatches. Based on least square method, the sine curves are adopted to fit the ideal and the actual samples of non-reference channels, and then the mismatch parameters can be estimated by comparing the ideal sine curves and the actual ones. The principle of this algorithm is simple and easily understood. Moreover, its implementation needs no extra circuits, lowering the hardware cost. Simulation results show that the estimation accuracy of this algorithm can be controlled within 2%. Finally, the practicability of this algorithm is verified by the measurement results of channel mismatch errors of a two-channel TIADC prototype.

  6. Ultra-fast analog-to-digital converter based on a nonlinear triplexer and an optical coder with a photonic crystal structure.

    PubMed

    Mehdizadeh, Farhad; Soroosh, Mohammad; Alipour-Banaei, Hamed; Farshidi, Ebrahim

    2017-03-01

    In this paper, we propose what we believe is a novel all-optical analog-to-digital converter (ADC) based on photonic crystals. The proposed structure is composed of a nonlinear triplexer and an optical coder. The nonlinear triplexer is for creating discrete levels in the continuous optical input signal, and the optical coder is for generating a 2-bit standard binary code out of the discrete levels coming from the nonlinear triplexer. Controlling the resonant mode of the resonant rings through optical intensity is the main objective and working mechanism of the proposed structure. The maximum delay time obtained for the proposed structure was about 5 ps and the total footprint is about 1520  μm2.

  7. Low Temperature Testing of a Radiation Hardened CMOS 8-Bit Flash Analog-to-Digital (A/D) Converter

    NASA Technical Reports Server (NTRS)

    Gerber, Scott S.; Hammond, Ahmad; Elbuluk, Malik E.; Patterson, Richard L.; Overton, Eric; Ghaffarian, Reza; Ramesham, Rajeshuni; Agarwal, Shri G.

    2001-01-01

    Power processing electronic systems, data acquiring probes, and signal conditioning circuits are required to operate reliably under harsh environments in many of NASA:s missions. The environment of the space mission as well as the operational requirements of some of the electronic systems, such as infrared-based satellite or telescopic observation stations where cryogenics are involved, dictate the utilization of electronics that can operate efficiently and reliably at low temperatures. In this work, radiation-hard CMOS 8-bit flash A/D converters were characterized in terms of voltage conversion and offset in the temperature range of +25 to -190 C. Static and dynamic supply currents, ladder resistance, and gain and offset errors were also obtained in the temperature range of +125 to -190 C. The effect of thermal cycling on these properties for a total of ten cycles between +80 and - 150 C was also determined. The experimental procedure along with the data obtained are reported and discussed in this paper.

  8. Superconducting Analog to Digital Converters

    DTIC Science & Technology

    1991-09-01

    superconductivity, Josephson junctions, and superconducting quantum interference devices ( SQUIDs ) are briefly described. Various techniques to perform analog-to...deployment in the 1990s may require a dynamic range in excess of 90 dB (15- bit precision) [3]. However, at the present time, A/D conversion with 16-bit...Interference Devices ( SQUIDs ). JOSEPHSON EFFECTS AND JUNCTIONS Consider a very thin, non-superconducting region separating two superconductors. In 1962

  9. Analog-to-Digital Converter

    DTIC Science & Technology

    1987-07-22

    in this design. Large area capacitors have been designed to extract the various transistor and interconnect capacitances. Kelvin sheet resistance structures...34 process will address methods for lowering the base sheet resistance and reducing the base width to lower the transit time and 9 SIBE+ ]ODEPOSIT 400A...4. The impact of these base profiles on the transistor gains, base sheet resistance , leakage currents, and breakdown voltages will be evaluated using

  10. Analog-To-Digital Converter

    DTIC Science & Technology

    1988-01-18

    1993 1 October 1987 -31 December 1987 C ARPA Order Number: 9117 Program Code Number: 7220 Name of Contractor: Texas Instruments Incorporated 13500 N... tools were developed. A graphics program was written to automatically generate Cermet resistors, given user inputs of resistor value and desired width. In

  11. Analog-to-Digital Converter

    DTIC Science & Technology

    1991-01-16

    December 1990 ARPA Order Number: 9117 Program Code Number: 7220 Amount of Contract: $3,152,507 Name of Contractor: Texas Instruments Incorporated 13500 N...No. N00014-87-C-0314 to develop GaAs HBT ADCs. At the request of Texas Instruments , Hughes evaluated the applicability of a 1.5-[in gate- length p...schematic (LVS) checking. The LVS tool verifies that the schematic representation of the circuit used for simulation purposes matches the cell layout

  12. A Low-cost 4 Bit, 10 Giga-samples-per-second Analog-to-digital Converter Printed Circuit Board Assembly for FPGA-based Backends

    NASA Astrophysics Data System (ADS)

    Jiang, Homin; Yu, Chen-Yu; Kubo, Derek; Chen, Ming-Tang; Guzzino, Kim

    2016-11-01

    In this study, a 4 bit, 10 giga-samples-per-second analog-to-digital converter (ADC) printed circuit board assembly (PCBA) was designed, manufactured, and characterized for digitizing radio telescopes. For this purpose, an Adsantec ANST7120A-KMA flash ADC chip was used. Together with the field-programmable gate array platform, developed by the Collaboration for Astronomy Signal Processing and Electronics Research community, the PCBA enables data acquisition with a wide bandwidth and simplifies the intermediate frequency section. In the current version, the PCBA and the chip exhibit an analog bandwidth of 10 GHz (3 dB loss) and 20 GHz, respectively, which facilitates second, third, and even fourth Nyquist sampling. The following average performance parameters were obtained from the first and second Nyquist zones of the three boards: a spurious-free dynamic range of 31.35/30.45 dB, a signal-to-noise and distortion ratio of 22.95/21.83 dB, and an effective number of bits of 3.65/3.43, respectively.

  13. Successive approximation-like 4-bit full-optical analog-to-digital converter based on Kerr-like nonlinear photonic crystal ring resonators

    NASA Astrophysics Data System (ADS)

    Tavousi, Alireza; Mansouri-Birjandi, Mohammad Ali; Saffari, Mehdi

    2016-09-01

    Implementing of photonic sampling and quantizing analog-to-digital converters (ADCs) enable us to extract a single binary word from optical signals without need for extra electronic assisting parts. This would enormously increase the sampling and quantizing time as well as decreasing the consumed power. To this end, based on the concept of successive approximation method, a 4-bit full-optical ADC that operates using the intensity-dependent Kerr-like nonlinearity in a two dimensional photonic crystal (2DPhC) platform is proposed. The Silicon (Si) nanocrystal is chosen because of the suitable nonlinear material characteristic. An optical limiter is used for the clamping and quantization of each successive levels that represent the ADC bits. In the proposal, an energy efficient optical ADC circuit is implemented by controlling the system parameters such as ring-to-waveguide coupling coefficients, the ring's nonlinear refractive index, and the ring's length. The performance of the ADC structure is verified by the simulation using finite difference time domain (FDTD) method.

  14. A 515 nW, 0-18 dB Programmable Gain Analog-to-Digital Converter for In-Channel Neural Recording Interfaces.

    PubMed

    Rodriguez-Perez, Alberto; Delgado-Restituto, Manuel; Medeiro, Fernando

    2014-06-01

    This paper presents a low-area low-power Switched-Capacitor (SC)-based Programmable-Gain Analog-to-Digital Converter (PG-ADC) suitable for in-channel neural recording applications. The PG-ADC uses a novel implementation of the binary search algorithm that is complemented with adaptive biasing techniques for power saving. It has been fabricated in a standard CMOS 130 nm technology and only occupies 0.0326 mm(2). The PG-ADC has been optimized to operate under two different sampling modes, 27 kS/s and 90 kS/s. The former is tailored for raw data conversion of neural activity, whereas the latter is used for the on-the-fly feature extraction of neural spikes. Experimental results show that, under a voltage supply of 1.2 V, the PG-ADC obtains an ENOB of 7.56 bit (8-bit output) for both sampling modes, regardless of the gain setting. The amplification gain can be programmed from 0 to 18 dB. The power consumption of the PG-ADC at 90 kS/s is 1.52 μW with a FoM of 89.49 fJ/conv, whereas at 27 kS/s it consumes 515 nW and obtains a FoM of 98.31 fJ/conv .

  15. Design challenges of EO polymer based leaky waveguide deflector for 40 Gs/s all-optical analog-to-digital converters

    NASA Astrophysics Data System (ADS)

    Hadjloum, Massinissa; El Gibari, Mohammed; Li, Hongwu; Daryoush, Afshin S.

    2016-08-01

    Design challenges and performance optimization of an all-optical analog-to-digital converter (AOADC) is presented here. The paper addresses both microwave and optical design of a leaky waveguide optical deflector using electro-optic (E-O) polymer. The optical deflector converts magnitude variation of the applied RF voltage into variation of deflection angle out of a leaky waveguide optical beam using the linear E-O effect (Pockels effect) as part of the E-O polymer based optical waveguide. This variation of deflection angle as result of the applied RF signal is then quantized using optical windows followed by an array of high-speed photodetectors. We optimized the leakage coefficient of the leaky waveguide and its physical length to achieve the best trade-off between bandwidth and the deflected optical beam resolution, by improving the phase velocity matching between lightwave and microwave on one hand and using pre-emphasis technique to compensate for the RF signal attenuation on the other hand. In addition, for ease of access from both optical and RF perspective, a via-hole less broad bandwidth transition is designed between coplanar pads and coupled microstrip (CPW-CMS) driving electrodes. With the best reported E-O coefficient of 350 pm/V, the designed E-O deflector should allow an AOADC operating over 44 giga-samples-per-seconds with an estimated effective resolution of 6.5 bits on RF signals with Nyquist bandwidth of 22 GHz. The overall DC power consumption of all components used in this AOADC is of order of 4 W and is dominated by power consumption in the power amplifier to generate a 20 V RF voltage in 50 Ohm system. A higher sampling rate can be achieved at similar bits of resolution by interleaving a number of this elementary AOADC at the expense of a higher power consumption.

  16. Noise-Enhanced Measurement of Weak Doublet Spectra with a Fourier-Transform Spectrometer and a 1-Bit Analog-to-Digital Converter.

    PubMed

    Lim, M; Saloma, C

    2001-04-10

    We demonstrate an efficient noise dithering procedure for measuring the power spectrum of a weak spectral doublet with a Fourier-transform spectrometer in which the subthreshold interferogram is measured by a 1-bit analog-to-digital converter without oversampling. In the absence of noise, no information is obtained regarding the doublet spectrum because the modulation term s(x) of its interferogram is below the instrumental detection limit B, i.e., |s(x)| < B, for all path difference x values. Extensive numerical experiments are carried out concerning the recovery of the doublet power spectrum that is represented by s(x) = (s(0)/2)exp(-pi(2)x(2)/beta)[cos(2pif(1)x) + cos(2pif(2)x)], where s(0) is a constant, beta is the linewidth factor, and ?f? = (f(1) + f(2))/2. Different values of ?f?, s(0), and beta are considered to evaluate thoroughly the accuracy of the procedure to determine the unknown values of f(1) and f(2), the spectral linewidth, and the peak values of the spectral profiles. Our experiments show that, even for short observation times, the resonant frequencies of s(x) could be located with high accuracy over a wide range of ?f? and beta values. Signal-to-noise ratios as high as 50 are also gained for the recovered power spectra. The performance of the procedure is also analyzed with respect to another method that recovers the amplitude values of s(x) directly.

  17. A 72 channel 125 MSPS analog-to-digital converter module for drift chamber readout for the GlueX detector

    SciTech Connect

    G. visser, D. Abbot, F. Barbosa, C. Cuevas, H. Dong, E. Jastrzembski, B. Moffitt, B. Raydo

    2011-06-01

    We have developed a very high channel density custom A/D converter module for the drift chamber readout requirements of the Glue-X detector at Jefferson Lab Hall-D. This 6U VME64× module has 72 channels, including a low noise differential line receiver, cable frequency response equalization, and signal shaping with a 5th order filter. The signals are digitized at 125 MSPS with an assembly option for either 12 or 14 bit resolution (GlueX will use 12 bit). The digitized data is written continuously to a circular buffer, with an independent read port and pipelined readout path able to extract potentially overlapping signal records at a 200 kHz trigger rate without deadtime. The extracted data is zero suppressed and may be further processed on-board to reduce the data volume, and is then assembled into event records and event block records. Up to 1 MB of output data is buffered on-board and available for readout via 2eSST at up to 320 MByte/s.

  18. Photonic analog-to-digital converter using Mach-Zehnder modulators having identical half-wave voltages with improved bit resolution.

    PubMed

    Yang, Shuna; Wang, Chao; Chi, Hao; Zhang, Xianmin; Zheng, Shilie; Jin, Xiaofeng; Yao, Jianping

    2009-08-01

    A novel approach to perform photonic analog-to-digital conversion with improved bit resolution is proposed and investigated. Instead of using Mach-Zehnder modulators (MZMs) with geometrically-scaled half-wave voltages, the MZMs in the approach have identical half-wave voltages, which greatly simplifies the implementation. To improve the bit resolution without increasing the number of MZMs, each MZM is connected with multiple comparators having multiple thresholds. The quantization and encoding are performed based on the symmetrical number system (SNS) technique. Three new quantization and encoding schemes based on the SNS are proposed and demonstrated. A 4 bit photonic analog-to-digital conversion based on the given schemes is investigated. For the given schemes, two MZMs are needed with the numbers of comparators being 14, 16, and 9, respectively. Numerical simulations and experiments are performed. The effectiveness of the proposed schemes is verified.

  19. Parallel Analog-to-Digital Image Processor

    NASA Technical Reports Server (NTRS)

    Lokerson, D. C.

    1987-01-01

    Proposed integrated-circuit network of many identical units convert analog outputs of imaging arrays of x-ray or infrared detectors to digital outputs. Converter located near imaging detectors, within cryogenic detector package. Because converter output digital, lends itself well to multiplexing and to postprocessing for correction of gain and offset errors peculiar to each picture element and its sampling and conversion circuits. Analog-to-digital image processor is massively parallel system for processing data from array of photodetectors. System built as compact integrated circuit located near local plane. Buffer amplifier for each picture element has different offset.

  20. A low-cost solution to measure mouse licking in an electrophysiological setup with a standard analog-to-digital converter.

    PubMed

    Hayar, Abdallah; Bryant, Jeri L; Boughter, John D; Heck, Detlef H

    2006-06-15

    Licking behavior in rodents is widely used to determine fluid consumption in various behavioral contexts and is a typical example of rhythmic movement controlled by internal pattern-generating mechanisms. The measurement of licking behavior by commercially available instruments is based on either tongue protrusion interrupting a light beam or on an electrical signal generated by the tongue touching a metal spout. We report here that licking behavior can be measured with high temporal precision by simply connecting a metal sipper tube to the input of a standard analog/digital (A/D) converter and connecting the animal to ground (via a metal cage floor). The signal produced by a single lick consists of a 100-800 mV dc voltage step, which reflects the metal-to-water junction potential and persists for the duration of the tongue-spout contact. This method does not produce any significant electrical artifacts and can be combined with electrophysiological measurements of single unit activity from neurons involved in the control of the licking behavior.

  1. Fast Dual Analog-to-Digital Converter

    NASA Technical Reports Server (NTRS)

    Wallis, D. E.; Green, R. R.

    1985-01-01

    Unit delivers blocks of quadrature data to computer memory. Contains 105 integrated circuit packages in 19 by 3 1/2 inch (48.26 by 8.39 cm) rack mounted drawer with internal force air blower. Intended for synchronous sampling of quadrature pairs of data, samples with minimal skew (about 10 nanoseconds) using video-type high-speed sampling technology. Unit equipped for computer controlled self-testing. Originally developed for planetary radar data-acquisition system.

  2. A standardized way to select, evaluate, and test an analog-to-digital converter for ultrawide bandwidth radiofrequency signals based on user's needs, ideal, published,and actual specifications

    NASA Astrophysics Data System (ADS)

    Chang, Daniel Y.; Rowe, Neil C.

    2012-06-01

    The most important adverse impact on the Electronic Warfare (EW) simulation is that the number of signal sources that can be tested simultaneously is relatively small. When the number of signal sources increases, the analog hardware, complexity and costs grow by the order of N2, since the number of connections among N components is O(N*N) and the signal communication is bi-directional. To solve this problem, digitization of the signal is suggested. In digitizing a radiofrequency signal, an Analog-to-Digital Converter (ADC) is widely used. Most research studies on ADCs are conducted from designer/test engineers' perspective. Some research studies are conducted from market's perspective. This paper presents a generic way to select, evaluate and test ultra high bandwidth COTS ADCs and generate requirements for digitizing continuous time signals from the perspective of user's needs. Based on user's needs, as well as vendor's published, ideal and actual specifications, a decision can be made in selecting a proper ADC for an application. To support our arguments and illustrate the methodology, we evaluate a Tektronix TADC-1000, an 8-bit and 12 gigasamples per second ADC. This project is funded by JEWEL lab, NAWCWD at Point Mugu, CA.

  3. Multimode interference coupler based photonic analog-to-digital conversion scheme.

    PubMed

    Shile, Wei; Jian, Wu; Lingjuan, Zhao; Chen, Yao; Chen, Ji; Dan, Lu; Xilin, Zhang; Zuoshan, Yin

    2012-09-01

    A novel phase-shifted optical quantization scheme for an all-optical analog-to-digital converter, which uses 4×4 multimode interference couplers, is demonstrated and theoretically analyzed. The whole scheme can be integrated on a chip.

  4. An analog-to-digital conversion system with a logarithmic characteristic

    NASA Technical Reports Server (NTRS)

    Bellomo, A.

    1972-01-01

    Detailed analysis of an analog-to-digital conversion system consisting of a linear converter and a logarithmic amplifier containing nonlinear elements. It is shown that the small-signal resolution of such a system is much greater than that of linear systems used under the same conditions. A design for a low-power analog-to-digital converter operating at medium speed with a large input signal variation field is outlined.

  5. Optical domain analog to digital conversion methods and apparatus

    SciTech Connect

    Vawter, Gregory A

    2014-05-13

    Methods and apparatus for optical analog to digital conversion are disclosed. An optical signal is converted by mapping the optical analog signal onto a wavelength modulated optical beam, passing the mapped beam through interferometers to generate analog bit representation signals, and converting the analog bit representation signals into an optical digital signal. A photodiode receives an optical analog signal, a wavelength modulated laser coupled to the photodiode maps the optical analog signal to a wavelength modulated optical beam, interferometers produce an analog bit representation signal from the mapped wavelength modulated optical beam, and sample and threshold circuits corresponding to the interferometers produce a digital bit signal from the analog bit representation signal.

  6. Analog-to-digital conversion techniques for precision photometry

    NASA Technical Reports Server (NTRS)

    Opal, Chet B.

    1988-01-01

    Three types of analog-to-digital converters are described: parallel, successive-approximation, and integrating. The functioning of comparators and sample-and-hold amplifiers is explained. Differential and integral linearity are defined, and good and bad examples are illustrated. The applicability and relative advantages of the three types of converters for precision astronomical photometric measurements are discussed. For most measurements, integral linearity is more important than differential linearity. Successive-approximation converters should be used with multielement solid state detectors because of their high speed, but dual slope integrating converters may be superior for use with single element solid state detectors where speed of digitization is not a factor. In all cases, the input signal should be tailored so that they occupy the upper part of the converter's dynamic range; this can be achieved by providing adjustable gain, or better by varying the integration time of the observation if possible.

  7. A Fast Multiple Sampling Method for Low-Noise CMOS Image Sensors With Column-Parallel 12-bit SAR ADCs.

    PubMed

    Kim, Min-Kyu; Hong, Seong-Kwan; Kwon, Oh-Kyong

    2015-12-26

    This paper presents a fast multiple sampling method for low-noise CMOS image sensor (CIS) applications with column-parallel successive approximation register analog-to-digital converters (SAR ADCs). The 12-bit SAR ADC using the proposed multiple sampling method decreases the A/D conversion time by repeatedly converting a pixel output to 4-bit after the first 12-bit A/D conversion, reducing noise of the CIS by one over the square root of the number of samplings. The area of the 12-bit SAR ADC is reduced by using a 10-bit capacitor digital-to-analog converter (DAC) with four scaled reference voltages. In addition, a simple up/down counter-based digital processing logic is proposed to perform complex calculations for multiple sampling and digital correlated double sampling. To verify the proposed multiple sampling method, a 256 × 128 pixel array CIS with 12-bit SAR ADCs was fabricated using 0.18 μm CMOS process. The measurement results shows that the proposed multiple sampling method reduces each A/D conversion time from 1.2 μs to 0.45 μs and random noise from 848.3 μV to 270.4 μV, achieving a dynamic range of 68.1 dB and an SNR of 39.2 dB.

  8. Method and apparatus for low power analog-to-digital conversion

    DOEpatents

    De Geronimo, Gianluigi; Nambiar, Neena

    2013-10-01

    A method and apparatus for analog-to-digital conversion. An Analog-to-Digital Converter (ADC) includes M ADC.sub.j, j=1, 2, . . . , M. Each ADC.sub.j comprises a number of cells each of which comprises a first switch, a second switch, a current sink and an inverter. An inverter of a cell in an ADC.sub.j changes state in response to a current associate with an input signal of the ADC.sub.j exceeding a threshold, thus switching on the next cell. Each ADC.sub.j is enabled to perform analog-to-digital conversion on a residual current of a previous ADC.sub.j-1 after the previous ADC.sub.j-1 has completed its analog-to-digital conversion and has been disabled.

  9. A 12-bit, 40-Ms/s pipelined ADC with an improved operational amplifier

    NASA Astrophysics Data System (ADS)

    Yu, Wang; Haigang, Yang; Tao, Yin; Fei, Liu

    2012-05-01

    This paper proposes a 12-bit, 40-Ms/s pipelined analog-to-digital converter (ADC) with an improved high-gain and wide-bandwidth operational amplifier (opamp). Based on the architecture of the proposed ADC, the non-ideal factors of opamps are first analyzed, which have the significant impact on the ADC's resolution. Then, the compensation techniques of the ADC's opamp are presented to restrain the negative effect introduced by the gain-boosting technique and switched-capacitor common-mode-feedback structure. After analysis and optimization, the ADC implemented in a 0.35 μm standard CMOS process shows a maximum signal-to-noise distortion ratio of 60.5 dB and a spurious-free dynamic range of 74.5 dB, respectively, at a 40 MHz sample clock with over 2 Vpp input range.

  10. A comparison of two methods of analog-to-digital medical video conversion.

    PubMed

    Berges, G; Davidson, H C; Chapman, B; Cannon, G; Christian, M; Harnsberger, D; Harnsberger, H R

    2000-08-01

    The purpose of this study was to compare 2 methods of analog-to-digital video conversion in anticipation of improving, refining, and standardizing digital video production for medical education, diagnosis support, and telemedicine. A video workstation was devised containing 2 analog-to-digital video conversion systems: a digital video media converter with fire wire card and a video capture card. A procedure for final digital video production was created that used equivalent compression, pixel resolution, frame rate, and data rate for both systems. A subjective test was performed in which 12 archived analog videotapes, consisting of magnetic resonance angiograms, ultrasounds, neurosurgeries, and telemedicine applications, were converted digitally using the 2 methods. Randomized side by side video comparisons were analyzed and rated by subjective quality. An objective test was performed by videotaping a gray-scale test pattern off a computer monitor, digitally converting it by the 2 methods, and comparing the gray-scale values to the original pattern. There was no significant difference in overall video quality (P = .31) or grayscale reproduction using the 2 methods of analog-to-digital conversion. When performing simple analog-to-digital video conversion, a video capture card is equal in quality and costs less than a digital video (DV) media converter or fire wire card. If a digital video camera is available for use, then a DV media converter or fire wire card is more advantageous because it enables full operation of the digital video camera.

  11. High speed analog-to-digital conversion with silicon photonics

    NASA Astrophysics Data System (ADS)

    Holzwarth, C. W.; Amatya, R.; Araghchini, M.; Birge, J.; Byun, H.; Chen, J.; Dahlem, M.; DiLello, N. A.; Gan, F.; Hoyt, J. L.; Ippen, E. P.; Kärtner, F. X.; Khilo, A.; Kim, J.; Kim, M.; Motamedi, A.; Orcutt, J. S.; Park, M.; Perrott, M.; Popovic, M. A.; Ram, R. J.; Smith, H. I.; Zhou, G. R.; Spector, S. J.; Lyszczarz, T. M.; Geis, M. W.; Lennon, D. M.; Yoon, J. U.; Grein, M. E.; Schulein, R. T.; Frolov, S.; Hanjani, A.; Shmulovich, J.

    2009-02-01

    Sampling rates of high-performance electronic analog-to-digital converters (ADC) are fundamentally limited by the timing jitter of the electronic clock. This limit is overcome in photonic ADC's by taking advantage of the ultra-low timing jitter of femtosecond lasers. We have developed designs and strategies for a photonic ADC that is capable of 40 GSa/s at a resolution of 8 bits. This system requires a femtosecond laser with a repetition rate of 2 GHz and timing jitter less than 20 fs. In addition to a femtosecond laser this system calls for the integration of a number of photonic components including: a broadband modulator, optical filter banks, and photodetectors. Using silicon-on-insulator (SOI) as the platform we have fabricated these individual components. The silicon optical modulator is based on a Mach-Zehnder interferometer architecture and achieves a VπL of 2 Vcm. The filter banks comprise 40 second-order microring-resonator filters with a channel spacing of 80 GHz. For the photodetectors we are exploring ion-bombarded silicon waveguide detectors and germanium films epitaxially grown on silicon utilizing a process that minimizes the defect density.

  12. Optical Oversampled Analog-to-Digital Conversion

    DTIC Science & Technology

    1992-06-29

    Introduction 1 1.1 Background and Motivation........................... 2 1.1.1 Nyquist Rate Conversion........................ 3 1.1.2 Optical A/ D ...processor [9] was used with the electronic analog input signal driving an optical beam deflector . This method of optical A/ D conversion was limited...implement an optical oversampled A/ D converter. From the theoretical development in Chapter 2 , there are two principal functions which require optical

  13. Photonic analog-to-digital conversion based on oversampling techniques

    NASA Astrophysics Data System (ADS)

    Shoop, Barry L.; Das, Pankaj K.; Ressler, Eugene K., Jr.; Talty, Timothy J.

    2000-07-01

    A novel photonic approach to analog-to-digital (A/D) conversion based on temporal and spatial oversampling techniques in conjunction with a smart pixel hardware implementation of a neural algorithm is described. In this approach, the input signal is first sampled at a rate higher than that required by the Nyquist criterion and then presented spatially as the input to the 2D error diffusion neural network consisting of M X N pixels. The neural network processes the input oversampled analog image and produces an M X N pixel binary output image which is an optimum representation of the input analog signal. Upon convergence, the neural network minimizes an energy function representing the frequency-weighted squared error between the input analog image and the output halftoned image. Decimation and low-pass filtering techniques, common to oversampling A/D converters, digitally sum and average the M X N pixel output binary image using high-speed digital electronic circuitry. By employing a 2D smart pixel neural approach to oversampling A/D conversion, each pixel constitutes a simple oversampling modulator thereby producing a distributed A/D architecture. Spectral noise shaping across the array diffuses quantization error thereby improving the signal-to-noise ratio performance. Here, each quantizer within the network is embedded in a fully- connected, distributed mesh feedback loop which spectrally shapes the overall quantization noise significantly reducing the effects of component mismatch typically associated with parallel or channelized A/D approaches. The 2D neural array provides higher aggregate bit rates which can extend the useful bandwidth of oversampling converters.

  14. Microwave frequency measurement based on photonic sampling analog-to-digital conversion

    NASA Astrophysics Data System (ADS)

    Ma, Yangxue; Zhang, Zhiyao; Peng, Di; Zou, Jinfang; Liu, Yong

    2016-11-01

    A new microwave photonic approach to microwave frequency measurement with a high resolution and a large bandwidth is proposed. In this method, three photonic sampling analog-to-digital converters (ADCs) with co-prime sampling rates are employed. Three Fourier frequencies acquiring through down-converted analog-to-digital conversion of the unknown microwave signal are utilized to recovery the frequency of the unknown signal. The simulation results show that a microwave frequency measurement system which is feasible for multi-frequency microwave signal achieves a large measurement range of 0-50GHz and an accuracy of+/-1MHz. In addition, the spur-free dynamic range of 101.1dB-Hz2/3@50GHz is also numerically demonstrated.

  15. A 12-bit SAR ADC integrated on a multichannel silicon drift detector readout IC

    NASA Astrophysics Data System (ADS)

    Schembari, F.; Bellotti, G.; Fiorini, C.

    2016-07-01

    A 12-bit analog-to-digital converter (ADC) addressed to Silicon-Drift Detectors (SDDs) multichannel readout ASICs for X- and gamma-ray applications is presented. Aiming at digitizing output multiplexed data from the upstream analog filters banks, the converter must ensure 11-bit accuracy and a sampling frequency of about 5 MS/s. The ADC architecture is the charge-redistribution (CR) successive-approximation register (SAR). A fully differential topology has also been chosen for better rejection of common-mode noise and disturbances. The internal DAC is made of binary-scaled capacitors, whose bottom plates are switched by the SAR logic to perform the binary search of the analog input value by means of the monotonic switching scheme. The A/D converter is integrated on SFERA, a multichannel ASIC fabricated in a standard CMOS 0.35 μm 3.3 V technology and it occupies an area of 0.42 mm2. Simulated static performance shows monotonicity over the whole input-output characteristic. The description of the circuit topology and of inner blocks architectures together with the experimental characterization is here presented.

  16. 500 MHz Analog-to-Digital Converter Development Program

    DTIC Science & Technology

    1972-03-01

    producing binary words that correspond to the quantized values. Inside the Encoder, an analog reference is subdivided forming a dis- crete set of 2 N -I...Sth.comparator or el T ors acosdnr u ane paNIe comparatorbk endiCordfer lores.l incremn QN is moth A/Dunoer cfbnrisonfigrastions. tEac comparator i a key elment

  17. A 12-bit 60-MS/s 36-mW SHA-less opamp-sharing pipeline ADC in 130 nm CMOS

    NASA Astrophysics Data System (ADS)

    Wen, X.; Chen, J.; You, Y.; Feng, Y.; Tang, Y.; Zuo, Z.; Vosooghi, B.; Fan, Q.; Xiao, L.; Gong, D.; Liu, T.; Ye, J.

    2016-01-01

    This paper presents a 12-bit 60-MS/s SHA-less opamp-sharing pipeline analog-to-digital converter (ADC) implemented in a 0.13-μ m CMOS technology. A switch-embedded dual-input current-reused operational transconductance amplifier (OTA) with an overlapping two-phase clocking scheme is proposed to achieve low power consumption and eliminate the non-resetting and memory effects observed in conventional opamp-sharing techniques. To further reduce the power consumption, the ADC also incorporates a SHA-less multi-bit structure. The ADC achieves a signal-to-noise and distortion ratio of 64.9 dB and a spurious-free dynamic range of 77.1 dB at 60 MS/s. It occupies 2.3 mm 2 of area and consumes 36 mW of power under a 1.2-V supply.

  18. Design and simulation of a 12-bit, 40 MSPS asynchronous SAR ADC for the readout of PMT signals

    NASA Astrophysics Data System (ADS)

    Liu, Jian-Feng; Zhao, Lei; Qin, Jia-Jun; Yang, Yun-Fan; Yu, Li; Liang, Yu; Liu, Shu-Bin; An, Qi

    2016-11-01

    High precision and large dynamic range measurement are required in the readout systems for the Water Cherenkov Detector Array (WCDA) in the Large High Altitude Air Shower Observatory (LHAASO). This paper presents a prototype of a 12-bit 40 MSPS Analog-to-Digital Converter (ADC) Application Specific Integrated Circuit (ASIC) designed for the readout of the LHAASO WCDA. Combining this ADC and the front-end ASIC finished in our previous work, high precision charge measurement can be achieved based on the digital peak detection method. This ADC is implemented based on a power-efficient Successive Approximation Register (SAR) architecture, which incorporates key parts such as a Capacitive Digital-to-Analog Converter (CDAC), dynamic comparator and asynchronous SAR control logic. The simulation results indicate that the Effective Number Of Bits (ENOB) with a sampling rate of 40 MSPS is better than 10 bits in an input frequency range below 20 MHz, while its core power consumption is 6.6 mW per channel. The above results are good enough for the readout requirements of the WCDA. Supported by Knowledge Innovation Program of the Chinese Academy of Sciences (KJCX2-YW-N27), CAS Center for Excellence in Particle Physics (CCEPP)

  19. Demonstrations of analog-to-digital conversion using a frequency domain stretched processor.

    PubMed

    Reibel, Randy Ray; Harrington, Calvin; Dahl, Jason; Ostrander, Charles; Roos, Peter Aaron; Berg, Trenton; Mohan, R Krishna; Neifeld, Mark A; Babbitt, Wm R

    2009-07-06

    The first proof-of-concept demonstrations are presented for a broadband photonic-assisted analog-to-digital converter (ADC) based on spatial spectral holography (SSH). The SSH-ADC acts as a frequency-domain stretch processor converting high bandwidth input signals to low bandwidth output signals, allowing the system to take advantage of high performance, low bandwidth electronic ADCs. Demonstrations with 50 MHz effective bandwidth are shown to highlight basic performance with approximately 5 effective bits of vertical resolution. Signal capture with 1600 MHz effective bandwidth is also shown. Because some SSH materials span over 100 GHz and have large time apertures (approximately 10 micros), this technique holds promise as a candidate for the next generation of ADCs.

  20. Analog-to-digital conversion to accommodate the dynamics of live music in hearing instruments.

    PubMed

    Hockley, Neil S; Bahlmann, Frauke; Fulton, Bernadette

    2012-09-01

    Hearing instrument design focuses on the amplification of speech to reduce the negative effects of hearing loss. Many amateur and professional musicians, along with music enthusiasts, also require their hearing instruments to perform well when listening to the frequent, high amplitude peaks of live music. One limitation, in most current digital hearing instruments with 16-bit analog-to-digital (A/D) converters, is that the compressor before the A/D conversion is limited to 95 dB (SPL) or less at the input. This is more than adequate for the dynamic range of speech; however, this does not accommodate the amplitude peaks present in live music. The hearing instrument input compression system can be adjusted to accommodate for the amplitudes present in music that would otherwise be compressed before the A/D converter in the hearing instrument. The methodology behind this technological approach will be presented along with measurements to demonstrate its effectiveness.

  1. Method and apparatus for clockless analog-to-digital conversion and peak detection

    DOEpatents

    DeGeronimo, Gianluigi

    2007-03-06

    An apparatus and method for analog-to-digital conversion and peak detection includes at least one stage, which includes a first switch, second switch, current source or capacitor, and discriminator. The discriminator changes state in response to a current or charge associated with the input signal exceeding a threshold, thereby indicating whether the current or charge associated with the input signal is greater than the threshold. The input signal includes a peak or a charge, and the converter includes a peak or charge detect mode in which a state of the switch is retained in response to a decrease in the current or charge associated with the input signal. The state of the switch represents at least a portion of a value of the peak or of the charge.

  2. A 12-bit 1 MS/s SAR-ADC for multi-channel CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Wei, Liu; Tingcun, Wei; Bo, Li; Panjie, Guo; Yongcai, Hu

    2015-04-01

    This paper presents a low power, area-efficient and radiation-hardened 12-bit 1 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) for multi-channel CdZnTe (CZT) detector applications. In order to improve the SAR-ADC's accuracy, a novel comparator is proposed in which the offset voltage is self-calibrated and also a new architecture for the unit capacitor array is proposed to reduce the capacitance mismatches in the charge-redistribution DAC. The ability to radiation-harden the SAR-ADC is enhanced through circuit and layout design technologies. The prototype chip was fabricated using a TSMC 0.35 μm 2P4M CMOS process. At a 3.3/5 V power supply and a sampling rate of 1 MS/s, the proposed SAR-ADC achieves a peak signal to noise and distortion ratio (SINAD) of 67.64 dB and consumes only 10 mW power. The core of the prototype chip occupies an active area of 1180 × 1080 μm2. Project supported by the Special-Funded Program on National Key Scientific Instruments and Equipment Development (No. 2011YQ040082).

  3. Data reduction complex analog-to-digital data processing requirements for onsite test facilities

    NASA Technical Reports Server (NTRS)

    Debbrecht, J. D.

    1976-01-01

    The analog to digital processing requirements of onsite test facilities are described. The source and medium of all input data to the Data Reduction Complex (DRC) and the destination and medium of all output products of the analog-to-digital processing are identified. Additionally, preliminary input and output data formats are presented along with the planned use of the output products.

  4. Transitioning from Analog to Digital Audio Recording in Childhood Speech Sound Disorders

    ERIC Educational Resources Information Center

    Shriberg, Lawrence D.; Mcsweeny, Jane L.; Anderson, Bruce E.; Campbell, Thomas F.; Chial, Michael R.; Green, Jordan R.; Hauner, Katherina K.; Moore, Christopher A.; Rusiewicz, Heather L.; Wilson, David L.

    2005-01-01

    Few empirical findings or technical guidelines are available on the current transition from analog to digital audio recording in childhood speech sound disorders. Of particular concern in the present context was whether a transition from analog- to digital-based transcription and coding of prosody and voice features might require re-standardizing…

  5. Readout circuit with pixel-level analog-to-digital conversion

    NASA Astrophysics Data System (ADS)

    Gan, Wenxiang; Ding, Ruijun; Ni, Yunzhi

    2005-01-01

    Pixel level on-focal-plane analog to digital conversion(ADC) promises many advantages including high performance and low power consumption. In this paper we argue that CMOS technology scaling will make pixel level ADC increasingly popular. Then we introduce four existing techniques for pixel level ADC. The first is an over sampling technique which uses a one bit first order sigma delta modulator for each pixel to directly convert photo charge to bits, consists of an integrator, a one bit DAC and a clocked comparator. The second technique is Nyquist rate multi-channel-bit-serial(MCBS) ADC. The technique uses special successive comparisons to convert the pixel voltage to bits. The third technique bases on a simple and robust pulse frequency modulation(PFM) scheme that can convert the photocurrent of photodetectors to proportional pulse frequency. The fourth is a software-controlled ADC, which utilize a algorithm, takes a desired photocurrent quantization scale to output bits. Each pixel contains a programmable digital processing element which directly controls the behavior of the photo detector with software. These four techniques are analyzed and compared according to their advantages, disadvantages and suitable application area. Finally we mention our current and future works with one of these techniques.

  6. A new implementation of the pipeline analog-to-digital conversion technique

    NASA Astrophysics Data System (ADS)

    Yazdy, M. R.

    1985-09-01

    With the present trend towards digital LSI technology, the techniques of analog-to-digital conversion play a major role in the rapidly growing field of signal processing. For over two decades many approaches for A/D conversion have been explored. Among them two popular schemes; successive approximation and flash conversion techniques, are widely used at the present time. An alternative to the methods above, that has the advantages of those techniques without their drawbacks, is the pipelining approach to be described in this dissertation. A new implementation of this technique, which allows for realization of high speed A/D conversion without complex circuitry, is introduced. A discrete prototype of an 8-bit pipeline converter, using commercially available IC's, was built and the experimental results are presented. The circuit realization of the pipeline converter, along with the NMOS and CMOS circuit designs and SPICE simulations of all key components of the A/D (op amps, comparators,...) are provided. These key elements are laid out and fabricated, using 4 microns standard NMOS and 5 microns double-poly p-well bulk CMOS technologies, and the test results are presented.

  7. A 12-bit compact column-parallel SAR ADC with dynamic power control technique for high-speed CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Quanliang, Li; Liyuan, Liu; Ye, Han; Zhongxiang, Cao; Nanjian, Wu

    2014-10-01

    This paper presents a 12-bit column-parallel successive approximation register analog-to-digital converter (SAR ADC) for high-speed CMOS image sensors. A segmented binary-weighted switched capacitor digital-to-analog converter (CDAC) and a staggered structure MOM unit capacitor is used to reduce the ADC area and to make its layout fit double pixel pitches. An electrical field shielding layout method is proposed to eliminate the parasitic capacitance on the top plate of the unit capacitor. A dynamic power control technique is proposed to reduce the power consumption of a single channel during readout. An off-chip foreground digital calibration is adopted to compensate for the nonlinearity due to the mismatch of unit capacitors among the CDAC. The prototype SAR ADC is fabricated in a 0.18 μm 1P5M CIS process. A single SAR ADC occupies 20 × 2020 μm2. Sampling at 833 kS/s, the measured differential nonlinearity, integral nonlinearity and effective number of bits of SAR ADC with calibration are 0.9/-1 LSB, 1/-1.1 LSB and 11.24 bits, respectively; the power consumption is only 0.26 mW under a 1.8-V supply and decreases linearly as the frame rate decreases.

  8. A 12-bit, 1 MS/s SAR-ADC for a CZT-based multi-channel gamma-ray imager using a new digital calibration method

    NASA Astrophysics Data System (ADS)

    Liu, W.; Wei, T.; Yang, L.; Hu, Y.

    2016-03-01

    The successive approximation register-analog to digital converter (SAR-ADC) is widely used in the CdZnTe-based gamma-ray imager because of its outstanding characteristics of low power consumption, relatively high resolution, and small die size. This study proposes a digital bit-by-bit calibration method using an input ramp signal to further improve the conversion precision and power consumption of an SAR-ADC. The proposed method is based on the sub-radix-2 redundant architecture and the perturbation technique. The proposed calibration algorithm is simpler, more stable, and faster than traditional approaches. The prototype chip of the 12-bit, 1 MS/s radiation-hardened SAR-ADC has been designed and fabricated using the TSMC 0.35 μm 2P4M CMOS process. This SAR-ADC consumes 3 mW power and occupies a core area of 856× 802μm2. The digital bit-by-bit calibration algorithm is implemented via MATLAB for testing flexibility. The effective number of bits for this digitally calibrated SAR-ADC reaches 11.77 bits. The converter exhibits high conversion precision, low power consumption, and radiation-hardened design. Therefore, this SAR-ADC is suitable for multi-channel gamma-ray imager applications.

  9. Ultra-Wideband Analog-to-Digital Conversion Via Signal Expansion

    DTIC Science & Technology

    2005-09-01

    46963.4-CI We consider analog to digital (A/D) conversion, based on the quantization of coefficients obtained via the projection of a continuous time... based on pulse code modulation (PCM). Fundamental figures of merit in A/D conversion and system tradeoffs are discussed for the proposed ADC. The...Brian M. Sadler, Senior Member, IEEE (Invited Paper) Abstract—We consider analog to digital (A/D) conversion, based on the quantization of

  10. A 0.31pJ/Conversion-Step 12-Bit 100MS/s 0.13μm CMOS A/D Converter for 3G Communication Systems

    NASA Astrophysics Data System (ADS)

    Kim, Young-Ju; Lee, Kyung-Hoon; Lee, Myung-Hwan; Lee, Seung-Hoon

    This work describes a 12-bit 100MS/s 0.13μm CMOS ADC for 3G wireless communication systems such as two-carrier W-CDMA applications. The proposed ADC employs a four-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. Area-efficient gate-bootstrapped sampling switches of the input SHA maintain high signal linearity over the Nyquist rate even at a 1.0V supply. The cascode compensation using a low-impedance feedback path in two-stage amplifiers of the SHA and MDACs achieves the required conversion speed and phase margin with less power consumption and area compared to the Miller compensation. A low-glitch dynamic latch in the sub-ranging flash ADCs reduces kickback noise referred to the input of comparator by isolating the pre-amplifier from the regeneration latch output. The proposed on-chip current and voltage references are based on triple negative TC circuits. The prototype ADC in a 0.13μm 1P8M CMOS technology demonstrates the measured DNL and INL within 0.38LSB and 0.96LSB at 12-bit, respectively. The ADC shows a maximum SNDR and SFDR of 64.5dB and 78.0dB at 100MS/s, respectively. The ADC with an active die area of 1.22mm2 consumes 42.0mW at 100MS/s and a 1.2V supply, corresponding to a figure-of-merit of 0.31pJ/conversion-step.

  11. Technical note: signal-to-noise performance evaluation of a new 12-bit digitizer on time-of-flight mass spectrometer.

    PubMed

    Hondo, Toshinobu; Kawai, Yousuke; Toyoda, Michisato

    2015-01-01

    Rapid acquisition of time-of-flight (TOF) spectra from fewer acquisitions on average was investigated using the newly introduced 12-bit digitizer, Keysight model U5303A. This is expected to achieve a spectrum acquisition 32 times faster than the commonly used 8-bit digitizer for an equal signal-to-noise (S/N) ratio. Averaging fewer pulses improves the detection speed and chromatographic separation performance. However, increasing the analog-to-digital converter bit resolution for a high-frequency signal, such as a TOF spectrum, increases the system noise and requires the timing jitter (aperture error) to be minimized. We studied the relationship between the S/N ratio and the average number of acquisitions using U5303A and compared this with an 8-bit digitizer. The results show that the noise, measured as root-mean-square, decreases linearly to the square root of the average number of acquisitions without background subtraction, which means that almost no systematic noise existed in our signal bandwidth of interest (a few hundreds megahertz). In comparison, 8-bit digitizers that are commonly used in the market require 32 times more pulses with background subtraction.

  12. An analog front end with a 12-bit 3.2-MS/s SAR ADC for a power line communication system

    NASA Astrophysics Data System (ADS)

    Huabin, Chen; Jixuan, Xiang; Xiangyan, Xue; Chixiao, Chen; Fan, Ye; Jun, Xu; Junyan, Ren

    2014-11-01

    This paper presents an analog front end for a power line communication system, including a 12-bit 3.2-MS/s energy-efficient successive approximation register analog-to-digital converter, a positive feedback programmable gain amplifier, a 9.8 ppm/°C bandgap reference and on-chip low-output voltage regulators. A two segment capacitive array structure (6 MSB 5 LSB) composed by split capacitors is designed for the SAR core to save area cost and release reference voltage accuracy requirements. Implemented in the GSMC 0.13 μm 1.5 V/12 V dual-gate 4P6M e-flash process, the analog front end occupies an area of 0.457 mm2 and consumes power of 18.8 mW, in which 1.1 mW cost by the SAR ADC. Measured at 500 kHz input, the spurious-free dynamic range and signal-to-noise plus distortion ratio of the ADC are 71.57 dB and 60.60 dB respectively, achieving a figure of merit of 350 fJ/conversion-step.

  13. Photonic subsampling analog-to-digital conversion of microwave signals at 40-GHz with higher than 7-ENOB resolution.

    PubMed

    Kim, Jungwon; Park, Matthew J; Perrott, Michael H; Kärtner, Franz X

    2008-10-13

    Conversion of analog signals into digital signals is one of the most important functionalities in modern signal processing systems. As the signal frequency increases beyond 10 GHz, the timing jitter from electronic clocks, currently limited at approximately 100 fs, compromises the achievable resolution of analog-to-digital converters (ADCs). Owing to their ultralow timing jitter, the use of optical pulse trains from passively mode-locked lasers has been considered to be a promising way for sampling electronic signals. In this paper, based on sub-10 fs jitter optical sampling pulse trains, we demonstrate a photonic subsampling ADC that downconverts and digitizes a narrowband microwave signal at 40 GHz carrier frequency with higher than 7 effective-number-of-bit (ENOB) resolution.

  14. Demonstration of a 10 GHz CMOS-Compatible Integrated Photonic Analog-to-Digital Converter

    DTIC Science & Technology

    2010-11-30

    recommendations and conclu sions arc those of the authors and are not necessari ly endorsed by the United States Gove rnment. Optica l pulses In ==:> Off chip...avai lable at 1575 nm and on-chip optica l losses. The second- and th ird- hannollic distonion s (H2 and H3, respectively) lim ited thc raw SFDR

  15. Modeling of quantization noise in linear analog-to-digital converter

    NASA Astrophysics Data System (ADS)

    Švihlík, Jan; Fliegel, Karel

    2013-09-01

    Quantization noise is present in all the current digital imaging systems, therefore its understanding and modeling is crucial for optimization of image reconstruction techniques. Hence, this paper deals with modeling of the quantization noise. We exploit the undecimated wavelet transform (UWT) for signal representation. We assume that the quantization noise in the spatial domain can be seen as additive, white and uniformly distributed. Hence, the UWT causes the transform of noise distribution due to weighted sum of noise samples and filter coefficients. From the known quantization step we are able to estimate suitable moments of noise uniform probability density function (PDF). These moments then could be directly evaluated in the undecimated wavelet domain using the derived equations. The presented algorithm gives the a priori information about the quantization noise and can be used for the suppression of it.

  16. CAMAC based 4-channel 12-bit digitizer

    NASA Astrophysics Data System (ADS)

    Srivastava, Amit K.; Sharma, Atish; Raval, Tushar; Reddy, D. Chenna

    2010-02-01

    With the development in Fusion research a large number of diagnostics are being used to understand the complex behaviour of plasma. During discharge, several diagnostics demand high sampling rate and high bit resolution to acquire data for rapid changes in plasma parameters. For the requirements of such fast diagnostics, a 4-channel simultaneous sampling, high-speed, 12-bit CAMAC digitizer has been designed and developed which has several important features for application in CAMAC based nuclear instrumentation. The module has independent ADC per channel for simultaneous sampling and digitization, and 512 Ksamples RAM per channel for on-board storage. The digitizer has been designed for event based acquisition and the acquisition window gives post-trigger as well as pre-trigger (software selectable) data that is useful for analysis. It is a transient digitizer and can be operated either in pre/post trigger mode or in burst mode. The record mode and the active memory size are selected through software commands to satisfy the current application. The module can be used to acquire data at high sampling rate for short time discharge e.g. 512 ms at 1MSPS. The module can also be used for long time discharge at low sampling rate e.g. 512 seconds at 1KSPS. This paper describes the design of digitizer module, development of VHDL code for hardware logic, Graphical User Interface (GUI) and important features of module from application point of view. The digitizer has CPLD based hardware logic, which provides flexibility in configuring the module for different sampling rates and different pre/post trigger samples through GUI. The digitizer can be operated with either internal (for testing/acquisition) or external (synchronized acquisition) clock and trigger. The digitizer has differential inputs with bipolar input range ±5V and it is being used with sampling rate of 1 MSamples Per Second (MSPS) per channel but it also supports higher sampling rate up to 3MSPS per channel. A

  17. 40GS/s Optical analog-to-digital conversion system and its improvement.

    PubMed

    Wu, Qingwei; Zhang, Hongming; Peng, Yue; Fu, Xin; Yao, Minyu

    2009-05-25

    An optical analog-to-digital conversion system is proposed and demonstrated. Using time- and wavelength- interleaved optical sampling pulse train; sampling rate of 40GS/s is realized. 2.5 GHz sinusoidal electrical analog signal is sampled and quantized using this system, achieving an effective number of bits of 3.45 bits. A novel technology that can dramatically improve the bandwidth of this system will also be presented in this paper, which manifests that our system can realized high bandwidth of more than 50 GHz using commercially available LiNbO(3) phase modulator.

  18. Frequency domain near-infrared multiwavelength imager design using high-speed, direct analog-to-digital conversion

    PubMed Central

    Zimmermann, Bernhard B.; Fang, Qianqian; Boas, David A.; Carp, Stefan A.

    2016-01-01

    Abstract. Frequency domain near-infrared spectroscopy (FD-NIRS) has proven to be a reliable method for quantification of tissue absolute optical properties. We present a full-sampling direct analog-to-digital conversion FD-NIR imager. While we developed this instrument with a focus on high-speed optical breast tomographic imaging, the proposed design is suitable for a wide-range of biophotonic applications where fast, accurate quantification of absolute optical properties is needed. Simultaneous dual wavelength operation at 685 and 830 nm is achieved by concurrent 67.5 and 75 MHz frequency modulation of each laser source, respectively, followed by digitization using a high-speed (180  MS/s) 16-bit A/D converter and hybrid FPGA-assisted demodulation. The instrument supports 25 source locations and features 20 concurrently operating detectors. The noise floor of the instrument was measured at <1.4  pW/√Hz, and a dynamic range of 115+ dB, corresponding to nearly six orders of magnitude, has been demonstrated. Titration experiments consisting of 200 different absorption and scattering values were conducted to demonstrate accurate optical property quantification over the entire range of physiologically expected values. PMID:26813081

  19. Frequency domain near-infrared multiwavelength imager design using high-speed, direct analog-to-digital conversion

    NASA Astrophysics Data System (ADS)

    Zimmermann, Bernhard B.; Fang, Qianqian; Boas, David A.; Carp, Stefan A.

    2016-01-01

    Frequency domain near-infrared spectroscopy (FD-NIRS) has proven to be a reliable method for quantification of tissue absolute optical properties. We present a full-sampling direct analog-to-digital conversion FD-NIR imager. While we developed this instrument with a focus on high-speed optical breast tomographic imaging, the proposed design is suitable for a wide-range of biophotonic applications where fast, accurate quantification of absolute optical properties is needed. Simultaneous dual wavelength operation at 685 and 830 nm is achieved by concurrent 67.5 and 75 MHz frequency modulation of each laser source, respectively, followed by digitization using a high-speed (180 MS/s) 16-bit A/D converter and hybrid FPGA-assisted demodulation. The instrument supports 25 source locations and features 20 concurrently operating detectors. The noise floor of the instrument was measured at <1.4 pW/√Hz, and a dynamic range of 115+ dB, corresponding to nearly six orders of magnitude, has been demonstrated. Titration experiments consisting of 200 different absorption and scattering values were conducted to demonstrate accurate optical property quantification over the entire range of physiologically expected values.

  20. Photonic analog-to-digital conversion with electronic-photonic integrated circuits

    NASA Astrophysics Data System (ADS)

    Kärtner, F. X.; Amatya, R.; Araghchini, M.; Birge, J.; Byun, H.; Chen, J.; Dahlem, M.; DiLello, N. A.; Gan, F.; Holzwarth, C. W.; Hoyt, J. L.; Ippen, E. P.; Khilo, A.; Kim, J.; Kim, M.; Motamedi, A.; Orcutt, J. S.; Park, M.; Perrott, M.; Popović, M. A.; Ram, R. J.; Smith, H. I.; Zhou, G. R.; Spector, S. J.; Lyszczarz, T. M.; Geis, M. W.; Lennon, D. M.; Yoon, J. U.; Grein, M. E.; Schulein, R. T.

    2008-02-01

    Photonic Analog-to-Digital Conversion (ADC) has a long history. The premise is that the superior noise performance of femtosecond lasers working at optical frequencies enables us to overcome the bottleneck set by jitter and bandwidth of electronic systems and components. We discuss and demonstrate strategies and devices that enable the implementation of photonic ADC systems with emerging electronic-photonic integrated circuits based on silicon photonics. Devices include 2-GHz repetition rate low noise femtosecond fiber lasers, Si-Modulators with up to 20 GHz modulation speed, 20 channel SiN-filter banks, and Ge-photodetectors. Results towards a 40GSa/sec sampling system with 8bits resolution are presented.

  1. Design of a Low-Light-Level Image Sensor with On-Chip Sigma-Delta Analog-to- Digital Conversion

    NASA Technical Reports Server (NTRS)

    Mendis, Sunetra K.; Pain, Bedabrata; Nixon, Robert H.; Fossum, Eric R.

    1993-01-01

    The design and projected performance of a low-light-level active-pixel-sensor (APS) chip with semi-parallel analog-to-digital (A/D) conversion is presented. The individual elements have been fabricated and tested using MOSIS* 2 micrometer CMOS technology, although the integrated system has not yet been fabricated. The imager consists of a 128 x 128 array of active pixels at a 50 micrometer pitch. Each column of pixels shares a 10-bit A/D converter based on first-order oversampled sigma-delta (Sigma-Delta) modulation. The 10-bit outputs of each converter are multiplexed and read out through a single set of outputs. A semi-parallel architecture is chosen to achieve 30 frames/second operation even at low light levels. The sensor is designed for less than 12 e^- rms noise performance.

  2. A 16-bit cascaded sigma-delta pipeline A/D converter

    NASA Astrophysics Data System (ADS)

    Liang, Li; Ruzhang, Li; Zhou, Yu; Jiabin, Zhang; Jun'an, Zhang

    2009-05-01

    A low-noise cascaded multi-bit sigma-delta pipeline analog-to-digital converter (ADC) with a low over-sampling rate is presented. The architecture is composed of a 2-order 5-bit sigma-delta modulator and a cascaded 4-stage 12-bit pipelined ADC, and operates at a low 8X oversampling rate. The static and dynamic performances of the whole ADC can be improved by using dynamic element matching technique. The ADC operates at a 4 MHz clock rate and dissipates 300 mW at a 5 V/3 V analog/digital power supply. It is developed in a 0.35 μm CMOS process and achieves an SNR of 82 dB.

  3. SEMICONDUCTOR INTEGRATED CIRCUITS A 12-bit current steering DAC with 2-dimensional gradient-error tolerant switching scheme

    NASA Astrophysics Data System (ADS)

    Hao, Chen; Liyuan, Liu; Dongmei, Li; Chun, Zhang; Zhihua, Wang

    2010-10-01

    A 12-bit intrinsic accuracy digital-to-analog converter integrated into standard digital 0.18 μm CMOS technology is proposed. It is based on a current steering segmented 6+6 architecture and requires no calibration. By dividing one most significant bit unary source into 16 elements located in 16 separated regions of the array, the linear gradient errors and quadratic errors can be averaged and eliminated effectively. A novel static performance testing method is proposed. The measured differential nonlinearity and integral nonlinearity are 0.42 and 0.39 least significant bit, respectively. For 12-bit resolution, the converter reaches an update rate of 100 MS/s. The chip operates from a single 1.8 V voltage supply, and the core die area is 0.28 mm2.

  4. Total ionizing dose effects on a radiation-induced BiMOS analog-to-digital converter

    NASA Astrophysics Data System (ADS)

    Xue, Wu; Wu, Lu; Yiyuan, Wang; Jialing, Xu; Leqing, Zhang; Jian, Lu; Xin, Yu; Xingyao, Zhang; Tianle, Hu

    2013-01-01

    The total dose effect of an AD678 with a BiMOS process is studied. We investigate the performance degradation of the device in different bias states and at several dose rates. The results show that an AD678 can endure 3 krad(Si) at low dose rate and 5 krad(Si) at a high dose rate for static bias. The sensitive parameters to the bias states also differ distinctly. We find that the degradation is more serious on static bias. The underlying mechanisms are discussed in detail.

  5. Photonic Analog-to-Digital Converter Preprocessing Using the Robust Symmetrical Number System for Direct Digitization of Antenna Signals

    DTIC Science & Technology

    2010-12-01

    Processing, Vol. 47, No. 5, pp. 462–467, May 2000. [19] P. E. Pace, R. E. Walley, R. J. Pieper and J. P. Powers, “5bit guided-wave SNS transfer...characteristics,” Electronics Letters, Vol 31, pp. 1799–1800, Oct 1995. 85 [20] P. E. Pace, J. P. Powers, R. J. Pieper , R. Walley, H. Yamakoshi, C

  6. Validity of Using a Fixed Analog Input for Evaluating the SEU Sensitivity of a Flash Analog-to-Digital Converter

    NASA Technical Reports Server (NTRS)

    Buchner, Stephen; Campbell, Arthur B.; Sternberg, Andrew; Massengill, Lloyd; McMorrow, Dale; Dyer, Clive

    2003-01-01

    The SEU rate in a flash ADC (AD9058) on board a space experiment varied by more than an order of magnitude, depending on the input. A pulsed laser aided in elucidating the reasons, which were found to be the result of the unique design of the AD9058.

  7. A slow-speed multiple-channel analog-to-digital data logging system

    NASA Technical Reports Server (NTRS)

    Lloyd, T. C.; Flaherty, B. J.

    1973-01-01

    The system was developed to record from one up to a maximum of sixteen channels of analog data onto magnetic tape. Each analog channel of data can be sampled at rates of 1, 2, 6, 12, or 60 times per minute. The system is divided into three subunits: a digital clock, an incremental magnetic tape recorder, and a sequential converter. The interfacing requirements of these subunits are presented.

  8. Analog-to-digital conversion as a source of drifts in displacements derived from digital recordings of ground acceleration

    USGS Publications Warehouse

    Boore, D.M.

    2003-01-01

    Displacements obtained from double integration of digitally recorded ground accelerations often show drifts much larger than those expected for the true ground displacements. These drifts might be due to many things, including dynamic elastic ground tilt, inelastic ground deformation, hysteresis in the instruments, and cross feed due to misalignment of nominally orthogonal sensors. This article shows that even if those effects were not present, the analog-to-digital conversion (ADC) process can produce apparent "pulses" and offsets in the acceleration baseline if the ground motion is slowly varying compared with the quantization level of the digitization. Such slowly varying signals can be produced by constant offsets that do not coincide with a quantization level and by near- and intermediate-field terms in the wave field radiated from earthquakes. Double integration of these apparent pulses and offsets leads to drifts in the displacements similar to those found in processing real recordings. These effects decrease in importance as the resolution of the ADC process increases.

  9. PEALL4: a 4-channel, 12-bit, 40-MSPS, Power Efficient and Low Latency SAR ADC

    NASA Astrophysics Data System (ADS)

    Rarbi, F.; Dzahini, D.; Gallin-Martel, L.; Bouvier, J.; Zeloufi, M.; Trocme, B.; Gabaldon Ruiz, C.

    2015-01-01

    The PEALL4 chip is a Power Efficient And Low Latency 4-channels, 12-bit and 40-MSPS successive approximation register (SAR) ADC. It was designed featuring a very short latency time in the context of ATLAS Liquid Argon Calorimeter phase I upgrade. Moreover this design could be a good option for ATLAS phase II and other High Energy Physics (HEP) projects. The full functionality of the converter is achieved by an embedded high-speed clock frequency conversion generated by the ADC itself. The design and testing results of the PEALL4 chip implemented in a commercial 130nm CMOS process are presented. The size of this 4-channel ADC with embedded voltage references and sLVS output serializer is 2.8x3.4 mm2. The chip presents a short latency time less than 25 ns defined from the very beginning of the sampling to the last conversion bit made available. A total power consumption below 27mW per channel is measured including the reference buffer and the sLVS serializer.

  10. A low glitch 12-bit current-steering CMOS DAC for CNC systems

    NASA Astrophysics Data System (ADS)

    Jianming, Lei; Hanshu, Gui; Beiwen, Hu

    2013-02-01

    A 12-bit, 100-MHz CMOS current-steering D/A converter for CNC (computer number control) systems is presented. To reduce the glitch and increase the SFDR (spurious-free dynamic range), a low crosspoint switch driver and a special dummy switch are applied. In addition, a 4-5-3 segmental structure is used to optimize the performance and layout area. After improvement, the biggest glitch energy decreased from 6.7 pVs to 1.7 pVs, the INL decreased from 2 LSB to 0.8 LSB, the SFDR is 78 dB at a 100-MSPS clock rate and 1 MHz output frequency. This DAC can deliver up to 20.8 mA full-scale current into a 50 Ω load. The power when operating at full-scale current is 163 mW. The layout area is 1.8 × 1.8 mm2 in a standard 0.35-μm CMOS technology.

  11. A new approach for digital calibration of timing-mismatch in four-channels time-interleaved analog-to-digital converters

    NASA Astrophysics Data System (ADS)

    Majdinasab, E.; Farshidi, E.

    2014-09-01

    In this paper employing fractional delay filter in farrow structure and a time delay block a new approach for digital calibration is described that corrects the timing mismatch between four interleaved channels. Fractional delay filter is a good candidate for bandlimited interpolation between samples and farrow structure filter is an efficient way to implement interpolation filter in which Lagrange polynomial approximation method is used for arbitrary sample rate change. In this work, the proposed method is employed for a four-channel ADC and can be applied for an arbitrary number of parallel channels. Simulation results show that after 40 ksamples, the mismatch error converges in detector and spurious components are suppressed after calibration by more than 40 dB.

  12. Design automation techniques for high-resolution current folding and interpolating CMOS A/D converters

    NASA Astrophysics Data System (ADS)

    Gevaert, D.

    2007-05-01

    The design and testing of a 12-bit Analog-to-Digital (A/D) converter, in current mode, arranged in an 8-bit LSB and a 4- bit MSB architecture together with the integration of specialized test building blocks on chip allows the set up of a design automation technique for current folding and interpolation CMOS A/D converter architectures. The presented design methodology focuses on the automation for CMOS A/D building blocks in a flexible target current folding and interpolating architecture for a downscaling technology and for different quality specifications. The comprehensive understanding of all sources of mismatching in the crucial building blocks and the use of physical based mismatch modeling in the prediction of mismatch errors, more adequate and realistic sizing of all transistors will result in an overall area reduction of the A/D converter. In this design the folding degree is 16, the number of folders is 64 and the interpolation level is 4. The number of folders is reduced by creating intermediate folding signals with a 4-level interpolator based on current division techniques. Current comparators detect the zero-crossing between the differential folder output currents. The outputs of the comparators deliver a cyclic thermometer code. The digital synthesis part for decoding and error correction building blocks is a standardized digital standard cell design. The basic building blocks in the target architecture were designed in 0.35μ CMOS technology; they are suitable for topological reuse and are in an automated way downscaled into a 0.18μ CMOS technology.

  13. A high-performance analog-to-digital conversion subsystem suitable for the study of evoked potentials, with design considerations for the eclipse $140 (trademark) computer

    NASA Astrophysics Data System (ADS)

    Berger, M. D.

    1983-02-01

    In order to evaluate impact protection devices, an impact injury model for restrained humans in a crash environment must be developed. Disruption of the functioning of the central nervous system is an important consequence of impact injury involving the head and neck, and is an important consideration in the development of a useful impact-injury model. Ultimately, neurophysiological criteria are desired. Evoked potentials (EPs) are likely to provide appropriate neurophysiological information, but quantitative analysis of EP data presents considerable difficulty. Among the technical problems encountered is efficient digitization of large amounts of EP data presents considerable difficulty. Among the technical problems encountered is efficient digitization of large amounts of EP data. This report presents detailed specifications for a high-performance analog-to-digital conversion subsystem suitable for various aspects of such work. Procedures utilizing various aspects of the design presented have been have been found to be effective. In the future acquisition of A/D conversion hardware, the design presented here should be considered.

  14. Computerized Experiments Using an A/D Converter.

    ERIC Educational Resources Information Center

    Karl, John H.

    The indroduction of on-line data collection and data processing techniques into an intermediate physics laboratory is described. Using a minimum configuration PDP-8L and a Digital Equipment AD01 analog to digital converter, an interface is developed with two existing experiments. These are a microwave apparatus used to simulate Bragg diffraction…

  15. A 12 bit 40 MSPS SAR ADC with a redundancy algorithm and digital calibration for the ATLAS LAr calorimeter readout

    NASA Astrophysics Data System (ADS)

    Zeloufi, M.

    2016-01-01

    We present a SAR ADC with a generalized redundant search algorithm offering the flexibility to relax the requirements on the DAC settling time. The redundancy also allows a digital background calibration, based on a code density analysis, to compensate for the capacitor mismatch effects. The total number of capacitors used in this architecture is limited to one half of the one in a classical SAR design. Only 211 unit capacitors were necessary to reach 12 bit resolution, and the switching algorithm is intrinsically monotonic. The design is fully differential featuring 12 bit 40 MS/s in a CMOS 130 nm 1P8M process.

  16. A Methodology to Teach Advanced A/D Converters, Combining Digital Signal Processing and Microelectronics Perspectives

    ERIC Educational Resources Information Center

    Quintans, C.; Colmenar, A.; Castro, M.; Moure, M. J.; Mandado, E.

    2010-01-01

    ADCs (analog-to-digital converters), especially Pipeline and Sigma-Delta converters, are designed using complex architectures in order to increase their sampling rate and/or resolution. Consequently, the learning of ADC devices also encompasses complex concepts such as multistage synchronization, latency, oversampling, modulation, noise shaping,…

  17. A high speed CMOS A/D converter

    NASA Technical Reports Server (NTRS)

    Wiseman, Don R.; Whitaker, Sterling R.

    1992-01-01

    This paper presents a high speed analog-to-digital (A/D) converter. The converter is a 7 bit flash converter with one half LSB accuracy. Typical parts will function at approximately 200 MHz. The converter uses a novel comparator circuit that is shown to out perform more traditional comparators, and thus increases the speed of the converter. The comparator is a clocked, precharged circuit that offers very fast operation with a minimal offset voltage (2 mv). The converter was designed using a standard 1 micron digital CMOS process and is 2,244 microns by 3,972 microns.

  18. Pseudolog Digital-to-Analog Converter

    NASA Technical Reports Server (NTRS)

    Gooder, S. T.

    1986-01-01

    Sensitivity decreases by 10 at beginning of each input decade. Method conceived to convert binary-coded data to suitable linear form for stripchart recording. Strip-chart recordings obtained from typical pressure readings in a vacuum system during pumpdown. In reading curve, BCD digital vacuum-gage output processed by analog-to-digital converter in such way that only reading digits (but not range) appear in output. In range and reading, range also converted to analog and placed as most significant digit.

  19. A picoampere A/D converter for biosensor applications

    PubMed Central

    Rachmuth, Guy; Zhou, Kuan; Monzon, Joshua J.C.; Helble, Heiko; Poon, Chi-Sang

    2010-01-01

    Detection and analysis of biological and biochemical signals via compact sensor systems require low-power and compact analog-to-digital converter (ADC) systems. Here we present a highly sensitive flash current-mode ADC (IADC) design with resolution down to 15pA. The IADC’s small-size and low-power capabilities allow integration for stand-alone biological or chemical microsensor applications. PMID:20725591

  20. A picoampere A/D converter for biosensor applications.

    PubMed

    Rachmuth, Guy; Zhou, Kuan; Monzon, Joshua J C; Helble, Heiko; Poon, Chi-Sang

    2010-08-06

    Detection and analysis of biological and biochemical signals via compact sensor systems require low-power and compact analog-to-digital converter (ADC) systems. Here we present a highly sensitive flash current-mode ADC (IADC) design with resolution down to 15pA. The IADC's small-size and low-power capabilities allow integration for stand-alone biological or chemical microsensor applications.

  1. A 12-bit, low-voltage, nanoampere-based, ultralow-power, ultralow-glitch current-steering DAC for HDTV

    NASA Astrophysics Data System (ADS)

    Azhari, Seyed Javad; Monfaredi, Khalil; Amiri, Salar

    2012-11-01

    In this paper, a novel 12-bit current-steering binary-weighted digital-to-analog converter (DAC) based on nanoampere bits is designed and modified for high-definition television (HDTV) applications. As a part of a widely used consumer appliance, it is aimed to be such designed to consume power as low as possible. Hence, as a distinguished idea, prime concentration is focused on the reduction of the currents providing the bits of the proposed DAC. To do this, current mirrors operating in the weak inversion region are arranged to establish the least significant bit (LSB) current as low as 10 nA while the power supply is also reduced to 1 V, resulting to an ultralow power of 52.9 μW. Many other powerful ideas are then deliberately combined to maintain both high speed and very low glitches required for HDTV application despite those ultralow currents and power. The result is a speed of 100 MS/s, an ultralow glitch of ≃10.91 fAs, |INL| ≤ 0.988 LSB, |DNL| ≤ 0.99 LSB, and a spurious-free dynamic range of ≃73 dB. These results caused the proposed DAC to execute a distinguished overall performance (defined as figure of merit) greatly better than some other advanced ones by outstanding ratios of 77 to 277,185. Hspice simulations with the SMIC 0.18-μm complementary metal-oxide semiconductor technology have been used to validate the proposed circuit. Performance evaluation of the proposed DAC versus Monte Carlo simulations and also a wide range of temperature variations proved both its well mismatch insensitivity and thermal stability.

  2. Fast interactive elastic registration of 12-bit multi-spectral images with subvoxel accuracy using display hardware

    NASA Astrophysics Data System (ADS)

    Noordmans, Herke Jan; de Roode, Rowland; Verdaasdonk, Rudolf

    2007-03-01

    Multi-spectral images of human tissue taken in-vivo often contain image alignment problems as patients have difficulty in retaining their posture during the acquisition time of 20 seconds. Previously, it has been attempted to correct motion errors with image registration software developed for MR or CT data but these algorithms have been proven to be too slow and erroneous for practical use with multi-spectral images. A new software package has been developed which allows the user to play a decisive role in the registration process as the user can monitor the progress of the registration continuously and force it in the right direction when it starts to fail. The software efficiently exploits videocard hardware to gain speed and to provide a perfect subvoxel correspondence between registration field and display. An 8 bit graphic card was used to efficiently register and resample 12 bit images using the hardware interpolation modes present on the graphic card. To show the feasibility of this new registration process, the software was applied in clinical practice evaluating the dosimetry for psoriasis and KTP laser treatment. The microscopic differences between images of normal skin and skin exposed to UV light proved that an affine registration step including zooming and slanting is critical for a subsequent elastic match to have success. The combination of user interactive registration software with optimal addressing the potentials of PC video card hardware greatly improves the speed of multi spectral image registration.

  3. Atropine Effects on the Operation of the Tow Missile Launcher.

    DTIC Science & Technology

    1987-03-01

    Missile Guidance Unit ( MGU ). The MGU operates in conjunction with the TOW sight to provide both azimuth (X) and elevation (Y) error signals. The operation...and Y error signals are then processed by the TOW’s MGU , digitized within the Apple by a 12-bit hybrid analog-to-digital converter and recorded on disk

  4. The Miniaturized Autonomous Moored Profiler

    DTIC Science & Technology

    2007-11-02

    report. 17 sensor integrated with the BOSS will use the optical block and electronic board set of Satlantic Inc.’s OCR 507 sensor. A Scattering...purpose 12 bit analog to digital converter with 8 multiplexed inputs • 512 MB flash memory card. • Watchdog circuitry to monitor the package controller

  5. Analog current mode analog/digital converter

    NASA Technical Reports Server (NTRS)

    Hadidi, Khayrollah (Inventor)

    1996-01-01

    An improved subranging or comparator circuit is provided for an analog-to-digital converter. As a subranging circuit, the circuit produces a residual signal representing the difference between an analog input signal and an analog of a digital representation. This is achieved by subdividing the digital representation into two or more parts and subtracting from the analog input signal analogs of each of the individual digital portions. In another aspect of the present invention, the subranging circuit comprises two sets of differential input pairs in which the transconductance of one differential input pair is scaled relative to the transconductance of the other differential input pair. As a consequence, the same resistor string may be used for two different digital-to-analog converters of the subranging circuit.

  6. Design of a 12-bit 2 MS/s 12 mW pipelined SAR ADC in CMOS 0.18 μm technology for CZT-based imaging system

    NASA Astrophysics Data System (ADS)

    Xue, F.; Gao, W.; Wei, X.; Liu, W.; Hu, Y.

    2016-12-01

    This paper presents a 12-bit 2 MS/s pipelined successive approximation register (SAR) ADC for CZT-based imaging system. The proposed ADC is divided into a first-stage 6-bit SAR-based Multiplying Digital Analog Converter (MDAC) and a second-stage 8-bit SAR ADC. The first-stage MDAC has a gain of 16 instead of the usual gain of 64, which considerably minimizes the power dissipation of residue amplifier. The second-stage 8-bit SAR ADC employs unit bridge capacitor split-capacitor architecture aiming to reduce the load capacitance of residue amplifier so as to minimize the power dissipation of the proposed ADC. Moreover, a code-randomized calibration algorithm is proposed to improve the linearity of the second-stage 8-bit split-capacitor SAR ADC. In addition, several radiation-hardened-by-design techniques are adopted in the layout design against space radiation effects. The prototype chip was fabricated in 0.18 μ m mixed-signal 1.8 V/3.3 V process and occupied a core area of 0.71 mm2. The proposed pipelined SAR ADC achieves a peak signal-to-noise-and-distortion ratio (SNDR) of 63.2 dB at 2 MS/s sampling rate and consumes 12 mW power in total. The figure of merit (FoM) of the proposed ADC is 5.06 pJ/conversion-step.

  7. Note: Direct sensor resistance-to-frequency conversion with generalized impedance converter.

    PubMed

    Ramírez Muñoz, D; Sánchez Moreno, J; Casans Berga, S; Navarro Antón, A E

    2010-12-01

    In this note a squared output signal is generated from an astable circuit. Its frequency has a linear dependence on the resistance value of a resistive temperature sensor. The main circuit to obtain this direct relationship is the generalized impedance converter configured as a capacitor controlled by a sensor resistance. The proposed measurement method allows a direct analog-to-digital interface of information involved in resistive sensors. The converter finds applications in portable low voltage and low power design of instrumentation electronic systems.

  8. Design of a 12-bit 1 MS/s SAR-ADC for front-end readout of 32-channel CZT detector imaging system

    NASA Astrophysics Data System (ADS)

    Liu, Wei; Wei, Tingcun; Li, Bo; Guo, Panjie; Hu, Yongcai

    2015-06-01

    A 12-bit 1MS/s SAR-ADC for the front-end readout of a 32-channel CZT detector imaging system is presented. In order to improve the performances of the ADC, several techniques are proposed. First, a novel offset cancellation method for comparator is proposed, in which no any capacitor is introduced in the signal pathway, thus it has faster operation speed than traditional one. Second, the architecture of unit capacitor array is adopted in the charge-redistribution DAC to reduce the capacitor mismatch. Third, the radiation-hardened ability is enhanced through circuit and layout design. The prototype chip was fabricated using a TSMC 0.35 um 2P4M CMOS process. At a 3.3/5 V power supply, the proposed SAR-ADC achieves 67.64 dB SINAD at 1MS/s, consumes 10 mW power and occupies a core area of 1180×1080 um2.

  9. Transitioning from analog to digital communications: An information security perspective

    NASA Technical Reports Server (NTRS)

    Dean, Richard A.

    1990-01-01

    A summary is given of the government's perspective on evolving digital communications as they affect secure voice users and approaches for operating during a transition period to an all digital world. An integrated architecture and a mobile satellite interface are discussed.

  10. A 10-b 75-MSPS subranging A/D converter with integrated sample and hold

    NASA Astrophysics Data System (ADS)

    Petschacher, Reinhard; Zojer, Bernhard; Astegher, Berthold; Jessner, Hermann; Lechner, Alexander

    1990-12-01

    The design of a fully differential two-step analog-to-digital converter (ADC) is presented. A sample-and-hold (S/H) circuit based on a unity-gain feedback amplifier, flash ADCs driven by differential resistor ladders, and a differential digital-to-analog converter (DAC) combined with the subtractor are described. The chip has been fabricated in a standard high-speed bipolar process and, by extensively utilizing compensation techniques, achieves + or - 1 LSB integral nonlinearity and low harmonic distortion. A 75 Msample/s conversion rate, not yet exceeded even by full-flash 10-b ADCs, has been achieved with a power consumption of 2 W. Due to the S/H circuit, the input bandwidth is 250 MHz; the effective resolution of 9 b at 5 MHz exhibits a gradual decrease over input frequency but still remains above 8 b up to 50 MHz.

  11. Coded output photonic A/D converter based on photonic crystal slow-light structures.

    PubMed

    Yu, Sunkyu; Koo, Sukmo; Park, Namkyoo

    2008-09-01

    A photonic analog-to-digital converter (PADC) utilizing a slow-light photonic crystal Mach-Zehnder interferometer (MZI) is proposed, to enable the optically coded output of a PADC with reduced device size and power consumption. Assuming an index modulation for the MZI on the Taylor's PADC structure, limiting factors in device size, speed, and effective number of bits are derived considering the signal transition time of the light and the slow light dispersion effects. Details of the device design and results of a time domain assessment of the device performance is described with discussions on the feasibility of sub-mm size, 20GS/s operation of the device having the ENOB (effective number of bits) > 5.

  12. XTL Converter

    SciTech Connect

    Spurgeon, Steven R

    2015-10-07

    "XTL Converter" is a short Python script for electron microscopy simulation. The program takes an input crystal file in the VESTA *.XTL format and converts it to a text format readable by the multislice simulation program ìSTEM. The process of converting a crystal *.XTL file to the format used by the ìSTEM simulation program is quite tedious; it generally requires the user to select dozens or hundreds of atoms, rearranging and reformatting their position. Header information must also be reformatted to a specific style to be read by ìSTEM. "XTL Converter" simplifies this process, saving the user time and allowing for easy batch processing of crystals.

  13. Toward systematic design of multi-standard converters

    NASA Astrophysics Data System (ADS)

    Rivas, V. J.; Castro-López, R.; Morgado, A.; Guerra, O.; Roca, E.; del Río, R.; de la Rosa, J. M.; Fernández, F. V.

    2007-05-01

    In the last few years, we are witnessing the convergence of more and more communication capabilities into a single terminal. A basic component of these communication transceivers is the multi-standard Analog-to-Digital-Converter (ADC). Many systematic, partially automated approaches for the design of ADCs dealing with a single communication standard have been reported. However, most multi-standard converters reported in the literature follow an ad-hoc approach, which do not guarantee either an efficient occupation of silicon area or its power efficiency in the different standards. This paper aims at the core of this problem by formulating a systematic design approach based on the following key elements: (1) Definition of a set of metrics for reconfigurability: impact in area and power consumption, design complexity and performances; (2) Definition of the reconfiguration capabilities of the component blocks at different hierarchical levels, with assessment of the associated metrics; (3) Exploration of candidate architectures by using a combination of simulated annealing and evolutionary algorithms; (4) Improved top-down synthesis with bottom-up generated low-level design information. The systematic design methodology is illustrated via the design of a multi-standard ΣΔ modulator meeting the specifications of three wireless communication standards.

  14. Thermionic converter

    DOEpatents

    Fitzpatrick, G.O.

    1987-05-19

    A thermionic converter is set forth which includes an envelope having an electron collector structure attached adjacent to a wall. An electron emitter structure is positioned adjacent the collector structure and spaced apart from opposite wall. The emitter and collector structures are in a common chamber. The emitter structure is heated substantially only by thermal radiation. Very small interelectrode gaps can be maintained utilizing the thermionic converter whereby increased efficiency results. 10 figs.

  15. Power converter

    NASA Technical Reports Server (NTRS)

    Black, J. M. (Inventor)

    1981-01-01

    A dc-to-dc converter employs four transistor switches in a bridge to chop dc power from a source, and a voltage multiplying diode rectifying ladder network to rectify and filter the chopped dc power for delivery to a load. The bridge switches are cross coupled in order for diagonally opposite pairs to turn on and off together using RC networks for the cross coupling to achieve the mode of operation of a free running multivibrator, and the diode rectifying ladder is configured to operate in a push-pull mode driven from opposite sides of the multivibrator outputs of the ridge switches. The four transistor switches provide a square-wave output voltage which as a peak-to-peak amplitude that is twice the input dc voltage, and is thus useful as a dc-to-ac inverter.

  16. Development of Low-Frequency AC Voltage Measurement System Using Single-Junction Thermal Converter

    NASA Astrophysics Data System (ADS)

    Amagai, Yasutaka; Nakamura, Yasuhiro

    Accurate measurement of low-frequency AC voltage using a digital multimeter at frequencies of 4-200Hz is a challenge in the mechanical engineering industry. At the National Metrology Institute of Japan, we developed a low-frequency AC voltage measurement system for calibrating digital multimeters operating at frequencies down to 1 Hz. The system uses a single-junction thermal converter and employs a theoretical model and a three-parameter sine wave fitting algorithm based on the least-square (LS) method. We calibrated the AC voltage down to 1Hz using our measurement system and reduced the measurement time compared with that using thin-film thermal converters. Our measurement results are verified by comparison with those of a digital sampling method using a high-resolution analog-to-digital converter; our data are in agreement to within a few parts in 105. Our proposed method enables us to measure AC voltage with an uncertainty of 25 μV/V (k = 1) at frequencies down to 4 Hz and a voltage of 10 V.

  17. Thermionic converter

    DOEpatents

    Rasor, Ned S.; Britt, Edward J.

    1976-01-01

    A gas-filled thermionic converter is provided with a collector and an emitter having a main emitter region and an auxiliary emitter region in electrical contact with the main emitter region. The main emitter region is so positioned with respect to the collector that a main gap is formed therebetween and the auxiliary emitter region is so positioned with respect to the collector that an auxiliary gap is formed therebetween partially separated from the main gap with access allowed between the gaps to allow ionizable gas in each gap to migrate therebetween. With heat applied to the emitter the work function of the auxiliary emitter region is sufficiently greater than the work function of the collector so that an ignited discharge occurs in the auxiliary gap and the work function of the main emitter region is so related to the work function of the collector that an unignited discharge occurs in the main gap sustained by the ions generated in the auxiliary gap. A current flows through a load coupled across the emitter and collector due to the unignited discharge in the main gap.

  18. Convertible Stadium

    NASA Technical Reports Server (NTRS)

    1978-01-01

    Air flotation technology used in NASA's Apollo program has found an interesting application in Hawaii's Aloha Stadium near Honolulu. The stadium's configuration can be changed, by moving entire 7,000-seat sections on a cushion of air, for best accommodation of spectators and participants at different types of events. In most stadiums, only a few hundred seats can be moved, by rolling sections on wheels or rails. At Aloha Stadium, 28,000 of the 50,000 seats can be repositioned for better spectator viewing and, additionally, for improved playing conditions. For example, a stadium designed primarily for football may compromise the baseball diamond by providing only a shallow outfield. Aloha's convertibility allows a full-size baseball field as well as optimum configurations for many other types of sports and special events. The photos show examples. The stadium owes its versatility to air flotation technology developed by General Motors. Its first large-scale application was movement of huge segments of the mammoth Saturn V moonbooster during assembly operations at Marshall Space Flight Center.

  19. An Enhanced Dual-Path ΔΣ A/D Converter

    NASA Astrophysics Data System (ADS)

    Nishida, Yoshio; Hamashita, Koichi; Temes, Gabor C.

    This paper presents an enhanced dual-path delta-sigma analog-to-digital converter. Compared with other architectures, the enhanced architecture increases the noise shaping order without any instability problems and displays analog complexity equivalent to the multi-stage noise shaping architecture. Our delta-sigma converter is based on this new architecture. It employs not only doubly-differential structure to reduce common-mode errors in the system-level but also delayed-feed-in structure to mitigate the timing constraint of the feedback signal. Regarding the circuit implementation, the first-order enhancement of the quantization noise shaping is achieved via the use of a switched capacitor circuit technique. The circuit is incorporated into the active adder in a low-distortion structure. The supporting clock generation circuit that provides additional phases of clocks with the enhancement block is also implemented in the CMOS logic gates. A digital dynamic element matching circuit (i.e., segmented data-weighted-average circuit) is designed to reduce mismatch errors caused by the feedback DAC of modulator. A test chip, fabricated in a 0.18-µm CMOS process, provides a signal-to-noise+distortion ratio (SNDR) of 75-dB for a 1.0-MHz signal bandwidth clocked at 40-MHz. The 2nd harmonic is -101dB and the 3rd harmonic is -94dB when a -4.5-dB 100-kHz input signal is applied.

  20. Multi-Purpose Low Voltage Dual Output DC-DC Converter For 100V Power Bus Telecom Platform

    NASA Astrophysics Data System (ADS)

    Galiana, D.; Mollard, J. M.

    2011-10-01

    The decreasing supply voltages of digital electronic and high speed ADC (Analog to Digital Converter) and DAC (Digital to Analog Converter) require flexible and high current secondary power distribution system. In the frame of the Inmarsat I-XL program, a 12 kW geomobile SatCom satellite, with 100 V regulated power bus, a multi purpose dual output converter was developed for the payload processor as a building block. After a short introduction on the main performance requirements, the baseline architecture is presented. The main drivers of the architecture are reliability, adjustability, radiation tolerant and single event free, volume and mass. The combination of all these constraints highlights the need of significant breakthrough in various domains. Many research results related to packaging and power electronic topics are brought up. These results directly drive the adopted solution presented in the next step followed by a description of the integration of the defined building block in the Inmarsat I-XL payload IP (Integrated Processor). Finally, the main electrical performances such as output ripple and spikes, load step transient and stability are summarized.

  1. A 110-nW in-channel sigma-delta converter for large-scale neural recording implants.

    PubMed

    Rezaei, M; Maghsoudloo, E; Sawan, M; Gosselin, B

    2016-08-01

    Advancement in wireless and microsystems technology have ushered in new devices that can directly interface with the central nervous system for stimulating and/or monitoring neural circuitry. In this paper, we present an ultra low-power sigma-delta analog-to-digital converter (ADC) intended for utilization into large-scale multi-channel neural recording implants. This proposed design, which provides a resolution of 9 bits using a one-bit oversampled ADC, presents several desirable features that allow for an in-channel ADC scheme, where one sigma-delta converter is provided for each channel, enabling development of scalable systems that can interface with different types of high-density neural microprobes. The proposed circuit, which have been fabricated in a TSMC 180-nm CMOS process, employs a first order noise shaping topology with a passive integrator and a low-supply voltage of 0.6 V to achieve ultra low-power consumption and small size. The proposed ADC clearly outperforms other designs with a power consumption as low as 110 nW for a precision of 9 bits (11-fJ per conversion), a silicon area of only 82 μm × 84 μm and one of the best reported figure of merit among recently published data converters utilized in similar applications.

  2. Reduction of influence of gain errors on performance of adaptive sub-ranging A/D converters with simplified architecture

    NASA Astrophysics Data System (ADS)

    Jedrzejewski, Konrad; Malkiewicz, Łukasz

    2016-09-01

    The paper presents the results of studies pertaining to the influence of gain errors of inter-stage amplifiers on performance of adaptive sub-ranging analog-to-digital converters (ADCs). It focuses on adaptive sub-ranging ADCs with simplified architecture of the analog part - using only one amplifier and a low resolution digital-to-analog converter, that is identical to that of known conventional sub-ranging ADCs. The only difference between adaptive subranging ADCs with simplified architecture and conventional sub-ranging ADCs is the process of determination of output codes of converted samples. The adaptive sub-ranging ADCs calculate the output codes on the basis of sub-codes obtained in particular stages of conversion using an adaptive algorithm. Thanks to application of the optimal adaptive algorithm, adjusted to the parameters of possible components imperfections and internal noises, the adaptive ADCs outperform, in terms of effective resolution per cycle, conventional sub-ranging ADCs forming the output codes using simple lower-level bit operations. Optimization of the conversion algorithm used in adaptive ADCs leads however to high sensitivity of adaptive ADCs performance to the inter-stage gain error. An effective method for reduction of this sensitivity in adaptive sub-ranging ADCs with simplified architecture is proposed and discussed in the paper.

  3. Feasibility study for convertible engine torque converter

    NASA Technical Reports Server (NTRS)

    1985-01-01

    The feasibility study has shown that a dump/fill type torque converter has excellent potential for the convertible fan/shaft engine. The torque converter space requirement permits internal housing within the normal flow path of a turbofan engine at acceptable engine weight. The unit permits operating the engine in the turboshaft mode by decoupling the fan. To convert to turbofan mode, the torque converter overdrive capability bring the fan speed up to the power turbine speed to permit engagement of a mechanical lockup device when the shaft speed are synchronized. The conversion to turbofan mode can be made without drop of power turbine speed in less than 10 sec. Total thrust delivered to the aircraft by the proprotor, fan, and engine during tansient can be controlled to prevent loss of air speed or altitude. Heat rejection to the oil is low, and additional oil cooling capacity is not required. The turbofan engine aerodynamic design is basically uncompromised by convertibility and allows proper fan design for quiet and efficient cruise operation. Although the results of the feasibility study are exceedingly encouraging, it must be noted that they are based on extrapolation of limited existing data on torque converters. A component test program with three trial torque converter designs and concurrent computer modeling for fluid flow, stress, and dynamics, updated with test results from each unit, is recommended.

  4. Wide-Dynamic-Range Analog-to-Digital Conversion for HFDF.

    DTIC Science & Technology

    1986-11-01

    FIELD GROUP SUB-GROUP High-frequency direction finder (HFDF), lasers , fiber optics, switches, a. ,~esed~cea~ ad .Ab4 digitization, noise/jammer...dynamic-range digitization of wideband HFDF data, using a synchronously driven laser /fiber-optic system. Development activity reported is in the areas...dynamic- range digitization of wideband HFDF data, using a synchronously driven laser /fiber-optic system. The background of the concept and previous work

  5. Conversion of the Defense Communications System from Analog to Digital Form.

    DTIC Science & Technology

    1974-06-01

    Digital Services ," Proceedings of the IEEE, LX, No. 11 (November 1972), 1352. I p. 1353. 69Allen R. Worley, "The DATRAN System," Proceedings o t he IEE...August 1973, entire issue. Cox, J. E. "Western Union Digital Services ." Proceedings of the IEEE, LX, No. 11 (November 1972), 1350-57. "Crosstalk." Lenkurt

  6. Compact FPGA-based beamformer using oversampled 1-bit A/D converters.

    PubMed

    Tomov, Borislav Gueorguiev; Jensen, Jørgen Arendt

    2005-05-01

    A compact medical ultrasound beamformer architecture that uses oversampled 1-bit analog-to-digital (A/D) converters is presented. Sparse sample processing is used, as the echo signal for the image lines is reconstructed in 512 equidistant focal points along the line through its in-phase and quadrature components. That information is sufficient for presenting a B-mode image and creating a color flow map. The high sampling rate provides the necessary delay resolution for the focusing. The low channel data width (1-bit) makes it possible to construct a compact beamformer logic. The signal reconstruction is done using finite impulse reponse (FIR) filters, applied on selected bit sequences of the delta-sigma modulator output stream. The approach allows for a multichannel beamformer to fit in a single field programmable gate array (FPGA) device. A 32-channel beamformer is estimated to occupy 50% of the available logic resources in a commercially available mid-range FPGA, and to be able to operate at 129 MHz. Simulation of the architecture at 140 MHz provides images with a dynamic range approaching 60 dB for an excitation frequency of 3 MHz.

  7. Technologies for converter topologies

    DOEpatents

    Zhou, Yan; Zhang, Haiyu

    2017-02-28

    In some embodiments of the disclosed inverter topologies, an inverter may include a full bridge LLC resonant converter, a first boost converter, and a second boost converter. In such embodiments, the first and second boost converters operate in an interleaved manner. In other disclosed embodiments, the inverter may include a half-bridge inverter circuit, a resonant circuit, a capacitor divider circuit, and a transformer.

  8. A high-resolution time-to-digital converter using a three-level resolution

    NASA Astrophysics Data System (ADS)

    Dehghani, Asma; Saneei, Mohsen; Mahani, Ali

    2016-08-01

    In this article, a three-level resolution Vernier delay line time-to-digital converter (TDC) was proposed. The proposed TDC core was based on the pseudo-differential digital architecture that made it insensitive to nMOS and pMOS transistor mismatches. It also employed a Vernier delay line (VDL) in conjunction with an asynchronous read-out circuitry. The time interval resolution was equal to the difference of delay between buffers of upper and lower chains. Then, via the extra chain included in the lower delay line, resolution was controlled and power consumption was reduced. This method led to high resolution and low power consumption. The measurement results of TDC showed a resolution of 4.5 ps, 12-bit output dynamic range, and integral nonlinearity of 1.5 least significant bits. This TDC achieved the consumption of 68.43 µW from 1.1-V supply.

  9. Rotorcraft convertible engine study

    NASA Technical Reports Server (NTRS)

    Gill, J. C.; Earle, R. V.; Mar, H. M.

    1982-01-01

    The objective of the Rotorcraft Convertible Engine Study was to define future research and technology effort required for commercial development by 1988 of convertible fan/shaft gas turbine engines for unconventional rotorcraft transports. Two rotorcraft and their respective missions were defined: a Fold Tilt Rotor aircraft and an Advancing Blade Concept (ABC) rotorcraft. Sensitivity studies were conducted with these rotorcraft to determine parametrically the influence of propulsion characteristics on aircraft size, mission fuel requirements, and direct operating costs (DOC). The two rotorcraft were flown with conventional propulsion systems (separate lift/cruise engines) and with convertible propulsion systems to determine the benefits to be derived from convertible engines. Trade-off studies were conducted to determine the optimum engine cycle and staging arrangement for a convertible engine. Advanced technology options applicable to convertible engines were studied. Research and technology programs were identified which would ensure technology readiness for commercial development of convertible engines by 1988.

  10. Converter of rotating-transformer signals to code of successive-approximation angle

    NASA Astrophysics Data System (ADS)

    Domrachev, V. G.; Podolyan, V. A.

    1986-01-01

    A cyclic converter of signals from a rotating sine-cosine resolver transformer to a binary code of the angle through successive approximation was designed with large to small scale circuit integration. Its two channels yield informative outputs of 12-bit word length. The conversion process is conventional, with mismatch signals being formed in accordance with the algorithms and then reduced to zero digit by digit by the method of successive approximations. Variable input signals are converted into constant ones with the aid of a sampler-storage device. Other converter components are a read-only memory with synchronous pulse energizing and synchronous code recording, a digital to analog converter, four sign-inverting analog switches, a comparator with summation of products at the input and a trigger transmitting the somparator output signal to a successive approximations register, as well as analog switches for channel commutation and function commutation, operational amplifier, and resistor banks. Functions are recorded in the memory without deficiency, owing to addition of a modified memory which records codes with excess.

  11. Interleaved power converter

    DOEpatents

    Zhu, Lizhi

    2007-11-13

    A power converter architecture interleaves full bridge converters to alleviate thermal management problems in high current applications, and may, for example, double the output power capability while reducing parts count and costs. For example, one phase of a three phase inverter is shared between two transformers, which provide power to a rectifier such as a current doubler rectifier to provide two full bridge DC/DC converters with three rather than four high voltage inverter legs.

  12. The photoelectric displacement converter

    NASA Astrophysics Data System (ADS)

    Dragoner, Valeriu V.

    2005-02-01

    In the article are examined questions of constructing photoelectric displacement converter satisfying demands that are stated above. Converter has channels of approximate and precise readings. The approximate reading may be accomplished either by the method of reading from a code mask or by the method of the consecutive calculation of optical scale gaps number. Phase interpolator of mouar strips" gaps is determined as a precise measuring. It is shown mathematical model of converter that allow evaluating errors and operating speed of conversion.

  13. PWM converter topologies

    NASA Astrophysics Data System (ADS)

    Meerman, E. R. W.; Spruyt, H. J. N.

    1989-08-01

    Dc to dc converters using an electrical switch to control power flow between a dc source and a dc load are discussed. Only Pulse Width Modulation (PWM) type converter topologies are considered. A basic three element, three terminal converter topology is defined followed by two universal rules allowing for derivation of a wide variety of different topologies. A summary of different topology types is provided with steady state and small signal relations given for each. The survey shows 46 converter topologies of which 18 are known and 28 are new (under, patent application). The number of topologies could be increased to 68 if negative input voltages are considered.

  14. THERMIONIC CONVERTER SURFACE CONDITIONS.

    DTIC Science & Technology

    THERMIONIC CONVERTERS , *THERMIONIC EMISSION, SURFACE PROPERTIES, MATERIALS, CESIUM, VAPORS, NIOBIUM COMPOUNDS, CARBIDES, MOLYBDENUM, TANTALUM, TUNGSTEN, NICKEL, RHENIUM, ELECTRODES, VOLTAGE, PERFORMANCE(ENGINEERING).

  15. HEAT DIODE CONVERTER

    DTIC Science & Technology

    DIODES, * ELECTRIC POWER PRODUCTION, *REFRACTORY MATERIALS, *THERMIONIC EMISSION, CESIUM, COPPER, DISCHARGE TUBES, ELECTRONS, EVAPORATION, MOLYBDENUM...PLASMAS(PHYSICS), POWER SUPPLIES, REFLECTION, THERMAL CONDUCTIVITY, THERMIONIC CONVERTERS , VAPORS.

  16. FISSION HEAT DIODE CONVERTER

    DTIC Science & Technology

    CESIUM, *DIODES, * ELECTRIC POWER PRODUCTION, ADSORPTION, AUXILIARY POWER PLANTS, ELECTRONS, OSCILLATION, PLASMAS(PHYSICS), POWER SUPPLIES...SCATTERING, SOURCES, SPACECRAFT, THERMAL CONDUCTIVITY, THERMIONIC CONVERTERS , THERMIONIC EMISSION, TUNGSTEN, VAPORS

  17. Photocapacitive image converter

    NASA Astrophysics Data System (ADS)

    Miller, W. E.; Sher, A.; Tsuo, Y. H.

    1982-05-01

    An apparatus for converting a radiant energy image into corresponding electrical signals including an image converter is described. The image converter includes a substrate of semiconductor material, an insulating layer on the front surface of the substrate, and an electrical contact on the back surface of the substrate. A first series of parallel transparent conductive stripes is on the insulating layer with a processing circuit connected to each of the conductive stripes for detecting the modulated voltages generated thereon. In a first embodiment of the invention, a modulated light stripe perpendicular to the conductive stripes scans the image converter. In a second embodiment a second insulating layer is deposited over the conductive stripes and a second series of parallel transparent conductive stripes perpendicular to the first series is on the second insulating layer. A different frequency current signal is applied to each of the second series of conductive stripes and a modulated image is applied to the image converter.

  18. Cascaded resonant bridge converters

    NASA Technical Reports Server (NTRS)

    Stuart, Thomas A. (Inventor)

    1989-01-01

    A converter for converting a low voltage direct current power source to a higher voltage, high frequency alternating current output for use in an electrical system where it is desired to use low weight cables and other circuit elements. The converter has a first stage series resonant (Schwarz) converter which converts the direct current power source to an alternating current by means of switching elements that are operated by a variable frequency voltage regulator, a transformer to step up the voltage of the alternating current, and a rectifier bridge to convert the alternating current to a direct current first stage output. The converter further has a second stage series resonant (Schwarz) converter which is connected in series to the first stage converter to receive its direct current output and convert it to a second stage high frequency alternating current output by means of switching elements that are operated by a fixed frequency oscillator. The voltage of the second stage output is controlled at a relatively constant value by controlling the first stage output voltage, which is accomplished by controlling the frequency of the first stage variable frequency voltage controller in response to second stage voltage. Fault tolerance in the event of a load short circuit is provided by making the operation of the first stage variable frequency voltage controller responsive to first and second stage current limiting devices. The second stage output is connected to a rectifier bridge whose output is connected to the input of the second stage to provide good regulation of output voltage wave form at low system loads.

  19. Pixel-level continuous-time incremental sigma-delta A/D converter for THz sensors

    NASA Astrophysics Data System (ADS)

    Khatib, Moustafa; Perenzoni, Matteo

    2016-04-01

    A readout channel based on continuous-time incremental sigma-delta analog-to-digital converter for FET-based terahertz (THz) imaging applications was implemented in a 0.15 μm standard CMOS technology. The designed readout circuit is suitable for implementation in pixel arrays due to its compact size and power consumption. The system-level analysis used to define the modulator parameters and to specify its analog building blocks is presented. The loop filter has been realized by using a Gm-C integrator. Circuit linearization techniques have been implemented to improve the linearity of the transconductor cell and reduce the impact of parasitic capacitances. Moreover, chopper stabilization technique is adopted in the loop filter, significantly reducing the low-frequency flicker noise thereby preserving the Noise Equivalent Power (NEP) of the FET detector within the required specifications of minimum detectable signal. The resulting input referred noise voltage is 87.5 nV/√Hz . The incremental ADC achieves 68-dB peak signal-to-noise-and-distortion-ratio (SNDR), equivalent to 11 bits effective resolution over 1 kHz signal bandwidth at 1 MHz sampling frequency. In order to meet the requirements of large sensor arrays, a first order architecture is realized. This leads to lower area occupancy and power consumption. The readout circuit draws 80 μW of power from a supply voltage of 1.8 V. The channel occupies an area of 90 x 273μm2.

  20. Advanced thermionic converter development

    NASA Technical Reports Server (NTRS)

    Huffman, F. N.; Lieb, D.; Briere, T. R.; Sommer, A. H.; Rufeh, F.

    1976-01-01

    Recent progress at Thermo Electron in developing advanced thermionic converters is summarized with particular attention paid to the development of electrodes, diodes, and triodes. It is found that one class of materials (ZnO, BaO and SrO) provides interesting cesiated work functions (1.3-1.4 eV) without additional oxygen. The second class of materials studied (rare earth oxides and hexaborides) gives cesiated/oxygenated work functions of less than 1.2 eV. Five techniques of oxygen addition to thermionic converters are discussed. Vapor deposited tungsten oxide collector diodes and the reflux converter are considered.

  1. Microminiature thermionic converters

    DOEpatents

    King, Donald B.; Sadwick, Laurence P.; Wernsman, Bernard R.

    2001-09-25

    Microminiature thermionic converts (MTCs) having high energy-conversion efficiencies and variable operating temperatures. Methods of manufacturing those converters using semiconductor integrated circuit fabrication and micromachine manufacturing techniques are also disclosed. The MTCs of the invention incorporate cathode to anode spacing of about 1 micron or less and use cathode and anode materials having work functions ranging from about 1 eV to about 3 eV. Existing prior art thermionic converter technology has energy conversion efficiencies ranging from 5-15%. The MTCs of the present invention have maximum efficiencies of just under 30%, and thousands of the devices can be fabricated at modest costs.

  2. Digital scale converter

    DOEpatents

    Upton, Richard G.

    1978-01-01

    A digital scale converter is provided for binary coded decimal (BCD) conversion. The converter may be programmed to convert a BCD value of a first scale to the equivalent value of a second scale according to a known ratio. The value to be converted is loaded into a first BCD counter and counted down to zero while a second BCD counter registers counts from zero or an offset value depending upon the conversion. Programmable rate multipliers are used to generate pulses at selected rates to the counters for the proper conversion ratio. The value present in the second counter at the time the first counter is counted to the zero count is the equivalent value of the second scale. This value may be read out and displayed on a conventional seven-segment digital display.

  3. Thermionic photovoltaic energy converter

    NASA Technical Reports Server (NTRS)

    Chubb, D. L. (Inventor)

    1985-01-01

    A thermionic photovoltaic energy conversion device comprises a thermionic diode mounted within a hollow tubular photovoltaic converter. The thermionic diode maintains a cesium discharge for producing excited atoms that emit line radiation in the wavelength region of 850 nm to 890 nm. The photovoltaic converter is a silicon or gallium arsenide photovoltaic cell having bandgap energies in this same wavelength region for optimum cell efficiency.

  4. AC/DC converter

    NASA Astrophysics Data System (ADS)

    Jain, Praveen K.

    1992-08-01

    In a system such as a 20 kHz space station primary electrical power distribution system, power conversion from AC to DC is required. Some of the basic requirements for this conversion are high efficiency, light weight and small volume, regulated output voltage, close to unity input power factor, distortionless input current, soft-starting, low electromagnetic interference, and high reliability. An AC-to-DC converter is disclosed which satisfies the main design objectives of such converters for use in space. The converter of the invention comprises an input transformer, a resonant network, a current controller, a diode rectifier, and an output filter. The input transformer is for connection to a single phase, high frequency, sinusoidal waveform AC voltage source and provides a matching voltage isolating from the AC source. The resonant network converts this voltage to a sinusoidal, high frequency bidirectional current output, which is received by the current controller to provide the desired output current. The diode rectifier is connected in parallel with the current controller to convert the bidirectional current into a unidirectional current output. The output filter is connected to the rectifier to provide an essentially ripple-free, substantially constant voltage DC output.

  5. Vector generator scan converter

    DOEpatents

    Moore, J.M.; Leighton, J.F.

    1988-02-05

    High printing speeds for graphics data are achieved with a laser printer by transmitting compressed graphics data from a main processor over an I/O channel to a vector generator scan converter which reconstructs a full graphics image for input to the laser printer through a raster data input port. The vector generator scan converter includes a microprocessor with associated microcode memory containing a microcode instruction set, a working memory for storing compressed data, vector generator hardware for drawing a full graphic image from vector parameters calculated by the microprocessor, image buffer memory for storing the reconstructed graphics image and an output scanner for reading the graphics image data and inputting the data to the printer. The vector generator scan converter eliminates the bottleneck created by the I/O channel for transmitting graphics data from the main processor to the laser printer, and increases printer speed up to thirty fold. 7 figs.

  6. Vector generator scan converter

    DOEpatents

    Moore, James M.; Leighton, James F.

    1990-01-01

    High printing speeds for graphics data are achieved with a laser printer by transmitting compressed graphics data from a main processor over an I/O (input/output) channel to a vector generator scan converter which reconstructs a full graphics image for input to the laser printer through a raster data input port. The vector generator scan converter includes a microprocessor with associated microcode memory containing a microcode instruction set, a working memory for storing compressed data, vector generator hardward for drawing a full graphic image from vector parameters calculated by the microprocessor, image buffer memory for storing the reconstructed graphics image and an output scanner for reading the graphics image data and inputting the data to the printer. The vector generator scan converter eliminates the bottleneck created by the I/O channel for transmitting graphics data from the main processor to the laser printer, and increases printer speed up to thirty fold.

  7. Thermionic energy converters

    DOEpatents

    Monroe, Jr., James E.

    1977-08-09

    A thermionic device for converting nuclear energy into electrical energy comprising a tubular anode spaced from and surrounding a cylindrical cathode, the cathode having an outer emitting surface of ruthenium, and nuclear fuel on the inner cylindrical surface. The nuclear fuel is a ceramic composition of fissionable material in a metal matrix. An axial void is provided to collect and contain fission product gases.

  8. Liquid metal thermal electric converter

    DOEpatents

    Abbin, Joseph P.; Andraka, Charles E.; Lukens, Laurance L.; Moreno, James B.

    1989-01-01

    A liquid metal thermal electric converter which converts heat energy to electrical energy. The design of the liquid metal thermal electric converter incorporates a unique configuration which directs the metal fluid pressure to the outside of the tube which results in the structural loads in the tube to be compressive. A liquid metal thermal electric converter refluxing boiler with series connection of tubes and a multiple cell liquid metal thermal electric converter are also provided.

  9. Digital to synchro converter

    NASA Technical Reports Server (NTRS)

    Predina, Joseph P. (Inventor)

    1989-01-01

    A digital-to-synchro converter is provided where a binary input code specifies a desired shaft angle and where an resolver type position transducer is employed with additional circuitry to generate a shaft position error signal indicative of the angular difference between the desired shaft angle and the actual shaft angle. The additional circuitry corrects for known and calculated errors in the shaft position detection process and equipment.

  10. RAW to UIMF Converter

    SciTech Connect

    2016-06-09

    The RAW to Unified Ion Mobility File (UIMF) converter is a software application that takes LC MS scans from a Thermo RAW file and translates them into ion mobility scans compatible with the UIMF file format. The converter calculates the number of points to generate for the UIMF format by estimating the coefficients of a power function, which models the way in which FTMS data is collected. Once the coefficients are estimated (using a standard Gauss-Newton solver), an m/z mesh is created using standard m/z ppm calculations. This mesh is then used as a basis for translating the m/z intensity pairs from the Thermo RAW file to the UIMF format. Due to non-uniform spacing of m/z values in RAW spectra, a simple linear interpolation is applied to the UIMF format after assigning all m/z values in the mesh in order to fill in gaps. Finally, the converter can perform singly or doubly demultiplexing of encoded ion mobility chromtograms, depending on user selected options during the conversion process. This operation is performed after the UIMF file has been generated.

  11. Multilevel converters -- A new breed of power converters

    SciTech Connect

    Lai, J.S.; Peng, F.Z. |

    1995-09-01

    Multilevel voltage source converters are emerging as a new breed of power converter options for high-power applications. The multilevel voltage source converters typically synthesize the staircase voltage wave from several levels of dc capacitor voltages. One of the major limitations of the multilevel converters is the voltage unbalance between different levels. The techniques to balance the voltage between different levels normally involve voltage clamping or capacitor charge control. There are several ways of implementing voltage balance in multilevel converters. Without considering the traditional magnetic coupled converters, this paper presents three recently developed multilevel voltage source converters: (1) diode-clamp, (2) flying-capacitors, and (3) cascaded-inverters with separate dc sources. The operating principle, features, constraints, and potential applications of these converters will be discussed.

  12. Architectural Exploration and Design of Time-Interleaved SAR Arrays for Low-Power and High Speed A/D Converters

    NASA Astrophysics Data System (ADS)

    Saponara, Sergio; Nuzzo, Pierluigi; Nani, Claudio; van der Plas, Geert; Fanucci, Luca

    Time-interleaved (TI) analog-to-digital converters (ADCs) are frequently advocated as a power-efficient solution to realize the high sampling rates required in single-chip transceivers for the emerging communication schemes: ultra-wideband, fast serial links, cognitive-radio and software-defined radio. However, the combined effects of multiple distortion sources due to channel mismatches (bandwidth, offset, gain and timing) severely affect system performance and power consumption of a TI ADC and need to be accounted for since the earlier design phases. In this paper, system-level design of TI ADCs is addressed through a platform-based methodology, enabling effective investigation of different speed/resolution scenarios as well as the impact of parallelism on accuracy, yield, sampling-rate, area and power consumption. Design space exploration of a TI successive approximation ADC is performed top-down via Monte Carlo simulations, by exploiting behavioral models built bottom-up after characterizing feasible implementations of the main building blocks in a 90-nm 1-V CMOS process. As a result, two implementations of the TI ADC are proposed that are capable to provide an outstanding figure-of-merit below 0.15pJ/conversion-step.

  13. Stellar photometry including saturated images: Results on M67 with WFPC2

    NASA Technical Reports Server (NTRS)

    Gilliland, Ronald L.

    1994-01-01

    The Wide Field and Planetary Camera 2 (WFPC2) on Hubble Space Telescope (HST) is providing unsurpassed imaging capabilities and supporting accurate stellar photometry over large fields of view at high angular resolution. I discuss a feature of the WFPC2 CCD systems that nominally limits the dynamic range attainable with single exposures: a 12 bit analog to digital converter that does not allow sampling of the CCD full-well depth even at the low gain (14e(sup -)/DN) setting. I demonstrate that accurate stellar photometry can be performed on stellar images that are strongly saturated. Two 40 s exposures in V and I bands on the old open cluster M67 are analyzed to demonstrate photometric capabilities with a dynamic range of over 12 mag from single exposures. New photometric results for both bright and faint objects in M67 are derived from the WFPC2 data.

  14. Signal conditioning circuitry design for instrumentation systems.

    SciTech Connect

    Larsen, Cory A.

    2012-01-01

    This report details the current progress in the design, implementation, and validation of the signal conditioning circuitry used in a measurement instrumentation system. The purpose of this text is to document the current progress of a particular design in signal conditioning circuitry in an instrumentation system. The input of the signal conditioning circuitry comes from a piezoresistive transducer and the output will be fed to a 250 ksps, 12-bit analog-to-digital converter (ADC) with an input range of 0-5 V. It is assumed that the maximum differential voltage amplitude input from the sensor is 20 mV with an unknown, but presumably high, sensor bandwidth. This text focuses on a specific design; however, the theory is presented in such a way that this text can be used as a basis for future designs.

  15. Cycloidal Wave Energy Converter

    SciTech Connect

    Stefan G. Siegel, Ph.D.

    2012-11-30

    This program allowed further advancing the development of a novel type of wave energy converter, a Cycloidal Wave Energy Converter or CycWEC. A CycWEC consists of one or more hydrofoils rotating around a central shaft, and operates fully submerged beneath the water surface. It operates under feedback control sensing the incoming waves, and converts wave power to shaft power directly without any intermediate power take off system. Previous research consisting of numerical simulations and two dimensional small 1:300 scale wave flume experiments had indicated wave cancellation efficiencies beyond 95%. The present work was centered on construction and testing of a 1:10 scale model and conducting two testing campaigns in a three dimensional wave basin. These experiments allowed for the first time for direct measurement of electrical power generated as well as the interaction of the CycWEC in a three dimensional environment. The Atargis team successfully conducted two testing campaigns at the Texas A&M Offshore Technology Research Center and was able to demonstrate electricity generation. In addition, three dimensional wave diffraction results show the ability to achieve wave focusing, thus increasing the amount of wave power that can be extracted beyond what was expected from earlier two dimensional investigations. Numerical results showed wave cancellation efficiencies for irregular waves to be on par with results for regular waves over a wide range of wave lengths. Using the results from previous simulations and experiments a full scale prototype was designed and its performance in a North Atlantic wave climate of average 30kW/m of wave crest was estimated. A full scale WEC with a blade span of 150m will deliver a design power of 5MW at an estimated levelized cost of energy (LCOE) in the range of 10-17 US cents per kWh. Based on the new results achieved in the 1:10 scale experiments these estimates appear conservative and the likely performance at full scale will

  16. Gallium phosphide energy converters

    NASA Technical Reports Server (NTRS)

    Sims, P. E.; Dinetta, L. C.; Goetz, M. A.

    1995-01-01

    Gallium phosphide (GaP) energy converters may be successfully deployed to provide new mission capabilities for spacecraft. Betavoltaic power supplies based on the conversion of tritium beta decay to electricity using GaP energy converters can supply long term low-level power with high reliability. High temperature solar cells, also based on GaP, can be used in inward-bound missions greatly reducing the need for thermal dissipation. Results are presented for GaP direct conversion devices powered by Ni-63 and compared to the conversion of light emitted by tritiarated phosphors. Leakage currents as low as 1.2 x 10(exp -17) A/sq cm have been measured and the temperature dependence of the reverse saturation current is found to have ideal behavior. Temperature dependent IV, QE, R(sub sh), and V(sub oc) results are also presented. These data are used to predict the high-temperature solar cell and betacell performance of GaP devices and suggest appropriate applications for the deployment of this technology.

  17. Bidirectional buck boost converter

    DOEpatents

    Esser, A.A.M.

    1998-03-31

    A bidirectional buck boost converter and method of operating the same allows regulation of power flow between first and second voltage sources in which the voltage level at each source is subject to change and power flow is independent of relative voltage levels. In one embodiment, the converter is designed for hard switching while another embodiment implements soft switching of the switching devices. In both embodiments, first and second switching devices are serially coupled between a relatively positive terminal and a relatively negative terminal of a first voltage source with third and fourth switching devices serially coupled between a relatively positive terminal and a relatively negative terminal of a second voltage source. A free-wheeling diode is coupled, respectively, in parallel opposition with respective ones of the switching devices. An inductor is coupled between a junction of the first and second switching devices and a junction of the third and fourth switching devices. Gating pulses supplied by a gating circuit selectively enable operation of the switching devices for transferring power between the voltage sources. In the second embodiment, each switching device is shunted by a capacitor and the switching devices are operated when voltage across the device is substantially zero. 20 figs.

  18. Bidirectional buck boost converter

    DOEpatents

    Esser, Albert Andreas Maria

    1998-03-31

    A bidirectional buck boost converter and method of operating the same allows regulation of power flow between first and second voltage sources in which the voltage level at each source is subject to change and power flow is independent of relative voltage levels. In one embodiment, the converter is designed for hard switching while another embodiment implements soft switching of the switching devices. In both embodiments, first and second switching devices are serially coupled between a relatively positive terminal and a relatively negative terminal of a first voltage source with third and fourth switching devices serially coupled between a relatively positive terminal and a relatively negative terminal of a second voltage source. A free-wheeling diode is coupled, respectively, in parallel opposition with respective ones of the switching devices. An inductor is coupled between a junction of the first and second switching devices and a junction of the third and fourth switching devices. Gating pulses supplied by a gating circuit selectively enable operation of the switching devices for transferring power between the voltage sources. In the second embodiment, each switching device is shunted by a capacitor and the switching devices are operated when voltage across the device is substantially zero.

  19. Bidirectional DC/DC Converter

    NASA Astrophysics Data System (ADS)

    Pedersen, F.

    2008-09-01

    The presented bidirectional DC/DC converter design concept is a further development of an already existing converter used for low battery voltage operation.For low battery voltage operation a high efficient low parts count DC/DC converter was developed, and used in a satellite for the battery charge and battery discharge function.The converter consists in a bidirectional, non regulating DC/DC converter connected to a discharge regulating Buck converter and a charge regulating Buck converter.The Bidirectional non regulating DC/DC converter performs with relatively high efficiency even at relatively high currents, which here means up to 35Amps.This performance was obtained through the use of power MOSFET's with on- resistances of only a few mille Ohms connected to a special transformer allowing paralleling several transistor stages on the low voltage side of the transformer. The design is patent protected. Synchronous rectification leads to high efficiency at the low battery voltages considered, which was in the range 2,7- 4,3 Volt DC.The converter performs with low switching losses as zero voltage zero current switching is implemented in all switching positions of the converter.Now, the drive power needed, to switch a relatively large number of low Ohm , hence high drive capacitance, power MOSFET's using conventional drive techniques would limit the overall conversion efficiency.Therefore a resonant drive consuming considerable less power than a conventional drive circuit was implemented in the converter.To the originally built and patent protected bidirectional non regulating DC/DC converter, is added the functionality of regulation.Hereby the need for additional converter stages in form of a Charge Buck regulator and a Discharge Buck regulator is eliminated.The bidirectional DC/DC converter can be used in connection with batteries, motors, etc, where the bidirectional feature, simple design and high performance may be useful.

  20. Unity power factor converter

    NASA Technical Reports Server (NTRS)

    Wester, Gene W. (Inventor)

    1980-01-01

    A unity power factor converter capable of effecting either inversion (dc-to-dc) or rectification (ac-to-dc), and capable of providing bilateral power control from a DC source (or load) through an AC transmission line to a DC load (or source) for power flow in either direction, is comprised of comparators for comparing the AC current i with an AC signal i.sub.ref (or its phase inversion) derived from the AC ports to generate control signals to operate a switch control circuit for high speed switching to shape the AC current waveform to a sine waveform, and synchronize it in phase and frequency with the AC voltage at the AC ports, by selectively switching the connections to a series inductor as required to increase or decrease the current i.

  1. Two new methanol converters

    SciTech Connect

    Westerterp, K.R.; Bodewes, T.N.; Vrijiand, M.S.A.; Kuczynski, M. )

    1988-11-01

    Two novel converter systems were developed for the manufacture of methanol from synthesis gas: the Gas-Solid-Solid Trickle Flow Reactor (GSSTFR) and the Reactor System with Interstage Product Removal (RSIPR). In the GSSTFR version, the product formed at the catalyst surface is directly removed from the reaction zone by means of a solid adsorbent. This adsorbent continuously trickles over the catalyst bed. High reactant conversions up to 100% can be achieved in a single pass so that the usual recycle loop for the unconverted reactants is absent or greatly reduced in size. In the RSIPR version, high conversions per pass are achieved in a series of adiabatic or isothermal fixed bed reactors with selective product removal in absorbers between the reactor stages. The feasibility and economics of the two systems are discussed on the basis of 1,000 tpd methanol plants compared with a low-pressure Lurgi system.

  2. Electromagnetic wave energy converter

    NASA Technical Reports Server (NTRS)

    Bailey, R. L. (Inventor)

    1973-01-01

    Electromagnetic wave energy is converted into electric power with an array of mutually insulated electromagnetic wave absorber elements each responsive to an electric field component of the wave as it impinges thereon. Each element includes a portion tapered in the direction of wave propagation to provide a relatively wideband response spectrum. Each element includes an output for deriving a voltage replica of the electric field variations intercepted by it. Adjacent elements are positioned relative to each other so that an electric field subsists between adjacent elements in response to the impinging wave. The electric field results in a voltage difference between adjacent elements that is fed to a rectifier to derive dc output power.

  3. Fluorescent radiation converter

    NASA Technical Reports Server (NTRS)

    Viehmann, W. (Inventor)

    1981-01-01

    A fluorescence radiation converter is described which includes a substantially undoped optically transparent substrate and a waveshifter coating deposited on at least one portion of the substrate for absorption of radiation and conversion of fluorescent radiation. The coating is formed to substantially 1000 g/liter of a solvent, 70 to 200 g/liter of an organic polymer, and 0.2 to 25 g/liter of at least one organic fluorescent dye. The incoming incident radiation impinges on the coating. Radiation is absorbed by the fluorescent dye and is re-emitted as a longer wavelength radiation. Radiation is trapped within the substrate and is totally internally reflected by the boundary surface. Emitted radiation leaves the substrate ends to be detected.

  4. Turbo-Brayton Power Converter

    NASA Technical Reports Server (NTRS)

    Breedlove, Jeffrey

    2015-01-01

    Future NASA space missions will require advanced thermal-to-electric power converters that are reliable, efficient, and lightweight. Creare, LLC, is developing a turbo-Brayton power converter that offers high efficiency and specific power. The converter employs gas bearings to provide maintenance free, long-life operation. Discrete components can be packaged to fit optimally with other subsystems, and the converter's continuous gas flow can communicate directly with remote heat sources and heat rejection surfaces without the need for ancillary heat-transfer components and intermediate flow loops. Creare has completed detailed analyses, trade studies, fabrication trials, and preliminary designs for the components and converter assembly. The company is fabricating and testing a breadboard converter.

  5. Nanostructure Neutron Converter Layer Development

    NASA Technical Reports Server (NTRS)

    Park, Cheol (Inventor); Sauti, Godfrey (Inventor); Kang, Jin Ho (Inventor); Lowther, Sharon E. (Inventor); Thibeault, Sheila A. (Inventor); Bryant, Robert G. (Inventor)

    2016-01-01

    Methods for making a neutron converter layer are provided. The various embodiment methods enable the formation of a single layer neutron converter material. The single layer neutron converter material formed according to the various embodiments may have a high neutron absorption cross section, tailored resistivity providing a good electric field penetration with submicron particles, and a high secondary electron emission coefficient. In an embodiment method a neutron converter layer may be formed by sequential supercritical fluid metallization of a porous nanostructure aerogel or polyimide film. In another embodiment method a neutron converter layer may be formed by simultaneous supercritical fluid metallization of a porous nanostructure aerogel or polyimide film. In a further embodiment method a neutron converter layer may be formed by in-situ metalized aerogel nanostructure development.

  6. Self-powered microthermionic converter

    DOEpatents

    Marshall, Albert C.; King, Donald B.; Zavadil, Kevin R.; Kravitz, Stanley H.; Tigges, Chris P.; Vawter, Gregory A.

    2004-08-10

    A self-powered microthermionic converter having an internal thermal power source integrated into the microthermionic converter. These converters can have high energy-conversion efficiencies over a range of operating temperatures. Microengineering techniques are used to manufacture the converter. The utilization of an internal thermal power source increases potential for mobility and incorporation into small devices. High energy efficiency is obtained by utilization of micron-scale interelectrode gap spacing. Alpha-particle emitting radioisotopes can be used for the internal thermal power source, such as curium and polonium isotopes.

  7. Pulsed thermionic converter study

    NASA Technical Reports Server (NTRS)

    1976-01-01

    A nuclear electric propulsion concept using a thermionic reactor inductively coupled to a magnetoplasmadynamic accelerator (MPD arc jet) is described, and the results of preliminary analyses are presented. In this system, the MPD thruster operates intermittently at higher voltages and power levels than the thermionic generating unit. A typical thrust pulse from the MPD arc jet is characterized by power levels of 1 to 4 MWe, a duration of 1 msec, and a duty cycle of approximately 20%. The thermionic generating unit operates continuously but with a lower power level of approximately 0.4 MWe. Energy storage between thrust pulses is provided by building up a large current in an inductor using the output of the thermionic converter array. Periodically, the charging current is interrupted, and the energy stored in the magnetic field of the inductor is utilized for a short duration thrust pulse. The results of the preliminary analysis show that a coupling effectiveness of approximately 85 to 90% is feasible for a nominal 400 KWe system with an inductive unit suitable for a flight vehicle.

  8. A SAR-ADC using unit bridge capacitor and with calibration for the front-end electronics of PET imaging

    NASA Astrophysics Data System (ADS)

    Liu, Wei; Wei, Tingcun; Li, Bo; Yang, Lifeng; Xue, Feifei; Hu, Yongcai

    2016-05-01

    This paper presents a 12-bit 1 MS/s successive approximation register-analog to digital converter (SAR-ADC) for the 32-channel front-end electronics of CZT-based PET imaging system. To reduce the capacitance mismatch, instead of the fractional capacitor, the unit capacitor is used as the bridge capacitor in the split-capacitor digital to analog converter (DAC) circuit. In addition, in order to eliminate the periodical DNL errors of -1 LSB which often exists in the SAR-ADC using the charge-redistributed DAC, a calibration algorithm is proposed and verified by the experiments. The proposed 12-bit 1 MS/s SAR-ADC is designed and implemented using a 0.35 μm CMOS technology, it occupies only an active area of 986×956 μm2. The measurement results show that, at the power supply of 3.3/5.0 V and the sampling rate of 1 MS/s, the ADC with calibration has a signal-to-noise-and-distortion ratio (SINAD) of 67.98 dB, the power dissipation of 5 mW, and a figure of merit (FOM) of 2.44 pJ/conv.-step. This ADC is with the features of high accuracy, low power and small layout area, it is especially suitable to the one-chip integration of the front-end readout electronics.

  9. Proposed electromagnetic wave energy converter

    NASA Technical Reports Server (NTRS)

    Bailey, R. L.

    1973-01-01

    Device converts wave energy into electric power through array of insulated absorber elements responsive to field of impinging electromagnetic radiation. Device could also serve as solar energy converter that is potentially less expensive and fragile than solar cells, yet substantially more efficient.

  10. An Autonomous Circuit for the Measurement of Photovoltaic Devices Parameters.

    DTIC Science & Technology

    1986-09-01

    65 uses a procedure similar to method (1) to obtain solar cell I - V curves. Developed in 1985, the facility consists of five main components (Ref. 14...An Hewlett Packard 7475A plotter is used to plot solar cell I - V data. (2) Data Acquisition and Control Element A 12 bit, 4 channel analog-to-digital

  11. Wind/water energy converter

    NASA Technical Reports Server (NTRS)

    Paulkovich, J.

    1979-01-01

    Device will convert wind, water, tidal or wave energy into electrical or mechanical energy. Is comprised of windmill-like paddles or blades synchronously geared to orient themselves to wind direction for optimum energy extraction.

  12. STUDY OF A THERMOPHOTOVOLTAIC CONVERTER.

    DTIC Science & Technology

    MEASUREMENT, INSTRUMENTATION, ELECTRICAL RESISTANCE, VOLTAGE, ELECTRIC CURRENT, HEAT EXCHANGERS, THERMIONIC CONVERTERS , SILICON COMPOUNDS, CARBIDES, FUELS, HYDROCARBONS, PORTABLE EQUIPMENT....SEMICONDUCTOR), LIGHT TRANSMISSION, INFRARED RADIATION, REFLECTION, OPTICAL COATINGS, MIRRORS, PERFORMANCE(ENGINEERING), ELECTRIC POWER PRODUCTION

  13. STUDY OF A THERMOPHOTOVOLTAIC CONVERTER.

    DTIC Science & Technology

    THERMOELECTRICITY, *PHOTOELECTRIC CELLS(SEMICONDUCTOR), ELECTRIC POWER PRODUCTION, MATERIALS, THERMIONIC CONVERTERS , THERMIONIC EMISSION, GERMANIUM...ALLOYS, INDIUM ALLOYS, ARSENIC ALLOYS, ARSENIDES, ABSORPTION, REFRACTIVE INDEX, CERAMIC COATINGS, EMISSIVITY, ELECTRICAL RESISTANCE.

  14. Boron nitride converted carbon fiber

    SciTech Connect

    Rousseas, Michael; Mickelson, William; Zettl, Alexander K.

    2016-04-05

    This disclosure provides systems, methods, and apparatus related to boron nitride converted carbon fiber. In one aspect, a method may include the operations of providing boron oxide and carbon fiber, heating the boron oxide to melt the boron oxide and heating the carbon fiber, mixing a nitrogen-containing gas with boron oxide vapor from molten boron oxide, and converting at least a portion of the carbon fiber to boron nitride.

  15. Multiplexed Oversampling Digitizer in 65 nm CMOS for Column-Parallel CCD Readout

    SciTech Connect

    Grace, Carl; Walder, Jean-Pierre; von der Lippe, Henrik

    2012-04-10

    A digitizer designed to read out column-parallel charge-coupled devices (CCDs) used for high-speed X-ray imaging is presented. The digitizer is included as part of the High-Speed Image Preprocessor with Oversampling (HIPPO) integrated circuit. The digitizer module comprises a multiplexed, oversampling, 12-bit, 80 MS/s pipelined Analog-to-Digital Converter (ADC) and a bank of four fast-settling sample-and-hold amplifiers to instrument four analog channels. The ADC multiplexes and oversamples to reduce its area to allow integration that is pitch-matched to the columns of the CCD. Novel design techniques are used to enable oversampling and multiplexing with a reduced power penalty. The ADC exhibits 188 ?V-rms noise which is less than 1 LSB at a 12-bit level. The prototype is implemented in a commercially available 65 nm CMOS process. The digitizer will lead to a proof-of-principle 2D 10 Gigapixel/s X-ray detector.

  16. A low-power CMOS smart temperature sensor for RFID application

    NASA Astrophysics Data System (ADS)

    Liangbo, Xie; Jiaxin, Liu; Yao, Wang; Guangjun, Wen

    2014-11-01

    This paper presents the design and implement of a CMOS smart temperature sensor, which consists of a low power analog front-end and a 12-bit low-power successive approximation register (SAR) analog-to-digital converter (ADC). The analog front-end generates a proportional-to-absolute-temperature (PTAT) voltage with MOSFET circuits operating in the sub-threshold region. A reference voltage is also generated and optimized in order to minimize the temperature error and the 12-bit SAR ADC is used to digitize the PTAT voltage. Using 0.18 μm CMOS technology, measurement results show that the temperature error is -0.69/+0.85 °C after one-point calibration over a temperature range of -40 to 100 °C. Under a conversion speed of 1K samples/s, the power consumption is only 2.02 μW while the chip area is 230 × 225 μm2, and it is suitable for RFID application.

  17. PWM Converter Power Density Barriers

    NASA Astrophysics Data System (ADS)

    Kolar, Johann W.; Drofenik, Uwe; Biela, Juergen; Heldwein, Marcelo; Ertl, Hans; Friedli, Thomas; Round, Simon

    Power density of power electronic converters has roughly doubled every 10 years since 1970. Behind this trajectory is the continuous advancement of power semiconductor devices, which has increased the converter switching frequencies by a factor of 10 every decade. However, today's cooling concepts and passive components are major barriers for a continuation of this trend. To identify such technological barriers, this paper investigates the volume of the cooling system and passive components as a function of the switching frequency for power electronic converters and determines the switching frequency that minimizes the total volume. A power density limit of 28kW/dm3 at 300kHz is calculated for an isolated DC-DC converter, 44kW/dm3 at 820kHz for a three-phase unity power factor PWM rectifier, and 26kW/dm3 at 21kHz for a sparse matrix converter. For single-phase AC-DC conversion a general limit of 35kW/dm3 results from the DC link capacitor. These power density limits highlight the need to broaden the scope of power electronics research to include cooling systems, high frequency electromagnetics, interconnection and packaging technology, and multi-domain modelling and simulation to ensure further advancement along the power density trajectory.

  18. High efficiency thermionic converter studies

    NASA Technical Reports Server (NTRS)

    Huffman, F. N.; Sommer, A. H.; Balestra, C. L.; Briere, T. R.; Lieb, D.; Oettinger, P. E.; Goodale, D. B.

    1977-01-01

    Research in thermionic energy conversion technology is reported. The objectives were to produce converters suitable for use in out of core space reactors, radioisotope generators, and solar satellites. The development of emitter electrodes that operate at low cesium pressure, stable low work function collector electrodes, and more efficient means of space charge neutralization were investigated to improve thermionic converter performance. Potential improvements in collector properties were noted with evaporated thin film barium oxide coatings. Experiments with cesium carbonate suggest this substance may provide optimum combinations of cesium and oxygen for thermionic conversion.

  19. Charge-pump voltage converter

    DOEpatents

    Brainard, John P.; Christenson, Todd R.

    2009-11-03

    A charge-pump voltage converter for converting a low voltage provided by a low-voltage source to a higher voltage. Charge is inductively generated on a transfer rotor electrode during its transit past an inductor stator electrode and subsequently transferred by the rotating rotor to a collector stator electrode for storage or use. Repetition of the charge transfer process leads to a build-up of voltage on a charge-receiving device. Connection of multiple charge-pump voltage converters in series can generate higher voltages, and connection of multiple charge-pump voltage converters in parallel can generate higher currents. Microelectromechanical (MEMS) embodiments of this invention provide a small and compact high-voltage (several hundred V) voltage source starting with a few-V initial voltage source. The microscale size of many embodiments of this invention make it ideally suited for MEMS- and other micro-applications where integration of the voltage or charge source in a small package is highly desirable.

  20. Converting Work into College Credits

    ERIC Educational Resources Information Center

    Hoffman, Joseph A.

    1976-01-01

    The Cooperative Education Program conducted by the New Jersey Department of Labor and Industry and Thomas A. Edison College enables State labor department employees to work toward college degrees by attending free classes, taking college-level examinations for college credit, and converting work and life experiences into college credits.…

  1. Converting accounts receivable into cash.

    PubMed

    Folk, M D; Roest, P R

    1995-09-01

    In recent years, increasing numbers of healthcare providers have converted their accounts receivable into cash through a process called securitization. This practice has gained popularity because it provides a means to raise capital necessary to healthcare organizations. Although securitization transactions can be complex, they may provide increased financial flexibility to providers as they prepare for continuing change in the healthcare industry.

  2. Advanced Thermionic Converter Technology Program

    NASA Astrophysics Data System (ADS)

    Luke, James R.

    2003-01-01

    A thermionic energy converter (TEC) is a direct energy conversion device, which converts heat to electricity with no moving parts. Thermionic converters are well suited to space nuclear power systems because of their high power density, high heat rejection temperature, and immunity to radiation. Several recent advances in thermionic energy conversion technology have greatly improved the efficiency of these devices. A research program was undertaken to independently confirm these advances, and to extend them to converters with practical geometry. The recent development of a stable cesium/oxygen vapor source has led to a significant improvement in performance. The addition of a small amount of oxygen to the cesium vapor can increase the emission current by a factor of three or more. The beneficial effects of oxygen are stable and reproducible. A TEC with a cold seal has been invented, which greatly simplifies construction, operation, and maintenance of the TEC. Electron reflection from the collector has been shown to reduce the performance of TEC's. Reflection suppressing materials were produced and tested. One sample showed evidence of reflection suppression, increasing the average output voltage by 0.16 V. Another sample did not. Research in this area is ongoing.

  3. Hybrid-mode thermionic converter

    NASA Technical Reports Server (NTRS)

    Rasor, N. S.; Britt, E. J.

    1976-01-01

    Converter's collector electrode has uniform low work-function surface and operates at sufficiently low temperature to produce negligible electron emission. Emitter electrode has main region which has intermediate work-function and auxiliary region which has relatively high work-function surface.

  4. IREB Converter to AC Pulses.

    DTIC Science & Technology

    and the end of the center conductor. the modulated IREB induces a voltage in the coaxial transmission line. This voltage appears across the gap to slow ... down the electrons and to convert the kinetic energy of the IREB into electrical energy that propagates along the coaxial transmission line. (PATENT)

  5. Parametric study of laser photovoltaic energy converters

    NASA Technical Reports Server (NTRS)

    Walker, G. H.; Heinbockel, J. H.

    1987-01-01

    Photovoltaic converters are of interest for converting laser power to electrical power in a space-based laser power system. This paper describes a model for photovoltaic laser converters and the application of this model to a neodymium laser silicon photovoltaic converter system. A parametric study which defines the sensitivity of the photovoltaic parameters is described. An optimized silicon photovoltaic converter has an efficiency greater than 50 percent for 1000 W/sq cm of neodymium laser radiation.

  6. Portable convertible blast effects shield

    DOEpatents

    Pastrnak, John W.; Hollaway, Rocky; Henning, Carl D.; Deteresa, Steve; Grundler, Walter; Hagler, Lisle B.; Kokko, Edwin; Switzer, Vernon A.

    2011-03-15

    A rapidly deployable portable convertible blast effects shield/ballistic shield includes a set two or more frusto-conically-tapered telescoping rings operably connected to each other to convert between a telescopically-collapsed configuration for storage and transport, and a telescopically-extended upright configuration forming an expanded inner volume. In a first embodiment, the upright configuration provides blast effects shielding, such as against blast pressures, shrapnel, and/or fire balls. And in a second embodiment, the upright configuration provides ballistic shielding, such as against incoming weapons fire, shrapnel, etc. Each ring has a high-strength material construction, such as a composite fiber and matrix material, capable of substantially inhibiting blast effects and impinging projectiles from passing through the shield. And the set of rings are releasably securable to each other in the telescopically-extended upright configuration by the friction fit of adjacent pairs of frusto-conically-tapered rings to each other.

  7. Portable convertible blast effects shield

    DOEpatents

    Pastrnak, John W.; Hollaway, Rocky; Henning, Carl D.; Deteresa, Steve; Grundler, Walter; Hagler, Lisle B.; Kokko, Edwin; Switzer, Vernon A

    2007-05-22

    A rapidly deployable portable convertible blast effects shield/ballistic shield includes a set two or more telescoping cylindrical rings operably connected to each other to convert between a telescopically-collapsed configuration for storage and transport, and a telescopically-extended upright configuration forming an expanded inner volume. In a first embodiment, the upright configuration provides blast effects shielding, such as against blast pressures, shrapnel, and/or fire balls. And in a second embodiment, the upright configuration provides ballistic shielding, such as against incoming weapons fire, shrapnel, etc. Each ring has a high-strength material construction, such as a composite fiber and matrix material, capable of substantially inhibiting blast effects and impinging projectiles from passing through the shield. And the set of rings are releasably securable to each other in the telescopically-extended upright configuration, such as by click locks.

  8. Photoelectric converters with quantum coherence.

    PubMed

    Su, Shan-He; Sun, Chang-Pu; Li, Sheng-Wen; Chen, Jin-Can

    2016-05-01

    Photon impingement is capable of liberating electrons in electronic devices and driving the electron flux from the lower chemical potential to higher chemical potential. Previous studies hinted that the thermodynamic efficiency of a nanosized photoelectric converter at maximum power is bounded by the Curzon-Ahlborn efficiency η_{CA}. In this study, we apply quantum effects to design a photoelectric converter based on a three-level quantum dot (QD) interacting with fermionic baths and photons. We show that, by adopting a pair of suitable degenerate states, quantum coherences induced by the couplings of QDs to sunlight and fermion baths can coexist steadily in nanoelectronic systems. Our analysis indicates that the efficiency at maximum power is no longer limited to η_{CA} through manipulation of carefully controlled quantum coherences.

  9. Portable convertible blast effects shield

    SciTech Connect

    Pastrnak, John W.; Hollaway, Rocky; Henning, Carl D.; Deteresa, Steve; Grundler, Walter; Hagler,; Lisle B.; Kokko, Edwin; Switzer, Vernon A

    2010-10-26

    A rapidly deployable portable convertible blast effects shield/ballistic shield includes a set two or more telescoping cylindrical rings operably connected to each other to convert between a telescopically-collapsed configuration for storage and transport, and a telescopically-extended upright configuration forming an expanded inner volume. In a first embodiment, the upright configuration provides blast effects shielding, such as against blast pressures, shrapnel, and/or fire balls. And in a second embodiment, the upright configuration provides ballistic shielding, such as against incoming weapons fire, shrapnel, etc. Each ring has a high-strength material construction, such as a composite fiber and matrix material, capable of substantially inhibiting blast effects and impinging projectiles from passing through the shield. And the set of rings are releasably securable to each other in the telescopically-extended upright configuration, such as by click locks.

  10. Photoelectric converters with quantum coherence

    NASA Astrophysics Data System (ADS)

    Su, Shan-He; Sun, Chang-Pu; Li, Sheng-Wen; Chen, Jin-Can

    2016-05-01

    Photon impingement is capable of liberating electrons in electronic devices and driving the electron flux from the lower chemical potential to higher chemical potential. Previous studies hinted that the thermodynamic efficiency of a nanosized photoelectric converter at maximum power is bounded by the Curzon-Ahlborn efficiency ηCA. In this study, we apply quantum effects to design a photoelectric converter based on a three-level quantum dot (QD) interacting with fermionic baths and photons. We show that, by adopting a pair of suitable degenerate states, quantum coherences induced by the couplings of QDs to sunlight and fermion baths can coexist steadily in nanoelectronic systems. Our analysis indicates that the efficiency at maximum power is no longer limited to ηCA through manipulation of carefully controlled quantum coherences.

  11. Workshop 4 Converter cooling & recuperation

    NASA Astrophysics Data System (ADS)

    Iles, Peter; Hindman, Don

    1995-01-01

    Cooling the PV converter increases the overall TPV system efficiency, and more than offsets the losses incurred in providing cooling systems. Convective air flow methods may be sufficient, and several standard water cooling systems, including thermo-syphon radiators, capillary pumps or microchannel plates, are available. Recuperation is used to increase system efficiency, rather than to increase the emitter temperature. Recuperators operating at comparable high temperatures, such as in high temperature turbines have worked effectively.

  12. Hardware Index to Permutation Converter

    DTIC Science & Technology

    2012-05-01

    Hardware Index to Permutation Converter J. T. Butler T. Sasao Department of Electrical and Computer Engineering Department of Computer Science...generates a permutation in response to an index. Since there are n! n-element permutations , the index ranges from 0 to n! − 1. Such a circuit is needed...in the hardware implementation of unique- permutation hash functions to specify how parallel machines interact through a shared memory. Such a circuit

  13. High efficiency thermionic converter studies

    NASA Technical Reports Server (NTRS)

    Huffman, F. N.; Sommer, A. H.; Balestra, C. L.; Briere, D. P.; Oettinger, P. E.

    1976-01-01

    The objective is to improve thermionic converter performance by means of reduced interelectrode losses, greater emitter capabilities, and lower collector work functions until the converter performance level is suitable for out-of-core space reactors and radioisotope generators. Electrode screening experiments have identified several promising collector materials. Back emission work function measurements of a ZnO collector in a thermionic diode have given values less than 1.3 eV. Diode tests were conducted over the range of temperatures of interest for space power applications. Enhanced mode converter experiments have included triodes operated in both the surface ionization and plasmatron modes. Pulsed triodes were studied as a function of pulse length, pulse potential, inert gas fill pressure, cesium pressure, spacing, emitter temperature and collector temperature. Current amplifications (i.e., mean output current/mean grid current) of several hundred were observed up to output current densities of one amp/sq cm. These data correspond to an equivalent arc drop less than 0.1 eV.

  14. Large wind energy converter: Growian 3 MW

    NASA Technical Reports Server (NTRS)

    Koerber, F.; Thiele, H. A.

    1979-01-01

    The main features of the Growian wind energy converter are presented. Energy yield, environmental impact, and construction of the energy converter are discussed. Reliability of the windpowered system is assessed.

  15. Auxiliary resonant DC tank converter

    DOEpatents

    Peng, Fang Z.

    2000-01-01

    An auxiliary resonant dc tank (ARDCT) converter is provided for achieving soft-switching in a power converter. An ARDCT circuit is coupled directly across a dc bus to the inverter to generate a resonant dc bus voltage, including upper and lower resonant capacitors connected in series as a resonant leg, first and second dc tank capacitors connected in series as a tank leg, and an auxiliary resonant circuit comprising a series combination of a resonant inductor and a pair of auxiliary switching devices. The ARDCT circuit further includes first clamping means for holding the resonant dc bus voltage to the dc tank voltage of the tank leg, and second clamping means for clamping the resonant dc bus voltage to zero during a resonant period. The ARDCT circuit resonantly brings the dc bus voltage to zero in order to provide a zero-voltage switching opportunity for the inverter, then quickly rebounds the dc bus voltage back to the dc tank voltage after the inverter changes state. The auxiliary switching devices are turned on and off under zero-current conditions. The ARDCT circuit only absorbs ripples of the inverter dc bus current, thus having less current stress. In addition, since the ARDCT circuit is coupled in parallel with the dc power supply and the inverter for merely assisting soft-switching of the inverter without participating in real dc power transmission and power conversion, malfunction and failure of the tank circuit will not affect the functional operation of the inverter; thus a highly reliable converter system is expected.

  16. Space power converter selection methodologies

    NASA Astrophysics Data System (ADS)

    Jackson, William E.; Thibodeaux, Rene

    During baseload power system conceptual design phases, common, flexible power conversion equipment must be identified, characterized, compared and selected to meet all pertinent requirements between various spacecraft sources, distribution networks, and loads. The process used to perform the conceptual analyses must be structured to evaluate all known requirements and integrate them properly into the preliminary study format. An evaluation process is presented, as implemented in a 5-100-kW baseload space power system study, that provides an approach to matching and conceptually designing power converters to power system applications.

  17. Digital control of HVDC converters

    SciTech Connect

    Pilotto, L.A.S.; Roitman, M.; Alves, J.E.R.

    1989-05-01

    This paper presents the project of a completely digital HVDC converter controller based on a 16-bit microcomputer. It was decided to achieve as much as possible by software in order to minimize functions performed by external hardware. The presented design comprises software programmed functions such as a PID current control amplifier, voltage dependent current order limiters and an alpha-minimum symmetrization unit, among others. HVDC control principles are briefly reviewed and a detailed description of both the hardware and software structure of the controller is presented. The digital controller was implemented in an HVDC simulator and several dynamic performance tests demonstrated the efficiency of the proposed methodology.

  18. Workshop 4 Converter cooling & recuperation

    SciTech Connect

    Iles, P.; Hindman, D.

    1995-01-05

    Cooling the PV converter increases the overall TPV system efficiency, and more than offsets the losses incurred in providing cooling systems. Convective air flow methods may be sufficient, and several standard water cooling systems, including thermo-syphon radiators, capillary pumps or microchannel plates, are available. Recuperation is used to increase system efficiency, rather than to increase the emitter temperature. Recuperators operating at comparable high temperatures, such as in high temperature turbines have worked effectively. {copyright} {ital 1995} {ital American} {ital Institute} {ital of} {ital Physics}.

  19. 12 CFR 1.6 - Convertible securities.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 12 Banks and Banking 1 2014-01-01 2014-01-01 false Convertible securities. 1.6 Section 1.6 Banks and Banking COMPTROLLER OF THE CURRENCY, DEPARTMENT OF THE TREASURY INVESTMENT SECURITIES § 1.6 Convertible securities. A national bank may not purchase securities convertible into stock at the option...

  20. 12 CFR 1.6 - Convertible securities.

    Code of Federal Regulations, 2013 CFR

    2013-01-01

    ... 12 Banks and Banking 1 2013-01-01 2013-01-01 false Convertible securities. 1.6 Section 1.6 Banks and Banking COMPTROLLER OF THE CURRENCY, DEPARTMENT OF THE TREASURY INVESTMENT SECURITIES § 1.6 Convertible securities. A national bank may not purchase securities convertible into stock at the option...

  1. 12 CFR 1.6 - Convertible securities.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 12 Banks and Banking 1 2011-01-01 2011-01-01 false Convertible securities. 1.6 Section 1.6 Banks and Banking COMPTROLLER OF THE CURRENCY, DEPARTMENT OF THE TREASURY INVESTMENT SECURITIES § 1.6 Convertible securities. A national bank may not purchase securities convertible into stock at the option...

  2. A dc to dc converter

    NASA Technical Reports Server (NTRS)

    Willis, A. E.; Gould, J. M.; Matheney, J. L.; Garrett, H. (Inventor)

    1984-01-01

    The object of the invention is to provide an improved converter for converting one direct current voltage to another. A plurality of phased square wave voltages are provided from a ring counter through amplifiers to a like plurality of output transformers. Each of these transformers has two windings, and S(1) winding and an S(2) winding. The S(1) windings are connected in series, then the S(2) windings are connected in series, and finally, the two sets of windings are connected in series. One of six SCRs is connected between each two series connected windings to a positive output terminal and one of diodes is connected between each set of two windings of a zero output terminal. By virtue of this configuration, a quite high average direct current voltage is obtained, which varies between full voltage and two-thirds full voltage rather than from full voltage to zero. Further, its variation, ripple frequency, is reduced to one-sixth of that present in a single phase system. Application to raising battery voltage for an ion propulsion system is mentioned.

  3. Thermoelectric converters for alternating current standards

    NASA Astrophysics Data System (ADS)

    Anatychuk, L. I.; Taschuk, D. D.

    2012-06-01

    Thermoelectric converters of alternating current remain priority instruments when creating standard equipment. This work presents the results of design and manufacture of alternating current converter for a military standard of alternating current in Ukraine. Results of simulation of temperature distribution in converter elements, ways of optimization to improve the accuracy of alternating current signal reproduction are presented. Results of metrological trials are given. The quality of thermoelectric material specially created for alternating current metrology is verified. The converter was used in alternating current standard for the frequency range from 10 Hz to 30 MHz. The efficiency of using thermoelectric signal converters in measuring instruments is confirmed.

  4. Thermionic converter emitter support arrangement

    DOEpatents

    Allen, Daniel T.

    1990-01-01

    A support is provided for use in a therminonic converter to support an end of an emitter to keep it out of contact with a surrounding collector while allowing the emitter end to move axially as its temperature changes. The emitter end (34) is supported by a spring structure (44) that includes a pair of Belleville springs, and the spring structure is supported by a support structure (42) fixed to the housing that includes the collector. The support structure is in the form of a sandwich with a small metal spring-engaging element (74) at the front end, a larger metal main support (76) at the rear end that is attached to the housing, and with a ceramic layer (80) between them that is bonded by hot isostatic pressing to the metal element and metal main support. The spring structure can include a loose wafer (120) captured between the Belleville springs.

  5. Thermionic converter emitter support arrangement

    DOEpatents

    Allen, Daniel T.

    1990-01-01

    A support is provided for use in a thermionic converter to support an end an emitter to keep it out of contact with a surrounding collector while allowing the emitter end to move axially at its temperatures changes. The emitter end (34) is supported by a spring structure (44) that includes a pair of Belleville springs, and the spring structure is supported by a support structure (42) fixed to the housing that includes the collector. The support structure is in the form of a sandwich with a small metal spring-engaging element (74) at the front end, a larger metal main support (76) at the rear end that is attached to the housng, and with a ceramic layer (80) between them that is bonded by hot isostatic pressing to the metal element and metal main support. The spring structure can include a loose wafer (120) captured between the Belleville springs.

  6. Performance of Power Converters at Cryogenic Temperatures

    NASA Technical Reports Server (NTRS)

    Elbuluk, Malik E.; Gerber, Scott; Hammoud, Ahmad; Patterson, Richard L.

    2001-01-01

    Power converters capable of operation at cryogenic temperatures are anticipated to play an important role in the power system architecture of future NASA deep space missions. Design of such converters to survive cryogenic temperatures will improve the power system performance and reduce development and launch costs. Aerospace power systems are mainly a DC distribution network. Therefore, DC/DC and DC/AC converters provide the outputs needed to different loads at various power levels. Recently, research efforts have been performed at the NASA Glenn Research Center (GRC) to design and evaluate DC/DC converters that are capable of operating at cryogenic temperatures. This paper presents a summary of the research performed to evaluate the low temperature performance of five DC/DC converters. Various parameters were investigated as a function of temperature in the range of 20 to -196 C. Data pertaining to the output voltage regulation and efficiency of the converters is presented and discussed.

  7. Radiation-Tolerant DC-DC Converters

    NASA Technical Reports Server (NTRS)

    Skutt, Glenn; Sable, Dan; Leslie, Leonard; Graham, Shawn

    2012-01-01

    A document discusses power converters suitable for space use that meet the DSCC MIL-PRF-38534 Appendix G radiation hardness level P classification. A method for qualifying commercially produced electronic parts for DC-DC converters per the Defense Supply Center Columbus (DSCC) radiation hardened assurance requirements was developed. Development and compliance testing of standard hybrid converters suitable for space use were completed for missions with total dose radiation requirements of up to 30 kRad. This innovation provides the same overall performance as standard hybrid converters, but includes assurance of radiation- tolerant design through components and design compliance testing. This availability of design-certified radiation-tolerant converters can significantly reduce total cost and delivery time for power converters for space applications that fit the appropriate DSCC classification (30 kRad).

  8. Static dc voltage stabilizer-converter

    NASA Technical Reports Server (NTRS)

    Osadchiy, V. I.

    1974-01-01

    The advantages are outlined of a static dc voltage converter combining the functions of the feed voltage stabilizer simultaneously. A comparison is made between the circuits for the known static stabilizer converter and that developed by the author. A characteristic feature of the improved system is the increased stabilization coefficient, low output impedance and the possibility of smooth regulation of the output voltage. A practical diagram is presented for the improved high voltage stabilizer converter and its parameters.

  9. Ocean floor mounting of wave energy converters

    DOEpatents

    Siegel, Stefan G

    2015-01-20

    A system for mounting a set of wave energy converters in the ocean includes a pole attached to a floor of an ocean and a slider mounted on the pole in a manner that permits the slider to move vertically along the pole and rotate about the pole. The wave energy converters can then be mounted on the slider to allow adjustment of the depth and orientation of the wave energy converters.

  10. A theoretical study of photovoltaic converters

    NASA Technical Reports Server (NTRS)

    Heinbockel, John H.

    1987-01-01

    Mathematical models for the photovoltaic conversion of laser power were developed. These models simulate the operation of planar and vertical junction photovoltaic converters and are described in detail.

  11. Conducted Emission Evaluation for Direct Matrix Converters

    NASA Astrophysics Data System (ADS)

    Nothofer, A.; Tarisciotti, L.; Greedy, S.; Empringham, L.; De Lillo, L.; Degano, M.

    2016-05-01

    Matrix converters have been recently proposed as an alternative solution to the standard back-to-back converter in aerospace applications. However, Electromagnetic Interference (EMI), in particular, conducted emissions represent a critical aspect for this converter family. Direct Matrix Converter (DMC) are usually modelled only at the normal operating frequency, but for the research presented in this paper, the model is modified in order to include a detailed high frequency description, which is of interest for conducted emission studies.This paper analyzes the performance of DMC, when different control and modulation techniques are used. Experimental results are shown to validate the simulation models.

  12. DC/DC Converter Stability Testing Study

    NASA Technical Reports Server (NTRS)

    Wang, Bright L.

    2008-01-01

    This report presents study results on hybrid DC/DC converter stability testing methods. An input impedance measurement method and a gain/phase margin measurement method were evaluated to be effective to determine front-end oscillation and feedback loop oscillation. In particular, certain channel power levels of converter input noises have been found to have high degree correlation with the gain/phase margins. It becomes a potential new method to evaluate stability levels of all type of DC/DC converters by utilizing the spectral analysis on converter input noises.

  13. Vacuum-insulated catalytic converter

    DOEpatents

    Benson, David K.

    2001-01-01

    A catalytic converter has an inner canister that contains catalyst-coated substrates and an outer canister that encloses an annular, variable vacuum insulation chamber surrounding the inner canister. An annular tank containing phase-change material for heat storage and release is positioned in the variable vacuum insulation chamber a distance spaced part from the inner canister. A reversible hydrogen getter in the variable vacuum insulation chamber, preferably on a surface of the heat storage tank, releases hydrogen into the variable vacuum insulation chamber to conduct heat when the phase-change material is hot and absorbs the hydrogen to limit heat transfer to radiation when the phase-change material is cool. A porous zeolite trap in the inner canister absorbs and retains hydrocarbons from the exhaust gases when the catalyst-coated substrates and zeolite trap are cold and releases the hydrocarbons for reaction on the catalyst-coated substrate when the zeolite trap and catalyst-coated substrate get hot.

  14. Catalytic converter with thermoelectric generator

    SciTech Connect

    Parise, R.J.

    1998-07-01

    The unique design of an electrically heated catalyst (EHC) and the inclusion of an ECO valve in the exhaust of an internal combustion engine will meet the strict new emission requirements, especially at vehicle cold start, adopted by several states in this country as well as in Europe and Japan. The catalytic converter (CC) has been a most useful tool in pollution abatement for the automobile. But the emission requirements are becoming more stringent and, along with other improvements, the CC must be improved to meet these new standards. Coupled with the ECO valve, the EHC can meet these new emission limits. In an internal combustion engine vehicle (ICEV), approximately 80% of the energy consumed leaves the vehicle as waste heat: out the tail pipe, through the radiator, or convected/radiated off the engine. Included with the waste heat out the tail pipe are the products of combustion which must meet strict emission requirements. The design of a new CC is presented here. This is an automobile CC that has the capability of producing electrical power and reducing the quantity of emissions at vehicle cold start, the Thermoelectric Catalytic Power Generator. The CC utilizes the energy of the exothermic reactions that take place in the catalysis substrate to produce electrical energy with a thermoelectric generator. On vehicle cold start, the thermoelectric generator is used as a heat pump to heat the catalyst substrate to reduce the time to catalyst light-off. Thus an electrically heated catalyst (EHC) will be used to augment the abatement of tail pipe emissions. Included with the EHC in the exhaust stream of the automobile is the ECO valve. This valve restricts the flow of pollutants out the tail pipe of the vehicle for a specified amount of time until the EHC comes up to operating temperature. Then the ECO valve opens and allows the full exhaust, now treated by the EHC, to leave the vehicle.

  15. Passive Resonant Bidirectional Converter with Galvanic Barrier

    NASA Technical Reports Server (NTRS)

    Rosenblad, Nathan S. (Inventor)

    2014-01-01

    A passive resonant bidirectional converter system that transports energy across a galvanic barrier includes a converter using at least first and second converter sections, each section including a pair of transfer terminals, a center tapped winding; a chopper circuit interconnected between the center tapped winding and one of the transfer terminals; an inductance feed winding interconnected between the other of the transfer terminals and the center tap and a resonant tank circuit including at least the inductance of the center tap winding and the parasitic capacitance of the chopper circuit for operating the converter section at resonance; the center tapped windings of the first and second converter sections being disposed on a first common winding core and the inductance feed windings of the first and second converter sections being disposed on a second common winding core for automatically synchronizing the resonant oscillation of the first and second converter sections and transferring energy between the converter sections until the voltage across the pairs of transfer terminals achieves the turns ratio of the center tapped windings.

  16. Pump noise cancellation in parametric wavelength converters.

    PubMed

    Ataie, Vahid; Myslivets, Evgeny; Wiberg, Andereas O J; Alic, Nikola; Radic, Stojan

    2012-12-10

    A novel technique for pump noise effect mitigation in parametric wavelength converters is introduced. The method relies on digital signal processing and effectively takes advantage of the correlation property between the pump and idler, imposed by the parametric interaction. A 4 dB improvement in receiver performance is demonstrated experimentally for the conventional 10 Gbps OOK signal converted over 20 nm.

  17. Distributed electrical leads for thermionic converter

    DOEpatents

    Fitzpatrick, Gary O.; Britt, Edward J.

    1979-01-01

    In a thermionic converter, means are provided for coupling an electrical lead to at least one of the electrodes thereof. The means include a bus bar and a plurality of distributed leads coupled to the bus bar each of which penetrates through one electrode and are then coupled to the other electrode of the converter in spaced apart relation.

  18. Power Converters Secure Electronics in Harsh Environments

    NASA Technical Reports Server (NTRS)

    2013-01-01

    In order to harden power converters for the rigors of space, NASA awarded multiple SBIR contracts to Blacksburg, Virginia-based VPT Inc. The resulting hybrid DC-DC converters have proven valuable in aerospace applications, and as a result the company has generated millions in revenue from the product line and created four high-tech jobs to handle production.

  19. Laser energy converted into electric power

    NASA Technical Reports Server (NTRS)

    Shimada, K.

    1973-01-01

    Apparatus verifies concepts of converting laser energy directly into electric energy. Mirror, placed in beam and inclined at angle to it, directs small amount of incident radiation to monitor which establishes precise power levels and other beam characteristics. Second mirror and condensing lens direct bulk of laser energy into laser plasmadynamic converter.

  20. Controller for a wave energy converter

    DOEpatents

    Wilson, David G.; Bull, Diana L.; Robinett, III, Rush D.

    2015-09-22

    A wave energy converter (WEC) is described, the WEC including a power take off (PTO) that converts relative motion of bodies of the WEC into electrical energy. A controller controls operation of the PTO, causing the PTO to act as a motor to widen a wave frequency spectrum that is usable to generate electrical energy.

  1. RF digital-to-analog converter

    DOEpatents

    Conway, P.H.; Yu, D.U.L.

    1995-02-28

    A digital-to-analog converter is disclosed for producing an RF output signal proportional to a digital input word of N bits from an RF reference input, N being an integer greater or equal to 2. The converter comprises a plurality of power splitters, power combiners and a plurality of mixers or RF switches connected in a predetermined configuration. 18 figs.

  2. RF digital-to-analog converter

    DOEpatents

    Conway, Patrick H.; Yu, David U. L.

    1995-01-01

    A digital-to analogue converter for producing an RF output signal proportional to a digital input word of N bits from an RF reference input, N being an integer greater or equal to 2. The converter comprises a plurality of power splitters, power combiners and a plurality of mixers or RF switches connected in a predetermined configuration.

  3. A novel power converter for photovoltaic applications

    NASA Astrophysics Data System (ADS)

    Yuvarajan, S.; Yu, Dachuan; Xu, Shanguang

    A simple and economical power conditioner to convert the power available from solar panels into 60 Hz ac voltage is described. The raw dc voltage from the solar panels is converted to a regulated dc voltage using a boost converter and a large capacitor and the dc output is then converted to 60 Hz ac using a bridge inverter. The ratio between the load current and the short-circuit current of a PV panel at maximum power point is nearly constant for different insolation (light) levels and this property is utilized in designing a simple maximum power point tracking (MPPT) controller. The controller includes a novel arrangement for sensing the short-circuit current without disturbing the operation of the PV panel and implementing MPPT. The switching losses in the inverter are reduced by using snubbers. The results obtained on an experimental converter are presented.

  4. Evaluations of uranium-nitride fueled converters.

    NASA Technical Reports Server (NTRS)

    Shimada, K.; Cassell, P. L.

    1971-01-01

    Evaluation of two uranium-nitride (UN) fueled converters was initiated at the Jet Propulsion Laboratory to investigate the effect of fuel on the converter performance while being operated out-of-core. The initial tests were performed with the dynamic data acquisition system that was developed at the Laboratory. Parametric tests of these converters were to obtain: (1) static volt-ampere curves, (2) dynamic volt-ampere curves, and (3) the electrode work functions. The power outputs were 9.3 W/sq cm for the rhenium converter and 3.8 W/sq cm for the tungsten converter at 0.6 V when the emitter surface temperature was 2000 K, according to the static volt-ampere curves.

  5. Qualitative model of a plasma photoelectric converter

    NASA Astrophysics Data System (ADS)

    Gorbunov, N. A.; Flamant, G.

    2009-01-01

    A converter of focused optical radiation into electric current is considered on the basis of the photovoltaic effect in plasmas. The converter model is based on analysis of asymmetric spatial distributions of charge particle number density and ambipolar potential in the photoplasma produced by external optical radiation focused in a heat pipe filled with a mixture of alkali vapor and a heavy inert gas. Energy balance in the plasma photoelectric converter is analyzed. The conditions in which the external radiation energy is effectively absorbed in the converter are indicated. The plasma parameters for which the energy of absorbed optical radiation is mainly spent on sustaining the ambipolar field in the plasma are determined. It is shown that the plasma photoelectric converter makes it possible to attain a high conversion efficiency for focused solar radiation.

  6. Modelling, analyses and design of switching converters

    NASA Technical Reports Server (NTRS)

    Cuk, S. M.; Middlebrook, R. D.

    1978-01-01

    A state-space averaging method for modelling switching dc-to-dc converters for both continuous and discontinuous conduction mode is developed. In each case the starting point is the unified state-space representation, and the end result is a complete linear circuit model, for each conduction mode, which correctly represents all essential features, namely, the input, output, and transfer properties (static dc as well as dynamic ac small-signal). While the method is generally applicable to any switching converter, it is extensively illustrated for the three common power stages (buck, boost, and buck-boost). The results for these converters are then easily tabulated owing to the fixed equivalent circuit topology of their canonical circuit model. The insights that emerge from the general state-space modelling approach lead to the design of new converter topologies through the study of generic properties of the cascade connection of basic buck and boost converters.

  7. A Multifunction, VME-Based I/O Controller with 32 Programmable Channels of Analog to Digital Conversion for an Unmanned Aerial Vehicle

    DTIC Science & Technology

    1992-09-24

    modulation ( PWM ) card. The PWM card generates the pulse width modulated signals and sends them to the servos on the aircraft. Concurrently, the A/D card...Specification ANSI/IEEE Standard 1014 (c). The 1/0 controller board must generate 8 discrete outputs and 13 channels of Pulse Width Modulation ( PWM ). The...unit is necessary to generate 8 discrete outputs and control the pulse width modulation ( PWM ) Unit and the A/D Conversion Unit. Transfer of

  8. Boost matrix converters in clean energy systems

    NASA Astrophysics Data System (ADS)

    Karaman, Ekrem

    This dissertation describes an investigation of novel power electronic converters, based on the ultra-sparse matrix topology and characterized by the minimum number of semiconductor switches. The Z-source, Quasi Z-source, Series Z-source and Switched-inductor Z-source networks were originally proposed for boosting the output voltage of power electronic inverters. These ideas were extended here on three-phase to three-phase and three-phase to single-phase indirect matrix converters. For the three-phase to three-phase matrix converters, the Z-source networks are placed between the three-switch input rectifier stage and the output six-switch inverter stage. A brief shoot-through state produces the voltage boost. An optimal pulse width modulation technique was developed to achieve high boosting capability and minimum switching losses in the converter. For the three-phase to single-phase matrix converters, those networks are placed similarly. For control purposes, a new modulation technique has been developed. As an example application, the proposed converters constitute a viable alternative to the existing solutions in residential wind-energy systems, where a low-voltage variable-speed generator feeds power to the higher-voltage fixed-frequency grid. Comprehensive analytical derivations and simulation results were carried out to investigate the operation of the proposed converters. Performance of the proposed converters was then compared between each other as well as with conventional converters. The operation of the converters was experimentally validated using a laboratory prototype.

  9. VLSI circuit techniques and technologies for ultrahigh speed data conversion interfaces

    NASA Astrophysics Data System (ADS)

    Wooley, Bruce A.

    1991-04-01

    The performance of digital VLSI signal processing and communications systems is often limited by the data conversion interfaces between digital system-level components and the analog environment in which those components are embedded. The focus of this program has been research into the fundamental nature of such interfaces in systems that digitally process high-bandwidth signals for purposes such as radar imaging, high-resolution graphics, high-definition video, mobile and fiber-optic communications, and broadband instrumentation. Effort has been devoted to the study of both generic circuit functions, such as sampling and comparison, and architectural alternatives relevant to the implementation of high-speed data converters in present and emerging VLSI technologies. Specific results of the research include the design and realization of novel low-power CMOS and BiCMOS sampled-data comparators operating at rates as high as 200 MHz, the exploration of various design approaches to the implementation of high-speed sample-and-hold circuits in CMOS and BiCMOS technologies, and the design of a subranging CMOS analog-to-digital converter that provides 12-bit resolution at a conversion rate of 10 MHz.

  10. 12 GeV detector technology at Jefferson Lab

    SciTech Connect

    Leckey, John P.; Collaboration: GlueX Collaboration

    2013-04-19

    The Thomas Jefferson National Accelerator Facility (JLab) is presently in the middle of an upgrade to increase the energy of its CW electron beam from 6 GeV to 12 GeV along with the addition of a fourth experimental hall. Driven both by necessity and availability, novel detectors and electronics modules have been used in the upgrade. One such sensor is the Silicon Photomultiplier (SiPM), specifically a Multi-Pixel Photon Counter (MPPC), which is an array of avalanche photodiode pixels operating in Geiger mode that are used to sense photons. The SiPMs replace conventional photomultiplier tubes and have several distinct advantages including the safe operation in a magnetic field and the lack of need for high voltage. Another key to 12 GeV success is advanced fast electronics. Jlab will use custom 250 MHz and 125 MHz 12-bit analog to digital converters (ADCs) and time to digital converters (TDCs) all of which take advantage of VME Switched Serial (VXS) bus with its GB/s high bandwidth readout capability. These new technologies will be used to readout drift chambers, calorimeters, spectrometers and other particle detectors at Jlab once the 12 GeV upgrade is complete. The largest experiment at Jlab utilizing these components is GlueX - an experiment in the newly constructed Hall D that will study the photoproduction of light mesons in the search for hybrid mesons. The performance of these components and their respective detectors will be presented.

  11. 12 GeV detector technology at Jefferson Lab

    SciTech Connect

    Leckey, John P.

    2013-04-01

    The Thomas Jefferson National Accelerator Facility (JLab) is presently in the middle of an upgrade to increase the energy of its CW electron beam from 6 GeV to 12 GeV along with the addition of a fourth experimental hall. Driven both by necessity and availability, novel detectors and electronics modules have been used in the upgrade. One such sensor is the Silicon Photomultiplier (SiPM), specifically a Multi-Pixel Photon Counter (MPPC), which is an array of avalanche photodiode pixels operating in Geiger mode that are used to sense photons. The SiPMs replace conventional photomultiplier tubes and have several distinct advantages including the safe operation in a magnetic field and the lack of need for high voltage. Another key to 12 GeV success is advanced fast electronics. Jlab will use custom 250 MHz and 125 MHz 12-bit analog to digital converters (ADCs) and time to digital converters (TDCs) all of which take advantage of VME Switched Serial (VXS) bus with its GB/s high bandwidth readout capability. These new technologies will be used to readout drift chambers, calorimeters, spectrometers and other particle detectors at Jlab once the 12 GeV upgrade is complete. The largest experiment at Jlab utilizing these components is GlueX - an experiment in the newly constructed Hall D that will study the photoproduction of light mesons in the search for hybrid mesons. The performance of these components and their respective detectors will be presented.

  12. Converter design techniques and applications. [transistorized voltage converters for aerospace systems

    NASA Technical Reports Server (NTRS)

    Lalli, V. R.

    1974-01-01

    The design of transistorized voltage converters of the series, shunt, and switching types is developed and explained. The shunt converter has the smallest size, lowest weight, and lowest parts count. Regulation and stability are very good but efficiency is poor. The series converter is somewhat larger in size, heavier, uses more parts, and has an order of magnitude (10 to 1) decrease in regulation performance in comparison with the shunt converter. The switching converter tends to be a compromise with increased size, weight, and circuit complexity to gain in efficiency and regulation over a series converter. A switching converter will usually exhibit ringing in the output filter for some types of loads so it has only fair stability performance.-

  13. Operation of high power converters in parallel

    NASA Technical Reports Server (NTRS)

    Decker, D. K.; Inouye, L. Y.

    1993-01-01

    High power converters that are used in space power subsystems are limited in power handling capability due to component and thermal limitations. For applications, such as Space Station Freedom, where multi-kilowatts of power must be delivered to user loads, parallel operation of converters becomes an attractive option when considering overall power subsystem topologies. TRW developed three different unequal power sharing approaches for parallel operation of converters. These approaches, known as droop, master-slave, and proportional adjustment, are discussed and test results are presented.

  14. Rotary encoding device using polygonal mirror with diffraction gratings on each facet

    NASA Technical Reports Server (NTRS)

    Leviton, Douglas B. (Inventor)

    1993-01-01

    A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a monochromatic light beam is directed towards the facets. The facets of the polygonal mirror each have a low line density diffraction grating to diffract the monochromatic light beam into a number of diffracted light beams such that a number of light spots are created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spots on the linear array detector means. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spots and to compute the position of the shaft based upon the data from the analog-to-digital converter.

  15. Rotary encoding device

    NASA Technical Reports Server (NTRS)

    Leviton, Douglas B. (Inventor)

    1993-01-01

    A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a light beam is directed towards the facets is presented. The facets of the polygonal mirror reflect the light beam such that a light spot is created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spot on the linear array detector. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spot and to compute the position of the shaft based upon the data from the analog-to-digital converter.

  16. Linear encoding device

    NASA Technical Reports Server (NTRS)

    Leviton, Douglas B. (Inventor)

    1993-01-01

    A Linear Motion Encoding device for measuring the linear motion of a moving object is disclosed in which a light source is mounted on the moving object and a position sensitive detector such as an array photodetector is mounted on a nearby stationary object. The light source emits a light beam directed towards the array photodetector such that a light spot is created on the array. An analog-to-digital converter, connected to the array photodetector is used for reading the position of the spot on the array photodetector. A microprocessor and memory is connected to the analog-to-digital converter to hold and manipulate data provided by the analog-to-digital converter on the position of the spot and to compute the linear displacement of the moving object based upon the data from the analog-to-digital converter.

  17. Second Workshop on Improvements to Photometry

    NASA Technical Reports Server (NTRS)

    Borucki, William J. (Editor)

    1988-01-01

    The papers in these proceedings show that a major effort is under way to improve all aspects of photometry. Astronomical multichannel photometry, photodiodes, analog-to-digital converters, data reduction techniques, interference filters and optical fibers are discussed.

  18. A Sea Floor Penetrometer.

    DTIC Science & Technology

    processed through an analog-to-digital (A/D) converter, and stored in the memory of a mini-computer. Computer algorithms are applied to the deceleration data to provide real-time sea floor classification.

  19. Mathematical Investigations Using Logo: Part 1.

    ERIC Educational Resources Information Center

    Brown, Ken

    1986-01-01

    Describes investigations involving data acquisition and analysis using microcomputers running the LOGO programing language. Provides new primitives to add to LOGO to access information from the analog to digital converter of a BBC microcomputer, giving samples of student results. (JM)

  20. Damping assembly for a torque converter clutch

    SciTech Connect

    Dull, D.C.

    1989-12-26

    This patent describes a turbine damped torque converter and clutch. It comprises: a pressure plate; a torque converter turbine; a torque converter impeller; means including a control chamber for the pressure plate means for controlling the apply and release of the clutch for engaging the clutch with the impeller; a torque converter output shaft; a planetary gear arrangement including an input gear drivingly connected with the pressure plate, a reaction gear drivingly connected with the turbine, an output member drivingly connected with the output shaft and pinion gear means meshing with the input gear and the reaction gear for drivingly interconnecting the turbine and the pressure plate at a drive ratio of the turbine to the pressure plate of less than 1:1; and one-way drive means disposed between the turbine and the output shaft for preventing the turbine from overrunning the output shaft.

  1. Rotorcraft convertible engines for the 1980s

    NASA Technical Reports Server (NTRS)

    Eisenberg, J. D.

    1982-01-01

    Two rotorcraft studies were executed. The goal was to identify attractive techniques for implementing convertible powerplants for the ABC, Folded Tilt Rotor, and X-wing type high speed, high-L/D rotorcraft; to determine the DOC and fuel savings benefits achieved thereby; and to define research required to bring these powerplants into existence by the 1990's. These studies are reviewed herein and the different methods of approach are pointed out as well as the key findings. Fan shaft engines using variable inlet guide vanes or torque converters, and turboprop powerplants appear attractive. Savings in DOC and fuel consumption of over 15 percent are predicted in some cases as a result of convertible engine use rather than using separate engines for the thrust and the shaft functions. Areas of required research are fan performance (including noise), integrated engine/rotorcraft control, torque converters, turbine design, airflow for rotorcraft torque control, bleed for lift flow, and transmissions and clutches.

  2. Thermionic Converters Based on Nanostructured Carbon Materials

    NASA Astrophysics Data System (ADS)

    Koeck, Franz A. M.; Wang, Yunyu; Nemanich, Robert J.

    2006-01-01

    Thermionic energy converters are based on electron emission through thermal excitation and collection where the thermal energy is directly converted into electrical power. Conventional thermionic energy converters based on emission from planar metal emitters have been limited due to space charge. This paper presents a novel approach to thermionic energy conversion by focusing on nanostructured carbon materials, sulfur doped nanocrystalline diamond and carbon nanotube films as emitters. These materials exhibit intrinsic field enhancement which can be exploited in lowering the emission barrier, i.e. the effective work function. Moreover, emission from these materials is described in terms of emission sites as a result of a non-uniform spatial distribution of the field enhancement factor. This phenomenon can prove advantageous in a converter configuration to mitigate space charge effects by reducing the transit time of electrons in the gap due to an accelerated charge carrier transport.

  3. Third order digital-to-analog converter

    NASA Technical Reports Server (NTRS)

    Dotson, W. P.

    1972-01-01

    System, consisting of sample and hold digital-to-analog converter, clock circuit, sample delay circuit, initial condition circuit and interpolator circuit, improves accuracy of reconstructed analog signal without increasing sample rates.

  4. Materials technology for Stirling space power converters

    NASA Technical Reports Server (NTRS)

    Baggenstoss, William; Mittendorf, Donald

    1992-01-01

    This program was conducted in support of the NASA LeRC development of the Stirling power converter (SPC) for space power applications. The objectives of this contract were: (1) to perform a technology review and analyses to support the evaluation of materials issues for the SPC; (2) to evaluate liquid metal compatibility issues of the SPC; (3) to evaluate and define a transient liquid phase diffusion bonding (TLPDB) process for the SPC joints to the Udimet 720 heater head; and (4) to evaluate alternative (to the TLPDB) joining techniques. In the technology review, several aspects of the current Stirling design were examined including the power converter assembly process, materials joining, gas bearings, and heat exchangers. The supporting analyses included GLIMPS power converter simulation in support of the materials studies, and system level analysis in support of the technology review. The liquid metal compatibility study evaluated process parameters for use in the Stirling power converter. The alternative joining techniques study looked at the applicability of various joining techniques to the Stirling power converter requirements.

  5. Reactor core length, externally configured thermionic converter.

    NASA Technical Reports Server (NTRS)

    Shimada, K.; Rouklove, P.

    1971-01-01

    Results of testing a converter having an external emitter configuration for 190 hours using RF induction heating. The converter was assembled with a rhenium emitter, 25.4 cm long, having a 91.2 sq cm emitting area, and a niobium collector with a molybdenum coating to improve its electronic property. The collector was water-cooled. The test included: static power output measurements, dynamic characteristics, and the effects of the temperature distribution along the emitter. The maximum power output achieved from the converter at an emitter temperature of 1942 K was 178 W at 0.48 V output, with a power density of 1.95 W/sq cm and an efficiency of 5.5%. The static characteristics also indicated that, with a constant power input, the converter power output does not vary with the output voltage as a result of self-adjustment of the emitter temperature. An investigation of the effects of the temperature distribution along the emitter length showed a 33% improvement in the converter output power with a flattening of the emitter temperature.

  6. Isolated and soft-switched power converter

    DOEpatents

    Peng, Fang Zheng; Adams, Donald Joe

    2002-01-01

    An isolated and soft-switched power converter is used for DC/DC and DC/DC/AC power conversion. The power converter includes two resonant tank circuits coupled back-to-back through an isolation transformer. Each resonant tank circuit includes a pair of resonant capacitors connected in series as a resonant leg, a pair of tank capacitors connected in series as a tank leg, and a pair of switching devices with anti-parallel clamping diodes coupled in series as resonant switches and clamping devices for the resonant leg. The power converter is well suited for DC/DC and DC/DC/AC power conversion applications in which high-voltage isolation, DC to DC voltage boost, bidirectional power flow, and a minimal number of conventional switching components are important design objectives. For example, the power converter is especially well suited to electric vehicle applications and load-side electric generation and storage systems, and other applications in which these objectives are important. The power converter may be used for many different applications, including electric vehicles, hybrid combustion/electric vehicles, fuel-cell powered vehicles with low-voltage starting, remote power sources utilizing low-voltage DC power sources, such as photovoltaics and others, electric power backup systems, and load-side electric storage and generation systems.

  7. Fabrication and life testing of thermionic converters

    NASA Technical Reports Server (NTRS)

    Yang, L.; Bruce, R.

    1973-01-01

    An unfueled converter containing a chloride-fluoride duplex tungsten emitter of 4.78 eV vacuum work function was tested for 46,647 hours at an emitter temperature of 1973 K and an electrode power output of about 8 watts/sq cm. The test demonstrated the superior and stable performance of the (110) oriented tungsten emitter at high temperatures. Three 90 UC-10 ZrC(C/U = 1.04, tungsten additive = 4 wt %) fueled converters were fabricated and tested at an emitter temperature of 1873 K. Converter containing chloride-arc-cast duplex tungsten cladding showed temperature thermionic performance and slower rate of performance drop than converter containing chloride-fluoride duplex tungsten cladding. This is believed to be due to the superior fuel component diffusion resistance of the arc-cast tungsten substrate used in the fuel cladding. It was shown that a converter containing a carbide fueled chloride-arc-cast duplex tungsten emitter with an initial electrode power output of 6.80 watts/sq cm could still deliver an electrode power output of 6.16 watts/sq cm after 18,632 hours of operation at an emitter temperature of 1873 K.

  8. External ionization mechanisms for advanced thermionic converters

    NASA Astrophysics Data System (ADS)

    Hatziprokopiou, M. E.

    Ion generation and recombination mechanisms in the cesium plasma were investigated as they pertain to the advanced mode thermionic energy converters. The changes in plasma density and temperature within the converter were studied under the influence of several promising auxiliary ionization candidate sources. Three novel approaches of external cesium ion generation were investigated in some detail, namely vibrationally excited N2 as an energy source of ionization of Cs ions in a DC discharge, microwave power as a means of resonant sustenance of the cesium plasma, and ion generation in a pulse N2-Cs mixture. The experimental data obtained and discussed in this work show that all three techniques--i.e. the non-LTE high-voltage pulsing, the energy transfer from vibrationally excited diatomic gases, and the external pumping with a microwave power--have considerable promise as schemes in auxiliary ion generation applicable to the advanced thermionic energy converter.

  9. Combination solar photovoltaic heat engine energy converter

    NASA Technical Reports Server (NTRS)

    Chubb, Donald L.

    1987-01-01

    A combination solar photovoltaic heat engine converter is proposed. Such a system is suitable for either terrestrial or space power applications. The combination system has a higher efficiency than either the photovoltaic array or the heat engine alone can attain. Advantages in concentrator and radiator area and receiver mass of the photovoltaic heat engine system over a heat-engine-only system are estimated. A mass and area comparison between the proposed space station organic Rankine power system and a combination PV-heat engine system is made. The critical problem for the proposed converter is the necessity for high temperature photovoltaic array operation. Estimates of the required photovoltaic temperature are presented.

  10. Solar energy converter using surface plasma waves

    NASA Technical Reports Server (NTRS)

    Anderson, L. M. (Inventor)

    1984-01-01

    Sunlight is dispersed over a diffraction grating formed on the surface of a conducting film on a substrate. The angular dispersion controls the effective grating period so that a matching spectrum of surface plasmons is excited for parallel processing on the conducting film. The resulting surface plasmons carry energy to an array of inelastic tunnel diodes. This solar energy converter does not require different materials for each frequency band, and sunlight is directly converted to electricity in an efficient manner by extracting more energy from the more energetic photons.

  11. WEC-Sim (Wave Energy Converter - SIMulator)

    SciTech Connect

    2014-11-26

    WEC-Sim (Wave Energy Converter SIMulator) is a code developed by Sandia National Laboratories and the National Renewable Energy Laboratory to model wave energy converters (WECs) when they are subject to operational waves. The code is a time-domain modeling tool developed in MATLAB/Simulink using the multi-body dynamics solver SimMechanics. In WEC-Sim, WECs are modeled by connecting rigid bodies to one another with joint or constraint blocks from the WEC-Sim library. WEC-Sim is a publicly available, open-source code to model WECs.

  12. Potential converter for laser-power beaming

    NASA Technical Reports Server (NTRS)

    Walker, Gilbert H.; Williams, Michael D.; Schuster, Gregory L.; Iles, Peter A.

    1991-01-01

    Future space missions, such as those associated with the Space Exploration Initiative (SEI), will require large amounts of power for operation of bases, rovers, and orbit transfer vehicles. One method for supplying this power is to beam power from a spaced based or Earth based laser power station to a receiver where laser photons can be converted to electricity. Previous research has described such laser power stations orbiting the Moon and beaming power to a receiver on the surface of the Moon by using arrays of diode lasers. Photovoltaic converters that can be efficiently used with these diode lasers are described.

  13. Efficient dc-to-dc converter

    NASA Technical Reports Server (NTRS)

    Black, J. M.

    1978-01-01

    Circuit consists of chopper section which converts input dc to square wave, followed by bridge-rectifier stage. Chopper gives nearly-ideal switching characteristics, and bridge uses series of full-wave stages rather than less-efficient half-wave rectifiers found in previous circuits. Special features of full-wave circuit allow redundant components to be eliminated, lowering parts count. Circuit can also be adapted for use as dc-to-dc converter or as combination dc-and-ac source.

  14. Converting virtual community members into online buyers.

    PubMed

    Gupta, Sumeet; Kim, Hee-Woong; Shin, Seon-Jin

    2010-10-01

    Although many online vendors have sponsored virtual communities (VCs) in the hope of reaping commercial benefits from it, not many have been successful in reaping commercial benefits from their VC. Online vendors can benefit greatly from having a VC, if the VC members can be converted into online buyers. This study examines the conversion of a VC member into an online buyer. Using a classical-conditioning approach, this study finds that members' committed participation in the VC is the springboard for online vendors to convert VC members into online buyers.

  15. Electrodes For Alkali-Metal Thermoelectric Converters

    NASA Technical Reports Server (NTRS)

    Williams, Roger M.; Wheeler, Bob L.; Jeffries-Nakamura, Barbara; Lamb, James L.; Bankston, C. Perry; Cole, Terry

    1989-01-01

    Combination of thin, porous electrode and overlying collector grid reduces internal resistance of alkali-metal thermoelectric converter cell. Low resistance of new electrode and grid boosts power density nearly to 1 W/cm2 of electrode area at typical operating temperatures of 1,000 to 1,300 K. Conductive grid encircles electrode film on alumina tube. Bus wire runs along tube to collect electrical current from grid. Such converters used to transform solar, nuclear, and waste heat into electric power.

  16. Feasibility of direct digital sampling for diffuse optical frequency domain spectroscopy in tissue

    NASA Astrophysics Data System (ADS)

    Roblyer, Darren; O'Sullivan, Thomas D.; Warren, Robert V.; Tromberg, Bruce J.

    2013-04-01

    Frequency domain optical spectroscopy in the diffusive regime is currently being investigated for biomedical applications including tumor detection, therapy monitoring, exercise metabolism and others. Analog homodyne or heterodyne detection of sinusoidally modulated signals has been the predominant method for measuring phase and amplitude of photon density waves that have traversed through tissue. Here we demonstrate the feasibility of utilizing direct digital sampling of modulated signals using a 3.6 gigasample/second 12 bit analog to digital converter. Digitally synthesized modulated signals between 50 MHz and 400 MHz were measured on tissue-simulating phantoms at six near-infrared wavelengths. An amplitude and phase precision of 1% and 0.6° were achieved during drift tests. Amplitude, phase, scattering and absorption values were compared with a well-characterized network analyzer-based diffuse optical device. Optical properties measured with both systems were within 3.6% for absorption and 2.8% for scattering over a range of biologically relevant values. Direct digital sampling represents a viable method for frequency domain diffuse optical spectroscopy and has the potential to reduce system complexity, size and cost.

  17. Status of the NectarCAM camera project

    NASA Astrophysics Data System (ADS)

    Glicenstein, J.-F.; Barcelo, M.; Barrio, J.-A.; Blanch, O.; Boix, J.; Bolmont, J.; Boutonnet, C.; Brun, P.; Chabanne, E.; Champion, C.; Colonges, S.; Corona, P.; Courty, B.; Delagnes, E.; Delgado, C.; Diaz, C.; Ernenwein, J.-P.; Fegan, S.; Ferreira, O.; Fesquet, M.; Fontaine, G.; Fouque, N.; Henault, F.; Gascón, D.; Giebels, B.; Herranz, D.; Hermel, R.; Hoffmann, D.; Horan, D.; Houles, J.; Jean, P.; Karkar, S.; Knödlseder, J.; Martinez, G.; Lamanna, G.; LeFlour, T.; Lévêque, A.; Lopez-Coto, R.; Louis, F.; Moudden, Y.; Moulin, E.; Nayman, P.; Nunio, F.; Olive, J.-F.; Panazol, J.-L.; Pavy, S.; Petrucci, P.-O.; Punch, M.; Prast, Julie; Ramon, P.; Rateau, S.; Ribó, M.; Rosier-Lees, S.; Sanuy, A.; Sizun, P.; Sieiro, J.; Sulanke, K.-H.; Tavernet, J.-P.; Tejedor, L. A.; Toussenel, F.; Vasileiadis, G.; Voisin, V.; Waegebert, V.; Zurbach, C.

    2014-07-01

    NectarCAM is a camera designed for the medium-sized telescopes of the Cherenkov Telescope Array (CTA) covering the central energy range 100 GeV to 30 TeV. It has a modular design based on the NECTAr chip, at the heart of which is a GHz sampling Switched Capacitor Array and 12-bit Analog to Digital converter. The camera will be equipped with 265 7-photomultiplier modules, covering a field of view of 7 to 8 degrees. Each module includes the photomultiplier bases, High Voltage supply, pre-amplifier, trigger, readout and Thernet transceiver. Events recorded last between a few nanoseconds and tens of nanoseconds. A flexible trigger scheme allows to read out very long events. NectarCAM can sustain a data rate of 10 kHz. The camera concept, the design and tests of the various subcomponents and results of thermal and electrical prototypes are presented. The design includes the mechanical structure, the cooling of electronics, read-out, clock distribution, slow control, data-acquisition, trigger, monitoring and services. A 133-pixel prototype with full scale mechanics, cooling, data acquisition and slow control will be built at the end of 2014.

  18. Comparative research on “high currents” induced by single event latch-up and transient-induced latch-up

    NASA Astrophysics Data System (ADS)

    Chen, Rui; Han, Jian-Wei; Zheng, Han-Sheng; Yu, Yong-Tao; Shangguang, Shi-Peng; Feng, Guo-Qiang; Ma, Ying-Qi

    2015-04-01

    By using the pulsed laser single event effect facility and electro-static discharge (ESD) test system, the characteristics of the “high current”, relation with external stimulus and relevance to impacted modes of single event latch-up (SEL) and transient-induced latch-up (TLU) are studied, respectively, for a 12-bit complementary metal-oxide semiconductor (CMOS) analog-to-digital converter. Furthermore, the sameness and difference in physical mechanism between “high current” induced by SEL and that by TLU are disclosed in this paper. The results show that the minority carrier diffusion in the PNPN structure of the CMOS device which initiates the active parasitic NPN and PNP transistors is the common reason for the “high current” induced by SEL and for that by TLU. However, for SEL, the minority carrier diffusion is induced by the ionizing radiation, and an underdamped sinusoidal voltage on the supply node (the ground node) is the cause of the minority carrier diffusion for TLU. Project supported by the National Natural Science Foundation of China (Grant No. 41304148).

  19. A 0.23 pJ 11.05-bit ENOB 125-MS/s pipelined ADC in a 0.18 μm CMOS process

    NASA Astrophysics Data System (ADS)

    Yong, Wang; Jianyun, Zhang; Rui, Yin; Yuhang, Zhao; Wei, Zhang

    2015-05-01

    This paper describes a 12-bit 125-MS/s pipelined analog-to-digital converter (ADC) that is implemented in a 0.18 μm CMOS process. A gate-bootstrapping switch is used as the bottom-sampling switch in the first stage to enhance the sampling linearity. The measured differential and integral nonlinearities of the prototype are less than 0.79 least significant bit (LSB) and 0.86 LSB, respectively, at the full sampling rate. The ADC exhibits an effective number of bits (ENOB) of more than 11.05 bits at the input frequency of 10.5 MHz. The ADC also achieves a 10.5 bits ENOB with the Nyquist input frequency at the full sample rate. In addition, the ADC consumes 62 mW from a 1.9 V power supply and occupies 1.17 mm2, which includes an on-chip reference buffer. The figure-of-merit of this ADC is 0.23 pJ/step. Project supported by the Foundation of Shanghai Municipal Commission of Economy and Informatization (No. 130311).

  20. Stream vision: a digital imaging and display technology

    NASA Astrophysics Data System (ADS)

    Mandl, William J.; Shen, Chyau N.; Yang, John W.

    1999-12-01

    On focal plane analog to digital conversion, A/D has matured to such an extent that large low power arrays are now being built. Recently Amain developed a cooled MWIR 640 X 480 staring focal plane array with an A/D at each pixel. The technology, MOSADCPY, Multiplexed OverSample A/D, allowed the placement of over 300,000 converters on the focal plane on 27 micron centers with 12 bits dynamic range. A unique one bit digital data format, Stream VisionCPY, was generated on focal plane and transmitted directly to a Ferroelectric LCD for real time viewing of the IR scene. This data stream produces apparent gray to the eye by rapidly modulating the on/off density of the display pixel in concert with the corresponding pixel on the focal plane array. To correct for detector nonuniformity (NUC), a systolic array of parallel processing elements was developed that provided offset and gain correction while preserving the dynamic range of the Stream Vision data. The benefits of this new digital format is that no transformation is required for processing and displaying the image data and there is no analog electronics in the system. Compared to present displays using either PCM to analog or PCM to pulse width modulation. Stream Vision uses less electronics and substantially lower switching bandwidth for the equivalent dynamic range. This development was sponsored by Naval Air Warfare Center under a Phase II SBIR program.

  1. A configurable and low-power mixed signal SoC for portable ECG monitoring applications.

    PubMed

    Kim, Hyejung; Kim, Sunyoung; Van Helleputte, Nick; Artes, Antonio; Konijnenburg, Mario; Huisken, Jos; Van Hoof, Chris; Yazicioglu, Refet Firat

    2014-04-01

    This paper describes a mixed-signal ECG System-on-Chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissue-impedance (ETI) measurement with high signal quality. This can be used to evaluate the quality of the ECG measurement and to filter motion artifacts. A custom digital signal processor consisting of 4-way SIMD processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. A built-in 12-bit analog-to-digital converter (ADC) is capable of adaptive sampling achieving a compression ratio of up to 7, and loop buffer integration reduces the power consumption for on-chip memory access. The SoC is implemented in 0.18 μm CMOS process and consumes 32 μ W from a 1.2 V while heart beat detection application is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the ECG SoC, the overall system power consumption can be reduced significantly.

  2. A low-power portable ECG sensor interface with dry electrodes

    NASA Astrophysics Data System (ADS)

    Xiaofei, Pu; Lei, Wan; Hui, Zhang; Yajie, Qin; Zhiliang, Hong

    2013-05-01

    This paper describes a low-power portable sensor interface dedicated to sensing and processing electrocardiogram (ECG) signals. Dry electrodes were employed in this ECG sensor, which eliminates the need of conductive gel and avoids complicated and mandatory skin preparation before electrode attachment. This ECG sensor system consists of two ICs, an analog front-end (AFE) and a successive approximation register analog-to-digital converter (SAR ADC) containing a relaxation oscillator. This proposed design was fabricated in a 0.18 μm 1P6M standard CMOS process. The AFE for extracting the biopotential signals is essential in this ECG sensor. In measurements, the AFE obtains a mid-band gain of 45 dB, a bandwidth from 0.6 to 160 Hz, and a total input referred noise of 2.8 μV rms while consuming 1 μW from the 1.8 V supply. The noise efficiency factor (NEF) of our design is 3.4. After conditioning, the amplified ECG signal is digitized by a 12-bit SAR ADC with 61.8 dB SNDR and 220 fJ/conversion-step. Finally, a complete ECG sensor interface with three dry copper electrodes is demonstrated in real-word setting, showing successful recordings of a capture ECG waveform.

  3. High-Speed, Multi-Channel Serial ADC LVDS Interface for Xilinx Virtex-5 FPGA

    NASA Technical Reports Server (NTRS)

    Taylor, Gregory H.

    2012-01-01

    Analog-to-digital converters (ADCs) are used in scientific and communications instruments on all spacecraft. As data rates get higher, and as the transition is made from parallel ADC designs to high-speed, serial, low-voltage differential signaling (LVDS) designs, the need will arise to interface these in field programmable gate arrays (FPGAs). As Xilinx has released the radiation-hardened version of the Virtex-5, this will likely be used in future missions. High-speed serial ADCs send data at very high rates. A de-serializer instantiated in the fabric of the FPGA could not keep up with these high data rates. The Virtex-5 contains primitives designed specifically for high-speed, source-synchronous de-serialization, but as supported by Xilinx, can only support bitwidths of 10. Supporting bit-widths of 12 or more requires the use of the primitives in an undocumented configuration, a non-trivial task. A new SystemVerilog design was written that is simpler and uses fewer hardware resources than the reference design described in Xilinx Application Note XAPP866. It has been shown to work in a Xilinx XC5VSX24OT connected to a MAXIM MAX1438 12-bit ADC using a 50-MHz sample clock. The design can be replicated in the FPGA for multiple ADCs (four instantiations were used for a total of 28 channels).

  4. A Reconfigurable Readout Integrated Circuit for Heterogeneous Display-Based Multi-Sensor Systems.

    PubMed

    Park, Kyeonghwan; Kim, Seung Mok; Eom, Won-Jin; Kim, Jae Joon

    2017-04-03

    This paper presents a reconfigurable multi-sensor interface and its readout integrated circuit (ROIC) for display-based multi-sensor systems, which builds up multi-sensor functions by utilizing touch screen panels. In addition to inherent touch detection, physiological and environmental sensor interfaces are incorporated. The reconfigurable feature is effectively implemented by proposing two basis readout topologies of amplifier-based and oscillator-based circuits. For noise-immune design against various noises from inherent human-touch operations, an alternate-sampling error-correction scheme is proposed and integrated inside the ROIC, achieving a 12-bit resolution of successive approximation register (SAR) of analog-to-digital conversion without additional calibrations. A ROIC prototype that includes the whole proposed functions and data converters was fabricated in a 0.18 μm complementary metal oxide semiconductor (CMOS) process, and its feasibility was experimentally verified to support multiple heterogeneous sensing functions of touch, electrocardiogram, body impedance, and environmental sensors.

  5. A telemetry system for the study of spontaneous cardiac arrhythmias.

    PubMed

    Rollins, D L; Killingsworth, C R; Walcott, G P; Justice, R K; Ideker, R E; Smith, W M

    2000-07-01

    The characteristics of spontaneous cardiac arrhythmias leading to sudden cardiac death are largely unknown. To study arrhythmias in animal models, an eight-channel implantable radio telemetry system has been developed to record continuously cardiac electrograms over a period of weeks to months, with maintenance restricted to changing batteries. The inputs are connected in a unipolar manner. Each channel has a gain of fifty and is AC coupled, band limited to 0.07-260 Hz. The signals are digitized with 12 bits resolution at 1000 samples/s. The amplifiers, analog-to-digital converter, and control logic are packaged in an implantable unit. An umbilical cable is passed through the skin to an external backpack unit for power and data transmission. A custom serial interface card, a PC/104 form factor 25-MHz 80386-based single-board computer with a PCMCIA wireless local area network (WLAN) card, and battery power supply make up the backpack. Data are read into the parallel port of the computer, buffered, then transmitted over the WLAN to the laboratory network where it can be analyzed and archived. Approximately 12 h of 14,000 bytes/s data can be collected with each set of batteries. The system is suitable for continuous monitoring of animal models of spontaneous arrhythmias and sudden cardiac death.

  6. A Spartan3E-based low-cost system for gamma-ray detection in small single photon emission computed tomography or positron emission tomography systems

    NASA Astrophysics Data System (ADS)

    Fysikopoulos, E.; Georgiou, M.; Efthimiou, N.; David, S.; Loudos, G.; Matsopoulos, G.

    2011-11-01

    The development and assessment of a readout system based on field programmable gate arrays (FPGA) for dedicated nuclear medicine cameras is presented. We have used Xilinx Spartan3E starter kit, which is one of the simplest FPGA evaluation boards. The aim of this work is to offer a simple, open source, data acquisition tool, which provides accurate results for nuclear imaging applications. The system has been evaluated using three different experimental setups: pulses from two position-sensitive photo-multipliers (PSPMTs) and a silicon photo-multiplier (SiPM) were recorded, using 99mTc sources. Two dual channel, external, 12 bit analog to digital converters with a sampling rate of 1 Msps per channel were used. The tool was designed using Xilinx's embedded development kit and was based in Xilinx's Microblaze soft-core processor. A reference multiparameter-based data acquisition system using nuclear instrumentation modules was used for the evaluation of the proposed system. A number of tests were carried out to assess different algorithms for pulse maximum estimation and Gaussian fitting provided optimal results. The results have shown that the FPGA data acquisition system (i) provides accurate digitization of the PSPMT anode signals under various conditions and (ii) gives similar energy spectra when SiPMs are used.

  7. A robust and simple two-mode digital calibration technique for pipelined ADC

    NASA Astrophysics Data System (ADS)

    Xiumei, Yin; Nan, Zhao; Bomeh Kobenge, Sekedi; Huazhong, Yang

    2011-03-01

    This paper presents a two-mode digital calibration technique for pipelined analog-to-digital converters (ADC). The proposed calibration eliminates the errors of residual difference voltage induced by capacitor mismatch of pseudorandom (PN) sequence injection capacitors at the ADC initialization, while applies digital background calibration to continuously compensate the interstage gain errors in ADC normal operation. The presented technique not only reduces the complexity of analog circuit by eliminating the implementation of PN sequence with accurate amplitude in analog domain, but also improves the performance of digital background calibration by minimizing the sensitivity of calibration accuracy to sub-ADC errors. The use of opamps with low DC gains in normal operation makes the proposed design more compatible with future nanometer CMOS technology. The prototype of a 12-bit 40-MS/s pipelined ADC with the two-mode digital calibration is implemented in 0.18-μm CMOS process. Adopting a simple telescopic opamp with a DC gain of 58-dB in the first stage, the measured SFDR and SNDR within the first Nyquist zone reach 80-dB and 66-dB, respectively. With the calibration, the maximum integral nonlinearity (INL) of the ADC reduces from 4.75-LSB to 0.65-LSB, while the ADC core consumes 82-mW at 3.3-V power supply.

  8. A novel design of infrared focal plane array with digital read out interface

    NASA Astrophysics Data System (ADS)

    Liu, Xiaoyang; Ding, Ruijun; Lu, Wei; Zhou, Chun

    2010-10-01

    Infrared focal plane array (IRFPA) with digital read out interface is a key sign of the third generation IRFPA, which plays an important role in the reliability and miniaturization of infrared systems. A readout integrated circuit (ROIC) of IRFPA with digital readout interface based on dual ramp single slope (DRSS) analog to digital converter (ADC) architecture is presented in the paper. The design is realized using shared ADCs in column-wise and these ADCs are consisted of simplified DRSS architecture and shared units. Sample, conversion and readout are proceeded simultaneously in order to adapt large scale and high readout frame rate application. This circuit also shows many advantages, including small area and low power consumption. Simulation result shows that this architecture can be expand to 320×256 pixel array with a frame rate of 100 frames per second or a larger size whit lower frame rate, the quantized resolution of this circuit is 12 bit, and the analog power consumption is only 17μw per ADC.

  9. An Embedded Sensor Node Microcontroller with Crypto-Processors.

    PubMed

    Panić, Goran; Stecklina, Oliver; Stamenković, Zoran

    2016-04-27

    Wireless sensor network applications range from industrial automation and control, agricultural and environmental protection, to surveillance and medicine. In most applications, data are highly sensitive and must be protected from any type of attack and abuse. Security challenges in wireless sensor networks are mainly defined by the power and computing resources of sensor devices, memory size, quality of radio channels and susceptibility to physical capture. In this article, an embedded sensor node microcontroller designed to support sensor network applications with severe security demands is presented. It features a low power 16-bitprocessor core supported by a number of hardware accelerators designed to perform complex operations required by advanced crypto algorithms. The microcontroller integrates an embedded Flash and an 8-channel 12-bit analog-to-digital converter making it a good solution for low-power sensor nodes. The article discusses the most important security topics in wireless sensor networks and presents the architecture of the proposed hardware solution. Furthermore, it gives details on the chip implementation, verification and hardware evaluation. Finally, the chip power dissipation and performance figures are estimated and analyzed.

  10. An Embedded Sensor Node Microcontroller with Crypto-Processors

    PubMed Central

    Panić, Goran; Stecklina, Oliver; Stamenković, Zoran

    2016-01-01

    Wireless sensor network applications range from industrial automation and control, agricultural and environmental protection, to surveillance and medicine. In most applications, data are highly sensitive and must be protected from any type of attack and abuse. Security challenges in wireless sensor networks are mainly defined by the power and computing resources of sensor devices, memory size, quality of radio channels and susceptibility to physical capture. In this article, an embedded sensor node microcontroller designed to support sensor network applications with severe security demands is presented. It features a low power 16-bitprocessor core supported by a number of hardware accelerators designed to perform complex operations required by advanced crypto algorithms. The microcontroller integrates an embedded Flash and an 8-channel 12-bit analog-to-digital converter making it a good solution for low-power sensor nodes. The article discusses the most important security topics in wireless sensor networks and presents the architecture of the proposed hardware solution. Furthermore, it gives details on the chip implementation, verification and hardware evaluation. Finally, the chip power dissipation and performance figures are estimated and analyzed. PMID:27128925

  11. The pulsed amplitude unit for the SLC

    SciTech Connect

    Rolfe, J.; Browne, M.J.; Jobe, R.K.

    1987-02-01

    There is a recurring requirement in the SLC for the control of devices such as magnets, phase shifters, and attenuators on a beam-by-beam basis. The Pulsed Amplitude Unit (PAU) is a single width CAMAC module developed for this purpose. It provides digitally programmed analog output voltages on a beam-by-beam basis. Up to 32 preprogrammed values of output voltage are available from the single analog output of the module, and any of these values can be associated with any of the 256 possible SLC beam definitions. A 12-bit Analog-to-Digital Converter (ADC) digitizes an analog input signal at the appropriate beam time and stores it in a buffer memory. This feature is normally used to monitor the response of the device being controlled by the PAU at each beam time. Initial application of the PAU is a part of the system that controls the output of Klystrons in the SLC. The PAU combines several different functions in a single module. In order to accommodate these functions in a single width CAMAC module, field programmed logic is used extensively. Field Programmable Logic Arrays, Programmed Array Logic, and a Field Programmable Logic Sequencer are employed.

  12. Measurements of profiles of aerosol/cloud in the lower atmosphere using a lidar system

    NASA Astrophysics Data System (ADS)

    Gasmi, Khaled

    2016-10-01

    Preliminary measurements of profiles of aerosol/cloud in the lower atmosphere using a homemade stationary groundbased lidar system will be presented. In addition, information on basic characteristics and performance of the lidar system will be provided. Aerosol/Cloud lidar system in monostatic coaxial configuration uses the fundamental (1064 nm) and the second harmonic (532 nm) of a pulsed solid state Nd:YAG laser to provide information on the relative concentration and spatial distribution of aerosol particles and cloud water droplets. Beam expander is used to reduce the laser beam divergence before to be transmitted into the atmosphere. In this study, high-resolution vertical profiles from the near ground up to 15 km altitude are obtained. A Newtonian telescope of diameter 400 mm with an adjustable field of view (FOV) is used to collect the elastic backscattered signal. A photomultiplier tube (PMT) is used for the 532 nm wavelength detection channel, while an avalanche photodiode (APD) is used for the 1064 nm wavelength detection channel. The optoelectronic detection channels use two similar very high frequency preamplification circuit. Data are acquired with a nominal spatial resolution of 7.5 m using a 12-bit 20 MHz analog-to-digital converter (ADC) for each channel. Many functions, such as, range determination, background subtraction, digitization, and averaging are performed by the receiver subsystem. In addition, spatial resolution and linear dynamic range were optimized during signal processing.

  13. Feasibility of Direct Digital Sampling for Diffuse Optical Frequency Domain Spectroscopy in Tissue.

    PubMed

    Roblyer, Darren; O'Sullivan, Thomas D; Warren, Robert V; Tromberg, Bruce

    2013-04-01

    Frequency domain optical spectroscopy in the diffusive regime is currently being investigated for biomedical applications including tumor detection, therapy monitoring, exercise metabolism, and others. Analog homodyne or heterodyne detection of sinusoidally modulated signals have been the predominant method for measuring phase and amplitude of photon density waves that have traversed through tissue. Here we demonstrate the feasibility of utilizing direct digital sampling of modulated signals using a 3.6 Gigasample/second 12 bit Analog to Digital Converter. Digitally synthesized modulated signals between 50MHz and 400MHz were measured on tissue simulating phantoms at six near-infrared wavelengths. An amplitude and phase precision of 1% and 0.6 degrees were achieved during drift tests. Amplitude, phase, scattering and absorption values were compared with a well-characterized network analyzer based diffuse optical device. Measured optical properties measured with both systems were within 3.6% for absorption and 2.8% for scattering over a range of biologically relevant values. Direct digital sampling represents a viable method for frequency domain diffuse optical spectroscopy and has the potential to reduce system complexity, size, and cost.

  14. Analog signal functional converters for solar array simulators

    NASA Astrophysics Data System (ADS)

    Mizrah, E. A.; Balakirev, R. V.; Shtabel, N. V.; Poymanov, D. N.

    2016-11-01

    In the article authors describe different types of functional converters for solar array simulators. Functional converter used to get nonlinear current to voltage characteristic on solar array simulator output. Described and studied two types of digital functional converters and compared with analog functional converter.

  15. Catalytic Converters Maintain Air Quality in Mines

    NASA Technical Reports Server (NTRS)

    2014-01-01

    At Langley Research Center, engineers developed a tin-oxide based washcoat to prevent oxygen buildup in carbon dioxide lasers used to detect wind shears. Airflow Catalyst Systems Inc. of Rochester, New York, licensed the technology and then adapted the washcoat for use as a catalytic converter to treat the exhaust from diesel mining equipment.

  16. Lathe converted for grinding aspheric surfaces

    NASA Technical Reports Server (NTRS)

    Larmer, J. W.; Levinsohn, M.; Mc Craw, D.; Pessagno, E. H.; Taub, F. J.

    1964-01-01

    A standard overarm tracing lathe converted by the addition of an independently driven diamond grinding wheel is used for grinding aspheric surfaces. The motion of the wheel is controlled by the lathe air tracer following the template which produces the desired aspheric profile.

  17. Converting neutron stars into strange stars

    NASA Technical Reports Server (NTRS)

    Olinto, A. V.

    1991-01-01

    If strange matter is formed in the interior of a neutron star, it will convert the entire neutron star into a strange star. The proposed mechanisms are reviewed for strange matter seeding and the possible strange matter contamination of neutron star progenitors. The conversion process that follows seeding and the recent calculations of the conversion timescale are discussed.

  18. Assay for Angiotensin-Converting Enzyme.

    ERIC Educational Resources Information Center

    Russo, Salvatore F.

    1983-01-01

    Describes a three-hour experiment designed to introduce students to chemistry of the angiotensis-converting enzyme, illustrate design of a quenched fluorescence substrate, and examine considerations necessary in designing a clinical assay. Includes background information on the biochemistry of hypertension, reagents/materials needed, procedures…

  19. Multilevel converters for large electric drives

    SciTech Connect

    Tolbert, L.M.; Peng, F.Z.

    1997-11-01

    Traditional two-level high frequency pulse width modulation (PWM) inverters for motor drives have several problems associated with their high frequency switching which produces common-mode voltage and high voltage change (dV/dt) rates to the motor windings. Multilevel inverters solve these problems because their devices can switch at a much lower frequency. Two different multilevel topologies are identified for use as a converter for electric drives, a cascade inverter with separate dc sources and a back-to-back diode clamped converter. The cascade inverter is a natural fit for large automotive all electric drives because of the high VA ratings possible and because it uses several levels of dc voltage sources which would be available from batteries or fuel cells. The back to back diode damped converter is ideal where a source of ac voltage is available such as a hybrid electric vehicle. Simulation and experimental results show the superiority of these two converters over PWM based drives.

  20. Convert natural gas into clean transportation fuels

    SciTech Connect

    Agee, M.A.

    1997-03-01

    A new process economically converts natural gas into synthetic transportation fuels that are free of sulfur, metals, aromatics and are clear in appearance. The process, developed by Syntroleum Corp., is energy self-sufficient and can be implemented in sizes small enough to fit a large number of the world`s gas fields. The process is described.

  1. Hybrid switch for resonant power converters

    DOEpatents

    Lai, Jih-Sheng; Yu, Wensong

    2014-09-09

    A hybrid switch comprising two semiconductor switches connected in parallel but having different voltage drop characteristics as a function of current facilitates attainment of zero voltage switching and reduces conduction losses to complement reduction of switching losses achieved through zero voltage switching in power converters such as high-current inverters.

  2. High-frequency matrix converter with square wave input

    DOEpatents

    Carr, Joseph Alexander; Balda, Juan Carlos

    2015-03-31

    A device for producing an alternating current output voltage from a high-frequency, square-wave input voltage comprising, high-frequency, square-wave input a matrix converter and a control system. The matrix converter comprises a plurality of electrical switches. The high-frequency input and the matrix converter are electrically connected to each other. The control system is connected to each switch of the matrix converter. The control system is electrically connected to the input of the matrix converter. The control system is configured to operate each electrical switch of the matrix converter converting a high-frequency, square-wave input voltage across the first input port of the matrix converter and the second input port of the matrix converter to an alternating current output voltage at the output of the matrix converter.

  3. TiConverter: A training image converting tool for multiple-point geostatistics

    NASA Astrophysics Data System (ADS)

    Fadlelmula F., Mohamed M.; Killough, John; Fraim, Michael

    2016-11-01

    TiConverter is a tool developed to ease the application of multiple-point geostatistics whether by the open source Stanford Geostatistical Modeling Software (SGeMS) or other available commercial software. TiConverter has a user-friendly interface and it allows the conversion of 2D training images into numerical representations in four different file formats without the need for additional code writing. These are the ASCII (.txt), the geostatistical software library (GSLIB) (.txt), the Isatis (.dat), and the VTK formats. It performs the conversion based on the RGB color system. In addition, TiConverter offers several useful tools including image resizing, smoothing, and segmenting tools. The purpose of this study is to introduce the TiConverter, and to demonstrate its application and advantages with several examples from the literature.

  4. Parametric study of minimum converter loss in an energy-storage dc-to-dc converter

    NASA Technical Reports Server (NTRS)

    Wong, R. C.; Owen, H. A., Jr.; Wilson, T. G.

    1982-01-01

    Through a combination of analytical and numerical minimization procedures, a converter design that results in the minimum total converter loss (including core loss, winding loss, capacitor and energy-storage-reactor loss, and various losses in the semiconductor switches) is obtained. Because the initial phase involves analytical minimization, the computation time required by the subsequent phase of numerical minimization is considerably reduced in this combination approach. The effects of various loss parameters on the optimum values of the design variables are also examined.

  5. Radiation effects in power converters: Design of a radiation hardened integrated switching DC/DC converter

    NASA Astrophysics Data System (ADS)

    Adell, Philippe

    When electronic devices are used in space and military systems, they may be exposed to various types of radiation, including photons, electrons, protons, neutrons, and heavy ions. The effects of radiation on the semiconductor devices within the systems range from gradual degradation to catastrophic failure. In order to design and produce reliable systems for space or military applications, it is necessary to understand the device-level effects of radiation and develop appropriate strategies for reducing system susceptibility. This research focuses on understanding radiation effects in power converters for space and military applications. We show that power converters are very sensitive to radiation (total-dose, single event effects and displacement damage) and that their radiation response is dependent on input bias conditions and load conditions. We compared the radiation hardness of various power converter topologies using experiments and simulations. Evaluation of these designs under different modes of operation is demonstrated to be critical for determining radiation hardness. We emphasize the correlation between radiation effects and the role of the dynamic response of these topologies. For instance, total dose exposure has been found to degrade loop gain and affect regulation in some converters. We propose several radiation-hardening solutions to improve the radiation response of these designs. For instance, we demonstrate the design of a digitally controlled boost converter suitable for space applications based on an SRAM FPGA. A design hardening solution has been developed and successfully applied through VHDL simulations and experiments to assure the continuous operation of the converter in the presence of SEES (more precisely SEFIs). This research led to the design of a digitally controlled radiation hardened integrated switching buck converter. The proposed design is suitable for micro-satellite applications and is based on a high-voltage/CMOS process

  6. Component technology for Stirling power converters

    SciTech Connect

    Thieme, L.G.

    1994-09-01

    NASA Lewis Research Center has organized a component technology program as part of the efforts to develop Stirling converter technology for space power applications. The Stirling space power program is part of the NASA High Capacity Power Project of the Civil Space Technology Initiative (CSTI). NASA Lewis is also providing technical management for a DOE/Sandia program to develop Stirling converters for solar terrestrial power producing electricity for the utility grid. The primary contractors for the space power and solar terrestrial programs develop component technologies directly related to their program goals. This Lewis component technology effort, while coordinated with the main programs, aims at longer term issues, advanced technologies, and independent assessments. This paper will present an overview of work on linear alternators, engine/alternator/load interactions and controls, heat exchangers, materials, life and reliability, and bearings.

  7. Component technology for stirling power converters

    NASA Technical Reports Server (NTRS)

    Thieme, Lanny G.

    1991-01-01

    NASA Lewis Research Center has organized a component technology program as part of the efforts to develop Stirling converter technology for space power applications. The Stirling Space Power Program is part of the NASA High Capacity Power Project of the Civil Space Technology Initiative (CSTI). NASA Lewis is also providing technical management for the DOE/Sandia program to develop Stirling converters for solar terrestrial power producing electricity for the utility grid. The primary contractors for the space power and solar terrestrial programs develop component technologies directly related to their goals. This Lewis component technology effort, while coordinated with the main programs, aims at longer term issues, advanced technologies, and independent assessments. An overview of work on linear alternators, engine/alternator/load interactions and controls, heat exchangers, materials, life and reliability, and bearings is presented.

  8. MAGIC: Model and Graphic Information Converter

    NASA Technical Reports Server (NTRS)

    Herbert, W. C.

    2009-01-01

    MAGIC is a software tool capable of converting highly detailed 3D models from an open, standard format, VRML 2.0/97, into the proprietary DTS file format used by the Torque Game Engine from GarageGames. MAGIC is used to convert 3D simulations from authoritative sources into the data needed to run the simulations in NASA's Distributed Observer Network. The Distributed Observer Network (DON) is a simulation presentation tool built by NASA to facilitate the simulation sharing requirements of the Data Presentation and Visualization effort within the Constellation Program. DON is built on top of the Torque Game Engine (TGE) and has chosen TGE's Dynamix Three Space (DTS) file format to represent 3D objects within simulations.

  9. Integrated mode converter for mode division multiplexing

    NASA Astrophysics Data System (ADS)

    Perez-Galacho, Diego; Alonso-Ramos, Carlos Alberto; Marris-Morini, Delphine; Vakarin, Vladyslav; Le Roux, Xavier; Ortega-Moñux, Alejandro; Wangüemert-Perez, Juan Gonzalo; Vivien, Laurent

    2016-05-01

    The ever growing demands of bandwidth in optical communication systems are making traditional Wavelength Division Multiplexing (WDM) based systems to reach its limit. In order to cope with future bandwidth demand is necessary to use new levels of orthogonality, such as the waveguide mode or the polarization state. Mode Division Multiplexing (MDM) has recently attracted attention as a possible solution to increase aggregate bandwidth. In this work we discuss the proposition a of mode converter that can cover the whole C-Band of optical communications. The Mode Converter is based on two Multimode Interference (MMI) couplers and a phase shifter. Insertion loss (IL) below 0.2 dB and Extinction ratio (ER) higher than 20 dB in a broad bandwidth range of 1.5 μm to 1.6 μm have been estimated. The total length of the device is less than 30 μm.

  10. Real power measurement using a thermal converter

    NASA Astrophysics Data System (ADS)

    Möhring, Tobias; Spiegel, Thomas; Funck, Torsten

    2014-03-01

    In this paper, a new application of thermal converters is presented which allows energy, power and rms measurement without the need to substitute the measurement signal with a dc signal as performed in ac-dc transfer. Using a mathematical model of standard planar multijunction thermal converters (PMJTCs), the effective power acting inside the heater of the PMJTC is calculated from the output signal of its thermocouples. Due to the underlying physical principles, this method not only allows the calculation of the rms value of sinusoidal signals but also the average power and absolute energy contained in non-sinusoidal, non-periodic and even non-stationary signals, as appearing in the characterization of energy harvesters.

  11. Component technology for Stirling power converters

    NASA Technical Reports Server (NTRS)

    Thieme, Lanny G.

    1991-01-01

    NASA Lewis Research Center has organized a component technology program as part of the efforts to develop Stirling converter technology for space power applications. The Stirling Space Power Program is part of the NASA High Capacity Power Project of the Civil Space Technology Initiative (CSTI). NASA Lewis is also providing technical management for the DOE/Sandia program to develop Stirling converters for solar terrestrial power producing electricity for the utility grid. The primary contractors for the space power and solar terrestrial programs develop component technologies directly related to their goals. This Lewis component technology effort, while coordinated with the main programs, aims at longer term issues, advanced technologies, and independent assessments. An overview of work on linear alternators, engine/alternator/load interactions and controls, heat exchangers, materials, life and reliability, and bearings is presented.

  12. Flower-petal mode converter for NLC

    SciTech Connect

    Hoag, H.A.; Tantawi, S.G.; Callin, R.

    1993-04-01

    It is important to minimize power loss in the waveguide system connecting klystron, pulse-compressor, and accelerator in an X-Band NLC. However, existing designs of klystron output cavity circuits and accelerator input couplers utilize rectangular waveguide which has relatively high transmission loss. It is therefore necessary to convert to and from the low-loss mode in circular waveguide at each end of the system. A description is given of development work on high-power, high-vacuum `flower-petal` transducers, which convert the TE{sub 10} mode in rectangular guide to the TE{sub 01} mode in circular guide. A three-port modification of the flower petal device, which can be used as either a power combiner at the klystron or a power divider at the accelerator is also described.

  13. Strained quantum well photovoltaic energy converter

    NASA Technical Reports Server (NTRS)

    Freundlich, Alexandre (Inventor); Renaud, Philippe (Inventor); Vilela, Mauro Francisco (Inventor); Bensaoula, Abdelhak (Inventor)

    1998-01-01

    An indium phosphide photovoltaic cell is provided where one or more quantum wells are introduced between the conventional p-conductivity and n-conductivity indium phosphide layer. The approach allows the cell to convert the light over a wider range of wavelengths than a conventional single junction cell and in particular convert efficiently transparency losses of the indium phosphide conventional cell. The approach hence may be used to increase the cell current output. A method of fabrication of photovoltaic devices is provided where ternary InAsP and InGaAs alloys are used as well material in the quantum well region and results in an increase of the cell current output.

  14. Thermophotovoltaic Converter Design for Radioisotope Power Systems

    SciTech Connect

    Crowley, Christopher J.; Elkouh, Nabil A.; Murray, Susan; Murray, Christopher

    2004-02-04

    The development of lightweight, efficient power for emerging NASA missions and recent advances in thermophotovoltaic (TPV) conversion technology have renewed interest in combining radioisotope heat sources with photovoltaic energy conversion. Thermophotovoltaic power conversion uses advanced materials able to utilize a broader, spectrally tuned range of wavelengths for more efficient power conversion than solar cells. Spectral control, including selective emitters, TPV module, and filters, are key to high-efficiency operation. This paper outlines the mechanical, thermal, and optical designs for the converter, including the heat source, the selective emitter, filters, photovoltaic (PV) cells, and optical cavity components. Focus is on the emitter type and the band-gap of InGaAs PV cells in developing the design. Any component and converter data available at the time of publication will also be presented.

  15. Fast Constant Weight Codeword to Index Converter

    DTIC Science & Technology

    2011-08-01

    en.wikipedia.org/wiki/Side_channel_attack. [5] D. E. Knuth , The Art of Computer Programming, “Generating all com- binations and partitions,” Vol. 4...Fast Constant Weight Codeword to Index Converter J. T. Butler T. Sasao Department of Electrical and Computer Engineering Department of Computer ...represen- tation. The middle column shows how this value is computed according to (1). The rightmost column of Table I shows the corresponding 6 bit

  16. APPARATUS FOR CONVERTING HEAT INTO ELECTRICITY

    DOEpatents

    Crouthamel, C.E.; Foster, M.S.

    1964-01-28

    This patent shows an apparatus for converting heat to electricity. It includes a galvanic cell having an anodic metal anode, a fused salt electrolyte, and a hydrogen cathode having a diffusible metal barrier of silver-- palladium alloy covered with sputtered iron on the side next to the fused electrolyte. Also shown is a regenerator for regenerating metal hydride produced by the galvanic cell into hydrogen gas and anodic metal, both of which are recycled. (AEC)

  17. Thermionic converter performance with oxide collectors

    NASA Technical Reports Server (NTRS)

    Lieb, D.; Goodale, D.; Briere, T.; Balestra, C.

    1977-01-01

    Thermionic converters using a variety of metal oxide collector surfaces have been fabricated and tested. Both work function and power output data are presented and evaluated. Oxides of barium, strontium, zinc, tungsten and titanium have been incorporated into a variable spacing converter. Tungsten oxide was found to give the highest converter performance and to furnish oxygen for the emitter at the same time. Oxygenated emitters operate at reduced cesium pressure with an increase in electrode spacing. Electron spectroscopy for chemical analysis (ESCA) performed on several tungsten oxide collectors showed cesium penetration of the oxide layer, possibly forming a cesium tungstate bronze. Titanium oxide showed high performance but did not furnish oxygen for the emitter; strontium oxide, in the form of a sprayed layer, appeared to dissociate in the presence of cesium. Sprayed coatings of barium and zinc oxides produced collector work functions of about 1.3 eV, but had excessive series resistance. Lanthanum hexaboride, in combination with oxygen introduced through a silver tube, and cesium produced a low work function collector and better than average performance.

  18. High power density dc/dc converter: Selection of converter topology

    NASA Technical Reports Server (NTRS)

    Divan, Deepakraj M.

    1990-01-01

    The work involved in the identification and selection of a suitable converter topology is described. Three new dc/dc converter topologies are proposed: Phase-Shifted Single Active Bridge DC/DC Converter; Single Phase Dual Active Bridges DC/DC Converter; and Three Phase Dual Active Bridges DC/DC Converter (Topology C). The salient features of these topologies are: (1) All are minimal in structure, i.e., each consists of an input and output bridge, input and output filter and a transformer, all components essential for a high power dc/dc conversion process; (2) All devices of both the bridges can operate under near zero-voltage conditions, making possible a reduction of device switching losses and hence, an increase in switching frequency; (3) All circuits operate at a constant frequency, thus simplifying the task of the magnetic and filter elements; (4) Since, the leakage inductance of the transformer is used as the main current transfer element, problems associated with the diode reverse recovery are eliminated. Also, this mode of operation allows easy paralleling of multiple modules for extending the power capacity of the system; (5) All circuits are least sensitive to parasitic impedances, infact the parasitics are efficently utilized; and (6) The soft switching transitions, result in low electromagnetic interference. A detailed analysis of each topology was carried out. Based on the analysis, the various device and component ratings for each topology operating at an optimum point, and under the given specifications, are tabulated and discussed.

  19. Dc to ac converter operates efficiently at low input voltages

    NASA Technical Reports Server (NTRS)

    1965-01-01

    Self-oscillating dc to ac converter with transistor switching to produce a square wave output is used for low and high voltage power sources. The converter has a high efficiency throughout a wide range of loads.

  20. 3. Rear (north) and east elevations of converted chicken house, ...

    Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

    3. Rear (north) and east elevations of converted chicken house, with smokehouse, cooling (well) house, and residence in background - Henry E. Williams Farmstead, Converted Chicken House, East of Residence & Smokehouse, Cedar Point, Chase County, KS

  1. A Laboratory Study of X-to-Frequency Converters.

    ERIC Educational Resources Information Center

    Kartalopoulos, Stamatios V.

    1979-01-01

    Describes a laboratory demonstration that can be used to convert an analog quantity into frequency, which can then be converted into a binary measure using either an oscilloscope or a frequency counter. (MA)

  2. Voltage balanced multilevel voltage source converter system

    DOEpatents

    Peng, F.Z.; Lai, J.S.

    1997-07-01

    Disclosed is a voltage balanced multilevel converter for high power AC applications such as adjustable speed motor drives and back-to-back DC intertie of adjacent power systems. This converter provides a multilevel rectifier, a multilevel inverter, and a DC link between the rectifier and the inverter allowing voltage balancing between each of the voltage levels within the multilevel converter. The rectifier is equipped with at least one phase leg and a source input node for each of the phases. The rectifier is further equipped with a plurality of rectifier DC output nodes. The inverter is equipped with at least one phase leg and a load output node for each of the phases. The inverter is further equipped with a plurality of inverter DC input nodes. The DC link is equipped with a plurality of rectifier charging means and a plurality of inverter discharging means. The plurality of rectifier charging means are connected in series with one of the rectifier charging means disposed between and connected in an operable relationship with each adjacent pair of rectifier DC output nodes. The plurality of inverter discharging means are connected in series with one of the inverter discharging means disposed between and connected in an operable relationship with each adjacent pair of inverter DC input nodes. Each of said rectifier DC output nodes are individually electrically connected to the respective inverter DC input nodes. By this means, each of the rectifier DC output nodes and each of the inverter DC input nodes are voltage balanced by the respective charging and discharging of the rectifier charging means and the inverter discharging means. 15 figs.

  3. Voltage balanced multilevel voltage source converter system

    DOEpatents

    Peng, Fang Zheng; Lai, Jih-Sheng

    1997-01-01

    A voltage balanced multilevel converter for high power AC applications such as adjustable speed motor drives and back-to-back DC intertie of adjacent power systems. This converter provides a multilevel rectifier, a multilevel inverter, and a DC link between the rectifier and the inverter allowing voltage balancing between each of the voltage levels within the multilevel converter. The rectifier is equipped with at least one phase leg and a source input node for each of the phases. The rectifier is further equipped with a plurality of rectifier DC output nodes. The inverter is equipped with at least one phase leg and a load output node for each of the phases. The inverter is further equipped with a plurality of inverter DC input nodes. The DC link is equipped with a plurality of rectifier charging means and a plurality of inverter discharging means. The plurality of rectifier charging means are connected in series with one of the rectifier charging means disposed between and connected in an operable relationship with each adjacent pair of rectifier DC output nodes. The plurality of inverter discharging means are connected in series with one of the inverter discharging means disposed between and connected in an operable relationship with each adjacent pair of inverter DC input nodes. Each of said rectifier DC output nodes are individually electrically connected to the respective inverter DC input nodes. By this means, each of the rectifier DC output nodes and each of the inverter DC input nodes are voltage balanced by the respective charging and discharging of the rectifier charging means and the inverter discharging means.

  4. Solar-energy-process-converter system

    SciTech Connect

    Shinn, W.A.

    1981-01-20

    A solar-energy-process-converter system whereby the energy from the sun is accumulated and projected by a parabolic reflector so as to impinge upon a cluster of thermocouples to create electrical energy for activating an electrolysis unit through which hydrogen and oxygen are generated and stored. The system can also include a steam-turbine electrical-generator plant that is adapted to be operated by the burning of the hydrogen and oxygen, and the gases can further be used to establish heat to drive a thermocouple electrical-generator plant, wherein the stored hydrogen is further employed as a fuel for vehicle and other engines.

  5. Hot carrier metamaterial detectors and energy converters

    NASA Astrophysics Data System (ADS)

    Krayer, Lisa; Munday, Jeremy N.

    Metamaterials can be used to manipulate the flow of light in ways not typically available with traditional materials. Beyond their optical properties, metamaterials can be used as the basis for optoelectronic devices through the incorporation of a metal-semiconductor interface. The absorbed radiation in the metal can excite surface plasmons, which nonradiatively decay into hot electrons or holes that can be injected into the base semiconductor and contribute to photocurrent generation. In this talk, we will present our latest work on metamaterial photo-detectors and solar energy converters.

  6. A wideband 12 GHz down converter

    NASA Technical Reports Server (NTRS)

    Newman, B. A.; Rosenbaum, F. J.

    1972-01-01

    The design, fabrication, and evaluation of a single ended 12 GHz down-converter suitable for use in a low cost satellite ground terminal is described. The mixer uses waveguide, coaxial and MIC (microwave integrated circuit) transmission line components. Theoretical and experimental analyses of several microstrip circuit elements are presented including the traveling wave-directional filter, quarter wave-length proximity directional coupler, low pass filter and the quarterwave band stop filter. The optimum performance achieved for the mixer using a packaged diode was 9.4 db conversion loss and a bandwidth of 275 MHz.

  7. Converting information from paper to optical media

    NASA Technical Reports Server (NTRS)

    Deaton, Timothy N.; Tiller, Bruce K.

    1990-01-01

    The technology of converting large amounts of paper into electronic form is described for use in information management systems based on optical disk storage. The space savings and photographic nature of microfiche are combined in these systems with the advantages of computerized data (fast and flexible retrieval of graphics and text, simultaneous instant access for multiple users, and easy manipulation of data). It is noted that electronic imaging systems offer a unique opportunity to dramatically increase the productivity and profitability of information systems. Particular attention is given to the CALS (Computer-aided Aquisition and Logistic Support) system.

  8. Advanced Optical A/D Converter

    DTIC Science & Technology

    1993-05-01

    before the receiver and separately by reducing the gain in the EDFA . It is important to note that the optical power level was varied while all the...could not exceed roughly 50% of the maximum power available at full gain from the EDFA . 4.2 Baseband-Mode Testing The single-channel system was also...AD-A275 663 Advanced Optical A/D Convert M.C. Hamilton, J.A. Bell, D.A. Leep, J.P. Lin The Boeing Company Boeing Defense and Space Group P.O. Box

  9. Solid state transport-based thermoelectric converter

    DOEpatents

    Hu, Zhiyu

    2010-04-13

    A solid state thermoelectric converter includes a thermally insulating separator layer, a semiconducting collector and an electron emitter. The electron emitter comprises a metal nanoparticle layer or plurality of metal nanocatalyst particles disposed on one side of said separator layer. A first electrically conductive lead is electrically coupled to the electron emitter. The collector layer is disposed on the other side of the separator layer, wherein the thickness of the separator layer is less than 1 .mu.m. A second conductive lead is electrically coupled to the collector layer.

  10. 7 CFR 12.32 - Converted wetland identification criteria.

    Code of Federal Regulations, 2013 CFR

    2013-01-01

    ... 7 Agriculture 1 2013-01-01 2013-01-01 false Converted wetland identification criteria. 12.32 Section 12.32 Agriculture Office of the Secretary of Agriculture HIGHLY ERODIBLE LAND AND WETLAND CONSERVATION Wetland Conservation § 12.32 Converted wetland identification criteria. (a) Converted...

  11. 7 CFR 12.32 - Converted wetland identification criteria.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 7 Agriculture 1 2010-01-01 2010-01-01 false Converted wetland identification criteria. 12.32 Section 12.32 Agriculture Office of the Secretary of Agriculture HIGHLY ERODIBLE LAND AND WETLAND CONSERVATION Wetland Conservation § 12.32 Converted wetland identification criteria. (a) Converted...

  12. 7 CFR 12.32 - Converted wetland identification criteria.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 7 Agriculture 1 2011-01-01 2011-01-01 false Converted wetland identification criteria. 12.32 Section 12.32 Agriculture Office of the Secretary of Agriculture HIGHLY ERODIBLE LAND AND WETLAND CONSERVATION Wetland Conservation § 12.32 Converted wetland identification criteria. (a) Converted...

  13. 7 CFR 12.32 - Converted wetland identification criteria.

    Code of Federal Regulations, 2014 CFR

    2014-01-01

    ... 7 Agriculture 1 2014-01-01 2014-01-01 false Converted wetland identification criteria. 12.32 Section 12.32 Agriculture Office of the Secretary of Agriculture HIGHLY ERODIBLE LAND AND WETLAND CONSERVATION Wetland Conservation § 12.32 Converted wetland identification criteria. (a) Converted...

  14. 7 CFR 12.32 - Converted wetland identification criteria.

    Code of Federal Regulations, 2012 CFR

    2012-01-01

    ... 7 Agriculture 1 2012-01-01 2012-01-01 false Converted wetland identification criteria. 12.32 Section 12.32 Agriculture Office of the Secretary of Agriculture HIGHLY ERODIBLE LAND AND WETLAND CONSERVATION Wetland Conservation § 12.32 Converted wetland identification criteria. (a) Converted...

  15. Torque converter and assembly utilizing same

    SciTech Connect

    Pitassi, V.E.; Fernandez, A.

    1989-12-26

    This patent describes a torque converter for converting a first torque to a second torque. It comprises: a housing; an input shaft having the first torque; a driving sun gear rotatable about a first axis, the input shaft being coupled to the sun gear; a driven carrier including a shaft portion rotatable about the first axis; a first planetary shaft mounted on the driven carrier coaxillay with a second axis parallel to the first axis; a first planetary gear meshing with and driven by the sun gear and mounted on the first planetary shaft so that the first planetary gear is rotatable about the second axis; a first mass eccentric to the second axis and coupled to the first planetary gear for rotation together about the second axis; first and second unidirectional clutches connected to the shaft portion of the driven carrier and operating in opposite directions; an output torque shaft, one if the first and second unidirectional clutches being coupled to the output torque shaft to transmit the second torque thereto in a pulsating fashion and to permit continuous rotation of the output torque shaft and the other one of the first and second unidirectional clutches being connected to the housing to transmit an algebraic addition of the first and second torques together.

  16. Sulfur dioxide converter and pollution arrester system

    SciTech Connect

    Montalvo, V.H.

    1983-12-06

    A sulphur dioxide converter and pollution arrester system are disclosed which involves the treatment of smoke and/or contaminated air emanating from a combustion area by passage through a zone achieving turbulence into a water spray contained first treating chamber. The turbulence zone, into which an atomized catalyst is introduced, serves to create a longer path for cooling as well as increased centrifugal motion to the solid particles in the contaminated air and also the formation of sulphur trioxide. In other words, the arrangement is such that pollution arresting action is provided in the form of ''slinging'' resulting from tangential directional movement and, when combining with the water spray in the first treating chamber, the ultimate formation of sulphuric acid. Subsequently, the contaminated air, containing amounts of sulphurous and sulphuric acids, passes through a second treating chamber, where airflow throughout the system is occasioned by action at the outlet end, such as the vacuum created by a flue and not by independent mechanical means. The arrangement serves to a twofold purpose, i.e. to minimize or arrest pollution and to convert sulphur dioxide, a component of high sulphur coal, into commercially valuable sulphuric acid.

  17. Angiotensin converting enzymes in fish venom.

    PubMed

    Dos Santos, Dávida Maria Ribeiro Cardoso; de Souza, Cledson Barros; Pereira, Hugo Juarez Vieira

    2017-06-01

    Animal venoms are multifaceted mixtures, including proteins, peptides and enzymes produced by animals in defense, predation and digestion. These molecules have been investigated concerning their molecular mechanisms associated and possible pharmacological applications. Thalassophryne nattereri is a small venomous fish inhabiting the northern and northeastern coast of Brazil, and represents a relatively frequent cause of injuries. Its venom causes severe inflammatory response followed frequently by the necrosis of the affected area. Scorpaena plumieri is the most venomous fish in the Brazilian fauna and is responsible for relatively frequent accidents involving anglers and bathers. In humans, its venom causes edema, erythema, ecchymoses, nausea, vomiting, and syncope. Recently, the presence of a type of angiotensin converting enzyme (ACE) activity in the venom of Thalassophryne nattereri and Scorpaena plumieri, endemic fishes in northeastern coast of Brazil, has been described. The ACE converts angiotensin I (Ang I) into angiotensin II (Ang II) and inactivates bradykinin, there by regulating blood pressure and electrolyte homeostasis, however, their function in these venoms remains an unknown. This article provides an overview of the current knowledge on ACE in the venoms of Thalassophryne nattereri and Scorpaena plumier.

  18. Forback DC-to-DC converter

    NASA Technical Reports Server (NTRS)

    Lukemire, Alan T. (Inventor)

    1993-01-01

    A pulse-width modulated DC-to-DC power converter including a first inductor, i.e. a transformer or an equivalent fixed inductor equal to the inductance of the secondary winding of the transformer, coupled across a source of DC input voltage via a transistor switch which is rendered alternately conductive (ON) and nonconductive (OFF) in accordance with a signal from a feedback control circuit is described. A first capacitor capacitively couples one side of the first inductor to a second inductor which is connected to a second capacitor which is coupled to the other side of the first inductor. A circuit load shunts the second capacitor. A semiconductor diode is additionally coupled from a common circuit connection between the first capacitor and the second inductor to the other side of the first inductor. A current sense transformer generating a current feedback signal for the switch control circuit is directly coupled in series with the other side of the first inductor so that the first capacitor, the second inductor and the current sense transformer are connected in series through the first inductor. The inductance values of the first and second inductors, moreover, are made identical. Such a converter topology results in a simultaneous voltsecond balance in the first inductance and ampere-second balance in the current sense transformer.

  19. Forback DC-to-DC converter

    NASA Technical Reports Server (NTRS)

    Lukemire, Alan T. (Inventor)

    1995-01-01

    A pulse-width modulated DC-to-DC power converter including a first inductor, i.e. a transformer or an equivalent fixed inductor equal to the inductance of the secondary winding of the transformer, coupled across a source of DC input voltage via a transistor switch which is rendered alternately conductive (ON) and nonconductive (OFF) in accordance with a signal from a feedback control circuit is described. A first capacitor capacitively couples one side of the first inductor to a second inductor which is connected to a second capacitor which is coupled to the other side of the first inductor. A circuit load shunts the second capacitor. A semiconductor diode is additionally coupled from a common circuit connection between the first capacitor and the second inductor to the other side of the first inductor. A current sense transformer generating a current feedback signal for the switch control circuit is directly coupled in series with the other side of the first inductor so that the first capacitor, the second inductor and the current sense transformer are connected in series through the first inductor. The inductance values of the first and second inductors, moreover, are made identical. Such a converter topology results in a simultaneous voltsecond balance in the first inductance and ampere-second balance in the current sense transformer.

  20. Angiotensin converting enzyme 2 and atherosclerosis.

    PubMed

    Wang, Yutang; Tikellis, Chris; Thomas, Merlin C; Golledge, Jonathan

    2013-01-01

    Angiotensin converting enzyme 2 (ACE2) is a homolog of angiotensin converting enzyme (ACE) which generates angiotensin II from angiotensin I. ACE, its product angiotensin II and the downstream angiotensin type I receptor are important components of the renin-angiotensin system (RAS). Angiotensin II, the most important component of the RAS, promotes the development of atherosclerosis. The identification of ACE2 in 2000 opened a new chapter of research on the regulation of the RAS. ACE2 degrades pro-atherosclerotic angiotensin II and generates anti-atherosclerotic angiotensin 1-7. In this review, we explored the importance of ACE2 in protecting experimental animals from developing atherosclerosis and its involvement in human atherosclerosis. We also examined the published evidence assessing the importance of ACE2 in different cell types relevant to atherosclerosis and putative underlying cellular and molecular mechanisms linking ACE2 with protection from atherosclerosis. ACE2 shifts the balance from angiotensin II to angiotensin 1-7 inhibiting the progression of atherosclerosis in animal models.

  1. Converting DYNAMO simulations to Powersim Studio simulations

    SciTech Connect

    Walker, La Tonya Nicole; Malczynski, Leonard A.

    2014-02-01

    DYNAMO is a computer program for building and running 'continuous' simulation models. It was developed by the Industrial Dynamics Group at the Massachusetts Institute of Technology for simulating dynamic feedback models of business, economic, and social systems. The history of the system dynamics method since 1957 includes many classic models built in DYANMO. It was not until the late 1980s that software was built to take advantage of the rise of personal computers and graphical user interfaces that DYNAMO was supplanted. There is much learning and insight to be gained from examining the DYANMO models and their accompanying research papers. We believe that it is a worthwhile exercise to convert DYNAMO models to more recent software packages. We have made an attempt to make it easier to turn these models into a more current system dynamics software language, Powersim © Studio produced by Powersim AS2 of Bergen, Norway. This guide shows how to convert DYNAMO syntax into Studio syntax.

  2. Converting CSV Files to RKSML Files

    NASA Technical Reports Server (NTRS)

    Trebi-Ollennu, Ashitey; Liebersbach, Robert

    2009-01-01

    A computer program converts, into a format suitable for processing on Earth, files of downlinked telemetric data pertaining to the operation of the Instrument Deployment Device (IDD), which is a robot arm on either of the Mars Explorer Rovers (MERs). The raw downlinked data files are in comma-separated- value (CSV) format. The present program converts the files into Rover Kinematics State Markup Language (RKSML), which is an Extensible Markup Language (XML) format that facilitates representation of operations of the IDD and enables analysis of the operations by means of the Rover Sequencing Validation Program (RSVP), which is used to build sequences of commanded operations for the MERs. After conversion by means of the present program, the downlinked data can be processed by RSVP, enabling the MER downlink operations team to play back the actual IDD activity represented by the telemetric data against the planned IDD activity. Thus, the present program enhances the diagnosis of anomalies that manifest themselves as differences between actual and planned IDD activities.

  3. Polarization-switching D/A converter.

    PubMed

    Sun, Shunming; Kalkur, Thottam S

    2005-05-01

    This paper describes a novel digital-to-analog (D/A) conversion technique, which uses the analog quantity polarization as a D/A conversion medium. It can be implemented by CMOS capacitors or by ferroelectric capacitors, which exhibit strong nonlinearity in charge versus voltage behavior. Because a ferroelectric material inherently has spontaneous polarization and generally has a large dielectric constant, the effective capacitance of a ferroelectric capacitor is much larger than that of a CMOS capacitor of the same size. This ensures less influence of bottom-electrode parasitic capacitance on a ferroelectric capacitor. Furthermore, a data converter based on ferroelectric capacitors possesses the potential nonvolatile memory function owing to ferroelectric hysteresis. Along with the architecture proposed for polarization-switching digital-to-analog converter (PDAC), its circuit implementation is introduced. Described is implementation of two 9-bit bipolar PDACs: one is based on CMOS capacitors and the other on off-chip ferroelectric capacitors. Experimental results are presented for the performance of these two prototypes.

  4. Analysis of self-oscillating dc-to-dc converters

    NASA Technical Reports Server (NTRS)

    Burger, P.

    1974-01-01

    The basic operational characteristics of dc-to-dc converters are analyzed along with the basic physical characteristics of power converters. A simple class of dc-to-dc power converters are chosen which could satisfy any set of operating requirements, and three different controlling methods in this class are described in detail. Necessary conditions for the stability of these converters are measured through analog computer simulation whose curves are related to other operational characteristics, such as ripple and regulation. Further research is suggested for the solution of absolute stability and efficient physical design of this class of power converters.

  5. Buck-boost converter feedback controller design via evolutionary search

    NASA Astrophysics Data System (ADS)

    Sundareswaran, K.; Devi, V.; Nadeem, S. K.; Sreedevi, V. T.; Palani, S.

    2010-11-01

    Buck-boost converters are switched power converters. The model of the converter system varies from the ON state to the OFF state and hence traditional methods of controller design based on approximate transfer function models do not yield good dynamic response at different operating points of the converter system. This article attempts to design a feedback controller for a buck-boost type dc-dc converter using a genetic algorithm. The feedback controller design is perceived as an optimisation problem and a robust controller is estimated through an evolutionary search. Extensive simulation and experimental results provided in the article show the effectiveness of the new approach.

  6. Pre-A/D filter and AGC requirements for multimegabit telemetry data detection

    NASA Technical Reports Server (NTRS)

    Holmes, J. K.

    1979-01-01

    A candidate pre-Analog to Digital filter bandwidth versus data rate design is presented for the multimegabit telemetry demodulator/detector. The design is based on considerations of Analog to Digital bias, quantization errors, and automatic gain control effects, as well as the deleterious effects of filtering. Two methods of gain control of the input level to the analog to Digital converter are considered. The first method uses a particular value of gain, according to which bandwidth is selected. The second method uses a second narrowband noncoherent Automatic Gain Controls (in the LPF bandwidth) to attempt to keep the Analog to Digital input level constant. This second method reduces the bit error rate degradation slightly but appears to be more difficult to implement.

  7. The Front-End Readout as an Encoder IC for Magneto-Resistive Linear Scale Sensors.

    PubMed

    Tran, Trong-Hieu; Chao, Paul Chang-Po; Chien, Ping-Chieh

    2016-09-02

    This study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR) linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an "MR reader" stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs) and analog-to-digital converters (ADCs). The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR) ADC for analog-to-digital conversion is designed with linearity performance of ±1 in the least significant bit (LSB) over the input range of 0.5-2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC) 0.35-micron complementary metal oxide semiconductor (CMOS) technology for verification with a chip size of 6.61 mm², while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL) is -0.79-0.95 LSB while the differential non-linearity (DNL) is -0.68-0.72 LSB. The effective number of bits (ENOB) of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement measurement error is within

  8. The Front-End Readout as an Encoder IC for Magneto-Resistive Linear Scale Sensors

    PubMed Central

    Tran, Trong-Hieu; Chao, Paul Chang-Po; Chien, Ping-Chieh

    2016-01-01

    This study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR) linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an “MR reader” stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs) and analog-to-digital converters (ADCs). The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR) ADC for analog-to-digital conversion is designed with linearity performance of ±1 in the least significant bit (LSB) over the input range of 0.5–2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC) 0.35-micron complementary metal oxide semiconductor (CMOS) technology for verification with a chip size of 6.61 mm2, while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL) is −0.79–0.95 LSB while the differential non-linearity (DNL) is −0.68–0.72 LSB. The effective number of bits (ENOB) of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement measurement

  9. Mechanical vibration to electrical energy converter

    DOEpatents

    Kellogg, Rick Allen; Brotz, Jay Kristoffer

    2009-03-03

    Electromechanical devices that generate an electrical signal in response to an external source of mechanical vibrations can operate as a sensor of vibrations and as an energy harvester for converting mechanical vibration to electrical energy. The devices incorporate a magnet that is movable through a gap in a ferromagnetic circuit, wherein a coil is wound around a portion of the ferromagnetic circuit. A flexible coupling is used to attach the magnet to a frame for providing alignment of the magnet as it moves or oscillates through the gap in the ferromagnetic circuit. The motion of the magnet can be constrained to occur within a substantially linear range of magnetostatic force that develops due to the motion of the magnet. The devices can have ferromagnetic circuits with multiple arms, an array of magnets having alternating polarity and, encompass micro-electromechanical (MEM) devices.

  10. Centrifuges help convert factory sludge into profit

    SciTech Connect

    Gressel, A.

    1994-09-01

    Most industrial facilities must determine what to do with used oil and oily wastewater or sludge. Constructing on-site treatment facilities requires a sizable capital investment. An alternative is to pay someone to haul away the sludge for treatment and disposal. In either case, generators still are responsible for disposing the material in compliance with regulations. The Cleveland facility of Research Oil Co., a waste oil and industrial wastewater processing company, processes more than 50 million gallons of industrial waste annually. Of this volume, no more than 20% is oil; the remaining portion is water. The company reclaims fuel oil and lubricants, and converts the remainder into clean, treated, dry solids and high-Btu organic fuel for cement kilns. High-phosphate solids are used in fertilizers; other solids are disposed in secure landfills.

  11. DC-to-DC switching converter

    NASA Technical Reports Server (NTRS)

    Cuk, Slobodan M. (Inventor); Middlebrook, Robert D. (Inventor)

    1980-01-01

    A dc-to-dc converter having nonpulsating input and output current uses two inductances, one in series with the input source, the other in series with the output load. An electrical energy transferring device with storage, namely storage capacitance, is used with suitable switching means between the inductances to DC level conversion. For isolation between the source and load, the capacitance may be divided into two capacitors coupled by a transformer, and for reducing ripple, the inductances may be coupled. With proper design of the coupling between the inductances, the current ripple can be reduced to zero at either the input or the output, or the reduction achievable in that way may be divided between the input and output.

  12. Modular Power Converters for PV Applications

    SciTech Connect

    Ozpineci, Burak; Tolbert, Leon M

    2012-05-01

    This report describes technical opportunities to serve as parts of a technological roadmap for Shoals Technologies Group in power electronics for PV applications. There are many different power converter circuits that can be used for solar inverter applications. The present applications do not take advantage of the potential for using common modules. We envision that the development of a power electronics module could enable higher reliability by being durable and flexible. Modules would have fault current limiting features and detection circuits such that they can limit the current through the module from external faults and can identify and isolate internal faults such that the remaining modules can continue to operate with only minimal disturbance to the utility or customer. Development of a reliable, efficient, low-cost, power electronics module will be a key enabling technology for harnessing more power from solar panels and enable plug and play operation. Power electronics for computer power supplies, communication equipment, and transportation have all targeted reliability and modularity as key requirements and have begun concerted efforts to replace monolithic components with collections of common smart modules. This is happening on several levels including (1) device level with intelligent control, (2) functional module level, and (3) system module. This same effort is needed in power electronics for solar applications. Development of modular units will result in standard power electronic converters that will have a lower installed and operating cost for the overall system. These units will lead to increased adaptability and flexibility of solar inverters. Incorporating autonomous fault current limiting and reconfiguration capabilities into the modules and having redundant modules will lead to a durable converter that can withstand the rigors of solar power generation for more than 30 years. Our vision for the technology roadmap is that there is no need

  13. A system for converting print into braille.

    PubMed

    Blenkhorn, P

    1997-06-01

    This paper describes a method for converting text into braille, in the form in which it is stored as in a computer. The system has been designed to be configurable for a wide range of languages and character sets, and uses a predominantly table driven method to achieve this. The algorithm is explained in the context of the conversion of text into Standard English Braille (British), and the tables for this transformation are given. Particular importance has been attached to enabling braille specialists, who are not experts in computer algorithms, to be able to modify the system for either slight modifications to an existing braille code translator, or for producing a braille code translator for a new language.

  14. Radiant energy to electric energy converter

    NASA Technical Reports Server (NTRS)

    Sher, Arden (Inventor)

    1980-01-01

    Radiant energy is converted into electric energy by irradiating a capacitor including an ionic dielectric. The dielectric is a sintered crystal superionic conductor, e.g., lanthanum trifluoride, lanthanum trichloride, or silver bromide, so that a multiplicity of crystallites exist between electrodes of the capacitor. The radiant energy cyclically irradiates the dielectric so that the dielectric exhibits a cyclic photocapacitive like effect. Adjacent crystallites have abutting surfaces that enable the crystallites to effectively form a multiplicity of series capacitor elements between the electrodes. Each of the capacitor elements has a dipole layer only on or near its surface. The capacitor is initially charged to a voltage just below the dielectric breakdown voltage by connecting it across a DC source causing a current to flow through a charging resistor to the dielectric. The device can be utilized as a radiant energy detector or as a solar energy cell.

  15. [Oxidative inactivation of angiotensin-converting enzyme].

    PubMed

    Sakharov, I Iu; Dukhanina, E A; Puchnina, E A; Danilov, S M; Muzykantov, V R

    1991-01-01

    Hydrogen peroxide inactivates the purified human angiotensin-converting enzyme (ACE) in vitro; the inactivating effect of H2O2 is eliminated by an addition of catalase. The lung and kidney ACE are equally sensitive to the effect of hydrogen peroxide. After addition of oxidants (H2O2 alone or H2O2 + ascorbate or H2O2 + Fe2+ mixtures) to the membranes or homogenates of the lung, the inactivation of membrane-bound ACE is far less pronounced despite the large-scale accumulation of lipid peroxidation products. The marked inactivation of ACE in the membrane fraction (up to 55% of original activity) was observed during ACE incubation with a glucose:glucose oxidase:Fe2+ mixture. Presumably the oxidative potential of H2O2 in tissues in consumed, predominantly, for the oxidation of other components of the membrane (e.g., lipids) rather than for ACE inactivation.

  16. Clustering of cycloidal wave energy converters

    SciTech Connect

    Siegel, Stefan G.

    2016-03-29

    A wave energy conversion system uses a pair of wave energy converters (WECs) on respective active mountings on a floating platform, so that the separation of the WECs from each other or from a central WEC can be actively adjusted according to the wavelength of incident waves. The adjustable separation facilitates operation of the system to cancel reactive forces, which may be generated during wave energy conversion. Modules on which such pairs of WECs are mounted can be assembled with one or more central WECs to form large clusters in which reactive forces and torques can be made to cancel. WECs of different sizes can be employed to facilitate cancelation of reactive forces and torques.

  17. Static Frequency Converter System Installed and Tested

    NASA Technical Reports Server (NTRS)

    Brown, Donald P.; Sadhukhan, Debashis

    2003-01-01

    A new Static Frequency Converter (SFC) system has been installed and tested at the NASA Glenn Research Center s Central Air Equipment Building to provide consistent, reduced motor start times and improved reliability for the building s 14 large exhausters and compressors. The operational start times have been consistent around 2 min, 20 s per machine. This is at least a 3-min improvement (per machine) over the old variable-frequency motor generator sets. The SFC was designed and built by Asea Brown Boveri (ABB) and installed by Encompass Design Group (EDG) as part of a Construction of Facilities project managed by Glenn (Robert Scheidegger, project manager). The authors designed the Central Process Distributed Control Systems interface and control between the programmable logic controller, solid-state exciter, and switchgear, which was constructed by Gilcrest Electric.

  18. Angiotensin converting enzyme inhibition and the kidney

    NASA Technical Reports Server (NTRS)

    Hollenberg, N. K.

    1988-01-01

    Angiotensin II (Ang II) induces a marked reduction in renal blood flow at doses well below those required to induce a pressor response, and as blood flow falls there is a decline in glomerular filtration rate and sodium excretion. This striking sensitivity of the renal blood supply led many workers to consider the possibility that angiotensin functions as a local renal hormone. As angiotensin converting enzyme (ACE) was found in particular abundance in the lung, it seemed reasonable to suspect that most of the conversion occurred there, and that the function of Ang II would be primarily systemic, rather than intrarenal. In this review, I will explore the evidence that has accumulated on these two possibilities, since they have important implications for our current understanding of normal kidney function and derangements of kidney function in disease.

  19. Hybrid-free Josephson Parametric Converter

    NASA Astrophysics Data System (ADS)

    Frattini, N. E.; Narla, A.; Sliwa, K. M.; Shankar, S.; Hatridge, M.; Devoret, M. H.

    A necessary component for any quantum computation architecture is the ability to perform efficient quantum operations. In the microwave regime of superconducting qubits, these quantum-limited operations can be realized with a non-degenerate Josephson junction based three-wave mixer, the Josephson Parametric Converter (JPC). Currently, the quantum signal of interest must pass through a lossy 180 degree hybrid to be presented as a differential drive to the JPC. This hybrid therefore places a limit on the quantum efficiency of the system and also increases the device footprint. We present a new design for the JPC eliminating the need for any external hybrid. We also show that this design has nominally identical performance to the conventional JPC. Work supported by ARO, AFOSR and YINQE.

  20. Simplifying the circuit of Josephson parametric converters

    NASA Astrophysics Data System (ADS)

    Abdo, Baleegh; Brink, Markus; Chavez-Garcia, Jose; Keefe, George

    Josephson parametric converters (JPCs) are quantum-limited three-wave mixing devices that can play various important roles in quantum information processing in the microwave domain, including amplification of quantum signals, transduction of quantum information, remote entanglement of qubits, nonreciprocal amplification, and circulation of signals. However, the input-output and biasing circuit of a state-of-the-art JPC consists of bulky components, i.e. two commercial off-chip broadband 180-degree hybrids, four phase-matched short coax cables, and one superconducting magnetic coil. Such bulky hardware significantly hinders the integration of JPCs in scalable quantum computing architectures. In my talk, I will present ideas on how to simplify the JPC circuit and show preliminary experimental results

  1. Adiabatic circuits: converter for static CMOS signals

    NASA Astrophysics Data System (ADS)

    Fischer, J.; Amirante, E.; Bargagli-Stoffi, A.; Schmitt-Landsiedel, D.

    2003-05-01

    Ultra low power applications can take great advantages from adiabatic circuitry. In this technique a multiphase system is used which consists ideally of trapezoidal voltage signals. The input signals to be processed will often come from a function block realized in static CMOS. The static rectangular signals must be converted for the oscillating multiphase system of the adiabatic circuitry. This work shows how to convert the input signals to the proposed pulse form which is synchronized to the appropriate supply voltage. By means of adder structures designed for a 0.13µm technology in a 4-phase system there will be demonstrated, which additional circuits are necessary for the conversion. It must be taken into account whether the data arrive in parallel or serial form. Parallel data are all in one phase and therefore it is advantageous to use an adder structure with a proper input stage, e.g. a Carry Lookahead Adder (CLA). With a serial input stage it is possible to read and to process four signals during one cycle due to the adiabatic 4-phase system. Therefore input signals with a frequency four times higher than the adiabatic clock frequency can be used. This reduces the disadvantage of the slow clock period typical for adiabatic circuits. By means of an 8 bit Ripple Carry Adder (8 bit RCA) the serial reading will be introduced. If the word width is larger than 4 bits the word can be divided in 4 bit words which are processed in parallel. This is the most efficient way to minimize the number of input lines and pads. At the same time a high throughput is achieved.

  2. Compact Relativistic Magnetron with Output Mode Converter

    NASA Astrophysics Data System (ADS)

    Andreev, Andrey; Fuks, Mikhail; Schamiloglu, Edl

    2003-10-01

    We consider a relativistic magnetron in which all of the resonators of the anode block are smoothly continued onto a conical antenna up to the radius corresponding to the cutoff frequency of the radiated wave in a cylindrical waveguide. Such a magnetron is capable of high output power, is compact, has a high resistance to microwave breakdown, is able to work with extremely high currents, and has the possibility of forming desirable output radiation patterns. The magnetic field can be provided by a small solenoid over the resonant system, which is a much smaller volume than is required for the Helmholtz coils used in traditional relativistic magnetrons. The maximum size of this magnetron is the aperture of the horn antenna. The unique aspect of such a design is the possibility of using the horn antenna for conversion of the operating mode to lower order modes, including the TE_11 mode, which is radiated as a narrow wave beam. For a magnetron operating in π-mode, the mode converter comprises a continuation of the resonantor blocks onto the horn for those resonators that correspond to the symmetry of the output mode. For example, in order to provide Gaussian mode output only two diametrically opposite resonators of even-numbered resonators must be continued onto the horn. In this case the aperture of the horn antenna can be close to the cut-off diameter for the TE_11 mode, and the output power is limited only by breakdown of the output window. In this presentation results of preliminary calculations of the magnetron with output mode converters are presented.

  3. Mining disease state converters for medical intervention of diseases.

    PubMed

    Dong, Guozhu; Duan, Lei; Tang, Changjie

    2010-02-01

    In applications such as gene therapy and drug design, a key goal is to convert the disease state of diseased objects from an undesirable state into a desirable one. Such conversions may be achieved by changing the values of some attributes of the objects. For example, in gene therapy one may convert cancerous cells to normal ones by changing some genes' expression level from low to high or from high to low. In this paper, we define the disease state conversion problem as the discovery of disease state converters; a disease state converter is a small set of attribute value changes that may change an object's disease state from undesirable into desirable. We consider two variants of this problem: personalized disease state converter mining mines disease state converters for a given individual patient with a given disease, and universal disease state converter mining mines disease state converters for all samples with a given disease. We propose a DSCMiner algorithm to discover small and highly effective disease state converters. Since real-life medical experiments on living diseased instances are expensive and time consuming, we use classifiers trained from the datasets of given diseases to evaluate the quality of discovered converter sets. The effectiveness of a disease state converter is measured by the percentage of objects that are successfully converted from undesirable state into desirable state as deemed by state-of-the-art classifiers. We use experiments to evaluate the effectiveness of our algorithm and to show its effectiveness. We also discuss possible research directions for extensions and improvements. We note that the disease state conversion problem also has applications in customer retention, criminal rehabilitation, and company turn-around, where the goal is to convert class membership of objects whose class is an undesirable class.

  4. Current Single Event Effects and Radiation Damage Results for Candidate Spacecraft Electronics

    NASA Technical Reports Server (NTRS)

    OBryan, Martha V.; LaBel, Kenneth A.; Reed, Robert A.; Ladbury, Ray L.; Howard, James W., Jr.; Kniffin, Scott D.; Poivey, Christian; Buchner, Stephen P.; Bings, John P.; Titus, Jeff L.

    2002-01-01

    We present data on the vulnerability of a variety of candidate spacecraft electronics to proton and heavy ion induced single event effects, total ionizing dose and proton-induced damage. Devices tested include optoelectronics, digital, analog, linear bipolar, hybrid devices, Analog-to-Digital Converters (ADCs), Digital-to-Analog Converters (DACs), and DC-DC converters, among others.

  5. Integrated Solar Power Converters: Wafer-Level Sub-Module Integrated DC/DC Converter

    SciTech Connect

    2012-02-09

    Solar ADEPT Project: CU-Boulder is developing advanced power conversion components that can be integrated into individual solar panels to improve energy yields. The solar energy that is absorbed and collected by a solar panel is converted into useable energy for the grid through an electronic component called an inverter. Many large, conventional solar energy systems use one, central inverter to convert energy. CU-Boulder is integrating smaller, microinverters into individual solar panels to improve the efficiency of energy collection. The University’s microinverters rely on electrical components that direct energy at high speeds and ensure that minimal energy is lost during the conversion process—improving the overall efficiency of the power conversion process. CU-Boulder is designing its power conversion devices for use on any type of solar panel.

  6. Cavity-based linear-to-circular polarization converter.

    PubMed

    Wang, Jiang; Wu, Wen

    2017-02-20

    This paper presents a polarization converter to convert a linearly polarized (LP) incident wave into an outgoing circularly polarized (CP) wave. It is constructed by a 2D array of thin cavities, with each cavity etched with three slots. The front slot is used to couple the LP wave into the cavity, while the backside orthogonal slots are utilized to couple the field out of the cavity with the same amplitude and 90° out-of-phase; subsequently, a CP wave is formed at the other side of the converter. As a proof-of-concept, a sample of the proposed converter is fabricated and measured in the microwave regime. Eventually, a perfect CP wave is demonstrated after the LP wave passes through the converter. The proposed linear-to-circular polarization converter features an extremely low insertion loss of around 0.1 dB and a high polarization conversion efficiency of 0.97.

  7. High-power converters for space applications

    NASA Technical Reports Server (NTRS)

    Park, J. N.; Cooper, Randy

    1991-01-01

    Phase 1 was a concept definition effort to extend space-type dc/dc converter technology to the megawatt level with a weight of less than 0.1 kg/kW (220 lb./MW). Two system designs were evaluated in Phase 1. Each design operates from a 5 kV stacked fuel cell source and provides a voltage step-up to 100 kV at 10 A for charging capacitors (100 pps at a duty cycle of 17 min on, 17 min off). Both designs use an MCT-based, full-bridge inverter, gaseous hydrogen cooling, and crowbar fault protection. The GE-CRD system uses an advanced high-voltage transformer/rectifier filter is series with a resonant tank circuit, driven by an inverter operating at 20 to 50 kHz. Output voltage is controlled through frequency and phase shift control. Fast transient response and stability is ensured via optimal control. Super-resonant operation employing MCTs provides the advantages of lossless snubbing, no turn-on switching loss, use of medium-speed diodes, and intrinsic current limiting under load-fault conditions. Estimated weight of the GE-CRD system is 88 kg (1.5 cu ft.). Efficiency of 94.4 percent and total system loss is 55.711 kW operating at 1 MW load power. The Maxwell system is based on a resonance transformer approach using a cascade of five LC resonant sections at 100 kHz. The 5 kV bus is converted to a square wave, stepped-up to a 100 kV sine wave by the LC sections, rectified, and filtered. Output voltage is controlled with a special series regulator circuit. Estimated weight of the Maxwell system is 83.8 kg (4.0 cu ft.). Efficiency is 87.2 percent and total system loss is 146.411 kW operating at 1 MW load power.

  8. Power Converters Maximize Outputs Of Solar Cell Strings

    NASA Technical Reports Server (NTRS)

    Frederick, Martin E.; Jermakian, Joel B.

    1993-01-01

    Microprocessor-controlled dc-to-dc power converters devised to maximize power transferred from solar photovoltaic strings to storage batteries and other electrical loads. Converters help in utilizing large solar photovoltaic arrays most effectively with respect to cost, size, and weight. Main points of invention are: single controller used to control and optimize any number of "dumb" tracker units and strings independently; power maximized out of converters; and controller in system is microprocessor.

  9. Synthesis of Averaged Circuit Models for Switched Power Converters

    DTIC Science & Technology

    1989-11-01

    November 1989 LIDS-P-1930 Synthesis of Averaged Circuit Models for Switched Power Converters * Seth R. Sanders George C. Verghese Abstract Averaged... circuit models for switching power converters are useful for purposes of analysis and obtaining engineering intuition into the operation of these...switched circuits . This paper develops averaged circuit models for switching converters using an in-place averaging method. The method proceeds in a

  10. Recent Advances In Millimeter Wave Up And Down Converters

    NASA Astrophysics Data System (ADS)

    Oleson, Charles; Larsen, Arthur; Chew, Richard; Day, Walter

    1988-11-01

    A 26 to 40 GHz block converter for receiver frequency extension will be described. The converter has a 15 dB NF, 10 dB, conversion gain, >=.5,0 d spurious-free dynamic range, built in BITE, 44 GHz L.O. and measures 3x3x1 inches. A 33 to 36 GHz up/down converter for an airborne jammer pod will also be described.

  11. Uniform Tests of File Converters Using Unit Cubes

    DTIC Science & Technology

    2015-03-01

    Uniform Tests of File Converters Using Unit Cubes by Steven J Nichols ARL-CR-0770 March 2015 Under contract...March 2015 Uniform Tests of File Converters Using Unit Cubes Steven J Nichols Survivability/Lethality Analysis Directorate, ARL...COVERED (From - To) 07/2014– 08/2014 4. TITLE AND SUBTITLE Uniform Tests of File Converters Using Unit Cubes 5a. CONTRACT NUMBER W911NF-10-2-0076

  12. A new battery charger/discharger converter. [for spacecraft application

    NASA Technical Reports Server (NTRS)

    Middlebrook, R. D.; Cuk, S.; Behen, W.

    1978-01-01

    A new optimum topology dc-to-dc switching converter is extended to provide bidirectional current flow. The resulting two-quadrant converter can be employed to eliminate the discontinuous current mode in normal unidirectional applications, but is especially suited for spacecraft battery conditioning as a charge-discharge regulator in place of the conventional separate converters. Implementation of the control features and the battery charge current and voltage limits are discussed.

  13. Improved Data Acquisition Architecture for an LLC Converter

    DTIC Science & Technology

    2014-09-01

    receives the read/write command and clock data from the FPGA and sends converted digital data to the FPGA. For efficient processing , we recommend the...data from the FPGA and sends converted digital data to the FPGA. For efficient processing , we recommend the use of the ADS1000, since the FPGA and...Improved signal processing architecture (from [1]). .........................................1 Figure 2. An LLC converter implemented on a custom PCB (from

  14. High Temperature Power Converters for Military Hybrid Electric Vehicles

    DTIC Science & Technology

    2011-08-09

    M) MINI-SYMPOSIUM AUGUST 9-11 DEARBORN, MICHIGAN HIGH TEMPERATURE POWER CONVERTERS FOR MILITARY HYBRID ELECTRIC VEHICLES ABSTRACT...SUBTITLE High Temperature Power Converters for Military Hybrid Electric Vehicles 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM ELEMENT NUMBER 6...public release High Temperature Power Converters for Military Hybrid Electric Vehicles Page 2 of 8 I. INTRODUCTION Today, wide bandgap devices

  15. Noninterlaced-To-Interlaced Television-Scan Converter

    NASA Technical Reports Server (NTRS)

    Morales, Sergio

    1988-01-01

    Computer text and ordinary images displayed together without text jitter. Scan converter enables superposition of alphanumerical text generated by computer-driven video generator on National Television System Committee (NTSC) standard interlaced-scan image. Made of commercially available integrated circuits and operates in conjunction with NTSC synchronizing-signal generator. Standard television picture transmitted in two interlaced fields. Without scan converter, text image moves up and down by one line as fields change. With scan converter, text image stands still.

  16. Novel vortex generator and mode converter for electron beams.

    PubMed

    Schattschneider, P; Stöger-Pollach, M; Verbeeck, J

    2012-08-24

    A mode converter for electron vortex beams is described. Numerical simulations, confirmed by experiment, show that the converter transforms a vortex beam with a topological charge m=±1 into beams closely resembling Hermite-Gaussian HG(10) and HG(01) modes. The converter can be used as a mode discriminator or filter for electron vortex beams. Combining the converter with a phase plate turns a plane wave into modes with topological charge m=±1. This combination serves as a generator of electron vortex beams of high brilliance.

  17. Another look at Statics and Dynamics of Switching Power Converters

    NASA Astrophysics Data System (ADS)

    Sasaki, Seigo; Watanabe, Haruo

    Three types of switching power supply, which are buck, boost, buck/boost converter, are statically and dynamically analysed. A framework of large signal analysis presents characteristics of converters which vary with operating points, and discusses a relationship between statics and dynamics. It is shown that boost and buck/boost converters substantially change their characteristics. There exists the operating points where for low frequencies the phases become -90° or -180° and the gains fall off to low values. The phenomenon is characterized by a zero of transfer function of the converter and also by the statics.

  18. Hybrid Voltage-Multipliers Based Switching Power Converters

    NASA Astrophysics Data System (ADS)

    Rosas-Caro, Julio C.; Mayo-Maldonado, Jonathan C.; Vazquez-Bautista, Rene Fabian; Valderrabano-Gonzalez, Antonio; Salas-Cabrera, Ruben; Valdez-Resendiz, Jesus Elias

    2011-08-01

    This work presents a derivation of PWM DC-DC hybrid converters by combining traditional converters with the Cockcroft-Walton voltage multiplier, the voltage multiplier of each converter is driven with the same transistor of the basic topology; this fact makes the structure of the new converters very simple and provides high-voltage gain. The traditional topologies discussed are the boost, buck-boost, Cuk and SEPIC. They main features of the discussed family are: (i) high-voltage gain without using extreme duty cycles or transformers, which allow high switching frequency and (ii) low voltage stress in switching devices, along with modular structures, and more output levels can be added without modifying the main circuit, which is highly desirable in some applications such as renewable energy generation systems. It is shown how a multiplier converter can become a generalized topology and how some of the traditional converters and several state-of-the-art converters can be derived from the generalized topologies and vice-versa. All the discussed converters were simulated, additionally experimental results are provided with an interleaved multiplier converter.

  19. Optimization of Aperiodic Waveguide Mode Converters

    SciTech Connect

    Burke, G J; White, D A; Thompson, C A

    2004-12-09

    Previous studies by Haq, Webb and others have demonstrated the design of aperiodic waveguide structures to act as filters and mode converters. These aperiodic structures have been shown to yield high efficiency mode conversion or filtering in lengths considerably shorter than structures using gradual transitions and periodic perturbations. The design method developed by Haq and others has used mode-matching models for the irregular, stepped waveguides coupled with computer optimization to achieve the design goal using a Matlab optimization routine. Similar designs are described here, using a mode matching code written in Fortran and with optimization accomplished with the downhill simplex method with simulated annealing using an algorithm from the book Numerical Recipes in Fortran. Where Haq et al. looked mainly for waveguide shapes with relatively wide cavities, we have sought lower profile designs. It is found that lower profiles can meet the design goals and result in a structure with lower Q. In any case, there appear to be very many possible configurations for a given mode conversion goal, to the point that it is unlikely to find the same design twice. Tolerance analysis was carried out for the designs to show edge sensitivity and Monte Carlo degradation rate. The mode matching code and mode conversion designs were validated by comparison with FDTD solutions for the discontinuous waveguides.

  20. Converting from DDOR SASF to APF

    NASA Technical Reports Server (NTRS)

    Gladden, Roy E.; Khanampompan, Teerapat; Fisher, Forest W.

    2008-01-01

    A computer program called ddor_sasf2apf converts delta-door (delta differential one-way range) request from an SASF (spacecraft activity sequence file) format to an APF (apgen plan file) format for use in the Mars Reconnaissance Orbiter (MRO) missionplanning- and-sequencing process. The APF is used as an input to APGEN/AUTOGEN in the MRO activity- planning and command-sequencegenerating process to sequence the delta-door (DDOR) activity. The DDOR activity is a spacecraft tracking technique for determining spacecraft location. The input to ddor_sasf2apf is an input request SASF provided by an observation team that utilizes DDOR. ddor_sasf2apf parses this DDOR SASF input, rearranging parameters and reformatting the request to produce an APF file for use in AUTOGEN and/or APGEN. The benefit afforded by ddor_sasf2apf is to enable the use of the DDOR SASF file earlier in the planning stage of the command-sequence-generating process and to produce sequences, optimized for DDOR operations, that are more accurate and more robust than would otherwise be possible.

  1. Converting mixed waste into durable glass

    SciTech Connect

    Ruller, J.A.; Greenman, W.G.

    1994-12-31

    Radioactive, hazardous and mixed contamination of soils and sediments within the Weapons Complex is widespread and estimated to total billions of cubic meters. The cost to remediate this contamination, as well as the contaminated surface and groundwaters, buildings and facilities has been estimated to be up to $300 billion over the next 30 years and up to $30 billion over the next five years. Progress towards cleaning the Weapons Complex depends upon the development of new remediation technologies. The remediation of contaminated soils and sludges ultimately rests on the immobilization of radioactive and hazardous contaminants into a solid wasteform that is leach resistant to aqueous corrosion and other forms of degradation (such as thermal cycling and biological attack) and is highly durable. In addition, the process to immobilize the contaminants should concentrate the contaminants into the smallest volume to reduce disposal/storage and transportation costs. GTS Duratek and the Vitreous State Laboratory of The Catholic University of America have successfully demonstrated that several different waste streams can be converted into a durable, leach-resistant glass that will also lower waste volumes. In this paper, the authors discuss these successes for soils and sludges from three separate US Department of Energy sites. The sites are: the K-25 facility; the Weldon Spring site; and Fernald, Ohio.

  2. Novel Modulation Method for Multidirectional Matrix Converter

    PubMed Central

    Misron, Norhisam; Aris, Ishak Bin; Yamada, Hiroaki

    2014-01-01

    This study presents a new modulation method for multidirectional matrix converter (MDMC), based on the direct duty ratio pulse width modulation (DDPWM). In this study, a new structure of MDMC has been proposed to control the power flow direction through the stand-alone battery based system and hybrid vehicle. The modulation method acts based on the average voltage over one switching period concept. Therefore, in order to determine the duty ratio for each switch, the instantaneous input voltages are captured and compared with triangular waveform continuously. By selecting the proper switching pattern and changing the slope of the carriers, the sinusoidal input current can be synthesized with high power factor and desired output voltage. The proposed system increases the discharging time of the battery by injecting the power to the system from the generator and battery at the same time. Thus, it makes the battery life longer and saves more energy. This paper also derived necessary equation for proposed modulation method as well as detail of analysis and modulation algorithm. The theoretical and modulation concepts presented have been verified in MATLAB simulation. PMID:25298969

  3. Fermentation alcohol: better to convert to fuel

    SciTech Connect

    Maiorella, P.L.

    1982-08-01

    In the conversion of farm products to liquid fuel by fermentation, large energy savings are possible if distillation to anhydrous alcohol for gasohol blending is replaced by gasoline production with a Mobil zeolite catalyst. Simple fermentation yields a roughly 10 wt% alcohol beer product. Conventional distillation to produce anhydrous alcohol requires 32.6 M Btu/gal of ethanol. Even the most efficient steam reuse methods require at least 21 M Btu/gal. Thus, distillation energy requirements are a major fraction (28 to 43 percent) of the energy content (75.6 M Btu/ gal) of the final alcohol product. Use of the fermentation beer in a gasoline production process would be far more energy efficient, using only 11.1 M Btu/gal of alcohol processed. Also, a more desirable liquid fuel would be produced. Distillation savings more than offset conversion costs, but a small portion of the alcohol feed is converted to lower value LPG gas, and gasoline price must be incremented correspondingly. The upgrading of ethanol to gasoline results in a 10% increase in cost per Btu for the liquid fuel. It must be decided if this increase is justified by downstream savings in using the superior fuel and by the large production energy savings.

  4. Image processing to optimize wave energy converters

    NASA Astrophysics Data System (ADS)

    Bailey, Kyle Marc-Anthony

    The world is turning to renewable energies as a means of ensuring the planet's future and well-being. There have been a few attempts in the past to utilize wave power as a means of generating electricity through the use of Wave Energy Converters (WEC), but only recently are they becoming a focal point in the renewable energy field. Over the past few years there has been a global drive to advance the efficiency of WEC. Placing a mechanical device either onshore or offshore that captures the energy within ocean surface waves to drive a mechanical device is how wave power is produced. This paper seeks to provide a novel and innovative way to estimate ocean wave frequency through the use of image processing. This will be achieved by applying a complex modulated lapped orthogonal transform filter bank to satellite images of ocean waves. The complex modulated lapped orthogonal transform filterbank provides an equal subband decomposition of the Nyquist bounded discrete time Fourier Transform spectrum. The maximum energy of the 2D complex modulated lapped transform subband is used to determine the horizontal and vertical frequency, which subsequently can be used to determine the wave frequency in the direction of the WEC by a simple trigonometric scaling. The robustness of the proposed method is provided by the applications to simulated and real satellite images where the frequency is known.

  5. Angiotensin Converting Enzyme Activity in Alopecia Areata

    PubMed Central

    Namazi, Mohammad Reza; Handjani, Farhad; Eftekhar, Ebrahim; Kalafi, Amir

    2014-01-01

    Background. Alopecia areata (AA) is a chronic inflammatory disease of the hair follicle. The exact pathogenesis of AA remains unknown, although recent studies support a T-cell mediated autoimmune process. On the other hand, some studies have proposed that the renin-angiotensin-aldosterone system (RAAS) may play a role in autoimmunity. Therefore, we assessed serum activity of angiotensin converting enzyme (ACE), a component of this system, in AA. Methods. ACE activity was measured in the sera of 19 patients with AA and 16 healthy control subjects. In addition, the relationship between severity and duration of the disease and ACE activity was evaluated. Results. Serum ACE activity was higher in the patient group (55.81 U/L) compared to the control group (46.41 U/L), but the difference was not statistically significant (P = 0.085). Also, there was no correlation between ACE activity and severity (P = 0.13) and duration of disease (P = 0.25) in the patient group. Conclusion. The increased serum ACE activity found in this study may demonstrate local involvement of the RAAS in the pathogenesis of AA. Assessment of ACE in a study with a larger sample size as well as in tissue samples is recommended in order to further evaluate the possible role of RAAS in AA. PMID:25349723

  6. Novel modulation method for multidirectional matrix converter.

    PubMed

    Toosi, Saman; Misron, Norhisam; Hanamoto, Tsuyoshi; Bin Aris, Ishak; Radzi, Mohd Amran Mohd; Yamada, Hiroaki

    2014-01-01

    This study presents a new modulation method for multidirectional matrix converter (MDMC), based on the direct duty ratio pulse width modulation (DDPWM). In this study, a new structure of MDMC has been proposed to control the power flow direction through the stand-alone battery based system and hybrid vehicle. The modulation method acts based on the average voltage over one switching period concept. Therefore, in order to determine the duty ratio for each switch, the instantaneous input voltages are captured and compared with triangular waveform continuously. By selecting the proper switching pattern and changing the slope of the carriers, the sinusoidal input current can be synthesized with high power factor and desired output voltage. The proposed system increases the discharging time of the battery by injecting the power to the system from the generator and battery at the same time. Thus, it makes the battery life longer and saves more energy. This paper also derived necessary equation for proposed modulation method as well as detail of analysis and modulation algorithm. The theoretical and modulation concepts presented have been verified in MATLAB simulation.

  7. High Angular Sensitivity, Absolute Rotary Encoding Device with Polygonal Mirror and Stand-Alone Diffraction Gratings

    NASA Technical Reports Server (NTRS)

    Leviton, Douglas B. (Inventor)

    1996-01-01

    A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a monochromatic light beam is directed towards the facets. The facets of the polygonal mirror direct the light beam to a stand-alone low line density diffraction grating to diffract the monochromatic light beam into a number of diffracted light beams such that a number of light spots are created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spots on the linear array detector means. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spots and to compute the position of the shaft based upon the data from the analog-lo-digital converter.

  8. Development of a wind converter and investigation of its operational function. Part 1: Technical description of the wind energy converter

    NASA Astrophysics Data System (ADS)

    Molly, J. P.; Steinheber, R.

    1982-11-01

    A 10 kW wind energy converter was developed by using as far possible standard serial production parts. The design criteria and the description of the essential machinery components of the MODA 10 wind energy converter are discussed. For some special load cases the safety calculation of the important components is shown. The blade control system which qualified for small wind energy converters, is explained. Weight and cost of the MODA 10 are considered.

  9. Converting hard copy documents for electronic dissemination

    SciTech Connect

    Hoffman, F.

    1994-12-31

    Since the advent of computer systems, the goal of a paperless office, and even a paperless society, has been pursued. While the normal paper flow in an organization is far from totally automated, particularly for items requiring signatures or authorizations, electronic information dissemination is becoming an almost simple task. The reasons for providing on-line documents are many and include faster and easier access for everyone, elimination of printing costs, reduction of wasted shelf and desk space, and the security of having a centrally-located, always up-to-date document. New computer software even provides the user with the ability to annotate documents and to have bookmarks so that the old scribbled-in and dog-eared manual can be replaced without loosing this `customizability`. Moreover, new hypermedia capabilities mean that documents can be read in a non-linear fashion and can include color figures and photographs, audio, and even animation sequences, capabilities which exceed those of paper. The proliferation of network-based information servers, coupled with the growth of the Internet, has enticed academic, governmental, and even commercial organizations to provide increasing numbers of documents and data bases in electronic form via the network, not just to internal staff, but to the public as well. Much of this information, which includes everything from mundane company procedures to spiffy marketing brochures, was previously published only in hard copy. Converting existing documents to electronic form and producing only electronic versions of new documents poses some interesting challenges to the maintainer or author.

  10. The experimental set-up of the RIB in-flight facility EXOTIC

    NASA Astrophysics Data System (ADS)

    Pierroutsakou, D.; Boiano, A.; Boiano, C.; Di Meo, P.; La Commara, M.; Manea, C.; Mazzocco, M.; Nicoletto, M.; Parascandolo, C.; Signorini, C.; Soramel, F.; Strano, E.; Toniolo, N.; Torresi, D.; Tortone, G.; Anastasio, A.; Bettini, M.; Cassese, C.; Castellani, L.; Corti, D.; Costa, L.; De Fazio, B.; Galet, G.; Glodariu, T.; Grebosz, J.; Guglielmetti, A.; Molini, P.; Pontoriere, G.; Rocco, R.; Romoli, M.; Roscilli, L.; Sandoli, M.; Stroe, L.; Tessaro, M.; Zatti, P. G.

    2016-10-01

    We describe the experimental set-up of the Radioactive Ion Beam (RIB) in-flight facility EXOTIC consisting of: (a) two position-sensitive Parallel Plate Avalanche Counters (PPACs), dedicated to the event-by-event tracking of the produced RIBs and to time of flight measurements and (b) the new high-granularity compact telescope array EXPADES (EXotic PArticle DEtection System), designed for nuclear physics and nuclear astrophysics experiments employing low-energy light RIBs. EXPADES consists of eight ΔE -Eres telescopes arranged in a cylindrical configuration around the target. Each telescope is made up of two Double Sided Silicon Strip Detectors (DSSSDs) with a thickness of 40/60 μm and 300 μm for the ΔE and Eres layer, respectively. Additionally, eight ionization chambers were constructed to be used as an alternative ΔE stage or, in conjunction with the entire DSSSD array, to build up more complex triple telescopes. New low-noise multi-channel charge-sensitive preamplifiers and spectroscopy amplifiers, associated with constant fraction discriminators, peak-and-hold and Time to Amplitude Converter circuits were developed for the electronic readout of the ΔE stage. Application Specific Integrated Circuit-based electronics was employed for the treatment of the Eres signals. An 8-channel, 12-bit multi-sampling 50 MHz Analog to Digital Converter, a Trigger Supervisor Board for handling the trigger signals of the whole experimental set-up and an ad hoc data acquisition system were also developed. The performance of the PPACs, EXPADES and of the associated electronics was obtained offline with standard α calibration sources and in-beam by measuring the scattering process for the systems 17O+58Ni and 17O+208Pb at incident energies around their respective Coulomb barriers and, successively, during the first experimental runs with the RIBs of the EXOTIC facility.

  11. Systems and methods for self-synchronized digital sampling

    NASA Technical Reports Server (NTRS)

    Samson, Jr., John R. (Inventor)

    2008-01-01

    Systems and methods for self-synchronized data sampling are provided. In one embodiment, a system for capturing synchronous data samples is provided. The system includes an analog to digital converter adapted to capture signals from one or more sensors and convert the signals into a stream of digital data samples at a sampling frequency determined by a sampling control signal; and a synchronizer coupled to the analog to digital converter and adapted to receive a rotational frequency signal from a rotating machine, wherein the synchronizer is further adapted to generate the sampling control signal, and wherein the sampling control signal is based on the rotational frequency signal.

  12. BabeLO--An Extensible Converter of Programming Exercises Formats

    ERIC Educational Resources Information Center

    Queiros, R.; Leal, J. P.

    2013-01-01

    In the last two decades, there was a proliferation of programming exercise formats that hinders interoperability in automatic assessment. In the lack of a widely accepted standard, a pragmatic solution is to convert content among the existing formats. BabeLO is a programming exercise converter providing services to a network of heterogeneous…

  13. From Binders to Browsers: Converting Classroom Training to the Web.

    ERIC Educational Resources Information Center

    Colbrunn, Shonn R.; Van Tiem, Darlene M.

    2000-01-01

    Discusses the benefits of Web-based training for organizations, including immediacy, convenience, and consistency, and addresses issues that arise when converting a classroom course. Topics include organizational readiness; time allocation; technical readiness; course appropriateness for the Web; and design strategies, including converting text,…

  14. Program Converts VAX Floating-Point Data To UNIX

    NASA Technical Reports Server (NTRS)

    Alves, Marcos; Chapman, Bruce; Chu, Eugene

    1996-01-01

    VAX Floating Point to Host Floating Point Conversion (VAXFC) software converts non-ASCII files to unformatted floating-point representation of UNIX machine. This is done by reading bytes bit by bit, converting them to floating-point numbers, then writing results to another file. Useful when data files created by VAX computer must be used on other machines. Written in C language.

  15. 40 CFR 89.317 - NOX converter check.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 40 Protection of Environment 20 2010-07-01 2010-07-01 false NOX converter check. 89.317 Section 89.317 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) AIR PROGRAMS (CONTINUED..., the chemiluminescent oxides of nitrogen analyzer shall be checked for NO2 to NO converter...

  16. 26 CFR 1.544-5 - Convertible securities.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 26 Internal Revenue 7 2010-04-01 2010-04-01 true Convertible securities. 1.544-5 Section 1.544-5...) INCOME TAXES (CONTINUED) Personal Holding Companies § 1.544-5 Convertible securities. Under section 544(b) outstanding securities of a corporation such as bonds, debentures, or other corporate obligations,...

  17. 26 CFR 1.544-5 - Convertible securities.

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... 26 Internal Revenue 7 2013-04-01 2013-04-01 false Convertible securities. 1.544-5 Section 1.544-5...) INCOME TAXES (CONTINUED) Personal Holding Companies § 1.544-5 Convertible securities. Under section 544(b) outstanding securities of a corporation such as bonds, debentures, or other corporate obligations,...

  18. 26 CFR 1.544-5 - Convertible securities.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 26 Internal Revenue 7 2011-04-01 2009-04-01 true Convertible securities. 1.544-5 Section 1.544-5...) INCOME TAXES (CONTINUED) Personal Holding Companies § 1.544-5 Convertible securities. Under section 544(b) outstanding securities of a corporation such as bonds, debentures, or other corporate obligations,...

  19. 26 CFR 1.544-5 - Convertible securities.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 26 Internal Revenue 7 2012-04-01 2012-04-01 false Convertible securities. 1.544-5 Section 1.544-5...) INCOME TAXES (CONTINUED) Personal Holding Companies § 1.544-5 Convertible securities. Under section 544(b) outstanding securities of a corporation such as bonds, debentures, or other corporate obligations,...

  20. 32 CFR 538.4 - Convertibility of military payment certificates.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 32 National Defense 3 2010-07-01 2010-07-01 true Convertibility of military payment certificates... AND ACCOUNTS MILITARY PAYMENT CERTIFICATES § 538.4 Convertibility of military payment certificates. (a) For authorized personnel. Authorized personnel having in their possession military...

  1. The frequency dependent impedance of an HVdc converter

    SciTech Connect

    Wood, A.R.; Arrillaga, J.

    1995-07-01

    A linear and direct method of determining the frequency dependent impedance of a 12 pulse HVdc converter is presented. Terms are developed for both the dc and ac side impedances of the converter, including the effect of the firing angle control system, the commutation period, and the variability of the commutation period. The impedance predictions are verified by dynamic simulation.

  2. Direct-current converter for gas-discharge lamps

    NASA Technical Reports Server (NTRS)

    Lutus, P.

    1980-01-01

    Metal/halide and similar gas-discharge lamps are powered from low-voltage dc source using small efficient converter. Converter is useful whenever 60-cycle ac power is not available or where space and weight allocations are limited. Possible applications are offshore platforms, mobile homes, and emergency lighting. Design innovations give supply high reliability and efficiency up to 75 percent.

  3. Quantum cascade lasers with an integrated polarization mode converter.

    PubMed

    Dhirhe, D; Slight, T J; Holmes, B M; Hutchings, D C; Ironside, C N

    2012-11-05

    We discuss the design, fabrication and characterization of waveguide polarization mode converters for quantum cascade lasers operating at 4.6 μm. We have fabricated a quantum cascade laser with integrated polarization mode converter that emits light of 69% Transverse Electrical (TE) polarization from one facet and 100% Transverse Magnetic (TM) polarization from the other facet.

  4. Thermal-To-Electric Converter With Greater Power Density

    NASA Technical Reports Server (NTRS)

    Williams, Roger M.; Suitor, Jerry W.; Jeffries-Nakamura, Barbara; Underwood, Mark L.; Ryan, Margaret A.; O'Connor, Dennis

    1992-01-01

    Proposed design for alkali-metal thermal-to-electric converter (AMTEC) incorporates refinements to increase power density and reduce input temperature below typical prior design. Converter has compact, planar configuration. Cells stacked densely with remote condenser for thermal efficiency and high power density. Either liquid- or vapor-fed cells utilized. Heat fed-in at lower temperature.

  5. Sequential color video to parallel color video converter

    NASA Technical Reports Server (NTRS)

    1975-01-01

    The engineering design, development, breadboard fabrication, test, and delivery of a breadboard field sequential color video to parallel color video converter is described. The converter was designed for use onboard a manned space vehicle to eliminate a flickering TV display picture and to reduce the weight and bulk of previous ground conversion systems.

  6. Development of custom radiation-tolerant DCDC converter ASICs

    NASA Astrophysics Data System (ADS)

    Faccio, F.; Michelis, S.; Orlandi, S.; Blanchot, G.; Fuentes, C.; Saggini, S.; Ongaro, F.

    2010-11-01

    Based on a detailed study of the radiation tolerance of high-voltage transistors, 2 commercial CMOS technologies have been selected for the design of synchronous buck DCDC converter ASICs. Three prototype converters have been produced, embedding increasingly sophisticated functions. The electrical and radiation performance of these prototypes is presented.

  7. 32 CFR 538.4 - Convertibility of military payment certificates.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 32 National Defense 3 2013-07-01 2013-07-01 false Convertibility of military payment certificates... AND ACCOUNTS MILITARY PAYMENT CERTIFICATES § 538.4 Convertibility of military payment certificates. (a) For authorized personnel. Authorized personnel having in their possession military...

  8. 32 CFR 538.4 - Convertibility of military payment certificates.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 32 National Defense 3 2011-07-01 2009-07-01 true Convertibility of military payment certificates... AND ACCOUNTS MILITARY PAYMENT CERTIFICATES § 538.4 Convertibility of military payment certificates. (a) For authorized personnel. Authorized personnel having in their possession military...

  9. Digital parallel-to-series pulse-train converter

    NASA Technical Reports Server (NTRS)

    Hussey, J.

    1971-01-01

    Circuit converts number represented as two level signal on n-bit lines to series of pulses on one of two lines, depending on sign of number. Converter accepts parallel binary input data and produces number of output pulses equal to number represented by input data.

  10. Magnet Technology for Power Converters: Nanocomposite Magnet Technology for High Frequency MW-Scale Power Converters

    SciTech Connect

    2012-02-27

    Solar ADEPT Project: CMU is developing a new nanoscale magnetic material that will reduce the size, weight, and cost of utility-scale PV solar power conversion systems that connect directly to the grid. Power converters are required to turn the energy that solar power systems create into useable energy for the grid. The power conversion systems made with CMU’s nanoscale magnetic material have the potential to be 150 times lighter and significantly smaller than conventional power conversion systems that produce similar amounts of power.

  11. Low cost cylindrical converter for measuring lead efficiency

    NASA Technical Reports Server (NTRS)

    Hatch, G. L.; Nakata, L.; Britt, E. J.

    1979-01-01

    A low cost cylindrical thermionic converter has been designed, fabricated, and tested for use in a NASA-JPL program to directly measure converter lead efficiencies using various electrode materials and surfaces. Efficiency measurements are made using input emitter heater power, output power at the leads, and calculated values of the parasitic losses that would not be present in the application configuration. This information can be used to predict the performance characteristics of the advanced converters currently under development. A series of five converters has been tested. Both structured and smooth molybdenum collectors have been used. Emitters included smooth molybdenum, smooth rhenium, and microstructured rhenium. Cesium pressure families of current-voltage curves are presented for emitter temperatures of 1600, 1700, and 1800 K, along with measured efficiencies as a function of converter current densities for each temperature.

  12. A computer program for HVDC converter station RF noise calculations

    SciTech Connect

    Kasten, D.G.; Caldecott, R.; Sebo, S.A. . Dept. of Electrical Engineering); Liu, Y. . Bradley Dept. of Electrical Engineering)

    1994-04-01

    HVDC converter station operations generate radio frequency (RF) electromagnetic (EM) noise which could interfere with adjacent communication and computer equipment, and carrier system operations. A generic Radio Frequency Computer Analysis Program (RAFCAP) for calculating the EM noise generated by valve ignition of a converter station has been developed as part of a larger project. The program calculates RF voltages, currents, complex power, ground level electric field strength and magnetic flux density in and around an HVDC converter station. The program requires the converter station network to be represented by frequency dependent impedance functions. Comparisons of calculated and measured values are given for an actual HVDC station to illustrate the validity of the program. RAFCAP is designed to be used by engineers for the purpose of calculating the RF noise produced by the igniting of HVDC converter valves.

  13. A study of Schwarz converters for nuclear powered spacecraft

    NASA Technical Reports Server (NTRS)

    Stuart, Thomas A.; Schwarze, Gene E.

    1987-01-01

    High power space systems which use low dc voltage, high current sources such as thermoelectric generators, will most likely require high voltage conversion for transmission purposes. This study considers the use of the Schwarz resonant converter for use as the basic building block to accomplish this low-to-high voltage conversion for either a dc or an ac spacecraft bus. The Schwarz converter has the important assets of both inherent fault tolerance and resonant operation; parallel operation in modular form is possible. A regulated dc spacecraft bus requires only a single stage converter while a constant frequency ac bus requires a cascaded Schwarz converter configuration. If the power system requires constant output power from the dc generator, then a second converter is required to route unneeded power to a ballast load.

  14. Angiotensin-Converting Enzymes Play a Dominant Role in Fertility

    PubMed Central

    Pan, Pei-Pei; Zhan, Qi-Tao; Le, Fang; Zheng, Ying-Ming; Jin, Fan

    2013-01-01

    According to the World Health Organization, infertility, associated with metabolic syndrome, has become a global issue with a 10%–20% incidence worldwide. An accumulating body of evidence has shown that the renin–angiotensin system is involved in the fertility problems observed in some populations. Moreover, alterations in the expression of angiotensin-converting enzyme-1, angiotensin-converting enzyme-2, and angiotensin-converting enzyme-3 might be one of the most important mechanisms underlying both female and male infertility. However, as a pseudogene in humans, further studies are needed to explore whether the abnormal angiotensin-converting enzyme-3 gene could result in the problems of human reproduction. In this review, the relationship between angiotensin-converting enzymes and fertile ability is summarized, and a new procedure for the treatment of infertility is discussed. PMID:24152441

  15. High frame rate imaging system for limited diffraction array beam imaging with square-wave aperture weightings.

    PubMed

    Lu, Jian-Yu; Cheng, Jiqi; Wang, Jing

    2006-10-01

    A general-purpose high frame rate (HFR) medical imaging system has been developed. This system has 128 independent linear transmitters, each of which is capable of producing an arbitrary broadband (about 0.05-10 MHz) waveform of up to +/- 144 V peak voltage on a 75-ohm resistive load using a 12-bit/40-MHz digital-to-analog converter. The system also has 128 independent, broadband (about 0.25-10 MHz), and time-variable-gain receiver channels, each of which has a 12-bit/40-MHz analog-to-digital converter and up to 512 MB of memory. The system is controlled by a personal computer (PC), and radio frequency echo data of each channel are transferred to the same PC via a standard USB 2.0 port for image reconstructions. Using the HFR imaging system, we have developed a new limited-diffraction array beam imaging method with square-wave aperture voltage weightings. With this method, in principle, only one or two transmitters are required to excite a fully populated two-dimensional (2-D) array transducer to achieve an equivalent dynamic focusing in both transmission and reception to reconstruct a high-quality three-dimensional image without the need of the time delays of traditional beam focusing and steering, potentially simplifying the transmitter subsystem of an imager. To validate the method, for simplicity, 2-D imaging experiments were performed using the system. In the in vitro experiment, a custom-made, 128-element, 0.32-mm pitch, 3.5-MHz center frequency linear array transducer with about 50% fractional bandwidth was used to reconstruct images of an ATS 539 tissue-mimicking phantom at an axial distance of 130 mm with a field of view of more than 90 degrees. In the in vivo experiment of a human heart, images with a field of view of more than 90 degrees at 120-mm axial distance were obtained with a 128-element, 2.5-MHz center frequency, 0.15-mm pitch Acuson V2 phased array. To ensure that the system was operated under the limits set by the U.S. Food and Drug

  16. Analysis of series resonant converter with series-parallel connection

    NASA Astrophysics Data System (ADS)

    Lin, Bor-Ren; Huang, Chien-Lan

    2011-02-01

    In this study, a parallel inductor-inductor-capacitor (LLC) resonant converter series-connected on the primary side and parallel-connected on the secondary side is presented for server power supply systems. Based on series resonant behaviour, the power metal-oxide-semiconductor field-effect transistors are turned on at zero voltage switching and the rectifier diodes are turned off at zero current switching. Thus, the switching losses on the power semiconductors are reduced. In the proposed converter, the primary windings of the two LLC converters are connected in series. Thus, the two converters have the same primary currents to ensure that they can supply the balance load current. On the output side, two LLC converters are connected in parallel to share the load current and to reduce the current stress on the secondary windings and the rectifier diodes. In this article, the principle of operation, steady-state analysis and design considerations of the proposed converter are provided and discussed. Experiments with a laboratory prototype with a 24 V/21 A output for server power supply were performed to verify the effectiveness of the proposed converter.

  17. Variable-speed generation with the series-resonant converter

    SciTech Connect

    Lauw, H.K. ); Klaassens, J.B. ); Butler, N.G. ); Seely, D.B. )

    1988-12-01

    This paper presents results of study and measurements of a variable-speed generation (VSG) system which uses a series-resonant converter to excite the rotor windings of a doubly-fed generator. Despite the perceived merits, serious concerns exist about VSG systems pertaining to excessive harmonic distortion which the required power electronic converter could cause. Moreover, the use of inadequate converters may prevent the VSG system from becoming a viable economic alternative to fixed-speed generation systems, as well as prevent the exploitation of powerful features of the doubly-fed generator. Adequacy of the series-resonant converter to address these aspects has been demonstrated with a laboratory-scale (15 kW) VSG system. The capabilities of this system includes maximum-efficiency operation and limited converter rating for a speed-range from zero RPM up to well beyond synchronous speed, as well as flexibility for line voltage control, reactive power generation and synchronization at zero RPM. Results of accurate measurements on the harmonic distortion are provided which show the superiority of the use of the series-resonant converter when compared with a VSG system using a conventional cycloconverter or a DC-link converter. A convenient tool for analyzing the operating modes of the VSG system is presented, which can be developed into efficient supervisory control logic to assure proper operation under varying resource conditions.

  18. Study of switching transients in high frequency converters

    NASA Technical Reports Server (NTRS)

    Zinger, Donald S.; Elbuluk, Malik E.; Lee, Tony

    1993-01-01

    As the semiconductor technologies progress rapidly, the power densities and switching frequencies of many power devices are improved. With the existing technology, high frequency power systems become possible. Use of such a system is advantageous in many aspects. A high frequency ac source is used as the direct input to an ac/ac pulse-density-modulation (PDM) converter. This converter is a new concept which employs zero voltage switching techniques. However, the development of this converter is still in its infancy stage. There are problems associated with this converter such as a high on-voltage drop, switching transients, and zero-crossing detecting. Considering these problems, the switching speed and power handling capabilities of the MOS-Controlled Thyristor (MCT) makes the device the most promising candidate for this application. A complete insight of component considerations for building an ac/ac PDM converter for a high frequency power system is addressed. A power device review is first presented. The ac/ac PDM converter requires switches that can conduct bi-directional current and block bi-directional voltage. These bi-directional switches can be constructed using existing power devices. Different bi-directional switches for the converter are investigated. Detailed experimental studies of the characteristics of the MCT under hard switching and zero-voltage switching are also presented. One disadvantage of an ac/ac converter is that turn-on and turn-off of the switches has to be completed instantaneously when the ac source is at zero voltage. Otherwise shoot-through current or voltage spikes can occur which can be hazardous to the devices. In order for the devices to switch softly in the safe operating area even under non-ideal cases, a unique snubber circuit is used in each bi-directional switch. Detailed theory and experimental results for circuits using these snubbers are presented. A current regulated ac/ac PDM converter built using MCT's and IGBT's is

  19. Weather satellite picture receiving stations, APT digital scan converter

    NASA Technical Reports Server (NTRS)

    Vermillion, C. H.; Kamowski, J. C.

    1975-01-01

    The automatic picture transmission digital scan converter is used at ground stations to convert signals received from scanning radiometers to data compatible with ground equipment designed to receive signals from vidicons aboard operational meteorological satellites. Information necessary to understand the circuit theory, functional operation, general construction and calibration of the converter is provided. Brief and detailed descriptions of each of the individual circuits are included, accompanied by a schematic diagram contained at the end of each circuit description. Listings of integral parts and testing equipment required as well as an overall wiring diagram are included. This unit will enable the user to readily accept and process weather photographs from the operational meteorological satellites.

  20. Prediction of core saturation instability at an HVDC converter

    SciTech Connect

    Burton, R.S.; Fuchshuber, C.F.; Woodford, D.A.; Gole, A.M.

    1996-10-01

    Core saturation instability has occurred on several HVDC schemes resulting from interactions between second harmonic and dc quantities (voltages and currents) on the ac side of the converter and fundamental frequency quantities on the dc side of the converter. The instability can be reinforced by unbalanced saturation of the converter transformers. The paper presents an analytical method which can be used to quickly screen ac and dc system operating conditions to predict where core saturation instability is likely to occur. Analytical results have been confirmed using the digital transients simulation program PSCAD/EMTDC.

  1. Design and operation of a thermionic converter in air

    NASA Astrophysics Data System (ADS)

    Horner, M. Harlan; Begg, Lester L.; Smith, Joe N., Jr.; Geller, Clint B.; Kalinowski, Joseph E.

    An electrically heated thermionic converter has been designed, built and successfully tested in air. Several unique features were incorporated in this converter: an integral cesium reservoir, innovative ceramic-to-metal seals, a heat rejection system coupling the collector to a low temperature heat sink and an innovative cylindrical heater filament. The converter was operated for extended periods of time with the emitter at about 1900 K, the collector at about 700 K, and a power density of over 2 w(e)/sq cm. Input power transients were run between 50% and 100% thermal power, at up to 1% per second, without instabilities in performance.

  2. Thermoelectric converter for SP-100 space reactor power system

    NASA Technical Reports Server (NTRS)

    Terrill, W. R.; Haley, V. F.

    1986-01-01

    Conductively coupling the thermoelectric converter to the heat source and the radiator maximizes the utilization of the reactor and radiator temperatures and thereby minimizes the power system weight. This paper presents the design for the converter and the individual thermoelectric cells that are the building block modules for the converter. It also summarizes progress on the fabrication of initial cells and the results obtained from the preparation of a manufacturing plan. The design developed for the SP-100 system utilizes thermally conductive compliant pads that can absorb the displacement and distortion caused by the combinations of temperatures and thermal expansion coefficients. The converter and cell designs provided a 100 kWe system which met the system requirements. Initial cells were fabricated and tested.

  3. Converting molecular information of redox coenzymes via self-assembly.

    PubMed

    Morikawa, Masa-aki; Kimizuka, Nobuo

    2012-11-21

    β-Nicotinamide adenine dinucleotide (NAD(+)) and its reduced form NADH specifically interact with a cyanine dye in aqueous media, giving distinct spectral and nanostructural characteristics to which molecular information of constituent coenzymes are converted via self-assembly.

  4. Parametric testing of an externally configured thermionic converter

    NASA Technical Reports Server (NTRS)

    Shimada, K.; Rouklovc, P.

    1971-01-01

    A 25.4-cm long externally configured converter was performance tested by electrically heating the emitter to simulate reactor thermal power input. The measured maximum output power was limited by the maximum input power available from the electric RF induction heater. With maximum heater input power, the converter electric output was 178 W (1.95 W/sq cm) at an emitter temperature of 1946 K. This electric output power was smaller than expected. A reactor-core-length (25.4-cm long) cylindrical thermionic converter power and maintaining the emitter-to-collector gap without shorting are of major importance to the feasibility of a 25.4-cm-long reactor fuel element. The emitter of the converter is located externally to the collector to increase the fuel-volume fraction and to allow redundant collector cooling in a reactor configuration.

  5. Non-synchronous control of self-oscillating resonant converters

    DOEpatents

    Glaser, John Stanley; Zane, Regan Andrew

    2002-01-01

    A self-oscillating switching power converter has a controllable reactance including an active device connected to a reactive element, wherein the effective reactance of the reactance and the active device is controlled such that the control waveform for the active device is binary digital and is not synchronized with the switching converter output frequency. The active device is turned completely on and off at a frequency that is substantially greater than the maximum frequency imposed on the output terminals of the active device. The effect is to vary the average resistance across the active device output terminals, and thus the effective output reactance, thereby providing converter output control, while maintaining the response speed of the converter.

  6. Translator program converts computer printout into braille language

    NASA Technical Reports Server (NTRS)

    Powell, R. A.

    1967-01-01

    Computer program converts print image tape files into six dot Braille cells, enabling a blind computer programmer to monitor and evaluate data generated by his own programs. The Braille output is printed 8 lines per inch.

  7. Method for converting uranium oxides to uranium metal

    DOEpatents

    Duerksen, Walter K.

    1988-01-01

    A process is described for converting scrap and waste uranium oxide to uranium metal. The uranium oxide is sequentially reduced with a suitable reducing agent to a mixture of uranium metal and oxide products. The uranium metal is then converted to uranium hydride and the uranium hydride-containing mixture is then cooled to a temperature less than -100.degree. C. in an inert liquid which renders the uranium hydride ferromagnetic. The uranium hydride is then magnetically separated from the cooled mixture. The separated uranium hydride is readily converted to uranium metal by heating in an inert atmosphere. This process is environmentally acceptable and eliminates the use of hydrogen fluoride as well as the explosive conditions encountered in the previously employed bomb-reduction processes utilized for converting uranium oxides to uranium metal.

  8. Protection of semiconductor converters for controlled bypass reactors

    SciTech Connect

    Dolgopolov, A. G.; Akhmetzhanov, N. G.; Karmanov, V. F.

    2010-05-15

    Possible ways of protecting thyristor converters in systems for magnetizing 110 - 500 kV controlled bypass reactors during switching and automatic reclosing are examined based on experience with the development of equipment, line tests, and mathematical modelling.

  9. Liquid Nitrogen Temperature Operation of a Switching Power Converter

    NASA Technical Reports Server (NTRS)

    Ray, Biswajit; Gerber, Scott S.; Patterson, Richard L.; Myers, Ira T.

    1995-01-01

    The performance of a 42/28 V, 175 W, 50 kHz pulse-width modulated buck dc/dc switching power converter at liquid nitrogen temperature (LNT) is compared with room temperature operation. The power circuit as well as the control circuit of the converter, designed with commercially available components, were operated at LNT and resulted in a slight improvement in converter efficiency. The improvement in power MOSFET operation was offset by deteriorating performance of the output diode rectifier at LNT. Performance of the converter could be further improved at low temperatures by using only power MOSFET's as switches. The use of a resonant topology will further improve the circuit performance by reducing the switching noise and loss.

  10. Assembly processor program converts symbolic programming language to machine language

    NASA Technical Reports Server (NTRS)

    Pelto, E. V.

    1967-01-01

    Assembly processor program converts symbolic programming language to machine language. This program translates symbolic codes into computer understandable instructions, assigns locations in storage for successive instructions, and computer locations from symbolic addresses.

  11. Converting Sunlight to Mechanical Energy: A Polymer Example of Entropy.

    ERIC Educational Resources Information Center

    Mathias, Lon J.

    1987-01-01

    This experiment/demonstration provides elementary through high school science students with hands-on experience with polymer entropy. Construction of a simple machine for converting light into mechanical energy is described. (RH)

  12. Elimination of current spikes in buck power converters

    NASA Technical Reports Server (NTRS)

    Mclyman, W. T. (Inventor)

    1981-01-01

    Current spikes in a buck power converter due to commutating diode turn-off time are eliminated by using a tapped inductor in the converter with the tap connected to the switching transistor. The commutating diode is not in the usual place, but is instead connected to conduct current from one end of the tapped inductor remote from the load during the interval in which the transistor is not conducting. In the case of a converter having a center-tapped (primary and secondary) transformer between two switching power transistors operated in a push-pull mode and two rectifying diodes in the secondary circuit, current spikes due to transformer saturation are also eliminated by using a tapped inductor in the converter with the tap connected to the rectifying diodes and a diode connected to conduct current from one end of the tapped inductor remote from the load during the interval in which the transistors are not conducting.

  13. Laser-to-electricity energy converter for short wavelengths

    NASA Technical Reports Server (NTRS)

    Stirn, R. J.; Yeh, Y. C. M.

    1975-01-01

    Short-wavelength energy converter can be made using Schottky barrier structure. It has wider band gap than p-n junction silicon semiconductors, and thus it has improved response at wavelengths down to and including ultraviolet region.

  14. Converting baker's waste into alcohol. Revised final progress report

    SciTech Connect

    Halsey, R.; Wilson, P.B.

    1982-01-01

    All types of baker's waste (including waste from candy manufacturers) can be converted into alcohol to be used as a fuel. All types of waste at any stage in process can be converted, such as: basic ingredients (including floor sweepings); dry mixes (including floor sweepings); dough at any stage; partially or fully cooked products; and day old returned products. The basic steps are the same, only the initial preparation will vary slightly. The variation will be: amount of water to be added and amount and type of nutrients (if any) to be added. The basic steps are: slurrying, liquefying to put starch into liquid state, saccharifying to convert starch into fermentable sugars, fermentation to convert sugars into alcohol, and distillation to separate the alcohol from the mash. Each step is discussed in detail along with problems that may arise. Directions are given and materials (enzymes, yeast, etc.) and equipment are descibed briefly.

  15. Inexpensive pulse-train converter measures analog voltage

    NASA Technical Reports Server (NTRS)

    Sturman, J. C.

    1977-01-01

    Converter measures small voltages or currents in presence of very large common-mode voltages (thousands of volts ac or dc). Advantages are low power consumption, transmission via single isolated channel, simplicity, and operation from single-polarity power supply.

  16. A Converter for Producing a Hydrogen-Containing Synthesis Gas

    NASA Astrophysics Data System (ADS)

    Malkov, Yu. P.; Molchanov, O. N.; Britov, B. K.; Fedorov, I. A.

    2016-11-01

    A computational thermodynamic and experimental investigation of the characteristics of a model of a converter for producing a hydrogen-containing synthesis gas from a hydrocarbon fuel (kerosene) with its separate delivery to thermal-oxidative and steam conversions has been carried out. It is shown that the optimum conditions of converter operation correspond to the oxidant excess coefficient in the converter's combustion chamber α > 0.5 at a temperature of the heat-transmitting wall (made from a heat-resistant KhN78T alloy (ÉI 435)) of 1200 K in the case of using a nickel corrugated tape catalyst. The content of hydrogen in the synthesis gas attains in this case 60 vol.%, and there is no release of carbon (soot) in the conversion products as well as no need for water cooling of the converter walls.

  17. East yard, north elevation of car department tool house (converted ...

    Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

    East yard, north elevation of car department tool house (converted from express car). - Chesapeake & Ohio Railroad, Thurmond Yards, East side New River, mouths of Arbuckle & Dunlop Circles, Thurmond, Fayette County, WV

  18. The APA Style Converter: a Web-based interface for converting articles to APA style for publication.

    PubMed

    Li, Ping; Cunningham, Krystal

    2005-05-01

    The APA Style Converter is a Web-based tool with which authors may prepare their articles in APA style according to the APA Publication Manual (5th ed.). The Converter provides a user-friendly interface that allows authors to copy and paste text and upload figures through the Web, and it automatically converts all texts, references, and figures to a structured article in APA style. The output is saved in PDF or RTF format, ready for either electronic submission or hardcopy printing.

  19. Total Ionizing Dose Results and Displacement Damage Results for Candidate Spacecraft Electronics for NASA

    NASA Technical Reports Server (NTRS)

    Cochran, Donna J.; Kniffin, Scott D.; LaBel, Kenneth A.; OBryan, Martha V.; Reed, Robert A.; Ladbury, Ray L.; Howard, James W., Jr.; Poivey, Christian; Buchner, Stephen P.; Marshall, Cheryl J.

    2003-01-01

    We present data on the vulnerability of a variety of candidate spacecraft electronics to total ionizing dose and displacement damage. Devices tested include optoelectronics, digital, analog, linear bipolar devices, hybrid devices, Analog-to-Digital Converters (ADCs), and Digital-to-Analog Converters (DACs), among others.

  20. Pulse-height analyzer with digital readout

    NASA Technical Reports Server (NTRS)

    Goldsworthy, W. W.

    1969-01-01

    Feedback-controlled pulse-amplitude integrator and amplifier is used as an analog-to-digital converter that converts event-liberated charges, emanating from a nuclear-particle detector, directly to numbers rather than to analog-dependent voltages.

  1. Digital Control Of A Telescope In An Airplane

    NASA Technical Reports Server (NTRS)

    Mccormack, Ann C.; Snyder, Philip K.

    1991-01-01

    Options for design of aim-stabilizing system analyzed. Report discusses feasibility of digital control system stabilizing aim of 30-in. telescope aboard NASA C141 airplane known as Kuiper Atmospheric Observatory. Proposed digital compensator consists of input analog-to-digital converter, digital controller processor, and output digital-to-analog converter.

  2. Current Total Ionizing Dose Results and Displacement Damage Results for Candidate Spacecraft Electronics for NASA

    NASA Technical Reports Server (NTRS)

    Cochran, Donna J.; Kniffin, Scott D.; LaBel, Kenneth A.; OBryan, Martha V.; Reed, Robert A.; Ladbury, Ray L.; Howard, James W., Jr.; Poivey, Christian; Buchner, Stephen P.; Marshall, Cheryl J.

    2004-01-01

    We present data on the vulnerability of a variety of candidate spacecraft electronics to total ionizing dose and displacement damage. Devices tested include optoelectronics, digital, analog, linear bipolar devices, hybrid devices, Analog-to-Digital Converters (ADCs), and Digital-to-Analog Converters (DACS), among others.

  3. Recent Total Ionizing Dose Results and Displacement Damage Results for Candidate Spacecraft Electronics for NASA

    NASA Technical Reports Server (NTRS)

    Cochran, Donna J.; Buchner, Stephen P.; Irwin, Tim L.; LaBel, Kenneth A.; Marshall, Cheryl J.; Reed, Robert A.; Sanders, Anthony B.; Hawkins, Donald K.; Flanigan, Ryan J.; Cox, Stephen R.

    2005-01-01

    We present data on the vulnerability of a variety of candidate spacecraft electronics to total ionizing dose and displacement damage. Devices tested include optoelectronics, digital, analog, linear bipolar devices, hybrid devices, Analog-to- Digital Converters (ADCs), and Digital-to-Analog Converters (DACs), among others. T

  4. Results of Single-Event Latchup Measurements Conducted by the Jet Propulsion Laboratory

    NASA Technical Reports Server (NTRS)

    Irom, Farokh; Miyahira, Tetsuo F.

    2010-01-01

    This paper reports recent single-event latchup (SEL) results for a variety of microelectronic devices that include OpAmp, Voltage Reference, Motor Controller, Switch Mode Controller, Resolver-to-Digital Converter and Analog-to-Digital Converter. The data was collected to evaluate these devices for possible use in NASA spacecraft.

  5. Design and Development of a Segmented Magnet Homopolar Torque Converter

    DTIC Science & Technology

    1975-02-01

    IchineVr^V5^ thl ^^^P" concept in large homopolar crLt^ in th^ fi /I蔾’ ^^^C’ a^ electrodynamic power losses created in the fluid during machine...AD-A008 843 DESIGN AND DEVELOPMENT OF A SEGMENTED MAGNET HOMOPOLAR TORQUE CONVERTER C. J. Mole, et al Westinghouse Electric Corporation...This program is for the research and development of a new mechanical power trans- mission concept: the segmented magnet homopolar torque converter

  6. Sealing and anti-corrosive action of tannin rust converters

    SciTech Connect

    Gust, J.; Bobrowicz, J. )

    1993-01-01

    A possibility of the application of mercury porosimetry in the investigation on porosity in corrosion products of the carbon steel along with the degree of sealing by the use of tannin rust converters is presented. The effect of the atmospheric humidity on the rust conversion including the time of that conversion on the degree of rust sealing is discussed. The results of the corrosion investigation of carbon steel covered with a layer of the rust converted with tannin-containing agents are presented.

  7. Bi-directional power control system for voltage converter

    DOEpatents

    Garrigan, N.R.; King, R.D.; Schwartz, J.E.

    1999-05-11

    A control system for a voltage converter includes: a power comparator for comparing a power signal on input terminals of the converter with a commanded power signal and producing a power comparison signal; a power regulator for transforming the power comparison signal to a commanded current signal; a current comparator for comparing the commanded current signal with a measured current signal on output terminals of the converter and producing a current comparison signal; a current regulator for transforming the current comparison signal to a pulse width modulator (PWM) duty cycle command signal; and a PWM for using the PWM duty cycle command signal to control electrical switches of the converter. The control system may further include: a command multiplier for converting a voltage signal across the output terminals of the converter to a gain signal having a value between zero (0) and unity (1), and a power multiplier for multiplying the commanded power signal by the gain signal to provide a limited commanded power signal, wherein power comparator compares the limited commanded power signal with the power signal on the input terminals. 10 figs.

  8. Bi-directional power control system for voltage converter

    DOEpatents

    Garrigan, Neil Richard; King, Robert Dean; Schwartz, James Edward

    1999-01-01

    A control system for a voltage converter includes: a power comparator for comparing a power signal on input terminals of the converter with a commanded power signal and producing a power comparison signal; a power regulator for transforming the power comparison signal to a commanded current signal; a current comparator for comparing the commanded current signal with a measured current signal on output terminals of the converter and producing a current comparison signal; a current regulator for transforming the current comparison signal to a pulse width modulator (PWM) duty cycle command signal; and a PWM for using the PWM duty cycle command signal to control electrical switches of the converter. The control system may further include: a command multiplier for converting a voltage signal across the output terminals of the converter to a gain signal having a value between zero (0) and unity (1), and a power multiplier for multiplying the commanded power signal by the gain signal to provide a limited commanded power signal, wherein power comparator compares the limited commanded power signal with the power signal on the input terminals.

  9. Bidirectional converter for high-efficiency fuel cell powertrain

    NASA Astrophysics Data System (ADS)

    Fardoun, Abbas A.; Ismail, Esam H.; Sabzali, Ahmad J.; Al-Saffar, Mustafa A.

    2014-03-01

    In this paper, a new wide conversion ratio step-up and step-down converter is presented. The proposed converter is derived from the conventional Single Ended Primary Inductor Converter (SEPIC) topology and it is integrated with a capacitor-diode voltage multiplier, which offers a simple structure, reduced electromagnetic interference (EMI), and reduced semiconductors' voltage stresses. Other advantages include: continuous input and output current, extended step-up and step-down voltage conversion ratio without extreme low or high duty-cycle, simple control circuitry, and near-zero input and output ripple currents compared to other converter topologies. The low charging/discharging current ripple and wide gain features result in a longer life-span and lower cost of the energy storage battery system. In addition, the "near-zero" ripple capability improves the fuel cell durability. Theoretical analysis results obtained with the proposed structure are compared with other bi-direction converter topologies. Simulation and experimental results are presented to verify the performance of the proposed bi-directional converter.

  10. Comparing optical systems, and the concept of the converter system.

    PubMed

    Harris, W F; van Gool, R D

    2001-11-01

    The purpose of this article was to present a complete and general method for comparing the first-order optical character of optical systems. The method provides a common basis for quantifying the difference between systems of all kinds including thin lenses, ophthalmic prisms, eyes before and after accommodation, eyes before and after refractive surgery, etc. Systems may be astigmatic or stigmatic, coaxial or noncoaxial. In special cases, the method reduces to being equivalent in essence to ostensibly incommensurate comparisons implicit or explicit in current optometric and ophthalmological usage (difference in power for refractions, corneas, and thin lenses, difference in prismatic power for prisms, ratio of magnifications for afocal telescopes, etc.). The method uses the concept of a converter system that when placed in front of or behind one system, converts its first-order optical character to the equivalent of a second system. Equations are presented for the ray transferences of the anterior and posterior converter systems for pair-wise comparisons in general. For any two systems, the transferences of the converter systems always exist and are unique. Numerical examples are presented; they illustrate converter systems that may be thin in special cases but thick otherwise. The transference of a converter system embodies and quantifies the optical difference between systems or characterizes the change from one state of a system (presurgical or preaccommodative, for example) to another (postsurgical or postaccommodative). The method provides a rational and uniform methodology for research and clinical applications in many areas of optometry and ophthalmology.

  11. Thermal heat-balance mode flow-to-frequency converter

    NASA Astrophysics Data System (ADS)

    Pawlowski, Eligiusz

    2016-11-01

    This paper presents new type of thermal flow converter with the pulse frequency output. The integrating properties of the temperature sensor have been used, which allowed for realization of pulse frequency modulator with thermal feedback loop, stabilizing temperature of sensor placed in the flowing medium. The system assures balancing of heat amount supplied in impulses to the sensor and heat given up by the sensor in a continuous way to the flowing medium. Therefore the frequency of output impulses is proportional to the heat transfer coefficient from sensor to environment. According to the King's law, the frequency of those impulses is a function of medium flow velocity around the sensor. The special feature of presented solution is total integration of thermal sensor with the measurement signal conditioning system. Sensor and conditioning system are not the separate elements of the measurement circuit, but constitute a whole in form of thermal heat-balance mode flow-to-frequency converter. The advantage of such system is easiness of converting the frequency signal to the digital form, without using any additional analogue-to-digital converters. The frequency signal from the converter may be directly connected to the microprocessor input, which with use of standard built-in counters may convert the frequency into numerical value of high precision. Moreover, the frequency signal has higher resistance to interference than the voltage signal and may be transmitted to remote locations without the information loss.

  12. Efficient Design in a DC to DC Converter Unit

    NASA Technical Reports Server (NTRS)

    Bruemmer, Joel E.; Williams, Fitch R.; Schmitz, Gregory V.

    2002-01-01

    Space Flight hardware requires high power conversion efficiencies due to limited power availability and weight penalties of cooling systems. The International Space Station (ISS) Electric Power System (EPS) DC-DC Converter Unit (DDCU) power converter is no exception. This paper explores the design methods and tradeoffs that were utilized to accomplish high efficiency in the DDCU. An isolating DC to DC converter was selected for the ISS power system because of requirements for separate primary and secondary grounds and for a well-regulated secondary output voltage derived from a widely varying input voltage. A flyback-current-fed push-pull topology or improved Weinberg circuit was chosen for this converter because of its potential for high efficiency and reliability. To enhance efficiency, a non-dissipative snubber circuit for the very-low-Rds-on Field Effect Transistors (FETs) was utilized, redistributing the energy that could be wasted during the switching cycle of the power FETs. A unique, low-impedance connection system was utilized to improve contact resistance over a bolted connection. For improved consistency in performance and to lower internal wiring inductance and losses a planar bus system is employed. All of these choices contributed to the design of a 6.25 KW regulated dc to dc converter that is 95 percent efficient. The methodology used in the design of this DC to DC Converter Unit may be directly applicable to other systems that require a conservative approach to efficient power conversion and distribution.

  13. Early Oscillation Detection for DC/DC Converter Fault Diagnosis

    NASA Technical Reports Server (NTRS)

    Wang, Bright L.

    2011-01-01

    The electrical power system of a spacecraft plays a very critical role for space mission success. Such a modern power system may contain numerous hybrid DC/DC converters both inside the power system electronics (PSE) units and onboard most of the flight electronics modules. One of the faulty conditions for DC/DC converter that poses serious threats to mission safety is the random occurrence of oscillation related to inherent instability characteristics of the DC/DC converters and design deficiency of the power systems. To ensure the highest reliability of the power system, oscillations in any form shall be promptly detected during part level testing, system integration tests, flight health monitoring, and on-board fault diagnosis. The popular gain/phase margin analysis method is capable of predicting stability levels of DC/DC converters, but it is limited only to verification of designs and to part-level testing on some of the models. This method has to inject noise signals into the control loop circuitry as required, thus, interrupts the DC/DC converter's normal operation and increases risks of degrading and damaging the flight unit. A novel technique to detect oscillations at early stage for flight hybrid DC/DC converters was developed.

  14. Early Oscillation Detection Technique for Hybrid DC/DC Converters

    NASA Technical Reports Server (NTRS)

    Wang, Bright L.

    2011-01-01

    Oscillation or instability is a situation that must be avoided for reliable hybrid DC/DC converters. A real-time electronics measurement technique was developed to detect catastrophic oscillations at early stages for hybrid DC/DC converters. It is capable of identifying low-level oscillation and determining the degree of the oscillation at a unique frequency for every individual model of the converters without disturbing their normal operations. This technique is specially developed for space-used hybrid DC/DC converters, but it is also suitable for most of commercial and military switching-mode power supplies. This is a weak-electronic-signal detection technique to detect hybrid DC/DC converter oscillation presented as a specific noise signal at power input pins. It is based on principles of feedback control loop oscillation and RF signal modulations, and is realized by using signal power spectral analysis. On the power spectrum, a channel power amplitude at characteristic frequency (CPcf) and a channel power amplitude at switching frequency (CPsw) are chosen as oscillation level indicators. If the converter is stable, the CPcf is a very small pulse and the CPsw is a larger, clear, single pulse. At early stage of oscillation, the CPcf increases to a certain level and the CPsw shows a small pair of sideband pulses around it. If the converter oscillates, the CPcf reaches to a higher level and the CPsw shows more high-level sideband pulses. A comprehensive stability index (CSI) is adopted as a quantitative measure to accurately assign a degree of stability to a specific DC/DC converter. The CSI is a ratio of normal and abnormal power spectral density, and can be calculated using specified and measured CPcf and CPsw data. The novel and unique feature of this technique is the use of power channel amplitudes at characteristic frequency and switching frequency to evaluate stability and identify oscillations at an early stage without interfering with a DC/DC converter s

  15. Imaging of converted-wave ocean-bottom seismic data

    NASA Astrophysics Data System (ADS)

    Rosales Roche, Daniel Alejandro

    Converted-wave data can be imaged with several methodologies. The transformation of data into the image space, is defined by an imaging operator, the simplest of which is normal moveout correction plus stack. Most of the converted-wave processing is carried out in the data domain, that is in time, data midpoint location, and data offset, this processing is not ideal for this type of seismic data. The processing should be carried out in the image domain, that is the one composed of depth, image midpoint location and image subsurface offset. Different processing techniques are created for an accurate image of converted wave seismic data. First, in 2-D Ocean-Bottom Seismic (OBC), the image space for converted-wave data is defined in the angle domain to form converted-wave angle-domain common-image gathers (PS-ADCIGs). The PS-ADCIGs can also be mapped into two complementary ADCIGs, the first one is function only of the P-incidence angle, the second ADCIG is function of the S-reflection angle. The method to obtain PS-ADCIGs is independent of the migration algorithm implemented, as long as the migration algorithm is based on wavefield downward-continuation, and the final prestack image is a function of the horizontal subsurface offset. The final process is done for 3-D seismic data, the creation of the converted-wave azimuth moveout operator (PS-AMO) and the converted-wave common-azimuth migration (PS-CAM) allows the definition and accurate image of 3-D prestack ocean-bottom seismic data.

  16. High Density Power Converters for Photovoltaic Power Management

    NASA Astrophysics Data System (ADS)

    Sangwan, Rahul

    In typical photovoltaic systems, PV cells are connected in series to achieve high output voltages, which decreases conduction losses and helps the downstream power electronics operate at higher efficiencies. A series connection means that the current through the string is limited by the worst case cell, substring, or module, which can result in suboptimal operation of the rest of the string. Given how even small shading can have a large effect on performance, there has been growing interest in the use of distributed power management architectures to mitigate losses from variation in PV systems. In particular, partial power processing converters have gained traction as a means to improve the performance of PV arrays with small, distributed converters that configure in parallel with PV cells. These converters can use low voltage components, only process a fraction of the total power allowing them to achieve higher efficiencies and power density and also have higher reliability. This work details the design and operation of a partial power processing converter implemented as a Resonant Switched Capacitor (ReSC) converter. An integrated circuit (IC) is designed in 0.18 mum CMOS process. Operation at high frequencies (20-50 MHz) allows high levels of integration with air core inductors directly attached to the die through a gold bump, solder reflow process. Test results for the IC are presented with power density and efficiency metrics. The IC is then used as a partial power processing converter to implement equalization with a specially constructed PV panel. The converter is shown to mitigate power loss due to mismatch.

  17. High performance digital read out integrated circuit (DROIC) for infrared imaging

    NASA Astrophysics Data System (ADS)

    Mizuno, Genki; Olah, Robert; Oduor, Patrick; Dutta, Achyut K.; Dhar, Nibir K.

    2016-05-01

    Banpil Photonics has developed a high-performance Digital Read-Out Integrated Circuit (DROIC) for image sensors and camera systems targeting various military, industrial and commercial Infrared (IR) imaging applications. The on-chip digitization of the pixel output eliminates the necessity for an external analog-to-digital converter (ADC), which not only cuts costs, but also enables miniaturization of packaging to achieve SWaP-C camera systems. In addition, the DROIC offers new opportunities for greater on-chip processing intelligence that are not possible in conventional analog ROICs prevalent today. Conventional ROICs, which typically can enhance only one high performance attribute such as frame rate, power consumption or noise level, fail when simultaneously targeting the most aggressive performance requirements demanded in imaging applications today. Additionally, scaling analog readout circuits to meet such requirements leads to expensive, high-power consumption with large and complex systems that are untenable in the trend towards SWaP-C. We present the implementation of a VGA format (640x512 pixels 15μm pitch) capacitivetransimpedance amplifier (CTIA) DROIC architecture that incorporates a 12-bit ADC at the pixel level. The CTIA pixel input circuitry has two gain modes with programmable full-well capacity values of 100K e- and 500K e-. The DROIC has been developed with a system-on-chip architecture in mind, where all the timing and biasing are generated internally without requiring any critical external inputs. The chip is configurable with many parameters programmable through a serial programmable interface (SPI). It features a global shutter, low power, and high frame rates programmable from 30 up 500 frames per second in full VGA format supported through 24 LVDS outputs. This DROIC, suitable for hybridization with focal plane arrays (FPA) is ideal for high-performance uncooled camera applications ranging from near IR (NIR) and shortwave IR (SWIR) to mid

  18. Megapixel imaging camera for expanded H{sup {minus}} beam measurements

    SciTech Connect

    Simmons, J.E.; Lillberg, J.W.; McKee, R.J.; Slice, R.W.; Torrez, J.H.; McCurnin, T.W.; Sanchez, P.G.

    1994-02-01

    A charge coupled device (CCD) imaging camera system has been developed as part of the Ground Test Accelerator project at the Los Alamos National Laboratory to measure the properties of a large diameter, neutral particle beam. The camera is designed to operate in the accelerator vacuum system for extended periods of time. It would normally be cooled to reduce dark current. The CCD contains 1024 {times} 1024 pixels with pixel size of 19 {times} 19 {mu}m{sup 2} and with four phase parallel clocking and two phase serial clocking. The serial clock rate is 2.5{times}10{sup 5} pixels per second. Clock sequence and timing are controlled by an external logic-word generator. The DC bias voltages are likewise located externally. The camera contains circuitry to generate the analog clocks for the CCD and also contains the output video signal amplifier. Reset switching noise is removed by an external signal processor that employs delay elements to provide noise suppression by the method of double-correlated sampling. The video signal is digitized to 12 bits in an analog to digital converter (ADC) module controlled by a central processor module. Both modules are located in a VME-type computer crate that communicates via ethernet with a separate workstation where overall control is exercised and image processing occurs. Under cooled conditions the camera shows good linearity with dynamic range of 2000 and with dark noise fluctuations of about {plus_minus}1/2 ADC count. Full well capacity is about 5{times}10{sup 5} electron charges.

  19. Sub-picosecond Resolution Time-to-Digital Converter

    SciTech Connect

    Ph D, Vladimir Bratov; Ph D, Vladimir Katzman; MS EE, Jeb Binkley

    2006-03-30

    Time-to-digital converters with sub-picosecond resolutions are needed to satisfy the requirements of time-on-flight measurements of the next generation of high energy and nuclear physics experiments. The converters must be highly integrated, power effective, low cost, and feature plug-and-play capabilities to handle the increasing number of channels (up to hundreds of millions) in future Department of Energy experiments. Current state-off-the-art time-to-digital converter integrated circuits do not have the sufficient degree of integration and flexibility to fulfill all the described requirements. During Phase I, the Advanced Science and Novel Technology Company in cooperation with the nuclear physics division of the Oak Ridge National Laboratory has developed the architecture of a novel time-to-digital converter with multiple channels connected to an external processor through a special interfacing block and synchronized by clock signals generated by an internal phase-locked loop. The critical blocks of the system including signal delay lines and delay-locked loops with proprietary differential delay cells, as well as the required digital code converter and the clock period counter have been designed and simulated using the advanced SiGe120 BiCMOS technological process. The results of investigations demonstrate a possibility to achieve the digitization accuracy within 1ps. ADSANTEC has demonstrated the feasibility of the proposed concept in computer simulations. The proposed system will be a critical component for the next generation of NEP experiments.

  20. New zero voltage switching DC converter with flying capacitors

    NASA Astrophysics Data System (ADS)

    Lin, Bor-Ren; Shiau, Tung-Yuan

    2016-04-01

    A new soft switching converter is presented for medium power applications. Two full-bridge converters are connected in series at high voltage side in order to limit the voltage stress of power switches at Vin/2. Therefore, power metal-oxide-semiconductor field-effect transistors (MOSFETs) with 600 V voltage rating can be adopted for 1200 V input voltage applications. In order to balance two input split capacitor voltages in every switching cycle, two flying capacitors are connected on the AC side of two full-bridge converters. Phase-shift pulse-width modulation (PS-PWM) is adopted to regulate the output voltage. Based on the resonant behaviour by the output capacitance of MOSFETs and the resonant inductance, active MOSFETs can be turned on under zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. Two full-bridge converters are used in the proposed circuit to share load current and reduce the current stress of passive and active components. The circuit analysis and design example of the prototype circuit are provided in detail and the performance of the proposed converter is verified by the experiments.