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Sample records for abcn front-end chip

  1. A front end readout electronics ASIC chip for position sensitive solid state detectors

    SciTech Connect

    Kravis, S.D.; Tuemer, T.O.; Visser, G.J.

    1998-12-31

    A mixed signal Application Specific Integrated Circuit (ASIC) chip for front end readout electronics of position sensitive solid state detectors has been manufactured. It is called RENA (Readout Electronics for Nuclear Applications). This chip can be used for both medical and industrial imaging of X-rays and gamma rays. The RENA chip is a monolithic integrated circuit and has 32 channels with low noise high input impedance charge sensitive amplifiers. It works in pulse counting mode with good energy resolution. It also has a self triggering output which is essential for nuclear applications when the incident radiation arrives at random. Different,more » externally selectable, operational modes that includes a sparse readout mode is available to increase data throughput. It also has externally selectable shaping (peaking) times.« less

  2. Single event effects on the APV25 front-end chip

    NASA Astrophysics Data System (ADS)

    Friedl, M.; Bauer, T.; Pernicka, M.

    2003-03-01

    The Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider at CERN will include a Silicon Strip Tracker covering a sensitive area of 206 m2. About ten million channels will be read out by APV25 front-end chips, fabricated in the 0.25 μm deep submicron process. Although permanent damage is not expected within CMS radiation levels, transient Single Event Upsets are inevitable. Moreover, localized ionization can also produce fake signals in the analog circuitry. Eight APV25 chips were exposed to a high-intensity pion beam at the Paul Scherrer Institute (Villigen/CH) to study the radiation induced effects in detail. The results, which are compatible to similar measurements performed with heavy ions, are used to predict the chip error rate at CMS.

  3. A front-end read out chip for the OPERA scintillator tracker

    NASA Astrophysics Data System (ADS)

    Lucotte, A.; Bondil, S.; Borer, K.; Campagne, J. E.; Cazes, A.; Hess, M.; de La Taille, C.; Martin-Chassard, G.; Raux, L.; Repellin, J. P.

    2004-04-01

    Multi-anode photomultipliers H7546 are used to readout signal from the OPERA Scintillator Tracker (CERN/SPSC 2000-028, SPSC/P318, LNGSP 25/2000; CERN/SPSC 2001-025, SPSC/M668, LNGS-EXP30/2001). A 32-channel front-end Read Out Chip prototype accommodating the H7546 has been designed at LAL. This device features a low-noise, variable gain preamplifier to correct for multi-anode non-uniformity, an auto-trigger capability 100% efficient at a 0.3 photo-electron, and a charge measurement extending over a large dynamic range [0-100] photo-electrons. In this article we describe the ASIC architecture that is being implemented for the Target Tracker in OPERA, with a special emphasis put on the designs and the measured performance.

  4. A front-end readout mixed chip for high-efficiency small animal PET imaging

    NASA Astrophysics Data System (ADS)

    Ollivier-Henry, N.; Berst, J. D.; Colledani, C.; Hu-Guo, Ch.; Mbow, N. A.; Staub, D.; Guyonnet, J. L.; Hu, Y.

    2007-02-01

    Today, the main challenge of Positron Emission Tomography (PET) systems dedicated to small animal imaging is to obtain high detection efficiency and a highly accurate localization of radioisotopes. If we focus only on the PET characteristics such as the spatial resolution, its accuracy depends on the design of detector and on the electronics readout system as well. In this paper, we present a new design of such readout system with full custom submicrometer CMOS implementation. The front end chip consists of two main blocks from which the energy information and the time stamp with subnanosecond resolution can be obtained. In our A Multi-Modality Imaging System for Small Animal (AMISSA) PET system design, a matrix of LYSO crystals has to be read at each end by a 64 channels multianode photomultiplier tube. A specific readout electronic has been developed at the Hubert Curien Multidisciplinary Institute (IPHC, France). The architecture of this readout for the energy information detection is composed of a low-noise preamplifier, a CR-RC shaper and an analogue memory. In order to obtain the required dynamic range from 15 to 650 photoelectrons with good linearity, a current mode approach has been chosen for the preamplifier. To detect the signal with a temporal resolution of 1 ns, a comparator with a very low threshold (˜0.3 photoelectron) has been implemented. It gives the time reference of arrival signal coming from the detector. In order to obtain the time coincidence with a temporal resolution of 1 ns, a Time-to-Digital Converter (TDC) based on a Delay-Locked-Loop (DLL) has been designed. The chip is fabricated with AMS 0.35 μm process. The ASIC architecture and some simulation results will be presented in the paper.

  5. Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging.

    PubMed

    Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F Levent

    2014-02-01

    Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

  6. Single-Chip CMUT-on-CMOS Front-End System for Real-Time Volumetric IVUS and ICE Imaging

    PubMed Central

    Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F. Levent

    2014-01-01

    Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of CMUT arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-µm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-µm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single-chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex-vivo chicken heart sample. The measured axial and lateral point resolutions are 92 µm and 251 µm, respectively. We successfully acquired volumetric imaging data from the ex-vivo chicken heart with 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce real-time volumetric images with image quality and speed suitable for catheter based clinical applications. PMID:24474131

  7. Front-End Processing of Cell Lysates for Enhanced Chip-Based Detection

    DTIC Science & Technology

    2006-07-28

    manipulation used in lab-on-a-chip devices. A small unknown sample is first mixed with the PNA surfactants (“PNAA”) to tag the DNA targets, and then the...unknown sample is first mixed with the PNA surfactants (hereafter referred to as “PNA amphiphiles” or “PNAA”) to tag the DNA targets, and then the...prolate ellipsoid, and mixed PNAA/SDS micelles form spherical micelles. On addition of complementary DNA, the PNAA/DNA duplexes do not participate in

  8. A Monolithic Multisensor Microchip with Complete On-Chip RF Front-End

    PubMed Central

    Felini, Corrado; Della Corte, Francesco G.

    2018-01-01

    In this paper, a new wireless sensor, designed for a 0.35 µm CMOS technology, is presented. The microchip was designed to be placed on an object for the continuous remote monitoring of its temperature and illumination state. The temperature sensor is based on the temperature dependence of the I-V characteristics of bipolar transistors available in CMOS technology, while the illumination sensor is an integrated p-n junction photodiode. An on-chip 2.5 GHz transmitter, coupled to a mm-sized dipole radiating element fabricated on the same microchip and made in the top metal layer of the same die, sends the collected data wirelessly to a radio receiver using an On-Off Keying (OOK) modulation pattern. PMID:29301297

  9. Advanced RF Front End Technology

    NASA Technical Reports Server (NTRS)

    Herman, M. I.; Valas, S.; Katehi, L. P. B.

    2001-01-01

    The ability to achieve low-mass low-cost micro/nanospacecraft for Deep Space exploration requires extensive miniaturization of all subsystems. The front end of the Telecommunication subsystem is an area in which major mass (factor of 10) and volume (factor of 100) reduction can be achieved via the development of new silicon based micromachined technology and devices. Major components that make up the front end include single-pole and double-throw switches, diplexer, and solid state power amplifier. JPL's Center For Space Microsystems - System On A Chip (SOAC) Program has addressed the challenges of front end miniaturization (switches and diplexers). Our objectives were to develop the main components that comprise a communication front end and enable integration in a single module that we refer to as a 'cube'. In this paper we will provide the latest status of our Microelectromechanical System (MEMS) switches and surface micromachined filter development. Based on the significant progress achieved we can begin to provide guidelines of the proper system insertion for these emerging technologies. Additional information is contained in the original extended abstract.

  10. Align the Front End First.

    ERIC Educational Resources Information Center

    Perry, Jim

    1995-01-01

    Discussion of management styles and front-end analysis focuses on a review of Douglas McGregor's theories. Topics include Theories X, Y, and Z; leadership skills; motivational needs of employees; intrinsic and extrinsic rewards; and faulty implementation of instructional systems design processes. (LRW)

  11. A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip

    NASA Astrophysics Data System (ADS)

    Lattuca, A.; Mazza, G.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Mager, M.; Sielewicz, K. Marek; Marin Tobon, C. Augusto; Marras, D.; Martinengo, P.; Mugnier, H.; Musa, L.; Pham, T. Hung; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. Willem; Yang, P.

    2016-01-01

    This work presents the 600 MHz clock multiplier PLL and the pseudo-LVDS driver which are two essential components of the Data Transmission Unit (DTU), a fast serial link for the 1.2 Gb/s data transmission of the ALICE inner detector front-end chip (ALPIDE). The PLL multiplies the 40 MHz input clock in order to obtain the 600 MHz and the 200 MHz clock for a fast serializer which works in Double Data Rate mode. The outputs of the serializer feed the pseudo-LVDS driver inputs which transmits the data from the pixel chip to the patch panel with a limited number of signal lines. The driver drives a 5.3 m-6.5 m long differential transmission line by steering a maximum of 5 mA of current at the target speed. To overcome bandwidth limitations coming from the long cables the pre-emphasis can be applied to the output. Currents for the main and pre-emphasis driver can individually be adjusted using on-chip digital-to-analog converters. The circuits will be integrated in the pixel chip and are designed in the same 0.18 μm CMOS technology and will operate from the same 1.8 V supply. Design and test results of both circuits are presented.

  12. AFEII Analog Front End Board Design Specifications

    SciTech Connect

    Rubinov, Paul; /Fermilab

    2005-04-01

    This document describes the design of the 2nd iteration of the Analog Front End Board (AFEII), which has the function of receiving charge signals from the Central Fiber Tracker (CFT) and providing digital hit pattern and charge amplitude information from those charge signals. This second iteration is intended to address limitations of the current AFE (referred to as AFEI in this document). These limitations become increasingly deleterious to the performance of the Central Fiber Tracker as instantaneous luminosity increases. The limitations are inherent in the design of the key front end chips on the AFEI board (the SVXIIe and themore » SIFT) and the architecture of the board itself. The key limitations of the AFEI are: (1) SVX saturation; (2) Discriminator to analog readout cross talk; (3) Tick to tick pedestal variation; and (4) Channel to channel pedestal variation. The new version of the AFE board, AFEII, addresses these limitations by use of a new chip, the TriP-t and by architectural changes, while retaining the well understood and desirable features of the AFEI board.« less

  13. Front-end electronics of the Belle II drift chamber

    NASA Astrophysics Data System (ADS)

    Shimazaki, Shoichi; Taniguchi, Takashi; Uchida, Tomohisa; Ikeno, Masahiro; Taniguchi, Nanae; Tanaka, Manobu M.

    2014-01-01

    This paper describes the performance of the Belle II central drift chamber (CDC) front-end electronics. The front-end electronics consists of a current sensitive preamplifier, a 1/t cancellation circuit, baseline restorers, a comparator for timing measurement and an analog buffer for the dE/dx measurement on a CDC readout card. The CDC readout card is located on the endplate of the CDC. Mass production will be completed after the performance of the chip is verified. The electrical performance and results of a neutron/gamma-ray irradiation test are reported here.

  14. Front end for GPS receivers

    NASA Technical Reports Server (NTRS)

    Thomas, Jr., Jess Brooks (Inventor)

    1999-01-01

    The front end in GPS receivers has the functions of amplifying, down-converting, filtering and sampling the received signals. In the preferred embodiment, only two operations, A/D conversion and a sum, bring the signal from RF to filtered quadrature baseband samples. After amplification and filtering at RF, the L1 and L2 signals are each sampled at RF at a high selected subharmonic rate. The subharmonic sample rates are approximately 900 MHz for L1 and 982 MHz for L2. With the selected subharmonic sampling, the A/D conversion effectively down-converts the signal from RF to quadrature components at baseband. The resulting sample streams for L1 and L2 are each reduced to a lower rate with a digital filter, which becomes a straight sum in the simplest embodiment. The frequency subsystem can be very simple, only requiring the generation of a single reference frequency (e.g. 20.46 MHz minus a small offset) and the simple multiplication of this reference up to the subharmonic sample rates for L1 and L2. The small offset in the reference frequency serves the dual purpose of providing an advantageous offset in the down-converted carrier frequency and in the final baseband sample rate.

  15. SPD very front end electronics

    NASA Astrophysics Data System (ADS)

    Luengo, S.; Gascón, D.; Comerma, A.; Garrido, L.; Riera, J.; Tortella, S.; Vilasís, X.

    2006-11-01

    The Scintillator Pad Detector (SPD) is part of the LHCb calorimetry system [D. Breton, The front-end electronics for LHCb calorimeters, Tenth International Conference on Calorimetry in Particle Physics, CALOR, Pasadena, 2002] that provides high-energy hadron, electron and photon candidates for the first level trigger. The SPD is designed to distinguish electrons from photons. It consists of a plastic scintillator layer, divided into about 6000 cells of different size to obtain better granularity near the beam [S. Amato, et al., LHCb technical design report, CERN/LHCC/2000-0036, 2000]. Charged particles will produce, and photons will not, ionization in the scintillator. This ionization generates a light pulse that is collected by a WaveLength Shifting (WLS) fiber that is coiled inside the scintillator cell. The light is transmitted through a clear fiber to the readout system that is placed at the periphery of the detector. Due to space constraints, and in order to reduce costs, these 6000 cells are divided in groups using a MAPMT [Z. Ajaltouni, et al., Nucl. Instr. and Meth. A 504 (2003) 9] of 64 channels that provides information to the VFE readout electronics. The SPD signal has rather large statistical fluctuations because of the low number (20-30) of photoelectrons per MIP. Therefore the signal is integrated over the whole bunch crossing length of 25 ns in order to have the maximum value. Since in average about 85% of the SPD signal is within 25 ns, 15% of a sample is subtracted from the following one using an operational amplifier. The SPD VFE readout system that will be presented consists of the following components. A specific ASIC [D. Gascon, et al., Discriminator ASIC for the VFE SPD of the LHCb Calorimeter, LHCB Technical Note, LHCB 2004-xx] integrates the signal, makes the signal-tail subtraction, and compares the level obtained to a programmable threshold (to distinguish electrons from photons). A FPGA programmes the ASIC threshold and the value for

  16. End-Users, Front Ends and Librarians.

    ERIC Educational Resources Information Center

    Bourne, Donna E.

    1989-01-01

    The increase in end-user searching, the advantages and limitations of front ends, and the role of the librarian in end-user searching are discussed. It is argued that librarians need to recognize that front ends can be of benefit to themselves and patrons, and to assume the role of advisors and educators for end-users. (37 references) (CLB)

  17. Front-End Analysis Cornerstone of Logistics

    NASA Technical Reports Server (NTRS)

    Nager, Paul J.

    2000-01-01

    The presentation provides an overview of Front-End Logistics Support Analysis (FELSA), when it should be performed, benefits of performing FELSA and why it should be performed, how it is conducted, and examples.

  18. FRED, a Front End for Databases.

    ERIC Educational Resources Information Center

    Crystal, Maurice I.; Jakobson, Gabriel E.

    1982-01-01

    FRED (a Front End for Databases) was conceived to alleviate data access difficulties posed by the heterogeneous nature of online databases. A hardware/software layer interposed between users and databases, it consists of three subsystems: user-interface, database-interface, and knowledge base. Architectural alternatives for this database machine…

  19. Motivation and Front-End Analysis.

    ERIC Educational Resources Information Center

    Harless, Joe

    1978-01-01

    Relates Front-End Analysis (FEA) to motivation by categorizing it as either Diagnostic FEA or Planning FEA. The former is used to diagnose existing problems and prescribe motivational programs; the latter assumes that motivational programs must be implemented, along with other programs, to build the optimum environment to support the performance.…

  20. Monolithic Gallium Arsenide Superheterodyne Front End.

    DTIC Science & Technology

    1982-06-01

    which also provides a con - venient heat sink (not of primary importance in this application due to the low power dissipation of the monolithic...components utilized in the receiver front end). The thickness of the GaAs is then selected as a compromise between con - flicting requirements. A thick...International ERC41014.2FR 2.4 Analysis and Design for Low Noise The design of monolithic amplifiers for low noise must take into con - sideration active

  1. Digital front end electronics design for the EUSO photon detector

    NASA Astrophysics Data System (ADS)

    Musico, P.; Pallavicini, M.; Petrolini, A.; Pratolongo, F.

    2003-09-01

    In this paper we will present the design status of the Digital Front End Electronic system (DFEE), that will be used for the EUSO photon detector. The DFEE is able to count the single photoelectrons coming form the detector for a given time period, store the numbers in a memory buffer and read them out after a trigger, using a serial communication line. Because of space, mass and power consumption constraints, the system will be implemented in an ASIC using a deep submicron technology. The actual design follows the original ideas of the system, though adding several new functionalities. A fully functional prototype chip has been submitted for fabrication in fall 2002. Extensive tests will be performed on it both with bench instrumentations and with the real sensor (the multi anode photomultiplier Hamamatsu R7600-M64), expecting significant results by early Summer 2003. Future work is needed to convert the design into a more robust RAD-hard technology, suitable for space applications and to include in the final die an additional circuit used to optimize the performances at high photons rates: the Analog Front End Electronics (AFEE). Moreover the base board used to house the multi anode photomultipliers is presented: it is the back-bone of the microcell and will be the basic block used to build up the EUSO focal surface.

  2. Compact Receiver Front Ends for Submillimeter-Wave Applications

    NASA Technical Reports Server (NTRS)

    Mehdi, Imran; Chattopadhyay, Goutam; Schlecht, Erich T.; Lin, Robert H.; Sin, Seth; Peralta, Alejandro; Lee, Choonsup; Gill, John J.; Gulkis, Samuel; Thomas, Bertrand C.

    2012-01-01

    The current generation of submillimeter-wave instruments is relatively mass and power-hungry. The receiver front ends (RFEs) of a submillimeter instrument form the heart of the instrument, and any mass reduction achieved in this subsystem is propagated through the instrument. In the current implementation, the RFE consists of different blocks for the mixer and LO circuits. The motivation for this work is to reduce the mass of the RFE by integrating the mixer and LO circuits in one waveguide block. The mixer and its associated LO chips will all be packaged in a single waveguide package. This will reduce the mass of the RFE and also provide a number of other advantages. By bringing the mixer and LO circuits close together, losses in the waveguide will be reduced. Moreover, the compact nature of the block will allow for better thermal control of the block, which is important in order to reduce gain fluctuations. A single waveguide block with a 600- GHz RFE functionality (based on a subharmonically pumped Schottky diode pair) has been demonstrated. The block is about 3x3x3 cubic centimeters. The block combines the mixer and multiplier chip in a single package. 3D electromagnetic simulations were carried out to design the waveguide circuit around the mixer and multiplier chip. The circuit is optimized to provide maximum output power and maximum bandwidth. An integrated submillimeter front end featuring a 520-600-GHz sub-harmonic mixer and a 260-300-GHz frequency tripler in a single cavity was tested. Both devices used GaAs MMIC membrane planar Schottky diode technology. The sub-harmonic mixer/tripler circuit has been tested using conventional metal-machined blocks. Measurement results on the metal block give best DSB (double sideband) mixer noise temperature of 2,360 K and conversion losses of 7.7 dB at 520 GHz. The LO input power required to pump the integrated tripler/sub-harmonic mixer is between 30 and 50 mW.

  3. Solid-State Photomultiplier with Integrated Front End Electronics

    NASA Astrophysics Data System (ADS)

    Christian, James; Stapels, Christopher; Johnson, Erik; Mukhopadhyay, Sharmistha; Jie Chen, Xiao; Miskimen, Rory

    2009-10-01

    The instrumentation cost of physics experiments has been reduced per channel, by the use of solid-state detectors, but these cost-effective techniques have not been translated to scintillation-based detectors. When considering photodetectors, the cost per channel is determined by the use of high-voltage, analog-to-digital converters, BNC cables, and any other ancillary devices. The overhead associated with device operation limits the number of channels for the detector system, while potentially limiting the scope of physics that can be explored. The PRIMEX experiment at JLab, which is being designed to measure the radiative widths of the η and η' pseudo-scalar mesons for a more comprehensive understanding of QCD at low energies, is an example where CMOS solid-state photomultipliers (SSPMs) can be implemented. The ubiquitous nature of CMOS allows for on-chip signal processing to provide front-end electronics within the detector package. We present the results of the device development for the PRIMEX calorimeter, discussing the characteristics of SSPMs, the potential cost savings, and experimental results of on-chip signal processing.

  4. The DIRC front-end electronics chain for BaBar

    NASA Astrophysics Data System (ADS)

    Bailly, P.; Beigbeder, C.; Bernier, R.; Breton, D.; Bonneaud, G.; Caceres, T.; Chase, R.; Chauveau, J.; Del Buono, L.; Dohou, F.; Ducorps, A.; Gastaldi, F.; Genat, J. F.; Hrisoho, A.; Imbert, P.; Lebbolo, H.; Matricon, P.; Oxoby, G.; Renard, C.; Roos, L.; Sen, S.; Thiebaux, C.; Truong, K.; Tocut, V.; Vasileiadis, G.; Va'Vra, J.; Verderi, M.; Warner, D.; Wilson, R. J.; Wormser, G.; Zhang, B.; Zomer, F.

    2000-12-01

    Recent results from the Front-End electronics of the Detector of Internally Reflected Cerenkov light (DIRC) for the BaBar experiment at SLAC (Stanford, USA) are presented. It measures to better than 1 ns the arrival time of Cerenkov photoelectrons detected in a 11000 phototubes array and their amplitude spectra. It mainly comprises 64-channel DIRC Front-End Boards (DFB) equipped with eight full-custom analog chips performing zero-cross discrimination with 2 mV threshold and pulse shaping, four full-custom digital time to digital chips (TDC) for timing measurements with 500 ps binning and a readout logic selecting hits in the trigger window, and DIRC Crate Controller cards (DCC) serializing the data collected front up to 16 DFBs onto a 1.2 Gb/s optical link. Extensive test results of the pre-production chips are presented, as well as system tests.

  5. Front End Spectroscopy ASIC for Germanium Detectors

    NASA Astrophysics Data System (ADS)

    Wulf, Eric

    Large-area, tracking, semiconductor detectors with excellent spatial and spectral resolution enable exciting new access to soft (0.2-5 MeV) gamma-ray astrophysics. The improvements from semiconductor tracking detectors come with the burden of high density of strips and/or pixels that require high-density, low-power, spectroscopy quality readout electronics. CMOS ASIC technologies are a natural fit to this requirement and have led to high-quality readout systems for all current semiconducting tracking detectors except for germanium detectors. The Compton Spectrometer and Imager (COSI), formerly NCT, at University of California Berkeley and the Gamma-Ray Imager/Polarimeter for Solar flares (GRIPS) at Goddard Space Flight Center utilize germanium cross-strip detectors and are on the forefront of NASA's Compton telescope research with funded missions of long duration balloon flights. The development of a readout ASIC for germanium detectors would allow COSI to replace their discrete electronics readout and would enable the proposed Gamma-Ray Explorer (GRX) mission utilizing germanium strip-detectors. We propose a 3-year program to develop and test a germanium readout ASIC to TRL 5 and to integrate the ASIC readout onto a COSI detector allowing a TRL 6 demonstration for the following COSI balloon flight. Our group at NRL led a program, sponsored by another government agency, to produce and integrate a cross-strip silicon detector ASIC, designed and fabricated by Dr. De Geronimo at Brookhaven National Laboratory. The ASIC was designed to handle the large (>30 pF) capacitance of three 10 cm^2 detectors daisy-chained together. The front-end preamplifier, selectable inverter, shaping times, and gains make this ASIC compatible with a germanium cross-strip detector as well. We therefore have the opportunity and expertise to leverage the previous investment in the silicon ASIC for a new mission. A germanium strip detector ASIC will also require precise timing of the signals at

  6. Front end design of smartphone-based mobile health

    NASA Astrophysics Data System (ADS)

    Zhang, Changfan; He, Lingsong; Gao, Zhiqiang; Ling, Cong; Du, Jianhao

    2015-02-01

    Mobile health has been a new trend all over the world with the rapid development of intelligent terminals and mobile internet. It can help patients monitor health in-house and is convenient for doctors to diagnose remotely. Smart-phone-based mobile health has big advantages in cost and data sharing. Front end design of it mainly focuses on two points: one is implementation of medical sensors aimed at measuring kinds of medical signal; another is acquisition of medical signal from sensors to smart phone. In this paper, the above two aspects were both discussed. First, medical sensor implementation was proposed to refer to mature measurement solutions with ECG (electrocardiograph) sensor design taken for example. And integrated chip using can simplify design. Then second, typical data acquisition architecture of smart phones, namely Bluetooth and MIC (microphone)-based architecture, were compared. Bluetooth architecture should be equipped with an acquisition card; MIC design uses sound card of smart phone instead. Smartphone-based virtual instrument app design corresponding to above acquisition architecture was discussed. In experiments, Bluetooth and MIC architecture were used to acquire blood pressure and ECG data respectively. The results showed that Bluetooth design can guarantee high accuracy during the acquisition and transmission process, and MIC design is competitive because of low cost and convenience.

  7. Advanced integrated safeguards using front-end-triggering devices

    SciTech Connect

    Howell, J.A.; Whitty, W.J.

    This report addresses potential uses of front-end-triggering devices for enhanced safeguards. Such systems incorporate video surveillance as well as radiation and other sensors. Also covered in the report are integration issues and analysis techniques.

  8. Fully Integrated Biopotential Acquisition Analog Front-End IC

    PubMed Central

    Song, Haryong; Park, Yunjong; Kim, Hyungseup; Ko, Hyoungho

    2015-01-01

    A biopotential acquisition analog front-end (AFE) integrated circuit (IC) is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA) to achieve low input referred noise (IRN) and to block unwanted DC potential signals. A DC servo loop (DSL) is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL) is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL) is designed to enhance the input impedance and common mode rejection ratio (CMRR) without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL) at each CCIA stage. The biopotential AFE is fabricated using a 0.18 µm one polysilicon and six metal layers (1P6M) complementary metal oxide semiconductor (CMOS) process. The core chip size of the AFE without input/output (I/O) pads is 10.5 mm2. A fourth-order band-pass filter (BPF) with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 µVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions. PMID:26437404

  9. Concepts for a Muon Accelerator Front-End

    SciTech Connect

    Stratakis, Diktys; Berg, Scott; Neuffer, David

    2017-03-16

    We present a muon capture front-end scheme for muon based applications. In this Front-End design, a proton bunch strikes a target and creates secondary pions that drift into a capture channel, decaying into muons. A series of rf cavities forms the resulting muon beams into a series of bunches of differerent energies, aligns the bunches to equal central energies, and initiates ionization cooling. We also discuss the design of a chicane system for the removal of unwanted secondary particles from the muon capture region and thus reduce activation of the machine. With the aid of numerical simulations we evaluate themore » performance of this Front-End scheme as well as study its sensitivity against key parameters such as the type of target, the number of rf cavities and the gas pressure of the channel.« less

  10. Web-based DAQ systems: connecting the user and electronics front-ends

    NASA Astrophysics Data System (ADS)

    Lenzi, Thomas

    2016-12-01

    Web technologies are quickly evolving and are gaining in computational power and flexibility, allowing for a paradigm shift in the field of Data Acquisition (DAQ) systems design. Modern web browsers offer the possibility to create intricate user interfaces and are able to process and render complex data. Furthermore, new web standards such as WebSockets allow for fast real-time communication between the server and the user with minimal overhead. Those improvements make it possible to move the control and monitoring operations from the back-end servers directly to the user and to the front-end electronics, thus reducing the complexity of the data acquisition chain. Moreover, web-based DAQ systems offer greater flexibility, accessibility, and maintainability on the user side than traditional applications which often lack portability and ease of use. As proof of concept, we implemented a simplified DAQ system on a mid-range Spartan6 Field Programmable Gate Array (FPGA) development board coupled to a digital front-end readout chip. The system is connected to the Internet and can be accessed from any web browser. It is composed of custom code to control the front-end readout and of a dual soft-core Microblaze processor to communicate with the client.

  11. The DIRC front-end electronics chain for BaBar

    NASA Astrophysics Data System (ADS)

    Bailly, P.; Chauveau, J.; Del Buono, L.; Genat, J. F.; Lebbolo, H.; Roos, L.; Zhang, B.; Beigbeder, C.; Bernier, R.; Breton, D.; Caceres, T.; Chase, R.; Ducorps, A.; Hrisoho, A.; Imbert, P.; Sen, S.; Tocut, V.; Truong, K.; Wormser, G.; Zomer, F.; Bonneaud, G.; Dohou, F.; Gastaldi, F.; Matricon, P.; Renard, C.; Thiebaux, C.; Vasileiadis, G.; Verderi, M.; Oxoby, G.; Va'Vra, J.; Warner, D.; Wilson, R. J.

    1999-08-01

    The detector of Internally Reflected Cherenkov light (DIRC) of the BaBar detector (SLAC Stanford, USA) measures better than 1 ns the arrival time of Cherenkov photoelectrons, detected in a 11 000 phototubes array and their amplitude spectra. It mainly comprises of 64-channel DIRC Front-End Boards (DFB) equipped with eight full-custom Analog chips performing zero-cross discrimination with 2 mV threshold and pulse shaping, four full-custom Digital TDC chips for timing measurements with 500 ps binning and a readout logic selecting hits in the trigger window, and DIRC Crate Controller cards (DCC) serializing the data collected from up to 16 DFBs onto a 1.2 Gb/s optical link. Extensive test of the pre-production chips have been performed as well as system tests.

  12. Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management.

    PubMed

    George, Libin; Gargiulo, Gaetano Dario; Lehmann, Torsten; Hamilton, Tara Julia

    2015-11-19

    Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm²), uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm) 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip.

  13. Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management

    PubMed Central

    George, Libin; Gargiulo, Gaetano Dario; Lehmann, Torsten; Hamilton, Tara Julia

    2015-01-01

    Power supply quality and stability are critical for wearable and implantable biomedical applications. For this reason we have designed a reconfigurable switched-capacitor DC-DC converter that, aside from having an extremely small footprint (with an active on-chip area of only 0.04 mm2), uses a novel output voltage control method based upon a combination of adaptive gain and discrete frequency scaling control schemes. This novel DC-DC converter achieves a measured output voltage range of 1.0 to 2.2 V with power delivery up to 7.5 mW with 75% efficiency. In this paper, we present the use of this converter as a power supply for a concept design of a wearable (15 mm × 15 mm) 1-lead ECG front-end sensor device that simultaneously harvests power and communicates with external receivers when exposed to a suitable RF field. Due to voltage range limitations of the fabrication process of the current prototype chip, we focus our analysis solely on the power supply of the ECG front-end whose design is also detailed in this paper. Measurement results show not just that the power supplied is regulated, clean and does not infringe upon the ECG bandwidth, but that there is negligible difference between signals acquired using standard linear power-supplies and when the power is regulated by our power management chip. PMID:26610497

  14. Single event effect hardness for the front-end ASICs in the DAMPE satellite BGO calorimeter

    NASA Astrophysics Data System (ADS)

    Gao, Shan-Shan; Jiang, Di; Feng, Chang-Qing; Xi, Kai; Liu, Shu-Bin; An, Qi

    2016-01-01

    The Dark Matter Particle Explorer (DAMPE) is a Chinese scientific satellite designed for cosmic ray studies with a primary scientific goal of indirect detection of dark matter particles. As a crucial sub-detector, the BGO calorimeter measures the energy spectrum of cosmic rays in the energy range from 5 GeV to 10 TeV. In order to implement high-density front-end electronics (FEE) with the ability to measure 1848 signals from 616 photomultiplier tubes on the strictly constrained satellite platform, two kinds of 32-channel front-end ASICs, VA160 and VATA160, are customized. However, a space mission period of more than 3 years makes single event effects (SEEs) become threats to reliability. In order to evaluate SEE sensitivities of these chips and verify the effectiveness of mitigation methods, a series of laser-induced and heavy ion-induced SEE tests were performed. Benefiting from the single event latch-up (SEL) protection circuit for power supply, the triple module redundancy (TMR) technology for the configuration registers and the optimized sequential design for the data acquisition process, 52 VA160 chips and 32 VATA160 chips have been applied in the flight model of the BGO calorimeter with radiation hardness assurance. Supported by Strategic Priority Research Program on Space Science of the Chinese Academy of Sciences (XDA04040202-4) and Fundamental Research Funds for the Central Universities (WK2030040048)

  15. Front-End/Gateway Software: Availability and Usefulness.

    ERIC Educational Resources Information Center

    Kesselman, Martin

    1985-01-01

    Reviews features of front-end software packages (interface between user and online system)--database selection, search strategy development, saving and downloading, hardware and software requirements, training and documentation, online systems and database accession, and costs--and discusses gateway services (user searches through intermediary…

  16. Front End Loader Operator. Open Pit Mining Job Training Series.

    ERIC Educational Resources Information Center

    Savilow, Bill

    This training outline for front end loader operators, one in a series of eight outlines, is designed primarily for company training foremen or supervisors and for trainers to use as an industry-wide guideline for heavy equipment operator training in open pit mining in British Columbia. Intended as a guide for preparation of lesson plans both for…

  17. 25. FRONT END LOADERS MOMENTARILY IN REPOSE IN THE ORE ...

    Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

    25. FRONT END LOADERS MOMENTARILY IN REPOSE IN THE ORE STORAGE YARD. AN ORE BRIDGE THAT FORMERLY TRANSFERRED ORE WITHIN THE STORAGE YARD WAS DESTROYED BY A BLIZZARD IN 1978. - Pennsylvania Railway Ore Dock, Lake Erie at Whiskey Island, approximately 1.5 miles west of Public Square, Cleveland, Cuyahoga County, OH

  18. The Front-End System For MARE In Milano

    NASA Astrophysics Data System (ADS)

    Arnaboldi, Claudio; Pessina, Gianluigi

    2009-12-01

    The first phase of MARE consists of 72 μ-bolometers composed each of a crystal of AgReO4 readout by Si thermistors. The spread in the thermistor characteristics and bolometer thermal coupling leads to different energy conversion gains and optimum operating points of the detectors. Detector biasing levels and voltage gains are completely remote-adjustable by the front end system developed, the subject of this paper, achieving the same signal range at the input of the DAQ system. The front end consists of a cold buffer stage, a second pseudo differential stage followed by a gain stage, an antialiasing filter, and a battery powered detector biasing set up. The DAQ system can be used to set all necessary parameters of the electronics remotely, by writing to a μ-controller located on each board. Fiber optics are used for the serial communication between the DAQ and the front end. To suppress interference noise during normal operation, the clocked devices of the front end are maintained in sleep-mode, except during the set-up phase of the experiment. An automatic DC detector characterization procedure is used to establish the optimum operating point of every detector of the array. A very low noise level has been achieved: about 3nV/□Hz at 1 Hz and 1 nV/□Hz for the white component, high frequencies.

  19. FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry

    NASA Astrophysics Data System (ADS)

    Alexanian, H.; Appelquist, G.; Bailly, P.; Benetta, R.; Berglund, S.; Bezamat, J.; Blouzon, F.; Bohm, C.; Breveglieri, L.; Brigati, S.; Cattaneo, P. W.; Dadda, L.; David, J.; Engström, M.; Genat, J. F.; Givoletti, M.; Goggi, V. G.; Gong, S.; Grieco, G. M.; Hansen, M.; Hentzell, H.; Holmberg, T.; Höglund, I.; Inkinen, S. J.; Kerek, A.; Landi, C.; Ledortz, O.; Lippi, M.; Lofstedt, B.; Lund-Jensen, B.; Maloberti, F.; Mutz, S.; Nayman, P.; Piuri, V.; Polesello, G.; Sami, M.; Savoy-Navarro, A.; Schwemling, P.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Ödmark, A.; Fermi Collaboration

    1995-02-01

    We present a digital solution for the front-end electronics of high resolution calorimeters at future colliders. It is based on analogue signal compression, high speed {A}/{D} converters, a fully programmable pipeline and a digital signal processing (DSP) chain with local intelligence and system supervision. This digital solution is aimed at providing maximal front-end processing power by performing waveform analysis using DSP methods. For the system integration of the multichannel device a multi-chip, silicon-on-silicon multi-chip module (MCM) has been adopted. This solution allows a high level of integration of complex analogue and digital functions, with excellent flexibility in mixing technologies for the different functional blocks. This type of multichip integration provides a high degree of reliability and programmability at both the function and the system level, with the additional possibility of customising the microsystem to detector-specific requirements. For enhanced reliability in high radiation environments, fault tolerance strategies, i.e. redundancy, reconfigurability, majority voting and coding for error detection and correction, are integrated into the design.

  20. Test of ATLAS RPCs Front-End electronics

    NASA Astrophysics Data System (ADS)

    Aielli, G.; Camarri, P.; Cardarelli, R.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Paoloni, A.; Pastori, E.; Santonico, R.

    2003-08-01

    The Front-End Electronics performing the ATLAS RPCs readout is a full custom 8 channels GaAs circuit, which integrates in a single die both the analog and digital signal processing. The die is bonded on the Front-End board which is completely closed inside the detector Faraday cage. About 50 000 FE boards are foreseen for the experiment. The complete functionality of the FE boards will be certificated before the detector assembly. We describe here the systematic test devoted to check the dynamic functionality of each single channel and the selection criteria applied. It measures and registers all relevant electronics parameters to build up a complete database for the experiment. The statistical results from more than 1100 channels are presented.

  1. High Dynamic Range Cognitive Radio Front Ends: Architecture to Evaluation

    NASA Astrophysics Data System (ADS)

    Ashok, Arun; Subbiah, Iyappan; Varga, Gabor; Schrey, Moritz; Heinen, Stefan

    2016-07-01

    Advent of TV white space digitization has released frequencies from 470 MHz to 790 MHz to be utilized opportunistically. The secondary user can utilize these so called TV spaces in the absence of primary users. The most important challenge for this coexistence is mutual interference. While the strong TV stations can completely saturate the receiver of the cognitive radio (CR), the cognitive radio spurious tones can disturb other primary users and white space devices. The aim of this paper is to address the challenges for enabling cognitive radio applications in WLAN and LTE. In this process, architectural considerations for the design of cognitive radio front ends are discussed. With high-IF converters, faster and flexible implementation of CR enabled WLAN and LTE are shown. The effectiveness of the architecture is shown by evaluating the CR front ends for compliance of standards namely 802.11b/g (WLAN) and 3GPP TS 36.101 (LTE).

  2. Front End Analysis of Soldier Individual Power Systems

    DTIC Science & Technology

    1993-05-01

    in the state-of-the-art MOD-GPHS-RTG, but with the fuel being polonium 210 , with a half life of 13.1.4 days, in the form of a gadolinium polonide (GdPo...allies, and industry to evaluate state-of-the-art technologies and integrate them into a system with synergistic improvement in combat effectiveness . The...Schemes ................................................... 79 Front End Analysis of Soldier Individual Power S LIST OF FIGURES I Effect of Mission

  3. Frequency to Voltage Converter Analog Front-End Prototype

    NASA Technical Reports Server (NTRS)

    Mata, Carlos; Raines, Matthew

    2012-01-01

    The frequency to voltage converter analog front end evaluation prototype (F2V AFE) is an evaluation board designed for comparison of different methods of accurately extracting the frequency of a sinusoidal input signal. A configurable input stage is routed to one or several of five separate, configurable filtering circuits, and then to a configurable output stage. Amplifier selection and gain, filter corner frequencies, and comparator hysteresis and voltage reference are all easily configurable through the use of jumpers and potentiometers.

  4. Passive front-ends for wideband millimeter wave electronic warfare

    NASA Astrophysics Data System (ADS)

    Jastram, Nathan Joseph

    This thesis presents the analysis, design and measurements of novel passive front ends of interest to millimeter wave electronic warfare systems. However, emerging threats in the millimeter waves (18 GHz and above) has led to a push for new systems capable of addressing these threats. At these frequencies, traditional techniques of design and fabrication are challenging due to small size, limited bandwidth and losses. The use of surface micromachining technology for wideband direction finding with multiple element antenna arrays for electronic support is demonstrated. A wideband tapered slot antenna is first designed and measured as an array element for the subsequent arrays. Both 18--36 GHz and 75--110 GHz amplitude only and amplitude/phase two element direction finding front ends are designed and measured. The design of arrays using Butler matrix and Rotman lens beamformers for greater than two element direction finding over W band and beyond using is also presented. The design of a dual polarized high power capable front end for electronic attack over an 18--45 GHz band is presented. To combine two polarizations into the same radiating aperture, an orthomode transducer (OMT) based upon a new double ridge waveguide cross section is developed. To provide greater flexibility in needed performance characteristics, several different turnstile junction matching sections are tested. A modular horn section is proposed to address flexible and ever changing operational requirements, and is designed for performance criteria such as constant gain, beamwidth, etc. A multi-section branch guide coupler and low loss Rotman lens based upon the proposed cross section are also developed. Prototyping methods for the herein designed millimeter wave electronic warfare front ends are investigated. Specifically, both printed circuit board (PCB) prototyping of micromachined systems and 3D printing of conventionally machined horns are presented. A 4--8 GHz two element array with

  5. Non-Electronic Radio Front-End (NERF)

    DTIC Science & Technology

    2007-04-01

    electro - optic field sensor. The absence of metallic interconnects and the charge isolation provided by the optics removes the soft spots in a traditional receiver. In the proof-of concept experiment, detection of C band electromagnetic signals at 7.38 GHz with a sensitivity of 4.3x10 -3 V/m.Hz(exp 1/2) is demonstrated. The dielectric approach has an added benefit: it reduces physical size of the front end an important benefit in mobile applications. DIELECTRIC RESONATOR ANTENNA, PHOTONICALLY ISOLATED ANTENNA RECEIVER, ELECTRO - OPTIC DIELECTRIC ANTENNA,

  6. Wideband monolithically integrated front-end subsystems and components

    NASA Astrophysics Data System (ADS)

    Mruk, Joseph Rene

    This thesis presents the analysis, design, and measurements of passive, monolithically integrated, wideband recta-coax and printed circuit board front-end components. Monolithic fabrication of antennas, impedance transformers, filters, and transitions lowers manufacturing costs by reducing assembly time and enhances performance by removing connectors and cabling between the devices. Computational design, fabrication, and measurements are used to demonstrate the capabilities of these front-end assemblies. Two-arm wideband planar log-periodic antennas fed using a horizontal feed that allows for filters and impedance transformers to be readily fabricated within the radiating region of the antenna are demonstrated. At microwave frequencies, low-cost printed circuit board processes are typically used to produce planar devices. A 1.8 to 11 GHz two-arm planar log-periodic antenna is designed with a monolithically integrated impedance transformer. Band rejection methods based on modifying the antenna aperture, use of an integrated filter, and the application of both methods are investigated with realized gain suppressions of over 25 dB achieved. The ability of standard circuit board technology to fabricate millimeter-wave devices up to 110 GHz is severely limited. Thin dielectrics are required to prevent the excitation of higher order modes in the microstrip substrate. Fabricating the thin line widths required for the antenna aperture also becomes prohibitively challenging. Surface micro-machining typically used in the fabrication of MEMS devices is capable of producing the extremely small features that can be used to fabricate antennas extending through W-band. A directly RF fed 18 to 110 GHz planar log-periodic antenna is developed. The antenna is fabricated with an integrated impedance transformer and additional transitions for measurement characterization. Singly terminated low-loss wideband millimeter-wave filters operating over V- and W- band are developed. High

  7. Front-end electronics for the LZ experiment

    NASA Astrophysics Data System (ADS)

    Morad, James; LZ Collaboration

    2016-03-01

    LZ is a second generation direct dark matter detection experiment with 5.6 tonnes of liquid xenon active target, which will be instrumented as a two-phase time projection chamber (TPC). The peripheral xenon outside the active TPC (``skin'') will also be instrumented. In addition, there will be a liquid scintillator based outer veto surrounding the main cryostat. All of these systems will be read out using photomultiplier tubes. I will present the designs for front-end electronics for all these systems, which have been optimized for shaping times, gains, and low noise. Preliminary results from prototype boards will also be presented.

  8. Understanding the Manager of the Project Front-End

    NASA Technical Reports Server (NTRS)

    Mulenburg, Gerald M.; Imprescia, Cliff (Technical Monitor)

    2000-01-01

    Historical data and new findings from interviews with managers of major National Aeronautics and Space Administration (NASA) projects confirm literature reports about the criticality of the front-end phase of project development, where systems engineering plays such a key role. Recent research into the management of ten contemporary NASA projects, combined with personal experience of the author in NASA, provide some insight into the relevance and importance of the project manager in this initial part of the project life cycle. The research findings provide evidence of similar approaches taken by the NASA project manager.

  9. Instrument front-ends at Fermilab during Run II

    NASA Astrophysics Data System (ADS)

    Meyer, T.; Slimmer, D.; Voy, D.

    2011-11-01

    The optimization of an accelerator relies on the ability to monitor the behavior of the beam in an intelligent and timely fashion. The use of processor-driven front-ends allowed for the deployment of smart systems in the field for improved data collection and analysis during Run II. This paper describes the implementation of the two main systems used: National Instruments LabVIEW running on PCs, and WindRiver's VxWorks real-time operating system running in a VME crate processor. Work supported by Fermi Research Alliance, LLC under Contract No. DE-AC02-07CH11359 with the United States Department of Energy.

  10. A multitasking, multisinked, multiprocessor data acquisition front end

    SciTech Connect

    Fox, R.; Au, R.; Molen, A.V.

    1989-10-01

    The authors have developed a generalized data acquisition front end system which is based on MC68020 processors running a commercial real time kernel (rhoSOS), and implemented primarily in a high level language (C). This system has been attached to the back end on-line computing system at NSCL via our high performance ETHERNET protocol. Data may be simultaneously sent to any number of back end systems. Fixed fraction sampling along links to back end computing is also supported. A nonprocedural program generator simplifies the development of experiment specific code.

  11. AiGERM: A logic programming front end for GERM

    NASA Technical Reports Server (NTRS)

    Hashim, Safaa H.

    1990-01-01

    AiGerm (Artificially Intelligent Graphical Entity Relation Modeler) is a relational data base query and programming language front end for MCC (Mission Control Center)/STP's (Space Test Program) Germ (Graphical Entity Relational Modeling) system. It is intended as an add-on component of the Germ system to be used for navigating very large networks of information. It can also function as an expert system shell for prototyping knowledge-based systems. AiGerm provides an interface between the programming language and Germ.

  12. A CMOS Front-End With Integrated Magnetoresistive Sensors for Biomolecular Recognition Detection Applications.

    PubMed

    Costa, Tiago; Cardoso, Filipe A; Germano, Jose; Freitas, Paulo P; Piedade, Moises S

    2017-10-01

    The development of giant magnetoresistive (GMR) sensors has demonstrated significant advantages in nanomedicine, particularly for ultrasensitive point-of-care diagnostics. To this end, the detection system is required to be compact, portable, and low power consuming at the same time that a maximum signal to noise ratio is maintained. This paper reports a CMOS front-end with integrated magnetoresistive sensors for biomolecular recognition detection applications. Based on the characterization of the GMR sensor's signal and noise, CMOS building blocks (i.e., current source, multiplexers, and preamplifier) were designed targeting a negligible noise when compared with the GMR sensor's noise and a low power consumption. The CMOS front-end was fabricated using AMS [Formula: see text] technology and the magnetoresistive sensors were post-fabricated on top of the CMOS chip with high yield ( [Formula: see text]). Due to its low circuit noise (16 [Formula: see text]) and overall equivalent magnetic noise ([Formula: see text]), the full system was able to detect 250 nm magnetic nanoparticles with a circuit imposed signal-to-noise ratio degradation of only -1.4 dB. Furthermore, the low power consumption (6.5 mW) and small dimensions ([Formula: see text] ) of the presented solution guarantees the portability of the detection system allowing its usage at the point-of-care.

  13. Modern design of a fast front-end computer

    NASA Astrophysics Data System (ADS)

    Šoštarić, Z.; Anic̈ić, D.; Sekolec, L.; Su, J.

    1994-12-01

    Front-end computers (FEC) at Paul Scherrer Institut provide access to accelerator CAMAC-based sensors and actuators by way of a local area network. In the scope of the new generation FEC project, a front-end is regarded as a collection of services. The functionality of one such service is described in terms of Yourdon's environment, behaviour, processor and task models. The computational model (software representation of the environment) of the service is defined separately, using the information model of the Shlaer-Mellor method, and Sather OO language. In parallel with the analysis and later with the design, a suite of test programmes was developed to evaluate the feasibility of different computing platforms for the project and a set of rapid prototypes was produced to resolve different implementation issues. The past and future aspects of the project and its driving forces are presented. Justification of the choice of methodology, platform and requirement, is given. We conclude with a description of the present state, priorities and limitations of our project.

  14. REACH: a high-performance wireless base station front end

    NASA Astrophysics Data System (ADS)

    Nettleton, Ray W.

    1996-01-01

    The link budget determines the relationships between range, capacity and transmitted power for any wireless technology. In every case it is a key determinant of the system's performance from both an engineering and an economic point of view. Unfortunately, the new 1.9 GHz PCS systems will begin life with an inherent 7 dB disadvantage over the 800 MHz cellular due to propagation differences. Additionally, system wiring and electronics often degrade performance by a further 5 to 10 dB due to long coaxial runs and noisy front end amplification, both of which are harder issues to deal with at 1.9 GHz than at 800 MHz. SCT's REACHTM products address these shortcomings by packaging critical components--front end amplification, filtering, etc.--in a compact cryoelectronic package intended for mounting near the antennas of the base station. In a recent trial with Qualcomm in San Diego, this package improved the CDMA uplink budget by 6 dB--enough to halve the number of base stations that are needed in most areas. This paper examines the technical and economic ramifications of the REACHTM product.

  15. Underwater fiber-wireless communication with a passive front end

    NASA Astrophysics Data System (ADS)

    Xu, Jing; Sun, Bin; Lyu, Weichao; Kong, Meiwei; Sarwar, Rohail; Han, Jun; Zhang, Wei; Deng, Ning

    2017-11-01

    We propose and experimentally demonstrate a novel concept on underwater fiber-wireless (Fi-Wi) communication system with a fully passive wireless front end. A low-cost step-index (SI) plastic optical fiber (POF) together with a passive collimating lens at the front end composes the underwater Fi-Wi architecture. We have achieved a 1.71-Gb/s transmission at a mean BER of 4.97 × 10-3 (1.30 × 10-3 when using power loading) over a 50-m SI-POF and 2-m underwater wireless channel using orthogonal frequency division multiplexing (OFDM). Although the wireless part is very short, it actually plays a crucial role in practical underwater implementation, especially in deep sea. Compared with the wired solution (e.g. using a 52-m POF cable without the UWOC part), the proposed underwater Fi-Wi scheme can save optical wet-mate connectors that are sophisticated, very expensive and difficult to install in deep ocean. By combining high-capacity robust POF with the mobility and ubiquity of underwater wireless optical communication (UWOC), the proposed underwater Fi-Wi technology will find wide application in ocean exploration.

  16. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY...

  17. 75 FR 70703 - Humana Insurance Company a Division of Carenetwork, Inc. Front End Operations and Account...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-11-18

    ... Division of CareNetwork, Inc., Front End Operations and Account Installation-Product Testing Groups, De... a Division of Carenetwork, Inc. Front End Operations and Account Installation-Product Testing Groups..., a Division of CareNetwork, Inc., Front End Operations and Account Installation- Product Testing...

  18. DESIGN OF MEDICAL RADIOMETER FRONT-END FOR IMPROVED PERFORMANCE

    PubMed Central

    Klemetsen, Ø.; Birkelund, Y.; Jacobsen, S. K.; Maccarini, P. F.; Stauffer, P. R.

    2011-01-01

    We have investigated the possibility of building a singleband Dicke radiometer that is inexpensive, small-sized, stable, highly sensitive, and which consists of readily available microwave components. The selected frequency band is at 3.25–3.75 GHz which provides a reasonable compromise between spatial resolution (antenna size) and sensing depth for radiometry applications in lossy tissue. Foreseen applications of the instrument are non-invasive temperature monitoring for breast cancer detection and temperature monitoring during heating. We have found off-the-shelf microwave components that are sufficiently small (< 5 mm × 5 mm) and which offer satisfactory overall sensitivity. Two different Dicke radiometers have been realized: one is a conventional design with the Dicke switch at the front-end to select either the antenna or noise reference channels for amplification. The second design places a matched pair of low noise amplifiers in front of the Dicke switch to reduce system noise figure. Numerical simulations were performed to test the design concepts before building prototype PCB front-end layouts of the radiometer. Both designs provide an overall power gain of approximately 50 dB over a 500 MHz bandwidth centered at 3.5 GHz. No stability problems were observed despite using triple-cascaded amplifier configurations to boost the thermal signals. The prototypes were tested for sensitivity after calibration in two different water baths. Experiments showed superior sensitivity (36% higher) when implementing the low noise amplifier before the Dicke switch (close to the antenna) compared to the other design with the Dicke switch in front. Radiometer performance was also tested in a multilayered phantom during alternating heating and radiometric reading. Empirical tests showed that for the configuration with Dicke switch first, the switch had to be locked in the reference position during application of microwave heating to avoid damage to the active components

  19. Toward Realization of 2.4 GHz Balunless Narrowband Receiver Front-End for Short Range Wireless Applications.

    PubMed

    El-Desouki, Munir M; Qasim, Syed Manzoor; BenSaleh, Mohammed S; Deen, M Jamal

    2015-05-07

    The demand for radio frequency (RF) transceivers operating at 2.4 GHz band has attracted considerable research interest due to the advancement in short range wireless technologies. The performance of RF transceivers depends heavily on the transmitter and receiver front-ends. The receiver front-end is comprised of a low-noise amplifier (LNA) and a downconversion mixer. There are very few designs that focus on connecting the single-ended output LNA to a double-balanced mixer without the use of on-chip transformer, also known as a balun. The objective of designing such a receiver front-end is to achieve high integration and low power consumption. To meet these requirements, we present the design of fully-integrated 2.4 GHz receiver front-end, consisting of a narrow-band LNA and a double balanced mixer without using a balun. Here, the single-ended RF output signal of the LNA is translated into differential signal using an NMOS-PMOS (n-channel metal-oxide-semiconductor, p-channel metal-oxide-semiconductor) transistor differential pair instead of the conventional NMOS-NMOS transistor configuration, for the RF amplification stage of the double-balanced mixer. The proposed receiver circuit fabricated using TSMC 0.18 µm CMOS technology operates at 2.4 GHz and produces an output signal at 300 MHz. The fabricated receiver achieves a gain of 16.3 dB and consumes only 6.74 mW operating at 1.5 V, while utilizing 2.08 mm2 of chip area. Measurement results demonstrate the effectiveness and suitability of the proposed receiver for short-range wireless applications, such as in wireless sensor network (WSN).

  20. PMF: The front end electronic of the ALFA detector

    NASA Astrophysics Data System (ADS)

    Barrillon, P.; Blin, S.; Cheikali, C.; Cuisy, D.; Gaspard, M.; Fournier, D.; Heller, M.; Iwanski, W.; Lavigne, B.; De la Taille, C.; Puzo, P.; Socha, J.-L.

    2010-11-01

    The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed of a MAPMT and a compact stack of three PCBs, which deliver high voltage, route and read out of the output signals. The third board contains an FPGA and MAROC, a 64-channel ASIC, which can correct the non-uniformity of the MAPMT channels gain, thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements and have fulfilled the approval criteria for the final production of all elements.

  1. Front-end simulation of injector for terawatt accumulator.

    PubMed

    Kropachev, G N; Balabin, A I; Kolomiets, A A; Kulevoy, T V; Pershin, V I; Shumshurov, A V

    2008-02-01

    A terawatt accumulator (TWAC) accelerator/storage ring complex with the laser ion source is in progress at ITEP. The new injector I4 based on the radio frequency quadrupole (RFQ) and interdigital H-mode (IH) linear accelerator is under construction. The front end of the new TWAC injector consists of a laser ion source, an extraction system, and a low energy beam transport (LEBT). The KOBRA3-INP was used for the simulation and optimization of the ion source extraction system. The optimization parameter is the maximum brightness of the beam generated by the laser ion source. Also the KOBRA3-INP code was used for LEBT investigation. The LEBT based on electrostatic grid lenses is chosen for injector I4. The results of the extraction system and LEBT investigations for ion beam matching with RFQ are presented.

  2. PIP-II Injector Test Warm Front End: Commissioning Update

    SciTech Connect

    Prost, Lionel R.; et al.

    The Warm Front End (WFE) of the Proton Improvement Plan II Injector Test [1] at Fermilab has been constructed to its full length. It includes a 15-mA DC, 30-keV H- ion source, a 2 m-long Low Energy Beam Transport (LEBT) with a switching dipole magnet, a 2.1 MeV CW RFQ, followed by a Medium Energy Beam Transport (MEBT) with various diagnostics and a dump. This report presents the commissioning status, focusing on beam measurements in the MEBT. In particular, a beam with the parameters required for injection into the Booster (5 mA, 0.55 ms macro-pulse at 20 Hz) was transportedmore » through the WFE.« less

  3. Gravitational Reference Sensor Front-End Electronics Simulator for LISA

    NASA Astrophysics Data System (ADS)

    Meshksar, Neda; Ferraioli, Luigi; Mance, Davor; ten Pierick, Jan; Zweifel, Peter; Giardini, Domenico; ">LISA Pathfinder colaboration, Front End Electronics (FEE) for LISA Gravitational Reference Sensor (GRS). It is based on the GRS FEE-simulator already implemented for LISA Pathfinder. It considers, in particular, the non-linearity and the critical details of hardware, such as the non-linear multiplicative noise caused by voltage reference instability, test mass charging and detailed actuation and sensing algorithms. We present the simulation modules, considering the above-mentioned features. Based on the ETH GRS FEE-simulator for LISA Pathfinder we aim to develop a modular simulator that provides a realistic simulation of GRS FEE for LISA.

  4. Shielding design for the front end of the CERN SPL.

    PubMed

    Magistris, Matteo; Silari, Marco; Vincke, Helmut

    2005-01-01

    CERN is designing a 2.2-GeV Superconducting Proton Linac (SPL) with a beam power of 4 MW, to be used for the production of a neutrino superbeam. The SPL front end will initially accelerate 2 x 10(14) negative hydrogen ions per second up to an energy of 120 MeV. The FLUKA Monte Carlo code was employed for shielding design. The proposed shielding is a combined iron-concrete structure, which also takes into consideration the required RF wave-guide ducts and access labyrinths to the machine. Two beam-loss scenarios were investigated: (1) constant beam loss of 1 Wm(-1) over the whole accelerator length and (2) full beam loss occurring at various locations. A comparison with results based on simplified approaches is also presented.

  5. Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

    PubMed Central

    Valente, Virgilio; Demosthenous, Andreas

    2016-01-01

    This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm2, is capable of an operational bandwidth of 8 MHz and a linear gain in the range between −6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 μA. Each CR channel occupies an area of 0.21 mm2. The chip consumes between 530 μA and 690 μA per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis. PMID:27463721

  6. Front-end electronics for the Muon Portal project

    NASA Astrophysics Data System (ADS)

    Garozzo, S.; Marano, D.; Bonanno, G.; Grillo, A.; Romeo, G.; Timpanaro, M. C.; Lo Presti, D.; Riggi, F.; Russo, V.; Bonanno, D.; La Rocca, P.; Longhitano, F.; Bongiovanni, D. G.; Fallica, G.; Valvo, G.

    2016-10-01

    The Muon Portal Project was born as a joint initiative between Italian research and industrial partners, aimed at the construction of a real-size working detector prototype to inspect the content of traveling containers by means of secondary cosmic-ray muon radiation and recognize potentially dangerous hidden materials. The tomographic image is obtained by reconstructing the incoming and outgoing muon trajectories when crossing the inspected volume, employing two tracker planes located above and below the container under inspection. In this paper, the design and development of the front-end electronics of the Muon Portal detector is presented, with particular emphasis being devoted to the photo-sensor devices detecting the scintillation light and to the read-out circuitry which is in charge of processing and digitizing the analog pulse signals. In addition, the remote control system, mechanical housing, and thermal cooling system of all structural blocks of the Muon Portal tracker are also discussed, demonstrating the effectiveness and functionality of the adopted design.

  7. Hard X-ray Wiggler Front End Filter Design

    SciTech Connect

    Schulte-Schrepping, Horst; Hahn, Ulrich

    2007-01-19

    The front end filter design and implementation for the new HARWI-II hard X-ray wiggler at DORIS-III at HASYLAB/DESY is presented. The device emits a total power of 30 kW at 150mA storage ring current. The beam has a horizontal width of 3.8mrad and a central power density of 54 W/mm2 at 26m distance to the source. The filter section located in the ring tunnel has been introduced to tailor the thermal loads at the downstream optical components. The high power density and the high total power at the filter section are handled with a layered design. Glassy carbon filters convertmore » the absorbed power into thermal radiation to lower the heat load to an acceptable level for water cooled copper filters. The requirements in beam size and filtering are addressed by separating the filter functions in three units which are switched individually into the beam.« less

  8. Digital Front End for Wide-Band VLBI Science Receiver

    NASA Technical Reports Server (NTRS)

    Jongeling, Andre; Sigman, Elliott; Navarro, Robert; Goodhart, Charles; Rogstad, Steve; Chandra, Kumar; Finley, Sue; Trinh, Joseph; Soriano, Melissa; White, Les; hide

    2006-01-01

    An upgrade to the very-long-baseline-interferometry (VLBI) science receiver (VSR) a radio receiver used in NASA's Deep Space Network (DSN) is currently being implemented. The current VSR samples standard DSN intermediate- frequency (IF) signals at 256 MHz and after digital down-conversion records data from up to four 16-MHz baseband channels. Currently, IF signals are limited to the 265-to-375-MHz range, and recording rates are limited to less than 80 Mbps. The new digital front end, denoted the Wideband VSR, provides improvements to enable the receiver to process wider bandwidth signals and accommodate more data channels for recording. The Wideband VSR utilizes state-of-the-art commercial analog-to-digital converter and field-programmable gate array (FPGA) integrated circuits, and fiber-optic connections in a custom architecture. It accepts IF signals from 100 to 600 MHz, sampling the signal at 1.28 GHz. The sample data are sent to a digital processing module, using a fiber-optic link for isolation. The digital processing module includes boards designed around an Advanced Telecom Computing Architecture (ATCA) industry-standard backplane. Digital signal processing implemented in FPGAs down-convert the data signals in up to 16 baseband channels with programmable bandwidths from 1 kHz to 16 MHz. Baseband samples are transmitted to a computer via multiple Ethernet connections allowing recording to disk at rates of up to 1 Gbps.

  9. MEDUSA-32: A low noise, low power silicon strip detector front-end electronics, for space applications

    NASA Astrophysics Data System (ADS)

    Cicuttin, Andres; Colavita, Alberto; Cerdeira, Alberto; Fratnik, Fabio; Vacchi, Andrea

    1997-02-01

    In this report we describe a mixed analog-digital integrated circuit (IC) designed as the front-end electronics for silicon strip-detectors for space applications. In space power consumption, compactness and robustness become critical constraints for a pre-amplifier design. The IC is a prototype with 32 complete channels, and it is intended for a large area particle tracker of a new generation of gamma ray telescopes. Each channel contains a charge sensitive amplifier, a pulse shaper, a discriminator and two digital buffers. The reference trip point of the discriminator is adjustable. This chip also has a custom PMOSFET transistor per channel, included in order to provide the high dynamic resistance needed to reverse-bias the strip diode. The digital part of the chip is used to store and serially shift out the state of the channels. There is also a storage buffer that allows the disabling of non-functioning channels if it is required by the data acquisition system. An input capacitance of 30 pF introduced at the input of the front-end produces less than 1000 electrons of RMS equivalent noise charge (ENC), for a total power dissipation of only 60 μW per channel. The chip was made using Orbit's 1.2 μm double poly, double metal n-well low noise CMOS process. The dimensions of the IC are 2400 μm × 8840 μm.

  10. A Front-End Electronics Prototype Based on Gigabit Ethernet for the ATLAS Small-Strip Thin Gap Chamber

    NASA Astrophysics Data System (ADS)

    Hu, Kun; Lu, Houbing; Wang, Xu; Li, Feng; Wang, Xinxin; Geng, Tianru; Yang, Hang; Liu, Shengquan; Han, Liang; Jin, Ge

    2017-06-01

    A front-end electronics prototype for the ATLAS small-strip Thin Gap Chamber (sTGC) based on gigabit Ethernet has been developed. The prototype is designed to read out signals of pads, wires, and strips of the sTGC detector. The prototype includes two VMM2 chips developed to read out the signals of the sTGC, a Xilinx Kintex-7 field-programmable gate array (FPGA) used for the VMM2 configuration and the events storage, and a gigabit Ethernet transceiver PHY chip for interfacing with a computer. The VMM2 chip is designed for the readout of the Micromegas detector and sTGC detector, which is composed of 64 linear front-end channels. Each channel integrates a charge-sensitive amplifier, a shaper, several analog-to-digital converters, and other digital functions. For a bunch-crossing interval of 25 ns, events are continuously read out by the FPGA and forwarded to the computer. The interface between the computer and the prototype has been measured to reach an error-free rate of 900 Mb/s, therefore making a very effective use of the available bandwidth. Additionally, the computer can control several prototypes of this kind simultaneously via the Ethernet interface. At present, the prototype will be used for the sTGC performance test. The features of the prototype are described in detail.

  11. Photodetectors and front-end electronics for the LHCb RICH upgrade

    NASA Astrophysics Data System (ADS)

    Cassina, L.; LHCb RICH

    2017-12-01

    The RICH detectors of the LHCb experiment provide identification of hadrons produced in high energy proton-proton collisions in the LHC at CERN over a wide momentum range (2-100 GeV/c). Cherenkov light is collected on photon detector planes sensitive to single photons. The RICH will be upgraded (in 2019) to read out every bunch crossing, at a rate of 40 MHz. The current hybrid photon detectors (HPD) will be replaced with multi-anode photomultiplier tubes (customisations of the Hamamatsu R11265 and the H12699 MaPMTs). These 8×8 pixel devices meet the experimental requirements thanks to their small pixel size, high gain, negligible dark count rate (∼50 Hz/cm2) and moderate cross-talk. The measured performance of several tubes is reported, together with their long-term stability. A new 8-channel front-end chip, named CLARO, has been designed in 0.35 μm CMOS AMS technology for the MaPMT readout. The CLARO chip operates in binary mode and combines low power consumption (∼1 mW/Ch), wide bandwidth (baseline restored in ⩽ 25 ns) and radiation hardness. A 12-bit digital register permits the optimisation of the dynamic range and the threshold level for each channel and provides tools for the on-site calibration. The design choices and the characterization of the electronics are presented.

  12. A single active nanoelectromechanical tuning fork front-end radio-frequency receiver

    NASA Astrophysics Data System (ADS)

    Bartsch, Sebastian T.; Rusu, A.; Ionescu, Adrian M.

    2012-06-01

    Nanoelectromechanical systems (NEMS) offer the potential to revolutionize fundamental methods employed for signal processing in today’s telecommunication systems, owing to their spectral purity and the prospect of integration with existing technology. In this work we present a novel, front-end receiver topology based on a single device silicon nanoelectromechanical mixer-filter. The operation is demonstrated by using the signal amplification in a field effect transistor (FET) merged into a tuning fork resonator. The combination of both a transistor and a mechanical element into a hybrid unit enables on-chip functionality and performance previously unachievable in silicon. Signal mixing, filtering and demodulation are experimentally demonstrated at very high frequencies ( > 100 MHz), maintaining a high quality factor of Q = 800 and stable operation at near ambient pressure (0.1 atm) and room temperature (T = 300 K). The results show that, ultimately miniaturized, silicon NEMS can be utilized to realize multi-band, single-chip receiver systems based on NEMS mixer-filter arrays with reduced system complexity and power consumption.

  13. Loran digital phase-locked loop and RF front-end system error analysis

    NASA Technical Reports Server (NTRS)

    Mccall, D. L.

    1979-01-01

    An analysis of the system performance of the digital phase locked loops (DPLL) and RF front end that are implemented in the MINI-L4 Loran receiver is presented. Three of the four experiments deal with the performance of the digital phase locked loops. The other experiment deals with the RF front end and DPLL system error which arise in the front end due to poor signal to noise ratios. The ability of the DPLLs to track the offsets is studied.

  14. Realization of Miniaturized Multi-/Wideband Microwave Front-Ends

    NASA Astrophysics Data System (ADS)

    Al Shamaileh, Khair A.

    The ever-growing demand toward designing microwave front-end components with enhanced access to the radio spectrum (e.g., multi-/wideband functionality) and improved physical features (e.g., miniaturized circuitry, ease and cost of fabrication) is becoming more paramount than ever before. This dissertation proposes new design methodologies, simulations, and experimental validations of passive front-ends (i.e., antennas, couplers, dividers) at microwave frequencies. The presented design concepts optimize both electrical and physical characteristics without degrading the intended performance. The developed designs are essential to the upcoming wireless technologies. The first proposed component is a compact ultra-wideband (UWB) Wilkinson power divider (WPD). The design procedure is accomplished by replacing the uniform transmission lines in each arm of the conventional single-frequency divider with impedance-varying profiles governed by a truncated Fourier series. While such non-uniform transmission lines (NTLs) are obtained through the even-mode analysis, three isolation resistors are optimized in the odd-mode circuit to achieve proper isolation and output ports matching over the frequency range of interest. The proposed design methodology is systematic, and results in single-layered and compact structures. For verification purposes, an equal split WPD is designed, simulated, and measured. The obtained results show that the input and output ports matching as well as the isolation between the output ports are below --10 dB; whereas the transmission parameters vary between --3.2 dB and --5 dB across the 3.1--10.6 GHz band. The designed divider is expected to find applications in UWB antenna diversity, multiple-input-multiple-output (MIMO) schemes, and antenna arrays feeding networks. The second proposed component is a wideband multi-way Bagley power divider (BPD). Wideband functionality is achieved by replacing the single-frequency matching uniform microstrip lines in

  15. Characteristics of a multichannel low-noise front-end ASIC for CZT-based small animal PET imaging

    NASA Astrophysics Data System (ADS)

    Gao, W.; Liu, H.; Gan, B.; Hu, Y.

    2014-05-01

    In this paper, we present the design and characteristics of a novel low-noise front-end readout application-specific integrated circuit dedicated to CdZnTe (CZT) detectors for a small animal PET imaging system. A low-noise readout method based on the charge integration and the delayed peak detection is proposed. An eight-channel front-end readout prototype chip is designed and implemented in a 0.35 μm CMOS process. The die size is 2.3 mm ×2.3 mm. The prototype chip is tested in different methods including electronic test, energy spectrum test and irradiation test. The input range of the ASIC is from 2000e- to 180,000e-, reflecting the energy of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 mV/fC at the shaping time of 1 μs. The best test result of the equivalent noise charge (ENC) is 58.9 e- at zero farad plus 5.4 e- per picofarad. The nonlinearity and the crosstalk are less than 3% and less than 2%, respectively, at the room temperature. The static power dissipation is about 3 mW/channel.

  16. Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

    PubMed

    Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

    2005-12-01

    Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

  17. Front End Software for Online Database Searching Part 1: Definitions, System Features, and Evaluation.

    ERIC Educational Resources Information Center

    Hawkins, Donald T.; Levy, Louise R.

    1985-01-01

    This initial article in series of three discusses barriers inhibiting use of current online retrieval systems by novice users and notes reasons for front end and gateway online retrieval systems. Definitions, front end features, user interface, location (personal computer, host mainframe), evaluation, and strengths and weaknesses are covered. (16…

  18. Front End Software for Online Database Searching. Part 2: The Marketplace.

    ERIC Educational Resources Information Center

    Levy, Louise R.; Hawkins, Donald T.

    1986-01-01

    This article analyzes the front end software marketplace and discusses some of the complex forces influencing it. Discussion covers intermediary market; end users (library customers, scientific and technical professionals, corporate business specialists, consumers); marketing strategies; a British front end development firm; competitive pressures;…

  19. Conceptual design of front ends for the advanced photon source multi-bend achromats upgrade

    SciTech Connect

    Jaski, Y., E-mail: jaskiy@aps.anl.gov; Westferro, F., E-mail: westferr@aps.anl.gov; Lee, S. H., E-mail: shlee@aps.anl.gov

    2016-07-27

    The proposed Advanced Photon Source (APS) upgrade from a double-bend achromats (DBA) to multi-bend achromats (MBA) lattice with ring energy change from 7 GeV to 6 GeV and beam current from 100 mA to 200 mA poses new challenges for front ends. All front ends must be upgraded to fulfill the following requirements: 1) handle the high heat load from two insertion devices in either inline or canted configuration, 2) include a clearing magnet in the front end to deflect and dump any electrons in case the electrons escape from the storage ring during swap-out injection with the safety shuttersmore » open, 3) incorporate the next generation x-ray beam position monitors (XBPMs) into the front end to meet the new stringent beam stability requirements. This paper presents the evaluation of the existing APS front ends and standardizes the insertion device (ID) front ends into two types: one for the single beam and one for the canted beams. The conceptual design of high heat load front end (HHLFE) and canted undulator front end (CUFE) for APS MBA upgrade is presented.« less

  20. Conceptual Design of Front Ends for the Advanced Photon Source Multi-bend Achromats Upgrade

    SciTech Connect

    Jaski, Y.; Westferro, F.; Lee, S. H.

    2016-07-27

    The proposed Advanced Photon Source (APS) upgrade from a double-bend achromats (DBA) to multi-bend achromats (MBA) lattice with ring energy change from 7 GeV to 6 GeV and beam current from 100 mA to 200 mA poses new challenges for front ends. All front ends must be upgraded to fulfill the following requirements: 1) handle the high heat load from two insertion devices in either inline or canted configuration, 2) include a clearing magnet in the front end to deflect and dump any electrons in case the electrons escape from the storage ring during swap-out injection with the safety shuttersmore » open, 3) incorporate the next generation x-ray beam position monitors (XBPMs) into the front end to meet the new stringent beam stability requirements. This paper presents the evaluation of the existing APS front ends and standardizes the insertion device (ID) front ends into two types: one for the single beam and one for the canted beams. The conceptual design of high heat load front end (HHLFE) and canted undulator front end (CUFE) for APS MBA upgrade is presented.« less

  1. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...

  2. 40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

  3. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents...

  4. 40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

  5. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...

  6. 40 CFR 63.487 - Batch front-end process vents-reference control technology.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...

  7. 40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

  8. 40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

  9. A low power low noise analog front end for portable healthcare system

    NASA Astrophysics Data System (ADS)

    Yanchao, Wang; Keren, Ke; Wenhui, Qin; Yajie, Qin; Ting, Yi; Zhiliang, Hong

    2015-10-01

    The presented analog front end (AFE) used to process human bio-signals consists of chopping instrument amplifier (IA), chopping spikes filter and programmable gain and bandwidth amplifier. The capacitor-coupling input of AFE can reject the DC electrode offset. The power consumption of current-feedback based IA is reduced by adopting capacitor divider in the input and feedback network. Besides, IA's input thermal noise is decreased by utilizing complementary CMOS input pairs which can offer higher transconductance. Fabricated in Global Foundry 0.35 μm CMOS technology, the chip consumes 3.96 μA from 3.3 V supply. The measured input noise is 0.85 μVrms (0.5-100 Hz) and the achieved noise efficient factor is 6.48. Project supported by the Science and Technology Commission of Shanghai Municipality (No. 13511501100), the State Key Laboratory Project of China (No. 11MS002), and the State Key Laboratory of ASIC & System, Fudan University.

  10. Progress on the upgrade of the CMS Hadron Calorimeter Front-End electronics

    SciTech Connect

    Anderson, Jake; Whitmore, Juliana; /Fermilab

    2011-11-01

    We present a scheme to upgrade the CMS HCAL front-end electronics in the second long shutdown to upgrade the LHC (LS2), which is expected to occur around 2018. The HCAL electronics upgrade is required to handle the major instantaneous luminosity increase (up to 5 * 10{sup 34} cm{sup -2} s{sup -1}) and an expected integrated luminosity of {approx}3000 fb{sup -1}. A key aspect of the HCAL upgrade is to read out longitudinal segmentation information to improve background rejection, energy resolution, and electron isolation at the L1 trigger. This paper focuses on the requirements for the new electronics and on themore » proposed solutions. The requirements include increased channel count, additional timing capabilities, and additional redundancy. The electronics are required to operate in a harsh environment and are constrained by the existing infrastructure. The proposed solutions span from chip level to system level. They include the development of a new ASIC ADC, the design and testing of higher speed transmitters to handle the increased data volume, the evaluation and use of circuits from other developments, evaluation of commercial FPGAs, better thermal design, and improvements in the overall readout architecture. We will report on the progress of the designs for these upgraded systems, along with performance requirements and initial design studies.« less

  11. Front-end receiver electronics for a matrix transducer for 3-D transesophageal echocardiography.

    PubMed

    Yu, Zili; Blaak, Sandra; Chang, Zu-yao; Yao, Jiajian; Bosch, Johan G; Prins, Christian; Lancée, Charles T; de Jong, Nico; Pertijs, Michiel A P; Meijer, Gerard C M

    2012-07-01

    There is a clear clinical need for creating 3-D images of the heart. One promising technique is the use of transesophageal echocardiography (TEE). To enable 3-D TEE, we are developing a miniature ultrasound probe containing a matrix piezoelectric transducer with more than 2000 elements. Because a gastroscopic tube cannot accommodate the cables needed to connect all transducer elements directly to an imaging system, a major challenge is to locally reduce the number of channels, while maintaining a sufficient signal-to-noise ratio. This can be achieved by using front-end receiver electronics bonded to the transducers to provide appropriate signal conditioning in the tip of the probe. This paper presents the design of such electronics, realizing time-gain compensation (TGC) and micro-beamforming using simple, low-power circuits. Prototypes of TGC amplifiers and micro-beamforming cells have been fabricated in 0.35-μm CMOS technology. These prototype chips have been combined on a printed circuit board (PCB) to form an ultrasound-receiver system capable of reading and combining the signals of three transducer elements. Experimental results show that this design is a suitable candidate for 3-D TEE.

  12. A Dual Slope Charge Sampling Analog Front-End for a Wireless Neural Recording System

    PubMed Central

    Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit

    2015-01-01

    This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-µm CMOS process, occupying 2.4 × 2.1 mm2 and consuming 255 µW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 µVrms in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 µW. PMID:25570655

  13. A novel pseudo resistor structure for biomedical front-end amplifiers.

    PubMed

    Yu-Chieh Huang; Tzu-Sen Yang; Shun-Hsi Hsu; Xin-Zhuang Chen; Jin-Chern Chiou

    2015-08-01

    This study proposes a novel pseudo resistor structure with a tunable DC bias voltage for biomedical front-end amplifiers (FEAs). In the proposed FEA, the high-pass filter composed of differential difference amplifier and a pseudo resistor is implemented. The FEA is manufactured by using a standard TSMC 0.35 μm CMOS process. In this study, three types FEAs included three different pseudo resistor are simulated, fabricated and measured for comparison and electrocorticography (ECoG) measurement, and all the results show the proposed pseudo resistor is superior to other two types in bandwidth. In chip implementation, the lower and upper cutoff frequencies of the high-pass filter with the proposed pseudo resistor are 0.15 Hz and 4.98 KHz, respectively. It also demonstrates lower total harmonic distortion performance of -58 dB at 1 kHz and higher stability with wide supply range (1.8 V and 3.3 V) and control voltage range (0.9 V and 1.65 V) than others. Moreover, the FEA with the proposed pseudo successfully recorded spike-and-wave discharges of ECoG signal in in vivo experiment on rat with pentylenetetrazol-induced seizures.

  14. A dual slope charge sampling analog front-end for a wireless neural recording system.

    PubMed

    Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit; Ghovanloo, Maysam

    2014-01-01

    This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-μm CMOS process, occupying 2.4 × 2.1 mm(2) and consuming 255 μW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 μV(rms) in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 μW.

  15. JFET front-end circuits integrated in a detector-grade silicon substrate

    NASA Astrophysics Data System (ADS)

    Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.; Dalla Betta, G. F.; Boscardin, M.; Batignani, G.; Giorgi, M.; Bosisio, L.

    2003-08-01

    This paper presents the design and experimental results relevant to front-end circuits integrated on detector-grade high resistivity silicon. The fabrication technology is made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy and allows using a common substrate for different kinds of active devices, such as N-channel JFETs and MOSFETs, and for pixel, microstrip, and PIN detectors. This research activity is being carried out in the framework of a project aiming at the fabrication of a multichannel mixed analog-digital chip for the readout of solid-state detectors integrated in the same substrate. Possible applications are in the field of medical and industrial imaging and space and high energy physics experiments. An all-JFET charge sensitive amplifier, which can use either a resistive or a nonresistive feedback network, has been characterized. The two configurations have been compared to each other, paying particular attention to noise performances, in view of the design of the complete readout channel. Operation capability in harsh radiation environment has been evaluated through exposure to /spl gamma/-rays from a /sup 60/Co source.

  16. CMOS Rad-Hard Front-End Electronics for Precise Sensors Measurements

    NASA Astrophysics Data System (ADS)

    Sordo-Ibáñez, Samuel; Piñero-García, Blanca; Muñoz-Díaz, Manuel; Ragel-Morales, Antonio; Ceballos-Cáceres, Joaquín; Carranza-González, Luis; Espejo-Meana, Servando; Arias-Drake, Alberto; Ramos-Martos, Juan; Mora-Gutiérrez, José Miguel; Lagos-Florido, Miguel Angel

    2016-08-01

    This paper reports a single-chip solution for the implementation of radiation-tolerant CMOS front-end electronics (FEE) for applications requiring the acquisition of base-band sensor signals. The FEE has been designed in a 0.35μm CMOS process, and implements a set of parallel conversion channels with high levels of configurability to adapt the resolution, conversion rate, as well as the dynamic input range for the required application. Each conversion channel has been designed with a fully-differential implementation of a configurable-gain instrumentation amplifier, followed by an also configurable dual-slope ADC (DS ADC) up to 16 bits. The ASIC also incorporates precise thermal monitoring, sensor conditioning and error detection functionalities to ensure proper operation in extreme environments. Experimental results confirm that the proposed topologies, in conjunction with the applied radiation-hardening techniques, are reliable enough to be used without loss in the performance in environments with an extended temperature range (between -25 and 125 °C) and a total dose beyond 300 krad.

  17. An Inductively-Powered Wireless Neural Recording System with a Charge Sampling Analog Front-End

    PubMed Central

    Lee, Seung Bae; Lee, Byunghun; Kiani, Mehdi; Mahmoudi, Babak; Gross, Robert; Ghovanloo, Maysam

    2015-01-01

    An inductively-powered wireless integrated neural recording system (WINeR-7) is presented for wireless and battery less neural recording from freely-behaving animal subjects inside a wirelessly-powered standard homecage. The WINeR-7 system employs a novel wide-swing dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which performs amplification, filtering, sampling, and analog-to-time conversion (ATC) with minimal interference and small amount of power. The output of the DSCS-AFE produces a pseudo-digital pulse width modulated (PWM) signal. A circular shift register (CSR) time division multiplexes (TDM) the PWM pulses to create a TDM-PWM signal, which is fed into an on-chip 915 MHz transmitter (Tx). The AFE and Tx are supplied at 1.8 V and 4.2 V, respectively, by a power management block, which includes a high efficiency active rectifier and automatic resonance tuning (ART), operating at 13.56 MHz. The 8-ch system-on-a-chip (SoC) was fabricated in a 0.35-μm CMOS process, occupying 5.0 × 2.5 mm2 and consumed 51.4 mW. For each channel, the sampling rate is 21.48 kHz and the power consumption is 19.3 μW. In vivo experiments were conducted on freely behaving rats in an energized homecage by continuously delivering 51.4 mW to the WINeR-7 system in a closed-loop fashion and recording local field potentials (LFP). PMID:27069422

  18. An Inductively-Powered Wireless Neural Recording System with a Charge Sampling Analog Front-End.

    PubMed

    Lee, Seung Bae; Lee, Byunghun; Kiani, Mehdi; Mahmoudi, Babak; Gross, Robert; Ghovanloo, Maysam

    2016-01-15

    An inductively-powered wireless integrated neural recording system (WINeR-7) is presented for wireless and battery less neural recording from freely-behaving animal subjects inside a wirelessly-powered standard homecage. The WINeR-7 system employs a novel wide-swing dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which performs amplification, filtering, sampling, and analog-to-time conversion (ATC) with minimal interference and small amount of power. The output of the DSCS-AFE produces a pseudo-digital pulse width modulated (PWM) signal. A circular shift register (CSR) time division multiplexes (TDM) the PWM pulses to create a TDM-PWM signal, which is fed into an on-chip 915 MHz transmitter (Tx). The AFE and Tx are supplied at 1.8 V and 4.2 V, respectively, by a power management block, which includes a high efficiency active rectifier and automatic resonance tuning (ART), operating at 13.56 MHz. The 8-ch system-on-a-chip (SoC) was fabricated in a 0.35-μm CMOS process, occupying 5.0 × 2.5 mm 2 and consumed 51.4 mW. For each channel, the sampling rate is 21.48 kHz and the power consumption is 19.3 μW. In vivo experiments were conducted on freely behaving rats in an energized homecage by continuously delivering 51.4 mW to the WINeR-7 system in a closed-loop fashion and recording local field potentials (LFP).

  19. Front-end ASICs for high-energy astrophysics in space

    NASA Astrophysics Data System (ADS)

    Gevin, O.; Limousin, O.; Meuris, A.

    2016-07-01

    In most of embedded imaging systems for space applications, high granularity and increasing size of focal planes justify an almost systematic use of integrated circuits. . To fulfill challenging requirements for excellent spatial and energy resolution, integrated circuits must fit the sensors perfectly and interface the system such a way to optimize simultaneously noise, geometry and architecture. Moreover, very low power consumption and radiation tolerance are mandatory to envision a use onboard a payload in space. Consequently, being part of an optimized detection system for space, the integrated circuit is specifically designed for each application and becomes an Application Specific Integrated Circuits (ASIC). The paper focuses on mixed analog and digital signal ASICs for spectro-imaging systems in the keVMeV energy band. The first part of the paper summarizes the main advantages conferred by the use of front-end ASICs for highenergy astrophysics instruments in space mission. Space qualification of ASICs requires the chip to be radiation hard. The paper will shortly describe some of the typical hardening techniques and give some guidelines that an ASIC designer should follow to choose the most efficient technology for his project. The first task of the front-end electronics is to convert the charge coming from the detector into a voltage. For most of the Silicon detectors (CCD, DEPFET, SDD) this is conversion happens in the detector itself. For other sensor materials, charge preamplifiers operate the conversion. The paper shortly describes the different key parameters of charge preamplifiers and the binding parameters for the design. Filtering is generally mandatory in order to increase the signal to noise ratio or to reduce the duration of the signal. After a brief review on the main noise sources, the paper reviews noise-filtering techniques that are commonly used in Integrated circuits designs. The way sensors and ASICs are interconnected together plays a

  20. SYRMEP front-end and read-out electronics

    NASA Astrophysics Data System (ADS)

    Arfelli, F.; Bonvicini, V.; Bravin, A.; Cantatore, G.; Castelli, E.; Cristaudo, P.; Di Michiel, M.; Longo, R.; Olivo, A.; Pani, S.; Pontoni, D.; Poropat, P.; Prest, M.; Rashevsky, A.; Tomasini, F.; Tromba, G.; Vacchi, A.; Vallazza, E.

    1998-02-01

    The SYRMEP approach to digital mammography implies the use of a monochromatic X-ray beam from a synchrotron source and a slot of superimposed silicon microstrip detectors as a scanning image receptor. The microstrips are read by 32-channel chips mounted on 7-layer hybrid circuits which receive control signals and operating voltages from a MASTER-SLAVE configuration of cards. The MASTER card is driven by the CIRM, a dedicated CAMAC module whose timing function can be easily excluded to obtain data-storage-only units connected to different MASTERs: this second-level modular expansion capability fully achieves the tasks of an electronics system able to follow the SYRMEP detector growth till the final size of seven thousands of channels.

  1. Performance evaluation of the analogue front-end and ADC prototypes for the Gotthard-II development

    NASA Astrophysics Data System (ADS)

    Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.

    2017-12-01

    Gotthard-II is a silicon microstrip detector developed for the European X-ray Free-Electron Laser (XFEL.EU). Its potential scientific applications include X-ray absorption/emission spectroscopy, hard X-ray high resolution single-shot spectrometry (HiREX), energy dispersive experiments at 4.5 MHz frame rate, beam diagnostics, as well as veto signal generation for pixel detectors. Gotthard-II uses a silicon microstrip sensor with a pitch of 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to readout chips (ROCs). In the ROC, an adaptive gain switching pre-amplifier (PRE), a fully differential Correlated-Double-Sampling (CDS) stage, an Analog-to-Digital Converter (ADC) as well as a Static Random-Access Memory (SRAM) capable of storing all the 2700 images in an XFEL.EU bunch train will be implemented. Several prototypes with different designs of the analogue front-end (PRE and CDS) and ADC test structures have been fabricated in UMC-110 nm CMOS technology and their performance has been evaluated. In this paper, the performance of the analogue front-end and ADC will be summarized.

  2. 2.5 Gbit/s Optical Receiver Front-End Circuit with High Sensitivity and Wide Dynamic Range

    NASA Astrophysics Data System (ADS)

    Zhu, Tiezhu; Mo, Taishan; Ye, Tianchun

    2017-12-01

    An optical receiver front-end circuit is designed for passive optical network and fabricated in a 0.18 um CMOS technology. The whole circuit consists of a transimpedance amplifier (TIA), a single-ended to differential amplifier and an output driver. The TIA employs a cascode stage as the input stage and auxiliary amplifier to reduce the miller effect. Current injecting technique is employed to enlarge the input transistor's transconductance, optimize the noise performance and overcome the lack of voltage headroom. To achieve a wide dynamic range, an automatic gain control circuit with self-adaptive function is proposed. Experiment results show an optical sensitivity of -28 dBm for a bit error rate of 10-10 at 2.5 Gbit/s and a maxim input optical power of 2 dBm using an external photodiode. The chip occupies an area of 1×0.9 mm2 and consumes around 30 mW from single 1.8 V supply. The front-end circuit can be used in various optical receivers.

  3. A SAR-ADC using unit bridge capacitor and with calibration for the front-end electronics of PET imaging

    NASA Astrophysics Data System (ADS)

    Liu, Wei; Wei, Tingcun; Li, Bo; Yang, Lifeng; Xue, Feifei; Hu, Yongcai

    2016-05-01

    This paper presents a 12-bit 1 MS/s successive approximation register-analog to digital converter (SAR-ADC) for the 32-channel front-end electronics of CZT-based PET imaging system. To reduce the capacitance mismatch, instead of the fractional capacitor, the unit capacitor is used as the bridge capacitor in the split-capacitor digital to analog converter (DAC) circuit. In addition, in order to eliminate the periodical DNL errors of -1 LSB which often exists in the SAR-ADC using the charge-redistributed DAC, a calibration algorithm is proposed and verified by the experiments. The proposed 12-bit 1 MS/s SAR-ADC is designed and implemented using a 0.35 μm CMOS technology, it occupies only an active area of 986×956 μm2. The measurement results show that, at the power supply of 3.3/5.0 V and the sampling rate of 1 MS/s, the ADC with calibration has a signal-to-noise-and-distortion ratio (SINAD) of 67.98 dB, the power dissipation of 5 mW, and a figure of merit (FOM) of 2.44 pJ/conv.-step. This ADC is with the features of high accuracy, low power and small layout area, it is especially suitable to the one-chip integration of the front-end readout electronics.

  4. The Parkes front-end controller and noise-adding radiometer

    NASA Technical Reports Server (NTRS)

    Brunzie, T. J.

    1990-01-01

    A new front-end controller (FEC) was installed on the 64-m antenna in Parkes, Australia, to support the 1989 Voyager 2 Neptune encounter. The FEC was added to automate operation of the front-end microwave hardware as part of the Deep Space Network's Parkes-Canberra Telemetry Array. Much of the front-end hardware was refurbished and reimplemented from a front-end system installed in 1985 by the European Space Agency for the Uranus encounter; however, the FEC and its associated noise-adding radiometer (NAR) were new Jet Propulsion Laboratory (JPL) designs. Project requirements and other factors led to the development of capabilities not found in standard Deep Space Network (DSN) controllers and radiometers. The Parkes FEC/NAR performed satisfactorily throughout the Neptune encounter and was removed in October 1989.

  5. Multiphysical FE-analysis of a front-end bending phenomenon in a hot strip mill

    NASA Astrophysics Data System (ADS)

    Ilmola, Joonas; Seppälä, Oskari; Leinonen, Olli; Pohjonen, Aarne; Larkiola, Jari; Jokisaari, Juha; Putaansuu, Eero

    2018-05-01

    In hot steel rolling processes, a slab is generally rolled to a transfer bar in a roughing process and to a strip in a hot strip rolling process. Over several rolling passes the front-end may bend upward or downward due to asymmetrical rolling conditions causing entry problems in the next rolling pass. Many different factors may affect the front-end bending phenomenon and are very challenging to measure. Thus, a customized finite element model is designed and built to simulate the front-end bending phenomenon in a hot strip rolling process. To simulate the functioning of the hot strip mill precisely, automated controlling logic of the mill must be considered. In this paper we studied the effect of roll bite friction conditions and amount of reduction on the front-end bending phenomenon in a hot strip rolling process.

  6. Ultrahigh Frequency Nanomechanical Piezoresistive Amplifiers for Direct Channel-Selective Receiver Front-Ends.

    PubMed

    Ramezany, Alireza; Pourkamali, Siavash

    2018-04-11

    Channel-selective filtering and amplification in ultrahigh frequency (UHF) receiver front-ends are crucial for realization of cognitive radio systems and the future of wireless communication. In the past decade, there have been significant advances in the performance of microscale electromechanical resonant devices. However, such devices have not yet been able to meet the requirements for direct channel selection at RF. They also occupy a relatively large area on the chip making implementation of large arrays to cover several frequency bands challenging. On the other hand, electromechanical piezoresistive resonant devices are active devices that have recently shown the possibility of simultaneous signal amplification and channel-select filtering at lower frequencies. It has been theoretically predicted that if scaled down into the nanoscale, they can operate in the UHF range with a very low power consumption. Here, for the first time nanomechanical piezoresistive amplifiers with active element dimensions as small as 50 nm × 200 nm are demonstrated. With a device area of less than 1.5 μm 2 a piezoresistive amplifier operating at 730 MHz shows effective quality factor ( Q) of 89,000 for a 50Ω load and gains as high as 10 dB and Q of 330,000 for a 250Ω load while consuming 189 μW of power. On the basis of the measurement results, it is shown that for piezoresistor dimensions of 30 nm × 100 nm it is possible to get a similar performance at 2.4 GHz with device footprint of less than 0.2 μm 2 .

  7. A 0.09 μW low power front-end biopotential amplifier for biosignal recording.

    PubMed

    Tseng, Yuhwai; Ho, Yingchieh; Kao, Shuoting; Su, Chauchin

    2012-10-01

    This work presents a biopotential front-end amplifier in which the MOS transistors are biased in subthreshold region with a supply voltage and current of 0.4-0.8 V and 0.23-1.86 μA, respectively, to reduce the system power. Flicker noise is then removed using a chopping technique, and differential interference produced by electrode impedance imbalance is suppressed using a Gm-C filter. Additionally, the circuit is fabricated using TSMC 0.18 μm CMOS technology with a core area of 0.77 × 0.36 mm². With a minimum supply voltage of 0.4 V, the measured SNR and power consumption of the proposed IC chip are 54.1 dB and 0.09μW, respectively.

  8. An 8.4-GHz dual-maser front-end system for Parkes reimplementation

    NASA Technical Reports Server (NTRS)

    Trowbridge, D. L.; Loreman, J. R.; Brunzie, T. J.; Quinn, R.

    1990-01-01

    An 8.4-GHz front-end system consisting of a feedhorn, a waveguide feed assembly, dual masers, and downconverters was reimplemented at Parkes as part of the Parkes Canberra Telemetry Array for the Voyager Neptune encounter. The front-end system was originally assembled by the European Space Agency and installed on the Parkes antenna for the Giotto project. It was also used on a time-sharing basis by the Deep Space Network as part of the Parkes Canberra Telemetry Array to enhance the data return from the Voyager Uranus encounter. At the conclusion of these projects in 1986, part of the system was then shipped to JPL on loan for reimplementation at Parkes for the Voyager Neptune encounter. New design and implementation required to make the system operable at Parkes included new microwave front-end control cabinets, closed-cycle refrigeration monitor system, noise-adding radiometer system, front-end controller assembly, X81 local oscillator multiplier, and refurbishment of the original dual 8.4-GHz traveling-wave masers and waveguide feed system. The front-end system met all requirements during the encounter and was disassembled in October 1989 and returned to JPL.

  9. Front-end electronics and DAQ for the EURITRACK tagged neutron inspection system

    NASA Astrophysics Data System (ADS)

    Lunardon, M.; Bottosso, C.; Fabris, D.; Moretto, S.; Nebbia, G.; Pesente, S.; Viesti, G.; Bigongiari, A.; Colonna, A.; Tintori, C.; Valkovic, V.; Sudac, D.; Peerani, P.; Sequeira, V.; Salvato, M.

    2007-08-01

    The EURopean Illicit TRAfficing Countermeasures Kit (EURITRACK) Front-End and Data Acquisition System is a compact set of VME boards interfaced with a standard PC. The system is part of a cargo container inspection portal based on the tagged neutrons technique. The front-end processes all detector signals and checks coincidences between any of the 64 pixels of the alpha particle detector and any gamma-ray signals in 22 NaI(Tl) scintillators. The system is capable of handling the data flow at neutron flux up to the portal limiting value of 108 neutrons/second. Some typical applications are presented.

  10. Understanding and addressing racial/ethnic disproportionality in the front end of the child welfare system.

    PubMed

    Osterling, Kathy Lemon; D'Andrade, Amy; Austin, Michael J

    2008-01-01

    Racial/ethnic disproportionality in the child welfare system is a complicated social problem that is receiving increasing amounts of attention from researchers and practitioners. This review of the literature examines disproportionality in the front-end of the child welfare system and interventions that may address it. While none of the interventions had evidence suggesting that they reduced disproportionality in child welfare front-end processes, some of the interventions may improve child welfare case processes related to disproportionality and outcomes for families of color.

  11. Design of a Multichannel Low-Noise Front-End Readout ASIC Dedicated to CZT Detectors for PET Imaging

    NASA Astrophysics Data System (ADS)

    Gao, W.; Liu, H.; Gan, B.; Wei, T.; Gao, D.; Hu, Y.

    2014-10-01

    In this paper, we present the design and preliminary results of a novel low-noise front-end readout application-specific integrated circuit (ASIC) for a PET imaging system whose objective is to achieve the following performances: the spatial resolution of 1 mm3, the detection efficiency of 15% and the time resolution of 1 ns. A cascode amplifier based on the PMOS input transistor is selected to realize the charge-sensitive amplifier (CSA) for the sake of good noise performances. The output of the CSA is split into two branches. One is connected to a slow shaper for energy measurements. The other is connected to a fast shaper for time acquisition. A novel monostable circuits is designed to adjust the time delay of the trigger signals so that the peak value of the shaped voltages can be sampled and stored. An eight-channel front-end readout prototype chip is designed and implemented in 0.35 μm CMOS process. The die size is 2.286 mm ×2.282 mm. The input range of the ASIC is from 2000 e- to 180000 e-, reflecting to the energy level of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 mV/fC. The tested result of ENC is 86.5 e- at zero farad plus 9.3 e- per picofarad. The nonlinearity is less than 3%. The crosstalk is less than 2%. The power dissipation is about 3 mW/channel.

  12. IMOTEPAD: A mixed-signal 64-channel front-end ASIC for small-animal PET imaging

    NASA Astrophysics Data System (ADS)

    Fang, Xiaochao; Ollivier-Henry, Nicolas; Gao, Wu; Hu-Guo, Christine; Colledani, Claude; Humbert, Bernard; Brasse, David; Hu, Yann

    2011-04-01

    This paper presents the design and characteristics of a mixed-signal 64-channel front-end readout ASIC called IMOTEPAD dedicated to multi-channel plate (MCP) photodetector coupled to LYSO scintillating crystals for small-animal PET imaging. In our configuration, the crystals are oriented in the axial direction readout on both sides by individual photodetector channels allowing the spatial resolution and the detection efficiency to be independent of each other. As a result, both energy signals and timing triggers from the photodetectors are required to be read out by the front-end ASIC. This dedicated ASIC IMOTEPAD comprises two parts: the analog part IMOTEPA and the digital part IMOTEPD. The IMOTEPA is dedicated to energy measurement. And the timing information is digitized by the IMOTEPD in which the key principal element is a time-to-digital converter (TDC) based on a delay-locked loop (DLL) with 32 delay cells. The chip is designed and fabricated in 0.35 μm CMOS process. The measurements show that for the analog part IMOTEPA, the energy gain is 13.1 mV/pC while the peak time of a CR-RC pulse shaper is 280 ns. The SNR is 39 dB and the RMS noise is 300 μV. The nonlinearity is less than 3%. The crosstalk is less than 0.2%. For the IMOTEPD, the bin size of the TDC is 625 ps with a reference clock of 50 MHz. The RMS jitter of the DLL is less than 42 ps. The DNL of the TDC is equal to about 0.17 LSB and the INL is equal to 0.31 LSB. The power dissipation of each channel is less than 16.8 mW. The design of the ASIC, especially for TDC and the measurement results of the IMOTEPAD will be presented and discussed in this paper.

  13. Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

    NASA Astrophysics Data System (ADS)

    Prele, D.

    2015-08-01

    As we have seen for digital camera market and a sensor resolution increasing to "megapixels", all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, "simple" and "efficient" techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described.

  14. Testing and Feedback Effects on Front-End Control over Later Retrieval

    ERIC Educational Resources Information Center

    Thomas, Ruthann C.; McDaniel, Mark A.

    2013-01-01

    In 2 experiments, we explored differences in cognitive control at retrieval on a final test to better understand the mechanisms underlying the powerful boost in recall of previously tested information. Memory retrieval can be enhanced by front-end control processes that regulate the scope of retrieval or by later processes that monitor retrieval…

  15. 40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... (b)(2): (i) For an incinerator or non-combustion control device, the percent reduction of organic HAP... the process vent stream is introduced with combustion air or is used as a secondary fuel and is not... combustion device to control halogenated batch front-end process vents or halogenated aggregate batch vent...

  16. Extracting whole short rotation trees with a skidder and a front-end loader

    Treesearch

    R. Spinelli; B.R. Hartsough

    2001-01-01

    We time-studied a Caterpillar 950F front-end loader and a Caterpillar 528 grapple skidder used to extract bunched whole trees to a landing in a short rotation Eucalyptus plantation. The loader was 40-60% more productive than the grapple skidder, depending on extraction distance. Alternatively, the single loader could both extract trees and handle the landing duties,...

  17. Front-end Electronics for Unattended Measurement (FEUM). Prototype Test Plan

    SciTech Connect

    Conrad, Ryan C.; Morris, Scott J.; Smith, Leon E.

    2015-09-16

    The IAEA has requested that PNNL perform an initial set of tests on front-end electronics for unattended measurement (FEUM) prototypes. The FEUM prototype test plan details the tests to be performed, the criteria for evaluation, and the procedures used to execute the tests.

  18. Front-end electronics development for TPC detector in the MPD/NICA project

    NASA Astrophysics Data System (ADS)

    Cheremukhina, G.; Movchan, S.; Vereschagin, S.; Zaporozhets, S.

    2017-06-01

    The article is aimed at describing the development status, measuring results and design changes of the TPC front-end electronics. The TPC is placed in the middle of Multi-Purpose Detector (MPD) and provides tracing and identifying of charged particles in the pseudorapidity range |η| < 1.2. The readout system is one of the most complex parts of the TPC. The electronics of each readout chamber is an independent system. The whole system contains 95232 channels, 1488 64-channel—front-end cards (FEC), 24 readout control units (RCU). The front-end electronics (FEE) is based on ASICs, FPGAs and high-speed serial links. The concept of the TPC front-end electronics has been motivated from one side—by the requirements concerning the NICA accelerator complex which will operate at the luminosity up to 1027 cm-2 s-1 for Au79+ ions over the energy range of 4 < √SNN < 11 GeV with the trigger rate up to 7 kHz and from the other side—by the requirements of the 4-π geometry to minimize the substance on the end-caps of the TPC.

  19. User Consultation during the Fuzzy Front End: Evaluating Student's Design Outcomes

    ERIC Educational Resources Information Center

    Conradie, Peter; De Marez, Lieven; Saldien, Jelle

    2017-01-01

    In this paper we evaluate the involvement of a partially blind user as lead user in the early stages of a product redesign during an undergraduate product design-engineering course. Throughout the early stages of product design, or fuzzy front end, there is a high level of uncertainty. End users, with their increased contextual knowledge can play…

  20. A High Input Impedance Low Noise Integrated Front-End Amplifier for Neural Monitoring.

    PubMed

    Zhou, Zhijun; Warr, Paul A

    2016-12-01

    Within neural monitoring systems, the front-end amplifier forms the critical element for signal detection and pre-processing, which determines not only the fidelity of the biosignal, but also impacts power consumption and detector size. In this paper, a novel combined feedback loop-controlled approach is proposed to compensate for input leakage currents generated by low noise amplifiers when in integrated circuit form alongside signal leakage into the input bias network. This loop topology ensures the Front-End Amplifier (FEA) maintains a high input impedance across all manufacturing and operational variations. Measured results from a prototype manufactured on the AMS 0.35 [Formula: see text] CMOS technology is provided. This FEA consumes 3.1 [Formula: see text] in 0.042 [Formula: see text], achieves input impedance of 42 [Formula: see text], and 18.2 [Formula: see text] input-referred noise.

  1. All-Dielectric Photonic-Assisted Radio Front-End Technology

    NASA Astrophysics Data System (ADS)

    Ayazi, Hossein Ali

    The threats to civil society posed by high-power electromagnetic weapons are viewed as a grim but real possibility in the world after 11 September 2001. These weapons produce a power surge capable of destroying or damaging sensitive circuitry in electronic systems. Unfortunately, the trend towards circuits with smaller sizes and voltages renders modern electronics highly susceptible to such damage. Radiofrequency communication systems are particularly vulnerable, because the antenna provides a direct port of entry for electromagnetic radiation. In this work, we present a novel type of radiofrequency receiver front end featuring a complete absence of electronic circuitry and metal interconnects, the traditional 'soft spots' of a conventional radiofrequency receiver. The device exploits a dielectric resonator antenna to capture and deliver the radiofrequency signal onto a whispering-gallery mode electro-optic field sensor. The dielectric approach has an added benefit in that it reduces the physical size of the front end, an important benefit in mobile applications.

  2. Microwave integrated circuit radiometer front-ends for the Push Broom Microwave Radiometer

    NASA Technical Reports Server (NTRS)

    Harrington, R. F.; Hearn, C. P.

    1982-01-01

    Microwave integrated circuit front-ends for the L-band, S-band and C-band stepped frequency null-balanced noise-injection Dicke-switched radiometer to be installed in the NASA Langley airborne prototype Push Broom Microwave Radiometer (PBMR) are described. These front-ends were developed for the fixed frequency of 1.413 GHz and the variable frequencies of 1.8-2.8 GHz and 3.8-5.8 GHz. Measurements of the noise temperature of these units were made at 55.8 C, and the results of these tests are given. While the overall performance was reasonable, improvements need to be made in circuit losses and noise temperatures, which in the case of the C-band were from 1000 to 1850 K instead of the 500 K specified. Further development of the prototypes is underway to improve performance and extend the frequency range.

  3. Development of a front end controller/heap manager for PHENIX

    SciTech Connect

    Ericson, M.N.; Allen, M.D.; Musrock, M.S.

    1996-12-31

    A controller/heap manager has been designed for applicability to all detector subsystem types of PHENIX. the heap manager performs all functions associated with front end electronics control including ADC and analog memory control, data collection, command interpretation and execution, and data packet forming and communication. Interfaces to the unit consist of a timing and control bus, a serial bus, a parallel data bus, and a trigger interface. The topology developed is modular so that many functional blocks are identical for a number of subsystem types. Programmability is maximized through the use of flexible modular functions and implementation using field programmablemore » gate arrays (FPGAs). Details of unit design and functionality will be discussed with particular detail given to subsystems having analog memory-based front end electronics. In addition, mode control, serial functions, and FPGA implementation details will be presented.« less

  4. General-Purpose Front End for Real-Time Data Processing

    NASA Technical Reports Server (NTRS)

    James, Mark

    2007-01-01

    FRONTIER is a computer program that functions as a front end for any of a variety of other software of both the artificial intelligence (AI) and conventional data-processing types. As used here, front end signifies interface software needed for acquiring and preprocessing data and making the data available for analysis by the other software. FRONTIER is reusable in that it can be rapidly tailored to any such other software with minimum effort. Each component of FRONTIER is programmable and is executed in an embedded virtual machine. Each component can be reconfigured during execution. The virtual-machine implementation making FRONTIER independent of the type of computing hardware on which it is executed.

  5. Design of an Intelligent Front-End Signal Conditioning Circuit for IR Sensors

    NASA Astrophysics Data System (ADS)

    de Arcas, G.; Ruiz, M.; Lopez, J. M.; Gutierrez, R.; Villamayor, V.; Gomez, L.; Montojo, Mª. T.

    2008-02-01

    This paper presents the design of an intelligent front-end signal conditioning system for IR sensors. The system has been developed as an interface between a PbSe IR sensor matrix and a TMS320C67x digital signal processor. The system architecture ensures its scalability so it can be used for sensors with different matrix sizes. It includes an integrator based signal conditioning circuit, a data acquisition converter block, and a FPGA based advanced control block that permits including high level image preprocessing routines such as faulty pixel detection and sensor calibration in the signal conditioning front-end. During the design phase virtual instrumentation technologies proved to be a very valuable tool for prototyping when choosing the best A/D converter type for the application. Development time was significantly reduced due to the use of this technology.

  6. Development and Demonstration of a Magnesium-Intensive Vehicle Front-End Substructure

    SciTech Connect

    Logan, Stephen D.; Forsmark, Joy H.; Osborne, Richard

    2016-07-01

    This project is the final phase (designated Phase III) of an extensive, nine-year effort with the objectives of developing a knowledge base and enabling technologies for the design, fabrication and performance evaluation of magnesium-intensive automotive front-end substructures intended to partially or completely replace all-steel comparators, providing a weight savings approaching 50% of the baseline. Benefits of extensive vehicle weight reduction in terms of fuel economy increase, extended vehicle range, vehicle performance and commensurate reductions in greenhouse gas emissions are well known. An exemplary vehicle substructure considered by the project is illustrated in Figure 1, along with the exterior vehicle appearance.more » This unibody front-end “substructure” is one physical objective of the ultimate design and engineering aspects established at the outset of the larger collective effort.« less

  7. Beamline front end for in-vacuum short period undulator at the photon factory storage ring

    SciTech Connect

    Miyauchi, Hiroshi, E-mail: hiroshi.miyauchi@kek.jp; Department of Accelerator Science, School of High Energy Accelerator Science, SOKENDAI; Tahara, Toshihiro, E-mail: ttahara@post.kek.jp

    The straight-section upgrade project of the Photon Factory created four new short straight sections capable of housing in-vacuum short period undulators. The first to fourth short period undulators SGU#17, SGU#03, SGU#01 and SGU#15 were installed at the 2.5-GeV Photon Factory storage ring in 2005, 2006, 2009 and 2013, respectively. The beamline front end for SGU#15 is described in this paper.

  8. A front-end automation tool supporting design, verification and reuse of SOC.

    PubMed

    Yan, Xiao-lang; Yu, Long-li; Wang, Jie-bing

    2004-09-01

    This paper describes an in-house developed language tool called VPerl used in developing a 250 MHz 32-bit high-performance low power embedded CPU core. The authors showed that use of this tool can compress the Verilog code by more than a factor of 5, increase the efficiency of the front-end design, reduce the bug rate significantly. This tool can be used to enhance the reusability of an intellectual property model, and facilitate porting design for different platforms.

  9. Low-noise front-end electronics for detection of intermediate-frequency weak light signals

    NASA Astrophysics Data System (ADS)

    Lin, Cunbao; Yan, Shuhua; Du, Zhiguang; Wei, Chunhua; Wang, Guochao

    2015-02-01

    A novel low-noise front-end electronics was proposed for detection of light signals with intensity about 10 μW and frequency above 2.7 MHz. The direct current (DC) power supply, pre-amplifier and main-amplifier were first designed, simulated and then realized. Small-size components were used to make the power supply small, and the pre-amplifier and main-amplifier were the least capacitors to avoid the phase shift of the signals. The performance of the developed front-end electronics was verified in cross-grating diffraction experiments. The results indicated that the output peak-topeak noise of the +/-5 V DC power supply was about 2 mV, and the total output current was 1.25 A. The signal-to-noise ratio (SNR) of the output signal of the pre-amplifier was about 50 dB, and it increased to nearly 60 dB after the mainamplifier, which means this front-end electronics was especially suitable for using in the phase-sensitive and integrated precision measurement systems.

  10. 45 Gb/s low complexity optical front-end for soft-decision LDPC decoders.

    PubMed

    Sakib, Meer Nazmus; Moayedi, Monireh; Gross, Warren J; Liboiron-Ladouceur, Odile

    2012-07-30

    In this paper a low complexity and energy efficient 45 Gb/s soft-decision optical front-end to be used with soft-decision low-density parity-check (LDPC) decoders is demonstrated. The results show that the optical front-end exhibits a net coding gain of 7.06 and 9.62 dB for post forward error correction bit error rate of 10(-7) and 10(-12) for long block length LDPC(32768,26803) code. The performance over a hard decision front-end is 1.9 dB for this code. It is shown that the soft-decision circuit can also be used as a 2-bit flash type analog-to-digital converter (ADC), in conjunction with equalization schemes. At bit rate of 15 Gb/s using RS(255,239), LDPC(672,336), (672, 504), (672, 588), and (1440, 1344) used with a 6-tap finite impulse response (FIR) equalizer will result in optical power savings of 3, 5, 7, 9.5 and 10.5 dB, respectively. The 2-bit flash ADC consumes only 2.71 W at 32 GSamples/s. At 45 GSamples/s the power consumption is estimated to be 4.95 W.

  11. Prohibitin, relocated to the front ends, can control the migration directionality of colorectal cancer cells

    PubMed Central

    Guo, Li-Li; Hu, Chun-Ting; Huang, Ying-Xin; Huang, Guan; Jing, Fang-Yan; Liu, Chao; Li, Zhuo-Yi; Zhou, Na; Yan, Qian-Wen; Lei, Yan; Zhu, Shi-Jie; Cheng, Zhi-Qiang; Cao, Guang-Wen; Deng, Yong-Jian; Ding, Yan-Qing

    2017-01-01

    Directional migration is a cost-effective movement allowing invasion and metastatic spread of cancer cells. Although migration related to cytoskeletal assembly and microenvironmental chemotaxis has been elucidated, little is known about interaction between extracellular and intracellular molecules for controlling the migrational directionality. A polarized expression of prohibitin (PHB) in the front ends of CRC cells favors metastasis and is correlated with poor prognosis for 545 CRC patients. A high level of vascular endothelial growth factor (VEGF) in the interstitial tissue of CRC patients is associated with metastasis. VEGF bound to its receptor, neuropilin-1, can stimulate the activation of cell division cycle 42, which recruits intra-mitochondrial PHB to the front end of a CRC cell. This intracellular relocation of PHB results in the polymerization and reorganization of filament actin extending to the front end of the cell. As a result, the migration directionality of CRC cells is targeted towards VEGF. Together, these findings identify PHB as a key modulator of directional migration of CRC cells and a target for metastasis. PMID:29100316

  12. Reviewed approach to defining the Active Interlock Envelope for Front End ray tracing

    SciTech Connect

    Seletskiy, S.; Shaftan, T.

    To protect the NSLS-II Storage Ring (SR) components from damage from synchrotron radiation produced by insertion devices (IDs) the Active Interlock (AI) keeps electron beam within some safe envelope (a.k.a Active Interlock Envelope or AIE) in the transverse phase space. The beamline Front Ends (FEs) are designed under assumption that above certain beam current (typically 2 mA) the ID synchrotron radiation (IDSR) fan is produced by the interlocked e-beam. These assumptions also define how the ray tracing for FE is done. To simplify the FE ray tracing for typical uncanted ID it was decided to provide the Mechanical Engineering groupmore » with a single set of numbers (x,x’,y,y’) for the AIE at the center of the long (or short) ID straight section. Such unified approach to the design of the beamline Front Ends will accelerate the design process and save valuable human resources. In this paper we describe our new approach to defining the AI envelope and provide the resulting numbers required for design of the typical Front End.« less

  13. FBI Fingerprint Image Capture System High-Speed-Front-End throughput modeling

    SciTech Connect

    Rathke, P.M.

    1993-09-01

    The Federal Bureau of Investigation (FBI) has undertaken a major modernization effort called the Integrated Automated Fingerprint Identification System (IAFISS). This system will provide centralized identification services using automated fingerprint, subject descriptor, mugshot, and document processing. A high-speed Fingerprint Image Capture System (FICS) is under development as part of the IAFIS program. The FICS will capture digital and microfilm images of FBI fingerprint cards for input into a central database. One FICS design supports two front-end scanning subsystems, known as the High-Speed-Front-End (HSFE) and Low-Speed-Front-End, to supply image data to a common data processing subsystem. The production rate of themore » HSFE is critical to meeting the FBI`s fingerprint card processing schedule. A model of the HSFE has been developed to help identify the issues driving the production rate, assist in the development of component specifications, and guide the evolution of an operations plan. A description of the model development is given, the assumptions are presented, and some HSFE throughput analysis is performed.« less

  14. CMOS Ultralow Power Brain Signal Acquisition Front-Ends: Design and Human Testing.

    PubMed

    Karimi-Bidhendi, Alireza; Malekzadeh-Arasteh, Omid; Lee, Mao-Cheng; McCrimmon, Colin M; Wang, Po T; Mahajan, Akshay; Liu, Charles Yu; Nenadic, Zoran; Do, An H; Heydari, Payam

    2017-08-01

    Two brain signal acquisition (BSA) front-ends incorporating two CMOS ultralow power, low-noise amplifier arrays and serializers operating in mosfet weak inversion region are presented. To boost the amplifier's gain for a given current budget, cross-coupled-pair active load topology is used in the first stages of these two amplifiers. These two BSA front-ends are fabricated in 130 and 180 nm CMOS processes, occupying 5.45 mm 2 and 0.352 mm 2 of die areas, respectively (excluding pad rings). The CMOS 130-nm amplifier array is comprised of 64 elements, where each amplifier element consumes 0.216 μW from 0.4 V supply, has input-referred noise voltage (IRNoise) of 2.19 μV[Formula: see text] corresponding to a power efficiency factor (PEF) of 11.7, and occupies 0.044 mm 2 of die area. The CMOS 180 nm amplifier array employs 4 elements, where each element consumes 0.69 μW from 0.6 V supply with IRNoise of 2.3 μV[Formula: see text] (corresponding to a PEF of 31.3) and 0.051 mm 2 of die area. Noninvasive electroencephalographic and invasive electrocorticographic signals were recorded real time directly on able-bodied human subjects, showing feasibility of using these analog front-ends for future fully implantable BSA and brain- computer interface systems.

  15. The new front-end electronics for the ATLAS Tile Calorimeter Phase 2 Upgrade

    NASA Astrophysics Data System (ADS)

    Gomes, A.

    2016-02-01

    We present the plans, design, and performance results to date for the new front-end electronics being developed for the Phase 2 Upgrade of the ATLAS Tile Calorimeter. The front-end electronics will be replaced to address the increased luminosity at the HL-LHC around 2025, as well as to upgrade to faster, more modern components with higher radiation tolerance. The new electronics will operate dead-timelessly, pushing full data sets from each beam crossing to the data acquisition system that resides off-detector. The new on-detector electronics contains five main parts: the front-end boards that connect directly to the photomultiplier tubes; the Main Boards that digitize the data; the Daughter Boards that collect the data streams and contain the high speed optical communication links for writing data to the data acquisition system; a programmable high voltage control system; and a new low voltage power supply. There are different options for implementing these subcomponents, which will be described. The new system contains new features that in the current version include power system redundancy, data collection redundancy, data transmission redundancy with 2 QSFP optical transceivers and Kintex-7 FPGAs with firmware enhanced scheme for single event upset mitigation. To date, we have built a Demonstrator—a fully functional prototype of the new system. Performance results and plans are presented.

  16. An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit.

    PubMed

    Tao Tang; Wang Ling Goh; Lei Yao; Jia Hao Cheong; Yuan Gao

    2017-07-01

    This paper describes an integrated multichannel neural recording analog front end (AFE) with a novel area-efficient driven right leg (DRL) circuit to improve the system common mode rejection ratio (CMRR). The proposed AFE consists of an AC-coupled low-noise programmable-gain amplifier, an area-efficient DRL block and a 10-bit SAR ADC. Compared to conventional DRL circuit, the proposed capacitor-less DRL design achieves 90% chip area reduction with enhanced CMRR performance, making it ideal for multichannel biomedical recording applications. The AFE circuit has been designed in a standard 0.18-μm CMOS process. Post-layout simulation results show that the AFE provides two gain settings of 54dB/60dB while consuming 1 μA per channel under a supply voltage of 1 V. The input-referred noise of the AFE integrated from 1 Hz to 10k Hz is only 4 μVrms and the CMRR is 110 dB.

  17. A Simulation of the Front End Signal Digitization for the ATLAS Muon Spectrometer thin RPC trigger upgrade project

    NASA Astrophysics Data System (ADS)

    Meng, Xiangting; Chapman, John; Levin, Daniel; Dai, Tiesheng; Zhu, Junjie; Zhou, Bing; Um Atlas Group Team

    2016-03-01

    The ATLAS Muon Spectrometer Phase-I (and Phase-II) upgrade includes the BIS78 muon trigger detector project: two sets of eight very thin Resistive Place Chambers (tRPCs) combined with small Monitored Drift Tube (MDT) chambers in the pseudorapidity region 1<| η|<1.3. The tRPCs will be comprised of triplet readout layer in each of the eta and azimuthal phi coordinates, with about 400 readout strips per layer. The anticipated hit rate is 100-200 kHz per strip. Digitization of the strip signals will be done by 32-channel CERN HPTDC chips. The HPTDC is a highly configurable ASIC designed by the CERN Microelectronics group. It can work in both trigger and trigger-less modes, be readout in parallel or serially. For Phase-I operation, a stringent latency requirement of 43 bunch crossings (1075 ns) is imposed. The latency budget for the front end digitization must be kept to a minimal value, ideally less than 350 ns. We conducted detailed HPTDC latency simulations using the Behavioral Verilog code from the CERN group. We will report the results of these simulations run for the anticipated detector operating environment and for various HPTDC configurations.

  18. Linearity enhancement design of a 16-channel low-noise front-end readout ASIC for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Zeng, Huiming; Wei, Tingcun; Wang, Jia

    2017-03-01

    A 16-channel front-end readout application-specific integrated circuit (ASIC) with linearity enhancement design for cadmium zinc telluride (CdZnTe) detectors is presented in this paper. The resistors in the slow shaper are realized using a high-Z circuit to obtain constant resistance value instead of using only a metal-oxide-semiconductor (MOS) transistor, thus the shaping time of the slow shaper can be kept constant for different amounts of input energies. As a result, the linearity of conversion gain is improved significantly. The ASIC was designed and fabricated in a 0.35 μm CMOS process with a die size of 2.60 mm×3.53 mm. The tested results show that a typical channel provides an equivalent noise charge (ENC) of 109.7e-+16.3e-/pF with a power consumption of 4 mW and achieves a conversion gain of 87 mV/fC with a nonlinearity of <0.4%. The linearity of conversion gain is improved by at least 86.6% as compared with the traditional approaches using the same front-end readout architecture and manufacture process. Moreover, the inconsistency among channels is <0.3%. An energy resolution of 2.975 keV (FWHM) for gamma rays of 59.5 keV was measured by connecting the ASIC to a 5 mm×5 mm ×2 mm CdZnTe detector at room temperature. The front-end readout ASIC presented in this paper achieves an outstanding linearity performance without compromising the noise, power consumption, and chip size performances.

  19. Design and simulation of front end power converter for a microgrid with fuel cells and solar power sources

    NASA Astrophysics Data System (ADS)

    Jeevargi, Chetankumar; Lodhi, Anuj; Sateeshkumar, Allu; Elangovan, D.; Arunkumar, G.

    2017-11-01

    The need for Renewable Energy Sources (RES) is increasing due to increased demand for the supply of power and it is also environment friendly.In the recent few years, the cost of generation of the power from the RES has been decreased. This paper aims to design the front end power converter which is required for integrating the fuel cells and solar power sources to the micro grid. The simulation of the designed front end converter is carried out in the PSIM 9.1.1 software. The results show that the designed front end power converter is sufficient for integrating the micro grid with fuel cells and solar power sources.

  20. First test results from the Front-End Board with Cyclone V as a test high-resolution platform for the Auger-Beyond-2015 Front End Electronics

    SciTech Connect

    Szadkowski, Zbigniew

    2015-07-01

    The paper presents the first results from the Front- End Board (FEB) with the biggest Cyclone{sup R} V E FPGA 5CEFA9F31I7N, supporting 8 channels sampled up to 250 MSps at 14-bit resolution. Considered sampling for the SD is 120 MSps, however, the FEB has been developed with external anti-aliasing filters to keep a maximal flexibility. Six channels are targeted to the SD, two the rest for other experiments like: Auger Engineering Radio Array and additional muon counters. More channels and higher sampling generate larger size of registered events. We used the standard radio channel for a radio transmission from themore » detectors to the Central Data Acquisition Station (CDAS) to avoid at present a significant modification of a software in both sides: the detector and the CDAS (planned in a future for a final design). Seven FEBs have been deployed in the test detectors on a dedicated Engineering Array in a hexagon. Several variants of the FPGA code were tested for 120, 160, 200 and even 240 MSps DAQ. Tests confirmed a stability and reliability of the FEB design in real pampas conditions with more than 40 deg. C daily temperature variation and a strong sun exposition with a limited power budget only from a single solar panel. (authors)« less

  1. A miniaturized HTS microwave receiver front-end subsystem for radar and communication applications

    NASA Astrophysics Data System (ADS)

    Bian, Yongbo; Guo, Jin; Gao, Changzheng; Li, Chunguang; Li, Hong; Wang, Jia; Cui, Bin; He, Xiaofeng; Li, Chao; Li, Na; Li, Guoqiang; Zhang, Qiang; Zhang, Xueqiang; Meng, Jibao; He, Yusheng

    2010-08-01

    This paper presents a miniaturized high performance high temperature superconducting (HTS) microwave receiver front-end subsystem, which uses a mini stirling cryocooler to cool a high selective HTS filter and a low noise amplifier (LNA). The HTS filter was miniaturized by using specially designed compact resonators and fabricating with double-sided YBCO films on LAO substrate which has a relatively high permittivity. The LNA was specially designed to work at cryogenic temperature with noise figure of 0.27 dB at 71 K. The mini cryocooler, which is widely used in infrared detectors, has a smaller size (60 mm × 80 mm × 100 mm) and a lighter weight (340 g) than the stirling cryocoolers commonly used in other HTS filter subsystem. The whole front-end subsystem, including a HTS filter, a LNA, a cryocooler and the vacuum chamber, has a size of only φ120 mm × 175 mm and a weight of only 3.3 kg. The microwave devices inside the subsystem are working at 71.8 K with a consumed cooling power of 0.325 W. The center frequency of this subsystem is 925.2 MHz and the bandwidth is 2.7 MHz (which is a fractional bandwidth of 0.2%), with the gain of 19.75 dB at center frequency and the return loss better than -18.11 dB in the pass band. The stop band rejection is more than 60 dB and the skirt slope is exceeding 120 dB MHz -1. The noise figure of this subsystem is less than 0.8 dB. This front-end subsystem can be used in radars and communication systems conveniently due to it’s compact size and light weight.

  2. Performance of a 2.5 THz Receiver Front-End for Spaceborne Applications

    NASA Technical Reports Server (NTRS)

    Gaidis, Michael C.; Pickett, H. M.; Siegel, P. H.; Smith, C. D.; Smith, R. P.; Martin, S. C.

    1999-01-01

    The OH radical plays a significant role in a great many of the known ozone destruction cycles, and has become the focus of an important radiometer development effort for NASA's Earth Observing System Chem I satellite, which will monitor and study many tropospheric and stratospheric gases and is scheduled for launch in 2002. Here we describe the design, fabrication, and testing of a receiver front end used to detect the OH signals at 2.5 THz. This is to be the first Terahertz heterodyne receiver to be flown in space. The challenges of producing the necessary high-performance mixers are numerous, but for this application, there is the added challenge of designing a robust receiver which can withstand the environmental extremes of a rocket launch and five years in space. The receiver front-end consists of the following components: a four-port dual-polarization diplexer, off-axis elliptical feed mirrors, mixers for horizontal and vertical polarization, support structures allowing simple and rugged alignment, low noise IF amplification from 7.7 to 21.1 GHz, and mixer DC bias circuitry. The front-end design, alignment, and operation will be covered in depth, followed by a discussion of the most recent results in receiver noise and dual-mode horn beam patterns. JPL MOMED mixers are employed, and have resulted in receiver noise temperatures of 14,500 K, DSB with LO frequency 2.522 GHz and IF of 12.8 GHz. Horn beam patterns correspond well with theory, with no significant sidelobes above the -25 dB level. Considering the high-quality beam of this receiver, these results are competitive with the best reported in the literature.

  3. An analysis of injuries to front-end loader operators during ingress and egress.

    PubMed

    Nasarwanji, Mahiyar F; Pollard, Jonisha; Porter, William

    2018-05-01

    Slips, trips, and falls from mobile mining equipment have been documented for decades. However, little research has been conducted to determine the events precipitating these incidents during ingress or egress. This study examined slips, trips, and falls sustained during ingress or egress from front-end loaders to determine the frequencies of factors that may contribute to injuries. Non-fatal injuries, when getting on or off of front-end wheel loaders specifically, were identified, coded, and analyzed from the Mine Safety and Health Administration's accidents, injuries, and illnesses database. Overall trends, events that precipitated the injury, injuries sustained, contributing factors, location of the individual, and equipment characteristics were analyzed. More incidents occurred during egress (63%); and egress is believed to be more hazardous than ingress. Foot slips were the most common event that precipitated the incident and the leading cause of these was contaminants on the equipment. Misstep, loss of footing, and step on/in related incidents were more common during egress and are likely due to the operator's reduced visibility when descending a ladder facing the equipment, limiting their ability to detect hazards. Egress also makes an operator less capable of avoiding unsafe ground conditions as indicated by the significant number of step on/in injuries occurring on the ground during egress. Most of the front-end loaders associated with the incidents were found to have bottom rungs with flexible rails, which may also increase fall risk during egress due to inconsistent rung heights and lengthy transition areas from the ground, through the flexible-railed rungs, to the rungs with rigid rails. Recommendations are provided to reduce the risk for slips, trips, and falls from mobile mining equipment.

  4. A low-voltage low-power front-end for wearable EEG systems.

    PubMed

    Yates, D; López-Morillo, E; Carvajal, R G; Ramirez-Angulo, J; Rodriguez-Villegas, E

    2007-01-01

    A low-voltage and low-power front-end for miniaturized, wearable EEG systems is presented. The instrumentation amplifier, which removes the electrode drift and conditions the signal for a 10-bit A/D converter, combines a chopping strategy with quasi-FGMOS (QFG) transistors to minimize low frequency noise whilst enabling operation at 1 V supply. QFG devices are also key to the A/D converter operating at 1.2 V with 70dB of SNR and an oversampling ratio of 64. The whole system consumes less than 2uW at 1.2V.

  5. OPCPA front end and contrast optimization for the OMEGA EP kilojoule, picosecond laser

    DOE PAGES

    Dorrer, C.; Consentino, A.; Irwin, D.; ...

    2015-09-01

    OMEGA EP is a large-scale laser system that combines optical parametric amplification and solid-state laser amplification on two beamlines to deliver high-intensity, high-energy optical pulses. The temporal contrast of the output pulse is limited by the front-end parametric fluorescence and other features that are specific to parametric amplification. The impact of the two-crystal parametric preamplifier, pump-intensity noise, and pump-signal timing is experimentally studied. The implementation of a parametric amplifier pumped by a short pump pulse before stretching, further amplification, and recompression to enhance the temporal contrast of the high-energy short pulse is described.

  6. The front end test stand high performance H- ion source at Rutherford Appleton Laboratory.

    PubMed

    Faircloth, D C; Lawrie, S; Letchford, A P; Gabor, C; Wise, P; Whitehead, M; Wood, T; Westall, M; Findlay, D; Perkins, M; Savage, P J; Lee, D A; Pozimski, J K

    2010-02-01

    The aim of the front end test stand (FETS) project is to demonstrate that chopped low energy beams of high quality can be produced. FETS consists of a 60 mA Penning Surface Plasma Ion Source, a three solenoid low energy beam transport, a 3 MeV radio frequency quadrupole, a chopper, and a comprehensive suite of diagnostics. This paper details the design and initial performance of the ion source and the laser profile measurement system. Beam current, profile, and emittance measurements are shown for different operating conditions.

  7. THz semiconductor-based front-end receiver technology for space applications

    NASA Technical Reports Server (NTRS)

    Mehdi, Imran; Siegel, Peter

    2004-01-01

    Advances in the design and fabrication of very low capacitance planar Schottky diodes and millimeter-wave power amplifiers, more accurate device and circuit models for commercial 3-D electromagnetic simulators, and the availability of both MEMS and high precision metal machining, have enabled RF engineers to extend traditional waveguide-based sensor and source technologies well into the TI-Iz frequency regime. This short paper will highlight recent progress in realizing THz space-qualified receiver front-ends based on room temperature semiconductor devices.

  8. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    NASA Astrophysics Data System (ADS)

    Kim, D.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Lattuca, A.; Mager, M.; Sielewicz, K. M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Pham, T. H.; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. W.; Yang, P.

    2016-02-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented.

  9. Analog Signal Correlating Using an Analog-Based Signal Conditioning Front End

    NASA Technical Reports Server (NTRS)

    Prokop, Norman; Krasowski, Michael

    2013-01-01

    This innovation is capable of correlating two analog signals by using an analog-based signal conditioning front end to hard-limit the analog signals through adaptive thresholding into a binary bit stream, then performing the correlation using a Hamming "similarity" calculator function embedded in a one-bit digital correlator (OBDC). By converting the analog signal into a bit stream, the calculation of the correlation function is simplified, and less hardware resources are needed. This binary representation allows the hardware to move from a DSP where instructions are performed serially, into digital logic where calculations can be performed in parallel, greatly speeding up calculations.

  10. Analog front-end design of the STS/MUCH-XYTER2—full size prototype ASIC for the CBM experiment

    NASA Astrophysics Data System (ADS)

    Kleczek, Rafal

    2017-01-01

    The design of the analog front-end of the STS/MUCH-XYTER2 ASIC, a full-size prototype chip for the Silicon Tracking System (STS, based on double-sided silicon strip sensors) and Muon Chamber (MUCH, based on gas sensors) detectors is presented. The ASIC contains 128 charge processing channels, each built of a charge sensitive amplifier, a polarity selection circuit and two pulse shaping amplifiers forming two parallel signal paths. The first path is used for timing measurement with a fast discriminator. The second path allows low-noise amplitude measurement with a 5-bit continuous-time flash ADC. Different operating conditions and constraints posed by two target detectors' applications require front-end electronics flexibility to meet extended system-wise requirements. The presented circuit implements switchable shaper peaking time, gain switching and trimming, input amplifier pulsed reset circuit, fail-safe measures. The power consumption is scalable (for the STS and the MUCH modes), but limited to 10 mW/channel.

  11. A compact dual-band RF front-end and board design for vehicular platforms

    NASA Astrophysics Data System (ADS)

    Sharawi, Mohammad S.; Aloi, Daniel N.

    2012-03-01

    Modern vehicular platforms include several wireless systems that provide navigation, entertainment and road side assistance, among other services. These systems operate at different frequency bands and thus careful system-level design should be followed to minimise the interference between them. In this study, we present a compact dual-band RF front-end module for global positioning system (GPS) operating in the L1-band (1574.42-1576.42 MHz) and satellite digital audio radio system (SDARS) operating in the S-band (2320-2345 MHz). The module provides more than 26 dB of measured gain in both bands and low noise figure values of 0.9 and 1.2 dB in SDARS and GPS bands, respectively. The front-end has interference suppression capability from the advanced mobile phone system and personal communication service cellular bands. The module is designed on a low-cost FR-4 substrate material and occupies a small size of 62 × 29 × 1.3 mm3. It dissipates 235 mW in the SDARS section and 100 mW in the GPS section. Three prototypes have been built to verify a repeatable performance.

  12. Status of the Warm Front End of PIP-II Injector Test

    SciTech Connect

    Shemyakin, Alexander; Alvarez, Matthew; Andrews, Richard

    The Proton Improvement Plan II (PIP-II) at Fermilab is a program of upgrades to the injection complex. At its core is the design and construction of a CW-compatible, pulsed H⁻ SRF linac. To validate the concept of the front-end of such machine, a test accelerator known as PIP-II Injector Test is under construction. It includes a 10 mA DC, 30 keV H⁻ ion source, a 2 m-long Low Energy Beam Transport (LEBT), a 2.1 MeV CW RFQ, followed by a Medium Energy Beam Transport (MEBT) that feeds the first of 2 cryomodules increasing the beam energy to about 25 MeV,more » and a High Energy Beam Transport section (HEBT) that takes the beam to a dump. The ion source, LEBT, RFQ, and initial version of the MEBT have been built, installed, and commissioned. This report presents the overall status of the warm front end.« less

  13. A Comparative Analysis of CMUT Receiving Architectures for the Design Optimization of Integrated Transceiver Front Ends.

    PubMed

    Sautto, Marco; Savoia, Alessandro Stuart; Quaglia, Fabio; Caliano, Giosue; Mazzanti, Andrea

    2017-05-01

    A formal comparison between fundamental RX amplifier configurations for capacitive micromachined ultrasonic transducers (CMUTs) is proposed in this paper. The impact on both RX and the pulse-echo frequency response and on the output SNR is thoroughly analyzed and discussed. It is shown that the resistive-feedback amplifier yields a bandpass RX frequency response, while both open-loop voltage and capacitive-feedback amplifiers exhibit a low-pass frequency response. For a given power dissipation, it is formally proved that a capacitive-feedback amplifier provides a remarkable SNR improvement against the commonly adopted resistive feedback stage, achieved at the expense of a reduced pulse-echo center frequency, making its use convenient in low-frequency and midfrequency ultrasound imaging applications. The advantage mostly comes from a much lower noise contributed by the active devices, especially with low- Q , broadband transducers. The results of the analysis are applied to the design of a CMUT front end in BIPOLAR-CMOS-DMOS Silicon-on-Insulator technology operating at 10-MHz center frequency. It comprises a low-power RX amplifier, a high-voltage Transmission/Reception switch, and a 100-V TX driver. Extensive electrical characterization, pulse-echo measurements, and imaging results are shown. Compared with previously reported CMUT front ends, this transceiver demonstrates the highest dynamic range and state-of-the-art noise performance with an RX amplifier power dissipation of 1 mW.

  14. An ultra low-power front-end IC for wearable health monitoring system.

    PubMed

    Yu-Pin Hsu; Zemin Liu; Hella, Mona M

    2016-08-01

    This paper presents a low-power front-end IC for wearable health monitoring systems. The IC, designed in a standard 0.13μm CMOS technology, fully integrates a low-noise analog front-end (AFE) to process the weak bio-signals, followed by an analog-to-digital converter (ADC) to digitize the extracted signals. An AC-coupled driving buffer, that interfaces between the AFE and the ADC is introduced to scale down the power supply of the ADC. The power consumption decreases by 50% compared to the case without power supply scaling. The AFE passes signals from 0.5Hz to 280Hz and from 0.7Hz to 160Hz with a simulated input referred noise of 1.6μVrms and achieves a maximum gain of 35dB/41dB respectively, with a noise-efficiency factor (NEF) of the AFE is 1. The 8-bit ADC achieves a simulated 7.96-bit resolution at 10KS/s sampling rate under 0.5V supply voltage. The overall system consumes only 0.86μW at dual supply voltages of 1V (AFE) and 0.5 V (ADC).

  15. Characterization of RF front-ends by long-tail pulse response

    NASA Astrophysics Data System (ADS)

    Mazzaro, Gregory J.; Ranney, Kenneth I.

    2010-04-01

    The recognition of unauthorized communications devices at the entry-point of a secure location is one way to guard against the compromise of sensitive information by wireless transmission. Such recognition may be achieved by backscatter x-ray and millimeter-wave imaging; however, implementation of these systems is expensive, and the ability to image the contours of the human body has raised privacy concerns. In this paper, we present a cheaper and less-invasive radio-frequency (RF) alternative for recognizing wireless communications devices. Characterization of the device-under-test (DUT) is accomplished using a stepped-frequency radar waveform. Single-frequency pulses excite resonance in the device's RF front-end. Microsecond periods of zero-signal are placed between each frequency transition to listen for the resonance. The stepped-frequency transmission is swept through known communications bands. Reception of a long-tail decay response between active pulses indicates the presence of a narrowband filter and implies the presence of a front-end circuit. The frequency of the received resonance identifies its communications band. In this work, cellular-band and handheld-radio filters are characterized.

  16. Fast front-end electronics for semiconductor tracking detectors: Trends and perspectives

    NASA Astrophysics Data System (ADS)

    Rivetti, Angelo

    2014-11-01

    In the past few years, extensive research efforts pursued by both the industry and the academia have lead to major improvements in the performance of Analog to Digital Converters (ADCs) and Time to Digital Converters (TDCs). ADCs achieving 8-10 bit resolution, 50-100 MHz conversion frequency and less than 1 mW power consumption are the today's standard, while TDCs have reached sub-picosecond time resolution. These results have been made possible by architectural upgrades combined with the use of ultra deep submicron CMOS technologies with minimum feature size of 130 nm or smaller. Front-end ASICs in which a prompt digitization is followed by signal conditioning in the digital domain can now be envisaged also within the tight power budget typically available in high density tracking systems. Furthermore, tracking detectors embedding high resolution timing capabilities are gaining interest. In the paper, ADC's and TDC's developments which are of particular relevance for the design front-end electronics for semiconductor trackers are discussed along with the benefits and challenges of exploiting such high performance building blocks in implementing the next generation of ASICs for high granularity particle detectors.

  17. A front-end electronic system for large arrays of bolometers

    NASA Astrophysics Data System (ADS)

    Arnaboldi, C.; Carniti, P.; Cassina, L.; Gotti, C.; Liu, X.; Maino, M.; Pessina, G.; Rosenfeld, C.; Zhu, B. X.

    2018-02-01

    CUORE is an array of thermal calorimeters composed of 988 crystals held at about 10 mK, whose absorbed energy is read out with semiconductor thermistors. The composition of the crystal is TeO2, and the aim is the study of the double beta decay of 130Te on very long and stable runs. CUPID-0 is an array of 26 Zn82Se crystals with double thermistor readout to study the double beta decay of 82Se. In the present paper, we present an overview of the entire front-end electronic readout chain, from the preamplifier to the anti-aliasing filter. This overview includes motivations, design strategies, circuit implementation and performance results of the electronic system, including other auxiliary yet important elements like power supplies and the slow control communication system. The stringent requirements of stability on the very long experimental runs that are foreseen during CUORE and CUPID-0 operation, are achieved thanks to novel solutions of the front-end preamplifier and of the detector bias circuit setup.

  18. The Majorana Low-noise Low-background Front-end Electronics

    NASA Astrophysics Data System (ADS)

    Abgrall, N.; Aguayo, E.; Avignone, F. T.; Barabash, A. S.; Bertrand, F. E.; Boswell, M.; Brudanin, V.; Busch, M.; Byram, D.; Caldwell, A. S.; Chan, Y.-D.; Christofferson, C. D.; Combs, D. C.; Cuesta, C.; Detwiler, J. A.; Doe, P. J.; Efremenko, Yu.; Egorov, V.; Ejiri, H.; Elliott, S. R.; Fast, J. E.; Finnerty, P.; Fraenkle, F. M.; Galindo-Uribarri, A.; Giovanetti, G. K.; Goett, J.; Green, M. P.; Gruszko, J.; Guiseppe, V. E.; Gusev, K.; Hallin, A. L.; Hazama, R.; Hegai, A.; Henning, R.; Hoppe, E. W.; Howard, S.; Howe, M. A.; Keeter, K. J.; Kidd, M. F.; Kochetov, O.; Konovalov, S. I.; Kouzes, R. T.; LaFerriere, B. D.; Leon, J.; Leviner, L. E.; Loach, J. C.; MacMullin, J.; MacMullin, S.; Martin, R. D.; Meijer, S.; Mertens, S.; Nomachi, M.; Orrell, J. L.; O'Shaughnessy, C.; Overman, N. R.; Phillips, D. G.; Poon, A. W. P.; Pushkin, K.; Radford, D. C.; Rager, J.; Rielage, K.; Robertson, R. G. H.; Romero-Romero, E.; Ronquest, M. C.; Schubert, A. G.; Shanks, B.; Shima, T.; Shirchenko, M.; Snavely, K. J.; Snyder, N.; Suriano, A. M.; Thompson, J.; Timkin, V.; Tornow, W.; Trimble, J. E.; Varner, R. L.; Vasilyev, S.; Vetter, K.; Vorren, K.; White, B. R.; Wilkerson, J. F.; Wiseman, C.; Xu, W.; Yakushev, E.; Young, A. R.; Yu, C.-H.; Yumatov, V.

    The MAJORANA DEMONSTRATOR will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope 76Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the MAJORANA DEMONSTRATOR is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the 76Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolution performances. We present here the low-noise low- background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the MAJORANA DEMONSTRATOR. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.

  19. Magnesium Front End Research and Development: A Canada-China-USA Collaboration

    NASA Astrophysics Data System (ADS)

    Luo, Alan A.; Nyberg, Eric A.; Sadayappan, Kumar; Shi, Wenfang

    The Magnesium Front End Research & Development (MFERD) project is an effort jointly sponsored by the United States Department of Energy, the United States Automotive Materials Partnership (USAMP), the Chinese Ministry of Science and Technology and Natural Resources Canada (NRCan) to demonstrate the technical and economic feasibility of a magnesium-intensive automotive front end body structure which offers improved fuel economy and performance benefits in a multi-material automotive structure. The project examines novel magnesium automotive body applications and processes, beyond conventional die castings, including wrought components (sheet or extrusions) and high-integrity body castings. This paper outlines the scope of work and organization for the collaborative (tri-country) task teams. The project has the goals of developing key enabling technologies and knowledge base for increased magnesium automotive body applications. The MFERD project began in early 2007 by initiating R&D in the following areas: crashworthiness, NVH, fatigue and durability, corrosion and surface finishing, extrusion and forming, sheet and forming, high-integrity body casting, as well as joining and assembly. Additionally, the MFERD project is also linked to the Integrated Computational Materials Engineering (ICME) project that will investigate the processing/structure/properties relations for various magnesium alloys and manufacturing processes utilizing advanced computer-aided engineering and modeling tools.

  20. On the overriding issue of train front end collision in rail vehicle dynamics

    NASA Astrophysics Data System (ADS)

    Yang, Chao; Li, Qiang; Xiao, Shoune; Wang, Xi

    2018-04-01

    A three-dimensional dynamic model of crashed vehicles coupled with moving tracks is developed to research the dynamic behaviour of the train front end collision on tangent tracks. The three-dimensional dynamic model consists of a crashed vehicle model, moving track models, a simple wheel-rail contact model, a velocity-based coupler model and the model of energy absorption and anti-climbing devices. The vector method dealing with the nonlinear wheel-rail geometry is put forward in the paper. The developed model is applicable in the scope that central collisions occur on tangent tracks at low speeds. The examples of the vehicle impacting with a rigid wall and the train front end collision are carried out to obtain the dynamic responses of vehicles. The overriding issue is studied on the basis of the wheel rise in train collisions. The results show that the second bogie of the first colliding vehicle possesses the maximal wheel rise. The wheel rise increases with the increase of vehicles. However, the number of vehicles has tiny influence on the overriding in train collisions at low speeds. On the contrary, the impact speed has significant influence on the overriding in train collisions. The wheel rise increases rapidly if the impact speed is close to the critical speed of overriding. The large wheel rise is principally generated by the great coupler force related to the rigid impact in the axial direction.

  1. The Majorana low-noise low-background front-end electronics

    DOE PAGES

    Abgrall, N.; Aguayo, E.; Avignone, III, F. T.; ...

    2015-03-24

    The Majorana Demonstrator will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope ⁷⁶Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the Majorana Demonstrator is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the ⁷⁶Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolutionmore » performances. We present here the low-noise low-background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the Majorana Demonstrator. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.« less

  2. Front-end Electronics for Unattended Measurement (FEUM). Results of Prototype Evaluation

    SciTech Connect

    Conrad, Ryan C.; Keller, Daniel T.; Morris, Scott J.

    2015-07-01

    The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, amore » technical evaluation of a candidate FEUM device produced by a commercial vendor has been performed. This evaluation assessed the device against the IAEA’s original technical specifications and a broad range of important parameters that include sensor types, cable lengths and types, industrial electromagnetic noise that can degrade signals from remotely located detectors, and high radiation fields. Testing data, interpretation, findings and recommendations are provided.« less

  3. An inductorless multi-mode RF front end for GNSS receiver in 55 nm CMOS

    NASA Astrophysics Data System (ADS)

    Yanbin, Luo; Chengyan, Ma; Yebing, Gan; Min, Qian; Tianchun, Ye

    2015-10-01

    An inductorless multi-mode RF front end for a global navigation satellite system (GNSS) receiver is presented. Unlike the traditional topology of a low noise amplifier (LNA), the inductorless current-mode noise-canceling LNA is applied in this design. The high-impedance-input radio frequency amplifier (RFA) further amplifies the GNSS signals and changes the single-end signal path into fully differential. The passive mixer down-converts the signals to the intermediate frequency (IF) band and conveys the signals to the analogue blocks. The local oscillator (LO) buffer divides the output frequency of the voltage controlled oscillator (VCO) and generates 25%-duty-cycle quadrature square waves to drive the mixer. Our measurement results display that the implemented RF front end achieves good overall performance while consuming only 6.7 mA from 1.2 V supply. The input return loss is better than -26 dB and the ultra low noise figure of 1.43 dB leads to high sensitivity of the GNSS receiver. The input 1 dB compression point is -43 dBm at the high gain of 48 dB. The designed circuit is fabricated in 55 nm CMOS technology and the die area, which is much smaller than traditional circuit, is around 220 × 280 μm2.

  4. A CMOS Low-Power Optical Front-End for 5 Gbps Applications

    NASA Astrophysics Data System (ADS)

    Zohoori, Soorena; Dolatshahi, Mehdi

    2018-01-01

    In this paper, a new low-power optical receiver front-end is proposed in 90 nm CMOS technology for 5 Gb/s AApplications. However, to improve the gain-bandwidth trade-off, the proposed Trans-Impedance Amplifier (TIA) uses an active modified inverter-based topology followed by a common-source amplifier, which uses active inductive peaking technique to enhance the frequency bandwidth in an increased gain level for a reasonable power consumption value. The proposed TIA is analyzed and simulated in HSPICE using 90 nm CMOS technology parameters. Simulation results show a 53.5dBΩ trans-impedance gain, 3.5 GHz frequency bandwidth, 16.8pA/√Hz input referred noise, and 1.28 mW of power consumption at 1V supply voltage. The Optical receiver is completed using three stages of differential limiting amplifiers (LAs), which provide 27 dB voltage gain while consume 3.1 mW of power. Finally, the whole optical receiver front-end consumes only 5.6 mW of power at 1 V supply and amplifies the input signal by 80 dB, while providing 3.7 GHz of frequency bandwidth. Finally, the simulation results indicate that the proposed optical receiver is a proper candidate to be used in a low-power 5 Gbps optical communication system.

  5. Front-End Board with Cyclone V as a Test High-Resolution Platform for the Auger_Beyond_2015 Front End Electronics

    NASA Astrophysics Data System (ADS)

    Szadkowski, Zbigniew

    2015-06-01

    The surface detector (SD) array of the Pierre Auger Observatory needs an upgrade which allows space for more complex triggers with higher bandwidth and greater dynamic range. To this end this paper presents a front-end board (FEB) with the largest Cyclone V E FPGA 5CEFA9F31I7N. It supports eight channels sampled with max. 250 MSps@14-bit resolution. Considered sampling for the SD is 120 MSps; however, the FEB has been developed with external anti-aliasing filters to retain maximal flexibility. Six channels are targeted at the SD, two are reserved for other experiments like: Auger Engineering Radio Array and additional muon counters. The FEB is an intermediate design plugged into a unified board communicating with a micro-controller at 40 MHz; however, it provides 250 MSPs sampling with an 18-bit dynamic range, is equipped with a virtual NIOS processor and supports 256 MB of SDRAM as well as an implemented spectral trigger based on the discrete cosine transform for detection of very inclined “old” showers. The FEB can also support neural network development for detection of “young” showers, potentially generated by neutrinos. A single FEB was already tested in the Auger surface detector in Malargüe (Argentina) for 120 and 160 MSps. Preliminary tests showed perfect stability of data acquisition for sampling frequency three or four times greater. They allowed optimization of the design before deployment of seven or eight FEBs for several months of continuous tests in the engineering array.

  6. Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors

    SciTech Connect

    Gan, Bo; Wei, Tingcun; Gao, Wu

    Cadmium zinc telluride (CdZnTe) detectors, as one of the principal detectors for the next-generation X-ray and γ-ray imagers, have high energy resolution and supporting electrode patterning in the radiation environment at room-temperature. In the present, a number of internationally renowned research institutions and universities are actively using these detector systems to carry out researches of energy spectrum analysis, medical imaging, materials characterization, high-energy physics, nuclear plant monitoring, and astrophysics. As the most important part of the readout system for the CdZnTe detector, the front-end readout application specific integrated circuit (ASIC) would have an important impact on the performances of themore » whole detector system. In order to ensure the small signal to noise ratio (SNR) and sufficient range of the output signal, it is necessary to design a front-end readout ASIC with very low noise and very high dynamic range. In addition, radiation hardness should be considered when the detectors are utilized in the space applications and high energy physics experiments. In this paper, we present measurements and performances of a novel multi-channel radiation-hardness low-noise front-end readout ASIC for CdZnTe detectors. The readout circuits in each channel consist of charge sensitive amplifier, leakage current compensation circuit (LCC), CR-RC shaper, S-K filter, inverse proportional amplifier, peak detect and hold circuit (PDH), discriminator and trigger logic, time sequence control circuit and driving buffer. All of 64 readout channels' outputs enter corresponding inputs of a 64 channel multiplexer. The output of the mux goes directly out of the chip via the output buffer. The 64-channel readout ASIC is implemented using the TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 2.7 mm x 8 mm. At room temperature, the equivalent noise level of a typical channel reaches 66 e{sup -} (rms) at zero farad for

  7. A digital front-end and readout microsystem for calorimetry at LHC

    NASA Astrophysics Data System (ADS)

    Alippi, C.; Appelquist, G.; Berglund, S.; Bohm, C.; Breveglieri, L.; Brigati, S.; Carlson, P.; Cattaneo, P.; Dadda, L.; David, J.; Del Buono, L.; Dell'Acqua, A.; Engström, M.; Fumagalli, G.; Gatti, U.; Genat, J. F.; Goggi, G.; Hansen, M.; Hentzell, H.; Höglund, I.; Inkinen, S.; Kerek, A.; Lebbolo, H.; LeDortz, O.; Lofstedt, B.; Maloberti, F.; Nayman, P.; Persson, S.-T.; Piuri, V.; Salice, F.; Sami, M.; Savoy-Navarro, A.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Zitoun, R.

    1994-04-01

    A digital solution to the front-end electronics for calorimetric detectors at future supercolliders is presented. The solution is based on high speed {A}/{D} converters, a fully programmable pipeline/digital filter chain and local intelligence. Questions of error correction, fault-tolerance and system redundancy are also being considered. A system integration of a multichannel device in a multichip, Silicon-on-Silicon Microsystem hybrid, is used. This solution allows a new level of integration of complex analogue and digital functions, with an excellent flexibility in mixing technologies for the different functional blocks. It also allows a high degree of programmability at both the function and the system level, and offers the possibility of customising the microsystem with detector-specific functions.

  8. Performance of the Fully Digital FPGA-Based Front-End Electronics for the GALILEO Array

    NASA Astrophysics Data System (ADS)

    Barrientos, D.; Bellato, M.; Bazzacco, D.; Bortolato, D.; Cocconi, P.; Gadea, A.; González, V.; Gulmini, M.; Isocrate, R.; Mengoni, D.; Pullia, A.; Recchia, F.; Rosso, D.; Sanchis, E.; Toniolo, N.; Ur, C. A.; Valiente-Dobón, J. J.

    2015-12-01

    In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. This work presents the first results of the digital FEE system coupled with a GALILEO germanium detector, which has demonstrated the capability to achieve an energy resolution of 1.530/00 at an energy of 1.33 MeV, similar to the one obtained with a conventional analog system. While keeping a good performance in terms of energy resolution, digital electronics will allow to instrument the full GALILEO array with a versatile system with high integration and low power consumption and costs.

  9. The phase 1 upgrade of the CMS Pixel Front-End Driver

    NASA Astrophysics Data System (ADS)

    Friedl, M.; Pernicka, M.; Steininger, H.

    2010-12-01

    The pixel detector of the CMS experiment at the LHC is read out by analog optical links, sending the data to 9U VME Front-End Driver (FED) boards located in the electronics cavern. There are plans for the phase 1 upgrade of the pixel detector (2016) to add one more layer, while significantly cutting down the overall material budget. At the same time, the optical data transmission will be replaced by a serialized digital scheme. A plug-in board solution with a high-speed digital optical receiver has been developed for the Pixel-FED readout boards and will be presented along with first tests of the future optical link.

  10. Wideband infrared heterodyne receiver front-end. [for use in CO2 laser communications

    NASA Technical Reports Server (NTRS)

    Peyton, B. J.; Wolczok, J.

    1974-01-01

    A 10.6 micron infrared heterodyne receiver front end was developed for use in a wideband CO2 laser communications link. The infrared receiver employs an 850 MHz response PV HgCdTe photomixer which is mounted in a space quality housing, a low-noise 5 to 1500 MHz IF preamplifier, and a remote control panel. The receiver was designed to handle + or - 750 MHz of Doppler shift while providing an instantaneous information bandwidth of 400 MHz. The measured receiver sensitivity NEP was 1.0 x 10 to the 19th power W/Hz for a photomixer temperature of T sub m = 77 K and an IF beat frequency of 20 MHz and degraded to 1.75 x 10 to the 19th power W/Hz for T sub m = 130 K.

  11. Recent advances in the front-end sources of the LMJ fusion laser

    NASA Astrophysics Data System (ADS)

    Gleyze, Jean-François; Hares, Jonathan; Vidal, Sebastien; Beck, Nicolas; Dubertrand, Jerome; Perrin, Arnaud

    2011-03-01

    LMJ is typical of lasers used for inertial confinement fusion and requires a laser of programmable parameters for injection into the main amplifier. For several years, the CEA has developed front end fiber sources, based on telecommunications fiber optics technologies. These sources meet the needs but as the technology evolves we can expect improved efficiency and reductions in size and cost. We give an up-to-date description of some present development issues, particularly in the field of temporal shaping with the use of digital system. The synchronization of such electronics has been challenging however we now obtain system jitter of less then 7ps rms. Secondly, we will present recent advance in the use of fiber based pre-comp system to avoid parasitic amplitude modulation from phase modulation used for spectral broadening.

  12. FAME, a microprocessor based front-end analysis and modeling environment

    NASA Technical Reports Server (NTRS)

    Rosenbaum, J. D.; Kutin, E. B.

    1980-01-01

    Higher order software (HOS) is a methodology for the specification and verification of large scale, complex, real time systems. The HOS methodology was implemented as FAME (front end analysis and modeling environment), a microprocessor based system for interactively developing, analyzing, and displaying system models in a low cost user-friendly environment. The nature of the model is such that when completed it can be the basis for projection to a variety of forms such as structured design diagrams, Petri-nets, data flow diagrams, and PSL/PSA source code. The user's interface with the analyzer is easily recognized by any current user of a structured modeling approach; therefore extensive training is unnecessary. Furthermore, when all the system capabilities are used one can check on proper usage of data types, functions, and control structures thereby adding a new dimension to the design process that will lead to better and more easily verified software designs.

  13. A Test Apparatus for the MAJORANA DEMONSTRATOR Front-end Electronics

    NASA Astrophysics Data System (ADS)

    Singh, Harjit; Loach, James; Poon, Alan

    2012-10-01

    One of the most important experimental programs in neutrino physics is the search for neutrinoless double-beta decay. The MAJORANA collaboration is searching for this rare nuclear process in the Ge-76 isotope using HPGe detectors. Each detector is instrumented with high-performance electronics to read out and amplify the signals. The part of the electronics close to the detectors, consisting of a novel front-end circuit, cables and connectors, is made of radio-pure materials and is exceedingly delicate. In this work a dedicated test apparatus was created to benchmark the performance of the electronics before installation in the experiment. The apparatus was designed for cleanroom use, with fixtures to hold the components without contaminating them, and included the electronics necessary for power and readout. In addition to testing, the station will find longer term use in development of future versions of the electronics.

  14. Actuation stability test of the LISA pathfinder inertial sensor front-end electronics

    NASA Astrophysics Data System (ADS)

    Mance, Davor; Gan, Li; Weber, Bill; Weber, Franz; Zweifel, Peter

    In order to limit the residual stray forces on the inertial sensor test mass in LISA pathfinder, √ it is required that the fluctuation of the test mass actuation voltage is within 2ppm/ Hz. The actuation voltage stability test on the flight hardware of the inertial sensor front-end electronics (IS FEE) is presented in this paper. This test is completed during the inertial sensor integration at EADS Astrium Friedrichshafen, Germany. The standard measurement method using voltmeter is not sufficient for verification, since the instrument low frequency √ fluctuation is higher than the 2ppm/ Hz requirement. In this test, by using the differential measurement method and the lock-in amplifier, the actuation stability performance is verified and the quality of the IS FEE hardware is confirmed by the test results.

  15. Design of a wideband CMOS impedance spectroscopy ASIC analog front-end for multichannel biosensor interfaces.

    PubMed

    Valente, Virgilio; Dai Jiang; Demosthenous, Andreas

    2015-08-01

    This paper presents the preliminary design and simulation of a flexible and programmable analog front-end (AFE) circuit with current and voltage readout capabilities for electric impedance spectroscopy (EIS). The AFE is part of a fully integrated multifrequency EIS platform. The current readout comprises of a transimpedance stage and an automatic gain control (AGC) unit designed to accommodate impedance changes larger than 3 order of magnitude. The AGC is based on a dynamic peak detector that tracks changes in the input current over time and regulates the gain of a programmable gain amplifier in order to optimise the signal-to-noise ratio. The system works up to 1 MHz. The voltage readout consists of a 2 stages of fully differential current-feedback instrumentation amplifier which provide 100 dB of CMRR and a programmable gain up to 20 V/V per stage with a bandwidth in excess of 10MHz.

  16. Design of fast signal processing readout front-end electronics implemented in CMOS 40 nm technology

    NASA Astrophysics Data System (ADS)

    Kleczek, Rafal

    2016-12-01

    The author presents considerations on the design of fast readout front-end electronics implemented in a CMOS 40 nm technology with an emphasis on the system dead time, noise performance and power dissipation. The designed processing channel consists of a charge sensitive amplifier with different feedback types (Krummenacher, resistive and constant current blocks), a threshold setting block, a discriminator and a counter with logic circuitry. The results of schematic and post-layout simulations with randomly generated input pulses in a time domain according to the Poisson distribution are presented and analyzed. Dead time below 20 ns is possible while keeping noise ENC ≈ 90 e- for a detector capacitance CDET = 160 fF.

  17. Flexible implementation of front-end bioelectric signal amplifier using FPAA for telemedicine system.

    PubMed

    Chan, U Fai; Chan, Wai Wong; Pun, Sio Hang; Vai, Mang I; Mak, Peng Un

    2007-01-01

    Traditional/Current electronic circuits for Telemedicine have significant performance on certain bioelectric signal detection. However, it is rarely seen that can handle multiple signals without changing of hardware. This paper introduces a general front-end amplifier for various bioelectric signals based on Field Programmable Analogy Array (FPAA) Technology. Employing FPAA technology, the implemented amplifier can be adapted for various bioelectric signals without alternating the circuitry while its compact size (core parts < 2 cm2) provides an alternative solution for miniaturized Telemedicine system and Wearable Devices. The proposed design implementation has demonstrated, through successfully ECG and EMG signal extractions, a quick way to miniaturize analog biomedical circuit in a convenient and cost effective way.

  18. The front-end data conversion and readout electronics for the CMS ECAL upgrade

    NASA Astrophysics Data System (ADS)

    Mazza, G.; Cometti, S.

    2018-03-01

    The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with a 13 bits resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring a fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.

  19. Ionization Readout Electronics for SuperCDMS SNOLAB Employing a HEMT Front-End

    NASA Astrophysics Data System (ADS)

    Partridge, R.

    2014-09-01

    The SuperCDMS SNOLAB experiment seeks to deploy 200 kg of cryogenic Ge detectors employing phonon and ionization readout to identify dark matter interactions. One of the design challenges for the experiment is to provide amplification of the high impedance ionization signal while minimizing power dissipation and noise. This paper describes the design and expected performance of the ionization readout being developed for an engineering model of the SuperCDMS SNOLAB Ge Tower System. The readout features the use of a low-noise HEMT front end transistor operating at 4 K to achieve a power dissipation of 100 W per channel, local grounding to minimize noise injection, and biasing circuitry that allows precise control of the HEMT operating point.

  20. Toward a fully integrated neurostimulator with inductive power recovery front-end.

    PubMed

    Mounaïm, Fayçal; Sawan, Mohamad

    2012-08-01

    In order to investigate new neurostimulation strategies for micturition recovery in spinal cord injured patients, custom implantable stimulators are required to carry-on chronic animal experiments. However, higher integration of the neurostimulator becomes increasingly necessary for miniaturization purposes, power consumption reduction, and for increasing the number of stimulation channels. As a first step towards total integration, we present in this paper the design of a highly-integrated neurostimulator that can be assembled on a 21-mm diameter printed circuit board. The prototype is based on three custom integrated circuits fabricated in High-Voltage (HV) CMOS technology, and a low-power small-scale commercially available FPGA. Using a step-down approach where the inductive voltage is left free up to 20 V, the inductive power and data recovery front-end is fully integrated. In particular, the front-end includes a bridge rectifier, a 20-V voltage limiter, an adjustable series regulator (5 to 12 V), a switched-capacitor step-down DC/DC converter (1:3, 1:2, or 2:3 ratio), as well as data recovery. Measurements show that the DC/DC converter achieves more than 86% power efficiency while providing around 3.9-V from a 12-V input at 1-mA load, 1:3 conversion ratio, and 50-kHz switching frequency. With such efficiency, the proposed step-down inductive power recovery topology is more advantageous than its conventional step-up counterpart. Experimental results confirm good overall functionality of the system.

  1. Top Ten Reasons for DEOX as a Front End to Pyroprocessing

    SciTech Connect

    B.R. Westphal; K.J. Bateman; S.D. Herrmann

    A front end step is being considered to augment chopping during the treatment of spent oxide fuel by pyroprocessing. The front end step, termed DEOX for its emphasis on decladding via oxidation, employs high temperatures to promote the oxidation of UO2 to U3O8 via an oxygen carrier gas. During oxidation, the spent fuel experiences a 30% increase in lattice structure volume resulting in the separation of fuel from cladding with a reduced particle size. A potential added benefit of DEOX is the removal of fission products, either via direct release from the broken fuel structure or via oxidation and volatilizationmore » by the high temperature process. Fuel element chopping is the baseline operation to prepare spent oxide fuel for an electrolytic reduction step. Typical chopping lengths range from 1 to 5 mm for both individual elements and entire assemblies. During electrolytic reduction, uranium oxide is reduced to metallic uranium via a lithium molten salt. An electrorefining step is then performed to separate a majority of the fission products from the recoverable uranium. Although DEOX is based on a low temperature oxidation cycle near 500oC, additional conditions have been tested to distinguish their effects on the process.[1] Both oxygen and air have been utilized during the oxidation portion followed by vacuum conditions to temperatures as high as 1200oC. In addition, the effects of cladding on fission product removal have also been investigated with released fuel to temperatures greater than 500oC.« less

  2. Optimizing read-out of the NECTAr front-end electronics

    NASA Astrophysics Data System (ADS)

    Vorobiov, S.; Feinstein, F.; Bolmont, J.; Corona, P.; Delagnes, E.; Falvard, A.; Gascón, D.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Ribo, M.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.

    2012-12-01

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  3. Dual stage beamforming in the absence of front-end receive focusing

    NASA Astrophysics Data System (ADS)

    Bera, Deep; Bosch, Johan G.; Verweij, Martin D.; de Jong, Nico; Vos, Hendrik J.

    2017-08-01

    Ultrasound front-end receive designs for miniature, wireless, and/or matrix transducers can be simplified considerably by direct-element summation in receive. In this paper we develop a dual-stage beamforming technique that is able to produce a high-quality image from scanlines that are produced with focused transmit, and simple summation in receive (no delays). We call this non-delayed sequential beamforming (NDSB). In the first stage, low-resolution RF scanlines are formed by simple summation of element signals from a running sub-aperture. In the second stage, delay-and-sum beamforming is performed in which the delays are calculated considering the transmit focal points as virtual sources emitting spherical waves, and the sub-apertures as large unfocused receive elements. The NDSB method is validated with simulations in Field II. For experimental validation, RF channel data were acquired with a commercial research scanner using a 5 MHz linear array, and were subsequently processed offline. For NDSB, good average lateral resolution (0.99 mm) and low grating lobe levels (<-40 dB) were achieved by choosing the transmit {{F}\\#} as 0.75 and the transmit focus at 15 mm. NDSB was compared with conventional dynamic receive focusing (DRF) and synthetic aperture sequential beamforming (SASB) with their own respective optimal settings. The full width at half maximum of the NDSB point spread function was on average 20% smaller than that of DRF except for at depths  <30 mm and 10% larger than SASB considering all the depths. NDSB showed only a minor degradation in contrast-to-noise ratio and contrast ratio compared to DRF and SASB when measured on an anechoic cyst embedded in a tissue-mimicking phantom. In conclusion, using simple receive electronics front-end, NDSB can attain an image quality better than DRF and slightly inferior to SASB.

  4. Effects of vehicle impact velocity and front-end structure on dynamic responses of child pedestrians.

    PubMed

    Liu, Xuejun; Yang, Jikuang

    2003-12-01

    To investigate the effects of vehicle impact velocity and front-end structure on the dynamic responses of child pedestrians, an extensive parametric study was carried out using two child mathematical models at 6 and 15 years old. The effect of the vehicle impact velocity was studied at 30, 40, and 50 km/h in terms of the head linear velocity, impact angle, and head angular velocity as well as various injury parameters concerning the head, chest, pelvis, and lower extremities. The variation of vehicle front-end shape was determined according to the shape corridors of modern vehicles, while the stiffness characteristics of the bumper, hood edge, and hood were varied within stiffness corridors obtained from dynamic component tests. The simulation results show that the vehicle impact speed is of great importance on the kinematics and resulting injury severity of child pedestrians. A significant reduction in all injury parameters can be achieved as the vehicle impact speed decreases to 30 km/h. The head and lower extremities of children are at higher injury risks than other body regions. Older children are exposed to higher injury risks to the head and lower leg, whereas younger ones sustain more severe impact loads to the pelvis and upper leg. The results from factorial analysis indicate that the hood-edge height has a significant effect on the kinematics and head impact responses of children. A higher hood edge could reduce the severity of head impact for younger children, but aggravate the risks of head injury for older ones. A significant interaction exists between the bumper height and the hood-edge height on the head impact responses of younger child. Nevertheless, improving the energy absorption performance of the hood seems effective for mitigating the severity of head injuries for children.

  5. Onboard calibration circuit for the DAMPE BGO calorimeter front-end electronics

    NASA Astrophysics Data System (ADS)

    Zhang, De-Liang; Feng, Chang-Qing; Zhang, Jun-Bin; Wang, Qi; Ma, Si-Yuan; Shen, Zhong-Tao; Jiang, Di; Gao, Shan-Shan; Zhang, Yun-Long; Guo, Jian-Hua; Liu, Shu-Bin; An, Qi

    2016-05-01

    DAMPE (DArk Matter Particle Explorer) is a scientific satellite which is mainly aimed at indirectly searching for dark matter in space. One critical sub-detector of the DAMPE payload is the BGO (bismuth germanium oxide) calorimeter, which contains 1848 PMT (photomultiplier tube) dynodes and 16 FEE (Front-End Electronics) boards. VA160 and VATA160, two 32-channel low power ASICs (Application Specific Integrated Circuits), are adopted as the key components on the FEEs to perform charge measurement for the PMT signals. In order to monitor the parameter drift which may be caused by temperature variation, aging, or other environmental factors, an onboard calibration circuit is designed for the VA160 and VATA160 ASICs. It is mainly composed of a 12-bit DAC (Digital to Analog Converter), an operational amplifier and an analog switch. Test results showed that a dynamic range of 0-30 pC with a precision of 5 fC (Root Meam Square, RMS) was achieved, which covers the VA160’s input range. It can be used to compensate for the temperature drift and test the trigger function of the FEEs. The calibration circuit has been implemented for the front-end electronics of the BGO Calorimeter and verified by all the environmental tests for both Qualification Model and Flight Model of DAMPE. The DAMPE satellite was launched at the end of 2015 and the calibration circuit will operate periodically in space. Supported by Strategic Priority Research Program on Space Science of Chinese Academy of Sciences (XDA04040202-4), and National Basic Research Program (973 Program) of China (2010CB833002) and National Natural Science Foundation of China (11273070)

  6. Design of a Multi-Channel Front-End Readout ASIC With Low Noise and Large Dynamic Input Range for APD-Based PET Imaging

    NASA Astrophysics Data System (ADS)

    Fang, X. C.; Hu-Guo, Ch.; Ollivier-Henry, N.; Brasse, D.; Hu, Y.

    2010-06-01

    This paper represents the design of a low-noise, wide band multi-channel readout integrated circuit (IC) used as front end readout electronics of avalanche photo diodes (APD) dedicated to a small animal positron emission tomography (PET) system. The first ten-channel prototype chip (APD-Chip) of the analog parts has been designed and fabricated in a 0.35 μm CMOS process. Every channel of the APD_Chip includes a charge-sensitive preamplifier (CSA), a CR-(RC)2 shaper, and an analog buffer. In a channel, the CSA reads charge signals (10 bits dynamic range) from an APD array having 10 pF of capacitance per pixel. A linearized degenerated differential pair which ensures high linearity in all dynamical range is used as the high feedback resistor for preventing pile up of signals. The designed CSA has the capability of compensating automatically up to 200 nA leakage current from the detector. The CR-(RC)2 shaper filters and shapes the output signal of the CSA. An equivalent input noise charge obtained from test is 275 e -+ 10 e-/pF. In this paper the prototype is presented for both its theoretical analysis and its test results.

  7. Spectrally tunable, temporally shaped parametric front end to seed high-energy Nd:glass laser systems

    DOE PAGES

    Dorrer, C.; Consentino, A.; Cuffney, R.; ...

    2017-10-18

    Here, we describe a parametric-amplification–based front end for seeding high-energy Nd:glass laser systems. The front end delivers up to 200 mJ by parametric amplification in 2.5-ns flat-in-time pulses tunable over more than 15 nm. Spectral tunability over a range larger than what is typically achieved by laser media at similar energy levels is implemented to investigate cross-beam energy transfer in multibeam target experiments. The front-end operation is simulated to explain the amplified signal’s sensitivity to the input pump and signal. A large variety of amplified waveforms are generated by closed-loop pulse shaping. Various properties and limitations of this front endmore » are discussed.« less

  8. Spectrally tunable, temporally shaped parametric front end to seed high-energy Nd:glass laser systems

    SciTech Connect

    Dorrer, C.; Consentino, A.; Cuffney, R.

    Here, we describe a parametric-amplification–based front end for seeding high-energy Nd:glass laser systems. The front end delivers up to 200 mJ by parametric amplification in 2.5-ns flat-in-time pulses tunable over more than 15 nm. Spectral tunability over a range larger than what is typically achieved by laser media at similar energy levels is implemented to investigate cross-beam energy transfer in multibeam target experiments. The front-end operation is simulated to explain the amplified signal’s sensitivity to the input pump and signal. A large variety of amplified waveforms are generated by closed-loop pulse shaping. Various properties and limitations of this front endmore » are discussed.« less

  9. The Virtual Learning Commons: Supporting the Fuzzy Front End of Scientific Research with Emerging Technologies

    NASA Astrophysics Data System (ADS)

    Pennington, D. D.; Gandara, A.; Gris, I.

    2012-12-01

    The Virtual Learning Commons (VLC), funded by the National Science Foundation Office of Cyberinfrastructure CI-Team Program, is a combination of Semantic Web, mash up, and social networking tools that supports knowledge sharing and innovation across scientific disciplines in research and education communities and networks. The explosion of scientific resources (data, models, algorithms, tools, and cyberinfrastructure) challenges the ability of researchers to be aware of resources that might benefit them. Even when aware, it can be difficult to understand enough about those resources to become potential adopters or re-users. Often scientific data and emerging technologies have little documentation, especially about the context of their use. The VLC tackles this challenge by providing mechanisms for individuals and groups of researchers to organize Web resources into virtual collections, and engage each other around those collections in order to a) learn about potentially relevant resources that are available; b) design research that leverages those resources; and c) develop initial work plans. The VLC aims to support the "fuzzy front end" of innovation, where novel ideas emerge and there is the greatest potential for impact on research design. It is during the fuzzy front end that conceptual collisions across disciplines and exposure to diverse perspectives provide opportunity for creative thinking that can lead to inventive outcomes. The VLC integrates Semantic Web functionality for structuring distributed information, mash up functionality for retrieving and displaying information, and social media for discussing/rating information. We are working to provide three views of information that support researchers in different ways: 1. Innovation Marketplace: supports users as they try to understand what research is being conducted, who is conducting it, where they are located, and who they collaborate with; 2. Conceptual Mapper: supports users as they organize their

  10. Measures of the environmental footprint of the front end of the nuclear fuel cycle

    SciTech Connect

    E. Schneider; B. Carlsen; E. Tavrides

    2013-11-01

    Previous estimates of environmental impacts associated with the front end of the nuclear fuel cycle (FEFC) have focused primarily on energy consumption and CO2 emissions. Results have varied widely. This work builds upon reports from operating facilities and other primary data sources to build a database of front end environmental impacts. This work also addresses land transformation and water withdrawals associated with the processes of the FEFC. These processes include uranium extraction, conversion, enrichment, fuel fabrication, depleted uranium disposition, and transportation. To allow summing the impacts across processes, all impacts were normalized per tonne of natural uranium mined as wellmore » as per MWh(e) of electricity produced, a more conventional unit for measuring environmental impacts that facilitates comparison with other studies. This conversion was based on mass balances and process efficiencies associated with the current once-through LWR fuel cycle. Total energy input is calculated at 8.7 x 10- 3 GJ(e)/MWh(e) of electricity and 5.9 x 10- 3 GJ(t)/MWh(e) of thermal energy. It is dominated by the energy required for uranium extraction, conversion to fluoride compound for subsequent enrichment, and enrichment. An estimate of the carbon footprint is made from the direct energy consumption at 1.7 kg CO2/MWh(e). Water use is likewise dominated by requirements of uranium extraction, totaling 154 L/MWh(e). Land use is calculated at 8 x 10- 3 m2/MWh(e), over 90% of which is due to uranium extraction. Quantified impacts are limited to those resulting from activities performed within the FEFC process facilities (i.e. within the plant gates). Energy embodied in material inputs such as process chemicals and fuel cladding is identified but not explicitly quantified in this study. Inclusion of indirect energy associated with embodied energy as well as construction and decommissioning of facilities could increase the FEFC energy intensity estimate by a factor

  11. Assessment of a Low-Power 65 nm CMOS Technology for Analog Front-End Design

    NASA Astrophysics Data System (ADS)

    Manghisoni, Massimo; Gaioni, Luigi; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca

    2014-02-01

    This work is concerned with the study of the analog properties of MOSFET devices belonging to a 65 nm CMOS technology with emphasis on intrinsic voltage gain and noise performance. This node appears to be a robust and promising solution to cope with the unprecedented requirements set by silicon vertex trackers in experiments upgrades and future colliders as well as by imaging detectors at light sources and free electron lasers. In this scaled-down technology, the impact of new dielectric materials and processing techniques on the analog behavior of MOSFETs has to be carefully evaluated. An inversion level design methodology has been adopted to analyze data obtained from device measurements and provide a powerful tool to establish design criteria for detector front-ends in this nanoscale CMOS process. A comparison with data coming from less scaled technologies, such as 90 nm and 130 nm nodes, is also provided and can be used to evaluate the resolution limits achievable for low-noise charge sensitive amplifiers in the 100 nm minimum feature size range.

  12. PCI/iRMX-Based Front-End Data Acquisition for the HT-7U Experiment

    NASA Astrophysics Data System (ADS)

    Shu, Yantai; Luo, Jiarong; Yan, Jianbing; Zhao, Feng; Zhang, Liang

    2004-06-01

    A PCI/iRMX-based front-end system is being designed to serve as data acquisition (DAQ) subsystem for the HT-7U superconducting tokamak. The diagnostic instruments are connected to four analog-to-digital converter (ADC) boards that are directly plugged into the peripheral component interconnect (PCI) bus of a personal computer (PC) running the iRMX real-time operating system. Each ADC board has eight channels. The sampling rate of each channel can be up to 125 K samples per second. The acquired data are directly transferred from the ADC board into the memory of the PC, and then transferred to servers through the network. As a testbed, one PCI/iRMX subsystem has been built and has acquired data from the existing HT-7 tokamak. The DAQ can easily support a wide range of pulse lengths, even matching extremely long pulse and steady-state operation. This paper describes the system design and performance evaluation in detail.

  13. A front-end readout Detector Board for the OpenPET electronics system

    NASA Astrophysics Data System (ADS)

    Choong, W.-S.; Abu-Nimeh, F.; Moses, W. W.; Peng, Q.; Vu, C. Q.; Wu, J.-Y.

    2015-08-01

    We present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, which allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is ``time stamped'' by a time-to-digital converter (TDC) implemented inside the FPGA . This digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.

  14. The front-end electronics of the LSPE-SWIPE experiment

    NASA Astrophysics Data System (ADS)

    Fontanelli, F.; Biasotti, M.; Bevilacqua, A.; Siccardi, F.

    2016-07-01

    The SWIPE detector of the Ballon Borne Mission LSPE (see e.g. the contribution of P. de Bernardis et al. in this conference) intends to measure the primordial 'B-mode' polarization of the Cosmic Microwave Background (CMB). For this scope microwave telescopes need sensitive cryogenic bolometers with an overall equivalent noise temperature in the nK range. The detector is a spiderweb bolometer based on transition edge sensor and followed by a SQUID to perform the signal readout. This contribution will concentrate on the design, description and first tests on the front-end electronics which processes the squid output (and controls it). The squid output is first amplified by a very low noise preamplifier based on a discrete JFET input differential architecture followed by a low noise CMOS operational amplifier. Equivalent input noise density is 0.6 nV/Hz and bandwidth extends up to at least 2 MHz. Both devices (JFET and CMOS amplifier) have been tested at liquid nitrogen. The second part of the contribution will discuss design and results of the control electronics, both the flux locked loop for the squid and the slow control chain to monitor and set up the system will be reviewed.

  15. A 32-channel front-end ASIC for GEM detectors used in beam monitoring applications

    NASA Astrophysics Data System (ADS)

    Ciciriello, F.; Altieri, P. R.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Lorusso, L.; Marzocca, C.; Matarrese, G.; Ranieri, A.; Stamerra, A.

    2017-11-01

    A multichannel, mixed-signal, front-end ASIC for GEM detectors, intended for beam monitoring in hadron therapy applications, has been designed and prototyped in a standard 0.35 μm CMOS technology. The analog channels are based on the classic CSA + shaper processing chain, followed by a peak detector which can work as an analog memory, to simplifiy the analog-to-digital conversion of the peak voltage of the output pulse, proportional to the energy of the detected event. The available hardware resources include an 8-bit A/D converter and a standard-cell digital part, which manages the read-out procedure, in sparse or serial mode. The ASIC is self-triggered and transfers energy and address data to the external DAQ via a fast 100 MHz LVDS link. Preliminary characterization results show that the non-linearity error is limited to 5% for a maximum input charge of about 70 fC, the measured ENC is about 1400e- and the time jitter of the trigger signal generated in response to an injected charge of 60 fC is close to 200 ps.

  16. A front-end readout Detector Board for the OpenPET electronics system

    DOE PAGES

    Choong, W. -S.; Abu-Nimeh, F.; Moses, W. W.; ...

    2015-08-12

    Here, we present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, whichmore » allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is "time stamped" by a time-to-digital converter (TDC) implemented inside the FPGA. In conclusion, this digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.« less

  17. A low power, low noise Programmable Analog Front End (PAFE) for biopotential measurements.

    PubMed

    Adimulam, Mahesh Kumar; Divya, A; Tejaswi, K; Srinivas, M B

    2017-07-01

    A low power Programmable Analog Front End (PAFE) for biopotential measurements is presented in this paper. The PAFE circuit processes electrocardiogram (ECG), electromyography (EMG) and electroencephalogram (EEG) signals with higher accuracy. It consists mainly of improved transconductance programmable gain instrumentational amplifier (PGIA), programmable high pass filter (PHPF), and second order low pass filter (SLPF). A 15-bit programmable 5-stage successive approximation analog-to-digital converter (SAR-ADC) is implemented for improving the performance, whose power consumption is reduced due to multiple stages and by OTA/Comparator sharing technique between the stages. The power consumption is further reduced by operating the analog portion of PAFE on 0.5V supply voltage and digital portion on 0.3V supply voltage generated internally through a voltage regulator. The proposed low power PAFE has been fabricated in 180nm standard CMOS process. The performance parameters of PAFE in 15-bit mode are found to be, gain of 31-70 dB, input referred noise of 1.15 μVrms, CMRR of 110 dB, PSRR of 104 dB, and signal-to-noise distortion ratio (SNDR) of 83.5dB. The power consumption of the design is 1.1 μW @ 0.5 V supply voltage and it occupies a core silicon area of 1.2 mm 2 .

  18. Monolithically Integrated SiGe/Si PIN-HBT Front-End Transimpedance Photoreceivers

    NASA Technical Reports Server (NTRS)

    Rieh, J.-S.; Qasaimeh, O.; Klotzkin, D.; Lu, L.-H.; Katehi, L. P. B.; Yang, K.; Bhattacharya, P.; Croke, E. T.

    1997-01-01

    The demand for monolithically integrated photoreceivers based on Si-based technology keeps increasing as low cost and high reliability products are required for the expanding commercial market. Higher speed and wider operating frequency range are expected when SiGe/Si heterojunction is introduced to the circuit design. In this paper, a monolithic SiGe/Si PIN-HBT front-end transimpedance photoreceiver is demonstrated for the first time. For this purpose, mesa-type SiGe/Si PIN-HBT technology was developed. Fabricated HBTs exhibit f(sub max) of 34 GHz with DC gain of 25. SiGe/Si PIN photodiodes, which share base and collector layers of HBTs, demonstrate responsivity of 0.3 A/W at lambda=850 nm and bandwidth of 450 MHz. Based on these devices, single- and dual-feedback transimpedance amplifiers were fabricated and they exhibited the bandwidth of 3.2 GHz and 3.3 GHz with the transimpedance gain of 45.2 dB(Omega) and 47.4 dB(Omega) respectively. Monolithically integrated single-feedback PIN-HBT photoreceivers were implemented and the bandwidth was measured to be approx. 0.5 GHz, which is limited by the bandwidth of PIN photodiodes.

  19. A low-power high-sensitivity analog front-end for PPG sensor.

    PubMed

    Binghui Lin; Atef, Mohamed; Guoxing Wang

    2017-07-01

    This paper presents a low-power analog front-end (AFE) photoplethysmography (PPG) sensor fabricated in 0.35 μm CMOS process. The AFE amplifies the weak photocurrent from the photodiode (PD) and converts it to a strong voltage at the output. In order to decrease the power consumption, the circuits are designed in subthreshold region; so the total biasing current of the AFE is 10 μ A. Since the large input DC photocurrent is a big issue for the PPG sensing circuit, we apply a DC photocurrent rejection technique by adding a DC current-cancellation loop to reject the large DC photocurrent up to 10 μA. In addition, a pseudo resistor is used to reduce the high-pass corner frequency below 0.5 Hz and Gm-C filter is adapted to reject the out-of-band noise higher than 16 Hz. For the whole sensor, the amplifier chain can achieve a total gain of 140 dBμ and an input integrated noise current of 68.87 pA rms up to 16 Hz.

  20. FPGA-Based Front-End Electronics for Positron Emission Tomography

    PubMed Central

    Haselman, Michael; DeWitt, Don; McDougald, Wendy; Lewellen, Thomas K.; Miyaoka, Robert; Hauck, Scott

    2010-01-01

    Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA’s low expense, ease of use, and selected dedicated hardware make them an ideal technology for a data acquisition system for positron emission tomography (PET) scanners. Our laboratory is producing a high-resolution, small-animal PET scanner that utilizes FPGAs as the core of the front-end electronics. For this next generation scanner, functions that are typically performed in dedicated circuits, or offline, are being migrated to the FPGA. This will not only simplify the electronics, but the features of modern FPGAs can be utilizes to add significant signal processing power to produce higher resolution images. In this paper two such processes, sub-clock rate pulse timing and event localization, will be discussed in detail. We show that timing performed in the FPGA can achieve a resolution that is suitable for small-animal scanners, and will outperform the analog version given a low enough sampling period for the ADC. We will also show that the position of events in the scanner can be determined in real time using a statistical positioning based algorithm. PMID:21961085

  1. Demonstration of an RF front-end based on GaN HEMT technology

    NASA Astrophysics Data System (ADS)

    Ture, Erdin; Musser, Markus; Hülsmann, Axel; Quay, Rüdiger; Ambacher, Oliver

    2017-05-01

    The effectiveness of the developed front-end on blocking the communication link of a commercial drone vehicle has been demonstrated in this work. A jamming approach has been taken in a broadband fashion by using GaN HEMT technology. Equipped with a modulated-signal generator, a broadband power amplifier, and an omni-directional antenna, the proposed system is capable of producing jamming signals in a very wide frequency range between 0.1 - 3 GHz. The maximum RF output power of the amplifier module has been software-limited to 27 dBm (500 mW), complying to the legal spectral regulations of the 2.4 GHz ISM band. In order to test the proof of concept, a real-world scenario has been prepared in which a commercially-available quadcopter UAV is flown in a controlled environment while the jammer system has been placed in a distance of about 10 m from the drone. It has been proven that the drone of interest can be neutralized as soon as it falls within the range of coverage (˜3 m) which endorses the promising potential of the broadband jamming approach.

  2. Charge-sensitive front-end electronics with operational amplifiers for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Födisch, P.; Berthel, M.; Lange, B.; Kirschke, T.; Enghardt, W.; Kaever, P.

    2016-09-01

    Cadmium zinc telluride (CdZnTe, CZT) radiation detectors are suitable for a variety of applications, due to their high spatial resolution and spectroscopic energy performance at room temperature. However, state-of-the-art detector systems require high-performance readout electronics. Though an application-specific integrated circuit (ASIC) is an adequate solution for the readout, requirements of high dynamic range and high throughput are not available in any commercial circuit. Consequently, the present study develops the analog front-end electronics with operational amplifiers for an 8×8 pixelated CZT detector. For this purpose, we modeled an electrical equivalent circuit of the CZT detector with the associated charge-sensitive amplifier (CSA). Based on a detailed network analysis, the circuit design is completed by numerical values for various features such as ballistic deficit, charge-to-voltage gain, rise time, and noise level. A verification of the performance is carried out by synthetic detector signals and a pixel detector. The experimental results with the pixel detector assembly and a 22Na radioactive source emphasize the depth dependence of the measured energy. After pulse processing with depth correction based on the fit of the weighting potential, the energy resolution is 2.2% (FWHM) for the 511 keV photopeak.

  3. Advances in Front-end Enabling Technologies for Thermal Infrared ` THz Torch' Wireless Communications

    NASA Astrophysics Data System (ADS)

    Hu, Fangjing; Lucyszyn, Stepan

    2016-09-01

    The thermal (emitted) infrared frequency bands (typically 20-40 and 60-100 THz) are best known for remote sensing applications that include temperature measurement (e.g. non-contacting thermometers and thermography), night vision and surveillance (e.g. ubiquitous motion sensing and target acquisition). This unregulated part of the electromagnetic spectrum also offers commercial opportunities for the development of short-range secure communications. The ` THz Torch' concept, which fundamentally exploits engineered blackbody radiation by partitioning thermally generated spectral radiance into pre-defined frequency channels, was recently demonstrated by the authors. The thermal radiation within each channel can be independently pulse-modulated, transmitted and detected, to create a robust form of short-range secure communications within the thermal infrared. In this paper, recent progress in the front-end enabling technologies associated with the THz Torch concept is reported. Fundamental limitations of this technology are discussed; possible engineering solutions for further improving the performance of such thermal-based wireless links are proposed and verified either experimentally or through numerical simulations. By exploring a raft of enabling technologies, significant enhancements to both data rate and transmission range can be expected. With good engineering solutions, the THz Torch concept can exploit nineteenth century physics with twentieth century multiplexing schemes for low-cost twenty-first century ubiquitous applications in security and defence.

  4. Web Monitoring of EOS Front-End Ground Operations, Science Downlinks and Level 0 Processing

    NASA Technical Reports Server (NTRS)

    Cordier, Guy R.; Wilkinson, Chris; McLemore, Bruce

    2008-01-01

    This paper addresses the efforts undertaken and the technology deployed to aggregate and distribute the metadata characterizing the real-time operations associated with NASA Earth Observing Systems (EOS) high-rate front-end systems and the science data collected at multiple ground stations and forwarded to the Goddard Space Flight Center for level 0 processing. Station operators, mission project management personnel, spacecraft flight operations personnel and data end-users for various EOS missions can retrieve the information at any time from any location having access to the internet. The users are distributed and the EOS systems are distributed but the centralized metadata accessed via an external web server provide an effective global and detailed view of the enterprise-wide events as they are happening. The data-driven architecture and the implementation of applied middleware technology, open source database, open source monitoring tools, and external web server converge nicely to fulfill the various needs of the enterprise. The timeliness and content of the information provided are key to making timely and correct decisions which reduce project risk and enhance overall customer satisfaction. The authors discuss security measures employed to limit access of data to authorized users only.

  5. Testing of Front End Electronics for 10ps Time of Flight Detectors

    NASA Astrophysics Data System (ADS)

    Kimball, Matthew; EIC PID Consortium Collaboration

    2016-09-01

    To fully achieve the physics goals of the future Electron Ion Collider (EIC), continued development of the detectors involved is needed. One area of research involves improving the timing resolution of Time of Flight (ToF) detectors from 100ps to 10ps. When the timing resolution of these ToF detectors is improved, better particle identification can be achieved. In addition, as ToF detectors are being constructed with ever improving timing resolution, the need to improve the high speed performance of the fast electronics used in their front-end electronics (FEE) increases. A series of careful measurements has been performed to investigate the performance and efficiency of each element in the FEE chain. The focus of these tests lies on the amplitude transmission efficiency of the high speed signals as a function of frequency, also known as the bandwidth. The components tested include balanced to unbalanced (balun) boards, signal pre-amps, and waveform digitizers. These tests were performed on individual components and with all elements connected over a frequency range of 1MHz to 1GHz. The results of these tests will be presented. This research was supported by US DOE MENP Grant DE-FG02-03ER41243.

  6. Comparison of a Skidder and Front-End Loader for Primary Transport of Short-Rotation Trees

    Treesearch

    Raffaele Spinelli; Bruce R. Hartsough

    1999-01-01

    We time-studied a Cat 950F and a Cat 528 grapple skidder as extraction devices for moving bunched whole trees to a landing in a short rotation eucalyptus plantation. The front-end loader was 40 to 60% more productive than the grapple skidder, depending on extraction distance. Alternatively, the single loader could both extract trees and handle the landing duties such...

  7. A 1.2-V CMOS front-end for LTE direct conversion SAW-less receiver

    NASA Astrophysics Data System (ADS)

    Riyan, Wang; Jiwei, Huang; Zhengping, Li; Weifeng, Zhang; Longyue, Zeng

    2012-03-01

    A CMOS RF front-end for the long-term evolution (LTE) direct conversion receiver is presented. With a low noise transconductance amplifier (LNA), current commutating passive mixer and transimpedance operational amplifier (TIA), the RF front-end structure enables high-integration, high linearity and simple frequency planning for LTE multi-band applications. Large variable gain is achieved using current-steering transconductance stages. A current commutating passive mixer with 25% duty-cycle LO improves gain, noise and linearity. A direct coupled current-input filter (DCF) is employed to suppress the out-of-band interferer. Fabricated in a 0.13-μm CMOS process, the RF front-end achieves a 45 dB conversion voltage gain, 2.7 dB NF, -7 dBm IIP3, and +60 dBm IIP2 with calibration from 2.3 to 2.7 GHz. The total RF front end with divider draws 40 mA from a single 1.2-V supply.

  8. 75 FR 16819 - Notice of Proposed Information Collection for Public Comment Civil Rights Front End and Limited...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-04-02

    ... Information Collection for Public Comment Civil Rights Front End and Limited Monitoring Review AGENCY: Office... Office of Management and Budget (OMB) for review, as required by the Paperwork Reduction Act. The...-free Federal Information Relay Service at 800-877-8339. (Other than the HUD USER information line and...

  9. How Front-End Loading Contributes to Creating and Sustaining the Theory-Practice Gap in Higher Education Programs

    ERIC Educational Resources Information Center

    Allen, Jeanne Maree

    2011-01-01

    In this paper, I show how Mead's theory of emergence can prove explanatory in how the theory-practice gap is co-created and sustained in "front-end loading" university programs. Taking teacher education as an exemplar, I argue that trainee teachers encounter different and oft-times conflicting environmental, social and cultural conditions in the…

  10. High-Frequency Wireless Communications System: 2.45-GHz Front-End Circuit and System Integration

    ERIC Educational Resources Information Center

    Chen, M.-H.; Huang, M.-C.; Ting, Y.-C.; Chen, H.-H.; Li, T.-L.

    2010-01-01

    In this article, a course on high-frequency wireless communications systems is presented. With the 145-MHz baseband subsystem available from a prerequisite course, the present course emphasizes the design and implementation of the 2.45-GHz front-end subsystem as well as system integration issues. In this curriculum, the 2.45-GHz front-end…

  11. A 0.18 μm biosensor front-end based on 1/f noise, distortion cancelation and chopper stabilization techniques.

    PubMed

    Balasubramanian, Viswanathan; Ruedi, Pierre-Francois; Temiz, Yuksel; Ferretti, Anna; Guiducci, Carlotta; Enz

    2013-10-01

    This paper presents a novel sensor front-end circuit that addresses the issues of 1/f noise and distortion in a unique way by using canceling techniques. The proposed front-end is a fully differential transimpedance amplifier (TIA) targeted for current mode electrochemical biosensing applications. In this paper, we discuss the architecture of this canceling based front-end and the optimization methods followed for achieving low noise, low distortion performance at minimum current consumption are presented. To validate the employed canceling based front-end, it has been realized in a 0.18 μm CMOS process and the characterization results are presented. The front-end has also been tested as part of a complete wireless sensing system and the cyclic voltammetry (CV) test results from electrochemical sensors are provided. Overall current consumption in the front-end is 50 μA while operating on a 1.8 V supply.

  12. A front-end wafer-level microsystem packaging technique with micro-cap array

    NASA Astrophysics Data System (ADS)

    Chiang, Yuh-Min

    2002-09-01

    The back-end packaging process is the remaining challenge for the micromachining industry to commercialize microsystem technology (MST) devices at low cost. This dissertation presents a novel wafer level protection technique as a final step of the front-end fabrication process for MSTs. It facilitates improved manufacturing throughput and automation in package assembly, wafer level testing of devices, and enhanced device performance. The method involves the use of a wafer-sized micro-cap array, which consists of an assortment of small caps micro-molded onto a material with adjustable shapes and sizes to serve as protective structures against the hostile environments during packaging. The micro-cap array is first constructed by a micromachining process with micro-molding technique, then sealed to the device wafer at wafer level. Epoxy-based wafer-level micro cap array has been successfully fabricated and showed good compatibility with conventional back-end packaging processes. An adhesive transfer technique was demonstrated to seal the micro cap array with a MEMS device wafer. No damage or gross leak was observed while wafer dicing or later during a gross leak test. Applications of the micro cap array are demonstrated on MEMS, microactuators fabricated using CRONOS MUMPS process. Depending on the application needs, the micro-molded cap can be designed and modified to facilitate additional component functions, such as optical, electrical, mechanical, and chemical functions, which are not easily achieved in the device by traditional means. Successful fabrication of a micro cap array comprised with microlenses can provide active functions as well as passive protection. An optical tweezer array could be one possibility for applications of a micro cap with microlenses. The micro cap itself could serve as micro well for DNA or bacteria amplification as well.

  13. A 14-bit 40-MHz analog front end for CCD application

    NASA Astrophysics Data System (ADS)

    Jingyu, Wang; Zhangming, Zhu; Shubin, Liu

    2016-06-01

    A 14-bit, 40-MHz analog front end (AFE) for CCD scanners is analyzed and designed. The proposed system incorporates a digitally controlled wideband variable gain amplifier (VGA) with nearly 42 dB gain range, a correlated double sampler (CDS) with programmable gain functionality, a 14-bit analog-to-digital converter and a programmable timing core. To achieve the maximum dynamic range, the VGA proposed here can linearly amplify the input signal in a gain range from -1.08 to 41.06 dB in 6.02 dB step with a constant bandwidth. A novel CDS takes image information out of noise, and further amplifies the signal accurately in a gain range from 0 to 18 dB in 0.035 dB step. A 14-bit ADC is adopted to quantify the analog signal with optimization in power and linearity. An internal timing core can provide flexible timing for CCD arrays, CDS and ADC. The proposed AFE was fabricated in SMIC 0.18 μm CMOS process. The whole circuit occupied an active area of 2.8 × 4.8 mm2 and consumed 360 mW. When the frequency of input signal is 6.069 MHz, and the sampling frequency is 40 MHz, the signal to noise and distortion (SNDR) is 70.3 dB, the effective number of bits is 11.39 bit. Project supported by the National Natural Science Foundation of China (Nos. 61234002, 61322405, 61306044, 61376033), the National High-Tech Program of China (No. 2013AA014103), and the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory (No. ZHD201302).

  14. First results of the front-end ASIC for the strip detector of the PANDA MVD

    NASA Astrophysics Data System (ADS)

    Quagli, T.; Brinkmann, K.-T.; Calvo, D.; Di Pietro, V.; Lai, A.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Wheadon, R.; Zambanini, A.

    2017-03-01

    PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.

  15. Front-end electronics for PWO-based PHOS calorimeter of ALICE

    NASA Astrophysics Data System (ADS)

    Muller, Hans; Budnikov, Dmitry; Ippolitov, Mikhail; Li, Qingxia; Manko, Vladislav; Pimenta, Rui; Rohrich, Dieter; Sibiryak, Iouri; Skaali, Bernhard; Vinogradov, Alexandre

    2006-11-01

    The electromagnetic Photon Spectrometer (PHOS) of ALICE consists of five modules with 56×64 PWO crystals, operated at -25 °C. Glued to each crystal are APD diodes which amplify a lightyield of 4.4 photoelectrons/MeV, followed by charge-sensitive pre-amplifiers with a charge conversion gain of ca. 1 V/pC. We describe our new 32-channel shaper/digitizer and readout electronics for gain-programmable photodiodes. These Front-End Electronics (FEE) cards are installed below the crystals in an isolated warm volume in geometrical correspondence to 2×16 crystal rows per card. With a total detector capacitance of 100 pF and a noise level of 3 MeV, the FEEs cover a 14 bit dynamic range from 5 MeV to 80 GeV. The low noise level is achieved by operating the APDs and preamplifiers at low temperature and by applying a relatively long shaping time of 1 μs. The offline timing resolution, obtained via a Gamma-2 fit is less than 2 ns. The second-order, dual-gain shapers produce semi-Gaussian output for 10 bit ADCs with embedded multi-event buffers. A Readout Control Unit (RCU) masters data readout with address-mapped access to the event-buffers and controls registers via a custom bus which interconnects up to 14 FEE cards. Programmable bias voltage controllers on the FEE cards allow for very precise gain adjustment of each individual APD. Being co-designed with the TRU trigger cards, each FEE card generates eight fast signal sums (2×2 crystals) as input to the TRU. FPGA-based algorithms generate level-0 and level-1 trigger decisions at 40 MHz and allow PHOS also to operate in self-triggered mode. Inside each PHOS module there are 112 FEE and 8 TRU cards which dissipate ca. 1 kW heat which is extracted via a water cooling system.

  16. Low power analog front-end electronics in deep submicrometer CMOS technology based on gain enhancement techniques

    NASA Astrophysics Data System (ADS)

    Gómez-Galán, J. A.; Sánchez-Rodríguez, T.; Sánchez-Raya, M.; Martel, I.; López-Martín, A.; Carvajal, R. G.; Ramírez-Angulo, J.

    2014-06-01

    This paper evaluates the design of front-end electronics in modern technologies to be used in a new generation of heavy ion detectors—HYDE (FAIR, Germany)—proposing novel architectures to achieve high gain in a low voltage environment. As conventional topologies of operational amplifiers in modern CMOS processes show limitations in terms of gain, novel approaches must be raised. The work addresses the design using transistors with channel length of no more than double the feature size and a supply voltage as low as 1.2 V. A front-end system has been fabricated in a 90 nm process including gain boosting techniques based on regulated cascode circuits. The analog channel has been optimized to match a detector capacitance of 5 pF and exhibits a good performance in terms of gain, speed, linearity and power consumption.

  17. Front-end antenna system design for the ITER low-field-side reflectometer system using GENRAY ray tracing.

    PubMed

    Wang, G; Doyle, E J; Peebles, W A

    2016-11-01

    A monostatic antenna array arrangement has been designed for the microwave front-end of the ITER low-field-side reflectometer (LFSR) system. This paper presents details of the antenna coupling coefficient analyses performed using GENRAY, a 3-D ray tracing code, to evaluate the plasma height accommodation capability of such an antenna array design. Utilizing modeled data for the plasma equilibrium and profiles for the ITER baseline and half-field scenarios, a design study was performed for measurement locations varying from the plasma edge to inside the top of the pedestal. A front-end antenna configuration is recommended for the ITER LFSR system based on the results of this coupling analysis.

  18. Development of a data management front-end for use with a LANDSAT-based information system

    NASA Technical Reports Server (NTRS)

    Turner, B. J.

    1982-01-01

    The development and implementation of a data management front-end system for use with a LANDSAT based information system that facilitates the processsing of both LANDSAT and ancillary data was examined. The final tasks, reported on here, involved; (1) the implementation of the VICAR image processing software system at Penn State and the development of a user-friendly front-end for this system; (2) the implementation of JPL-developed software based on VICAR, for mosaicking LANDSAT scenes; (3) the creation and storage of a mosiac of 1981 summer LANDSAT data for the entire state of Pennsylvania; (4) demonstrations of the defoliation assessment procedure for Perry and Centre Counties, and presentation of the results at the 1982 National Gypsy Moth Review Meeting, and (5) the training of Pennsylvania Bureau of Forestry personnel in the use of the defoliation analysis system.

  19. Coupling Front-End Separations, Ion Mobility Spectrometry, and Mass Spectrometry For Enhanced Multidimensional Biological and Environmental Analyses

    PubMed Central

    Zheng, Xueyun; Wojcik, Roza; Zhang, Xing; Ibrahim, Yehia M.; Burnum-Johnson, Kristin E.; Orton, Daniel J.; Monroe, Matthew E.; Moore, Ronald J.; Smith, Richard D.; Baker, Erin S.

    2017-01-01

    Ion mobility spectrometry (IMS) is a widely used analytical technique for rapid molecular separations in the gas phase. Though IMS alone is useful, its coupling with mass spectrometry (MS) and front-end separations is extremely beneficial for increasing measurement sensitivity, peak capacity of complex mixtures, and the scope of molecular information available from biological and environmental sample analyses. In fact, multiple disease screening and environmental evaluations have illustrated that the IMS-based multidimensional separations extract information that cannot be acquired with each technique individually. This review highlights three-dimensional separations using IMS-MS in conjunction with a range of front-end techniques, such as gas chromatography, supercritical fluid chromatography, liquid chromatography, solid-phase extractions, capillary electrophoresis, field asymmetric ion mobility spectrometry, and microfluidic devices. The origination, current state, various applications, and future capabilities of these multidimensional approaches are described in detail to provide insight into their uses and benefits. PMID:28301728

  20. Integrated front-end electronics in a detector compatible process: source-follower and charge-sensitive preamplifier configurations

    NASA Astrophysics Data System (ADS)

    Ratti, Lodovico; Manghisoni, Massimo; Re, Valerio; Speziali, Valeria

    2001-12-01

    This study is concerned with the simulation and design of low-noise front-end electronics monolithically integrated on the same high-resistivity substrate as multielectrode silicon detectors, in a process made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST) of Trento, Italy. The integrated front-end solutions described in this paper use N-channel JFETs as basic elements. The first one is based upon an all-NJFET charge preamplifier designed to match detector capacitances of a few picofarads and available in both a resistive and a non resistive feedback configuration. In the second solution, a single NJFET in the source-follower configuration is connected to the detector, while its source is wired to an external readout channel through an integrated capacitor.

  1. Front-end circuit for position sensitive silicon and vacuum tube photomultipliers with gain control and depth of interaction measurement

    NASA Astrophysics Data System (ADS)

    Herrero, Vicente; Colom, Ricardo; Gadea, Rafael; Lerche, Christoph W.; Cerdá, Joaquín; Sebastiá, Ángel; Benlloch, José M.

    2007-06-01

    Silicon Photomultipliers, though still under development for mass production, may be an alternative to traditional Vacuum Photomultipliers Tubes (VPMT). As a consequence, electronic front-ends initially designed for VPMT will need to be modified. In this simulation, an improved architecture is presented which is able to obtain impact position and depth of interaction of a gamma ray within a continuous scintillation crystal, using either kind of PM. A current sensitive preamplifier stage with individual gain adjustment interfaces the multi-anode PM outputs with a current division resistor network. The preamplifier stage allows to improve front-end processing delay and temporal resolution behavior as well as to increase impact position calculation resolution. Depth of interaction (DOI) is calculated from the width of the scintillation light distribution, which is related to the sum of voltages in resistor network input nodes. This operation is done by means of a high-speed current mode scheme.

  2. 49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b... and allow for the application of dynamic performance criteria to cab cars and MU locomotives as an...

  3. 49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

  4. 49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

  5. 49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

  6. 49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

  7. Microwave Photonic Architecture for Direction Finding of LPI Emitters: Front End Analog Circuit Design and Component Characterization

    DTIC Science & Technology

    2016-09-01

    design to control the phase shifters was complex, and the calibration process was time consuming. During the redesign process, we carried out...signals in time domain with a maximum sampling frequency of 20 Giga samples per second. In the previous tests of the design , the performance of...PHOTONIC ARCHITECTURE FOR DIRECTION FINDING OF LPI EMITTERS: FRONT-END ANALOG CIRCUIT DESIGN AND COMPONENT CHARACTERIZATION by Chew K. Tan

  8. Modeling of an 8-12 GHz receiver front-end based on an in-line MEMS frequency discriminator

    NASA Astrophysics Data System (ADS)

    Chu, Chenlei; Liao, Xiaoping

    2018-06-01

    This paper focuses on the modeling of an 8-12 GHz RF (radio frequency) receiver front-end based on an in-line MEMS (microelectromechanical systems) frequency discriminator. Actually, the frequency detection is realized by measuring the output dc thermal voltage generated by the MEMS thermoelectric power sensor. Based on this thermal voltage, it has a great potential to tune the resonant frequency of the VCO (voltage controlled oscillator) in the RF receiver front-end application. The equivalent circuit model of the in-line frequency discriminator is established and the measurement verification is also implemented. Measurement and simulation results show that the output dc thermal voltage has a nearly linear relation with frequency. A new construction of RF receiver front-end is then obtained by connecting the in-line frequency discriminator with the voltage controlling port of VCO. Lastly, a systemic simulation is processed by computer-aided software and the real-time simulation waveform at each key point is observed clearly.

  9. A time-based front-end ASIC for the silicon micro strip sensors of the bar PANDA Micro Vertex Detector

    NASA Astrophysics Data System (ADS)

    Di Pietro, V.; Brinkmann, K.-Th.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Zambanini, A.

    2016-03-01

    The bar PANDA (Antiproton Annihilation at Darmstadt) experiment foresees many detectors for tracking, particle identification and calorimetry. Among them, the innermost is the MVD (Micro Vertex Detector) responsible for a precise tracking and the reconstruction of secondary vertices. This detector will be built from both hybrid pixel (two inner barrels and six forward disks) and double-sided micro strip (two outer barrels and outer rim of the last two disks) silicon sensors. A time-based approach has been chosen for the readout ASIC of the strip sensors. The PASTA (bar PANDA Strip ASIC) chip aims at high resolution time-stamping and charge information through the Time over Threshold (ToT) technique. It benefits from a Time to Digital Converter (TDC) allowing a time bin width down to 50 ps. The analog front-end was designed to serve both n-type and p-type strips and the performed simulations show remarkable performances in terms of linearity and electronic noise. The TDC consists of an analog interpolator, a digital local controller, and a digital global controller as the common back-end for all of the 64 channels.

  10. The design of CMOS general-purpose analog front-end circuit with tunable gain and bandwidth for biopotential signal recording systems.

    PubMed

    Chen, Wei-Ming; Yang, Wen-Chia; Tsai, Tzung-Yun; Chiueh, Herming; Wu, Chung-Yu

    2011-01-01

    In this paper an 8-channel CMOS general-purpose analog front-end (AFE) circuit with tunable gain and bandwidth for biopotential signal recording systems is presented. The proposed AFE consists of eight chopper stabilized pre-amplifiers, an 8-to-1 analog multiplexer, and a programmable gain amplifier. It can be used to sense and amplify different kinds of biopotential signals, such as electrocorticogram (ECoG), electrocardiogram (ECG) and electromyogram (EMG). The AFE chip is designed and fabricated in 0.18-μm CMOS technology. The measured maximum gain of AFE is 60.8 dB. The low cutoff frequency can achieve as low as 0.8 Hz and high cutoff frequency can be adjusted from 200 Hz to 10 kHz to suit for different kinds of biopotential signals. The measured input-referred noise is 0.9 μV(rms), with the power consumption of 18μW per channel at 1.8-V power supply. And the noise efficiency factor (NEF) is only 1.3 for pre-amplifier.

  11. Locoregional treatment and overall survival of men with T1a,b,cN0M0 breast cancer: A population-based study.

    PubMed

    Leone, José Pablo; Leone, Julieta; Zwenger, Ariel Osvaldo; Iturbe, Julián; Leone, Bernardo Amadeo; Vallejo, Carlos Teodoro

    2017-01-01

    Male breast cancer (MaBC) is an understudied disease; information about locoregional treatment and outcomes in patients with early stage is unknown. We aimed to analyse patient characteristics, locoregional treatment and overall survival (OS) of T1a,b,cN0M0 male breast cancer. We evaluated men with T1a,b,cN0M0 breast cancer reported to Surveillance, Epidemiology, and End Results program from 1988 to 2012. Univariate and multivariate analyses were performed to determine the effect of each variable on OS. We included 1263 patients. Median age was 66 years (range 27-103). Median follow-up was 62 months (range 1-294). OS at 5 and 10 years were 85.1% and 66.5%, respectively. Distribution according to tumour sub-stage was: T1a 6.5%, T1b 20.7% and T1c 72.8%. Mastectomy was performed in >74% of patients of each tumour size group and overall 44.1% had >5 lymph nodes examined (LNE). Univariate analysis showed that patients with T1c, no surgery and 0 LNE had worse prognosis. In multivariate analysis, older age (hazard ratio [HR] 11.09), grade 3/4 tumours (HR 1.7), no surgery (HR 3.3), 0 LNE (HR 5.1) and unmarried patients (HR 1.7) had significantly shorter OS. There were no differences in OS between breast conservation versus mastectomy and 1-5 LNE versus > 5 LNE. Men with early breast cancer have a favourable OS. However, older age, higher grade, no breast surgery, no LNE and unmarried status emerged as poor prognostic characteristics. Efforts to decrease the high rates of mastectomy and extensive LNE should be taken given similar OS observed with breast conservation and 1-5 LNE, respectively. Copyright © 2016 Elsevier Ltd. All rights reserved.

  12. A virtual test system representing the distribution of pedestrian impact configurations for future vehicle front-end optimization.

    PubMed

    Li, Guibing; Yang, Jikuang; Simms, Ciaran

    2016-07-03

    The purpose of this study is to define a computationally efficient virtual test system (VTS) to assess the aggressivity of vehicle front-end designs to pedestrians considering the distribution of pedestrian impact configurations for future vehicle front-end optimization. The VTS should represent real-world impact configurations in terms of the distribution of vehicle impact speeds, pedestrian walking speeds, pedestrian gait, and pedestrian height. The distribution of injuries as a function of body region, vehicle impact speed, and pedestrian size produced using this VTS should match the distribution of injuries observed in the accident data. The VTS should have the predictive ability to distinguish the aggressivity of different vehicle front-end designs to pedestrians. The proposed VTS includes 2 parts: a simulation test sample (STS) and an injury weighting system (IWS). The STS was defined based on MADYMO multibody vehicle to pedestrian impact simulations accounting for the range of vehicle impact speeds, pedestrian heights, pedestrian gait, and walking speed to represent real world impact configurations using the Pedestrian Crash Data Study (PCDS) and anthropometric data. In total 1,300 impact configurations were accounted for in the STS. Three vehicle shapes were then tested using the STS. The IWS was developed to weight the predicted injuries in the STS using the estimated proportion of each impact configuration in the PCDS accident data. A weighted injury number (WIN) was defined as the resulting output of the VTS. The WIN is the weighted number of average Abbreviated Injury Scale (AIS) 2+ injuries recorded per impact simulation in the STS. Then the predictive capability of the VTS was evaluated by comparing the distributions of AIS 2+ injuries to different pedestrian body regions and heights, as well as vehicle types and impact speeds, with that from the PCDS database. Further, a parametric analysis was performed with the VTS to assess the sensitivity of the

  13. System-level considerations for the front-end readout ASIC in the CBM experiment from the power supply perspective

    NASA Astrophysics Data System (ADS)

    Kasinski, K.; Koczon, P.; Ayet, S.; Löchner, S.; Schmidt, C. J.

    2017-03-01

    New fixed target experiments using high intensity beams with energy up to 10 AGeV from the SIS100 synchrotron presently being constructed at FAIR/GSI are under preparation. Most of the readout electronics and power supplies are expected to be exposed to a very high flux of nuclear reaction products and have to be radiation tolerant up to 3 MRad (TID) and sustain up to 1014/cm2 of 1 MeV neutron equivalent in their life time. Moreover, the mostly minimum ionising particles under investigation leave very little signal in the sensors. Therefore very low noise level amplitude measurements are required by the front-end electronics for effective tracking. Sensor and interconnecting micro-cable capacitance and series resistance in conjunction with intrinsic noise of the charge sensitive amplifier are dominant noise sources in the system. However, the single-ended architecture of the amplifiers employed for the charge processing channels implies a potential problem with noise contributions from power supply sources. Strict system-level constraints leave very little freedom in selecting a power supply structure optimal with respect to: power efficiency, cooling capabilities and power density on modules, but also noise injection to the front-end via the power supply lines. Design of the power supply and distribution system of the Silicon Tracking System in the CBM experiment together with details on the front-end ASICs (STS -XYTER2) and measurement results of power supply and conditioning electronics (selected DC/DC converter and LDO regulators) are presented.

  14. Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

    SciTech Connect

    Gaioni, L.; Braga, D.; Christian, D.

    This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided

  15. Front-end receiver electronics for high-frequency monolithic CMUT-on-CMOS imaging arrays.

    PubMed

    Gurun, Gokce; Hasler, Paul; Degertekin, F

    2011-08-01

    This paper describes the design of CMOS receiver electronics for monolithic integration with capacitive micromachined ultrasonic transducer (CMUT) arrays for highfrequency intravascular ultrasound imaging. A custom 8-inch (20-cm) wafer is fabricated in a 0.35-μm two-poly, four-metal CMOS process and then CMUT arrays are built on top of the application specific integrated circuits (ASICs) on the wafer. We discuss advantages of the single-chip CMUT-on-CMOS approach in terms of receive sensitivity and SNR. Low-noise and high-gain design of a transimpedance amplifier (TIA) optimized for a forward-looking volumetric-imaging CMUT array element is discussed as a challenging design example. Amplifier gain, bandwidth, dynamic range, and power consumption trade-offs are discussed in detail. With minimized parasitics provided by the CMUT-on-CMOS approach, the optimized TIA design achieves a 90 fA/√Hz input-referred current noise, which is less than the thermal-mechanical noise of the CMUT element. We show successful system operation with a pulseecho measurement. Transducer-noise-dominated detection in immersion is also demonstrated through output noise spectrum measurement of the integrated system at different CMUT bias voltages. A noise figure of 1.8 dB is obtained in the designed CMUT bandwidth of 10 to 20 MHz.

  16. A bipolar analog front-end integrated circuit for the SDC silicon tracker

    NASA Astrophysics Data System (ADS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1993-11-01

    A low noise, low power, high bandwidth, radiation hard, silicon bipolar transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using CBIC-U2, 4 GHz f(sub T) complementary bipolar technology. Each channel contains the following functions: low noise preamplification, pulse shaping, and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 micron pitch double-sided silicon strip detector. The chip measures 6.8 mm by 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to four times the noise level, a 16 nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Phi = 10(exp 14) protons/sq cm have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process.

  17. Coupling Front-End Separations, Ion Mobility Spectrometry, and Mass Spectrometry For Enhanced Multidimensional Biological and Environmental Analyses

    SciTech Connect

    Zheng, Xueyun; Wojcik, Roza; Zhang, Xing

    Ion mobility spectrometry (IMS) is a widely used analytical technique for rapid molecular separations in the gas phase. IMS alone is useful, but its coupling with mass spectrometry (MS) and front-end separations has been extremely beneficial for increasing measurement sensitivity, peak capacity of complex mixtures, and the scope of molecular information in biological and environmental sample analyses. Multiple studies in disease screening and environmental evaluations have even shown these IMS-based multidimensional separations extract information not possible with each technique individually. This review highlights 3-dimensional separations using IMS-MS in conjunction with a range of front-end techniques, such as gas chromatography (GC),more » supercritical fluid chromatography (SFC), liquid chromatography (LC), solid phase extractions (SPE), capillary electrophoresis (CE), field asymmetric ion mobility spectrometry (FAIMS), and microfluidic devices. The origination, current state, various applications, and future capabilities for these multidimensional approaches are described to provide insight into the utility and potential of each technique.« less

  18. Tunable compensation of GVD-induced FM-AM conversion in the front end of high-power lasers.

    PubMed

    Li, Rao; Fan, Wei; Jiang, Youen; Qiao, Zhi; Zhang, Peng; Lin, Zunqi

    2017-02-01

    Group velocity dispersion (GVD) is one of the main factors leading to frequency modulation (FM) to amplitude modulation (AM) conversion in the front end of high-power lasers. In order to compensate the FM-AM modulation, the influence of GVD, which is mainly induced by the phase filter effect, is theoretically investigated. Based on the theoretical analysis, a high-precision, high-stability, tunable GVD compensatory using gratings is designed and experimentally demonstrated. The results indicate that the compensator can be implemented in high-power laser facilities to compensate the GVD of fiber with a length between 200-500 m when the bandwidth of a phase-modulated laser is 0.34 nm or 0.58 nm and the central wavelength is in the range of 1052.3217-1053.6008 nm. Due to the linear relationship between the dispersion and the spacing distance of the gratings, the compensator can easily achieve closed-loop feedback controlling. The proposed GVD compensator promises significant applications in large laser facilities, especially in the future polarizing fiber front end of high-power lasers.

  19. An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

    NASA Astrophysics Data System (ADS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1994-08-01

    A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker The IC was designed and tested at LBL and was fabricated using AT&T's CBIC-U2, 4 GHz f/sub /spl tau// complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 /spl mu/m pitch double-sided silicon strip detector. The chip measures 6.8 mm/spl times/3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. RMS at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a /spl Phi/=10/sup 14/ protons/cm/sup 2/ have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process.

  20. A Front-End electronics board for single photo-electron timing and charge from MaPMT

    NASA Astrophysics Data System (ADS)

    Giordano, F.; Breton, D.; Beigbeder, C.; De Robertis, G.; Fusco, P.; Gargano, F.; Liuzzi, R.; Loparco, F.; Mazziotta, M. N.; Rizzi, V.; Tocut, V.

    2013-08-01

    A Front-End (FE) design based on commercial operational amplifiers has been developed to read-out signals from a Multianode PhotoMultiplier Tube (MaPMT). The overall design has been optimised for single photo-electron signal from the Hamamatsu H8500. The signal is collected by a current sensitive preamplifier and then it is fed into both a ECL fast discriminator and a shaper for analog output readout in differential mode. The analog signal and the digital gates are then registered on VME ADC and TDC modules respectively. Performances in terms of linearity, gain and timing resolution will be discussed, presenting results obtained on a test bench with differentiated step voltage inputs and also with a prototype electronic board plugged into the H8500 PMT illuminated by a picosecond laser.

  1. A Nonlinearity Mitigation Method for a Broadband RF Front-End in a Sensor Based on Best Delay Searching

    PubMed Central

    Zhao, Wen; Ma, Hong; Zhang, Hua; Jin, Jiang; Dai, Gang; Hu, Lin

    2017-01-01

    The cognitive radio wireless sensor network (CR-WSN) is experiencing more and more attention for its capacity to automatically extract broadband instantaneous radio environment information. Obtaining sufficient linearity and spurious-free dynamic range (SFDR) is a significant premise of guaranteeing sensing performance which, however, usually suffers from the nonlinear distortion coming from the broadband radio frequency (RF) front-end in the sensor node. Moreover, unlike other existing methods, the joint effect of non-constant group delay distortion and nonlinear distortion is discussed, and its corresponding solution is provided in this paper. After that, the nonlinearity mitigation architecture based on best delay searching is proposed. Finally, verification experiments, both on simulation signals and signals from real-world measurement, are conducted and discussed. The achieved results demonstrate that with best delay searching, nonlinear distortion can be alleviated significantly and, in this way, spectrum sensing performance is more reliable and accurate. PMID:28956860

  2. Characteristics and Classification of Solid Radioactive Waste From the Front-End of the Uranium Fuel Cycle.

    PubMed

    Liu, Xinhua; Wei, Fangxin; Xu, Chunyan; Liao, Yunxuan; Jiang, Jing

    2015-09-01

    The proper classification of radioactive waste is the basis upon which to define its disposal method. In view of differences between waste containing artificial radionuclides and waste with naturally occurring radionuclides, the scientific definition of the properties of waste arising from the front end of the uranium fuel cycle (UF Waste) is the key to dispose of such waste. This paper is intended to introduce briefly the policy and practice to dispose of such waste in China and some foreign countries, explore how to solve the dilemma facing such waste, analyze in detail the compositions and properties of such waste, and finally put forward a new concept of classifying such waste as waste with naturally occurring radionuclides.

  3. A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection.

    PubMed

    Wong, A K Y; Kong-Pang Pun; Yuan-Ting Zhang; Ka Nang Leung

    2008-12-01

    A micro-power CMOS front-end, consisting of a transimpedance amplifier (TIA) and an ultralow cutoff frequency lowpass filter for the acquisition of photoplethysmographic signal (PPG) is presented. Robust DC photocurrent rejection for the pulsed signal source is achieved through a sample-and-hold stage in the feed-forward signal path and an error amplifier in the feedback path. Ultra-low cutoff frequency of the filter is achieved with a proposed technique that incorporates a pair of current-steering transistors that increases the effective filter capacitance. The design was realized in a 0.35-mum CMOS technology. It consumes 600 muW at 2.5 V, rejects DC photocurrent ranged from 100 nA to 53.6 muA, and achieves lower-band and upper-band - 3-dB cutoff frequencies of 0.46 and 2.8 Hz, respectively.

  4. WNA's worldwide overview on front-end nuclear fuel cycle growth and health, safety and environmental issues.

    PubMed

    Saint-Pierre, Sylvain; Kidd, Steve

    2011-01-01

    This paper presents the WNA's worldwide nuclear industry overview on the anticipated growth of the front-end nuclear fuel cycle from uranium mining to conversion and enrichment, and on the related key health, safety, and environmental (HSE) issues and challenges. It also puts an emphasis on uranium mining in new producing countries with insufficiently developed regulatory regimes that pose greater HSE concerns. It introduces the new WNA policy on uranium mining: Sustaining Global Best Practices in Uranium Mining and Processing-Principles for Managing Radiation, Health and Safety and the Environment, which is an outgrowth of an International Atomic Energy Agency (IAEA) cooperation project that closely involved industry and governmental experts in uranium mining from around the world. Copyright © 2010 Health Physics Society

  5. A reconfigurable medically cohesive biomedical front-end with ΣΔ ADC in 0.18µm CMOS.

    PubMed

    Jha, Pankaj; Patra, Pravanjan; Naik, Jairaj; Acharya, Amit; Rajalakshmi, P; Singh, Shiv Govind; Dutta, Ashudeb

    2015-08-01

    This paper presents a generic programmable analog front-end (AFE) for acquisition and digitization of various biopotential signals. This includes a lead-off detection circuit, an ultra-low current capacitively coupled signal conditioning stage with programmable gain and bandwidth, a new mixed signal automatic gain control (AGC) mechanism and a medically cohesive reconfigurable ΣΔ ADC. The full system is designed in UMC 0.18μm CMOS. The AFE achieves an overall linearity of more 10 bits with 0.47μW power consumption. The ADC provides 2(nd) order noise-shaping while using single integrator and an ENOB of ~11 bits with 5μW power consumption. The system was successfully verified for various ECG signals from PTB database. This system is intended for portable batteryless u-Healthcare devices.

  6. Pseudo-differential CMOS analog front-end circuit for wide-bandwidth optical probe current sensor

    NASA Astrophysics Data System (ADS)

    Uekura, Takaharu; Oyanagi, Kousuke; Sonehara, Makoto; Sato, Toshiro; Miyaji, Kousuke

    2018-04-01

    In this paper, we present a pseudo-differential analog front-end (AFE) circuit for a novel optical probe current sensor (OPCS) aimed for high-frequency power electronics. It employs a regulated cascode transimpedance amplifier (RGC-TIA) to achieve a high gain and a large bandwidth without using an extremely high performance operational amplifier. The AFE circuit is designed in a 0.18 µm standard CMOS technology achieving a high transimpedance gain of 120 dB Ω and high cut off frequency of 16 MHz. The measured slew rate is 70 V/µs and the input referred current noise is 1.02 pA/\\sqrt{\\text{Hz}} . The magnetic resolution and bandwidth of OPCS are estimated to be 1.29 mTrms and 16 MHz, respectively; the bandwidth is higher than that of the reported Hall effect current sensor.

  7. Pion Production from 5-15 GeV Beam for the Neutrino Factory Front-End Study

    SciTech Connect

    Prior, Gersende

    2010-03-30

    For the neutrino factory front-end study, the production of pions from a proton beam of 5-8 and 14 GeV kinetic energy on a Hg jet target has been simulated. The pion yields for two versions of the MARS15 code and two different field configurations have been compared. The particles have also been tracked from the target position down to the end of the cooling channel using the ICOOL code and the neutrino factory baseline lattice. The momentum-angle region of pions producing muons that survived until the end of the cooling channel has been compared with the region covered by HARPmore » data and the number of pions/muons as a function of the incoming beam energy is also reported.« less

  8. Channel Analysis for a 6.4 Gb s-1 DDR5 Data Buffer Receiver Front-End

    NASA Astrophysics Data System (ADS)

    Lehmann, Stefanie; Gerfers, Friedel

    2017-09-01

    In this contribution, the channel characteristic of the next generation DDR5-SDRAM architecture and possible approaches to overcome channel impairments are analysed. Because modern enterprise server applications and networks demand higher memory bandwidth, throughput and capacity, the DDR5-SDRAM specification is currently under development as a follow-up of DDR4-SDRAM technology. In this specification, the data rate is doubled to DDR5-6400 per IO as compared to the former DDR4-3200 architecture, resulting in a total per DIMM data rate of up to 409.6 Gb s-1. The single-ended multi-point-to-point CPU channel architecture in DDRX technology remains the same for DDR5 systems. At the specified target data rate, insertion loss, reflections, cross-talk as well as power supply noise become more severe and have to be considered. Using the data buffer receiver front-end of a load-reduced memory module, sophisticated equalisation techniques can be applied to ensure target BER at the increased data rate. In this work, the worst case CPU back-plane channel is analysed to derive requirements for receiver-side equalisation from the channel response characteristics. First, channel impairments such as inter-symbol-interference, reflections from the multi-point channel structure, and crosstalk from neighboring lines are analysed in detail. Based on these results, different correction methods for DDR5 data buffer front-ends are discussed. An architecture with 1-tap FFE in combination with a multi-tap DFE is proposed. Simulation of the architecture using a random input data stream is used to reveal the required DFE tap filter depth to effectively eliminate the dominant ISI and reflection based error components.

  9. The Giga Bit Transceiver based Expandable Front-End (GEFE)—a new radiation tolerant acquisition system for beam instrumentation

    NASA Astrophysics Data System (ADS)

    Barros Marin, M.; Boccardi, A.; Donat Godichal, C.; Gonzalez, J. L.; Lefevre, T.; Levens, T.; Szuk, B.

    2016-02-01

    The Giga Bit Transceiver based Expandable Front-End (GEFE) is a multi-purpose FPGA-based radiation tolerant card. It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group. Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to total ionizing doses of up to 750 Gy. This paper introduces the architecture of the GEFE, its features as well as examples of its application in different setups.

  10. Exploring the mechanisms of vehicle front-end shape on pedestrian head injuries caused by ground impact.

    PubMed

    Yin, Sha; Li, Jiani; Xu, Jun

    2017-09-01

    In pedestrian-vehicle accidents, pedestrians typically suffer from secondary impact with the ground after the primary contact with vehicles. However, information about the fundamental mechanism of pedestrian head injury from ground impact remains minimal, thereby hindering further improvement in pedestrian safety. This study addresses this issue by using multi-body modeling and computation to investigate the influence of vehicle front-end shape on pedestrian safety. Accordingly, a simulation matrix is constructed to vary bonnet leading-edge height, bonnet length, bonnet angle, and windshield angle. Subsequently, a set of 315 pedestrian-vehicle crash simulations are conducted using the multi-body simulation software MADYMO. Three vehicle velocities, i.e., 20, 30, and 40km/h, are set as the scenarios. Results show that the top governing factor is bonnet leading-edge height. The posture and head injury at the instant of head ground impact vary dramatically with increasing height because of the significant rise of the body bending point and the movement of the collision point. The bonnet angle is the second dominant factor that affects head-ground injury, followed by bonnet length and windshield angle. The results may elucidate one of the critical barriers to understanding head injury caused by ground impact and provide a solid theoretical guideline for considering pedestrian safety in vehicle design. Copyright © 2017 Elsevier Ltd. All rights reserved.

  11. New x-ray pink-beam profile monitor system for the SPring-8 beamline front-end

    SciTech Connect

    Takahashi, Sunao; Kudo, Togo; Sano, Mutsumi

    A new beam profile monitoring system for the small X-ray beam exiting from the SPring-8 front-end was developed and tested at BL13XU. This system is intended as a screen monitor and also as a position monitor even at beam currents of 100 mA by using photoluminescence of a chemical vapor deposition-grown diamond film. To cope with the challenge that the spatial distribution of the photoluminescence in the vertical direction is too flat to detect the beam centroid within a limited narrow aperture, a filter was installed that absorbs the fundamental harmonic concentrated in the beam center, which resulted in “de-flattening”more » of the vertical distribution. For the measurement, the filter crossed the photon beam vertically at high speed to withstand the intense heat flux of the undulator pink-beam. A transient thermal analysis, which can simulate the movement of the irradiation position with time, was conducted to determine the appropriate configuration and the required moving speed of the filter to avoid accidental melting. In a demonstration experiment, the vertically separated beam profile could be successfully observed for a 0.8 × 0.8 mm{sup 2} beam shaped by an XY slit and with a fundamental energy of 18.48 keV. The vertical beam centroid could be detected with a resolution of less than 0.1 mm.« less

  12. CMOS integrated avalanche photodiodes and frequency-mixing optical sensor front end for portable NIR spectroscopy instruments.

    PubMed

    Yun, Ruida; Sthalekar, Chirag; Joyner, Valencia M

    2011-01-01

    This paper presents the design and measurement results of two avalanche photodiode structures (APDs) and a novel frequency-mixing transimpedance amplifier (TIA), which are key building blocks towards a monolithically integrated optical sensor front end for near-infrared (NIR) spectroscopy applications. Two different APD structures are fabricated in an unmodified 0.18 \\im CMOS process, one with a shallow trench isolation (STI) guard ring and the other with a P-well guard ring. The APDs are characterized in linear mode. The STI bounded APD demonstrates better performance and exhibits 3.78 A/W responsivity at a wavelength of 690 nm and bias voltage of 10.55 V. The frequency-mixing TIA (FM-TIA) employs a T-feedback network incorporating gate-controlled transistors for resistance modulation, enabling the simultaneous down-conversion and amplification of the high frequency modulated photodiode (PD) current. The TIA achieves 92 dS Ω conversion gain with 0.5 V modulating voltage. The measured IIP(3) is 10.6/M. The amplifier together with the 50 Ω output buffer draws 23 mA from a1.8 V power supply.

  13. Performances of the Front-End Electronics for the HADES RPC TOF wall on a 12C beam

    NASA Astrophysics Data System (ADS)

    Belver, D.; Cabanelas, P.; Castro, E.; Díaz, J.; Garzón, J. A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.; Zapata, M.

    2009-05-01

    A Front-End Electronics (FEE) chain for timing accurate measurements has been developed for the RPC wall upgrade of the High-Acceptance DiElectron Spectrometer (HADES). The wall will cover an area of around 8 m with 1122 RPC cells (2244 electronic channels). The FEE chain consists of two boards: a four-channel DaughterBOard (DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a discriminator. The time and the charge information are encoded in the leading and the trailing edge (by a charge to width method) of an LVDS signal. Each MBO houses up to eight DBOs providing them regulated voltage supply, threshold values via DACs, test signals and collection of their trigger outputs. The MBO delivers LVDS signals to a time-to-digital converter readout board (TRB) based on HPTDC for data acquisition. In this work, we present the performance of the FEE measured using: (a) narrow electronic test pulses and (b) real signals read out in a fully instrumented RPC sextant installed in its final position at the HADES. The detector was exposed to particles coming from reactions of a 12C beam on Be and Nb targets at 2 GeV/A kinetic energy. Results for the whole electronic chain (DBO+MBO+TRB) show a timing jitter of around 40 ps/channel for pulses above 100 fC and 80 ps/channel for beam data taken with the RPC.

  14. Low-voltage analog front-end processor design for ISFET-based sensor and H+ sensing applications

    NASA Astrophysics Data System (ADS)

    Chung, Wen-Yaw; Yang, Chung-Huang; Peng, Kang-Chu; Yeh, M. H.

    2003-04-01

    This paper presents a modular-based low-voltage analog-front-end processor design in a 0.5mm double-poly double-metal CMOS technology for Ion Sensitive Field Effect Transistor (ISFET)-based sensor and H+ sensing applications. To meet the potentiometric response of the ISFET that is proportional to various H+ concentrations, the constant-voltage and constant current (CVCS) testing configuration has been used. Low-voltage design skills such as bulk-driven input pair, folded-cascode amplifier, bootstrap switch control circuits have been designed and integrated for 1.5V supply and nearly rail-to-rail analog to digital signal processing. Core modules consist of an 8-bit two-step analog-digital converter and bulk-driven pre-amplifiers have been developed in this research. The experimental results show that the proposed circuitry has an acceptable linearity to 0.1 pH-H+ sensing conversions with the buffer solution in the range of pH2 to pH12. The processor has a potential usage in battery-operated and portable healthcare devices and environmental monitoring applications.

  15. A 24-GHz Front-End Integrated on a Multilayer Cellulose-Based Substrate for Doppler Radar Sensors †

    PubMed Central

    Mariotti, Chiara; Virili, Marco; Orecchini, Giulia; Roselli, Luca; Mezzanotte, Paolo

    2017-01-01

    This paper presents a miniaturized Doppler radar that can be used as a motion sensor for low-cost Internet of things (IoT) applications. For the first time, a radar front-end and its antenna are integrated on a multilayer cellulose-based substrate, built-up by alternating paper, glue and metal layers. The circuit exploits a distributed microstrip structure that is realized using a copper adhesive laminate, so as to obtain a low-loss conductor. The radar operates at 24 GHz and transmits 5 mW of power. The antenna has a gain of 7.4 dBi and features a half power beam-width of 48 degrees. The sensor, that is just the size of a stamp, is able to detect the movement of a walking person up to 10 m in distance, while a minimum speed of 50 mm/s up to 3 m is clearly measured. Beyond this specific result, the present paper demonstrates that the attractive features of cellulose, including ultra-low cost and eco-friendliness (i.e., recyclability and biodegradability), can even be exploited for the realization of future high-frequency hardware. This opens opens the door to the implementation on cellulose of devices and systems which make up the “sensing layer” at the base of the IoT ecosystem. PMID:28895914

  16. A 24-GHz Front-End Integrated on a Multilayer Cellulose-Based Substrate for Doppler Radar Sensors.

    PubMed

    Alimenti, Federico; Palazzi, Valentina; Mariotti, Chiara; Virili, Marco; Orecchini, Giulia; Bonafoni, Stefania; Roselli, Luca; Mezzanotte, Paolo

    2017-09-12

    This paper presents a miniaturized Doppler radar that can be used as a motion sensor for low-cost Internet of things (IoT) applications. For the first time, a radar front-end and its antenna are integrated on a multilayer cellulose-based substrate, built-up by alternating paper, glue and metal layers. The circuit exploits a distributed microstrip structure that is realized using a copper adhesive laminate, so as to obtain a low-loss conductor. The radar operates at 24 GHz and transmits 5 mW of power. The antenna has a gain of 7.4 dBi and features a half power beam-width of 48 degrees. The sensor, that is just the size of a stamp, is able to detect the movement of a walking person up to 10 m in distance, while a minimum speed of 50 mm/s up to 3 m is clearly measured. Beyond this specific result, the present paper demonstrates that the attractive features of cellulose, including ultra-low cost and eco-friendliness (i.e., recyclability and biodegradability), can even be exploited for the realization of future high-frequency hardware. This opens opens the door to the implementation on cellulose of devices and systems which make up the "sensing layer" at the base of the IoT ecosystem.

  17. A Study of the Effect of the Front-End Styling of Sport Utility Vehicles on Pedestrian Head Injuries

    PubMed Central

    Qin, Qin; Chen, Zheng; Bai, Zhonghao; Cao, Libo

    2018-01-01

    Background The number of sport utility vehicles (SUVs) on China market is continuously increasing. It is necessary to investigate the relationships between the front-end styling features of SUVs and head injuries at the styling design stage for improving the pedestrian protection performance and product development efficiency. Methods Styling feature parameters were extracted from the SUV side contour line. And simplified finite element models were established based on the 78 SUV side contour lines. Pedestrian headform impact simulations were performed and validated. The head injury criterion of 15 ms (HIC15) at four wrap-around distances was obtained. A multiple linear regression analysis method was employed to describe the relationships between the styling feature parameters and the HIC15 at each impact point. Results The relationship between the selected styling features and the HIC15 showed reasonable correlations, and the regression models and the selected independent variables showed statistical significance. Conclusions The regression equations obtained by multiple linear regression can be used to assess the performance of SUV styling in protecting pedestrians' heads and provide styling designers with technical guidance regarding their artistic creations.

  18. AUTOMOTIVE DIESEL MAINTENANCE 1. UNIT XIX, I--ENGINE TUNE-UP--CUMMINS DIESEL ENGINE, II--FRONT END SUSPENSION AND AXLES.

    ERIC Educational Resources Information Center

    Minnesota State Dept. of Education, St. Paul. Div. of Vocational and Technical Education.

    THIS MODULE OF A 30-MODULE COURSE IS DESIGNED TO DEVELOP AN UNDERSTANDING OF DIESEL ENGINE TUNE-UP PROCEDURES AND THE DESIGN OF FRONT END SUSPENSION AND AXLES USED ON DIESEL ENGINE EQUIPMENT. TOPICS ARE (1) PRE-TUNE-UP CHECKS, (2) TIMING THE ENGINE, (3) INJECTOR PLUNGER AND VALVE ADJUSTMENTS, (4) FUEL PUMP ADJUSTMENTS ON THE ENGINE (PTR AND PTG),…

  19. Can new passenger cars reduce pedestrian lower extremity injury? A review of geometrical changes of front-end design before and after regulatory efforts.

    PubMed

    Nie, Bingbing; Zhou, Qing

    2016-10-02

    Pedestrian lower extremity represents the most frequently injured body region in car-to-pedestrian accidents. The European Directive concerning pedestrian safety was established in 2003 for evaluating pedestrian protection performance of car models. However, design changes have not been quantified since then. The goal of this study was to investigate front-end profiles of representative passenger car models and the potential influence on pedestrian lower extremity injury risk. The front-end styling of sedans and sport utility vehicles (SUV) released from 2008 to 2011 was characterized by the geometrical parameters related to pedestrian safety and compared to representative car models before 2003. The influence of geometrical design change on the resultant risk of injury to pedestrian lower extremity-that is, knee ligament rupture and long bone fracture-was estimated by a previously developed assessment tool assuming identical structural stiffness. Based on response surface generated from simulation results of a human body model (HBM), the tool provided kinematic and kinetic responses of pedestrian lower extremity resulted from a given car's front-end design. Newer passenger cars exhibited a "flatter" front-end design. The median value of the sedan models provided 87.5 mm less bottom depth, and the SUV models exhibited 94.7 mm less bottom depth. In the lateral impact configuration similar to that in the regulatory test methods, these geometrical changes tend to reduce the injury risk of human knee ligament rupture by 36.6 and 39.6% based on computational approximation. The geometrical changes did not significantly influence the long bone fracture risk. The present study reviewed the geometrical changes in car front-ends along with regulatory concerns regarding pedestrian safety. A preliminary quantitative benefit of the lower extremity injury reduction was estimated based on these geometrical features. Further investigation is recommended on the structural changes

  20. A CMOS power-efficient low-noise current-mode front-end amplifier for neural signal recording.

    PubMed

    Wu, Chung-Yu; Chen, Wei-Ming; Kuo, Liang-Ting

    2013-04-01

    In this paper, a new current-mode front-end amplifier (CMFEA) for neural signal recording systems is proposed. In the proposed CMFEA, a current-mode preamplifier with an active feedback loop operated at very low frequency is designed as the first gain stage to bypass any dc offset current generated by the electrode-tissue interface and to achieve a low high-pass cutoff frequency below 0.5 Hz. No reset signal or ultra-large pseudo resistor is required. The current-mode preamplifier has low dc operation current to enhance low-noise performance and decrease power consumption. A programmable current gain stage is adopted to provide adjustable gain for adaptive signal scaling. A following current-mode filter is designed to adjust the low-pass cutoff frequency for different neural signals. The proposed CMFEA is designed and fabricated in 0.18-μm CMOS technology and the area of the core circuit is 0.076 mm(2). The measured high-pass cutoff frequency is as low as 0.3 Hz and the low-pass cutoff frequency is adjustable from 1 kHz to 10 kHz. The measured maximum current gain is 55.9 dB. The measured input-referred current noise density is 153 fA /√Hz , and the power consumption is 13 μW at 1-V power supply. The fabricated CMFEA has been successfully applied to the animal test for recording the seizure ECoG of Long-Evan rats.

  1. Stand-alone front-end system for high- frequency, high-frame-rate coded excitation ultrasonic imaging.

    PubMed

    Park, Jinhyoung; Hu, Changhong; Shung, K Kirk

    2011-12-01

    A stand-alone front-end system for high-frequency coded excitation imaging was implemented to achieve a wider dynamic range. The system included an arbitrary waveform amplifier, an arbitrary waveform generator, an analog receiver, a motor position interpreter, a motor controller and power supplies. The digitized arbitrary waveforms at a sampling rate of 150 MHz could be programmed and converted to an analog signal. The pulse was subsequently amplified to excite an ultrasound transducer, and the maximum output voltage level achieved was 120 V(pp). The bandwidth of the arbitrary waveform amplifier was from 1 to 70 MHz. The noise figure of the preamplifier was less than 7.7 dB and the bandwidth was 95 MHz. Phantoms and biological tissues were imaged at a frame rate as high as 68 frames per second (fps) to evaluate the performance of the system. During the measurement, 40-MHz lithium niobate (LiNbO(3)) single-element lightweight (<;0.28 g) transducers were utilized. The wire target measure- ment showed that the -6-dB axial resolution of a chirp-coded excitation was 50 μm and lateral resolution was 120 μm. The echo signal-to-noise ratios were found to be 54 and 65 dB for the short burst and coded excitation, respectively. The contrast resolution in a sphere phantom study was estimated to be 24 dB for the chirp-coded excitation and 15 dB for the short burst modes. In an in vivo study, zebrafish and mouse hearts were imaged. Boundaries of the zebrafish heart in the image could be differentiated because of the low-noise operation of the implemented system. In mouse heart images, valves and chambers could be readily visualized with the coded excitation.

  2. Band-1 receiver front-end cartridges for Atacama Large Millimeter/submillimeter Array (ALMA): design and development toward production

    NASA Astrophysics Data System (ADS)

    Hwang, Yuh-Jing; Chiong, Chau-Ching; Huang, Yau-De; Huang, Chi-Den; Liu, Ching-Tang; Kuo, Yue-Fang; Weng, Shou-Hsien; Ho, Chin-Ting; Chiang, Po-Han; Wu, Hsiao-Ling; Chang, Chih-Cheng; Jian, Shou-Ting; Lee, Chien-Feng; Lee, Yi-Wei; Pospieszalski, Marian; Henke, Doug; Finger, Ricardo; Tapia, Valeria; Gonzalez, Alvaro

    2016-07-01

    The ALMA Band-1 receiver front-end prototype cold and warm cartridge assemblies, including the system and key components for ALMA Band-1 receivers have been developed and two sets of prototype cartridge were fully tested. The measured aperture efficiency for the cold receiver is above the 80% specification except for a few frequency points. Based on the cryogenically cooled broadband low-noise amplifiers provided by NRAO, the receiver noise temperature can be as low as 15 - 32K for pol-0 and 17 - 30K for pol-1. Other key testing items are also measured. The receiver beam pattern is measured, the results is well fit to the simulation and design. The pointing error extracted from the measured beam pattern indicates the error is 0.1 degree along azimuth and 0.15 degree along elevation, which is well fit to the specification (smaller than 0.4 degree). The equivalent hot load temperature for 5% gain compression is 492 - 4583K, which well fit to the specification of 5% with 373K input thermal load. The image band suppression is higher than 30 dB typically and the worst case is higher than 20 dB for 34GHz RF signal and 38GHz LO signal, which is all higher than 7 dB required specification. The cross talk between orthogonal polarization is smaller than -85 dB based on present prototype LO. The amplitude stability is below 2.0 x 10-7 , which is fit to the specification of 4.0 x 10-7 for timescales in the range of 0.05 s ≤ T ≤ 100 s. The signal path phase stability measured is smaller than 5 fs, which is smaller than 22 fs for Long term (delay drift) 20 s ≤ T < 300 sec. The IF output phase variation is smaller than 3.5° rms typically, and the specification is less than 4.5° rms. The measured IF output power level is -28 to -30.5 dBm with 300K input load. The measured IF output power flatness is less than 5.6 dB for 2GHz window, and 1.3dB for 31MHz window. The first batch of prototype cartridges will be installed on site for further commissioning on July of 2017.

  3. An Ultra-Low Voltage Analog Front End for Strain Gauge Sensory System Application in 0.18µm CMOS

    NASA Astrophysics Data System (ADS)

    Edward, Alexander; Chan, Pak Kwong

    This paper presents analysis and design of a new ultra-low voltage analog front end (AFE) dedicated to strain sensor applications. The AFE, designed in 0.18µm CMOS process, features a chopper-stabilized instrumentation amplifier (IA), a balanced active MOSFET-C 2nd order low pass filter (LPF), a clock generator and a voltage booster which operate at supply voltage (Vdd) of 0.6V. The designed IA achieves 30dB of closed-loop gain, 101dB of common-mode rejection ratio (CMRR) at 50Hz, 80dB of power-supply rejection ratio (PSRR) at 50Hz, thermal noise floor of 53.4 nV/√Hz, current consumption of 14µA, and noise efficiency factor (NEF) of 9.7. The high CMRR and rail-to-rail output swing capability is attributed to a new low voltage realization of the active-bootstrapped technique using a pseudo-differential gain-boosting operational transconductance amplifier (OTA) and proposed current-driven bulk (CDB) biasing technique. An output capacitor-less low-dropout regulator (LDO), with a new fast start-up LPF technique, is used to regulate this 0.6V supply from a 0.8-1.0V energy harvesting power source. It achieves power supply rejection (PSR) of 42dB at frequency of 1MHz. A cascode compensated pseudo differential amplifier is used as the filter's building block for low power design. The filter's single-ended-to-balanced converter is implemented using a new low voltage amplifier with two-stage common-mode cancellation. The overall AFE was simulated to have 65.6dB of signal-to-noise ratio (SNR), total harmonic distortion (THD) of less than 0.9% for a 100Hz sinusoidal maximum input signal, bandwidth of 2kHz, and power consumption of 51.2µW. Spectre RF simulations were performed to validate the design using BSIM3V3 transistor models provided by GLOBALFOUNDRIES 0.18µm CMOS process.

  4. Powerloads on the front end components and the duct of the heating and diagnostic neutral beam lines at ITER

    SciTech Connect

    Singh, M. J.; Boilson, D.; Hemsworth, R. S.

    2015-04-08

    The heating and current drive beam lines (HNB) at ITER are expected to deliver ∼16.7 MW power per beam line for H beams at 870 keV and D beams at 1 MeV during the H-He and the DD/DT phases of ITER operation respectively. On the other hand the diagnostic neutral beam (DNB) line shall deliver ∼2 MW power for H beams at 100 keV during both the phases. The path lengths over which the beams from the HNB and DNB beam lines need to be transported are 25.6 m and 20.7 m respectively. The transport of the beams over these path lengths resultsmore » in beam losses, mainly by the direct interception of the beam with the beam line components and reionisation. The lost power is deposited on the surfaces of the various components of the beam line. In order to ensure the survival of these components over the operational life time of ITER, it is important to determine to the best possible extent the operational power loads and power densities on the various surfaces which are impacted by the beam in one way or the other during its transport. The main factors contributing to these are the divergence of the beamlets and the halo fraction in the beam, the beam aiming, the horizontal and vertical misalignment of the beam, and the gas profile along the beam path, which determines the re-ionisation loss, and the re-ionisation cross sections. The estimations have been made using a combination of the modified version of the Monte Carlo Gas Flow code (MCGF) and the BTR code. The MCGF is used to determine the gas profile in the beam line and takes into account the active gas feed into the ion source and neutraliser, the HNB-DNB cross over, the gas entering the beamline from the ITER machine, the additional gas atoms generated in the beam line due to impacting ions and the pumping speed of the cryopumps. The BTR code has been used to obtain the power loads and the power densities on the various surfaces of the front end components and the duct modules for different scenarios of

  5. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

    SciTech Connect

    Anderson, J.; Bauer, K.; Borga, A.

    The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. Furthermore, the Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. Here, the FELIX system, the design of the PCIe prototypemore » card and the integration test results are presented.« less

  6. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

    DOE PAGES

    Anderson, J.; Bauer, K.; Borga, A.; ...

    2016-12-13

    The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. Furthermore, the Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. Here, the FELIX system, the design of the PCIe prototypemore » card and the integration test results are presented.« less

  7. FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

    NASA Astrophysics Data System (ADS)

    Anderson, J.; Bauer, K.; Borga, A.; Boterenbrood, H.; Chen, H.; Chen, K.; Drake, G.; Dönszelmann, M.; Francis, D.; Guest, D.; Gorini, B.; Joos, M.; Lanni, F.; Lehmann Miotto, G.; Levinson, L.; Narevicius, J.; Panduro Vazquez, W.; Roich, A.; Ryu, S.; Schreuder, F.; Schumacher, J.; Vandelli, W.; Vermeulen, J.; Whiteson, D.; Wu, W.; Zhang, J.

    2016-12-01

    The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. The Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. The FELIX system, the design of the PCIe prototype card and the integration test results are presented in this paper.

  8. A 4 μW/Ch analog front-end module with moderate inversion and power-scalable sampling operation for 3-D neural microsystems.

    PubMed

    Al-Ashmouny, Khaled M; Chang, Sun-Il; Yoon, Euisik

    2012-10-01

    We report an analog front-end prototype designed in 0.25 μm CMOS process for hybrid integration into 3-D neural recording microsystems. For scaling towards massive parallel neural recording, the prototype has investigated some critical circuit challenges in power, area, interface, and modularity. We achieved extremely low power consumption of 4 μW/channel, optimized energy efficiency using moderate inversion in low-noise amplifiers (K of 5.98 × 10⁸ or NEF of 2.9), and minimized asynchronous interface (only 2 per 16 channels) for command and data capturing. We also implemented adaptable operations including programmable-gain amplification, power-scalable sampling (up to 50 kS/s/channel), wide configuration range (9-bit) for programmable gain and bandwidth, and 5-bit site selection capability (selecting 16 out of 128 sites). The implemented front-end module has achieved a reduction in noise-energy-area product by a factor of 5-25 times as compared to the state-of-the-art analog front-end approaches reported to date.

  9. Closed-loop wavelength stabilization of an optical parametric oscillator as a front end of a high-power iodine laser chain.

    PubMed

    Kral, L

    2007-05-01

    We present a complex stabilization and control system for a commercially available optical parametric oscillator. The system is able to stabilize the oscillator's output wavelength at a narrow spectral line of atomic iodine with subpicometer precision, allowing utilization of this solid-state parametric oscillator as a front end of a high-power photodissociation laser chain formed by iodine gas amplifiers. In such setup, a precise wavelength matching between the front end and the amplifier chain is necessary due to extremely narrow spectral lines of the gaseous iodine (approximately 20 pm). The system is based on a personal computer, a heated iodine cell, and a few other low-cost components. It automatically identifies the proper peak within the iodine absorption spectrum, and then keeps the oscillator tuned to this peak with high precision and reliability. The use of the solid-state oscillator as the front end allows us to use the whole iodine laser system as a pump laser for the optical parametric chirped pulse amplification, as it enables precise time synchronization with a signal Ti:sapphire laser.

  10. Whole-body vibration in heavy equipment operators of a front-end loader: role of task exposure and tire configuration with and without traction chains.

    PubMed

    Blood, Ryan P; Rynell, Patrik W; Johnson, Peter W

    2012-12-01

    This study measured whole-body vibration (WBV) exposures in front-end loader operators, and evaluated the effects of traction chains and work tasks on their WBV exposures. WBV exposures were measured and compared across three different front-end loader tire configurations: (a) stock rubber tires, (b) rubber tires with ladder chains, and (c) rubber tires with basket chains. The operators completed three distinct standardized tasks: driving on a city street, simulated plowing, and a simulated scooping and dumping task. A portable data acquisition system collected tri-axial time weighted and raw WBV data per ISO 2631-1 and 2631-5 standards. In addition, Global Positioning System (GPS) data were collected in order to compare loader speeds across tire conditions and the standardized tasks. Relative to the stock rubber tires, both types of tire chains significantly increased WBV exposures with the ladder chains having substantially higher WBV exposures compared to basket chains. Additionally, there were task dependent differences in WBV exposures. During the driving task, the z-axis (up and down) was the predominant exposure; the plowing task had a more even distribution of exposure across all three axes; while during scooping and dumping task, the x-axis (fore and aft) had the highest WBV exposures. The GPS data indicated that there were significant speed differences across tasks but not between the basket and ladder chain conditions. Tires with ladder chains increased the front-end loader operators' exposure to WBV above the ISO 2631-1 recommended eight hour action limit increasing risk for adverse health effects. Although more expensive, basket chains are recommended over ladder chains since they substantially lowered the front-end loader operator's exposures and may ultimately reduce vibration related wear and tear on the vehicle. In order to reduce a heavy equipment vehicle (HEV) operator's chances for developing low back pain, this study provides information that

  11. 3-lead acquisition using single channel ECG device developed on AD8232 analog front end for wireless ECG application

    NASA Astrophysics Data System (ADS)

    Agung, Mochammad Anugrah; Basari

    2017-02-01

    Electrocardiogram (ECG) devices measure electrical activity of the heart muscle to determine heart conditions. ECG signal quality is the key factor in determining the diseases of the heart. This paper presents the design of 3-lead acquistion on single channel wireless ECG device developed on AD8232 chip platform using microcontroller. To make the system different from others, monopole antenna 2.4 GHz is used in order to send and receive ECG signal. The results show that the system still can receive ECG signal up to 15 meters by line of sight (LOS) condition. The shape of ECG signals is precisely similar with the expected signal, although some delays occur between two consecutive pulses. For further step, the system will be applied with on-body antenna in order to investigate body to body communication that will give variation in connectivity from the others.

  12. Development and evaluation of a comprehensive clinical decision support taxonomy: comparison of front-end tools in commercial and internally developed electronic health record systems

    PubMed Central

    Sittig, Dean F; Ash, Joan S; Feblowitz, Joshua; Meltzer, Seth; McMullen, Carmit; Guappone, Ken; Carpenter, Jim; Richardson, Joshua; Simonaitis, Linas; Evans, R Scott; Nichol, W Paul; Middleton, Blackford

    2011-01-01

    Background Clinical decision support (CDS) is a valuable tool for improving healthcare quality and lowering costs. However, there is no comprehensive taxonomy of types of CDS and there has been limited research on the availability of various CDS tools across current electronic health record (EHR) systems. Objective To develop and validate a taxonomy of front-end CDS tools and to assess support for these tools in major commercial and internally developed EHRs. Study design and methods We used a modified Delphi approach with a panel of 11 decision support experts to develop a taxonomy of 53 front-end CDS tools. Based on this taxonomy, a survey on CDS tools was sent to a purposive sample of commercial EHR vendors (n=9) and leading healthcare institutions with internally developed state-of-the-art EHRs (n=4). Results Responses were received from all healthcare institutions and 7 of 9 EHR vendors (response rate: 85%). All 53 types of CDS tools identified in the taxonomy were found in at least one surveyed EHR system, but only 8 functions were present in all EHRs. Medication dosing support and order facilitators were the most commonly available classes of decision support, while expert systems (eg, diagnostic decision support, ventilator management suggestions) were the least common. Conclusion We developed and validated a comprehensive taxonomy of front-end CDS tools. A subsequent survey of commercial EHR vendors and leading healthcare institutions revealed a small core set of common CDS tools, but identified significant variability in the remainder of clinical decision support content. PMID:21415065

  13. Forward-Looking Intracardiac Ultrasound Imaging Using a 1-D CMUT Array Integrated With Custom Front-End Electronics

    PubMed Central

    Nikoozadeh, Amin; Wygant, Ira O.; Lin, Der-Song; Oralkan, Ömer; Ergun, A. Sanlı; Stephens, Douglas N.; Thomenius, Kai E.; Dentinger, Aaron M.; Wildes, Douglas; Akopyan, Gina; Shivkumar, Kalyanam; Mahajan, Aman; Sahn, David J.; Khuri-Yakub, Butrus T.

    2009-01-01

    Minimally invasive catheter-based electrophysiological (EP) interventions are becoming a standard procedure in diagnosis and treatment of cardiac arrhythmias. As a result of technological advances that enable small feature sizes and a high level of integration, nonfluoroscopic intracardiac echocardiography (ICE) imaging catheters are attracting increasing attention. ICE catheters improve EP procedural guidance while reducing the undesirable use of fluoroscopy, which is currently the common catheter guidance method. Phased-array ICE catheters have been in use for several years now, although only for side-looking imaging. We are developing a forward-looking ICE catheter for improved visualization. In this effort, we fabricate a 24-element, fine-pitch 1-D array of capacitive micromachined ultrasonic transducers (CMUT), with a total footprint of 1.73 mm × 1.27 mm. We also design a custom integrated circuit (IC) composed of 24 identical blocks of transmit/receive circuitry, measuring 2.1 mm × 2.1 mm. The transmit circuitry is capable of delivering 25-V unipolar pulses, and the receive circuitry includes a transimpedance preamplifier followed by an output buffer. The CMUT array and the custom IC are designed to be mounted at the tip of a 10-Fr catheter for high-frame-rate forward-looking intracardiac imaging. Through-wafer vias incorporated in the CMUT array provide access to individual array elements from the back side of the array. We successfully flip-chip bond a CMUT array to the custom IC with 100% yield. We coat the device with a layer of polydimethylsiloxane (PDMS) to electrically isolate the device for imaging in water and tissue. The pulse-echo in water from a total plane reflector has a center frequency of 9.2 MHz with a 96% fractional bandwidth. Finally, we demonstrate the imaging capability of the integrated device on commercial phantoms and on a beating ex vivo rabbit heart (Langendorff model) using a commercial ultrasound imaging system. PMID:19126489

  14. Chip, Chip, Hooray!

    ERIC Educational Resources Information Center

    Kelly, Susan

    2001-01-01

    Presents a science laboratory using different brands of potato chips in which students test their oiliness, size, thickness, saltiness, quality, and cost, then analyze the results to determine the best chip. Gives a brief history of potato chips. (YDS)

  15. Front-end Evaluation as Part of a Comprehensive Approach to Inform the Development of a New Climate Exhibit at NCAR

    NASA Astrophysics Data System (ADS)

    Ristvey, J. D., Jr.; Brinkworth, C.; Hatheway, B.; Williams, V.

    2015-12-01

    In an era of discord in public views of climate change, communicating atmospheric and related sciences to the public at a large research facility like the National Center for Atmospheric Research (NCAR) can be a daunting challenge yet one that is filled with many possibilities. The University Corporation for Atmospheric Research (UCAR) Center for Science Education (SciEd) is responsible for education and outreach activities at UCAR, including the exhibits program. Over 90,000 people visit the NCAR Mesa Lab each year to enjoy a number of exhibits that showcase our community's research. The current climate exhibit is twelve years old, and with advances in our understanding of climate science and exhibit design, SciEd staff are developing a new exhibit that is as cutting edge as the research conducted at NCAR. Based on listening sessions with NCAR scientists, the following big ideas for the exhibit emerged: How the climate system works The climate system is changing How scientists study our climate Regional impacts Solutions The goal of the new climate exhibit is to reach people using a variety of learning styles, including offerings for visitors who learn by doing, as well as providing informative text and images (Hatheway, 2014). Developers and evaluators are working together to conduct front-end, formative, and summative evaluations to understand of the needs of our visitors and collect ongoing data to inform development. The purpose of the front-end evaluation, conducted in the summer of 2014 was to develop informed data-driven strategies to move forward with exhibit design. The evaluation results to be shared in this session include: The demographics and behaviors of visitors Trends in visitors' experiences Visitor input on exhibit design (Williams and Tarsi, 2014). In this presentation, we will share the results, significance, and application of the front-end evaluation as part of a comprehensive approach to study both how we convey information about climate

  16. Analog Front-Ends comparison in the way of a portable, low-power and low-cost EMG controller based on pattern recognition EMBC 2015.

    PubMed

    Mastinu, Enzo; Ortiz-Catalan, Max; Hakansson, Bo

    2015-01-01

    Compact and low-noise Analog Front-Ends (AFEs) are becoming increasingly important for the acquisition of bioelectric signals in portable system. In this work, we compare two popular AFEs available on the market, namely the ADS1299 (Texas Instruments) and the RHA2216 (Intan Technologies). This work develops towards the identification of suitable acquisition modules to design an affordable, reliable and portable device for electromyography (EMG) acquisition and prosthetic control. Device features such as Common Mode Rejection (CMR), Input Referred Noise (IRN) and Signal to Noise Ratio (SNR) were evaluated, as well as the resulting accuracy in myoelectric pattern recognition (MPR) for the decoding of motion intention. Results reported better noise performances and higher MPR accuracy for the ADS1299 and similar SNR values for both devices.

  17. Development of the front end test stand and vessel for extraction and source plasma analyses negative hydrogen ion sources at the Rutherford Appleton Laboratory.

    PubMed

    Lawrie, S R; Faircloth, D C; Letchford, A P; Perkins, M; Whitehead, M O; Wood, T; Gabor, C; Back, J

    2014-02-01

    The ISIS pulsed spallation neutron and muon facility at the Rutherford Appleton Laboratory (RAL) in the UK uses a Penning surface plasma negative hydrogen ion source. Upgrade options for the ISIS accelerator system demand a higher current, lower emittance beam with longer pulse lengths from the injector. The Front End Test Stand is being constructed at RAL to meet the upgrade requirements using a modified ISIS ion source. A new 10% duty cycle 25 kV pulsed extraction power supply has been commissioned and the first meter of 3 MeV radio frequency quadrupole has been delivered. Simultaneously, a Vessel for Extraction and Source Plasma Analyses is under construction in a new laboratory at RAL. The detailed measurements of the plasma and extracted beam characteristics will allow a radical overhaul of the transport optics, potentially yielding a simpler source configuration with greater output and lifetime.

  18. Development of a data management front end for use with a LANDSAT based information system. [assessing gypsy moth defoliation damage in Pennsylvania

    NASA Technical Reports Server (NTRS)

    Turner, B. J. (Principal Investigator)

    1982-01-01

    A user friendly front end was constructed to facilitate access to the LANDSAT mosaic data base supplied by JPL and to process both LANDSAT and ancillary data. Archieval and retrieval techniques were developed to efficiently handle this data base and make it compatible with requirements of the Pennsylvania Bureau of Forestry. Procedures are ready for: (1) forming the forest/nonforest mask in ORSER compressed map format using GSFC-supplied classification procedures; (2) registering data from a new scene (defoliated) to the mask (which may involve mosaicking if the area encompasses two LANDSAT scenes; (3) producing a masked new data set using the MASK program; (4) analyzing this data set to produce a map showing degrees of defoliation, output on the Versatec plotter; and (5) producing color composite maps by a diazo-type process.

  19. A Low Cost Bluetooth Low Energy Transceiver for Wireless Sensor Network Applications with a Front-end Receiver-Matching Network-Reusing Power Amplifier Load Inductor.

    PubMed

    Liang, Zhen; Li, Bin; Huang, Mo; Zheng, Yanqi; Ye, Hui; Xu, Ken; Deng, Fangming

    2017-04-19

    In this work, a low cost Bluetooth Low Energy (BLE) transceiver for wireless sensor network (WSN) applications, with a receiver (RX)-matching network-reusing power amplifier (PA) load inductor, is presented. In order to decrease the die area, only two inductors were used in this work. Besides the one used in the voltage control oscillator (VCO), the PA load inductor was reused as the RX impedance matching component in the front-end. Proper controls have been applied to achieve high transmitter (TX) input impedance when the transceiver is in the receiving mode, and vice versa. This allows the TRX-switch/matching network integration without significant performance degradation. The RX adopted a low-IF structure and integrated a single-ended low noise amplifier (LNA), a current bleeding mixer, a 4th complex filter and a delta-sigma continuous time (CT) analog-to-digital converter (ADC). The TX employed a two-point PLL-based architecture with a non-linear PA. The RX achieved a sensitivity of -93 dBm and consumes 9.7 mW, while the TX achieved a 2.97% error vector magnitude (EVM) with 9.4 mW at 0 dBm output power. This design was fabricated in a 0.11 μm complementary metal oxide semiconductor (CMOS) technology and the front-end circuit only occupies 0.24 mm². The measurement results verify the effectiveness and applicability of the proposed BLE transceiver for WSN applications.

  20. Analysis of the influence of passenger vehicles front-end design on pedestrian lower extremity injuries by means of the LLMS model.

    PubMed

    Scattina, Alessandro; Mo, Fuhao; Masson, Catherine; Avalle, Massimiliano; Arnoux, Pierre Jean

    2018-01-30

    This work aims at investigating the influence of some front-end design parameters of a passenger vehicle on the behavior and damage occurring in the human lower limbs when impacted in an accident. The analysis is carried out by means of finite element analysis using a generic car model for the vehicle and the lower limbs model for safety (LLMS) for the purpose of pedestrian safety. Considering the pedestrian standardized impact procedure (as in the 2003/12/EC Directive), a parametric analysis, through a design of experiments plan, was performed. Various material properties, bumper thickness, position of the higher and lower bumper beams, and position of pedestrian, were made variable in order to identify how they influence the injury occurrence. The injury prediction was evaluated from the knee lateral flexion, ligament elongation, and state of stress in the bone structure. The results highlighted that the offset between the higher and lower bumper beams is the most influential parameter affecting the knee ligament response. The influence is smaller or absent considering the other responses and the other considered parameters. The stiffness characteristics of the bumper are, instead, more notable on the tibia. Even if an optimal value of the variables could not be identified trends were detected, with the potential of indicating strategies for improvement. The behavior of a vehicle front end in the impact against a pedestrian can be improved optimizing its design. The work indicates potential strategies for improvement. In this work, each parameter was changed independently one at a time; in future works, the interaction between the design parameters could be also investigated. Moreover, a similar parametric analysis can be carried out using a standard mechanical legform model in order to understand potential diversities or correlations between standard tools and human models.

  1. Development of a compact radiation-hardened low-noise front-end readout ASIC for CZT-based hard X-ray imager

    NASA Astrophysics Data System (ADS)

    Gao, W.; Gan, B.; Li, X.; Wei, T.; Gao, D.; Hu, Y.

    2015-04-01

    In this paper, we present the development and performances of a radiation-hardened front-end readout application-specific integrated circuit (ASIC) dedicated to CZT detectors for a hard X-ray imager in space applications. The readout channel consists of a charge sensitive amplifier (CSA), a CR-RC shaper, a fast shaper, a discriminator and a driving buffer. With the additional digital filtering, the readout channel can achieve very low noise performances and low power dissipation. An eight-channel prototype ASIC is designed and fabricated in 0.35 μm CMOS process. The energy range of the detected X-rays is evaluated as 1.45 keV to 281 keV. The gain is larger than 100 mV/fC. The equivalent noise charge (ENC) of the ASIC is 53 e- at zero farad plus 10 e- per picofarad. The power dissipation is less than 4.4 mW/channel. Through the measurement with a CZT detector, the energy resolution is less than 3.45 keV (FWHM) under the irradiation of the radioactive source 241Am. The radiation effect experiments indicate that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad (Si).

  2. Towards the development of a wearable Electrical Impedance Tomography system: A study about the suitability of a low power bioimpedance front-end.

    PubMed

    Menolotto, Matteo; Rossi, Stefano; Dario, Paolo; Della Torre, Luigi

    2015-01-01

    Wearable systems for remote monitoring of physiological parameter are ready to evolve towards wearable imaging systems. The Electrical Impedance Tomography (EIT) allows the non-invasive investigation of the internal body structure. The characteristics of this low-resolution and low-cost technique match perfectly with the concept of a wearable imaging device. On the other hand low power consumption, which is a mandatory requirement for wearable systems, is not usually discussed for standard EIT applications. In this work a previously developed low power architecture for a wearable bioimpedance sensor is applied to EIT acquisition and reconstruction, to evaluate the impact on the image of the limited signal to noise ratio (SNR), caused by low power design. Some anatomical models of the chest, with increasing geometric complexity, were developed, in order to evaluate and calibrate, through simulations, the parameters of the reconstruction algorithms provided by Electrical Impedance Diffuse Optical Reconstruction Software (EIDORS) project. The simulation results were compared with experimental measurements taken with our bioimpedance device on a phantom reproducing chest tissues properties. The comparison was both qualitative and quantitative through the application of suitable figures of merit; in this way the impact of the noise of the low power front-end on the image quality was assessed. The comparison between simulation and measurement results demonstrated that, despite the limited SNR, the device is accurate enough to be used for the development of an EIT based imaging wearable system.

  3. Performance of a resistive plate chamber equipped with a new prototype of amplified front-end electronics in the ALICE detector

    NASA Astrophysics Data System (ADS)

    Marchisone, Massimiliano

    2017-09-01

    ALICE is the LHC experiment dedicated to the study of heavy-ion collisions. At forward rapidity a muon spectrometer detects muons from low mass mesons, quarkonia (c\\bar{c} and b\\bar{b} mesons), open heavy-flavor hadrons (D and B mesons) as well as from weak bosons. A muon selection based on transverse momentum is made by a trigger system composed of 72 Resistive Plate Chambers (RPCs). For the LHC Run 1 and the ongoing Run 2 the RPCs have been equipped with a non-amplified Front-End Electronics (FEE) called ADULT. However, in view of an increase in luminosity expected for Run 3 (foreseen to start in 2021) the possibility to use an amplified FEE has been explored in order to improve the counting rate limitation and to prevent the aging of the detector by reducing the charge per hit. A prototype of this new electronics (FEERIC) has been developed and tested first with cosmic rays before equipping one RPC in the ALICE cavern with it. In this proceeding the most important performance indicators (such as efficiency, dark current, dark rate, cluster size, total charge and charge per hit) of the RPC equipped with this new FEE will be reviewed and compared to the others read out with ADULT.

  4. High-throughput bioconjugation for enhanced 193 nm photodissociation via droplet phase initiated ion/ion chemistry using a front-end dual spray reactor.

    PubMed

    Cotham, Victoria C; Shaw, Jared B; Brodbelt, Jennifer S

    2015-09-15

    Fast online chemical derivatization of peptides with an aromatic label for enhanced 193 nm ultraviolet photodissociation (UVPD) is demonstrated using a dual electrospray reactor implemented on the front-end of a linear ion trap (LIT) mass spectrometer. The reactor facilitates the intersection of protonated peptides with a second population of chromogenic 4-formyl-1,3-benzenedisulfonic acid (FBDSA) anions to promote real-time formation of ion/ion complexes at atmospheric pressure. Subsequent collisional activation of the ion/ion intermediate results in Schiff base formation generated via reaction between a primary amine in the peptide cation and the aldehyde moiety of the FBDSA anion. Utilizing 193 nm UVPD as the subsequent activation step in the MS(3) workflow results in acquisition of greater primary sequence information relative to conventional collision induced dissociation (CID). Furthermore, Schiff-base-modified peptides exhibit on average a 20% increase in UVPD efficiency compared to their unmodified counterparts. Due to the efficiency of covalent labeling achieved with the dual spray reactor, we demonstrate that this strategy can be integrated into a high-throughput LC-MS(n) workflow for rapid derivatization of peptide mixtures.

  5. Design and evaluation of wide-range and low-power analog front-end enabling body-implanted devices to monitor charge injection properties

    NASA Astrophysics Data System (ADS)

    Ito, Keita; Uno, Shoma; Goto, Tatsuya; Takezawa, Yoshiki; Harashima, Takuya; Morikawa, Takumi; Nishino, Satoru; Kino, Hisashi; Kiyoyama, Koji; Tanaka, Tetsu

    2017-04-01

    For safe electrical stimulation with body-implanted devices, the degradation of stimulus electrodes must be considered because it causes the unexpected electrolysis of water and the destruction of tissues. To monitor the charge injection property (CIP) of stimulus electrodes while these devices are implanted, we have proposed a charge injection monitoring system (CIMS). CIMS can safely read out voltages produced by a biphasic current pulse to a stimulus electrode and CIP is calculated from waveforms of the acquired voltages. In this paper, we describe a wide-range and low-power analog front-end (AFE) for CIMS that has variable gain-frequency characteristics and low-power analog-to-digital (A/D) conversion to adjust to the degradation of stimulus electrodes. The designed AFE was fabricated with 0.18 µm CMOS technology and achieved a valuable gain of 20-60 dB, an upper cutoff frequency of 0.2-10 kHz, and low-power interleaving A/D conversion. In addition, we successfully measured the CIP of stimulus electrodes for body-implanted devices using CIMS.

  6. Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall

    NASA Astrophysics Data System (ADS)

    Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.

    2010-10-01

    A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m2, divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel DaughterBOard (DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade .

  7. Developing the RAL front end test stand source to deliver a 60 mA, 50 Hz, 2 ms H- beam

    NASA Astrophysics Data System (ADS)

    Faircloth, Dan; Lawrie, Scott; Letchford, Alan; Gabor, Christoph; Perkins, Mike; Whitehead, Mark; Wood, Trevor; Tarvainen, Olli; Komppula, Jani; Kalvas, Taneli; Dudnikov, Vadim; Pereira, Hugo; Izaola, Zunbeltz; Simkin, John

    2013-02-01

    All the Front End Test Stand (FETS) beam requirements have been achieved, but not simultaneously [1]. At 50 Hz repetition rates beam current droop becomes unacceptable for pulse lengths longer than 1 ms. This is fundamental limitation of the present source design. Previous researchers [2] have demonstrated that using a physically larger Penning surface plasma source should overcome these limitations. The scaled source development strategy is outlined in this paper. A study of time-varying plasma behavior has been performed using a V-UV spectrometer. Initial experiments to test scaled plasma volumes are outlined. A dedicated plasma and extraction test stand (VESPA-Vessel for Extraction and Source Plasma Analysis) is being developed to allow new source and extraction designs to be appraised. The experimental work is backed up by modeling and simulations. A detailed ANSYS thermal model has been developed. IBSimu is being used to design extraction and beam transport. A novel 3D plasma modeling code using beamlets is being developed by Cobham Vector Fields using SCALA OPERA, early source modeling results are very promising. Hardware on FETS is also being developed in preparation to run the scaled source. A new 2 ms, 50 Hz, 25 kV pulsed extraction voltage power supply has been constructed and a new discharge power supply is being designed. The design of the post acceleration electrode assembly has been improved.

  8. Design and Implementation of an Electronic Front-End Based on Square Wave Excitation for Ultrasonic Torsional Guided Wave Viscosity Sensor

    PubMed Central

    Rabani, Amir

    2016-01-01

    The market for process instruments generally requires low cost devices that are robust, small in size, portable, and usable in-plant. Ultrasonic torsional guided wave sensors have received much attention by researchers for measurement of viscosity and/or density of fluids in recent years. The supporting electronic systems for these sensors providing many different settings of sine-wave signals are bulky and expensive. In contrast, a system based on bursts of square waves instead of sine waves would have a considerable advantage in that respect and could be built using simple integrated circuits at a cost that is orders of magnitude lower than for a windowed sine wave device. This paper explores the possibility of using square wave bursts as the driving signal source for the ultrasonic torsional guided wave viscosity sensor. A simple design of a compact and fully automatic analogue square wave front-end for the sensor is also proposed. The successful operation of the system is demonstrated by using the sensor for measuring the viscosity in a representative fluid. This work provides the basis for design and manufacture of low cost compact standalone ultrasonic guided wave sensors and enlightens the possibility of using coded excitation techniques utilising square wave sequences in such applications. PMID:27754324

  9. Development of a front-end analog circuit for multi-channel SiPM readout and performance verification for various PET detector designs

    NASA Astrophysics Data System (ADS)

    Ko, Guen Bae; Yoon, Hyun Suk; Kwon, Sun Il; Lee, Chan Mi; Ito, Mikiko; Hong, Seong Jong; Lee, Dong Soo; Lee, Jae Sung

    2013-03-01

    Silicon photomultipliers (SiPMs) are outstanding photosensors for the development of compact imaging devices and hybrid imaging systems such as positron emission tomography (PET)/ magnetic resonance (MR) scanners because of their small size and MR compatibility. The wide use of this sensor for various types of scintillation detector modules is being accelerated by recent developments in tileable multichannel SiPM arrays. In this work, we present the development of a front-end readout module for multi-channel SiPMs. This readout module is easily extendable to yield a wider detection area by the use of a resistive charge division network (RCN). We applied this readout module to various PET detectors designed for use in small animal PET/MR, optical fiber PET/MR, and double layer depth of interaction (DOI) PET. The basic characteristics of these detector modules were also investigated. The results demonstrate that the PET block detectors developed using the readout module and tileable multi-channel SiPMs had reasonable performance.

  10. First Results From High-Resolution Front End Electronics for Water Cherenkov Air Shower Detectors Equipped With Cyclone® V FPGA

    NASA Astrophysics Data System (ADS)

    Szadkowski, Zbigniew

    2016-06-01

    The paper presents first results from the Front-End Board (FEB) with the biggest Cyclone® V E FPGA 5CEFA9F31I7N, supporting 8 channels sampled up to 250 MSps @ 14-bit resolution. Considered sampling for the planned upgrade of the Pierre Auger surface detector array is 120 MSps, however, the FEB has been developed with external anti-aliasing filters to keep a maximal flexibility. Six channels are targeted to the SD, two the rest for other experiments like: Auger Engineering Radio Array and additional muon counters. More channels and higher sampling generate larger size of registered events. We used the standard radio channel for a radio transmission from the detectors to the Central Data Acquisition Station (CDAS) to avoid at present a significant modification of a software in both sides: the detector and the CDAS (planned in a future for a final design). Several variants of the FPGA code were tested for 120, 160, 200 and even 240 MSps DAQ. Tests confirmed a stability and reliability of the FEB design in real pampas conditions with more than 40°C daily temperature variation and a strong sun exposition with a limited power budget only from a single solar panel. Seven FEBs have been deployed in a hexagon of test detectors on a dedicated Engineering Array.

  11. Design and Implementation of an Electronic Front-End Based on Square Wave Excitation for Ultrasonic Torsional Guided Wave Viscosity Sensor.

    PubMed

    Rabani, Amir

    2016-10-12

    The market for process instruments generally requires low cost devices that are robust, small in size, portable, and usable in-plant. Ultrasonic torsional guided wave sensors have received much attention by researchers for measurement of viscosity and/or density of fluids in recent years. The supporting electronic systems for these sensors providing many different settings of sine-wave signals are bulky and expensive. In contrast, a system based on bursts of square waves instead of sine waves would have a considerable advantage in that respect and could be built using simple integrated circuits at a cost that is orders of magnitude lower than for a windowed sine wave device. This paper explores the possibility of using square wave bursts as the driving signal source for the ultrasonic torsional guided wave viscosity sensor. A simple design of a compact and fully automatic analogue square wave front-end for the sensor is also proposed. The successful operation of the system is demonstrated by using the sensor for measuring the viscosity in a representative fluid. This work provides the basis for design and manufacture of low cost compact standalone ultrasonic guided wave sensors and enlightens the possibility of using coded excitation techniques utilising square wave sequences in such applications.

  12. Current Controller for Multi-level Front-end Converter and Its Digital Implementation Considerations on Three-level Flying Capacitor Topology

    NASA Astrophysics Data System (ADS)

    Tekwani, P. N.; Shah, M. T.

    2017-10-01

    This paper presents behaviour analysis and digital implementation of current error space phasor based hysteresis controller applied to three-phase three-level flying capacitor converter as front-end topology. The controller is self-adaptive in nature, and takes the converter from three-level to two-level mode of operation and vice versa, following various trajectories of sector change with the change in reference dc-link voltage demanded by the load. It keeps current error space phasor within the prescribed hexagonal boundary. During the contingencies, the proposed controller takes the converter in over modulation mode to meet the load demand, and once the need is satisfied, controller brings back the converter in normal operating range. Simulation results are presented to validate behaviour of controller to meet the said contingencies. Unity power factor is assured by proposed controller with low current harmonic distortion satisfying limits prescribed in IEEE 519-2014. Proposed controller is implemented using TMS320LF2407 16-bit fixed-point digital signal processor. Detailed analysis of numerical format to avoid overflow of sensed variables in processor, and per-unit model implementation in software are discussed and hardware results are presented at various stages of signal conditioning to validate the experimental setup. Control logic for the generation of reference currents is implemented in TMS320LF2407A using assembly language and experimental results are also presented for the same.

  13. On-line monitoring of in-vitro oral bioaccessibility tests as front-end to liquid chromatography for determination of chlorogenic acid isomers in dietary supplements.

    PubMed

    Kremr, Daniel; Cocovi-Solberg, David J; Bajerová, Petra; Ventura, Karel; Miró, Manuel

    2017-05-01

    A novel fully automated in-vitro oral dissolution test assay as a front-end to liquid chromatography has been developed and validated for on-line chemical profiling and monitoring of temporal release profiles of three caffeoylquinic acid (CQA) isomers, namely, 3-CQA,4-CQA and 5-CQA, known as chlorogenic acids, in dietary supplements. Tangential-flow filtration is harnessed as a sample processing approach for on-line handling of CQA containing extracts of hard gelatin capsules and introduction of protein-free samples into the liquid chromatograph. Oral bioaccessibility/dissolution test assays were performed at 37.0±0.5°C as per US Pharmacopeia recommendations using pepsin with activity of ca. 749,000 USP units/L in 0.1mol/L HCl as the extraction medium and a paddle apparatus stirred at 50rpm. CQA release rates and steady-state dissolution conditions were determined accurately by fitting the chromatographic datasets, namely, the average cumulative concentrations of bioaccessible pools of every individual isomer monitored during 200min, with temporal resolutions of ≥10min, to a first-order dissolution kinetic model. Distinct solid-to-liquid phase ratios in the mimicry of physiological extraction conditions were assessed. Relative standard deviations for intra-day repeatability and inter-day intermediate precision of 5-CQA within the 5-40µg/mL concentration range were <3.4% and <5.5%, respectively. Trueness of the automatic flow method for determination of 5-CQA released from dietary supplements in gastric fluid surrogate was demonstrated by spike recoveries, spanning from 91.5-104.0%, upon completion of the dissolution process. The proposed hyphenated setup was resorted for evaluating potential differences in dissolution profiles and content of the three most abundant chlorogenic acid isomers in dietary supplements from varied manufacturers. Copyright © 2016 Elsevier B.V. All rights reserved.

  14. A low-power current-reuse dual-band analog front-end for multi-channel neural signal recording.

    PubMed

    Sepehrian, H; Gosselin, B

    2014-01-01

    Thoroughly studying the brain activity of freely moving subjects requires miniature data acquisition systems to measure and wirelessly transmit neural signals in real time. In this application, it is mandatory to simultaneously record the bioelectrical activity of a large number of neurons to gain a better knowledge of brain functions. However, due to limitations in transferring the entire raw data to a remote base station, employing dedicated data reduction techniques to extract the relevant part of neural signals is critical to decrease the amount of data to transfer. In this work, we present a new dual-band neural amplifier to separate the neuronal spike signals (SPK) and the local field potential (LFP) simultaneously in the analog domain, immediately after the pre-amplification stage. By separating these two bands right after the pre-amplification stage, it is possible to process LFP and SPK separately. As a result, the required dynamic range of the entire channel, which is determined by the signal-to-noise ratio of the SPK signal of larger bandwidth, can be relaxed. In this design, a new current-reuse low-power low-noise amplifier and a new dual-band filter that separates SPK and LFP while saving capacitors and pseudo resistors. A four-channel dual-band (SPK, LFP) analog front-end capable of simultaneously separating SPK and LFP is implemented in a TSMC 0.18 μm technology. Simulation results present a total power consumption per channel of 3.1 μw for an input referred noise of 3.28 μV and a NEF for 2.07. The cutoff frequency of the LFP band is fc=280 Hz, and fL=725 Hz and fL=11.2 KHz for SPK, with 36 dB gain for LFP band 46 dB gain for SPK band.

  15. A 16-Channel CMOS Chopper-Stabilized Analog Front-End ECoG Acquisition Circuit for a Closed-Loop Epileptic Seizure Control System.

    PubMed

    Wu, Chung-Yu; Cheng, Cheng-Hsiang; Chen, Zhi-Xin

    2018-06-01

    In this paper, a 16-channel analog front-end (AFE) electrocorticography signal acquisition circuit for a closed-loop seizure control system is presented. It is composed of 16 input protection circuits, 16 auto-reset chopper-stabilized capacitive-coupled instrumentation amplifiers (AR-CSCCIA) with bandpass filters, 16 programmable transconductance gain amplifiers, a multiplexer, a transimpedance amplifier, and a 128-kS/s 10-bit delta-modulated successive-approximation-register analog-to-digital converter (SAR ADC). In closed-loop seizure control system applications, the stimulator shares the same electrode with the AFE amplifier for effective suppression of epileptic seizures. To prevent from overstress in MOS devices caused by high stimulation voltage, an input protection circuit with a high-voltage-tolerant switch is proposed for the AFE amplifier. Moreover, low input-referred noise is achieved by using the chopper modulation technique in the AR-CSCCIA. To reduce the undesired effects of chopper modulation, an improved offset reduction loop is proposed to reduce the output offset generated by input chopper mismatches. The digital ripple reduction loop is also used to reduce the chopper ripple. The fabricated AFE amplifier has 49.1-/59.4-/67.9-dB programmable gain and 2.02-μVrms input referred noise in a bandwidth of 0.59-117 Hz. The measured power consumption of the AFE amplifier is 3.26 μW per channel, and the noise efficiency factor is 3.36. The in vivo animal test has been successfully performed to verify the functions. It is shown that the proposed AFE acquisition circuit is suitable for implantable closed-loop seizure control systems.

  16. The front-end electronics and slow control of large area SiPM for the SST-1M camera developed for the CTA experiment

    NASA Astrophysics Data System (ADS)

    Aguilar, J. A.; Bilnik, W.; Borkowski, J.; Cadoux, F.; Christov, A.; della Volpe, D.; Favre, Y.; Heller, M.; Kasperek, J.; Lyard, E.; Marszałek, A.; Moderski, R.; Montaruli, T.; Porcelli, A.; Prandini, E.; Rajda, P.; Rameez, M.; Schioppa, E.; Troyano Pujadas, I.; Ziȩtara, K.; Błocki, J.; Bogacz, L.; Bulik, T.; Curyło, M.; Dyrda, M.; Frankowski, A.; Grudniki, Ł.; Grudzińska, M.; Idźkowski, B.; Jamrozy, M.; Janiak, M.; Lalik, K.; Mach, E.; Mandat, D.; Michałowski, J.; Neronov, A.; Niemiec, J.; Ostrowski, M.; Paśsko, P.; Pech, M.; Schovanek, P.; Seweryn, K.; Skowron, K.; Sliusar, V.; Sowiński, M.; Stawarz, Ł.; Stodulska, M.; Stodulski, M.; Toscano, S.; Walter, R.; Wiȩcek, M.; Zagdański, A.; Żychowski, P.

    2016-09-01

    The single mirror Small Size Telescope (SST-1M) is one of the proposed designs for the smallest type of telescopes, SSTs that will compose the Cherenkov Telescope Array (CTA). The SST-1M camera will use Silicon PhotoMultipliers (SiPM) which are nowadays commonly used in High Energy Physics experiments and many imaging applications. However the unique pixel shape and size have required a dedicated development by the University of Geneva and Hamamatsu. The resulting sensor has a surface of ∼94 mm2 and a total capacitance of ∼3.4 nF. These unique characteristics, combined with the stringent requirements of the CTA project on timing and charge resolution have led the University of Geneva to develop custom front-end electronics. The preamplifier stage has been tailored in order to optimize the signal shape using measurement campaigns and electronic simulation of the sensor. A dedicated trans-impedance pre-amplifier topology is used resulting in a power consumption of 400 mW per pixel and a pulse width < 30 ns. The measurements that have led to the choice of the different components and the resulting performance are detailed in this paper. The slow control electronics was designed to provide the bias voltage with 6.7 mV precision and to correct for temperature variation with a forward feedback compensation with 0.17 °C resolution. It is fully configurable and can be monitored using CANbus interface. The architecture and the characterization of the various elements are presented.

  17. Artificial Neural Network as the FPGA Trigger in the Cyclone V based Front-End for a Detection of Neutrino-Origin Showers

    SciTech Connect

    Szadkowski, Zbigniew; Glas, Dariusz; Pytel, Krzysztof

    Neutrinos play a fundamental role in the understanding of the origin of ultra-high-energy cosmic rays. They interact through charged and neutral currents in the atmosphere generating extensive air showers. However, their a very low rate of events potentially generated by neutrinos is a significant challenge for a detection technique and requires both sophisticated algorithms and high-resolution hardware. A trigger based on a artificial neural network was implemented into the Cyclone{sup R} V E FPGA 5CEFA9F31I7 - the heart of the prototype Front-End boards developed for tests of new algorithms in the Pierre Auger surface detectors. Showers for muon and taumore » neutrino initiating particles on various altitudes, angles and energies were simulated in CORSICA and Offline platforms giving pattern of ADC traces in Auger water Cherenkov detectors. The 3-layer 12-8-1 neural network was taught in MATLAB by simulated ADC traces according the Levenberg-Marquardt algorithm. Results show that a probability of a ADC traces generation is very low due to a small neutrino cross-section. Nevertheless, ADC traces, if occur, for 1-10 EeV showers are relatively short and can be analyzed by 16-point input algorithm. We optimized the coefficients from MATLAB to get a maximal range of potentially registered events and for fixed-point FPGA processing to minimize calculation errors. New sophisticated triggers implemented in Cyclone{sup R} V E FPGAs with large amount of DSP blocks, embedded memory running with 120 - 160 MHz sampling may support a discovery of neutrino events in the Pierre Auger Observatory. (authors)« less

  18. Front-End Electron Transfer Dissociation Coupled to a 21 Tesla FT-ICR Mass Spectrometer for Intact Protein Sequence Analysis

    NASA Astrophysics Data System (ADS)

    Weisbrod, Chad R.; Kaiser, Nathan K.; Syka, John E. P.; Early, Lee; Mullen, Christopher; Dunyach, Jean-Jacques; English, A. Michelle; Anderson, Lissa C.; Blakney, Greg T.; Shabanowitz, Jeffrey; Hendrickson, Christopher L.; Marshall, Alan G.; Hunt, Donald F.

    2017-09-01

    High resolution mass spectrometry is a key technology for in-depth protein characterization. High-field Fourier transform ion cyclotron resonance mass spectrometry (FT-ICR MS) enables high-level interrogation of intact proteins in the most detail to date. However, an appropriate complement of fragmentation technologies must be paired with FTMS to provide comprehensive sequence coverage, as well as characterization of sequence variants, and post-translational modifications. Here we describe the integration of front-end electron transfer dissociation (FETD) with a custom-built 21 tesla FT-ICR mass spectrometer, which yields unprecedented sequence coverage for proteins ranging from 2.8 to 29 kDa, without the need for extensive spectral averaging (e.g., 60% sequence coverage for apo-myoglobin with four averaged acquisitions). The system is equipped with a multipole storage device separate from the ETD reaction device, which allows accumulation of multiple ETD fragment ion fills. Consequently, an optimally large product ion population is accumulated prior to transfer to the ICR cell for mass analysis, which improves mass spectral signal-to-noise ratio, dynamic range, and scan rate. We find a linear relationship between protein molecular weight and minimum number of ETD reaction fills to achieve optimum sequence coverage, thereby enabling more efficient use of instrument data acquisition time. Finally, real-time scaling of the number of ETD reactions fills during method-based acquisition is shown, and the implications for LC-MS/MS top-down analysis are discussed. [Figure not available: see fulltext.

  19. An RFID tag system-on-chip with wireless ECG monitoring for intelligent healthcare systems.

    PubMed

    Wang, Cheng-Pin; Lee, Shuenn-Yuh; Lai, Wei-Chih

    2013-01-01

    This paper presents a low-power wireless ECG acquisition system-on-chip (SoC), including an RF front-end circuit, a power unit, an analog front-end circuit, and a digital circuitry. The proposed RF front-end circuit can provide the amplitude shift keying demodulation and distance to digital conversion to accurately receive the data from the reader. The received data will wake up the power unit to provide the required supply voltages of analog front-end (AFE) and digital circuitry. The AFE, including a pre-amplifier, an analog filter, a post-amplifier, and an analog-to-digital converter, is used for the ECG acquisition. Moreover, the EPC Class I Gen 2 UHF standard is employed in the digital circuitry for the handshaking of communication and the control of the system. The proposed SoC has been implemented in 0.18-µm standard CMOS process and the measured results reveal the communication is compatible to the RFID protocol. The average power consumption for the operating chip is 12 µW. Using a Sony PR44 battery to the supply power (605mAh@1.4V), the RFID tag SoC operates continuously for about 50,000 hours (>5 years), which is appropriate for wireless wearable ECG monitoring systems.

  20. Design of the front end electronics for the infrared camera of JEM-EUSO, and manufacturing and verification of the prototype model

    NASA Astrophysics Data System (ADS)

    Maroto, Oscar; Diez-Merino, Laura; Carbonell, Jordi; Tomàs, Albert; Reyes, Marcos; Joven-Alvarez, Enrique; Martín, Yolanda; Morales de los Ríos, J. A.; del Peral, Luis; Rodríguez-Frías, M. D.

    2014-07-01

    The Japanese Experiment Module (JEM) Extreme Universe Space Observatory (EUSO) will be launched and attached to the Japanese module of the International Space Station (ISS). Its aim is to observe UV photon tracks produced by ultra-high energy cosmic rays developing in the atmosphere and producing extensive air showers. The key element of the instrument is a very wide-field, very fast, large-lense telescope that can detect extreme energy particles with energy above 1019 eV. The Atmospheric Monitoring System (AMS), comprising, among others, the Infrared Camera (IRCAM), which is the Spanish contribution, plays a fundamental role in the understanding of the atmospheric conditions in the Field of View (FoV) of the telescope. It is used to detect the temperature of clouds and to obtain the cloud coverage and cloud top altitude during the observation period of the JEM-EUSO main instrument. SENER is responsible for the preliminary design of the Front End Electronics (FEE) of the Infrared Camera, based on an uncooled microbolometer, and the manufacturing and verification of the prototype model. This paper describes the flight design drivers and key factors to achieve the target features, namely, detector biasing with electrical noise better than 100μV from 1Hz to 10MHz, temperature control of the microbolometer, from 10°C to 40°C with stability better than 10mK over 4.8hours, low noise high bandwidth amplifier adaptation of the microbolometer output to differential input before analog to digital conversion, housekeeping generation, microbolometer control, and image accumulation for noise reduction. It also shows the modifications implemented in the FEE prototype design to perform a trade-off of different technologies, such as the convenience of using linear or switched regulation for the temperature control, the possibility to check the camera performances when both microbolometer and analog electronics are moved further away from the power and digital electronics, and

  1. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras.

    PubMed

    Bolotnikov, A E; Ackley, K; Camarda, G S; Cherches, C; Cui, Y; De Geronimo, G; Fried, J; Hodges, D; Hossain, A; Lee, W; Mahler, G; Maritato, M; Petryk, M; Roy, U; Salwen, C; Vernon, E; Yang, G; James, R B

    2015-07-01

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm(3) detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  2. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    DOE PAGES

    Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.; ...

    2015-07-28

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe (CZT) detectors coupled to a front-end readout ASIC for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6x6x15 mm 3 detectors grouped into 3x3 sub-arrays of 2x2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readoutmore » electronics. The further enhancement of the arrays’ performance and reduction of their cost are made possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less

  3. SALT, a dedicated readout chip for high precision tracking silicon strip detectors at the LHCb Upgrade

    NASA Astrophysics Data System (ADS)

    Bugiel, Sz.; Dasgupta, R.; Firlej, M.; Fiutowski, T.; Idzik, M.; Kuczynska, M.; Moron, J.; Swientek, K.; Szumlak, T.

    2016-02-01

    The Upstream Tracker (UT) silicon strip detector, one of the central parts of the tracker system of the modernised LHCb experiment, will use a new 128-channel readout ASIC called SALT. It will extract and digitise analogue signals from the UT sensors, perform digital signal processing and transmit a serial output data. The SALT is being designed in CMOS 130 nm process and uses a novel architecture comprising of analog front-end and fast (40 MSps) ultra-low power (<0.5 mW) 6-bit ADC in each channel. The prototype ASICs of important functional blocks, like analogue front-end, 6-bit SAR ADC, PLL, and DLL, were designed, fabricated and tested. A prototype of an 8-channel version of the SALT chip, comprising all important functionalities was also designed and fabricated. The architecture and design of the SALT, together with the selected preliminary tests results, are presented.

  4. First results from the spectral DCT trigger implemented in the Cyclone V Front-End Board used for a detection of very inclined showers in the Pierre Auger surface detector Engineering Array

    SciTech Connect

    Szadkowski, Zbigniew

    2015-07-01

    The paper presents the first results from the trigger based on the Discrete Cosine Transform (DCT) operating in the new Front-End Boards with Cyclone V FPGA deployed in 8 test surface detectors in the Pierre Auger Engineering Array. The patterns of the ADC traces generated by very inclined showers were obtained from the Auger database and from the CORSIKA simulation package supported next by Offline reconstruction Auger platform which gives a predicted digitized signal profiles. Simulations for many variants of the initial angle of shower, initialization depth in the atmosphere, type of particle and its initial energy gave a boundarymore » of the DCT coefficients used next for the on-line pattern recognition in the FPGA. Preliminary results have proven a right approach. We registered several showers triggered by the DCT for 120 MSps and 160 MSps. (authors)« less

  5. Microprocessor Front-End Terminal Study.

    DTIC Science & Technology

    1981-06-01

    Engineer APPROVED: .HN MARCINIAK, Colonel, USAF hief, Information Sciences Division FOR THE COMANDER: JOHN P. HUSS Acting Chief, Plans Office If your...friendly forces. The files are maintained by this branch acting independently or in coordination with lateral services or national agencies. 24 MFT Final...and reconnaissance mission results are analyzed to determine the degree of success of the attack. Target damage assessments are made, and targets are

  6. Extension of Alvis compiler front-end

    SciTech Connect

    Wypych, Michał; Szpyrka, Marcin; Matyasik, Piotr, E-mail: mwypych@agh.edu.pl, E-mail: mszpyrka@agh.edu.pl, E-mail: ptm@agh.edu.pl

    2015-12-31

    Alvis is a formal modelling language that enables possibility of verification of distributed concurrent systems. An Alvis model semantics finds expression in an LTS graph (labelled transition system). Execution of any language statement is expressed as a transition between formally defined states of such a model. An LTS graph is generated using a middle-stage Haskell representation of an Alvis model. Moreover, Haskell is used as a part of the Alvis language and is used to define parameters’ types and operations on them. Thanks to the compiler’s modular construction many aspects of compilation of an Alvis model may be modified. Providingmore » new plugins for Alvis Compiler that support languages like Java or C makes possible using these languages as a part of Alvis instead of Haskell. The paper presents the compiler internal model and describes how the default specification language can be altered by new plugins.« less

  7. UNIX NSW Front End Enhancements. Volume I.

    DTIC Science & Technology

    1981-06-01

    scenario number */ int pi pcod ; /* value of us pcod in US entry */ int pi-mlen; /* length of following message */1; In both structures, the fields are...inst; /* cqde for kind of info stored -- is ipptr->ipinst */ int tb_pcod; /* value of us_pcod for this buffer */1; It is necessary to store tb pcod in

  8. Interactive Textiles Front End Analysis. Phase 1

    DTIC Science & Technology

    1998-11-01

    demonstrated. Active ultrasound and radar were investigated as means to detect the track of projectiles and acoustic signatures were obtained using...technique was used to incorporate pore-forming proteins into various lipid and protein matrices. At a constant pressure the pore-forming protein when added...report. Polymer Gel Sensors and Devices controlled by Infrared Light and Ultrasound Principle Investigator: Z. Hu North Texas State University

  9. Towards on-chip integration of brain imaging photodetectors using standard CMOS process.

    PubMed

    Kamrani, Ehsan; Lesage, Frederic; Sawan, Mohamad

    2013-01-01

    The main effects of on-chip integration on the performance and efficiency of silicon avalanche photodiode (SiAPD) and photodetector front-end is addressed in this paper based on the simulation and fabrication experiments. Two different silicon APDs are fabricated separately and also integrated with a transimpedance amplifier (TIA) front-end using standard CMOS technology. SiAPDs are designed in p+/n-well structure with guard rings realized in different shapes. The TIA front-end has been designed using distributed-gain concept combined with resistive-feedback and common-gate topology to reach low-noise and high gain-bandwidth product (GBW) characteristics. The integrated SiAPDs show higher signal-to-noise ratio (SNR), sensitivity and detection efficiency comparing to the separate SiAPDs. The integration does not show a significant effect on the gain and preserves the low power consumption. Using APDs with p-well guard-ring is preferred due to the higher observed efficiency after integration.

  10. A proposed holistic approach to on-chip, off-chip, test, and package interconnections

    NASA Astrophysics Data System (ADS)

    Bartelink, Dirk J.

    1998-11-01

    recognize—test is also performed using IC's. A system interconnection is proposed using multiple chips fabricated with conventional silicon processes, including MEMS technology. The system resembles an MCM that can be joined without committing to final assembly to perform at-speed testing. 50-Ohm test probes never load the circuit; only intended neighboring chips are ever connected. A `back-plane' chip provides the connection layers for both inter- and intra-chip signals and also serves as the probe card, in analogy with membrane probes now used for single-chip testing. Intra-chip connections, which require complicated connections during test that exactly match the product, are then properly made and all waveforms and loading conditions under test will be identical to those of the product. The major benefit is that all front-end chip technologies can be merged—logic, memory, RF, even passives. ESD protection is required only on external system connections. Manufacturing test information will accurately characterize process faults and thus avoid the Known-Good-Die problem that has slowed the arrival of conventional MCM's.

  11. SAMPA Chip: the New 32 Channels ASIC for the ALICE TPC and MCH Upgrades

    NASA Astrophysics Data System (ADS)

    Adolfsson, J.; Ayala Pabon, A.; Bregant, M.; Britton, C.; Brulin, G.; Carvalho, D.; Chambert, V.; Chinellato, D.; Espagnon, B.; Hernandez Herrera, H. D.; Ljubicic, T.; Mahmood, S. M.; Mjörnmark, U.; Moraes, D.; Munhoz, M. G.; Noël, G.; Oskarsson, A.; Osterman, L.; Pilyar, A.; Read, K.; Ruette, A.; Russo, P.; Sanches, B. C. S.; Severo, L.; Silvermyr, D.; Suire, C.; Tambave, G. J.; Tun-Lanoë, K. M. M.; van Noije, W.; Velure, A.; Vereschagin, S.; Wanlin, E.; Weber, T. O.; Zaporozhets, S.

    2017-04-01

    This paper presents the test results of the second prototype of SAMPA, the ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chamber (MCH). SAMPA is made in a 130 nm CMOS technology with 1.25 V nominal voltage supply and provides 32 channels, with selectable input polarity, and three possible combinations of shaping time and sensitivity. Each channel consists of a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC; a Digital Signal Processor provides digital filtering and compression capability. In the second prototype run both full chip and single test blocks were fabricated, allowing block characterization and full system behaviour studies. Experimental results are here presented showing agreement with requirements for both the blocks and the full chip.

  12. On-chip copper-dielectric interference filters for manufacturing of ambient light and proximity CMOS sensors.

    PubMed

    Frey, Laurent; Masarotto, Lilian; D'Aillon, Patrick Gros; Pellé, Catherine; Armand, Marilyn; Marty, Michel; Jamin-Mornet, Clémence; Lhostis, Sandrine; Le Briz, Olivier

    2014-07-10

    Filter technologies implemented on CMOS image sensors for spectrally selective applications often use a combination of on-chip organic resists and an external substrate with multilayer dielectric coatings. The photopic-like and near-infrared bandpass filtering functions respectively required by ambient light sensing and user proximity detection through time-of-flight can be fully integrated on chip with multilayer metal-dielectric filters. Copper, silicon nitride, and silicon oxide are the materials selected for a technological proof-of-concept on functional wafers, due to their immediate availability in front-end semiconductor fabs. Filter optical designs are optimized with respect to specific performance criteria, and the robustness of the designs regarding process errors are evaluated for industrialization purposes.

  13. Optical and electrical interfacing technologies for living cell bio-chips.

    PubMed

    Shacham-Diamand, Y; Belkin, S; Rishpon, J; Elad, T; Melamed, S; Biran, A; Yagur-Kroll, S; Almog, R; Daniel, R; Ben-Yoav, H; Rabner, A; Vernick, S; Elman, N; Popovtzer, R

    2010-06-01

    Whole-cell bio-chips for functional sensing integrate living cells on miniaturized platforms made by micro-system-technologies (MST). The cells are integrated, deposited or immersed in a media which is in contact with the chip. The cells behavior is monitored via electrical, electrochemical or optical methods. In this paper we describe such whole-cell biochips where the signal is generated due to the genetic response of the cells. The solid-state platform hosts the biological component, i.e. the living cells, and integrates all the required micro-system technologies, i.e. the micro-electronics, micro-electro optics, micro-electro or magneto mechanics and micro-fluidics. The genetic response of the cells expresses proteins that generate: a. light by photo-luminescence or bioluminescence, b. electrochemical signal by interaction with a substrate, or c. change in the cell impedance. The cell response is detected by a front end unit that converts it to current or voltage amplifies and filters it. The resultant signal is analyzed and stored for further processing. In this paper we describe three examples of whole-cell bio chips, photo-luminescent, bioluminescent and electrochemical, which are based on the genetic response of genetically modified E. coli microbes integrated on a micro-fluidics MEMS platform. We describe the chip outline as well as the basic modeling scheme of such sensors. We discuss the highlights and problems of such system, from the point of view of micro-system-technology.

  14. Silicon drift detectors with on-chip electronics for x-ray spectroscopy.

    PubMed

    Fiorini, C; Longoni, A; Hartmann, R; Lechner, P; Strüder, L

    1997-01-01

    The silicon drift detector (SDD) is a semiconductor device based on high resistivity silicon fully depleted through junctions implanted on both sides of the semiconductor wafer. The electrons generated by the ionizing radiation are driven by means of a suitable electric field from the point of interaction toward a collecting anode of small capacitance, independent of the active area of the detector. A suitably designed front-end JFET has been directly integrated on the detector chip close to the anode region, in order to obtain a nearly ideal capacitive matching between detector and transistor and to minimize the stray capacitances of the connections. This feature allows it to reach high energy resolution also at high count rates and near room temperature. The present work describes the structure and the performance of SDDs specially designed for high resolution spectroscopy with soft x rays at high detection rate. Experimental results of SDDs used in spectroscopy applications are also reported.

  15. The FE-I4 Pixel Readout Chip and the IBL Module

    SciTech Connect

    Barbero, Marlon; Arutinov, David; Backhaus, Malte

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on testmore » results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.« less

  16. Characterization of the Photon Counting CHASE Jr., Chip Built in a 40-nm CMOS Process With a Charge Sharing Correction Algorithm Using a Collimated X-Ray Beam

    SciTech Connect

    Krzyżanowska, A.; Deptuch, G. W.; Maj, P.

    This paper presents the detailed characterization of a single photon counting chip, named CHASE Jr., built in a CMOS 40-nm process, operating with synchrotron radiation. The chip utilizes an on-chip implementation of the C8P1 algorithm. The algorithm eliminates the charge sharing related uncertainties, namely, the dependence of the number of registered photons on the discriminator’s threshold, set for monochromatic irradiation, and errors in the assignment of an event to a certain pixel. The article presents a short description of the algorithm as well as the architecture of the CHASE Jr., chip. The analog and digital functionalities, allowing for proper operationmore » of the C8P1 algorithm are described, namely, an offset correction for two discriminators independently, two-stage gain correction, and different operation modes of the digital blocks. The results of tests of the C8P1 operation are presented for the chip bump bonded to a silicon sensor and exposed to the 3.5- μm -wide pencil beam of 8-keV photons of synchrotron radiation. It was studied how sensitive the algorithm performance is to the chip settings, as well as the uniformity of parameters of the analog front-end blocks. Presented results prove that the C8P1 algorithm enables counting all photons hitting the detector in between readout channels and retrieving the actual photon energy.« less

  17. Thermal ink-jet device using single-chip silicon microchannels

    NASA Astrophysics Data System (ADS)

    Wuu, DongSing; Cheng, Chen-Yue; Horng, RayHua; Chan, G. C.; Chiu, Sao-Ling; Wu, Yi-Yung

    1998-06-01

    We present a new method to fabricate silicon microfluidic channels by through-hole etching with subsequent planarization. The method is based on etching out the deep grooves through a perforated silicon carbide membrane, followed by sealing the membrane with plasma-enhanced chemical vapor deposition (PECVD). Low-pressure-chemical-vapor- deposited (LPCVD) polysilicon was used as a sacrificial layer to define the channel structure and only one etching step is required. This permits the realization of planarization after a very deep etching step in silicon and offers the possibility for film deposition, resist spinning and film patterning across deep grooves. The process technology was demonstrated on the fabrication of a monolithic silicon microchannel structure for thermal inkjet printing. The Ta-Al heater arrays are integrated on the top of each microchannel, which connect to a common on-chip front-end ink reservoir. The fabrication of this device requires six masks and no active nozzle-to-chip alignment. Moreover, the present micromachining process is compatible with the addition of on-chip circuitry for multiplexing the heater control signals. Heat transfer efficiency to the ink is enhanced by the high thermal conductivity of the silicon carbide in the channel ceiling, while the bulk silicon maintains high interchannel isolation. The fabricated inkjet devices show the droplet sizes of 20 - 50 micrometer in diameter with various channel dimensions and stable ejection of ink droplets more than 1 million.

  18. UW VLSI chip tester

    NASA Astrophysics Data System (ADS)

    McKenzie, Neil

    1989-12-01

    We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

  19. STIC3 - Silicon Photomultiplier Timing Chip with picosecond resolution

    NASA Astrophysics Data System (ADS)

    Stankova, Vera; Shen, Wei; Briggl, Konrad; Chen, Huangshan; Fischer, Peter; Gil, Alejandro; Harion, Tobias; Kiworra, Volker; Munwes, Yonathan; Ritzert, Michael; Schultz-Coulon, Hans-Christian

    2015-07-01

    The diagnostic of pancreas and prostate cancer is a challenging task due to the background noise coming from the closer organs. The EndoToFPET-US project aims to combine the synergy between metabolic and anatomical (ultrasound) image in order to improve the precision in the tumor localization. The goal of the project is to develop a Positron Emission Tomography (PET) system that provides a time-of-flight resolution of 200 ps FWHM for improving the signal to noise ratio and further to improve the medical image quality. In order to achieve this purpose an ASIC has been designed for very high timing resolution in time-of-flight (ToF) applications. In this paper we present the ASIC performance and the first characterization measurements with the 64-channels prototype version (STiC3). Measurements are performed with LYSO scintillator crystal and a Multi Pixel Photon Counter (MPPC). Measurements with the chip show an analog-front-end stage jitter of 35 ps for the first photo-electron equivalent charge and reach 18 ps for the third photo-electron. Coincidence time resolution (CTR) of 240 ps FWHM is measured with 3.1×3.1×15 mm3 LYSO crystal and 50 μm pixel pitch MPPC. Further optimization including the Time-to-Digital Converter (TDC) non-linearity corrections and setup fine tuning are ongoing for achieving the desired CTR of 200 ps FWHM.

  20. MICROROC: MICRO-mesh gaseous structure Read-Out Chip

    NASA Astrophysics Data System (ADS)

    Adloff, C.; Blaha, J.; Chefdeville, M.; Dalmaz, A.; Drancourt, C.; Dulucq, F.; Espargilière, A.; Gaglione, R.; Geffroy, N.; Jacquemier, J.; Karyotakis, Y.; Martin-Chassard, G.; Prast, J.; Seguin-Moreau, N.; de La Taille, Ch; Vouters, G.

    2012-01-01

    MICRO MEsh GAseous Structure (MICROMEGAS) and Gas Electron Multipliers (GEM) detectors are two candidates for the active medium of a Digital Hadronic CALorimeter (DHCAL) as part of a high energy physics experiment at a future linear collider (ILC/CLIC). Physics requirements lead to a highly granular hadronic calorimeter with up to thirty million channels with probably only hit information (digital readout calorimeter). To validate the concept of digital hadronic calorimetry with such small cell size, the construction and test of a cubic meter technological prototype, made of 40 planes of one square meter each, is necessary. This technological prototype would contain about 400 000 electronic channels, thus requiring the development of front-end ASIC. Based on the experience gained with previous ASIC that were mounted on detectors and tested in particle beams, a new ASIC called MICROROC has been developped. This paper summarizes the caracterisation campaign that was conducted on this new chip as well as its integration into a large area Micromegas chamber of one square meter.

  1. A Universal Intelligent System-on-Chip Based Sensor Interface

    PubMed Central

    Mattoli, Virgilio; Mondini, Alessio; Mazzolai, Barbara; Ferri, Gabriele; Dario, Paolo

    2010-01-01

    The need for real-time/reliable/low-maintenance distributed monitoring systems, e.g., wireless sensor networks, has been becoming more and more evident in many applications in the environmental, agro-alimentary, medical, and industrial fields. The growing interest in technologies related to sensors is an important indicator of these new needs. The design and the realization of complex and/or distributed monitoring systems is often difficult due to the multitude of different electronic interfaces presented by the sensors available on the market. To address these issues the authors propose the concept of a Universal Intelligent Sensor Interface (UISI), a new low-cost system based on a single commercial chip able to convert a generic transducer into an intelligent sensor with multiple standardized interfaces. The device presented offers a flexible analog and/or digital front-end, able to interface different transducer typologies (such as conditioned, unconditioned, resistive, current output, capacitive and digital transducers). The device also provides enhanced processing and storage capabilities, as well as a configurable multi-standard output interface (including plug-and-play interface based on IEEE 1451.3). In this work the general concept of UISI and the design of reconfigurable hardware are presented, together with experimental test results validating the proposed device. PMID:22163624

  2. Steaming Chips Facilitates Bark Removal

    Treesearch

    John R. Erickson

    1976-01-01

    Whole tree chipping is a productive and economical harvesting system. The resultant product, however, is barky chips. THis paper outlines a promising method for removing the bark particles from whole tree chips.

  3. CHIP, CHIP, ARRAY! THREE CHIPS FOR POST-GENOMIC RESEARCH

    EPA Science Inventory

    Cambridge Healthtech Institute recently held the 4th installment of their popular "Lab-on-a-Chip" series in Zurich, Switzerland. As usual, it was enthusiastically received and over 225 people attended the 2-1/2 day meeting to see and hear about some of the latest developments an...

  4. Gas Sensor Test Chip

    NASA Technical Reports Server (NTRS)

    Buehler, M.; Ryan, M.

    1995-01-01

    A new test chip is being developed to characterize conducting polymers used in gas sensors. The chip, a seven-layer cofired alumina substrate with gold electrodes, contains 11 comb and U- bend test structures. These structures are designed to measure the sheet resistance, conduction anisotropy, and peripheral conduction of spin-coated films that are not subsequently patterned.

  5. ChIP-chip.

    PubMed

    Kim, Tae Hoon; Dekker, Job

    2018-05-01

    ChIP-chip can be used to analyze protein-DNA interactions in a region-wide and genome-wide manner. DNA microarrays contain PCR products or oligonucleotide probes that are designed to represent genomic sequences. Identification of genomic sites that interact with a specific protein is based on competitive hybridization of the ChIP-enriched DNA and the input DNA to DNA microarrays. The ChIP-chip protocol can be divided into two main sections: Amplification of ChIP DNA and hybridization of ChIP DNA to arrays. A large amount of DNA is required to hybridize to DNA arrays, and hybridization to a set of multiple commercial arrays that represent the entire human genome requires two rounds of PCR amplifications. The relative hybridization intensity of ChIP DNA and that of the input DNA is used to determine whether the probe sequence is a potential site of protein-DNA interaction. Resolution of actual genomic sites bound by the protein is dependent on the size of the chromatin and on the genomic distance between the probes on the array. As with expression profiling using gene chips, ChIP-chip experiments require multiple replicates for reliable statistical measure of protein-DNA interactions. © 2018 Cold Spring Harbor Laboratory Press.

  6. Enhancing the Front-End Phase of Design Methodology

    ERIC Educational Resources Information Center

    Elias, Erasto

    2006-01-01

    Design methodology (DM) is defined by the procedural path, expressed in design models, and techniques or methods used to untangle the various activities within a design model. Design education in universities is mainly based on descriptive design models. Much knowledge and organization have been built into DM to facilitate design teaching.…

  7. Design and implementation of the ATLAS TRT front end electronics

    NASA Astrophysics Data System (ADS)

    Newcomer, Mitch; Atlas TRT Collaboration

    2006-07-01

    The ATLAS TRT subsystem is comprised of 380,000 4 mm straw tube sensors ranging in length from 30 to 80 cm. Polypropelene plastic layers between straws and a xenon-based gas mixture in the straws allow the straws to be used for both tracking and transition radiation detection. Detector-mounted electronics with data sparsification was chosen to minimize the cable plant inside the super-conducting solenoid of the ATLAS inner tracker. The "on detector" environment required a small footprint, low noise, low power and radiation-tolerant readout capable of triggering at rates up to 20 MHz with an analog signal dynamic range of >300 times the discriminator setting. For tracking, a position resolution better than 150 μm requires leading edge trigger timing with ˜1 ns precision and for transition radiation detection, a charge collection time long enough to integrate the direct and reflected signal from the unterminated straw tube is needed for position-independent energy measurement. These goals have been achieved employing two custom Application-specific integrated circuits (ASICS) and board design techniques that successfully separate analog and digital functionality while providing an integral part of the straw tube shielding.

  8. Controlling front-end electronics boards using commercial solutions

    NASA Astrophysics Data System (ADS)

    Beneyton, R.; Gaspar, C.; Jost, B.; Schmeling, S.

    2002-04-01

    LHCb is a dedicated B-physics experiment under construction at CERN's large hadron collider (LHC) accelerator. This paper will describe the novel approach LHCb is taking toward controlling and monitoring of electronics boards. Instead of using the bus in a crate to exercise control over the boards, we use credit-card sized personal computers (CCPCs) connected via Ethernet to cheap control PCs. The CCPCs will provide a simple parallel, I2C, and JTAG buses toward the electronics board. Each board will be equipped with a CCPC and, hence, will be completely independently controlled. The advantages of this scheme versus the traditional bus-based scheme will be described. Also, the integration of the controls of the electronics boards into a commercial supervisory control and data acquisition (SCADA) system will be shown.

  9. Millimeter wave front-end figure of merit, part 2

    NASA Astrophysics Data System (ADS)

    Silberman, Gabriel G.

    1995-09-01

    This report presents a practical approach for defining and calculating a meaningful figure of merit for frequency modulated continuous wave radar systems with separate receive and transmit (bistatic) antennas.

  10. The Front-End to Google for Teachers' Online Searching

    ERIC Educational Resources Information Center

    Seyedarabi, Faezeh

    2006-01-01

    This paper reports on an ongoing work in designing and developing a personalised search tool for teachers' online searching using Google search engine (repository) for the implementation and testing of the first research prototype.

  11. An Alternative Front End Analysis Strategy for Complex Systems

    DTIC Science & Technology

    2014-12-01

    Mutual trust Trust across and between team members Team/collective efficacy How well the team works together effectively Team/collective orientation...and experts. Finally, it has been shown that one effect of expertise is the development of applicable schemas, which, in turn, reduce the working ...TASK NUMBER 409 5e. WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) U.S. Army Research Institute

  12. Front End for a neutrino factory or muon collider

    NASA Astrophysics Data System (ADS)

    Neuffer, D.; Snopok, P.; Alexahin, Y.

    2017-11-01

    A neutrino factory or muon collider requires the capture and cooling of a large number of muons. Scenarios for capture, bunching, phase-energy rotation and initial cooling of μ 's produced from a proton source target have been developed, initially for neutrino factory scenarios. They require a drift section from the target, a bunching section and a varphi -δ E rotation section leading into the cooling channel. Important concerns are rf limitations within the focusing magnetic fields and large losses in the transport. The currently preferred cooling channel design is an "HFOFO Snake" configuration that cools both μ+ and μ- transversely and longitudinally. The status of the design is presented and variations are discussed.

  13. Complete Imageless solution for overlay front-end manufacturing

    NASA Astrophysics Data System (ADS)

    Herisson, David; LeCacheux, Virginie; Touchet, Mathieu; Vachellerie, Vincent; Lecarpentier, Laurent; Felten, Franck; Polli, Marco

    2005-09-01

    Imageless option of KLA-Tencor RDM system (Recipe Data Management) is a new method of recipe creation, using only the mask design to define alignment target and measurement parameters. This technique is potentially the easiest tool to improve recipe management of a large amount of products in logic fab. Overlay recipes are created without wafer, by using a synthetic image (copy of gds mask file) for alignment pattern and target design like shape (frame in frame) and size for the measurement. A complete gauge study on critical CMOS 90nm Gate level has been conducted to evaluate reliability and robustness of the imageless recipe. We show that Imageless limits drastically the number of templates used for recipe creation, and improves or maintains measurement capability compare to manual recipe creation (operator dependant). Imageless appears to be a suitable solution for high volume manufacturing, as shown by the results obtained on production lots.

  14. Transparent Information Systems through Gateways, Front Ends, Intermediaries, and Interfaces.

    ERIC Educational Resources Information Center

    Williams, Martha E.

    1986-01-01

    Provides overview of design requirements for transparent information retrieval (implies that user sees through complexity of retrieval activities sequence). Highlights include need for transparent systems; history of transparent retrieval research; information retrieval functions (automated converters, routers, selectors, evaluators/analyzers);…

  15. Design of analog pixels front-end active feedback

    NASA Astrophysics Data System (ADS)

    Kmon, P.; Kadlubowski, L. A.; Kaczmarczyk, P.

    2018-01-01

    The paper presents the design of the active feedback used in a charge-sensitive amplifier. The predominant advantages of the presented circuit are its ability for setting wide range of pulse-time widths, small silicon area occupation and low power consumption. The feedback also allows sensor leakage current compensation and, thanks to an additional DC amplifier, it minimizes the output DC voltage variations, which is especially important in the DC coupled recording chain and for processes with limited supply voltage. The paper provides feedback description and its operation principle. The proposed circuit was designed in the CMOS 130nm technology.

  16. Front End for a neutrino factory or muon collider

    DOE PAGES

    Neuffer, David; Snopok, Pavel; Alexahin, Yuri

    2017-11-30

    A neutrino factory or muon collider requires the capture and cooling of a large number of muons. Scenarios for capture, bunching, phase-energy rotation and initial cooling of μ’s produced from a proton source target have been developed, initially for neutrino factory scenarios. They require a drift section from the target, a bunching section and a Φ-δE rotation section leading into the cooling channel. Important concerns are rf limitations within the focusing magnetic fields and large losses in the transport. The currently preferred cooling channel design is an “HFOFO Snake” configuration that cools both μ + and μ - transversely andmore » longitudinally. Finally, the status of the design is presented and variations are discussed.« less

  17. The Instructional Developer, Expert Systems, and the Front End Process.

    ERIC Educational Resources Information Center

    Dills, Charles R.; Romiszowski, Alexander

    This paper is intended to provide the instructional technologist already possessing some understanding of expert systems with some insight into two of the many steps involved in the design and production of such systems: knowledge acquisition and knowledge structuring or representation. It is also intended to help technologists to see how they…

  18. Design of coherent receiver optical front end for unamplified applications.

    PubMed

    Zhang, Bo; Malouin, Christian; Schmidt, Theodore J

    2012-01-30

    Advanced modulation schemes together with coherent detection and digital signal processing has enabled the next generation high-bandwidth optical communication systems. One of the key advantages of coherent detection is its superior receiver sensitivity compared to direct detection receivers due to the gain provided by the local oscillator (LO). In unamplified applications, such as metro and edge networks, the ultimate receiver sensitivity is dictated by the amount of shot noise, thermal noise, and the residual beating of the local oscillator with relative intensity noise (LO-RIN). We show that the best sensitivity is achieved when the thermal noise is balanced with the residual LO-RIN beat noise, which results in an optimum LO power. The impact of thermal noise from the transimpedance amplifier (TIA), the RIN from the LO, and the common mode rejection ratio (CMRR) from a balanced photodiode are individually analyzed via analytical models and compared to numerical simulations. The analytical model results match well with those of the numerical simulations, providing a simplified method to quantify the impact of receiver design tradeoffs. For a practical 100 Gb/s integrated coherent receiver with 7% FEC overhead, we show that an optimum receiver sensitivity of -33 dBm can be achieved at GFEC cliff of 8.55E-5 if the LO power is optimized at 11 dBm. We also discuss a potential method to monitor the imperfections of a balanced and integrated coherent receiver.

  19. Front End and HFOFO Snake for a Muon Facility

    SciTech Connect

    Neuffer, D.; Alexahin, Y.

    2015-09-01

    A neutrino factory or muon collider requires the capture and cooling of a large number of muons. Scenarios for capture, bunching, phase-energy rotation and initial cooling of μ’s produced from a proton source target have been developed, for neutrino factory and muon collider scenarios. They require a drift section from the target, a bunching section and amore » $$\\phi-\\delta E$$ rotation section leading into the cooling channel. The currently preferred cooling channel design is an “HFOFO Snake” configuration that cools both $$\\mu^+$$ and $$\\mu^-$$ transversely and longitudinally. The status of the design is presented and variations are discussed.« less

  20. Switched-beam radiometer front-end network analysis

    NASA Technical Reports Server (NTRS)

    Trew, R. J.; Bilbro, G. L.

    1994-01-01

    The noise figure performance of various delay-line networks fabricated from microstrip lines with varying number of elements was investigated using a computer simulation. The effects of resistive losses in both the transmission lines and power combiners were considered. In general, it is found that an optimum number of elements exists, depending upon the resistive losses present in the network. Small resistive losses are found to have a significant degrading effect upon the noise figure performance of the array. Extreme stability in switching characteristics is necessary to minimize the nondeterministic noise of the array. For example, it is found that a 6 percent tolerance on the delay-line lengths will produce a 0.2 db uncertainty in the noise figure which translates into a 13.67 K temperature uncertainty generated by the network. If the tolerance can be held to 2 percent, the uncertainty in noise figure and noise temperature will be 0.025 db and 1.67 K, respectively. Three phase shift networks fabricated using a commercially available PIN diode switch were investigated. Loaded-line phase shifters are found to have desirable RF and noise characteristics and are attractive components for use in phased-array networks.

  1. Identifying Values: The Front-End of Systemic School Restructuring.

    ERIC Educational Resources Information Center

    Lee, In-Sook

    The comprehensive categories of values, and the values in each category, to be articulated and consented to by stakeholders in school restructuring are explored through a qualitative case-study approach. A public elementary school that had approximately 530 students and that was undergoing restructuring was selected. Site visits, document reviews,…

  2. Intelligent Front-end Electronics for Silicon photodetectors (IFES)

    NASA Astrophysics Data System (ADS)

    Sauerzopf, Clemens; Gruber, Lukas; Suzuki, Ken; Zmeskal, Johann; Widmann, Eberhard

    2016-05-01

    While high channel density can be easily achieved for big experiments using custom made microchips, providing something similar for small and medium size experiments imposes a challenge. Within this work we describe a novel and cost effective solution to operate silicon photodetectors such as silicon photo multipliers (SiPM). The IFES modules provide the bias voltage for the detectors, a leading edge discriminator featuring time over threshold and a differential amplifier, all on one printed circuit board. We demonstrate under realistic conditions that the module is usable for high resolution timing measurements exploiting both charge and time information. Furthermore we show that the modules can be easily used in larger detector arrays. All in all this confirms that the IFES modules are a viable option for a broad range of experiments if cost-effectiveness and small form factor are required.

  3. HIGH RESOLUTION EMITTANCE MEASUREMENTS AT SNS FRONT END

    SciTech Connect

    Aleksandrov, Alexander V; Zhukov, Alexander P

    2013-01-01

    The Spallation Neutron Source (SNS) linac accelerates an H- beam from 2.5MeV up to 1GeV. Recently the emittance scanner in the MEBT (2.5 MeV) was upgraded. In addition to the slit - harp measurement, we now can use a slit installed on the same actuator as the harp. In combination with a faraday cup located downstream in DTL part of the linac, it represents a classical slit-slit emittance measurement device. While a slit slit scan takes much longer, it is immune to harp related problems such as wire cross talk, and thus looks promising for accurate halo measurements. Time resolutionmore » of the new device seems to be sufficient to estimate the amount of beam in the chopper gap (the scanner is downstream of the chopper), and probably to measure its emittance. This paper describes the initial measurements with the new device and some model validation data.« less

  4. A Front-End Analysis Of Rear-End Crashes

    DOT National Transportation Integrated Search

    1992-05-17

    THIS PAPER DESCRIBES THE APPLICATION OF A SEVEN-STEP CRASH PROBLEM ANALYSIS METHODOLOGY, AS DESCRIBED IN THE PRECEDING PAPER BY LEASURE (1), TO REAR-END CRASHES. THE PAPER SHOWS HOW MODELING OF REAR-END CRASH SCENARIOS AND CANDIDATE COUNTERMEASURE AC...

  5. FFAGs: Front-end for neutrino factories and medical accelerators

    NASA Astrophysics Data System (ADS)

    Mori, Yoshiharu

    The idea of Fixed Field Alternating Gradient (FFAG) accelerator was originated by different people and groups in the early 1950s. It was independently introduced by Ohkawa [Ohkawa (1953)], Symon et al. [Symon et al. (1956)], and Kolomensky [Kolomensky and Lebedev (1966)] when the strong Alternate Gradient (AG) focusing and the phase stability schemes were applied to particle acceleration. The first FFAG electron model was developed in the MURA accelerator project led by Kerst and Cole in the late 1950s. Since then, they have fabricated several electron models in the early 1960s [Symon et al. (1956)]. However, the studies did not lead to a single practical FFAG accelerator for the following 50 years. Because of the difficulties of treating non-linear magnetic field and RF acceleration for non-relativistic particles, the proton FFAG, especially, was not accomplished until recently. In 2000, the FFAG concept was revived with the world's first proton FFAG (POP) which was developed at KEK [Aiba (2000); Mori (1999)]. Since then, in many places [Berg (2004); Johnstone et al. (2004); Mori (2011); Ruggiero (2004); Trbojevic (2004)], FFAGs have been developed and constructed...

  6. Coherent Path Beamformer Front End for High Performance Acoustic Modems

    DTIC Science & Technology

    1999-09-30

    transmission underwater. This knowledge will be used to develop a test model for evaluating under water acoustic modem and other shallow water sonar ...rates can be achieved, as shown in the following two sections. WORK COMPLETED Two systems have been developed in the Sonar Laboratory of Ocean...2) More performant variable gain preamplifiers have been installed and the software updated for a better control of the dynamic range. 3) An

  7. Chipped Paint Crater

    NASA Image and Video Library

    2003-04-09

    In the high northern latitudes northwest of Alba Patera, a smooth mantle of material that covers the landscape appears chipped away from the rim of a large crater, as observed in this image from NASA Mars Odyssey spacecraft.

  8. Accelerator on a Chip

    SciTech Connect

    England, Joel

    2014-06-30

    SLAC's Joel England explains how the same fabrication techniques used for silicon computer microchips allowed their team to create the new laser-driven particle accelerator chips. (SLAC Multimedia Communications)

  9. Accelerator on a Chip

    ScienceCinema

    England, Joel

    2018-01-16

    SLAC's Joel England explains how the same fabrication techniques used for silicon computer microchips allowed their team to create the new laser-driven particle accelerator chips. (SLAC Multimedia Communications)

  10. Planar MEMS bio-chip for recording ion-channel currents in biological cells

    NASA Astrophysics Data System (ADS)

    Pandey, Santosh; Ferdous, Zannatul; White, Marvin H.

    2003-10-01

    We describe a planar MEMS silicon structure to record ion-channel currents in biological cells. The conventional method of performing an electrophysiological experiment, 'patch-clamping,' employs a glass micropipette. Despite careful treatments of the micropipette tip, such as fire polishing and surface coating, the latter is a source of thermal noise because of its inherent, tapered, conical structure, which gives rise to a large pipette resistance. This pipette resistance, when coupled with the self-capacitance of the biological cell, limits the available bandwidth and processing of fast transient, ion channel current pulses. In this work, we reduce considerably the pipette resistance with a planar micropipette on a silicon chip to permit the resolution of sub-millisecond, ion-channel pulses. We discuss the design topology of the device, describe the fabrication sequence, and highlight important critical issues. The design of an integrated on-chip CMOS instrumentation amplifier is described, which has a low-noise front-end, input-offset cancellation, correlated double sampling (CDS), and an ultra-high gain in the order of 1012V/A.

  11. Chip packaging technique

    NASA Technical Reports Server (NTRS)

    Jayaraj, Kumaraswamy (Inventor); Noll, Thomas E. (Inventor); Lockwood, Harry F. (Inventor)

    2001-01-01

    A hermetically sealed package for at least one semiconductor chip is provided which is formed of a substrate having electrical interconnects thereon to which the semiconductor chips are selectively bonded, and a lid which preferably functions as a heat sink, with a hermetic seal being formed around the chips between the substrate and the heat sink. The substrate is either formed of or includes a layer of a thermoplastic material having low moisture permeability which material is preferably a liquid crystal polymer (LCP) and is a multiaxially oriented LCP material for preferred embodiments. Where the lid is a heat sink, the heat sink is formed of a material having high thermal conductivity and preferably a coefficient of thermal expansion which substantially matches that of the chip. A hermetic bond is formed between the side of each chip opposite that connected to the substrate and the heat sink. The thermal bond between the substrate and the lid/heat sink may be a pinched seal or may be provided, for example by an LCP frame which is hermetically bonded or sealed on one side to the substrate and on the other side to the lid/heat sink. The chips may operate in the RF or microwave bands with suitable interconnects on the substrate and the chips may also include optical components with optical fibers being sealed into the substrate and aligned with corresponding optical components to transmit light in at least one direction. A plurality of packages may be physically and electrically connected together in a stack to form a 3D array.

  12. Chip connectivity verification program

    NASA Technical Reports Server (NTRS)

    Riley, Josh (Inventor); Patterson, George (Inventor)

    1999-01-01

    A method for testing electrical connectivity between conductive structures on a chip that is preferably layered with conductive and nonconductive layers. The method includes determining the layer on which each structure is located and defining the perimeter of each structure. Conductive layer connections between each of the layers are determined, and, for each structure, the points of intersection between the perimeter of that structure and the perimeter of each other structure on the chip are also determined. Finally, electrical connections between the structures are determined using the points of intersection and the conductive layer connections.

  13. Smart vision chips: An overview

    NASA Technical Reports Server (NTRS)

    Koch, Christof

    1994-01-01

    This viewgraph presentation presents four working analog VLSI vision chips: (1) time-derivative retina, (2) zero-crossing chip, (3) resistive fuse, and (4) figure-ground chip; work in progress on computing motion and neuromorphic systems; and conceptual and practical lessons learned.

  14. Cytometer on a Chip

    NASA Technical Reports Server (NTRS)

    Fernandez, Salvador M.

    2011-01-01

    A cytometer now under development exploits spatial sorting of sampled cells on a microarray chip followed by use of grating-coupled surface-plasmon-resonance imaging (GCSPRI) to detect the sorted cells. This cytometer on a chip is a prototype of contemplated future miniature cytometers that would be suitable for rapidly identifying pathogens and other cells of interest in both field and laboratory applications and that would be attractive as alternatives to conventional flow cytometers. The basic principle of operation of a conventional flow cytometer requires fluorescent labeling of sampled cells, stringent optical alignment of a laser beam with a narrow orifice, and flow of the cells through the orifice, which is subject to clogging. In contrast, the principle of operation of the present cytometer on a chip does not require fluorescent labeling of cells, stringent optical alignment, or flow through a narrow orifice. The basic principle of operation of the cytometer on a chip also reduces the complexity, mass, and power of the associated laser and detection systems, relative to those needed in conventional flow cytometry. Instead of making cells flow in single file through a narrow flow orifice for sequential interrogation as in conventional flow cytometry, a liquid containing suspended sampled cells is made to flow over the front surface of a microarray chip on which there are many capture spots. Each capture spot is coated with a thin (approximately 50-nm) layer of gold that is, in turn, coated with antibodies that bind to cell-surface molecules characteristic of one the cell species of interest. The multiplicity of capture spots makes it possible to perform rapid, massively parallel analysis of a large cell population. The binding of cells to each capture spot gives rise to a minute change in the index of refraction at the surface of the chip. This change in the index of refraction is what is sensed in GCSPRI, as described briefly below. The identities of the

  15. Cytometer on a Chip

    NASA Technical Reports Server (NTRS)

    Fernandez, Salvador M.

    2011-01-01

    A cytometer now under development exploits spatial sorting of sampled cells on a microarray chip followed by use of grating-coupled surface-plasmon-resonance imaging (GCSPRI) to detect the sorted cells. This cytometer on a chip is a prototype of contemplated future miniature cytometers that would be suitable for rapidly identifying pathogens and other cells of interest in both field and laboratory applications and that would be attractive as alternatives to conventional flow cytometers. The basic principle of operation of a conventional flow cytometer requires fluorescent labeling of sampled cells, stringent optical alignment of a laser beam with a narrow orifice, and flow of the cells through the orifice, which is subject to clogging. In contrast, the principle of operation of the present cytometer on a chip does not require fluorescent labeling of cells, stringent optical alignment, or flow through a narrow orifice. The basic principle of operation of the cytometer on a chip also reduces the complexity, mass, and power of the associated laser and detection systems, relative to those needed in conventional flow cytometry. Instead of making cells flow in single file through a narrow flow orifice for sequential interrogation as in conventional flow cytometry, a liquid containing suspended sampled cells is made to flow over the front surface of a microarray chip on which there are many capture spots. Each capture spot is coated with a thin (.50-nm) layer of gold that is, in turn, coated with antibodies that bind to cell-surface molecules characteristic of the cell species of interest. The multiplicity of capture spots makes it possible to perform rapid, massively parallel analysis of a large cell population. The binding of cells to each capture spot gives rise to a minute change in the index of refraction at the surface of the chip. This change in the index of refraction is what is sensed in GCSPRI, as described briefly below. The identities of the various species in

  16. Radiometer on a Chip

    NASA Technical Reports Server (NTRS)

    Chattopadhyay, Goutam; Gill, John J.; Mehdi, Imran; Lee, Choonsup; Schlecht, Erich T.; Skalare, Anders; Ward, John S.; Siegel, Peter H.; Thomas, Bertrand C.

    2009-01-01

    The radiometer on a chip (ROC) integrates whole wafers together to p rovide a robust, extremely powerful way of making submillimeter rece ivers that provide vertically integrated functionality. By integratin g at the wafer level, customizing the interconnects, and planarizing the transmission media, it is possible to create a lightweight asse mbly performing the function of several pieces in a more conventiona l radiometer.

  17. A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

    NASA Technical Reports Server (NTRS)

    Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

    2012-01-01

    Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

  18. Parallel integrated frame synchronizer chip

    NASA Technical Reports Server (NTRS)

    Solomon, Jeffrey Michael (Inventor); Ghuman, Parminder Singh (Inventor); Bennett, Toby Dennis (Inventor)

    2000-01-01

    A parallel integrated frame synchronizer which implements a sequential pipeline process wherein serial data in the form of telemetry data or weather satellite data enters the synchronizer by means of a front-end subsystem and passes to a parallel correlator subsystem or a weather satellite data processing subsystem. When in a CCSDS mode, data from the parallel correlator subsystem passes through a window subsystem, then to a data alignment subsystem and then to a bit transition density (BTD)/cyclical redundancy check (CRC) decoding subsystem. Data from the BTD/CRC decoding subsystem or data from the weather satellite data processing subsystem is then fed to an output subsystem where it is output from a data output port.

  19. Programmable optical processor chips: toward photonic RF filters with DSP-level flexibility and MHz-band selectivity

    NASA Astrophysics Data System (ADS)

    Xie, Yiwei; Geng, Zihan; Zhuang, Leimeng; Burla, Maurizio; Taddei, Caterina; Hoekman, Marcel; Leinse, Arne; Roeloffzen, Chris G. H.; Boller, Klaus-J.; Lowery, Arthur J.

    2017-12-01

    Integrated optical signal processors have been identified as a powerful engine for optical processing of microwave signals. They enable wideband and stable signal processing operations on miniaturized chips with ultimate control precision. As a promising application, such processors enables photonic implementations of reconfigurable radio frequency (RF) filters with wide design flexibility, large bandwidth, and high-frequency selectivity. This is a key technology for photonic-assisted RF front ends that opens a path to overcoming the bandwidth limitation of current digital electronics. Here, the recent progress of integrated optical signal processors for implementing such RF filters is reviewed. We highlight the use of a low-loss, high-index-contrast stoichiometric silicon nitride waveguide which promises to serve as a practical material platform for realizing high-performance optical signal processors and points toward photonic RF filters with digital signal processing (DSP)-level flexibility, hundreds-GHz bandwidth, MHz-band frequency selectivity, and full system integration on a chip scale.

  20. Compression Debarking of Stored Wood Chips

    Treesearch

    James A. Mattson

    1974-01-01

    Two 750 ft. piles of unbarked chips were stored for 1 year to evaluate the effect of chip storage on the effectiveness of bark-chip separations-segregation methods under study. in processing stored chips suffered more wood loss than fresh chips.

  1. On-Chip Biomedical Imaging

    PubMed Central

    Göröcs, Zoltán; Ozcan, Aydogan

    2012-01-01

    Lab-on-a-chip systems have been rapidly emerging to pave the way toward ultra-compact, efficient, mass producible and cost-effective biomedical research and diagnostic tools. Although such microfluidic and micro electromechanical systems achieved high levels of integration, and are capable of performing various important tasks on the same chip, such as cell culturing, sorting and staining, they still rely on conventional microscopes for their imaging needs. Recently several alternative on-chip optical imaging techniques have been introduced, which have the potential to substitute conventional microscopes for various lab-on-a-chip applications. Here we present a critical review of these recently emerging on-chip biomedical imaging modalities, including contact shadow imaging, lensfree holographic microscopy, fluorescent on-chip microscopy and lensfree optical tomography. PMID:23558399

  2. Optical Characterization of Tissue Phantoms Using a Silicon Integrated fdNIRS System on Chip.

    PubMed

    Sthalekar, Chirag C; Miao, Yun; Koomson, Valencia Joyner

    2017-04-01

    An interface circuit with signal processing and digitizing circuits for a high frequency, large area avalanche photodiode (APD) has been integrated in a 130 nm BiCMOS chip. The system enables the absolute oximetry of tissue using frequency domain Near Infrared Spectroscopy (fdNIRS). The system measures the light absorbed and scattered by the tissue by measuring the reduction in the amplitude of signal and phase shift introduced between the light source and detector which are placed a finite distance away from each other. The received 80 MHz RF signal is downconverted to a low frequency and amplified using a heterodyning scheme. The front-end transimpedance amplifier has a 3-level programmable gain that increases the dynamic range to 60 dB. The phase difference between an identical reference channel and the optical channel is measured with a 0.5° accuracy. The detectable current range is [Formula: see text] and with a 40 A/W reponsivity using the APD, power levels as low as 500 pW can be detected. Measurements of the absorption and reduced scattering coefficients of solid tissue phantoms using this system are compared with those using a commercial instrument with differences within 30%. Measurement of a milk based liquid tissue phantom show an increase in absorption coefficient with addition of black ink. The miniaturized circuit serves as an efficiently scalable system for multi-site detection for applications in neonatal cerebral oximetry and optical mammography.

  3. ISFET-based sensor signal processor chip design for environment monitoring applications

    NASA Astrophysics Data System (ADS)

    Chung, Wen-Yaw; Yang, Chung-Huang; Wang, Ming-Ga

    2004-12-01

    In recent years Ion-Sensitive Field Effect Transistor (ISFET) based transducers create valuable applications in physiological data acquisition and environment monitoring. This paper presents a mixed-mode ASIC design for potentiometric ISFET-based bio-chemical sensor applications including H+ sensing and hand-held pH meter. For battery power consideration, the proposed system consists of low voltage (3V) analog front-end readout circuits and digital processor has been developed and fabricated in a 0.5mm double-poly double-metal CMOS technology. To assure that the correct pH value can be measured, the two-point calibration circuitry based on the response of standard pH4 and pH7 buffer solution has been implemented by using algorithmic state machine hardware algorithms. The measurement accuracy of the chip is 10 bits and the measured range between pH 2 to pH 12 compared to ideal values is within the accuracy of 0.1pH. For homeland environmental applications, the system provide rapid, easy to use, and cost-effective on-site testing on the quality of water, such as drinking water, ground water and river water. The processor has a potential usage in battery-operated and portable devices in environmental monitoring applications compared to commercial hand-held pH meter.

  4. A CMOS wireless biomolecular sensing system-on-chip based on polysilicon nanowire technology.

    PubMed

    Huang, C-W; Huang, Y-J; Yen, P-W; Tsai, H-H; Liao, H-H; Juang, Y-Z; Lu, S-S; Lin, C-T

    2013-11-21

    As developments of modern societies, an on-field and personalized diagnosis has become important for disease prevention and proper treatment. To address this need, in this work, a polysilicon nanowire (poly-Si NW) based biosensor system-on-chip (bio-SSoC) is designed and fabricated by a 0.35 μm 2-Poly-4-Metal (2P4M) complementary metal-oxide-semiconductor (CMOS) process provided by a commercialized semiconductor foundry. Because of the advantages of CMOS system-on-chip (SoC) technologies, the poly-Si NW biosensor is integrated with a chopper differential-difference amplifier (DDA) based analog-front-end (AFE), a successive approximation analog-to-digital converter (SAR ADC), and a microcontroller to have better sensing capabilities than a traditional Si NW discrete measuring system. In addition, an on-off key (OOK) wireless transceiver is also integrated to form a wireless bio-SSoC technology. This is pioneering work to harness the momentum of CMOS integrated technology into emerging bio-diagnosis technologies. This integrated technology is experimentally examined to have a label-free and low-concentration biomolecular detection for both Hepatitis B Virus DNA (10 fM) and cardiac troponin I protein (3.2 pM). Based on this work, the implemented wireless bio-SSoC has demonstrated a good biomolecular sensing characteristic and a potential for low-cost and mobile applications. As a consequence, this developed technology can be a promising candidate for on-field and personalized applications in biomedical diagnosis.

  5. Wavefront image sensor chip

    PubMed Central

    Cui, Xiquan; Ren, Jian; Tearney, Guillermo J.; Yang, Changhuei

    2010-01-01

    We report the implementation of an image sensor chip, termed wavefront image sensor chip (WIS), that can measure both intensity/amplitude and phase front variations of a light wave separately and quantitatively. By monitoring the tightly confined transmitted light spots through a circular aperture grid in a high Fresnel number regime, we can measure both intensity and phase front variations with a high sampling density (11 µm) and high sensitivity (the sensitivity of normalized phase gradient measurement is 0.1 mrad under the typical working condition). By using WIS in a standard microscope, we can collect both bright-field (transmitted light intensity) and normalized phase gradient images. Our experiments further demonstrate that the normalized phase gradient images of polystyrene microspheres, unstained and stained starfish embryos, and strongly birefringent potato starch granules are improved versions of their corresponding differential interference contrast (DIC) microscope images in that they are artifact-free and quantitative. Besides phase microscopy, WIS can benefit machine recognition, object ranging, and texture assessment for a variety of applications. PMID:20721059

  6. Integrated Blood Barcode Chips

    PubMed Central

    Fan, Rong; Vermesh, Ophir; Srivastava, Alok; Yen, Brian K.H.; Qin, Lidong; Ahmad, Habib; Kwong, Gabriel A.; Liu, Chao-Chao; Gould, Juliane; Hood, Leroy; Heath, James R.

    2008-01-01

    Blood comprises the largest version of the human proteome1. Changes of plasma protein profiles can reflect physiological or pathological conditions associated with many human diseases, making blood the most important fluid for clinical diagnostics2-4. Nevertheless, only a handful of plasma proteins are utilized in routine clinical tests. This is due to a host of reasons, including the intrinsic complexity of the plasma proteome1, the heterogeneity of human diseases and the fast kinetics associated with protein degradation in sampled blood5. Simple technologies that can sensitively sample large numbers of proteins over broad concentration ranges, from small amounts of blood, and within minutes of sample collection, would assist in solving these problems. Herein, we report on an integrated microfluidic system, called the Integrated Blood Barcode Chip (IBBC). It enables on-chip blood separation and the rapid measurement of a panel of plasma proteins from small quantities of blood samples including a fingerprick of whole blood. This platform holds potential for inexpensive, non-invasive, and informative clinical diagnoses, particularly, for point-of-care. PMID:19029914

  7. MEDIPIX: a VLSI chip for a GaAs pixel detector for digital radiology

    NASA Astrophysics Data System (ADS)

    Amendolia, S. R.; Bertolucci, E.; Bisogni, M. G.; Bottigli, U.; Ceccopieri, A.; Ciocci, M. A.; Conti, M.; Delogu, P.; Fantacci, M. E.; Maestro, P.; Marzulli, V.; Pernigotti, E.; Romeo, N.; Rosso, V.; Rosso, P.; Stefanini, A.; Stumbo, S.

    1999-02-01

    A GaAs pixel detector designed for digital mammography, equipped with a 36-channel single photon counting discrete read-out electronics, was tested using a test object developed for quality control purposes in mammography. Each pixel was 200×200 μm 2 large, and 200 μm deep. The choice of GaAs with respect to silicon (largely used in other applications and with a more established technique) has been made because of the much better detection efficiency at mammographic energies, combined with a very good charge collection efficiency achieved thanks to new ohmic contacts. This GaAs detector is able to perform a measurement of low-contrast details, with minimum contrast lower (nearly a factor two) than that typically achievable with standard mammographic film+screen systems in the same conditions of clinical routine. This should allow for an earlier diagnosis of breast tumour masses. Due to these encouraging results, the next step in the evolution of our imaging system based on GaAs detectors has been the development of a VLSI front-end prototype chip (MEDIPIX ) in order to cover a much larger diagnostic area. The chip reads 64×64 channels in single photon counting mode, each one 170 μm wide. Each channel contains also a test input where a signal can be simulated, injecting a known charge through a 16 f F capacitor. Fake signals have been injected via the test input measuring and equalizing minimum thresholds for all the channels. On an average, in most of the performing chips available up to now, we have found that it is possible to set a threshold as low as 1800 electrons with an RMS of 150 electrons (10 standard deviations lower than the 20 keV photon signal roughly equivalent to 4500 electrons). The detector, bump-bonded to the chip, will be tested and a ladder of detectors will be prepared to be able to scan large surface objects.

  8. Universal fingerprinting chip server.

    PubMed

    Casique-Almazán, Janet; Larios-Serrato, Violeta; Olguín-Ruíz, Gabriela Edith; Sánchez-Vallejo, Carlos Javier; Maldonado-Rodríguez, Rogelio; Méndez-Tenorio, Alfonso

    2012-01-01

    The Virtual Hybridization approach predicts the most probable hybridization sites across a target nucleic acid of known sequence, including both perfect and mismatched pairings. Potential hybridization sites, having a user-defined minimum number of bases that are paired with the oligonucleotide probe, are first identified. Then free energy values are evaluated for each potential hybridization site, and if it has a calculated free energy of equal or higher negative value than a user-defined free energy cut-off value, it is considered as a site of high probability of hybridization. The Universal Fingerprinting Chip Applications Server contains the software for visualizing predicted hybridization patterns, which yields a simulated hybridization fingerprint that can be compared with experimentally derived fingerprints or with a virtual fingerprint arising from a different sample. The database is available for free at http://bioinformatica.homelinux.org/UFCVH/

  9. Single chip camera active pixel sensor

    NASA Technical Reports Server (NTRS)

    Shaw, Timothy (Inventor); Pain, Bedabrata (Inventor); Olson, Brita (Inventor); Nixon, Robert H. (Inventor); Fossum, Eric R. (Inventor); Panicacci, Roger A. (Inventor); Mansoorian, Barmak (Inventor)

    2003-01-01

    A totally digital single chip camera includes communications to operate most of its structure in serial communication mode. The digital single chip camera include a D/A converter for converting an input digital word into an analog reference signal. The chip includes all of the necessary circuitry for operating the chip using a single pin.

  10. Repairable chip bonding/interconnect process

    DOEpatents

    Bernhardt, Anthony F.; Contolini, Robert J.; Malba, Vincent; Riddle, Robert A.

    1997-01-01

    A repairable, chip-to-board interconnect process which addresses cost and testability issues in the multi-chip modules. This process can be carried out using a chip-on-sacrificial-substrate technique, involving laser processing. This process avoids the curing/solvent evolution problems encountered in prior approaches, as well is resolving prior plating problems and the requirements for fillets. For repairable high speed chip-to-board connection, transmission lines can be formed on the sides of the chip from chip bond pads, ending in a gull wing at the bottom of the chip for subsequent solder.

  11. Repairable chip bonding/interconnect process

    DOEpatents

    Bernhardt, A.F.; Contolini, R.J.; Malba, V.; Riddle, R.A.

    1997-08-05

    A repairable, chip-to-board interconnect process which addresses cost and testability issues in the multi-chip modules is disclosed. This process can be carried out using a chip-on-sacrificial-substrate technique, involving laser processing. This process avoids the curing/solvent evolution problems encountered in prior approaches, as well is resolving prior plating problems and the requirements for fillets. For repairable high speed chip-to-board connection, transmission lines can be formed on the sides of the chip from chip bond pads, ending in a gull wing at the bottom of the chip for subsequent solder. 10 figs.

  12. CALORIC: A readout chip for high granularity calorimeter

    SciTech Connect

    Royer, L.; Bonnard, J.; Manen, S.

    2011-07-01

    A very-front-end electronics has been developed to fulfil requirements for the next generation of electromagnetic calorimeters. The compactness of this kind of detector and its large number of channels (up to several millions) impose a drastic limitation of the power consumption and a high level of integration. The electronic channel proposed is first of all composed of a low-noise Charge Sensitive Amplifier (CSA) able to amplify the charge delivered by a silicon diode up to 10 pC. Next, a two-gain shaping, based on a Gated Integration (G.I.), is implemented to cover the 15 bits dynamic range required: a high gainmore » shaper processes signals from 4 fC (charge corresponding to the MIP) up to 1 pC, and a low gain filter handles charges up to 10 pC. The G.I. performs also the analog memorization of the signal until it is digitalized. Hence, the analog-to-digital conversion is carried out through a low-power 12-bit cyclic ADC. If the signal overloads the high-gain channel dynamic range, a comparator selects the low-gain channel instead. Moreover, an auto-trigger channel has been implemented in order to select and store a valid event over the noise. The timing sequence of the channel is managed by a digital IP. It controls the G.I. switches, generates all needed clocks, drives the ADC and delivers the final result over 12 bits. The whole readout channel is power controlled, which permits to reduce the consumption according to the duty cycle of the beam collider. Simulations have been performed with Spectre simulator on the prototype chip designed with the 0.35 {mu}m CMOS technology from Austriamicrosystems. Results show a non-linearity better than 0.1% for the high-gain channel, and a non-linearity limited to 1% for the low-gain channel. The Equivalent Noise Charge referred to the input of the channel is evaluated to 0.4 fC complying with the MIP/10 limit. With the timing sequence of the International Linear Collider, which presents a duty cycle of 1%, the power

  13. Bone chip-induced rhinosinusitis.

    PubMed

    Reilly, Brian K; Conley, David B

    2009-12-01

    This case report describes both the pathophysiology and management of chronic rhinosinusitis (CRS). Specifically, we report a case of chronic maxillary rhinosinusitis with a free-floating maxillary sinus calcification (bone chip). After obtaining the computed tomography scan, the patient underwent endoscopic sinus surgery, with removal of the uncinate, enlargement of the diseased natural ostium of the maxillary sinus, and removal of the diseased bone chip. This eliminated the nidus for infection, ultimately restoring mucociliary flow.

  14. Rutger's CAM2000 chip architecture

    NASA Technical Reports Server (NTRS)

    Smith, Donald E.; Hall, J. Storrs; Miyake, Keith

    1993-01-01

    This report describes the architecture and instruction set of the Rutgers CAM2000 memory chip. The CAM2000 combines features of Associative Processing (AP), Content Addressable Memory (CAM), and Dynamic Random Access Memory (DRAM) in a single chip package that is not only DRAM compatible but capable of applying simple massively parallel operations to memory. This document reflects the current status of the CAM2000 architecture and is continually updated to reflect the current state of the architecture and instruction set.

  15. A Charge Sensitive Pre-Amplifier for Smart Point-of-Care Devices Employing Polymer Based Lab-on-a-Chip

    SciTech Connect

    Wang, Hanfeng; Britton, Charles; Quaiyum, Farhan

    With increasing emphasis on implantable and portable medical devices, low-power, small-chip-area sensor readout system realized in lab-on-a-chip (LOC) platform is gaining more and more importance these days. The main building blocks of the LOC system include a front-end transducer that generates an electrical signal in response to the presence of an analyte of interest, signal processing electronics to process the signal to comply with a specific transmission protocol and a low-power transmitter, all realized in a single integrated circuit platform. Low power consumption and compactness of the components are essential requirements of the LOC system. This paper presents a novelmore » charge sensitive pre-amplifier developed in a standard 180-nm CMOS process suitable for implementing in an LOC platform. The pre-amplifier converts the charge generated by a pyroelectric transducer into a voltage signal, which provides a measurement of the temperature variation in biological fluids. The proposed design is capable of providing 0.8-mV/pC gain while consuming only 2.1 μW of power. Finally, the pre-amplifier composed of integrated components occupies an area of 0.038 mm 2.« less

  16. A Charge Sensitive Pre-Amplifier for Smart Point-of-Care Devices Employing Polymer Based Lab-on-a-Chip

    DOE PAGES

    Wang, Hanfeng; Britton, Charles; Quaiyum, Farhan; ...

    2018-01-01

    With increasing emphasis on implantable and portable medical devices, low-power, small-chip-area sensor readout system realized in lab-on-a-chip (LOC) platform is gaining more and more importance these days. The main building blocks of the LOC system include a front-end transducer that generates an electrical signal in response to the presence of an analyte of interest, signal processing electronics to process the signal to comply with a specific transmission protocol and a low-power transmitter, all realized in a single integrated circuit platform. Low power consumption and compactness of the components are essential requirements of the LOC system. This paper presents a novelmore » charge sensitive pre-amplifier developed in a standard 180-nm CMOS process suitable for implementing in an LOC platform. The pre-amplifier converts the charge generated by a pyroelectric transducer into a voltage signal, which provides a measurement of the temperature variation in biological fluids. The proposed design is capable of providing 0.8-mV/pC gain while consuming only 2.1 μW of power. Finally, the pre-amplifier composed of integrated components occupies an area of 0.038 mm 2.« less

  17. Advanced system on a chip microelectronics for spacecraft and science instruments

    NASA Astrophysics Data System (ADS)

    Paschalidis, Nikolaos P.

    2003-01-01

    The explosive growth of the modern microelectronics field opens new horizons for the development of new lightweight, low power, and smart spacecraft and science instrumentation systems in the new millennium explorations. Although this growth is mostly driven by the commercial need for low power, portable and computationally intensive products, the applicability is obvious in the space sector. The additional difficulties needed to be overcome for applicability in space include radiation hardness for total ionizing dose and single event effects (SEE), and reliability. Additionally, this new capability introduces a whole new philosophy of design and R&D, with strong implications in organizational and inter-agency program management. One key component specifically developed towards low power, small size, highly autonomous spacecraft systems, is the smart sensor remote input/output (TRIO) chip. TRIO can interface to 32 transducers with current sources/sinks and voltage sensing. It includes front-end analog signal processing, a 10-bit ADC, memory, and standard serial and parallel I/Os. These functions are very useful for spacecraft and subsystems health and status monitoring, and control actions. The key contributions of the TRIO are feasibility of modular architectures, elimination of several miles of wire harnessing, and power savings by orders of magnitude. TRIO freely operates from a single power supply 2.5- 5.5 V with power dissipation <10 mW. This system on a chip device rapidly becomes a NASA and Commercial Space standard as it is already selected by thousands in several new millennium missions, including Europa Orbiter, Mars Surveyor Program, Solar Probe, Pluto Express, Stereo, Contour, Messenger, etc. In the Science Instrumentation field common instruments that can greatly take advantage of the new technologies are: energetic-particle/plasma and wave instruments, imagers, mass spectrometers, X-ray and UV spectrographs, magnetometers, laser rangefinding

  18. Atom chip gravimeter

    NASA Astrophysics Data System (ADS)

    Schubert, Christian; Abend, Sven; Gebbe, Martina; Gersemann, Matthias; Ahlers, Holger; Müntinga, Hauke; Matthias, Jonas; Sahelgozin, Maral; Herr, Waldemar; Lämmerzahl, Claus; Ertmer, Wolfgang; Rasel, Ernst

    2016-04-01

    Atom interferometry has developed into a tool for measuring rotations [1], accelerations [2], and testing fundamental physics [3]. Gravimeters based on laser cooled atoms demonstrated residual uncertainties of few microgal [2,4] and were simplified for field applications [5]. Atomic gravimeters rely on the interference of matter waves which are coherently manipulated by laser light fields. The latter can be interpreted as rulers to which the position of the atoms is compared. At three points in time separated by a free evolution, the light fields are pulsed onto the atoms. First, a coherent superposition of two momentum states is produced, then the momentum is inverted, and finally the two trajectories are recombined. Depending on the acceleration the atoms experienced, the number of atoms detected in the output ports will change. Consequently, the acceleration can be determined from the output signal. The laser cooled atoms with microkelvin temperatures used in state-of-the-art gravimeters impose limits on the accuracy [4]. Therefore, ultra-cold atoms generated by Bose-Einstein condensation and delta-kick collimation [6,7] are expected to be the key for further improvements. These sources suffered from a low flux implying an incompatible noise floor, but a competitive performance was demonstrated recently with atom chips [8]. In the compact and robust setup constructed for operation in the drop tower [6] we demonstrated all steps necessary for an atom chip gravimeter with Bose-Einstein condensates in a ground based operation. We will discuss the principle of operation, the current performance, and the perspectives to supersede the state of the art. The authors thank the QUANTUS cooperation for contributions to the drop tower project in the earlier stages. This work is supported by the German Space Agency (DLR) with funds provided by the Federal Ministry for Economic Affairs and Energy (BMWi) due to an enactment of the German Bundestag under grant numbers DLR 50WM

  19. Lab-on-a-Chip

    NASA Technical Reports Server (NTRS)

    2004-01-01

    Labs on chips are manufactured in many shapes and sizes and can be used for numerous applications, from medical tests to water quality monitoring to detecting the signatures of life on other planets. The eight holes on this chip are actually ports that can be filled with fluids or chemicals. Tiny valves control the chemical processes by mixing fluids that move in the tiny channels that look like lines, connecting the ports. Scientists at NASA's Marshall Space Flight Center (MSFC) in Huntsville, Alabama designed this chip to grow biological crystals on the International Space Station. Through this research, they discovered that this technology is ideally suited for solving the challenges of the Vision for Space Exploration. For example, thousands of chips the size of dimes could be loaded on a Martian rover looking for biosignatures of past or present life. Other types of chips could be placed in handheld devices used to monitor microbes in water or to quickly conduct medical tests on astronauts. (NASA/MSFC/D.Stoffer)

  20. Camera-on-a-Chip

    NASA Technical Reports Server (NTRS)

    1999-01-01

    Jet Propulsion Laboratory's research on a second generation, solid-state image sensor technology has resulted in the Complementary Metal- Oxide Semiconductor Active Pixel Sensor (CMOS), establishing an alternative to the Charged Coupled Device (CCD). Photobit Corporation, the leading supplier of CMOS image sensors, has commercialized two products of their own based on this technology: the PB-100 and PB-300. These devices are cameras on a chip, combining all camera functions. CMOS "active-pixel" digital image sensors offer several advantages over CCDs, a technology used in video and still-camera applications for 30 years. The CMOS sensors draw less energy, they use the same manufacturing platform as most microprocessors and memory chips, and they allow on-chip programming of frame size, exposure, and other parameters.

  1. Chip seal design and specifications : final report.

    DOT National Transportation Integrated Search

    2016-12-01

    Chip seals or seal coats, are a pavement preservation method constructed using a layer of asphalt binder that is covered by a uniformly graded aggregate. The benefits of chip seal include: sealing surface cracks, keeping water from penetrating the su...

  2. Process for 3D chip stacking

    DOEpatents

    Malba, V.

    1998-11-10

    A manufacturable process for fabricating electrical interconnects which extend from a top surface of an integrated circuit chip to a sidewall of the chip using laser pantography to pattern three dimensional interconnects. The electrical interconnects may be of an L-connect or L-shaped type. The process implements three dimensional (3D) stacking by moving the conventional bond or interface pads on a chip to the sidewall of the chip. Implementation of the process includes: (1) holding individual chips for batch processing, (2) depositing a dielectric passivation layer on the top and sidewalls of the chips, (3) opening vias in the dielectric, (4) forming the interconnects by laser pantography, and (5) removing the chips from the holding means. The process enables low cost manufacturing of chips with bond pads on the sidewalls, which enables stacking for increased performance, reduced space, and higher functional per unit volume. 3 figs.

  3. Process for 3D chip stacking

    DOEpatents

    Malba, Vincent

    1998-01-01

    A manufacturable process for fabricating electrical interconnects which extend from a top surface of an integrated circuit chip to a sidewall of the chip using laser pantography to pattern three dimensional interconnects. The electrical interconnects may be of an L-connect or L-shaped type. The process implements three dimensional (3D) stacking by moving the conventional bond or interface pads on a chip to the sidewall of the chip. Implementation of the process includes: 1) holding individual chips for batch processing, 2) depositing a dielectric passivation layer on the top and sidewalls of the chips, 3) opening vias in the dielectric, 4) forming the interconnects by laser pantography, and 5) removing the chips from the holding means. The process enables low cost manufacturing of chips with bond pads on the sidewalls, which enables stacking for increased performance, reduced space, and higher functional per unit volume.

  4. Programmable Multi-Chip Module

    DOEpatents

    Kautz, David; Morgenstern, Howard; Blazek, Roy J.

    2005-05-24

    A multi-chip module comprising a low-temperature co-fired ceramic substrate having a first side on which are mounted active components and a second side on which are mounted passive components, wherein this segregation of components allows for hermetically sealing the active components with a cover while leaving accessible the passive components, and wherein the passive components are secured using a reflow soldering technique and are removable and replaceable so as to make the multi-chip module substantially programmable with regard to the passive components.

  5. Programmable Multi-Chip Module

    DOEpatents

    Kautz, David; Morgenstern, Howard; Blazek, Roy J.

    2004-11-16

    A multi-chip module comprising a low-temperature co-fired ceramic substrate having a first side on which are mounted active components and a second side on which are mounted passive components, wherein this segregation of components allows for hermetically sealing the active components with a cover while leaving accessible the passive components, and wherein the passive components are secured using a reflow soldering technique and are removable and replaceable so as to make the multi-chip module substantially programmable with regard to the passive components.

  6. Programmable multi-chip module

    DOEpatents

    Kautz, David; Morgenstern, Howard; Blazek, Roy J.

    2004-03-02

    A multi-chip module comprising a low-temperature co-fired ceramic substrate having a first side on which are mounted active components and a second side on which are mounted passive components, wherein this segregation of components allows for hermetically sealing the active components with a cover while leaving accessible the passive components, and wherein the passive components are secured using a reflow soldering technique and are removable and replaceable so as to make the multi-chip module substantially programmable with regard to the passive components.

  7. CMOS foveal image sensor chip

    NASA Technical Reports Server (NTRS)

    Scott, Peter (Inventor); Sridhar, Ramalingam (Inventor); Bandera, Cesar (Inventor); Xia, Shu (Inventor)

    2002-01-01

    A foveal image sensor integrated circuit comprising a plurality of CMOS active pixel sensors arranged both within and about a central fovea region of the chip. The pixels in the central fovea region have a smaller size than the pixels arranged in peripheral rings about the central region. A new photocharge normalization scheme and associated circuitry normalizes the output signals from the different size pixels in the array. The pixels are assembled into a multi-resolution rectilinear foveal image sensor chip using a novel access scheme to reduce the number of analog RAM cells needed. Localized spatial resolution declines monotonically with offset from the imager's optical axis, analogous to biological foveal vision.

  8. Wireless Interconnects for Intra-chip & Inter-chip Transmission

    NASA Astrophysics Data System (ADS)

    Narde, Rounak Singh

    With the emergence of Internet of Things and information revolution, the demand of high performance computing systems is increasing. The copper interconnects inside the computing chips have evolved into a sophisticated network of interconnects known as Network on Chip (NoC) comprising of routers, switches, repeaters, just like computer networks. When network on chip is implemented on a large scale like in Multicore Multichip (MCMC) systems for High Performance Computing (HPC) systems, length of interconnects increases and so are the problems like power dissipation, interconnect delays, clock synchronization and electrical noise. In this thesis, wireless interconnects are chosen as the substitute for wired copper interconnects. Wireless interconnects offer easy integration with CMOS fabrication and chip packaging. Using wireless interconnects working at unlicensed mm-wave band (57-64GHz), high data rate of Gbps can be achieved. This thesis presents study of transmission between zigzag antennas as wireless interconnects for Multichip multicores (MCMC) systems and 3D IC. For MCMC systems, a four-chips 16-cores model is analyzed with only four wireless interconnects in three configurations with different antenna orientations and locations. Return loss and transmission coefficients are simulated in ANSYS HFSS. Moreover, wireless interconnects are designed, fabricated and tested on a 6'' silicon wafer with resistivity of 55O-cm using a basic standard CMOS process. Wireless interconnect are designed to work at 30GHz using ANSYS HFSS. The fabricated antennas are resonating around 20GHz with a return loss of less than -10dB. The transmission coefficients between antenna pair within a 20mm x 20mm silicon die is found to be varying between -45dB to -55dB. Furthermore, wireless interconnect approach is extended for 3D IC. Wireless interconnects are implemented as zigzag antenna. This thesis extends the work of analyzing the wireless interconnects in 3D IC with different

  9. Capillary-Driven Microfluidic Chips for Miniaturized Immunoassays: Efficient Fabrication and Sealing of Chips Using a "Chip-Olate" Process.

    PubMed

    Temiz, Yuksel; Delamarche, Emmanuel

    2017-01-01

    The fabrication of silicon-based microfluidic chips is invaluable in supporting the development of many microfluidic concepts for research in the life sciences and in vitro diagnostic applications such as the realization of miniaturized immunoassays using capillary-driven chips. While being extremely abundant, the literature covering microfluidic chip fabrication and assay development might not have addressed properly the challenge of fabricating microfluidic chips on a wafer level or the need for dicing wafers to release chips that need then to be further processed, cleaned, rinsed, and dried one by one. Here, we describe the "chip-olate" process wherein microfluidic structures are formed on a silicon wafer, followed by partial dicing, cleaning, and drying steps. Then, integration of reagents (if any) can be done, followed by lamination of a sealing cover. Breaking by hand the partially diced wafer yields individual chips ready for use.

  10. Compression debarking of wood chips.

    Treesearch

    Rodger A. Arola; John R. Erickson

    1973-01-01

    Presents results from 2 years testing of a single-pass compression process for debarking wood chips of several species. The most significant variable was season of cut. Depending on species, approximately 70% of the bark was removed from wood cut in the growing season while approximately 45% was removed from wood cut in the dormant season.

  11. Silicon Carbide Integrated Circuit Chip

    NASA Image and Video Library

    2015-02-17

    A multilevel interconnect silicon carbide integrated circuit chip with co-fired ceramic package and circuit board recently developed at the NASA GRC Smart Sensors and Electronics Systems Branch for high temperature applications. High temperature silicon carbide electronics and compatible packaging technologies are elements of instrumentation for aerospace engine control and long term inner-solar planet explorations.

  12. Programmable synaptic chip for electronic neural networks

    NASA Technical Reports Server (NTRS)

    Moopenn, A.; Langenbacher, H.; Thakoor, A. P.; Khanna, S. K.

    1988-01-01

    A binary synaptic matrix chip has been developed for electronic neural networks. The matrix chip contains a programmable 32X32 array of 'long channel' NMOSFET binary connection elements implemented in a 3-micron bulk CMOS process. Since the neurons are kept off-chip, the synaptic chip serves as a 'cascadable' building block for a multi-chip synaptic network as large as 512X512 in size. As an alternative to the programmable NMOSFET (long channel) connection elements, tailored thin film resistors are deposited, in series with FET switches, on some CMOS test chips, to obtain the weak synaptic connections. Although deposition and patterning of the resistors require additional processing steps, they promise substantial savings in silicon area. The performance of synaptic chip in a 32-neuron breadboard system in an associative memory test application is discussed.

  13. Chipping whole trees for fuel chips: a production study

    Treesearch

    Dana Mitchell; Tom Gallagher

    2007-01-01

    A time and motion study was conducted to determine the productivity and cost of an in-woods chipping operation when processing whole mall-diameter trees for biomass. The study removed biomass from two overstocked stands and compared the cost of this treatment to existing alternatives. The treatment stands consisted of a 30-year-old longleaf pine stand and a 37-year-old...

  14. Silicon ball grid array chip carrier

    DOEpatents

    Palmer, David W.; Gassman, Richard A.; Chu, Dahwey

    2000-01-01

    A ball-grid-array integrated circuit (IC) chip carrier formed from a silicon substrate is disclosed. The silicon ball-grid-array chip carrier is of particular use with ICs having peripheral bond pads which can be reconfigured to a ball-grid-array. The use of a semiconductor substrate such as silicon for forming the ball-grid-array chip carrier allows the chip carrier to be fabricated on an IC process line with, at least in part, standard IC processes. Additionally, the silicon chip carrier can include components such as transistors, resistors, capacitors, inductors and sensors to form a "smart" chip carrier which can provide added functionality and testability to one or more ICs mounted on the chip carrier. Types of functionality that can be provided on the "smart" chip carrier include boundary-scan cells, built-in test structures, signal conditioning circuitry, power conditioning circuitry, and a reconfiguration capability. The "smart" chip carrier can also be used to form specialized or application-specific ICs (ASICs) from conventional ICs. Types of sensors that can be included on the silicon ball-grid-array chip carrier include temperature sensors, pressure sensors, stress sensors, inertia or acceleration sensors, and/or chemical sensors. These sensors can be fabricated by IC processes and can include microelectromechanical (MEM) devices.

  15. Development of apple chips technology

    NASA Astrophysics Data System (ADS)

    Kowalska, Hanna; Marzec, Agata; Kowalska, Jolanta; Samborska, Kinga; Tywonek, Małgorzata; Lenart, Andrzej

    2018-05-01

    For develop of apple chips technology without chemical preservation osmotic dehydration in cherry or apple juice concentrates or fructooligosaccharide solutions and convection drying were used. Studies included the effect of dehydration on the mass transfer in apples and the quality of the final product. The temperature, type of osmotic solution and its concentration were changeable. The fruit were tested on mass transfer indicators, stability (water activity), texture (breaking test) and nutritional value (polyphenol content, acidity). Sensory evaluation was also performed. On this basis, the verification of all options was made and the most acceptable samples were selected. Concentration of osmotic solutions at 25°Brix limited solids gain in apples. Under these conditions, the phenomenon of osmosis caused 8-10 times greater water loss than solids gain. Increasing the concentration of solutions up to 50°Brix had a significantly greater impact on mass exchange in apples, compared to increasing the temperature from 40 to 60 °C. Osmotic dehydration before drying did not significantly affect the water activity but increase of the temperature negatively affected on breaking force of the chips. Chips obtained by osmotic dehydration of apples in a cherry concentrate solution contained significantly more polyphenols, and were characterized by a higher acidity than the variants obtained by dehydration in concentrated apple juice. Furthermore, they were marked by red color which has been thought as part of the attractiveness of the product. The least sensory acceptable chips were prepared using osmotic pre-treatment in cherry concentrated juice solution with the addition of fructooligosaccharide.

  16. Aflatoxin M1 in Tarhana chips.

    PubMed

    Özçam, Mustafa; Obuz, Ersel; Tosun, Halil

    2014-01-01

    Tarhana chips are a popular traditional fermented food consumed widely in the Kahramanmaraş region of Turkey. Tarhana chips are different from many other types of fermented food in that they are produced in the form of tortilla chips. Cereal and yoghurt are the main ingredients in Tarhana chips. Aflatoxin M1 (AFM1) levels in dairy and dairy-based products are of concern for human health. To investigate AFM1 contamination, a total of 40 samples were collected from Kahramanmaraş region and AFM1 levels were determined by competitive enzyme-linked immunosorbent assay (ELISA). Furthermore, physicochemical characteristics of Tarhana chips were investigated and compared with classic fried chips in terms of nutritional value. Based on data obtained from enzyme-linked immunosorbent assay, 21 (52.5%) out of 40 samples contained AFM1 in the range 0.5-36.6 ng/kg, so AFM1 levels of all samples were below the legal limit.

  17. 3D printed high density, reversible, chip-to-chip microfluidic interconnects.

    PubMed

    Gong, Hua; Woolley, Adam T; Nordin, Gregory P

    2018-02-13

    Our latest developments in miniaturizing 3D printed microfluidics [Gong et al., Lab Chip, 2016, 16, 2450; Gong et al., Lab Chip, 2017, 17, 2899] offer the opportunity to fabricate highly integrated chips that measure only a few mm on a side. For such small chips, an interconnection method is needed to provide the necessary world-to-chip reagent and pneumatic connections. In this paper, we introduce simple integrated microgaskets (SIMs) and controlled-compression integrated microgaskets (CCIMs) to connect a small device chip to a larger interface chip that implements world-to-chip connections. SIMs or CCIMs are directly 3D printed as part of the device chip, and therefore no additional materials or components are required to make the connection to the larger 3D printed interface chip. We demonstrate 121 chip-to-chip interconnections in an 11 × 11 array for both SIMs and CCIMs with an areal density of 53 interconnections per mm 2 and show that they withstand fluid pressures of 50 psi. We further demonstrate their reusability by testing the devices 100 times without seal failure. Scaling experiments show that 20 × 20 interconnection arrays are feasible and that the CCIM areal density can be increased to 88 interconnections per mm 2 . We then show the utility of spatially distributed discrete CCIMs by using an interconnection chip with 28 chip-to-world interconnects to test 45 3D printed valves in a 9 × 5 array. Each valve is only 300 μm in diameter (the smallest yet reported for 3D printed valves). Every row of 5 valves is tested to at least 10 000 actuations, with one row tested to 1 000 000 actuations. In all cases, there is no sign of valve failure, and the CCIM interconnections prove an effective means of using a single interface chip to test a series of valve array chips.

  18. Microfluidic "thin chips" for chemical separations.

    PubMed

    Gaspar, Attila; Salgado, Marisol; Stevens, Schetema; Gomez, Frank A

    2010-08-01

    This paper describes the design, development and application of microfluidic "thin chips" fabricated from PDMS. Thin chips consist of multiple layers of PDMS chemically bonded onto each other. Unlike thicker PDMS chips that suffer from lack of sensitivity due to PDMS absorption in the VIS and UV range, the thinness of these chips allows for the detection of chromophoric species within the microchannel via an external fiber optics detection system. C18-modified reversed-phase silica particles are packed into the microchannel using a temporary taper created by a magnetic valve and separations using both pressure- and electrochromatographic-driven methods are detailed.

  19. Space division multiplexing chip-to-chip quantum key distribution.

    PubMed

    Bacco, Davide; Ding, Yunhong; Dalgaard, Kjeld; Rottwitt, Karsten; Oxenløwe, Leif Katsuo

    2017-09-29

    Quantum cryptography is set to become a key technology for future secure communications. However, to get maximum benefit in communication networks, transmission links will need to be shared among several quantum keys for several independent users. Such links will enable switching in quantum network nodes of the quantum keys to their respective destinations. In this paper we present an experimental demonstration of a photonic integrated silicon chip quantum key distribution protocols based on space division multiplexing (SDM), through multicore fiber technology. Parallel and independent quantum keys are obtained, which are useful in crypto-systems and future quantum network.

  20. Bark Separation During Chipping With a Parallel Knife Chipper

    Treesearch

    John R. Erickson

    1968-01-01

    Five winter-cut northern species were chipped in a frozen and unfrozen condition with a parallel knife chipper. The degree of bark separation during chipping and a relative gradation of chip size are reported.

  1. Self-powered integrated systems-on-chip (energy chip)

    NASA Astrophysics Data System (ADS)

    Hussain, M. M.; Fahad, H.; Rojas, J.; Hasan, M.; Talukdar, A.; Oommen, J.; Mink, J.

    2010-04-01

    In today's world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  2. Chips aus Plastik: Organische Elektronik

    NASA Astrophysics Data System (ADS)

    Kiy, Michael

    2003-01-01

    Künstliche organische Materialien werden in Zukunft vermehrt in der Elektronik eingesetzt werden. Obwohl sie gute Isolatoren sind, kann ein ausreichend großes elektrisches Feld in ihnen einen elektrischen Strom fließen lassen. Dazu injizieren Metallelektroden freie Ladungsträger wie Elektronen oder Löcher in das organische Material. Diese Ladungsträgerinjektion kann die elektrischen Eigenschaften geeigneter organischer Materialien vom Isolator bis zum Leiter steuern. Eine zukünftige Domäne solcher Kunststoffe werden einfache, billige Chips sein. Bei den Displays könnten sie bald die konventionellen Flüssigkristallanzeigen technisch überflügeln.

  3. On-chip integrated functional near infra-red spectroscopy (fNIRS) photoreceiver for portable brain imaging

    NASA Astrophysics Data System (ADS)

    Kamrani, Ehsan

    Optical brain imaging using functional near infra-red spectroscopy (fNIRS) offers a direct and noninvasive tool for monitoring of blood oxygenation. fNIRS is a noninvasive, safe, minimally intrusive, and high temporal-resolution technique for real-time and long-term brain imaging. It allows detecting both fast-neuronal and slow-hemodynamic signals. Besides the significant advantages of fNIRS systems, they still suffer from few drawbacks including low spatial-resolution, moderately high-level noise and high-sensitivity to movement. In order to overcome the limitations of currently available non-portable fNIRS systems, we have introduced a new low-power, miniaturized on-chip photodetector front-end intended for portable fNIRS systems. It includes silicon avalanche photodiode (SiAPD), Transimpedance amplifier (TIA), and Quench- Reset circuitry implemented using standard CMOS technologies to operate in both linear and Geiger modes. So it can be applied for both continuous-wave fNIRS (CW-fNIRS) and also single-photon counting applications. Several SiAPDs have been implemented in novel structures and shapes (Rectangular, Octagonal, Dual, Nested, Netted, Quadratic and Hexadecagonal) using different premature edge breakdown prevention techniques. The main characteristics of the SiAPDs are validated and the impact of each parameter and the device simulators (TCAD, COMSOL, etc.) have been studied based on the simulation and measurement results. Proposed techniques exhibit SiAPDs with high avalanche-gain (up to 119), low breakdown-voltage (around 12V) and high photon-detection efficiency (up to 72% in NIR region) in additional to a low dark-count rate (down to 30Hz at 1V excess bias voltage). Three new high gain-bandwidth product (GBW) and low-noise TIAs are introduced and implemented based on distributed-gain concept, logarithmic-amplification and automatic noise-rejection and have been applied in linear-mode of operation. The implemented TIAs offer a power

  4. Coverage and efficiency in current SNP chips

    PubMed Central

    Ha, Ngoc-Thuy; Freytag, Saskia; Bickeboeller, Heike

    2014-01-01

    To answer the question as to which commercial high-density SNP chip covers most of the human genome given a fixed budget, we compared the performance of 12 chips of different sizes released by Affymetrix and Illumina for the European, Asian, and African populations. These include Affymetrix' relatively new population-optimized arrays, whose SNP sets are each tailored toward a specific ethnicity. Our evaluation of the chips included the use of two measures, efficiency and cost–benefit ratio, which we developed as supplements to genetic coverage. Unlike coverage, these measures factor in the price of a chip or its substitute size (number of SNPs on chip), allowing comparisons to be drawn between differently priced chips. In this fashion, we identified the Affymetrix population-optimized arrays as offering the most cost-effective coverage for the Asian and African population. For the European population, we established the Illumina Human Omni 2.5-8 as the preferred choice. Interestingly, the Affymetrix chip tailored toward an Eastern Asian subpopulation performed well for all three populations investigated. However, our coverage estimates calculated for all chips proved much lower than those advertised by the producers. All our analyses were based on the 1000 Genome Project as reference population. PMID:24448550

  5. Performance evaluation of chip seals in Idaho.

    DOT National Transportation Integrated Search

    2010-08-01

    The intent of this research project is to identify a wide variety of parameters that influence the performance of pavements treated via chip seals within the State of Idaho. Chip sealing is currently one of the most popular methods of maintenance for...

  6. Microchannel cooling of face down bonded chips

    DOEpatents

    Bernhardt, A.F.

    1993-06-08

    Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

  7. Microluminometer chip and method to measure bioluminescence

    DOEpatents

    Simpson, Michael L [Knoxville, TN; Paulus, Michael J [Knoxville, TN; Sayler, Gary S [Blaine, TN; Applegate, Bruce M [West Lafayette, IN; Ripp, Steven A [Knoxville, TN

    2008-05-13

    An integrated microluminometer includes an integrated circuit chip having at least one n-well/p-substrate junction photodetector for converting light received into a photocurrent, and a detector on the chip for processing the photocurrent. A distributed electrode configuration including a plurality of spaced apart electrodes disposed on an active region of the photodetector is preferably used to raise efficiency.

  8. Lab-on a-Chip

    NASA Technical Reports Server (NTRS)

    2003-01-01

    Helen Cole, the project manager for the Lab-on-a-Chip Applications Development program, and Lisa Monaco, the project scientist for the program, insert a lab on a chip into the Caliper 42 which is specialized equipment that controls processes on commercial chips to support development of lab-on-a-chip applications. The system has special microscopes and imaging systems, so scientists can process and study different types of fluid, chemical, and medical tests conducted on chips. For example, researchers have examined fluorescent bacteria as it flows through the chips' fluid channels or microfluidic capillaries. Researchers at NASA's Marshall Space Flight Center (MSFC) in Huntsville, Alabama, have been studying how the lab-on-a-chip technology can be used for microbial detection, water quality monitoring, and detecting biosignatures of past or present life on Mars. The Marshall Center team is also collaborating with scientists at other NASA centers and at universities to develop custom chip designs for not only space applications, but for many Earth applications, such as for detecting deadly microbes in heating and air systems. (NASA/MSFC/D.Stoffer)

  9. The hardwood chip market in 2005

    Treesearch

    Peter J. Ince

    2005-01-01

    The North American Pulp and Paper industry continues to experience challenges and changes much like most other business sectors of the hardwood industry. Marketing policies and the raw material supply chain of pulpwood and chips are being affected. The issues surrounding supply for pulpwood and chips have a broad reach in affecting timber and log purchases, logging...

  10. Teaching Quality Control with Chocolate Chip Cookies

    ERIC Educational Resources Information Center

    Baker, Ardith

    2014-01-01

    Chocolate chip cookies are used to illustrate the importance and effectiveness of control charts in Statistical Process Control. By counting the number of chocolate chips, creating the spreadsheet, calculating the control limits and graphing the control charts, the student becomes actively engaged in the learning process. In addition, examining…

  11. Physiologically relevant organs on chips.

    PubMed

    Yum, Kyungsuk; Hong, Soon Gweon; Healy, Kevin E; Lee, Luke P

    2014-01-01

    Recent advances in integrating microengineering and tissue engineering have generated promising microengineered physiological models for experimental medicine and pharmaceutical research. Here we review the recent development of microengineered physiological systems, or also known as "ogans-on-chips", that reconstitute the physiologically critical features of specific human tissues and organs and their interactions. This technology uses microengineering approaches to construct organ-specific microenvironments, reconstituting tissue structures, tissue-tissue interactions and interfaces, and dynamic mechanical and biochemical stimuli found in specific organs, to direct cells to assemble into functional tissues. We first discuss microengineering approaches to reproduce the key elements of physiologically important, dynamic mechanical microenvironments, biochemical microenvironments, and microarchitectures of specific tissues and organs in microfluidic cell culture systems. This is followed by examples of microengineered individual organ models that incorporate the key elements of physiological microenvironments into single microfluidic cell culture systems to reproduce organ-level functions. Finally, microengineered multiple organ systems that simulate multiple organ interactions to better represent human physiology, including human responses to drugs, is covered in this review. This emerging organs-on-chips technology has the potential to become an alternative to 2D and 3D cell culture and animal models for experimental medicine, human disease modeling, drug development, and toxicology. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. Physiologically relevant organs on chips

    PubMed Central

    Yum, Kyungsuk; Hong, Soon Gweon; Lee, Luke P.

    2015-01-01

    Recent advances in integrating microengineering and tissue engineering have generated promising microengineered physiological models for experimental medicine and pharmaceutical research. Here we review the recent development of microengineered physiological systems, or organs on chips, that reconstitute the physiologically critical features of specific human tissues and organs and their interactions. This technology uses microengineering approaches to construct organ-specific microenvironments, reconstituting tissue structures, tissue–tissue interactions and interfaces, and dynamic mechanical and biochemical stimuli found in specific organs, to direct cells to assemble into functional tissues. We first discuss microengineering approaches to reproduce the key elements of physiologically important, dynamic mechanical microenvironments, biochemical microenvironments, and microarchitectures of specific tissues and organs in microfluidic cell culture systems. This is followed by examples of microengineered individual organ models that incorporate the key elements of physiological microenvironments into single microfluidic cell culture systems to reproduce organ-level functions. Finally, microengineered multiple organ systems that simulate multiple organ interactions to better represent human physiology, including human responses to drugs, is covered in this review. This emerging organs-on-chips technology has the potential to become an alternative to 2D and 3D cell culture and animal models for experimental medicine, human disease modeling, drug development, and toxicology. PMID:24357624

  13. Whole-Teflon microfluidic chips

    PubMed Central

    Ren, Kangning; Dai, Wen; Zhou, Jianhua; Su, Jing; Wu, Hongkai

    2011-01-01

    Although microfluidics has shown exciting potential, its broad applications are significantly limited by drawbacks of the materials used to make them. In this work, we present a convenient strategy for fabricating whole-Teflon microfluidic chips with integrated valves that show outstanding inertness to various chemicals and extreme resistance against all solvents. Compared with other microfluidic materials [e.g., poly(dimethylsiloxane) (PDMS)] the whole-Teflon chip has a few more advantages, such as no absorption of small molecules, little adsorption of biomolecules onto channel walls, and no leaching of residue molecules from the material bulk into the solution in the channel. Various biological cells have been cultured in the whole-Teflon channel. Adherent cells can attach to the channel bottom, spread, and proliferate well in the channels (with similar proliferation rate to the cells in PDMS channels with the same dimensions). The moderately good gas permeability of the Teflon materials makes it suitable to culture cells inside the microchannels for a long time. PMID:21536918

  14. 40 CFR 63.486 - Batch front-end process vent provisions.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.486... paragraph (b) of this section, owners and operators of new and existing affected sources with batch front...

  15. Development of multi-layer crystal detector and related front end electronics

    NASA Astrophysics Data System (ADS)

    Cardarelli, R.; Di Ciaccio, A.; Paolozzi, L.

    2014-05-01

    A crystal (diamond) particle detector has been developed and tested, whose constitute elements are a multi-layer polycrystalline diamond and a pick-up system capable of collecting in parallel the charge produced in the layers. The charge is read with a charge-to-voltage amplifier (5-6 mV/fC) realized with bipolar junction transistors in order to minimize the effect of the detector capacitance. The tests performed with cosmic rays and at the beam test facility of Frascati with 500 MeV electrons in single electron mode operation have shown that a detector with 4-5 layers of 250 μm thickness each and 9 mm2 active area exhibits an upper limit of 150 ps time resolution for minimum ionizing particles at an operating voltage of about 350 V.

  16. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... device (including, but not limited to, a thermocouple, ultra-violet beam sensor, or infrared sensor... temperature monitoring device equipped with a continuous recorder is required. (i) Where an incinerator other than a catalytic incinerator is used, the temperature monitoring device shall be installed in the...

  17. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... device (including, but not limited to, a thermocouple, ultra-violet beam sensor, or infrared sensor... temperature monitoring device equipped with a continuous recorder is required. (i) Where an incinerator other than a catalytic incinerator is used, the temperature monitoring device shall be installed in the...

  18. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... device (including, but not limited to, a thermocouple, ultra-violet beam sensor, or infrared sensor... temperature monitoring device equipped with a continuous recorder is required. (i) Where an incinerator other than a catalytic incinerator is used, the temperature monitoring device shall be installed in the...

  19. A 155-dB Dynamic Range Current Measurement Front End for Electrochemical Biosensing.

    PubMed

    Dai, Shanshan; Perera, Rukshan T; Yang, Zi; Rosenstein, Jacob K

    2016-10-01

    An integrated current measurement system with ultra wide dynamic range is presented and fabricated in a 180-nm CMOS technology. Its dual-mode design provides concurrent voltage and frequency outputs, without requiring an external clock source. An integrator-differentiator core provides a voltage output with a noise floor of 11.6 fA/ [Formula: see text] and a -3 dB cutoff frequency of 1.4 MHz. It is merged with an asynchronous current-to-frequency converter, which generates an output frequency linearly proportional to the input current. Together, the voltage and frequency outputs yield a current measurement range of 155 dB, spanning from 204 fA (100 Hz) or 1.25 pA (10 kHz) to 11.6 μA. The proposed architecture's low noise, wide bandwidth, and wide dynamic range make it ideal for measurements of highly nonlinear electrochemical and electrophysiological systems.

  20. Knowledge-based image data management - An expert front-end for the BROWSE facility

    NASA Technical Reports Server (NTRS)

    Stoms, David M.; Star, Jeffrey L.; Estes, John E.

    1988-01-01

    An intelligent user interface being added to the NASA-sponsored BROWSE testbed facility is described. BROWSE is a prototype system designed to explore issues involved in locating image data in distributed archives and displaying low-resolution versions of that imagery at a local terminal. For prototyping, the initial application is the remote sensing of forest and range land.

  1. Tissue Banking, Bioinformatics, and Electronic Medical Records: The Front-End Requirements for Personalized Medicine

    PubMed Central

    Suh, K. Stephen; Sarojini, Sreeja; Youssif, Maher; Nalley, Kip; Milinovikj, Natasha; Elloumi, Fathi; Russell, Steven; Pecora, Andrew; Schecter, Elyssa; Goy, Andre

    2013-01-01

    Personalized medicine promises patient-tailored treatments that enhance patient care and decrease overall treatment costs by focusing on genetics and “-omics” data obtained from patient biospecimens and records to guide therapy choices that generate good clinical outcomes. The approach relies on diagnostic and prognostic use of novel biomarkers discovered through combinations of tissue banking, bioinformatics, and electronic medical records (EMRs). The analytical power of bioinformatic platforms combined with patient clinical data from EMRs can reveal potential biomarkers and clinical phenotypes that allow researchers to develop experimental strategies using selected patient biospecimens stored in tissue banks. For cancer, high-quality biospecimens collected at diagnosis, first relapse, and various treatment stages provide crucial resources for study designs. To enlarge biospecimen collections, patient education regarding the value of specimen donation is vital. One approach for increasing consent is to offer publically available illustrations and game-like engagements demonstrating how wider sample availability facilitates development of novel therapies. The critical value of tissue bank samples, bioinformatics, and EMR in the early stages of the biomarker discovery process for personalized medicine is often overlooked. The data obtained also require cross-disciplinary collaborations to translate experimental results into clinical practice and diagnostic and prognostic use in personalized medicine. PMID:23818899

  2. UHF front-end feeding RFID-based body sensor networks by exploiting the reader signal

    NASA Astrophysics Data System (ADS)

    Pasca, M.; Colella, R.; Catarinucci, L.; Tarricone, L.; D'Amico, S.; Baschirotto, A.

    2016-05-01

    This paper presents an integrated, high-sensitivity UHF radio frequency identification (RFID) power management circuit for body sensor network applications. The circuit consists of a two-stage RF-DC Dickson's rectifier followed by an integrated five-stage DC-DC Pelliconi's charge pump driven by an ultralow start-up voltage LC oscillator. The DC-DC charge pump interposed between the RF-DC rectifier and the output load provides the RF to load isolation avoiding losses due to the diodes reverse saturation current. The RF-DC rectifier has been realized on FR4 substrate, while the charge pump and the oscillator have been realized in 180 nm complementary metal oxide semiconductor (CMOS) technology. Outdoor measurements demonstrate the ability of the power management circuit to provide 400 mV output voltage at 14 m distance from the UHF reader, in correspondence of -25 dBm input signal power. As demonstrated in the literature, such output voltage level is suitable to supply body sensor network nodes.

  3. The Design and Evaluation of a Front-End User Interface for Energy Researchers.

    ERIC Educational Resources Information Center

    Borgman, Christine L.; And Others

    1989-01-01

    Reports on the Online Access to Knowledge (OAK) Project, which developed software to support end user access to a Department of Energy database based on the skill levels and needs of energy researchers. The discussion covers issues in development, evaluation, and the study of user behavior in designing an interface tailored to a special…

  4. OPAC: The Next Generation Placing an Encore Front End onto a SirsiDynix ILS

    ERIC Educational Resources Information Center

    Marcin, Susan; Morris, Peter

    2008-01-01

    Over the last few years, there has been a wealth of materials written and presented on next-generation library catalogs. These next-generation interfaces strive to turn "standard" integrated library systems (ILSs) into more nimble and robust search platforms that offer more user-friendly 2.0 enhancements for users. Rather than abandoning…

  5. The Front End of Interdisciplinarity: An Acculturation Framework for Explaining Varieties of Engagement

    ERIC Educational Resources Information Center

    Horn, Sierk A.

    2015-01-01

    Scholars trained and credentialed in disciplines have a vast array of response options when challenged to engage with others from other disciplinary backgrounds. By considering the ways in which disciplines are like cultures and putting acculturation theory squarely into the domain of interdisciplinary studies, this article takes a new look at…

  6. Visualization for Hyper-Heuristics. Front-End Graphical User Interface

    SciTech Connect

    Kroenung, Lauren

    Modern society is faced with ever more complex problems, many of which can be formulated as generate-and-test optimization problems. General-purpose optimization algorithms are not well suited for real-world scenarios where many instances of the same problem class need to be repeatedly and efficiently solved because they are not targeted to a particular scenario. Hyper-heuristics automate the design of algorithms to create a custom algorithm for a particular scenario. While such automated design has great advantages, it can often be difficult to understand exactly how a design was derived and why it should be trusted. This project aims to address thesemore » issues of usability by creating an easy-to-use graphical user interface (GUI) for hyper-heuristics to support practitioners, as well as scientific visualization of the produced automated designs. My contributions to this project are exhibited in the user-facing portion of the developed system and the detailed scientific visualizations created from back-end data.« less

  7. Retrieval Constraints on the Front End Create Differences in Recollection on a Subsequent Test

    ERIC Educational Resources Information Center

    Marsh, Richard L.; Meeks, J. Thadeus; Cook, Gabriel I.; Clark-Foos, Arlo; Hicks, Jason L.; Brewer, Gene A.

    2009-01-01

    Four experiments were conducted to investigate how the cognitive control of memory retrieval selects particular qualitative characteristics as a consequence of instantiating a retrieval mode for recognition memory. Adapting the memory for foils paradigm from Jacoby, Shimizu, Daniels, and Rhodes (Jacoby, L. L., Shimizu, Y., Daniels, K. A., &…

  8. Front end evaluation research results. Communications and concept planning: Hatfield Marine Science Center

    NASA Technical Reports Server (NTRS)

    Falk, John H.; Holland, Dana

    1994-01-01

    An evaluation for the renovation of the existing visitor center at the Hatfield Marine Sciences Center (HMSC) was undertaken, in conjunction with the communications planning phase of the project. The outcome is expected to be the development of a communications plan and selection of concepts for visitors' interpretive experience. In the course of the evaluation, data were collected from 140 visitors to HMSC using both a questionnaire and face to face semi-structured interviews. Major results of the evaluation covered: 1, reasons for attending the HMSC; 2, visitor expectations; 3, visitors's knowledge of general science and of marine life and environments; 4, visitors' level of interest and attitudes toward exhibit themes; 5, issue areas of greatest interest; and 6, research areas of greatest interest.Visitors to t he HMSC had a strong orientation toward seeing and closely interacting with marine life and environments.

  9. Natural Language Processor as a Universal Front End to Expert Systems.

    DTIC Science & Technology

    1983-12-01

    EGaschnig 19791 4.1.7 ESCA SPECTRA INTERPRETER, ESCA (Electron Spectroscopy for Chemical Analysis) is ~ an expert system which directly processes...then used as input to the ESCA Interpreter program. The 0 program, like that of CRYSALIS, is intended to be used by and expert in the field of chemical ...expect to be there. For example, in the DENDRAL 0 chemical analysis system[Handbook of AI], chemical names such as benzene and methanol, must form part of

  10. Diligence in front-end processes is critical: an interview with Cheryl A. Harmon.

    PubMed

    Harmon, Cheryl A

    2002-12-01

    Cheryl Harmon's position reflects her organization's emphasis on an expanded role for the CFO. Harmon was hired recently to serve as CFO of Provena Covenant Medical Center, (PCMC) in Urbana, Illinois. Her mission as CFO is to help develop strategies to ensure that Provena Covenant maintains its financial stability. Harmon appreciates Povena Covenant's creative approaches to challenges faced by many healthcare organizations, such as workforce shortages.

  11. Engineering Education on the "Fuzzy" Front End: A High-Technology Entrepreneurship Model

    ERIC Educational Resources Information Center

    Crawford, G. P.; Broer, D. J.; Bastiaansen, C. W. M.

    2006-01-01

    We have developed a university entrepreneurship program, culminating in a prototype and business plan, with five objectives: (1) value for all academic participants' (2) introduction to engineering issues for students; (3) refinement of engineering students' "soft" skills; (4) training for students in creating value out of embryonic ideas; and (5)…

  12. The Naval Enlisted Professional Development Information System (NEPDIS): Front End Analysis (FEA) Process. Technical Report 159.

    ERIC Educational Resources Information Center

    Aagard, James A.; Ansbro, Thomas M.

    The Naval Enlisted Professional Development Information System (NEPDIS) was designed to function as a fully computerized information assembly and analysis system to support labor force, personnel, and training management. The NEPDIS comprises separate training development, instructional, training record and evaluation, career development, and…

  13. Front-end Design and Characterization for the ν-Angra Nuclear Reactor Monitoring Detector

    NASA Astrophysics Data System (ADS)

    Dornelas, T. I.; Araújo, F. T. H.; Cerqueira, A. S.; Costa, J. A.; Nóbrega, R. A.

    2016-07-01

    The Neutrinos Angra (ν-Angra) Experiment aims to construct an antineutrinos detection device capable of monitoring the Angra dos Reis nuclear reactor activity. Nuclear reactors are intense sources of antineutrinos, and the thermal power released in the fission process is directly related to the flow rate of these particles. The antineutrinos energy spectrum also provides valuable information on the nuclear source isotopic composition. The proposed detector will be equipped with photomultipliers tubes (PMT) which will be readout by a custom Amplifier-Shaper-Discriminator circuit designed to condition its output signals to the acquisition modules to be digitized and processed by an FPGA. The readout circuit should be sensitive to single photoelectron signals, process fast signals, with a full-width-half-amplitude of about 5 ns, have a narrow enough output pulse width to detect both particles coming out from the inverse beta decay (bar nue+p → n + e+), and its output amplitude should be linear to the number of photoelectrons generated inside the PMT, used for energy estimation. In this work, some of the main PMT characteristics are measured and a new readout circuit is proposed, described and characterized.

  14. JLIFE: THE JEFFERSON LAB INTERACTIVE FRONT END FOR THE OPTICAL PROPAGATION CODE

    SciTech Connect

    Watson, Anne M.; Shinn, Michelle D.

    2013-08-01

    We present details on a graphical interface for the open source software program Optical Propagation Code, or OPC. This interface, written in Java, allows a user with no knowledge of OPC to create an optical system, with lenses, mirrors, apertures, etc. and the appropriate drifts between them. The Java code creates the appropriate Perl script that serves as the input for OPC. The mode profile is then output at each optical element. The display can be either an intensity profile along the x axis, or as an isometric 3D plot which can be tilted and rotated. These profiles can bemore » saved. Examples of the input and output will be presented.« less

  15. Production data in media systems and press front ends: capture, formats and database methods

    NASA Astrophysics Data System (ADS)

    Karttunen, Simo

    1997-02-01

    The nature, purpose and data presentation features of media jobs are analyzed in relation to the content, document, process and resource management in media production. Formats are the natural way of presenting, collecting and storing information, contents, document components and final documents. The state of the art and the trends in the media formats and production data are reviewed. The types and the amount of production data are listed, e.g. events, schedules, product descriptions, reports, visual support, quality, process states and color data. The data exchange must be vendor-neutral. Adequate infrastructure and system architecture are defined for production and media data. The roles of open servers and intranets are evaluated and their potential roles as future solutions are anticipated. The press frontend is the part of print media production where large files dominate. The new output alternatives, i.e. film recorders, direct plate output (CTP and CTP-on-press) and digital, plateless printing lines need new workflow tools and very efficient file and format management. The paper analyzes the capture, formatting and storing of job files and respective production data, such as the event logs of the processes. Intranet, browsers, Java applets and open web severs will be used to capture production data, especially where intranets are used anyhow, or where several companies are networked to plan, design and use documents and printed products. The user aspects of installing intranets is stressed since there are numerous more traditional and more dedicated networking solutions on the market.

  16. Source-Constrained Recall: Front-End and Back-End Control of Retrieval Quality

    ERIC Educational Resources Information Center

    Halamish, Vered; Goldsmith, Morris; Jacoby, Larry L.

    2012-01-01

    Research on the strategic regulation of memory accuracy has focused primarily on monitoring and control processes used to edit out incorrect information after it is retrieved (back-end control). Recent studies, however, suggest that rememberers also enhance accuracy by preventing the retrieval of incorrect information in the first place (front-end…

  17. NSLS-II storage ring insertion device and front-end commissioning and operation

    SciTech Connect

    Wang, G., E-mail: gwang@bnl.gov; Shaftan, T.; Amundsen, C.

    The National Synchrotron Light Source II (NSLS-II) is a state of the art 3 GeV third generation light source at Brookhaven National Laboratory. During spring/ summer of 2014, the storage ring was commissioned up to 50 mA without insertion devices. In the fall of 2014, we began commissioning of the project beamlines, which included seven insertion devices on six ID ports. Beamlines IXS, HXN, CSX-1, CSX-2, CHX, SRX, and XPD-1 consist of elliptically polarized undulator (EPU), damping wigglers (DW) and in-vacuum undulators (IVU) covering from VUV to hard x-ray range. In this paper, experience with commissioning and operation is discussed.more » We focus on reaching storage ring performance with IDs, including injection, design emittance, compensation of orbit distortions caused by ID residual field, source point stability, beam alignment and tools for control, monitoring and protection of the ring chambers from ID radiation.« less

  18. 40 CFR 63.492 - Batch front-end process vents-reporting requirements.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... change within 180 days after the process change is made or with the next Periodic Report, whichever is... made or with the next Periodic Report, whichever is later. The following information shall be submitted... control device other than those specified in § 63.489(b) and listed in Table 6 of this subpart or requests...

  19. 40 CFR 63.492 - Batch front-end process vents-reporting requirements.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... days after the process change is made or with the next Periodic Report, whichever is later. The owner... next Periodic Report, whichever is later. The following information shall be submitted: (1) A... than those specified in § 63.489(b) and listed in Table 6 of this subpart or requests approval to...

  20. 40 CFR 63.492 - Batch front-end process vents-reporting requirements.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... change within 180 days after the process change is made or with the next Periodic Report, whichever is... made or with the next Periodic Report, whichever is later. The following information shall be submitted... control device other than those specified in § 63.489(b) and listed in Table 6 of this subpart or requests...

  1. 40 CFR 63.492 - Batch front-end process vents-reporting requirements.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... days after the process change is made or with the next Periodic Report, whichever is later. The owner... next Periodic Report, whichever is later. The following information shall be submitted: (1) A... than those specified in § 63.489(b) and listed in Table 6 of this subpart or requests approval to...

  2. 40 CFR 63.492 - Batch front-end process vents-reporting requirements.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... change within 180 days after the process change is made or with the next Periodic Report, whichever is... made or with the next Periodic Report, whichever is later. The following information shall be submitted... control device other than those specified in § 63.489(b) and listed in Table 6 of this subpart or requests...

  3. [Design of a Front-end Device of Heart Rate Variability Analysis System Based on Photoplethysmography].

    PubMed

    Shi, Lei; Sun, Peng; Pang, Yu; Luo, Zhiyong; Wang, Wei; Wang, Yanxiang

    2016-02-01

    Heart rate variability (HRV) is the difference between the successive changes in the heartbeat cycle, and it is produced in the autonomic nervous system modulation of the sinus node of the heart. The HRV is a valuable indicator in predicting the sudden cardiac death and arrhythmic events. Traditional analysis of HRV is based on a multielectrocardiogram (ECG), but the ECG signal acquisition is complex, so we have designed an HRV analysis system based on photoplethysmography (PPG). PPG signal is collected by a microcontroller from human's finger, and it is sent to the terminal via USB-Serial module. The terminal software not only collects the data and plot waveforms, but also stores the data for future HRV analysis. The system is small in size, low in power consumption, and easy for operation. It is suitable for daily care no matter whether it is used at home or in a hospital.

  4. Advanced Distributed Simulation Technology II (ADST-II) Dismounted Warrior Network Front End Analysis Experiments

    DTIC Science & Technology

    1997-12-19

    Resource Consultants Inc. (RCI) Science Applications InternatT Corp (SAIC) Veda Inc. Virtual Space Devices (VSD) 1.1 Background The Land Warrior...network. The VICs included: • VIC Alpha - a fully immersive Dismounted Soldier System developed by Veda under a STRICOM applied research effort...consists of the Dismounted Soldier System (DSS), which is characterized as follows: • Developed by Veda under a STRICOM applied research effort

  5. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... installed in the gas stream immediately before and after the catalyst bed. (2) Where a flare is used, a device (including, but not limited to, a thermocouple, ultra-violet beam sensor, or infrared sensor... at the scrubber influent for liquid flow. Gas stream flow shall be determined using one of the...

  6. 40 CFR 63.489 - Batch front-end process vents-monitoring equipment.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... installed in the gas stream immediately before and after the catalyst bed. (2) Where a flare is used, a device (including, but not limited to, a thermocouple, ultra-violet beam sensor, or infrared sensor... at the scrubber influent for liquid flow. Gas stream flow shall be determined using one of the...

  7. LANSCE-R WIRE-SCANNER ANALOG FRONT-END ELECTRONICS

    SciTech Connect

    Gruchalla, Michael E.

    2011-01-01

    A new AFE is being developed for the new LANSCE-R wire-scanner systems. The new AFE is implemented in a National Instruments Compact RIO (cRIO) module installed a BiRa 4U BiRIO cRIO chassis specifically designed to accommodate the cRIO crate and all the wire-scanner interface, control and motor-drive electronics. A single AFE module provides interface to both X and Y wire sensors using true DC coupled transimpedance amplifiers providing collection of the wire charge signals, real-time wire integrity verification using the normal dataacquisition system, and wire bias of 0V to +/-50V. The AFE system is designed to accommodate comparatively long macropulsesmore » (>1ms) with high PRF (>120Hz) without the need to provide timing signals. The basic AFE bandwidth is flat from true DC to 50kHz with a true first-order pole at 50kHz. Numeric integration in the cRIO FPGA provides real-time pulse-to-pulse numeric integration of the AFE signal to compute the total charge collected in each macropulse. This method of charge collection eliminates the need to provide synchronization signals to the wire-scanner AFE while providing the capability to accurately record the charge from long macropulses at high PRF.« less

  8. Front-End and Back-End Database Design and Development: Scholar's Academy Case Study

    ERIC Educational Resources Information Center

    Parks, Rachida F.; Hall, Chelsea A.

    2016-01-01

    This case study consists of a real database project for a charter school--Scholar's Academy--and provides background information on the school and its cafeteria processing system. Also included are functional requirements and some illustrative data. Students are tasked with the design and development of a database for the purpose of improving the…

  9. 40 CFR 63.485 - Continuous front-end process vent provisions.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... has no stripper(s)). The limitation shall be calculated and submitted in accordance with paragraph (q... elastomer product leaving the stripper in 2010, Mg/yr 1.74 = variability factor, unitless (B) For ethylene...

  10. 40 CFR 63.485 - Continuous front-end process vent provisions.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... has no stripper(s)). The limitation shall be calculated and submitted in accordance with paragraph (q... elastomer product leaving the stripper in 2010, Mg/yr 1.74 = variability factor, unitless (B) For ethylene...

  11. Front-End Anti-Viral Detection Mechanisms Using Replicating/Self-Replicating Software

    DTIC Science & Technology

    1989-10-19

    Trojan Horse program, these programs were omitted from the proof of concept. Future considerations will address these type of programs directly and...which relocates in memory. 3. Trojan Horse : A program that does other than what it was intended to do. 4. Prevention: Stop the initial and subsequent...then performed a risks analysis of potential threats. Since it is impossible, using existing technologies, to detect a well-written WORM or trojan horse

  12. Hybrid recursive active filters for duplexing in RF transmitter front-ends

    NASA Astrophysics Data System (ADS)

    Gottardo, Giuseppe; Donati, Giovanni; Musolff, Christian; Fischer, Georg; Felgentreff, Tilman

    2016-08-01

    Duplex filters in modern base transceiver stations shape the channel in order to perform common frequency division duplex operations. Usually, they are designed as cavity filters, which are expensive and have large dimensions. Thanks to the emerging digital technology and fast digital converters, it is possible to transfer the efforts of designing analog duplex filters into digital numeric algorithms applied to feedback structures, operating on power. This solution provides the shaping of the signal spectrum directly at the output of the radio frequency (RF) power amplifiers (PAs) relaxing the transmitter design especially in the duplexer and in the antenna sections. The design of a digital baseband feedback applied to the analog power RF amplifiers (hybrid filter) is presented and verified by measurements. A model to describe the hybrid system is investigated, and the relation between phase and resonance peaks of the resulting periodic band-pass transfer function is described. The stability condition of the system is analyzed using Nyquist criterion. A solution involving a number of digital feedback and forward branches is investigated defining the parameters of the recursive structure. This solution allows the closed loop system to show a periodic band pass with up to 500 kHz bandwidth at the output of the RF amplifier. The band-pass magnitude reaches up to 17 dB selectivity. The rejection of the PA noise in the out-of-band frequencies is verified by measurements. The filter is tested with a modulated LTE (Long Term Evolution) signal showing an ACPR (Adjacent Channel Power Ratio) enhancement of 10 dB of the transmitted signal.

  13. Acoustic backing in 3-D integration of CMUT with front-end electronics.

    PubMed

    Berg, Sigrid; Rønnekleiv, Arne

    2012-07-01

    Capacitive micromachined ultrasonic transducers (CMUTs) have shown promising qualities for medical imaging. However, there are still some problems to be investigated, and some challenges to overcome. Acoustic backing is necessary to prevent SAWs excited in the surface of the silicon substrate from affecting the transmit pattern from the array. In addition, echoes resulting from bulk waves in the substrate must be removed. There is growing interest in integrating electronic circuits to do some of the beamforming directly below the transducer array. This may be easier to achieve for CMUTs than for traditional piezoelectric transducers. We will present simulations showing that the thickness of the silicon substrate and thicknesses and acoustic properties of the bonding material must be considered, especially when designing highfrequency transducers. Through simulations, we compare the acoustic properties of 3-D stacks bonded with three different bonding techniques; solid-liquid interdiffusion (SLID) bonding, direct fusion bonding, and anisotropic conductive adhesives (ACA). We look at a CMUT array with a center frequency of 30 MHz and three silicon wafers underneath, having a total silicon thickness of 100 μm. We find that fusion bonding is most beneficial if we want to prevent surface waves from damaging the array response, but SLID and ACA are also promising if bonding layer thicknesses can be reduced.

  14. Front-End Analysis Methods for the Noncommissioned Officer Education System

    DTIC Science & Technology

    2013-02-01

    The Noncommissioned Officer Education System plays a crucial role in Soldier development by providing both institutional training and structured-self...created challenges with maintaining currency of institutional training . Questions have arisen regarding the optimal placement of tasks as their...relevance changes, especially considering the resources required to update institutional training . An analysis was conducted to identify the

  15. Investigating bone chip formation in craniotomy.

    PubMed

    Huiyu, He; Chengyong, Wang; Yue, Zhang; Yanbin, Zheng; Linlin, Xu; Guoneng, Xie; Danna, Zhao; Bin, Chen; Haoan, Chen

    2017-10-01

    In a craniotomy, the milling cutter is one of the most important cutting tools. The operating performance, tool durability and cutting damage to patients are influenced by the tool's sharpness, intensity and structure, whereas the cutting characteristics rely on interactions between the tool and the skull. In this study, an orthogonal cutting experiment during a craniotomy of fresh pig skulls was performed to investigate chip formation on the side cutting and face cutting of the skull using a high-speed camera. The cutting forces with different combinations of cutting parameters, such as the rake angle, clearance angle, depth of cut and cutting speed, were measured. The skull bone microstructure and cutting damage were observed by scanning electron microscope. Cutting models for different cutting approaches and various depths of cut were constructed and analyzed. The study demonstrated that the effects of shearing, tension and extrusion occur during chip formation. Various chip types, such as unit chips, splintering chips and continuous chips, were generated. Continuous pieces of chips, which are advisable for easy removal from the field of operation, were formed at greater depths of cut and tool rake angles greater than 10°. Cutting damage could be relieved with a faster recovery with clearance angles greater than 20°.

  16. A Cell Programmable Assay (CPA) chip.

    PubMed

    Ju, Jongil; Warrick, Jay; Beebe, David J

    2010-08-21

    This article describes two kinds of "Cell Programmable Assay" (CPA) chips that utilize passive pumping for the culture and autonomous staining of cells to simply common protocols. One is a single timer channel CPA (sCPA) chip that has one timer channel and one main channel containing a cell culture chamber. The sCPA is used to culture and stain cells using Hoechst nuclear staining dye (a 2 step staining process). The other is a dual timer channel CPA (dCPA) chip that has two timer channels and one main channel with a chamber for cell culture. The dCPA is used here to culture, fix, permeablize, and stain cells using DAPI. The additional timer channel of the dCPA chip allows for automation of 3 steps. The CPA chips were successfully evaluated using HEK 293 cells. In addition, we provide a simplified equation for tuning or redesigning CPA chips to meet the needs of a variety of protocols that may require different timings. The equation is easy to use as it only depends upon the dimensions of microchannel and the volume of the reagent drops. The sCPA and dCPA chips can be readily modified to apply to a wide variety of common cell culture methods and procedures.

  17. Three dimensional, multi-chip module

    DOEpatents

    Bernhardt, A.F.; Petersen, R.W.

    1993-08-31

    A plurality of multi-chip modules are stacked and bonded around the perimeter by sold-bump bonds to adjacent modules on, for instance, three sides of the perimeter. The fourth side can be used for coolant distribution, for more interconnect structures, or other features, depending on particular design considerations of the chip set. The multi-chip modules comprise a circuit board, having a planarized interconnect structure formed on a first major surface, and integrated circuit chips bonded to the planarized interconnect surface. Around the periphery of each circuit board, long, narrow dummy chips'' are bonded to the finished circuit board to form a perimeter wall. The wall is higher than any of the chips on the circuit board, so that the flat back surface of the board above will only touch the perimeter wall. Module-to-module interconnect is laser-patterned on the sides of the boards and over the perimeter wall in the same way and at the same time that chip to board interconnect may be laser-patterned.

  18. Three dimensional, multi-chip module

    DOEpatents

    Bernhardt, Anthony F.; Petersen, Robert W.

    1993-01-01

    A plurality of multi-chip modules are stacked and bonded around the perimeter by sold-bump bonds to adjacent modules on, for instance, three sides of the perimeter. The fourth side can be used for coolant distribution, for more interconnect structures, or other features, depending on particular design considerations of the chip set. The multi-chip modules comprise a circuit board, having a planarized interconnect structure formed on a first major surface, and integrated circuit chips bonded to the planarized interconnect surface. Around the periphery of each circuit board, long, narrow "dummy chips" are bonded to the finished circuit board to form a perimeter wall. The wall is higher than any of the chips on the circuit board, so that the flat back surface of the board above will only touch the perimeter wall. Module-to-module interconnect is laser-patterned o the sides of the boards and over the perimeter wall in the same way and at the same time that chip to board interconnect may be laser-patterned.

  19. Microchannel cooling of face down bonded chips

    DOEpatents

    Bernhardt, Anthony F.

    1993-01-01

    Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

  20. A VLSI VAX chip set

    NASA Astrophysics Data System (ADS)

    Johnson, W. N.; Herrick, W. V.; Grundmann, W. J.

    1984-10-01

    For the first time, VLSI technology is used to compress the full functinality and comparable performance of the VAX 11/780 super-minicomputer into a 1.2 M transistor microprocessor chip set. There was no subsetting of the 304 instruction set and the 17 data types, nor reduction in hardware support for the 4 Gbyte virtual memory management architecture. The chipset supports an integral 8 kbyte memory cache, a 13.3 Mbyte/s system bus, and sophisticated multiprocessing. High performance is achieved through microcode optimizations afforded by the large control store, tightly coupled address and data caches, the use of internal and external 32 bit datapaths, the extensive aplication of both microlevel and macrolevel pipelining, and the use of specialized hardware assists.

  1. Assessing the Power of Exome Chips.

    PubMed

    Page, Christian Magnus; Baranzini, Sergio E; Mevik, Bjørn-Helge; Bos, Steffan Daniel; Harbo, Hanne F; Andreassen, Bettina Kulle

    2015-01-01

    Genotyping chips for rare and low-frequent variants have recently gained popularity with the introduction of exome chips, but the utility of these chips remains unclear. These chips were designed using exome sequencing data from mainly American-European individuals, enriched for a narrow set of common diseases. In addition, it is well-known that the statistical power of detecting associations with rare and low-frequent variants is much lower compared to studies exclusively involving common variants. We developed a simulation program adaptable to any exome chip design to empirically evaluate the power of the exome chips. We implemented the main properties of the Illumina HumanExome BeadChip array. The simulated data sets were used to assess the power of exome chip based studies for varying effect sizes and causal variant scenarios. We applied two widely-used statistical approaches for rare and low-frequency variants, which collapse the variants into genetic regions or genes. Under optimal conditions, we found that a sample size between 20,000 to 30,000 individuals were needed in order to detect modest effect sizes (0.5% < PAR > 1%) with 80% power. For small effect sizes (PAR <0.5%), 60,000-100,000 individuals were needed in the presence of non-causal variants. In conclusion, we found that at least tens of thousands of individuals are necessary to detect modest effects under optimal conditions. In addition, when using rare variant chips on cohorts or diseases they were not originally designed for, the identification of associated variants or genes will be even more challenging.

  2. CHIPPING FRACTURE RESISTANCE OF DENTURE TOOTH MATERIALS

    PubMed Central

    Quinn, G. D.; Giuseppetti, A. A.; Hoffman, K. H.

    2014-01-01

    Objective The applicability of the edge chipping method to denture tooth materials was assessed. These are softer materials than those usually tested by edge chipping. The edge chipping fracture resistances of polymethylmethacrylate (PMMA) based and two filled resin composite denture tooth materials were compared. Methods An edge chipping machine was used to chip rectangular blocks and flattened anterior denture teeth. Force versus edge distance data were collected over a broad range of forces and distances. Between 20 and 65 chips were made per condition depending upon the material, the scatter, and the indenter type. Different indenter types were used including Rockwell C, sharp conical 120°, Knoop, and Vickers. The edge toughness, Te, was evaluated for different indenter types. Results The edge chipping data collected on the blocks matched the data collected from flattened teeth. High scatter, particularly at large distances and loads, meant that many tests (up to 64) were necessary to compare the denture tooth materials and to ascertain the appropriate data trends. A linear force – distance trend analysis was adequate for comparing these materials. A power law trend might be more appropriate, but the large scatter obscured the definitive determination of the precise trend. Different indenters produce different linear trends, with the ranking of: sharp conical 120°, Rockwell C, and Knoop, from lowest to highest edge toughness. Vickers indenter data were extremely scattered and a sensible trend could not be obtained. Edge toughness was inversely correlated to hardness. Significance Edge chipping data collected either from simple laboratory scale test blocks or from actual denture teeth may be used to evaluate denture materials. The edge chipping method’s applicability has been extended to another class of restorative materials. PMID:24674342

  3. Determining the Terminal Velocity of Wood and Bark Chips

    Treesearch

    John A. Sturos

    1972-01-01

    Designing an efficient air flotation segregator to segregate bark chips from wood chips requires that the terminal velocities be determined for various pulpwood species. The technique described here uses forced air in a vertical wind tunnel with the chip initially at rest on a stationary screen; when the terminal air velocity in reached, the chip begins to float. A...

  4. Chip-to-Chip Half Duplex Spiking Data Communication over Power Supply Rails

    NASA Astrophysics Data System (ADS)

    Hashida, Takushi; Nagata, Makoto

    Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at more than 100Mbps. A pair of transceivers consumes 1.35mA from 3.3V, at 130Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by 30dB, purifying power supply current for internal circuits. Bi-directional spiking communication was successfully examined in a 90-nm CMOS prototype setup of on-chip waveform capturing. A micro controller forwards clock pulses to and receives data streams from a comparator based waveform capturer formed on a different chip, through a single pair of power and ground traces. The bit error rate is small enough not to degrade waveform acquisition capability, maintaining the spurious free dynamic range of higher than 50dB.

  5. A multi-year survey of stem-end chip defect in chipping potatoes (Solanum tuberosum L.)

    USDA-ARS?s Scientific Manuscript database

    One of the most serious tuber quality concerns of US chip potato growers is stem-end chip defect, which is defined as a localized post-fry discoloration in and adjacent to the vasculature on the stem end portion of potato chips. The incidence and severity of stem-end chip defect vary with growing lo...

  6. Compression Debarking of Branchwood Chips from Finland

    Treesearch

    Rodger A. Arola; William A. Hillstrom

    1972-01-01

    Discusses the results of tests to remove bark and needles from spruce and pine branchwood chips that had been previously subjected to micro-organic action in aged storage piles. Various combinations of methods were used to accomplish beneficiation.

  7. Sustaining Moore's law with 3D chips

    DOE PAGES

    DeBenedictis, Erik P.; Badaroglu, Mustafa; Chen, An; ...

    2017-08-01

    Here, rather than continue the expensive and time-consuming quest for transistor replacement, the authors argue that 3D chips coupled with new computer architectures can keep Moore's law on its traditional scaling path.

  8. Sustaining Moore's law with 3D chips

    SciTech Connect

    DeBenedictis, Erik P.; Badaroglu, Mustafa; Chen, An

    Here, rather than continue the expensive and time-consuming quest for transistor replacement, the authors argue that 3D chips coupled with new computer architectures can keep Moore's law on its traditional scaling path.

  9. Chip seal performance measures : best practices.

    DOT National Transportation Integrated Search

    2015-03-01

    The Washington State Department of Transportation (WSDOT) has a long history of designing, constructing, : and maintaining chip seal or bituminous surface treatment pavements. However, to date WSDOT has not : developed pavement performance indicators...

  10. Beneficiation of Compression Debarked Wood Chips

    Treesearch

    James A. Mattson

    1974-01-01

    Presents the results of a preliminary study of secondary beneficiation of compression debarked chips to reduce residual bark to acceptable amounts. Ballmilling is a feasible method of reducing residual bark and minimizing wood loss.

  11. Prevention of Stripping under Chip Seals

    DOT National Transportation Integrated Search

    2017-10-01

    Eighteen chip-sealed roadways in eight cities and counties in Minnesota were evaluated both in the field (for condition surveys and density tests) and in the laboratory (for permeability, stripping, tensile-strength ratio, asphalt film thickness, and...

  12. Attachment method for stacked integrated circuit (IC) chips

    DOEpatents

    Bernhardt, A.F.; Malba, V.

    1999-08-03

    An attachment method for stacked integrated circuit (IC) chips is disclosed. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM. 12 figs.

  13. Attachment method for stacked integrated circuit (IC) chips

    DOEpatents

    Bernhardt, Anthony F.; Malba, Vincent

    1999-01-01

    An attachment method for stacked integrated circuit (IC) chips. The method involves connecting stacked chips, such as DRAM memory chips, to each other and/or to a circuit board. Pads on the individual chips are rerouted to form pads on the side of the chip, after which the chips are stacked on top of each other whereby desired interconnections to other chips or a circuit board can be accomplished via the side-located pads. The pads on the side of a chip are connected to metal lines on a flexible plastic tape (flex) by anisotropically conductive adhesive (ACA). Metal lines on the flex are likewise connected to other pads on chips and/or to pads on a circuit board. In the case of a stack of DRAM chips, pads to corresponding address lines on the various chips may be connected to the same metal line on the flex to form an address bus. This method has the advantage of reducing the number of connections required to be made to the circuit board due to bussing; the flex can accommodate dimensional variation in the alignment of chips in the stack; bonding of the ACA is accomplished at low temperature and is otherwise simpler and less expensive than solder bonding; chips can be bonded to the ACA all at once if the sides of the chips are substantially coplanar, as in the case for stacks of identical chips, such as DRAM.

  14. Optical time division multiplexer on silicon chip.

    PubMed

    Aboketaf, Abdelsalam A; Elshaari, Ali W; Preble, Stefan F

    2010-06-21

    In this work, we experimentally demonstrate a novel broadband optical time division multiplexer (OTDM) on a silicon chip. The fabricated devices generate 20 Gb/s and 40 Gb/s signals starting from a 5 Gb/s input signal. The proposed design has a small footprint of 1mm x 1mm. The system is inherently broadband with a bandwidth of over 100nm making it suitable for high-speed optical networks on chip.

  15. Industry trends in chip storage and handling

    Treesearch

    Tim McDonald; Alastair Twaddle

    2000-01-01

    A survey was conducted of US pulp and paper mills to characterize chip pile management trends. The survey was developed by members of the TAPPI Fiber Raw Material Supply Committee and mailed out in December of 1999. There were a total of 80 respondents to the survey. A typical mill was foudn to maintain one sofhvood and one hardwood chip pile, with maximum inventory of...

  16. Quantum Optics in Diamond Nanophotonic Chips

    DTIC Science & Technology

    2014-07-01

    quantum cryptography , quantum teleportation, quantum computation. Springer-Verlag, London, UK, 2000. 8 [3] J. I. Cirac, P. Zoller, H. J. Kimble, and...AFRL-OSR-VA-TR-2014-0188 Quantum Optics in Diamond Nanophotonic Chips Dirk Englund THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK INC...Progress Report Program Manager: Dr. Gernot Pomrenke Quantum Optics in Diamond Nanophotonic Chips AFOSR Directorate: Physics and Electronics Research

  17. [Detection of transgenic crop with gene chip].

    PubMed

    Huang, Ying-Chun; Sun, Chun-Yun; Feng, Hong; Hu, Xiao-Dong; Yin, Hai-Bin

    2003-05-01

    Some selected available sequences of reporter genes,resistant genes, promoters and terminators are amplified by PCR for the probes of transgenic crop detection gene chip. These probes are arrayed at definite density and printed on the surface of amino-slides by bioRobot MicroGrid II. Results showed that gene chip worked quickly and correctly, when transgenic rice, pawpaw,maize and soybean were applied.

  18. Materials for microfluidic chip fabrication.

    PubMed

    Ren, Kangning; Zhou, Jianhua; Wu, Hongkai

    2013-11-19

    Through manipulating fluids using microfabricated channel and chamber structures, microfluidics is a powerful tool to realize high sensitive, high speed, high throughput, and low cost analysis. In addition, the method can establish a well-controlled microenivroment for manipulating fluids and particles. It also has rapid growing implementations in both sophisticated chemical/biological analysis and low-cost point-of-care assays. Some unique phenomena emerge at the micrometer scale. For example, reactions are completed in a shorter amount of time as the travel distances of mass and heat are relatively small; the flows are usually laminar; and the capillary effect becomes dominant owing to large surface-to-volume ratios. In the meantime, the surface properties of the device material are greatly amplified, which can lead to either unique functions or problems that we would not encounter at the macroscale. Also, each material inherently corresponds with specific microfabrication strategies and certain native properties of the device. Therefore, the material for making the device plays a dominating role in microfluidic technologies. In this Account, we address the evolution of materials used for fabricating microfluidic chips, and discuss the application-oriented pros and cons of different materials. This Account generally follows the order of the materials introduced to microfluidics. Glass and silicon, the first generation microfluidic device materials, are perfect for capillary electrophoresis and solvent-involved applications but expensive for microfabriaction. Elastomers enable low-cost rapid prototyping and high density integration of valves on chip, allowing complicated and parallel fluid manipulation and in-channel cell culture. Plastics, as competitive alternatives to elastomers, are also rapid and inexpensive to microfabricate. Their broad variety provides flexible choices for different needs. For example, some thermosets support in-situ fabrication of

  19. Satellite-On-A-Chip Feasibility for Distributed Space Missions

    DTIC Science & Technology

    2006-07-10

    S.pdf Satellite Systems Conference and Exhibit, Monterey, [33] H . Helvajian and S. W. Janson, "The Fabrication of a CA, 2004, Paper AIAA-2004-3152. 100...pp. 12-15. 700. [52]0. Yadid-Pecht and R. Etienne-Cummings, CMOS [64]S. W. Janson, H . Helvajian , S. Amimoto, G. Smit, D. Imagers: From...Janson, H . Helvajian , and K. Breuer "MEMS, Hasler, "A 80 p W/frame 104x128 CMOS Imager Microengineering and Aerospace Systems," in Proc. Front End for

  20. Microfabrication of human organs-on-chips.

    PubMed

    Huh, Dongeun; Kim, Hyun Jung; Fraser, Jacob P; Shea, Daniel E; Khan, Mohammed; Bahinski, Anthony; Hamilton, Geraldine A; Ingber, Donald E

    2013-11-01

    'Organs-on-chips' are microengineered biomimetic systems containing microfluidic channels lined by living human cells, which replicate key functional units of living organs to reconstitute integrated human organ-level pathophysiology in vitro. These microdevices can be used to test efficacy and toxicity of drugs and chemicals, and to create in vitro models of human disease. Thus, they potentially represent low-cost alternatives to conventional animal models for pharmaceutical, chemical and environmental applications. Here we describe a protocol for the fabrication, microengineering and operation of these microfluidic organ-on-chip systems. First, microengineering is used to fabricate a multilayered microfluidic device that contains two parallel elastomeric microchannels separated by a thin porous flexible membrane, along with two full-height, hollow vacuum chambers on either side; this requires ∼3.5 d to complete. To create a 'breathing' lung-on-a-chip that mimics the mechanically active alveolar-capillary interface of the living human lung, human alveolar epithelial cells and microvascular endothelial cells are cultured in the microdevice with physiological flow and cyclic suction applied to the side chambers to reproduce rhythmic breathing movements. We describe how this protocol can be easily adapted to develop other human organ chips, such as a gut-on-a-chip lined by human intestinal epithelial cells that experiences peristalsis-like motions and trickling fluid flow. Also, we discuss experimental techniques that can be used to analyze the cells in these organ-on-chip devices.

  1. Advanced Flip Chips in Extreme Temperature Environments

    NASA Technical Reports Server (NTRS)

    Ramesham, Rajeshuni

    2010-01-01

    The use of underfill materials is necessary with flip-chip interconnect technology to redistribute stresses due to mismatching coefficients of thermal expansion (CTEs) between dissimilar materials in the overall assembly. Underfills are formulated using organic polymers and possibly inorganic filler materials. There are a few ways to apply the underfills with flip-chip technology. Traditional capillary-flow underfill materials now possess high flow speed and reduced time to cure, but they still require additional processing steps beyond the typical surface-mount technology (SMT) assembly process. Studies were conducted using underfills in a temperature range of -190 to 85 C, which resulted in an increase of reliability by one to two orders of magnitude. Thermal shock of the flip-chip test articles was designed to induce failures at the interconnect sites (-40 to 100 C). The study on the reliability of flip chips using underfills in the extreme temperature region is of significant value for space applications. This technology is considered as an enabling technology for future space missions. Flip-chip interconnect technology is an advanced electrical interconnection approach where the silicon die or chip is electrically connected, face down, to the substrate by reflowing solder bumps on area-array metallized terminals on the die to matching footprints of solder-wettable pads on the chosen substrate. This advanced flip-chip interconnect technology will significantly improve the performance of high-speed systems, productivity enhancement over manual wire bonding, self-alignment during die joining, low lead inductances, and reduced need for attachment of precious metals. The use of commercially developed no-flow fluxing underfills provides a means of reducing the processing steps employed in the traditional capillary flow methods to enhance SMT compatibility. Reliability of flip chips may be significantly increased by matching/tailoring the CTEs of the substrate

  2. Dry chips versus green chips as furnish for medium-density fiberboard

    Treesearch

    Paul H. Short; George E. Woodson; Duane E. Lyon

    1978-01-01

    The fiber characteristics and the physical and mechanical properties of medium-density fiberboard (MDF), manufactured with pressure-refined fiber from green and partially dried raw material, were analyzed to determine if dry wood chips made a better furnish than green wood chips. Pressure-refining dry material produced coarser fiber than those obtained from green...

  3. Dry chips versus green chips as furnish for medium-density fiberboard

    Treesearch

    P.H. Short; G.E. Woodson; D.E. Lyon

    1978-01-01

    The fiber characteristics and the physical and mechanical properties of medium-density fiberboard (MDF), manufactured with pressure-refined fiber from green and partially dried raw material, were analyzed to determine if dry wood chips made a better furnish than green wood chips. Pressure-refined dry material produced coarser fiber than those obtained from green...

  4. On-chip liquid storage and dispensing for lab-on-a-chip applications

    NASA Astrophysics Data System (ADS)

    Bodén, Roger; Lehto, Marcus; Margell, Joakim; Hjort, Klas; Schweitz, Jan-Åke

    2008-07-01

    This work presents novel components for on-chip storage and dispensing inside a lab-on-a-chip (LOC) for applications in immunoassay point-of-care testing (POCT), where incubation and washing steps are essential. It involves easy-to-use on-chip solutions for the sequential thermo-hydraulic actuation of liquids. The novel concept of combining the use of a rubber plug, both as a non-return valve cap and as a liquid injection interface of a sealed reservoir, allows simple filling of a sterilized cavity, as well as the storage and dispensing of reagent and washing buffer liquids. Segmenting the flow with air spacers enables effective rinsing and the use of small volumes of on-chip stored liquids. The chip uses low-resistance resistors as heaters in the paraffin actuator, providing the low-voltage actuation that is preferred for handheld battery driven instruments.

  5. Imaging Spectrometer on a Chip

    NASA Technical Reports Server (NTRS)

    Wang, Yu; Pain, Bedabrata; Cunningham, Thomas; Zheng, Xinyu

    2007-01-01

    A proposed visible-light imaging spectrometer on a chip would be based on the concept of a heterostructure comprising multiple layers of silicon-based photodetectors interspersed with long-wavelength-pass optical filters. In a typical application, this heterostructure would be replicated in each pixel of an image-detecting integrated circuit of the active-pixel-sensor type (see figure). The design of the heterostructure would exploit the fact that within the visible portion of the spectrum, the characteristic depth of penetration of photons increases with wavelength. Proceeding from the front toward the back, each successive long-wavelength-pass filter would have a longer cutoff wavelength, and each successive photodetector would be made thicker to enable it to absorb a greater proportion of incident longer-wavelength photons. Incident light would pass through the first photodetector and encounter the first filter, which would reflect light having wavelengths shorter than its cutoff wavelength and pass light of longer wavelengths. A large portion of the incident and reflected shorter-wavelength light would be absorbed in the first photodetector. The light that had passed through the first photodetector/filter pair of layers would pass through the second photodetector and encounter the second filter, which would reflect light having wavelengths shorter than its cutoff wavelength while passing light of longer wavelengths. Thus, most of the light reflected by the second filter would lie in the wavelength band between the cutoff wavelengths of the first and second filters. Thus, further, most of the light absorbed in the second photodetector would lie in this wavelength band. In a similar manner, each successive photodetector would detect, predominantly, light in a successively longer wavelength band bounded by the shorter cutoff wavelength of the preceding filter and the longer cutoff wavelength of the following filter.

  6. Chip-Scale Atomic Magnetometers

    NASA Astrophysics Data System (ADS)

    Knappe, Svenja

    2010-03-01

    Atomic magnetometers have reached sensitivities rivaling those of superconducting quantum interference devices (SQUIDs) in some frequency ranges [1]. A major advancement in atomic magnetometry was made possible by implementing interrogation schemes that suppress spin-exchange collisions between the alkali atoms [2]. Good signal-to-noise can be achieved by operation at very high alkali densities. At the same time, it introduces the challenge to create uniform spin-polarization and monitor the atomic precession about the magnetic field in atomic vapors with large optical densities. Off-resonant detection of the polarization rotation rather than the absorption is essential to operate in this regime. By use of microfabrication methods, we are miniaturizing such atomic magnetometers. They consist of miniature vapor cells with volumes of a few cubic millimeters integrated with micro-optical components. We present the advancement in sensitivities of such devices over nearly four orders of magnitude [3]. This allows for small low-power room-temperature devices with sensitivities that get close to those of SQUIDs in the frequency range around 100 Hz. We outline the current performance of chip-scale atomic magnetometers and the major challenges. Apart from efficient pumping and probing at high optical densities, these include magnetic noise caused by several sensor components and environmental factors, noise on the light fields, as well as magnetic fields from current-carrying parts, such as heaters, lasers, and photodetectors.[4pt] [1] Allred et al., Phys. Rev. Lett. 89, 130801 (2002) [0pt] [2] Happer and Tam, Phys. Rev. A 16, 1877 (1977) [0pt] [3] Griffith et al., Appl. Phys. Lett 94, 023502 (2009)

  7. Utilisation of chip thickness models in grinding

    NASA Astrophysics Data System (ADS)

    Singleton, Roger

    Grinding is now a well established process utilised for both stock removal and finish applications. Although significant research is performed in this field, grinding still experiences problems with burn and high forces which can lead to poor quality components and damage to equipment. This generally occurs in grinding when the process deviates from its safe working conditions. In milling, chip thickness parameters are utilised to predict and maintain process outputs leading to improved control of the process. This thesis looks to further the knowledge of the relationship between chip thickness and the grinding process outputs to provide an increased predictive and maintenance modelling capability. Machining trials were undertaken using different chip thickness parameters to understand how these affect the process outputs. The chip thickness parameters were maintained at different grinding wheel diameters for a constant productivity process to determine the impact of chip thickness at a constant material removal rate.. Additional testing using a modified pin on disc test rig was performed to provide further information on process variables. The different chip thickness parameters provide control of different process outputs in the grinding process. These relationships can be described using contact layer theory and heat flux partitioning. The contact layer is defined as the immediate layer beneath the contact arc at the wheel workpiece interface. The size of the layer governs the force experienced during the process. The rate of contact layer removal directly impacts the net power required from the system. It was also found that the specific grinding energy of a process is more dependent on the productivity of a grinding process

  8. Smart single-chip gas sensor microsystem

    NASA Astrophysics Data System (ADS)

    Hagleitner, C.; Hierlemann, A.; Lange, D.; Kummer, A.; Kerness, N.; Brand, O.; Baltes, H.

    2001-11-01

    Research activity in chemical gas sensing is currently directed towards the search for highly selective (bio)chemical layer materials, and to the design of arrays consisting of different partially selective sensors that permit subsequent pattern recognition and multi-component analysis. Simultaneous use of various transduction platforms has been demonstrated, and the rapid development of integrated-circuit technology has facilitated the fabrication of planar chemical sensors and sensors based on three-dimensional microelectromechanical systems. Complementary metal-oxide silicon processes have previously been used to develop gas sensors based on metal oxides and acoustic-wave-based sensor devices. Here we combine several of these developments to fabricate a smart single-chip chemical microsensor system that incorporates three different transducers (mass-sensitive, capacitive and calorimetric), all of which rely on sensitive polymeric layers to detect airborne volatile organic compounds. Full integration of the microelectronic and micromechanical components on one chip permits control and monitoring of the sensor functions, and enables on-chip signal amplification and conditioning that notably improves the overall sensor performance. The circuitry also includes analog-to-digital converters, and an on-chip interface to transmit the data to off-chip recording units. We expect that our approach will provide a basis for the further development and optimization of gas microsystems.

  9. Prototype detection unit for the CHIPS experiment

    NASA Astrophysics Data System (ADS)

    Pfützner, Maciej M.

    2017-09-01

    CHIPS (CHerenkov detectors In mine PitS) is an R&D project aiming to develop novel cost-effective neutrino detectors, focused on measuring the CP-violating neutrino mixing phase (δ CP). A single detector module, containing an enclosed volume of purified water, would be submerged in an existing lake, located in a neutrino beam. A staged approach is proposed with first detectors deployed in a flooded mine pit in Northern Minnesota, 7 mrad off-axis from the existing NuMI beam. A small proof-of-principle model (CHIPS-M) has already been tested and the first stage of a fully functional 10 kt module (CHIPS-10) is planned for 2018. One of the instruments submerged on board of CHIPS-M in autumn 2015 was a prototype detection unit, constructed at Nikhef. The unit contains hardware borrowed from the KM3NeT experiment, including 16 3 inch photomultiplier tubes and readout electronics. In addition to testing the mechanical design and data acquisition, the detector was used to record a large sample of cosmic ray muon events. The collected data is valuable for characterising the cosmic muon background and validating a Monte Carlo simulation used to optimise future designs. This paper introduces the CHIPS project, describes the design of the prototype unit, and presents the results of a preliminary data analysis.

  10. The impact of CHIP premium increases on insurance outcomes among CHIP eligible children

    PubMed Central

    2014-01-01

    Background Within the United States, public insurance premiums are used both to discourage private health policy holders from dropping coverage and to reduce state budget costs. Prior research suggests that the odds of having private coverage and being uninsured increase with increases in public insurance premiums. The aim of this paper is to test effects of Children’s Health Insurance Program (CHIP) premium increases on public insurance, private insurance, and uninsurance rates. Methods The fact that families just below and above a state-specific income cut-off are likely very similar in terms of observable and unobservable characteristics except the premium contribution provides a natural experiment for estimating the effect of premium increases. Using 2003 Medical Expenditure Panel Survey (MEPS) merged with CHIP premiums, we compare health insurance outcomes for CHIP eligible children as of January 2003 in states with a two-tier premium structure using a cross-sectional regression discontinuity methodology. We use difference-in-differences analysis to compare longitudinal insurance outcomes by December 2003. Results Higher CHIP premiums are associated with higher likelihood of private insurance. Disenrollment from CHIP in response to premium increases over time does not increase the uninsurance rate. Conclusions When faced with higher CHIP premiums, private health insurance may be a preferable alternative for CHIP eligible families with higher incomes. Therefore, competition in the insurance exchanges being formed under the Affordable Care Act could enhance choice. PMID:24589197

  11. The impact of CHIP premium increases on insurance outcomes among CHIP eligible children.

    PubMed

    Nikolova, Silviya; Stearns, Sally

    2014-03-03

    Within the United States, public insurance premiums are used both to discourage private health policy holders from dropping coverage and to reduce state budget costs. Prior research suggests that the odds of having private coverage and being uninsured increase with increases in public insurance premiums. The aim of this paper is to test effects of Children's Health Insurance Program (CHIP) premium increases on public insurance, private insurance, and uninsurance rates. The fact that families just below and above a state-specific income cut-off are likely very similar in terms of observable and unobservable characteristics except the premium contribution provides a natural experiment for estimating the effect of premium increases. Using 2003 Medical Expenditure Panel Survey (MEPS) merged with CHIP premiums, we compare health insurance outcomes for CHIP eligible children as of January 2003 in states with a two-tier premium structure using a cross-sectional regression discontinuity methodology. We use difference-in-differences analysis to compare longitudinal insurance outcomes by December 2003. Higher CHIP premiums are associated with higher likelihood of private insurance. Disenrollment from CHIP in response to premium increases over time does not increase the uninsurance rate. When faced with higher CHIP premiums, private health insurance may be a preferable alternative for CHIP eligible families with higher incomes. Therefore, competition in the insurance exchanges being formed under the Affordable Care Act could enhance choice.

  12. Time of flight system on a chip

    NASA Technical Reports Server (NTRS)

    Paschalidis, Nicholas P. (Inventor)

    2006-01-01

    A CMOS time-of-flight TOF system-on-a-chip SoC for precise time interval measurement with low power consumption and high counting rate has been developed. The analog and digital TOF chip may include two Constant Fraction Discriminators CFDs and a Time-to-Digital Converter TDC. The CFDs can interface to start and stop anodes through two preamplifiers and perform signal processing for time walk compensation (110). The TDC digitizes the time difference with reference to an off-chip precise external clock (114). One TOF output is an 11-bit digital word and a valid event trigger output indicating a valid event on the 11-bit output bus (116).

  13. Chip-based quantum key distribution

    NASA Astrophysics Data System (ADS)

    Sibson, P.; Erven, C.; Godfrey, M.; Miki, S.; Yamashita, T.; Fujiwara, M.; Sasaki, M.; Terai, H.; Tanner, M. G.; Natarajan, C. M.; Hadfield, R. H.; O'Brien, J. L.; Thompson, M. G.

    2017-02-01

    Improvement in secure transmission of information is an urgent need for governments, corporations and individuals. Quantum key distribution (QKD) promises security based on the laws of physics and has rapidly grown from proof-of-concept to robust demonstrations and deployment of commercial systems. Despite these advances, QKD has not been widely adopted, and large-scale deployment will likely require chip-based devices for improved performance, miniaturization and enhanced functionality. Here we report low error rate, GHz clocked QKD operation of an indium phosphide transmitter chip and a silicon oxynitride receiver chip--monolithically integrated devices using components and manufacturing processes from the telecommunications industry. We use the reconfigurability of these devices to demonstrate three prominent QKD protocols--BB84, Coherent One Way and Differential Phase Shift--with performance comparable to state-of-the-art. These devices, when combined with integrated single photon detectors, pave the way for successfully integrating QKD into future telecommunications networks.

  14. Kansas Department of Transportation 2014 chip seal manual.

    DOT National Transportation Integrated Search

    2014-03-01

    A chip seal is a very effective thin surface treatment process used by maintenance managers to : preserve existing asphalt pavements. The Kansas Department of Transportation (KDOT) 2014 Chip Seal : Manual is a guide that provides guidelines, backgrou...

  15. VLSI design of a single chip reed-solomon encoder

    SciTech Connect

    Truong, T.K.; Deutsch, L.J.; Reed, I.S.

    A design for a single chip implementation of a Reed-Solomon encoder is presented. The architecture that leads to this single VLSI chip design makes use of a bit serial finite field multiplication algorithm.

  16. Compression Debarked Chips from a Whole-Tree Chipper

    Treesearch

    Rodger A. Arola

    1973-01-01

    Discusses case study results of debarking whole-tree aspen and red oak chips produced with a whole-tree chipper. The results indicate promise for successful bark removal after chipping and strengthen the argument for continued research.

  17. Performance oriented guidance for Mississippi chip seals - volume II.

    DOT National Transportation Integrated Search

    2013-12-01

    A laboratory and field study was conducted related to long term chip seal performance. This reports primary : objective was to initiate development of a long term performance (LTP) test protocol for chip seals focused on : aggregate retention. Key...

  18. Performance oriented guidance for Mississippi chip seals - volume I.

    DOT National Transportation Integrated Search

    2013-12-01

    A five year laboratory study was conducted to investigate near surface properties of flexible pavements in relation to : how they are affected by bituminous surface treatments. Chip seals and scrub seals (a specialized type of chip seal) : were the f...

  19. Asphalt cement chip seals in Oregon : construction report

    DOT National Transportation Integrated Search

    2000-06-01

    Most chip seals in Oregon have been constructed using an emulsified asphalt binder. However, chip seals using an asphalt cement (hot oil) binder have been tried in limited situations in Oregon. This report includes a literature review and summarizes ...

  20. Biostability of an implantable glucose sensor chip

    NASA Astrophysics Data System (ADS)

    Fröhlich, M.; Birkholz, M.; Ehwald, K. E.; Kulse, P.; Fursenko, O.; Katzer, J.

    2012-12-01

    Surface materials of an implantable microelectronic chip intended for medical applications were evaluated with respect to their long-term stability in bio-environments. The sensor chip shall apply in a glucose monitor by operating as a microviscosimeter according to the principle of affinity viscosimetry. A monolithic integration of a microelectromechanical system (MEMS) into the sensor chip was successfully performed in a combined 0.25 μm CMOS/BiCMOS technology. In order to study material durability and biostability of the surfaces, sensor chips were exposed to various in vitro and in vivo tests. Corrosional damage of SiON, SiO2 and TiN surfaces was investigated by optical microscopy, ellipsometry and AFM. The results served for optimizing the Back-end-of-Line (BEoL) stack, from which the MEMS was prepared. Corrosion of metal lines could significantly be reduced by improving the topmost passivation layer. The experiments revealed no visible damage of the actuator or other functionally important MEMS elements. Sensor chips were also exposed to human body fluid for three month by implantation into the abdomen of a volunteer. Only small effects were observed for layer thickness and Ra roughness after explantation. In particular, TiN as used for the actuator beam showed no degradation by biocorrosion. The highest degradation rate of about 50 nm per month was revealed for the SiON passivation layer. These results suggest that the sensor chip may safely operate in subcutaneous tissue for a period of several months.