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Sample records for access memory device

  1. 76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-09-07

    ... COMMISSION In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products... States after importation of certain dynamic random access memory and NAND flash memory devices and... the sale within the United States after importation of certain dynamic random access memory and...

  2. 76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-11-29

    ... COMMISSION Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint... complaint entitled In Re Certain Dynamic Random Access Memory Devices, and Products Containing Same, DN 2859... within the United States after importation of certain dynamic random access memory devices, and...

  3. 76 FR 80964 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-12-27

    ... COMMISSION Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of... States after importation of certain dynamic random access memory devices, and products containing same by... dynamic random access memory devices, and products containing same that infringe one or more of claims...

  4. Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

    NASA Technical Reports Server (NTRS)

    Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Klenke, Robert (Inventor); Schwab, Andrew J. (Inventor); Moyer, Stephen A. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor)

    2000-01-01

    A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

  5. Development of Curie point switching for thin film, random access, memory device

    NASA Technical Reports Server (NTRS)

    Lewicki, G. W.; Tchernev, D. I.

    1967-01-01

    Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.

  6. Bipolar resistive switching characteristics in tantalum nitride-based resistive random access memory devices

    SciTech Connect

    Kim, Myung Ju; Jeon, Dong Su; Park, Ju Hyun; Kim, Tae Geun

    2015-05-18

    This paper reports the bipolar resistive switching characteristics of TaN{sub x}-based resistive random access memory (ReRAM). The conduction mechanism is explained by formation and rupture of conductive filaments caused by migration of nitrogen ions and vacancies; this mechanism is in good agreement with either Ohmic conduction or the Poole-Frenkel emission model. The devices exhibit that the reset voltage varies from −0.82 V to −0.62 V, whereas the set voltage ranges from 1.01 V to 1.30 V for 120 DC sweep cycles. In terms of reliability, the devices exhibit good retention (>10{sup 5 }s) and pulse-switching endurance (>10{sup 6} cycles) properties. These results indicate that TaN{sub x}-based ReRAM devices have a potential for future nonvolatile memory devices.

  7. Gate controllable resistive random access memory devices using reduced graphene oxide

    NASA Astrophysics Data System (ADS)

    Hazra, Preetam; Resmi, A. N.; Jinesh, K. B.

    2016-04-01

    The biggest challenge in the resistive random access memory (ReRAM) technology is that the basic operational parameters, such as the set and reset voltages, the current on-off ratios (hence the power), and their operational speeds, strongly depend on the active and electrode materials and their processing methods. Therefore, for its actual technological implementations, the unification of the operational parameters of the ReRAM devices appears to be a difficult task. In this letter, we show that by fabricating a resistive memory device in a thin film transistor configuration and thus applying an external gate bias, we can control the switching voltage very accurately. Taking partially reduced graphene oxide, the gate controllable switching is demonstrated, and the possible mechanisms are discussed.

  8. Low-energy Resistive Random Access Memory Devices with No Need for a Compliance Current

    PubMed Central

    Xu, Zedong; Yu, Lina; Wu, Yong; Dong, Chang; Deng, Ning; Xu, Xiaoguang; Miao, J.; Jiang, Yong

    2015-01-01

    A novel resistive random access memory device is designed with SrTiO3/ La2/3Sr1/3MnO3 (LSMO)/MgAl2O4 (MAO)/Cu structure, in which metallic epitaxial LSMO is employed as the bottom electrode rather than traditional metal materials. In this device, the critical external compliance current is no longer necessary due to the high self-resistance of LSMO. The LMSO bottom electrode can act as a series resistor to offer a compliance current during the set process. Besides, the device also has excellent switching features which are originated in the formation of Cu filaments under external voltage. Therefore it provides the possibility of reducing power consumption and accelerating the commercialization of resistive switching devices. PMID:25982101

  9. Low-energy Resistive Random Access Memory Devices with No Need for a Compliance Current

    NASA Astrophysics Data System (ADS)

    Xu, Zedong; Yu, Lina; Wu, Yong; Dong, Chang; Deng, Ning; Xu, Xiaoguang; Miao, J.; Jiang, Yong

    2015-05-01

    A novel resistive random access memory device is designed with SrTiO3/ La2/3Sr1/3MnO3 (LSMO)/MgAl2O4 (MAO)/Cu structure, in which metallic epitaxial LSMO is employed as the bottom electrode rather than traditional metal materials. In this device, the critical external compliance current is no longer necessary due to the high self-resistance of LSMO. The LMSO bottom electrode can act as a series resistor to offer a compliance current during the set process. Besides, the device also has excellent switching features which are originated in the formation of Cu filaments under external voltage. Therefore it provides the possibility of reducing power consumption and accelerating the commercialization of resistive switching devices.

  10. Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

    NASA Astrophysics Data System (ADS)

    Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

    2016-04-01

    The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

  11. MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays

    NASA Astrophysics Data System (ADS)

    Shenoy, Rohit S.; Burr, Geoffrey W.; Virwani, Kumar; Jackson, Bryan; Padilla, Alvaro; Narayanan, Pritish; Rettner, Charles T.; Shelby, Robert M.; Bethune, Donald S.; Raman, Karthik V.; BrightSky, Matthew; Joseph, Eric; Rice, Philip M.; Topuria, Teya; Kellock, Andrew J.; Kurdi, Bülent; Gopalakrishnan, Kailash

    2014-10-01

    Several attractive applications call for the organization of memristive devices (or other resistive non-volatile memory (NVM)) into large, densely-packed crossbar arrays. While resistive-NVM devices frequently possess some degree of inherent nonlinearity (typically 3-30× contrast), the operation of large (\\gt 1000×1000 device) arrays at low power tends to require quite large (\\gt 1e7) ON-to-OFF ratios (between the currents passed at high and at low voltages). One path to such large nonlinearities is the inclusion of a distinct access device (AD) together with each of the state-bearing resistive-NVM elements. While such an AD need not store data, its list of requirements is almost as challenging as the specifications demanded of the memory device. Several candidate ADs have been proposed, but obtaining high performance without requiring single-crystal silicon and/or the high processing temperatures of the front-end-of-the-line—which would eliminate any opportunity for 3D stacking—has been difficult. We review our work at IBM Research—Almaden on high-performance ADs based on Cu-containing mixed-ionic-electronic conduction (MIEC) materials [1-7]. These devices require only the low processing temperatures of the back-end-of-the-line, making them highly suitable for implementing multi-layer cross-bar arrays. MIEC-based ADs offer large ON/OFF ratios (\\gt 1e7), a significant voltage margin {{V}m} (over which current \\lt 10 nA), and ultra-low leakage (\\lt 10 pA), while also offering the high current densities needed for phase-change memory and the fully bipolar operation needed for high-performance RRAM. Scalability to critical lateral dimensions \\lt 30 nm and thicknesses \\lt 15 nm, tight distributions and 100% yield in large (512 kBit) arrays, long-term stability of the ultra-low leakage states, and sub-50 ns turn-ON times have all been demonstrated. Numerical modeling of these MIEC-based ADs shows that their operation depends on C{{u}+} mediated hole

  12. Precessional reversal in orthogonal spin transfer magnetic random access memory devices

    NASA Astrophysics Data System (ADS)

    Liu, H.; Bedau, D.; Backes, D.; Katine, J. A.; Kent, A. D.

    2012-07-01

    Single-shot time-resolved resistance measurements have been used to determine the magnetization reversal mechanisms of orthogonal spin transfer magnetic random access memory (OST-MRAM) devices at nanosecond time scales. There is a strong asymmetry between antiparallel (AP) to parallel (P) and P to AP transitions under the same pulse conditions. P to AP transitions are shown to occur by precession of the free layer magnetization, while the AP to P transition is typically direct, occurring in less than 200 ps. We associate the asymmetry with spin torques perpendicular to the plane of the free layer, an important characteristic of OST-MRAM bit cells that can be used to optimize device performance.

  13. Chemical insight into origin of forming-free resistive random-access memory devices

    NASA Astrophysics Data System (ADS)

    Wu, X.; Fang, Z.; Li, K.; Bosman, M.; Raghavan, N.; Li, X.; Yu, H. Y.; Singh, N.; Lo, G. Q.; Zhang, X. X.; Pey, K. L.

    2011-09-01

    We demonstrate the realization of a forming-step free resistive random access memory (RRAM) device using a HfOx/TiOx/HfOx/TiOx multilayer structure, as a replacement for the conventional HfOx-based single layer structure. High-resolution transmission electron microscopy (HRTEM), along with electron energy loss spectroscopy (EELS) analysis has been carried out to identify the distribution and the role played by Ti in the RRAM stack. Our results show that Ti out-diffusion into the HfOx layer is the chemical cause of forming-free behavior. Moreover, the capability of Ti to change its ionic state in HfOx eases the reduction-oxidation (redox) reaction, thus lead to the RRAM devices performance improvements.

  14. Garnet Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.

    1995-01-01

    Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.

  15. Towards developing a compact model for magnetization switching in straintronics magnetic random access memory devices

    NASA Astrophysics Data System (ADS)

    Barangi, Mahmood; Erementchouk, Mikhail; Mazumder, Pinaki

    2016-08-01

    Strain-mediated magnetization switching in a magnetic tunneling junction (MTJ) by exploiting a combination of piezoelectricity and magnetostriction has been proposed as an energy efficient alternative to spin transfer torque (STT) and field induced magnetization switching methods in MTJ-based magnetic random access memories (MRAM). Theoretical studies have shown the inherent advantages of strain-assisted switching, and the dynamic response of the magnetization has been modeled using the Landau-Lifshitz-Gilbert (LLG) equation. However, an attempt to use LLG for simulating dynamics of individual elements in large-scale simulations of multi-megabyte straintronics MRAM leads to extremely time-consuming calculations. Hence, a compact analytical solution, predicting the flipping delay of the magnetization vector in the nanomagnet under stress, combined with a liberal approximation of the LLG dynamics in the straintronics MTJ, can lead to a simplified model of the device suited for fast large-scale simulations of multi-megabyte straintronics MRAMs. In this work, a tensor-based approach is developed to study the dynamic behavior of the stressed nanomagnet. First, using the developed method, the effect of stress on the switching behavior of the magnetization is investigated to realize the margins between the underdamped and overdamped regimes. The latter helps the designer realize the oscillatory behavior of the magnetization when settling along the minor axis, and the dependency of oscillations on the stress level and the damping factor. Next, a theoretical model to predict the flipping delay of the magnetization vector is developed and tested against LLG-based numerical simulations to confirm the accuracy of findings. Lastly, the obtained delay is incorporated into the approximate solutions of the LLG dynamics, in order to create a compact model to liberally and quickly simulate the magnetization dynamics of the MTJ under stress. Using the developed delay equation, the

  16. The role of the inserted layer in resistive random access memory device

    NASA Astrophysics Data System (ADS)

    Zhang, Dainan; Ma, Guokun; Zhang, Huaiwu; Tang, Xiaoli; Zhong, Zhiyong; Jie, Li; Su, Hua

    2016-07-01

    NiO resistive switching devices were fabricated by reactive DC magnetron sputtering at room temperature containing different inserted layers. From measurements, we demonstrated the filaments were made up by metal Co rather than the oxygen defect or other metal. A current jumping phenomenon in the SET process was observed, evidencing that the filament generating procedure was changed due to the inserted layers. In this process, we demonstrate the current jumping appeared in higher voltage region when the position of inserted layer was close to the bottom electrode. The I-V curves shifted to the positive direction as the thickness of inserted layer increasing. With the change of the number of inserted layers, SET voltages varied while the RESET voltage kept stable. According to the electrochemical metallization memory mechanism, detailed explanations on all the phenomena were addressed. This discovery is supposed of great potentials in the use of designing multi-layer RRAM devices.

  17. Impacts of Ion Irradiation on Hafnium oxide-based Resistive Random Access Memory Devices

    NASA Astrophysics Data System (ADS)

    He, Xiaoli

    The impacts of ion irradiation on so-called vacancy-change mechanism (VCM) and electrochemical-metallization mechanism (ECM) ReRAM devices based on HfO2 are investigated using various ion sources: H + (1 MeV), He+ (1 MeV), N+ (1 MeV), Ne+ (1.6 MeV) and Ar+ (2.75 MeV) over a range of total doses (105 -- 1011 rad(Si)) and fluences (1012 -- 1015 cm-2). VCM-ReRAM devices show robust resistive switching function after all irradiation experiments. VCM resistive switching parameters including set voltage (V set), reset voltage (Vreset), on-state resistance (R on) and off-state resistance (Roff) exhibited, in most cases, modest changes after irradiation. Decreases in forming voltage (Vf) and initial resistance (Rfresh) of fresh devices were observed after all irradiation experiments on VCM-ReRAM devices with the exception of Ar+ irradiation at the highest fluence (10 15 cm-2). In that case Rfresh increased by an order of magnitude. For VCM-ReRAM devices it was also observed that irradiation beyond a dose threshold of approximately 5 Grad(Si) could induce off-to-on state transition events. This behavior could lead to errors in a VCM-ReRAM memory system. ECM-ReRAM devices (based on HfO2) were also subjected to ion irradiation. Under proton irradiation ECM-ReRAM devices remained functional, but with relatively large positive variations (20-40%) in Vset, Vreset and Ron and large negative variations (˜ -60%) in Roff. In contrast to VCM HfO2-ReRAMs, ECM-based devices exhibited increased V f after irradiation, and no off-to-on transitions were observed. Interestingly, for ECM-ReRAM devices, high-fluence Ar irradiation resulted in a transition of the electrical conduction mechanism associated with the conductive filament forming process from a Poole-Frenkel conduction mechanism (pre-irradiation) to ionic conduction (post-Ar irradiation). ECM-ReRAM devices irradiated with lighter ions did not exhibit this effect. The different ion irradiation responses of the two types of HfO2-Re

  18. Development, Demonstration, and Device Physics of Fet-Accessed One-Transistor Gallium Arsenide Dynamic Memory Technologies

    NASA Astrophysics Data System (ADS)

    Neudeck, Philip Gerold

    The introduction of digital GaAs into modern high -speed computing systems has led to an increasing demand for high-density memory in these GaAs technologies. To date, most of the memory development efforts in GaAs have been directed toward four- and six-transistor static RAM's, which consume substantial chip area and dissipate much static power resulting in limited single-chip GaAs storage capacities. As it has successfully done in silicon, a one-transistor dynamic RAM approach could alleviate these problems making higher density GaAs memories possible. This dissertation discusses theoretical and experimental work that presents the possibility for a high-speed, low-power, one-transistor dynamic RAM technology in GaAs. The two elements of the DRAM cell, namely the charge storage capacitor and the access field-effect transistor have been studied in detail. Isolated diode junction charge storage capacitors have demonstrated 30 minutes of storage time at room temperature with charge densities comparable to those obtained in planar silicon DRAM capacitors. GaAs JFET and MESFET technologies have been studied, and with careful device design and choice of proper operating voltages experimental results show that both can function as acceptable access transistors. One-transistor MESFET- and JFET-accessed DRAM cells have been fabricated and operated at room temperature and above with a standby power dissipation that is only a small fraction of the power dissipated by the best commercial GaAs static RAM cells. A 2 x 2 bit demonstration array was built and successfully operated at room temperature to demonstrate the addressable read/write capability of this new technology.

  19. Multi-scale quantum point contact model for filamentary conduction in resistive random access memories devices

    SciTech Connect

    Lian, Xiaojuan Cartoixà, Xavier; Miranda, Enrique; Suñé, Jordi; Perniola, Luca; Rurali, Riccardo; Long, Shibing; Liu, Ming

    2014-06-28

    We depart from first-principle simulations of electron transport along paths of oxygen vacancies in HfO{sub 2} to reformulate the Quantum Point Contact (QPC) model in terms of a bundle of such vacancy paths. By doing this, the number of model parameters is reduced and a much clearer link between the microscopic structure of the conductive filament (CF) and its electrical properties can be provided. The new multi-scale QPC model is applied to two different HfO{sub 2}-based devices operated in the unipolar and bipolar resistive switching (RS) modes. Extraction of the QPC model parameters from a statistically significant number of CFs allows revealing significant structural differences in the CF of these two types of devices and RS modes.

  20. Atomic memory access hardware implementations

    DOEpatents

    Ahn, Jung Ho; Erez, Mattan; Dally, William J

    2015-02-17

    Atomic memory access requests are handled using a variety of systems and methods. According to one example method, a data-processing circuit having an address-request generator that issues requests to a common memory implements a method of processing the requests using a memory-access intervention circuit coupled between the generator and the common memory. The method identifies a current atomic-memory access request from a plurality of memory access requests. A data set is stored that corresponds to the current atomic-memory access request in a data storage circuit within the intervention circuit. It is determined whether the current atomic-memory access request corresponds to at least one previously-stored atomic-memory access request. In response to determining correspondence, the current request is implemented by retrieving data from the common memory. The data is modified in response to the current request and at least one other access request in the memory-access intervention circuit.

  1. Is random access memory random?

    NASA Technical Reports Server (NTRS)

    Denning, P. J.

    1986-01-01

    Most software is contructed on the assumption that the programs and data are stored in random access memory (RAM). Physical limitations on the relative speeds of processor and memory elements lead to a variety of memory organizations that match processor addressing rate with memory service rate. These include interleaved and cached memory. A very high fraction of a processor's address requests can be satified from the cache without reference to the main memory. The cache requests information from main memory in blocks that can be transferred at the full memory speed. Programmers who organize algorithms for locality can realize the highest performance from these computers.

  2. Synchronous semiconductor memory device

    SciTech Connect

    Onno, C.; Hirata, M.

    1989-11-21

    This patent describes a synchronous semiconductor memory device. It comprises: first latch means for latching a write command in synchronism with clock signal; second latch means for latching a write data in synchronism with the clock signal and for outputting two write process signals based on the write data latched thereby; pulse generating means for generating an internal write pulse signal based on the write command latched by the first latch means. The internal write pulse signal having a semiconductor memory device; write control means supplied with the internal write pulse signal and the write process signals for controlling write and read operations of the synchronous semiconductor memory device; memory means for storing the write data latched by the second latch means; and noise preventing means coupled to the second latch means and the write control means for supplying the write process signals to the write control means only in the write mode responsive to the internal write pulse signal and for setting the write process signals to fixed potentials during a time other than the write mode.

  3. Self-compliance Pt/HfO2/Ti/Si one-diode-one-resistor resistive random access memory device and its low temperature characteristics

    NASA Astrophysics Data System (ADS)

    Lu, Chao; Yu, Jue; Chi, Xiao-Wei; Lin, Guang-Yang; Lan, Xiao-Ling; Huang, Wei; Wang, Jian-Yuan; Xu, Jian-Fang; Wang, Chen; Li, Cheng; Chen, Song-Yan; Liu, Chunli; Lai, Hong-Kai

    2016-04-01

    A bipolar one-diode-one-resistor (1D1R) device with a Pt/HfO2/Ti/n-Si(001) structure was demonstrated. The 1D1R resistive random access memory (RRAM) device consists of a Ti/n-Si(001) diode and a Pt/HfO2/Ti resistive switching cell. By using the Ti layer as the shared electrode for both the diode and the resistive switching cell, the 1D1R device exhibits the property of stable self-compliance and the characteristic of robust resistive switching with high uniformity. The high/low resistance ratio reaches 103. The electrical RESET/SET curve does not deteriorate after 68 loops. Low-temperature studies show that the 1D1R RRAM device has a critical working temperature of 250 K, and at temperatures below 250 K, the device fails to switch its resistances.

  4. Implementation of nitrogen-doped titanium-tungsten tunable heater in phase change random access memory and its effects on device performance

    SciTech Connect

    Tan, Chun Chia; Zhao, Rong Chong, Tow Chong; Shi, Luping

    2014-10-13

    Nitrogen-doped titanium-tungsten (N-TiW) was proposed as a tunable heater in Phase Change Random Access Memory (PCRAM). By tuning N-TiW's material properties through doping, the heater can be tailored to optimize the access speed and programming current of PCRAM. Experiments reveal that N-TiW's resistivity increases and thermal conductivity decreases with increasing nitrogen-doping ratio, and N-TiW devices displayed (∼33% to ∼55%) reduced programming currents. However, there is a tradeoff between the current and speed for heater-based PCRAM. Analysis of devices with different N-TiW heaters shows that N-TiW doping levels could be optimized to enable low RESET currents and fast access speeds.

  5. A biohybrid dynamic random access memory.

    PubMed

    Sinclair, Jon; Granfeldt, Daniel; Pihl, Johan; Millingen, Maria; Lincoln, Per; Farre, Cecilia; Peterson, Lena; Orwar, Owe

    2006-04-19

    We report that GABA(A) receptors in a patch-clamped biological cell form a short-term memory circuit when integrated with a scanning-probe microfluidic device. Laminar patterns of receptor activators (agonists) provided by the microfluidic device define and periodically update the data input which is read and stored by the receptors as state distributions (based on intrinsic multistate kinetics). The memory is discharged over time and lasts for seconds to minutes depending on the input function. The function of the memory can be represented by an equivalent electronic circuit with striking similarity in function to a dynamic random access memory (DRAM) used in electronic computers. Multiplexed biohybrid memories may form the basis of large-scale integrated biocomputational/sensor devices with the curious ability to use chemical signals including odorants, neurotransmitters, chemical and biological warfare agents, and many more as input signals.

  6. Set statistics in conductive bridge random access memory device with Cu/HfO{sub 2}/Pt structure

    SciTech Connect

    Zhang, Meiyun; Long, Shibing Wang, Guoming; Xu, Xiaoxin; Li, Yang; Liu, Qi; Lv, Hangbing; Liu, Ming; Lian, Xiaojuan; Miranda, Enrique; Suñé, Jordi

    2014-11-10

    The switching parameter variation of resistive switching memory is one of the most important challenges in its application. In this letter, we have studied the set statistics of conductive bridge random access memory with a Cu/HfO{sub 2}/Pt structure. The experimental distributions of the set parameters in several off resistance ranges are shown to nicely fit a Weibull model. The Weibull slopes of the set voltage and current increase and decrease logarithmically with off resistance, respectively. This experimental behavior is perfectly captured by a Monte Carlo simulator based on the cell-based set voltage statistics model and the Quantum Point Contact electron transport model. Our work provides indications for the improvement of the switching uniformity.

  7. Nonvolatile random access memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor)

    1994-01-01

    A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a 0 or 1 state. The element remains in the 0 or 1 state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

  8. Remote direct memory access

    DOEpatents

    Archer, Charles J.; Blocksome, Michael A.

    2012-12-11

    Methods, parallel computers, and computer program products are disclosed for remote direct memory access. Embodiments include transmitting, from an origin DMA engine on an origin compute node to a plurality target DMA engines on target compute nodes, a request to send message, the request to send message specifying a data to be transferred from the origin DMA engine to data storage on each target compute node; receiving, by each target DMA engine on each target compute node, the request to send message; preparing, by each target DMA engine, to store data according to the data storage reference and the data length, including assigning a base storage address for the data storage reference; sending, by one or more of the target DMA engines, an acknowledgment message acknowledging that all the target DMA engines are prepared to receive a data transmission from the origin DMA engine; receiving, by the origin DMA engine, the acknowledgement message from the one or more of the target DMA engines; and transferring, by the origin DMA engine, data to data storage on each of the target compute nodes according to the data storage reference using a single direct put operation.

  9. Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition

    PubMed Central

    Niu, Gang; Kim, Hee-Dong; Roelofs, Robin; Perez, Eduardo; Schubert, Markus Andreas; Zaumseil, Peter; Costina, Ioan; Wenger, Christian

    2016-01-01

    With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the nano-crystallites density in the film increases the forming voltage of devices and its variation. Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption. PMID:27312225

  10. Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition.

    PubMed

    Niu, Gang; Kim, Hee-Dong; Roelofs, Robin; Perez, Eduardo; Schubert, Markus Andreas; Zaumseil, Peter; Costina, Ioan; Wenger, Christian

    2016-01-01

    With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the nano-crystallites density in the film increases the forming voltage of devices and its variation. Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption. PMID:27312225

  11. Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition

    NASA Astrophysics Data System (ADS)

    Niu, Gang; Kim, Hee-Dong; Roelofs, Robin; Perez, Eduardo; Schubert, Markus Andreas; Zaumseil, Peter; Costina, Ioan; Wenger, Christian

    2016-06-01

    With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the nano-crystallites density in the film increases the forming voltage of devices and its variation. Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption.

  12. Multi-step resistive switching behavior of Li-doped ZnO resistance random access memory device controlled by compliance current

    NASA Astrophysics Data System (ADS)

    Lin, Chun-Cheng; Tang, Jian-Fu; Su, Hsiu-Hsien; Hong, Cheng-Shong; Huang, Chih-Yu; Chu, Sheng-Yuan

    2016-06-01

    The multi-step resistive switching (RS) behavior of a unipolar Pt/Li0.06Zn0.94O/Pt resistive random access memory (RRAM) device is investigated. It is found that the RRAM device exhibits normal, 2-, 3-, and 4-step RESET behaviors under different compliance currents. The transport mechanism within the device is investigated by means of current-voltage curves, in-situ transmission electron microscopy, and electrochemical impedance spectroscopy. It is shown that the ion transport mechanism is dominated by Ohmic behavior under low electric fields and the Poole-Frenkel emission effect (normal RS behavior) or Li+ ion diffusion (2-, 3-, and 4-step RESET behaviors) under high electric fields.

  13. Plated wire random access memories

    NASA Technical Reports Server (NTRS)

    Gouldin, L. D.

    1975-01-01

    A program was conducted to construct 4096-work by 18-bit random access, NDRO-plated wire memory units. The memory units were subjected to comprehensive functional and environmental tests at the end-item level to verify comformance with the specified requirements. A technical description of the unit is given, along with acceptance test data sheets.

  14. Device and Circuit Modeling and Development of a Non-Volatile Random Access Memory Cell, Utilizing AN Amorphous Silicon Thin-Film Floating-Gate Transistor Based Technology.

    NASA Astrophysics Data System (ADS)

    Riggio, Salvatore Richard, Jr.

    1994-01-01

    High density storage mechanisms are generally created using either magnetic or optical implementation techniques. Both of these techniques require mechanical transport of the medium and, therefore, have low reliability factors. These devices also generate unwanted low level ambient noise, which is of particular concern when considering modern quiet office standards. Additionally, optical techniques tend to be read-only in nature. Both mechanisms exhibit random access times that are measured in milli-seconds, rather than in micro-seconds. Therefore, the creation of a non-volatile random access memory as a replacement for the above mentioned storage techniques would be of great advantage in terms of access time, reliability, and ambient noise level. Described within are the device and circuit modeling and fabrication techniques used to develop a non-volatile random access memory cell from an amorphous silicon thin -film transistor based technology. Amorphous silicon thin-film transistors are fabricated by depositing the metal, the insulator and the semiconductor materials with a sputtering mechanism in a vacuum at 220 degrees centigrade, rather than by diffusion at 2000 degrees centigrade, as is done with crystalline silicon. By depositing a metal in the insulator, which is located between the gate and the channel, and by using an insulator material with extremely high resistivity, one can store charge in the gate region for a long period of time without external power. For example, this period of time can be as little as one week or as long as over one year. With a periodic refresh, one can extend the memory time of this storage mechanism indefinitely. Thin-film transistors can be deposited on a variety of materials such as glass, quartz or plastic by means of a stationary or continuous motion fabrication system. This material can be either rigid or flexible, and can be comparatively large in size. This allows for much greater circuit density than a standard

  15. Correlation of anomalous write error rates and ferromagnetic resonance spectrum in spin-transfer-torque-magnetic-random-access-memory devices containing in-plane free layers

    SciTech Connect

    Evarts, Eric R.; Rippard, William H.; Pufall, Matthew R.; Heindl, Ranko

    2014-05-26

    In a small fraction of magnetic-tunnel-junction-based magnetic random-access memory devices with in-plane free layers, the write-error rates (WERs) are higher than expected on the basis of the macrospin or quasi-uniform magnetization reversal models. In devices with increased WERs, the product of effective resistance and area, tunneling magnetoresistance, and coercivity do not deviate from typical device properties. However, the field-swept, spin-torque, ferromagnetic resonance (FS-ST-FMR) spectra with an applied DC bias current deviate significantly for such devices. With a DC bias of 300 mV (producing 9.9 × 10{sup 6} A/cm{sup 2}) or greater, these anomalous devices show an increase in the fraction of the power present in FS-ST-FMR modes corresponding to higher-order excitations of the free-layer magnetization. As much as 70% of the power is contained in higher-order modes compared to ≈20% in typical devices. Additionally, a shift in the uniform-mode resonant field that is correlated with the magnitude of the WER anomaly is detected at DC biases greater than 300 mV. These differences in the anomalous devices indicate a change in the micromagnetic resonant mode structure at high applied bias.

  16. Low latency memory access and synchronization

    DOEpatents

    Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.; Gara, Alan G.; Giampapa, Mark E.; Heidelberger, Philip; Hoenicke, Dirk; Ohmacht, Martin; Steinmacher-Burow, Burkhard D.; Takken, Todd E. , Vranas; Pavlos M.

    2010-10-19

    A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Bach processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.

  17. Low latency memory access and synchronization

    DOEpatents

    Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.; Gara, Alan G.; Giampapa, Mark E.; Heidelberger, Philip; Hoenicke, Dirk; Ohmacht, Martin; Steinmacher-Burow, Burkhard D.; Takken, Todd E.; Vranas, Pavlos M.

    2007-02-06

    A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.

  18. Memory bistable mechanisms of organic memory devices

    NASA Astrophysics Data System (ADS)

    Lee, Ching-Ting; Yu, Li-Zhen; Chen, Hung-Chun

    2010-07-01

    To investigate the memory bistable mechanisms of organic memory devices, the structure of [top Au anode/9,10-di(2-naphthyl)anthracene (ADN) active layer/bottom Au cathode] was deposited using a thermal deposition system. The Au atoms migrated into the ADN active layer was observed from the secondary ion mass spectrometry. The density of 9.6×1016 cm-3 and energy level of 0.553 eV of the induced trapping centers caused by the migrated Au atoms in the ADN active layer were calculated. The induced trapping centers did not influence the carrier injection barrier height between Au and ADN active layer. Therefore, the memory bistable behaviors of the organic memory devices were attributed to the induced trapping centers. The energy diagram was established to verify the mechanisms.

  19. Interfacial Electrode-Driven Enhancement of the Switching Parameters of a Copper Oxide-Based Resistive Random-Access Memory Device

    NASA Astrophysics Data System (ADS)

    Sangani, L. D. Varma; Kumar, Ch. Ravi; Krishna, M. Ghanashyam

    2016-01-01

    The characteristics of an Au/Cu x O/Au bipolar resistive random-access memory device are reported. It is demonstrated that switching parameters of this device structure can be enhanced by introducing an interfacial Al layer between the Au top electrode and the Cu x O-based dielectric layer. The set and reset voltages are, respectively, between -2.5 V to -6.0 V and +1.2 V to +3.0 V for the Al-based device. In contrast, the range of values are -0.5 V to -2.5 V and +0.5 V to +1.5 V for the set and reset voltages in the absence of Al. The Al-based device has a higher low resistance state value of 5-6 KΩ as compared to the 0.3-0.5 KΩ for the Au-based device, which leads to a 12 times lower power dissipation factor and lower reset current of 370 μA. Endurance studies carried out over 50 switching cycles show less than 2% variation in both the low resistance and high resistance values. The conduction is ohmic at low values of bias and non-ohmic at higher bias voltage which shows that the enhanced behaviour is a result of the formation of an insulating aluminum oxide layer at the Al-Cu x O interface.

  20. Memory availability and referential access

    PubMed Central

    Johns, Clinton L.; Gordon, Peter C.; Long, Debra L.; Swaab, Tamara Y.

    2013-01-01

    Most theories of coreference specify linguistic factors that modulate antecedent accessibility in memory; however, whether non-linguistic factors also affect coreferential access is unknown. Here we examined the impact of a non-linguistic generation task (letter transposition) on the repeated-name penalty, a processing difficulty observed when coreferential repeated names refer to syntactically prominent (and thus more accessible) antecedents. In Experiment 1, generation improved online (event-related potentials) and offline (recognition memory) accessibility of names in word lists. In Experiment 2, we manipulated generation and syntactic prominence of antecedent names in sentences; both improved online and offline accessibility, but only syntactic prominence elicited a repeated-name penalty. Our results have three important implications: first, the form of a referential expression interacts with an antecedent’s status in the discourse model during coreference; second, availability in memory and referential accessibility are separable; and finally, theories of coreference must better integrate known properties of the human memory system. PMID:24443621

  1. Modulation of surface trap induced resistive switching by electrode annealing in individual PbS micro/nanowire-based devices for resistance random access memory.

    PubMed

    Zheng, Jianping; Cheng, Baochang; Wu, Fuzhang; Su, Xiaohui; Xiao, Yanhe; Guo, Rui; Lei, Shuijin

    2014-12-10

    Bipolar resistive switching (RS) devices are commonly believed as a promising candidate for next generation nonvolatile resistance random access memory (RRAM). Here, two-terminal devices based on individual PbS micro/nanowires with Ag electrodes are constructed, whose electrical transport depends strongly on the abundant surface and bulk trap states in micro/nanostructures. The surface trap states can be filled/emptied effectively at negative/positive bias voltage, respectively, and the corresponding rise/fall of the Fermi level induces a variation in a degenerate/nondegenerate state, resulting in low/high resistance. Moreover, the filling/emptying of trap states can be utilized as RRAM. After annealing, the surface trap state can almost be eliminated completely; while most of the bulk trap states can still remain. In the devices unannealed and annealed at both ends, therefore, the symmetrical back-to-back Fowler-Nordheim tunneling with large ON/OFF resistance ratio and Poole-Frenkel emission with poor hysteresis can be observed under cyclic sweep voltage, respectively. However, a typical bipolar RS behavior can be observed effectively in the devices annealed at one end. The acquirement of bipolar RS and nonvolatile RRAM by the modulation of electrode annealing demonstrates the abundant trap states in micro/nanomaterials will be advantageous to the development of new type electronic components.

  2. Electrically Variable Resistive Memory Devices

    NASA Technical Reports Server (NTRS)

    Liu, Shangqing; Wu, Nai-Juan; Ignatiev, Alex; Charlson, E. J.

    2010-01-01

    Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

  3. Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

    SciTech Connect

    Ohmacht, Martin

    2014-09-09

    In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

  4. A Synthetic Multicellular Memory Device.

    PubMed

    Urrios, Arturo; Macia, Javier; Manzoni, Romilde; Conde, Núria; Bonforti, Adriano; de Nadal, Eulàlia; Posas, Francesc; Solé, Ricard

    2016-08-19

    Changing environments pose a challenge to living organisms. Cells need to gather and process incoming information, adapting to changes in predictable ways. This requires in particular the presence of memory, which allows different internal states to be stored. Biological memory can be stored by switches that retain information on past and present events. Synthetic biologists have implemented a number of memory devices for biological applications, mostly in single cells. It has been shown that the use of multicellular consortia provides interesting advantages to implement biological circuits. Here we show how to build a synthetic biological memory switch using an eukaryotic consortium. We engineered yeast cells that can communicate and retain memory of changes in the extracellular environment. These cells were able to produce and secrete a pheromone and sense a different pheromone following NOT logic. When the two strains were cocultured, they behaved as a double-negative-feedback motif with memory. In addition, we showed that memory can be effectively changed by the use of external inputs. Further optimization of these modules and addition of other cells could lead to new multicellular circuits that exhibit memory over a broad range of biological inputs. PMID:27439436

  5. Fast, Capacious Disk Memory Device

    NASA Technical Reports Server (NTRS)

    Muller, Ronald M.

    1990-01-01

    Device for recording digital data on, and playing back data from, memory disks has high recording or playback rate and utilizes available recording area more fully. Two disks, each with own reading/writing head, used to record data at same time. Head on disk A operates on one of tracks numbered from outside in; head on disk B operates on track of same number in sequence from inside out. Underlying concept of device applicable to magnetic or optical disks.

  6. Radiation Effects of Commercial Resistive Random Access Memories

    NASA Technical Reports Server (NTRS)

    Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

    2014-01-01

    We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

  7. Dynamic computing random access memory

    NASA Astrophysics Data System (ADS)

    Traversa, F. L.; Bonani, F.; Pershin, Y. V.; Di Ventra, M.

    2014-07-01

    The present von Neumann computing paradigm involves a significant amount of information transfer between a central processing unit and memory, with concomitant limitations in the actual execution speed. However, it has been recently argued that a different form of computation, dubbed memcomputing (Di Ventra and Pershin 2013 Nat. Phys. 9 200-2) and inspired by the operation of our brain, can resolve the intrinsic limitations of present day architectures by allowing for computing and storing of information on the same physical platform. Here we show a simple and practical realization of memcomputing that utilizes easy-to-build memcapacitive systems. We name this architecture dynamic computing random access memory (DCRAM). We show that DCRAM provides massively-parallel and polymorphic digital logic, namely it allows for different logic operations with the same architecture, by varying only the control signals. In addition, by taking into account realistic parameters, its energy expenditures can be as low as a few fJ per operation. DCRAM is fully compatible with CMOS technology, can be realized with current fabrication facilities, and therefore can really serve as an alternative to the present computing technology.

  8. Dynamic computing random access memory.

    PubMed

    Traversa, F L; Bonani, F; Pershin, Y V; Di Ventra, M

    2014-07-18

    The present von Neumann computing paradigm involves a significant amount of information transfer between a central processing unit and memory, with concomitant limitations in the actual execution speed. However, it has been recently argued that a different form of computation, dubbed memcomputing (Di Ventra and Pershin 2013 Nat. Phys. 9 200-2) and inspired by the operation of our brain, can resolve the intrinsic limitations of present day architectures by allowing for computing and storing of information on the same physical platform. Here we show a simple and practical realization of memcomputing that utilizes easy-to-build memcapacitive systems. We name this architecture dynamic computing random access memory (DCRAM). We show that DCRAM provides massively-parallel and polymorphic digital logic, namely it allows for different logic operations with the same architecture, by varying only the control signals. In addition, by taking into account realistic parameters, its energy expenditures can be as low as a few fJ per operation. DCRAM is fully compatible with CMOS technology, can be realized with current fabrication facilities, and therefore can really serve as an alternative to the present computing technology.

  9. From silicon to organic nanoparticle memory devices.

    PubMed

    Tsoukalas, D

    2009-10-28

    After introducing the operational principle of nanoparticle memory devices, their current status in silicon technology is briefly presented in this work. The discussion then focuses on hybrid technologies, where silicon and organic materials have been combined together in a nanoparticle memory device, and finally concludes with the recent development of organic nanoparticle memories. The review is focused on the nanoparticle memory concept as an extension of the current flash memory device. Organic nanoparticle memories are at a very early stage of research and have not yet found applications. When this happens, it is expected that they will not directly compete with mature silicon technology but will find their own areas of application.

  10. Effect of annealing treatment on the electrical characteristics of Pt/Cr-embedded ZnO/Pt resistance random access memory devices

    SciTech Connect

    Chang, Li-Chun; Kao, Hsuan-Ling; Liu, Keng-Hao

    2014-03-15

    ZnO/Cr/ZnO trilayer films sandwiched with Pt electrodes were prepared for nonvolatile resistive memory applications. The threshold voltage of a ZnO device embedded with a 3-nm Cr interlayer was approximately 50% lower than that of a ZnO monolayer device. This study investigated threshold voltage as a function of Cr thickness. Both the ZnO monolayer device and the Cr-embedded ZnO device structures exhibited resistance switching under electrical bias both before and after rapid thermal annealing (RTA) treatment, but resistive switching effects in the two cases exhibited distinct characteristics. Compared with the as-fabricated device, the memory cell after RTA demonstrated remarkable device parameter improvements, including a lower threshold voltage, a lower write current, and a higher R{sub off}/R{sub on} ratio. Both transmission electron microscope observations and Auger electron spectroscopy revealed that the Cr charge trapping layer in Cr-embedded ZnO dispersed uniformly into the storage medium after RTA, and x-ray diffraction and x-ray photoelectron spectroscopy analyses demonstrated that the Cr atoms lost electrons to become Cr{sup 3+} ions after dispersion. These results indicated that the altered status of Cr in ZnO/Cr/ZnO trilayer films during RTA treatment was responsible for the switching mechanism transition.

  11. Memory access in shared virtual memory

    SciTech Connect

    Berrendorf, R.

    1992-09-01

    Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

  12. Memory access in shared virtual memory

    SciTech Connect

    Berrendorf, R. )

    1992-01-01

    Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

  13. Memory-assisted measurement-device-independent quantum key distribution

    NASA Astrophysics Data System (ADS)

    Panayi, Christiana; Razavi, Mohsen; Ma, Xiongfeng; Lütkenhaus, Norbert

    2014-04-01

    A protocol with the potential of beating the existing distance records for conventional quantum key distribution (QKD) systems is proposed. It borrows ideas from quantum repeaters by using memories in the middle of the link, and that of measurement-device-independent QKD, which only requires optical source equipment at the user's end. For certain memories with short access times, our scheme allows a higher repetition rate than that of quantum repeaters with single-mode memories, thereby requiring lower coherence times. By accounting for various sources of nonideality, such as memory decoherence, dark counts, misalignment errors, and background noise, as well as timing issues with memories, we develop a mathematical framework within which we can compare QKD systems with and without memories. In particular, we show that with the state-of-the-art technology for quantum memories, it is potentially possible to devise memory-assisted QKD systems that, at certain distances of practical interest, outperform current QKD implementations.

  14. Magnetic Analog Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Wu, Jiin-Chuan; Stadler, Henry L.

    1991-01-01

    Proposed integrated, solid-state, analog random-access memory base on principle of magnetic writing and magnetoresistive reading. Current in writing conductor magnetizes storage layer. Remanent magnetization in storage layer penetrates readout layer and detected by magnetoresistive effect or Hall effect. Memory cells are part of integrated circuit including associated reading and writing transistors. Intended to provide high storage density and rapid access, nonvolatile, consumes little power, and relatively invulnerable to ionizing radiation.

  15. Forced ion migration for chalcogenide phase change memory device

    NASA Technical Reports Server (NTRS)

    Campbell, Kristy A. (Inventor)

    2011-01-01

    Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.

  16. Forced ion migration for chalcogenide phase change memory device

    NASA Technical Reports Server (NTRS)

    Campbell, Kristy A. (Inventor)

    2012-01-01

    Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

  17. Forced Ion Migration for Chalcogenide Phase Change Memory Device

    NASA Technical Reports Server (NTRS)

    Campbell, Kristy A (Inventor)

    2013-01-01

    Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

  18. Shape memory polymer medical device

    DOEpatents

    Maitland, Duncan; Benett, William J.; Bearinger, Jane P.; Wilson, Thomas S.; Small, IV, Ward; Schumann, Daniel L.; Jensen, Wayne A.; Ortega, Jason M.; Marion, III, John E.; Loge, Jeffrey M.

    2010-06-29

    A system for removing matter from a conduit. The system includes the steps of passing a transport vehicle and a shape memory polymer material through the conduit, transmitting energy to the shape memory polymer material for moving the shape memory polymer material from a first shape to a second and different shape, and withdrawing the transport vehicle and the shape memory polymer material through the conduit carrying the matter.

  19. Projected phase-change memory devices

    NASA Astrophysics Data System (ADS)

    Koelmans, Wabe W.; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos

    2015-09-01

    Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.

  20. Projected phase-change memory devices.

    PubMed

    Koelmans, Wabe W; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos

    2015-01-01

    Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states. PMID:26333363

  1. High Density Memory Based on Quantum Device Technology

    NASA Technical Reports Server (NTRS)

    vanderWagt, Paul; Frazier, Gary; Tang, Hao

    1995-01-01

    We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

  2. Electronic device aspects of neural network memories

    NASA Technical Reports Server (NTRS)

    Lambe, J.; Moopenn, A.; Thakoor, A. P.

    1985-01-01

    The basic issues related to the electronic implementation of the neural network model (NNM) for content addressable memories are examined. A brief introduction to the principles of the NNM is followed by an analysis of the information storage of the neural network in the form of a binary connection matrix and the recall capability of such matrix memories based on a hardware simulation study. In addition, materials and device architecture issues involved in the future realization of such networks in VLSI-compatible ultrahigh-density memories are considered. A possible space application of such devices would be in the area of large-scale information storage without mechanical devices.

  3. System for simultaneously loading program to master computer memory devices and corresponding slave computer memory devices

    NASA Technical Reports Server (NTRS)

    Hall, William A. (Inventor)

    1993-01-01

    A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.

  4. Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

    SciTech Connect

    Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel

    2014-07-22

    The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diverse manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.

  5. Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

    DOE PAGES

    Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel

    2014-07-22

    The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diversemore » manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.« less

  6. Non-volatile magnetic random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

    1994-01-01

    Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

  7. Parallel-access memory management using fast-fits

    SciTech Connect

    Johnson, T.

    1994-12-01

    The two most common approaches to managing shared-access memory-free lists and buddy system-have significant drawbacks. Free list algorithms have poor memory access characteristics, and buddy systems utilize their space inefficiently. In this paper, we present an alternative approach to parallel-access memory management based on the fast-fits algorithm. A fast-fits memory manager stores free blocks in a tree structure, providing fast access and efficient space use. Since the fast-fits algorithm accesses fewer blocks than a free list algorithm, it reduces the amount of cache invalidation overhead due to the memory manager. Our performance experiments show that the parallel-access fast-fits memory manager allows significantly greater access rates than a serial-access fast-fits memory manager does. We not that shared-memory multiprocessor systems need efficient dynamic storage allocators, both for system purposes and to support parallel programs.

  8. Novel synaptic memory device for neuromorphic computing.

    PubMed

    Mandal, Saptarshi; El-Amin, Ammaarah; Alexander, Kaitlyn; Rajendran, Bipin; Jha, Rashmi

    2014-06-18

    This report discusses the electrical characteristics of two-terminal synaptic memory devices capable of demonstrating an analog change in conductance in response to the varying amplitude and pulse-width of the applied signal. The devices are based on Mn doped HfO₂ material. The mechanism behind reconfiguration was studied and a unified model is presented to explain the underlying device physics. The model was then utilized to show the application of these devices in speech recognition. A comparison between a 20 nm × 20 nm sized synaptic memory device with that of a state-of-the-art VLSI SRAM synapse showed ~10× reduction in area and >10(6) times reduction in the power consumption per learning cycle.

  9. Novel synaptic memory device for neuromorphic computing

    PubMed Central

    Mandal, Saptarshi; El-Amin, Ammaarah; Alexander, Kaitlyn; Rajendran, Bipin; Jha, Rashmi

    2014-01-01

    This report discusses the electrical characteristics of two-terminal synaptic memory devices capable of demonstrating an analog change in conductance in response to the varying amplitude and pulse-width of the applied signal. The devices are based on Mn doped HfO2 material. The mechanism behind reconfiguration was studied and a unified model is presented to explain the underlying device physics. The model was then utilized to show the application of these devices in speech recognition. A comparison between a 20 nm × 20 nm sized synaptic memory device with that of a state-of-the-art VLSI SRAM synapse showed ~10× reduction in area and >106 times reduction in the power consumption per learning cycle. PMID:24939247

  10. Combating Memory Corruption Attacks On Scada Devices

    NASA Astrophysics Data System (ADS)

    Bellettini, Carlo; Rrushi, Julian

    Memory corruption attacks on SCADA devices can cause significant disruptions to control systems and the industrial processes they operate. However, despite the presence of numerous memory corruption vulnerabilities, few, if any, techniques have been proposed for addressing the vulnerabilities or for combating memory corruption attacks. This paper describes a technique for defending against memory corruption attacks by enforcing logical boundaries between potentially hostile data and safe data in protected processes. The technique encrypts all input data using random keys; the encrypted data is stored in main memory and is decrypted according to the principle of least privilege just before it is processed by the CPU. The defensive technique affects the precision with which attackers can corrupt control data and pure data, protecting against code injection and arc injection attacks, and alleviating problems posed by the incomparability of mitigation techniques. An experimental evaluation involving the popular Modbus protocol demonstrates the feasibility and efficiency of the defensive technique.

  11. Resistively heated shape memory polymer device

    DOEpatents

    Marion, III, John E.; Bearinger, Jane P.; Wilson, Thomas S.; Maitland, Duncan J.

    2016-10-25

    A resistively heated shape memory polymer device is made by providing a rod, sheet or substrate that includes a resistive medium. The rod, sheet or substrate is coated with a first shape memory polymer providing a coated intermediate unit. The coated intermediate unit is in turn coated with a conductive material providing a second intermediate unit. The second coated intermediate unit is in turn coated with an outer shape memory polymer. The rod, sheet or substrate is exposed and an electrical lead is attached to the rod, sheet or substrate. The conductive material is exposed and an electrical lead is attached to the conductive material.

  12. Thin dielectric technology and memory devices

    NASA Astrophysics Data System (ADS)

    King, Ya-Chin

    With advances in technology and scaling, silicon Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) based VLSI circuits have remained dominant in data processing and memory applications. Perpetuated by the demand for high-performance and low-cost integrated circuits, the lateral dimensions of the MOSFETs are being aggressively scaled. This in turn demands scaling of the gate oxide thickness as well. Thin gate oxides present both challenges to the modeling and design device of the classical MOSFET and opportunities to explore new device designs and applications. This study investigates the effect of inversion layer quantization on the capacitance and current characteristics of thin-gate-oxide MOS transistors. In addition, this study explores the possibility of employing thin tunnel oxide for new quasi-nonvolatile memory devices. The performance limitation of a thin dielectric floating gate memory device as well as its potential for dynamic memory applications are discussed. An alternative device structure (i.e. charge-trap based memory cells) is examined by the single charge tunneling model governed by Coulomb Blockade theory. Two methods of forming charge storage nodes embedded in the gate dielectric are investigated. The resulting devices are then characterized. The first proposed device contains a charge trapping layer of silicon rich oxide (SRO) for dynamic/non-volatile memory application. This device has a similar structure as a MONOS device with SRO instead of silicon nitride for charge trapping on top of a very thin tunneling oxide (<2nm). Since it uses charge trapped in the oxide to create threshold voltage shift, the SRO memory cell is a non-destructive-read device. A new process of depositing SRO and high temperature oxide (HTO) in a single furnace step is developed to better top the control oxide thickness and improve data retention. This device achieved write and erase speeds comparable to that of a DRAM cell and longer data retention time than

  13. Complementary resistive switching behavior for conductive bridge random access memory

    NASA Astrophysics Data System (ADS)

    Zheng, Hao-Xuan; Chang, Ting-Chang; Chang, Kuan-Chang; Tsai, Tsung-Ming; Shih, Chih-Cheng; Zhang, Rui; Chen, Kai-Huang; Wang, Ming-Hui; Zheng, Jin-Cheng; Lo, Ikai; Wu, Cheng-Hsien; Tseng, Yi-Ting; Sze, Simon M.

    2016-06-01

    In this study, a structure of Pt/Cu18Si12O70/TiN has been investigated. By co-sputtering the Cu and SiO2 targets in the switching layer, we can measure the operation mechanism of complementary resistive switching (CRS). This differs from conventional conductive bridge random access memory (CBRAM) that tends to use Cu electrodes rather than Cu18Si12O70. By changing the voltage and compliance current, we can control device operating characteristics. Because Cu distributes differently in the device depending on this setting, the operating end can be located at either the top or bottom electrode. Device current-voltage (I-V) curves are used to demonstrate that the CRS in the CBRAM device is a double-electrode operation.

  14. 21 CFR 876.5540 - Blood access device and accessories.

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... 21 Food and Drugs 8 2013-04-01 2013-04-01 false Blood access device and accessories. 876.5540... (CONTINUED) MEDICAL DEVICES GASTROENTEROLOGY-UROLOGY DEVICES Therapeutic Devices § 876.5540 Blood access device and accessories. (a) Identification. A blood access device and accessories is a device intended...

  15. 21 CFR 876.5540 - Blood access device and accessories.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 21 Food and Drugs 8 2011-04-01 2011-04-01 false Blood access device and accessories. 876.5540... (CONTINUED) MEDICAL DEVICES GASTROENTEROLOGY-UROLOGY DEVICES Therapeutic Devices § 876.5540 Blood access device and accessories. (a) Identification. A blood access device and accessories is a device intended...

  16. 21 CFR 876.5540 - Blood access device and accessories.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Blood access device and accessories. 876.5540... (CONTINUED) MEDICAL DEVICES GASTROENTEROLOGY-UROLOGY DEVICES Therapeutic Devices § 876.5540 Blood access device and accessories. (a) Identification. A blood access device and accessories is a device intended...

  17. 21 CFR 876.5540 - Blood access device and accessories.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Blood access device and accessories. 876.5540... (CONTINUED) MEDICAL DEVICES GASTROENTEROLOGY-UROLOGY DEVICES Therapeutic Devices § 876.5540 Blood access device and accessories. (a) Identification. A blood access device and accessories is a device intended...

  18. New memory devices based on the proton transfer process.

    PubMed

    Wierzbowska, Małgorzata

    2016-01-01

    Memory devices operating due to the fast proton transfer (PT) process are proposed by the means of first-principles calculations. Writing  information is performed using the electrostatic potential of scanning tunneling microscopy (STM). Reading information is based on the effect of the local magnetization induced at the zigzag graphene nanoribbon (Z-GNR) edge-saturated with oxygen or the hydroxy group-and can be realized with the use of giant magnetoresistance (GMR), a magnetic tunnel junction or spin-transfer torque devices. The energetic barriers for the hop forward and backward processes can be tuned by the distance and potential of the STM tip; this thus enables us to tailor the non-volatile logic states. The proposed system enables very dense packing of the logic cells and could be used in random access and flash memory devices. PMID:26596910

  19. New memory devices based on the proton transfer process

    NASA Astrophysics Data System (ADS)

    Wierzbowska, Małgorzata

    2016-01-01

    Memory devices operating due to the fast proton transfer (PT) process are proposed by the means of first-principles calculations. Writing information is performed using the electrostatic potential of scanning tunneling microscopy (STM). Reading information is based on the effect of the local magnetization induced at the zigzag graphene nanoribbon (Z-GNR) edge—saturated with oxygen or the hydroxy group—and can be realized with the use of giant magnetoresistance (GMR), a magnetic tunnel junction or spin-transfer torque devices. The energetic barriers for the hop forward and backward processes can be tuned by the distance and potential of the STM tip; this thus enables us to tailor the non-volatile logic states. The proposed system enables very dense packing of the logic cells and could be used in random access and flash memory devices.

  20. Nonvolatile Ionic Two-Terminal Memory Device

    NASA Technical Reports Server (NTRS)

    Williams, Roger M.

    1990-01-01

    Conceptual solid-state memory device nonvolatile and erasable and has only two terminals. Proposed device based on two effects: thermal phase transition and reversible intercalation of ions. Transfer of sodium ions between source of ions and electrical switching element increases or decreases electrical conductance of element, turning switch "on" or "off". Used in digital computers and neural-network computers. In neural networks, many small, densely packed switches function as erasable, nonvolatile synaptic elements.

  1. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

    2000-01-01

    An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

  2. Memory device using movement of protons

    DOEpatents

    Warren, W.L.; Vanheusden, K.J.R.; Fleetwood, D.M.; Devine, R.A.B.

    1998-11-03

    An electrically written memory element is disclosed utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element. 19 figs.

  3. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.

    1998-01-01

    An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.

  4. Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory

    NASA Astrophysics Data System (ADS)

    Kim, Sang-Koog

    2011-03-01

    An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.

  5. Conductive bridging random access memory—materials, devices and applications

    NASA Astrophysics Data System (ADS)

    Kozicki, Michael N.; Barnaby, Hugh J.

    2016-11-01

    We present a review and primer on the subject of conductive bridging random access memory (CBRAM), a metal ion-based resistive switching technology, in the context of current research and the near-term requirements of the electronics industry in ultra-low energy devices and new computing paradigms. We include extensive discussions of the materials involved, the underlying physics and electrochemistry, the critical roles of ion transport and electrode reactions in conducting filament formation and device switching, and the electrical characteristics of the devices. Two general cation material systems are given—a fast ion chacogenide electrolyte and a lower ion mobility oxide ion conductor, and numerical examples are offered to enhance understanding of the operation of devices based on these. The effect of device conditioning on the activation energy for ion transport and consequent switching speed is discussed, as well as the mechanisms involved in the removal of the conducting bridge. The morphology of the filament and how this could be influenced by the solid electrolyte structure is described, and the electrical characteristics of filaments with atomic-scale constrictions are discussed. Consideration is also given to the thermal and mechanical environments within the devices. Finite element and compact modelling illustrations are given and aspects of CBRAM storage elements in memory circuits and arrays are included. Considerable emphasis is placed on the effects of ionizing radiation on CBRAM since this is important in various high reliability applications, and the potential uses of the devices in reconfigurable logic and neuromorphic systems is also discussed.

  6. Shape Memory Polymer Therapeutic Devices for Stroke

    SciTech Connect

    Wilson, T S; Small IV, W; Benett, W J; Bearinger, J P; Maitland, D J

    2005-10-11

    Shape memory polymers (SMPs) are attracting a great deal of interest in the scientific community for their use in applications ranging from light weight structures in space to micro-actuators in MEMS devices. These relatively new materials can be formed into a primary shape, reformed into a stable secondary shape, and then controllably actuated to recover their primary shape. The first part of this presentation will be a brief review of the types of polymeric structures which give rise to shape memory behavior in the context of new shape memory polymers with highly regular network structures recently developed at LLNL for biomedical devices. These new urethane SMPs have improved optical and physical properties relative to commercial SMPs, including improved clarity, high actuation force, and sharper actuation transition. In the second part of the presentation we discuss the development of SMP based devices for mechanically removing neurovascular occlusions which result in ischemic stroke. These devices are delivered to the site of the occlusion in compressed form, are pushed through the occlusion, actuated (usually optically) to take on an expanded conformation, and then used to dislodge and grip the thrombus while it is withdrawn through the catheter.

  7. A biometric access personal optical storage device

    NASA Astrophysics Data System (ADS)

    Davies, David H.; Ray, Steve; Gurkowski, Mark; Lee, Lane

    2007-01-01

    A portable USB2.0 personal storage device that uses built-in encryption and allows data access through biometric scanning of a finger print is described. Biometric image derived templates are stored on the removable 32 mm write once (WO) media. The encrypted templates travel with the disc and allow access to the data providing the biometric feature (e.g. the finger itself) is present. The device also allows for export and import of the templates under secure key exchange protocols. The storage system is built around the small form factor optical engine that uses a tilt arm rotary actuator and front surface media.

  8. Nanodot-based organic memory devices

    NASA Astrophysics Data System (ADS)

    Liu, Zhengchun

    2006-04-01

    In this study, resistor-type, diode-type, and transistor-type organic memory devices were investigated, aiming at the low-cost plastic integrated circuit applications. A series of solution-processing techniques including spin-coating, inkjet printing, and self-assembly were employed to fabricate these devices. The organic resistive memory device is based on a novel molecular complex film composed of tetracyanoquinodimethane (TCNQ) and a soluble methanofullerene derivative [6,6]-phenyl C61-butyric acid methyl ester (PCBM). It has an Al/molecules/Al sandwich structure. The molecular layer was formed by spin-coating technique instead of expensive vacuum deposition method. The current-voltage characteristics show that the device switches from the initial 'low' conduction state to 'high' conduction state upon application of external electric field at room temperature and return to 'low' conduction state when a high current pulse is applied. The on/off ratio is over 106. Each state has been found to remain stable for more than five months, even after the external electric field is removed. The PCBM nanodots wrapped by TCNQ molecules can form potential wells for charge trapping, and are believed to be responsible for the memory effects. A rewritable diode memory device was achieved in an improved configuration, i.e., ITO-PEDOT:PSS-PCBM/TCNQ-Al, where a semiconductor polymer PEDOT:PSS is used to form p+-N heterojunction with PCBM/TCNQ. It exhibits a diode characteristic (low conductive) before switching to a high-conductive Poole-Frenkel regime upon applying a positive external bias to ITO. The on/off ratio at +1.0 V is up to 105. Simulation results from Taurus-Medici are in qualitative agreement with the experimental results and the proposed charge storage model. The transistor-type memory device is fabricated on a heavily doped n-type silicon (n+-Si) substrate with a 100 nm thick thermally-grown oxide layer. The n+-Si serves as the gate electrode, while the oxide layer

  9. Hybrid Flexible Resistive Random Access Memory-Gated Transistor for Novel Nonvolatile Data Storage.

    PubMed

    Han, Su-Ting; Zhou, Ye; Chen, Bo; Wang, Chundong; Zhou, Li; Yan, Yan; Zhuang, Jiaqing; Sun, Qijun; Zhang, Hua; Roy, V A L

    2016-01-20

    Here, a single-device demonstration of novel hybrid architecture is reported to achieve programmable transistor nodes which have analogies to flash memory by incorporating a resistive switching random access memory (RRAM) device as a resistive switch gate for field effect transistor (FET) on a flexible substrate. A high performance flexible RRAM with a three-layered structure is fabricated by utilizing solution-processed MoS2 nanosheets sandwiched between poly(methyl methacrylate) polymer layers. Gate coupling with the pentacene-based transistor can be controlled by the RRAM memory state to produce a nonprogrammed state (inactive) and a programmed state (active) with a well-defined memory window. Compared to the reference flash memory device based on the MoS2 floating gate, the hybrid device presents robust access speed and retention ability. Furthermore, the hybrid RRAM-gated FET is used to build an integrated logic circuit and a wide logic window in inverter logic is achieved. The controllable, well-defined memory window, long retention time, and fast access speed of this novel hybrid device may open up new possibilities of realizing fully functional nonvolatile memory for high-performance flexible electronics.

  10. Hybrid Flexible Resistive Random Access Memory-Gated Transistor for Novel Nonvolatile Data Storage.

    PubMed

    Han, Su-Ting; Zhou, Ye; Chen, Bo; Wang, Chundong; Zhou, Li; Yan, Yan; Zhuang, Jiaqing; Sun, Qijun; Zhang, Hua; Roy, V A L

    2016-01-20

    Here, a single-device demonstration of novel hybrid architecture is reported to achieve programmable transistor nodes which have analogies to flash memory by incorporating a resistive switching random access memory (RRAM) device as a resistive switch gate for field effect transistor (FET) on a flexible substrate. A high performance flexible RRAM with a three-layered structure is fabricated by utilizing solution-processed MoS2 nanosheets sandwiched between poly(methyl methacrylate) polymer layers. Gate coupling with the pentacene-based transistor can be controlled by the RRAM memory state to produce a nonprogrammed state (inactive) and a programmed state (active) with a well-defined memory window. Compared to the reference flash memory device based on the MoS2 floating gate, the hybrid device presents robust access speed and retention ability. Furthermore, the hybrid RRAM-gated FET is used to build an integrated logic circuit and a wide logic window in inverter logic is achieved. The controllable, well-defined memory window, long retention time, and fast access speed of this novel hybrid device may open up new possibilities of realizing fully functional nonvolatile memory for high-performance flexible electronics. PMID:26578160

  11. Enhanced stability of complementary resistance switching in the TiN/HfOx/TiN resistive random access memory device via interface engineering

    NASA Astrophysics Data System (ADS)

    Zhang, H. Z.; Ang, D. S.; Yew, K. S.; Wang, X. P.

    2016-02-01

    This study shows that a majority (70%) of TiN/HfOx/TiN devices exhibit failed complementary resistance switching (CRS) after forming. In conjunction with the consistent observation of a large non-polar reset loop in the first post-forming voltage-sweep measurement, it is proposed that breakdown of the TiN/HfOx interfacial oxide layers (crucial in enabling CRS) and the accompanied formation of Ti filaments (due to Ti migration from the TiN cathode into the breakdown path) resulted in CRS failure and the observed non-polar reset behavior. This hypothesis is supported by the significant reduction or complete elimination of the large non-polar reset and CRS failure in devices with a thin Al2O3 layer incorporated at the TiN-cathode/HfOx or both TiN/HfOx interfaces. The higher breakdown field of the thin Al2O3 enables it to sustain the forming voltage until the forming process is interrupted, thus enabling CRS via oxygen exchange with the adjacent vacancy-type filament formed in the HfOx.

  12. Memory device using movement of protons

    DOEpatents

    Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.; Archer, Leo B.; Brown, George A.; Wallace, Robert M.

    2000-01-01

    An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.

  13. Remote direct memory access over datagrams

    DOEpatents

    Grant, Ryan Eric; Rashti, Mohammad Javad; Balaji, Pavan; Afsahi, Ahmad

    2014-12-02

    A communication stack for providing remote direct memory access (RDMA) over a datagram network is disclosed. The communication stack has a user level interface configured to accept datagram related input and communicate with an RDMA enabled network interface card (NIC) via an NIC driver. The communication stack also has an RDMA protocol layer configured to supply one or more data transfer primitives for the datagram related input of the user level. The communication stack further has a direct data placement (DDP) layer configured to transfer the datagram related input from a user storage to a transport layer based on the one or more data transfer primitives by way of a lower layer protocol (LLP) over the datagram network.

  14. Direct memory access transfer completion notification

    DOEpatents

    Chen, Dong; Giampapa, Mark E.; Heidelberger, Philip; Kumar, Sameer; Parker, Jeffrey J.; Steinmacher-Burow, Burkhard D.; Vranas, Pavlos

    2010-07-27

    Methods, compute nodes, and computer program products are provided for direct memory access (`DMA`) transfer completion notification. Embodiments include determining, by an origin DMA engine on an origin compute node, whether a data descriptor for an application message to be sent to a target compute node is currently in an injection first-in-first-out (`FIFO`) buffer in dependence upon a sequence number previously associated with the data descriptor, the total number of descriptors currently in the injection FIFO buffer, and the current sequence number for the newest data descriptor stored in the injection FIFO buffer; and notifying a processor core on the origin DMA engine that the message has been sent if the data descriptor for the message is not currently in the injection FIFO buffer.

  15. Resistive switching characteristics and mechanisms in silicon oxide memory devices

    NASA Astrophysics Data System (ADS)

    Chang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Zhou, Fei; Wu, Xiaohan; Chen, Yen-Ting; Wang, Yanzhen; Xue, Fei; Lee, Jack C.

    2016-05-01

    Intrinsic unipolar SiOx-based resistance random access memories (ReRAM) characterization, switching mechanisms, and applications have been investigated. Device structures, material compositions, and electrical characteristics are identified that enable ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using complementary metal-oxide semiconductor transistor (CMOS)-compatible SiOx-based materials. These ideas are combined with the use of horizontal and vertical device structure designs, composition optimization, electrical control, and external factors to help understand resistive switching (RS) mechanisms. Measured temperature effects, pulse response, and carrier transport behaviors lead to compact models of RS mechanisms and energy band diagrams in order to aid the development of computer-aided design for ultralarge-v scale integration. This chapter presents a comprehensive investigation of SiOx-based RS characteristics and mechanisms for the post-CMOS device era.

  16. Ferroelectric-carbon nanotube memory devices

    NASA Astrophysics Data System (ADS)

    Kumar, Ashok; Shivareddy, Sai G.; Correa, Margarita; Resto, Oscar; Choi, Youngjin; Cole, Matthew T.; Katiyar, Ram S.; Scott, James F.; Amaratunga, Gehan A. J.; Lu, Haidong; Gruverman, Alexei

    2012-04-01

    One-dimensional ferroelectric nanostructures, carbon nanotubes (CNT) and CNT-inorganic oxides have recently been studied due to their potential applications for microelectronics. Here, we report coating of a registered array of aligned multi-wall carbon nanotubes (MWCNT) grown on silicon substrates by functional ferroelectric Pb(Zr,Ti)O3 (PZT) which produces structures suitable for commercial prototype memories. Microstructural analysis reveals the crystalline nature of PZT with small nanocrystals aligned in different directions. First-order Raman modes of MWCNT and PZT/MWCNT/n-Si show the high structural quality of CNT before and after PZT deposition at elevated temperature. PZT exists mostly in the monoclinic Cc/Cm phase, which is the origin of the high piezoelectric response in the system. Low-loss square piezoelectric hysteresis obtained for the 3D bottom-up structure confirms the switchability of the device. Current-voltage mapping of the device by conducting atomic force microscopy (c-AFM) indicates very low transient current. Fabrication and functional properties of these hybrid ferroelectric-carbon nanotubes is the first step towards miniaturization for future nanotechnology sensors, actuators, transducers and memory devices.

  17. Impacts of Co doping on ZnO transparent switching memory device characteristics

    NASA Astrophysics Data System (ADS)

    Simanjuntak, Firman Mangasa; Prasad, Om Kumar; Panda, Debashis; Lin, Chun-An; Tsai, Tsung-Ling; Wei, Kung-Hwa; Tseng, Tseung-Yuen

    2016-05-01

    The resistive switching characteristics of indium tin oxide (ITO)/Zn1-xCoxO/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnO device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.

  18. A flexible organic resistance memory device for wearable biomedical applications

    NASA Astrophysics Data System (ADS)

    Cai, Yimao; Tan, Jing; YeFan, Liu; Lin, Min; Huang, Ru

    2016-07-01

    Parylene is a Food and Drug Administration (FDA)-approved material which can be safely used within the human body and it is also offers chemically inert and flexible merits. Here, we present a flexible parylene-based organic resistive random access memory (RRAM) device suitable for wearable biomedical application. The proposed device is fabricated through standard lithography and pattern processes at room temperature, exhibiting the feasibility of integration with CMOS circuits. This organic RRAM device offers a high storage window (>104), superior retention ability and immunity to disturbing. In addition, brilliant mechanical and electrical stabilities of this device are demonstrated when under harsh bending (bending cycle >500, bending radius <10 mm). Finally, the underlying mechanism for resistance switching of this kind of device is discussed, and metallic conducting filament formation and annihilation related to oxidization/redox of Al and Al anions migrating in the parylene layer can be attributed to resistance switching in this device. These advantages reveal the significant potential of parylene-based flexible RRAM devices for wearable biomedical applications.

  19. A flexible organic resistance memory device for wearable biomedical applications.

    PubMed

    Cai, Yimao; Tan, Jing; YeFan, Liu; Lin, Min; Huang, Ru

    2016-07-01

    Parylene is a Food and Drug Administration (FDA)-approved material which can be safely used within the human body and it is also offers chemically inert and flexible merits. Here, we present a flexible parylene-based organic resistive random access memory (RRAM) device suitable for wearable biomedical application. The proposed device is fabricated through standard lithography and pattern processes at room temperature, exhibiting the feasibility of integration with CMOS circuits. This organic RRAM device offers a high storage window (>10(4)), superior retention ability and immunity to disturbing. In addition, brilliant mechanical and electrical stabilities of this device are demonstrated when under harsh bending (bending cycle >500, bending radius <10 mm). Finally, the underlying mechanism for resistance switching of this kind of device is discussed, and metallic conducting filament formation and annihilation related to oxidization/redox of Al and Al anions migrating in the parylene layer can be attributed to resistance switching in this device. These advantages reveal the significant potential of parylene-based flexible RRAM devices for wearable biomedical applications. PMID:27242345

  20. Self-Testing Static Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Chau, Savio; Rennels, David

    1991-01-01

    Proposed static random-access memory for computer features improved error-detecting and -correcting capabilities. New self-testing scheme provides for detection and correction of errors at any time during normal operation - even while data being written into memory. Faults in equipment causing errors in output data detected by repeatedly testing every memory cell to determine whether it can still store both "one" and "zero", without destroying data stored in memory.

  1. Analysis of a Memory Device Failure

    NASA Technical Reports Server (NTRS)

    Nicolas, David P.; Devaney, John; Gores, Mark; Dicken, Howard

    1998-01-01

    The recent failure of a vintage memory device presented a unique challenge to failure analysts. Normally device layouts, fabrication parameters and other technical information were available to assist the analyst in the analysis. However, this device was out of production for many years and the manufacturer was no longer in business, so the information was not available. To further complicate this analysis, the package leads were all but removed making additional electrical testing difficult. Under these conditions, new and innovative methods were used to analyze the failure. The external visual exam, radiography, PIND, and leak testing were performed with nominal results. Since electrical testing was precluded by the short lead lengths, the device was delidded to expose the internal structures for microscopic examination. No failure mechanism was identified. The available electrical data suggested an ESD or low level EOS type mechanism which left no visible surface damage. Due to parallel electrical paths, electrical probing on the chip failed to locate the failure site. Two non-destructive Scanning Electron Microscopy techniques, CIVA (Charge Induced Voltage Alteration) and EBIC (Electron Beam Induced Current), and a liquid crystal decoration technique which detects localized heating were employed to aid in the analysis. CIVA and EBIC isolated two faults in the input circuitry, and the liquid crystal technique further localized two hot spots in regions on two input gates. Removal of the glassivation and metallization revealed multiple failure sites located in the gate oxide of two input transistors suggesting machine (testing) induced damage.

  2. Memory and Spin Injection Devices Involving Half Metals

    DOE PAGES

    Shaughnessy, M.; Snow, Ryan; Damewood, L.; Fong, C. Y.

    2011-01-01

    We suggest memory and spin injection devices fabricated with half-metallic materials and based on the anomalous Hall effect. Schematic diagrams of the memory chips, in thin film and bulk crystal form, are presented. Spin injection devices made in thin film form are also suggested. These devices do not need any external magnetic field but make use of their own magnetization. Only a gate voltage is needed. The carriers are 100% spin polarized. Memory devices may potentially be smaller, faster, and less volatile than existing ones, and the injection devices may be much smaller and more efficient than existing spin injectionmore » devices.« less

  3. Bacterial colonization of Hemasite access devices.

    PubMed

    Reed, W P; Moody, M R; Newman, K A; Light, P D; Costerton, J W

    1986-03-01

    Vascular access ports (Hemasites) were recovered from patients in whom they had become foci of infection and were examined according to microbiologic and morphologic techniques. All were covered on their extraluminal surfaces by well-developed biofilms consisting of host material and bacteria and their extracellular products. One Hemasite from which Staphylococcus aureus and Streptococcus faecalis were cultured was covered by a biofilm that consisted of coccoid bacterial cells and occasional fungal cells. Another Hemasite from which Proteus mirabilis was cultured was covered by a polymicrobial biofilm consisting of at least six morphologically distinct bacterial types and their extracellular products. This direct observation of the biofilm mode of bacterial growth on these devices suggests that the colonizing organisms will not be completely recovered by routine microbiologic techniques and that bacteria in the biofilm will tend to resist both host clearance mechanisms and antibiotic therapy. Removal of the device, with its accretion of bacterial biofilm, should allow the resolution of the associated infection.

  4. Memory device for two-dimensional radiant energy array computers

    NASA Technical Reports Server (NTRS)

    Schaefer, D. H.; Strong, J. P., III (Inventor)

    1977-01-01

    A memory device for two dimensional radiant energy array computers was developed, in which the memory device stores digital information in an input array of radiant energy digital signals that are characterized by ordered rows and columns. The memory device contains a radiant energy logic storing device having a pair of input surface locations for receiving a pair of separate radiant energy digital signal arrays and an output surface location adapted to transmit a radiant energy digital signal array. A regenerative feedback device that couples one of the input surface locations to the output surface location in a manner for causing regenerative feedback is also included

  5. Guide wire extension for shape memory polymer occlusion removal devices

    DOEpatents

    Maitland, Duncan J.; Small, IV, Ward; Hartman, Jonathan

    2009-11-03

    A flexible extension for a shape memory polymer occlusion removal device. A shape memory polymer instrument is transported through a vessel via a catheter. A flexible elongated unit is operatively connected to the distal end of the shape memory polymer instrument to enhance maneuverability through tortuous paths en route to the occlusion.

  6. BCH codes for large IC random-access memory systems

    NASA Technical Reports Server (NTRS)

    Lin, S.; Costello, D. J., Jr.

    1983-01-01

    In this report some shortened BCH codes for possible applications to large IC random-access memory systems are presented. These codes are given by their parity-check matrices. Encoding and decoding of these codes are discussed.

  7. Memory for Recently Accessed Visual Attributes

    ERIC Educational Resources Information Center

    Jiang, Yuhong V.; Shupe, Joshua M.; Swallow, Khena M.; Tan, Deborah H.

    2016-01-01

    Recent reports have suggested that the attended features of an item may be rapidly forgotten once they are no longer relevant for an ongoing task (attribute amnesia). This finding relies on a surprise memory procedure that places high demands on declarative memory. We used intertrial priming to examine whether the representation of an item's…

  8. The Dynamics of Access to Groups in Working Memory

    ERIC Educational Resources Information Center

    Farrell, Simon; Lelievre, Anna

    2012-01-01

    The finding that participants leave a pause between groups when attempting serial recall of temporally grouped lists has been taken to indicate access to a hierarchical representation of the list in working memory. An alternative explanation is that the dynamics of serial recall solely reflect output (rather than memorial) processes, with the…

  9. Low-power and controllable memory window in Pt/Pr0.7Ca0.3MnO3/yttria-stabilized zirconia/W resistive random-access memory devices.

    PubMed

    Liu, Xinjun; Biju, Kuyyadi P; Park, Jubong; Park, Sangsu; Shin, Jungho; Kim, Insung; Md Sadaf, Sharif; Hwang, Hyunsang

    2012-04-01

    Yttria-stabilized zirconia (YSZ) layers of various thicknesses were designed and introduced before Pr0.7Ca0.3MnO3 (PCMO) film was deposited on W bottom electrodes with a submicron via-hole structure. By changing the thickness of the YSZ barrier layer (3, 5, 9, and 13 nm), a tunable memory window can be realized while low power consumption (P(max) < 4 microW) is maintained. Resistive switching (RS) in a Pt/PCMO/YSZ/W stack with a thin YSZ layer can be ascribed to an oxidation/reduction reaction caused by a ring-type PCMO/W contact, while RS with a thick YSZ layer may be related to oxygen migration across the YSZ layer between the PCMO film and the W bottom electrode and the increase (decrease) of the effective tunnel barrier height of the YSZ layer. Excellent RS behavior characteristics, such as a large R(HRS)/R(LRS) ratio (> 10(3)), die-to-die uniformity, sweeping endurance, and a retention time of more than 10(3) s, can be obtained by optimizing the thickness of YSZ layer.

  10. Direct access inter-process shared memory

    SciTech Connect

    Brightwell, Ronald B; Pedretti, Kevin; Hudson, Trammell B

    2013-10-22

    A technique for directly sharing physical memory between processes executing on processor cores is described. The technique includes loading a plurality of processes into the physical memory for execution on a corresponding plurality of processor cores sharing the physical memory. An address space is mapped to each of the processes by populating a first entry in a top level virtual address table for each of the processes. The address space of each of the processes is cross-mapped into each of the processes by populating one or more subsequent entries of the top level virtual address table with the first entry in the top level virtual address table from other processes.

  11. Memory for recently accessed visual attributes.

    PubMed

    Jiang, Yuhong V; Shupe, Joshua M; Swallow, Khena M; Tan, Deborah H

    2016-08-01

    Recent reports have suggested that the attended features of an item may be rapidly forgotten once they are no longer relevant for an ongoing task (attribute amnesia). This finding relies on a surprise memory procedure that places high demands on declarative memory. We used intertrial priming to examine whether the representation of an item's identity is lost completely once it becomes task irrelevant. If so, then the identity of a target on one trial should not influence performance on the next trial. In 3 experiments, we replicated the finding that a target's identity is poorly recognized in a surprise memory test. However, we also observed location and identity repetition priming across consecutive trials. These data suggest that, although explicit recognition on a surprise memory test may be impaired, some information about a particular target's identity can be retained after it is no longer needed for a task. (PsycINFO Database Record

  12. Integrated semiconductor-magnetic random access memory system

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

    2001-01-01

    The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

  13. Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

    SciTech Connect

    Ando, K. Yuasa, S.; Fujita, S.; Ito, J.; Yoda, H.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.

    2014-05-07

    Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

  14. Resistive switching behavior of reduced graphene oxide memory cells for low power nonvolatile device application

    PubMed Central

    Pradhan, Sangram K.; Xiao, Bo; Mishra, Saswat; Killam, Alex; Pradhan, Aswini K.

    2016-01-01

    Graphene Oxide (GO) based low cost flexible electronics and memory cell have recently attracted more attention for the fabrication of emerging electronic devices. As a suitable candidate for resistive random access memory technology, reduced graphene oxide (RGO) can be widely used for non-volatile switching memory applications because of its large surface area, excellent scalability, retention, and endurance properties. We demonstrated that the fabricated metal/RGO/metal memory device exhibited excellent switching characteristics, with on/off ratio of two orders of magnitude and operated threshold switching voltage of less than 1 V. The studies on different cell diameter, thickness, scan voltages and period of time corroborate the reliability of the device as resistive random access memory. The microscopic origin of switching operation is governed by the establishment of conducting filaments due to the interface amorphous layer rupturing and the movement of oxygen in the GO layer. This interesting experimental finding indicates that device made up of thermally reduced GO shows more reliability for its use in next generation electronics devices. PMID:27240537

  15. Resistive switching behavior of reduced graphene oxide memory cells for low power nonvolatile device application

    NASA Astrophysics Data System (ADS)

    Pradhan, Sangram K.; Xiao, Bo; Mishra, Saswat; Killam, Alex; Pradhan, Aswini K.

    2016-05-01

    Graphene Oxide (GO) based low cost flexible electronics and memory cell have recently attracted more attention for the fabrication of emerging electronic devices. As a suitable candidate for resistive random access memory technology, reduced graphene oxide (RGO) can be widely used for non-volatile switching memory applications because of its large surface area, excellent scalability, retention, and endurance properties. We demonstrated that the fabricated metal/RGO/metal memory device exhibited excellent switching characteristics, with on/off ratio of two orders of magnitude and operated threshold switching voltage of less than 1 V. The studies on different cell diameter, thickness, scan voltages and period of time corroborate the reliability of the device as resistive random access memory. The microscopic origin of switching operation is governed by the establishment of conducting filaments due to the interface amorphous layer rupturing and the movement of oxygen in the GO layer. This interesting experimental finding indicates that device made up of thermally reduced GO shows more reliability for its use in next generation electronics devices.

  16. Resistive switching behavior of reduced graphene oxide memory cells for low power nonvolatile device application.

    PubMed

    Pradhan, Sangram K; Xiao, Bo; Mishra, Saswat; Killam, Alex; Pradhan, Aswini K

    2016-01-01

    Graphene Oxide (GO) based low cost flexible electronics and memory cell have recently attracted more attention for the fabrication of emerging electronic devices. As a suitable candidate for resistive random access memory technology, reduced graphene oxide (RGO) can be widely used for non-volatile switching memory applications because of its large surface area, excellent scalability, retention, and endurance properties. We demonstrated that the fabricated metal/RGO/metal memory device exhibited excellent switching characteristics, with on/off ratio of two orders of magnitude and operated threshold switching voltage of less than 1 V. The studies on different cell diameter, thickness, scan voltages and period of time corroborate the reliability of the device as resistive random access memory. The microscopic origin of switching operation is governed by the establishment of conducting filaments due to the interface amorphous layer rupturing and the movement of oxygen in the GO layer. This interesting experimental finding indicates that device made up of thermally reduced GO shows more reliability for its use in next generation electronics devices. PMID:27240537

  17. Nonvolatile organic transistor memory devices based on nanostructured polymeric materials

    NASA Astrophysics Data System (ADS)

    Lu, Mau-Shen; Lu, Chien; Li, Meng-Hsien; Liu, Cheng-Liang; Chen, Wen-Chang

    2014-10-01

    We report the characteristics of ferroelectric field effect transistor (FeFET) nonvolatile flash memory devices using aligned P(VDF-TrFE) electrospun nanofibers as the dielectric layer. These FeFET devices showed reliable memory behaviors and memory window proportional to the quantity of aligned nanofibers containing the ferroelectric β-phase crystalline domain. Moreover, the FeFET devices using nanofibers exhibited the long-term stability in the data retention larger than 104 s with the ON/OFF ratio of ~103, and the multiple switching operation stability up to 100 cycles.

  18. SLAC All Access: Vacuum Microwave Device Department

    ScienceCinema

    Haase, Andy

    2016-07-12

    The Vacuum Microwave Device Department (VMDD) builds the devices that make SLAC's particle accelerators go. These devices, called klystrons, generate intense waves of microwave energy that rocket subatomic particles up to nearly the speed of light.

  19. SLAC All Access: Vacuum Microwave Device Department

    SciTech Connect

    Haase, Andy

    2012-10-09

    The Vacuum Microwave Device Department (VMDD) builds the devices that make SLAC's particle accelerators go. These devices, called klystrons, generate intense waves of microwave energy that rocket subatomic particles up to nearly the speed of light.

  20. Remote Memory Access Protocol Target Node Intellectual Property

    NASA Technical Reports Server (NTRS)

    Haddad, Omar

    2013-01-01

    The MagnetoSpheric Multiscale (MMS) mission had a requirement to use the Remote Memory Access Protocol (RMAP) over its SpaceWire network. At the time, no known intellectual property (IP) cores were available for purchase. Additionally, MMS preferred to implement the RMAP functionality with control over the low-level details of the design. For example, not all the RMAP standard functionality was needed, and it was desired to implement only the portions of the RMAP protocol that were needed. RMAP functionality had been previously implemented in commercial off-the-shelf (COTS) products, but the IP core was not available for purchase. The RMAP Target IP core is a VHDL (VHSIC Hardware Description Language description of a digital logic design suitable for implementation in an FPGA (field-programmable gate array) or ASIC (application-specific integrated circuit) that parses SpaceWire packets that conform to the RMAP standard. The RMAP packet protocol allows a network host to access and control a target device using address mapping. This capability allows SpaceWire devices to be managed in a standardized way that simplifies the hardware design of the device, as well as the development of the software that controls the device. The RMAP Target IP core has some features that are unique and not specified in the RMAP standard. One such feature is the ability to automatically abort transactions if the back-end logic does not respond to read/write requests within a predefined time. When a request times out, the RMAP Target IP core automatically retracts the request and returns a command response with an appropriate status in the response packet s header. Another such feature is the ability to control the SpaceWire node or router using RMAP transactions in the extended address range. This allows the SpaceWire network host to manage the SpaceWire network elements using RMAP packets, which reduces the number of protocols that the network host needs to support.

  1. Scaling Linear Algebra Kernels using Remote Memory Access

    SciTech Connect

    Krishnan, Manoj Kumar; Lewis, Robert R.; Vishnu, Abhinav

    2010-09-13

    This paper describes the scalability of linear algebra kernels based on remote memory access approach. The current approach differs from the other linear algebra algorithms by the explicit use of shared memory and remote memory access (RMA) communication rather than message passing. It is suitable for clusters and scalable shared memory systems. The experimental results on large scale systems (Linux-Infiniband cluster, Cray XT) demonstrate consistent performance advantages over ScaLAPACK suite, the leading implementation of parallel linear algebra algorithms used today. For example, on a Cray XT4 for a matrix size of 102400, our RMA-based matrix multiplication achieved over 55 teraflops while ScaLAPACK’s pdgemm measured close to 42 teraflops on 10000 processes.

  2. Low-power resistive random access memory by confining the formation of conducting filaments

    NASA Astrophysics Data System (ADS)

    Huang, Yi-Jen; Shen, Tzu-Hsien; Lee, Lan-Hsuan; Wen, Cheng-Yen; Lee, Si-Chen

    2016-06-01

    Owing to their small physical size and low power consumption, resistive random access memory (RRAM) devices are potential for future memory and logic applications in microelectronics. In this study, a new resistive switching material structure, TiOx/silver nanoparticles/TiOx/AlTiOx, fabricated between the fluorine-doped tin oxide bottom electrode and the indium tin oxide top electrode is demonstrated. The device exhibits excellent memory performances, such as low operation voltage (<±1 V), low operation power, small variation in resistance, reliable data retention, and a large memory window. The current-voltage measurement shows that the conducting mechanism in the device at the high resistance state is via electron hopping between oxygen vacancies in the resistive switching material. When the device is switched to the low resistance state, conducting filaments are formed in the resistive switching material as a result of accumulation of oxygen vacancies. The bottom AlTiOx layer in the device structure limits the formation of conducting filaments; therefore, the current and power consumption of device operation are significantly reduced.

  3. A Cerebellar-model Associative Memory as a Generalized Random-access Memory

    NASA Technical Reports Server (NTRS)

    Kanerva, Pentti

    1989-01-01

    A versatile neural-net model is explained in terms familiar to computer scientists and engineers. It is called the sparse distributed memory, and it is a random-access memory for very long words (for patterns with thousands of bits). Its potential utility is the result of several factors: (1) a large pattern representing an object or a scene or a moment can encode a large amount of information about what it represents; (2) this information can serve as an address to the memory, and it can also serve as data; (3) the memory is noise tolerant--the information need not be exact; (4) the memory can be made arbitrarily large and hence an arbitrary amount of information can be stored in it; and (5) the architecture is inherently parallel, allowing large memories to be fast. Such memories can become important components of future computers.

  4. Feasibility of self-structured current accessed bubble devices in spacecraft recording systems

    NASA Technical Reports Server (NTRS)

    Nelson, G. L.; Krahn, D. R.; Dean, R. H.; Paul, M. C.; Lo, D. S.; Amundsen, D. L.; Stein, G. A.

    1985-01-01

    The self-structured, current aperture approach to magnetic bubble memory is described. Key results include: (1) demonstration that self-structured bubbles (a lattice of strongly interacting bubbles) will slip by one another in a storage loop at spacings of 2.5 bubble diameters, (2) the ability of self-structured bubbles to move past international fabrication defects (missing apertures) in the propagation conductors (defeat tolerance), and (3) moving bubbles at mobility limited speeds. Milled barriers in the epitaxial garnet are discussed for containment of the bubble lattice. Experimental work on input/output tracks, storage loops, gates, generators, and magneto-resistive detectors for a prototype device are discussed. Potential final device architectures are described with modeling of power consumption, data rates, and access times. Appendices compare the self-structured bubble memory from the device and system perspectives with other non-volatile memory technologies.

  5. Viable chemical approach for patterning nanoscale magnetoresistive random access memory

    SciTech Connect

    Kim, Taeseung; Kim, Younghee; Chen, Jack Kun-Chieh; Chang, Jane P.

    2015-03-15

    A reactive ion etching process with alternating Cl{sub 2} and H{sub 2} exposures has been shown to chemically etch CoFe film that is an integral component in magnetoresistive random access memory (MRAM). Starting with systematic thermodynamic calculations assessing various chemistries and reaction pathways leading to the highest possible vapor pressure of the etch products reactions, the potential chemical combinations were verified by etch rate investigation and surface chemistry analysis in plasma treated CoFe films. An ∼20% enhancement in etch rate was observed with the alternating use of Cl{sub 2} and H{sub 2} plasmas, in comparison with the use of only Cl{sub 2} plasma. This chemical combination was effective in removing metal chloride layers, thus maintaining the desired magnetic properties of the CoFe films. Scanning electron microscopy equipped with energy-dispersive x-ray spectroscopy showed visually and spectroscopically that the metal chloride layers generated by Cl{sub 2} plasma were eliminated with H{sub 2} plasma to yield a clean etch profile. This work suggests that the selected chemistries can be used to etch magnetic metal alloys with a smooth etch profile and this general strategy can be applied to design chemically based etch processes to enable the fabrication of highly integrated nanoscale MRAM devices.

  6. 21 CFR 876.5540 - Blood access device and accessories.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... provide access to a patient's blood for hemodialysis or other chronic uses. When used in hemodialysis, it... conditions and provides access to a patient's blood for hemodialysis. The device includes implanted blood... 30 days. This generic type of device includes fistula needles, the single needle dialysis...

  7. Design of hybrid spintronic devices at scaled technologies for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Mojumder, Niladri Narayan

    The ever-increasing demand for embedding more on- and off-chip memories to increase the bandwidth of high performance systems has led to a significant amount of research directed towards several potential high density memory technologies. With aggressive technology scaling, the researchers are incessantly confronted with various overwhelming challenges associated with the design of low power, ultra-high density and robust memory blocks. An alternative to all currently available memory technologies, spin-transfer torque (STT) Magnetic Random Access Memories (MRAM) offer many desirable memory-attributes. Data non-volatility, unlimited endurance, low power, high performance and high integration capabilities have stimulated an overwhelming interest for STT-MRAM among memory researchers. In an attempt to address the issues associated with parametric process variations and high switching energy consumptions, different genres of magnetic tunnel junction (MTJ) structures, memory bit-cells, and architecture are proposed. Unlike state-of-the-art tri-layer MTJ devices, the multi-port/multi-pillar structures provide the option to eliminate the self-conflicting design requirements for memory read, write and hold. Techniques to reduce thermal fluctuation induced delay spreads is discussed for reliable and deterministic magnetic switching characteristics in both in-plane and perpendicular anisotropy devices. The effect of thermal spin-transfer torque on high speed magnetic switching is discussed in the context of designing low power, robust, and reliable MRAM devices. Based on thermally initiated magnonic spin-transfer torque, we propose three new genres of multi-port MRAMs for low energy, high speed, and reliable magnetic switching. The proposition of several new genres of magnetic tunnel junctions (MTJ) based on both electric and thermal spin-transfer torque, the corresponding bit-cells, and memory architectures make STT-MRAM a promising choice as future universal memories.

  8. Novel nano materials for high performance logic and memory devices

    NASA Astrophysics Data System (ADS)

    Das, Saptarshi

    mobility with the layer thickness. The non-monotonic trend suggests that in order to harvest the maximum potential of MoS2 for high performance device applications, a layer thickness in the range of 6-12 nm would be ideal. Finally using scandium contacts on 10nm thick exfoliated MoS2 flakes that are covered by a 15nm ALD grown Al2O3 film, record high mobility of 700cm2/Vs is achieved at room-temperature which is extremely encouraging for the design of high performance logic devices. The destructive nature of the readout process in Ferroelectric Random Access Memories (FeRAMs) is one of the major limiting factors for their wide scale commercialization. Utilizing Ferroelectric Field-Effect Transistor RAM (FeTRAM) instead solves the destructive read out problem, but at the expense of introducing crystalline ferroelectrics that are hard to integrate into CMOS. In order to address these challenges a novel, fully functional, CMOS compatible, One-Transistor-One-Transistor (1T1T) memory cell architecture using an organic ferroelectric -- PVDF-TrFE -- as the memory storage unit (gate oxide) and a silicon nanowire as the memory read out unit (channel material) is proposed and experimentally demonstrated. While evaluating the scaling potential of the above mentioned organic FeTRAM, it is found that the switching time and switching voltage of this organic copolymer PVDF-TrFE exhibits an unexpected scaling behavior as a function of the lateral device dimensions. The phenomenological theory, that explains this abnormal scaling trend, involves in-plane interchain and intrachain interaction of the copolymer - resulting in a power-law dependence of the switching field on the device area (ESW alpha ACH0.1) that is ultimately responsible for the decrease in the switching time and switching voltage. These findings are encouraging since they indicate that scaling the switching voltage and switching time without aggressively scaling the copolymer thickness occurs naturally while scaling the

  9. Normally-off type nonvolatile static random access memory with perpendicular spin torque transfer-magnetic random access memory cells and smallest number of transistors

    NASA Astrophysics Data System (ADS)

    Tanaka, Chika; Abe, Keiko; Noguchi, Hiroki; Nomura, Kumiko; Ikegami, Kazutaka; Fujita, Shinobu

    2014-01-01

    In this paper, we present a novel nonvolatile-random access memory (RAM) cell design based on a “normally-off memory architecture” using a perpendicular spin torque transfer-magnetic random access memory (STT-MRAM) based on a four-transistors static random access memory (SRAM) in order to reduce the operating power of mobile processors. After the cell design concept and basic operation are proposed, a stable and reliable operation for read/write is confirmed by circuit simulation.

  10. Direct memory access transfer completion notification

    DOEpatents

    Archer, Charles J.; Blocksome, Michael A.; Parker, Jeffrey J.

    2011-02-15

    DMA transfer completion notification includes: inserting, by an origin DMA engine on an origin node in an injection first-in-first-out (`FIFO`) buffer, a data descriptor for an application message to be transferred to a target node on behalf of an application on the origin node; inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the message, the completion notification descriptor specifying a packet header for a completion notification packet; transferring, by the origin DMA engine to the target node, the message in dependence upon the data descriptor; sending, by the origin DMA engine, the completion notification packet to a local reception FIFO buffer using a local memory FIFO transfer operation; and notifying, by the origin DMA engine, the application that transfer of the message is complete in response to receiving the completion notification packet in the local reception FIFO buffer.

  11. Coding with Side Information for Radiation-Tolerant Memory Devices

    NASA Astrophysics Data System (ADS)

    Hwang, E.; Jeon, S.; Negi, R.; Vijaya Kumar, B. V. K.; Cheng, M. K.

    2011-11-01

    Memory devices aboard spacecraft experience radiation-induced errors either in the form of temporary upsets (soft errors) or permanent defects (hard or stuck-at errors). Error-correcting codes (ECCs) are used to recover memory content from errors where defective cells are either regarded as erasures by the decoder or entire blocks containing defective cells are marked as unusable. In this article, alternative coding schemes are investigated for memory devices in space, where the encoder is provided with the locations of the defective cells, denoted by side information. This coding approach has the potential to improve the overall storage capacity of memory devices, since the information theoretic capacity of a channel where side information is only available at the encoder is the same as the capacity where side information is available at both the encoder and decoder. Spacecraft memory controllers typically scrub memory devices periodically for errors. Partial side information can be obtained during this scrubbing process by comparing the ECC decoder output with its input and thereby avoid the need for additional cell tests or storage overhead. In between scrubbings, the encoder can use this partial side information to account for permanent defects to improve reliability or to increase the storage capacity of onboard memory devices. In order to achieve performance gains for practical memory systems, several coding schemes that adaptively incorporate the codeword with the known side information are proposed in this article. The proposed coding schemes are evaluated by numerical simulations on a memory channel model characterized by soft and hard errors. Simulation results show that while coding with complete side information at the encoder offers the most performance gain compared to when coding without side information is used, coding with partial side information can close the gap between the optimal and current approach without incurring much additional overhead

  12. Direct memory access digital events analyzer

    NASA Astrophysics Data System (ADS)

    Basano, L.; Ottonello, P.

    1989-06-01

    We present a random-point-process multifunction analyzer in which a long sequence of interpulse intervals are recorded in the RAM bank of a personal computer, through a suitably designed front end attached to a commercial DMA interface. Laser light scattered by ground-glass disks and by aqueous suspensions of polystyrene latex spheres has been used to test the performance of the device that may be employed in a broad range of applications.

  13. Transistor-level characterization of static random access memory bit failures induced by random telegraph noise

    NASA Astrophysics Data System (ADS)

    Mizutani, Tomoko; Saraya, Takuya; Takeuchi, Kiyoshi; Kobayashi, Masaharu; Hiramoto, Toshiro

    2016-04-01

    Bit failure events induced by random telegraph noise (RTN) for silicon-on-thin-buried-oxide (SOTB) static random access memory (SRAM) cells were characterized by directly monitoring the storage node voltage of individual cells, using a device-matrix-array (DMA) test element group (TEG). Correlating the cell-level RTN and failure waveforms with the RTN waveforms of individual transistors that constitute the same cell, RTN of a specific transistor that causes the cell failure was identified.

  14. Organic memory device with polyaniline nanoparticles embedded as charging elements

    NASA Astrophysics Data System (ADS)

    Kim, Yo-Han; Kim, Minkeun; Oh, Sewook; Jung, Hunsang; Kim, Yejin; Yoon, Tae-Sik; Kim, Yong-Sang; Ho Lee, Hyun

    2012-04-01

    Polyaniline nanoparticles (PANI NPs) were synthesized and fabricated as charging elements for organic memory devices. The PANI NPs charging layer was self-assembled by epoxy-amine bonds between 3-glycidylpropyl trimethoxysilane functionalized dielectrics and PANI NPs. A memory window of 5.8 V (ΔVFB) represented by capacitance-voltage hysteresis was obtained for metal-pentacene-insulator-silicon capacitor. In addition, program/erase operations controlled by gate bias (-/+90 V) were demonstrated in the PANI NPs embedded pentacene thin film transistor device with polyvinylalcohol dielectric on flexible polyimide substrate. These results can be extended to development of fully organic-based electronic device.

  15. Quantifying Locality in the Memory Access Patterns of HPCApplications

    SciTech Connect

    Weinberg, Jonathan; Snavely, Allan; McCracken, Michael O.; Strohmaier, Erich

    2005-07-25

    Several benchmarks for measuring memory performance of HPC systems along dimensions of spatial and temporal memory locality have recently been proposed. However, little is understood about the relationships of these benchmarks to real applications and to each other. In this paper, we propose a methodology for producing architecture-neutral characterizations of the spatial and temporal locality exhibited by the memory access patterns of applications. We demonstrate that the results track intuitive notions of spatial and temporal locality on several synthetic and application benchmarks. We employ the methodology to analyze the memory performance components of the HPC Challenge Benchmarks, the Apex-MAP benchmark, and their relationships to each other and other benchmarks and applications. We show that this analysis can be used to both increase understanding of the benchmarks and enhance their usefulness by mapping them, along with applications, to a 2-D space along axes of spatial and temporal locality.

  16. High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

    PubMed Central

    Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

    2011-01-01

    The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527

  17. Novel nano materials for high performance logic and memory devices

    NASA Astrophysics Data System (ADS)

    Das, Saptarshi

    mobility with the layer thickness. The non-monotonic trend suggests that in order to harvest the maximum potential of MoS2 for high performance device applications, a layer thickness in the range of 6-12 nm would be ideal. Finally using scandium contacts on 10nm thick exfoliated MoS2 flakes that are covered by a 15nm ALD grown Al2O3 film, record high mobility of 700cm2/Vs is achieved at room-temperature which is extremely encouraging for the design of high performance logic devices. The destructive nature of the readout process in Ferroelectric Random Access Memories (FeRAMs) is one of the major limiting factors for their wide scale commercialization. Utilizing Ferroelectric Field-Effect Transistor RAM (FeTRAM) instead solves the destructive read out problem, but at the expense of introducing crystalline ferroelectrics that are hard to integrate into CMOS. In order to address these challenges a novel, fully functional, CMOS compatible, One-Transistor-One-Transistor (1T1T) memory cell architecture using an organic ferroelectric -- PVDF-TrFE -- as the memory storage unit (gate oxide) and a silicon nanowire as the memory read out unit (channel material) is proposed and experimentally demonstrated. While evaluating the scaling potential of the above mentioned organic FeTRAM, it is found that the switching time and switching voltage of this organic copolymer PVDF-TrFE exhibits an unexpected scaling behavior as a function of the lateral device dimensions. The phenomenological theory, that explains this abnormal scaling trend, involves in-plane interchain and intrachain interaction of the copolymer - resulting in a power-law dependence of the switching field on the device area (ESW alpha ACH0.1) that is ultimately responsible for the decrease in the switching time and switching voltage. These findings are encouraging since they indicate that scaling the switching voltage and switching time without aggressively scaling the copolymer thickness occurs naturally while scaling the

  18. Dual operation characteristics of resistance random access memory in indium-gallium-zinc-oxide thin film transistors

    NASA Astrophysics Data System (ADS)

    Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Chun; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.

    2014-04-01

    In this study, indium-gallium-zinc-oxide thin film transistors can be operated either as transistors or resistance random access memory devices. Before the forming process, current-voltage curve transfer characteristics are observed, and resistance switching characteristics are measured after a forming process. These resistance switching characteristics exhibit two behaviors, and are dominated by different mechanisms. The mode 1 resistance switching behavior is due to oxygen vacancies, while mode 2 is dominated by the formation of an oxygen-rich layer. Furthermore, an easy approach is proposed to reduce power consumption when using these resistance random access memory devices with the amorphous indium-gallium-zinc-oxide thin film transistor.

  19. Dual operation characteristics of resistance random access memory in indium-gallium-zinc-oxide thin film transistors

    SciTech Connect

    Yang, Jyun-Bao; Chen, Yu-Ting; Chu, Ann-Kuo; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Chun; Tseng, Hsueh-Chih; Sze, Simon M.

    2014-04-14

    In this study, indium-gallium-zinc-oxide thin film transistors can be operated either as transistors or resistance random access memory devices. Before the forming process, current-voltage curve transfer characteristics are observed, and resistance switching characteristics are measured after a forming process. These resistance switching characteristics exhibit two behaviors, and are dominated by different mechanisms. The mode 1 resistance switching behavior is due to oxygen vacancies, while mode 2 is dominated by the formation of an oxygen-rich layer. Furthermore, an easy approach is proposed to reduce power consumption when using these resistance random access memory devices with the amorphous indium-gallium-zinc-oxide thin film transistor.

  20. Titanium oxide nonvolatile memory device and its application

    NASA Astrophysics Data System (ADS)

    Wang, Wei

    In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be

  1. Integrated, nonvolatile, high-speed analog random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

    1994-01-01

    This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

  2. Magnet/Hall-Effect Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

    1991-01-01

    In proposed magnet/Hall-effect random-access memory (MHRAM), bits of data stored magnetically in Perm-alloy (or equivalent)-film memory elements and read out by using Hall-effect sensors to detect magnetization. Value of each bit represented by polarity of magnetization. Retains data for indefinite time or until data rewritten. Speed of Hall-effect sensors in MHRAM results in readout times of about 100 nanoseconds. Other characteristics include high immunity to ionizing radiation and storage densities of order 10(Sup6)bits/cm(Sup 2) or more.

  3. One electron-controlled multiple-valued dynamic random-access-memory

    NASA Astrophysics Data System (ADS)

    Kye, H. W.; Song, B. N.; Lee, S. E.; Kim, J. S.; Shin, S. J.; Choi, J. B.; Yu, Y.-S.; Takahashi, Y.

    2016-02-01

    We propose a new architecture for a dynamic random-access-memory (DRAM) capable of storing multiple values by using a single-electron transistor (SET). The gate of a SET is designed to be connected to a plurality of DRAM unit cells that are arrayed at intersections of word lines and bitlines. In this SET-DRAM hybrid scheme, the multiple switching characteristics of SET enables multiple value data stored in a DRAM unit cell, and this increases the storage functionality of the device. Moreover, since refreshing data requires only a small amount of SET driving current, this enables device operating with low standby power consumption.

  4. Paging memory from random access memory to backing storage in a parallel computer

    DOEpatents

    Archer, Charles J; Blocksome, Michael A; Inglett, Todd A; Ratterman, Joseph D; Smith, Brian E

    2013-05-21

    Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node.

  5. Performance Evaluation of Remote Memory Access (RMA) Programming on Shared Memory Parallel Computers

    NASA Technical Reports Server (NTRS)

    Jin, Hao-Qiang; Jost, Gabriele; Biegel, Bryan A. (Technical Monitor)

    2002-01-01

    The purpose of this study is to evaluate the feasibility of remote memory access (RMA) programming on shared memory parallel computers. We discuss different RMA based implementations of selected CFD application benchmark kernels and compare them to corresponding message passing based codes. For the message-passing implementation we use MPI point-to-point and global communication routines. For the RMA based approach we consider two different libraries supporting this programming model. One is a shared memory parallelization library (SMPlib) developed at NASA Ames, the other is the MPI-2 extensions to the MPI Standard. We give timing comparisons for the different implementation strategies and discuss the performance.

  6. 75 FR 14467 - In the Matter of: Certain Dynamic Random Access Memory Semiconductors and Products Containing...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-03-25

    ... COMMISSION In the Matter of: Certain Dynamic Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of Investigation AGENCY: U.S. International Trade Commission. ACTION... random access memory semiconductors and products containing same, including memory modules, by reason...

  7. Pattern recognition with magnonic holographic memory device

    SciTech Connect

    Kozhevnikov, A.; Dudko, G.; Filimonov, Y.; Gertz, F.; Khitun, A.

    2015-04-06

    In this work, we present experimental data demonstrating the possibility of using magnonic holographic devices for pattern recognition. The prototype eight-terminal device consists of a magnetic matrix with micro-antennas placed on the periphery of the matrix to excite and detect spin waves. The principle of operation is based on the effect of spin wave interference, which is similar to the operation of optical holographic devices. Input information is encoded in the phases of the spin waves generated on the edges of the magnonic matrix, while the output corresponds to the amplitude of the inductive voltage produced by the interfering spin waves on the other side of the matrix. The level of the output voltage depends on the combination of the input phases as well as on the internal structure of the magnonic matrix. Experimental data collected for several magnonic matrixes show the unique output signatures in which maxima and minima correspond to specific input phase patterns. Potentially, magnonic holographic devices may provide a higher storage density compare to optical counterparts due to a shorter wavelength and compatibility with conventional electronic devices. The challenges and shortcoming of the magnonic holographic devices are also discussed.

  8. Design of a Multi-Level/Analog Ferroelectric Memory Device

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2006-01-01

    Increasing the memory density and utilizing the dove1 characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used as a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

  9. Phase-change Random Access Memory: A Scalable Technology

    SciTech Connect

    Raoux, S.; Burr, G; Breitwisch, M; Rettner, C; Chen, Y; Shelby, R; Salinga, M; Krebs, D; Chen, S; Lung, H

    2008-01-01

    Nonvolatile RAM using resistance contrast in phase-change materials [or phase-change RAM (PCRAM)] is a promising technology for future storage-class memory. However, such a technology can succeed only if it can scale smaller in size, given the increasingly tiny memory cells that are projected for future technology nodes (i.e., generations). We first discuss the critical aspects that may affect the scaling of PCRAM, including materials properties, power consumption during programming and read operations, thermal cross-talk between memory cells, and failure mechanisms. We then discuss experiments that directly address the scaling properties of the phase-change materials themselves, including studies of phase transitions in both nanoparticles and ultrathin films as a function of particle size and film thickness. This work in materials directly motivated the successful creation of a series of prototype PCRAM devices, which have been fabricated and tested at phase-change material cross-sections with extremely small dimensions as low as 3 nm x 20 nm. These device measurements provide a clear demonstration of the excellent scaling potential offered by this technology, and they are also consistent with the scaling behavior predicted by extensive device simulations. Finally, we discuss issues of device integration and cell design, manufacturability, and reliability.

  10. A current access, self-structured, multilayered bubble domain memory

    NASA Technical Reports Server (NTRS)

    Stermer, R. L., Jr.; Kamin, M.; Tolman, C. H.; Torok, E. J.

    1980-01-01

    Preliminary experimental results are reported on a self-structured, multilayer bubble memory with buried data layer. Stripe domains are used to move carrier bubbles by magnetostatic coupling. An expression is derived for that coupling as a function of thickness of the GGG separation layer. Experimental values of coupling are given as a function of bias field. An expression for stripe curvature as a function of bias field is derived. The performance of seven different current access stripe propagation circuits is reported.

  11. Nonvolatile GaAs Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan

    1994-01-01

    Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.

  12. Ultrathin flexible memory devices based on organic ferroelectric transistors

    NASA Astrophysics Data System (ADS)

    Sugano, Ryo; Hirai, Yoshinori; Tashiro, Tomoya; Sekine, Tomohito; Fukuda, Kenjiro; Kumaki, Daisuke; Domingues dos Santos, Fabrice; Miyabo, Atsushi; Tokito, Shizuo

    2016-10-01

    Here, we demonstrate ultrathin, flexible nonvolatile memory devices with excellent durability under compressive strain. Ferroelectric-gate field-effect transistors (FeFETs) employing organic semiconductor and polymer ferroelectric layers are fabricated on a 1-µm-thick plastic film substrate. The FeFETs are characterized by measuring their transfer characteristics, programming time, and data retention time. The data retention time is almost unchanged even when a 50% compressive strain is applied to the devices. To clarify the origin of the excellent durability of the devices against compressive strain, an intermediate plane is calculated. From the calculation result, the intermediate plane is placed close to the channel region of the FeFETs. The high flexibility of the ferroelectric polymer and ultrathin device structure contributes to achieving a bending radius of 0.8 µm without the degradation of memory characteristics.

  13. If memory serves, will language? Later verbal accessibility of early memories.

    PubMed

    Bauer, P J; Kroupina, M G; Schwade, J A; Dropik, P L; Wewerka, S S

    1998-01-01

    Of major interest to those concerned with early mnemonic process and function is the question of whether early memories likely encoded without the benefit of language later are accessible to verbal report. In the context of a controlled laboratory study, we examined this question in children who were 16 and 20 months at the time of exposure to specific target events and who subsequently were tested for their memories of the events after a delay of either 6 or 12 months (at 22-32 months) and then again at 3 years. At the first delayed-recall test, children evidenced memory both nonverbally and verbally. Nonverbal mnemonic expression was related to age at the time of test; verbal mnemonic expression was related to verbal fluency at the time of test. At the second delayed-recall test, children evidenced continued accessibility of their early memories. Verbal mnemonic expression was related to previous mnemonic expression, both nonverbal and verbal, each of which contributed unique variance. The relevance of these findings on memory for controlled laboratory events for issues of memory for traumatic experiences is discussed. PMID:9886220

  14. Self-assembled tin dioxide for forming-free resistive random-access memory application

    NASA Astrophysics Data System (ADS)

    Hong, Ying-Jhan; Wang, Tsang-Hsuan; Wei, Shih-Yuan; Chang, Pin; Yew, Tri-Rung

    2016-06-01

    A novel resistive switching structure, tin-doped indium oxide (ITO)/SnO2- x (defined as SnO2 with oxygen vacancies)/SnS was demonstrated with a set voltage of 0.38 V, a reset voltage of -0.15 V, a ratio of high resistance to low resistance of 544, and forming-free and nonlinear current-voltage (I-V) characteristics. The interface of the ITO and the self-assembled SnO2- x contributed to the resistive switching behavior. This device showed great potential for resistive random access memory (RRAM) application and solving the sneak path problem in cross-bar memory arrays. Furthermore, a nanostructured resistive switching device was demonstrated successfully.

  15. Automatic memory management policies for low power, memory limited, and delay intolerant devices

    NASA Astrophysics Data System (ADS)

    Jahid, Md. Abu

    Mobile devices such as smartphones and tablets are energy and memory limited, and implement graphical user interfaces that are intolerant of computational delays. Mobile device platforms supporting apps implemented in languages that require automatic memory management, such as the Dalvik (Java) virtual machine within Google's Android, have become dominant. It is essential that automatic memory management avoid causing unacceptable interface delays while responsibly managing energy and memory resource usage. Dalvik's automatic memory management policies for heap growth and garbage collection scheduling utilize heuristics tuned to minimize memory footprint. These policies result in only marginally acceptable response times and garbage collection signicantly contributes to apps' CPU time and therefore energy consumption. The primary contributions of this research include a characterization of Dalvik's "baseline" automatic memory management policy, the development of a new "adaptive" policy, and an investigation of the performance of this policy. The investigation indicates that this adaptive policy consumes less CPU time and improves interactive performance at the cost of increasing memory footprint size by an acceptable amount.

  16. Capacitance-voltage measurement in memory devices using ferroelectric polymer

    NASA Astrophysics Data System (ADS)

    Nguyen, Chien A.; Lee, Pooi See

    2006-01-01

    Application of thin polymer film as storing mean for non-volatile memory devices is investigated. Capacitance-voltage (C-V) measurement of metal-ferroelectric-metal device using ferroelectric copolymer P(VDF-TrFE) as dielectric layer shows stable 'butter-fly' curve. The two peaks in C-V measurement corresponding to the largest capacitance are coincidental at the coercive voltages that give rise to zero polarization in the polarization hysteresis measurement. By comparing data of C-V and P-E measurement, a correlation between two types of hysteresis is established in which it reveals simultaneous electrical processes occurring inside the device. These processes are caused by the response of irreversible and reversible polarization to the applied electric field that can be used to present a memory window. The memory effect of ferroelectric copolymer is further demonstrated for fabricating polymeric non-volatile memory devices using metal-ferroelectric-insulator-semiconductor structure (MFIS). By applying different sweeping voltages at the gate, bidirectional flat-band voltage shift is observed in the ferroelectric capacitor. The asymmetrical shift after negative sweeping is resulted from charge accumulation at the surface of Si substrate caused by the dipole direction in the polymer layer. The effect is reversed for positive voltage sweeping.

  17. 77 FR 36951 - Gastroenterology-Urology Devices; Reclassification of Implanted Blood Access Devices

    Federal Register 2010, 2011, 2012, 2013, 2014

    2012-06-20

    ... the Device In the preamble to the proposed rule (46 FR 7616, January 23, 1981), the Gastroenterology... devices into class II (48 FR 53012, November 23, 1983). In 1987, FDA published a clarification by... requirement for premarket approval for implanted blood access devices (52 FR 17732 at 17738, May 11, 1987)....

  18. Camera memory study for large space telescope. [charge coupled devices

    NASA Technical Reports Server (NTRS)

    Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.

    1975-01-01

    Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

  19. Micro devices using shape memory polymer patches for mated connections

    DOEpatents

    Lee, Abraham P.; Fitch, Joseph P.

    2000-01-01

    A method and micro device for repositioning or retrieving miniature devices located in inaccessible areas, such as medical devices (e.g., stents, embolic coils, etc.) located in a blood vessel. The micro repositioning or retrieving device and method uses shape memory polymer (SMP) patches formed into mating geometries (e.g., a hoop and a hook) for re-attachment of the deposited medical device to a catheter or guidewire. For example, SMP or other material hoops are formed on the medical device to be deposited in a blood vessel, and SMP hooks are formed on the micro device attached to a guidewire, whereby the hooks on the micro device attach to the hoops on the medical device, or vice versa, enabling deposition, movement, re-deposit, or retrieval of the medical device. By changing the temperature of the SMP hooks, the hooks can be attached to or released from the hoops located on the medical device. An exemplary method for forming the hooks and hoops involves depositing a sacrificial thin film on a substrate, patterning and processing the thin film to form openings therethrough, depositing or bonding SMP materials in the openings so as to be attached to the substrate, and removing the sacrificial thin film.

  20. Computational design of digital and memory biological devices

    PubMed Central

    Rodrigo, Guillermo

    2008-01-01

    The use of combinatorial optimization techniques with computational design allows the development of automated methods to design biological systems. Automatic design integrates design principles in an unsupervised algorithm to sample a larger region of the biological network space, at the topology and parameter levels. The design of novel synthetic transcriptional networks with targeted behaviors will be key to understand the design principles underlying biological networks. In this work, we evolve transcriptional networks towards a targeted dynamics, by using a library of promoters and coding sequences, to design a complex biological memory device. The designed sequential transcription network implements a JK-Latch, which is fully predictable and richer than other memory devices. Furthermore, we present designs of transcriptional devices behaving as logic gates, and we show how to create digital behavior from analog promoters. Our procedure allows us to propose a scenario for the evolution of multi-functional genetic networks. In addition, we discuss the decomposability of regulatory networks in terms of genetic modules to develop a given cellular function. Summary. We show how to use an automated procedure to design logic and sequential transcription circuits. This methodology will allow advancing the rational design of biological devices to more complex systems, and we propose the first design of a biological JK-latch memory device. Electronic supplementary material The online version of this article (doi:10.1007/s11693-008-9017-0) contains supplementary material, which is available to authorized users. PMID:19003443

  1. Multilevel conductance switching of memory device through photoelectric effect.

    PubMed

    Ye, Changqing; Peng, Qian; Li, Mingzhu; Luo, Jia; Tang, Zhengming; Pei, Jian; Chen, Jianming; Shuai, Zhigang; Jiang, Lei; Song, Yanlin

    2012-12-12

    A photoelectronic switch of a multilevel memory device has been achieved using a meta-conjugated donor-bridge-acceptor (DBA) molecule. Such a DBA optoelectronic molecule responds to both the optical and electrical stimuli. The device exhibits good electrical bistable switching behaviors under dark, with a large ON/OFF ratio more than 10(6). In cooperation with the UV light, photoelectronic ternary states are addressable in a bistable switching system. On the basis of the CV measurement, charge carriers transport modeling, quantum chemical calculation, and absorption spectra analysis, the mechanism of the DBA memory is suggested to be attributed to the substep charge transfer transition process. The capability of tailoring photoelectrical properties is a very promising strategy to explore the multilevel storage, and it will give a new opportunity for designing multifunctional devices.

  2. Bioorganic nanodots for non-volatile memory devices

    SciTech Connect

    Amdursky, Nadav; Shalev, Gil; Handelman, Amir; Natan, Amir; Rosenwaks, Yossi; Litsyn, Simon; Szwarcman, Daniel; Rosenman, Gil; Roizin, Yakov

    2013-12-01

    In recent years we are witnessing an intensive integration of bio-organic nanomaterials in electronic devices. Here we show that the diphenylalanine bio-molecule can self-assemble into tiny peptide nanodots (PNDs) of ∼2 nm size, and can be embedded into metal-oxide-semiconductor devices as charge storage nanounits in non-volatile memory. For that purpose, we first directly observe the crystallinity of a single PND by electron microscopy. We use these nanocrystalline PNDs units for the formation of a dense monolayer on SiO{sub 2} surface, and study the electron/hole trapping mechanisms and charge retention ability of the monolayer, followed by fabrication of PND-based memory cell device.

  3. Photoresponsive memory device based on Graphene/Boron Nitride heterostructure

    NASA Astrophysics Data System (ADS)

    Kahn, Salman; Velasco, Jairo, Jr.; Ju, Long; Wong, Dillon; Lee, Juwon; Tsai, Hsin Zon; Taniguchi, Takashi; Watanabe, Kenji; Zettl, Alex; Wang, Feng; Crommie, Michael

    2015-03-01

    Recent technological advancements have allowed the stacking of two dimensional layered material in order to create van der Waals heterostructures (VDH), enabling the design of novel properties by exploiting the proximal interaction between layers with different electronic properties. We report the creation of an optoelectronic memory device using a Graphene/Boron Nitride (hBN) heterostructure. Using the photo-induced doping phenomenon, we are able to spatially ``write'' a doping profile on graphene and ``read'' the profile through electrical transport and local probe techniques. We then utilize defect engineering to enhance the optoelectronic response of graphene and explore the effect of defects in hBN. Our work introduces a simple device architecture to create an optoelectronic memory device and contributes towards understanding the proximal effects of hBN on Graphene.

  4. High-performance bilayer flexible resistive random access memory based on low-temperature thermal atomic layer deposition

    PubMed Central

    2013-01-01

    We demonstrated a flexible resistive random access memory device through a low-temperature atomic layer deposition process. The device is composed of an HfO2/Al2O3-based functional stack on an indium tin oxide-coated polyethylene terephthalate substrate. After the initial reset operation, the device exhibits a typical bipolar, reliable, and reproducible resistive switching behavior. After a 104-s retention time, the memory window of the device is still in accordance with excellent thermal stability, and a 10-year usage is still possible with the resistance ratio larger than 10 at room temperature and at 85°C. In addition, the operation speed of the device was estimated to be 500 ns for the reset operation and 800 ns for the set operation, which is fast enough for the usage of the memories in flexible circuits. Considering the excellent performance of the device fabricated by low-temperature atomic layer deposition, the process may promote the potential applications of oxide-based resistive random access memory in flexible integrated circuits. PMID:23421424

  5. Improving Memory Characteristics of Hydrogenated Nanocrystalline Silicon Germanium Nonvolatile Memory Devices by Controlling Germanium Contents.

    PubMed

    Kim, Jiwoong; Jang, Kyungsoo; Phu, Nguyen Thi Cam; Trinh, Thanh Thuy; Raja, Jayapal; Kim, Taeyong; Cho, Jaehyun; Kim, Sangho; Park, Jinjoo; Jung, Junhee; Lee, Youn-Jung; Yi, Junsin

    2016-05-01

    Nonvolatile memory (NVM) with silicon dioxide/silicon nitride/silicon oxynitride (ONO(n)) charge trap structure is a promising flash memory technology duo that will fulfill process compatibility for system-on-panel displays, down-scaling cell size and low operation voltage. In this research, charge trap flash devices were fabricated with ONO(n) stack gate insulators and an active layer using hydrogenated nanocrystalline silicon germanium (nc-SiGe:H) films at a low temperature. In this study, the effect of the interface trap density on the performance of devices, including memory window and retention, was investigated. The electrical characteristics of NVM devices were studied controlling Ge content from 0% to 28% in the nc-SiGe:H channel layer. The optimal Ge content in the channel layer was found to be around 16%. For nc-SiGe:H NVM with 16% Ge content, the memory window was 3.13 V and the retention data exceeded 77% after 10 years under the programming condition of 15 V for 1 msec. This showed that the memory window increased by 42% and the retention increased by 12% compared to the nc-Si:H NVM that does not contain Ge. However, when the Ge content was more than 16%, the memory window and retention property decreased. Finally, this research showed that the Ge content has an effect on the interface trap density and this enabled us to determine the optimal Ge content. PMID:27483856

  6. Some Improvements in Utilization of Flash Memory Devices

    NASA Technical Reports Server (NTRS)

    Gender, Thomas K.; Chow, James; Ott, William E.

    2009-01-01

    Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.

  7. Complex dynamics of semantic memory access in reading.

    PubMed

    Baggio, Giosué; Fonseca, André

    2012-02-01

    Understanding a word in context relies on a cascade of perceptual and conceptual processes, starting with modality-specific input decoding, and leading to the unification of the word's meaning into a discourse model. One critical cognitive event, turning a sensory stimulus into a meaningful linguistic sign, is the access of a semantic representation from memory. Little is known about the changes that activating a word's meaning brings about in cortical dynamics. We recorded the electroencephalogram (EEG) while participants read sentences that could contain a contextually unexpected word, such as 'cold' in 'In July it is very cold outside'. We reconstructed trajectories in phase space from single-trial EEG time series, and we applied three nonlinear measures of predictability and complexity to each side of the semantic access boundary, estimated as the onset time of the N400 effect evoked by critical words. Relative to controls, unexpected words were associated with larger prediction errors preceding the onset of the N400. Accessing the meaning of such words produced a phase transition to lower entropy states, in which cortical processing becomes more predictable and more regular. Our study sheds new light on the dynamics of information flow through interfaces between sensory and memory systems during language processing.

  8. Adjustable built-in resistor on oxygen-vacancy-rich electrode-capped resistance random access memory

    NASA Astrophysics Data System (ADS)

    Pan, Chih-Hung; Chang, Ting-Chang; Tsai, Tsung-Ming; Chang, Kuan-Chang; Chu, Tian-Jian; Chen, Po-Hsun; Chen, Min-Chen; Sze, Simon M.

    2016-10-01

    In this study, an adjustable built-in resistor was observed on an indium-tin oxide (ITO)-capped resistance random access memory (RRAM) device, which has the potential to reduce operating power. Quite notably, the high-resistance state (HRS) current of the device decreased with decreasing current compliance, and a special situation, that is, a gradual change in current always appears and climbs slowly to reach the compliance current in the set process even when the compliance current decreases, was observed. Owing to this observed phenomenon, the device is regarded to be equipped with an adjustable built-in resistor, which has the potential for low-power device application.

  9. Voltage induced magnetostrictive switching of nanomagnets: Strain assisted strain transfer torque random access memory

    SciTech Connect

    Khan, Asif Nikonov, Dmitri E.; Manipatruni, Sasikanth; Ghani, Tahir; Young, Ian A.

    2014-06-30

    A spintronic device, called the “strain assisted spin transfer torque (STT) random access memory (RAM),” is proposed by combining the magnetostriction effect and the spin transfer torque effect which can result in a dramatic improvement in the energy dissipation relative to a conventional STT-RAM. Magnetization switching in the device which is a piezoelectric-ferromagnetic heterostructure via the combined magnetostriction and STT effect is simulated by solving the Landau-Lifshitz-Gilbert equation incorporating the influence of thermal noise. The simulations show that, in such a device, each of these two mechanisms (magnetostriction and spin transfer torque) provides in a 90° rotation of the magnetization leading a deterministic 180° switching with a critical current significantly smaller than that required for spin torque alone. Such a scheme is an attractive option for writing magnetic RAM cells.

  10. Voltage induced magnetostrictive switching of nanomagnets: Strain assisted strain transfer torque random access memory

    NASA Astrophysics Data System (ADS)

    Khan, Asif; Nikonov, Dmitri E.; Manipatruni, Sasikanth; Ghani, Tahir; Young, Ian A.

    2014-06-01

    A spintronic device, called the "strain assisted spin transfer torque (STT) random access memory (RAM)," is proposed by combining the magnetostriction effect and the spin transfer torque effect which can result in a dramatic improvement in the energy dissipation relative to a conventional STT-RAM. Magnetization switching in the device which is a piezoelectric-ferromagnetic heterostructure via the combined magnetostriction and STT effect is simulated by solving the Landau-Lifshitz-Gilbert equation incorporating the influence of thermal noise. The simulations show that, in such a device, each of these two mechanisms (magnetostriction and spin transfer torque) provides in a 90° rotation of the magnetization leading a deterministic 180° switching with a critical current significantly smaller than that required for spin torque alone. Such a scheme is an attractive option for writing magnetic RAM cells.

  11. Administering an epoch initiated for remote memory access

    DOEpatents

    Blocksome, Michael A; Miller, Douglas R

    2014-03-18

    Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

  12. Administering an epoch initiated for remote memory access

    DOEpatents

    Blocksome, Michael A; Miller, Douglas R

    2012-10-23

    Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

  13. Administering an epoch initiated for remote memory access

    DOEpatents

    Blocksome, Michael A.; Miller, Douglas R.

    2013-01-01

    Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

  14. A stochastic simulation method for the assessment of resistive random access memory retention reliability

    SciTech Connect

    Berco, Dan Tseng, Tseung-Yuen

    2015-12-21

    This study presents an evaluation method for resistive random access memory retention reliability based on the Metropolis Monte Carlo algorithm and Gibbs free energy. The method, which does not rely on a time evolution, provides an extremely efficient way to compare the relative retention properties of metal-insulator-metal structures. It requires a small number of iterations and may be used for statistical analysis. The presented approach is used to compare the relative robustness of a single layer ZrO{sub 2} device with a double layer ZnO/ZrO{sub 2} one, and obtain results which are in good agreement with experimental data.

  15. Temperature effects on failure and annealing behavior in dynamic random access memories

    NASA Astrophysics Data System (ADS)

    Wilkin, N. D.; Self, C. T.

    1982-12-01

    Total dose failure levels and long time anneal characteristics of dynamic random access memories are measured while the devices are exercised under actual use conditions. These measurements were performed over the temperature range of -60 C to +70 C. The total dose failure levels are shown to decrease with increasing temperature. The anneal characteristics are shown to result in both an increase and decrease in the measured number of errors as a function of time. Finally a description of the test instrumentation and irradiation procedures are given.

  16. Infection risk associated with a closed luer access device.

    PubMed

    Adams, D; Karpanen, T; Worthington, T; Lambert, P; Elliott, T S J

    2006-03-01

    The potential for microbial contamination associated with a recently developed needleless closed luer access device (CLAD) (Q-Syte; Becton Dickinson, Sandy, UT, USA) was evaluated in vitro. Compression seals of 50 multiply activated Q-Syte devices were inoculated with Staphylococcus epidermidis NCTC 9865 in 25% (v/v) human blood and then disinfected with 70% (v/v) isopropyl alcohol followed by flushing with 0.9% (w/v) sterile saline. Forty-eight of 50 (96%) saline flushes passed through devices that had been activated up to a maximum of 70 times remained sterile. A further 25 Q-Syte CLADs that had undergone multiple activations were challenged with prefilled 0.9% (w/v) sterile saline syringes, the external luer tips of which had been inoculated with S. epidermidis NCTC 9865 prior to accessing the devices. None of the devices that had been accessed up to 70 times allowed passage of micro-organisms, despite challenge micro-organisms being detected on both the syringe tip after activation and the compression seals before decontamination. These findings suggest that the Q-Syte CLAD may be activated up to 70 times with no increased risk of microbial contamination within the fluid pathway. The device may also offer protection from the external surface of syringe tips contaminated with micro-organisms. PMID:16406139

  17. RFID and Memory Devices Fabricated Integrally on Substrates

    NASA Technical Reports Server (NTRS)

    Schramm, Harry F.

    2004-01-01

    Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for

  18. 78 FR 38867 - Gastroenterology-Urology Devices; Reclassification of Implanted Blood Access Devices

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-06-28

    ... 214 (D.C. Cir. 1985); Contact Lens Association v. FDA, 766 F.2d 592 (D.C. Cir. 1985), cert. denied..., Rm. 1061, Rockville, MD 20852. FOR FURTHER INFORMATION CONTACT: Rebecca Nipper, Center for Devices... section 513(e) proposing the reclassification of implanted blood access devices for hemodialysis (77...

  19. Efficient Memory Access with NumPy Global Arrays using Local Memory Access

    SciTech Connect

    Daily, Jeffrey A.; Berghofer, Dan C.

    2013-08-03

    This paper discusses the work completed working with Global Arrays of data on distributed multi-computer systems and improving their performance. The tasks completed were done at Pacific Northwest National Laboratory in the Science Undergrad Laboratory Internship program in the summer of 2013 for the Data Intensive Computing Group in the Fundamental and Computational Sciences DIrectorate. This work was done on the Global Arrays Toolkit developed by this group. This toolkit is an interface for programmers to more easily create arrays of data on networks of computers. This is useful because scientific computation is often done on large amounts of data sometimes so large that individual computers cannot hold all of it. This data is held in array form and can best be processed on supercomputers which often consist of a network of individual computers doing their computation in parallel. One major challenge for this sort of programming is that operations on arrays on multiple computers is very complex and an interface is needed so that these arrays seem like they are on a single computer. This is what global arrays does. The work done here is to use more efficient operations on that data that requires less copying of data to be completed. This saves a lot of time because copying data on many different computers is time intensive. The way this challenge was solved is when data to be operated on with binary operations are on the same computer, they are not copied when they are accessed. When they are on separate computers, only one set is copied when accessed. This saves time because of less copying done although more data access operations were done.

  20. Astronaut Jerry Ross on RMS holds on to ACCESS device

    NASA Technical Reports Server (NTRS)

    1985-01-01

    Astronaut Jerry L. Ross, anchored to the foot restraint on the remote manipulator system (RMS), holds on to the tower-like Assembly Concept for Construction of Erectable Space Structures (ACCESS) device just erected by Ross and Astronaut Sherwood Spring as the Atlantis flies over white clouds and blue ocean waters of the Atlantic.

  1. Astronaut Jerry Ross on RMS holds on to ACCESS device

    NASA Technical Reports Server (NTRS)

    1985-01-01

    Astronaut Jerry L. Ross, anchored to the foot restraint on the remote manipulator system (RMS), holds onto the tower-like Assembly Concept for Construction of Erectable Space Structures (ACCESS) device as the Atlantis flies over white clouds and blue ocean waters.

  2. Astronaut Jerry Ross on RMS holds on to ACCESS device

    NASA Technical Reports Server (NTRS)

    1985-01-01

    Astronaut Jerry L. Ross, anchored to the foot restraint on the remote manipulator system (RMS), approaches the tower-like Assembly Concept for Construction of Erectable Space Structures (ACCESS) device just erected by Ross and Astronaut Sherwood Spring as the Atlantis flies over white clouds and blue ocean waters of the Atlantic.

  3. Detection and response to unauthorized access to a communication device

    DOEpatents

    Smith, Rhett; Gordon, Colin

    2015-09-08

    A communication gateway consistent with the present disclosure may detect unauthorized physical or electronic access and implement security actions in response thereto. A communication gateway may provide a communication path to an intelligent electronic device (IED) using an IED communications port configured to communicate with the IED. The communication gateway may include a physical intrusion detection port and a network port. The communication gateway may further include control logic configured to evaluate physical intrusion detection signal. The control logic may be configured to determine that the physical intrusion detection signal is indicative of an attempt to obtain unauthorized access to one of the communication gateway, the IED, and a device in communication with the gateway; and take a security action based upon the determination that the indication is indicative of the attempt to gain unauthorized access.

  4. Conductive-bridging random access memory: challenges and opportunity for 3D architecture.

    PubMed

    Jana, Debanjan; Roy, Sourav; Panja, Rajeswar; Dutta, Mrinmoy; Rahaman, Sheikh Ziaur; Mahapatra, Rajat; Maikap, Siddheswar

    2015-01-01

    The performances of conductive-bridging random access memory (CBRAM) have been reviewed for different switching materials such as chalcogenides, oxides, and bilayers in different structures. The structure consists of an inert electrode and one oxidized electrode of copper (Cu) or silver (Ag). The switching mechanism is the formation/dissolution of a metallic filament in the switching materials under external bias. However, the growth dynamics of the metallic filament in different switching materials are still debated. All CBRAM devices are switching under an operation current of 0.1 μA to 1 mA, and an operation voltage of ±2 V is also needed. The device can reach a low current of 5 pA; however, current compliance-dependent reliability is a challenging issue. Although a chalcogenide-based material has opportunity to have better endurance as compared to an oxide-based material, data retention and integration with the complementary metal-oxide-semiconductor (CMOS) process are also issues. Devices with bilayer switching materials show better resistive switching characteristics as compared to those with a single switching layer, especially a program/erase endurance of >10(5) cycles with a high speed of few nanoseconds. Multi-level cell operation is possible, but the stability of the high resistance state is also an important reliability concern. These devices show a good data retention of >10(5) s at >85°C. However, more study is needed to achieve a 10-year guarantee of data retention for non-volatile memory application. The crossbar memory is benefited for high density with low power operation. Some CBRAM devices as a chip have been reported for proto-typical production. This review shows that operation current should be optimized for few microamperes with a maintaining speed of few nanoseconds, which will have challenges and also opportunities for three-dimensional (3D) architecture. PMID:25977660

  5. Autonomy and Housing Accessibility Among Powered Mobility Device Users

    PubMed Central

    Brandt, Åse; Lexell, Eva Månsson; Iwarsson, Susanne

    2015-01-01

    OBJECTIVE. To describe environmental barriers, accessibility problems, and powered mobility device (PMD) users’ autonomy indoors and outdoors; to determine the home environmental barriers that generated the most housing accessibility problems indoors, at entrances, and in the close exterior surroundings; and to examine personal factors and environmental components and their association with indoor and outdoor autonomy. METHOD. This cross-sectional study was based on data collected from a sample of 48 PMD users with a spinal cord injury (SCI) using the Impact of Participation and Autonomy and the Housing Enabler instruments. Descriptive statistics and logistic regression were used. RESULTS. More years living with SCI predicted less restriction in autonomy indoors, whereas more functional limitations and accessibility problems related to entrance doors predicted more restriction in autonomy outdoors. CONCLUSION. To enable optimized PMD use, practitioners must pay attention to the relationship between client autonomy and housing accessibility problems. PMID:26356666

  6. Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices.

    PubMed

    Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

    2016-01-21

    Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process. PMID:26695561

  7. A triple quantum dot based nano-electromechanical memory device

    SciTech Connect

    Pozner, R.; Lifshitz, E.; Peskin, U.

    2015-09-14

    Colloidal quantum dots (CQDs) are free-standing nano-structures with chemically tunable electronic properties. This tunability offers intriguing possibilities for nano-electromechanical devices. In this work, we consider a nano-electromechanical nonvolatile memory (NVM) device incorporating a triple quantum dot (TQD) cluster. The device operation is based on a bias induced motion of a floating quantum dot (FQD) located between two bound quantum dots (BQDs). The mechanical motion is used for switching between two stable states, “ON” and “OFF” states, where ligand-mediated effective interdot forces between the BQDs and the FQD serve to hold the FQD in each stable position under zero bias. Considering realistic microscopic parameters, our quantum-classical theoretical treatment of the TQD reveals the characteristics of the NVM.

  8. Self-assembled nanostructured resistive switching memory devices fabricated by templated bottom-up growth

    NASA Astrophysics Data System (ADS)

    Song, Ji-Min; Lee, Jang-Sik

    2016-01-01

    Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition.

  9. Self-assembled nanostructured resistive switching memory devices fabricated by templated bottom-up growth

    PubMed Central

    Song, Ji-Min; Lee, Jang-Sik

    2016-01-01

    Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition. PMID:26739122

  10. Understanding Electrical Conduction States in WO3 Thin Films Applied for Resistive Random-Access Memory

    NASA Astrophysics Data System (ADS)

    Ta, Thi Kieu Hanh; Pham, Kim Ngoc; Dao, Thi Bang Tam; Tran, Dai Lam; Phan, Bach Thang

    2016-05-01

    The electrical conduction and associated resistance switching mechanism of top electrode/WO3/bottom electrode devices [top electrode (TE): Ag, Ti; bottom electrode (BE): Pt, fluorine-doped tin oxide] have been investigated. The direction of switching and switching ability depended on both the top and bottom electrode material. Multiple electrical conduction mechanisms control the leakage current of such switching devices, including trap-controlled space-charge, ballistic, Ohmic, and Fowler-Nordheim tunneling effects. The transition between electrical conduction states is also linked to the switching (SET-RESET) process. This is the first report of ballistic conduction in research into resistive random-access memory. The associated resistive switching mechanisms are also discussed.

  11. Microstructural transitions in resistive random access memory composed of molybdenum oxide with copper during switching cycles.

    PubMed

    Arita, Masashi; Ohno, Yuuki; Murakami, Yosuke; Takamizawa, Keisuke; Tsurumaki-Fukuchi, Atsushi; Takahashi, Yasuo

    2016-08-21

    The switching operation of a Cu/MoOx/TiN resistive random access memory (ReRAM) device was investigated using in situ transmission electron microscopy (TEM), where the TiN surface was slightly oxidized (ox-TiN). The relationship between the switching properties and the dynamics of the ReRAM microstructure was confirmed experimentally. The growth and/or shrinkage of the conductive filament (CF) can be classified into two set modes and two reset modes. These switching modes depend on the device's switching history, factors such as the amount of Cu inclusions in the MoOx layer and the CF geometry. High currents are needed to produce an observable change in the CF. However, sharp and stable switching behaviour can be achieved without requiring such a major change. The local region around the CF is thought to contribute to the ReRAM switching process. PMID:27456192

  12. Electrical Characterization of the RCA CDP1822SD Random Access Memory, Volume 1, Appendix a

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    Electrical characteristization tests were performed on 35 RCA CDP1822SD, 256-by-4-bit, CMOS, random access memories. The tests included three functional tests, AC and DC parametric tests, a series of schmoo plots, rise/fall time screening, and a data retention test. All tests were performed on an automated IC test system with temperatures controlled by a thermal airstream unit. All the functional tests, the data retention test, and the AC and DC parametric tests were performed at ambient temperatures of 25 C, -20 C, -55 C, 85 C, and 125 C. The schmoo plots were performed at ambient temperatures of 25 C, -55 C, and 125 C. The data retention test was performed at 25 C. Five devices failed one or more functional tests and four of these devices failed to meet the expected limits of a number of AC parametric tests. Some of the schmoo plots indicated a small degree of interaction between parameters.

  13. Transapical access and closure devices: rationale and current status.

    PubMed

    Blumenstein, Johannes; Kempfert, Joerg; Kim, Won; Liebetrau, Christoph; Möllmann, Helge; Walther, Thomas

    2013-12-01

    In the past years transcatheter aortic valve implantation became a highly standardized option for the treatment of high-risk patients suffering from severe aortic stenosis. The number of transcatheter aortic valve implantation procedures is increasing exponentially worldwide. In this context the transapical approach should be considered as a safe and reproducible alternative access to the left ventricle with some specific advantages compared with transfemoral, transaortic and transsubclavian approach due to its antegrade nature. To further ease the transapical access first apical closure devices have been developed and entered first clinical trials.

  14. Materials selection for oxide-based resistive random access memories

    SciTech Connect

    Guo, Yuzheng; Robertson, John

    2014-12-01

    The energies of atomic processes in resistive random access memories (RRAMs) are calculated for four typical oxides, HfO{sub 2}, TiO{sub 2}, Ta{sub 2}O{sub 5}, and Al{sub 2}O{sub 3}, to define a materials selection process. O vacancies have the lowest defect formation energy in the O-poor limit and dominate the processes. A band diagram defines the operating Fermi energy and O chemical potential range. It is shown how the scavenger metal can be used to vary the O vacancy formation energy, via controlling the O chemical potential, and the mean Fermi energy. The high endurance of Ta{sub 2}O{sub 5} RRAM is related to its more stable amorphous phase and the adaptive lattice rearrangements of its O vacancy.

  15. Spin-Hall-assisted magnetic random access memory

    SciTech Connect

    Brink, A. van den Swagten, H. J. M.; Koopmans, B.; Cosemans, S.; Manfrini, M.; Van Roy, W.; Min, T.; Cornelissen, S.; Vaysset, A.

    2014-01-06

    We propose a write scheme for perpendicular spin-transfer torque magnetoresistive random-access memory that significantly reduces the required tunnel current density and write energy. A sub-nanosecond in-plane polarized spin current pulse is generated using the spin-Hall effect, disturbing the stable magnetic state. Subsequent switching using out-of-plane polarized spin current becomes highly efficient. Through evaluation of the Landau-Lifshitz-Gilbert equation, we quantitatively assess the viability of this write scheme for a wide range of system parameters. A typical example shows an eight-fold reduction in tunnel current density, corresponding to a fifty-fold reduction in write energy, while maintaining a 1 ns write time.

  16. Microstructural transitions in resistive random access memory composed of molybdenum oxide with copper during switching cycles

    NASA Astrophysics Data System (ADS)

    Arita, Masashi; Ohno, Yuuki; Murakami, Yosuke; Takamizawa, Keisuke; Tsurumaki-Fukuchi, Atsushi; Takahashi, Yasuo

    2016-08-01

    The switching operation of a Cu/MoOx/TiN resistive random access memory (ReRAM) device was investigated using in situ transmission electron microscopy (TEM), where the TiN surface was slightly oxidized (ox-TiN). The relationship between the switching properties and the dynamics of the ReRAM microstructure was confirmed experimentally. The growth and/or shrinkage of the conductive filament (CF) can be classified into two set modes and two reset modes. These switching modes depend on the device's switching history, factors such as the amount of Cu inclusions in the MoOx layer and the CF geometry. High currents are needed to produce an observable change in the CF. However, sharp and stable switching behaviour can be achieved without requiring such a major change. The local region around the CF is thought to contribute to the ReRAM switching process.The switching operation of a Cu/MoOx/TiN resistive random access memory (ReRAM) device was investigated using in situ transmission electron microscopy (TEM), where the TiN surface was slightly oxidized (ox-TiN). The relationship between the switching properties and the dynamics of the ReRAM microstructure was confirmed experimentally. The growth and/or shrinkage of the conductive filament (CF) can be classified into two set modes and two reset modes. These switching modes depend on the device's switching history, factors such as the amount of Cu inclusions in the MoOx layer and the CF geometry. High currents are needed to produce an observable change in the CF. However, sharp and stable switching behaviour can be achieved without requiring such a major change. The local region around the CF is thought to contribute to the ReRAM switching process. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr02602h

  17. Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

    NASA Technical Reports Server (NTRS)

    Wu, Jiin C.; Katti, Romney R.; Stadler, Henry L.

    1991-01-01

    The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

  18. Interface-engineered templates for molecular spin memory devices.

    PubMed

    Raman, Karthik V; Kamerbeek, Alexander M; Mukherjee, Arup; Atodiresei, Nicolae; Sen, Tamal K; Lazić, Predrag; Caciuc, Vasile; Michel, Reent; Stalke, Dietmar; Mandal, Swadhin K; Blügel, Stefan; Münzenberg, Markus; Moodera, Jagadeesh S

    2013-01-24

    The use of molecular spin state as a quantum of information for storage, sensing and computing has generated considerable interest in the context of next-generation data storage and communication devices, opening avenues for developing multifunctional molecular spintronics. Such ideas have been researched extensively, using single-molecule magnets and molecules with a metal ion or nitrogen vacancy as localized spin-carrying centres for storage and for realizing logic operations. However, the electronic coupling between the spin centres of these molecules is rather weak, which makes construction of quantum memory registers a challenging task. In this regard, delocalized carbon-based radical species with unpaired spin, such as phenalenyl, have shown promise. These phenalenyl moieties, which can be regarded as graphene fragments, are formed by the fusion of three benzene rings and belong to the class of open-shell systems. The spin structure of these molecules responds to external stimuli (such as light, and electric and magnetic fields), which provides novel schemes for performing spin memory and logic operations. Here we construct a molecular device using such molecules as templates to engineer interfacial spin transfer resulting from hybridization and magnetic exchange interaction with the surface of a ferromagnet; the device shows an unexpected interfacial magnetoresistance of more than 20 per cent near room temperature. Moreover, we successfully demonstrate the formation of a nanoscale magnetic molecule with a well-defined magnetic hysteresis on ferromagnetic surfaces. Owing to strong magnetic coupling with the ferromagnet, such independent switching of an adsorbed magnetic molecule has been unsuccessful with single-molecule magnets. Our findings suggest the use of chemically amenable phenalenyl-based molecules as a viable and scalable platform for building molecular-scale quantum spin memory and processors for technological development.

  19. Taxing Working Memory during Retrieval of Emotional Memories Does Not Reduce Memory Accessibility When Cued with Reminders

    PubMed Central

    van Schie, Kevin; Engelhard, Iris M.; van den Hout, Marcel A.

    2015-01-01

    Earlier studies have shown that when individuals recall an emotional memory while simultaneously doing a demanding dual-task [e.g., playing Tetris, mental arithmetic, making eye movements (EM)], this reduces self-reported vividness and emotionality of the memory. These effects have been found up to 1 week later, but have largely been confined to self-report ratings. This study examined whether this dual-tasking intervention reduces memory performance (i.e., accessibility of emotional memories). Undergraduates (N = 60) studied word-image pairs and rated the retrieved image on vividness and emotionality when cued with the word. Then they viewed the cues and recalled the images with or without making EM. Finally, they re-rated the images on vividness and emotionality. Additionally, fragments from images from all conditions were presented and participants identified which fragment was paired earlier with which cue. Findings showed no effect of the dual-task manipulation on self-reported ratings and latency responses. Several possible explanations for the lack of effects are discussed, but the cued recall procedure in our experiment seems to explain the absence of effects best. The study demonstrates boundaries to the effects of the “dual-tasking” procedure. PMID:25729370

  20. Multiferroic tunnel junction of Ni50.3Mn36.9Sb12.8/BiFeO3/Ni50.3Mn36.9Sb12.8 for magneto-electric random access memory devices

    NASA Astrophysics Data System (ADS)

    Barman, Rahul; Kaur, Davinder

    2016-02-01

    A multiferroic tunnel junction composed of two ferromagnetic shape memory alloy electrodes separated by a multiferroic barrier was fabricated from a Ni50.3Mn36.9Sb12.8/BiFeO3/Ni50.3Mn36.9Sb12.8 trilayer. A large exchange bias field (HEB) of ˜59 Oe at room temperature was found for this trilayer. Besides the exchange bias effect in this multiferroic tunnel junction, one of the most interesting results was the magnetoelectric effect, which is manifested by the transfer of strain from the Ni50.3Mn36.9Sb12.8 electrodes to the BiFeO3 tunnel barrier. The magnetic field dependence of the junction resistance was observed at room temperature after aligning the ferroelectric polarization of the BiFeO3 barrier with the poling voltage of ±3 V. A change in junction resistance was also observed between the magnetic parallel and antiparallel states of the electrodes, suggesting an entire flip of the magnetic domains against the magnetic field. After reversing the polarization of the BiFeO3 barrier between the two directions, the entire R-H curve was shifted so that both parallel and antiparallel resistances switched to different values. Hence, after applying positive and negative voltages, two parallel and two antiparallel states, i.e., four distinct states were observed. These four states will encode quaternary information by both ferromagnetic and ferroelectric order-parameters, to read non-destructively by resistance measurement. These findings may be helpful towards reconfigurable logic spintronics architectures in next generation magneto-electric random access memory devices.

  1. 75 FR 44989 - In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-07-30

    ... December 10, 2008, based on a complaint filed by Rambus, Inc. of Los Altos, California (``Rambus''). 73 FR... COMMISSION In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory... chips having synchronous dynamic random access memory controllers and product containing the same...

  2. 78 FR 25767 - Certain Static Random Access Memories and Products Containing Same; Commission Determination To...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-05-02

    ..., California (``Cypress''). 76 FR 45295 (July 28, 2011). The complaint alleged violations of section 337 of the... COMMISSION Certain Static Random Access Memories and Products Containing Same; Commission Determination To..., and the sale within the United States after importation of certain static random access memories...

  3. Accessibility versus Accuracy in Retrieving Spatial Memory: Evidence for Suboptimal Assumed Headings

    ERIC Educational Resources Information Center

    Yerramsetti, Ashok; Marchette, Steven A.; Shelton, Amy L.

    2013-01-01

    Orientation dependence in spatial memory has often been interpreted in terms of accessibility: Object locations are encoded relative to a reference orientation that affords the most accurate access to spatial memory. An open question, however, is whether people naturally use this "preferred" orientation whenever recalling the space. We…

  4. Optimizing NEURON Simulation Environment Using Remote Memory Access with Recursive Doubling on Distributed Memory Systems.

    PubMed

    Shehzad, Danish; Bozkuş, Zeki

    2016-01-01

    Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models. PMID:27413363

  5. Optimizing NEURON Simulation Environment Using Remote Memory Access with Recursive Doubling on Distributed Memory Systems

    PubMed Central

    Bozkuş, Zeki

    2016-01-01

    Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models. PMID:27413363

  6. Study on immersion lithography defectivity improvement in memory device manufacturing

    NASA Astrophysics Data System (ADS)

    He, Weiming; Hu, Huayong; Wu, Qiang

    2015-03-01

    As integrated circuit (IC) industry steps into immersion lithography's era, defectivity in photolithography becomes more complex which requires more efforts in the analysis and solution finding when compared to traditional dry lithographic process. In this paper, we focus on one type of immersion defect from memory or flash memory devices with typical mask layouts. Since the use of self-aligned double patterning (SADP) or other double patterning techniques, the original single pattern layer has to be split into 2 mask layers: logic area vs cell area. One characteristic of such split process is that the total mask transmission rate (TR) is above 70%, with extended open area and a pattern area with a transmission rate close to 50%. This indicates that it may have special defect mechanism and type compared to logic devices. We have found one type of residue defect with center ring-like map. We have studied this defect with different development recipes and analyzed their underlying mechanisms. We have also studied the effect of different immersion photoresists including types with top-coating and without top-coating, as well as the effect of bottom anti-reflection coating (BARC) substrate (organic-BARC/Si-BARC). The results of our study will be presented and discussed.

  7. Computer vector multiprocessing control with multiple access memory and priority conflict resolution method

    SciTech Connect

    Chen, S.S.; Schiffleger, A.J.

    1990-02-13

    This patent describes a multiprocessor memory system. It comprises: a central memory comprised of a plurality of independently addressable memory banks organized into a plurality of sections each accessible through a plurality of access paths; a plurality of processing machines; each of the processing machine including a plurality of ports for generating memory references to any one of the central memory sections; and conflict resolution means interfacing each of the ports to each of the central memory sections through the central memory access paths. The resolution means for receiving references from the ports and coordinating and controlling the procession of the references along to the access paths. The conflict resolution means comprising a plurality of conflict resolution circuits corresponding in number to the memory sections, each of the circuits receiving the references to its corresponding section from any one of the ports and selectively conveying the references to the access paths for the corresponding section. The circuits each including; means for checking the readiness of the memory banks to be referenced and holding a reference to a busy one of the banks until the bank is ready to be referenced; means for detecting when more than one of the references is pending to the same bank simultaneously and holding all but one of the simultaneously pending references; and means communicating with the ports and the other of the conflict resolution circuits to cause one of the ports referencing the memory to suspend generation of further references when a reference from the referencing port is being held.

  8. PIYAS-proceeding to intelligent service oriented memory allocation for flash based data centric sensor devices in wireless sensor networks.

    PubMed

    Rizvi, Sanam Shahla; Chung, Tae-Sun

    2010-01-01

    Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS). This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks.

  9. PIYAS-Proceeding to Intelligent Service Oriented Memory Allocation for Flash Based Data Centric Sensor Devices in Wireless Sensor Networks

    PubMed Central

    Rizvi, Sanam Shahla; Chung, Tae-Sun

    2010-01-01

    Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS). This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks. PMID:22315541

  10. PIYAS-proceeding to intelligent service oriented memory allocation for flash based data centric sensor devices in wireless sensor networks.

    PubMed

    Rizvi, Sanam Shahla; Chung, Tae-Sun

    2010-01-01

    Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS). This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks. PMID:22315541

  11. Working memory capacity and retrieval limitations from long-term memory: an examination of differences in accessibility.

    PubMed

    Unsworth, Nash; Spillers, Gregory J; Brewer, Gene A

    2012-01-01

    In two experiments, the locus of individual differences in working memory capacity and long-term memory recall was examined. Participants performed categorical cued and free recall tasks, and individual differences in the dynamics of recall were interpreted in terms of a hierarchical-search framework. The results from this study are in accordance with recent theorizing suggesting a strong relation between working memory capacity and retrieval from long-term memory. Furthermore, the results also indicate that individual differences in categorical recall are partially due to differences in accessibility. In terms of accessibility of target information, two important factors drive the difference between high- and low-working-memory-capacity participants. Low-working-memory-capacity participants fail to utilize appropriate retrieval strategies to access cues, and they also have difficulty resolving cue overload. Thus, when low-working-memory-capacity participants were given specific cues that activated a smaller set of potential targets, their recall performance was the same as that of high-working-memory-capacity participants. PMID:22800472

  12. Scaling dependence of memory windows and different carrier charging behaviors in Si nanocrystal nonvolatile memory devices

    NASA Astrophysics Data System (ADS)

    Yu, Jie; Chen, Kun-ji; Ma, Zhong-yuan; Zhang, Xin-xin; Jiang, Xiao-fan; Wu, Yang-qing; Huang, Xin-fan; Oda, Shunri

    2016-09-01

    Based on the charge storage mode, it is important to investigate the scaling dependence of memory performance in silicon nanocrystal (Si-NC) nonvolatile memory (NVM) devices for its scaling down limit. In this work, we made eight kinds of test key cells with different gate widths and lengths by 0.13-μm node complementary metal oxide semiconductor (CMOS) technology. It is found that the memory windows of eight kinds of test key cells are almost the same of about 1.64 V @ ± 7 V/1 ms, which are independent of the gate area, but mainly determined by the average size (12 nm) and areal density (1.8 × 1011/cm2) of Si-NCs. The program/erase (P/E) speed characteristics are almost independent of gate widths and lengths. However, the erase speed is faster than the program speed of test key cells, which is due to the different charging behaviors between electrons and holes during the operation processes. Furthermore, the data retention characteristic is also independent of the gate area. Our findings are useful for further scaling down of Si-NC NVM devices to improve the performance and on-chip integration. Project supported by the State Key Development Program for Basic Research of China (Grant No. 2010CB934402) and the National Natural Science Foundation of China (Grant Nos. 11374153, 61571221, and 61071008).

  13. Memory characteristics of flexible resistive switching devices with triangular-shaped silicon nanowire bottom electrodes

    NASA Astrophysics Data System (ADS)

    Park, Sukhyung; Cho, Kyoungah; Kim, Sangsig

    2015-05-01

    In this paper, we demonstrate the bipolar resistive switching characteristics of flexible resistive random access memory (ReRAM) devices, whose bottom electrodes are made of silicon nanowires (Si NWs) with a triangular structure, which offer preferential sites for the filaments. The temperature dependence of the low resistance state (LRS) of the resistive Al2O3/ZnO bilayers of ReRAM devices reveals that Ag filaments originating from the top Ag electrodes are responsible for bipolar resistive switching. With respect to the endurance characteristics of the LRS, resistance fluctuation is negligible because of the filaments generated at the specific sites of the vertices of the Si NW bottom electrodes. In addition, the resistive switching characteristics are maintained even after 1000 bending cycles.

  14. Physical and chemical mechanisms in oxide-based resistance random access memory.

    PubMed

    Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Zhang, Rui; Hung, Ya-Chi; Syu, Yong-En; Chang, Yao-Feng; Chen, Min-Chen; Chu, Tian-Jian; Chen, Hsin-Lu; Pan, Chih-Hung; Shih, Chih-Cheng; Zheng, Jin-Cheng; Sze, Simon M

    2015-01-01

    In this review, we provide an overview of our work in resistive switching mechanisms on oxide-based resistance random access memory (RRAM) devices. Based on the investigation of physical and chemical mechanisms, we focus on its materials, device structures, and treatment methods so as to provide an in-depth perspective of state-of-the-art oxide-based RRAM. The critical voltage and constant reaction energy properties were found, which can be used to prospectively modulate voltage and operation time to control RRAM device working performance and forecast material composition. The quantized switching phenomena in RRAM devices were demonstrated at ultra-cryogenic temperature (4K), which is attributed to the atomic-level reaction in metallic filament. In the aspect of chemical mechanisms, we use the Coulomb Faraday theorem to investigate the chemical reaction equations of RRAM for the first time. We can clearly observe that the first-order reaction series is the basis for chemical reaction during reset process in the study. Furthermore, the activation energy of chemical reactions can be extracted by changing temperature during the reset process, from which the oxygen ion reaction process can be found in the RRAM device. As for its materials, silicon oxide is compatible to semiconductor fabrication lines. It is especially promising for the silicon oxide-doped metal technology to be introduced into the industry. Based on that, double-ended graphene oxide-doped silicon oxide based via-structure RRAM with filament self-aligning formation, and self-current limiting operation ability is demonstrated. The outstanding device characteristics are attributed to the oxidation and reduction of graphene oxide flakes formed during the sputter process. Besides, we have also adopted a new concept of supercritical CO2 fluid treatment to efficiently reduce the operation current of RRAM devices for portable electronic applications.

  15. Single-crystalline CuO nanowires for resistive random access memory applications

    SciTech Connect

    Hong, Yi-Siang; Chen, Jui-Yuan; Huang, Chun-Wei; Chiu, Chung-Hua; Huang, Yu-Ting; Huang, Ting Kai; He, Ruo Shiuan; Wu, Wen-Wei

    2015-04-27

    Recently, the mechanism of resistive random access memory (RRAM) has been partly clarified and determined to be controlled by the forming and erasing of conducting filaments (CF). However, the size of the CF may restrict the application and development as devices are scaled down. In this work, we synthesized CuO nanowires (NW) (∼150 nm in diameter) to fabricate a CuO NW RRAM nanodevice that was much smaller than the filament (∼2 μm) observed in a bulk CuO RRAM device in a previous study. HRTEM indicated that the Cu{sub 2}O phase was generated after operation, which demonstrated that the filament could be minimize to as small as 3.8 nm when the device is scaled down. In addition, energy dispersive spectroscopy (EDS) and electron energy loss spectroscopy (EELS) show the resistive switching of the dielectric layer resulted from the aggregated oxygen vacancies, which also match with the I-V fitting results. Those results not only verify the switching mechanism of CuO RRAM but also show RRAM has the potential to shrink in size, which will be beneficial to the practical application of RRAM devices.

  16. Transistor memory devices with large memory windows, using multi-stacking of densely packed, hydrophobic charge trapping metal nanoparticle array.

    PubMed

    Cho, Ikjun; Kim, Beom Joon; Ryu, Sook Won; Cho, Jeong Ho; Cho, Jinhan

    2014-12-19

    Organic field-effect transistor (OFET) memories have rapidly evolved from low-cost and flexible electronics with relatively low-memory capacities to memory devices that require high-capacity memory such as smart memory cards or solid-state hard drives. Here, we report the high-capacity OFET memories based on the multilayer stacking of densely packed hydrophobic metal NP layers in place of the traditional transistor memory systems based on a single charge trapping layer. We demonstrated that the memory performances of devices could be significantly enhanced by controlling the adsorption isotherm behavior, multilayer stacking structure and hydrophobicity of the metal NPs. For this study, tetraoctylammonium (TOA)-stabilized Au nanoparticles (TOA-Au(NPs)) were consecutively layer-by-layer (LbL) assembled with an amine-functionalized poly(amidoamine) dendrimer (PAD). The formed (PAD/TOA-Au(NP))(n) films were used as a multilayer stacked charge trapping layer at the interface between the tunneling dielectric layer and the SiO2 gate dielectric layer. For a single AuNP layer (i.e. PAD/TOA-Au(NP))1) with a number density of 1.82 × 10(12) cm(-2), the memory window of the OFET memory device was measured to be approximately 97 V. The multilayer stacked OFET memory devices prepared with four Au(NP) layers exhibited excellent programmable memory properties (i.e. a large memory window (ΔV(th)) exceeding 145 V, a fast switching speed (1 μs), a high program/erase (P/E) current ratio (greater than 10(6)) and good electrical reliability) during writing and erasing over a relatively short time scale under an operation voltage of 100 V applied at the gate.

  17. Transistor memory devices with large memory windows, using multi-stacking of densely packed, hydrophobic charge trapping metal nanoparticle array

    NASA Astrophysics Data System (ADS)

    Cho, Ikjun; Kim, Beom Joon; Ryu, Sook Won; Cho, Jeong Ho; Cho, Jinhan

    2014-12-01

    Organic field-effect transistor (OFET) memories have rapidly evolved from low-cost and flexible electronics with relatively low-memory capacities to memory devices that require high-capacity memory such as smart memory cards or solid-state hard drives. Here, we report the high-capacity OFET memories based on the multilayer stacking of densely packed hydrophobic metal NP layers in place of the traditional transistor memory systems based on a single charge trapping layer. We demonstrated that the memory performances of devices could be significantly enhanced by controlling the adsorption isotherm behavior, multilayer stacking structure and hydrophobicity of the metal NPs. For this study, tetraoctylammonium (TOA)-stabilized Au nanoparticles (TOA-AuNPs) were consecutively layer-by-layer (LbL) assembled with an amine-functionalized poly(amidoamine) dendrimer (PAD). The formed (PAD/TOA-AuNP)n films were used as a multilayer stacked charge trapping layer at the interface between the tunneling dielectric layer and the SiO2 gate dielectric layer. For a single AuNP layer (i.e. PAD/TOA-AuNP)1) with a number density of 1.82 × 1012 cm-2, the memory window of the OFET memory device was measured to be approximately 97 V. The multilayer stacked OFET memory devices prepared with four AuNP layers exhibited excellent programmable memory properties (i.e. a large memory window (ΔVth) exceeding 145 V, a fast switching speed (1 μs), a high program/erase (P/E) current ratio (greater than 106) and good electrical reliability) during writing and erasing over a relatively short time scale under an operation voltage of 100 V applied at the gate.

  18. Transistor memory devices with large memory windows, using multi-stacking of densely packed, hydrophobic charge trapping metal nanoparticle array.

    PubMed

    Cho, Ikjun; Kim, Beom Joon; Ryu, Sook Won; Cho, Jeong Ho; Cho, Jinhan

    2014-12-19

    Organic field-effect transistor (OFET) memories have rapidly evolved from low-cost and flexible electronics with relatively low-memory capacities to memory devices that require high-capacity memory such as smart memory cards or solid-state hard drives. Here, we report the high-capacity OFET memories based on the multilayer stacking of densely packed hydrophobic metal NP layers in place of the traditional transistor memory systems based on a single charge trapping layer. We demonstrated that the memory performances of devices could be significantly enhanced by controlling the adsorption isotherm behavior, multilayer stacking structure and hydrophobicity of the metal NPs. For this study, tetraoctylammonium (TOA)-stabilized Au nanoparticles (TOA-Au(NPs)) were consecutively layer-by-layer (LbL) assembled with an amine-functionalized poly(amidoamine) dendrimer (PAD). The formed (PAD/TOA-Au(NP))(n) films were used as a multilayer stacked charge trapping layer at the interface between the tunneling dielectric layer and the SiO2 gate dielectric layer. For a single AuNP layer (i.e. PAD/TOA-Au(NP))1) with a number density of 1.82 × 10(12) cm(-2), the memory window of the OFET memory device was measured to be approximately 97 V. The multilayer stacked OFET memory devices prepared with four Au(NP) layers exhibited excellent programmable memory properties (i.e. a large memory window (ΔV(th)) exceeding 145 V, a fast switching speed (1 μs), a high program/erase (P/E) current ratio (greater than 10(6)) and good electrical reliability) during writing and erasing over a relatively short time scale under an operation voltage of 100 V applied at the gate. PMID:25426661

  19. Mapping virtual addresses to different physical addresses for value disambiguation for thread memory access requests

    DOEpatents

    Gala, Alan; Ohmacht, Martin

    2014-09-02

    A multiprocessor system includes nodes. Each node includes a data path that includes a core, a TLB, and a first level cache implementing disambiguation. The system also includes at least one second level cache and a main memory. For thread memory access requests, the core uses an address associated with an instruction format of the core. The first level cache uses an address format related to the size of the main memory plus an offset corresponding to hardware thread meta data. The second level cache uses a physical main memory address plus software thread meta data to store the memory access request. The second level cache accesses the main memory using the physical address with neither the offset nor the thread meta data after resolving speculation. In short, this system includes mapping of a virtual address to a different physical addresses for value disambiguation for different threads.

  20. Multiple core computer processor with globally-accessible local memories

    DOEpatents

    Shalf, John; Donofrio, David; Oliker, Leonid

    2016-09-20

    A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of the plurality of caches being associated with one and only one of the plurality of processor cores, and a plurality of memories, each of the plurality of memories being associated with a different set of at least one of the plurality of processor cores and each of the plurality of memories being configured to be visible in a global memory address space such that the plurality of memories are visible to two or more of the plurality of processor cores.

  1. 76 FR 45295 - In the Matter of Certain Static Random Access Memories and Products Containing Same; Notice of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-07-28

    ... COMMISSION In the Matter of Certain Static Random Access Memories and Products Containing Same; Notice of... importation, and the sale within the United States after importation of certain static random access memories... importation of certain static random access memories and products containing same that infringe one or more...

  2. Detection mechanisms employing single event upsets in dynamic random access memories used as radiation sensors

    NASA Astrophysics Data System (ADS)

    Darambara, D. G.; Spyrou, N. M.

    1994-12-01

    A hardware system is being designed and constructed for the detection of neutrons, with a view to using it in neutron imaging and elemental analysis. A feasibility study was initially carried out to demonstrate that dynamic Random Access Memories (dRAMs) can be used as heavy charged particle detectors and furthermore be made sensitive to neutrons. We are interested, however, in constructing a detector that will be position sensitive, and hence carried out experiments to investigate the relative sensitivity of specific elements within the dRAM chips. The findings from these initial system tests highlight the usefulness of such a device as a position sensitive radiation detector. This paper aims to explain and give a review of most aspects concerning the soft error (SE) performance using dRAM as a radiation sensor.

  3. Coexistence of memory resistance and memory capacitance in TiO2 solid-state devices

    PubMed Central

    2014-01-01

    This work exploits the coexistence of both resistance and capacitance memory effects in TiO2-based two-terminal cells. Our Pt/TiO2/TiO x /Pt devices exhibit an interesting combination of hysteresis and non-zero crossing in their current-voltage (I-V) characteristic that indicates the presence of capacitive states. Our experimental results demonstrate that both resistance and capacitance states can be simultaneously set via either voltage cycling and/or voltage pulses. We argue that these state modulations occur due to bias-induced reduction of the TiO x active layer via the displacement of ionic species. PMID:25298759

  4. Coexistence of memory resistance and memory capacitance in TiO2 solid-state devices.

    PubMed

    Salaoru, Iulia; Li, Qingjiang; Khiat, Ali; Prodromakis, Themistoklis

    2014-01-01

    This work exploits the coexistence of both resistance and capacitance memory effects in TiO2-based two-terminal cells. Our Pt/TiO2/TiO x /Pt devices exhibit an interesting combination of hysteresis and non-zero crossing in their current-voltage (I-V) characteristic that indicates the presence of capacitive states. Our experimental results demonstrate that both resistance and capacitance states can be simultaneously set via either voltage cycling and/or voltage pulses. We argue that these state modulations occur due to bias-induced reduction of the TiO x active layer via the displacement of ionic species. PMID:25298759

  5. Adult Age Differences in Accessing and Retrieving Information from Long-Term Memory.

    ERIC Educational Resources Information Center

    Petros, Thomas V.; And Others

    1983-01-01

    Investigated adult age differences in accessing and retrieving information from long-term memory. Results showed that older adults (N=26) were slower than younger adults (N=35) at feature extraction, lexical access, and accessing category information. The age deficit was proportionally greater when retrieval of category information was required.…

  6. Optimization of Pit Depth for Concurrent Read Only Memory-Random Access Memory Optical Disk

    NASA Astrophysics Data System (ADS)

    Aoyama, Nobuhide; Yamashita, Satoshi; Kunimatsu, Yasukiyo; Hosokawa, Tetsuo; Morimoto, Yasuaki; Suenaga, Masashi; Yoshihiro, Masafumi; Shimazaki, Katsusuke

    2004-06-01

    We have studied a concurrent read only memory-random access memory (ROM-RAM) optical disk system without laser feedback by optimizing pit depth. When the pit depth was 47 nm (optical depth about 1/11 λ) and the pit width 0.45 μm, about 8% jitter in both pit and magneto-optical (MO) signals was obtained with a 785 nm wavelength laser diode and 0.55 NA objective lens by employing magnetic-field-modulation (MFM) MO recording. Both pit data and MO data were recorded with eight to fourteen modulation (EFM) code with a minimum mark length of 0.83 μm and a track pitch of 1.6 μm and thus the areal density is comparable to 1.3 GB for φ 120 mm single sided disk. By the optimization of the pit depth, sufficient system margins for practical use were obtained without laser feed back for the simultaneous reproduction of both pit and MO signals.

  7. Predicting fluctuations in widespread interest: memory decay and goal-related memory accessibility in internet search trends.

    PubMed

    Masicampo, E J; Ambady, Nalini

    2014-02-01

    Memory and interest respond in similar ways to people's shifting needs and motivations. We therefore tested whether memory and interest might produce similar, observable patterns in people's responses over time. Specifically, the present studies examined whether fluctuations in widespread interest (as measured by Internet search trends) resemble two well-established memory patterns: memory decay and goal-related memory accessibility. We examined national and international events (e.g., Nobel Prize selections, holidays) that produced spikes in widespread interest in certain people and foods. When the events that triggered widespread interest were incidental (e.g., the death of a celebrity), widespread interest conformed to memory decay patterns: It rose quickly, fell slowly according to a power function, and was higher after the event than before it. When the events that triggered widespread interest were goal related (e.g., political elections), widespread interest conformed to patterns of goal-related memory accessibility: It rose slowly, fell quickly according to a sigmoid function, and was lower after the event than before it. Fluctuations in widespread interest over time are thus similar to standard memory patterns observed at the individual level due perhaps to common mechanisms and functions.

  8. Predicting fluctuations in widespread interest: memory decay and goal-related memory accessibility in internet search trends.

    PubMed

    Masicampo, E J; Ambady, Nalini

    2014-02-01

    Memory and interest respond in similar ways to people's shifting needs and motivations. We therefore tested whether memory and interest might produce similar, observable patterns in people's responses over time. Specifically, the present studies examined whether fluctuations in widespread interest (as measured by Internet search trends) resemble two well-established memory patterns: memory decay and goal-related memory accessibility. We examined national and international events (e.g., Nobel Prize selections, holidays) that produced spikes in widespread interest in certain people and foods. When the events that triggered widespread interest were incidental (e.g., the death of a celebrity), widespread interest conformed to memory decay patterns: It rose quickly, fell slowly according to a power function, and was higher after the event than before it. When the events that triggered widespread interest were goal related (e.g., political elections), widespread interest conformed to patterns of goal-related memory accessibility: It rose slowly, fell quickly according to a sigmoid function, and was lower after the event than before it. Fluctuations in widespread interest over time are thus similar to standard memory patterns observed at the individual level due perhaps to common mechanisms and functions. PMID:23127417

  9. Mult-I/O - a middleware multi input and output for access devices: a case study applied the biomedical devices.

    PubMed

    Lacerda, João M T; Bezerra, Heitor U; Valentim, Ricardo A M; Guerreiro, Ana M G; Brandão, Glaucio B; Ribeiro, Anna G D; Soares, Heliana B; Araújo, Bruno G; Leite, Cicilia R M

    2010-01-01

    The great diversity in the architecture of hardware devices allied to many communication protocols, has been hindering the implementation of systems that need to access these devices. Given these differences, it appears the need of providing the access of these devices in a transparent way. In this sense, the present work proposes a middleware, mult input and output for access the devices, as a way of abstracting the writing and reading data mechanisms in hardware devices, contributing this way, for increasing systems productivity, as the developers are just focused in their functional requirements. PMID:21097073

  10. Mult-I/O - a middleware multi input and output for access devices: a case study applied the biomedical devices.

    PubMed

    Lacerda, João M T; Bezerra, Heitor U; Valentim, Ricardo A M; Guerreiro, Ana M G; Brandão, Glaucio B; Ribeiro, Anna G D; Soares, Heliana B; Araújo, Bruno G; Leite, Cicilia R M

    2010-01-01

    The great diversity in the architecture of hardware devices allied to many communication protocols, has been hindering the implementation of systems that need to access these devices. Given these differences, it appears the need of providing the access of these devices in a transparent way. In this sense, the present work proposes a middleware, mult input and output for access the devices, as a way of abstracting the writing and reading data mechanisms in hardware devices, contributing this way, for increasing systems productivity, as the developers are just focused in their functional requirements.

  11. Percutaneous Endovascular Salvage Techniques for Implanted Venous Access Device Dysfunction

    SciTech Connect

    Breault, Stéphane; Glauser, Frédéric; Babaker, Malik Doenz, Francesco Qanadli, Salah Dine

    2015-06-15

    PurposeImplanted venous access devices (IVADs) are often used in patients who require long-term intravenous drug administration. The most common causes of device dysfunction include occlusion by fibrin sheath and/or catheter adherence to the vessel wall. We present percutaneous endovascular salvage techniques to restore function in occluded catheters. The aim of this study was to evaluate the feasibility, safety, and efficacy of these techniques.Methods and MaterialsThrough a femoral or brachial venous access, a snare is used to remove fibrin sheath around the IVAD catheter tip. If device dysfunction is caused by catheter adherences to the vessel wall, a new “mechanical adhesiolysis” maneuver was performed. IVAD salvage procedures performed between 2005 and 2013 were analyzed. Data included clinical background, catheter tip position, success rate, recurrence, and rate of complication.ResultsEighty-eight salvage procedures were performed in 80 patients, mostly women (52.5 %), with a mean age of 54 years. Only a minority (17.5 %) of evaluated catheters were located at an optimal position (i.e., cavoatrial junction ±1 cm). Mechanical adhesiolysis or other additional maneuvers were used in 21 cases (24 %). Overall technical success rate was 93.2 %. Malposition and/or vessel wall adherences were the main cause of technical failure. No complications were noted.ConclusionThese IVAD salvage techniques are safe and efficient. When a catheter is adherent to the vessel wall, mechanical adhesiolysis maneuvers allow catheter mobilization and a greater success rate with no additional risk. In patients who still require long-term use of their IVAD, these procedures can be performed safely to avoid catheter replacement.

  12. 78 FR 38994 - Implanted Blood Access Devices for Hemodialysis; Draft Guidance for Industry and Food and Drug...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-06-28

    ... HUMAN SERVICES Food and Drug Administration Implanted Blood Access Devices for Hemodialysis; Draft... availability of the draft guidance entitled ``Implanted Blood Access Devices for Hemodialysis.'' This guidance was developed to support the reclassification of the Implanted Blood Access Devices for...

  13. RAPID: A random access picture digitizer, display, and memory system

    NASA Technical Reports Server (NTRS)

    Yakimovsky, Y.; Rayfield, M.; Eskenazi, R.

    1976-01-01

    RAPID is a system capable of providing convenient digital analysis of video data in real-time. It has two modes of operation. The first allows for continuous digitization of an EIA RS-170 video signal. Each frame in the video signal is digitized and written in 1/30 of a second into RAPID's internal memory. The second mode leaves the content of the internal memory independent of the current input video. In both modes of operation the image contained in the memory is used to generate an EIA RS-170 composite video output signal representing the digitized image in the memory so that it can be displayed on a monitor.

  14. Experimental study on radiation effects in floating gate read-only-memories and static random access memories

    NASA Astrophysics Data System (ADS)

    He, Chao-Hui; Li, Yong-Hong

    2007-09-01

    Radiation effects of the floating gate read-only-memory (FG ROM) and the static random access memory (SRAM) have been evaluated using the 14 MeV neutron and 31.9MeV proton beams and Co-60 γ-rays. The neutron fluence, when the first error occurs in the FG ROMs, is at least 5 orders of magnitude higher than that in the SRAMs, and the proton fluence, 4 orders of magnitude higher. The total dose threshold for Co-60 γ-ray irradiation is about 104 rad (Si) for both memories. The difference and similarity are attributed to the structure of the memory cells and the mechanism of radiation effects. It is concluded that the FG ROMs are more reliable as semiconductor memories for storing data than the SRAMs, when they are used in the satellites or space crafts exposed to high energy particle radiation.

  15. Ultralow-power switching via defect engineering in germanium telluride phase-change memory devices

    PubMed Central

    Nukala, Pavan; Lin, Chia-Chun; Composto, Russell; Agarwal, Ritesh

    2016-01-01

    Crystal–amorphous transformation achieved via the melt-quench pathway in phase-change memory involves fundamentally inefficient energy conversion events; and this translates to large switching current densities, responsible for chemical segregation and device degradation. Alternatively, introducing defects in the crystalline phase can engineer carrier localization effects enhancing carrier–lattice coupling; and this can efficiently extract work required to introduce bond distortions necessary for amorphization from input electrical energy. Here, by pre-inducing extended defects and thus carrier localization effects in crystalline GeTe via high-energy ion irradiation, we show tremendous improvement in amorphization current densities (0.13–0.6 MA cm−2) compared with the melt-quench strategy (∼50 MA cm−2). We show scaling behaviour and good reversibility on these devices, and explore several intermediate resistance states that are accessible during both amorphization and recrystallization pathways. Existence of multiple resistance states, along with ultralow-power switching and scaling capabilities, makes this approach promising in context of low-power memory and neuromorphic computation. PMID:26805748

  16. Ultralow-power switching via defect engineering in germanium telluride phase-change memory devices

    NASA Astrophysics Data System (ADS)

    Nukala, Pavan; Lin, Chia-Chun; Composto, Russell; Agarwal, Ritesh

    2016-01-01

    Crystal-amorphous transformation achieved via the melt-quench pathway in phase-change memory involves fundamentally inefficient energy conversion events; and this translates to large switching current densities, responsible for chemical segregation and device degradation. Alternatively, introducing defects in the crystalline phase can engineer carrier localization effects enhancing carrier-lattice coupling; and this can efficiently extract work required to introduce bond distortions necessary for amorphization from input electrical energy. Here, by pre-inducing extended defects and thus carrier localization effects in crystalline GeTe via high-energy ion irradiation, we show tremendous improvement in amorphization current densities (0.13-0.6 MA cm-2) compared with the melt-quench strategy (~50 MA cm-2). We show scaling behaviour and good reversibility on these devices, and explore several intermediate resistance states that are accessible during both amorphization and recrystallization pathways. Existence of multiple resistance states, along with ultralow-power switching and scaling capabilities, makes this approach promising in context of low-power memory and neuromorphic computation.

  17. Investigation of the Hydrogen Silsesquioxane (HSQ) Electron Resist as Insulating Material in Phase Change Memory Devices

    NASA Astrophysics Data System (ADS)

    Zhou, Jiao; Ji, Hongkai; Lan, Tian; Yan, Junbing; Zhou, Wenli; Miao, Xiangshui

    2015-01-01

    Phase change random access memory (PCRAM) affords many advantages over conventional solid-state memories due to its nonvolatility, high speed, and scalability. However, high programming current to amorphize the crystalline phase through the melt-quench process of PCRAM, known as the RESET current, poses a critical challenge and has become the most significant obstacle for its widespread commercialization. In this work, an excellent negative tone resist for high resolution electron beam lithography, hydrogen silsesquioxane (HSQ), has been investigated as the insulating material which locally blocks the contact between the bottom electrode and the phase change material in PCRAM devices. Fabrications of the highly scaled HSQ nanopore arrays (as small as 16 nm) are presented. The insulating properties of the HSQ material are studied, especially under e-beam exposure plus thermal curing. Some other critical issues about the thickness adjustment of HSQ films and the influence of the PCRAM electrode on electron scattering in e-beam lithography are discussed. In addition, the HSQ material was successfully integrated into the PCRAM devices, achieving ultra-low RESET current (sub-100 μA), outstanding on/off ratios (~50), and improved endurance at tens of nanometers.

  18. Investigation of the Hydrogen Silsesquioxane (HSQ) Electron Resist as Insulating Material in Phase Change Memory Devices

    NASA Astrophysics Data System (ADS)

    Zhou, Jiao; Ji, Hongkai; Lan, Tian; Yan, Junbing; Zhou, Wenli; Miao, Xiangshui

    2014-09-01

    Phase change random access memory (PCRAM) affords many advantages over conventional solid-state memories due to its nonvolatility, high speed, and scalability. However, high programming current to amorphize the crystalline phase through the melt-quench process of PCRAM, known as the RESET current, poses a critical challenge and has become the most significant obstacle for its widespread commercialization. In this work, an excellent negative tone resist for high resolution electron beam lithography, hydrogen silsesquioxane (HSQ), has been investigated as the insulating material which locally blocks the contact between the bottom electrode and the phase change material in PCRAM devices. Fabrications of the highly scaled HSQ nanopore arrays (as small as 16 nm) are presented. The insulating properties of the HSQ material are studied, especially under e-beam exposure plus thermal curing. Some other critical issues about the thickness adjustment of HSQ films and the influence of the PCRAM electrode on electron scattering in e-beam lithography are discussed. In addition, the HSQ material was successfully integrated into the PCRAM devices, achieving ultra-low RESET current (sub-100 μA), outstanding on/off ratios (~50), and improved endurance at tens of nanometers.

  19. Investigation of three-terminal organic-based devices with memory effect and negative differential resistance

    NASA Astrophysics Data System (ADS)

    Yu, Li-Zhen; Lee, Ching-Ting

    2009-09-01

    The current-voltage characteristics of the gate-controlled three-terminal organic-based devices with memory effect and negative differential resistances (NDR) were studied. Gold and 9,10-di(2-naphthyl)anthracene (ADN) were used as the metal electrode and active channel layer of the devices, respectively. By using various gate-source voltages, the memory and NDR characteristics of the devices can be modulated. The memory and NDR characteristics of the devices were attributed to the formation of trapping sites in the interface between Au electrode and ADN active layer caused by the defects, when Au metal deposited on the ADN active layer.

  20. Control of Access to Memory: The Use of Task Interference as a Behavioral Probe

    ERIC Educational Resources Information Center

    Loft, Shayne; Humphreys, Michael S.; Whitney, Susannah J.

    2008-01-01

    Directed forgetting and prospective memory methods were combined to examine differences in the control of memory access. Between studying two lists of target words, participants were either instructed to forget the first list, or to continue remembering the first list. After study participants performed a lexical decision task with an additional…

  1. The importance of ideal central venous access device tip position.

    PubMed

    York, Nicola

    The use of central venous access devices (CVADs) is becoming more common in hospitals and the community. Incorrect tip placement is a common complication of CVAD insertion carried out at the bedside, and can lead to local inflammation and thrombosis. The literature recommends that a CVAD tip should be in the lower third of the superior vena cava. Anyone inserting a CVAD needs to take account of body position changes that may cause a tip to move. There are many tools and systems nurses can use to aid tip positioning, including taking body measurements, using body landmarks and electrocardiograms (ECGs). Tip position must be checked on a chest X-ray. There are several ways to determine tip postion and electromagnetic catheter tip guidance machines are being developed in the USA, which can record the position of a tip with greater accuracy. Nurses inserting CVADs at the bedside must appreciate the risks that incorrect or suboptimal tip position pose to the patient.

  2. Low-Complexity Memory Access Architectures for Quasi-Cyclic LDPC Decoders

    NASA Astrophysics Data System (ADS)

    Shieh, Ming-Der; Fang, Shih-Hao; Tang, Shing-Chung; Yang, Der-Wei

    Partially parallel decoding architectures are widely used in the design of low-density parity-check (LDPC) decoders, especially for quasi-cyclic (QC) LDPC codes. To comply with the code structure of parity-check matrices of QC-LDPC codes, many small memory blocks are conventionally employed in this architecture. The total memory area usually dominates the area requirement of LDPC decoders. This paper proposes a low-complexity memory access architecture that merges small memory blocks into memory groups to relax the effect of peripherals in small memory blocks. A simple but efficient algorithm is also presented to handle the additional delay elements introduced in the memory merging method. Experiment results on a rate-1/2 parity-check matrix defined in the IEEE 802.16e standard show that the LDPC decoder designed using the proposed memory access architecture has the lowest area complexity among related studies. Compared to a design with the same specifications, the decoder implemented using the proposed architecture requires 33% fewer gates and is more power-efficient. The proposed new memory access architecture is thus suitable for the design of low-complexity LDPC decoders.

  3. Oxide Defect Engineering Methods for Valence Change (VCM) Resistive Random Access Memories

    NASA Astrophysics Data System (ADS)

    Capulong, Jihan O.

    Electrical switching requirements for resistive random access memory (ReRAM) devices are multifaceted, based on device application. Thus, it is important to obtain an understanding of these switching properties and how they relate to the oxygen vacancy concentration and oxygen vacancy defects. Oxygen vacancy defects in the switching oxide of valence-change-based ReRAM (VCM ReRAM) play a significant role in device switching properties. Oxygen vacancies facilitate resistive switching as they form the conductive filament that changes the resistance state of the device. This dissertation will present two methods of modulating the defect concentration in VCM ReRAM composed of Pt/HfOx/Ti stack: 1) rapid thermal annealing (RTA) in Ar using different temperatures, and 2) doping using ion implantation under different dose levels. Metrology techniques such as x-ray diffractometry (XRD), x-ray photoelectron spectroscopy (XPS), and photoluminescence (PL) spectroscopy were utilized to characterize the HfOx switching oxide, which provided insight on the material properties and oxygen vacancy concentration in the oxide that was used to explain the changes in the electrical properties of the ReRAM devices. The resulting impact on the resistive switching characteristics of the devices, such as the forming voltage, set and reset threshold voltages, ON and OFF resistances, resistance ratio, and switching dispersion or uniformity were explored and summarized. Annealing in Ar showed significant impact on the forming voltage, with as much as 45% (from 22V to 12 V) of improvement, as the annealing temperature was increased. However, drawbacks of a higher oxide leakage and worse switching uniformity were seen with increasing annealing temperature. Meanwhile, doping the oxide by ion implantation showed significant effects on the resistive switching characteristics. Ta doping modulated the following switching properties with increasing dose: a) the reduction of the forming voltage, and Vset

  4. Polarization control for enhanced defect detection on advanced memory devices

    NASA Astrophysics Data System (ADS)

    Lee, Byoung-Ho; Ihm, Dong-Chul; Yeo, Jeong-Ho; Gluk, Yael; Meshulach, Doron

    2006-03-01

    Dense repetitive wafer structures, such as memory cells, with a pitch below the wavelength of the illumination light may take on effective birefringent properties, especially in layers of high refractive index materials such as silicon or conductors. Such induced "form birefringence" effects may result in dependency of the optical response on the illumination polarization and direction. In such structures, control over the polarization of the light becomes important to enhance signal-to-noise ratio (SNR) of pattern defects. We present defect detection results and analysis using DUV laser illumination for different polarization configurations and collection perspectives on Flash RAM devices. Improvement in detection SNR of bridge defect type is observed with linear illumination polarization perpendicular to the pattern lines. Generally, for small design rules (smaller than wavelength) polarization effects become more evident. Also, for smaller defect sizes, detection strongly depends on control of the illumination polarization. Linear polarization perpendicular to the pattern showed penetration into the structure even though the pitch is smaller than the illumination wavelength.

  5. SHADE: A Shape-Memory-Activated Device Promoting Ankle Dorsiflexion

    NASA Astrophysics Data System (ADS)

    Pittaccio, S.; Viscuso, S.; Rossini, M.; Magoni, L.; Pirovano, S.; Villa, E.; Besseghini, S.; Molteni, F.

    2009-08-01

    Acute post-stroke rehabilitation protocols include passive mobilization as a means to prevent contractures. A device (SHADE) that provides repetitive passive motion to a flaccid ankle by using shape memory alloy actuators could be of great help in providing this treatment. A suitable actuator was designed as a cartridge of approximately 150 × 20 × 15 mm, containing 2.5 m of 0.25 mm diameter NiTi wire. This actuator was activated by Joule’s effect employing a 7 s current input at 0.7 A, which provided 10 N through 76 mm displacement. Cooling and reset by natural convection took 30 s. A prototype of SHADE was assembled with two thermoplastic shells hinged together at the ankle and strapped on the shin and foot. Two actuators were fixed on the upper shell while an inextensible thread connected each NiTi wire to the foot shell. The passive ankle motion (passive range of motion, PROM) generated by SHADE was evaluated optoelectronically on three flaccid patients (58 ± 5 years old); acceptability was assessed by a questionnaire presented to further three flaccid patients (44 ± 11.5 years old) who used SHADE for 5 days, 30 min a day. SHADE was well accepted by all patients, produced good PROM, and caused no pain. The results prove that suitable limb mobilization can be produced by SMA actuators.

  6. Effects of different dopants on switching behavior of HfO2-based resistive random access memory

    NASA Astrophysics Data System (ADS)

    Deng, Ning; Pang, Hua; Wu, Wei

    2014-10-01

    In this study the effects of doping atoms (Al, Cu, and N) with different electro-negativities and ionic radii on resistive switching of HfO2-based resistive random access memory (RRAM) are systematically investigated. The results show that forming voltages and set voltages of Al/Cu-doped devices are reduced. Among all devices, Cu-doped device shows the narrowest device-to-device distributions of set voltage and low resistance. The effects of different dopants on switching behavior are explained with deferent types of CFs formed in HfO2 depending on dopants: oxygen vacancy (Vo) filaments for Al-doped HfO2 devices, hybrid filaments composed of oxygen vacancies and Cu atoms for Cu-doped HfO2 devices, and nitrogen/oxygen vacancy filaments for N-doped HfO2 devices. The results suggest that a metal dopant with a larger electro-negativity than host metal atom offers the best comprehensive performance.

  7. Three-terminal resistive switching memory in a transparent vertical-configuration device

    SciTech Connect

    Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

    2014-01-06

    The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies.

  8. Anomalous random telegraph noise and temporary phenomena in resistive random access memory

    NASA Astrophysics Data System (ADS)

    Puglisi, Francesco Maria; Larcher, Luca; Padovani, Andrea; Pavan, Paolo

    2016-11-01

    In this paper we present a comprehensive examination of the characteristics of complex Random Telegraph Noise (RTN) signals in Resistive Random Access Memory (RRAM) devices with TiN/Ti/HfO2/TiN structure. Initially, the anomalous RTN (aRTN) is investigated through careful systematic experiment, dedicated characterization procedures, and physics-based simulations to gain insights into the physics of this phenomenon. The experimentally observed RTN parameters (amplitude of the current fluctuations, capture and emission times) are analyzed in different operating conditions. Anomalous behaviors are characterized and their statistical characteristics are evaluated. Physics-based simulations considering both the Coulomb interactions among different defects in the device and the possible existence of defects with metastable states are exploited to suggest a possible physical origin of aRTN. The same simulation framework is also shown to be able to predict other temporary phenomena related to RTN, such as the temporary change in RTN stochastic properties or the sudden and iterative random appearing and vanishing of RTN fluctuations always exhibiting the same statistical characteristics. Results highlight the central role of the electrostatic interactions among individual defects and the trapped charge in describing RTN and related phenomena.

  9. Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 1

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    Electrical characterization and qualification tests were performed on the RCA MWS5001D, 1024 by 1-bit, CMOS, random access memory. Characterization tests were performed on five devices. The tests included functional tests, AC parametric worst case pattern selection test, determination of worst-case transition for setup and hold times and a series of schmoo plots. The qualification tests were performed on 32 devices and included a 2000 hour burn in with electrical tests performed at 0 hours and after 168, 1000, and 2000 hours of burn in. The tests performed included functional tests and AC and DC parametric tests. All of the tests in the characterization phase, with the exception of the worst-case transition test, were performed at ambient temperatures of 25, -55 and 125 C. The worst-case transition test was performed at 25 C. The preburn in electrical tests were performed at 25, -55, and 125 C. All burn in endpoint tests were performed at 25, -40, -55, 85, and 125 C.

  10. Integration of Flexible and Microscale Organic Nonvolatile Resistive Memory Devices Using Orthogonal Photolithography.

    PubMed

    Song, Younggul; Jang, Jingon; Yoo, Daekyoung; Jung, Seok-Heon; Jeong, Hyunhak; Hong, Seunghun; Lee, Jin-Kyun; Lee, Takhee

    2016-06-01

    We present the integration of flexible and microscale organic nonvolatile resistive memory devices fabricated in a cross-bar array structure on plastic substrates. This microscale integration was made via orthogonal photolithography method using fluorinated photoresist and solvents and was achieved without causing damage to the underlying organic memory materials. Our flexible microscale organic devices exhibited high ON/OFF ratio (I(ON/I(OFF) > 10(4)) under bending conditions. In addition, the ON and OFF states of our flexible and microscale memory devices were maintained for 10,000 seconds without any serious degradation.

  11. Asymmetric dual-gate-structured one-transistor dynamic random access memory cells for retention characteristics improvement

    NASA Astrophysics Data System (ADS)

    Kim, Hyungjin; Lee, Jong-Ho; Park, Byung-Gook

    2016-08-01

    One of the major concerns of one-transistor dynamic random access memory (1T-DRAM) is poor retention time. In this letter, a 1T-DRAM cell with two separated asymmetric gates was fabricated and evaluated to improve sensing margin and retention characteristics. It was observed that significantly enhanced sensing margin and retention time over 1 s were obtained using a negatively biased second gate and trapped electrons in the nitride layer because of increased hole capacity in the floating body. These findings indicate that the proposed device could serve as a promising candidate for overcoming retention issues of 1T-DRAM cells.

  12. High speed magneto-resistive random access memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor)

    1992-01-01

    A high speed read MRAM memory element is configured from a sandwich of magnetizable, ferromagnetic film surrounding a magneto-resistive film which may be ferromagnetic or not. One outer ferromagnetic film has a higher coercive force than the other and therefore remains magnetized in one sense while the other may be switched in sense by a switching magnetic field. The magneto-resistive film is therefore sensitive to the amplitude of the resultant field between the outer ferromagnetic films and may be constructed of a high resistivity, high magneto-resistive material capable of higher sensing currents. This permits higher read voltages and therefore faster read operations. Alternate embodiments with perpendicular anisotropy, and in-plane anisotropy are shown, including an embodiment which uses high permeability guides to direct the closing flux path through the magneto-resistive material. High density, high speed, radiation hard, memory matrices may be constructed from these memory elements.

  13. Metal-organic molecular device for non-volatile memory storage

    SciTech Connect

    Radha, B. E-mail: kulkarni@jncasr.ac.in; Sagade, Abhay A.; Kulkarni, G. U. E-mail: kulkarni@jncasr.ac.in

    2014-08-25

    Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organic complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.

  14. Configurable memory system and method for providing atomic counting operations in a memory device

    DOEpatents

    Bellofatto, Ralph E.; Gara, Alan G.; Giampapa, Mark E.; Ohmacht, Martin

    2010-09-14

    A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage when desired. The encoding and address decoding enabled by the invention provides all this functionality through a combination of software and hardware.

  15. Status and Prospects of ZnO-Based Resistive Switching Memory Devices.

    PubMed

    Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen

    2016-12-01

    In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges. PMID:27541816

  16. Status and Prospects of ZnO-Based Resistive Switching Memory Devices

    NASA Astrophysics Data System (ADS)

    Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen

    2016-08-01

    In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

  17. A fast and low-power microelectromechanical system-based non-volatile memory device

    PubMed Central

    Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E. B.; Park, Yung Woo

    2011-01-01

    Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559

  18. Access ordering and coherence in shared-memory multi-processors

    SciTech Connect

    Scheurich, C.E.

    1989-01-01

    Shared memory forms a convenient communication medium in a multitasking multiprocessor system. However, different multiprocessors can execute the same program in different manners, possibly yielding incorrect results because the machines adhere to different rules. Differences in behavior are due to the varying approaches of designers to attack the shared memory access latency problem in multiprocessors. In particular, the manner in which multiple copies of data are controlled and the manner in which memory accesses are sequenced, propagated, and buffered has impact on the behavior of the multiprocessor. Three shared memory execution models, referred to as concurrency models, are defined. The precise properties of processors, memories, and interconnection networks are derived to comply to each of the concurrency models. The usefulness of these concurrency models is demonstrated by showing the simplicity with which their rules can be applied to allow buffering of memory accesses, implement combining networks, prove cache coherence protocols correct, and design lockup-free caches. Specific examples are provided, both of a cache-based multiprocessor potentially without bottlenecks and of a cache-based multiprocessor employing lockup-free caches which can continue to service the processor while concurrently servicing one of several access misses. The paradigms and associated conditions presented in this thesis form a set of powerful tools allowing multiprocessor designers to concentrate on functionality while being burdened less with side-effect analysis.

  19. Hardware implementation of associative memory characteristics with analogue-type resistive-switching device

    NASA Astrophysics Data System (ADS)

    Moon, Kibong; Park, Sangsu; Jang, Junwoo; Lee, Daeseok; Woo, Jiyong; Cha, Euijun; Lee, Sangheon; Park, Jaesung; Song, Jeonghwan; Koo, Yunmo; Hwang, Hyunsang

    2014-12-01

    We have investigated the analogue memory characteristics of an oxide-based resistive-switching device under an electrical pulse to mimic biological spike-timing-dependent plasticity synapse characteristics. As a synaptic device, a TiN/Pr0.7Ca0.3MnO3-based resistive-switching device exhibiting excellent analogue memory characteristics was used to control the synaptic weight by applying various pulse amplitudes and cycles. Furthermore, potentiation and depression characteristics with the same spikes can be achieved by applying negative and positive pulses, respectively. By adopting complementary metal-oxide-semiconductor devices as neurons and TiN/PCMO devices as synapses, we implemented neuromorphic hardware that mimics associative memory characteristics in real time for the first time. Owing to their excellent scalability, resistive-switching devices, shows promise for future high-density neuromorphic applications.

  20. Asymmetrical access to color and location in visual working memory.

    PubMed

    Rajsic, Jason; Wilson, Daryl E

    2014-10-01

    Models of visual working memory (VWM) have benefitted greatly from the use of the delayed-matching paradigm. However, in this task, the ability to recall a probed feature is confounded with the ability to maintain the proper binding between the feature that is to be reported and the feature (typically location) that is used to cue a particular item for report. Given that location is typically used as a cue-feature, we used the delayed-estimation paradigm to compare memory for location to memory for color, rotating which feature was used as a cue and which was reported. Our results revealed several novel findings: 1) the likelihood of reporting a probed object's feature was superior when reporting location with a color cue than when reporting color with a location cue; 2) location report errors were composed entirely of swap errors, with little to no random location reports; and 3) both colour and location reports greatly benefitted from the presence of nonprobed items at test. This last finding suggests that it is uncertainty over the bindings between locations and colors at memory retrieval that drive swap errors, not at encoding. We interpret our findings as consistent with a representational architecture that nests remembered object features within remembered locations. PMID:25190322

  1. Memory Hooks and Other Mnemonic Devices: A Brief Overview for Language Teachers.

    ERIC Educational Resources Information Center

    Nyikos, Martha

    A mnemonic device is any technique or system to improve or aid the memory by use of formulas. Memory aids enjoyed great popularity in ancient times, but with the advent of literacy, the need for memorization was lessened and mnemonics were not taught regularly. However, recent research in cognitive psychology suggests that mnemonics, taught and…

  2. Open coil structure for bubble-memory-device packaging

    NASA Technical Reports Server (NTRS)

    Chen, T. T.; Ypma, J. E.

    1975-01-01

    Concept has several important advantages over close-wound system: memory and coil chips are separate and interchangeable; interconnections in coil level are eliminated by packing memory chip and electronics in single structure; and coil size can be adjusted to optimum value in terms of power dissipation and field uniformity.

  3. Design of a Molecular Memory Device: The Electron Transfer Shift Register Memory

    NASA Technical Reports Server (NTRS)

    Beratan, D.

    1993-01-01

    A molecular shift register memory at the molecular level is described. The memory elements consist of molecules can exit in either an oxidized or reduced state and the bits are shifted between the cells with photoinduced electron transfer reactions.

  4. Non-volatile memory devices with redox-active diruthenium molecular compound.

    PubMed

    Pookpanratana, S; Zhu, H; Bittle, E G; Natoli, S N; Ren, T; Richter, C A; Li, Q; Hacker, C A

    2016-03-01

    Reduction-oxidation (redox) active molecules hold potential for memory devices due to their many unique properties. We report the use of a novel diruthenium-based redox molecule incorporated into a non-volatile Flash-based memory device architecture. The memory capacitor device structure consists of a Pd/Al2O3/molecule/SiO2/Si structure. The bulky ruthenium redox molecule is attached to the surface by using a 'click' reaction and the monolayer structure is characterized by x-ray photoelectron spectroscopy to verify the Ru attachment and molecular density. The 'click' reaction is particularly advantageous for memory applications because of (1) ease of chemical design and synthesis, and (2) provides an additional spatial barrier between the oxide/silicon to the diruthenium molecule. Ultraviolet photoelectron spectroscopy data identified the energy of the electronic levels of the surface before and after surface modification. The molecular memory devices display an unsaturated charge storage window attributed to the intrinsic properties of the redox-active molecule. Our findings demonstrate the strengths and challenges with integrating molecular layers within solid-state devices, which will influence the future design of molecular memory devices.

  5. Non-volatile memory devices with redox-active diruthenium molecular compound

    NASA Astrophysics Data System (ADS)

    Pookpanratana, S.; Zhu, H.; Bittle, E. G.; Natoli, S. N.; Ren, T.; Richter, C. A.; Li, Q.; Hacker, C. A.

    2016-03-01

    Reduction-oxidation (redox) active molecules hold potential for memory devices due to their many unique properties. We report the use of a novel diruthenium-based redox molecule incorporated into a non-volatile Flash-based memory device architecture. The memory capacitor device structure consists of a Pd/Al2O3/molecule/SiO2/Si structure. The bulky ruthenium redox molecule is attached to the surface by using a ‘click’ reaction and the monolayer structure is characterized by x-ray photoelectron spectroscopy to verify the Ru attachment and molecular density. The ‘click’ reaction is particularly advantageous for memory applications because of (1) ease of chemical design and synthesis, and (2) provides an additional spatial barrier between the oxide/silicon to the diruthenium molecule. Ultraviolet photoelectron spectroscopy data identified the energy of the electronic levels of the surface before and after surface modification. The molecular memory devices display an unsaturated charge storage window attributed to the intrinsic properties of the redox-active molecule. Our findings demonstrate the strengths and challenges with integrating molecular layers within solid-state devices, which will influence the future design of molecular memory devices.

  6. Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

    2007-01-01

    Increasing the memory density and utilizing the unique characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes the characterization of a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determinethe amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. This paper presents measurements of an actual prototype memory cell. This prototype is not a complete implementation of a device, but instead, a prototype of the storage and retrieval portion of an actual device. The performance of this prototype is presented with the projected performance of the overall device. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

  7. Exploration of perpendicular magnetic anisotropy material system for application in spin transfer torque - Random access memory

    NASA Astrophysics Data System (ADS)

    Natarajarathinam, Anusha

    Perpendicular magnetic anisotropy (PMA) materials have unique advantages when used in magnetic tunnel junctions (MTJ) which are the most critical part of spin-torque transfer random access memory devices (STT-RAMs) that are being researched intensively as future non-volatile memory technology. They have high magnetoresistance which improves their sensitivity. The STT-RAM has several advantages over competing technologies, for instance, low power consumption, non-volatility, ultra-fast read and write speed and high endurance. In personal computers, it can replace SRAM for high-speed applications, Flash for non-volatility, and PSRAM and DRAM for high-speed program execution. The main aim of this research is to identify and optimize the best perpendicular magnetic anisotropy (PMA) material system for application to STT-RAM technology. Preliminary search for perpendicular magnetic anisotropy (PMA) materials for pinned layer for MTJs started with the exploration and optimization of crystalline alloys such as Co50Pd50 alloy, Mn50Al50 and amorphous alloys such as Tb21Fe72Co7 and are first presented in this work. Further optimization includes the study of Co/[Pd/Pt]x multilayers (ML), and the development of perpendicular synthetic antiferromagnets (SAF) utilizing these multilayers. Focused work on capping and seed layers to evaluate interfacial perpendicular anisotropy in free layers for pMTJs is then discussed. Optimization of the full perpendicular magnetic tunnel junction (pMTJ) includes the CoFeB/MgO/CoFeB trilayer coupled to a pinned/pinning layer with perpendicular Co/[Pd/Pt]x SAF and a thin Ta seeded CoFeB free layer. Magnetometry, simulations, annealing studies, transport measurements and TEM analysis on these samples will then be presented.

  8. Perpendicular spin transfer torque magnetic random access memories with high spin torque efficiency and thermal stability for embedded applications (invited)

    SciTech Connect

    Thomas, Luc Jan, Guenole; Zhu, Jian; Liu, Huanlong; Lee, Yuan-Jen; Le, Son; Tong, Ru-Ying; Pi, Keyu; Wang, Yu-Jen; Shen, Dongna; He, Renren; Haq, Jesmin; Teng, Jeffrey; Lam, Vinh; Huang, Kenlin; Zhong, Tom; Torng, Terry; Wang, Po-Kang

    2014-05-07

    Magnetic random access memories based on the spin transfer torque phenomenon (STT-MRAMs) have become one of the leading candidates for next generation memory applications. Among the many attractive features of this technology are its potential for high speed and endurance, read signal margin, low power consumption, scalability, and non-volatility. In this paper, we discuss our recent results on perpendicular STT-MRAM stack designs that show STT efficiency higher than 5 k{sub B}T/μA, energy barriers higher than 100 k{sub B}T at room temperature for sub-40 nm diameter devices, and tunnel magnetoresistance higher than 150%. We use both single device data and results from 8 Mb array to demonstrate data retention sufficient for automotive applications. Moreover, we also demonstrate for the first time thermal stability up to 400 °C exceeding the requirement of Si CMOS back-end processing, thus opening the realm of non-volatile embedded memory to STT-MRAM technology.

  9. Perpendicular spin transfer torque magnetic random access memories with high spin torque efficiency and thermal stability for embedded applications (invited)

    NASA Astrophysics Data System (ADS)

    Thomas, Luc; Jan, Guenole; Zhu, Jian; Liu, Huanlong; Lee, Yuan-Jen; Le, Son; Tong, Ru-Ying; Pi, Keyu; Wang, Yu-Jen; Shen, Dongna; He, Renren; Haq, Jesmin; Teng, Jeffrey; Lam, Vinh; Huang, Kenlin; Zhong, Tom; Torng, Terry; Wang, Po-Kang

    2014-05-01

    Magnetic random access memories based on the spin transfer torque phenomenon (STT-MRAMs) have become one of the leading candidates for next generation memory applications. Among the many attractive features of this technology are its potential for high speed and endurance, read signal margin, low power consumption, scalability, and non-volatility. In this paper, we discuss our recent results on perpendicular STT-MRAM stack designs that show STT efficiency higher than 5 kBT/μA, energy barriers higher than 100 kBT at room temperature for sub-40 nm diameter devices, and tunnel magnetoresistance higher than 150%. We use both single device data and results from 8 Mb array to demonstrate data retention sufficient for automotive applications. Moreover, we also demonstrate for the first time thermal stability up to 400 °C exceeding the requirement of Si CMOS back-end processing, thus opening the realm of non-volatile embedded memory to STT-MRAM technology.

  10. Enhanced oxygen vacancy diffusion in Ta2O5 resistive memory devices due to infinitely adaptive crystal structure

    NASA Astrophysics Data System (ADS)

    Jiang, Hao; Stewart, Derek A.

    2016-04-01

    Metal oxide resistive memory devices based on Ta2O5 have demonstrated high switching speed, long endurance, and low set voltage. However, the physical origin of this improved performance is still unclear. Ta2O5 is an important archetype of a class of materials that possess an adaptive crystal structure that can respond easily to the presence of defects. Using first principles nudged elastic band calculations, we show that this adaptive crystal structure leads to low energy barriers for in-plane diffusion of oxygen vacancies in λ phase Ta2O5. Identified diffusion paths are associated with collective motion of neighboring atoms. The overall vacancy diffusion is anisotropic with higher diffusion barriers found for oxygen vacancy movement between Ta-O planes. Coupled with the fact that oxygen vacancy formation energy in Ta2O5 is relatively small, our calculated low diffusion barriers can help explain the low set voltage in Ta2O5 based resistive memory devices. Our work shows that other oxides with adaptive crystal structures could serve as potential candidates for resistive random access memory devices. We also discuss some general characteristics for ideal resistive RAM oxides that could be used in future computational material searches.

  11. Optical interconnection network for parallel access to multi-rank memory in future computing systems.

    PubMed

    Wang, Kang; Gu, Huaxi; Yang, Yintang; Wang, Kun

    2015-08-10

    With the number of cores increasing, there is an emerging need for a high-bandwidth low-latency interconnection network, serving core-to-memory communication. In this paper, aiming at the goal of simultaneous access to multi-rank memory, we propose an optical interconnection network for core-to-memory communication. In the proposed network, the wavelength usage is delicately arranged so that cores can communicate with different ranks at the same time and broadcast for flow control can be achieved. A distributed memory controller architecture that works in a pipeline mode is also designed for efficient optical communication and transaction address processes. The scaling method and wavelength assignment for the proposed network are investigated. Compared with traditional electronic bus-based core-to-memory communication, the simulation results based on the PARSEC benchmark show that the bandwidth enhancement and latency reduction are apparent.

  12. Optical interconnection network for parallel access to multi-rank memory in future computing systems.

    PubMed

    Wang, Kang; Gu, Huaxi; Yang, Yintang; Wang, Kun

    2015-08-10

    With the number of cores increasing, there is an emerging need for a high-bandwidth low-latency interconnection network, serving core-to-memory communication. In this paper, aiming at the goal of simultaneous access to multi-rank memory, we propose an optical interconnection network for core-to-memory communication. In the proposed network, the wavelength usage is delicately arranged so that cores can communicate with different ranks at the same time and broadcast for flow control can be achieved. A distributed memory controller architecture that works in a pipeline mode is also designed for efficient optical communication and transaction address processes. The scaling method and wavelength assignment for the proposed network are investigated. Compared with traditional electronic bus-based core-to-memory communication, the simulation results based on the PARSEC benchmark show that the bandwidth enhancement and latency reduction are apparent. PMID:26367901

  13. Singaporean Parents' Views of Their Young Children's Access and Use of Technological Devices

    ERIC Educational Resources Information Center

    Ebbeck, Marjory; Yim, Hoi Yin Bonnie; Chan, Yvonne; Goh, Mandy

    2016-01-01

    Debates continue about the access young children have to technological devices, given the increasingly accessible and available technology in most developed countries. Concerns have been expressed by parents/caregivers and researchers, and questions have been raised about possible risks and benefits of these devices on young children who, in some…

  14. 3D Printing: 3D Printing of Shape Memory Polymers for Flexible Electronic Devices (Adv. Mater. 22/2016).

    PubMed

    Zarek, Matt; Layani, Michael; Cooperstein, Ido; Sachyani, Ela; Cohn, Daniel; Magdassi, Shlomo

    2016-06-01

    On page 4449, D. Cohn, S. Magdassi, and co-workers describe a general and facile method based on 3D printing of methacrylated macromonomers to fabricate shape-memory objects that can be used in flexible and responsive electrical circuits. Such responsive objects can be used in the fabrication of soft robotics, minimal invasive medical devices, sensors, and wearable electronics. The use of 3D printing overcomes the poor processing characteristics of thermosets and enables complex geometries that are not easily accessible by other techniques. PMID:27273436

  15. 3D Printing: 3D Printing of Shape Memory Polymers for Flexible Electronic Devices (Adv. Mater. 22/2016).

    PubMed

    Zarek, Matt; Layani, Michael; Cooperstein, Ido; Sachyani, Ela; Cohn, Daniel; Magdassi, Shlomo

    2016-06-01

    On page 4449, D. Cohn, S. Magdassi, and co-workers describe a general and facile method based on 3D printing of methacrylated macromonomers to fabricate shape-memory objects that can be used in flexible and responsive electrical circuits. Such responsive objects can be used in the fabrication of soft robotics, minimal invasive medical devices, sensors, and wearable electronics. The use of 3D printing overcomes the poor processing characteristics of thermosets and enables complex geometries that are not easily accessible by other techniques.

  16. Improved characteristics of amorphous indium-gallium-zinc-oxide-based resistive random access memory using hydrogen post-annealing

    NASA Astrophysics Data System (ADS)

    Kang, Dae Yun; Lee, Tae-Ho; Kim, Tae Geun

    2016-08-01

    The authors report an improvement in resistive switching (RS) characteristics of amorphous indium-gallium-zinc-oxide (a-IGZO)-based resistive random access memory devices using hydrogen post-annealing. Because this a-IGZO thin film has oxygen off-stoichiometry in the form of deficient and excessive oxygen sites, the film properties can be improved by introducing hydrogen atoms through the annealing process. After hydrogen post-annealing, the device exhibited a stable bipolar RS, low-voltage set and reset operation, long retention (>105 s), good endurance (>106 cycles), and a narrow distribution in each current state. The effect of hydrogen post-annealing is also investigated by analyzing the sample surface using X-ray photon spectroscopy and atomic force microscopy.

  17. Distributed multiport memory architecture

    NASA Technical Reports Server (NTRS)

    Kohl, W. H. (Inventor)

    1983-01-01

    A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.

  18. CMOS Interface Circuits for Spin Tunneling Junction Based Magnetic Random Access Memories

    SciTech Connect

    Ganesh Saripalli

    2002-12-31

    Magneto resistive memories (MRAM) are non-volatile memories which use magnetic instead of electrical structures to store data. These memories, apart from being non-volatile, offer a possibility to achieve densities better than DRAMs and speeds faster than SRAMs. MRAMs could potentially replace all computer memory RAM technologies in use today, leading to future applications like instan-on computers and longer battery life for pervasive devices. Such rapid development was made possible due to the recent discovery of large magnetoresistance in Spin tunneling junction devices. Spin tunneling junctions (STJ) are composite structures consisting of a thin insulating layer sandwiched between two magnetic layers. This thesis research is targeted towards these spin tunneling junction based Magnetic memories. In any memory, some kind of an interface circuit is needed to read the logic states. In this thesis, four such circuits are proposed and designed for Magnetic memories (MRAM). These circuits interface to the Spin tunneling junctions and act as sense amplifiers to read their magnetic states. The physical structure and functional characteristics of these circuits are discussed in this thesis. Mismatch effects on the circuits and proper design techniques are also presented. To demonstrate the functionality of these interface structures, test circuits were designed and fabricated in TSMC 0.35{micro} CMOS process. Also circuits to characterize the process mismatches were fabricated and tested. These results were then used in Matlab programs to aid in design process and to predict interface circuit's yields.

  19. Memory operation devices based on light-illumination ambipolar carbon-nanotube thin-film-transistors

    SciTech Connect

    Aïssa, B.; Nedil, M.; Kroeger, J.; Haddad, T.; Rosei, F.

    2015-09-28

    We report the memory operation behavior of a light illumination ambipolar single-walled carbon nanotube thin film field-effect transistors devices. In addition to the high electronic-performance, such an on/off transistor-switching ratio of 10{sup 4} and an on-conductance of 18 μS, these memory devices have shown a high retention time of both hole and electron-trapping modes, reaching 2.8 × 10{sup 4} s at room temperature. The memory characteristics confirm that light illumination and electrical field can act as an independent programming/erasing operation method. This could be a fundamental step toward achieving high performance and stable operating nanoelectronic memory devices.

  20. Program partitioning for NUMA multiprocessor computer systems. [Nonuniform memory access

    SciTech Connect

    Wolski, R.M.; Feo, J.T. )

    1993-11-01

    Program partitioning and scheduling are essential steps in programming non-shared-memory computer systems. Partitioning is the separation of program operations into sequential tasks, and scheduling is the assignment of tasks to processors. To be effective, automatic methods require an accurate representation of the model of computation and the target architecture. Current partitioning methods assume today's most prevalent models -- macro dataflow and a homogeneous/two-level multicomputer system. Based on communication channels, neither model represents well the emerging class of NUMA multiprocessor computer systems consisting of hierarchical read/write memories. Consequently, the partitions generated by extant methods do not execute well on these systems. In this paper, the authors extend the conventional graph representation of the macro-dataflow model to enable mapping heuristics to consider the complex communication options supported by NUMA architectures. They describe two such heuristics. Simulated execution times of program graphs show that the model and heuristics generate higher quality program mappings than current methods for NUMA architectures.

  1. Electrical Evaluation of RCA MWS5501D Random Access Memory, Volume 2, Appendix a

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The address access time, address readout time, the data hold time, and the data setup time are some of the results surveyed.

  2. Resistive switching phenomena of HfO2 films grown by MOCVD for resistive switching memory devices

    NASA Astrophysics Data System (ADS)

    Kim, Hee-Dong; Yun, Min Ju; Kim, Sungho

    2016-08-01

    The resistive switching phenomena of HfO2 films grown by using metal organic chemical vapor deposition (MOCVD) was studied for the application of resistive random access memory (ReRAM) devices. In the fabricated Pt/HfO2/TiN memory cells, bipolar resistive switching characteristics were observed, and the set and reset states were measured to be as low as 7 μA and 4 μA, respectively, at V READ = 1 V. Regarding the resistive switching performance, stable resistive switching (RS) performance was observed under 40 repetitive dc cycles with small variations of set/reset voltages and the currents and good retention characteristics of over 105 s in both the low-resistance state (LRS) and the high-resistance state (HRS). These results show the possibility of using MOCVDgrown HfO2 films as a promising resistive switching materials for ReRAM applications.

  3. Role of the hippocampus in memory formation: restorative encoding memory integration neural device as a cognitive neural prosthesis.

    PubMed

    Berger, Theodore; Song, Dong; Chan, Rosa; Shin, Dae; Marmarelis, Vasilis; Hampson, Robert; Sweatt, Andrew; Heck, Christi; Liu, Charles; Wills, Jack; Lacoss, Jeff; Granacki, John; Gerhardt, Greg; Deadwyler, Sam

    2012-01-01

    Remind, which stands for "restorative encoding memory integration neural device," is a Defense Advanced Research Projects Agency (DARPA)-sponsored program to construct the first-ever cognitive prosthesis to replace lost memory function and enhance the existing memory capacity in animals and, ultimately, in humans. Reaching this goal involves understanding something fundamental about the brain that has not been understood previously: how the brain internally codes memories. In developing a hippocampal prosthesis for the rat, we have been able to demonstrate a multiple-input, multiple- output (MIMO) nonlinear model that predicts in real time the spatiotemporal codes for specific memories required for correct performance on a standard learning/memory task, i.e., delayed-nonmatch-to-sample (DNMS) memory. The MIMO model has been tested successfully in a number of contexts; most notably, in animals with a pharmacologically disabled hippocampus, we were able to reinstate long-term memories necessary for correct DNMS behavior by substituting a MIMO model-predicted code, delivered by electrical stimulation to the hippocampus through an array of electrodes, resulting in spatiotemporal hippocampal activity that is normally generated endogenously. We also have shown that delivering the same model-predicted code to electrode-implanted control animals with a normally functioning hippocampus substantially enhances animals memory capacity above control levels. These results in rodents have formed the basis for extending the MIMO model to nonhuman primates; this is now underway as the last step of the REMIND program before developing a MIMO-based cognitive prosthesis for humans.

  4. Logic with memory: and gates made of organic and inorganic memristive devices

    NASA Astrophysics Data System (ADS)

    Baldi, G.; Battistoni, S.; Attolini, G.; Bosi, M.; Collini, C.; Iannotta, S.; Lorenzelli, L.; Mosca, R.; Ponraj, J. S.; Verucchi, R.; Erokhin, V.

    2014-10-01

    Logic elements endowed with memory are realized with two types of memristors: organic and inorganic ones. The organic devices are based on a polyaniline/polyethylene oxide heterostructure, while the inorganic ones are based on a Pt/Al2O3/Ti heterostructure. The memristors are characterized by measuring cyclic voltage-current characteristics. They are then used to make AND gates showing memory abilities, exhibiting different behaviors. In the case of the inorganic devices the OFF/ON transitions are very fast when two inputs are applied simultaneously, while they are slow, with a gradual increase of the conductivity, in the case of the organic devices. The two types of devices are suggested as logic elements for future neuromorphic computers combining memory and processing properties.

  5. A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires.

    PubMed

    Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

    2016-06-09

    The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

  6. A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

    NASA Astrophysics Data System (ADS)

    Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

    2016-06-01

    The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

  7. A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

    PubMed Central

    Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

    2016-01-01

    The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques. PMID:27279431

  8. Boosting the FM-Index on the GPU: Effective Techniques to Mitigate Random Memory Access.

    PubMed

    Chacón, Alejandro; Marco-Sola, Santiago; Espinosa, Antonio; Ribeca, Paolo; Moure, Juan Carlos

    2015-01-01

    The recent advent of high-throughput sequencing machines producing big amounts of short reads has boosted the interest in efficient string searching techniques. As of today, many mainstream sequence alignment software tools rely on a special data structure, called the FM-index, which allows for fast exact searches in large genomic references. However, such searches translate into a pseudo-random memory access pattern, thus making memory access the limiting factor of all computation-efficient implementations, both on CPUs and GPUs. Here, we show that several strategies can be put in place to remove the memory bottleneck on the GPU: more compact indexes can be implemented by having more threads work cooperatively on larger memory blocks, and a k-step FM-index can be used to further reduce the number of memory accesses. The combination of those and other optimisations yields an implementation that is able to process about two Gbases of queries per second on our test platform, being about 8 × faster than a comparable multi-core CPU version, and about 3 × to 5 × faster than the FM-index implementation on the GPU provided by the recently announced Nvidia NVBIO bioinformatics library. PMID:26451818

  9. Memory hierarchy using row-based compression

    DOEpatents

    Loh, Gabriel H.; O'Connor, James M.

    2016-10-25

    A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

  10. Magnetic Resonance Flow Velocity and Temperature Mapping of a Shape Memory Polymer Foam Device

    SciTech Connect

    Small IV, W; Gjersing, E; Herberg, J L; Wilson, T S; Maitland, D J

    2008-10-29

    Interventional medical devices based on thermally responsive shape memory polymer (SMP) are under development to treat stroke victims. The goals of these catheter-delivered devices include re-establishing blood flow in occluded arteries and preventing aneurysm rupture. Because these devices alter the hemodynamics and dissipate thermal energy during the therapeutic procedure, a first step in the device development process is to investigate fluid velocity and temperature changes following device deployment. A laser-heated SMP foam device was deployed in a simplified in vitro vascular model. Magnetic resonance imaging (MRI) techniques were used to assess the fluid dynamics and thermal changes associated with device deployment. Spatial maps of the steady-state fluid velocity and temperature change inside and outside the laser-heated SMP foam device were acquired. Though non-physiological conditions were used in this initial study, the utility of MRI in the development of a thermally-activated SMP foam device has been demonstrated.

  11. 78 FR 35645 - Certain Static Random Access Memories and Products Containing Same; Commission Determination...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-06-13

    ... Cypress Semiconductor Corporation of San Jose, California (``Cypress''). 76 FR 45295 (July 28, 2011). The..., 2013, the Commission determined to review the RID in part, i.e., with respect to invalidity. See 78 FR... COMMISSION Certain Static Random Access Memories and Products Containing Same; Commission...

  12. 76 FR 2336 - Dynamic Random Access Memory Semiconductors From the Republic of Korea: Final Results of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-01-13

    ... Access Memory Semiconductors from the Republic of Korea, 68 FR 47546 (August 11, 2003) (``CVD Order... the Republic of Korea: Preliminary Results of Countervailing Duty Administrative Review, 75 FR 55764..., 73 FR 57594 (October 3, 2008). As a result, CBP is no longer suspending liquidation for entries...

  13. 77 FR 26789 - Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2012-05-07

    ... violation of section 337 in the infringement of certain patents. 73 FR 75131. The principal respondent was... order. 75 FR 44989-90 (July 30, 2010). The Commission also issued cease and desist orders against those... COMMISSION Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers...

  14. Making Physical Activity Accessible to Older Adults with Memory Loss: A Feasibility Study

    ERIC Educational Resources Information Center

    Logsdon, Rebecca G.; McCurry, Susan M.; Pike, Kenneth C.; Teri, Linda

    2009-01-01

    Purpose: For individuals with mild cognitive impairment (MCI), memory loss may prevent successful engagement in exercise, a key factor in preventing additional disability. The Resources and Activities for Life Long Independence (RALLI) program uses behavioral principles to make exercise more accessible for these individuals. Exercises are broken…

  15. Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

    DOEpatents

    Blocksome, Michael A; Mamidala, Amith R

    2014-02-11

    Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

  16. Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

    DOEpatents

    Blocksome, Michael A.; Mamidala, Amith R.

    2013-09-03

    Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

  17. 75 FR 20564 - Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-04-20

    ... Antidumping and Countervailing Duty Administrative Reviews and Requests for Revocation in Part, 74 FR 48224... International Trade Administration Dynamic Random Access Memory Semiconductors from the Republic of Korea... administrative review of the countervailing duty order on dynamic random access memory semiconductors from...

  18. Memory Attacks on Device-Independent Quantum Cryptography

    NASA Astrophysics Data System (ADS)

    Barrett, Jonathan; Colbeck, Roger; Kent, Adrian

    2013-01-01

    Device-independent quantum cryptographic schemes aim to guarantee security to users based only on the output statistics of any components used, and without the need to verify their internal functionality. Since this would protect users against untrustworthy or incompetent manufacturers, sabotage, or device degradation, this idea has excited much interest, and many device-independent schemes have been proposed. Here we identify a critical weakness of device-independent protocols that rely on public communication between secure laboratories. Untrusted devices may record their inputs and outputs and reveal information about them via publicly discussed outputs during later runs. Reusing devices thus compromises the security of a protocol and risks leaking secret data. Possible defenses include securely destroying or isolating used devices. However, these are costly and often impractical. We propose other more practical partial defenses as well as a new protocol structure for device-independent quantum key distribution that aims to achieve composable security in the case of two parties using a small number of devices to repeatedly share keys with each other (and no other party).

  19. Memory attacks on device-independent quantum cryptography.

    PubMed

    Barrett, Jonathan; Colbeck, Roger; Kent, Adrian

    2013-01-01

    Device-independent quantum cryptographic schemes aim to guarantee security to users based only on the output statistics of any components used, and without the need to verify their internal functionality. Since this would protect users against untrustworthy or incompetent manufacturers, sabotage, or device degradation, this idea has excited much interest, and many device-independent schemes have been proposed. Here we identify a critical weakness of device-independent protocols that rely on public communication between secure laboratories. Untrusted devices may record their inputs and outputs and reveal information about them via publicly discussed outputs during later runs. Reusing devices thus compromises the security of a protocol and risks leaking secret data. Possible defenses include securely destroying or isolating used devices. However, these are costly and often impractical. We propose other more practical partial defenses as well as a new protocol structure for device-independent quantum key distribution that aims to achieve composable security in the case of two parties using a small number of devices to repeatedly share keys with each other (and no other party). PMID:23383767

  20. Memory attacks on device-independent quantum cryptography.

    PubMed

    Barrett, Jonathan; Colbeck, Roger; Kent, Adrian

    2013-01-01

    Device-independent quantum cryptographic schemes aim to guarantee security to users based only on the output statistics of any components used, and without the need to verify their internal functionality. Since this would protect users against untrustworthy or incompetent manufacturers, sabotage, or device degradation, this idea has excited much interest, and many device-independent schemes have been proposed. Here we identify a critical weakness of device-independent protocols that rely on public communication between secure laboratories. Untrusted devices may record their inputs and outputs and reveal information about them via publicly discussed outputs during later runs. Reusing devices thus compromises the security of a protocol and risks leaking secret data. Possible defenses include securely destroying or isolating used devices. However, these are costly and often impractical. We propose other more practical partial defenses as well as a new protocol structure for device-independent quantum key distribution that aims to achieve composable security in the case of two parties using a small number of devices to repeatedly share keys with each other (and no other party).

  1. Shared direct memory access on the Explorer 2-LX

    NASA Technical Reports Server (NTRS)

    Musgrave, Jeffrey L.

    1990-01-01

    Advances in Expert System technology and Artificial Intelligence have provided a framework for applying automated Intelligence to the solution of problems which were generally perceived as intractable using more classical approaches. As a result, hybrid architectures and parallel processing capability have become more common in computing environments. The Texas Instruments Explorer II-LX is an example of a machine which combines a symbolic processing environment, and a computationally oriented environment in a single chassis for integrated problem solutions. This user's manual is an attempt to make these capabilities more accessible to a wider range of engineers and programmers with problems well suited to solution in such an environment.

  2. Quantifying data retention of perpendicular spin-transfer-torque magnetic random access memory chips using an effective thermal stability factor method

    SciTech Connect

    Thomas, Luc Jan, Guenole; Le, Son; Wang, Po-Kang

    2015-04-20

    The thermal stability of perpendicular Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM) devices is investigated at chip level. Experimental data are analyzed in the framework of the Néel-Brown model including distributions of the thermal stability factor Δ. We show that in the low error rate regime important for applications, the effect of distributions of Δ can be described by a single quantity, the effective thermal stability factor Δ{sub eff}, which encompasses both the median and the standard deviation of the distributions. Data retention of memory chips can be assessed accurately by measuring Δ{sub eff} as a function of device diameter and temperature. We apply this method to show that 54 nm devices based on our perpendicular STT-MRAM design meet our 10 year data retention target up to 120 °C.

  3. High-performance nonvolatile organic transistor memory devices using the electrets of semiconducting blends.

    PubMed

    Chiu, Yu-Cheng; Chen, Tzu-Ying; Chen, Yougen; Satoh, Toshifumi; Kakuchi, Toyoji; Chen, Wen-Chang

    2014-08-13

    Organic nonvolatile transistor memory devices of the n-type semiconductor N,N'-bis(2-phenylethyl)-perylene-3,4:9,10-tetracarboxylic diimide (BPE-PTCDI) were prepared using various electrets (i.e., three-armed star-shaped poly[4-(diphenylamino)benzyl methacrylate] (N(PTPMA)3) and its blends with 6,6-phenyl-C61-butyric acid methyl ester (PCBM), 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pen) or ferrocene). In the device using the PCBM:N(PTPMA)3 blend electret, it changed its memory feature from a write-once-read-many (WORM) type to a flash type as the PCBM content increased and could be operated repeatedly based on a tunneling process. The large shifts on the reversible transfer curves and the hysteresis after implementing a gate bias indicated the considerable charge storage in the electret layer. On the other hand, the memory characteristics showed a flash type and a WORM characteristic, respectively, using the donor/donor electrets TIPS-pen:N(PTPMA)3 and ferrocene:N(PTPMA)3. The variation on the memory characteristics was attributed to the difference of energy barrier at the interface when different types of electret materials were employed. All the studied memory devices exhibited a long retention over 10(4) s with a highly stable read-out current. In addition, the afore-discussed memory devices by inserting another electret layer of poly(methacrylic acid) (PMAA) between the BPE-PTCDI layer and the semiconducting blend layer enhanced the write-read-erase-read (WRER) operation cycle as high as 200 times. This study suggested that the energy level and charge transfer in the blend electret had a significant effect on tuning the characteristics of nonvolatile transistor memory devices.

  4. A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires

    PubMed Central

    2012-01-01

    In this paper, a silicon-oxide-nitride-silicon nonvolatile memory constructed on an n+-poly-Si nanowire [NW] structure featuring a junctionless [JL] configuration is presented. The JL structure is fulfilled by employing only one in situ heavily phosphorous-doped poly-Si layer to simultaneously serve as source/drain regions and NW channels, thus greatly simplifying the manufacturing process and alleviating the requirement of precise control of the doping profile. Owing to the higher carrier concentration in the channel, the developed JL NW device exhibits significantly enhanced programming speed and larger memory window than its counterpart with conventional undoped-NW-channel. Moreover, it also displays acceptable erase and data retention properties. Hence, the desirable memory characteristics along with the much simplified fabrication process make the JL NW memory structure a promising candidate for future system-on-panel and three-dimensional ultrahigh density memory applications. PMID:22373446

  5. The effectiveness of music as a mnemonic device on recognition memory for people with multiple sclerosis.

    PubMed

    Moore, Kimberly Sena; Peterson, David A; O'Shea, Geoffrey; McIntosh, Gerald C; Thaut, Michael H

    2008-01-01

    Research shows that people with multiple sclerosis exhibit learning and memory difficulties and that music can be used successfully as a mnemonic device to aid in learning and memory. However, there is currently no research investigating the effectiveness of music mnemonics as a compensatory learning strategy for people with multiple sclerosis. Participants with clinically definitive multiple sclerosis (N = 38) were given a verbal learning and memory test. Results from a recognition memory task were analyzed that compared learning through music (n = 20) versus learning through speech (n = 18). Preliminary baseline neuropsychological data were collected that measured executive functioning skills, learning and memory abilities, sustained attention, and level of disability. An independent samples t test showed no significant difference between groups on baseline neuropsychological functioning or on recognition task measures. Correlation analyses suggest that music mnemonics may facilitate learning for people who are less impaired by the disease. Implications for future research are discussed.

  6. Photo-enhanced polymer memory device based on polyimide containing spiropyran

    NASA Astrophysics Data System (ADS)

    Seok, Woong Chul; Son, Seok Ho; An, Tae Kyu; Kim, Se Hyun; Lee, Seung Woo

    2016-07-01

    This paper reports the synthesis of a new polyimide (PI) containing a spiropyran moiety in the side chain and its applications to the switchable polymer memory before and after UV exposure. UV exposure allows memory using spiropyran-based PI as an active layer with a higher current and lower switching-ON voltage compared to the unexposed device due to the structural changes in the spiropyran moiety after UV exposure. In addition, this study examined the effects of UV exposure on the performance of the memory containing spiropyran-based PI using the UV-Vis absorption spectra and space-charge limited conduction (SCLC) model. [Figure not available: see fulltext.

  7. Nonvolatile multilevel data storage memory device from controlled ambipolar charge trapping mechanism.

    PubMed

    Zhou, Ye; Han, Su-Ting; Sonar, Prashant; Roy, V A L

    2013-01-01

    The capability of storing multi-bit information is one of the most important challenges in memory technologies. An ambipolar polymer which intrinsically has the ability to transport electrons and holes as a semiconducting layer provides an opportunity for the charge trapping layer to trap both electrons and holes efficiently. Here, we achieved large memory window and distinct multilevel data storage by utilizing the phenomena of ambipolar charge trapping mechanism. As fabricated flexible memory devices display five well-defined data levels with good endurance and retention properties showing potential application in printed electronics.

  8. A chiral-based magnetic memory device without a permanent magnet

    PubMed Central

    Dor, Oren Ben; Yochelis, Shira; Mathew, Shinto P.; Naaman, Ron; Paltiel, Yossi

    2013-01-01

    Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices. PMID:23922081

  9. Hand geometry biometric device for secure access control

    SciTech Connect

    Colbert, C.; Moles, D.R. )

    1991-01-01

    This paper reports that the authors developed for the Air Force the Mark VI Personal Identity Verifier (PIV) for controlling access to a fixed or mobile ICBM site, a computer terminal, or mainframe. The Mark VI records the digitized silhouettes of four fingers of each hand on an AT and T smart card. Like fingerprints, finger shapes, lengths, and widths constitute an unguessable biometric password. A Security Officer enrolls an authorized person who places each hand, in turn, on a backlighted panel. An overhead scanning camera records the right and left hand reference templates on the smart card. The Security Officer adds to the card: name, personal identification number (PIN), and access restrictions such as permitted days of the week, times of day, and doors. To gain access, cardowner inserts card into a reader slot and places either hand on the panel. Resulting access template is matched to the reference template by three sameness algorithms. The final match score is an average of 12 scores (each of the four fingers, matched for shape, length, and width), expressing the degree of sameness. (A perfect match would score 100.00.) The final match score is compared to a predetermined score (threshold), generating an accept or reject decision.

  10. Optical Shared Memory Computing and Multiple Access Protocols for Photonic Networks

    NASA Astrophysics Data System (ADS)

    Li, Kuang-Yu.

    In this research we investigate potential applications of optics in massively parallel computer systems, especially focusing on design issues in three-dimensional optical data storage and free-space photonic networks. An optical implementation of a shared memory uses a single photorefractive crystal and can realize the set of memory modules in a digital shared memory computer. A complete instruction set consists of R sc EAD, W sc RITE, S sc ELECTIVE E sc RASE, and R sc EFRESH, which can be applied to any memory module independent of (and in parallel with) instructions to the other memory modules. In addition, a memory module can execute a sequence of R sc EAD operations simultaneously with the execution of a W sc RITE operation to accommodate differences in optical recording and readout times common to optical volume storage media. An experimental shared memory system is demonstrated and its projected performance is analyzed. A multiplexing technique is presented to significantly reduce both grating- and beam-degeneracy crosstalk in volume holographic systems, by incorporating space, angle, and wavelength as the multiplexing parameters. In this approach, each hologram, which results from the interference between a single input node and an object array, partially overlaps with the other holograms in its neighborhood. This technique can offer improved interconnection density, optical throughput, signal fidelity, and space-bandwidth product utilization. Design principles and numerical simulation results are presented. A free-space photonic cellular hypercube parallel computer, with emphasis on the design of a collisionless multiple access protocol, is presented. This design incorporates wavelength-, space-, and time-multiplexing to achieve multiple access, wavelength reuse, dense connectivity, collisionless communications, and a simple control mechanism. Analytic models based on semi-Markov processes are employed to analyze this protocol. The performance of the

  11. Multilevel Cell Storage and Resistance Variability in Resistive Random Access Memory

    NASA Astrophysics Data System (ADS)

    Pantelis, D. I.; Karakizis, P. N.; Dragatogiannis, D. A.; Charitidis, C. A.

    2016-06-01

    Multilevel per cell (MLC) storage in resistive random access memory (ReRAM) is attractive in achieving high-density and low-cost memory and will be required in future. In this chapter, MLC storage and resistance variability and reliability of multilevel in ReRAM are discussed. Different MLC operation schemes with their physical mechanisms and a comprehensive analysis of resistance variability have been provided. Various factors that can induce variability and their effect on the resistance margin between the multiple resistance levels are assessed. The reliability characteristics and the impact on MLC storage have also been assessed.

  12. Effects of erbium doping of indium tin oxide electrode in resistive random access memory

    NASA Astrophysics Data System (ADS)

    Chen, Po-Hsun; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Pan, Chih-Hung; Lin, Chih-Yang; Jin, Fu-Yuan; Chen, Min-Chen; Huang, Hui-Chun; Lo, Ikai; Zheng, Jin-Cheng; Sze, Simon M.

    2016-03-01

    Identical insulators and bottom electrodes were fabricated and capped by an indium tin oxide (ITO) film, either undoped or doped with erbium (Er), as a top electrode. This distinctive top electrode dramatically altered the resistive random access memory (RRAM) characteristics, for example, lowering the operation current and enlarging the memory window. In addition, the RESET voltage increased, whereas the SET voltage remained almost the same. A conduction model of Er-doped ITO is proposed through current-voltage (I-V) measurement and current fitting to explain the resistance switching mechanism of Er-doped ITO RRAM and is confirmed by material analysis and reliability tests.

  13. Stochastic switching of TiO2-based memristive devices with identical initial memory states

    PubMed Central

    2014-01-01

    In this work, we show that identical TiO2-based memristive devices that possess the same initial resistive states are only phenomenologically similar as their internal structures may vary significantly, which could render quite dissimilar switching dynamics. We experimentally demonstrated that the resistive switching of practical devices with similar initial states could occur at different programming stimuli cycles. We argue that similar memory states can be transcribed via numerous distinct active core states through the dissimilar reduced TiO2-x filamentary distributions. Our hypothesis was finally verified via simulated results of the memory state evolution, by taking into account dissimilar initial filamentary distribution. PMID:24994953

  14. Gold nanoparticle charge trapping and relation to organic polymer memory devices.

    PubMed

    Prime, D; Paul, S; Josephs-Franks, P W

    2009-10-28

    Nanoparticle-based polymer memory devices (PMDs) are a promising technology that could replace conventional silicon-based electronic memory, offering fast operating speeds, simple device structures and low costs. Here we report on the current state of nanoparticle PMDs and review some of the problems that are still present in the field. We also present new data regarding the charging of gold nanoparticles in metal-insulator-semiconductor capacitors, showing that charging is possible under the application of an electric field with a trapped charge density due to the nanoparticles of 3.3 x 10(12) cm(-2).

  15. Mechanism of power consumption inhibitive multi-layer Zn:SiO2/SiO2 structure resistance random access memory

    NASA Astrophysics Data System (ADS)

    Zhang, Rui; Tsai, Tsung-Ming; Chang, Ting-Chang; Chang, Kuan-Chang; Chen, Kai-Huang; Lou, Jen-Chung; Young, Tai-Fa; Chen, Jung-Hui; Huang, Syuan-Yong; Chen, Min-Chen; Shih, Chih-Cheng; Chen, Hsin-Lu; Pan, Jhih-Hong; Tung, Cheng-Wei; Syu, Yong-En; Sze, Simon M.

    2013-12-01

    In this paper, multi-layer Zn:SiO2/SiO2 structure is introduced to reduce the operation power consumption of resistive random access memory (RRAM) device by modifying the filament formation process. And the configuration of multi-layer Zn:SiO2/SiO2 structure is confirmed and demonstrated by auger electron spectrum. Material analysis together with conduction current fitting is applied to qualitatively evaluate the carrier conduction mechanism on both low resistance state and high resistance state. Finally, single layer and multilayer conduction models are proposed, respectively, to clarify the corresponding conduction characteristics of two types of RRAM devices.

  16. Multiple number and letter comparison: directionality and accessibility in numeric and alphabetic memories.

    PubMed

    Jou, Jerwen

    2003-01-01

    In 3 experiments, subjects made comparativejudgments on a set of 2 numbers or letters, 3 numbers or letters, or 5 numbers or letters. Numeric and alphabetic serial order memories were contrasted. Three aspects of serial order memory processes were identified: computational complexity, directionality, and accessibility. Computational complexity is the number of algorithmic steps involved in identifying a target. Directional bias is measured as the speed differences in identifying serial targets of equal computational complexity in a stimulus array. Memory accessibility is measured as the numeric and alphabetic serial position effects. Subjects had a slight directional bias favoring backward ordering for single digits but no bias in 2-digit number ordering, in contrast to a strong forward directional advantage in letter ordering. The speed of number access was found to steadily and evenly decrease along the numeric scale, in contrast to a systematic pattern of variations in alphabet access along the alphabetic scale. Finally, the middle item effect (the middle item in a multi-item array is identified most slowly) found in Jou's (1997) multiple-letter comparison study was generalized to numbers.

  17. Determining Device Access for Persons with Physical Disabilities.

    ERIC Educational Resources Information Center

    Fraser, Beverly A.

    Time-saving strategies are offered for determining appropriateness of assistive technology devices for persons with physical disabilities in movement and posture. The strategies are based on the principle that even an individual with the most severe involvement has certain controllable movements that can form the foundation for interaction with an…

  18. A Guide to Paperless Braille Devices. Random Access.

    ERIC Educational Resources Information Center

    Leventhal, J.; And Others

    1988-01-01

    This review examines electronic braille input-output devices which have a braille keyboard for data entry and/or a braille display. Four braille notetakers and two braille computer systems are evaluated, commenting on their keyboards, ease of use, documentation, and analysis of speech and/or the braille display. (JDD)

  19. Large Capacity of Conscious Access for Incidental Memories in Natural Scenes.

    PubMed

    Kaunitz, Lisandro N; Rowe, Elise G; Tsuchiya, Naotsugu

    2016-09-01

    When searching a crowd, people can detect a target face only by direct fixation and attention. Once the target is found, it is consciously experienced and remembered, but what is the perceptual fate of the fixated nontarget faces? Whereas introspection suggests that one may remember nontargets, previous studies have proposed that almost no memory should be retained. Using a gaze-contingent paradigm, we asked subjects to visually search for a target face within a crowded natural scene and then tested their memory for nontarget faces, as well as their confidence in those memories. Subjects remembered up to seven fixated, nontarget faces with more than 70% accuracy. Memory accuracy was correlated with trial-by-trial confidence ratings, which implies that the memory was consciously maintained and accessed. When the search scene was inverted, no more than three nontarget faces were remembered. These findings imply that incidental memory for faces, such as those recalled by eyewitnesses, is more reliable than is usually assumed. PMID:27507869

  20. Fabrication of poly(methyl methacrylate)-MoS2/graphene heterostructure for memory device application

    NASA Astrophysics Data System (ADS)

    Shinde, Sachin M.; Kalita, Golap; Tanemura, Masaki

    2014-12-01

    Combination of two dimensional graphene and semi-conducting molybdenum disulfide (MoS2) is of great interest for various electronic device applications. Here, we demonstrate fabrication of a hybridized structure with the chemical vapor deposited graphene and MoS2 crystals to configure a memory device. Elongated hexagonal and rhombus shaped MoS2 crystals are synthesized by sulfurization of thermally evaporated molybdenum oxide (MoO3) thin film. Scanning transmission electron microscope studies reveal atomic level structure of the synthesized high quality MoS2 crystals. In the prospect of a memory device fabrication, poly(methyl methacrylate) (PMMA) is used as an insulating dielectric material as well as a supporting layer to transfer the MoS2 crystals. In the fabricated device, PMMA-MoS2 and graphene layers act as the functional and electrode materials, respectively. Distinctive bistable electrical switching and nonvolatile rewritable memory effect is observed in the fabricated PMMA-MoS2/graphene heterostructure. The developed material system and demonstrated memory device fabrication can be significant for next generation data storage applications.

  1. CMOS compatible electrode materials selection in oxide-based memory devices

    NASA Astrophysics Data System (ADS)

    Zhuo, V. Y.-Q.; Li, M.; Guo, Y.; Wang, W.; Yang, Y.; Jiang, Y.; Robertson, J.

    2016-07-01

    Electrode materials selection guidelines for oxide-based memory devices are constructed from the combined knowledge of observed device operation characteristics, ab-initio calculations, and nano-material characterization. It is demonstrated that changing the top electrode material from Ge to Cr to Ta in the Ta2O5-based memory devices resulted in a reduction of the operation voltages and current. Energy Dispersed X-ray (EDX) Spectrometer analysis clearly shows that the different top electrode materials scavenge oxygen ions from the Ta2O5 memory layer at various degrees, leading to different oxygen vacancy concentrations within the Ta2O5, thus the observed trends in the device performance. Replacing the Pt bottom electrode material with CMOS compatible materials (Ru and Ir) further reduces the power consumption and can be attributed to the modification of the Schottky barrier height and oxygen vacancy concentration at the electrode/oxide interface. Both trends in the device performance and EDX results are corroborated by the ab-initio calculations which reveal that the electrode material tunes the oxygen vacancy concentration via the oxygen chemical potential and defect formation energy. This experimental-theoretical approach strongly suggests that the proper selection of CMOS compatible electrode materials will create the critical oxygen vacancy concentration to attain low power memory performance.

  2. Code division in optical memory devices based on photon echo

    NASA Astrophysics Data System (ADS)

    Kalachev, Alexey A.; Vlasova, Daria D.

    2006-03-01

    The theory of multi-channel optical memory based on photon echo is developed. It is shown that under long-lived photon echo regime the writing and reading of information with code division is possible using phase modulation of reference and reading pulses. A simple method for construction of a system of noise-like signals, which is based on the segmentation of Frank sequence is proposed. It is shown that in comparison to the system of random biphase signals this system leads to the efficient decreasing of mutual influence of channels and increasing of random/noise ratio under reading of information.

  3. Feasibility study of using a Zener diode as the selection device for bipolar RRAM and WORM memory arrays

    NASA Astrophysics Data System (ADS)

    Li, Yingtao; Fu, Liping; Tao, Chunlan; Jiang, Xinyu; Sun, Pengxiao

    2014-01-01

    Cross-bar arrays are usually used for the high density application of resistive random access memory (RRAM) devices. However, cross-talk interference limits an increase in the integration density. In this paper, the Zener diode is proposed as a selection device to suppress the sneak current in bipolar RRAM arrays. Measurement results show that the Zener diode can act as a good selection device, and the sneak current can be effectively suppressed. The readout margin is sufficiently improved compared to that obtained without the selection device. Due to the improvement for the reading disturbance, the size of the cross-bar array can be enhanced to more than 103 × 103. Furthermore, the possibility of using a write-once-read-many-times (WORM) cross-bar array is also demonstrated by connecting the Zener diode and the bipolar RRAM in series. These results strongly suggest that using a Zener diode as a selection device opens up great opportunities to realize high density bipolar RRAM arrays.

  4. Non-Hebbian Learning Implementation in Light-Controlled Resistive Memory Devices

    PubMed Central

    Ungureanu, Mariana; Stoliar, Pablo; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

    2012-01-01

    Non-Hebbian learning is often encountered in different bio-organisms. In these processes, the strength of a synapse connecting two neurons is controlled not only by the signals exchanged between the neurons, but also by an additional factor external to the synaptic structure. Here we show the implementation of non-Hebbian learning in a single solid-state resistive memory device. The output of our device is controlled not only by the applied voltages, but also by the illumination conditions under which it operates. We demonstrate that our metal/oxide/semiconductor device learns more efficiently at higher applied voltages but also when light, an external parameter, is present during the information writing steps. Conversely, memory erasing is more efficiently at higher applied voltages and in the dark. Translating neuronal activity into simple solid-state devices could provide a deeper understanding of complex brain processes and give insight into non-binary computing possibilities. PMID:23251679

  5. How to Use Removable Mass Storage Memory Devices

    ERIC Educational Resources Information Center

    Branzburg, Jeffrey

    2004-01-01

    Mass storage refers to the variety of ways to keep large amounts of information that are used on a computer. Over the years, the removable storage devices have grown smaller, increased in capacity, and transferred the information to the computer faster. The 8" floppy disk of the 1960s stored 100 kilobytes, or about 60 typewritten, double-spaced…

  6. Impact of device size and thickness of Al2O 3 film on the Cu pillar and resistive switching characteristics for 3D cross-point memory application.

    PubMed

    Panja, Rajeswar; Roy, Sourav; Jana, Debanjan; Maikap, Siddheswar

    2014-12-01

    Impact of the device size and thickness of Al2O3 film on the Cu pillars and resistive switching memory characteristics of the Al/Cu/Al2O3/TiN structures have been investigated for the first time. The memory device size and thickness of Al2O3 of 18 nm are observed by transmission electron microscope image. The 20-nm-thick Al2O3 films have been used for the Cu pillar formation (i.e., stronger Cu filaments) in the Al/Cu/Al2O3/TiN structures, which can be used for three-dimensional (3D) cross-point architecture as reported previously Nanoscale Res. Lett.9:366, 2014. Fifty randomly picked devices with sizes ranging from 8 × 8 to 0.4 × 0.4 μm(2) have been measured. The 8-μm devices show 100% yield of Cu pillars, whereas only 74% successful is observed for the 0.4-μm devices, because smaller size devices have higher Joule heating effect and larger size devices show long read endurance of 10(5) cycles at a high read voltage of -1.5 V. On the other hand, the resistive switching memory characteristics of the 0.4-μm devices with a 2-nm-thick Al2O3 film show superior as compared to those of both the larger device sizes and thicker (10 nm) Al2O3 film, owing to higher Cu diffusion rate for the larger size and thicker Al2O3 film. In consequence, higher device-to-device uniformity of 88% and lower average RESET current of approximately 328 μA are observed for the 0.4-μm devices with a 2-nm-thick Al2O3 film. Data retention capability of our memory device of >48 h makes it a promising one for future nanoscale nonvolatile application. This conductive bridging resistive random access memory (CBRAM) device is forming free at a current compliance (CC) of 30 μA (even at a lowest CC of 0.1 μA) and operation voltage of ±3 V at a high resistance ratio of >10(4). PMID:26088986

  7. Design of Unstructured Adaptive (UA) NAS Parallel Benchmark Featuring Irregular, Dynamic Memory Accesses

    NASA Technical Reports Server (NTRS)

    Feng, Hui-Yu; VanderWijngaart, Rob; Biswas, Rupak; Biegel, Bryan (Technical Monitor)

    2001-01-01

    We describe the design of a new method for the measurement of the performance of modern computer systems when solving scientific problems featuring irregular, dynamic memory accesses. The method involves the solution of a stylized heat transfer problem on an unstructured, adaptive grid. A Spectral Element Method (SEM) with an adaptive, nonconforming mesh is selected to discretize the transport equation. The relatively high order of the SEM lowers the fraction of wall clock time spent on inter-processor communication, which eases the load balancing task and allows us to concentrate on the memory accesses. The benchmark is designed to be three-dimensional. Parallelization and load balance issues of a reference implementation will be described in detail in future reports.

  8. Optical memory effect in ZnO nanowire based organic bulk heterojunction devices

    NASA Astrophysics Data System (ADS)

    Santhanakrishna, Anand Kumar; Takshi, Arash

    2015-09-01

    Due to the required established field to separate photogenerated electrons and holes, the current- voltage (I-V) characteristic in almost all photovoltaic devices in dark is an exponential curve. Upon illumination, the shape of the curve remains almost the same, but the current shifts due to the photocurrent. Also, because of the lack of any storage mechanism, the I-V curve returns to the dark characteristic immediately after light cessation. Here, we are reporting a case study performed on a photo-electric memory effect in an organic bulk hetrojuction device made of ZnO nanowires as the electron transport layer under ambient conditions and within a sealed transfer box filled with nitrogen. The I-V characteristic in dark and light showed a unique change from a rectifying response in dark to a resistive behavior in light. Additionally, after light cessation, a memory effect was observed with a slow transition from the resistive to rectifying response same as the original dark characteristic. The memory effect and its I-V characteristics were tested for the two cases. For practical applications as a photo memory device, further experiments are required to gain a better understanding of the mechanism behind the observed memory effect for the two different cases.

  9. Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 5, Appendix D

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    The electrical characterization and qualification test results are presented for the RCA MWS 5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Average input high current, worst case input high current, output low current, and data setup time are some of the results presented.

  10. Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 4, Appendix C

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Statistical analysis data is supplied along with write pulse width, read cycle time, write cycle time, and chip enable time data.

  11. Electro-optical switching and memory display device

    DOEpatents

    Skotheim, T.A.; O'Grady, W.E.; Linkous, C.A.

    1983-12-29

    An electro-optical display device having a housing with wall means including one transparent wall and at least one other wall. Counter electrodes are positioned on the transparent wall and display electrodes are positioned on the other wall with both electrodes in electrically conductive relationship with an electrolyte. Circuits means are connected to the display and counter electrodes to apply different predetermined control potentials between them. The display electrodes are covered with a thin electrically conductive polymer film that is characterized according to the invention by having embedded in it pigment molecules as counter ions. The display device is operable to be switched to a plurality of different visual color states at an exceptionally rapid switching rate while each of the color states is characterized by possessing good color intensity and definition.

  12. Electro-optical switching and memory display device

    DOEpatents

    Skotheim, Terje A.; O'Grady, William E.; Linkous, Clovis A.

    1986-01-01

    An electro-optical display device having a housing with wall means including one transparent wall and at least one other wall. Counter electrodes are positioned on the transparent wall and display electrodes are positioned on the other wall with both electrodes in electrically conductive relationship with an electrolyte. Circuit means are connected to the display and counter electrodes to apply different predetermined control potentials between them. The display electrodes are covered with a thin electrically conductive polymer film that is characterized according to the invention by having embedded in it pigment molecules as counter ions. The display device is operable to be switched to a plurality of different visual color states at an exceptionally rapid switching rate while each of the color states is characterized by possessing good color intensity and definition.

  13. 76 FR 4375 - In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-01-25

    ...''). 74 FR 43723-4 (August 27, 2009). The complaint, as amended and supplemented, alleges violations of... COMMISSION In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of... flash memory devices and products containing same by reason of infringement of certain claims of...

  14. Origin of multi-level switching and telegraphic noise in organic nanocomposite memory devices

    PubMed Central

    Song, Younggul; Jeong, Hyunhak; Chung, Seungjun; Ahn, Geun Ho; Kim, Tae-Young; Jang, Jingon; Yoo, Daekyoung; Jeong, Heejun; Javey, Ali; Lee, Takhee

    2016-01-01

    The origin of negative differential resistance (NDR) and its derivative intermediate resistive states (IRSs) of nanocomposite memory systems have not been clearly analyzed for the past decade. To address this issue, we investigate the current fluctuations of organic nanocomposite memory devices with NDR and the IRSs under various temperature conditions. The 1/f noise scaling behaviors at various temperature conditions in the IRSs and telegraphic noise in NDR indicate the localized current pathways in the organic nanocomposite layers for each IRS. The clearly observed telegraphic noise with a long characteristic time in NDR at low temperature indicates that the localized current pathways for the IRSs are attributed to trapping/de-trapping at the deep trap levels in NDR. This study will be useful for the development and tuning of multi-bit storable organic nanocomposite memory device systems. PMID:27659298

  15. Realization of transient memory-loss with NiO-based resistive switching device

    NASA Astrophysics Data System (ADS)

    Hu, S. G.; Liu, Y.; Chen, T. P.; Liu, Z.; Yu, Q.; Deng, L. J.; Yin, Y.; Hosaka, Sumio

    2012-11-01

    A resistive switching device based on a nickel-rich nickel oxide thin film, which exhibits inherent learning and memory-loss abilities, is reported in this work. The conductance of the device gradually increases and finally saturates with the number of voltage pulses (or voltage sweepings), which is analogous to the behavior of the short-term and long-term memory in the human brain. Furthermore, the number of the voltage pulses (or sweeping cycles) required to achieve a given conductance state increases with the interval between two consecutive voltage pulses (or sweeping cycles), which is attributed to the heat diffusion in the material of the conductive filaments formed in the nickel oxide thin film. The phenomenon resembles the behavior of the human brain, i.e., forgetting starts immediately after an impression, a larger interval of the impressions leads to more memory loss, thus the memorization needs more impressions to enhance.

  16. Controlled charge trapping by molybdenum disulphide and graphene in ultrathin heterostructured memory devices.

    PubMed

    Choi, Min Sup; Lee, Gwan-Hyoung; Yu, Young-Jun; Lee, Dae-Yeong; Lee, Seung Hwan; Kim, Philip; Hone, James; Yoo, Won Jong

    2013-01-01

    Atomically thin two-dimensional materials have emerged as promising candidates for flexible and transparent electronic applications. Here we show non-volatile memory devices, based on field-effect transistors with large hysteresis, consisting entirely of stacked two-dimensional materials. Graphene and molybdenum disulphide were employed as both channel and charge-trapping layers, whereas hexagonal boron nitride was used as a tunnel barrier. In these ultrathin heterostructured memory devices, the atomically thin molybdenum disulphide or graphene-trapping layer stores charge tunnelled through hexagonal boron nitride, serving as a floating gate to control the charge transport in the graphene or molybdenum disulphide channel. By varying the thicknesses of two-dimensional materials and modifying the stacking order, the hysteresis and conductance polarity of the field-effect transistor can be controlled. These devices show high mobility, high on/off current ratio, large memory window and stable retention, providing a promising route towards flexible and transparent memory devices utilizing atomically thin two-dimensional materials. PMID:23535645

  17. Investigation of thermal resistance and power consumption in Ga-doped indium oxide (In{sub 2}O{sub 3}) nanowire phase change random access memory

    SciTech Connect

    Jin, Bo; Lee, Jeong-Soo E-mail: ljs6951@postech.ac.kr; Lim, Taekyung; Ju, Sanghyun; Latypov, Marat I.; Pi, Dong-Hai; Seop Kim, Hyoung; Meyyappan, M. E-mail: ljs6951@postech.ac.kr

    2014-03-10

    The resistance stability and thermal resistance of phase change memory devices using ∼40 nm diameter Ga-doped In{sub 2}O{sub 3} nanowires (Ga:In{sub 2}O{sub 3} NW) with different Ga-doping concentrations have been investigated. The estimated resistance stability (R(t)/R{sub 0} ratio) improves with higher Ga concentration and is dependent on annealing temperature. The extracted thermal resistance (R{sub th}) increases with higher Ga-concentration and thus the power consumption can be reduced by ∼90% for the 11.5% Ga:In{sub 2}O{sub 3} NW, compared to the 2.1% Ga:In{sub 2}O{sub 3} NW. The excellent characteristics of Ga-doped In{sub 2}O{sub 3} nanowire devices offer an avenue to develop low power and reliable phase change random access memory applications.

  18. Immigration, language proficiency, and autobiographical memories: Lifespan distribution and second-language access.

    PubMed

    Esposito, Alena G; Baker-Ward, Lynne

    2016-08-01

    This investigation examined two controversies in the autobiographical literature: how cross-language immigration affects the distribution of autobiographical memories across the lifespan and under what circumstances language-dependent recall is observed. Both Spanish/English bilingual immigrants and English monolingual non-immigrants participated in a cue word study, with the bilingual sample taking part in a within-subject language manipulation. The expected bump in the number of memories from early life was observed for non-immigrants but not immigrants, who reported more memories for events surrounding immigration. Aspects of the methodology addressed possible reasons for past discrepant findings. Language-dependent recall was influenced by second-language proficiency. Results were interpreted as evidence that bilinguals with high second-language proficiency, in contrast to those with lower second-language proficiency, access a single conceptual store through either language. The final multi-level model predicting language-dependent recall, including second-language proficiency, age of immigration, internal language, and cue word language, explained ¾ of the between-person variance and (1)/5 of the within-person variance. We arrive at two conclusions. First, major life transitions influence the distribution of memories. Second, concept representation across multiple languages follows a developmental model. In addition, the results underscore the importance of considering language experience in research involving memory reports.

  19. Temperature induced complementary switching in titanium oxide resistive random access memory

    NASA Astrophysics Data System (ADS)

    Panda, D.; Simanjuntak, F. M.; Tseng, T.-Y.

    2016-07-01

    On the way towards high memory density and computer performance, a considerable development in energy efficiency represents the foremost aspiration in future information technology. Complementary resistive switch consists of two antiserial resistive switching memory (RRAM) elements and allows for the construction of large passive crossbar arrays by solving the sneak path problem in combination with a drastic reduction of the power consumption. Here we present a titanium oxide based complementary RRAM (CRRAM) device with Pt top and TiN bottom electrode. A subsequent post metal annealing at 400°C induces CRRAM. Forming voltage of 4.3 V is required for this device to initiate switching process. The same device also exhibiting bipolar switching at lower compliance current, Ic <50 μA. The CRRAM device have high reliabilities. Formation of intermediate titanium oxi-nitride layer is confirmed from the cross-sectional HRTEM analysis. The origin of complementary switching mechanism have been discussed with AES, HRTEM analysis and schematic diagram. This paper provides valuable data along with analysis on the origin of CRRAM for the application in nanoscale devices.

  20. Polymer ferroelectric field-effect memory device with SnO channel layer exhibits record hole mobility

    NASA Astrophysics Data System (ADS)

    Caraveo-Frescas, J. A.; Khan, M. A.; Alshareef, H. N.

    2014-06-01

    Here we report for the first time a hybrid p-channel polymer ferroelectric field-effect transistor memory device with record mobility. The memory device, fabricated at 200°C on both plastic polyimide and glass substrates, uses ferroelectric polymer P(VDF-TrFE) as the gate dielectric and transparent p-type oxide (SnO) as the active channel layer. A record mobility of 3.3 cm2V-1s-1, large memory window (~16 V), low read voltages (~-1 V), and excellent retention characteristics up to 5000 sec have been achieved. The mobility achieved in our devices is over 10 times higher than previously reported polymer ferroelectric field-effect transistor memory with p-type channel. This demonstration opens the door for the development of non-volatile memory devices based on dual channel for emerging transparent and flexible electronic devices.

  1. Application of nanomaterials in two-terminal resistive-switching memory devices

    PubMed Central

    Ouyang, Jianyong

    2010-01-01

    Nanometer materials have been attracting strong attention due to their interesting structure and properties. Many important practical applications have been demonstrated for nanometer materials based on their unique properties. This article provides a review on the fabrication, electrical characterization, and memory application of two-terminal resistive-switching devices using nanomaterials as the active components, including metal and semiconductor nanoparticles (NPs), nanotubes, nanowires, and graphenes. There are mainly two types of device architectures for the two-terminal devices with NPs. One has a triple-layer structure with a metal film sandwiched between two organic semiconductor layers, and the other has a single polymer film blended with NPs. These devices can be electrically switched between two states with significant different resistances, i.e. the ‘ON’ and ‘OFF’ states. These render the devices important application as two-terminal non-volatile memory devices. The electrical behavior of these devices can be affected by the materials in the active layer and the electrodes. Though the mechanism for the electrical switches has been in argument, it is generally believed that the resistive switches are related to charge storage on the NPs. Resistive switches were also observed on crossbars formed by nanotubes, nanowires, and graphene ribbons. The resistive switches are due to nanoelectromechanical behavior of the materials. The Coulombic interaction of transient charges on the nanomaterials affects the configurable gap of the crossbars, which results into significant change in current through the crossbars. These nanoelectromechanical devices can be used as fast-response and high-density memory devices as well. PMID:22110862

  2. A bio-inspired memory device based on interfacing Physarum polycephalum with an organic semiconductor

    SciTech Connect

    Romeo, Agostino; Dimonte, Alice; Tarabella, Giuseppe; D’Angelo, Pasquale E-mail: iannotta@imem.cnr.it; Erokhin, Victor; Iannotta, Salvatore E-mail: iannotta@imem.cnr.it

    2015-01-01

    The development of devices able to detect and record ion fluxes is a crucial point in order to understand the mechanisms that regulate communication and life of organisms. Here, we take advantage of the combined electronic and ionic conduction properties of a conducting polymer to develop a hybrid organic/living device with a three-terminal configuration, using the Physarum polycephalum Cell (PPC) slime mould as a living bio-electrolyte. An over-oxidation process induces a conductivity switch in the polymer, due to the ionic flux taking place at the PPC/polymer interface. This behaviour endows a current-depending memory effect to the device.

  3. Bubble memory module for spacecraft application

    NASA Technical Reports Server (NTRS)

    Hayes, P. J.; Looney, K. T.; Nichols, C. D.

    1985-01-01

    Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

  4. Novel spintronics devices for memory and logic: prospects and challenges for room temperature all spin computing

    NASA Astrophysics Data System (ADS)

    Wang, Jian-Ping

    An energy efficient memory and logic device for the post-CMOS era has been the goal of a variety of research fields. The limits of scaling, which we expect to reach by the year 2025, demand that future advances in computational power will not be realized from ever-shrinking device sizes, but rather by innovative designs and new materials and physics. Magnetoresistive based devices have been a promising candidate for future integrated magnetic computation because of its unique non-volatility and functionalities. The application of perpendicular magnetic anisotropy for potential STT-RAM application was demonstrated and later has been intensively investigated by both academia and industry groups, but there is no clear path way how scaling will eventually work for both memory and logic applications. One of main reasons is that there is no demonstrated material stack candidate that could lead to a scaling scheme down to sub 10 nm. Another challenge for the usage of magnetoresistive based devices for logic application is its available switching speed and writing energy. Although a good progress has been made to demonstrate the fast switching of a thermally stable magnetic tunnel junction (MTJ) down to 165 ps, it is still several times slower than its CMOS counterpart. In this talk, I will review the recent progress by my research group and my C-SPIN colleagues, then discuss the opportunities, challenges and some potential path ways for magnetoresitive based devices for memory and logic applications and their integration for room temperature all spin computing system.

  5. Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

    NASA Astrophysics Data System (ADS)

    Tripathi, Udbhav; Kaur, Ramneek

    2016-05-01

    Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

  6. Comprehension of Linguistic Dependencies: Speed-Accuracy Tradeoff Evidence for Direct-Access Retrieval From Memory

    PubMed Central

    Foraker, Stephani; McElree, Brian

    2012-01-01

    Comprehenders can rapidly and efficiently interpret expressions with various types of non-adjacent dependencies. In the sentence The boy that the teacher warned fell, boy is readily interpreted as the subject of the verb fall despite the fact that a relative clause, that the teacher warned, intervenes between the two dependent elements. We review research investigating three memory operations proposed for resolving this and other types of non-adjacent dependencies: serial search retrieval, in which the dependent constituent is recovered by a search process through representations in memory, direct-access retrieval in which the dependent constituent is recovered directly by retrieval cue operations without search, and active maintenance of the dependent constituent in focal attention. Studies using speed-accuracy tradeoff methodology to examine the full timecourse of interpreting a wide range of non-adjacent dependencies indicate that comprehenders retrieve dependent constituents with a direct-access operation, consistent with the claim that representations formed during comprehension are accessed with a cue-driven, content-addressable retrieval process. The observed timecourse profiles are inconsistent with a broad class of models based on several search operations for retrieval. The profiles are also inconsistent with active maintenance of a constituent while concurrently processing subsequent material, and suggest that, with few exceptions, direct-access retrieval is required to process non-adjacent dependencies. PMID:22448181

  7. Daily Access to Sucrose Impairs Aspects of Spatial Memory Tasks Reliant on Pattern Separation and Neural Proliferation in Rats

    ERIC Educational Resources Information Center

    Reichelt, Amy C.; Morris, Margaret J.; Westbrook, Reginald Frederick

    2016-01-01

    High sugar diets reduce hippocampal neurogenesis, which is required for minimizing interference between memories, a process that involves "pattern separation." We provided rats with 2 h daily access to a sucrose solution for 28 d and assessed their performance on a spatial memory task. Sucrose consuming rats discriminated between objects…

  8. 75 FR 44283 - In the Matter of Certain Dynamic Random Access Memory Semiconductors and Products Containing Same...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-07-28

    ... America Corp. of Milpitas, California (collectively ``complainants''). 75 FR 14467-68 (March 25, 2010... COMMISSION In the Matter of Certain Dynamic Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of a Commission Determination Not To Review an Initial...

  9. Encoding and Retrieval Processes Involved in the Access of Source Information in the Absence of Item Memory

    ERIC Educational Resources Information Center

    Ball, B. Hunter; DeWitt, Michael R.; Knight, Justin B.; Hicks, Jason L.

    2014-01-01

    The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were "related" to the target item but never actually studied.…

  10. Vertically Stackable Novel One-Time Programmable Nonvolatile Memory Devices Based on Dielectric Breakdown Mechanism

    NASA Astrophysics Data System (ADS)

    Cho, Seongjae; Lee, Jung Hoon; Ryoo, Kyung-Chang; Jung, Sunghun; Lee, Jong-Ho; Park, Byung-Gook

    2011-12-01

    In this paper, a novel one-time programmable (OTP) nonvolatile memory (NVM) device and its array structures based on silicon technology are proposed. There have been many features of OTP NVM devices utilizing various combinations of channel, breakdown region, barrier, and contact materials. However, this invention can be realized by simple materials and fabrication methods: it is silicon-based materials and fully compatible with the conventional CMOS process. An individual memory cell is a silicon diode vertically integrated. Historically, OTP memories were widely used for read-only-memory (ROM) in the central processing unit (CPU) of the computer systems. By implanting the nanoscale fabrication technology into the concept of OTP memory, innovative high-density NVM appliances for massive storage media becomes very promising. The program operation is performed by breaking down the thin oxide layer between pn doped structure and wordline (WL) and its state can be sensed by the leakage current through the broken oxide. Since this invention is based on neither transistor structure nor charge-based mechanism, it is highly reliable and functional for the ultra-large scale integration. The feasibility of its stacked array will be also checked.

  11. Feasibility study of molecular memory device based on DNA using methylation to store information

    NASA Astrophysics Data System (ADS)

    Jiang, Liming; Qiu, Wanzhi; Al-Dirini, Feras; Hossain, Faruque M.; Evans, Robin; Skafidas, Efstratios

    2016-07-01

    DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

  12. SEMICONDUCTOR DEVICES Density-controllable nonvolatile memory devices having metal nanocrystals through chemical synthesis and assembled by spin-coating technique

    NASA Astrophysics Data System (ADS)

    Guangli, Wang; Yubin, Chen; Yi, Shi; Lin, Pu; Lijia, Pan; Rong, Zhang; Youdou, Zheng

    2010-12-01

    A novel two-step method is employed, for the first time, to fabricate nonvolatile memory devices that have metal nanocrystals. First, size-averaged Au nanocrystals are synthesized chemically; second, they are assembled into memory devices by a spin-coating technique at room temperature. This attractive approach makes it possible to tailor the diameter and control the density of nanocrystals individually. In addition, processes at room temperature prevent Au diffusion, which is a main concern for the application of metal nanocrystal-based memory. The experimental results, both the morphology characterization and the electrical measurements, reveal that there is an optimum density of nanocrystal monolayer to balance between long data retention and a large hysteresis memory window. At the same time, density-controllable devices could also feed the preferential emphasis on either memory window or retention time. All these facts confirm the advantages and novelty of our two-step method.

  13. System and method for programmable bank selection for banked memory subsystems

    DOEpatents

    Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan

    2010-09-07

    A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

  14. Multi-layered nanocomposite dielectrics for high density organic memory devices

    NASA Astrophysics Data System (ADS)

    Kang, Moonyeong; Chung, Kyungwha; Baeg, Kang-Jun; Kim, Dong Ha; Kim, Choongik

    2015-01-01

    We fabricated organic memory devices with metal-pentacene-insulator-silicon structure which contain double dielectric layers comprising 3D pattern of Au nanoparticles (Au NPs) and block copolymer (PS-b-P2VP). The role of Au NPs is to charge/discharge carriers upon applied voltage, while block copolymer helps to form highly ordered Au NP patterns in the dielectric layer. Double-layered nanocomposite dielectrics enhanced the charge trap density (i.e., trapped charge per unit area) by Au NPs, resulting in increase of the memory window (ΔVth).

  15. Distribution of nanoscale nuclei in the amorphous dome of a phase change random access memory

    SciTech Connect

    Lee, Bong-Sub Darmawikarta, Kristof; Abelson, John R.; Raoux, Simone; Shih, Yen-Hao; Zhu, Yu

    2014-02-17

    The nanoscale crystal nuclei in an amorphous Ge{sub 2}Sb{sub 2}Te{sub 5} bit in a phase change memory device were evaluated by fluctuation transmission electron microscopy. The quench time in the device (∼10 ns) afforded more and larger nuclei in the melt-quenched state than in the as-deposited state. However, nuclei were even more numerous and larger in a test structure with a longer quench time (∼100 ns), verifying the prediction of nucleation theory that slower cooling produces more nuclei. It also demonstrates that the thermal design of devices will strongly influence the population of nuclei, and thus the speed and data retention characteristics.

  16. Resistive switching memory devices based on electrical conductance tuning in poly(4-vinyl phenol)-oxadiazole composites.

    PubMed

    Sun, Yanmei; Miao, Fengjuan; Li, Rui; Wen, Dianzhong

    2015-11-28

    Nonvolatile memory devices, based on electrical conductance tuning in thin films of poly(4-vinyl phenol) (PVP) and 2-(4-tert-butylphenyl)-5-(4-biphenylyl)-1,3,4-oxadiazole (PBD) composites, are fabricated. The current-voltage characteristics of the fabricated devices show different electrical conductance behaviors, such as the write-once read-many-times (WORM) memory effect, the rewritable flash memory effect and insulator behavior, which depend on the content of PBD in the PVP + PBD composites. The OFF and ON states of the WORM and rewritable flash memory devices are stable under a constant voltage stress or a continuous pulse voltage stress at a read voltage. The memory mechanism is deduced from the modeling of the nature of currents in both states in the devices. PMID:26490192

  17. Extremely small test cell structure for resistive random access memory element with removable bottom electrode

    SciTech Connect

    Koh, Sang-Gyu; Kishida, Satoru; Kinoshita, Kentaro

    2014-02-24

    We established a method of preparing an extremely small memory cell by fabricating a resistive random access memory (ReRAM) structure on the tip of a cantilever of an atomic force microscope. This structure has the high robustness against the drift of the cantilever, and the effective cell size was estimated to be less than 10 nm in diameter due to the electric field concentration at the tip of the cantilever, which was confirmed using electric field simulation. The proposed structure, which has a removable bottom electrode, enables not only the preparation of a tiny ReRAM structure but also the performance of unique experiments, by making the most of its high robustness against the drift of the cantilever.

  18. A human factors approach to adapted access device prescription and customization.

    PubMed

    August, S; Weiss, P L

    1992-01-01

    Adapted access device prescription and customization is often a lengthy and cumbersome process. To date, few objective procedures are available to assist in the prescription process. Rather, clinician and client rely on a trial-and-error approach that is often severely constrained by the size of their adaptive device collection as well as the extent of clinical expertise. Furthermore, the large number of available options and lack of information delineating the mechanical and physical characteristics of these devices means that therapists must take time away from direct clinical contact to probe each adaptation in detail. There is available in the human factors domain a body of literature that is highly relevant to adapted access. Of particular interest are the studies that have addressed issues related to the suitability of standard and alternative input devices in terms of task productivity (via improvements in input speed, accuracy, and endurance), and their ability to minimize the risk of acute and chronic work-related dysfunction. This paper aims to consider the relevance of human factors research for physically disabled individuals. Three human factors issues--digit travel, digit loading, and device positioning--have been selected as representative of factors important in the configuration of adapted access devices.

  19. Effects of automatic/controlled access processes on semantic memory in Alzheimer's disease.

    PubMed

    Arroyo-Anlló, Eva M; Bellouard, Stéphanie; Ingrand, Pierre; Gil, Roger

    2011-01-01

    This study examines the impact of automatic/controlled access processes on the semantic network in 30 patients with Alzheimer's disease (AD). The AD group was compared with a control group using a battery of neuropsychological tests, a variation of Hodges's semantic testing battery, designed to assess semantic knowledge. The AD group had markedly lower scores than the normal group on each semantic test, but with a different degree of deterioration depending on the nature of the processes (controlled/automatic) in accessing the semantic network. AD patients had poorer performances on the explicit semantic tasks mainly involving controlled-process access (e.g., the WAIS Similarities Subtest) than those involving mainly automatic-process access (e.g., the Verbal Automatism test). Analyses of confidence intervals allowed a gradient of impaired performances in increasing order to be elaborated: a) the Verbal Automatism test, b) the WAIS Vocabulary Subtest, c) the WAIS Information Subtest, d) the Letter Fluency Task, e) Naming as a Response to Definition, f) the Category Fluency Task, g) the WAIS Similarities Subtest, and h) the Oral Denomination 80 Test. The results of our study suggest that explicit semantic tasks needing passive or automatic processes to access semantic memory would be better preserved in AD. PMID:21471640

  20. Calculation of energy-barrier lowering by incoherent switching in spin-transfer torque magnetoresistive random-access memory

    SciTech Connect

    Munira, Kamaram; Visscher, P. B.

    2015-05-07

    To make a useful spin-transfer torque magnetoresistive random-access memory (STT-MRAM) device, it is necessary to be able to calculate switching rates, which determine the error rates of the device. In a single-macrospin model, one can use a Fokker-Planck equation to obtain a low-current thermally activated rate ∝exp(−E{sub eff}/k{sub B}T). Here, the effective energy barrier E{sub eff} scales with the single-macrospin energy barrier KV, where K is the effective anisotropy energy density and V the volume. A long-standing paradox in this field is that the actual energy barrier appears to be much smaller than this. It has been suggested that incoherent motions may lower the barrier, but this has proved difficult to quantify. In the present paper, we show that the coherent precession has a magnetostatic instability, which allows quantitative estimation of the energy barrier and may resolve the paradox.

  1. A light incident angle switchable ZnO nanorod memristor: reversible switching behavior between two non-volatile memory devices.

    PubMed

    Park, Jinjoo; Lee, Seunghyup; Lee, Junghan; Yong, Kijung

    2013-11-26

    A light incident angle selectivity of a memory device is demonstrated. As a model system, the ZnO resistive switching device has been selected. Electrical signal is reversibly switched between memristor and resistor behaviors by modulating the light incident angle on the device. Moreover, a liquid passivation layer is introduced to achieve stable and reversible exchange between the memristor and WORM behaviors.

  2. Digital memory device based on tobacco mosaic virus conjugated with nanoparticles.

    PubMed

    Tseng, Ricky J; Tsai, Chunglin; Ma, Liping; Ouyang, Jianyong; Ozkan, Cengiz S; Yang, Yang

    2006-10-01

    Nanostructured viruses are attractive for use as templates for ordering quantum dots to make self-assembled building blocks for next-generation electronic devices. So far, only a few types of electronic devices have been fabricated from biomolecules due to the lack of charge transport through biomolecular junctions. Here, we show a novel electronic memory effect by incorporating platinum nanoparticles into tobacco mosaic virus. The memory effect is based on conductance switching, which leads to the occurrence of bistable states with an on/off ratio larger than three orders of magnitude. The mechanism of this process is attributed to charge trapping in the nanoparticles for data storage and a tunnelling process in the high conductance state. Such hybrid bio-inorganic nanostructures show promise for applications in future nanoelectronics.

  3. PANATIKI: A Network Access Control Implementation Based on PANA for IoT Devices

    PubMed Central

    Sanchez, Pedro Moreno; Lopez, Rafa Marin; Gomez Skarmeta, Antonio F.

    2013-01-01

    Internet of Things (IoT) networks are the pillar of recent novel scenarios, such as smart cities or e-healthcare applications. Among other challenges, these networks cover the deployment and interaction of small devices with constrained capabilities and Internet protocol (IP)-based networking connectivity. These constrained devices usually require connection to the Internet to exchange information (e.g., management or sensing data) or access network services. However, only authenticated and authorized devices can, in general, establish this connection. The so-called authentication, authorization and accounting (AAA) services are in charge of performing these tasks on the Internet. Thus, it is necessary to deploy protocols that allow constrained devices to verify their credentials against AAA infrastructures. The Protocol for Carrying Authentication for Network Access (PANA) has been standardized by the Internet engineering task force (IETF) to carry the Extensible Authentication Protocol (EAP), which provides flexible authentication upon the presence of AAA. To the best of our knowledge, this paper is the first deep study of the feasibility of EAP/PANA for network access control in constrained devices. We provide light-weight versions and implementations of these protocols to fit them into constrained devices. These versions have been designed to reduce the impact in standard specifications. The goal of this work is two-fold: (1) to demonstrate the feasibility of EAP/PANA in IoT devices; (2) to provide the scientific community with the first light-weight interoperable implementation of EAP/PANA for constrained devices in the Contiki operating system (Contiki OS), called PANATIKI. The paper also shows a testbed, simulations and experimental results obtained from real and simulated constrained devices. PMID:24189332

  4. PANATIKI: a network access control implementation based on PANA for IoT devices.

    PubMed

    Moreno Sanchez, Pedro; Marin Lopez, Rafa; Gomez Skarmeta, Antonio F

    2013-01-01

    Internet of Things (IoT) networks are the pillar of recent novel scenarios, such as smart cities or e-healthcare applications. Among other challenges, these networks cover the deployment and interaction of small devices with constrained capabilities and Internet protocol (IP)-based networking connectivity. These constrained devices usually require connection to the Internet to exchange information (e.g., management or sensing data) or access network services. However, only authenticated and authorized devices can, in general, establish this connection. The so-called authentication, authorization and accounting (AAA) services are in charge of performing these tasks on the Internet. Thus, it is necessary to deploy protocols that allow constrained devices to verify their credentials against AAA infrastructures. The Protocol for Carrying Authentication for Network Access (PANA) has been standardized by the Internet engineering task force (IETF) to carry the Extensible Authentication Protocol (EAP), which provides flexible authentication upon the presence of AAA. To the best of our knowledge, this paper is the first deep study of the feasibility of EAP/PANA for network access control in constrained devices. We provide light-weight versions and implementations of these protocols to fit them into constrained devices. These versions have been designed to reduce the impact in standard specifications. The goal of this work is two-fold: (1) to demonstrate the feasibility of EAP/PANA in IoT devices; (2) to provide the scientific community with the first light-weight interoperable implementation of EAP/PANA for constrained devices in the Contiki operating system (Contiki OS), called PANATIKI. The paper also shows a testbed, simulations and experimental results obtained from real and simulated constrained devices. PMID:24189332

  5. PANATIKI: a network access control implementation based on PANA for IoT devices.

    PubMed

    Moreno Sanchez, Pedro; Marin Lopez, Rafa; Gomez Skarmeta, Antonio F

    2013-11-01

    Internet of Things (IoT) networks are the pillar of recent novel scenarios, such as smart cities or e-healthcare applications. Among other challenges, these networks cover the deployment and interaction of small devices with constrained capabilities and Internet protocol (IP)-based networking connectivity. These constrained devices usually require connection to the Internet to exchange information (e.g., management or sensing data) or access network services. However, only authenticated and authorized devices can, in general, establish this connection. The so-called authentication, authorization and accounting (AAA) services are in charge of performing these tasks on the Internet. Thus, it is necessary to deploy protocols that allow constrained devices to verify their credentials against AAA infrastructures. The Protocol for Carrying Authentication for Network Access (PANA) has been standardized by the Internet engineering task force (IETF) to carry the Extensible Authentication Protocol (EAP), which provides flexible authentication upon the presence of AAA. To the best of our knowledge, this paper is the first deep study of the feasibility of EAP/PANA for network access control in constrained devices. We provide light-weight versions and implementations of these protocols to fit them into constrained devices. These versions have been designed to reduce the impact in standard specifications. The goal of this work is two-fold: (1) to demonstrate the feasibility of EAP/PANA in IoT devices; (2) to provide the scientific community with the first light-weight interoperable implementation of EAP/PANA for constrained devices in the Contiki operating system (Contiki OS), called PANATIKI. The paper also shows a testbed, simulations and experimental results obtained from real and simulated constrained devices.

  6. Analysis and modeling of resistive switching mechanisms oriented to resistive random-access memory

    NASA Astrophysics Data System (ADS)

    Huang, Da; Wu, Jun-Jie; Tang, Yu-Hua

    2013-03-01

    With the progress of the semiconductor industry, the resistive random-access memory (RAM) has drawn increasing attention. The discovery of the memristor has brought much attention to this study. Research has focused on the resistive switching characteristics of different materials and the analysis of resistive switching mechanisms. We discuss the resistive switching mechanisms of different materials in this paper and analyze the differences of those mechanisms from the view point of circuitry to establish their respective circuit models. Finally, simulations are presented. We give the prospect of using different materials in resistive RAM on account of their resistive switching mechanisms, which are applied to explain their resistive switchings.

  7. Random access memory immune to single event upset using a T-resistor

    DOEpatents

    Ochoa, Jr., Agustin

    1989-01-01

    In a random access memory cell, a resistance "T" decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell.

  8. A random access memory immune to single event upset using a T-Resistor

    DOEpatents

    Ochoa, A. Jr.

    1987-10-28

    In a random access memory cell, a resistance ''T'' decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell. 4 figs.

  9. Spin-transfer-torque efficiency enhanced by edge-damage of perpendicular magnetic random access memories

    SciTech Connect

    Song, Kyungmi; Lee, Kyung-Jin

    2015-08-07

    We numerically investigate the effect of magnetic and electrical damages at the edge of a perpendicular magnetic random access memory (MRAM) cell on the spin-transfer-torque (STT) efficiency that is defined by the ratio of thermal stability factor to switching current. We find that the switching mode of an edge-damaged cell is different from that of an undamaged cell, which results in a sizable reduction in the switching current. Together with a marginal reduction of the thermal stability factor of an edge-damaged cell, this feature makes the STT efficiency large. Our results suggest that a precise edge control is viable for the optimization of STT-MRAM.

  10. Information matching the content of visual working memory is prioritized for conscious access.

    PubMed

    Gayet, Surya; Paffen, Chris L E; Van der Stigchel, Stefan

    2013-12-01

    Visual working memory (VWM) is used to retain relevant information for imminent goal-directed behavior. In the experiments reported here, we found that VWM helps to prioritize relevant information that is not yet available for conscious experience. In five experiments, we demonstrated that information matching VWM content reaches visual awareness faster than does information not matching VWM content. Our findings suggest a functional link between VWM and visual awareness: The content of VWM is recruited to funnel down the vast amount of sensory input to that which is relevant for subsequent behavior and therefore requires conscious access.

  11. Microstructural Characterization in Reliability Measurement of Phase Change Random Access Memory

    NASA Astrophysics Data System (ADS)

    Bae, Junsoo; Hwang, Kyuman; Park, Kwangho; Jeon, Seongbu; Kang, Dae-hwan; Park, Soonoh; Ahn, Juhyeon; Kim, Seoksik; Jeong, Gitae; Chung, Chilhee

    2011-04-01

    The cell failures after cycling endurance in phase-change random access memory (PRAM) have been classified into three groups, which have been analyzed by transmission electron microscopy (TEM). Both stuck reset of the set state (D0) and stuck set of the reset state (D1) are due to a void created inside GeSbTe (GST) film or thereby lowering density of GST film. The decrease of the both set and reset resistances that leads to the tails from the reset distribution are induced from the Sb increase with cycles.

  12. A source-side injection erasable programmable read-only-memory (SI-EPROM) device

    NASA Astrophysics Data System (ADS)

    Wu, A. T.; Chan, T. Y.; Ko, P. K.; Hu, C.

    1986-09-01

    A new erasable programmable read-only memory (EPROM) device with promise for low-voltage high-speed programming is described. This device is an asymmetrical n-channel stacked-gate MOSFET, with a short weak gate-control channel region introduced close to the source. At high gate bias, a strong channel electric field is created in this local region even at a relatively low drain voltage. Furthermore, the gate oxide field in this region also aids the injection of hot electrons into the floating gate. As a result, the source-side injection EPROM has shown 10-microsec programming speed at a drain voltage of 5 V.

  13. Interfacial behavior of resistive switching in ITO-PVK-Al WORM memory devices

    NASA Astrophysics Data System (ADS)

    Whitcher, T. J.; Woon, K. L.; Wong, W. S.; Chanlek, N.; Nakajima, H.; Saisopa, T.; Songsiriritthigul, P.

    2016-02-01

    Understanding the mechanism of resistive switching in a memory device is fundamental in order to improve device performance. The mechanism of current switching in a basic organic write-once read-many (WORM) memory device is investigated by determining the energy level alignments of indium tin oxide (ITO), poly(9-vinylcarbazole) (PVK) and aluminum (Al) using x-ray and ultraviolet photoelectron spectroscopy, current-voltage characterization and Auger depth profiling. The current switching mechanism was determined to be controlled by the interface between the ITO and the PVK. The electric field applied across the device causes the ITO from the uneven surface of the anode to form metallic filaments through the PVK, causing a shorting effect within the device leading to increased conduction. This was found to be independent of the PVK thickness, although the switch-on voltage was non-linearly dependent on the thickness. The formation of these filaments also caused the destruction of the interfacial dipole at the PVK-Al interface.

  14. Well-defined star-shaped donor-acceptor conjugated molecules for organic resistive memory devices.

    PubMed

    Wu, Hung-Chin; Zhang, Jicheng; Bo, Zhishan; Chen, Wen-Chang

    2015-09-28

    Solution processable star-shaped donor-acceptor (D-A) conjugated molecules (TPA-T-NI and TPA-3T-NI) with an electron-donating triphenylamine (TPA) core, three thienylene or terthienylene spacers, and three 1.8-naphthalimide (NI) electron-withdrawing end-groups are explored for the first time as charge storage materials for resistor-type memory devices owing to the efficient electric charge transfer and trapping.

  15. Well-defined star-shaped donor-acceptor conjugated molecules for organic resistive memory devices.

    PubMed

    Wu, Hung-Chin; Zhang, Jicheng; Bo, Zhishan; Chen, Wen-Chang

    2015-09-28

    Solution processable star-shaped donor-acceptor (D-A) conjugated molecules (TPA-T-NI and TPA-3T-NI) with an electron-donating triphenylamine (TPA) core, three thienylene or terthienylene spacers, and three 1.8-naphthalimide (NI) electron-withdrawing end-groups are explored for the first time as charge storage materials for resistor-type memory devices owing to the efficient electric charge transfer and trapping. PMID:26255879

  16. Reducing operation voltages by introducing a low-k switching layer in indium–tin-oxide-based resistance random access memory

    NASA Astrophysics Data System (ADS)

    Jin, Fu-Yuan; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Pan, Chih-Hung; Lin, Chih-Yang; Chen, Po-Hsun; Chen, Min-Chen; Huang, Hui-Chun; Lo, Ikai; Zheng, Jin-Cheng; Sze, Simon M.

    2016-06-01

    In this letter, we inserted a low dielectric constant (low-k) or high dielectric constant (high-k) material as a switching layer in indium–tin-oxide-based resistive random-access memory. After measuring the two samples, we found that the low-k material device has very low operating voltages (‑80 and 110 mV for SET and RESET operations, respectively). Current fitting results were then used with the COMSOL software package to simulate electric field distribution in the layers. After combining the electrical measurement results with simulations, a conduction model was proposed to explain resistance switching behaviors in the two structures.

  17. Reducing operation voltages by introducing a low-k switching layer in indium-tin-oxide-based resistance random access memory

    NASA Astrophysics Data System (ADS)

    Jin, Fu-Yuan; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Pan, Chih-Hung; Lin, Chih-Yang; Chen, Po-Hsun; Chen, Min-Chen; Huang, Hui-Chun; Lo, Ikai; Zheng, Jin-Cheng; Sze, Simon M.

    2016-06-01

    In this letter, we inserted a low dielectric constant (low-k) or high dielectric constant (high-k) material as a switching layer in indium-tin-oxide-based resistive random-access memory. After measuring the two samples, we found that the low-k material device has very low operating voltages (-80 and 110 mV for SET and RESET operations, respectively). Current fitting results were then used with the COMSOL software package to simulate electric field distribution in the layers. After combining the electrical measurement results with simulations, a conduction model was proposed to explain resistance switching behaviors in the two structures.

  18. 40-Gbit/s photonic random access memory for photonic packet-switched networks

    NASA Astrophysics Data System (ADS)

    Takahashi, Ryo; Nakahara, Tatsushi; Takahata, Kiyoto; Takenouchi, Hirokazu; Yasui, Takako; Kondo, Naoto; Suzuki, Hiroyuki

    2004-06-01

    We present a photonic random access memory (RAM) that can write and read high-speed asynchronous burst optical packets freely by specifying addresses. The photonic RAM consists of an optical clock-pulse generator, an all-optical serial-to-parallel converter, a photonic parallel-to-serial converter, all developed by us, and a CMOS RAM as a storage medium. Unlike conventional optical buffers, which merely function as optical delay lines, the photonic RAM provides various advantages, such as compactness, large capacity, long-term storage, and random access at an arbitrary timing for ultrafast asynchronous burst optical packets. We experimentally confirm its basic operation for 40-Gbit/s 16-bit optical packets.

  19. Astronaut Sherwood Spring on RMS checks joints on the ACCESS device

    NASA Technical Reports Server (NTRS)

    1985-01-01

    Astronaut Sherwood C. Spring, anchored to the foot restraint on the remote manipulator system (RMS) arm, checks joints on the tower-like Assembly Concept for Construction of Erectable Space Structures (ACCESS) device extending from the payload bay as the Atlantis flies over white clouds and blue ocean waters. The Gulf of Mexico waters form the backdrop for the scene.

  20. 46 CFR 4.06-15 - Accessibility of chemical testing devices.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... sufficient number of urine-specimen collection and shipping kits meeting the requirements of 49 CFR part 40... 46 Shipping 1 2010-10-01 2010-10-01 false Accessibility of chemical testing devices. 4.06-15... MARINE CASUALTIES AND INVESTIGATIONS Mandatory Chemical Testing Following Serious Marine...

  1. 46 CFR 4.06-15 - Accessibility of chemical testing devices.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... sufficient number of urine-specimen collection and shipping kits meeting the requirements of 49 CFR part 40... 46 Shipping 1 2011-10-01 2011-10-01 false Accessibility of chemical testing devices. 4.06-15... MARINE CASUALTIES AND INVESTIGATIONS Mandatory Chemical Testing Following Serious Marine...

  2. 46 CFR 4.06-15 - Accessibility of chemical testing devices.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... sufficient number of urine-specimen collection and shipping kits meeting the requirements of 49 CFR part 40... 46 Shipping 1 2012-10-01 2012-10-01 false Accessibility of chemical testing devices. 4.06-15... MARINE CASUALTIES AND INVESTIGATIONS Mandatory Chemical Testing Following Serious Marine...

  3. 46 CFR 4.06-15 - Accessibility of chemical testing devices.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... sufficient number of urine-specimen collection and shipping kits meeting the requirements of 49 CFR part 40... 46 Shipping 1 2014-10-01 2014-10-01 false Accessibility of chemical testing devices. 4.06-15... MARINE CASUALTIES AND INVESTIGATIONS Mandatory Chemical Testing Following Serious Marine...

  4. 46 CFR 4.06-15 - Accessibility of chemical testing devices.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... sufficient number of urine-specimen collection and shipping kits meeting the requirements of 49 CFR part 40... 46 Shipping 1 2013-10-01 2013-10-01 false Accessibility of chemical testing devices. 4.06-15... MARINE CASUALTIES AND INVESTIGATIONS Mandatory Chemical Testing Following Serious Marine...

  5. Preservice Teachers' Experiences on Accessing Course Materials Using Mobile Devices

    ERIC Educational Resources Information Center

    Unal, Zafer; Unal, Aslihan

    2014-01-01

    This study investigates and reports the first time experiences of mobile device users accessing the course materials on both the web and mobile version of course management system (Web Moodle & Mobile Moodle) during an online course offered at the University of South Florida, St. Petersburg College of Education.

  6. 47 CFR 79.106 - Video description and emergency information accessibility requirements for recording devices.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... COMMISSION (CONTINUED) BROADCAST RADIO SERVICES ACCESSIBILITY OF VIDEO PROGRAMMING Apparatus § 79.106 Video..., 2015, all apparatus that is designed to record video programming transmitted simultaneously with sound...): Apparatus includes the physical device and the video player(s) capable of displaying video...

  7. High Performance Transparent Transistor Memory Devices Using Nano-Floating Gate of Polymer/ZnO Nanocomposites

    PubMed Central

    Shih, Chien-Chung; Lee, Wen-Ya; Chiu, Yu-Cheng; Hsu, Han-Wen; Chang, Hsuan-Chun; Liu, Cheng-Liang; Chen, Wen-Chang

    2016-01-01

    Nano-floating gate memory devices (NFGM) using metal nanoparticles (NPs) covered with an insulating polymer have been considered as a promising electronic device for the next-generation nonvolatile organic memory applications NPs. However, the transparency of the device with metal NPs is restricted to 60~70% due to the light absorption in the visible region caused by the surface plasmon resonance effects of metal NPs. To address this issue, we demonstrate a novel NFGM using the blends of hole-trapping poly (9-(4-vinylphenyl) carbazole) (PVPK) and electron-trapping ZnO NPs as the charge storage element. The memory devices exhibited a remarkably programmable memory window up to 60 V during the program/erase operations, which was attributed to the trapping/detrapping of charge carriers in ZnO NPs/PVPK composite. Furthermore, the devices showed the long-term retention time (>105 s) and WRER test (>200 cycles), indicating excellent electrical reliability and stability. Additionally, the fabricated transistor memory devices exhibited a relatively high transparency of 90% at the wavelength of 500 nm based on the spray-coated PEDOT:PSS as electrode, suggesting high potential for transparent organic electronic memory devices. PMID:26831222

  8. High performance of graphene oxide-doped silicon oxide-based resistance random access memory

    PubMed Central

    2013-01-01

    In this letter, a double active layer (Zr:SiO x /C:SiO x ) resistive switching memory device with outstanding performance is presented. Through current fitting, hopping conduction mechanism is found in both high-resistance state (HRS) and low-resistance state (LRS) of double active layer RRAM devices. By analyzing Raman and FTIR spectra, we observed that graphene oxide exists in C:SiO x layer. Compared with single Zr:SiO x layer structure, Zr:SiO x /C:SiO x structure has superior performance, including low operating current, improved uniformity in both set and reset processes, and satisfactory endurance characteristics, all of which are attributed to the double-layer structure and the existence of graphene oxide flakes formed by the sputter process. PMID:24261454

  9. Limitations of Closing Percutaneous Transthoracic Ventricular Access Ports Using a Commercial Collagen Vascular Closure Device

    PubMed Central

    Barbash, Israel M.; Saikus, Christina E.; Ratnayaka, Kanishka; Faranesh, Anthony Z.; Kocaturk, Ozgur; Wu, Vincent; Bell, Jamie A.; Schenke, William H.; Raman, Venkatesh K.; Lederman, Robert J.

    2011-01-01

    INTRODUCTION Closed-chest access and closure of direct cardiac punctures may enable a range of therapeutic procedures. We evaluate the safety and feasibility of closing percutaneous direct ventricular access sites using a commercial collagen-based femoral artery closure device. METHODS Yorkshire swine underwent percutaneous transthoracic left ventricular access (n=13). The access port was closed using a commercial collagen-based vascular closure device (Angio-Seal, St Jude Medical) with or without prior separation of the pericardial layers by instillation of fluid into the pericardial space (“permissive pericardial tamponade”). After initial nonsurvival feasibility experiments (n=6); animals underwent one-week (n=3) or six-week follow up (n=4). RESULTS In naïve animals, the collagen plug tended to deploy outside the parietal pericardium, where it failed to accomplish hemostasis. “Permissive pericardial tamponade” was created under MRI, and accomplished early hemostasis by allowing the collagen sponge to seat on the epicardial surface inside the pericardium. After successful closure, six of seven animals accumulated a large pericardial effusion 5±1 days after closure. Despite percutaneous drainage during 6-week follow-up, the large pericardial effusion recurred in half, and was lethal in one. CONCLUSIONS A commercial collagen based vascular closure device may achieve temporary but not durable hemostasis when closing a direct left ventricular puncture port, but only after intentional pericardial separation. These insights may contribute to development of a superior device solution. Elective clinical application of this device to close apical access ports should be avoided. PMID:21234923

  10. Analyzing the Energy and Power Consumption of Remote Memory Accesses in the OpenSHMEM Model

    SciTech Connect

    Jana, Siddhartha; Hernandez, Oscar R; Poole, Stephen W; Hsu, Chung-Hsing; Chapman, Barbara

    2014-01-01

    PGAS models like OpenSHMEM provide interfaces to explicitly initiate one-sided remote memory accesses among processes. In addition, the model also provides synchronizing barriers to ensure a consistent view of the distributed memory at different phases of an application. The incorrect use of such interfaces affects the scalability achievable while using a parallel programming model. This study aims at understanding the effects of these constructs on the energy and power consumption behavior of OpenSHMEM applications. Our experiments show that cost incurred in terms of the total energy and power consumed depends on multiple factors across the software and hardware stack. We conclude that there is a significant impact on the power consumed by the CPU and DRAM due to multiple factors including the design of the data transfer patterns within an application, the design of the communication protocols within a middleware, the architectural constraints laid by the interconnect solutions, and also the levels of memory hierarchy within a compute node. This work motivates treating energy and power consumption as important factors while designing compute solutions for current and future distributed systems.

  11. Multiple social identities and stereotype threat: imbalance, accessibility, and working memory.

    PubMed

    Rydell, Robert J; McConnell, Allen R; Beilock, Sian L

    2009-05-01

    In 4 experiments, the authors showed that concurrently making positive and negative self-relevant stereotypes available about performance in the same ability domain can eliminate stereotype threat effects. Replicating past work, the authors demonstrated that introducing negative stereotypes about women's math performance activated participants' female social identity and hurt their math performance (i.e., stereotype threat) by reducing working memory. Moving beyond past work, it was also demonstrated that concomitantly presenting a positive self-relevant stereotype (e.g., college students are good at math) increased the relative accessibility of females' college student identity and inhibited their gender identity, eliminating attendant working memory deficits and contingent math performance decrements. Furthermore, subtle manipulations in questions presented in the demographic section of a math test eliminated stereotype threat effects that result from women reporting their gender before completing the test. This work identifies the motivated processes through which people's social identities became active in situations in which self-relevant stereotypes about a stigmatized group membership and a nonstigmatized group membership were available. In addition, it demonstrates the downstream consequences of this pattern of activation on working memory and performance.

  12. Making working memory work: The effects of extended practice on focus capacity and the processes of updating, forward access, and random access

    PubMed Central

    Price, John M.; Colflesh, Gregory J. H.; Cerella, John; Verhaeghen, Paul

    2014-01-01

    We investigated the effects of 10 hours of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. PMID:24486803

  13. Charging effect in Au nanoparticle memory device with biomolecule binding mechanism.

    PubMed

    Jung, Sung Mok; Kim, Hyung-Jun; Kim, Bong-Jin; Yoon, Tae-Sik; Kim, Yong-Sang; Lee, Hyun Ho

    2011-07-01

    Organic memory device having gold nanoparticle (Au NPs) has been introduced in the structure of metal-pentacene-insulator-silicon (MPIS) capacitor device, where the Au NPs layer was formed by a new bonding method. Biomolecule binding mechanism between streptavidin and biotin was used as a strong binding method for the formation of monolayered Au NPs on polymeric dielectric of poly vinyl alcohol (PVA). The self-assembled Au NPs was functioned to show storages of charge in the MPIS device. The binding by streptavidin and biotin was confirmed by AFM and UV-VIS. The UV-VIS absorption of the Au NPs was varied at 515 nm and 525 nm depending on the coating of streptavidin. The AFM image showed no formation of multi-stacked layers of the streptavidin-capped Au NPs on biotin-NHS layer. Capacitance-voltage (C-V) performance of the memory device was measured to investigate the charging effect from Au NPs. In addition, charge retention by the Au NPs storage was tested to show 10,000 s in the C-V curve.

  14. Catheter Securement Systems for Peripherally Inserted and Nontunneled Central Vascular Access Devices: Clinical Evaluation of a Novel Sutureless Device.

    PubMed

    Krenik, Karen M; Smith, Graham E; Bernatchez, Stéphanie F

    2016-01-01

    Sutureless catheter securement systems are intended to eliminate risks associated with sutures. The clinical acceptability of a novel system was investigated compared with the current method of securement for peripherally inserted central catheters (19 facilities using StatLock or sutures) or nontunneled central vascular access devices (3 facilities using StatLock or sutures or HubGuard + Sorbaview Shield). More than 94% of respondents rated the novel system as same, better, or much better than their current product. More than 82% of respondents were willing to replace their current system with the new one. PMID:27379679

  15. Physical aspects of low power synapses based on phase change memory devices

    NASA Astrophysics Data System (ADS)

    Suri, Manan; Bichler, Olivier; Querlioz, Damien; Traoré, Boubacar; Cueto, Olga; Perniola, Luca; Sousa, Veronique; Vuillaume, Dominique; Gamrat, Christian; DeSalvo, Barbara

    2012-09-01

    In this work, we demonstrate how phase change memory (PCM) devices can be used to emulate biologically inspired synaptic functions in particular, potentiation and depression, important for implementing neuromorphic hardware. PCM devices with different chalcogenide materials are fabricated and characterized. The asymmetry between the potentiation and depression behaviors of the PCM is stressed. Detailed multi-physical simulations are performed to study the underlying physics of the synaptic behavior of PCM. A versatile behavioral model and a multi-level circuit-compatible model are developed for system and circuit-level neuromorphic simulations. We propose a unique low-power methodology named the 2-PCM Synapse, to use PCM devices as synapses in large scale neuromorphic systems. To show the strength of our proposed solution, we efficiently simulated fully connected feed-forward spiking neural network capable of complex visual pattern extraction from real world data.

  16. Response of the Ubiquitin-Proteasome System to Memory Retrieval After Extended-Access Cocaine or Saline Self-Administration.

    PubMed

    Werner, Craig T; Milovanovic, Mike; Christian, Daniel T; Loweth, Jessica A; Wolf, Marina E

    2015-12-01

    The ubiquitin-proteasome system (UPS) has been implicated in the retrieval-induced destabilization of cocaine- and fear-related memories in Pavlovian paradigms. However, nothing is known about its role in memory retrieval after self-administration of cocaine, an operant paradigm, or how the length of withdrawal from cocaine may influence retrieval mechanisms. Here, we examined UPS activity after an extended-access cocaine self-administration regimen that leads to withdrawal-dependent incubation of cue-induced cocaine craving. Controls self-administered saline. In initial experiments, memory retrieval was elicited via a cue-induced seeking/retrieval test on withdrawal day (WD) 50-60, when craving has incubated. We found that retrieval of cocaine- and saline-associated memories produced similar increases in polyubiquitinated proteins in the nucleus accumbens (NAc), compared with rats that did not undergo a seeking/retrieval test. Measures of proteasome catalytic activity confirmed similar activation of the UPS after retrieval of saline and cocaine memories. However, in a subsequent experiment in which testing was conducted on WD1, proteasome activity in the NAc was greater after retrieval of cocaine memory than saline memory. Analysis of other brain regions confirmed that effects of cocaine memory retrieval on proteasome activity, relative to saline memory retrieval, depend on withdrawal time. These results, combined with prior studies, suggest that the relationship between UPS activity and memory retrieval depends on training paradigm, brain region, and time elapsed between training and retrieval. The observation that mechanisms underlying cocaine memory retrieval change depending on the age of the memory has implications for development of memory destabilization therapies for cue-induced relapse in cocaine addicts.

  17. Zinc Cadmium Selenide Cladded Quantum Dot Based Electroluminescent and Nonvolatile Memory Devices

    NASA Astrophysics Data System (ADS)

    Al-Amody, Fuad H.

    This dissertation presents electroluminescent (EL) and nonvolatile memory devices fabricated using pseudomorphic ZnCdSe-based cladded quantum dots (QDs). These dots were grown using our own in-school built novel reactor. The EL device was fabricated on a substrate of ITO (indium tin oxide) coated glass with the quantum dots sandwiched between anode and cathode contacts with a small barrier layer on top of the QDs. The importance of these cladded dots is to increase the quantum yield of device. This device is unique as they utilize quantum dots that are pseudomorphic (nearly lattice-matched core and the shell of the dot). In the case of floating quantum dot gate nonvolatile memory, cladded ZnCdSe quantum dots are deposited on single crystalline gate insulator (ZnMgS/ZnMgSe), which is grown using metal-organic chemical vapor deposition (MOCVD). The control gate dielectric layer of the nonvolatile memory is Si3N4 or SiO2 and is grown using plasma enhanced chemical vapor deposition (PECVD). The cladded dots are grown using an improved methodology of photo-assisted microwave plasma metal-organic chemical vapor deposition (PMP-MOCVD) enhanced reactor. The cladding composition of the core and shell of the dots was engineered by the help of ultraviolet light which changed the incorporation of zinc (and hence composition of ZnCdSe). This makes ZnxCd1--xSe-ZnyCd1--y Se QDs to have a low composition of zinc in the core than the cladding (x

  18. Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device.

    PubMed

    Seo, Kyungah; Kim, Insung; Jung, Seungjae; Jo, Minseok; Park, Sangsu; Park, Jubong; Shin, Jungho; Biju, Kuyyadi P; Kong, Jaemin; Lee, Kwanghee; Lee, Byounghun; Hwang, Hyunsang

    2011-06-24

    We demonstrated analog memory, synaptic plasticity, and a spike-timing-dependent plasticity (STDP) function with a nanoscale titanium oxide bilayer resistive switching device with a simple fabrication process and good yield uniformity. We confirmed the multilevel conductance and analog memory characteristics as well as the uniformity and separated states for the accuracy of conductance change. Finally, STDP and a biological triple model were analyzed to demonstrate the potential of titanium oxide bilayer resistive switching device as synapses in neuromorphic devices. By developing a simple resistive switching device that can emulate a synaptic function, the unique characteristics of synapses in the brain, e.g. combined memory and computing in one synapse and adaptation to the outside environment, were successfully demonstrated in a solid state device. PMID:21572200

  19. Synergistic effects of total ionizing dose on single event upset sensitivity in static random access memory under proton irradiation

    NASA Astrophysics Data System (ADS)

    Xiao, Yao; Guo, Hong-Xia; Zhang, Feng-Qi; Zhao, Wen; Wang, Yan-Ping; Zhang, Ke-Ying; Ding, Li-Li; Fan, Xue; Luo, Yin-Hong; Wang, Yuan-Ming

    2014-11-01

    Synergistic effects of the total ionizing dose (TID) on the single event upset (SEU) sensitivity in static random access memories (SRAMs) were studied by using protons. The total dose was cumulated with high flux protons during the TID exposure, and the SEU cross section was tested with low flux protons at several cumulated dose steps. Because of the radiation-induced off-state leakage current increase of the CMOS transistors, the noise margin became asymmetric and the memory imprint effect was observed.

  20. Novel Circuitry Configuration with Paired-Cell Erase Operation for High-Density 90-nm Embedded Resistive Random Access Memory

    NASA Astrophysics Data System (ADS)

    Sato, Yoshihiro; Tsunoda, Koji; Aoki, Masaki; Sugiyama, Yoshihiro

    2009-04-01

    We propose a novel circuitry configuration for high-density 90-nm embedded resistive random access memory (ReRAM). The memory cells are operated at 2 V, and a small memory cell size of 6F2 consisting of a 1.2-V standard transistor and a resistive junction (1T-1R) is designed, where F is the feature size. The unique circuitry configuration is that each pair of source-lines connects to each source-line selective gate. Therefore, erasing is done by a pair of cells in turn in the whole sector, while the reading or programming is done by a random accessing operation. We simulated the ReRAM circuit for read and write operations with SPICE. As a result, we found that 5-ns high-speed read access was obtained in the 256-word lines (WLs) × 256-bit lines (BLs) and that the SET/RESET operation was stable.

  1. Resistive switching characteristics of Al/Si3N4/p-Si MIS-based resistive switching memory devices

    NASA Astrophysics Data System (ADS)

    Kim, Hee-Dong; Yun, Min Ju; Kim, Sungho

    2016-08-01

    In this study, we proposed and demonstrated a self-rectifying property of a silicon nitride (Si3N4)-based resistive random access memory (RRAM) device by employing p-type silicon ( p-Si) as the bottom electrode. The RRAM devices consisting of Al/Si3N4/ p-Si are fabricated by using a low-pressure chemical-vapor deposition and exhibited an intrinsic diode property with non-linear current-voltage ( I-V) behavior. In addition, compared to the conventional metal/insulator/metal (MIM) structure of Al/Si3N4/Ti RRAM cells, the operating current over the entire bias region for the proposed metal/insulator/semiconductor (MIS) cells is dramatically lower because the introduced p-Si bottom electrode efficiently suppresses the current in both the low- and the high resistance states. Then, the results mean that when p-Si is employed as a bottom electrode, the Si3N4-based RRAM cells can be applied to selector-free RRAM cells.

  2. Time-resolved analysis of the set process in an electrical phase-change memory device

    NASA Astrophysics Data System (ADS)

    Kang, Dae-Hwan; Cheong, Byung-ki; Jeong, Jeung-hyun; Lee, Taek Sung; Kim, In Ho; Kim, Won Mok; Huh, Joo-Youl

    2005-12-01

    An experimental investigation was carried out on the kinetic nature of the set process in a phase change memory device by combined analyses of set voltage wave forms and time-resolved low-field resistances. As it turned out, the progress of a set process may be measured in terms of three characteristic times in sequence i.e., threshold switching time tth, incubation time for crystallization tinc, and complete set time tset. These characteristic times are supposed to demarcate, in some measure, different stages of crystallization in the memory material during a set process. Each of these times has a strong dependence on input pulse voltage and particularly threshold switching time tth was found to have an exponentially decaying dependence. The latter may be related to the decreasing capacitance of an amorphous phase-change material with approaching threshold switching.

  3. Comparison of single event upset rates for microelectronic memory devices during interplanetary solar particle events

    NASA Technical Reports Server (NTRS)

    Mckerracher, P. L.; Kinnison, J. D.; Maurer, R. H.

    1993-01-01

    Variability in the methods and models used for single event upset calculations in microelectronic memory devices can lead to a range of possible upset rates. Using heavy ion and proton data for selected DRAM and SRAM memories, we have calculated an array of upset rates in order to compare the Adams worst case interplanetary solar flare model to a model proposed by scientists at the Jet Propulsion Laboratory. In addition, methods of upset rate calculation are compared: the Cosmic Ray Effects on Microelectronics CREME code and a Monte Carlo algorithm developed at the Applied Physics Laboratory. The results show that use of a more realistic, although still conservative, model of the space environment can have significant cost saving benefits.

  4. Subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory for nonvolatile operation

    NASA Astrophysics Data System (ADS)

    Huh, In; Cheon, Woo Young; Choi, Woo Young

    2016-04-01

    A subthreshold-swing-adjustable tunneling-field-effect-transistor-based random-access memory (SAT RAM) has been proposed and fabricated for low-power nonvolatile memory applications. The proposed SAT RAM cell demonstrates adjustable subthreshold swing (SS) depending on stored information: small SS in the erase state ("1" state) and large SS in the program state ("0" state). Thus, SAT RAM cells can achieve low read voltage (Vread) with a large memory window in addition to the effective suppression of ambipolar behavior. These unique features of the SAT RAM are originated from the locally stored charge, which modulates the tunneling barrier width (Wtun) of the source-to-channel tunneling junction.

  5. Sustained Resistive Switching in a Single Cu:7,7,8,8-tetracyanoquinodimethane Nanowire: A Promising Material for Resistive Random Access Memory

    NASA Astrophysics Data System (ADS)

    Basori, Rabaya; Kumar, Manoranjan; Raychaudhuri, Arup K.

    2016-06-01

    We report a new type of sustained and reversible unipolar resistive switching in a nanowire device made from a single strand of Cu:7,7,8,8-tetracyanoquinodimethane (Cu:TCNQ) nanowire (diameter <100 nm) that shows high ON/OFF ratio (~103), low threshold voltage of switching (~3.5 V) and large cycling endurance (>103). This indicates a promising material for high density resistive random access memory (ReRAM) device integration. Switching is observed in Cu:TCNQ single nanowire devices with two different electrode configuration: symmetric (C-Pt/Cu:TCNQ/C-Pt) and asymmetric (Cu/Cu:TCNQ/C-Pt), where contacts connecting the nanowire play an important role. This report also developed a method of separating out the electrode and material contributions in switching using metal-semiconductor-metal (MSM) device model along with a direct 4-probe resistivity measurement of the nanowire in the OFF as well as ON state. The device model was followed by a phenomenological model of current transport through the nanowire device which shows that lowering of potential barrier at the contacts likely occur due to formation of Cu filaments in the interface between nanowire and contact electrodes. We obtain quantitative agreement of numerically analyzed results with the experimental switching data.

  6. Sustained Resistive Switching in a Single Cu:7,7,8,8-tetracyanoquinodimethane Nanowire: A Promising Material for Resistive Random Access Memory.

    PubMed

    Basori, Rabaya; Kumar, Manoranjan; Raychaudhuri, Arup K

    2016-01-01

    We report a new type of sustained and reversible unipolar resistive switching in a nanowire device made from a single strand of Cu:7,7,8,8-tetracyanoquinodimethane (Cu:TCNQ) nanowire (diameter <100 nm) that shows high ON/OFF ratio (~10(3)), low threshold voltage of switching (~3.5 V) and large cycling endurance (>10(3)). This indicates a promising material for high density resistive random access memory (ReRAM) device integration. Switching is observed in Cu:TCNQ single nanowire devices with two different electrode configuration: symmetric (C-Pt/Cu:TCNQ/C-Pt) and asymmetric (Cu/Cu:TCNQ/C-Pt), where contacts connecting the nanowire play an important role. This report also developed a method of separating out the electrode and material contributions in switching using metal-semiconductor-metal (MSM) device model along with a direct 4-probe resistivity measurement of the nanowire in the OFF as well as ON state. The device model was followed by a phenomenological model of current transport through the nanowire device which shows that lowering of potential barrier at the contacts likely occur due to formation of Cu filaments in the interface between nanowire and contact electrodes. We obtain quantitative agreement of numerically analyzed results with the experimental switching data. PMID:27245099

  7. Sustained Resistive Switching in a Single Cu:7,7,8,8-tetracyanoquinodimethane Nanowire: A Promising Material for Resistive Random Access Memory

    PubMed Central

    Basori, Rabaya; Kumar, Manoranjan; Raychaudhuri, Arup K.

    2016-01-01

    We report a new type of sustained and reversible unipolar resistive switching in a nanowire device made from a single strand of Cu:7,7,8,8-tetracyanoquinodimethane (Cu:TCNQ) nanowire (diameter <100 nm) that shows high ON/OFF ratio (~103), low threshold voltage of switching (~3.5 V) and large cycling endurance (>103). This indicates a promising material for high density resistive random access memory (ReRAM) device integration. Switching is observed in Cu:TCNQ single nanowire devices with two different electrode configuration: symmetric (C-Pt/Cu:TCNQ/C-Pt) and asymmetric (Cu/Cu:TCNQ/C-Pt), where contacts connecting the nanowire play an important role. This report also developed a method of separating out the electrode and material contributions in switching using metal-semiconductor-metal (MSM) device model along with a direct 4-probe resistivity measurement of the nanowire in the OFF as well as ON state. The device model was followed by a phenomenological model of current transport through the nanowire device which shows that lowering of potential barrier at the contacts likely occur due to formation of Cu filaments in the interface between nanowire and contact electrodes. We obtain quantitative agreement of numerically analyzed results with the experimental switching data. PMID:27245099

  8. All-solution-processed nonvolatile flexible nano-floating gate memory devices

    NASA Astrophysics Data System (ADS)

    Kim, Chaewon; Song, Ji-Min; Lee, Jang-Sik; Lee, Mi Jung

    2014-01-01

    Organic semiconductors have great potential for future electronic applications owing to their inherent flexibility, low cost, light weight and ability to easily cover large areas. However, all of these advantageous material properties can only be harnessed if simple, cheap and low-temperature fabrication processes, which exclude the need for vacuum deposition and are compatible with flexible plastic substrates, are employed. There are a few solution-based techniques such as spin-coating and inkjet printing that meet the above criteria. In this paper, we describe a novel all-solution-processed nonvolatile memory device fabricated on a flexible plastic substrate. The source, drain and gate electrodes were printed using an inkjet printer with a conducting organic solution, while the semiconducting layer was spin-coated with an n-type polymer. The charge-trapping layer was composed of spin-coated reduced graphene oxide (rGO), which was prepared in the form of a solution using Hummer’s method. The fabricated device was characterized in order to confirm the memory characteristics. Device parameters such as threshold voltage shift, retention/endurance characteristics, mechanical robustness and reliability upon bending were also analyzed.

  9. An annulus fibrosus closure device based on a biodegradable shape-memory polymer network.

    PubMed

    Sharifi, Shahriar; van Kooten, Theo G; Kranenburg, Hendrik-Jan C; Meij, Björn P; Behl, Marc; Lendlein, Andreas; Grijpma, Dirk W

    2013-11-01

    Injuries to the intervertebral disc caused by degeneration or trauma often lead to tearing of the annulus fibrosus (AF) and extrusion of the nucleus pulposus (NP). This can compress nerves and cause lower back pain. In this study, the characteristics of poly(D,L-lactide-co-trimethylene carbonate) networks with shape-memory properties have been evaluated in order to prepare biodegradable AF closure devices that can be implanted minimally invasively. Four different macromers with (D,L-lactide) to trimethylene carbonate (DLLA:TMC) molar ratios of 80:20, 70:30, 60:40 and 40:60 with terminal methacrylate groups and molecular weights of approximately 30 kg mol(-1) were used to prepare the networks by photo-crosslinking. The mechanical properties of the samples and their shape-memory properties were determined at temperatures of 0 °C and 40 °C by tensile tests- and cyclic, thermo-mechanical measurements. At 40 °C all networks showed rubber-like behavior and were flexible with elastic modulus values of 1.7-2.5 MPa, which is in the range of the modulus values of human annulus fibrosus tissue. The shape-memory characteristics of the networks were excellent with values of the shape-fixity and the shape-recovery ratio higher than 98 and 95%, respectively. The switching temperatures were between 10 and 39 °C. In vitro culture and qualitative immunocytochemistry of human annulus fibrosus cells on shape-memory films with DLLA:TMC molar ratios of 60:40 showed very good ability of the networks to support the adhesion and growth of human AF cells. When the polymer network films were coated by adsorption of fibronectin, cell attachment, cell spreading, and extracellular matrix production was further improved. Annulus fibrosus closure devices were prepared from these AF cell-compatible materials by photo-polymerizing the reactive precursors in a mold. Insertion of the multifunctional implant in the disc of a cadaveric canine spine showed that these shape-memory devices could be

  10. Inductively Heated Shape Memory Polymer for the Magnetic Actuation of Medical Devices

    SciTech Connect

    Buckley, P; Mckinley, G; Wilson, T; Small, W; Benett, W; Bearinger, J; McElfresh, M; Maitland, D

    2005-09-06

    Presently there is interest in making medical devices such as expandable stents and intravascular microactuators from shape memory polymer (SMP). One of the key challenges in realizing SMP medical devices is the implementation of a safe and effective method of thermally actuating various device geometries in vivo. A novel scheme of actuation by Curie-thermoregulated inductive heating is presented. Prototype medical devices made from SMP loaded with Nickel Zinc ferrite ferromagnetic particles were actuated in air by applying an alternating magnetic field to induce heating. Dynamic mechanical thermal analysis was performed on both the particle-loaded and neat SMP materials to assess the impact of the ferrite particles on the mechanical properties of the samples. Calorimetry was used to quantify the rate of heat generation as a function of particle size and volumetric loading of ferrite particles in the SMP. These tests demonstrated the feasibility of SMP actuation by inductive heating. Rapid and uniform heating was achieved in complex device geometries and particle loading up to 10% volume content did not interfere with the shape recovery of the SMP.

  11. Manufacturable High-Density 8 Mbit One Transistor-One Capacitor Embedded Ferroelectric Random Access Memory

    NASA Astrophysics Data System (ADS)

    Udayakumar, K. R.; Moise, T. S.; Summerfelt, S. R.; Boku, K.; Remack, K.; Rodriguez, J.; Arendt, M.; Shinn, G.; Eliason, J.; Bailey, R.; Staubs, P.

    2008-04-01

    Enhanced yield and reliability through process improvements, leading to a manufacturable process for a full-bit functional 8 Mbit one transitor-one capacitor (1T-1C) embedded ferroelectric random access memory (eFRAM) fabricated within a low-leakage 130 nm, 5 lm Cu/fluorosilicate glass (FSG) interconnect complementary metal oxide semiconductor (CMOS) logic process, are described. Higher signal margins are further enabled by the single-bit substitution methodology that replaces bits at the low-end of the original distribution with redundant elements. Retention tests on wafers with signal margins above a threshold value for screen show no bit fails for bakes extending up to 1000 h, suggesting retention lifetimes of more than 10 years at 85 °C. Using the qualified process reported in this paper, commercial products are being routinely produced in our fabrication facilities.

  12. Characteristics and mechanism study of cerium oxide based random access memories

    SciTech Connect

    Hsieh, Cheng-Chih; Roy, Anupam; Rai, Amritesh; Chang, Yao-Feng; Banerjee, Sanjay K.

    2015-04-27

    In this work, low operating voltage and high resistance ratio of different resistance states of binary transition metal oxide based resistive random access memories (RRAMs) are demonstrated. Binary transition metal oxides with high dielectric constant have been explored for RRAM application for years. However, CeO{sub x} is considered as a relatively new material to other dielectrics. Since research on CeO{sub x} based RRAM is still at preliminary stage, fundamental characteristics of RRAM such as scalability and mechanism studies need to be done before moving further. Here, we show very high operation window and low switching voltage of CeO{sub x} RRAMs and also compare electrical performance of Al/CeO{sub x}/Au system between different thin film deposition methods and discuss characteristics and resistive switching mechanism.

  13. False Operation of Static Random Access Memory Cells under Alternating Current Power Supply Voltage Variation

    NASA Astrophysics Data System (ADS)

    Sawada, Takuya; Takata, Hidehiro; Nii, Koji; Nagata, Makoto

    2013-04-01

    Static random access memory (SRAM) cores exhibit susceptibility against power supply voltage variation. False operation is investigated among SRAM cells under sinusoidal voltage variation on power lines introduced by direct RF power injection. A standard SRAM core of 16 kbyte in a 90 nm 1.5 V technology is diagnosed with built-in self test and on-die noise monitor techniques. The sensitivity of bit error rate is shown to be high against the frequency of injected voltage variation, while it is not greatly influenced by the difference in frequency and phase against SRAM clocking. It is also observed that the distribution of false bits is substantially random in a cell array.

  14. Power reduction by power gating in differential pair type spin-transfer-torque magnetic random access memories for low-power nonvolatile cache memories

    NASA Astrophysics Data System (ADS)

    Ohsawa, Takashi; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

    2014-01-01

    Array operation currents in spin-transfer-torque magnetic random access memories (STT-MRAMs) that use four differential pair type magnetic tunnel junction (MTJ)-based memory cells (4T2MTJ, two 6T2MTJs and 8T2MTJ) are simulated and compared with that in SRAM. With L3 cache applications in mind, it is assumed that the memories are composed of 32 Mbyte capacity to be accessed in 64 byte in parallel. All the STT-MRAMs except for the 8T2MTJ one are designed with 32 bit fine-grained power gating scheme applied to eliminate static currents in the memory cells that are not accessed. The 8T2MTJ STT-MRAM, the cell’s design concept being not suitable for the fine-grained power gating, loads and saves 32 Mbyte data in 64 Mbyte unit per 1 Mbit sub-array in 2 × 103 cycles. It is shown that the array operation current of the 4T2MTJ STT-MRAM is 70 mA averaged in 15 ns write cycles at Vdd = 0.9 V. This is the smallest among the STT-MRAMs, about the half of the low standby power (LSTP) SRAM whose array operation current is totally dominated by the cells’ subthreshold leakage.

  15. Does the mismatch negativity operate on a consciously accessible memory trace?

    PubMed

    Dykstra, Andrew R; Gutschalk, Alexander

    2015-11-01

    The extent to which the contents of short-term memory are consciously accessible is a fundamental question of cognitive science. In audition, short-term memory is often studied via the mismatch negativity (MMN), a change-related component of the auditory evoked response that is elicited by violations of otherwise regular stimulus sequences. The prevailing functional view of the MMN is that it operates on preattentive and even preconscious stimulus representations. We directly examined the preconscious notion of the MMN using informational masking and magnetoencephalography. Spectrally isolated and otherwise suprathreshold auditory oddball sequences were occasionally random rendered inaudible by embedding them in random multitone masker "clouds." Despite identical stimulation/task contexts and a clear representation of all stimuli in auditory cortex, MMN was only observed when the preceding regularity (that is, the standard stream) was consciously perceived. The results call into question the preconscious interpretation of MMN and raise the possibility that it might index partial awareness in the absence of overt behavior.

  16. Does the mismatch negativity operate on a consciously accessible memory trace?

    PubMed Central

    Dykstra, Andrew R.; Gutschalk, Alexander

    2015-01-01

    The extent to which the contents of short-term memory are consciously accessible is a fundamental question of cognitive science. In audition, short-term memory is often studied via the mismatch negativity (MMN), a change-related component of the auditory evoked response that is elicited by violations of otherwise regular stimulus sequences. The prevailing functional view of the MMN is that it operates on preattentive and even preconscious stimulus representations. We directly examined the preconscious notion of the MMN using informational masking and magnetoencephalography. Spectrally isolated and otherwise suprathreshold auditory oddball sequences were occasionally random rendered inaudible by embedding them in random multitone masker “clouds.” Despite identical stimulation/task contexts and a clear representation of all stimuli in auditory cortex, MMN was only observed when the preceding regularity (that is, the standard stream) was consciously perceived. The results call into question the preconscious interpretation of MMN and raise the possibility that it might index partial awareness in the absence of overt behavior. PMID:26702432

  17. Design and Experimental Verification of Vibration Suppression Device on the Lift of Wheelchair-accessible Vehicles

    NASA Astrophysics Data System (ADS)

    Hatano, Yasuyoshi; Takahashi, Masaki

    2016-09-01

    In recent years, the number of wheelchair-accessible vehicles has increased with the aging of the population. Such vehicles are effective in reducing the burden on caregivers because the wheelchair user does not have to move from his/her wheelchair to a seat of the vehicle. Wheelchair-accessible vehicles are expected to be widely used in the future. However, wheelchair users have reported poor ride comfort. It is thus necessary to suppress the vibration of the vehicle considering the wheelchair user. We designed a passive damping device on the lift of wheelchair-accessible vehicles to improve the ride comfort for wheelchair users. The vibration due to road disturbances reaches the wheelchair user's body through the vehicle and wheelchair. Our control device decreases the acceleration of the torso and improves the ride comfort by ensuring that the frequency of the vibration reaching the wheelchair user differs from the resonance frequency band of the acceleration of the torso, which is the body part that feels the most discomfort. The effectiveness of the control device is verified experimentally.

  18. 78 FR 951 - Accessible Medical Device Labeling in a Standard Content and Format Public Workshop; Request for...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-01-07

    ... HUMAN SERVICES Food and Drug Administration Accessible Medical Device Labeling in a Standard Content and... content and format for medical device labeling and the use of a repository containing medical device... session. Standard content and format of full labeling and a shortened version of labeling will...

  19. Context controls access to working and reference memory in the pigeon (Columba livia).

    PubMed

    Roberts, William A; Macpherson, Krista; Strang, Caroline

    2016-01-01

    The interaction between working and reference memory systems was examined under conditions in which salient contextual cues were presented during memory retrieval. Ambient colored lights (red or green) bathed the operant chamber during the presentation of comparison stimuli in delayed matching-to-sample training (working memory) and during the presentation of the comparison stimuli as S+ and S- cues in discrimination training (reference memory). Strong competition between memory systems appeared when the same contextual cue appeared during working and reference memory training. When different contextual cues were used, however, working memory was completely protected from reference memory interference.

  20. Memory

    MedlinePlus

    ... it has to decide what is worth remembering. Memory is the process of storing and then remembering this information. There are different types of memory. Short-term memory stores information for a few ...

  1. Initial human experience with the XIENCE side-branch access device.

    PubMed

    Rizik, David G; Samuels, Bruce; Hatten, Thomas R; Gil, Robert J

    2012-06-01

    The everolimus-eluting XIENCE side-branch access (SBA) stent has been the focus of numerous recent publications. Most of the information available on this device comes from the preclinical studies performed in ovine models as well as perfused synthetic heart models. It has now become available in Europe as part of a limited test launch. Delivered via a low-profile, dual-lumen, single-tip catheter, a single inflation device deploys the stent in the main branch and expands a portal opening into the ostium of the side branch to allow for scaffolding and entry into the side branch. This case report describes the first-in-man experience with this novel device. PMID:22684387

  2. Stretchable carbon nanotube charge-trap floating-gate memory and logic devices for wearable electronics.

    PubMed

    Son, Donghee; Koo, Ja Hoon; Song, Jun-Kyul; Kim, Jaemin; Lee, Mincheol; Shim, Hyung Joon; Park, Minjoon; Lee, Minbaek; Kim, Ji Hoon; Kim, Dae-Hyeong

    2015-05-26

    Electronics for wearable applications require soft, flexible, and stretchable materials and designs to overcome the mechanical mismatch between the human body and devices. A key requirement for such wearable electronics is reliable operation with high performance and robustness during various deformations induced by motions. Here, we present materials and device design strategies for the core elements of wearable electronics, such as transistors, charge-trap floating-gate memory units, and various logic gates, with stretchable form factors. The use of semiconducting carbon nanotube networks designed for integration with charge traps and ultrathin dielectric layers meets the performance requirements as well as reliability, proven by detailed material and electrical characterizations using statistics. Serpentine interconnections and neutral mechanical plane layouts further enhance the deformability required for skin-based systems. Repetitive stretching tests and studies in mechanics corroborate the validity of the current approaches.

  3. A complementary switching mechanism for organic memory devices to regulate the conductance of binary states

    NASA Astrophysics Data System (ADS)

    Vyas, Giriraj; Dagar, Parveen; Sahu, Satyajit

    2016-06-01

    We have fabricated an organic non-volatile memory device wherein the ON/OFF current ratio has been controlled by varying the concentration of a small organic molecule, 2,3-Dichloro-5,6-dicyano-p-benzoquinone (DDQ), in an insulating matrix of a polymer Poly(4-vinylphenol) (PVP). A maximum ON-OFF ratio of 106 is obtained when the concentration of DDQ is half or 10 wt. % of PVP. In this process, the switching direction for the devices has also been altered, indicating the disparity in conduction mechanism. Conduction due to metal filament formation through the active material and the voltage dependent conformational change of the organic molecule seem to be the motivation behind the gradual change in the switching direction.

  4. The Stand-Alone Pressure Measurement Device, a digital memory telemeter for assessing Shuttle structural dynamics

    NASA Astrophysics Data System (ADS)

    Havey, Gary; Tanji, Todd; Olson, Richard; Wald, Jerry

    The Stand-Alone Pressure Measurement Device (SAPMD) is a microminiaturized recorder which has in association with the requisite miniature sensor been used to collect absolute Space Shuttle pressure data over various points of the Orbiter's surface during ascent. The SAPMD is entirely self-contained, incorporating its own sensor, power supply, self-starting sensor, nonvolatile memory for sensor data, and a real-time clock for time reference; it is also sufficiently small, at 6.28 x 1.5 x 0.5 in., to be mounted beneath The Shuttle Orbiter's thermal protection system tiles. Data acquired during Shuttle ascent is recovered after the mission without removal of the SAPMD. Strain gages, vibration gages, and differential pressure gages can be incorporated by the device.

  5. Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

    PubMed Central

    Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

    2014-01-01

    Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

  6. Functionalized graphitic carbon nitride for metal-free, flexible and rewritable nonvolatile memory device via direct laser-writing.

    PubMed

    Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

    2014-07-30

    Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 10(5), which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices.

  7. Evaluation of Data Retention Characteristics for Ferroelectric Random Access Memories (FRAMs)

    NASA Technical Reports Server (NTRS)

    Sharma, Ashok K.; Teverovsky, Alexander

    2001-01-01

    Data retention and fatigue characteristics of 64 Kb lead zirconate titanate (PZT)-based Ferroelectric Random Access Memories (FRAMs) microcircuits manufactured by Ramtron were examined over temperature range from -85 C to +310 C for ceramic packaged parts and from -85 C to +175 C for plastic parts, during retention periods up to several thousand hours. Intrinsic failures, which were caused by a thermal degradation of the ferroelectric cells, occurred in ceramic parts after tens or hundreds hours of aging at temperatures above 200 C. The activation energy of the retention test failures was 1.05 eV and the extrapolated mean-time-to-failure (MTTF) at room temperature was estimated to be more than 280 years. Multiple write-read cycling (up to 3x10(exp 7)) during the fatigue testing of plastic and ceramic parts did not result in any parametric or functional failures. However, operational currents linearly decreased with the logarithm of number of cycles thus indicating fatigue process in PZT films. Plastic parts, that had more recent date code as compared to ceramic parts, appeared to be using die with improved process technology and showed significantly smaller changes in operational currents and data access times.

  8. Frontal activations associated with accessing and evaluating information in working memory: an fMRI study.

    PubMed

    Zhang, John X; Leung, Hoi-Chung; Johnson, Marcia K

    2003-11-01

    To investigate the involvement of frontal cortex in accessing and evaluating information in working memory, we used a variant of a Sternberg paradigm and compared brain activations between positive and negative responses (known to differentially tax access/evaluation processes). Participants remembered two trigrams in each trial and were then cued to discard one of them and maintain the other one as the target set. After a delay, a probe letter was presented and participants made decisions about whether or not it was in the target set. Several frontal areas--anterior cingulate (BA32), middle frontal gyrus (bilateral BA9, right BA10, and right BA46), and left inferior frontal gyrus (BA44/45)--showed increased activity when participants made correct negative responses relative to when they made correct positive responses. No areas activated significantly more for the positive responses than for the negative responses. It is suggested that the multiple frontal areas involved in the test phase of this task may reflect several component processes that underlie more general frontal functions. PMID:14642465

  9. Frontal activations associated with accessing and evaluating information in working memory: an fMRI study.

    PubMed

    Zhang, John X; Leung, Hoi-Chung; Johnson, Marcia K

    2003-11-01

    To investigate the involvement of frontal cortex in accessing and evaluating information in working memory, we used a variant of a Sternberg paradigm and compared brain activations between positive and negative responses (known to differentially tax access/evaluation processes). Participants remembered two trigrams in each trial and were then cued to discard one of them and maintain the other one as the target set. After a delay, a probe letter was presented and participants made decisions about whether or not it was in the target set. Several frontal areas--anterior cingulate (BA32), middle frontal gyrus (bilateral BA9, right BA10, and right BA46), and left inferior frontal gyrus (BA44/45)--showed increased activity when participants made correct negative responses relative to when they made correct positive responses. No areas activated significantly more for the positive responses than for the negative responses. It is suggested that the multiple frontal areas involved in the test phase of this task may reflect several component processes that underlie more general frontal functions.

  10. Three-Year-Old Children Can Access Their Own Memory to Guide Responses on a Visual Matching Task

    ERIC Educational Resources Information Center

    Balcomb, Frances K.; Gerken, LouAnn

    2008-01-01

    Many models of learning rely on accessing internal knowledge states. Yet, although infants and young children are recognized to be proficient learners, the ability to act on metacognitive information is not thought to develop until early school years. In the experiments reported here, 3.5-year-olds demonstrated memory-monitoring skills by…

  11. Photoluminescence of Si nanocrystal memory devices obtained by ion beam synthesis

    SciTech Connect

    Carrada, Marzia; Wellner, Anja; Paillard, Vincent; Bonafos, Caroline; Coffin, Hubert; Claverie, Alain

    2005-12-19

    In this letter, we propose an original method to investigate Si nanocrystal-based nonvolatile memory devices, taking benefit of the photoluminescence (PL) spectroscopy and the specific optoelectronic properties of Si nanocrystals (Si-NCs). Ordered two-dimensional-arrays of Si-NCs were synthesized by ultralow-energy ion implantation in 7-nm-thick SiO{sub 2} and subsequent annealing. The Si-NCs population characteristics (size and density) were adjusted by different oxidizing annealing. This allowed, at the same time, the progressive healing of the oxide matrix. The analysis of the spectra revealed the presence of two PL bands, one due to quantum confinement effects in Si-NCs, and the other one attributed to silicon-rich oxide. Therefore, the evolution in energy and intensity of the PL bands was correlated to the oxidizing conditions, thus to the change of the Si-NCs size and density, and to the formation of stoichiometric SiO{sub 2}. These results are of great interest as being the first step in using PL spectroscopy as a nondestructive method to assess or monitor the electrical performances of the future memory devices, before any step of contact fabrication.

  12. Unusual magnetic behavior in a chiral-based magnetic memory device

    NASA Astrophysics Data System (ADS)

    Ben-Dor, Oren; Yochelis, Shira; Felner, Israel; Paltiel, Yossi

    2016-01-01

    In recent years chiral molecules were found to act as efficient spin filters. Using a multilayer structure with chiral molecules magnetic memory was realized. Observed rare magnetic phenomena in a chiral-based magnetic memory device was reported by O-Ben Dor et. al in Nature Commun, 4, 2256 (2013). This multi-layered device is built from α-helix L-polyalanine (AHPA-L) adsorbed on gold, Al2O3 (7 nm) and Ni (30 nm) layers. It was shown that certain temperature range the FC branch crosses the magnetic peak (at 55 K) observed in the ZFC curve thus ZFC>FC. We show here that in another similar multi-layered material, at low applied field, the ZFC curve lies above the FC one up to 70 K. The two features have the same origin and the crucial necessary components to exhibit them are: AHPA-L and 30 nm Ni layered thick. Similar effects were also reported in sulfur doped amorphous carbon. A comparison between the two systems and the ingredients for these peculiar observations is discussed.

  13. Scalability of valence change memory: From devices to tip-induced filaments

    NASA Astrophysics Data System (ADS)

    Celano, U.; Fantini, A.; Degraeve, R.; Jurczak, M.; Goux, L.; Vandervorst, W.

    2016-08-01

    Since the early days of the investigation on resistive switching (RS), the independence of the ON-state resistance with actual cell area has been a trademark of filamentary-switching. However, with the continuous downscaling of the memory cell down to 10 x 10 nm2 and below, the persistence of this phenomena raises intriguing questions on the conductive filaments (CFs) and its dimensions. Particularly, the cell functionality demonstrated at relatively high switching current (> 100 μA) implies a high current density (> 106 A/cm2) inside a CF supposedly confined in few hundreds on nm3. We previously demonstrated a methodology for the direct observation of CFs in integrated devices namely scalpel SPM, which overcomes most of the characterization challenges imposed by the device structure and the small CF lateral dimensions. In this letter, we use scalpel SPM to clarify the scaling potential of HfO2-based valence change memory (VCM) by characterization of CFs programmed at relatively high switching current and by AFM tip-induced RS experiments. Besides the demonstration of a remarkable scaling potential for the VCM technology, our results are also used to clarify the present understanding on the AFM-based experiments.

  14. Interacting with the biomolecular solvent accessible surface via a haptic feedback device

    PubMed Central

    Stocks, Matthew B; Hayward, Steven; Laycock, Stephen D

    2009-01-01

    Background From the 1950s computer based renderings of molecules have been produced to aid researchers in their understanding of biomolecular structure and function. A major consideration for any molecular graphics software is the ability to visualise the three dimensional structure of the molecule. Traditionally, this was accomplished via stereoscopic pairs of images and later realised with three dimensional display technologies. Using a haptic feedback device in combination with molecular graphics has the potential to enhance three dimensional visualisation. Although haptic feedback devices have been used to feel the interaction forces during molecular docking they have not been used explicitly as an aid to visualisation. Results A haptic rendering application for biomolecular visualisation has been developed that allows the user to gain three-dimensional awareness of the shape of a biomolecule. By using a water molecule as the probe, modelled as an oxygen atom having hard-sphere interactions with the biomolecule, the process of exploration has the further benefit of being able to determine regions on the molecular surface that are accessible to the solvent. This gives insight into how awkward it is for a water molecule to gain access to or escape from channels and cavities, indicating possible entropic bottlenecks. In the case of liver alcohol dehydrogenase bound to the inhibitor SAD, it was found that there is a channel just wide enough for a single water molecule to pass through. Placing the probe coincident with crystallographic water molecules suggests that they are sometimes located within small pockets that provide a sterically stable environment irrespective of hydrogen bonding considerations. Conclusion By using the software, named HaptiMol ISAS (available from ), one can explore the accessible surface of biomolecules using a three-dimensional input device to gain insights into the shape and water accessibility of the biomolecular surface that cannot be

  15. Polymer ferroelectric field-effect memory device with SnO channel layer exhibits record hole mobility

    PubMed Central

    Caraveo-Frescas, J. A.; Khan, M. A.; Alshareef, H. N.

    2014-01-01

    Here we report for the first time a hybrid p-channel polymer ferroelectric field-effect transistor memory device with record mobility. The memory device, fabricated at 200°C on both plastic polyimide and glass substrates, uses ferroelectric polymer P(VDF-TrFE) as the gate dielectric and transparent p-type oxide (SnO) as the active channel layer. A record mobility of 3.3 cm2V−1s−1, large memory window (∼16 V), low read voltages (∼−1 V), and excellent retention characteristics up to 5000 sec have been achieved. The mobility achieved in our devices is over 10 times higher than previously reported polymer ferroelectric field-effect transistor memory with p-type channel. This demonstration opens the door for the development of non-volatile memory devices based on dual channel for emerging transparent and flexible electronic devices. PMID:24912617

  16. Concept of rewritable organic ferroelectric random access memory in two lateral transistors-in-one cell architecture

    NASA Astrophysics Data System (ADS)

    Kim, Min-Hoi; Lee, Gyu Jeong; Keum, Chang-Min; Lee, Sin-Doo

    2014-02-01

    We propose a concept of rewritable ferroelectric random access memory (RAM) with two lateral organic transistors-in-one cell architecture. Lateral integration of a paraelectric organic field-effect transistor (OFET), being a selection transistor, and a ferroelectric OFET as a memory transistor is realized using a paraelectric depolarizing layer (PDL) which is patterned on a ferroelectric insulator by transfer-printing. For the selection transistor, the key roles of the PDL are to reduce the dipolar strength and the surface roughness of the gate insulator, leading to the low memory on-off ratio and the high switching on-off current ratio. A new driving scheme preventing the crosstalk between adjacent memory cells is also demonstrated for the rewritable operation of the ferroelectric RAM.

  17. Miniature micro-wire based optical fiber-field access device.

    PubMed

    Pevec, Simon; Donlagic, Denis

    2012-12-01

    This paper presents an optical fiber-field access device suitable for use in different in-line fiber-optics' systems and fiber-based photonics' components. The proposed device utilizes a thin silica micro-wire positioned in-between two lead-in single mode fibers. The thin micro-wire acts as a waveguide that allows for low-loss interconnection between both lead-in fibers, while providing interaction between the guided optical field and the surrounding medium or other photonic structures. The field interaction strength, total loss, and phase matching conditions can be partially controlled by device-design. The presented all-fiber device is miniature in size and utilizes an all-silica construction. It has mechanical properties suitable for handling and packaging without the need for additional mechanical support or reinforcements. The proposed device was produced using a micromachining method that utilizes selective etching of a purposely-produced phosphorus pentoxide-doped optical fiber. This method is simple, compatible with batch processes, and has good high-volume manufacturing potential. PMID:23262732

  18. Memory.

    ERIC Educational Resources Information Center

    McKean, Kevin

    1983-01-01

    Discusses current research (including that involving amnesiacs and snails) into the nature of the memory process, differentiating between and providing examples of "fact" memory and "skill" memory. Suggests that three brain parts (thalamus, fornix, mammilary body) are involved in the memory process. (JN)

  19. Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis.

    PubMed

    Younis, Adnan; Chu, Dewei; Li, Sean

    2015-01-01

    Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device's retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective. PMID:26324073

  20. Nonvolatile write-once-read-many times memory devices based on the composites of poly(4-vinylphenol)/Vulcan XC-72.

    PubMed

    Song, Sunghoon; Kim, Tae-Wook; Cho, Byungjin; Ji, Yongsung; Lee, Takhee

    2011-05-01

    We fabricated write-once-read-many times (WORM) type organic memory devices in 8 x 8 cross-bar structure. The active material for organic based WORM memory devices is mixture of both poly(4-vinyphenol) (PVP) and Vulcan XC-72s. From the electrical characteristics of the WORM memory devices, we observed two different resistance states, low resistance state and high resistance state, with six orders of ON/OFF ratio (I(ON)/I(OFF) - 10(6)). In addition, the WORM memory devices were maintained for longer than 50000 seconds without any serious degradation.

  1. Multilevel characteristics and memory mechanisms for nonvolatile memory devices based on CuInS{sub 2} quantum dot-polymethylmethacrylate nanocomposites

    SciTech Connect

    Zhou, Yang; Yun, Dong Yeol; Kim, Tae Whan; Kim, Sang Wook

    2014-12-08

    Nonvolatile memory devices based on CuInS{sub 2} (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10{sup −10} was maintained for 8 × 10{sup 3} cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10{sup 6} cycles converged to 2.40 × 10{sup −10}, indicative of the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams.

  2. Electron Transport in Silicon Nanocrystal Devices: From Memory Applications to Silicon Photonics

    NASA Astrophysics Data System (ADS)

    Miller, Gerald M.

    The push to integrate the realms of microelectronics and photonics on the silicon platform is currently lacking an efficient, electrically pumped silicon light source. One promising material system for photonics on the silicon platform is erbium-doped silicon nanoclusters (Er:Si-nc), which uses silicon nanoclusters to sensitize erbium ions in a SiO2 matrix. This medium can be pumped electrically, and this thesis focuses primarily on the electrical properties of Er:Si-nc films and their possible development as a silicon light source in the erbium emission band around 1.5 micrometers. Silicon nanocrystals can also be used as the floating gate in a flash memory device, and work is also presented examining charge transport in novel systems for flash memory applications. To explore silicon nanocrystals as a potential replacement for metallic floating gates in flash memory, the charging dynamics in silicon nanocrystal films are first studied using UHV-AFM. This approach uses a non-contact AFM tip to locally charge a layer of nanocrystals. Subsequent imaging allows the injected charge to be observed in real time as it moves through the layer. Simulation of this interaction allows the quantication of the charge in the layer, where we find that each nanocrystal is only singly charged after injection, while holes are retained in the film for hours. Work towards developing a dielectric stack with a voltage-tunable barrier is presented, with applications for flash memory and hyperspectral imaging. For hyperspectral imaging applications, film stacks containing various dielectrics are studied using I-V, TEM, and internal photoemission, with barrier tunability demonstrated in the Sc2O3/SiO2 system. To study Er:Si-nc as a potential lasing medium for silicon photonics, a theoretical approach is presented where Er:Si-nc is the gain medium in a silicon slot waveguide. By accounting for the local density of optical states effect on the emitters, and carrier absorption due to

  3. Excellent scalability including self-heating phenomena of vertical-channel field-effect-diode type capacitor-less one transistor dynamic random access memory cell

    NASA Astrophysics Data System (ADS)

    Imamoto, Takuya; Endoh, Tetsuo

    2014-01-01

    The scalability study and the impact of the self-heating effect (SHE) on memory operation of the bulk vertical-channel field effect diode (FED) type capacitorless one transistor (1T) dynamic random access memory (DRAM) cell are investigated via device simulator for the first time. The vertical-channel FED type 1T-DRAM cell shows the excellent hold characteristics (100 ms at 358 K of ambient temperature) with large enough read current margin (1 µA/cell) even when silicon pillar diameter (D) is scaled down from 20 to 12 nm. It is also shown that by employing the vertical-channel FED type, maximum lattice temperature in the memory cell due to SHE (T_{\\text{L}}^{\\text{Max}}) can be suppressed to a negligible small value and only reach 300.6 from 300 K ambient temperature due to the low lateral electric field, while the vertical-channel bipolar junction transistor (BJT) type 1T-DRAM shows significant SHE (T_{\\text{L}}^{\\text{Max}} = 330.6 K). Moreover, this excellent thermal characteristic can be maintained even when D is scaled down from 20 to 12 nm.

  4. Resistive Switching in Al/Al2O3/TiO2/Al/PES Flexible Device for Nonvolatile Memory Application.

    PubMed

    Lin, Chun-Chieh; Lee, Wang-Ying; Lee, Han-Tang

    2016-05-01

    Resistive switching memory devices with superior properties are possibly used in next-generation nonvolatile memory to replace the flash memory. In addition, flexible electronics has also attracted much attention because of its light-weight and flexibility. Therefore, an Al/Al2O3/TiO2/Al/PES flexible resistive switching memory is employed in this study. The resistive switching characteristics and stability of the flexible device are improved by inserting the Al2O3 film. The resistive switching of the flexible device can be repeated over hundreds of times after the bending test. A possible resistive switching model of the flexible device is also proposed. In addition, the non-volatility of the flexible device is demonstrated. Based on our research results, the proposed Al2O3/TiO2-based resistive switching memory is possibly used in next-generation flexible electronics and nonvolatile memory applications. PMID:27483828

  5. Improved limb positioning and hip access during hip arthroscopy with articulated traction device.

    PubMed

    Mei-Dan, Omer; McConkey, Mark O; Young, David A

    2013-02-01

    Surgeons use hip arthroscopy to address intra-articular pathology of the hip. To access the central compartment, traction must be applied to the leg. Various types of equipment and techniques have been used, but many have limitations. Improved ability to assess the offending pathology is achieved with improved ability to move the hip joint in space during surgery. Dynamic assessment of femoroacetabular impingement allows the surgeon to gauge the adequacy of resection. We describe the use of an articulated traction device that allows complete surgeon control over the leg position, as well as the freedom to place the leg in virtually any position with ease, unencumbered by the mechanics of a standard traction table. This device provides the surgeon with an improved ability to dynamically assess the hip and removes some of the responsibility of the operating room staff for intraoperative leg positioning. PMID:23802095

  6. (Invited) Comprehensive Assessment of Oxide Memristors As Post-CMOS Memory and Logic Devices

    DOE PAGES

    Gao, X.; Mamaluy, D.; Cyr, E. C.; Marinella, M. J.

    2016-05-10

    As CMOS technology approaches the end of its scaling, oxide-based memristors have become one of the leading candidates for post-CMOS memory and logic devices. In orderTo facilitate the understanding of physical switching mechanisms and accelerate experimental development of memristors, we have developed a three-dimensional fully-coupled electrical and thermal transport model, which captures all the important processes that drive memristive switching and is applicable for simulating a wide range of memristors. Moreover, the model is applied to simulate the RESET and SET switching in a 3D filamentary TaOx memristor. Extensive simulations show that the switching dynamics of the bipolar device ismore » determined by thermally-activated field-dominant processes: with Joule heating, the raised temperature enables the movement of oxygen vacancies, and the field drift dominates the overall motion of vacancies. Simulated current-voltage hysteresis and device resistance profiles as a function of time and voltage during RESET and SET switching show good agreement with experimental measurement.« less

  7. GA-based optimum design of a shape memory alloy device for seismic response mitigation

    NASA Astrophysics Data System (ADS)

    Ozbulut, O. E.; Roschke, P. N.; Y Lin, P.; Loh, C. H.

    2010-06-01

    Damping systems discussed in this work are optimized so that a three-story steel frame structure and its shape memory alloy (SMA) bracing system minimize response metrics due to a custom-tailored earthquake excitation. Multiple-objective numerical optimization that simultaneously minimizes displacements and accelerations of the structure is carried out with a genetic algorithm (GA) in order to optimize SMA bracing elements within the structure. After design of an optimal SMA damping system is complete, full-scale experimental shake table tests are conducted on a large-scale steel frame that is equipped with the optimal SMA devices. A fuzzy inference system is developed from data collected during the testing to simulate the dynamic material response of the SMA bracing subcomponents. Finally, nonlinear analyses of a three-story braced frame are carried out to evaluate the performance of comparable SMA and commonly used steel braces under dynamic loading conditions and to assess the effectiveness of GA-optimized SMA bracing design as compared to alternative designs of SMA braces. It is shown that peak displacement of a structure can be reduced without causing significant acceleration response amplification through a judicious selection of physical characteristics of the SMA devices. Also, SMA devices provide a recentering mechanism for the structure to return to its original position after a seismic event.

  8. In-chip optical CD measurements for non-volatile memory devices

    NASA Astrophysics Data System (ADS)

    Vasconi, Mauro; Kremer, Stephanie; Polli, M.; Severgnini, Ermes; Trovati, Silvia S.

    2006-03-01

    A potential limitation to a wider usage of the scatterometry technique for CD evaluation comes from its requirement of dedicated regular measurement gratings, located in wafer scribe lanes. In fact, the simplification of the original chip layout that is often requested to design these gratings may impact on their printed dimension and shape. Etched gratings might also suffer from micro-loading effects other than in the circuit. For all these reasons, measurements collected therein may not represent the real behavior of the device. On the other hand, memory devices come with large sectors that usually possess the characteristics required for a proper scatterometry evaluation. In particular, for a leading edge flash process this approach is in principle feasible for the most critical process steps. The impact of potential drawbacks, mainly lack of pattern regularity within the tool probe area, is investigated. More, a very large sampling plan on features with equal nominal CD and density spread over the same exposure shot becomes feasible, thus yielding a deeper insight of the overall lithographic process window and a quantitative method to evaluate process equipment performance along time by comparison to acceptance data and/or last preventive maintenance. All the results gathered in the device main array are compared to those collected in standard scatterometry targets, tailored to the characteristics of the considered layers in terms of designed CD, pitch, stack and orientation.

  9. Apical access and closure devices for transapical transcatheter heart valve procedures.

    PubMed

    Ferrari, Enrico

    2016-01-01

    The majority of transcatheter aortic valve implantations, structural heart procedures and the newly developed transcatheter mitral valve repair and replacement are traditionally performed either through a transfemoral or a transapical access site, depending on the presence of severe peripheral vascular disease or anatomic limitations. The transapical approach, which carries specific advantages related to its antegrade nature and the short distance between the introduction site and the cardiac target, is traditionally performed through a left anterolateral mini-thoracotomy and requires rib retractors, soft tissue retractors and reinforced apical sutures to secure, at first, the left ventricular apex for the introduction of the stent-valve delivery systems and then to seal the access site at the end of the procedure. However, despite the advent of low-profile apical sheaths and newly designed delivery systems, the apical approach represents a challenge for the surgeon, as it has the risk of apical tear, life-threatening apical bleeding, myocardial damage, coronary damage and infections. Last but not least, the use of large-calibre stent-valve delivery systems and devices through standard mini-thoracotomies compromises any attempt to perform transapical transcatheter structural heart procedures entirely percutaneously, as happens with the transfemoral access site, or via a thoracoscopic or a miniaturised video-assisted percutaneous technique. During the past few years, prototypes of apical access and closure devices for transapical heart valve procedures have been developed and tested to make this standardised successful procedure easier. Some of them represent an important step towards the development of truly percutaneous transcatheter transapical heart valve procedures in the clinical setting. PMID:26900765

  10. Apical access and closure devices for transapical transcatheter heart valve procedures.

    PubMed

    Ferrari, Enrico

    2016-01-01

    The majority of transcatheter aortic valve implantations, structural heart procedures and the newly developed transcatheter mitral valve repair and replacement are traditionally performed either through a transfemoral or a transapical access site, depending on the presence of severe peripheral vascular disease or anatomic limitations. The transapical approach, which carries specific advantages related to its antegrade nature and the short distance between the introduction site and the cardiac target, is traditionally performed through a left anterolateral mini-thoracotomy and requires rib retractors, soft tissue retractors and reinforced apical sutures to secure, at first, the left ventricular apex for the introduction of the stent-valve delivery systems and then to seal the access site at the end of the procedure. However, despite the advent of low-profile apical sheaths and newly designed delivery systems, the apical approach represents a challenge for the surgeon, as it has the risk of apical tear, life-threatening apical bleeding, myocardial damage, coronary damage and infections. Last but not least, the use of large-calibre stent-valve delivery systems and devices through standard mini-thoracotomies compromises any attempt to perform transapical transcatheter structural heart procedures entirely percutaneously, as happens with the transfemoral access site, or via a thoracoscopic or a miniaturised video-assisted percutaneous technique. During the past few years, prototypes of apical access and closure devices for transapical heart valve procedures have been developed and tested to make this standardised successful procedure easier. Some of them represent an important step towards the development of truly percutaneous transcatheter transapical heart valve procedures in the clinical setting.

  11. Catheter Securement Systems for Peripherally Inserted and Nontunneled Central Vascular Access Devices

    PubMed Central

    Krenik, Karen M.; Smith, Graham E.

    2016-01-01

    Sutureless catheter securement systems are intended to eliminate risks associated with sutures. The clinical acceptability of a novel system was investigated compared with the current method of securement for peripherally inserted central catheters (19 facilities using StatLock or sutures) or nontunneled central vascular access devices (3 facilities using StatLock or sutures or HubGuard + Sorbaview Shield). More than 94% of respondents rated the novel system as same, better, or much better than their current product. More than 82% of respondents were willing to replace their current system with the new one. PMID:27379679

  12. Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis

    PubMed Central

    Younis, Adnan; Chu, Dewei; Li, Sean

    2015-01-01

    Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective. PMID:26324073

  13. Evidence of Filamentary Switching in Oxide-based Memory Devices via Weak Programming and Retention Failure Analysis

    NASA Astrophysics Data System (ADS)

    Younis, Adnan; Chu, Dewei; Li, Sean

    2015-09-01

    Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective.

  14. Self-selection effects and modulation of TaOx resistive switching random access memory with bottom electrode of highly doped Si

    NASA Astrophysics Data System (ADS)

    Yu, Muxi; Fang, Yichen; Wang, Zongwei; Pan, Yue; Li, Ming; Cai, Yimao; Huang, Ru

    2016-05-01

    In this paper, we propose a TaOx resistive switching random access memory (RRAM) device with operation-polarity-dependent self-selection effect by introducing highly doped silicon (Si) electrode, which is promising for large-scale integration. It is observed that with highly doped Si as the bottom electrode (BE), the RRAM devices show non-linear (>103) I-V characteristic during negative Forming/Set operation and linear behavior during positive Forming/Set operation. The underling mechanisms for the linear and non-linear behaviors at low resistance states of the proposed device are extensively investigated by varying operation modes, different metal electrodes, and Si doping type. Experimental data and theoretical analysis demonstrate that the operation-polarity-dependent self-selection effect in our devices originates from the Schottky barrier between the TaOx layer and the interfacial SiOx formed by reaction between highly doped Si BE and immigrated oxygen ions in the conductive filament area.

  15. Fabrication of poly(methyl methacrylate)-MoS{sub 2}/graphene heterostructure for memory device application

    SciTech Connect

    Shinde, Sachin M.; Tanemura, Masaki; Kalita, Golap

    2014-12-07

    Combination of two dimensional graphene and semi-conducting molybdenum disulfide (MoS{sub 2}) is of great interest for various electronic device applications. Here, we demonstrate fabrication of a hybridized structure with the chemical vapor deposited graphene and MoS{sub 2} crystals to configure a memory device. Elongated hexagonal and rhombus shaped MoS{sub 2} crystals are synthesized by sulfurization of thermally evaporated molybdenum oxide (MoO{sub 3}) thin film. Scanning transmission electron microscope studies reveal atomic level structure of the synthesized high quality MoS{sub 2} crystals. In the prospect of a memory device fabrication, poly(methyl methacrylate) (PMMA) is used as an insulating dielectric material as well as a supporting layer to transfer the MoS{sub 2} crystals. In the fabricated device, PMMA-MoS{sub 2} and graphene layers act as the functional and electrode materials, respectively. Distinctive bistable electrical switching and nonvolatile rewritable memory effect is observed in the fabricated PMMA-MoS{sub 2}/graphene heterostructure. The developed material system and demonstrated memory device fabrication can be significant for next generation data storage applications.

  16. Diode-less bilayer oxide (WO(x)-NbO(x)) device for cross-point resistive memory applications.

    PubMed

    Liu, Xinjun; Sadaf, Sharif Md; Son, Myungwoo; Shin, Jungho; Park, Jubong; Lee, Joonmyoung; Park, Sangsu; Hwang, Hyunsang

    2011-11-25

    The combination of a threshold switching device and a resistive switching (RS) device was proposed to suppress the undesired sneak current for the integration of bipolar RS cells in a cross-point array type memory. A simulation for this hybrid-type device shows that the matching of key parameters between switch element and memory element is an important issue. Based on the threshold switching oxides, a conceptual structure with a simple metal-oxide 1-oxide 2-metal stack was provided to accommodate the evolution trend. We show that electroformed W-NbO(x)-Pt devices can simultaneously exhibit both threshold switching and memory switching. A qualitative model was suggested to elucidate the unique properties in a W-NbO(x)-Pt stack, where threshold switching is associated with a localized metal-insulator transition in the NbO(x) bulk, and the bipolar RS derives from a redox at the tip of the localized filament at the WO(x)-NbO(x) interface. Such a simple metal-oxide-metal structure, with functionally separated bulk and interface effects, provides a fabrication advantage for future high-density cross-point memory devices.

  17. Overview of emerging nonvolatile memory technologies.

    PubMed

    Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

  18. Overview of emerging nonvolatile memory technologies

    PubMed Central

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

  19. A multiscale simulation technique for molecular electronics: design of a directed self-assembled molecular n-bit shift register memory device.

    PubMed

    Lambropoulos, Nicholas A; Reimers, Jeffrey R; Crossley, Maxwell J; Hush, Noel S; Silverbrook, Kia

    2013-12-20

    A general method useful in molecular electronics design is developed that integrates modelling on the nano-scale (using quantum-chemical software) and on the micro-scale (using finite-element methods). It is applied to the design of an n-bit shift register memory that could conceivably be built using accessible technologies. To achieve this, the entire complex structure of the device would be built to atomic precision using feedback-controlled lithography to provide atomic-level control of silicon devices, controlled wet-chemical synthesis of molecular insulating pillars above the silicon, and controlled wet-chemical self-assembly of modular molecular devices to these pillars that connect to external metal electrodes (leads). The shift register consists of n connected cells that read data from an input electrode, pass it sequentially between the cells under the control of two external clock electrodes, and deliver it finally to an output device. The proposed cells are trimeric oligoporphyrin units whose internal states are manipulated to provide functionality, covalently connected to other cells via dipeptide linkages. Signals from the clock electrodes are conveyed by oligoporphyrin molecular wires, and μ-oxo porphyrin insulating columns are used as the supporting pillars. The developed multiscale modelling technique is applied to determine the characteristics of this molecular device, with in particular utilization of the inverted region for molecular electron-transfer processes shown to facilitate latching and control using exceptionally low energy costs per logic operation compared to standard CMOS shift register technology.

  20. Wavelet analysis and HHG in nanorings: their applications in logic gates and memory mass devices

    NASA Astrophysics Data System (ADS)

    Cricchio, Dario; Fiordilino, Emilio

    2016-01-01

    We study the application of one nanoring driven by a laser field in different states of polarization in logic circuits. In particular we show that assigning Boolean values to different states of the incident laser field and to the emitted signals, we can create logic gates such as OR, XOR and AND. We also show the possibility of making logic circuits such as half-adder and full-adder using one and two nanorings respectively. Using two nanorings we made the Toffoli gate. Finally we use the final angular momentum acquired by the electron to store information and hence show the possibility of using an array of nanorings as a mass memory device.

  1. Solution-processed carbon nanotube thin-film complementary static random access memory

    NASA Astrophysics Data System (ADS)

    Geier, Michael L.; McMorrow, Julian J.; Xu, Weichao; Zhu, Jian; Kim, Chris H.; Marks, Tobin J.; Hersam, Mark C.

    2015-11-01

    Over the past two decades, extensive research on single-walled carbon nanotubes (SWCNTs) has elucidated their many extraordinary properties, making them one of the most promising candidates for solution-processable, high-performance integrated circuits. In particular, advances in the enrichment of high-purity semiconducting SWCNTs have enabled recent circuit demonstrations including synchronous digital logic, flexible electronics and high-frequency applications. However, due to the stringent requirements of the transistors used in complementary metal-oxide-semiconductor (CMOS) logic as well as the absence of sufficiently stable and spatially homogeneous SWCNT thin-film transistors, the development of large-scale SWCNT CMOS integrated circuits has been limited in both complexity and functionality. Here, we demonstrate the stable and uniform electronic performance of complementary p-type and n-type SWCNT thin-film transistors by controlling adsorbed atmospheric dopants and incorporating robust encapsulation layers. Based on these complementary SWCNT thin-film transistors, we simulate, design and fabricate arrays of low-power static random access memory circuits, achieving large-scale integration for the first time based on solution-processed semiconductors.

  2. Performance improvement of gadolinium oxide resistive random access memory treated by hydrogen plasma immersion ion implantation

    SciTech Connect

    Wang, Jer-Chyi Hsu, Chih-Hsien; Ye, Yu-Ren; Ai, Chi-Fong; Tsai, Wen-Fa

    2014-03-15

    Characteristics improvement of gadolinium oxide (Gd{sub x}O{sub y}) resistive random access memories (RRAMs) treated by hydrogen plasma immersion ion implantation (PIII) was investigated. With the hydrogen PIII treatment, the Gd{sub x}O{sub y} RRAMs exhibited low set/reset voltages and a high resistance ratio, which were attributed to the enhanced movement of oxygen ions within the Gd{sub x}O{sub y} films and the increased Schottky barrier height at Pt/Gd{sub x}O{sub y} interface, respectively. The resistive switching mechanism of Gd{sub x}O{sub y} RRAMs was dominated by Schottky emission, as proved by the area dependence of the resistance in the low resistance state. After the hydrogen PIII treatment, a retention time of more than 10{sup 4} s was achieved at an elevated measurement temperature. In addition, a stable cycling endurance with the resistance ratio of more than three orders of magnitude of the Gd{sub x}O{sub y} RRAMs can be obtained.

  3. Multilevel Thermally Assisted Magnetoresistive Random-Access Memory Based on Exchange-Biased Vortex Configurations

    NASA Astrophysics Data System (ADS)

    de Araujo, C. I. L.; Alves, S. G.; Buda-Prejbeanu, L. D.; Dieny, B.

    2016-08-01

    A concept of multilevel thermally assisted magnetoresistive random-access memory is proposed and investigated by micromagnetic simulations. The storage cells are magnetic tunnel junctions in which the storage layer is exchange biased and in a vortex configuration. The reference layer is an unpinned soft magnetic layer. The stored information is encoded via the position of the vortex core in the storage layer. This position can be varied along two degrees of freedom: the radius and the in-plane angle. The information is read out from the amplitude and phase of the tunnel magnetoresistance signal obtained by applying a rotating field on the cell without heating the cell. Various configurations are compared in which the soft reference layer consists of either a simple ferromagnetic layer or a synthetic antiferromagnetic sandwich (SAF). Among those, the most practical one comprises a SAF reference layer in which the magnetostatic interaction between the SAF and storage layer is minimized. This type of cell should allow one to store at least 40 different states per cell representing more than five bits per cell.

  4. Solution-processed carbon nanotube thin-film complementary static random access memory.

    PubMed

    Geier, Michael L; McMorrow, Julian J; Xu, Weichao; Zhu, Jian; Kim, Chris H; Marks, Tobin J; Hersam, Mark C

    2015-11-01

    Over the past two decades, extensive research on single-walled carbon nanotubes (SWCNTs) has elucidated their many extraordinary properties, making them one of the most promising candidates for solution-processable, high-performance integrated circuits. In particular, advances in the enrichment of high-purity semiconducting SWCNTs have enabled recent circuit demonstrations including synchronous digital logic, flexible electronics and high-frequency applications. However, due to the stringent requirements of the transistors used in complementary metal-oxide-semiconductor (CMOS) logic as well as the absence of sufficiently stable and spatially homogeneous SWCNT thin-film transistors, the development of large-scale SWCNT CMOS integrated circuits has been limited in both complexity and functionality. Here, we demonstrate the stable and uniform electronic performance of complementary p-type and n-type SWCNT thin-film transistors by controlling adsorbed atmospheric dopants and incorporating robust encapsulation layers. Based on these complementary SWCNT thin-film transistors, we simulate, design and fabricate arrays of low-power static random access memory circuits, achieving large-scale integration for the first time based on solution-processed semiconductors. PMID:26344184

  5. Flexible conductive-bridging random-access-memory cell vertically stacked with top Ag electrode, PEO, PVK, and bottom Pt electrode.

    PubMed

    Seung, Hyun-Min; Kwon, Kyoung-Cheol; Lee, Gon-Sub; Park, Jea-Gun

    2014-10-31

    Flexible conductive-bridging random-access-memory (RAM) cells were fabricated with a cross-bar memory cell stacked with a top Ag electrode, conductive polymer (poly(n-vinylcarbazole): PVK), electrolyte (polyethylene oxide: PEO), bottom Pt electrode, and flexible substrate (polyethersulfone: PES), exhibiting the bipolar switching behavior of resistive random access memory (ReRAM). The cell also exhibited bending-fatigue-free nonvolatile memory characteristics: i.e., a set voltage of 1.0 V, a reset voltage of -1.6 V, retention time of >1 × 10(5) s with a memory margin of 9.2 × 10(5), program/erase endurance cycles of >10(2) with a memory margin of 8.4 × 10(5), and bending-fatigue-free cycles of ∼1 × 10(3) with a memory margin (I(on)/I(off)) of 3.3 × 10(5). PMID:25297517

  6. Flexible conductive-bridging random-access-memory cell vertically stacked with top Ag electrode, PEO, PVK, and bottom Pt electrode

    NASA Astrophysics Data System (ADS)

    Seung, Hyun-Min; Kwon, Kyoung-Cheol; Lee, Gon-Sub; Park, Jea-Gun

    2014-10-01

    Flexible conductive-bridging random-access-memory (RAM) cells were fabricated with a cross-bar memory cell stacked with a top Ag electrode, conductive polymer (poly(n-vinylcarbazole): PVK), electrolyte (polyethylene oxide: PEO), bottom Pt electrode, and flexible substrate (polyethersulfone: PES), exhibiting the bipolar switching behavior of resistive random access memory (ReRAM). The cell also exhibited bending-fatigue-free nonvolatile memory characteristics: i.e., a set voltage of 1.0 V, a reset voltage of -1.6 V, retention time of >1 × 105 s with a memory margin of 9.2 × 105, program/erase endurance cycles of >102 with a memory margin of 8.4 × 105, and bending-fatigue-free cycles of ˜1 × 103 with a memory margin (Ion/Ioff) of 3.3 × 105.

  7. Single-crystal C60 needle/CuPc nanoparticle double floating-gate for low-voltage organic transistors based non-volatile memory devices.

    PubMed

    Chang, Hsuan-Chun; Lu, Chien; Liu, Cheng-Liang; Chen, Wen-Chang

    2015-01-01

    Low-voltage organic field-effect transistor memory devices exhibiting a wide memory window, low power consumption, acceptable retention, endurance properties, and tunable memory performance are fabricated. The performance is achieved by employing single-crystal C60 needles and copper phthalocyanine nanoparticles to produce an ambipolar (hole/electron) trapping effect in a double floating-gate architecture. PMID:25358891

  8. Structural Phase Transition Effect on Resistive Switching Behavior of MoS2 -Polyvinylpyrrolidone Nanocomposites Films for Flexible Memory Devices.

    PubMed

    Zhang, Peng; Gao, Cunxu; Xu, Benhua; Qi, Lin; Jiang, Changjun; Gao, Meizhen; Xue, Desheng

    2016-04-01

    The 2H phase and 1T phase coexisting in the same molybdenum disulfide (MoS2 ) nanosheets can influence the electronic properties of the materials. The 1T phase of MoS2 is introduced into the 2H-MoS2 nanosheets by two-step hydrothermal synthetic methods. Two types of nonvolatile memory effects, namely write-once read-many times memory and rewritable memory effect, are observed in the flexible memory devices with the configuration of Al/1T@2H-MoS2 -polyvinylpyrrolidone (PVP)/indium tin oxide (ITO)/polyethylene terephthalate (PET) and Al/2H-MoS2 -PVP/ITO/PET, respectively. It is observed that structural phase transition in MoS2 nanosheets plays an important role on the resistive switching behaviors of the MoS2 -based device. It is hoped that our results can offer a general route for the preparation of various promising nanocomposites based on 2D nanosheets of layered transition metal dichalcogenides for fabricating the high performance and flexible nonvolatile memory devices through regulating the phase structure in the 2D nanosheets.

  9. Closed-form analytical model of static noise margin for ultra-low voltage eight-transistor tunnel FET static random access memory

    NASA Astrophysics Data System (ADS)

    Fuketa, Hiroshi; O'uchi, Shin-ichi; Fukuda, Koichi; Mori, Takahiro; Morita, Yukinori; Masahara, Meishoku; Matsukawa, Takashi

    2016-04-01

    Variations of eight-transistor (8T) tunnel FET (TFET) static random access memory (SRAM) cells at ultra-low supply voltage (V DD) of 0.3 V are discussed. A closed-form analytical model for the static noise margin (SNM) of the TFET SRAM cells is proposed to clarify the dependence of SNM on device parameters and is verified by simulations. The SNM variations caused by process variations are investigated using the proposed model, and we show a requirement for the threshold voltage (V TH) variation in the TFET SRAM design, which indicates that the V TH variation must be reduced as the subthreshold swing becomes steeper. In addition, a feasibility of the TFET SRAM cells operating at V DD = 0.3 V in two different process technologies is evaluated using the proposed model.

  10. Effects of drying temperature and ethanol concentration on bipolar switching characteristics of natural Aloe vera-based memory devices.

    PubMed

    Lim, Zhe Xi; Cheong, Kuan Yew

    2015-10-28

    Extracted, formulated, and processed natural Aloe vera has been used as an active layer for memory applications. The functional memory device is realized by a bottom-up structure of ITO/Aloe vera/Al in which the Aloe vera is spin-coated after mixing with different concentrations of ethanol (0-80 wt%) and subsequently dried at different temperatures (50-120 °C). From the current density-voltage measurements, the device can exhibit a reproducible bipolar switching characteristic with pure Aloe vera dried at 50 °C. It is proposed that charges are transported across the Aloe vera layer via space-charge-limited conduction (SCLC), and clusters of interstitial space formed by the functional groups of acemannans and de-esterified pectins in the dried Aloe vera contribute to the memory effect. The formation of charge traps in the Aloe vera layer is dependent on the drying temperature. The drying temperature of a memory-switching Aloe vera layer can be extended to 120 °C with the addition of appropriate amounts of ethanol. The concept of using natural Aloe vera as an active material for memory applications has been demonstrated, and the read memory window, ON/OFF ratio, and retention time are approximately 5.0 V, 10(3), and >10(4) s, respectively. PMID:26400096

  11. Effects of drying temperature and ethanol concentration on bipolar switching characteristics of natural Aloe vera-based memory devices.

    PubMed

    Lim, Zhe Xi; Cheong, Kuan Yew

    2015-10-28

    Extracted, formulated, and processed natural Aloe vera has been used as an active layer for memory applications. The functional memory device is realized by a bottom-up structure of ITO/Aloe vera/Al in which the Aloe vera is spin-coated after mixing with different concentrations of ethanol (0-80 wt%) and subsequently dried at different temperatures (50-120 °C). From the current density-voltage measurements, the device can exhibit a reproducible bipolar switching characteristic with pure Aloe vera dried at 50 °C. It is proposed that charges are transported across the Aloe vera layer via space-charge-limited conduction (SCLC), and clusters of interstitial space formed by the functional groups of acemannans and de-esterified pectins in the dried Aloe vera contribute to the memory effect. The formation of charge traps in the Aloe vera layer is dependent on the drying temperature. The drying temperature of a memory-switching Aloe vera layer can be extended to 120 °C with the addition of appropriate amounts of ethanol. The concept of using natural Aloe vera as an active material for memory applications has been demonstrated, and the read memory window, ON/OFF ratio, and retention time are approximately 5.0 V, 10(3), and >10(4) s, respectively.

  12. Active Flash: Performance-Energy Tradeoffs for Out-of-Core Processing on Non-Volatile Memory Devices

    SciTech Connect

    Boboila, Simona; Kim, Youngjae; Vazhkudai, Sudharshan S; Desnoyers, Peter; Shipman, Galen M

    2012-01-01

    In this abstract, we study the performance and energy tradeoffs involved in migrating data analysis into the flash device, a process we refer to as Active Flash. The Active Flash paradigm is similar to 'active disks', which has received considerable attention. Active Flash allows us to move processing closer to data, thereby minimizing data movement costs and reducing power consumption. It enables true out-of-core computation. The conventional definition of out-of-core solvers refers to an approach to process data that is too large to fit in the main memory and, consequently, requires access to disk. However, in Active Flash, processing outside the host CPU literally frees the core and achieves real 'out-of-core' analysis. Moving analysis to data has long been desirable, not just at this level, but at all levels of the system hierarchy. However, this requires a detailed study on the tradeoffs involved in achieving analysis turnaround under an acceptable energy envelope. To this end, we first need to evaluate if there is enough computing power on the flash device to warrant such an exploration. Flash processors require decent computing power to run the internal logic pertaining to the Flash Translation Layer (FTL), which is responsible for operations such as address translation, garbage collection (GC) and wear-leveling. Modern SSDs are composed of multiple packages and several flash chips within a package. The packages are connected using multiple I/O channels to offer high I/O bandwidth. SSD computing power is also expected to be high enough to exploit such inherent internal parallelism within the drive to increase the bandwidth and to handle fast I/O requests. More recently, SSD devices are being equipped with powerful processing units and are even embedded with multicore CPUs (e.g. ARM Cortex-A9 embedded processor is advertised to reach 2GHz frequency and deliver 5000 DMIPS; OCZ RevoDrive X2 SSD has 4 SandForce controllers, each with 780MHz max frequency

  13. The theory research of multi-user quantum access network with Measurement Device Independent quantum key distribution

    NASA Astrophysics Data System (ADS)

    Ji, Yi-Ming; Li, Yun-Xia; Shi, Lei; Meng, Wen; Cui, Shu-Min; Xu, Zhen-Yu

    2015-10-01

    Quantum access network can't guarantee the absolute security of multi-user detector and eavesdropper can get access to key information through time-shift attack and other ways. Measurement-device-independent quantum key distribution is immune from all the detection attacks, and accomplishes the safe sharing of quantum key. In this paper, that Measurement-device-independent quantum key distribution is used in the application of multi-user quantum access to the network is on the research. By adopting time-division multiplexing technology to achieve the sharing of multiuser detector, the system structure is simplified and the security of quantum key sharing is acquired.

  14. Parallel database search and prime factorization with magnonic holographic memory devices

    NASA Astrophysics Data System (ADS)

    Khitun, Alexander

    2015-12-01

    In this work, we describe the capabilities of Magnonic Holographic Memory (MHM) for parallel database search and prime factorization. MHM is a type of holographic device, which utilizes spin waves for data transfer and processing. Its operation is based on the correlation between the phases and the amplitudes of the input spin waves and the output inductive voltage. The input of MHM is provided by the phased array of spin wave generating elements allowing the producing of phase patterns of an arbitrary form. The latter makes it possible to code logic states into the phases of propagating waves and exploit wave superposition for parallel data processing. We present the results of numerical modeling illustrating parallel database search and prime factorization. The results of numerical simulations on the database search are in agreement with the available experimental data. The use of classical wave interference may results in a significant speedup over the conventional digital logic circuits in special task data processing (e.g., √n in database search). Potentially, magnonic holographic devices can be implemented as complementary logic units to digital processors. Physical limitations and technological constrains of the spin wave approach are also discussed.

  15. Parallel database search and prime factorization with magnonic holographic memory devices

    SciTech Connect

    Khitun, Alexander

    2015-12-28

    In this work, we describe the capabilities of Magnonic Holographic Memory (MHM) for parallel database search and prime factorization. MHM is a type of holographic device, which utilizes spin waves for data transfer and processing. Its operation is based on the correlation between the phases and the amplitudes of the input spin waves and the output inductive voltage. The input of MHM is provided by the phased array of spin wave generating elements allowing the producing of phase patterns of an arbitrary form. The latter makes it possible to code logic states into the phases of propagating waves and exploit wave superposition for parallel data processing. We present the results of numerical modeling illustrating parallel database search and prime factorization. The results of numerical simulations on the database search are in agreement with the available experimental data. The use of classical wave interference may results in a significant speedup over the conventional digital logic circuits in special task data processing (e.g., √n in database search). Potentially, magnonic holographic devices can be implemented as complementary logic units to digital processors. Physical limitations and technological constrains of the spin wave approach are also discussed.

  16. Encoding and retrieval processes involved in the access of source information in the absence of item memory.

    PubMed

    Ball, B Hunter; DeWitt, Michael R; Knight, Justin B; Hicks, Jason L

    2014-09-01

    The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were related to the target item but never actually studied. In Experiments 1 and 2, participants studied 1 category member (e.g., onion) from a variety of different categories and at test were presented with an unstudied category label (e.g., vegetable) to probe memory for item and source information. In Experiments 3 and 4, 1 member of unidirectional (e.g., credit or card) or bidirectional (e.g., salt or pepper) associates was studied, whereas the other unstudied member served as a test probe. When recall failed, source information was accessible only when items were processed deeply during encoding (Experiments 1 and 2) and when there was strong forward associative strength between the retrieval cue and target (Experiments 3 and 4). These findings suggest that a retrieval probe diagnostic of semantically related item information reinstantiates information bound in memory during encoding that results in reactivation of associated contextual information, contingent upon sufficient learning of the item itself and the association between the item and its context information.

  17. Organic Memory Devices: 2D Mica Crystal as Electret in Organic Field-Effect Transistors for Multistate Memory (Adv. Mater. 19/2016).

    PubMed

    Zhang, Xiaotao; He, Yudong; Li, Rongjin; Dong, Huanli; Hu, Wenping

    2016-05-01

    R. Li, H. Dong, and co-workers describe the exfoliation of cheap and abundant minerals, such as mica, into nanometer-thick 2D crystals with atomically flat surfaces. As described on page 3755, the application of the 2D electret in organic field-effect transistors is well-suited for flexible nonvolatile memory devices. Stored information can be retrieved even after power cycling. Moreover, the devices can be used as full-function transistors with a low-resistance and a high-resistance state.

  18. Corruption in the health care sector: A barrier to access of orthopaedic care and medical devices in Uganda

    PubMed Central

    2012-01-01

    Background Globally, injuries cause approximately as many deaths per year as HIV/AIDS, tuberculosis and malaria combined, and 90% of injury deaths occur in low- and middle- income countries. Given not all injuries kill, the disability burden, particularly from orthopaedic injuries, is much higher but is poorly measured at present. The orthopaedic services and orthopaedic medical devices needed to manage the injury burden are frequently unavailable in these countries. Corruption is known to be a major barrier to access of health care, but its effects on access to orthopaedic services is still unknown. Methods A qualitative case study of 45 open-ended interviews was conducted to investigate the access to orthopaedic health services and orthopaedic medical devices in Uganda. Participants included orthopaedic surgeons, related healthcare professionals, industry and government representatives, and patients. Participants’ experiences in accessing orthopaedic medical devices were explored. Thematic analysis was used to analyze and code the transcripts. Results Analysis of the interview data identified poor leadership in government and corruption as major barriers to access of orthopaedic care and orthopaedic medical devices. Corruption was perceived to occur at the worker, hospital and government levels in the forms of misappropriation of funds, theft of equipment, resale of drugs and medical devices, fraud and absenteeism. Other barriers elicited included insufficient health infrastructure and human resources, and high costs of orthopaedic equipment and poverty. Conclusions This study identified perceived corruption as a significant barrier to access of orthopaedic care and orthopaedic medical devices in Uganda. As the burden of injury continues to grow, the need to combat corruption and ensure access to orthopaedic services is imperative. Anti-corruption strategies such as transparency and accountability measures, codes of conduct, whistleblower protection, and higher

  19. Ge2Sb2Te5 layer used as solid electrolyte in conductive-bridge memory devices fabricated on flexible substrate

    NASA Astrophysics Data System (ADS)

    Deleruyelle, D.; Putero, M.; Ouled-Khachroum, T.; Bocquet, M.; Coulet, M.-V.; Boddaert, X.; Calmes, C.; Muller, C.

    2013-01-01

    This paper shows that the well-know chalcogenide Ge2Sb2Te5 (GST) in its amorphous state may be advantageously used as solid electrolyte material to fabricate Conductive-Bridge Random Access Memory (CBRAM) devices. GST layer was sputtered on preliminary inkjet-printed silver lines acting as active electrode on either silicon or plastic substrates. Whatever the substrate, the resistance switching is unambiguously attested at a nanoscale by means of conductive-atomic force microscopy (C-AFM) using a Pt-Ir coated tip on the GST surface acting as a passive electrode. The resistance change is correlated to the appearance or disappearance of concomitant hillocks and current spots at the surface of the GST layer. This feature is attributed to the formation/dissolution of a silver-rich protrusion beneath the AFM tip during set/reset operation. Beside, this paper constitutes a step toward the elaboration of crossbar memory arrays on flexible substrates since CBRAM operations were demonstrated on W/GST/Ag crossbar memory cells obtained from an heterogeneous fabrication process combining physical deposition and inkjet-printing.

  20. ViSA: a neurodynamic model for visuo-spatial working memory, attentional blink, and conscious access.

    PubMed

    Simione, Luca; Raffone, Antonino; Wolters, Gezinus; Salmas, Paola; Nakatani, Chie; Belardinelli, Marta Olivetti; van Leeuwen, Cees

    2012-10-01

    Two separate lines of study have clarified the role of selectivity in conscious access to visual information. Both involve presenting multiple targets and distracters: one simultaneously in a spatially distributed fashion, the other sequentially at a single location. To understand their findings in a unified framework, we propose a neurodynamic model for Visual Selection and Awareness (ViSA). ViSA supports the view that neural representations for conscious access and visuo-spatial working memory are globally distributed and are based on recurrent interactions between perceptual and access control processors. Its flexible global workspace mechanisms enable a unitary account of a broad range of effects: It accounts for the limited storage capacity of visuo-spatial working memory, attentional cueing, and efficient selection with multi-object displays, as well as for the attentional blink and associated sparing and masking effects. In particular, the speed of consolidation for storage in visuo-spatial working memory in ViSA is not fixed but depends adaptively on the input and recurrent signaling. Slowing down of consolidation due to weak bottom-up and recurrent input as a result of brief presentation and masking leads to the attentional blink. Thus, ViSA goes beyond earlier 2-stage and neuronal global workspace accounts of conscious processing limitations.

  1. Evaluating OpenSHMEM Explicit Remote Memory Access Operations and Merged Requests

    SciTech Connect

    Boehm, Swen; Pophale, Swaroop S; Gorentla Venkata, Manjunath

    2016-01-01

    The OpenSHMEM Library Specification has evolved consid- erably since version 1.0. Recently, non-blocking implicit Remote Memory Access (RMA) operations were introduced in OpenSHMEM 1.3. These provide a way to achieve better overlap between communication and computation. However, the implicit non-blocking operations do not pro- vide a separate handle to track and complete the individual RMA opera- tions. They are guaranteed to be completed after either a shmem quiet(), shmem barrier() or a shmem barrier all() is called. These are global com- pletion and synchronization operations. Though this semantic is expected to achieve a higher message rate for the applications, the drawback is that it does not allow fine-grained control over the completion of RMA operations. In this paper, first, we introduce non-blocking RMA operations with requests, where each operation has an explicit request to track and com- plete the operation. Second, we introduce interfaces to merge multiple requests into a single request handle. The merged request tracks multiple user-selected RMA operations, which provides the flexibility of tracking related communication operations with one request handle. Lastly, we explore the implications in terms of performance, productivity, usability and the possibility of defining different patterns of communication via merging of requests. Our experimental results show that a well designed and implemented OpenSHMEM stack can hide the overhead of allocating and managing the requests. The latency of RMA operations with requests is similar to blocking and implicit non-blocking RMA operations. We test our implementation with the Scalable Synthetic Compact Applications (SSCA #1) benchmark and observe that using RMA operations with requests and merging of these requests outperform the implementation using blocking RMA operations and implicit non-blocking operations by 49% and 74% respectively.

  2. Sub-nanosecond threshold-switching dynamics and set process of In3SbTe2 phase-change memory devices

    NASA Astrophysics Data System (ADS)

    Pandey, Shivendra Kumar; Manivannan, Anbarasu

    2016-06-01

    Phase-change materials show promising features for high-speed, non-volatile, random access memory, however achieving a fast electrical switching is a key challenge. We report here, the dependence of electrical switching dynamics including transient parameters such as delay time, switching time, etc., on the applied voltage and the set process of In3SbTe2 phase-change memory devices at the picosecond (ps) timescale. These devices are found to exhibit threshold-switching at a critical voltage called threshold-voltage, VT of 1.9 ± 0.1 V, having a delay time of 25 ns. Further, the delay time decreases exponentially to a remarkably smaller value, as short as 300 ± 50 ps upon increasing the applied voltage up to 1.1VT. Furthermore, we demonstrate a rapid phase-change behavior from amorphous (˜10 MΩ) to poly-crystalline (˜10 kΩ) phase using time-resolved measurements revealing an ultrafast set process, which is primarily initiated by the threshold-switching process within 550 ps for an applied voltage pulse with a pulse-width of 1.5 ns and an amplitude of 2.3 V.

  3. Implementing a bubble memory hierarchy system

    NASA Technical Reports Server (NTRS)

    Segura, R.; Nichols, C. D.

    1979-01-01

    This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

  4. Feasibility and Safety of Endovascular Stripping of Totally Implantable Venous Access Devices

    SciTech Connect

    Heye, Sam Maleux, Geert; Goossens, G. A.; Vaninbroukx, Johan; Jerome, M.; Stas, M.

    2012-06-15

    Purpose: To evaluate the safety and feasibility of percutaneous stripping of totally implantable venous access devices (TIVAD) in case of catheter-related sleeve and to report a technique to free the catheter tip from vessel wall adherence. Materials and Methods: A total of 37 stripping procedures in 35 patients (14 men, 40%, and 21 women, 60%, mean age 53 {+-} 14 years) were reviewed. Totally implantable venous access devices were implanted because of malignancy in most cases (85.7%). Catheter-related sleeve was confirmed as cause of persistent catheter dysfunction despite instillation of thrombolytics. A technique to mobilize the catheter tip from the vessel wall was used when stripping with the snare catheter was impossible. Technical success, complication rate, and outcome were noted. Results: A total of 55.9% (n = 19) of the 34 technically successful procedures (91.9%) could be done with the snare catheter. In 15 cases (44.1%), additional maneuvers to free the TIVAD's tip from the vessel wall were needed. Success rate was not significantly lower before (72.4%) than after (96.7%) implementation of the new technique (P = 0.09). No complications were observed. Follow-up was available in 67.6% of cases. Recurrent catheter dysfunction was found in 17 TIVADs (78.3%) at a mean of 137.7 days and a median of 105 days. Conclusions: Stripping of TIVADs is technically feasible and safe, with an overall success rate of 91.9%. Additional endovascular techniques to mobilize the distal catheter tip from the wall of the superior vena cava or right atrium to allow encircling the TIVAD tip with the snare catheter may be needed in 44.1% of cases.

  5. Organizational Factors in Human Memory: Implications for Library Organization and Access Systems.

    ERIC Educational Resources Information Center

    Najarian, Suzanne E.

    1981-01-01

    Examines psychological studies on memory and learning for what they reveal about human categorizing processes and the organizing principles and limitations of human memory. Findings suggest considerations for the design of information systems that would take conceptual organization of knowledge into account. (FM)

  6. Contexts and Control Operations Used in Accessing List-Specific, Generalized, and Semantic Memories

    ERIC Educational Resources Information Center

    Humphreys, Michael S.; Murray, Krista L.; Maguire, Angela M.

    2009-01-01

    The human ability to focus memory retrieval operations on a particular list, episode or memory structure has not been fully appreciated or documented. In Experiment 1-3, we make it increasingly difficult for participants to switch between a less recent list (multiple study opportunities), and a more recent list (single study opportunity). Task…

  7. Retrieval practice enhances the accessibility but not the quality of memory.

    PubMed

    Sutterer, David W; Awh, Edward

    2016-06-01

    Numerous studies have demonstrated that retrieval from long-term memory (LTM) can enhance subsequent memory performance, a phenomenon labeled the retrieval practice effect. However, the almost exclusive reliance on categorical stimuli in this literature leaves open a basic question about the nature of this improvement in memory performance. It has not yet been determined whether retrieval practice improves the probability of successful memory retrieval or the quality of the retrieved representation. To answer this question, we conducted three experiments using a mixture modeling approach (Zhang & Luck, 2008) that provides a measure of both the probability of recall and the quality of the recalled memories. Subjects attempted to memorize the color of 400 unique shapes. After every 10 images were presented, subjects either recalled the last 10 colors (the retrieval practice condition) by clicking on a color wheel with each shape as a retrieval cue or they participated in a control condition that involved no further presentations (Experiment 1) or restudy of the 10 shape/color associations (Experiments 2 and 3). Performance in a subsequent delayed recall test revealed a robust retrieval practice effect. Subjects recalled a significantly higher proportion of items that they had previously retrieved relative to items that were untested or that they had restudied. Interestingly, retrieval practice did not elicit any improvement in the precision of the retrieved memories. The same empirical pattern also was observed following delays of greater than 24 hours. Thus, retrieval practice increases the probability of successful memory retrieval but does not improve memory quality.

  8. Speed and Accuracy of Accessing Information in Working Memory: An Individual Differences Investigation of Focus Switching

    ERIC Educational Resources Information Center

    Unsworth, Nash; Engle, Randall W.

    2008-01-01

    Three experiments examined the nature of individual differences in switching the focus of attention in working memory. Participants performed 3 versions of a continuous counting task that required successive updating and switching between counts. Across all 3 experiments, individual differences in working memory span and fluid intelligence were…

  9. Central venous access devices: an investigation of oncology nurses' troubleshooting techniques.

    PubMed

    Mason, Tina M; Ferrall, Sheila M; Boyington, Alice R; Reich, Richard R

    2014-08-01

    Experienced oncology nurses use different troubleshooting techniques for clearing occluded central venous access devices (CVADs) with varying degrees of success. The purpose of this study was to explore troubleshooting techniques used for clearing occluded CVADs by experienced oncology RNs and identify the perceived effectiveness of each technique. An invitation for a web-based survey was sent to select RN members of the Oncology Nursing Society. All nurses (N = 224) reported asking patients to raise and/or move their arm. Most nurses asked patients to lie down, cough, and take deep breaths. Respondents considered instilling a thrombolytic agent to be the most effective technique. No associations were found between techniques and respondents' years in oncology nursing, work setting, certification, or academic degree. The findings contribute to knowledge about care of patients with occluded devices and will help formulate direction for additional investigation of CVADs. Establishing the appropriateness of practice-related troubleshooting techniques may eliminate unnecessary steps and save nursing time. Educating nurses on the topic will also help reduce techniques that are not expected to yield results or are contraindicated. PMID:25095294

  10. Nurses’ Use of Mobile Devices to Access Information in Health Care Environments in Australia: A Survey of Undergraduate Students

    PubMed Central

    2014-01-01

    Background The growth of digital technology has created challenges for safe and appropriate use of mobile or portable devices during work-integrated learning (WIL) in health care environments. Personal and professional use of technology has outpaced the development of policy or codes of practice for guiding its use at the workplace. There is a perceived risk that portable devices may distract from provision of patient or client care if used by health professionals or students during employment or WIL. Objective This study aimed to identify differences in behavior of undergraduate nurses in accessing information, using a portable or mobile device, when undertaking WIL compared to other non-work situations. Methods A validated online survey was administered to students while on placement in a range of health care settings in two Australian states. Results There were 84 respondents, with 56% (n=47) reporting access to a mobile or portable device. Differences in use of a mobile device away from, compared with during WIL, were observed for non-work related activities such as messaging (P<.001), social networking (P<.001), shopping on the Internet (P=.01), conducting personal business online (P=.01), and checking or sending non-work related texts or emails to co-workers (P=.04). Study-related activities were conducted more regularly away from the workplace and included accessing University sites for information (P=.03) and checking or sending study-related text messages or emails to friends or co-workers (P=.01). Students continued to access nursing, medical, professional development, and study-related information away from the workplace. Conclusions Undergraduate nurses limit their access to non-work or non-patient centered information while undertaking WIL. Work-related mobile learning is being undertaken, in situ, by the next generation of nurses who expect easy access to mobile or portable devices at the workplace, to ensure safe and competent care is delivered to

  11. Metalloproteinase MT1-MMP islets act as memory devices for podosome reemergence

    PubMed Central

    El Azzouzi, Karim; Wiesner, Christiane

    2016-01-01

    Podosomes are dynamic cell adhesions that are also sites of extracellular matrix degradation, through recruitment of matrix-lytic enzymes, particularly of matrix metalloproteinases. Using total internal reflection fluorescence microscopy, we show that the membrane-bound metalloproteinase MT1-MMP is enriched not only at podosomes but also at distinct “islets” embedded in the plasma membrane of primary human macrophages. MT1-MMP islets become apparent upon podosome dissolution and persist beyond podosome lifetime. Importantly, the majority of MT1-MMP islets are reused as sites of podosome reemergence. siRNA-mediated knockdown and recomplementation analyses show that islet formation is based on the cytoplasmic tail of MT1-MMP and its ability to bind the subcortical actin cytoskeleton. Collectively, our data reveal a previously unrecognized phase in the podosome life cycle and identify a structural function of MT1-MMP that is independent of its proteolytic activity. MT1-MMP islets thus act as cellular memory devices that enable efficient and localized reformation of podosomes, ensuring coordinated matrix degradation and invasion. PMID:27069022

  12. Interface traps and quantum size effects on the retention time in nanoscale memory devices

    NASA Astrophysics Data System (ADS)

    Mao, Ling-Feng

    2013-08-01

    Based on the analysis of Poisson equation, an analytical surface potential model including interface charge density for nanocrystalline (NC) germanium (Ge) memory devices with p-type silicon substrate has been proposed. Thus, the effects of Pb defects at Si(110)/SiO2, Si(111)/SiO2, and Si(100)/SiO2 interfaces on the retention time have been calculated after quantum size effects have been considered. The results show that the interface trap density has a large effect on the electric field across the tunneling oxide layer and leakage current. This letter demonstrates that the retention time firstly increases with the decrease in diameter of NC Ge and then rapidly decreases with the diameter when it is a few nanometers. This implies that the interface defects, its energy distribution, and the NC size should be seriously considered in the aim to improve the retention time from different technological processes. The experimental data reported in the literature support the theoretical expectation.

  13. A novel MR-guided interventional device for 3D circumferential access to breast tissue

    PubMed Central

    Smith, Matthew; Zhai, Xu; Harter, Ray; Sisney, Gale; Elezaby, Mai; Fain, Sean

    2008-01-01

    MRI is rapidly growing as a tool for image-guided procedures in the breast such as needle localizations, biopsy, and cryotherapy. The ability of MRI to resolve small (<1 cm) lesions allows earlier detection and diagnosis than with ultrasound. Most MR-guidance methods perform a two-dimensional compression of the breast that distorts tissue anatomy and limits medial access. This work presents a system for localizing breast lesions with 360° access to breast tissue. A novel system has been developed to perform breast lesion localization using MR guidance that uses a 3D radial coordinate system with four degrees of freedom. The device is combined with a novel breast RF coil for improved signal to noise and rotates 360° around the breast to allow medial, lateral, superior, and inferior access minimizing insertion depth to the target. Coil performance was evaluated using a human volunteer by comparing signal to noise from both the developed breast RF coil and a commercial seven-channel breast coil. The system was tested with a breast-shaped gel phantom containing randomly distributed MR-visible targets. MR-compatible localization needles were used to demonstrate the accuracy and feasibility of the concept for breast biopsy. Localization results were classified based on the relationship between the final needle tip position and the lesion. A 3D bladder concept was also tested using animal tissue to evaluate the device’s ability to immobilize deformable breast tissue during a needle insertion. The RF breast coil provided signal to noise values comparable to a seven-channel breast coil. The needle tip was in contact with the targeted lesion in 89% (25∕28) of all the trials and 100% (6∕6) of the trials with targeted lesions >6 mm. Target lesions were 3–4 mm in diameter for 47% (13∕28), 5–6 mm in diameter for 32% (9∕28), and over 6 mm in diameter for 21% (6∕28) of the trials, respectively. The 3D bladder concept was shown to immobilize a deformable animal

  14. Effect of embedded metal nanocrystals on the resistive switching characteristics in NiN-based resistive random access memory cells

    SciTech Connect

    Yun, Min Ju; Kim, Hee-Dong; Man Hong, Seok; Hyun Park, Ju; Su Jeon, Dong; Geun Kim, Tae

    2014-03-07

    The metal nanocrystals (NCs) embedded-NiN-based resistive random access memory cells are demonstrated using several metal NCs (i.e., Pt, Ni, and Ti) with different physical parameters in order to investigate the metal NC's dependence on resistive switching (RS) characteristics. First, depending on the electronegativity of metal, the size of metal NCs is determined and this affects the operating current of memory cells. If metal NCs with high electronegativity are incorporated, the size of the NCs is reduced; hence, the operating current is reduced owing to the reduced density of the electric field around the metal NCs. Second, the potential wells are formed by the difference of work function between the metal NCs and active layer, and the barrier height of the potential wells affects the level of operating voltage as well as the conduction mechanism of metal NCs embedded memory cells. Therefore, by understanding these correlations between the active layer and embedded metal NCs, we can optimize the RS properties of metal NCs embedded memory cells as well as predict their conduction mechanisms.

  15. Management of long-term and reversible hysteroscopic sterilization: a novel device with nickel-titanium shape memory alloy

    PubMed Central

    2014-01-01

    Background Female sterilization is the second most commonly used method of contraception in the United States. Female sterilization can now be performed through laparoscopic, abdominal, or hysteroscopic approaches. The hysteroscopic sterilization may be a safer option than sterilization through laparoscopy or laparotomy because it avoids invading the abdominal cavity and undergoing general anaesthesia. Hysteroscopic sterilization mainly includes chemical agents and mechanical devices. Common issues related to the toxicity of the chemical agents used have raised concerns regarding this kind of contraception. The difficulty of the transcervical insertion of such mechanical devices into the fallopian tubes has increased the high incidence of device displacement or dislodgment. At present, Essure® is the only commercially available hysteroscopic sterilization device being used clinically. The system is irreversible and is not effective immediately. Presentation of the hypothesis Our new hysteroscopic sterility system consists of nickel-titanium (NiTi) shape memory alloy and a waterproof membrane. The NiTi alloy is covered with two coatings to avoid toxic Ni release and to prevent stimulation of epithelial tissue growth around the oviducts. Because of the shape memory effect of the NiTi alloy, the device works like an umbrella: it stays collapsed at low temperature before placement and opens by the force of shape memory activated by the body temperature after it is inserted hysteroscopically into the interstitial tubal lumen. The rim of the open device will incise into interstitial myometrium during the process of unfolding. Once the device is fixed, it blocks the tube completely. When the patient no longer wishes for sterilization, the device can be closed by perfusing liquid with low temperature into the uterine cavity, followed by prospective hysteroscopic removal. After the device removal, the fallopian tube will revert to its physiological functions. Testing the

  16. Application of full-chip optical proximity correction for sub-60-nm memory device in polarized illumination

    NASA Astrophysics Data System (ADS)

    Yune, Hyoung-Soon; Ahn, Yeong-Bae; Lee, Dong-jin; Moon, James; Nam, Byung-Ho; Yim, Dong-gyu

    2007-03-01

    As the design rule shrinks to its natural limit, reduction in lithography process margin and high Critical Dimension (CD) error gives rise to use of many Resolution Enhancement Techniques (RET). Recently, one the popular RET method to solve the above problem is polarized illumination. It is used to enhance the reduced lithography process margin and enhance CD uniformity. Polarization lithography basically uses one sided polarized light source. Therefore process margin increases for smaller design rule patterns. In this paper, we will present the results for polarized illumination based Optical proximity Correction (OPC) for sub-60nm memory device. First, models for polarization based and un-polarization based method will be compared for its model accuracy. Second, the process margin improvement for polarized and un-polarized illumination will be compared and analyzed for poly layer of sub-60nm memory device. Finally, method for further enhancing CD error within 5% for polarized OPC model will be discussed.

  17. Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Hong, Augustin Jinwoo

    Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

  18. Totally Implantable Venous Access Devices – 20 Years' Experience of Implantation in Cystic Fibrosis Patients

    PubMed Central

    Royle, T James; Davies, Ruth E; Gannon, Mark X

    2008-01-01

    INTRODUCTION Totally implantable venous access devices (TIVADs) are widely used to provide long-term, central venous access for antibiotic delivery in cystic fibrosis patients. However, few studies have demonstrated long-term follow-up with large cohorts. PATIENTS AND METHODS This is a retrospective review of TIVADs implanted in cystic fibrosis patients by vascular surgeons at a tertiary referral centre, using an open venous cut-down technique, from March 1986 to July 2006. The cephalic vein was preferentially chosen for line placement, in the deltopectoral groove, under fluoroscopic control. TIVAD performance (life-span or survival) and complications were evaluated. Data were extracted by review of a local database (data collated prospectively since 1986), with supplementation from electronic patient records and medical notes. RESULTS In total 165 TIVADs in 109 patients (34 males, 75 females) were reviewed. Median survival was 1441 days (range, 6–4440 days). Cumulative patency was 146,072 catheter-days. No immediate intrathoracic complications (pneumothorax, haemothorax, nerve injury) occurred. There were 3 early and 82 late complications, namely: occlusion (33 TIVADs; median age 510 days), infection (23 TIVADs; median 376 days), leakage (16; median 283 days), pain or discomfort (6), venous thrombosis (5), extravasation/skin necrosis (1), vegetation in right atrium (1). Overall incidence of complications was 0.58 per 1000 catheter-days. CONCLUSIONS This study concurs with others that TIVADs are safe and effective, with a favourable life-span in cystic fibrosis patients if well looked after in a specialist centre. Complications of infection, leakage and occlusion do occur. Using an open, venous cut-down technique with fluoroscopic control avoids any immediate intrathoracic complications. PMID:18990281

  19. Electric field mediated non-volatile tuning magnetism in CoPt/PMN-PT heterostructure for magnetoelectric memory devices

    NASA Astrophysics Data System (ADS)

    Yang, Y. T.; Li, J.; Peng, X. L.; Wang, X. Q.; Wang, D. H.; Cao, Q. Q.; Du, Y. W.

    2016-02-01

    We report a power efficient non-volatile magnetoelectric memory in the CoPt/(011)PMN-PT heterostructure. Two reversible and stable electric field induced coercivity states (i.e., high-HC or low-HC) are obtained due to the strain mediated converse magnetoelectric effect. The reading process of the different coercive field information written by electric fields is demonstrated by using a magnetoresistance read head. This result shows good prospects in the application of novel multiferroic devices.

  20. Power- and Low-Resistance-State-Dependent, Bipolar Reset-Switching Transitions in SiN-Based Resistive Random-Access Memory

    NASA Astrophysics Data System (ADS)

    Kim, Sungjun; Park, Byung-Gook

    2016-08-01

    A study on the bipolar-resistive switching of an Ni/SiN/Si-based resistive random-access memory (RRAM) device shows that the influences of the reset power and the resistance value of the low-resistance state (LRS) on the reset-switching transitions are strong. For a low LRS with a large conducting path, the sharp reset switching, which requires a high reset power (>7 mW), was observed, whereas for a high LRS with small multiple-conducting paths, the step-by-step reset switching with a low reset power (<7 mW) was observed. The attainment of higher nonlinear current-voltage ( I-V) characteristics in terms of the step-by-step reset switching is due to the steep current-increased region of the trap-controlled space charge-limited current (SCLC) model. A multilevel cell (MLC) operation, for which the reset stop voltage ( V STOP) is used in the DC sweep mode and an incremental amplitude is used in the pulse mode for the step-by-step reset switching, is demonstrated here. The results of the present study suggest that well-controlled conducting paths in a SiN-based RRAM device, which are not too strong and not too weak, offer considerable potential for the realization of low-power and high-density crossbar-array applications.