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Sample records for access memory semiconductors

  1. 75 FR 16507 - In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-04-01

    ... COMMISSION In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory... certain semiconductor chips having synchronous dynamic random access memory controllers and products... section 337 by importing certain semiconductor chips having synchronous dynamic random access...

  2. 75 FR 44989 - In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-07-30

    ... Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products... chips having synchronous dynamic random access memory controllers and product containing the same by... importing certain semiconductor chips having synchronous dynamic random access memory controllers...

  3. Integrated semiconductor-magnetic random access memory system

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

    2001-01-01

    The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

  4. 76 FR 2336 - Dynamic Random Access Memory Semiconductors From the Republic of Korea: Final Results of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-01-13

    ... International Trade Administration Dynamic Random Access Memory Semiconductors From the Republic of Korea: Final... on dynamic random access memory semiconductors from the Republic of Korea for the period January 1... publication of the preliminary results of this review. See Dynamic Random Access Memory Semiconductors...

  5. 75 FR 55764 - Dynamic Random Access Memory Semiconductors From the Republic of Korea: Preliminary Results of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-09-14

    ... International Trade Administration Dynamic Random Access Memory Semiconductors From the Republic of Korea... administrative review of the countervailing duty order on dynamic random access memory semiconductors from the... countervailing duty order on dynamic random access memory semiconductors (``DRAMS'') From the Republic of...

  6. 75 FR 14467 - In the Matter of: Certain Dynamic Random Access Memory Semiconductors and Products Containing...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-03-25

    ... COMMISSION In the Matter of: Certain Dynamic Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of Investigation AGENCY: U.S. International Trade Commission. ACTION... random access memory semiconductors and products containing same, including memory modules, by reason...

  7. 75 FR 20564 - Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-04-20

    ... From the Federal Register Online via the Government Publishing Office DEPARTMENT OF COMMERCE International Trade Administration Dynamic Random Access Memory Semiconductors from the Republic of Korea... administrative review of the countervailing duty order on dynamic random access memory semiconductors from...

  8. 77 FR 26789 - Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2012-05-07

    ... From the Federal Register Online via the Government Publishing Office ] INTERNATIONAL TRADE COMMISSION Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same; Determination Rescinding the Exclusion Order and Cease and Desist Orders...

  9. 75 FR 44283 - In the Matter of Certain Dynamic Random Access Memory Semiconductors and Products Containing Same...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-07-28

    ... COMMISSION In the Matter of Certain Dynamic Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of a Commission Determination Not To Review an Initial Determination... within the United States after importation of certain dynamic random access memory semiconductors...

  10. Access to long-term optical memories using photon echoes retrieved from semiconductor spins

    NASA Astrophysics Data System (ADS)

    Langer, L.; Poltavtsev, S. V.; Yugova, I. A.; Salewski, M.; Yakovlev, D. R.; Karczewski, G.; Wojtowicz, T.; Akimov, I. A.; Bayer, M.

    2014-11-01

    The ability to store optical information is important for both classical and quantum communication. Achieving this in a comprehensive manner (converting the optical field into material excitation, storing this excitation, and releasing it after a controllable time delay) is greatly complicated by the many, often conflicting, properties of the material. More specifically, optical resonances in semiconductor quantum structures with high oscillator strength are inevitably characterized by short excitation lifetimes (and, therefore, short optical memory). Here, we present a new experimental approach to stimulated photon echoes by transferring the information contained in the optical field into a spin system, where it is decoupled from the optical vacuum field and may persist much longer. We demonstrate this for an n-doped CdTe/(Cd,Mg)Te quantum well, the storage time of which could be increased by more than three orders of magnitude, from the picosecond range up to tens of nanoseconds.

  11. Spin-based single-photon transistor, dynamic random access memory, diodes, and routers in semiconductors

    NASA Astrophysics Data System (ADS)

    Hu, C. Y.

    2016-12-01

    The realization of quantum computers and quantum Internet requires not only quantum gates and quantum memories, but also transistors at single-photon levels to control the flow of information encoded on single photons. Single-photon transistor (SPT) is an optical transistor in the quantum limit, which uses a single photon to open or block a photonic channel. In sharp contrast to all previous SPT proposals which are based on single-photon nonlinearities, here I present a design for a high-gain and high-speed (up to THz) SPT based on a linear optical effect: giant circular birefringence induced by a single spin in a double-sided optical microcavity. A gate photon sets the spin state via projective measurement and controls the light propagation in the optical channel. This spin-cavity transistor can be directly configured as diodes, routers, DRAM units, switches, modulators, etc. Due to the duality as quantum gate and transistor, the spin-cavity unit provides a solid-state platform ideal for future Internet: a mixture of all-optical Internet with quantum Internet.

  12. Access to long-term optical memories using photon echoes retrieved from electron spins in semiconductor quantum wells

    NASA Astrophysics Data System (ADS)

    Poltavtsev, S. V.; Langer, L.; Yugova, I. A.; Salewski, M.; Kapitonov, Y. V.; Yakovlev, D. R.; Karczewski, G.; Wojtowicz, T.; Akimov, I. A.; Bayer, M.

    2016-10-01

    We use spontaneous (two-pulse) and stimulated (three-pulse) photon echoes for studying the coherent evolution of optically excited ensemble of trions which are localized in semiconductor CdTe/CdMgTe quantum well. Application of transverse magnetic field leads to the Larmor precession of the resident electron spins, which shuffles optically induced polarization between optically accessible and inaccessible states. This results in several spectacular phenomena. First, magnetic field induces oscillations of spontaneous photon echo amplitude. Second, in three-pulse excitation scheme, the photon echo decay is extended by several orders of magnitude. In this study, short-lived optical excitation which is created by the first pulse is coherently transferred into a long-lived electron spin state using the second optical pulse. This coherent spin state of electron ensemble persists much longer than any optical excitation in the system, preserving information on initial optical field, which can be retrieved as a photon echo by means of third optical pulse.

  13. Atomic memory access hardware implementations

    DOEpatents

    Ahn, Jung Ho; Erez, Mattan; Dally, William J

    2015-02-17

    Atomic memory access requests are handled using a variety of systems and methods. According to one example method, a data-processing circuit having an address-request generator that issues requests to a common memory implements a method of processing the requests using a memory-access intervention circuit coupled between the generator and the common memory. The method identifies a current atomic-memory access request from a plurality of memory access requests. A data set is stored that corresponds to the current atomic-memory access request in a data storage circuit within the intervention circuit. It is determined whether the current atomic-memory access request corresponds to at least one previously-stored atomic-memory access request. In response to determining correspondence, the current request is implemented by retrieving data from the common memory. The data is modified in response to the current request and at least one other access request in the memory-access intervention circuit.

  14. Is random access memory random?

    NASA Technical Reports Server (NTRS)

    Denning, P. J.

    1986-01-01

    Most software is contructed on the assumption that the programs and data are stored in random access memory (RAM). Physical limitations on the relative speeds of processor and memory elements lead to a variety of memory organizations that match processor addressing rate with memory service rate. These include interleaved and cached memory. A very high fraction of a processor's address requests can be satified from the cache without reference to the main memory. The cache requests information from main memory in blocks that can be transferred at the full memory speed. Programmers who organize algorithms for locality can realize the highest performance from these computers.

  15. Nonvolatile random access memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor)

    1994-01-01

    A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a 0 or 1 state. The element remains in the 0 or 1 state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

  16. Remote direct memory access

    DOEpatents

    Archer, Charles J.; Blocksome, Michael A.

    2012-12-11

    Methods, parallel computers, and computer program products are disclosed for remote direct memory access. Embodiments include transmitting, from an origin DMA engine on an origin compute node to a plurality target DMA engines on target compute nodes, a request to send message, the request to send message specifying a data to be transferred from the origin DMA engine to data storage on each target compute node; receiving, by each target DMA engine on each target compute node, the request to send message; preparing, by each target DMA engine, to store data according to the data storage reference and the data length, including assigning a base storage address for the data storage reference; sending, by one or more of the target DMA engines, an acknowledgment message acknowledging that all the target DMA engines are prepared to receive a data transmission from the origin DMA engine; receiving, by the origin DMA engine, the acknowledgement message from the one or more of the target DMA engines; and transferring, by the origin DMA engine, data to data storage on each of the target compute nodes according to the data storage reference using a single direct put operation.

  17. Plated wire random access memories

    NASA Technical Reports Server (NTRS)

    Gouldin, L. D.

    1975-01-01

    A program was conducted to construct 4096-work by 18-bit random access, NDRO-plated wire memory units. The memory units were subjected to comprehensive functional and environmental tests at the end-item level to verify comformance with the specified requirements. A technical description of the unit is given, along with acceptance test data sheets.

  18. Memory availability and referential access

    PubMed Central

    Johns, Clinton L.; Gordon, Peter C.; Long, Debra L.; Swaab, Tamara Y.

    2013-01-01

    Most theories of coreference specify linguistic factors that modulate antecedent accessibility in memory; however, whether non-linguistic factors also affect coreferential access is unknown. Here we examined the impact of a non-linguistic generation task (letter transposition) on the repeated-name penalty, a processing difficulty observed when coreferential repeated names refer to syntactically prominent (and thus more accessible) antecedents. In Experiment 1, generation improved online (event-related potentials) and offline (recognition memory) accessibility of names in word lists. In Experiment 2, we manipulated generation and syntactic prominence of antecedent names in sentences; both improved online and offline accessibility, but only syntactic prominence elicited a repeated-name penalty. Our results have three important implications: first, the form of a referential expression interacts with an antecedent’s status in the discourse model during coreference; second, availability in memory and referential accessibility are separable; and finally, theories of coreference must better integrate known properties of the human memory system. PMID:24443621

  19. Conductance Quantization in Resistive Random Access Memory

    NASA Astrophysics Data System (ADS)

    Li, Yang; Long, Shibing; Liu, Yang; Hu, Chen; Teng, Jiao; Liu, Qi; Lv, Hangbing; Suñé, Jordi; Liu, Ming

    2015-10-01

    The intrinsic scaling-down ability, simple metal-insulator-metal (MIM) sandwich structure, excellent performances, and complementary metal-oxide-semiconductor (CMOS) technology-compatible fabrication processes make resistive random access memory (RRAM) one of the most promising candidates for the next-generation memory. The RRAM device also exhibits rich electrical, thermal, magnetic, and optical effects, in close correlation with the abundant resistive switching (RS) materials, metal-oxide interface, and multiple RS mechanisms including the formation/rupture of nanoscale to atomic-sized conductive filament (CF) incorporated in RS layer. Conductance quantization effect has been observed in the atomic-sized CF in RRAM, which provides a good opportunity to deeply investigate the RS mechanism in mesoscopic dimension. In this review paper, the operating principles of RRAM are introduced first, followed by the summarization of the basic conductance quantization phenomenon in RRAM and the related RS mechanisms, device structures, and material system. Then, we discuss the theory and modeling of quantum transport in RRAM. Finally, we present the opportunities and challenges in quantized RRAM devices and our views on the future prospects.

  20. Development of non-volatile semiconductor memory

    NASA Technical Reports Server (NTRS)

    Heikkila, W. W.

    1979-01-01

    A 256 word by 8-bit random access memory chip was developed utilizing p channel, metal gate metal-nitride-oxide-silicon (MNOS) technology; with operational characteristics of a 2.5 microsecond read cycle, a 6.0 microsecond write cycle, 800 milliwatts of power dissipation; and retention characteristics of 10 to the 8th power read cycles before data refresh and 5000 hours of no power retention. Design changes were implemented to reduce switching currents that caused parasitic bipolar transistors inherent in the MNOS structure to turn on. Final wafer runs exhibited acceptable yields for a die 250 mils on a side. Evaluation testing was performed on the device in order to determine the maturity of the device. A fixed gate breakdown mechanism was found when operated continuously at high temperature.

  1. Microwave impedance imaging on semiconductor memory devices

    NASA Astrophysics Data System (ADS)

    Kundhikanjana, Worasom; Lai, Keji; Yang, Yongliang; Kelly, Michael; Shen, Zhi-Xun

    2011-03-01

    Microwave impedance microscopy (MIM) maps out the real and imaginary components of the tip-sample impedance, from which the local conductivity and dielectric constant distribution can be derived. The stray field contribution is minimized in our shielded cantilever design, enabling quantitative analysis of nano-materials and device structures. We demonstrate here that the MIM can spatially resolve the conductivity variation in a dynamic random access memory (DRAM) sample. With DC or low-frequency AC bias applied to the tip, contrast between n-doped and p-doped regions in the dC/dV images is observed, and p-n junctions are highlighted in the dR/dV images. The results can be directly compared with data taken by scanning capacitance microscope (SCM), which uses unshielded cantilevers and resonant electronics, and the MIM reveals more information of the local dopant concentration than SCM.

  2. Memory access in shared virtual memory

    SciTech Connect

    Berrendorf, R. )

    1992-01-01

    Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

  3. Memory access in shared virtual memory

    SciTech Connect

    Berrendorf, R.

    1992-09-01

    Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

  4. Magnetic Analog Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Wu, Jiin-Chuan; Stadler, Henry L.

    1991-01-01

    Proposed integrated, solid-state, analog random-access memory base on principle of magnetic writing and magnetoresistive reading. Current in writing conductor magnetizes storage layer. Remanent magnetization in storage layer penetrates readout layer and detected by magnetoresistive effect or Hall effect. Memory cells are part of integrated circuit including associated reading and writing transistors. Intended to provide high storage density and rapid access, nonvolatile, consumes little power, and relatively invulnerable to ionizing radiation.

  5. Direct access to working memory contents.

    PubMed

    Bialkova, Svetlana; Oberauer, Klaus

    2010-01-01

    In two experiments participants held in working memory (WM) three digits in three different colors, and updated individual digits with the results of arithmetic equations presented in one of the colors. In the memory-access condition, a digit from WM had to be used as the first number in the equation; in the no-access condition, complete equations were presented so that no information from WM had to be accessed for the computation. Updating a digit not updated in the preceding step took longer than updating the same digit as in the preceding step, a time difference referred to as object-switch costs. Object-switch costs were equal in access and no-access equations, implying that they did not reflect the time to retrieve a new digit from WM. Access equations were completed as fast as no-access equations, implying that access to information in WM is as fast as reading the same information. No-access equations were slowed by a mismatch between the first digit of the presented equation and the to-be-updated digit in WM, showing that this digit is automatically accessed even when not needed. It is concluded that contents and their contexts form composites in WM that are necessarily accessed together.

  6. Low latency memory access and synchronization

    DOEpatents

    Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.; Gara, Alan G.; Giampapa, Mark E.; Heidelberger, Philip; Hoenicke, Dirk; Ohmacht, Martin; Steinmacher-Burow, Burkhard D.; Takken, Todd E.; Vranas, Pavlos M.

    2007-02-06

    A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.

  7. Low latency memory access and synchronization

    DOEpatents

    Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.; Gara, Alan G.; Giampapa, Mark E.; Heidelberger, Philip; Hoenicke, Dirk; Ohmacht, Martin; Steinmacher-Burow, Burkhard D.; Takken, Todd E. , Vranas; Pavlos M.

    2010-10-19

    A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Bach processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.

  8. Flexible non-volatile memory devices based on organic semiconductors

    NASA Astrophysics Data System (ADS)

    Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa

    2015-09-01

    The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.

  9. Enhancing Memory Access for Less Skilled Readers

    ERIC Educational Resources Information Center

    Smith, Emily R.; O'Brien, Edward J.

    2016-01-01

    Less skilled readers' comprehension often suffers because they have an impoverished representation of text in long-term memory; this, in turn, increases the difficulty of gaining access to backgrounded information necessary for maintaining coherence. The results of four experiments demonstrated that providing less skilled readers with additional…

  10. Purely antiferromagnetic magnetoelectric random access memory.

    PubMed

    Kosub, Tobias; Kopte, Martin; Hühne, Ruben; Appel, Patrick; Shields, Brendan; Maletinsky, Patrick; Hübner, René; Liedke, Maciej Oskar; Fassbender, Jürgen; Schmidt, Oliver G; Makarov, Denys

    2017-01-03

    Magnetic random access memory schemes employing magnetoelectric coupling to write binary information promise outstanding energy efficiency. We propose and demonstrate a purely antiferromagnetic magnetoelectric random access memory (AF-MERAM) that offers a remarkable 50-fold reduction of the writing threshold compared with ferromagnet-based counterparts, is robust against magnetic disturbances and exhibits no ferromagnetic hysteresis losses. Using the magnetoelectric antiferromagnet Cr2O3, we demonstrate reliable isothermal switching via gate voltage pulses and all-electric readout at room temperature. As no ferromagnetic component is present in the system, the writing magnetic field does not need to be pulsed for readout, allowing permanent magnets to be used. Based on our prototypes, we construct a comprehensive model of the magnetoelectric selection mechanisms in thin films of magnetoelectric antiferromagnets, revealing misfit induced ferrimagnetism as an important factor. Beyond memory applications, the AF-MERAM concept introduces a general all-electric interface for antiferromagnets and should find wide applicability in antiferromagnetic spintronics.

  11. Purely antiferromagnetic magnetoelectric random access memory

    NASA Astrophysics Data System (ADS)

    Kosub, Tobias; Kopte, Martin; Hühne, Ruben; Appel, Patrick; Shields, Brendan; Maletinsky, Patrick; Hübner, René; Liedke, Maciej Oskar; Fassbender, Jürgen; Schmidt, Oliver G.; Makarov, Denys

    2017-01-01

    Magnetic random access memory schemes employing magnetoelectric coupling to write binary information promise outstanding energy efficiency. We propose and demonstrate a purely antiferromagnetic magnetoelectric random access memory (AF-MERAM) that offers a remarkable 50-fold reduction of the writing threshold compared with ferromagnet-based counterparts, is robust against magnetic disturbances and exhibits no ferromagnetic hysteresis losses. Using the magnetoelectric antiferromagnet Cr2O3, we demonstrate reliable isothermal switching via gate voltage pulses and all-electric readout at room temperature. As no ferromagnetic component is present in the system, the writing magnetic field does not need to be pulsed for readout, allowing permanent magnets to be used. Based on our prototypes, we construct a comprehensive model of the magnetoelectric selection mechanisms in thin films of magnetoelectric antiferromagnets, revealing misfit induced ferrimagnetism as an important factor. Beyond memory applications, the AF-MERAM concept introduces a general all-electric interface for antiferromagnets and should find wide applicability in antiferromagnetic spintronics.

  12. Non-volatile magnetic random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

    1994-01-01

    Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

  13. Memory effect in semiconductor gas discharge electronic devices

    NASA Astrophysics Data System (ADS)

    Sadiq, Y.; Kurt, H.; Salamov, B. G. Yücel

    2008-11-01

    The memory effect in the planar semiconductor gas discharge system at different pressures (15-760 Torr) and interelectrode distances (60-445 µm) was experimentally studied. The study was performed on the basis of current-voltage characteristic (CVC) measurements with a time lag of several hours of afterglow periods. The influence of the active space charge remaining from the previous discharge on the breakdown voltage (UB) has been analysed using the CVC method for different conductivities of semiconductor GaAs photocathode. CVC showed that even a measurement taken 96 h after the first breakdown was influenced by accumulated active particles deposited from the previous discharge. Such phenomena based on metastable atoms surviving from the previous discharge and recombined on the cathode to create initial electrons in the avalanche mechanism are shown to be fully consistent with CVC data for both pre-breakdown and post-breakdown regions. However, in the post-breakdown region pronounced negative differential conductivity was observed. Such nonlinear electrical property of GaAs is attributed to the existence of deep electronic defect called EL2 in the semiconductor cathode material. On the other hand, the CVC data for subsequent dates present a correlation of memory effect and hysteresis behaviour. The explanation for such a relation is based on the influence of long lived active charges on the electronic transport mechanism of semiconductor material.

  14. Nonvolatile semiconductor memory having three dimension charge confinement

    DOEpatents

    Dawson, L. Ralph; Osbourn, Gordon C.; Peercy, Paul S.; Weaver, Harry T.; Zipperian, Thomas E.

    1991-01-01

    A layered semiconductor device with a nonvolatile three dimensional memory comprises a storage channel which stores charge carriers. Charge carriers flow laterally through the storage channel from a source to a drain. Isolation material, either a Schottky barrier or a heterojunction, located in a trench of an upper layer controllably retains the charge within the a storage portion determined by the confining means. The charge is retained for a time determined by the isolation materials' nonvolatile characteristics or until a change of voltage on the isolation material and the source and drain permit a read operation. Flow of charge through an underlying sense channel is affected by the presence of charge within the storage channel, thus the presences of charge in the memory can be easily detected.

  15. Purely antiferromagnetic magnetoelectric random access memory

    PubMed Central

    Kosub, Tobias; Kopte, Martin; Hühne, Ruben; Appel, Patrick; Shields, Brendan; Maletinsky, Patrick; Hübner, René; Liedke, Maciej Oskar; Fassbender, Jürgen; Schmidt, Oliver G.; Makarov, Denys

    2017-01-01

    Magnetic random access memory schemes employing magnetoelectric coupling to write binary information promise outstanding energy efficiency. We propose and demonstrate a purely antiferromagnetic magnetoelectric random access memory (AF-MERAM) that offers a remarkable 50-fold reduction of the writing threshold compared with ferromagnet-based counterparts, is robust against magnetic disturbances and exhibits no ferromagnetic hysteresis losses. Using the magnetoelectric antiferromagnet Cr2O3, we demonstrate reliable isothermal switching via gate voltage pulses and all-electric readout at room temperature. As no ferromagnetic component is present in the system, the writing magnetic field does not need to be pulsed for readout, allowing permanent magnets to be used. Based on our prototypes, we construct a comprehensive model of the magnetoelectric selection mechanisms in thin films of magnetoelectric antiferromagnets, revealing misfit induced ferrimagnetism as an important factor. Beyond memory applications, the AF-MERAM concept introduces a general all-electric interface for antiferromagnets and should find wide applicability in antiferromagnetic spintronics. PMID:28045029

  16. High Speed Oblivious Random Access Memory (HS-ORAM)

    DTIC Science & Technology

    2015-09-01

    HIGH SPEED OBLIVIOUS RANDOM ACCESS MEMORY (HS-ORAM) PRIVATE MACHINES, INC. SEPTEMBER 2015 FINAL TECHNICAL REPORT...REPORT 3. DATES COVERED (From - To) OCT 2013 – MAY 2015 4. TITLE AND SUBTITLE HIGH SPEED OBLIVIOUS RANDOM ACCESS MEMORY (HS-ORAM) 5a. CONTRACT NUMBER...query policies beyond simple access control. 15. SUBJECT TERMS Oblivious Random Access Memory , Hardware-based Security, Embedded Hardware Roots of

  17. Parallel Optical Random Access Memory (PORAM)

    NASA Technical Reports Server (NTRS)

    Alphonse, G. A.

    1989-01-01

    It is shown that the need to minimize component count, power and size, and to maximize packing density require a parallel optical random access memory to be designed in a two-level hierarchy: a modular level and an interconnect level. Three module designs are proposed, in the order of research and development requirements. The first uses state-of-the-art components, including individually addressed laser diode arrays, acousto-optic (AO) deflectors and magneto-optic (MO) storage medium, aimed at moderate size, moderate power, and high packing density. The next design level uses an electron-trapping (ET) medium to reduce optical power requirements. The third design uses a beam-steering grating surface emitter (GSE) array to reduce size further and minimize the number of components.

  18. Remote direct memory access over datagrams

    DOEpatents

    Grant, Ryan Eric; Rashti, Mohammad Javad; Balaji, Pavan; Afsahi, Ahmad

    2014-12-02

    A communication stack for providing remote direct memory access (RDMA) over a datagram network is disclosed. The communication stack has a user level interface configured to accept datagram related input and communicate with an RDMA enabled network interface card (NIC) via an NIC driver. The communication stack also has an RDMA protocol layer configured to supply one or more data transfer primitives for the datagram related input of the user level. The communication stack further has a direct data placement (DDP) layer configured to transfer the datagram related input from a user storage to a transport layer based on the one or more data transfer primitives by way of a lower layer protocol (LLP) over the datagram network.

  19. Parallel Optical Random Access Memory (PORAM)

    NASA Astrophysics Data System (ADS)

    Alphonse, G. A.

    1989-06-01

    It is shown that the need to minimize component count, power and size, and to maximize packing density require a parallel optical random access memory to be designed in a two-level hierarchy: a modular level and an interconnect level. Three module designs are proposed, in the order of research and development requirements. The first uses state-of-the-art components, including individually addressed laser diode arrays, acousto-optic (AO) deflectors and magneto-optic (MO) storage medium, aimed at moderate size, moderate power, and high packing density. The next design level uses an electron-trapping (ET) medium to reduce optical power requirements. The third design uses a beam-steering grating surface emitter (GSE) array to reduce size further and minimize the number of components.

  20. Direct memory access transfer completion notification

    DOEpatents

    Chen, Dong; Giampapa, Mark E.; Heidelberger, Philip; Kumar, Sameer; Parker, Jeffrey J.; Steinmacher-Burow, Burkhard D.; Vranas, Pavlos

    2010-07-27

    Methods, compute nodes, and computer program products are provided for direct memory access (`DMA`) transfer completion notification. Embodiments include determining, by an origin DMA engine on an origin compute node, whether a data descriptor for an application message to be sent to a target compute node is currently in an injection first-in-first-out (`FIFO`) buffer in dependence upon a sequence number previously associated with the data descriptor, the total number of descriptors currently in the injection FIFO buffer, and the current sequence number for the newest data descriptor stored in the injection FIFO buffer; and notifying a processor core on the origin DMA engine that the message has been sent if the data descriptor for the message is not currently in the injection FIFO buffer.

  1. 76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-09-07

    ... COMMISSION In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products... States after importation of certain dynamic random access memory and NAND flash memory devices and... the sale within the United States after importation of certain dynamic random access memory and...

  2. Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

    DOEpatents

    Ohmacht, Martin

    2014-09-09

    In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

  3. Parallel programmable nonvolatile memory using ordinary static random access memory cells

    NASA Astrophysics Data System (ADS)

    Mizutani, Tomoko; Takeuchi, Kiyoshi; Saraya, Takuya; Shinohara, Hirofumi; Kobayashi, Masaharu; Hiramoto, Toshiro

    2017-04-01

    A technique of using an ordinary static random access memory (SRAM) array for a programmable nonvolatile (NV) memory is proposed. The parallel NV writing of the entire array is achieved by simply applying high-voltage stress to the power supply terminal, after storing inverted desired data in the static random access memory (SRAM) array. Successful 2 kbit NV writing is demonstrated using a device-matrix-array (DMA) test element group (TEG) fabricated by 0.18 µm technology.

  4. BCH codes for large IC random-access memory systems

    NASA Technical Reports Server (NTRS)

    Lin, S.; Costello, D. J., Jr.

    1983-01-01

    In this report some shortened BCH codes for possible applications to large IC random-access memory systems are presented. These codes are given by their parity-check matrices. Encoding and decoding of these codes are discussed.

  5. Radiation Effects of Commercial Resistive Random Access Memories

    NASA Technical Reports Server (NTRS)

    Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

    2014-01-01

    We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

  6. The Dynamics of Access to Groups in Working Memory

    ERIC Educational Resources Information Center

    Farrell, Simon; Lelievre, Anna

    2012-01-01

    The finding that participants leave a pause between groups when attempting serial recall of temporally grouped lists has been taken to indicate access to a hierarchical representation of the list in working memory. An alternative explanation is that the dynamics of serial recall solely reflect output (rather than memorial) processes, with the…

  7. Empirical Memory-Access Cost Models in Multicore NUMA Architectures

    SciTech Connect

    McCormick, Patrick S.; Braithwaite, Ryan Karl; Feng, Wu-chun

    2011-01-01

    Data location is of prime importance when scheduling tasks in a non-uniform memory access (NUMA) architecture. The characteristics of the NUMA architecture must be understood so tasks can be scheduled onto processors that are close to the task's data. However, in modern NUMA architectures, such as AMD Magny-Cours and Intel Nehalem, there may be a relatively large number of memory controllers with sockets that are connected in a non-intuitive manner, leading to performance degradation due to uninformed task-scheduling decisions. In this paper, we provide a method for experimentally characterizing memory-access costs for modern NUMA architectures via memory latency and bandwidth microbenchmarks. Using the results of these benchmarks, we propose a memory-access cost model to improve task-scheduling decisions by scheduling tasks near the data they need. Simple task-scheduling experiments using the memory-access cost models validate the use of empirical memory-access cost models to significantly improve program performance.

  8. Memory for Recently Accessed Visual Attributes

    ERIC Educational Resources Information Center

    Jiang, Yuhong V.; Shupe, Joshua M.; Swallow, Khena M.; Tan, Deborah H.

    2016-01-01

    Recent reports have suggested that the attended features of an item may be rapidly forgotten once they are no longer relevant for an ongoing task (attribute amnesia). This finding relies on a surprise memory procedure that places high demands on declarative memory. We used intertrial priming to examine whether the representation of an item's…

  9. Direct access inter-process shared memory

    DOEpatents

    Brightwell, Ronald B; Pedretti, Kevin; Hudson, Trammell B

    2013-10-22

    A technique for directly sharing physical memory between processes executing on processor cores is described. The technique includes loading a plurality of processes into the physical memory for execution on a corresponding plurality of processor cores sharing the physical memory. An address space is mapped to each of the processes by populating a first entry in a top level virtual address table for each of the processes. The address space of each of the processes is cross-mapped into each of the processes by populating one or more subsequent entries of the top level virtual address table with the first entry in the top level virtual address table from other processes.

  10. Development and process control of magnetic tunnel junctions for magnetic random access memory devices

    NASA Astrophysics Data System (ADS)

    Kula, Witold; Wolfman, Jerome; Ounadjela, Kamel; Chen, Eugene; Koutny, William

    2003-05-01

    We report on the development and process control of magnetic tunnel junctions (MTJs) for magnetic random access memory (MRAM) devices. It is demonstrated that MTJs with high magnetoresistance ˜40% at 300 mV, resistance-area product (RA) ˜1-3 kΩ μm2, low intrinsic interlayer coupling (Hin) ˜2-3 Oe, and excellent bit switching characteristics can be developed and fully integrated with complementary metal-oxide-semiconductor circuitry into MRAM devices. MTJ uniformity and repeatability level suitable for mass production has been demonstrated with the advanced processing and monitoring techniques.

  11. Random access memory immune to single event upset using a T-resistor

    DOEpatents

    Ochoa, Jr., Agustin

    1989-01-01

    In a random access memory cell, a resistance "T" decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell.

  12. A random access memory immune to single event upset using a T-Resistor

    DOEpatents

    Ochoa, A. Jr.

    1987-10-28

    In a random access memory cell, a resistance ''T'' decoupling network in each leg of the cell reduces random errors caused by the interaction of energetic ions with the semiconductor material forming the cell. The cell comprises two parallel legs each containing a series pair of complementary MOS transistors having a common gate connected to the node between the transistors of the opposite leg. The decoupling network in each leg is formed by a series pair of resistors between the transistors together with a third resistor interconnecting the junction between the pair of resistors and the gate of the transistor pair forming the opposite leg of the cell. 4 figs.

  13. Empirical study of the metal-nitride-oxide-semiconductor device characteristics deduced from a microscopic model of memory traps

    SciTech Connect

    Ngai, K.L.; Hsia, Y.

    1982-07-15

    A graded-nitride gate dielectric metal-nitride-oxide-semiconductor (MNOS) memory transistor exhibiting superior device characteristics is presented and analyzed based on a qualitative microscopic model of the memory traps. The model is further reviewed to interpret some generic properties of the MNOS memory transistors including memory window, erase-write speed, and the retention-endurance characteristic features.

  14. Empirical study of the metal-nitride-oxide-semiconductor device characteristics deduced from a microscopic model of memory traps

    NASA Astrophysics Data System (ADS)

    Ngai, Kia L.; Hsia, Yukun

    1982-07-01

    A graded-nitride gate dielectric metal-nitride-oxide-semiconductor (MNOS) memory transistor exhibiting superior device characteristics is presented and analyzed based on a qualitative microscopic model of the memory traps. The model is further reviewed to interpret some generic properties of the MNOS memory transistors including memory window, erase-write speed, and the retention-endurance characteristic features.

  15. An Investigation of Unified Memory Access Performance in CUDA.

    PubMed

    Landaverde, Raphael; Zhang, Tiansheng; Coskun, Ayse K; Herbordt, Martin

    2014-09-01

    Managing memory between the CPU and GPU is a major challenge in GPU computing. A programming model, Unified Memory Access (UMA), has been recently introduced by Nvidia to simplify the complexities of memory management while claiming good overall performance. In this paper, we investigate this programming model and evaluate its performance and programming model simplifications based on our experimental results. We find that beyond on-demand data transfers to the CPU, the GPU is also able to request subsets of data it requires on demand. This feature allows UMA to outperform full data transfer methods for certain parallel applications and small data sizes. We also find, however, that for the majority of applications and memory access patterns, the performance overheads associated with UMA are significant, while the simplifications to the programming model restrict flexibility for adding future optimizations.

  16. High Performance Remote Memory Access Communication: The ARMCI Approach

    SciTech Connect

    Nieplocha, Jarek; Tipparaju, Vinod; Krishnan, Manoj Kumar; Panda, Dhabaleswar K.

    2006-07-01

    This paper describes the Aggregate Remote Memory Copy Interface (ARMCI), a portable high performance remote memory access (RMA) communication interface, developed originally under the DoE-2000 ACTS Toolkit project and currently used as a part of the run-time layer of the DoE project Programming Models for Scalable Parallel Computing. The paper discusses the model, portable implementation, and performance of ARMCI. Special emphasis is placed on the latency hiding mechanisms and ability to optimize noncontiguous data transfers.

  17. A Cerebellar-model Associative Memory as a Generalized Random-access Memory

    NASA Technical Reports Server (NTRS)

    Kanerva, Pentti

    1989-01-01

    A versatile neural-net model is explained in terms familiar to computer scientists and engineers. It is called the sparse distributed memory, and it is a random-access memory for very long words (for patterns with thousands of bits). Its potential utility is the result of several factors: (1) a large pattern representing an object or a scene or a moment can encode a large amount of information about what it represents; (2) this information can serve as an address to the memory, and it can also serve as data; (3) the memory is noise tolerant--the information need not be exact; (4) the memory can be made arbitrarily large and hence an arbitrary amount of information can be stored in it; and (5) the architecture is inherently parallel, allowing large memories to be fast. Such memories can become important components of future computers.

  18. Compact confocal readout system for three-dimensional memories using a laser-feedback semiconductor laser.

    PubMed

    Nakano, Masaharu; Kawata, Yoshimasa

    2003-08-01

    We present a compact confocal readout system for three-dimensional optical memories that uses the thresholding property of a semiconductor laser for feedback light. The system has higher axial resolution than a conventional confocal system with a pinhole. We demonstrate readout results for data recorded in two recording layers with the developed system.

  19. Direct memory access transfer completion notification

    DOEpatents

    Archer, Charles J.; Blocksome, Michael A.; Parker, Jeffrey J.

    2011-02-15

    DMA transfer completion notification includes: inserting, by an origin DMA engine on an origin node in an injection first-in-first-out (`FIFO`) buffer, a data descriptor for an application message to be transferred to a target node on behalf of an application on the origin node; inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the message, the completion notification descriptor specifying a packet header for a completion notification packet; transferring, by the origin DMA engine to the target node, the message in dependence upon the data descriptor; sending, by the origin DMA engine, the completion notification packet to a local reception FIFO buffer using a local memory FIFO transfer operation; and notifying, by the origin DMA engine, the application that transfer of the message is complete in response to receiving the completion notification packet in the local reception FIFO buffer.

  20. Exploiting Nonblocking Remote Memory Access Communication in Scientific Benchmarks

    SciTech Connect

    Tipparaju, Vinod; Krishnan, Manoj Kumar; Nieplocha, Jarek; Santhanaraman, Gopalakrishnan; Panda, Dhabaleswar K.

    2004-12-07

    In the last decade message passing has become the predominant programming model for scientific applications. The current paper attempts to answer the question to what degree performance of well tuned application benchmarks coded in MPI can be improved by using another related programming model, remote memory access (RMA) communication.

  1. A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell Design

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; Bailey, Mark; Ho, Fat Duen

    2004-01-01

    The use of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSFET) in a resistive-load SRAM memory cell has been investigated A typical two-transistor resistive-load SRAM memory cell architecture is modified by replacing one of the NMOS transistors with an n-channel MFSFET. The gate of the MFSFET is connected to a polling voltage pulse instead of the other NMOS transistor drain. The polling voltage pulses are of sufficient magnitude to saturate the ferroelectric gate material and force the MFSFET into a particular logic state. The memory cell circuit is further modified by the addition of a PMOS transistor and a load resistor in order to improve the retention characteristics of the memory cell. The retention characteristics of both the "1" and "0" logic states are simulated. The simulations show that the MFSFET memory cell design can maintain both the "1" and "0" logic states for a long period of time.

  2. Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

    SciTech Connect

    Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel

    2014-07-22

    The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diverse manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.

  3. Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

    DOE PAGES

    Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel

    2014-07-22

    The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diversemore » manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.« less

  4. 77 FR 74222 - Certain Dynamic Random Access Memory and NAND Flash Memory Devices and Products Containing Same...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2012-12-13

    ... COMMISSION Certain Dynamic Random Access Memory and NAND Flash Memory Devices and Products Containing Same... Bentonville, Arkansas (collectively, ``the remaining respondents''); Elpida Memory, Inc. of Tokyo, Japan and Elpida Memory (USA) of Sunnyvale, California (collectively, ``Elpida''); and SK Hynix Inc. (f/k/a...

  5. Integrated, nonvolatile, high-speed analog random access memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

    1994-01-01

    This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

  6. Magnet/Hall-Effect Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

    1991-01-01

    In proposed magnet/Hall-effect random-access memory (MHRAM), bits of data stored magnetically in Perm-alloy (or equivalent)-film memory elements and read out by using Hall-effect sensors to detect magnetization. Value of each bit represented by polarity of magnetization. Retains data for indefinite time or until data rewritten. Speed of Hall-effect sensors in MHRAM results in readout times of about 100 nanoseconds. Other characteristics include high immunity to ionizing radiation and storage densities of order 10(Sup6)bits/cm(Sup 2) or more.

  7. Performance Evaluation of Remote Memory Access (RMA) Programming on Shared Memory Parallel Computers

    NASA Technical Reports Server (NTRS)

    Jin, Hao-Qiang; Jost, Gabriele; Biegel, Bryan A. (Technical Monitor)

    2002-01-01

    The purpose of this study is to evaluate the feasibility of remote memory access (RMA) programming on shared memory parallel computers. We discuss different RMA based implementations of selected CFD application benchmark kernels and compare them to corresponding message passing based codes. For the message-passing implementation we use MPI point-to-point and global communication routines. For the RMA based approach we consider two different libraries supporting this programming model. One is a shared memory parallelization library (SMPlib) developed at NASA Ames, the other is the MPI-2 extensions to the MPI Standard. We give timing comparisons for the different implementation strategies and discuss the performance.

  8. Paging memory from random access memory to backing storage in a parallel computer

    DOEpatents

    Archer, Charles J; Blocksome, Michael A; Inglett, Todd A; Ratterman, Joseph D; Smith, Brian E

    2013-05-21

    Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node.

  9. 76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-11-29

    ... COMMISSION Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint... complaint entitled In Re Certain Dynamic Random Access Memory Devices, and Products Containing Same, DN 2859... within the United States after importation of certain dynamic random access memory devices, and...

  10. 76 FR 80964 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2011-12-27

    ... COMMISSION Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of... States after importation of certain dynamic random access memory devices, and products containing same by... dynamic random access memory devices, and products containing same that infringe one or more of claims...

  11. Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

    NASA Technical Reports Server (NTRS)

    Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Klenke, Robert (Inventor); Schwab, Andrew J. (Inventor); Moyer, Stephen A. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor)

    2000-01-01

    A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

  12. Nonvolatile GaAs Random-Access Memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan

    1994-01-01

    Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.

  13. Two semiconductor ring lasers coupled by a single-waveguide for optical memory operation

    NASA Astrophysics Data System (ADS)

    Van der Sande, Guy; Coomans, Werner; Gelens, Lendert

    2014-05-01

    Semiconductor ring lasers are semiconductor lasers where the laser cavity consists of a ring-shaped waveguide. SRLs are highly integrable and scalable, making them ideal candidates for key components in photonic integrated circuits. SRLs can generate light in two counterpropagating directions between which bistability has been demonstrated. Hence, information can be coded into the emission direction. This bistable operation allows SRLs to be used in systems for all-optical switching and as all-optical memories. For the demonstration of fast optical flip-flop operation, Hill et al. [Nature 432, 206 (2004)] fabricated two SRLs coupled by a single waveguide, rather than a solitary SRL. Nevertheless, the literature shows that a single SRL can also function perfectly as an all-optical memory. In our recent paper [W. Coomans et al., Phys. Rev. A 88, 033813, (2013)], we have raised the question whether coupling two SRLs to realize a single optical memory has any advantage over using a solitary SRL, taking into account the obvious disadvantage of a doubled footprint and power consumption. To provide the answer, we have presented in that paper a numerical study of the dynamical behavior of semiconductor ring lasers coupled by a single bus waveguide, both when weakly coupled and when strongly coupled. We have provided a detailed analysis of the multistable landscape in the coupled system, analyzed the stability of all solutions and related the internal dynamics in the individual lasers to the field effectively measured at the output of the waveguide. We have shown which coupling phases generally promote instabilities and therefore need to be avoided in the design. Regarding all-optical memory operation, we have demonstrated that there is no real advantage for bistable memory operation compared to using a solitary SRL. An increased power suppression ratio has been found to be mainly due to the destructive interference of the SRL fields at the low power port. Also

  14. Organic Memory Transistors Using Monolayer of Semiconductor Colloidal Nano-Dots as a Floating Gate

    NASA Astrophysics Data System (ADS)

    Kajimoto, Kaori; Matsui, Daisuke; Uno, Kazuyuki; Tanaka, Ichiro

    2013-05-01

    We fabricated pentacene-based memory field-effect transistors (FETs) in which a monolayer of semiconductor colloidal nano-dots (NDs) is embedded as a floating gate. After a sufficiently large writing voltage was applied on the control gate, the fabricated FETs showed a large positive threshold voltage (Vth) shift that was attributed to electrons trapped in embedded NDs. The Vth shift was measured as a function of the writing voltage, and it was shown that the minimum writing voltage for memory FETs with small NDs is significantly larger than that for FETs with large ones. This result supports the proposed model of the memory effect in which electrons that tunneled from nearby pentacene molecules are trapped in embedded NDs because the electron energy level in small NDs is higher than that in large ones.

  15. Administering an epoch initiated for remote memory access

    DOEpatents

    Blocksome, Michael A; Miller, Douglas R

    2014-03-18

    Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

  16. Administering an epoch initiated for remote memory access

    DOEpatents

    Blocksome, Michael A; Miller, Douglas R

    2012-10-23

    Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

  17. Administering an epoch initiated for remote memory access

    DOEpatents

    Blocksome, Michael A.; Miller, Douglas R.

    2013-01-01

    Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

  18. Tunable directly modulated fiber ring laser using a reflective semiconductor optical amplifier for WDM access networks.

    PubMed

    Lin, Zih-Rong; Liu, Cheng-Kuang; Jhang, Yu-Jhu; Keiser, Gerd

    2010-08-16

    We have proposed a stable, wideband, and tunable directly modulated fiber ring laser (TDMFRL) by using a reflective semiconductor optical amplifier (RSOA) and an optical tunable filter (OTF). For use in a bidirectional access network, the TDMFRL not only generates downstream data traffic but also serves as the wavelength-selecting injection light source for the Fabry-Pérot laser diode (FP-LD) located at the subscriber site. We experimentally demonstrated a bidirectional transmission at 1.25-Gb/s direct modulation over a 25-km single-mode fiber (SMF), thereby showing good performance in a wavelength division multiplexing (WDM) access network.

  19. Resistive random access memory enabled by carbon nanotube crossbar electrodes.

    PubMed

    Tsai, Cheng-Lin; Xiong, Feng; Pop, Eric; Shim, Moonsub

    2013-06-25

    We use single-walled carbon nanotube (CNT) crossbar electrodes to probe sub-5 nm memory domains of thin AlOx films. Both metallic and semiconducting CNTs effectively switch AlOx bits between memory states with high and low resistance. The low-resistance state scales linearly with CNT series resistance down to ∼10 MΩ, at which point the ON-state resistance of the AlOx filament becomes the limiting factor. Dependence of switching behavior on the number of cross-points suggests a single channel to dominate the overall characteristics in multi-crossbar devices. We demonstrate ON/OFF ratios up to 5 × 10(5) and programming currents of 1 to 100 nA with few-volt set/reset voltages. Remarkably low reset currents enable a switching power of 10-100 nW and estimated switching energy as low as 0.1-10 fJ per bit. These results are essential for understanding the ultimate scaling limits of resistive random access memory at single-nanometer bit dimensions.

  20. Efficient Memory Access with NumPy Global Arrays using Local Memory Access

    SciTech Connect

    Daily, Jeffrey A.; Berghofer, Dan C.

    2013-08-03

    This paper discusses the work completed working with Global Arrays of data on distributed multi-computer systems and improving their performance. The tasks completed were done at Pacific Northwest National Laboratory in the Science Undergrad Laboratory Internship program in the summer of 2013 for the Data Intensive Computing Group in the Fundamental and Computational Sciences DIrectorate. This work was done on the Global Arrays Toolkit developed by this group. This toolkit is an interface for programmers to more easily create arrays of data on networks of computers. This is useful because scientific computation is often done on large amounts of data sometimes so large that individual computers cannot hold all of it. This data is held in array form and can best be processed on supercomputers which often consist of a network of individual computers doing their computation in parallel. One major challenge for this sort of programming is that operations on arrays on multiple computers is very complex and an interface is needed so that these arrays seem like they are on a single computer. This is what global arrays does. The work done here is to use more efficient operations on that data that requires less copying of data to be completed. This saves a lot of time because copying data on many different computers is time intensive. The way this challenge was solved is when data to be operated on with binary operations are on the same computer, they are not copied when they are accessed. When they are on separate computers, only one set is copied when accessed. This saves time because of less copying done although more data access operations were done.

  1. Materials selection for oxide-based resistive random access memories

    SciTech Connect

    Guo, Yuzheng; Robertson, John

    2014-12-01

    The energies of atomic processes in resistive random access memories (RRAMs) are calculated for four typical oxides, HfO{sub 2}, TiO{sub 2}, Ta{sub 2}O{sub 5}, and Al{sub 2}O{sub 3}, to define a materials selection process. O vacancies have the lowest defect formation energy in the O-poor limit and dominate the processes. A band diagram defines the operating Fermi energy and O chemical potential range. It is shown how the scavenger metal can be used to vary the O vacancy formation energy, via controlling the O chemical potential, and the mean Fermi energy. The high endurance of Ta{sub 2}O{sub 5} RRAM is related to its more stable amorphous phase and the adaptive lattice rearrangements of its O vacancy.

  2. SiCOH-based resistive random access memory for backend of line compatible nonvolatile memory application

    NASA Astrophysics Data System (ADS)

    Zheng, Liang; Dai, Ya-Wei; Yu, Lin-Jie; Chen, Lin; Sun, Qing-Qing; Zhang, David Wei

    2017-04-01

    We investigated the resistive switching characteristics of a SiCOH low-k-material-based resistive random access memory (RRAM) in this study. This SiCOH-based RRAM is fully compatible with backend CMOS technology, which is extremely important for its applicability. The device demonstrated here had higher performance characteristics than a conventional SiO2-based RRAM, such as a higher ON/OFF ratio (around 102), and a higher cycling endurance in an ambient environment. Taken together, these characteristics make the device a promising candidate for next-generation nonvolatile applications.

  3. Accessibility versus Accuracy in Retrieving Spatial Memory: Evidence for Suboptimal Assumed Headings

    ERIC Educational Resources Information Center

    Yerramsetti, Ashok; Marchette, Steven A.; Shelton, Amy L.

    2013-01-01

    Orientation dependence in spatial memory has often been interpreted in terms of accessibility: Object locations are encoded relative to a reference orientation that affords the most accurate access to spatial memory. An open question, however, is whether people naturally use this "preferred" orientation whenever recalling the space. We…

  4. Optimizing NEURON Simulation Environment Using Remote Memory Access with Recursive Doubling on Distributed Memory Systems.

    PubMed

    Shehzad, Danish; Bozkuş, Zeki

    2016-01-01

    Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models.

  5. Optimizing NEURON Simulation Environment Using Remote Memory Access with Recursive Doubling on Distributed Memory Systems

    PubMed Central

    Bozkuş, Zeki

    2016-01-01

    Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models. PMID:27413363

  6. Crossover from Super- to Subdiffusive Motion and Memory Effects in Crystalline Organic Semiconductors

    NASA Astrophysics Data System (ADS)

    De Filippis, G.; Cataudella, V.; Mishchenko, A. S.; Nagaosa, N.; Fierro, A.; de Candia, A.

    2015-02-01

    The transport properties at finite temperature of crystalline organic semiconductors are investigated, within the Su-Schrieffer-Heeger model, by combining an exact diagonalization technique, Monte Carlo approaches, and a maximum entropy method. The temperature-dependent mobility data measured in single crystals of rubrene are successfully reproduced: a crossover from super- to subdiffusive motion occurs in the range 150 ≤T ≤200 K , where the mean free path becomes of the order of the lattice parameter and strong memory effects start to appear. We provide an effective model, which can successfully explain features of the absorption spectra at low frequencies. The observed response to slowly varying electric field is interpreted by means of a simple model where the interaction between the charge carrier and lattice polarization modes is simulated by a harmonic interaction between a fictitious particle and an electron embedded in a viscous fluid.

  7. The floating-gate non-volatile semiconductor memory--from invention to the digital age.

    PubMed

    Sze, S M

    2012-10-01

    In the past 45 years (from 1967 to 2012), the non-volatile semiconductor memory (NVSM) has emerged from a floating-gate concept to the prime technology driver of the largest industry in the world-the electronics industry. In this paper, we briefly review the historical development of NVSM and project its future trends to the year 2020. In addition, we consider NVSM's wide-range of applications from the digital cellular phone to tablet computer to digital television. As the device dimension is scaled down to the deca-nanometer regime, we expect that many innovations will be made to meet the scaling challenges, and NVSM-inspired technology will continue to enrich and improve our lives for decades to come.

  8. Priming of transcriptional memory responses via the chromatin accessibility landscape in T cells

    PubMed Central

    Tu, Wen Juan; Hardy, Kristine; Sutton, Christopher R.; McCuaig, Robert; Li, Jasmine; Dunn, Jenny; Tan, Abel; Brezar, Vedran; Morris, Melanie; Denyer, Gareth; Lee, Sau Kuen; Turner, Stephen J.; Seddiki, Nabila; Smith, Corey; Khanna, Rajiv; Rao, Sudha

    2017-01-01

    Memory T cells exhibit transcriptional memory and “remember” their previous pathogenic encounter to increase transcription on re-infection. However, how this transcriptional priming response is regulated is unknown. Here we performed global FAIRE-seq profiling of chromatin accessibility in a human T cell transcriptional memory model. Primary activation induced persistent accessibility changes, and secondary activation induced secondary-specific opening of previously less accessible regions associated with enhanced expression of memory-responsive genes. Increased accessibility occurred largely in distal regulatory regions and was associated with increased histone acetylation and relative H3.3 deposition. The enhanced re-stimulation response was linked to the strength of initial PKC-induced signalling, and PKC-sensitive increases in accessibility upon initial stimulation showed higher accessibility on re-stimulation. While accessibility maintenance was associated with ETS-1, accessibility at re-stimulation-specific regions was linked to NFAT, especially in combination with ETS-1, EGR, GATA, NFκB, and NR4A. Furthermore, NFATC1 was directly regulated by ETS-1 at an enhancer region. In contrast to the factors that increased accessibility, signalling from bHLH and ZEB family members enhanced decreased accessibility upon re-stimulation. Interplay between distal regulatory elements, accessibility, and the combined action of sequence-specific transcription factors allows transcriptional memory-responsive genes to “remember” their initial environmental encounter. PMID:28317936

  9. Priming of transcriptional memory responses via the chromatin accessibility landscape in T cells.

    PubMed

    Tu, Wen Juan; Hardy, Kristine; Sutton, Christopher R; McCuaig, Robert; Li, Jasmine; Dunn, Jenny; Tan, Abel; Brezar, Vedran; Morris, Melanie; Denyer, Gareth; Lee, Sau Kuen; Turner, Stephen J; Seddiki, Nabila; Smith, Corey; Khanna, Rajiv; Rao, Sudha

    2017-03-20

    Memory T cells exhibit transcriptional memory and "remember" their previous pathogenic encounter to increase transcription on re-infection. However, how this transcriptional priming response is regulated is unknown. Here we performed global FAIRE-seq profiling of chromatin accessibility in a human T cell transcriptional memory model. Primary activation induced persistent accessibility changes, and secondary activation induced secondary-specific opening of previously less accessible regions associated with enhanced expression of memory-responsive genes. Increased accessibility occurred largely in distal regulatory regions and was associated with increased histone acetylation and relative H3.3 deposition. The enhanced re-stimulation response was linked to the strength of initial PKC-induced signalling, and PKC-sensitive increases in accessibility upon initial stimulation showed higher accessibility on re-stimulation. While accessibility maintenance was associated with ETS-1, accessibility at re-stimulation-specific regions was linked to NFAT, especially in combination with ETS-1, EGR, GATA, NFκB, and NR4A. Furthermore, NFATC1 was directly regulated by ETS-1 at an enhancer region. In contrast to the factors that increased accessibility, signalling from bHLH and ZEB family members enhanced decreased accessibility upon re-stimulation. Interplay between distal regulatory elements, accessibility, and the combined action of sequence-specific transcription factors allows transcriptional memory-responsive genes to "remember" their initial environmental encounter.

  10. Ferroelectricity in Covalently functionalized Two-dimensional Materials: Integration of High-mobility Semiconductors and Nonvolatile Memory.

    PubMed

    Wu, Menghao; Dong, Shuai; Yao, Kailun; Liu, Junming; Zeng, Xiao Cheng

    2016-11-09

    Realization of ferroelectric semiconductors by conjoining ferroelectricity with semiconductors remains a challenging task because most present-day ferroelectric materials are unsuitable for such a combination due to their wide bandgaps. Herein, we show first-principles evidence toward the realization of a new class of two-dimensional (2D) ferroelectric semiconductors through covalent functionalization of many prevailing 2D materials. Members in this new class of 2D ferroelectric semiconductors include covalently functionalized germanene, and stanene (Nat. Commun. 2014, 5, 3389), as well as MoS2 monolayer (Nat. Chem. 2015, 7, 45), covalent functionalization of the surface of bulk semiconductors such as silicon (111) (J. Phys. Chem. B 2006, 110 , 23898), and the substrates of oxides such as silica with self-assembly monolayers (Nano Lett. 2014, 14, 1354). The newly predicted 2D ferroelectric semiconductors possess high mobility, modest bandgaps, and distinct ferroelectricity that can be exploited for developing various heterostructural devices with desired functionalities. For example, we propose applications of the 2D materials as 2D ferroelectric field-effect transistors with ultrahigh on/off ratio, topological transistors with Dirac Fermions switchable between holes and electrons, ferroelectric junctions with ultrahigh electro-resistance, and multiferroic junctions for controlling spin by electric fields. All these heterostructural devices take advantage of the combination of high-mobility semiconductors with fast writing and nondestructive reading capability of nonvolatile memory, thereby holding great potential for the development of future multifunctional devices.

  11. Mapping virtual addresses to different physical addresses for value disambiguation for thread memory access requests

    DOEpatents

    Gala, Alan; Ohmacht, Martin

    2014-09-02

    A multiprocessor system includes nodes. Each node includes a data path that includes a core, a TLB, and a first level cache implementing disambiguation. The system also includes at least one second level cache and a main memory. For thread memory access requests, the core uses an address associated with an instruction format of the core. The first level cache uses an address format related to the size of the main memory plus an offset corresponding to hardware thread meta data. The second level cache uses a physical main memory address plus software thread meta data to store the memory access request. The second level cache accesses the main memory using the physical address with neither the offset nor the thread meta data after resolving speculation. In short, this system includes mapping of a virtual address to a different physical addresses for value disambiguation for different threads.

  12. Viable chemical approach for patterning nanoscale magnetoresistive random access memory

    SciTech Connect

    Kim, Taeseung; Kim, Younghee; Chen, Jack Kun-Chieh; Chang, Jane P.

    2015-03-15

    A reactive ion etching process with alternating Cl{sub 2} and H{sub 2} exposures has been shown to chemically etch CoFe film that is an integral component in magnetoresistive random access memory (MRAM). Starting with systematic thermodynamic calculations assessing various chemistries and reaction pathways leading to the highest possible vapor pressure of the etch products reactions, the potential chemical combinations were verified by etch rate investigation and surface chemistry analysis in plasma treated CoFe films. An ∼20% enhancement in etch rate was observed with the alternating use of Cl{sub 2} and H{sub 2} plasmas, in comparison with the use of only Cl{sub 2} plasma. This chemical combination was effective in removing metal chloride layers, thus maintaining the desired magnetic properties of the CoFe films. Scanning electron microscopy equipped with energy-dispersive x-ray spectroscopy showed visually and spectroscopically that the metal chloride layers generated by Cl{sub 2} plasma were eliminated with H{sub 2} plasma to yield a clean etch profile. This work suggests that the selected chemistries can be used to etch magnetic metal alloys with a smooth etch profile and this general strategy can be applied to design chemically based etch processes to enable the fabrication of highly integrated nanoscale MRAM devices.

  13. Radiation dosimetry using three-dimensional optical random access memories

    NASA Technical Reports Server (NTRS)

    Moscovitch, M.; Phillips, G. W.

    2001-01-01

    Three-dimensional optical random access memories (3D ORAMs) are a new generation of high-density data storage devices. Binary information is stored and retrieved via a light induced reversible transformation of an ensemble of bistable photochromic molecules embedded in a polymer matrix. This paper describes the application of 3D ORAM materials to radiation dosimetry. It is shown both theoretically and experimentally, that ionizing radiation in the form of heavy charged particles is capable of changing the information originally stored on the ORAM material. The magnitude and spatial distribution of these changes are used as a measure of the absorbed dose, particle type and energy. The effects of exposure on 3D ORAM materials have been investigated for a variety of particle types and energies, including protons, alpha particles and 12C ions. The exposed materials are observed to fluoresce when exposed to laser light. The intensity and the depth of the fluorescence is dependent on the type and energy of the particle to which the materials were exposed. It is shown that these effects can be modeled using Monte Carlo calculations. The model provides a better understanding of the properties of these materials. which should prove useful for developing systems for charged particle and neutron dosimetry/detector applications. c2001 Published by Elsevier Science B.V.

  14. Adult Age Differences in Accessing and Retrieving Information from Long-Term Memory.

    ERIC Educational Resources Information Center

    Petros, Thomas V.; And Others

    1983-01-01

    Investigated adult age differences in accessing and retrieving information from long-term memory. Results showed that older adults (N=26) were slower than younger adults (N=35) at feature extraction, lexical access, and accessing category information. The age deficit was proportionally greater when retrieval of category information was required.…

  15. Direct Access by Spatial Position in Visual Memory. 1. Synopsis of Principal Findings.

    DTIC Science & Technology

    1986-01-20

    AiQi 218 DIRECT ACCESS BY SPATIAL POSITION IN VISUAL MEMORY 1 1/1 SYNOPSIS OF PRINCIPAL FINDINGS(U) PENNSYLVANIA UNIV PPHILADELPHIA S STERNBERG ET...IRR04204 RR04206-01 11 TITLE (Include SecuriY Claw ficat,@n) Direct Access by Spatial Position in Visual Memory: 1. Synopsis of Principal Findings 12...034 -amJanuary 20. 1986 , ? ’ I~ Direct Access by Spatial Position In Visual Memory: 1. Synopsis of Principal gfdings 1. Introduction In recent years

  16. Remote Memory Access Protocol Target Node Intellectual Property

    NASA Technical Reports Server (NTRS)

    Haddad, Omar

    2013-01-01

    The MagnetoSpheric Multiscale (MMS) mission had a requirement to use the Remote Memory Access Protocol (RMAP) over its SpaceWire network. At the time, no known intellectual property (IP) cores were available for purchase. Additionally, MMS preferred to implement the RMAP functionality with control over the low-level details of the design. For example, not all the RMAP standard functionality was needed, and it was desired to implement only the portions of the RMAP protocol that were needed. RMAP functionality had been previously implemented in commercial off-the-shelf (COTS) products, but the IP core was not available for purchase. The RMAP Target IP core is a VHDL (VHSIC Hardware Description Language description of a digital logic design suitable for implementation in an FPGA (field-programmable gate array) or ASIC (application-specific integrated circuit) that parses SpaceWire packets that conform to the RMAP standard. The RMAP packet protocol allows a network host to access and control a target device using address mapping. This capability allows SpaceWire devices to be managed in a standardized way that simplifies the hardware design of the device, as well as the development of the software that controls the device. The RMAP Target IP core has some features that are unique and not specified in the RMAP standard. One such feature is the ability to automatically abort transactions if the back-end logic does not respond to read/write requests within a predefined time. When a request times out, the RMAP Target IP core automatically retracts the request and returns a command response with an appropriate status in the response packet s header. Another such feature is the ability to control the SpaceWire node or router using RMAP transactions in the extended address range. This allows the SpaceWire network host to manage the SpaceWire network elements using RMAP packets, which reduces the number of protocols that the network host needs to support.

  17. RAPID: A random access picture digitizer, display, and memory system

    NASA Technical Reports Server (NTRS)

    Yakimovsky, Y.; Rayfield, M.; Eskenazi, R.

    1976-01-01

    RAPID is a system capable of providing convenient digital analysis of video data in real-time. It has two modes of operation. The first allows for continuous digitization of an EIA RS-170 video signal. Each frame in the video signal is digitized and written in 1/30 of a second into RAPID's internal memory. The second mode leaves the content of the internal memory independent of the current input video. In both modes of operation the image contained in the memory is used to generate an EIA RS-170 composite video output signal representing the digitized image in the memory so that it can be displayed on a monitor.

  18. More than a feeling: Emotional cues impact the access and experience of autobiographical memories.

    PubMed

    Sheldon, Signy; Donahue, Julia

    2017-02-27

    Remembering is impacted by several factors of retrieval, including the emotional content of a memory cue. Here we tested how musical retrieval cues that differed on two dimensions of emotion-valence (positive and negative) and arousal (high and low)-impacted the following aspects of autobiographical memory recall: the response time to access a past personal event, the experience of remembering (ratings of memory vividness), the emotional content of a cued memory (ratings of event arousal and valence), and the type of event recalled (ratings of event energy, socialness, and uniqueness). We further explored how cue presentation affected autobiographical memory retrieval by administering cues of similar arousal and valence levels in a blocked fashion to one half of the tested participants, and randomly to the other half. We report three main findings. First, memories were accessed most quickly in response to musical cues that were highly arousing and positive in emotion. Second, we observed a relation between a cue and the elicited memory's emotional valence but not arousal; however, both the cue valence and arousal related to the nature of the recalled event. Specifically, high cue arousal led to lower memory vividness and uniqueness ratings, but cues with both high arousal and positive valence were associated with memories rated as more social and energetic. Finally, cue presentation impacted both how quickly and specifically memories were accessed and how cue valence affected the memory vividness ratings. The implications of these findings for views of how emotion directs the access to memories and the experience of remembering are discussed.

  19. Virtual fabrication using directed self-assembly for process optimization in a 14-nm dynamic random access memory

    NASA Astrophysics Data System (ADS)

    Kamon, Mattan; Akbulut, Mustafa; Yan, Yiguang; Faken, Daniel; Pap, Andras; Allampalli, Vasanth; Greiner, Ken; Fried, David

    2016-07-01

    For directed self-assembly (DSA) to be deployed in advanced semiconductor technologies, it must reliably integrate into a full process flow. We present a methodology for using virtual fabrication software, including predictive DSA process models, to develop and analyze the replacement of self-aligned quadruple patterning with Liu-Nealey chemoepitaxy on a 14-nm dynamic random access memory (DRAM) process. To quantify the impact of this module replacement, we investigated a key process yield metric for DRAM, interface area between the capacitor contacts and transistor source/drain. Additionally, we demonstrate virtual fabrication of the DRAM cell's hexagonally packed capacitors patterned with an array of diblock copolymer cylinders in place of fourfold litho-etch (LE4) patterning.

  20. Development of Curie point switching for thin film, random access, memory device

    NASA Technical Reports Server (NTRS)

    Lewicki, G. W.; Tchernev, D. I.

    1967-01-01

    Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.

  1. Hybrid Josephson-CMOS Random Access Memory with Interfacing to Josephson Digital Circuits

    DTIC Science & Technology

    2013-10-16

    as reliable high-speed Josephson voltage drivers, Superconductor Science and Technology, (01 2013): 1. doi: TOTAL: 4 (b) Papers published in non...Theodore Van Duzer, ISEC, Washington, DC 2011 "Hybrid Josephson-CMOS Random Access Memory, T. Van Duzer, US Workshop on Superconductor Electronics: Devices...Proceeding publications (other than abstracts): Received Paper 08/22/2013 2.00 Thomas Ortlepp. Vortex transitional superconductor random access memory

  2. Unipolar resistive switching in metal oxide/organic semiconductor non-volatile memories as a critical phenomenon

    SciTech Connect

    Bory, Benjamin F.; Meskers, Stefan C. J.; Rocha, Paulo R. F.; Gomes, Henrique L.; Leeuw, Dago M. de

    2015-11-28

    Diodes incorporating a bilayer of an organic semiconductor and a wide bandgap metal oxide can show unipolar, non-volatile memory behavior after electroforming. The prolonged bias voltage stress induces defects in the metal oxide with an areal density exceeding 10{sup 17 }m{sup −2}. We explain the electrical bistability by the coexistence of two thermodynamically stable phases at the interface between an organic semiconductor and metal oxide. One phase contains mainly ionized defects and has a low work function, while the other phase has mainly neutral defects and a high work function. In the diodes, domains of the phase with a low work function constitute current filaments. The phase composition and critical temperature are derived from a 2D Ising model as a function of chemical potential. The model predicts filamentary conduction exhibiting a negative differential resistance and nonvolatile memory behavior. The model is expected to be generally applicable to any bilayer system that shows unipolar resistive switching.

  3. Accessing Information in Working Memory: Can the Focus of Attention Grasp Two Elements at the Same Time?

    ERIC Educational Resources Information Center

    Oberauer, Klaus; Bialkova, Svetlana

    2009-01-01

    Processing information in working memory requires selective access to a subset of working-memory contents by a focus of attention. Complex cognition often requires joint access to 2 items in working memory. How does the focus select 2 items? Two experiments with an arithmetic task and 1 with a spatial task investigate time demands for successive…

  4. Nonvolatile Memory Effect in Indium Gallium Arsenide-Based Metal-Oxide-Semiconductor Devices Using II-VI Tunnel Insulators

    NASA Astrophysics Data System (ADS)

    Chan, P.-Y.; Gogna, M.; Suarez, E.; Karmakar, S.; Al-Amoody, F.; Miller, B. I.; Jain, F. C.

    2011-08-01

    This paper reports the successful use of ZnSe/ZnS/ZnMgS/ZnS/ZnSe as a gate insulator stack for an InGaAs-based metal-oxide-semiconductor (MOS) device, and demonstrates the threshold voltage shift required in nonvolatile memory devices using a floating gate quantum dot layer. An InGaAs-based nonvolatile memory MOS device was fabricated using a high- κ II-VI tunnel insulator stack and self-assembled GeO x -cladded Ge quantum dots as the charge storage units. A Si3N4 layer was used as the control gate insulator. Capacitance-voltage data showed that, after applying a positive voltage to the gate of a MOS device, charges were being stored in the quantum dots. This was shown by the shift in the flat-band/threshold voltage, simulating the write process of a nonvolatile memory device.

  5. High speed magneto-resistive random access memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor)

    1992-01-01

    A high speed read MRAM memory element is configured from a sandwich of magnetizable, ferromagnetic film surrounding a magneto-resistive film which may be ferromagnetic or not. One outer ferromagnetic film has a higher coercive force than the other and therefore remains magnetized in one sense while the other may be switched in sense by a switching magnetic field. The magneto-resistive film is therefore sensitive to the amplitude of the resultant field between the outer ferromagnetic films and may be constructed of a high resistivity, high magneto-resistive material capable of higher sensing currents. This permits higher read voltages and therefore faster read operations. Alternate embodiments with perpendicular anisotropy, and in-plane anisotropy are shown, including an embodiment which uses high permeability guides to direct the closing flux path through the magneto-resistive material. High density, high speed, radiation hard, memory matrices may be constructed from these memory elements.

  6. Hybrid Flexible Resistive Random Access Memory-Gated Transistor for Novel Nonvolatile Data Storage.

    PubMed

    Han, Su-Ting; Zhou, Ye; Chen, Bo; Wang, Chundong; Zhou, Li; Yan, Yan; Zhuang, Jiaqing; Sun, Qijun; Zhang, Hua; Roy, V A L

    2016-01-20

    Here, a single-device demonstration of novel hybrid architecture is reported to achieve programmable transistor nodes which have analogies to flash memory by incorporating a resistive switching random access memory (RRAM) device as a resistive switch gate for field effect transistor (FET) on a flexible substrate. A high performance flexible RRAM with a three-layered structure is fabricated by utilizing solution-processed MoS2 nanosheets sandwiched between poly(methyl methacrylate) polymer layers. Gate coupling with the pentacene-based transistor can be controlled by the RRAM memory state to produce a nonprogrammed state (inactive) and a programmed state (active) with a well-defined memory window. Compared to the reference flash memory device based on the MoS2 floating gate, the hybrid device presents robust access speed and retention ability. Furthermore, the hybrid RRAM-gated FET is used to build an integrated logic circuit and a wide logic window in inverter logic is achieved. The controllable, well-defined memory window, long retention time, and fast access speed of this novel hybrid device may open up new possibilities of realizing fully functional nonvolatile memory for high-performance flexible electronics.

  7. Asymmetrical access to color and location in visual working memory.

    PubMed

    Rajsic, Jason; Wilson, Daryl E

    2014-10-01

    Models of visual working memory (VWM) have benefitted greatly from the use of the delayed-matching paradigm. However, in this task, the ability to recall a probed feature is confounded with the ability to maintain the proper binding between the feature that is to be reported and the feature (typically location) that is used to cue a particular item for report. Given that location is typically used as a cue-feature, we used the delayed-estimation paradigm to compare memory for location to memory for color, rotating which feature was used as a cue and which was reported. Our results revealed several novel findings: 1) the likelihood of reporting a probed object's feature was superior when reporting location with a color cue than when reporting color with a location cue; 2) location report errors were composed entirely of swap errors, with little to no random location reports; and 3) both colour and location reports greatly benefitted from the presence of nonprobed items at test. This last finding suggests that it is uncertainty over the bindings between locations and colors at memory retrieval that drive swap errors, not at encoding. We interpret our findings as consistent with a representational architecture that nests remembered object features within remembered locations.

  8. Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

    SciTech Connect

    Ando, K. Yuasa, S.; Fujita, S.; Ito, J.; Yoda, H.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.

    2014-05-07

    Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

  9. A novel method of developing all-optical frequency encoded memory unit exploiting nonlinear switching character of semiconductor optical amplifier

    NASA Astrophysics Data System (ADS)

    Kumar Garai, Sisir; Mukhopadhyay, Sourangshu

    2010-10-01

    The very fast running optical memory and optical logic gates are the basic building blocks for any optical computing data processing system. Realization of a very fast memory-cell in the optical domain is very challenging. In the last two decades many methods of implementing all-optical flip-flops have been proposed. Most of these suffer from speed limitation because of low switching response of the active devices. In our present communication the authors propose a method of developing a frequency encoded memory unit based on the switching action of semiconductor optical amplifier (SOA). Nonlinear polarization rotation characters of SOA and 'SOA based Mach-Zehnder Interferometer' switch, i.e. 'SOA-MZI' switch, are exploited for the purpose of some switching action with least switching power (<-3 dB m) and high switching contrast ratio (20 dB). Here two logic states ('0' state and '1' state) of the memory is encoded by two different frequencies, which will remain unchanged throughout the data communication irrespective of loss of light energy due to reflection, refraction, attenuation, etc. Though the SOA based switch runs with the operational speed 100 Gb/s, still due to the presence of the other optical components in the memory unit, the overall speed of the proposed system will come down to 10 Gb/s.

  10. Symmetric Data Objects and Remote Memory Access Communication for Fortran 95-Applications.

    SciTech Connect

    Nieplocha, Jarek; Baxter, Douglas J.; Tipparaju, Vinod; Rasmussen, Craig; Numrich, Robert W.

    2005-08-01

    Symmetric data objects have been introduced by Cray Inc. in context of SHMEM remote memory access communication on Cray T3D/E systems and later adopted by SGI for their Origin servers. Symmetric data objects greatly simplify parallel programming by allowing to reference remote instance of a data structure by specifying address of the local counterpart. The current paper describes how symmetric data objects and remote memory access communication could be implemented in Fortran-95 without requiring specialized hardware or compiler support. NAS Multi-Grid parallel benchmark was used as an application example and demonstrated competitive performance to the standard MPI implementation

  11. Gallium Arsenide Dynamic Random Access Memory Support Circuitry

    DTIC Science & Technology

    1993-03-01

    several reasons for this. the first and foremost is cost. Millions of dollars are required to "tool up" to fabricate ICs. While Si ICs are in tremendous...disadvantages to GaAs digital IC fabrication. First , the present density of the commercially available GaAs ICs is much less than those produced in Si...is accomplished is a similar but slightly different manner. Writing requires data so the first step (given the correct status of the memory busy signal

  12. Size effect of nano scale phase change random access memory.

    PubMed

    Son, Ji Hoon; Choi, HongKyw; Jang, Nakwon; Kim, Hong Seung; Yi, Dong Young; Lee, Seong Hwan

    2010-05-01

    In this paper, we have investigated the size effect of nano scale PRAM using three-dimensional finite element analysis tool. The reset current and temperature profile of PRAM cells with top and bottom electrode contact hole size were calculated by the numerical method. And temperature profile of PRAM unit cell with size and thickness of GST thin film was simulated. As top electrode contact size was smaller, reset current decreased. But these variations couldn't affect to operate memory. On the other hand, as bottom electrode contact size was smaller, reset current abruptly decreased.

  13. Electrical Evaluation of RCA MWS5501D Random Access Memory, Volume 2, Appendix a

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The address access time, address readout time, the data hold time, and the data setup time are some of the results surveyed.

  14. Making Physical Activity Accessible to Older Adults with Memory Loss: A Feasibility Study

    ERIC Educational Resources Information Center

    Logsdon, Rebecca G.; McCurry, Susan M.; Pike, Kenneth C.; Teri, Linda

    2009-01-01

    Purpose: For individuals with mild cognitive impairment (MCI), memory loss may prevent successful engagement in exercise, a key factor in preventing additional disability. The Resources and Activities for Life Long Independence (RALLI) program uses behavioral principles to make exercise more accessible for these individuals. Exercises are broken…

  15. Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

    DOEpatents

    Blocksome, Michael A.; Mamidala, Amith R.

    2013-09-03

    Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

  16. Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

    DOEpatents

    Blocksome, Michael A; Mamidala, Amith R

    2014-02-11

    Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

  17. Shared direct memory access on the Explorer 2-LX

    NASA Technical Reports Server (NTRS)

    Musgrave, Jeffrey L.

    1990-01-01

    Advances in Expert System technology and Artificial Intelligence have provided a framework for applying automated Intelligence to the solution of problems which were generally perceived as intractable using more classical approaches. As a result, hybrid architectures and parallel processing capability have become more common in computing environments. The Texas Instruments Explorer II-LX is an example of a machine which combines a symbolic processing environment, and a computationally oriented environment in a single chassis for integrated problem solutions. This user's manual is an attempt to make these capabilities more accessible to a wider range of engineers and programmers with problems well suited to solution in such an environment.

  18. Making working memory work: the effects of extended practice on focus capacity and the processes of updating, forward access, and random access.

    PubMed

    Price, John M; Colflesh, Gregory J H; Cerella, John; Verhaeghen, Paul

    2014-05-01

    We investigated the effects of 10h of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others.

  19. A new laterally conductive bridge random access memory by fully CMOS logic compatible process

    NASA Astrophysics Data System (ADS)

    Hsieh, Min-Che; Chin, Yung-Wen; Lin, Yu-Cheng; Chih, Yu-Der; Tsai, Kan-Hsueh; Tsai, Ming-Jinn; King, Ya-Chin; Lin, Chrong Jung

    2014-01-01

    This paper proposes a novel laterally conductive bridge random access memory (L-CBRAM) module using a fully CMOS logic compatible process. A contact buffer layer between the poly-Si and contact plug enables the lateral Ti-based atomic layer to provide on/off resistance ratio via bipolar operations. The proposed device reached more than 100 pulse cycles with an on/off ratio over 10 and very stable data retention under high temperature operations. These results make this Ti-based L-CBRAM cell a promising solution for advanced embedded multi-time programmable (MTP) memory applications.

  20. Effects of erbium doping of indium tin oxide electrode in resistive random access memory

    NASA Astrophysics Data System (ADS)

    Chen, Po-Hsun; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Pan, Chih-Hung; Lin, Chih-Yang; Jin, Fu-Yuan; Chen, Min-Chen; Huang, Hui-Chun; Lo, Ikai; Zheng, Jin-Cheng; Sze, Simon M.

    2016-03-01

    Identical insulators and bottom electrodes were fabricated and capped by an indium tin oxide (ITO) film, either undoped or doped with erbium (Er), as a top electrode. This distinctive top electrode dramatically altered the resistive random access memory (RRAM) characteristics, for example, lowering the operation current and enlarging the memory window. In addition, the RESET voltage increased, whereas the SET voltage remained almost the same. A conduction model of Er-doped ITO is proposed through current-voltage (I-V) measurement and current fitting to explain the resistance switching mechanism of Er-doped ITO RRAM and is confirmed by material analysis and reliability tests.

  1. Nonvolatile transtance change random access memory based on magnetoelectric P(VDF-TrFE)/Metglas heterostructures

    NASA Astrophysics Data System (ADS)

    Lu, Peipei; Shang, Dashan; Shen, Jianxin; Chai, Yisheng; Yang, Chuansen; Zhai, Kun; Cong, Junzhuang; Shen, Shipeng; Sun, Young

    2016-12-01

    Transtance change random access memory (TCRAM) is a type of nonvolatile memory based on the nonlinear magnetoelectric coupling effects of multiferroics. In this work, ferroelectric P(VDF-TrFE) thin films were prepared on Metglas foil substrates by the sol-gel technique to form multiferroic heterostructures. The magnetoelectric voltage coefficient of the heterostructure can be switched reproducibly to different levels between positive and negative values by applying selective electric-field pulses. Compared with bulk multiferroic heterostructures, the polarization switching voltage was reduced to 7 V. Our facile technological approach enables this organic magnetoelectric heterostructure as a promising candidate for the applications in multilevel TCRAM devices.

  2. Multiple number and letter comparison: directionality and accessibility in numeric and alphabetic memories.

    PubMed

    Jou, Jerwen

    2003-01-01

    In 3 experiments, subjects made comparativejudgments on a set of 2 numbers or letters, 3 numbers or letters, or 5 numbers or letters. Numeric and alphabetic serial order memories were contrasted. Three aspects of serial order memory processes were identified: computational complexity, directionality, and accessibility. Computational complexity is the number of algorithmic steps involved in identifying a target. Directional bias is measured as the speed differences in identifying serial targets of equal computational complexity in a stimulus array. Memory accessibility is measured as the numeric and alphabetic serial position effects. Subjects had a slight directional bias favoring backward ordering for single digits but no bias in 2-digit number ordering, in contrast to a strong forward directional advantage in letter ordering. The speed of number access was found to steadily and evenly decrease along the numeric scale, in contrast to a systematic pattern of variations in alphabet access along the alphabetic scale. Finally, the middle item effect (the middle item in a multi-item array is identified most slowly) found in Jou's (1997) multiple-letter comparison study was generalized to numbers.

  3. Shape memory alloy fixator system for suturing tissue in minimal access surgery.

    PubMed

    Xu, W; Frank, T G; Stockham, G; Cuschieri, A

    1999-01-01

    A new technique for suturing human tissue is described in which tissue closure is achieved by means of small fixators made from shape memory alloy. The aim of the development is to provide an alternative to thread suturing in minimal access surgery, which is quicker and requires less skill to achieve the required suturing quality. The design of the fixators is described in terms of the thermal shape recovery of shape memory alloy and a novel form of finite element analysis, which uses a nonlinear elastic element for the material property. Thermal analysis of the fixators and surrounding tissue is used to predict the temperature distribution during and after the application of electric current heating. This was checked in an in vitro experiment, which confirmed that deployment caused no detectable collateral damage to surrounding tissue. In vivo animal studies on the use of the shape memory alloy fixator for suturing tissue are ongoing to establish safety and healing effects.

  4. Design of Unstructured Adaptive (UA) NAS Parallel Benchmark Featuring Irregular, Dynamic Memory Accesses

    NASA Technical Reports Server (NTRS)

    Feng, Hui-Yu; VanderWijngaart, Rob; Biswas, Rupak; Biegel, Bryan (Technical Monitor)

    2001-01-01

    We describe the design of a new method for the measurement of the performance of modern computer systems when solving scientific problems featuring irregular, dynamic memory accesses. The method involves the solution of a stylized heat transfer problem on an unstructured, adaptive grid. A Spectral Element Method (SEM) with an adaptive, nonconforming mesh is selected to discretize the transport equation. The relatively high order of the SEM lowers the fraction of wall clock time spent on inter-processor communication, which eases the load balancing task and allows us to concentrate on the memory accesses. The benchmark is designed to be three-dimensional. Parallelization and load balance issues of a reference implementation will be described in detail in future reports.

  5. Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 4, Appendix C

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Statistical analysis data is supplied along with write pulse width, read cycle time, write cycle time, and chip enable time data.

  6. Immigration, language proficiency, and autobiographical memories: Lifespan distribution and second-language access.

    PubMed

    Esposito, Alena G; Baker-Ward, Lynne

    2016-08-01

    This investigation examined two controversies in the autobiographical literature: how cross-language immigration affects the distribution of autobiographical memories across the lifespan and under what circumstances language-dependent recall is observed. Both Spanish/English bilingual immigrants and English monolingual non-immigrants participated in a cue word study, with the bilingual sample taking part in a within-subject language manipulation. The expected bump in the number of memories from early life was observed for non-immigrants but not immigrants, who reported more memories for events surrounding immigration. Aspects of the methodology addressed possible reasons for past discrepant findings. Language-dependent recall was influenced by second-language proficiency. Results were interpreted as evidence that bilinguals with high second-language proficiency, in contrast to those with lower second-language proficiency, access a single conceptual store through either language. The final multi-level model predicting language-dependent recall, including second-language proficiency, age of immigration, internal language, and cue word language, explained ¾ of the between-person variance and (1)/5 of the within-person variance. We arrive at two conclusions. First, major life transitions influence the distribution of memories. Second, concept representation across multiple languages follows a developmental model. In addition, the results underscore the importance of considering language experience in research involving memory reports.

  7. Retraction: High uniformity and improved nonlinearity by embedding nanocrystals in selector-less resistive random access memory

    NASA Astrophysics Data System (ADS)

    Banerjee, Writam; Lu, Nianduan; Li, Ling; Sun, Pengxiao; Liu, Qi; Lv, Hangbing; Long, Shibing; Liu, Ming

    2015-03-01

    Retraction of `High uniformity and improved nonlinearity by embedding nanocrystals in selector-less resistive random access memory' by Writam Banerjee et al., Nanoscale, 2014, advance article (C4NR05077K)

  8. Encoding and Retrieval Processes Involved in the Access of Source Information in the Absence of Item Memory

    ERIC Educational Resources Information Center

    Ball, B. Hunter; DeWitt, Michael R.; Knight, Justin B.; Hicks, Jason L.

    2014-01-01

    The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were "related" to the target item but never actually studied.…

  9. Daily Access to Sucrose Impairs Aspects of Spatial Memory Tasks Reliant on Pattern Separation and Neural Proliferation in Rats

    ERIC Educational Resources Information Center

    Reichelt, Amy C.; Morris, Margaret J.; Westbrook, Reginald Frederick

    2016-01-01

    High sugar diets reduce hippocampal neurogenesis, which is required for minimizing interference between memories, a process that involves "pattern separation." We provided rats with 2 h daily access to a sucrose solution for 28 d and assessed their performance on a spatial memory task. Sucrose consuming rats discriminated between objects…

  10. Iii-V Compound Semiconductor Integrated Charge Storage Structures for Dynamic and Non-Volatile Memory Elements

    NASA Astrophysics Data System (ADS)

    Hetherington, Dale Laird

    This thesis presents an investigation into a novel group of GaAs charge storage devices. These devices, which are an integration of bipolar and junction field effect transistor structures were conceived, designed, fabricated, and tested within this study. The purpose was to analyse new types of charge storage devices, which are suitable for fabrication and lead to the development of dynamic and nonvolatile memories in III-V compound semiconductors. Currently, III-V semiconductor storage devices consist only of capacitors, where data is destroyed during reading and electrical erasure is difficult. In this work, four devices types were demonstrated that exhibit nondestructive reading, and three of the prototypes can be electrically erased. All types use the junction field effect transistor (JFET) for charge sensing, with each having different bipolar or epitaxial layer structure controlling the junction gate. The bottom epitaxial layer in each case served as the JFET channel. Two of the device types have three alternately doped layers, while the remaining two have four alternately doped layers. In all cases, removal of majority carriers from the middle layers constitutes stored charge. The missing carriers deplete the current carrying a region of the JFET channel. Drain current of the JFET becomes an indicator of stored charge. The basic function of each JFET memory element type is independent of interchanging n- and p- type doping within the structure type. Some performance advantage can be realized, however, by sensing with an n-type channel as compared to p- type due to increased carrier mobility. All device types exhibit storage time characteristics of order ten seconds. Devices are constructed in epitaxial layers grown by molecular beam epitaxy (MBE) reactors. The design of the epitaxial layers is an intrinsic part, together with the electrical design, of the storage device concept. These concepts are implemented first with photolithography masks which are used

  11. Recombinant azurin-CdSe/ZnS hybrid structures for nanoscale resistive random access memory device.

    PubMed

    Yagati, Ajay Kumar; Kim, Sang-Uk; Lee, Taek; Min, Junhong; Choi, Jeong-Woo

    2017-04-15

    In the present study, we developed a biohybrid material composed of recombinant azurin and CdSe-ZnS quantum dot to perform as a resistive random access memory (ReRAM) device. Site specific amino acid sequences were introduced in azurin to bind with the surface of CdSe-ZnS nanoparticle allowing the formation of a hybrid and voltage-driven switching enabled to develop a resistive random access memory (ReRAM) device. The analytical measurements confirmed that the azurin and CdSe-ZnS nanoparticles were well conjugated and formed into a single hybrid. Further, reversible, bistable switching along with repeatable writing-reading-erasing processes on individual azurin/CdSe-ZnS hybrid at nanoscale was achieved on the hybrid device. The device was programmed tested for 50 cycles with an ON/OFF ratio and measured to be of three orders of magnitude. The developed device shown good stability and repeatability and operates at low voltages thus makes it promising candidate for future memory device applications.

  12. FeTRAM. An organic ferroelectric material based novel random access memory cell.

    PubMed

    Das, Saptarshi; Appenzeller, Joerg

    2011-09-14

    Science and technology in the electronics area have always been driven by the development of materials with unique properties and their integration into novel device concepts with the ultimate goal to enable new functionalities in innovative circuit architectures. In particular, a shift in paradigm requires a synergistic approach that combines materials, devices and circuit aspects simultaneously. Here we report the experimental implementation of a novel nonvolatile memory cell that combines silicon nanowires with an organic ferroelectric polymer-PVDF-TrFE-into a new ferroelectric transistor architecture. Our new cell, the ferroelectric transistor random access memory (FeTRAM) exhibits similarities with state-of-the-art ferroelectric random access memories (FeRAMs) in that it utilizes a ferroelectric material to store information in a nonvolatile (NV) fashion but with the added advantage of allowing for nondestructive readout. This nondestructive readout is a result of information being stored in our cell using a ferroelectric transistor instead of a capacitor-the scheme commonly employed in conventional FeRAMs.

  13. Spin-transfer torque switched magnetic tunnel junctions in magnetic random access memory

    NASA Astrophysics Data System (ADS)

    Sun, Jonathan Z.

    2016-10-01

    Spin-transfer torque (or spin-torque, or STT) based magnetic tunnel junction (MTJ) is at the heart of a new generation of magnetism-based solid-state memory, the so-called spin-transfer-torque magnetic random access memory, or STT-MRAM. Over the past decades, STT-based switchable magnetic tunnel junction has seen progress on many fronts, including the discovery of (001) MgO as the most favored tunnel barrier, which together with (bcc) Fe or FeCo alloy are yielding best demonstrated tunnel magneto-resistance (TMR); the development of perpendicularly magnetized ultrathin CoFeB-type of thin films sufficient to support high density memories with junction sizes demonstrated down to 11nm in diameter; and record-low spin-torque switching threshold current, giving best reported switching efficiency over 5 kBT/μA. Here we review the basic device properties focusing on the perpendicularly magnetized MTJs, both in terms of switching efficiency as measured by sub-threshold, quasi-static methods, and of switching speed at super-threshold, forced switching. We focus on device behaviors important for memory applications that are rooted in fundamental device physics, which highlights the trade-off of device parameters for best suitable system integration.

  14. An Examination of Radiation-Induced Bit-Upset Patterns in Semiconductor Memories

    DTIC Science & Technology

    1990-05-01

    lineaire d’electron a impulsion ( LINAC ) et le 60CO ont ere utilises comme sources. Les resultats demontrent qu’en general les erreurs ne sont pas...MS2200 memory tester system, experiments were carried out to determine the number and location of these errors for two DRAMs and one SRPM exposed to LINAC ...testeur de memoires MOSAID MS2200 pour caracteriser ce genre d’erreur pour les memoires RAM statiques (SRAM) et dynamiques (DRAM). Un accelerateur

  15. Bipolar resistive switching characteristics in tantalum nitride-based resistive random access memory devices

    SciTech Connect

    Kim, Myung Ju; Jeon, Dong Su; Park, Ju Hyun; Kim, Tae Geun

    2015-05-18

    This paper reports the bipolar resistive switching characteristics of TaN{sub x}-based resistive random access memory (ReRAM). The conduction mechanism is explained by formation and rupture of conductive filaments caused by migration of nitrogen ions and vacancies; this mechanism is in good agreement with either Ohmic conduction or the Poole-Frenkel emission model. The devices exhibit that the reset voltage varies from −0.82 V to −0.62 V, whereas the set voltage ranges from 1.01 V to 1.30 V for 120 DC sweep cycles. In terms of reliability, the devices exhibit good retention (>10{sup 5 }s) and pulse-switching endurance (>10{sup 6} cycles) properties. These results indicate that TaN{sub x}-based ReRAM devices have a potential for future nonvolatile memory devices.

  16. Self-assembled tin dioxide for forming-free resistive random-access memory application

    NASA Astrophysics Data System (ADS)

    Hong, Ying-Jhan; Wang, Tsang-Hsuan; Wei, Shih-Yuan; Chang, Pin; Yew, Tri-Rung

    2016-06-01

    A novel resistive switching structure, tin-doped indium oxide (ITO)/SnO2- x (defined as SnO2 with oxygen vacancies)/SnS was demonstrated with a set voltage of 0.38 V, a reset voltage of -0.15 V, a ratio of high resistance to low resistance of 544, and forming-free and nonlinear current-voltage (I-V) characteristics. The interface of the ITO and the self-assembled SnO2- x contributed to the resistive switching behavior. This device showed great potential for resistive random access memory (RRAM) application and solving the sneak path problem in cross-bar memory arrays. Furthermore, a nanostructured resistive switching device was demonstrated successfully.

  17. High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

    PubMed Central

    Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

    2011-01-01

    The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527

  18. Soft errors in commercial off-the-shelf static random access memories

    NASA Astrophysics Data System (ADS)

    Dilillo, L.; Tsiligiannis, G.; Gupta, V.; Bosser, A.; Saigne, F.; Wrobel, F.

    2017-01-01

    This article reviews state-of-the-art techniques for the evaluation of the effect of radiation on static random access memory (SRAM). We detailed irradiation test techniques and results from irradiation experiments with several types of particles. Two commercial SRAMs, in 90 and 65 nm technology nodes, were considered as case studies. Besides the basic static and dynamic test modes, advanced stimuli for the irradiation tests were introduced, as well as statistical post-processing techniques allowing for deeper analysis of the correlations between bit-flip cross-sections and design/architectural characteristics of the memory device. Further insight is provided on the response of irradiated stacked layer devices and on the use of characterized SRAM devices as particle detectors.

  19. Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

    NASA Technical Reports Server (NTRS)

    Wu, Jiin C.; Katti, Romney R.; Stadler, Henry L.

    1991-01-01

    The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

  20. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    SciTech Connect

    Jovanović, B. E-mail: lionel.torres@lirmm.fr; Brum, R. M.; Torres, L.

    2014-04-07

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  1. Hydrogen doping in HfO{sub 2} resistance change random access memory

    SciTech Connect

    Duncan, D.; Magyari-Köpe, B.; Nishi, Y.

    2016-01-25

    The structures and energies of hydrogen-doped monoclinic hafnium dioxide were calculated using density-functional theory. The electronic interactions are described within the LDA + U formalism, where on-site Coulomb corrections are applied to the 5d orbital electrons of Hf atoms and 2p orbital electrons of the O atoms. The effects of charge state, defect-defect interactions, and hydrogenation are investigated and compared with experiment. It is found that hydrogenation of HfO{sub 2} resistance-change random access memory devices energetically stabilizes the formation of oxygen vacancies and conductive vacancy filaments through multiple mechanisms, leading to improved switching characteristic and device yield.

  2. Spin-transfer-torque efficiency enhanced by edge-damage of perpendicular magnetic random access memories

    SciTech Connect

    Song, Kyungmi; Lee, Kyung-Jin

    2015-08-07

    We numerically investigate the effect of magnetic and electrical damages at the edge of a perpendicular magnetic random access memory (MRAM) cell on the spin-transfer-torque (STT) efficiency that is defined by the ratio of thermal stability factor to switching current. We find that the switching mode of an edge-damaged cell is different from that of an undamaged cell, which results in a sizable reduction in the switching current. Together with a marginal reduction of the thermal stability factor of an edge-damaged cell, this feature makes the STT efficiency large. Our results suggest that a precise edge control is viable for the optimization of STT-MRAM.

  3. Temperature effects on failure and annealing behavior in dynamic random access memories

    NASA Astrophysics Data System (ADS)

    Wilkin, N. D.; Self, C. T.

    1982-12-01

    Total dose failure levels and long time anneal characteristics of dynamic random access memories are measured while the devices are exercised under actual use conditions. These measurements were performed over the temperature range of -60 C to +70 C. The total dose failure levels are shown to decrease with increasing temperature. The anneal characteristics are shown to result in both an increase and decrease in the measured number of errors as a function of time. Finally a description of the test instrumentation and irradiation procedures are given.

  4. A stochastic simulation method for the assessment of resistive random access memory retention reliability

    SciTech Connect

    Berco, Dan Tseng, Tseung-Yuen

    2015-12-21

    This study presents an evaluation method for resistive random access memory retention reliability based on the Metropolis Monte Carlo algorithm and Gibbs free energy. The method, which does not rely on a time evolution, provides an extremely efficient way to compare the relative retention properties of metal-insulator-metal structures. It requires a small number of iterations and may be used for statistical analysis. The presented approach is used to compare the relative robustness of a single layer ZrO{sub 2} device with a double layer ZnO/ZrO{sub 2} one, and obtain results which are in good agreement with experimental data.

  5. Low power consumption resistance random access memory with Pt/InOx/TiN structure

    NASA Astrophysics Data System (ADS)

    Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.; Tsai, Ming-Jinn

    2013-09-01

    In this study, the resistance switching characteristics of a resistive random access memory device with Pt/InOx/TiN structure is investigated. Unstable bipolar switching behavior is observed during the initial switching cycle, which then stabilizes after several switching cycles. Analyses indicate that the current conduction mechanism in the resistance state is dominated by Ohmic conduction. The decrease in electrical conductance can be attributed to the reduction of the cross-sectional area of the conduction path. Furthermore, the device exhibits low operation voltage and power consumption.

  6. One electron-controlled multiple-valued dynamic random-access-memory

    NASA Astrophysics Data System (ADS)

    Kye, H. W.; Song, B. N.; Lee, S. E.; Kim, J. S.; Shin, S. J.; Choi, J. B.; Yu, Y.-S.; Takahashi, Y.

    2016-02-01

    We propose a new architecture for a dynamic random-access-memory (DRAM) capable of storing multiple values by using a single-electron transistor (SET). The gate of a SET is designed to be connected to a plurality of DRAM unit cells that are arrayed at intersections of word lines and bitlines. In this SET-DRAM hybrid scheme, the multiple switching characteristics of SET enables multiple value data stored in a DRAM unit cell, and this increases the storage functionality of the device. Moreover, since refreshing data requires only a small amount of SET driving current, this enables device operating with low standby power consumption.

  7. TiO2 thin film based transparent flexible resistive switching random access memory

    NASA Astrophysics Data System (ADS)

    Pham, Kim Ngoc; Dung Hoang, Van; Tran, Cao Vinh; Thang Phan, Bach

    2016-03-01

    In our work we have fabricated TiO2 based resistive switching devices both on transparent substrates (ITO, IGZO/glass) and transparent flexible substrate (ITO/PET). All devices demonstrate the reproducibility of forming free bipolar resistive switching with high transparency in the visible light range (∼80% at the wavelength of 550 nm). Particularly, transparent and flexible device exhibits stable resistive switching performance at the initial state (flat) and even after bending state up to 500 times with curvature radius of 10% compared to flat state. The achieved characteristics of resistive switching of TiO2 thin films seem to be promising for transparent flexible random access memory.

  8. Microstructural Characterization in Reliability Measurement of Phase Change Random Access Memory

    NASA Astrophysics Data System (ADS)

    Bae, Junsoo; Hwang, Kyuman; Park, Kwangho; Jeon, Seongbu; Kang, Dae-hwan; Park, Soonoh; Ahn, Juhyeon; Kim, Seoksik; Jeong, Gitae; Chung, Chilhee

    2011-04-01

    The cell failures after cycling endurance in phase-change random access memory (PRAM) have been classified into three groups, which have been analyzed by transmission electron microscopy (TEM). Both stuck reset of the set state (D0) and stuck set of the reset state (D1) are due to a void created inside GeSbTe (GST) film or thereby lowering density of GST film. The decrease of the both set and reset resistances that leads to the tails from the reset distribution are induced from the Sb increase with cycles.

  9. A bio-inspired memory device based on interfacing Physarum polycephalum with an organic semiconductor

    SciTech Connect

    Romeo, Agostino; Dimonte, Alice; Tarabella, Giuseppe; D’Angelo, Pasquale E-mail: iannotta@imem.cnr.it; Erokhin, Victor; Iannotta, Salvatore E-mail: iannotta@imem.cnr.it

    2015-01-01

    The development of devices able to detect and record ion fluxes is a crucial point in order to understand the mechanisms that regulate communication and life of organisms. Here, we take advantage of the combined electronic and ionic conduction properties of a conducting polymer to develop a hybrid organic/living device with a three-terminal configuration, using the Physarum polycephalum Cell (PPC) slime mould as a living bio-electrolyte. An over-oxidation process induces a conductivity switch in the polymer, due to the ionic flux taking place at the PPC/polymer interface. This behaviour endows a current-depending memory effect to the device.

  10. Correlation between static random access memory power-up state and transistor variation

    NASA Astrophysics Data System (ADS)

    Takeuchi, Kiyoshi; Mizutani, Tomoko; Saraya, Takuya; Shinohara, Hirofumi; Kobayashi, Masaharu; Hiramoto, Toshiro

    2017-04-01

    The correlation between the static random access memory (SRAM) power-up state (i.e., state 0 or 1 immediately after the power supply is turned on) and cell transistor variation is systematically studied by circuit simulations and mismatch space partitioning. It is revealed that, while both the mismatches of pFETs (pull-up) and nFETs (pull-down and access) contribute, their relative importance changes depending on the voltage ramping speed. The static retention noise margin well correlates with the power-up state only if the ramping speed is sufficiently low. Otherwise, pull-up transistor mismatch dominates the power-up state determination owing to the interference of capacitive current and asymmetrical capacitive coupling of the storage nodes to the ground and power supply.

  11. Charging behavior of silicon nitride based non-volatile memory structures with embedded semiconductor nanocrystals

    NASA Astrophysics Data System (ADS)

    Horváth, Zs. J.; Basa, P.; Jászi, T.; Molnár, K. Z.; Pap, A. E.; Molnár, Gy.

    2013-03-01

    The charging behavior of MNS (metal-nitride-silicon) and MNOS (metal-nitride-oxide-silicon) structures containing Si or Ge nanocrystals were studied by capacitance-voltage (C-V) and memory window measurements and by simulation. Both the width of hysteresis of C-V characteristics and the injected charge exhibited exponential dependence on the charging voltage at moderate voltage values, while at high voltages the width of hysteresis of C-V characteristics and the injected charge exhibited saturation. The memory window for reference MNS structure without nanocrystals was wider than that for reference MNOS structures. The presence of nanocrystals enhanced the charging behavior of MNOS structures, but in MNS structures nanocrystals exhibited the opposite effect. The main conclusion is that the presence of nanocrystals or other deep levels close to the Si surface enhances the charge injection properties due to the increased tunneling probability, but nanocrystals or other deep levels located far from the Si surface in the nitride layer do not enhance, but even can degrade the charging behavior by the capture of charge carriers.

  12. Analyzing the Energy and Power Consumption of Remote Memory Accesses in the OpenSHMEM Model

    SciTech Connect

    Jana, Siddhartha; Hernandez, Oscar R; Poole, Stephen W; Hsu, Chung-Hsing; Chapman, Barbara

    2014-01-01

    PGAS models like OpenSHMEM provide interfaces to explicitly initiate one-sided remote memory accesses among processes. In addition, the model also provides synchronizing barriers to ensure a consistent view of the distributed memory at different phases of an application. The incorrect use of such interfaces affects the scalability achievable while using a parallel programming model. This study aims at understanding the effects of these constructs on the energy and power consumption behavior of OpenSHMEM applications. Our experiments show that cost incurred in terms of the total energy and power consumed depends on multiple factors across the software and hardware stack. We conclude that there is a significant impact on the power consumed by the CPU and DRAM due to multiple factors including the design of the data transfer patterns within an application, the design of the communication protocols within a middleware, the architectural constraints laid by the interconnect solutions, and also the levels of memory hierarchy within a compute node. This work motivates treating energy and power consumption as important factors while designing compute solutions for current and future distributed systems.

  13. Accessibility of observable and unobservable characteristics in autobiographical memories of recent and distant past.

    PubMed

    Karylowski, Jerzy J; Mrozinski, Blazej

    2017-02-01

    Self-reports regarding how people visualise themselves during events that occurred in the past show that for events from the distant past individuals report assuming a more external perspective than for events from the recent past [Nigro, G., & Neisser, U. (1983). Point of view in personal memories. Cognitive Psychology, 15, 467-482; Pronin, E., & Ross, L. (2006). Temporal differences in trait self-ascription. Journal of Personality & Social Psychology, 90, 197-209]. Thus it appears that, with the passage of time, representations of self embodied in memories of past events lose their position of an insider and assume a more ordinary position of self as an object seen from the perspective of an outside observer. The purpose of the present experiment was to examine this shift using a performance-based measure of accessibility. Results showed that self-judgements regarding unobservable, covert characteristics were faster for recent-compared to more distant-autobiographical events. However, self-judgements regarding observable, overt characteristics were faster for more distant events. This suggests an accessibility-based mechanism underlying the shift from internal to the relatively more external perspective in forming self-images related to the distant past.

  14. Making working memory work: The effects of extended practice on focus capacity and the processes of updating, forward access, and random access

    PubMed Central

    Price, John M.; Colflesh, Gregory J. H.; Cerella, John; Verhaeghen, Paul

    2014-01-01

    We investigated the effects of 10 hours of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. PMID:24486803

  15. Response of the Ubiquitin-Proteasome System to Memory Retrieval After Extended-Access Cocaine or Saline Self-Administration.

    PubMed

    Werner, Craig T; Milovanovic, Mike; Christian, Daniel T; Loweth, Jessica A; Wolf, Marina E

    2015-12-01

    The ubiquitin-proteasome system (UPS) has been implicated in the retrieval-induced destabilization of cocaine- and fear-related memories in Pavlovian paradigms. However, nothing is known about its role in memory retrieval after self-administration of cocaine, an operant paradigm, or how the length of withdrawal from cocaine may influence retrieval mechanisms. Here, we examined UPS activity after an extended-access cocaine self-administration regimen that leads to withdrawal-dependent incubation of cue-induced cocaine craving. Controls self-administered saline. In initial experiments, memory retrieval was elicited via a cue-induced seeking/retrieval test on withdrawal day (WD) 50-60, when craving has incubated. We found that retrieval of cocaine- and saline-associated memories produced similar increases in polyubiquitinated proteins in the nucleus accumbens (NAc), compared with rats that did not undergo a seeking/retrieval test. Measures of proteasome catalytic activity confirmed similar activation of the UPS after retrieval of saline and cocaine memories. However, in a subsequent experiment in which testing was conducted on WD1, proteasome activity in the NAc was greater after retrieval of cocaine memory than saline memory. Analysis of other brain regions confirmed that effects of cocaine memory retrieval on proteasome activity, relative to saline memory retrieval, depend on withdrawal time. These results, combined with prior studies, suggest that the relationship between UPS activity and memory retrieval depends on training paradigm, brain region, and time elapsed between training and retrieval. The observation that mechanisms underlying cocaine memory retrieval change depending on the age of the memory has implications for development of memory destabilization therapies for cue-induced relapse in cocaine addicts.

  16. Metal-oxide-semiconductor diodes containing C60 fullerenes for non-volatile memory applications

    NASA Astrophysics Data System (ADS)

    Beckmeier, Daniel; Baumgärtner, Hermann

    2013-01-01

    For non-volatile memories, silicon-oxide-nitride-oxide-silicon or floating gate structures are used to store information by charging and discharging electronic states reversibly. In this article, we propose to replace the floating gate by C60 molecules. This would allow more defined programming voltages because of the discrete molecular energy levels and a higher resistance to tunneling oxide defects because of the weak electrical connection between the single molecules. Such C60 MOS diode structures are produced and their electrical properties are analyzed regarding current transport and charging mechanism of the molecules. To create the MOS structures, C60 molecules (5% of a monolayer) are evaporated onto a part of a clean silicon wafer and covered by amorphous silicon in situ in an ultra high vacuum system. Then the wafer is oxidized in wet atmosphere at just 710 °C through the C60 layer. The goal is to produce a clean oxide above and under the molecules without destroying them. Aluminum gate contacts are defined on top of these layers to perform complementary capacitance voltage (CV) and current voltage (IV) measurements. First, the gate voltage is swept to analyze the injection current, then CV measurements are performed after each sweep to analyze the charge state of the C60 layer and the oxide quality. Reference diodes without C60 on the same wafer show an identical Fowler-Nordheim (FN) tunneling behavior for currents injected from silicon or from aluminum, respectively. In the CV curves, no pronounced flatband voltage shift is observable. In diodes with C60, for negative gate voltages, a classical FN tunneling is observed and compared to theory. The electron injection from silicon shows a different tunneling current behavior. It starts at a lower electric field and has a smaller slope then a FN current would have. It is identified as a trap-assisted tunneling (TAT) current caused by oxidation-induced traps under the C60 layer. It is modeled by an

  17. Ferroelectric switching of poly(vinylidene difluoride-trifluoroethylene) in metal-ferroelectric-semiconductor non-volatile memories with an amorphous oxide semiconductor

    NASA Astrophysics Data System (ADS)

    Gelinck, G. H.; van Breemen, A. J. J. M.; Cobb, B.

    2015-03-01

    Ferroelectric polarization switching of poly(vinylidene difluoride-trifluoroethylene) is investigated in different thin-film device structures, ranging from simple capacitors to dual-gate thin-film transistors (TFT). Indium gallium zinc oxide, a high mobility amorphous oxide material, is used as semiconductor. We find that the ferroelectric can be polarized in both directions in the metal-ferroelectric-semiconductor (MFS) structure and in the dual-gate TFT under certain biasing conditions, but not in the single-gate thin-film transistors. These results disprove the common belief that MFS structures serve as a good model system for ferroelectric polarization switching in thin-film transistors.

  18. Ferroelectric switching of poly(vinylidene difluoride-trifluoroethylene) in metal-ferroelectric-semiconductor non-volatile memories with an amorphous oxide semiconductor

    SciTech Connect

    Gelinck, G. H.; Breemen, A. J. J. M. van; Cobb, B.

    2015-03-02

    Ferroelectric polarization switching of poly(vinylidene difluoride-trifluoroethylene) is investigated in different thin-film device structures, ranging from simple capacitors to dual-gate thin-film transistors (TFT). Indium gallium zinc oxide, a high mobility amorphous oxide material, is used as semiconductor. We find that the ferroelectric can be polarized in both directions in the metal-ferroelectric-semiconductor (MFS) structure and in the dual-gate TFT under certain biasing conditions, but not in the single-gate thin-film transistors. These results disprove the common belief that MFS structures serve as a good model system for ferroelectric polarization switching in thin-film transistors.

  19. Controllable quantized conductance for multilevel data storage applications using conductive bridge random access memory.

    PubMed

    Aga, Fekadu Gochole; Woo, Jiyong; Song, Jeonghwan; Park, Jaehyuk; Lim, Seokjae; Sung, Changhyuck; Hwang, Hyunsang

    2017-03-17

    In this paper, we investigate the quantized conduction behavior of conductive bridge random access memory (CBRAM) with varied materials and ramping rates. We report stable and reproducible quantized conductance states with integer multiples of fundamental conductance obtained by optimizing the voltage ramping rate and the Ti-diffusion barrier (DB) at the Cu/HfO2 interface. Owing to controlled diffusion of Cu ions by the Ti-DB and the optimized ramping rate, through which it was possible to control the time delay of Cu ion reduction, more than seven levels of discrete conductance states were clearly observed. Analytical modeling was performed to determine the rate-limiting step in filament growth based on an electrochemical redox reaction. Our understanding of the fundamental mechanisms of quantized conductance behaviors provide a promising future for the multi-bit CBRAM device.

  20. False Operation of Static Random Access Memory Cells under Alternating Current Power Supply Voltage Variation

    NASA Astrophysics Data System (ADS)

    Sawada, Takuya; Takata, Hidehiro; Nii, Koji; Nagata, Makoto

    2013-04-01

    Static random access memory (SRAM) cores exhibit susceptibility against power supply voltage variation. False operation is investigated among SRAM cells under sinusoidal voltage variation on power lines introduced by direct RF power injection. A standard SRAM core of 16 kbyte in a 90 nm 1.5 V technology is diagnosed with built-in self test and on-die noise monitor techniques. The sensitivity of bit error rate is shown to be high against the frequency of injected voltage variation, while it is not greatly influenced by the difference in frequency and phase against SRAM clocking. It is also observed that the distribution of false bits is substantially random in a cell array.

  1. Low-energy Resistive Random Access Memory Devices with No Need for a Compliance Current

    PubMed Central

    Xu, Zedong; Yu, Lina; Wu, Yong; Dong, Chang; Deng, Ning; Xu, Xiaoguang; Miao, J.; Jiang, Yong

    2015-01-01

    A novel resistive random access memory device is designed with SrTiO3/ La2/3Sr1/3MnO3 (LSMO)/MgAl2O4 (MAO)/Cu structure, in which metallic epitaxial LSMO is employed as the bottom electrode rather than traditional metal materials. In this device, the critical external compliance current is no longer necessary due to the high self-resistance of LSMO. The LMSO bottom electrode can act as a series resistor to offer a compliance current during the set process. Besides, the device also has excellent switching features which are originated in the formation of Cu filaments under external voltage. Therefore it provides the possibility of reducing power consumption and accelerating the commercialization of resistive switching devices. PMID:25982101

  2. Characteristics and mechanism study of cerium oxide based random access memories

    SciTech Connect

    Hsieh, Cheng-Chih; Roy, Anupam; Rai, Amritesh; Chang, Yao-Feng; Banerjee, Sanjay K.

    2015-04-27

    In this work, low operating voltage and high resistance ratio of different resistance states of binary transition metal oxide based resistive random access memories (RRAMs) are demonstrated. Binary transition metal oxides with high dielectric constant have been explored for RRAM application for years. However, CeO{sub x} is considered as a relatively new material to other dielectrics. Since research on CeO{sub x} based RRAM is still at preliminary stage, fundamental characteristics of RRAM such as scalability and mechanism studies need to be done before moving further. Here, we show very high operation window and low switching voltage of CeO{sub x} RRAMs and also compare electrical performance of Al/CeO{sub x}/Au system between different thin film deposition methods and discuss characteristics and resistive switching mechanism.

  3. Controllable quantized conductance for multilevel data storage applications using conductive bridge random access memory

    NASA Astrophysics Data System (ADS)

    Gochole Aga, Fekadu; Woo, Jiyong; Song, Jeonghwan; Park, Jaehyuk; Lim, Seokjae; Sung, Changhyuck; Hwang, Hyunsang

    2017-03-01

    In this paper, we investigate the quantized conduction behavior of conductive bridge random access memory (CBRAM) with varied materials and ramping rates. We report stable and reproducible quantized conductance states with integer multiples of fundamental conductance obtained by optimizing the voltage ramping rate and the Ti-diffusion barrier (DB) at the Cu/HfO2 interface. Owing to controlled diffusion of Cu ions by the Ti-DB and the optimized ramping rate, through which it was possible to control the time delay of Cu ion reduction, more than seven levels of discrete conductance states were clearly observed. Analytical modeling was performed to determine the rate-limiting step in filament growth based on an electrochemical redox reaction. Our understanding of the fundamental mechanisms of quantized conductance behaviors provide a promising future for the multi-bit CBRAM device.

  4. Voltage induced magnetostrictive switching of nanomagnets: Strain assisted strain transfer torque random access memory

    SciTech Connect

    Khan, Asif Nikonov, Dmitri E.; Manipatruni, Sasikanth; Ghani, Tahir; Young, Ian A.

    2014-06-30

    A spintronic device, called the “strain assisted spin transfer torque (STT) random access memory (RAM),” is proposed by combining the magnetostriction effect and the spin transfer torque effect which can result in a dramatic improvement in the energy dissipation relative to a conventional STT-RAM. Magnetization switching in the device which is a piezoelectric-ferromagnetic heterostructure via the combined magnetostriction and STT effect is simulated by solving the Landau-Lifshitz-Gilbert equation incorporating the influence of thermal noise. The simulations show that, in such a device, each of these two mechanisms (magnetostriction and spin transfer torque) provides in a 90° rotation of the magnetization leading a deterministic 180° switching with a critical current significantly smaller than that required for spin torque alone. Such a scheme is an attractive option for writing magnetic RAM cells.

  5. Electrical Characterization of the RCA CDP1822SD Random Access Memory, Volume 1, Appendix a

    NASA Technical Reports Server (NTRS)

    Klute, A.

    1979-01-01

    Electrical characteristization tests were performed on 35 RCA CDP1822SD, 256-by-4-bit, CMOS, random access memories. The tests included three functional tests, AC and DC parametric tests, a series of schmoo plots, rise/fall time screening, and a data retention test. All tests were performed on an automated IC test system with temperatures controlled by a thermal airstream unit. All the functional tests, the data retention test, and the AC and DC parametric tests were performed at ambient temperatures of 25 C, -20 C, -55 C, 85 C, and 125 C. The schmoo plots were performed at ambient temperatures of 25 C, -55 C, and 125 C. The data retention test was performed at 25 C. Five devices failed one or more functional tests and four of these devices failed to meet the expected limits of a number of AC parametric tests. Some of the schmoo plots indicated a small degree of interaction between parameters.

  6. Band alignment between Ta2O5 and metals for resistive random access memory electrodes engineering

    NASA Astrophysics Data System (ADS)

    Zhuo, V. Y.-Q.; Jiang, Y.; Li, M. H.; Chua, E. K.; Zhang, Z.; Pan, J. S.; Zhao, R.; Shi, L. P.; Chong, T. C.; Robertson, J.

    2013-02-01

    Band alignment of resistive random access memory (RRAM) switching material Ta2O5 and different metal electrode materials was examined using high-resolution X-ray photoelectron spectroscopy. Schottky and hole barrier heights at the interface between electrode and Ta2O5 were obtained, where the electrodes consist of materials with low to high work function (Φm ,vac from 4.06 to 5.93 eV). Effective metal work functions were extracted to study the Fermi level pinning effect and to discuss the dominant conduction mechanism. An accurate band alignment between electrodes and Ta2O5 is obtained and can be used for RRAM electrode engineering and conduction mechanism study.

  7. Understanding Electrical Conduction States in WO3 Thin Films Applied for Resistive Random-Access Memory

    NASA Astrophysics Data System (ADS)

    Ta, Thi Kieu Hanh; Pham, Kim Ngoc; Dao, Thi Bang Tam; Tran, Dai Lam; Phan, Bach Thang

    2016-05-01

    The electrical conduction and associated resistance switching mechanism of top electrode/WO3/bottom electrode devices [top electrode (TE): Ag, Ti; bottom electrode (BE): Pt, fluorine-doped tin oxide] have been investigated. The direction of switching and switching ability depended on both the top and bottom electrode material. Multiple electrical conduction mechanisms control the leakage current of such switching devices, including trap-controlled space-charge, ballistic, Ohmic, and Fowler-Nordheim tunneling effects. The transition between electrical conduction states is also linked to the switching (SET-RESET) process. This is the first report of ballistic conduction in research into resistive random-access memory. The associated resistive switching mechanisms are also discussed.

  8. Microstructural transitions in resistive random access memory composed of molybdenum oxide with copper during switching cycles.

    PubMed

    Arita, Masashi; Ohno, Yuuki; Murakami, Yosuke; Takamizawa, Keisuke; Tsurumaki-Fukuchi, Atsushi; Takahashi, Yasuo

    2016-08-21

    The switching operation of a Cu/MoOx/TiN resistive random access memory (ReRAM) device was investigated using in situ transmission electron microscopy (TEM), where the TiN surface was slightly oxidized (ox-TiN). The relationship between the switching properties and the dynamics of the ReRAM microstructure was confirmed experimentally. The growth and/or shrinkage of the conductive filament (CF) can be classified into two set modes and two reset modes. These switching modes depend on the device's switching history, factors such as the amount of Cu inclusions in the MoOx layer and the CF geometry. High currents are needed to produce an observable change in the CF. However, sharp and stable switching behaviour can be achieved without requiring such a major change. The local region around the CF is thought to contribute to the ReRAM switching process.

  9. Role of an encapsulating layer for reducing resistance drift in phase change random access memory

    NASA Astrophysics Data System (ADS)

    Jin, Bo; Kim, Jungsik; Pi, Dong-Hai; Kim, Hyoung Seop; Meyyappan, M.; Lee, Jeong-Soo

    2014-12-01

    Phase change random access memory (PCRAM) devices exhibit a steady increase in resistance in the amorphous phase upon aging and this resistance drift phenomenon directly affects the device reliability. A stress relaxation model is used here to study the effect of a device encapsulating layer material in addressing the resistance drift phenomenon in PCRAM. The resistance drift can be increased or decreased depending on the biaxial moduli of the phase change material (YPCM) and the encapsulating layer material (YELM) according to the stress relationship between them in the drift regime. The proposed model suggests that the resistance drift can be effectively reduced by selecting a proper material as an encapsulating layer. Moreover, our model explains that reducing the size of the phase change material (PCM) while fully reset and reducing the amorphous/crystalline ratio in PCM help to improve the resistance drift, and thus opens an avenue for highly reliable multilevel PCRAM applications.

  10. Simulation study on heat conduction of a nanoscale phase-change random access memory cell.

    PubMed

    Kim, Junho; Song, Ki-Bong

    2006-11-01

    We have investigated heat transfer characteristics of a nano-scale phase-change random access memory (PRAM) cell using finite element method (FEM) simulation. Our PRAM cell is based on ternary chalcogenide alloy, Ge2Sb2Te5 (GST), which is used as a recording layer. For contact area of 100 x 100 nm2, simulations of crystallization and amorphization processes were carried out. Physical quantities such as electric conductivity, thermal conductivity, and specific heat were treated as temperature-dependent parameters. Through many simulations, it is concluded that one can reduce set current by decreasing both electric conductivities of amorphous GST and crystalline GST, and in addition to these conditions by decreasing electric conductivity of molten GST one can also reduce reset current significantly.

  11. Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

    NASA Astrophysics Data System (ADS)

    Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

    2016-04-01

    The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

  12. Ultrafast switching in nanoscale phase-change random access memory with superlattice-like structures.

    PubMed

    Loke, Desmond; Shi, Luping; Wang, Weijie; Zhao, Rong; Yang, Hongxin; Ng, Lung-Tat; Lim, Kian-Guan; Chong, Tow-Chong; Yeo, Yee-Chia

    2011-06-24

    Phase-change random access memory cells with superlattice-like (SLL) GeTe/Sb(2)Te(3) were demonstrated to have excellent scaling performance in terms of switching speed and operating voltage. In this study, the correlations between the cell size, switching speed and operating voltage of the SLL cells were identified and investigated. We found that small SLL cells can achieve faster switching speed and lower operating voltage compared to the large SLL cells. Fast amorphization and crystallization of 300 ps and 1 ns were achieved in the 40 nm SLL cells, respectively, both significantly faster than those observed in the Ge(2)Sb(2)Te(5) (GST) cells of the same cell size. 40 nm SLL cells were found to switch with low amorphization voltage of 0.9 V when pulse-widths of 5 ns were employed, which is much lower than the 1.6 V required by the GST cells of the same cell size. These effects can be attributed to the fast heterogeneous crystallization, low thermal conductivity and high resistivity of the SLL structures. Nanoscale PCRAM with SLL structure promises applications in high speed and low power memory devices.

  13. Gate contact resistive random access memory in nano scaled FinFET logic technologies

    NASA Astrophysics Data System (ADS)

    Hsu, Meng-Yin; Shih, Yi-Hong; Chih, Yue-Der; Lin, Chrong Jung; King, Ya-Chin

    2017-04-01

    A full logic-compatible embedded gate contact resistive random access memory (GC-RRAM) cell in the CMOS FinFET logic process without extra mask or processing steps has been successfully demonstrated for high-density and low-cost logic nonvolatile memory (NVM) applications. This novel GC-RRAM cell is composed of a transition metal oxide from the gate contact plug and interlayer dielectric (ILD) in the middle, and a gate contact and an n-type epitaxial drain terminal as the top and bottom electrodes, respectively. It features low-voltage operation and reset current, compact cell size, and a stable read window. As a promising embedded NVM solution, the compact one transistor and one resistor (1T1R) cell is highly scalable as the technology node progresses. Excellent data retention and cycling capability have also been demonstrated by the reliability testing results. These superior characteristics make GC-RRAM one of a few viable candidates for logic NVM for future FinFET circuits.

  14. Microstructural transitions in resistive random access memory composed of molybdenum oxide with copper during switching cycles

    NASA Astrophysics Data System (ADS)

    Arita, Masashi; Ohno, Yuuki; Murakami, Yosuke; Takamizawa, Keisuke; Tsurumaki-Fukuchi, Atsushi; Takahashi, Yasuo

    2016-08-01

    The switching operation of a Cu/MoOx/TiN resistive random access memory (ReRAM) device was investigated using in situ transmission electron microscopy (TEM), where the TiN surface was slightly oxidized (ox-TiN). The relationship between the switching properties and the dynamics of the ReRAM microstructure was confirmed experimentally. The growth and/or shrinkage of the conductive filament (CF) can be classified into two set modes and two reset modes. These switching modes depend on the device's switching history, factors such as the amount of Cu inclusions in the MoOx layer and the CF geometry. High currents are needed to produce an observable change in the CF. However, sharp and stable switching behaviour can be achieved without requiring such a major change. The local region around the CF is thought to contribute to the ReRAM switching process.The switching operation of a Cu/MoOx/TiN resistive random access memory (ReRAM) device was investigated using in situ transmission electron microscopy (TEM), where the TiN surface was slightly oxidized (ox-TiN). The relationship between the switching properties and the dynamics of the ReRAM microstructure was confirmed experimentally. The growth and/or shrinkage of the conductive filament (CF) can be classified into two set modes and two reset modes. These switching modes depend on the device's switching history, factors such as the amount of Cu inclusions in the MoOx layer and the CF geometry. High currents are needed to produce an observable change in the CF. However, sharp and stable switching behaviour can be achieved without requiring such a major change. The local region around the CF is thought to contribute to the ReRAM switching process. Electronic supplementary information (ESI) available. See DOI: 10.1039/c6nr02602h

  15. Memory

    MedlinePlus

    ... it has to decide what is worth remembering. Memory is the process of storing and then remembering this information. There are different types of memory. Short-term memory stores information for a few ...

  16. Context controls access to working and reference memory in the pigeon (Columba livia).

    PubMed

    Roberts, William A; Macpherson, Krista; Strang, Caroline

    2016-01-01

    The interaction between working and reference memory systems was examined under conditions in which salient contextual cues were presented during memory retrieval. Ambient colored lights (red or green) bathed the operant chamber during the presentation of comparison stimuli in delayed matching-to-sample training (working memory) and during the presentation of the comparison stimuli as S+ and S- cues in discrimination training (reference memory). Strong competition between memory systems appeared when the same contextual cue appeared during working and reference memory training. When different contextual cues were used, however, working memory was completely protected from reference memory interference.

  17. Random depth access full-field heterodyne low-coherence interferometry utilizing acousto-optic modulation and a complementary metaloxide semiconductor camera.

    PubMed

    Egan, Patrick; Connelly, Michael J; Lakestani, Fereydoun; Whelan, Maurice P

    2006-04-01

    With analog scanning, time-domain low-coherence interferometry lacks precise depth information, and optical carrier generation demands a linear scanning speed. Full-field heterodyne low-coherence interferometry that uses a logarithmic complementary metal-oxide semiconductor camera, acousto-optic modulation, and digital depth stepping is reported, with which random regions of interest, lateral and axial, can be accessed. Furthermore, nanometer profilometry is possible through heterodyne phase retrieval of the interference signal. The approach demonstrates inexpensive yet high-precision functional machine vision offering true digital random access in three dimensions.

  18. Frontal activations associated with accessing and evaluating information in working memory: an fMRI study.

    PubMed

    Zhang, John X; Leung, Hoi-Chung; Johnson, Marcia K

    2003-11-01

    To investigate the involvement of frontal cortex in accessing and evaluating information in working memory, we used a variant of a Sternberg paradigm and compared brain activations between positive and negative responses (known to differentially tax access/evaluation processes). Participants remembered two trigrams in each trial and were then cued to discard one of them and maintain the other one as the target set. After a delay, a probe letter was presented and participants made decisions about whether or not it was in the target set. Several frontal areas--anterior cingulate (BA32), middle frontal gyrus (bilateral BA9, right BA10, and right BA46), and left inferior frontal gyrus (BA44/45)--showed increased activity when participants made correct negative responses relative to when they made correct positive responses. No areas activated significantly more for the positive responses than for the negative responses. It is suggested that the multiple frontal areas involved in the test phase of this task may reflect several component processes that underlie more general frontal functions.

  19. Three-Year-Old Children Can Access Their Own Memory to Guide Responses on a Visual Matching Task

    ERIC Educational Resources Information Center

    Balcomb, Frances K.; Gerken, LouAnn

    2008-01-01

    Many models of learning rely on accessing internal knowledge states. Yet, although infants and young children are recognized to be proficient learners, the ability to act on metacognitive information is not thought to develop until early school years. In the experiments reported here, 3.5-year-olds demonstrated memory-monitoring skills by…

  20. Memory.

    ERIC Educational Resources Information Center

    McKean, Kevin

    1983-01-01

    Discusses current research (including that involving amnesiacs and snails) into the nature of the memory process, differentiating between and providing examples of "fact" memory and "skill" memory. Suggests that three brain parts (thalamus, fornix, mammilary body) are involved in the memory process. (JN)

  1. Exploration of perpendicular magnetic anisotropy material system for application in spin transfer torque - Random access memory

    NASA Astrophysics Data System (ADS)

    Natarajarathinam, Anusha

    Perpendicular magnetic anisotropy (PMA) materials have unique advantages when used in magnetic tunnel junctions (MTJ) which are the most critical part of spin-torque transfer random access memory devices (STT-RAMs) that are being researched intensively as future non-volatile memory technology. They have high magnetoresistance which improves their sensitivity. The STT-RAM has several advantages over competing technologies, for instance, low power consumption, non-volatility, ultra-fast read and write speed and high endurance. In personal computers, it can replace SRAM for high-speed applications, Flash for non-volatility, and PSRAM and DRAM for high-speed program execution. The main aim of this research is to identify and optimize the best perpendicular magnetic anisotropy (PMA) material system for application to STT-RAM technology. Preliminary search for perpendicular magnetic anisotropy (PMA) materials for pinned layer for MTJs started with the exploration and optimization of crystalline alloys such as Co50Pd50 alloy, Mn50Al50 and amorphous alloys such as Tb21Fe72Co7 and are first presented in this work. Further optimization includes the study of Co/[Pd/Pt]x multilayers (ML), and the development of perpendicular synthetic antiferromagnets (SAF) utilizing these multilayers. Focused work on capping and seed layers to evaluate interfacial perpendicular anisotropy in free layers for pMTJs is then discussed. Optimization of the full perpendicular magnetic tunnel junction (pMTJ) includes the CoFeB/MgO/CoFeB trilayer coupled to a pinned/pinning layer with perpendicular Co/[Pd/Pt]x SAF and a thin Ta seeded CoFeB free layer. Magnetometry, simulations, annealing studies, transport measurements and TEM analysis on these samples will then be presented.

  2. A Beginner's Guide to Memory.

    ERIC Educational Resources Information Center

    Hughes, Elizabeth M.

    1981-01-01

    This article is designed to equip the reader with the information needed to deal with questions of computer memory. Discussed are core memory; semiconductor memory; size of memory; expanding memory; charge-coupled device memories; magnetic bubble memory; and read-only and read-mostly memories. (KC)

  3. Tuning resistance states by thickness control in an electroforming-free nanometallic complementary resistance random access memory

    SciTech Connect

    Yang, Xiang; Lu, Yang; Lee, Jongho; Chen, I-Wei

    2016-01-04

    Tuning low resistance state is crucial for resistance random access memory (RRAM) that aims to achieve optimal read margin and design flexibility. By back-to-back stacking two nanometallic bipolar RRAMs with different thickness into a complementary structure, we have found that its low resistance can be reliably tuned over several orders of magnitude. Such high tunability originates from the exponential thickness dependence of the high resistance state of nanometallic RRAM, in which electron wave localization in a random network gives rise to the unique scaling behavior. The complementary nanometallic RRAM provides electroforming-free, multi-resistance-state, sub-100 ns switching capability with advantageous characteristics for memory arrays.

  4. Goal-directed access to mental objects in working memory: the role of task-specific feature retrieval.

    PubMed

    Schwager, Sabine; Hagendorf, Herbert

    2009-12-01

    In the present study, we examined the hypothesis of task-specific access to mental objects from verbal working memory. It is currently assumed that a mental object is brought into the focus of attention in working memory by a process of object selection, which provides this object for any upcoming mental operation (Oberauer, 2002). We argue that this view must be extended, since the selection of information for processing is always guided by current intentions and task goals. In our experiments, it was required that two kinds of comparison tasks be executed on digits selected from a set of three digits held in working memory. The tasks differed in regard to the object features the comparison was based on. Access to a new mental object (object switch) took consistently longer on the semantic comparison task than on the recognition task. This difference is not attributable to object selection difficulty and cannot be fully accounted for by task difficulty or differences in rehearsal processes. The results support our assumptions that (1) mental objects are selected for a given specific task and, so, are accessed with their specific task-relevant object features; (2) verbal mental objects outside the focus of attention are usually not maintained at a full feature level but are refreshed phonologically by subvocal rehearsal; and (3) if more than phonological information is required, access to mental objects involves feature retrieval processes in addition to object selection.

  5. Anomalous random telegraph noise and temporary phenomena in resistive random access memory

    NASA Astrophysics Data System (ADS)

    Puglisi, Francesco Maria; Larcher, Luca; Padovani, Andrea; Pavan, Paolo

    2016-11-01

    In this paper we present a comprehensive examination of the characteristics of complex Random Telegraph Noise (RTN) signals in Resistive Random Access Memory (RRAM) devices with TiN/Ti/HfO2/TiN structure. Initially, the anomalous RTN (aRTN) is investigated through careful systematic experiment, dedicated characterization procedures, and physics-based simulations to gain insights into the physics of this phenomenon. The experimentally observed RTN parameters (amplitude of the current fluctuations, capture and emission times) are analyzed in different operating conditions. Anomalous behaviors are characterized and their statistical characteristics are evaluated. Physics-based simulations considering both the Coulomb interactions among different defects in the device and the possible existence of defects with metastable states are exploited to suggest a possible physical origin of aRTN. The same simulation framework is also shown to be able to predict other temporary phenomena related to RTN, such as the temporary change in RTN stochastic properties or the sudden and iterative random appearing and vanishing of RTN fluctuations always exhibiting the same statistical characteristics. Results highlight the central role of the electrostatic interactions among individual defects and the trapped charge in describing RTN and related phenomena.

  6. Performance improvement of gadolinium oxide resistive random access memory treated by hydrogen plasma immersion ion implantation

    SciTech Connect

    Wang, Jer-Chyi Hsu, Chih-Hsien; Ye, Yu-Ren; Ai, Chi-Fong; Tsai, Wen-Fa

    2014-03-15

    Characteristics improvement of gadolinium oxide (Gd{sub x}O{sub y}) resistive random access memories (RRAMs) treated by hydrogen plasma immersion ion implantation (PIII) was investigated. With the hydrogen PIII treatment, the Gd{sub x}O{sub y} RRAMs exhibited low set/reset voltages and a high resistance ratio, which were attributed to the enhanced movement of oxygen ions within the Gd{sub x}O{sub y} films and the increased Schottky barrier height at Pt/Gd{sub x}O{sub y} interface, respectively. The resistive switching mechanism of Gd{sub x}O{sub y} RRAMs was dominated by Schottky emission, as proved by the area dependence of the resistance in the low resistance state. After the hydrogen PIII treatment, a retention time of more than 10{sup 4} s was achieved at an elevated measurement temperature. In addition, a stable cycling endurance with the resistance ratio of more than three orders of magnitude of the Gd{sub x}O{sub y} RRAMs can be obtained.

  7. High-Speed Optical Library System Using Digital Versatile Disk Random Access Memory

    NASA Astrophysics Data System (ADS)

    Tanabe, Takaya; Ura, Tetsu; Yamamoto, Manabu

    2000-02-01

    A high-data-transfer-rate optical storage system using a redundant array of inexpensive libraries (RAIL) has been developed and tested. It incorporates multiple libraries, where each library consists of dual digital versatile disk (DVD) random access memory (RAM) drives and a single robotic hand and holds 2.6 GB DVD disks. To increase the reliability of data storage and at the same time to eliminate the need for read-after-write verification, which doubles the recording time, a redundant array of inexpensive drives (RAID) 4 algorithm is implemented in the control unit of the storage system. Data sent by the host is transferred to a control unit, which stripes the data into five data groups plus one parity unit. The striped and parity data is sent to individual libraries and written to the DVD disks. This system writes and retrieves data with a transfer rate of approximately 6 MB/s, using write and read control methods that minimize the data striping overhead. This reliable library system can be used for networked multimedia applications.

  8. Single-crystalline CuO nanowires for resistive random access memory applications

    SciTech Connect

    Hong, Yi-Siang; Chen, Jui-Yuan; Huang, Chun-Wei; Chiu, Chung-Hua; Huang, Yu-Ting; Huang, Ting Kai; He, Ruo Shiuan; Wu, Wen-Wei

    2015-04-27

    Recently, the mechanism of resistive random access memory (RRAM) has been partly clarified and determined to be controlled by the forming and erasing of conducting filaments (CF). However, the size of the CF may restrict the application and development as devices are scaled down. In this work, we synthesized CuO nanowires (NW) (∼150 nm in diameter) to fabricate a CuO NW RRAM nanodevice that was much smaller than the filament (∼2 μm) observed in a bulk CuO RRAM device in a previous study. HRTEM indicated that the Cu{sub 2}O phase was generated after operation, which demonstrated that the filament could be minimize to as small as 3.8 nm when the device is scaled down. In addition, energy dispersive spectroscopy (EDS) and electron energy loss spectroscopy (EELS) show the resistive switching of the dielectric layer resulted from the aggregated oxygen vacancies, which also match with the I-V fitting results. Those results not only verify the switching mechanism of CuO RRAM but also show RRAM has the potential to shrink in size, which will be beneficial to the practical application of RRAM devices.

  9. Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition

    NASA Astrophysics Data System (ADS)

    Niu, Gang; Kim, Hee-Dong; Roelofs, Robin; Perez, Eduardo; Schubert, Markus Andreas; Zaumseil, Peter; Costina, Ioan; Wenger, Christian

    2016-06-01

    With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the nano-crystallites density in the film increases the forming voltage of devices and its variation. Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption.

  10. Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition.

    PubMed

    Niu, Gang; Kim, Hee-Dong; Roelofs, Robin; Perez, Eduardo; Schubert, Markus Andreas; Zaumseil, Peter; Costina, Ioan; Wenger, Christian

    2016-06-17

    With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the nano-crystallites density in the film increases the forming voltage of devices and its variation. Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption.

  11. Sustained Resistive Switching in a Single Cu:7,7,8,8-tetracyanoquinodimethane Nanowire: A Promising Material for Resistive Random Access Memory

    PubMed Central

    Basori, Rabaya; Kumar, Manoranjan; Raychaudhuri, Arup K.

    2016-01-01

    We report a new type of sustained and reversible unipolar resistive switching in a nanowire device made from a single strand of Cu:7,7,8,8-tetracyanoquinodimethane (Cu:TCNQ) nanowire (diameter <100 nm) that shows high ON/OFF ratio (~103), low threshold voltage of switching (~3.5 V) and large cycling endurance (>103). This indicates a promising material for high density resistive random access memory (ReRAM) device integration. Switching is observed in Cu:TCNQ single nanowire devices with two different electrode configuration: symmetric (C-Pt/Cu:TCNQ/C-Pt) and asymmetric (Cu/Cu:TCNQ/C-Pt), where contacts connecting the nanowire play an important role. This report also developed a method of separating out the electrode and material contributions in switching using metal-semiconductor-metal (MSM) device model along with a direct 4-probe resistivity measurement of the nanowire in the OFF as well as ON state. The device model was followed by a phenomenological model of current transport through the nanowire device which shows that lowering of potential barrier at the contacts likely occur due to formation of Cu filaments in the interface between nanowire and contact electrodes. We obtain quantitative agreement of numerically analyzed results with the experimental switching data. PMID:27245099

  12. Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition

    PubMed Central

    Niu, Gang; Kim, Hee-Dong; Roelofs, Robin; Perez, Eduardo; Schubert, Markus Andreas; Zaumseil, Peter; Costina, Ioan; Wenger, Christian

    2016-01-01

    With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the nano-crystallites density in the film increases the forming voltage of devices and its variation. Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption. PMID:27312225

  13. Statistical analysis of the correlations between cell performance and its initial states in contact resistive random access memory cells

    NASA Astrophysics Data System (ADS)

    Kao, Yun Feng; Hsieh, Wei Ting; Che Chen, Chun; King, Ya-Chin; Lin, Chrong Jung

    2017-04-01

    Variability has been one of the critical challenges in the implementation of large resistive random access memory (RRAM) arrays. Wide variations in set/reset, read and cycling characteristics can significantly reduce the design margin and feasibility of a memory array. Predicting the characteristics of RRAM cells is constructive to provide insights and to adjust the memory operations accordingly. In this study, a strong correlation between the cell performance and its initial state is found in contact RRAM (CRRAM) cells by 28 nm CMOS logic technology. Furthermore, a verify-reset operation is proposed to identify the type of conductive filament (CF) in a cell. Distinctive CRRAM characteristics are found to be linked directly to initial CFs, enabling preliminary screening and adaptive resets to address the large variability problems in sizable CRRAM arrays.

  14. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    SciTech Connect

    Islam, Sk Masiul Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P.; Chakraborty, S.

    2015-06-24

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.

  15. Analysis of self-heating of thermally assisted spin-transfer torque magnetic random access memory.

    PubMed

    Deschenes, Austin; Muneer, Sadid; Akbulut, Mustafa; Gokirmak, Ali; Silva, Helena

    2016-01-01

    Thermal assistance has been shown to significantly reduce the required operation power for spin torque transfer magnetic random access memory (STT-MRAM). Proposed heating methods include modified material stack compositions that result in increased self-heating or external heat sources. In this work we analyze the self-heating process of a standard perpendicular magnetic anisotropy STT-MRAM device through numerical simulations in order to understand the relative contributions of Joule, thermoelectric Peltier and Thomson, and tunneling junction heating. A 2D rotationally symmetric numerical model is used to solve the coupled electro-thermal equations including thermoelectric effects and heat absorbed or released at the tunneling junction. We compare self-heating for different common passivation materials, positive and negative electrical current polarity, and different device thermal anchoring and boundaries resistance configurations. The variations considered are found to result in significant differences in maximum temperatures reached. Average increases of 3 K, 10 K, and 100 K for different passivation materials, positive and negative polarity, and different thermal anchoring configurations, respectively, are observed. The highest temperatures, up to 424 K, are obtained for silicon dioxide as the passivation material, positive polarity, and low thermal anchoring with thermal boundary resistance configurations. Interestingly it is also found that due to the tunneling heat, Peltier effect, device geometry, and numerous interfacial layers around the magnetic tunnel junction (MTJ), most of the heat is dissipated on the lower potential side of the magnetic junction. This asymmetry in heating, which has also been observed experimentally, is important as thermally assisted switching requires heating of the free layer specifically and this will be significantly different for the two polarity operations, set and reset.

  16. Analysis of self-heating of thermally assisted spin-transfer torque magnetic random access memory

    PubMed Central

    Muneer, Sadid; Akbulut, Mustafa; Gokirmak, Ali; Silva, Helena

    2016-01-01

    Thermal assistance has been shown to significantly reduce the required operation power for spin torque transfer magnetic random access memory (STT-MRAM). Proposed heating methods include modified material stack compositions that result in increased self-heating or external heat sources. In this work we analyze the self-heating process of a standard perpendicular magnetic anisotropy STT-MRAM device through numerical simulations in order to understand the relative contributions of Joule, thermoelectric Peltier and Thomson, and tunneling junction heating. A 2D rotationally symmetric numerical model is used to solve the coupled electro-thermal equations including thermoelectric effects and heat absorbed or released at the tunneling junction. We compare self-heating for different common passivation materials, positive and negative electrical current polarity, and different device thermal anchoring and boundaries resistance configurations. The variations considered are found to result in significant differences in maximum temperatures reached. Average increases of 3 K, 10 K, and 100 K for different passivation materials, positive and negative polarity, and different thermal anchoring configurations, respectively, are observed. The highest temperatures, up to 424 K, are obtained for silicon dioxide as the passivation material, positive polarity, and low thermal anchoring with thermal boundary resistance configurations. Interestingly it is also found that due to the tunneling heat, Peltier effect, device geometry, and numerous interfacial layers around the magnetic tunnel junction (MTJ), most of the heat is dissipated on the lower potential side of the magnetic junction. This asymmetry in heating, which has also been observed experimentally, is important as thermally assisted switching requires heating of the free layer specifically and this will be significantly different for the two polarity operations, set and reset. PMID:28144517

  17. Evaluating OpenSHMEM Explicit Remote Memory Access Operations and Merged Requests

    SciTech Connect

    Boehm, Swen; Pophale, Swaroop S; Gorentla Venkata, Manjunath

    2016-01-01

    The OpenSHMEM Library Specification has evolved consid- erably since version 1.0. Recently, non-blocking implicit Remote Memory Access (RMA) operations were introduced in OpenSHMEM 1.3. These provide a way to achieve better overlap between communication and computation. However, the implicit non-blocking operations do not pro- vide a separate handle to track and complete the individual RMA opera- tions. They are guaranteed to be completed after either a shmem quiet(), shmem barrier() or a shmem barrier all() is called. These are global com- pletion and synchronization operations. Though this semantic is expected to achieve a higher message rate for the applications, the drawback is that it does not allow fine-grained control over the completion of RMA operations. In this paper, first, we introduce non-blocking RMA operations with requests, where each operation has an explicit request to track and com- plete the operation. Second, we introduce interfaces to merge multiple requests into a single request handle. The merged request tracks multiple user-selected RMA operations, which provides the flexibility of tracking related communication operations with one request handle. Lastly, we explore the implications in terms of performance, productivity, usability and the possibility of defining different patterns of communication via merging of requests. Our experimental results show that a well designed and implemented OpenSHMEM stack can hide the overhead of allocating and managing the requests. The latency of RMA operations with requests is similar to blocking and implicit non-blocking RMA operations. We test our implementation with the Scalable Synthetic Compact Applications (SSCA #1) benchmark and observe that using RMA operations with requests and merging of these requests outperform the implementation using blocking RMA operations and implicit non-blocking operations by 49% and 74% respectively.

  18. Towards developing a compact model for magnetization switching in straintronics magnetic random access memory devices

    NASA Astrophysics Data System (ADS)

    Barangi, Mahmood; Erementchouk, Mikhail; Mazumder, Pinaki

    2016-08-01

    Strain-mediated magnetization switching in a magnetic tunneling junction (MTJ) by exploiting a combination of piezoelectricity and magnetostriction has been proposed as an energy efficient alternative to spin transfer torque (STT) and field induced magnetization switching methods in MTJ-based magnetic random access memories (MRAM). Theoretical studies have shown the inherent advantages of strain-assisted switching, and the dynamic response of the magnetization has been modeled using the Landau-Lifshitz-Gilbert (LLG) equation. However, an attempt to use LLG for simulating dynamics of individual elements in large-scale simulations of multi-megabyte straintronics MRAM leads to extremely time-consuming calculations. Hence, a compact analytical solution, predicting the flipping delay of the magnetization vector in the nanomagnet under stress, combined with a liberal approximation of the LLG dynamics in the straintronics MTJ, can lead to a simplified model of the device suited for fast large-scale simulations of multi-megabyte straintronics MRAMs. In this work, a tensor-based approach is developed to study the dynamic behavior of the stressed nanomagnet. First, using the developed method, the effect of stress on the switching behavior of the magnetization is investigated to realize the margins between the underdamped and overdamped regimes. The latter helps the designer realize the oscillatory behavior of the magnetization when settling along the minor axis, and the dependency of oscillations on the stress level and the damping factor. Next, a theoretical model to predict the flipping delay of the magnetization vector is developed and tested against LLG-based numerical simulations to confirm the accuracy of findings. Lastly, the obtained delay is incorporated into the approximate solutions of the LLG dynamics, in order to create a compact model to liberally and quickly simulate the magnetization dynamics of the MTJ under stress. Using the developed delay equation, the

  19. State of the art in semiconductor detectors

    SciTech Connect

    Rehak, P. ); Gatti, E. )

    1989-01-01

    The state of the art in semiconductor detectors for elementary particle physics and x-ray astronomy is briefly reviewed. Semiconductor detectors are divided into two groups; classical semiconductor diode detectors; and semiconductor memory detectors. Principles of signal formation for both groups of detectors are described and their performance is compared. New developments of silicon detectors are reported here. 13 refs., 8 figs.

  20. Retrieval practice enhances the accessibility but not the quality of memory.

    PubMed

    Sutterer, David W; Awh, Edward

    2016-06-01

    Numerous studies have demonstrated that retrieval from long-term memory (LTM) can enhance subsequent memory performance, a phenomenon labeled the retrieval practice effect. However, the almost exclusive reliance on categorical stimuli in this literature leaves open a basic question about the nature of this improvement in memory performance. It has not yet been determined whether retrieval practice improves the probability of successful memory retrieval or the quality of the retrieved representation. To answer this question, we conducted three experiments using a mixture modeling approach (Zhang & Luck, 2008) that provides a measure of both the probability of recall and the quality of the recalled memories. Subjects attempted to memorize the color of 400 unique shapes. After every 10 images were presented, subjects either recalled the last 10 colors (the retrieval practice condition) by clicking on a color wheel with each shape as a retrieval cue or they participated in a control condition that involved no further presentations (Experiment 1) or restudy of the 10 shape/color associations (Experiments 2 and 3). Performance in a subsequent delayed recall test revealed a robust retrieval practice effect. Subjects recalled a significantly higher proportion of items that they had previously retrieved relative to items that were untested or that they had restudied. Interestingly, retrieval practice did not elicit any improvement in the precision of the retrieved memories. The same empirical pattern also was observed following delays of greater than 24 hours. Thus, retrieval practice increases the probability of successful memory retrieval but does not improve memory quality.

  1. Contexts and Control Operations Used in Accessing List-Specific, Generalized, and Semantic Memories

    ERIC Educational Resources Information Center

    Humphreys, Michael S.; Murray, Krista L.; Maguire, Angela M.

    2009-01-01

    The human ability to focus memory retrieval operations on a particular list, episode or memory structure has not been fully appreciated or documented. In Experiment 1-3, we make it increasingly difficult for participants to switch between a less recent list (multiple study opportunities), and a more recent list (single study opportunity). Task…

  2. CMOS Interface Circuits for Spin Tunneling Junction Based Magnetic Random Access Memories

    SciTech Connect

    Saripalli, Ganesh

    2002-01-01

    Magneto resistive memories (MRAM) are non-volatile memories which use magnetic instead of electrical structures to store data. These memories, apart from being non-volatile, offer a possibility to achieve densities better than DRAMs and speeds faster than SRAMs. MRAMs could potentially replace all computer memory RAM technologies in use today, leading to future applications like instan-on computers and longer battery life for pervasive devices. Such rapid development was made possible due to the recent discovery of large magnetoresistance in Spin tunneling junction devices. Spin tunneling junctions (STJ) are composite structures consisting of a thin insulating layer sandwiched between two magnetic layers. This thesis research is targeted towards these spin tunneling junction based Magnetic memories. In any memory, some kind of an interface circuit is needed to read the logic states. In this thesis, four such circuits are proposed and designed for Magnetic memories (MRAM). These circuits interface to the Spin tunneling junctions and act as sense amplifiers to read their magnetic states. The physical structure and functional characteristics of these circuits are discussed in this thesis. Mismatch effects on the circuits and proper design techniques are also presented. To demonstrate the functionality of these interface structures, test circuits were designed and fabricated in TSMC 0.35μ CMOS process. Also circuits to characterize the process mismatches were fabricated and tested. These results were then used in Matlab programs to aid in design process and to predict interface circuit's yields.

  3. Feasibility of a neutron detector-dosemeter based on single-event upsets in dynamic random-access memories.

    PubMed

    Phillips, G W; August, R A; Campbell, A B; Nelson, M E; Price, J L; Guardala, N A; Moscovitch, M

    2002-01-01

    The feasibility was investigated of a solid-state neutron detector/dosemeter based on single-event upset (SEU) effects in dynamic random-access memories (DRAMs), commonly used in computer memories. Such a device, which uses a neutron converter material to produce a charged particle capable of causing an upset, would be light-weight, low-power, and could be read simply by polling the memory for bit flips. It would have significant advantages over standard solid-state neutron dosemeters which require off-line processing for track etching and analysis. Previous efforts at developing an SEU neutron detector/dosemeter have suffered from poor response, which can be greatly enhanced by selecting a modern high-density DRAM chip for SEU sensitivity and by using a thin 10B film as a converter. Past attempts to use 10B were not successful because the average alpha particle energy was insufficient to penetrate to the sensitive region of the memory. This can be overcome by removing the surface passivation layer before depositing the 10B film or by implanting 10B directly into the chip. Previous experimental data show a 10(3) increase in neutron sensitivity by chips containing borosilicate glass, which could be used in an SEU detector. The results are presented of simulations showing that the absolute efficiency of an SEU neutron dosemeter can be increased by at least a factor of 1000 over earlier designs.

  4. Effect of embedded metal nanocrystals on the resistive switching characteristics in NiN-based resistive random access memory cells

    SciTech Connect

    Yun, Min Ju; Kim, Hee-Dong; Man Hong, Seok; Hyun Park, Ju; Su Jeon, Dong; Geun Kim, Tae

    2014-03-07

    The metal nanocrystals (NCs) embedded-NiN-based resistive random access memory cells are demonstrated using several metal NCs (i.e., Pt, Ni, and Ti) with different physical parameters in order to investigate the metal NC's dependence on resistive switching (RS) characteristics. First, depending on the electronegativity of metal, the size of metal NCs is determined and this affects the operating current of memory cells. If metal NCs with high electronegativity are incorporated, the size of the NCs is reduced; hence, the operating current is reduced owing to the reduced density of the electric field around the metal NCs. Second, the potential wells are formed by the difference of work function between the metal NCs and active layer, and the barrier height of the potential wells affects the level of operating voltage as well as the conduction mechanism of metal NCs embedded memory cells. Therefore, by understanding these correlations between the active layer and embedded metal NCs, we can optimize the RS properties of metal NCs embedded memory cells as well as predict their conduction mechanisms.

  5. Flexible resistive random access memory using NiOx/GaN microdisk arrays fabricated on graphene films.

    PubMed

    Lee, Keundong; Park, Jong-Woo; Tchoe, Youngbin; Yoon, Jiyoung; Chung, Kunook; Yoon, Hosang; Lee, Sangik; Yoon, Chansoo; Park, Bae; Yi, Gyu-Chul

    2017-03-17

    We report on flexible resistive random access memory (ReRAM) arrays fabricated using NiOx/GaN microdisk arrays on graphene films. The ReRAM device was created from discrete GaN microdisk arrays grown on graphene films produced by chemical vapor deposition, followed by deposition of NiOx thin layers and Au metal contacts. The microdisk ReRAM arrays were transferred to flexible plastic substrates by a simple lift-off technique. The electrical and memory characteristics of the ReRAM devices were investigated under bending conditions. Resistive switching characteristics, including cumulative probability, endurance, and retention, were measured. After 1000 bending repetitions, no significant change in the device characteristics was observed. The flexible ReRAM devices, constructed using only inorganic materials, operated reliably at temperatures as high as 180°C.

  6. Set statistics in conductive bridge random access memory device with Cu/HfO{sub 2}/Pt structure

    SciTech Connect

    Zhang, Meiyun; Long, Shibing Wang, Guoming; Xu, Xiaoxin; Li, Yang; Liu, Qi; Lv, Hangbing; Liu, Ming; Lian, Xiaojuan; Miranda, Enrique; Suñé, Jordi

    2014-11-10

    The switching parameter variation of resistive switching memory is one of the most important challenges in its application. In this letter, we have studied the set statistics of conductive bridge random access memory with a Cu/HfO{sub 2}/Pt structure. The experimental distributions of the set parameters in several off resistance ranges are shown to nicely fit a Weibull model. The Weibull slopes of the set voltage and current increase and decrease logarithmically with off resistance, respectively. This experimental behavior is perfectly captured by a Monte Carlo simulator based on the cell-based set voltage statistics model and the Quantum Point Contact electron transport model. Our work provides indications for the improvement of the switching uniformity.

  7. Adjustable built-in resistor on oxygen-vacancy-rich electrode-capped resistance random access memory

    NASA Astrophysics Data System (ADS)

    Pan, Chih-Hung; Chang, Ting-Chang; Tsai, Tsung-Ming; Chang, Kuan-Chang; Chu, Tian-Jian; Chen, Po-Hsun; Chen, Min-Chen; Sze, Simon M.

    2016-10-01

    In this study, an adjustable built-in resistor was observed on an indium-tin oxide (ITO)-capped resistance random access memory (RRAM) device, which has the potential to reduce operating power. Quite notably, the high-resistance state (HRS) current of the device decreased with decreasing current compliance, and a special situation, that is, a gradual change in current always appears and climbs slowly to reach the compliance current in the set process even when the compliance current decreases, was observed. Owing to this observed phenomenon, the device is regarded to be equipped with an adjustable built-in resistor, which has the potential for low-power device application.

  8. Towards scalable parellelism in Monte Carlo particle transport codes using remote memory access

    SciTech Connect

    Romano, Paul K; Brown, Forrest B; Forget, Benoit

    2010-01-01

    One forthcoming challenge in the area of high-performance computing is having the ability to run large-scale problems while coping with less memory per compute node. In this work, they investigate a novel data decomposition method that would allow Monte Carlo transport calculations to be performed on systems with limited memory per compute node. In this method, each compute node remotely retrieves a small set of geometry and cross-section data as needed and remotely accumulates local tallies when crossing the boundary of the local spatial domain. initial results demonstrate that while the method does allow large problems to be run in a memory-limited environment, achieving scalability may be difficult due to inefficiencies in the current implementation of RMA operations.

  9. The Aviation Careers Accessibility Program (ACAP) at Florida Memorial College. Final Report.

    ERIC Educational Resources Information Center

    Florida Memorial Coll., Miami.

    This project, referred to as the Aviation Careers Accessibility Program (ACAP) established a model program for inner-city minority high school students that would allow them information and accessibility to careers and opportunities in the aviation industry. The project featured two program components: an academic year component during and a 5- or…

  10. DIFMOS - A floating-gate electrically erasable nonvolatile semiconductor memory technology. [Dual Injector Floating-gate MOS

    NASA Technical Reports Server (NTRS)

    Gosney, W. M.

    1977-01-01

    Electrically alterable read-only memories (EAROM's) or reprogrammable read-only memories (RPROM's) can be fabricated using a single-level metal-gate p-channel MOS technology with all conventional processing steps. Given the acronym DIFMOS for dual-injector floating-gate MOS, this technology utilizes the floating-gate technique for nonvolatile storage of data. Avalanche injection of hot electrons through gate oxide from a special injector diode in each bit is used to charge the floating gates. A second injector structure included in each bit permits discharge of the floating gate by avalanche injection of holes through gate oxide. The overall design of the DIFMOS bit is dictated by the physical considerations required for each of the avalanche injector types. The end result is a circuit technology which can provide fully decoded bit-erasable EAROM-type circuits using conventional manufacturing techniques.

  11. Realization of a reversible switching in TaO{sub 2} polymorphs via Peierls distortion for resistance random access memory

    SciTech Connect

    Zhu, Linggang; Sun, Zhimei; Zhou, Jian; Guo, Zhonglu

    2015-03-02

    Transition-metal-oxide based resistance random access memory (RRAM) is a promising candidate for next-generation universal non-volatile memories. Searching and designing appropriate materials used in the memories becomes an urgent task. Here, a structure with the TaO{sub 2} formula was predicted using evolutionary algorithms in combination with first-principles calculations. This triclinic structure (T-TaO{sub 2}) is both energetically and dynamically more favorable than the commonly believed rutile structure (R-TaO{sub 2}). The metal-insulator transition (MIT) between metallic R-TaO{sub 2} and T-TaO{sub 2} (band gap: 1.0 eV) is via a Peierls distortion, which makes TaO{sub 2} a potential candidate for RRAM. The energy barrier for the reversible phase transition is 0.19 eV/atom and 0.23 eV/atom, respectively, suggesting low power consumption for the resistance switch. The present findings about the MIT as the resistance-switch mechanism in Ta-O system will stimulate experimental work to fabricate tantalum oxides based RRAM.

  12. Perpendicular spin transfer torque magnetic random access memories with high spin torque efficiency and thermal stability for embedded applications (invited)

    NASA Astrophysics Data System (ADS)

    Thomas, Luc; Jan, Guenole; Zhu, Jian; Liu, Huanlong; Lee, Yuan-Jen; Le, Son; Tong, Ru-Ying; Pi, Keyu; Wang, Yu-Jen; Shen, Dongna; He, Renren; Haq, Jesmin; Teng, Jeffrey; Lam, Vinh; Huang, Kenlin; Zhong, Tom; Torng, Terry; Wang, Po-Kang

    2014-05-01

    Magnetic random access memories based on the spin transfer torque phenomenon (STT-MRAMs) have become one of the leading candidates for next generation memory applications. Among the many attractive features of this technology are its potential for high speed and endurance, read signal margin, low power consumption, scalability, and non-volatility. In this paper, we discuss our recent results on perpendicular STT-MRAM stack designs that show STT efficiency higher than 5 kBT/μA, energy barriers higher than 100 kBT at room temperature for sub-40 nm diameter devices, and tunnel magnetoresistance higher than 150%. We use both single device data and results from 8 Mb array to demonstrate data retention sufficient for automotive applications. Moreover, we also demonstrate for the first time thermal stability up to 400 °C exceeding the requirement of Si CMOS back-end processing, thus opening the realm of non-volatile embedded memory to STT-MRAM technology.

  13. Uncorrelated multiple conductive filament nucleation and rupture in ultra-thin high-κ dielectric based resistive random access memory

    NASA Astrophysics Data System (ADS)

    Wu, Xing; Li, Kun; Raghavan, Nagarajan; Bosman, Michel; Wang, Qing-Xiao; Cha, Dongkyu; Zhang, Xi-Xiang; Pey, Kin-Leong

    2011-08-01

    Resistive switching in transition metal oxides could form the basis for next-generation non-volatile memory (NVM). It has been reported that the current in the high-conductivity state of several technologically relevant oxide materials flows through localized filaments, but these filaments have been characterized only individually, limiting our understanding of the possibility of multiple conductive filaments nucleation and rupture and the correlation kinetics of their evolution. In this study, direct visualization of uncorrelated multiple conductive filaments in ultra-thin HfO2-based high-κ dielectric resistive random access memory (RRAM) device has been achieved by high-resolution transmission electron microscopy (HRTEM), along with electron energy loss spectroscopy (EELS), for nanoscale chemical analysis. The locations of these multiple filaments are found to be spatially uncorrelated. The evolution of these microstructural changes and chemical properties of these filaments will provide a fundamental understanding of the switching mechanism for RRAM in thin oxide films and pave way for the investigation into improving the stability and scalability of switching memory devices.

  14. The role of the local chemical environment of Ag on the resistive switching mechanism of conductive bridging random access memories.

    PubMed

    Souchier, E; D'Acapito, F; Noé, P; Blaise, P; Bernard, M; Jousseaume, V

    2015-10-07

    Conductive bridging random access memories (CBRAMs) are one of the most promising emerging technologies for the next generation of non-volatile memory. However, the lack of understanding of the switching mechanism at the nanoscale level prevents successful transfer to industry. In this paper, Ag/GeSx/W CBRAM devices are analyzed using depth selective X-ray Absorption Spectroscopy before and after switching. The study of the local environment around Ag atoms in such devices reveals that Ag is in two very distinct environments with short Ag-S bonds due to Ag dissolved in the GeSx matrix, and longer Ag-Ag bonds related to an Ag metallic phase. These experiments allow the conclusion that the switching process involves the formation of metallic Ag nano-filaments initiated at the Ag electrode. All these experimental features are well supported by ab initio molecular dynamics simulations showing that Ag favorably bonds to S atoms, and permit the proposal of a model at the microscopic level that can explain the instability of the conductive state in these Ag-GeSx CBRAM devices. Finally, the principle of the nondestructive method described here can be extended to other types of resistive memory concepts.

  15. [Co/Ni]-CoFeB hybrid free layer stack materials for high density magnetic random access memory applications

    NASA Astrophysics Data System (ADS)

    Liu, E.; Swerts, J.; Couet, S.; Mertens, S.; Tomczak, Y.; Lin, T.; Spampinato, V.; Franquet, A.; Van Elshocht, S.; Kar, G.; Furnemont, A.; De Boeck, J.

    2016-03-01

    Alternative free layer materials with high perpendicular anisotropy are researched to provide spin-transfer-torque magnetic random access memory stacks' sufficient thermal stability at critical dimensions of 20 nm and below. We demonstrate a high tunnel magetoresistance (TMR) MgO-based magnetic tunnel junction stack with a hybrid free layer design made of a [Co/Ni] multilayer and CoFeB. The seed material on which the [Co/Ni] multilayer is deposited determines its switching characteristics. When deposited on a Pt seed layer, soft magnetic switching behavior with high squareness is obtained. When deposited on a NiCr seed, the perpendicular anisotropy remains high, but the squareness is low and coercivity exceeds 1000 Oe. Interdiffusion of the seed material with the [Co/Ni] multilayers is found to be responsible for the different switching characteristics. In optimized stacks, a TMR of 165% and low resistance-area (RA) product of 7.0 Ω μm2 are attained for free layers with an effective perpendicular magnetic anisotropy energy of 1.25 erg/cm2, which suggests that the hybrid free layer materials may be a viable candidate for high density magnetic random access memory applications.

  16. In situ observation of nickel as an oxidizable electrode material for the solid-electrolyte-based resistive random access memory

    SciTech Connect

    Sun, Jun; Wu, Xing; Xu, Feng; Xu, Tao; Sun, Litao; Liu, Qi; Xie, Hongwei; Long, Shibing; Lv, Hangbing; Li, Yingtao; Liu, Ming

    2013-02-04

    In this letter, we dynamically investigate the resistive switching characteristics and physical mechanism of the Ni/ZrO{sub 2}/Pt device. The device shows stable bipolar resistive switching behaviors after forming process, which is similar to the Ag/ZrO{sub 2}/Pt and Cu/ZrO{sub 2}/Pt devices. Using in situ transmission electron microscopy, we observe in real time that several conductive filaments are formed across the ZrO{sub 2} layer between Ni and Pt electrodes after forming. Energy-dispersive X-ray spectroscopy results confirm that Ni is the main composition of the conductive filaments. The ON-state resistance increases with increasing temperature, exhibiting the feature of metallic conduction. In addition, the calculated resistance temperature coefficient is equal to that of the 10-30 nm diameter Ni nanowire, further indicating that the nanoscale Ni conductive bridge is the physical origin of the observed conductive filaments. The resistive switching characteristics and the conductive filament's component of Ni/ZrO{sub 2}/Pt device are consistent with the characteristics of the typical solid-electrolyte-based resistive random access memory. Therefore, aside from Cu and Ag, Ni can also be used as an oxidizable electrode material for resistive random access memory applications.

  17. Respecting Relations: Memory Access and Antecedent Retrieval in Incremental Sentence Processing

    ERIC Educational Resources Information Center

    Kush, Dave W.

    2013-01-01

    This dissertation uses the processing of anaphoric relations to probe how linguistic information is encoded in and retrieved from memory during real-time sentence comprehension. More specifically, the dissertation attempts to resolve a tension between the demands of a linguistic processor implemented in a general-purpose cognitive architecture and…

  18. Hyperlink Format, Categorization Abilities and Memory Span as Contributors to Deaf Users Hypertext Access

    ERIC Educational Resources Information Center

    Farjardo, Inmaculada; Arfe, Barbara; Benedetti, Patrizia; Altoe, Gianmarco

    2008-01-01

    Sixty deaf and hearing students were asked to search for goods in a Hypertext Supermarket with either graphical or textual links of high typicality, frequency, and familiarity. Additionally, they performed a picture and word categorization task and two working memory span tasks (spatial and verbal). Results showed that deaf students were faster in…

  19. Memories.

    ERIC Educational Resources Information Center

    Brand, Judith, Ed.

    1998-01-01

    This theme issue of the journal "Exploring" covers the topic of "memories" and describes an exhibition at San Francisco's Exploratorium that ran from May 22, 1998 through January 1999 and that contained over 40 hands-on exhibits, demonstrations, artworks, images, sounds, smells, and tastes that demonstrated and depicted the biological,…

  20. Semiconductor heterostructure

    NASA Technical Reports Server (NTRS)

    Hovel, Harold John (Inventor); Woodall, Jerry MacPherson (Inventor)

    1978-01-01

    A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

  1. Semiconductor structure

    NASA Technical Reports Server (NTRS)

    Hovel, Harold J. (Inventor); Woodall, Jerry M. (Inventor)

    1979-01-01

    A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

  2. Cost-effective, transfer-free, flexible resistive random access memory using laser-scribed reduced graphene oxide patterning technology.

    PubMed

    Tian, He; Chen, Hong-Yu; Ren, Tian-Ling; Li, Cheng; Xue, Qing-Tang; Mohammad, Mohammad Ali; Wu, Can; Yang, Yi; Wong, H-S Philip

    2014-06-11

    Laser scribing is an attractive reduced graphene oxide (rGO) growth and patterning technology because the process is low-cost, time-efficient, transfer-free, and flexible. Various laser-scribed rGO (LSG) components such as capacitors, gas sensors, and strain sensors have been demonstrated. However, obstacles remain toward practical application of the technology where all the components of a system are fabricated using laser scribing. Memory components, if developed, will substantially broaden the application space of low-cost, flexible electronic systems. For the first time, a low-cost approach to fabricate resistive random access memory (ReRAM) using laser-scribed rGO as the bottom electrode is experimentally demonstrated. The one-step laser scribing technology allows transfer-free rGO synthesis directly on flexible substrates or non-flat substrates. Using this time-efficient laser-scribing technology, the patterning of a memory-array area up to 100 cm(2) can be completed in 25 min. Without requiring the photoresist coating for lithography, the surface of patterned rGO remains as clean as its pristine state. Ag/HfOx/LSG ReRAM using laser-scribing technology is fabricated in this work. Comprehensive electrical characteristics are presented including forming-free behavior, stable switching, reasonable reliability performance and potential for 2-bit storage per memory cell. The results suggest that laser-scribing technology can potentially produce more cost-effective and time-effective rGO-based circuits and systems for practical applications.

  3. Accessibility

    EPA Pesticide Factsheets

    Federal laws, including Section 508 of the Rehabilitation Act, mandate that people with disabilities have access to the same information that someone without a disability would have. 508 standards cover electronic and information technology (EIT) products.

  4. An energy-efficient SIMD DSP with multiple VLIW configurations and an advanced memory access unit for LTE-A modem LSIs

    NASA Astrophysics Data System (ADS)

    Tomono, Mitsuru; Ito, Makiko; Nomura, Yoshitaka; Mouri, Makoto; Hirose, Yoshio

    2015-12-01

    Energy efficiency is the most important factor in the design of wireless modem LSIs for mobile handset systems. We have developed an energy-efficient SIMD DSP for LTE-A modem LSIs. Our DSP has mainly two hardware features in order to reduce energy consumption. The first one is multiple VLIW configurations to minimize accesses to instruction memories. The second one is an advanced memory access unit to realize complex memory accesses required for wireless baseband processing. With these features, performance of our DSP is about 1.7 times faster than a base DSP on average for standard LTE-A Libraries. Our DSP achieves about 20% improvement in energy efficiency compared to a base DSP for LTE-A modem LSIs.

  5. Resistive Switching of Plasma–Treated Zinc Oxide Nanowires for Resistive Random Access Memory

    PubMed Central

    Lai, Yunfeng; Qiu, Wenbiao; Zeng, Zecun; Cheng, Shuying; Yu, Jinling; Zheng, Qiao

    2016-01-01

    ZnO nanowires (NWs) were grown on Si(100) substrates at 975 °C by a vapor-liquid-solid method with ~2 nm and ~4 nm gold thin films as catalysts, followed by an argon plasma treatment for the as-grown ZnO NWs. A single ZnO NW–based memory cell with a Ti/ZnO/Ti structure was then fabricated to investigate the effects of plasma treatment on the resistive switching. The plasma treatment improves the homogeneity and reproducibility of the resistive switching of the ZnO NWs, and it also reduces the switching (set and reset) voltages with less fluctuations, which would be associated with the increased density of oxygen vacancies to facilitate the resistive switching as well as to average out the stochastic movement of individual oxygen vacancies. Additionally, a single ZnO NW–based memory cell with self-rectification could also be obtained, if the inhomogeneous plasma treatment is applied to the two Ti/ZnO contacts. The plasma-induced oxygen vacancy disabling the rectification capability at one of the Ti/ZnO contacts is believed to be responsible for the self-rectification in the memory cell.

  6. On EMDR: eye movements during retrieval reduce subjective vividness and objective memory accessibility during future recall.

    PubMed

    van den Hout, Marcel A; Bartelski, Nicola; Engelhard, Iris M

    2013-01-01

    In eye movement desensitization and reprocessing (EMDR), a treatment for post-traumatic stress disorder (PTSD), patients make eye movements (EM) during trauma recall. Earlier experimental studies found that EM during recall reduces memory vividness during future recalls, and this was taken as laboratory support for the underlying mechanism of EMDR. However, reduced vividness was assessed with self-reports that may be affected by demand characteristics. We tested whether recall+EM also reduces memory vividness on a behavioural reaction time (RT) task. Undergraduates (N=32) encoded two pictures, recalled them, and rated their vividness. In the EM group, one of the pictures was recalled again while making EM. In the no-EM group one of the pictures was recalled without EM. Then fragments from both the recalled and non-recalled pictures, and new fragments were presented and participants rated whether these were (or were not) seen before. Both pictures were rated again for vividness. In the EM group, self-rated vividness of the recalled+EM picture decreased, relative to the non-recalled picture. In the no-EM group there was no difference between the recalled versus non-recalled picture. The RT task showed the same pattern. Reduction of memory vividness due to recall+EM is also evident from non-self-report data.

  7. Study of the relative performance of silicon and germanium nanoparticles embedded gate oxide in metal-oxide-semiconductor memory devices

    NASA Astrophysics Data System (ADS)

    Chakraborty, G.; Sengupta, A.; Requejo, F. G.; Sarkar, C. K.

    2011-03-01

    In the present work, we have investigated a comparative performance of the silicon (Si) and germanium (Ge) nanoparticles embedded SiO2 floating gate MOS memory devices. In such devices for low applied fields, the tunneling current is dominated by the direct tunneling mechanism, whereas for higher electric fields, the Fowler-Nordheim tunneling mechanism dominates. As the device dimensions get smaller, problem arises in the conventional MOS memory devices due to the leakage through the thin tunnel oxide. This leakage can be reduced via charge trapping by embedding nanoparticles in the gate dielectric of such devices. Here one objective is to prevent the leakage due to the direct tunneling mechanism and the other objective is to reduce the write voltage, by lowering the onset voltage of the Fowler-Nordheim tunneling mechanism. Our simulations for the current voltage characteristics covered both the low and the high applied field regions. Simulations showed that both the Si and the Ge nanoparticles embedded gate dielectrics offer reduction of the leakage current and a significant lowering of the writing or programming onset voltage, compared to the pure SiO2 gate dielectric. In terms of the comparative performance, the Germanium nanoparticles embedded gate dielectric showed better results compared to the silicon nanoparticles embedded one. The results of the simulations are discussed in the light of recent experimental results.

  8. Experimental Study of Floating-Gate-Type Metal-Oxide-Semiconductor Capacitors with Nanosize Triangular Cross-Sectional Tunnel Areas for Low Operating Voltage Flash Memory Application

    NASA Astrophysics Data System (ADS)

    Liu, Yongxun; Guo, Ruofeng; Kamei, Takahiro; Matsukawa, Takashi; Endo, Kazuhiko; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Ishikawa, Yuki; Hayashida, Tetsuro; Sakamoto, Kunihiro; Ogura, Atsushi; Masahara, Meishoku

    2012-06-01

    The floating-gate (FG)-type metal-oxide-semiconductor (MOS) capacitors with planar (planar-MOS) and three-dimensional (3D) nanosize triangular cross-sectional tunnel areas (3D-MOS) have successfully been fabricated by introducing rapid thermal oxidation (RTO) and postdeposition annealing (PDA), and their electrical characteristics between the control gate (CG) and FG have been systematically compared. It was experimentally found in both planar- and 3D-MOS capacitors that the uniform and higher breakdown voltages are obtained by introducing RTO owing to the high-quality thermal oxide formation on the surface and etched edge regions of the n+ polycrystalline silicon (poly-Si) FG, and the leakage current is highly suppressed after PDA owing to the improved quality of the tetraethylorthosilicate (TEOS) silicon dioxide (SiO2) between CG and FG. Moreover, a lower breakdown voltage between CG and FG was obtained in the fabricated 3D-MOS capacitors as compared with that of planar-MOS capacitors thanks to the enhanced local electric field at the tips of triangular tunnel areas. The developed nanosize triangular cross-sectional tunnel area is useful for the fabrication of low operating voltage flash memories.

  9. An Account of Performance in Accessing Information Stored in Long-Term Memory. A Fixed-Links Model Approach

    ERIC Educational Resources Information Center

    Altmeyer, Michael; Schweizer, Karl; Reiss, Siegbert; Ren, Xuezhu; Schreiner, Michael

    2013-01-01

    Performance in working memory and short-term memory tasks was employed for predicting performance in a long-term memory task in order to find out about the underlying processes. The types of memory were represented by versions of the Posner Task, the Backward Counting Task and the Sternberg Task serving as measures of long-term memory, working…

  10. A Symptom-Focused Hypnotic Approach to Accessing and Processing Previously Repressed/Dissociated Memories.

    ERIC Educational Resources Information Center

    Ratican, Kathleen L.

    1996-01-01

    The kinesthetic track back technique accesses the origins of current symptoms and may uncover previously repressed/dissociated material, if such material exists in the client's unconscious mind, is relevant to the symptoms, and is ready to be processed consciously. Case examples are given to illustrate proper use of this technique. (LSR)

  11. Improving Memory after Interruption: Exploiting Soft Constraints and Manipulating Information Access Cost

    ERIC Educational Resources Information Center

    Morgan, Phillip L.; Patrick, John; Waldron, Samuel M.; King, Sophia L.; Patrick, Tanya

    2009-01-01

    Forgetting what one was doing prior to interruption is an everyday problem. The recent soft constraints hypothesis (Gray, Sims, Fu, & Schoelles, 2006) emphasizes the strategic adaptation of information processing strategy to the task environment. It predicts that increasing information access cost (IAC: the time, and physical and mental effort…

  12. Source-Bias Dependent Charge Accumulation in P+-Poly Gate SOI Dynamic Random Access Memory Cell Transistors

    NASA Astrophysics Data System (ADS)

    Sim, Jai-hoon; Kim, Kinam

    1998-03-01

    In this paper, we report the dynamic data retention problems caused by the transient leakage current in a cell transistor during the bit-line pull down operation in p+-poly gate fully depleted silicon-on-insulator (FD-SOI) dynamic random access memories (DRAMs) due to the source-induced charge accumulation (SICA) effect in the silicon thin film. Due to the inherent floating body effect in the FD-SOI transistor, charge accumulation in the silicon thin film becomes inevitable when the gate-to-source voltage (VGS) is smaller than the flat-band voltage (VFB). In order to eliminate the transient leakage current problem in p+-poly gate FD-SOI cell transistor, the ground-precharged bit-line (GPB) sensing method is introduced.

  13. Glprof: A Gprof inspired, Callgraph-oriented Per-Object Disseminating Memory Access Multi-Cache Profiler

    SciTech Connect

    Janjusic, Tommy; Kartsaklis, Christos

    2015-01-01

    Application analysis is facilitated through a number of program profiling tools. The tools vary in their complexity, ease of deployment, design, and profiling detail. Specifically, understand- ing, analyzing, and optimizing is of particular importance for scientific applications where minor changes in code paths and data-structure layout can have profound effects. Understanding how intricate data-structures are accessed and how a given memory system responds is a complex task. In this paper we describe a trace profiling tool, Glprof, specifically aimed to lessen the burden of the programmer to pin-point heavily involved data-structures during an application's run-time, and understand data-structure run-time usage. Moreover, we showcase the tool's modularity using additional cache simulation components. We elaborate on the tool's design, and features. Finally we demonstrate the application of our tool in the context of Spec bench- marks using the Glprof profiler and two concurrently running cache simulators, PPC440 and AMD Interlagos.

  14. Improved characteristics of amorphous indium-gallium-zinc-oxide-based resistive random access memory using hydrogen post-annealing

    NASA Astrophysics Data System (ADS)

    Kang, Dae Yun; Lee, Tae-Ho; Kim, Tae Geun

    2016-08-01

    The authors report an improvement in resistive switching (RS) characteristics of amorphous indium-gallium-zinc-oxide (a-IGZO)-based resistive random access memory devices using hydrogen post-annealing. Because this a-IGZO thin film has oxygen off-stoichiometry in the form of deficient and excessive oxygen sites, the film properties can be improved by introducing hydrogen atoms through the annealing process. After hydrogen post-annealing, the device exhibited a stable bipolar RS, low-voltage set and reset operation, long retention (>105 s), good endurance (>106 cycles), and a narrow distribution in each current state. The effect of hydrogen post-annealing is also investigated by analyzing the sample surface using X-ray photon spectroscopy and atomic force microscopy.

  15. Fencing network direct memory access data transfers in a parallel active messaging interface of a parallel computer

    DOEpatents

    Blocksome, Michael A.; Mamidala, Amith R.

    2015-07-14

    Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to a deterministic data communications network through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and the deterministic data communications network; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

  16. Fencing network direct memory access data transfers in a parallel active messaging interface of a parallel computer

    DOEpatents

    Blocksome, Michael A.; Mamidala, Amith R.

    2015-07-07

    Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to a deterministic data communications network through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and the deterministic data communications network; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

  17. Observation of AlO x material in electrical resistive switching for nonvolatile random access memory application

    NASA Astrophysics Data System (ADS)

    Jung, Kyun-Ho; Song, Seung-Gon; Park, Kyoung-Wan; Sok, Jung-Hyun; Kim, Kyong-Min; Park, Yun-Sun

    2017-03-01

    We fabricated an Al / AlO x / Al device by using a RF magnetron sputter system. The device showed a unipolar resistive switching process. In this study, the switching mechanism of the device followed the conductive filament model. The conduction mechanisms for the conductive filament model were explained by using Ohmic conduction for the low resistance state (LRS) and Schottky emission for the high resistance state (HRS). The average value of the resistance ratio between the HRS and the LRS was about 3.48 × 107 when the reading voltage (0.1 V) was achieved. The electrical property of the endurance was achieved under 50 switching cycles. A low switching voltage could be obtained for a low power consuming device. These results proved that the AlO x material has various possibilities for use in nonvolatile random access memory applications.

  18. Comparison and statistical analysis of four write stability metrics in bulk CMOS static random access memory cells

    NASA Astrophysics Data System (ADS)

    Qiu, Hao; Mizutani, Tomoko; Saraya, Takuya; Hiramoto, Toshiro

    2015-04-01

    The commonly used four metrics for write stability were measured and compared based on the same set of 2048 (2k) six-transistor (6T) static random access memory (SRAM) cells by the 65 nm bulk technology. The preferred one should be effective for yield estimation and help predict edge of stability. Results have demonstrated that all metrics share the same worst SRAM cell. On the other hand, compared to butterfly curve with non-normality and write N-curve where no cell state flip happens, bit-line and word-line margins have good normality as well as almost perfect correlation. As a result, both bit line method and word line method prove themselves preferred write stability metrics.

  19. Thin Co/Ni-based bottom pinned spin-transfer torque magnetic random access memory stacks with high annealing tolerance

    NASA Astrophysics Data System (ADS)

    Tomczak, Y.; Swerts, J.; Mertens, S.; Lin, T.; Couet, S.; Liu, E.; Sankaran, K.; Pourtois, G.; Kim, W.; Souriau, L.; Van Elshocht, S.; Kar, G.; Furnemont, A.

    2016-01-01

    Spin-transfer torque magnetic random access memory (STT-MRAM) is considered as a replacement for next generation embedded and stand-alone memory applications. One of the main challenges in the STT-MRAM stack development is the compatibility of the stack with CMOS process flows in which thermal budgets up to 400 °C are applied. In this letter, we report on a perpendicularly magnetized MgO-based tunnel junction (p-MTJ) on a thin Co/Ni perpendicular synthetic antiferromagnetic layer with high annealing tolerance. Tunnel magneto resistance (TMR) loss after annealing occurs when the reference layer loses its perpendicular magnetic anisotropy due to reduction of the CoFeB/MgO interfacial anisotropy. A stable Co/Ni based p-MTJ stack with TMR values of 130% at resistance-area products of 9 Ω μm2 after 400 °C anneal is achieved via moment control of the Co/Ta/CoFeB reference layer. Thinning of the CoFeB polarizing layer down to 0.8 nm is the key enabler to achieve 400 °C compatibility with limited TMR loss. Thinning the Co below 0.6 nm leads to a loss of the antiferromagnetic interlayer exchange coupling strength through Ru. Insight into the thickness and moment engineering of the reference layer is displayed to obtain the best magnetic properties and high thermal stability for thin Co/Ni SAF-based STT-MRAM stacks.

  20. Impact of adolescent sucrose access on cognitive control, recognition memory, and parvalbumin immunoreactivity.

    PubMed

    Reichelt, Amy C; Killcross, Simon; Hambly, Luke D; Morris, Margaret J; Westbrook, R Fred

    2015-04-01

    In this study we sought to determine the effect of daily sucrose consumption in young rats on their subsequent performance in tasks that involve the prefrontal cortex and hippocampus. High levels of sugar consumption have been associated with the development of obesity, however less is known about how sugar consumption influences behavioral control and high-order cognitive processes. Of particular concern is the fact that sugar intake is greatest in adolescence, an important neurodevelopmental period. We provided sucrose to rats when they were progressing through puberty and adolescence. Cognitive performance was assessed in adulthood on a task related to executive function, a rodent analog of the Stroop task. We found that sucrose-exposed rats failed to show context-appropriate responding during incongruent stimulus compounds presented at test, indicative of impairments in prefrontal cortex function. Sucrose exposed rats also showed deficits in an on object-in-place recognition memory task, indicating that both prefrontal and hippocampal function was impaired. Analysis of brains showed a reduction in expression of parvalbumin-immunoreactive GABAergic interneurons in the hippocampus and prefrontal cortex, indicating that sucrose consumption during adolescence induced long-term pathology, potentially underpinning the cognitive deficits observed. These results suggest that consumption of high levels of sugar-sweetened beverages by adolescents may also impair neurocognitive functions affecting decision-making and memory, potentially rendering them at risk for developing mental health disorders.

  1. Temperature induced complementary switching in titanium oxide resistive random access memory

    NASA Astrophysics Data System (ADS)

    Panda, D.; Simanjuntak, F. M.; Tseng, T.-Y.

    2016-07-01

    On the way towards high memory density and computer performance, a considerable development in energy efficiency represents the foremost aspiration in future information technology. Complementary resistive switch consists of two antiserial resistive switching memory (RRAM) elements and allows for the construction of large passive crossbar arrays by solving the sneak path problem in combination with a drastic reduction of the power consumption. Here we present a titanium oxide based complementary RRAM (CRRAM) device with Pt top and TiN bottom electrode. A subsequent post metal annealing at 400°C induces CRRAM. Forming voltage of 4.3 V is required for this device to initiate switching process. The same device also exhibiting bipolar switching at lower compliance current, Ic <50 μA. The CRRAM device have high reliabilities. Formation of intermediate titanium oxi-nitride layer is confirmed from the cross-sectional HRTEM analysis. The origin of complementary switching mechanism have been discussed with AES, HRTEM analysis and schematic diagram. This paper provides valuable data along with analysis on the origin of CRRAM for the application in nanoscale devices.

  2. The structure-sensitivity of memory access: evidence from Mandarin Chinese

    PubMed Central

    Dillon, Brian; Chow, Wing-Yee; Wagers, Matthew; Guo, Taomei; Liu, Fengqin; Phillips, Colin

    2014-01-01

    The present study examined the processing of the Mandarin Chinese long-distance reflexive ziji to evaluate the role that syntactic structure plays in the memory retrieval operations that support sentence comprehension. Using the multiple-response speed-accuracy tradeoff (MR-SAT) paradigm, we measured the speed with which comprehenders retrieve an antecedent for ziji. Our experimental materials contrasted sentences where ziji's antecedent was in the local clause with sentences where ziji's antecedent was in a distant clause. Time course results from MR-SAT suggest that ziji dependencies with syntactically distant antecedents are slower to process than syntactically local dependencies. To aid in interpreting the SAT data, we present a formal model of the antecedent retrieval process, and derive quantitative predictions about the time course of antecedent retrieval. The modeling results support the Local Search hypothesis: during syntactic retrieval, comprehenders initially limit memory search to the local syntactic domain. We argue that Local Search hypothesis has important implications for theories of locality effects in sentence comprehension. In particular, our results suggest that not all locality effects may be reduced to the effects of temporal decay and retrieval interference. PMID:25309486

  3. The automatic visual simulation of words: A memory reactivated mask slows down conceptual access.

    PubMed

    Rey, Amandine E; Riou, Benoit; Vallet, Guillaume T; Versace, Rémy

    2017-03-01

    How do we represent the meaning of words? The present study assesses whether access to conceptual knowledge requires the reenactment of the sensory components of a concept. The reenactment-that is, simulation-was tested in a word categorisation task using an innovative masking paradigm. We hypothesised that a meaningless reactivated visual mask should interfere with the simulation of the visual dimension of concrete words. This assumption was tested in a paradigm in which participants were not aware of the link between the visual mask and the words to be processed. In the first phase, participants created a tone-visual mask or tone-control stimulus association. In the test phase, they categorised words that were presented with 1 of the tones. Results showed that words were processed more slowly when they were presented with the reactivated mask. This interference effect was only correlated with and explained by the value of the visual perceptual strength of the words (i.e., our experience with the visual dimensions associated with concepts) and not with other characteristics. We interpret these findings in terms of word access, which may involve the simulation of sensory features associated with the concept, even if participants were not explicitly required to access visual properties. (PsycINFO Database Record

  4. The role of the inserted layer in resistive random access memory device

    NASA Astrophysics Data System (ADS)

    Zhang, Dainan; Ma, Guokun; Zhang, Huaiwu; Tang, Xiaoli; Zhong, Zhiyong; Jie, Li; Su, Hua

    2016-07-01

    NiO resistive switching devices were fabricated by reactive DC magnetron sputtering at room temperature containing different inserted layers. From measurements, we demonstrated the filaments were made up by metal Co rather than the oxygen defect or other metal. A current jumping phenomenon in the SET process was observed, evidencing that the filament generating procedure was changed due to the inserted layers. In this process, we demonstrate the current jumping appeared in higher voltage region when the position of inserted layer was close to the bottom electrode. The I-V curves shifted to the positive direction as the thickness of inserted layer increasing. With the change of the number of inserted layers, SET voltages varied while the RESET voltage kept stable. According to the electrochemical metallization memory mechanism, detailed explanations on all the phenomena were addressed. This discovery is supposed of great potentials in the use of designing multi-layer RRAM devices.

  5. Characterization of Magnetic Tunnel Junctions For Spin Transfer Torque Magnetic Random Access Memory

    NASA Astrophysics Data System (ADS)

    Dill, Joshua Luchay

    This thesis details two experimental methods for quantifying magnetic tunnel junction behavior, namely write error rates and field modulated spin-torque ferromagnetic resonance. The former examines how reliably an applied spin-transfer torque can excite magnetization dynamics that lead to a reversal of magnetization direction while the latter studies steady state dynamics provided by an oscillating spin-transfer torque. These characterization techniques reveal write error rate behavior for a particular composition magnetic tunnel junction that qualitatively deviates from theoretical predictions. Possible origins of this phenomenon are also investigated with the field modulated spin-torque ferromagnetic resonance technique. By understanding the dynamics of magnetic moments predicted by theory, one can experimentally confirm or disprove these theories in order to accurately model and predict tunnel junction behavior. By having a better model for what factors are important in magnetization dynamics, one can optimize these factors in terms of improving magnetic tunnel junctions for their use as computer memory.

  6. Distribution of nanoscale nuclei in the amorphous dome of a phase change random access memory

    SciTech Connect

    Lee, Bong-Sub Darmawikarta, Kristof; Abelson, John R.; Raoux, Simone; Shih, Yen-Hao; Zhu, Yu

    2014-02-17

    The nanoscale crystal nuclei in an amorphous Ge{sub 2}Sb{sub 2}Te{sub 5} bit in a phase change memory device were evaluated by fluctuation transmission electron microscopy. The quench time in the device (∼10 ns) afforded more and larger nuclei in the melt-quenched state than in the as-deposited state. However, nuclei were even more numerous and larger in a test structure with a longer quench time (∼100 ns), verifying the prediction of nucleation theory that slower cooling produces more nuclei. It also demonstrates that the thermal design of devices will strongly influence the population of nuclei, and thus the speed and data retention characteristics.

  7. Hyperlink format, categorization abilities and memory span as contributors to deaf users hypertext access.

    PubMed

    Fajardo, Inmaculada; Farjardo, Inmaculada; Arfé, Barbara; Benedetti, Patrizia; Altoé, Gianmarco

    2008-01-01

    Sixty deaf and hearing students were asked to search for goods in a Hypertext Supermarket with either graphical or textual links of high typicality, frequency, and familiarity. Additionally, they performed a picture and word categorization task and two working memory span tasks (spatial and verbal). Results showed that deaf students were faster in graphical than in verbal hypertext when the number of visited pages per search trial was blocked. Regardless of stimuli format, accuracy differences between groups did not appear, although deaf students were slower than hearing students in both Web search and categorization tasks (graphical or verbal). No relation between the two tasks was found. Correlation analyses showed that deaf students with higher spatial span were faster in graphical Web search, but no correlations emerged between verbal span and verbal Web search. A hypothesis of different strategies used by the two groups for searching information in hypertext is formulated. It is suggested that deaf users use a visual-matching strategy more than a semantic approach to make navigation decisions.

  8. Thin Co/Ni-based bottom pinned spin-transfer torque magnetic random access memory stacks with high annealing tolerance

    SciTech Connect

    Tomczak, Y.; Swerts, J.; Mertens, S.; Lin, T.; Couet, S.; Sankaran, K.; Pourtois, G.; Kim, W.; Souriau, L.; Van Elshocht, S.; Kar, G.; Furnemont, A.; Liu, E.

    2016-01-25

    Spin-transfer torque magnetic random access memory (STT-MRAM) is considered as a replacement for next generation embedded and stand-alone memory applications. One of the main challenges in the STT-MRAM stack development is the compatibility of the stack with CMOS process flows in which thermal budgets up to 400 °C are applied. In this letter, we report on a perpendicularly magnetized MgO-based tunnel junction (p-MTJ) on a thin Co/Ni perpendicular synthetic antiferromagnetic layer with high annealing tolerance. Tunnel magneto resistance (TMR) loss after annealing occurs when the reference layer loses its perpendicular magnetic anisotropy due to reduction of the CoFeB/MgO interfacial anisotropy. A stable Co/Ni based p-MTJ stack with TMR values of 130% at resistance-area products of 9 Ω μm{sup 2} after 400 °C anneal is achieved via moment control of the Co/Ta/CoFeB reference layer. Thinning of the CoFeB polarizing layer down to 0.8 nm is the key enabler to achieve 400 °C compatibility with limited TMR loss. Thinning the Co below 0.6 nm leads to a loss of the antiferromagnetic interlayer exchange coupling strength through Ru. Insight into the thickness and moment engineering of the reference layer is displayed to obtain the best magnetic properties and high thermal stability for thin Co/Ni SAF-based STT-MRAM stacks.

  9. Calculation of energy-barrier lowering by incoherent switching in spin-transfer torque magnetoresistive random-access memory

    SciTech Connect

    Munira, Kamaram; Visscher, P. B.

    2015-05-07

    To make a useful spin-transfer torque magnetoresistive random-access memory (STT-MRAM) device, it is necessary to be able to calculate switching rates, which determine the error rates of the device. In a single-macrospin model, one can use a Fokker-Planck equation to obtain a low-current thermally activated rate ∝exp(−E{sub eff}/k{sub B}T). Here, the effective energy barrier E{sub eff} scales with the single-macrospin energy barrier KV, where K is the effective anisotropy energy density and V the volume. A long-standing paradox in this field is that the actual energy barrier appears to be much smaller than this. It has been suggested that incoherent motions may lower the barrier, but this has proved difficult to quantify. In the present paper, we show that the coherent precession has a magnetostatic instability, which allows quantitative estimation of the energy barrier and may resolve the paradox.

  10. Cu impurity in insulators and in metal-insulator-metal structures: Implications for resistance-switching random access memories

    SciTech Connect

    Pandey, Sumeet C. Meade, Roy; Sandhu, Gurtej S.

    2015-02-07

    We present numerical results from atomistic simulations of Cu in SiO{sub 2} and Al{sub 2}O{sub 3}, with an emphasis on the thermodynamic, kinetic, and electronic properties. The calculated properties of Cu impurity at various concentrations (9.91 × 10{sup 20 }cm{sup −3} and 3.41 × 10{sup 22 }cm{sup −3}) in bulk oxides are presented. The metal-insulator interfaces result in up to a ∼4 eV reduction in the formation energies relative to the crystalline bulk. Additionally, the importance of Cu-Cu interaction in lowering the chemical potential is introduced. These concepts are then discussed in the context of formation and stability of localized conductive paths in resistance-switching Random Access Memories (RRAM-M). The electronic density of states and non-equilibrium transmission through these localized paths are studied, confirming conduction by showing three orders of magnitude increase in the electron transmission. The dynamic behavior of the conductive paths is investigated with atomistic drift-diffusion calculations. Finally, the paper concludes with a molecular dynamics simulation of a RRAM-M cell that attempts to combine the aforementioned phenomena in one self-consistent model.

  11. Cu impurity in insulators and in metal-insulator-metal structures: Implications for resistance-switching random access memories

    NASA Astrophysics Data System (ADS)

    Pandey, Sumeet C.; Meade, Roy; Sandhu, Gurtej S.

    2015-02-01

    We present numerical results from atomistic simulations of Cu in SiO2 and Al2O3, with an emphasis on the thermodynamic, kinetic, and electronic properties. The calculated properties of Cu impurity at various concentrations (9.91 × 1020 cm-3 and 3.41 × 1022 cm-3) in bulk oxides are presented. The metal-insulator interfaces result in up to a ˜4 eV reduction in the formation energies relative to the crystalline bulk. Additionally, the importance of Cu-Cu interaction in lowering the chemical potential is introduced. These concepts are then discussed in the context of formation and stability of localized conductive paths in resistance-switching Random Access Memories (RRAM-M). The electronic density of states and non-equilibrium transmission through these localized paths are studied, confirming conduction by showing three orders of magnitude increase in the electron transmission. The dynamic behavior of the conductive paths is investigated with atomistic drift-diffusion calculations. Finally, the paper concludes with a molecular dynamics simulation of a RRAM-M cell that attempts to combine the aforementioned phenomena in one self-consistent model.

  12. Switching characteristics in Cu:SiO2 by chemical soak methods for resistive random access memory (ReRAM)

    NASA Astrophysics Data System (ADS)

    Chin, Fun-Tat; Lin, Yu-Hsien; Yang, Wen-Luh; Liao, Chin-Hsuan; Lin, Li-Min; Hsiao, Yu-Ping; Chao, Tien-Sheng

    2015-01-01

    A limited copper (Cu)-source Cu:SiO2 switching layer composed of various Cu concentrations was fabricated using a chemical soaking (CS) technique. The switching layer was then studied for developing applications in resistive random access memory (ReRAM) devices. Observing the resistive switching mechanism exhibited by all the samples suggested that Cu conductive filaments formed and ruptured during the set/reset process. The experimental results indicated that the endurance property failure that occurred was related to the joule heating effect. Moreover, the endurance switching cycle increased as the Cu concentration decreased. In high-temperature tests, the samples demonstrated that the operating (set/reset) voltages decreased as the temperature increased, and an Arrhenius plot was used to calculate the activation energy of the set/reset process. In addition, the samples demonstrated stable data retention properties when baked at 85 °C, but the samples with low Cu concentrations exhibited short retention times in the low-resistance state (LRS) during 125 °C tests. Therefore, Cu concentration is a crucial factor in the trade-off between the endurance and retention properties; furthermore, the Cu concentration can be easily modulated using this CS technique.

  13. Energetics of intrinsic defects in NiO and the consequences for its resistive random access memory performance

    SciTech Connect

    Dawson, J. A. Guo, Y.; Robertson, J.

    2015-09-21

    Energetics for a variety of intrinsic defects in NiO are calculated using state-of-the-art ab initio hybrid density functional theory calculations. At the O-rich limit, Ni vacancies are the lowest cost defect for all Fermi energies within the gap, in agreement with the well-known p-type behaviour of NiO. However, the ability of the metal electrode in a resistive random access memory metal-oxide-metal setup to shift the oxygen chemical potential towards the O-poor limit results in unusual NiO behaviour and O vacancies dominating at lower Fermi energy levels. Calculated band diagrams show that O vacancies in NiO are positively charged at the operating Fermi energy giving it the advantage of not requiring a scavenger metal layer to maximise drift. Ni and O interstitials are generally found to be higher in energy than the respective vacancies suggesting that significant recombination of O vacancies and interstitials does not take place as proposed in some models of switching behaviour.

  14. Defect-tolerant architectures for nanoelectronic crossbar memories.

    PubMed

    Strukov, Dmitri B; Likharev, Konstantin K

    2007-01-01

    We have calculated the maximum useful bit density that may be achieved by the synergy of bad bit exclusion and advanced (BCH) error correcting codes in prospective crossbar nanoelectronic memories, as a function of defective memory cell fraction. While our calculations are based on a particular ("CMOL") memory topology, with naturally segmented nanowires and an area-distributed nano/CMOS interface, for realistic parameters our results are also applicable to "global" crossbar memories with peripheral interfaces. The results indicate that the crossbar memories with a nano/CMOS pitch ratio close to 1/3 (which is typical for the current, initial stage of the nanoelectronics development) may overcome purely semiconductor memories in useful bit density if the fraction of nanodevice defects (stuck-on-faults) is below approximately 15%, even under rather tough, 30 ns upper bound on the total access time. Moreover, as the technology matures, and the pitch ratio approaches an order of magnitude, the crossbar memories may be far superior to the densest semiconductor memories by providing, e.g., a 1 Tbit/cm2 density even for a plausible defect fraction of 2%. These highly encouraging results are much better than those reported in literature earlier, including our own early work, mostly due to more advanced error correcting codes.

  15. Optical memory

    DOEpatents

    Mao, Samuel S; Zhang, Yanfeng

    2013-07-02

    Optical memory comprising: a semiconductor wire, a first electrode, a second electrode, a light source, a means for producing a first voltage at the first electrode, a means for producing a second voltage at the second electrode, and a means for determining the presence of an electrical voltage across the first electrode and the second electrode exceeding a predefined voltage. The first voltage, preferably less than 0 volts, different from said second voltage. The semiconductor wire is optically transparent and has a bandgap less than the energy produced by the light source. The light source is optically connected to the semiconductor wire. The first electrode and the second electrode are electrically insulated from each other and said semiconductor wire.

  16. Total ionizing dose effect of γ-ray radiation on the switching characteristics and filament stability of HfOx resistive random access memory

    SciTech Connect

    Fang, Runchen; Yu, Shimeng; Gonzalez Velo, Yago; Chen, Wenhao; Holbert, Keith E.; Kozicki, Michael N.; Barnaby, Hugh

    2014-05-05

    The total ionizing dose (TID) effect of gamma-ray (γ-ray) irradiation on HfOx based resistive random access memory was investigated by electrical and material characterizations. The memory states can sustain TID level ∼5.2 Mrad (HfO{sub 2}) without significant change in the functionality or the switching characteristics under pulse cycling. However, the stability of the filament is weakened after irradiation as memory states are more vulnerable to flipping under the electrical stress. X-ray photoelectron spectroscopy was performed to ascertain the physical mechanism of the stability degradation, which is attributed to the Hf-O bond breaking by the high-energy γ-ray exposure.

  17. Fabrication and properties of nanoscale multiferroic heterostructures for application in magneto-electric random access memory (MERAM) devices

    NASA Astrophysics Data System (ADS)

    Kim, Gunwoo

    Magnetoelectric random access memory (MERAM) has emerged as a promising new class of non-volatile solid-state memory device. It offers nondestructive reading along with low power consumption during the write operation. A common implementation of MERAM involves use of multiferroic tunneling junctions (MFTJs), which besides offering non-volatility are both electrically and magnetically tunable. Fundamentally, a MFTJ consists of a heterostructure of an ultrathin multiferroic or ferroelectric material as the active tunneling barrier sandwiched between ferromagnetic electrodes. Thereby, the MFTJ exhibits both tunnel electroresistance (TER) and tunnel magnetoresistance (TMR) effects with application of an electric and magnetic field, respectively. In this thesis work, we have developed two-dimensional (2D) thin-film multiferroic heterostructure METJ prototypes consisting of ultrathin ferroelectric BaTiO3 (BTO) layer and a conducting ferromagnetic La0.67Sr 0.33MnO3 (LSMO) electrode. The heteroepitaxial films are grown using the pulsed laser deposition (PLD) technique. This oxide heterostructure offers the opportunity to study the nano-scale details of the tunnel electroresistance (TER) effect using scanning probe microscopy techniques. We performed the measurements using the MFP-3D (Asylum Research) scanning probe microscope. The ultrathin BTO films (1.2-2.0 nm) grown on LSMO electrodes display both ferro- and piezo-electric properties and exhibit large tunnel resistance effect. We have explored the growth and properties of one-dimensional (1D) heterostructures, referred to as multiferoric nanowire (NW) heterostructures. The ferromagnetic/ferroelectric composite heterostructures are grown as sheath layers using PLD on lattice-matched template NWs, e.g. MgO, that are deposited by chemical vapor deposition utilizing the vapor-liquid-solid (VLS) mechanism. The one-dimensional geometry can substantially overcome the clamping effect of the substrate present in two

  18. Atomic Layer Deposited Oxide-Based Nanocomposite Structures with Embedded CoPtx Nanocrystals for Resistive Random Access Memory Applications.

    PubMed

    Wang, Lai-Guo; Cao, Zheng-Yi; Qian, Xu; Zhu, Lin; Cui, Da-Peng; Li, Ai-Dong; Wu, Di

    2017-02-22

    Al2O3- or HfO2-based nanocomposite structures with embedded CoPtx nanocrystals (NCs) on TiN-coated Si substrates have been prepared by combination of thermal atomic layer deposition (ALD) and plasma-enhanced ALD for resistive random access memory (RRAM) applications. The impact of CoPtx NCs and their average size/density on the resistive switching properties has been explored. Compared to the control sample without CoPtx NCs, ALD-derived Pt/oxide/100 cycle-CoPtx NCs/TiN/SiO2/Si exhibits a typical bipolar, reliable, and reproducible resistive switching behavior, such as sharp distribution of RRAM parameters, smaller set/reset voltages, stable resistance ratio (≥10(2)) of OFF/ON states, better switching endurance up to 10(4) cycles, and longer data retention over 10(5) s. The possible resistive switching mechanism based on nanocomposite structures of oxide/CoPtx NCs has been proposed. The dominant conduction mechanisms in low- and high-resistance states of oxide-based device units with embedded CoPtx NCs are Ohmic behavior and space-charge-limited current, respectively. The insertion of CoPtx NCs can effectively improve the formation of conducting filaments due to the CoPtx NC-enhanced electric field intensity. Besides excellent resistive switching performances, the nanocomposite structures also simultaneously present ferromagnetic property. This work provides a flexible pathway by combining PEALD and TALD compatible with state-of-the-art Si-based technology for multifunctional electronic devices applications containing RRAM.

  19. High-Speed GaAs MESFET Memory Study.

    DTIC Science & Technology

    1981-07-01

    ne .. ’ a-d Id,devt h ,, 1 nu-.4511) Semiconductor Memory Enhancement-Mode MESFET Random Access Memory (RAM) GaAs Integrated Circuits (ICs) 4aAs...differential is reached. Figure 2-5 is a differential amplifier with a gain of %20 ( determined bv the gm.R 0 product of the FETs). This circuit has been...Write Mode Figure 2-9 shows the circuit that was Simulated to determine the transient write-mode reset response. The capacitors CB and CBB (0.2 pF each

  20. Memory protection

    NASA Technical Reports Server (NTRS)

    Denning, Peter J.

    1988-01-01

    Accidental overwriting of files or of memory regions belonging to other programs, browsing of personal files by superusers, Trojan horses, and viruses are examples of breakdowns in workstations and personal computers that would be significantly reduced by memory protection. Memory protection is the capability of an operating system and supporting hardware to delimit segments of memory, to control whether segments can be read from or written into, and to confine accesses of a program to its segments alone. The absence of memory protection in many operating systems today is the result of a bias toward a narrow definition of performance as maximum instruction-execution rate. A broader definition, including the time to get the job done, makes clear that cost of recovery from memory interference errors reduces expected performance. The mechanisms of memory protection are well understood, powerful, efficient, and elegant. They add to performance in the broad sense without reducing instruction execution rate.

  1. Detrimental effect of interfacial Dzyaloshinskii-Moriya interaction on perpendicular spin-transfer-torque magnetic random access memory

    SciTech Connect

    Jang, Peong-Hwa; Lee, Seo-Won E-mail: kj-lee@korea.ac.kr; Song, Kyungmi; Lee, Seung-Jae; Lee, Kyung-Jin E-mail: kj-lee@korea.ac.kr

    2015-11-16

    Interfacial Dzyaloshinskii-Moriya interaction in ferromagnet/heavy metal bilayers is recently of considerable interest as it offers an efficient control of domain walls and the stabilization of magnetic skyrmions. However, its effect on the performance of perpendicular spin transfer torque memory has not been explored yet. We show based on numerical studies that the interfacial Dzyaloshinskii-Moriya interaction decreases the thermal energy barrier while increases the switching current. As high thermal energy barrier as well as low switching current is required for the commercialization of spin torque memory, our results suggest that the interfacial Dzyaloshinskii-Moriya interaction should be minimized for spin torque memory applications.

  2. A simple device unit consisting of all NiO storage and switch elements for multilevel terabit nonvolatile random access memory.

    PubMed

    Lee, Myoung-Jae; Ahn, Seung-Eon; Lee, Chang Bum; Kim, Chang-Jung; Jeon, Sanghun; Chung, U-In; Yoo, In-Kyeong; Park, Gyeong-Su; Han, Seungwu; Hwang, In Rok; Park, Bae-Ho

    2011-11-01

    Present charge-based silicon memories are unlikely to reach terabit densities because of scaling limits. As the feature size of memory shrinks to just tens of nanometers, there is insufficient volume available to store charge. Also, process temperatures higher than 800 °C make silicon incompatible with three-dimensional (3D) stacking structures. Here we present a device unit consisting of all NiO storage and switch elements for multilevel terabit nonvolatile random access memory using resistance switching. It is demonstrated that NiO films are scalable to around 30 nm and compatible with multilevel cell technology. The device unit can be a building block for 3D stacking structure because of its simple structure and constituent, high performance, and process temperature lower than 300 °C. Memory resistance switching of NiO storage element is accompanied by an increase in density of grain boundary while threshold resistance switching of NiO switch element is controlled by current flowing through NiO film.

  3. Semiconductor detectors in nuclear and particle physics

    SciTech Connect

    Rehak, P.; Gatti, E.

    1992-12-31

    Semiconductor detectors for elementary particle physics and nuclear physics in the energy range above 1 GeV are briefly reviewed. In these two fields semiconductor detectors are used mainly for the precise position sensing. In a typical experiment, the position of a fast charged particle crossing a relatively thin semiconductor detector is measured. The position resolution achievable by semiconductor detectors is compared with the resolution achievable by gas filled position sensing detectors. Semiconductor detectors are divided into two groups: Classical semiconductor diode detectors and semiconductor memory detectors. Principles of the signal formation and the signal read-out for both groups of detectors are described. New developments of silicon detectors of both groups are reported.

  4. Quantifying data retention of perpendicular spin-transfer-torque magnetic random access memory chips using an effective thermal stability factor method

    SciTech Connect

    Thomas, Luc Jan, Guenole; Le, Son; Wang, Po-Kang

    2015-04-20

    The thermal stability of perpendicular Spin-Transfer-Torque Magnetic Random Access Memory (STT-MRAM) devices is investigated at chip level. Experimental data are analyzed in the framework of the Néel-Brown model including distributions of the thermal stability factor Δ. We show that in the low error rate regime important for applications, the effect of distributions of Δ can be described by a single quantity, the effective thermal stability factor Δ{sub eff}, which encompasses both the median and the standard deviation of the distributions. Data retention of memory chips can be assessed accurately by measuring Δ{sub eff} as a function of device diameter and temperature. We apply this method to show that 54 nm devices based on our perpendicular STT-MRAM design meet our 10 year data retention target up to 120 °C.

  5. Investigation of thermal resistance and power consumption in Ga-doped indium oxide (In{sub 2}O{sub 3}) nanowire phase change random access memory

    SciTech Connect

    Jin, Bo; Lee, Jeong-Soo E-mail: ljs6951@postech.ac.kr; Lim, Taekyung; Ju, Sanghyun; Latypov, Marat I.; Pi, Dong-Hai; Seop Kim, Hyoung; Meyyappan, M. E-mail: ljs6951@postech.ac.kr

    2014-03-10

    The resistance stability and thermal resistance of phase change memory devices using ∼40 nm diameter Ga-doped In{sub 2}O{sub 3} nanowires (Ga:In{sub 2}O{sub 3} NW) with different Ga-doping concentrations have been investigated. The estimated resistance stability (R(t)/R{sub 0} ratio) improves with higher Ga concentration and is dependent on annealing temperature. The extracted thermal resistance (R{sub th}) increases with higher Ga-concentration and thus the power consumption can be reduced by ∼90% for the 11.5% Ga:In{sub 2}O{sub 3} NW, compared to the 2.1% Ga:In{sub 2}O{sub 3} NW. The excellent characteristics of Ga-doped In{sub 2}O{sub 3} nanowire devices offer an avenue to develop low power and reliable phase change random access memory applications.

  6. Recent progress in III-V based ferromagnetic semiconductors: Band structure, Fermi level, and tunneling transport

    SciTech Connect

    Tanaka, Masaaki; Ohya, Shinobu Nam Hai, Pham

    2014-03-15

    Spin-based electronics or spintronics is an emerging field, in which we try to utilize spin degrees of freedom as well as charge transport in materials and devices. While metal-based spin-devices, such as magnetic-field sensors and magnetoresistive random access memory using giant magnetoresistance and tunneling magnetoresistance, are already put to practical use, semiconductor-based spintronics has greater potential for expansion because of good compatibility with existing semiconductor technology. Many semiconductor-based spintronics devices with useful functionalities have been proposed and explored so far. To realize those devices and functionalities, we definitely need appropriate materials which have both the properties of semiconductors and ferromagnets. Ferromagnetic semiconductors (FMSs), which are alloy semiconductors containing magnetic atoms such as Mn and Fe, are one of the most promising classes of materials for this purpose and thus have been intensively studied for the past two decades. Here, we review the recent progress in the studies of the most prototypical III-V based FMS, p-type (GaMn)As and its heterostructures with focus on tunneling transport, Fermi level, and bandstructure. Furthermore, we cover the properties of a new n-type FMS, (In,Fe)As, which shows electron-induced ferromagnetism. These FMS materials having zinc-blende crystal structure show excellent compatibility with well-developed III-V heterostructures and devices.

  7. The Memory Metal Minimal Access Cage: A New Concept in Lumbar Interbody Fusion—A Prospective, Noncomparative Study to Evaluate the Safety and Performance

    PubMed Central

    Kok, D.; Donk, R. D.; Wapstra, F. H.; Veldhuizen, A. G.

    2012-01-01

    Study Design/Objective. A single-centre, prospective, non-comparative study of 25 patients to evaluate the performance and safety of the Memory Metal Minimal Access Cage (MAC) in Lumbar Interbody Fusion. Summary of Background Data. Interbody fusion cages in general are designed to withstand high axial loads and in the meantime to allow ingrowth of new bone for bony fusion. In many cages the contact area with the endplate is rather large leaving a relatively small contact area for the bone graft with the adjacent host bone. MAC is constructed from the memory metal Nitinol and builds on the concept of sufficient axial support in combination with a large contact area of the graft facilitating bony ingrowth and ease in minimal access implantation due to its high deformability. Methods. Twenty five subjects with a primary diagnosis of disabling back and radicular leg pain from a single level degenerative lumbar disc underwent an interbody fusion using MAC and pedicle screws. Clinical performance was evaluated prospectively over 2 years using the Oswestry Disability Index (ODI), Short Form 36 questionnaire (SF-36) and pain visual analogue scale (VAS) scores. The interbody fusion status was assessed using conventional radiographs and CT scan. Safety of the device was studied by registration of intra- and post-operative adverse effects. Results. Clinical performance improved significantly (P < .0018), CT scan confirmed solid fusion in all 25 patients at two year follow-up. In two patients migration of the cage occurred, which was resolved uneventfully by placing a larger size at the subsequent revision. Conclusions. We conclude that the Memory Metal Minimal Access Cage (MAC) resulted in 100% solid fusions in 2 years and proved to be safe, although two patients required revision surgery in order to achieve solid fusion. PMID:22567409

  8. Memory characteristics of metal-oxide-semiconductor structures based on Ge nanoclusters-embedded GeO(x) films grown at low temperature.

    PubMed

    Lin, Tzu-Shun; Lou, Li-Ren; Lee, Ching-Ting; Tsai, Tai-Cheng

    2012-03-01

    The memory devices constructed from the Ge-nanoclusters embedded GeO(x) layer deposited by the laser-assisted chemical vapor deposition (LACVD) system were fabricated. The Ge nanoclusters were observed by a high-resolution transmission electron microscopy. Using the capacitance versus voltage (C-V) and the conductance versus voltage (G-V) characteristics measured under various frequencies, the memory effect observed in the C-V curves was dominantly attributed to the charge storage in the Ge nanoclusters. Furthermore, the defects existed in the deposited film and the interface states were insignificant to the memory performances. Capacitance versus time (C-t) measurement was also executed to evaluate the charge retention characteristics. The charge storage and retention behaviors of the devices demonstrated that the Ge nanoclusters grown by the LACVD system at low temperature are promising for memory device applications.

  9. 39% access time improvement, 11% energy reduction, 32 kbit 1-read/1-write 2-port static random-access memory using two-stage read boost and write-boost after read sensing scheme

    NASA Astrophysics Data System (ADS)

    Yamamoto, Yasue; Moriwaki, Shinichi; Kawasumi, Atsushi; Miyano, Shinji; Shinohara, Hirofumi

    2016-04-01

    We propose novel circuit techniques for 1 clock (1CLK) 1 read/1 write (1R/1W) 2-port static random-access memories (SRAMs) to improve read access time (tAC) and write margins at low voltages. Two-stage read boost (TSR-BST) and write word line boost (WWL-BST) after the read sensing schemes have been proposed. TSR-BST reduces the worst read bit line (RBL) delay by 61% and RBL amplitude by 10% at V DD = 0.5 V, which improves tAC by 39% and reduces energy dissipation by 11% at V DD = 0.55 V. WWL-BST after read sensing scheme improves minimum operating voltage (V min) by 140 mV. A 32 kbit 1CLK 1R/1W 2-port SRAM with TSR-BST and WWL-BST has been developed using a 40 nm CMOS.

  10. Semiconductor sensors

    NASA Technical Reports Server (NTRS)

    Gatos, Harry C. (Inventor); Lagowski, Jacek (Inventor)

    1977-01-01

    A semiconductor sensor adapted to detect with a high degree of sensitivity small magnitudes of a mechanical force, presence of traces of a gas or light. The sensor includes a high energy gap (i.e., .about. 1.0 electron volts) semiconductor wafer. Mechanical force is measured by employing a non-centrosymmetric material for the semiconductor. Distortion of the semiconductor by the force creates a contact potential difference (cpd) at the semiconductor surface, and this cpd is determined to give a measure of the force. When such a semiconductor is subjected to illumination with an energy less than the energy gap of the semiconductors, such illumination also creates a cpd at the surface. Detection of this cpd is employed to sense the illumination itself or, in a variation of the system, to detect a gas. When either a gas or light is to be detected and a crystal of a non-centrosymmetric material is employed, the presence of gas or light, in appropriate circumstances, results in a strain within the crystal which distorts the same and the distortion provides a mechanism for qualitative and quantitative evaluation of the gas or the light, as the case may be.

  11. Semiconductor photoelectrochemistry

    NASA Technical Reports Server (NTRS)

    Buoncristiani, A. M.; Byvik, C. E.

    1983-01-01

    Semiconductor photoelectrochemical reactions are investigated. A model of the charge transport processes in the semiconductor, based on semiconductor device theory, is presented. It incorporates the nonlinear processes characterizing the diffusion and reaction of charge carriers in the semiconductor. The model is used to study conditions limiting useful energy conversion, specifically the saturation of current flow due to high light intensity. Numerical results describing charge distributions in the semiconductor and its effects on the electrolyte are obtained. Experimental results include: an estimate rate at which a semiconductor photoelectrode is capable of converting electromagnetic energy into chemical energy; the effect of cell temperature on the efficiency; a method for determining the point of zero zeta potential for macroscopic semiconductor samples; a technique using platinized titanium dioxide powders and ultraviolet radiation to produce chlorine, bromine, and iodine from solutions containing their respective ions; the photoelectrochemical properties of a class of layered compounds called transition metal thiophosphates; and a technique used to produce high conversion efficiency from laser radiation to chemical energy.

  12. Investigation of parasitic resistance and capacitance effects in nanoscaled FinFETs and their impact on static random-access memory cells

    NASA Astrophysics Data System (ADS)

    Huang, Bo-Rong; Meng, Fan-Hsuan; King, Ya-Chin; Lin, Chrong Jung

    2017-04-01

    A thorough investigation of the parasitic resistance and capacitance (RC) effects of a single-fin FinFET on logic CMOS devices and circuits is presented. As parasitic RC effects become increasingly prominent in nanoscaled FinFET technologies, they are critical to the overall device and circuit performance. In addition, the effects of dummy patterns as well as multifin structures are analyzed and modeled in detailed. By incorporating parasitic resistance and capacitance extracted by both measurement and simulation, the static and dynamic performance characteristics of standard six transistor static random-access memory (6T-SRAM) cells are comprehensively evaluated as an example of parasitic RC effects in this investigation.

  13. Mechanism of power consumption inhibitive multi-layer Zn:SiO{sub 2}/SiO{sub 2} structure resistance random access memory

    SciTech Connect

    Zhang, Rui; Lou, Jen-Chung; Tsai, Tsung-Ming E-mail: tcchang@mail.phys.nsysu.edu.tw; Chang, Kuan-Chang; Huang, Syuan-Yong; Shih, Chih-Cheng; Pan, Jhih-Hong; Tung, Cheng-Wei; Chang, Ting-Chang E-mail: tcchang@mail.phys.nsysu.edu.tw; Chen, Kai-Huang; Young, Tai-Fa; Chen, Hsin-Lu; Chen, Jung-Hui; Chen, Min-Chen; Syu, Yong-En; Sze, Simon M.

    2013-12-21

    In this paper, multi-layer Zn:SiO{sub 2}/SiO{sub 2} structure is introduced to reduce the operation power consumption of resistive random access memory (RRAM) device by modifying the filament formation process. And the configuration of multi-layer Zn:SiO{sub 2}/SiO{sub 2} structure is confirmed and demonstrated by auger electron spectrum. Material analysis together with conduction current fitting is applied to qualitatively evaluate the carrier conduction mechanism on both low resistance state and high resistance state. Finally, single layer and multilayer conduction models are proposed, respectively, to clarify the corresponding conduction characteristics of two types of RRAM devices.

  14. Reducing operation voltages by introducing a low-k switching layer in indium-tin-oxide-based resistance random access memory

    NASA Astrophysics Data System (ADS)

    Jin, Fu-Yuan; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Pan, Chih-Hung; Lin, Chih-Yang; Chen, Po-Hsun; Chen, Min-Chen; Huang, Hui-Chun; Lo, Ikai; Zheng, Jin-Cheng; Sze, Simon M.

    2016-06-01

    In this letter, we inserted a low dielectric constant (low-k) or high dielectric constant (high-k) material as a switching layer in indium-tin-oxide-based resistive random-access memory. After measuring the two samples, we found that the low-k material device has very low operating voltages (-80 and 110 mV for SET and RESET operations, respectively). Current fitting results were then used with the COMSOL software package to simulate electric field distribution in the layers. After combining the electrical measurement results with simulations, a conduction model was proposed to explain resistance switching behaviors in the two structures.

  15. Suppression of endurance degradation by applying constant voltage stress in one-transistor and one-resistor resistive random access memory

    NASA Astrophysics Data System (ADS)

    Su, Yu-Ting; Chang, Ting-Chang; Tsai, Tsung-Ming; Chang, Kuan-Chang; Chu, Tian-Jian; Chen, Hsin-Lu; Chen, Min-Chen; Yang, Chih-Cheng; Huang, Hui-Chun; Lo, Ikai; Zheng, Jin-Cheng; Sze, Simon M.

    2017-01-01

    In this letter we demonstrate an operation method that effectively suppresses endurance degradation. After many operations, the off-state of resistance random access memory (RRAM) degrades. This degradation is caused by reduction of active oxygen ions participating in the set process, as determined by current fitting of current-voltage (I-V) curves obtained from the endurance test between the interval of seventy to one hundred million operations. To address this problem, we propose the application of constant voltage stress after every five million operations during the endurance test. The experimental result shows that this method can maintain oxygen ions at the proper depth in the electrode and improve RRAM reliability.

  16. Memory technology survey

    NASA Technical Reports Server (NTRS)

    1981-01-01

    The current status of semiconductor, magnetic, and optical memory technologies is described. Projections based on these research activities planned for the shot term are presented. Conceptual designs of specific memory buffer pplications employing bipola, CMOS, GaAs, and Magnetic Bubble devices are discussed.

  17. Stretchable Organic Semiconductor Devices.

    PubMed

    Qian, Yan; Zhang, Xinwen; Xie, Linghai; Qi, Dianpeng; Chandran, Bevita K; Chen, Xiaodong; Huang, Wei

    2016-11-01

    Stretchable electronics are essential for the development of intensely packed collapsible and portable electronics, wearable electronics, epidermal and bioimplanted electronics, 3D surface compliable devices, bionics, prosthesis, and robotics. However, most stretchable devices are currently based on inorganic electronics, whose high cost of fabrication and limited processing area make it difficult to produce inexpensive, large-area devices. Therefore, organic stretchable electronics are highly attractive due to many advantages over their inorganic counterparts, such as their light weight, flexibility, low cost and large-area solution-processing, the reproducible semiconductor resources, and the easy tuning of their properties via molecular tailoring. Among them, stretchable organic semiconductor devices have become a hot and fast-growing research field, in which great advances have been made in recent years. These fantastic advances are summarized here, focusing on stretchable organic field-effect transistors, light-emitting devices, solar cells, and memory devices.

  18. Semiconductor diode with external field modulation

    DOEpatents

    Nasby, Robert D.

    2000-01-01

    A non-destructive-readout nonvolatile semiconductor diode switching device that may be used as a memory element is disclosed. The diode switching device is formed with a ferroelectric material disposed above a rectifying junction to control the conduction characteristics therein by means of a remanent polarization. The invention may be used for the formation of integrated circuit memories for the storage of information.

  19. The development of photoemission spectroscopy and its application to the study of semiconductor interfaces Observations on the interplay between basic and applied research (Welch Memorial Lecture)

    NASA Technical Reports Server (NTRS)

    Spicer, W. E.

    1985-01-01

    A sketch is given of the development of photoemission electron spectroscopy (PES) with emphasis on the author's own experience. Emphasis is placed: (1) on the period between 1958-1970; (2) on the various developments which were required for PES to emerge; and (3) on the strong interactions between applied/fundamental and knowledge/empirically based research. A more detailed discussion is given of the recent (1975-present) application of PES to study the interfaces of III-V semiconductors.

  20. A spin transfer torque magnetoresistance random access memory-based high-density and ultralow-power associative memory for fully data-adaptive nearest neighbor search with current-mode similarity evaluation and time-domain minimum searching

    NASA Astrophysics Data System (ADS)

    Ma, Yitao; Miura, Sadahiko; Honjo, Hiroaki; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

    2017-04-01

    A high-density nonvolatile associative memory (NV-AM) based on spin transfer torque magnetoresistive random access memory (STT-MRAM), which achieves highly concurrent and ultralow-power nearest neighbor search with full adaptivity of the template data format, has been proposed and fabricated using the 90 nm CMOS/70 nm perpendicular-magnetic-tunnel-junction hybrid process. A truly compact current-mode circuitry is developed to realize flexibly controllable and high-parallel similarity evaluation, which makes the NV-AM adaptable to any dimensionality and component-bit of template data. A compact dual-stage time-domain minimum searching circuit is also developed, which can freely extend the system for more template data by connecting multiple NM-AM cores without additional circuits for integrated processing. Both the embedded STT-MRAM module and the computing circuit modules in this NV-AM chip are synchronously power-gated to completely eliminate standby power and maximally reduce operation power by only activating the currently accessed circuit blocks. The operations of a prototype chip at 40 MHz are demonstrated by measurement. The average operation power is only 130 µW, and the circuit density is less than 11 µm2/bit. Compared with the latest conventional works in both volatile and nonvolatile approaches, more than 31.3% circuit area reductions and 99.2% power improvements are achieved, respectively. Further power performance analyses are discussed, which verify the special superiority of the proposed NV-AM in low-power and large-memory-based VLSIs.

  1. a-SiNx:H-based ultra-low power resistive random access memory with tunable Si dangling bond conduction paths.

    PubMed

    Jiang, Xiaofan; Ma, Zhongyuan; Xu, Jun; Chen, Kunji; Xu, Ling; Li, Wei; Huang, Xinfan; Feng, Duan

    2015-10-28

    The realization of ultra-low power Si-based resistive switching memory technology will be a milestone in the development of next generation non-volatile memory. Here we show that a high performance and ultra-low power resistive random access memory (RRAM) based on an Al/a-SiNx:H/p(+)-Si structure can be achieved by tuning the Si dangling bond conduction paths. We reveal the intrinsic relationship between the Si dangling bonds and the N/Si ratio x for the a-SiNx:H films, which ensures that the programming current can be reduced to less than 1 μA by increasing the value of x. Theoretically calculated current-voltage (I-V) curves combined with the temperature dependence of the I-V characteristics confirm that, for the low-resistance state (LRS), the Si dangling bond conduction paths obey the trap-assisted tunneling model. In the high-resistance state (HRS), conduction is dominated by either hopping or Poole-Frenkel (P-F) processes. Our introduction of hydrogen in the a-SiNx:H layer provides a new way to control the Si dangling bond conduction paths, and thus opens up a research field for ultra-low power Si-based RRAM.

  2. Thermocouple for heating and cooling of memory metal actuators

    NASA Technical Reports Server (NTRS)

    Wood, Charles (Inventor)

    1988-01-01

    A semiconductor thermocouple unit is provided for heating and cooling memory metal actuators. The semiconductor thermocouple unit is mounted adjacent to a memory metal actuator and has a heat sink attached to it. A flexible thermally conductive element extends between the semiconductor thermocouple and the actuator and serves as a heat transfer medium during heating and cooling operations.

  3. Review of Emerging New Solid-State Non-Volatile Memories

    NASA Astrophysics Data System (ADS)

    Fujisaki, Yoshihisa

    2013-04-01

    The integration limit of flash memories is approaching, and many new types of memory to replace conventional flash memories have been proposed. Unlike flash memories, new nonvolatile memories do not require storage of electric charges. The possibility of phase-change random-access memories (PCRAMs) or resistive-change RAMs (ReRAMs) replacing ultrahigh-density NAND flash memories has been investigated; however, many issues remain to be overcome, making the replacement difficult. Nonetheless, ferroelectric RAMs (FeRAMs) and magnetoresistive RAMs (MRAMs) are gradually penetrating into fields where the shortcomings of flash memories, such as high operating voltage, slow rewriting speed, and limited number of rewrites, make their use inconvenient. For instance, FeRAMs are widely used in ICs that require low power consumption such as smart cards and wireless tags. MRAMs are used in many kinds of controllers in industrial equipment that require high speed and unlimited rewrite operations. For successful application of new non-volatile semiconductor memories, such memories must be practically utilized in new fields in which flash memories are not applicable, and their technologies must be further developed.

  4. New Semiconductor Devices

    NASA Astrophysics Data System (ADS)

    Balestra, F.

    2008-11-01

    A review of recently emerging semiconductor devices for nanoelectronic applications is given. For the end of the international technology roadmap for semiconductors, very innovative materials, technologies and nanodevice architectures will be needed. Silicon on insulator-based devices seem to be the best candidates for the ultimate integration of integrated circuits on silicon. The flexibility of the silicon on insulator-based structure and the possibility to realize new device architectures allow to obtain optimum electrical properties for low power and high performance circuits. These transistors are also very interesting for high frequency and memory applications. The performance and physical mechanisms are addressed in single- and multi-gate thin film Si, SiGe and Ge metal-oxide-semiconductor field-effect-transistors. The impact of tensile or compressive uniaxial and biaxial strains in the channel, of high k materials and metal gates as well as metallic Schottky source-drain architectures are discussed. Finally, the interest of advanced beyond-CMOS (complementary MOS) nanodevices for long term applications, based on nanowires, carbon electronics or small slope switch structures are presented.

  5. Write-once memory effects observed in Ga-doped ZnO/organic semiconductor/MoO3/Au structures

    NASA Astrophysics Data System (ADS)

    Hasegawa, Junya; Nagase, Takashi; Kobayashi, Takashi; Naito, Hiroyoshi

    2016-03-01

    Electrical switching phenomena in a device configuration of inverted organic light-emitting diodes have been observed. The device structure was Ga-doped ZnO (GZO)/N,N‧-dicarbazolyl-3,5-benzene (m-CP)/MoO3 (10 nm)/Au (50 nm) fabricated by solution coating. The devices are write-once-read-many-times (WORM) memory devices with low switching voltage (<3 V) and long retention time (>700 h). Equivalent circuits in OFF and ON states are determined from the Cole-Cole plots measured by impedance spectroscopy. The switching phenomena and nonvolatile memory behavior are attributable to the formation conductive Au filaments in the m-CP layer of the ON state.

  6. Large Memory Effect and High Carrier Mobility of Organic Field-Effect Transistors Using Semiconductor Colloidal Nano-Dots Dispersed in Polymer Buffer Layers

    NASA Astrophysics Data System (ADS)

    Kajimoto, Kaori; Kurokawa, Atsushi; Uno, Kazuyuki; Tanaka, Ichiro

    2011-02-01

    We fabricated organic memory field-effect transistors (FETs) using PbS colloidal nano-dots (NDs) dispersed in thin poly(methyl methacrylate) (PMMA) layers inserted between gate insulators (SiO2) and pentacene active layers as floating gates. The colloidal NDs were dispersed in chloroform solution with PMMA, and spin-coated on SiO2 surfaces. The fabricated memory FETs showed significantly large threshold voltage shifts of 64.5 V at maximum after a writing voltage of 100 V was applied to their control gates, and a maximum carrier mobility of 0.36 cm2 V-1 s-1, which was comparable to that of reference pentacene FETs without colloidal NDs, was obtained because of the improved crystallinity of the pentacene films.

  7. ViSA: A Neurodynamic Model for Visuo-Spatial Working Memory, Attentional Blink, and Conscious Access

    ERIC Educational Resources Information Center

    Simione, Luca; Raffone, Antonino; Wolters, Gezinus; Salmas, Paola; Nakatani, Chie; Belardinelli, Marta Olivetti; van Leeuwen, Cees

    2012-01-01

    Two separate lines of study have clarified the role of selectivity in conscious access to visual information. Both involve presenting multiple targets and distracters: one "simultaneously" in a spatially distributed fashion, the other "sequentially" at a single location. To understand their findings in a unified framework, we propose a…

  8. Self-compliance Pt/HfO2/Ti/Si one-diode-one-resistor resistive random access memory device and its low temperature characteristics

    NASA Astrophysics Data System (ADS)

    Lu, Chao; Yu, Jue; Chi, Xiao-Wei; Lin, Guang-Yang; Lan, Xiao-Ling; Huang, Wei; Wang, Jian-Yuan; Xu, Jian-Fang; Wang, Chen; Li, Cheng; Chen, Song-Yan; Liu, Chunli; Lai, Hong-Kai

    2016-04-01

    A bipolar one-diode-one-resistor (1D1R) device with a Pt/HfO2/Ti/n-Si(001) structure was demonstrated. The 1D1R resistive random access memory (RRAM) device consists of a Ti/n-Si(001) diode and a Pt/HfO2/Ti resistive switching cell. By using the Ti layer as the shared electrode for both the diode and the resistive switching cell, the 1D1R device exhibits the property of stable self-compliance and the characteristic of robust resistive switching with high uniformity. The high/low resistance ratio reaches 103. The electrical RESET/SET curve does not deteriorate after 68 loops. Low-temperature studies show that the 1D1R RRAM device has a critical working temperature of 250 K, and at temperatures below 250 K, the device fails to switch its resistances.

  9. Low leakage Ru-strontium titanate-Ru metal-insulator-metal capacitors for sub-20 nm technology node in dynamic random access memory

    SciTech Connect

    Popovici, M. Swerts, J.; Redolfi, A.; Kaczer, B.; Aoulaiche, M.; Radu, I.; Clima, S.; Everaert, J.-L.; Van Elshocht, S.; Jurczak, M.

    2014-02-24

    Improved metal-insulator-metal capacitor (MIMCAP) stacks with strontium titanate (STO) as dielectric sandwiched between Ru as top and bottom electrode are shown. The Ru/STO/Ru stack demonstrates clearly its potential to reach sub-20 nm technology nodes for dynamic random access memory. Downscaling of the equivalent oxide thickness, leakage current density (J{sub g}) of the MIMCAPs, and physical thickness of the STO have been realized by control of the Sr/Ti ratio and grain size using a heterogeneous TiO{sub 2}/STO based nanolaminate stack deposition and a two-step crystallization anneal. Replacement of TiN with Ru as both top and bottom electrodes reduces the amount of electrically active defects and is essential to achieve a low leakage current in the MIM capacitor.

  10. Evaluation of in-plane local stress distribution in stacked IC chip using dynamic random access memory cell array for highly reliable three-dimensional IC

    NASA Astrophysics Data System (ADS)

    Tanikawa, Seiya; Kino, Hisashi; Fukushima, Takafumi; Koyanagi, Mitsumasa; Tanaka, Tetsu

    2016-04-01

    As three-dimensional (3D) ICs have many advantages, IC performances can be enhanced without scaling down of transistor size. However, 3D IC has mechanical stresses inside Si substrates owing to its 3D stacking structure, which induces negative effects on transistor performances such as carrier mobility changes. One of the mechanical stresses is local bending stress due to organic adhesive shrinkage among stacked IC chips. In this paper, we have proposed an evaluation method for in-plane local stress distribution in the stacked IC chips using retention time modulation of a dynamic random access memory (DRAM) cell array. We fabricated a test structure composed of a DRAM chip bonded on a Si interposer with dummy Cu/Sn microbumps. As a result, we clarified that the DRAM cell array can precisely evaluate the in-plane local stress distribution in the stacked IC chips.

  11. Chronic restricted access to 10% sucrose solution in adolescent and young adult rats impairs spatial memory and alters sensitivity to outcome devaluation.

    PubMed

    Kendig, Michael D; Boakes, Robert A; Rooney, Kieron B; Corbit, Laura H

    2013-08-15

    Although increasing consumption of sugar drinks is recognized as a significant public health concern, little is known about (a) the cognitive effects resulting from sucrose consumption; and (b) whether the long-term effects of sucrose consumption are more pronounced for adolescents. This experiment directly compared performance on a task of spatial learning and memory (the Morris Water Maze) and sensitivity to outcome devaluation following 28 days of 2-h/day access to a 10% sucrose solution in adolescent and young-adult Wistar rats. Sucrose groups developed elevated fasting blood glucose levels after the diet intervention, despite drawing <15% of calories from sucrose and gaining no more weight than controls. In subsequent behavioral testing, sucrose groups were impaired on the Morris Water Maze, with some residual deficits in spatial memory observed more than 6 weeks after the end of sucrose exposure. Further, results from outcome devaluation testing indicated that in the older cohort of rats, those fed sucrose showed reduced sensitivity to devaluation of the outcome, suggestive of differences in instrumental learning following sucrose exposure. Data provide strong evidence that sucrose consumption can induce deficits in spatial cognition and reward-oriented behavior at levels that resemble patterns of sugar drink consumption in young people, and which can remain long after exposure.

  12. Influence of Thermal Annealing Treatment on Bipolar Switching Properties of Vanadium Oxide Thin-Film Resistance Random-Access Memory Devices

    NASA Astrophysics Data System (ADS)

    Chen, Kai-Huang; Cheng, Chien-Min; Kao, Ming-Cheng; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Wu, Sean; Su, Feng-Yi

    2017-04-01

    The bipolar switching properties and electrical conduction mechanism of vanadium oxide thin-film resistive random-access memory (RRAM) devices obtained using a rapid thermal annealing (RTA) process have been investigated in high-resistive status/low-resistive status (HRS/LRS) and are discussed herein. In addition, the resistance switching properties and quality improvement of the vanadium oxide thin-film RRAM devices were measured by x-ray diffraction (XRD) analysis, x-ray photoelectron spectrometry (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM), and current-voltage ( I- V) measurements. The activation energy of the hopping conduction mechanism in the devices was investigated based on Arrhenius plots in HRS and LRS. The hopping conduction distance and activation energy barrier were obtained as 12 nm and 45 meV, respectively. The thermal annealing process is recognized as a candidate method for fabrication of thin-film RRAM devices, being compatible with integrated circuit technology for nonvolatile memory devices.

  13. Influence of Thermal Annealing Treatment on Bipolar Switching Properties of Vanadium Oxide Thin-Film Resistance Random-Access Memory Devices

    NASA Astrophysics Data System (ADS)

    Chen, Kai-Huang; Cheng, Chien-Min; Kao, Ming-Cheng; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Wu, Sean; Su, Feng-Yi

    2016-12-01

    The bipolar switching properties and electrical conduction mechanism of vanadium oxide thin-film resistive random-access memory (RRAM) devices obtained using a rapid thermal annealing (RTA) process have been investigated in high-resistive status/low-resistive status (HRS/LRS) and are discussed herein. In addition, the resistance switching properties and quality improvement of the vanadium oxide thin-film RRAM devices were measured by x-ray diffraction (XRD) analysis, x-ray photoelectron spectrometry (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM), and current-voltage (I-V) measurements. The activation energy of the hopping conduction mechanism in the devices was investigated based on Arrhenius plots in HRS and LRS. The hopping conduction distance and activation energy barrier were obtained as 12 nm and 45 meV, respectively. The thermal annealing process is recognized as a candidate method for fabrication of thin-film RRAM devices, being compatible with integrated circuit technology for nonvolatile memory devices.

  14. Correlative transmission electron microscopy and electrical properties study of switchable phase-change random access memory line cells

    SciTech Connect

    Oosthoek, J. L. M.; Kooi, B. J.; Voogt, F. C.; Attenborough, K.; Verheijen, M. A.; Hurkx, G. A. M.; Gravesteijn, D. J.

    2015-02-14

    Phase-change memory line cells, where the active material has a thickness of 15 nm, were prepared for transmission electron microscopy (TEM) observation such that they still could be switched and characterized electrically after the preparation. The result of these observations in comparison with detailed electrical characterization showed (i) normal behavior for relatively long amorphous marks, resulting in a hyperbolic dependence between SET resistance and SET current, indicating a switching mechanism based on initially long and thin nanoscale crystalline filaments which thicken gradually, and (ii) anomalous behavior, which holds for relatively short amorphous marks, where initially directly a massive crystalline filament is formed that consumes most of the width of the amorphous mark only leaving minor residual amorphous regions at its edges. The present results demonstrate that even in (purposely) thick TEM samples, the TEM sample preparation hampers the probability to observe normal behavior and it can be debated whether it is possible to produce electrically switchable TEM specimen in which the memory cells behave the same as in their original bulk embedded state.

  15. Enhanced resistive switching performance for bilayer HfO2/TiO2 resistive random access memory

    NASA Astrophysics Data System (ADS)

    Ye, Cong; Deng, Tengfei; Zhang, Junchi; Shen, Liangping; He, Pin; Wei, Wei; Wang, Hao

    2016-10-01

    We prepared bilayer HfO2/TiO2 resistive random accessory memory (RRAM) using magnetron sputtering on an ITO/PEN flexible substrate. The switching voltages (V SET and V RESET) were smaller for the Pt/HfO2/TiO2/ITO device than for a Pt/HfO2/ITO memory device. The insertion of a TiO2 layer in the switching layer was inferred to act as an oxygen reservoir to reduce the switching voltages. In addition, greatly improved uniformity was achieved, which showed the coefficient of the variations of V SET and V RESET to be 9.90% and 6.35% for the bilayer structure RRAM. We deduced that occurrence of conductive filament connection/rupture at the interface of the HfO2 and TiO2, in combination with the HfO2 acting as a virtual cathode, led to the improved uniformity. A multilevel storage capability can be obtained by varying the stop voltage in the RESET process for bilayer HfO2/TiO2 RRAM. By analyzing the current conduction mechanism, we demonstrated that the multilevel high resistance state (HRS) was attributable to the increased barrier height when the stop voltage was increased.

  16. Semiconductor/High-Tc-Superconductor Hybrid ICs

    NASA Technical Reports Server (NTRS)

    Burns, Michael J.

    1995-01-01

    Hybrid integrated circuits (ICs) containing both Si-based semiconducting and YBa(2)Cu(3)O(7-x) superconducting circuit elements on sapphire substrates developed. Help to prevent diffusion of Cu from superconductors into semiconductors. These hybrid ICs combine superconducting and semiconducting features unavailable in superconducting or semiconducting circuitry alone. For example, complementary metal oxide/semiconductor (CMOS) readout and memory devices integrated with fast-switching Josephson-junction super-conducting logic devices and zero-resistance interconnections.

  17. Nonvolatile memory thin-film transistors using biodegradable chicken albumen gate insulator and oxide semiconductor channel on eco-friendly paper substrate.

    PubMed

    Kim, So-Jung; Jeon, Da-Bin; Park, Jung-Ho; Ryu, Min-Ki; Yang, Jong-Heon; Hwang, Chi-Sun; Kim, Gi-Heon; Yoon, Sung-Min

    2015-03-04

    Nonvolatile memory thin-film transistors (TFTs) fabricated on paper substrates were proposed as one of the eco-friendly electronic devices. The gate stack was composed of chicken albumen gate insulator and In-Ga-Zn-O semiconducting channel layers. All the fabrication processes were performed below 120 °C. To improve the process compatibility of the synthethic paper substrate, an Al2O3 thin film was introduced as adhesion and barrier layers by atomic layer deposition. The dielectric properties of biomaterial albumen gate insulator were also enhanced by the preparation of Al2O3 capping layer. The nonvolatile bistabilities were realized by the switching phenomena of residual polarization within the albumen thin film. The fabricated device exhibited a counterclockwise hysteresis with a memory window of 11.8 V, high on/off ratio of approximately 1.1 × 10(6), and high saturation mobility (μsat) of 11.5 cm(2)/(V s). Furthermore, these device characteristics were not markedly degraded even after the delamination and under the bending situration. When the curvature radius was set as 5.3 cm, the ION/IOFF ratio and μsat were obtained to be 5.9 × 10(6) and 7.9 cm(2)/(V s), respectively.

  18. Use of the Wilkinson catalyst for the ortho-C-H heteroarylation of aromatic amines: facile access to highly extended π-conjugated heteroacenes for organic semiconductors.

    PubMed

    Huang, Yumin; Wu, Di; Huang, Jingsheng; Guo, Qiang; Li, Juan; You, Jingsong

    2014-11-03

    An unprecedented catalytic system composed of the Wilkinson catalyst [Rh(PPh3)3Cl] and CF3COOH enabled the highly regioselective cross-coupling of aromatic amines with a variety of heteroarenes through dual C-H bond cleavage. This protocol provided a facile and rapid route from readily available substrates to (2-aminophenyl)heteroaryl compounds, which may be conveniently transformed into highly extended π-conjugated heteroacenes. The experimental studies and calculations showed that thianaphtheno[3,2-b]indoles have large HOMO-LUMO energy gaps and low-lying HOMO levels, and could therefore potentially be high-performance organic semiconductors. Herein we report the first use of a rhodium(I) catalyst for oxidative C-H/C-H coupling reactions. The current innovative catalyst system is much less expensive than [RhCp*Cl2]2/AgSbF6 and could open the door for the application of this approach to other types of C-H activation processes.

  19. Current instabilities in dynamic random access memory storage capacitor formed with electron beam deposited Y2O3 dielectric

    NASA Astrophysics Data System (ADS)

    Rastogi, A. C.; Sharma, R. N.

    Metal-oxide-semiconductor (MOS) storage capacitors based on electron beam deposited Y2O3 extrinsic dielectric on Si show changes in capacitance density depending on the amorphous and crystalline phases. Bias stress cycle-dependent changes in capacitance density occur due to the non-equilibrium nature of defect states at the Y2O3/Si interface after O2 annealing as a result of the emergence of a 4-8 nm thick SiO2 film at the interface. Leakage currents show instability under repeated dc bias stress, the nature and extent of which depend upon the structure of the Y2O3 gate dielectric and the polarity of dc bias. With amorphous Y2O3, leakage currents drift to lower values under gate injection due to electron trapping, and to higher values under Si-injection due to the generation of holes. Though leakage current drift is minimal for crystalline Y2O3, its magnitude increases as the energy of injected electrons from mid-gap states is low and the local field due to asperity is high. The emergence of interfacial SiO2 reduces the magnitude of Si-injection leakage current substantially, but causes transient changes resulting in switching to higher values at a threshold dc bias. Thermal detrapping of holes and reverse bias stress studies confirm that the instability of current is caused by an increase in the cathodic field from hole trapping at interface states. Leakage current instability limits the application of extrinsic high dielectric constant dielectrics in a high density DRAM storage capacitor, unless a new interface layer scheme other than SiO2 and a method to form a defect-free dielectric layer can be implemented.

  20. Retracing Memories

    ERIC Educational Resources Information Center

    Harrison, David L.

    2005-01-01

    There are plenty of paths to poetry but few are as accessible as retracing ones own memories. When students are asked to write about something they remember, they are given them the gift of choosing from events that are important enough to recall. They remember because what happened was funny or scary or embarrassing or heartbreaking or silly.…

  1. Two-bit multi-level phase change random access memory with a triple phase change material stack structure

    NASA Astrophysics Data System (ADS)

    Gyanathan, Ashvini; Yeo, Yee-Chia

    2012-11-01

    This work demonstrates a novel two-bit multi-level device structure comprising three phase change material (PCM) layers, separated by SiN thermal barrier layers. This triple PCM stack consisted of (from bottom to top), Ge2Sb2Te5 (GST), an ultrathin SiN barrier, nitrogen-doped GST, another ultrathin SiN barrier, and Ag0.5In0.5Sb3Te6. The PCM layers can selectively amorphize to form 4 different resistance levels ("00," "01," "10," and "11") using respective voltage pulses. Electrical characterization was extensively performed on these devices. Thermal analysis was also done to understand the physics behind the phase changing characteristics of the two-bit memory devices. The melting and crystallization temperatures of the PCMs play important roles in the power consumption of the multi-level devices. The electrical resistivities and thermal conductivities of the PCMs and the SiN thermal barrier are also crucial factors contributing to the phase changing behaviour of the PCMs in the two-bit multi-level PCRAM device.

  2. Retention modeling for ultra-thin density of Cu-based conductive bridge random access memory (CBRAM)

    SciTech Connect

    Aga, Fekadu Gochole; Woo, Jiyong; Lee, Sangheon; Song, Jeonghwan; Park, Jaesung; Park, Jaehyuk; Lim, Seokjae; Sung, Changhyuck; Hwang, Hyunsang

    2016-02-15

    We investigate the effect of Cu concentration On-state resistance retention characteristics of W/Cu/Ti/HfO{sub 2}/Pt memory cell. The development of RRAM device for application depends on the understanding of the failure mechanism and the key parameters for device optimization. In this study, we develop analytical expression for cations (Cu{sup +}) diffusion model using Gaussian distribution for detailed analysis of data retention time at high temperature. It is found that the improvement of data retention time depends not only on the conductive filament (CF) size but also on Cu atoms concentration density in the CF. Based on the simulation result, better data retention time is observed for electron wave function associated with Cu{sup +} overlap and an extended state formation. This can be verified by analytical calculation of Cu atom defects inside the filament, based on Cu{sup +} diffusion model. The importance of Cu diffusion for the device reliability and the corresponding local temperature of the filament were analyzed by COMSOL Multiphysics simulation.

  3. Visual input that matches the content of visual working memory requires less (not faster) evidence sampling to reach conscious access.

    PubMed

    Gayet, Surya; van Maanen, Leendert; Heilbron, Micha; Paffen, Chris L E; Van der Stigchel, Stefan

    2016-09-01

    The content of visual working memory (VWM) affects the processing of concurrent visual input. Recently, it has been demonstrated that stimuli are released from interocular suppression faster when they match rather than mismatch a color that is memorized for subsequent recall. In order to investigate the nature of the interaction between visual representations elicited by VWM and visual representations elicited by retinal input, we modeled the perceptual processes leading up to this difference in suppression durations. We replicated the VWM modulation of suppression durations, and fitted sequential sampling models (linear ballistic accumulators) to the response time data. Model comparisons revealed that the data was best explained by a decrease in threshold for visual input that matches the content of VWM. Converging evidence was obtained by fitting similar sequential sampling models (shifted Wald model) to published datasets. Finally, to confirm that the previously observed threshold difference reflected processes occurring before rather than after the stimuli were released from suppression, we applied the same procedure to the data of an experiment in which stimuli were not interocularly suppressed. Here, we found no decrease in threshold for stimuli that match the content of VWM. We discuss our findings in light of a preactivation hypothesis, proposing that matching visual input taps into the same neural substrate that is already activated by a representation concurrently maintained in VWM, thereby reducing its threshold for reaching visual awareness.

  4. Super-Resolution Effect of Semiconductor-Doped Glass

    NASA Astrophysics Data System (ADS)

    Nagase, Toshihiko; Ashida, Sumio; KatsutaroIchihara, KatsutaroIchihara

    1999-03-01

    Semiconductor-doped glass is proposed as a super-resolution layer for future ultra-high-density optical disc systems. It was confirmed that this material system showed very fast response and large transmittance change by laser-beam irradiation when CdSSe-doped glass was used. The rise time of the transmittance change was less than 10 ns and the transmittance change reached 30%. These optical responses were obtained at a power density of the pumped laser beam of 1 MW/cm2. This power density corresponds to the readout power in digital versatile disk-read onlymemory (DVD-ROM) and digital versatile disk-random access memory (DVD-RAM) discs. This material system is regarded as a potential candidate for a super-resolution readout layer that is applicable to both ROM and RAM discs.

  5. Analog Nonvolatile Computer Memory Circuits

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd

    2007-01-01

    In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value

  6. Electric-Field-Driven Dual Vacancies Evolution in Ultrathin Nanosheets Realizing Reversible Semiconductor to Half-Metal Transition.

    PubMed

    Lyu, Mengjie; Liu, Youwen; Zhi, Yuduo; Xiao, Chong; Gu, Bingchuan; Hua, Xuemin; Fan, Shaojuan; Lin, Yue; Bai, Wei; Tong, Wei; Zou, Youming; Pan, Bicai; Ye, Bangjiao; Xie, Yi

    2015-12-02

    Fabricating a flexible room-temperature ferromagnetic resistive-switching random access memory (RRAM) device is of fundamental importance to integrate nonvolatile memory and spintronics both in theory and practice for modern information technology and has the potential to bring about revolutionary new foldable information-storage devices. Here, we show that a relatively low operating voltage (+1.4 V/-1.5 V, the corresponding electric field is around 20,000 V/cm) drives the dual vacancies evolution in ultrathin SnO2 nanosheets at room temperature, which causes the reversible transition between semiconductor and half-metal, accompanyied by an abrupt conductivity change up to 10(3) times, exhibiting room-temperature ferromagnetism in two resistance states. Positron annihilation spectroscopy and electron spin resonance results show that the Sn/O dual vacancies in the ultrathin SnO2 nanosheets evolve to isolated Sn vacancy under electric field, accounting for the switching behavior of SnO2 ultrathin nanosheets; on the other hand, the different defect types correspond to different conduction natures, realizing the transition between semiconductor and half-metal. Our result represents a crucial step to create new a information-storage device realizing the reversible transition between semiconductor and half-metal with flexibility and room-temperature ferromagnetism at low energy consumption. The as-obtained half-metal in the low-resistance state broadens the application of the device in spintronics and the semiconductor to half-metal transition on the basis of defects evolution and also opens up a new avenue for exploring random access memory mechanisms and finding new half-metals for spintronics.

  7. Simulation of phase-change random access memory with 35nm diameter of the TiN bottom electrode by finite element modeling

    NASA Astrophysics Data System (ADS)

    Jin, Qiuxue; Liu, Bo; Liu, Yan; Wang, Heng; Xu, Zhen; Gao, Dan; Wang, Qing; Xia, Yangyang; Wang, Weiwei; Song, Zhitang; Feng, Songlin

    2016-10-01

    A three-dimensional finite element model for Phase-Change Random Access Memory (PCRAM) is established to simulate thermal and electrical distribution during RESET operation. The establishment of the model is highly in accordance with the manufacture of PCRAM cell in the 40nm process and the model is applied to simulate the RESET behaviors of 35 nm diameter of titanium nitride (TiN) bottom electrode in the conventional mushroom structure (MS). By the simulations of thermal and electrical distribution, the highest temperature is observed in TiN bottom electrode contactor and meanwhile the voltage of the TiN bottom electrode accounts for as high as 65 percent of the total voltage. It induces high RESET current which suggests that the thermoelectric conductivity of MS is crucial in improving the heating efficiency in RESET process. Simulation results of RESET current and high resistance distribution during RESET operation are close to the data from the actual measurement. However those two values of low resistance are slightly different, probably due to the interface resistance between Ge2Sb2Te5 (GST) and other materials and the resistance caused by microstructural defects. This work reveals the importance of the thermoelectrical properties of materials in PCRAM cells and improves the quality of PCRAM simulations in industrial application.

  8. Switching operation and degradation of resistive random access memory composed of tungsten oxide and copper investigated using in-situ TEM

    NASA Astrophysics Data System (ADS)

    Arita, Masashi; Takahashi, Akihito; Ohno, Yuuki; Nakane, Akitoshi; Tsurumaki-Fukuchi, Atsushi; Takahashi, Yasuo

    2015-11-01

    In-situ transmission electron microscopy (in-situ TEM) was performed to investigate the switching operation of a resistive random access memory (ReRAM) made of copper, tungsten oxide and titanium nitride (Cu/WOx/TiN). In the first Set (Forming) operation to initialize the device, precipitation appeared inside the WOx layer. It was presumed that a Cu conducting filament was formed, lowering the resistance (on-state). The Reset operation induced a higher resistance (the off-state). No change in the microstructure was identified in the TEM images. Only when an additional Reset current was applied after switching to the off-state could erasure of the filament be seen (over-Reset). Therefore, it was concluded that structural change relating to the resistance switch was localized in a very small area around the filament. With repeated switching operations and increasing operational current, the WOx/electrode interfaces became indistinct. At the same time, the resistance of the off-state gradually decreased. This is thought to be caused by Cu condensation at the interfaces because of leakage current through the area other than through the filament. This will lead to device degradation through mechanisms such as endurance failure. This is the first accelerated aging test of ReRAM achieved using in-situ TEM.

  9. Forming-free, bipolar resistivity switching characteristics of fully transparent resistive random access memory with IZO/α-IGZO/ITO structure

    NASA Astrophysics Data System (ADS)

    Lo, Chun-Chieh; Hsieh, Tsung-Eong

    2016-09-01

    Fully transparent resistive random access memory (TRRAM) containing amorphous indium gallium zinc oxide as the resistance switching (RS) layer and transparent conducting oxides (indium zinc oxide and indium tin oxide) as the electrodes was prepared. Optical measurement indicated the transmittance of device exceeds 80% in visible-light wavelength range. TRRAM samples exhibited the forming-free feature and the best electrical performance (V SET  =  0.61 V V RESET  =  -0.76 V R HRS/R LRS (i.e. the R-ratio)  >103) was observed in the device subject to a post-annealing at 300 °C for 1 hr in atmospheric ambient. Such a sample also exhibited satisfactory endurance and retention properties at 85 °C as revealed by the reliability tests. Electrical measurement performed in vacuum ambient indicated that the RS mechanism correlates with the charge trapping/de-trapping process associated with oxygen defects in the RS layer.

  10. Switching operation and degradation of resistive random access memory composed of tungsten oxide and copper investigated using in-situ TEM

    PubMed Central

    Arita, Masashi; Takahashi, Akihito; Ohno, Yuuki; Nakane, Akitoshi; Tsurumaki-Fukuchi, Atsushi; Takahashi, Yasuo

    2015-01-01

    In-situ transmission electron microscopy (in-situ TEM) was performed to investigate the switching operation of a resistive random access memory (ReRAM) made of copper, tungsten oxide and titanium nitride (Cu/WOx/TiN). In the first Set (Forming) operation to initialize the device, precipitation appeared inside the WOx layer. It was presumed that a Cu conducting filament was formed, lowering the resistance (on-state). The Reset operation induced a higher resistance (the off-state). No change in the microstructure was identified in the TEM images. Only when an additional Reset current was applied after switching to the off-state could erasure of the filament be seen (over-Reset). Therefore, it was concluded that structural change relating to the resistance switch was localized in a very small area around the filament. With repeated switching operations and increasing operational current, the WOx/electrode interfaces became indistinct. At the same time, the resistance of the off-state gradually decreased. This is thought to be caused by Cu condensation at the interfaces because of leakage current through the area other than through the filament. This will lead to device degradation through mechanisms such as endurance failure. This is the first accelerated aging test of ReRAM achieved using in-situ TEM. PMID:26611856

  11. Long-term reliable physically unclonable function based on oxide tunnel barrier breakdown on two-transistors two-magnetic-tunnel-junctions cell-based embedded spin transfer torque magnetoresistive random access memory

    NASA Astrophysics Data System (ADS)

    Takaya, Satoshi; Tanamoto, Tetsufumi; Noguchi, Hiroki; Ikegami, Kazutaka; Abe, Keiko; Fujita, Shinobu

    2017-04-01

    Among the diverse applications of spintronics, security for internet-of-things (IoT) devices is one of the most important. A physically unclonable function (PUF) with a spin device (spin transfer torque magnetoresistive random access memory, STT-MRAM) is presented. Oxide tunnel barrier breakdown is used to realize long-term stability for PUFs. A secure PUF has been confirmed by evaluating the Hamming distance of a 32-bit STT-MRAM-PUF fabricated using 65 nm CMOS technology.

  12. Distributed multiport memory architecture

    NASA Technical Reports Server (NTRS)

    Kohl, W. H. (Inventor)

    1983-01-01

    A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.

  13. Ferroelectric memory based on nanostructures

    PubMed Central

    2012-01-01

    In the past decades, ferroelectric materials have attracted wide attention due to their applications in nonvolatile memory devices (NVMDs) rendered by the electrically switchable spontaneous polarizations. Furthermore, the combination of ferroelectric and nanomaterials opens a new route to fabricating a nanoscale memory device with ultrahigh memory integration, which greatly eases the ever increasing scaling and economic challenges encountered in the traditional semiconductor industry. In this review, we summarize the recent development of the nonvolatile ferroelectric field effect transistor (FeFET) memory devices based on nanostructures. The operating principles of FeFET are introduced first, followed by the discussion of the real FeFET memory nanodevices based on oxide nanowires, nanoparticles, semiconductor nanotetrapods, carbon nanotubes, and graphene. Finally, we present the opportunities and challenges in nanomemory devices and our views on the future prospects of NVMDs. PMID:22655750

  14. Resistance Switching Characteristics Induced by O2 Plasma Treatment of an Indium Tin Oxide Film for Use as an Insulator in Resistive Random Access Memory.

    PubMed

    Chen, Po-Hsun; Chang, Ting-Chang; Chang, Kuan-Chang; Tsai, Tsung-Ming; Pan, Chih-Hung; Chen, Min-Chen; Su, Yu-Ting; Lin, Chih-Yang; Tseng, Yi-Ting; Huang, Hui-Chun; Wu, Huaqiang; Deng, Ning; Qian, He; Sze, Simon M

    2017-01-25

    In this study, an O2 inductively coupled plasma (ICP) treatment was developed in order to modify the characteristics of indium tin oxide (ITO) film for use as an insulator in resistive random access memory (RRAM). After the O2 plasma treatment, the previously conductive ITO film is oxidized and becomes less conductive. In addition, after capping the same ITO material for use as a top electrode, we found that the ITO/ITO(O2 plasma)/TiN device exhibits very stable and robust resistive switching characteristics. On the contrary, the nontreated ITO film for use as an insulator in the ITO/ITO/TiN device cannot perform resistance switching behaviors. The material analysis initially investigated the ITO film characteristics with and without O2 plasma treatment. The surface was less rough after O2 plasma treatment. However, the molar concentration of each element and measured sheet resistance results for the O2-plasma-treated ITO film were dramatically modified. Next, electrical measurements were carried out to examine the resistance switching stability under continuous DC and AC operation in this ITO/ITO(O2 plasma)/TiN device. Reliability tests, including endurance and retention, also proved its capability for use in data storage applications. In addition to these electrical measurements, current fitting method experiments at different temperatures were performed to examine and confirm the resistance switching mechanisms. This easily fabricated device, using a simple material combination, achieves excellent performance by using ITO with an O2 plasma treatment and can further the abilities of RRAM for use in remarkable potential applications.

  15. Influence of cooling rate in planar thermally assisted magnetic random access memory: Improved writeability due to spin-transfer-torque influence

    SciTech Connect

    Chavent, A.; Ducruet, C.; Portemont, C.; Creuzet, C.; Alvarez-Hérault, J.; Vila, L.; Sousa, R. C.; Prejbeanu, I. L.; Dieny, B.

    2015-09-14

    This paper investigates the effect of a controlled cooling rate on magnetic field reversal assisted by spin transfer torque (STT) in thermally assisted magnetic random access memory. By using a gradual linear decrease of the voltage at the end of the write pulse, the STT decays more slowly or at least at the same rate as the temperature. This condition is necessary to make sure that the storage layer magnetization remains in the desired written direction during cooling of the cell. The influence of the write current pulse decay rate was investigated on two exchange biased synthetic ferrimagnet (SyF) electrodes. For a NiFe based electrode, a significant improvement in writing reproducibility was observed using a gradual linear voltage transition. The write error rate decreases by a factor of 10 when increasing the write pulse fall-time from ∼3 ns to 70 ns. For comparison, a second CoFe/NiFe based electrode was also reversed by magnetic field assisted by STT. In this case, no difference between sharp and linear write pulse fall shape was observed. We attribute this observation to the higher thermal stability of the CoFe/NiFe electrode during cooling. In real-time measurements of the magnetization reversal, it was found that Ruderman-Kittel-Kasuya-Yosida (RKKY) coupling in the SyF electrode vanishes for the highest pulse voltages that were used due to the high temperature reached during write. As a result, during the cooling phase, the final state is reached through a spin-flop transition of the SyF storage layer.

  16. Improved Writing-Conductor Designs For Magnetic Memory

    NASA Technical Reports Server (NTRS)

    Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

    1994-01-01

    Writing currents reduced to practical levels. Improved conceptual designs for writing conductors in micromagnet/Hall-effect random-access integrated-circuit memory reduces electrical current needed to magnetize micromagnet in each memory cell. Basic concept of micromagnet/Hall-effect random-access memory presented in "Magnetic Analog Random-Access Memory" (NPO-17999).

  17. Memory beyond expression.

    PubMed

    Delorenzi, A; Maza, F J; Suárez, L D; Barreiro, K; Molina, V A; Stehberg, J

    2014-01-01

    The idea that memories are not invariable after the consolidation process has led to new perspectives about several mnemonic processes. In this framework, we review our studies on the modulation of memory expression during reconsolidation. We propose that during both memory consolidation and reconsolidation, neuromodulators can determine the probability of the memory trace to guide behavior, i.e. they can either increase or decrease its behavioral expressibility without affecting the potential of persistent memories to be activated and become labile. Our hypothesis is based on the findings that positive modulation of memory expression during reconsolidation occurs even if memories are behaviorally unexpressed. This review discusses the original approach taken in the studies of the crab Neohelice (Chasmagnathus) granulata, which was then successfully applied to test the hypothesis in rodent fear memory. Data presented offers a new way of thinking about both weak trainings and experimental amnesia: memory retrieval can be dissociated from memory expression. Furthermore, the strategy presented here allowed us to show in human declarative memory that the periods in which long-term memory can be activated and become labile during reconsolidation exceeds the periods in which that memory is expressed, providing direct evidence that conscious access to memory is not needed for reconsolidation. Specific controls based on the constraints of reminders to trigger reconsolidation allow us to distinguish between obliterated and unexpressed but activated long-term memories after amnesic treatments, weak trainings and forgetting. In the hypothesis discussed, memory expressibility--the outcome of experience-dependent changes in the potential to behave--is considered as a flexible and modulable attribute of long-term memories. Expression seems to be just one of the possible fates of re-activated memories.

  18. The future of memory

    NASA Astrophysics Data System (ADS)

    Marinella, M.

    In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.

  19. Electronic processes in multilayer memory structures

    NASA Astrophysics Data System (ADS)

    Plotnikov, A. F.

    The papers presented in this volume contain results of recent theoretical and experimental research related to electron processes in optoelectronic memory media based on structures consisting of a metal, an amorphous insulating layer, and a semiconductor. Topics discussed include photostimulated electron processes in metal-insulator-semiconductor structures, electron transfer phenomena in amorphous dielectric layers, degradation phenomena in MNOS memory elements under prolonged charge injection into the dielectric layer, and characteristics of charge relaxation in MNOS structures following multiple reprogramming.

  20. Charge state hysteresis in semiconductor quantum dots

    SciTech Connect

    Yang, C. H.; Rossi, A. Lai, N. S.; Leon, R.; Lim, W. H.; Dzurak, A. S.

    2014-11-03

    Semiconductor quantum dots provide a two-dimensional analogy for real atoms and show promise for the implementation of scalable quantum computers. Here, we investigate the charge configurations in a silicon metal-oxide-semiconductor double quantum dot tunnel coupled to a single reservoir of electrons. By operating the system in the few-electron regime, the stability diagram shows hysteretic tunnelling events that depend on the history of the dots charge occupancy. We present a model which accounts for the observed hysteretic behaviour by extending the established description for transport in double dots coupled to two reservoirs. We demonstrate that this type of device operates like a single-electron memory latch.

  1. Photoelectrosynthesis at semiconductor electrodes

    SciTech Connect

    Nozik, A. J.

    1980-12-01

    The general principles of photoelectrochemistry and photoelectrosynthesis are reviewed and some new developments in photoelectrosynthesis are discussed. Topics include energetics of semiconductor-electrolyte interfaces(band-edge unpinning); hot carrier injection at illuminated semiconductor-electrolyte junctions; derivatized semiconductor electrodes; particulate photoelectrochemical systems; layered compounds and other new materials; and dye sensitization. (WHK)

  2. Unitary lens semiconductor device

    DOEpatents

    Lear, K.L.

    1997-05-27

    A unitary lens semiconductor device and method are disclosed. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors. 9 figs.

  3. Unitary lens semiconductor device

    DOEpatents

    Lear, Kevin L.

    1997-01-01

    A unitary lens semiconductor device and method. The unitary lens semiconductor device is provided with at least one semiconductor layer having a composition varying in the growth direction for unitarily forming one or more lenses in the semiconductor layer. Unitary lens semiconductor devices may be formed as light-processing devices such as microlenses, and as light-active devices such as light-emitting diodes, photodetectors, resonant-cavity light-emitting diodes, vertical-cavity surface-emitting lasers, and resonant cavity photodetectors.

  4. Mechanical memory

    DOEpatents

    Gilkey, Jeffrey C.; Duesterhaus, Michelle A.; Peter, Frank J.; Renn, Rosemarie A.; Baker, Michael S.

    2006-08-15

    A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

  5. Mechanical memory

    DOEpatents

    Gilkey, Jeffrey C.; Duesterhaus, Michelle A.; Peter, Frank J.; Renn, Rosemarie A.; Baker, Michael S.

    2006-05-16

    A first-in-first-out (FIFO) microelectromechanical memory apparatus (also termed a mechanical memory) is disclosed. The mechanical memory utilizes a plurality of memory cells, with each memory cell having a beam which can be bowed in either of two directions of curvature to indicate two different logic states for that memory cell. The memory cells can be arranged around a wheel which operates as a clocking actuator to serially shift data from one memory cell to the next. The mechanical memory can be formed using conventional surface micromachining, and can be formed as either a nonvolatile memory or as a volatile memory.

  6. Detection of the insulating gap and conductive filament growth direction in resistive memories.

    PubMed

    Yalon, E; Karpov, I; Karpov, V; Riess, I; Kalaev, D; Ritter, D

    2015-10-07

    Filament growth is a key aspect in the operation of bipolar resistive random access memory (RRAM) devices, yet there are conflicting reports in the literature on the direction of growth of conductive filaments in valence change RRAM devices. We report here that an insulating gap between the filament and the semiconductor electrode can be detected by the metal-insulator-semiconductor bipolar transistor structure, and thus provide information on the filament growth direction. Using this technique, we show how voltage polarity and electrode chemistry control the filament growth direction during electro-forming. The experimental results and the nature of a gap between the filament and an electrode are discussed in light of possible models of filament formation.

  7. Coherent spectroscopy of semiconductors.

    PubMed

    Cundiff, Steven T

    2008-03-31

    The coherent optical response of semiconductors has been the subject of substantial research over the last couple of decades. The interest has been motivated by unique aspects of the interaction between light and semiconductors that are revealed by coherent techniques. The ability to probe the dynamics of charge carriers has been a significant driver. This paper presents a review of selected results in coherent optical spectroscopy of semiconductors.

  8. Semiconductor microcavity lasers

    SciTech Connect

    Gourley, P.L.; Wendt, J.R.; Vawter, G.A.; Warren, M.E.; Brennan, T.M.; Hammons, B.E.

    1994-02-01

    New kinds of semiconductor microcavity lasers are being created by modern semiconductor technologies like molecular beam epitaxy and electron beam lithography. These new microcavities exploit 3-dimensional architectures possible with epitaxial layering and surface patterning. The physical properties of these microcavities are intimately related to the geometry imposed on the semiconductor materials. Among these microcavities are surface-emitting structures which have many useful properties for commercial purposes. This paper reviews the basic physics of these microstructured lasers.

  9. Semiconductor bridge (SCB) detonator

    DOEpatents

    Bickes, Jr., Robert W.; Grubelich, Mark C.

    1999-01-01

    The present invention is a low-energy detonator for high-density secondary-explosive materials initiated by a semiconductor bridge igniter that comprises a pair of electrically conductive lands connected by a semiconductor bridge. The semiconductor bridge is in operational or direct contact with the explosive material, whereby current flowing through the semiconductor bridge causes initiation of the explosive material. Header wires connected to the electrically-conductive lands and electrical feed-throughs of the header posts of explosive devices, are substantially coaxial to the direction of current flow through the SCB, i.e., substantially coaxial to the SCB length.

  10. Semiconductor bridge (SCB) detonator

    DOEpatents

    Bickes, R.W. Jr.; Grubelich, M.C.

    1999-01-19

    The present invention is a low-energy detonator for high-density secondary-explosive materials initiated by a semiconductor bridge (SCB) igniter that comprises a pair of electrically conductive lands connected by a semiconductor bridge. The semiconductor bridge is in operational or direct contact with the explosive material, whereby current flowing through the semiconductor bridge causes initiation of the explosive material. Header wires connected to the electrically-conductive lands and electrical feed-throughs of the header posts of explosive devices, are substantially coaxial to the direction of current flow through the SCB, i.e., substantially coaxial to the SCB length. 3 figs.

  11. Interconnected semiconductor devices

    DOEpatents

    Grimmer, Derrick P.; Paulson, Kenneth R.; Gilbert, James R.

    1990-10-23

    Semiconductor layer and conductive layer formed on a flexible substrate, divided into individual devices and interconnected with one another in series by interconnection layers and penetrating terminals.

  12. Bipartite memory network architectures for parallel processing

    SciTech Connect

    Smith, W.; Kale, L.V. . Dept. of Computer Science)

    1990-01-01

    Parallel architectures are boradly classified as either shared memory or distributed memory architectures. In this paper, the authors propose a third family of architectures, called bipartite memory network architectures. In this architecture, processors and memory modules constitute a bipartite graph, where each processor is allowed to access a small subset of the memory modules, and each memory module allows access from a small set of processors. The architecture is particularly suitable for computations requiring dynamic load balancing. The authors explore the properties of this architecture by examining the Perfect Difference set based topology for the graph. Extensions of this topology are also suggested.

  13. Plated wire memory subsystem

    NASA Technical Reports Server (NTRS)

    Reynolds, L.; Tweed, H.

    1972-01-01

    The work performed entailed the design, development, construction and testing of a 4000 word by 18 bit random access, NDRO plated wire memory for use in conjunction with a spacecraft imput/output unit and central processing unit. The primary design parameters, in order of importance, were high reliability, low power, volume and weight. A single memory unit, referred to as a qualification model, was delivered.

  14. Molecular Semiconductors: An Introduction

    NASA Astrophysics Data System (ADS)

    de Mello, John; Halls, Jonathan James Michael

    2005-10-01

    Introducing the fundamental ideas and concepts behind organic semiconductors, this book provides a clear impression of the broad range of research activities currently underway. Aimed specifically at new entrant doctoral students from a wide variety of backgrounds, including chemistry, physics, electrical engineering and materials science, it also represents an ideal companion text to undergraduate courses in organic semiconductors.

  15. All-digital duty-cycle corrector with synchronous and high accuracy output for double date rate synchronous dynamic random-access memory application

    NASA Astrophysics Data System (ADS)

    Tsai, Chih-Wei; Lo, Yu-Lung; Chang, Chia-Chen; Liu, Han-Ying; Yang, Wei-Bin; Cheng, Kuo-Hsing

    2017-04-01

    A synchronous and highly accurate all-digital duty-cycle corrector (ADDCC), which uses simplified dual-loop architecture, is presented in this paper. To explain the operational principle, a detailed circuit description and formula derivation are provided. To verify the proposed design, a chip was fabricated through the 0.18-µm standard complementary metal oxide semiconductor process with a core area of 0.091 mm2. The measurement results indicate that the proposed ADDCC can operate between 300 and 600 MHz with an input duty-cycle range of 40–60%, and that the output duty-cycle error is less than 1% with a root-mean-square jitter of 3.86 ps.

  16. Plated wire memory subsystem

    NASA Technical Reports Server (NTRS)

    Carpenter, K. H.

    1974-01-01

    The design, construction, and test history of a 4096 word by 18 bit random access NDRO Plated Wire Memory for use in conjunction with a spacecraft input/output and central processing unit is reported. A technical and functional description is given along with diagrams illustrating layout and systems operation. Test data is shown on the procedures and results of system level and memory stack testing, and hybrid circuit screening. A comparison of the most significant physical and performance characteristics of the memory unit versus the specified requirements is also included.

  17. Overview of emerging nonvolatile memory technologies

    PubMed Central

    2014-01-01

    Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new

  18. Memories and NASA Spacecraft: A Description of Memories, Radiation Failure Modes, and System Design Considerations

    NASA Technical Reports Server (NTRS)

    LaBel, Kenneth A.; Ladbury, Ray; Oldhamm, Timothy

    2010-01-01

    As NASA has evolved it's usage of spaceflight computing, memory applications have followed as well. In this slide presentation, the history of NASA's memories from magnetic core and tape recorders to current semiconductor approaches is discussed. There is a brief description of current functional memory usage in NASA space systems followed by a description of potential radiation-induced failure modes along with considerations for reliable system design.

  19. Memory hierarchy using row-based compression

    DOEpatents

    Loh, Gabriel H.; O'Connor, James M.

    2016-10-25

    A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

  20. Remembering, imagining, false memories & personal meanings.

    PubMed

    Conway, Martin A; Loveday, Catherine

    2015-05-01

    The Self-Memory System encompasses the working self, autobiographical memory and episodic memory. Specific autobiographical memories are patterns of activation over knowledge structures in autobiographical and episodic memory brought about by the activating effect of cues. The working self can elaborate cues based on the knowledge they initially activate and so control the construction of memories of the past and the future. It is proposed that such construction takes place in the remembering-imagining system - a window of highly accessible recent memories and simulations of near future events. How this malfunctions in various disorders is considered as are the implication of what we term the modern view of human memory for notions of memory accuracy. We show how all memories are to some degree false and that the main role of memories lies in generating personal meanings.

  1. CROSS-DISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY: Simulation of SET Operation in Phase-Change Random Access Memories with Heater Addition and Ring-Type Contactor for Low-Power Consumption by Finite Element Modeling

    NASA Astrophysics Data System (ADS)

    Gong, Yue-Feng; Song, Zhi-Tang; Ling, Yun; Liu, Yan; Feng, Song-Lin

    2009-11-01

    A three-dimensional finite element model for phase change random access memory (PCRAM) is established for comprehensive electrical and thermal analysis during SET operation. The SET behaviours of the heater addition structure (HS) and the ring-type contact in bottom electrode (RIB) structure are compared with each other. There are two ways to reduce the RESET current, applying a high resistivity interfacial layer and building a new device structure. The simulation results indicate that the variation of SET current with different power reduction ways is little. This study takes the RESET and SET operation current into consideration, showing that the RIB structure PCRAM cell is suitable for future devices with high heat efficiency and high-density, due to its high heat efficiency in RESET operation.

  2. Influence of carbon content on the copper-telluride phase formation and on the resistive switching behavior of carbon alloyed Cu-Te conductive bridge random access memory cells

    SciTech Connect

    Devulder, Wouter De Schutter, Bob; Detavernier, Christophe; Opsomer, Karl; Franquet, Alexis; Meersschaut, Johan; Muller, Robert; Van Elshocht, Sven; Jurczak, Malgorzata; Goux, Ludovic; Belmonte, Attilio

    2014-02-07

    In this paper, we investigate the influence of the carbon content on the Cu-Te phase formation and on the resistive switching behavior in carbon alloyed Cu{sub 0.6}Te{sub 0.4} based conductive bridge random access memory (CBRAM) cells. Carbon alloying of copper-tellurium inhibits the crystallization, while attractive switching behavior is preserved when using the material as Cu-supply layer in CBRAM cells. The phase formation is first investigated in a combinatorial way. With increasing carbon content, an enlargement of the temperature window in which the material stays amorphous was observed. Moreover, if crystalline phases are formed, subsequent phase transformations are inhibited. The electrical switching behavior of memory cells with different carbon contents is then investigated by implementing them in 580 μm diameter dot TiN/Cu{sub 0.6}Te{sub 0.4}-C/Al{sub 2}O{sub 3}/Si memory cells. Reliable switching behavior is observed for carbon contents up to 40 at. %, with a resistive window of more than 2 orders of magnitude, whereas for 50 at. % carbon, a higher current in the off state and only a small resistive window are present after repeated cycling. This degradation can be ascribed to the higher thermal and lower drift contribution to the reset operation due to a lower Cu affinity towards the supply layer, leading cycle-after-cycle to an increasing amount of Cu in the switching layer, which contributes to the current. The thermal diffusion of Cu into Al{sub 2}O{sub 3} under annealing also gives an indication of the Cu affinity of the source layer. Time of flight secondary ion mass spectroscopy was used to investigate this migration depth in Al{sub 2}O{sub 3} before and after annealing, showing a higher Cu, Te, and C migration for high carbon contents.

  3. Memory Matters

    MedlinePlus

    ... different parts. Some of them are important for memory. The hippocampus (say: hih-puh-KAM-pus) is one of the more important parts of the brain that processes memories. Old information and new information, or memories, are ...

  4. Resistive switching characteristics and mechanisms in silicon oxide memory devices

    NASA Astrophysics Data System (ADS)

    Chang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Zhou, Fei; Wu, Xiaohan; Chen, Yen-Ting; Wang, Yanzhen; Xue, Fei; Lee, Jack C.

    2016-05-01

    Intrinsic unipolar SiOx-based resistance random access memories (ReRAM) characterization, switching mechanisms, and applications have been investigated. Device structures, material compositions, and electrical characteristics are identified that enable ReRAM cells with high ON/OFF ratio, low static power consumption, low switching power, and high readout-margin using complementary metal-oxide semiconductor transistor (CMOS)-compatible SiOx-based materials. These ideas are combined with the use of horizontal and vertical device structure designs, composition optimization, electrical control, and external factors to help understand resistive switching (RS) mechanisms. Measured temperature effects, pulse response, and carrier transport behaviors lead to compact models of RS mechanisms and energy band diagrams in order to aid the development of computer-aided design for ultralarge-v scale integration. This chapter presents a comprehensive investigation of SiOx-based RS characteristics and mechanisms for the post-CMOS device era.

  5. Demystifying the Beginnings of Memory

    ERIC Educational Resources Information Center

    Howe, Mark L.; Courage, Mary L.

    2004-01-01

    A longstanding issue in psychology has been, When does human memory begin? More particularly, when do we begin to remember personal experiences in a way that makes them accessible to recollection later in life? Current popular and scientific thinking would have us believe that memories are possible not only at the time of our birth, but also in…

  6. EDITORIAL: Oxide semiconductors

    NASA Astrophysics Data System (ADS)

    Kawasaki, M.; Makino, T.

    2005-04-01

    Blue or ultraviolet semiconducting light-emitting diodes have the potential to revolutionize illumination systems in the near-future. Such industrial need has propelled the investigation of several wide-gap semiconducting materials in recent years. Commercial applications include blue lasers for DVD memory and laser printers, while military applications are also expected. Most of the material development has so far been focused on GaN (band gap 3.5 eV at 2 K), and ZnSe (2.9 eV) because these two representative direct transition semiconductors are known to be bright emitting sources. GaN and GaN-based alloys are emerging as the winners in this field because ZnSe is subject to defect formation under high current drive. On the other hand, another II-VI compound, ZnO, has also excited substantial interest in the optoelectronics-oriented research communities because it is the brightest emitter of all, owing to the fact that its excitons have a 60 meV binding energy. This is compared with 26 meV for GaN and 20 meV for ZnSe. The stable excitons could lead to laser action based on their recombination even at temperatures well above room temperature. ZnO has additional major properties that are more advantageous than other wide-gap materials: availability of large area substrates, higher energy radiation stability, environmentally-friendly ingredients, and amenability to wet chemical etching. However, ZnO is not new to the semiconductor field as exemplified by several studies made during the 1960s on structural, vibrational, optical and electrical properties (Mollwo E 1982 Landolt-Boernstein New Series vol 17 (Berlin: Springer) p 35). In terms of devices, the luminescence from light-emitting diode structures was demonstrated in which Cu2O was used as the p-type material (Drapak I T 1968 Semiconductors 2 624). The main obstacle to the development of ZnO has been the lack of reproducible p-type ZnO. The possibility of achieving epitaxial p-type layers with the aid of thermal

  7. Thin films in silicon carbide semiconductor devices

    NASA Astrophysics Data System (ADS)

    Ostling, Mikael; Koo, Sang-Mo; Lee, Sang-Kwon; Zetterling, Carl-Mikael; Grishin, Alexander

    2004-12-01

    Silicon carbide (SiC) semiconductor devices have been established during the last decade as very useful high power, high speed and high temperature devices because of their inherent outstanding semiconductor materials properties. Due to its large band gap, SiC possesses a very high breakdown field and low intrinsic carrier concentration, which accordingly makes high voltage and high temperature operation possible. SiC is also suitable for high frequency device applications, because of the high saturation drift velocity and low permittivity. Thin film technology for various functions in the devices has been heavily researched. Suitable thin film technologies for Ohmic and low-resistive contact formation, passivation and new functionality utilizing ferroelectric materials have been developed. In ferroelectrics, the spontaneous polarization can be switched by an externally applied electric field, and thus are attractive for non-volatile memory and sensor applications. A novel integration of Junction-MOSFETs (JMOSFETs) and Nonvolatile FETs (NVFETs) on a single 4H-SiC substrate is realized. SiC JMOSFET controls the drain current effectively from the buried junction gate thereby allowing for a constant current level at elevated temperatures. SiC NVFET has similar functions with non-volatile memory capability due to ferroelectric gate stack, which operated up to 300°C with memory function retained up to 200°C.

  8. Modeling of SONOS Memory Cell Erase Cycle

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeod, Todd C.; Ho, Fat H.

    2011-01-01

    Utilization of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile semiconductor memories as a flash memory has many advantages. These electrically erasable programmable read-only memories (EEPROMs) utilize low programming voltages, have a high erase/write cycle lifetime, are radiation hardened, and are compatible with high-density scaled CMOS for low power, portable electronics. In this paper, the SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. Comparisons were made between the model predictions and experimental data.

  9. Modeling of Sonos Memory Cell Erase Cycle

    NASA Technical Reports Server (NTRS)

    Phillips, Thomas A.; MacLeond, Todd C.; Ho, Fat D.

    2010-01-01

    Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

  10. Special Issue featuring invited articles arising from UK Semiconductors 2012

    NASA Astrophysics Data System (ADS)

    Clarke, Edmund; Wada, Osamu

    2013-07-01

    Semiconductor research has formed the basis of many technological advances over the past 50 years, and the field is still highly active, as new material systems and device concepts are developed to address new applications or operating conditions. In addition to the development of traditional semiconductor devices, the wealth of experience with these materials also allows their use as an ideal environment for testing new physics, leading to new classes of devices exploiting quantum mechanical effects that can also benefit from the advantages of existing semiconductor technology in scalability, compactness and ease of mass production. This special issue features papers arising from the UK Semiconductors 2012 Conference, held at the University of Sheffield. The annual conference covers all aspects of semiconductor research, from crystal growth, through investigations of the physics of semiconductor structures to realization of semiconductor devices and their application in emerging technologies. The 2012 conference featured over 150 presentations, including plenary sessions on interband cascade lasers for the 3-6 µm spectral band, efficient single photon sources based on InAs quantum dots embedded in GaAs photonic nanowires, nitride-based quantum dot visible lasers and single photon sources, and engineering of organic light-emitting diodes. The seven papers collected here highlight current research advances, taken from across the scope of the conference. The papers feature growth of novel nitride-antimonide material systems for mid-infrared sources and detectors, use of semiconductor nanostructures for charge-based memory and visible lasers, optimization of device structures either to reduce losses in solar cells or achieve low noise amplification in transistors, design considerations for surface-emitting lasers incorporating photonic crystals and an assessment of laser power convertors for power transfer. The editors of this special issue and the conference

  11. Negative refraction in semiconductor metamaterials.

    PubMed

    Hoffman, Anthony J; Alekseyev, Leonid; Howard, Scott S; Franz, Kale J; Wasserman, Dan; Podolskiy, Viktor A; Narimanov, Evgenii E; Sivco, Deborah L; Gmachl, Claire

    2007-12-01

    An optical metamaterial is a composite in which subwavelength features, rather than the constituent materials, control the macroscopic electromagnetic properties of the material. Recently, properly designed metamaterials have garnered much interest because of their unusual interaction with electromagnetic waves. Whereas nature seems to have limits on the type of materials that exist, newly invented metamaterials are not bound by such constraints. These newly accessible electromagnetic properties make these materials an excellent platform for demonstrating unusual optical phenomena and unique applications such as subwavelength imaging and planar lens design. 'Negative-index materials', as first proposed, required the permittivity, epsilon, and permeability, mu, to be simultaneously less than zero, but such materials face limitations. Here, we demonstrate a comparatively low-loss, three-dimensional, all-semiconductor metamaterial that exhibits negative refraction for all incidence angles in the long-wave infrared region and requires only an anisotropic dielectric function with a single resonance. Using reflection and transmission measurements and a comprehensive model of the material, we demonstrate that our material exhibits negative refraction. This is furthermore confirmed through a straightforward beam optics experiment. This work will influence future metamaterial designs and their incorporation into optical semiconductor devices.

  12. Semiconductor Solar Superabsorbers

    PubMed Central

    Yu, Yiling; Huang, Lujun; Cao, Linyou

    2014-01-01

    Understanding the maximal enhancement of solar absorption in semiconductor materials by light trapping promises the development of affordable solar cells. However, the conventional Lambertian limit is only valid for idealized material systems with weak absorption, and cannot hold for the typical semiconductor materials used in solar cells due to the substantial absorption of these materials. Herein we theoretically demonstrate the maximal solar absorption enhancement for semiconductor materials and elucidate the general design principle for light trapping structures to approach the theoretical maximum. By following the principles, we design a practical light trapping structure that can enable an ultrathin layer of semiconductor materials, for instance, 10 nm thick a-Si, absorb > 90% sunlight above the bandgap. The design has active materials with one order of magnitude less volume than any of the existing solar light trapping designs in literature. This work points towards the development of ultimate solar light trapping techniques. PMID:24531211

  13. Isotopically controlled semiconductors

    SciTech Connect

    Haller, E.E.

    2004-11-15

    A review of recent research involving isotopically controlled semiconductors is presented. Studies with isotopically enriched semiconductor structures experienced a dramatic expansion at the end of the Cold War when significant quantities of enriched isotopes of elements forming semiconductors became available for worldwide collaborations. Isotopes of an element differ in nuclear mass, may have different nuclear spins and undergo different nuclear reactions. Among the latter, the capture of thermal neutrons which can lead to neutron transmutation doping, can be considered the most important one for semiconductors. Experimental and theoretical research exploiting the differences in all the properties has been conducted and will be illustrated with selected examples. Manuel Cardona, the longtime editor-in-chief of Solid State Communications has been and continues to be one of the major contributors to this field of solid state physics and it is a great pleasure to dedicate this review to him.

  14. Enhancing Memory in Your Students: COMPOSE Yourself!

    ERIC Educational Resources Information Center

    Rotter, Kathleen M.

    2009-01-01

    The essence of teaching is, in fact, creating new memories for your students. The teacher's role is to help students store the correct information (memories) in ways that make recall and future access and use likely. Therefore, choosing techniques to enhance memory is possibly the most critical aspect of instructional design. COMPOSE is an acronym…

  15. Semiconductor Nanocrystal Photonics

    DTIC Science & Technology

    2005-08-31

    D. Krauss, C. B. Poitras, and M. Lipson, " Energy transfer between colloidal semiconductor quantum dots in an optical microcavity," (submitted, 2006...Phys. Lett. 82, 4032 (2003). J. J. Peterson and T. D. Krauss, "Fluorescence Spectroscopy of Single Lead Sulfide Quantum Dots ," Nano Lett. (in press...Guo, Xiaowei Teng, Hong Yang, Todd D. Krauss, Carl B. Poitras, and Michal Lipson, "Enhanced Energy Transfer between Colloidal Semiconductor Quantum

  16. SILICON CARBIDE FOR SEMICONDUCTORS

    DTIC Science & Technology

    This state-of-the-art survey on silicon carbide for semiconductors includes a bibliography of the most important references published as of the end...of 1964. The various methods used for growing silicon carbide single crystals are reviewed, as well as their properties and devices fabricated from...them. The fact that the state of-the-art of silicon carbide semiconductors is not further advanced may be attributed to the difficulties of growing

  17. Memory Loss and Retrieval

    ERIC Educational Resources Information Center

    Reid, Ian

    2016-01-01

    Underlying the generally oblivious attitude of teachers and learners towards the past is insufficient respect for the role of memory in giving meaning to experience and access to knowledge. We shape our identity by making sense of our past and its relationship to present and future selves, a process that should be intensively cultivated when we…

  18. PREFACE: Emerging non-volatile memories: magnetic and resistive technologies Emerging non-volatile memories: magnetic and resistive technologies

    NASA Astrophysics Data System (ADS)

    Dieny, B.; Jagadish, Chennupati

    2013-02-01

    In 2010, the International Technology Roadmap for Semiconductors (ITRS) published an assessment of the potential and maturity of selected emerging research on memory technologies. Eight different technologies of non-volatile memories were compared (ferroelectric gate field-effect transistor, nano-electro-mechanical switch, spin-transfer torque random access memories (STTRAM), various types of resistive RAM, in particular redox RAM, nanothermal phase change RAM, electronic effects RAM, macromolecular memories and molecular RAM). In this report, spin-transfer torque MRAM and redox RRAM were identified as two emerging memory technologies recommended for accelerated research and development leading to scaling and commercialization of non-volatile RAM to and beyond the 16nm generation. Nowadays, there is an intense research and development effort in microelectronics on these two technologies, one based on spintronic phenomena (tunnel magnetoresistance and spin-transfer torque), the other based on migration of vacancies or ions in an insulating matrix driven by oxydo-reduction potentials. Both technologies could be used for standalone or embedded applications. In this context, it appeared timely to publish a cluster of review articles related to these two technologies. In this cluster, the first two articles introduce the general principles of spin-transfer torque RAM and of thermally assisted RAM. The third presents a broader range of applications for this integrated CMOS/magnetic tunnel junction technology for low-power electronics. The fourth paper presents more advanced research on voltage control of magnetization switching with the aim of dramatically reducing the write energy in MRAM. The last two papers deal with two categories of resistive RAM, one based on the migration of cations, the other one based on nanowires. We thank all the authors and reviewers for their contribution to this cluster issue. Our special thanks are due to Dr Olivia Roche, Publisher, and Dr

  19. Magnetic vortex racetrack memory

    NASA Astrophysics Data System (ADS)

    Geng, Liwei D.; Jin, Yongmei M.

    2017-02-01

    We report a new type of racetrack memory based on current-controlled movement of magnetic vortices in magnetic nanowires with rectangular cross-section and weak perpendicular anisotropy. Data are stored through the core polarity of vortices and each vortex carries a data bit. Besides high density, non-volatility, fast data access, and low power as offered by domain wall racetrack memory, magnetic vortex racetrack memory has additional advantages of no need for constrictions to define data bits, changeable information density, adjustable current magnitude for data propagation, and versatile means of ultrafast vortex core switching. By using micromagnetic simulations, current-controlled motion of magnetic vortices in cobalt nanowire is demonstrated for racetrack memory applications.

  20. ISDC Data Access Layer

    NASA Astrophysics Data System (ADS)

    Jennings, D.; Borkowski, J.; Contessi, T.; Lock, T.; Rohlfs, R.; Walter, R.

    The ISDC Data Access Layer (DAL) is an ANSI C and \\fortran 90 compatible library under development in support of the ESA INTEGRAL mission data analysis software. DALs primary purpose is to isolate the analysis software from the specifics of the data formats while at the same time providing new data abstraction and access capabilities. DAL supports the creation and manipulation of hierarchical data sets which may span multiple files and, in theory, multiple computer systems. A number of Application Programming Interfaces (APIs) are supported by DAL that allow software to view and access data at different levels of complexity. DAL also allows data sets to reside on disk, in conventional memory or in shared memory in a way that is transparent to the user/application.

  1. Novel room temperature ferromagnetic semiconductors

    SciTech Connect

    Gupta, Amita

    2004-06-01

    Today's information world, bits of data are processed by semiconductor chips, and stored in the magnetic disk drives. But tomorrow's information technology may see magnetism (spin) and semiconductivity (charge) combined in one 'spintronic' device that exploits both charge and 'spin' to carry data (the best of two worlds). Spintronic devices such as spin valve transistors, spin light emitting diodes, non-volatile memory, logic devices, optical isolators and ultra-fast optical switches are some of the areas of interest for introducing the ferromagnetic properties at room temperature in a semiconductor to make it multifunctional. The potential advantages of such spintronic devices will be higher speed, greater efficiency, and better stability at a reduced power consumption. This Thesis contains two main topics: In-depth understanding of magnetism in Mn doped ZnO, and our search and identification of at least six new above room temperature ferromagnetic semiconductors. Both complex doped ZnO based new materials, as well as a number of nonoxides like phosphides, and sulfides suitably doped with Mn or Cu are shown to give rise to ferromagnetism above room temperature. Some of the highlights of this work are discovery of room temperature ferromagnetism in: (1) ZnO:Mn (paper in Nature Materials, Oct issue, 2003); (2) ZnO doped with Cu (containing no magnetic elements in it); (3) GaP doped with Cu (again containing no magnetic elements in it); (4) Enhancement of Magnetization by Cu co-doping in ZnO:Mn; (5) CdS doped with Mn, and a few others not reported in this thesis. We discuss in detail the first observation of ferromagnetism above room temperature in the form of powder, bulk pellets, in 2-3 mu-m thick transparent pulsed laser deposited films of the Mn (<4 at. percent) doped ZnO. High-resolution transmission electron microscopy (HRTEM) and electron energy loss spectroscopy (EELS) spectra recorded from 2 to 200nm areas showed homogeneous distribution of Mn substituting

  2. Finite Memory Model for Haptic Recognition

    DTIC Science & Technology

    1991-12-01

    Slot 4 bu f fer s hort- term storel Slot N Long- ’erm store The model of memory proposed by Atkinson and Shiffrin . Primary memory here is as rehearsal...7 NAVAL POSTGRADUATE SCHOOL Monterey, Califormia AD-A245 342 THESIS Finite Memory Model for Haptic Recognition by Philip G. Beieri December 1991...ELEMEN1 No.) NO. No. ACCESSION NO. I1. TITLE (include Securitn Classification) FINITE MEMORY MODEL FOR HAPTIC RECOGNITION’ 12. PERSONALEAUTHOR(S) Philip

  3. Implementing a bubble memory hierarchy system

    NASA Technical Reports Server (NTRS)

    Segura, R.; Nichols, C. D.

    1979-01-01

    This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

  4. Method of doping a semiconductor

    DOEpatents

    Yang, Chiang Y.; Rapp, Robert A.

    1983-01-01

    A method for doping semiconductor material. An interface is established between a solid electrolyte and a semiconductor to be doped. The electrolyte is chosen to be an ionic conductor of the selected impurity and the semiconductor material and electrolyte are jointly chosen so that any compound formed from the impurity and the semiconductor will have a free energy no lower than the electrolyte. A potential is then established across the interface so as to allow the impurity ions to diffuse into the semiconductor. In one embodiment the semiconductor and electrolyte may be heated so as to increase the diffusion coefficient.

  5. Bio Organic-Semiconductor Field-Effect Transistor (BioFET) Based on Deoxyribonucleic Acid (DNA) Gate Dielectric

    DTIC Science & Technology

    2010-03-31

    floating gate devices and metal-insulator-oxide-semiconductor (MIOS) devices. First attempts to use polarizable gate insulators in combination with...organic semiconductors. The field effect transistors showed floating gate effects, but the potential for organic memories was not realized. Recently...

  6. Memory characteristics of Co nanocrystal memory device with HfO2 as blocking oxide

    NASA Astrophysics Data System (ADS)

    Yang, F. M.; Chang, T. C.; Liu, P. T.; Yeh, P. H.; Yu, Y. C.; Lin, J. Y.; Sze, S. M.; Lou, J. C.

    2007-03-01

    In this letter, the Co nanocrystals using SiO2 and HfO2 as the tunneling and the control dielectric with memory effect has been fabricated. A significant memory effect was observed through the electrical measurements. Under the low voltage operation of 5V, the memory window was estimated to ˜1V. The retention characteristics were tested to be robust. Also, the endurance of the memory device was not degraded up to 106 write/erase cycles. The processing of the structure is compatible with the current manufacturing technology of semiconductor industry.

  7. Nanoporous silicon oxide memory.

    PubMed

    Wang, Gunuk; Yang, Yang; Lee, Jae-Hwang; Abramova, Vera; Fei, Huilong; Ruan, Gedeng; Thomas, Edwin L; Tour, James M

    2014-08-13

    Oxide-based two-terminal resistive random access memory (RRAM) is considered one of the most promising candidates for next-generation nonvolatile memory. We introduce here a new RRAM memory structure employing a nanoporous (NP) silicon oxide (SiOx) material which enables unipolar switching through its internal vertical nanogap. Through the control of the stochastic filament formation at low voltage, the NP SiOx memory exhibited an extremely low electroforming voltage (∼ 1.6 V) and outstanding performance metrics. These include multibit storage ability (up to 9-bits), a high ON-OFF ratio (up to 10(7) A), a long high-temperature lifetime (≥ 10(4) s at 100 °C), excellent cycling endurance (≥ 10(5)), sub-50 ns switching speeds, and low power consumption (∼ 6 × 10(-5) W/bit). Also provided is the room temperature processability for versatile fabrication without any compliance current being needed during electroforming or switching operations. Taken together, these metrics in NP SiOx RRAM provide a route toward easily accessed nonvolatile memory applications.

  8. Memory, language, and ageing.

    PubMed Central

    Burke, D M; Mackay, D G

    1997-01-01

    This overview provides both theoretical and empirical reasons for emphasizing practice and familiar skills as a practical strategy for enhancing cognitive functioning in old age. Our review of empirical research on age-related changes in memory and language reveals a consistent pattern of spared and impaired abilities in normal old age. Relatively preserved in old age is memory performance involving highly practised skills and familiar information, including factual, semantic and autobiographical information. Relatively impaired in old age is memory performance that requires the formation of new connections, for example, recall of recent autobiographical experiences, new facts or the source of newly acquired facts. This pattern of impaired new learning versus preserved old learning cuts across distinctions between semantic memory, episodic memory, explicit memory and perhaps also implicit memory. However, familiar verbal information is not completely preserved when accessed on the output side rather than the input side: aspects of language production, namely word finding and spelling, exhibit significant age-related declines. This emerging pattern of preserved and impaired abilities presents a fundamental challenge for theories of cognitive ageing, which must explain why some aspects of language and memory are more vulnerable to the effects of ageing than others. Information-universal theories, involving mechanisms such as general slowing that are independent of the type or structure of the information being processed, require additional mechanisms to account for this pattern of cognitive aging. Information-specific theories, where the type or structure of the postulated memory units can influence the effects of cognitive ageing, are able to account for this emerging pattern, but in some cases require further development to account for comprehensive cognitive changes such as general slowing. PMID:9460069

  9. Motivated recruitment of autobiographical memories.

    PubMed

    Sanitioso, R; Kunda, Z; Fong, G T

    1990-08-01

    We hypothesized that people motivated to believe that they possess a given trait search for autobiographical memories that reflect that trait, so as to justify their desired self-view. We led subjects to believe that either extraversion or introversion was desirable, and obtained convergent evidence from open-ended memory-listing tasks as well as from reaction-time tasks measuring the speed with which memories could be generated that this manipulation enhanced the accessibility of memories reflecting the desired trait. If people rely on their memories to construct desired self-concepts, motivated changes in self-concepts should be constrained by the content of available memories. Our final study demonstrates such constraints.

  10. A Pilot Memory Café for People with Learning Disabilities and Memory Difficulties

    ERIC Educational Resources Information Center

    Kiddle, Hannah; Drew, Neil; Crabbe, Paul; Wigmore, Jonathan

    2016-01-01

    Memory cafés have been found to normalise experiences of dementia and provide access to an accepting social network. People with learning disabilities are at increased risk of developing dementia, but the possible benefits of attending a memory café are not known. This study evaluates a 12-week pilot memory café for people with learning…

  11. Accessing global data from accelerator devices

    DOEpatents

    Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.

    2016-12-06

    An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.

  12. Semiconductor surface protection material

    NASA Technical Reports Server (NTRS)

    Packard, R. D. (Inventor)

    1973-01-01

    A method and a product for protecting semiconductor surfaces is disclosed. The protective coating material is prepared by heating a suitable protective resin with an organic solvent which is solid at room temperature and converting the resulting solution into sheets by a conventional casting operation. Pieces of such sheets of suitable shape and thickness are placed on the semiconductor areas to be coated and heat and vacuum are then applied to melt the sheet and to drive off the solvent and cure the resin. A uniform adherent coating, free of bubbles and other defects, is thus obtained exactly where it is desired.

  13. Quantum Transport in Semiconductors

    DTIC Science & Technology

    1991-10-01

    SRS i 91 4. TITLE AND SUBTITLE Quantum Transport in Semiconductors 5. FUNDING NUMBER söMtos-rizk-ooss 6. AUTHOR(S) D. K. Ferry ©fte ELECTE...OF ABSTRACT UL NSN 7540-01-280-5500 O 1 9 Standard Form 298 (Rev. 2-89) Presented by ANSI Std «9-18 298-102 Final Report Quantum Transport in... Quantum Transport in Semiconductor Devices This final report describes a program of research investigating quantum effects which become important in

  14. GUARD RING SEMICONDUCTOR JUNCTION

    DOEpatents

    Goulding, F.S.; Hansen, W.L.

    1963-12-01

    A semiconductor diode having a very low noise characteristic when used under reverse bias is described. Surface leakage currents, which in conventional diodes greatly contribute to noise, are prevented from mixing with the desired signal currents. A p-n junction is formed with a thin layer of heavily doped semiconductor material disposed on a lightly doped, physically thick base material. An annular groove cuts through the thin layer and into the base for a short distance, dividing the thin layer into a peripheral guard ring that encircles the central region. Noise signal currents are shunted through the guard ring, leaving the central region free from such currents. (AEC)

  15. New unorthodox semiconductor devices

    NASA Astrophysics Data System (ADS)

    Board, K.

    1985-12-01

    A range of new semiconductor devices, including a number of structures which rely entirely upon new phenomena, are discussed. Unipolar two-terminal devices, including impurity-controlled barriers and graded composition barriers, are considered, as are new transistor structures, including the hot-electron camel transistor, the planar-doped barrier transistor, the thermionic emission transistor, and the permeable base transistor. Regenerative switching devices are addressed, including the metal-tunnel insulator-semiconductor switch, the polysilicon switch, MIS, and MISIM switching structures, and the triangular-barrier switch. Heterostructure devices are covered, including the heterojunction bipolar transistor, the selectively doped heterojunction transistor, heterojunction lasers, and quantum-well structures.

  16. Single-Cell Semiconductor Sequencing

    PubMed Central

    Kohn, Andrea B.; Moroz, Tatiana P.; Barnes, Jeffrey P.; Netherton, Mandy; Moroz, Leonid L.

    2014-01-01

    RNA-seq or transcriptome analysis of individual cells and small-cell populations is essential for virtually any biomedical field. It is especially critical for developmental, aging, and cancer biology as well as neuroscience where the enormous heterogeneity of cells present a significant methodological and conceptual challenge. Here we present two methods that allow for fast and cost-efficient transcriptome sequencing from ultra-small amounts of tissue or even from individual cells using semiconductor sequencing technology (Ion Torrent, Life Technologies). The first method is a reduced representation sequencing which maximizes capture of RNAs and preserves transcripts’ directionality. The second, a template-switch protocol, is designed for small mammalian neurons. Both protocols, from cell/tissue isolation to final sequence data, take up to 4 days. The efficiency of these protocols has been validated with single hippocampal neurons and various invertebrate tissues including individually identified neurons within a simpler memory-forming circuit of Aplysia californica and early (1-, 2-, 4-, 8-cells) embryonic and developmental stages from basal metazoans. PMID:23929110

  17. Bubble memory module for spacecraft application

    NASA Technical Reports Server (NTRS)

    Hayes, P. J.; Looney, K. T.; Nichols, C. D.

    1985-01-01

    Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

  18. Emerging memories: resistive switching mechanisms and current status.

    PubMed

    Jeong, Doo Seok; Thomas, Reji; Katiyar, R S; Scott, J F; Kohlstedt, H; Petraru, A; Hwang, Cheol Seong

    2012-07-01

    The resistance switching behaviour of several materials has recently attracted considerable attention for its application in non-volatile memory (NVM) devices, popularly described as resistive random access memories (RRAMs). RRAM is a type of NVM that uses a material(s) that changes the resistance when a voltage is applied. Resistive switching phenomena have been observed in many oxides: (i) binary transition metal oxides (TMOs), e.g. TiO(2), Cr(2)O(3), FeO(x) and NiO; (ii) perovskite-type complex TMOs that are variously functional, paraelectric, ferroelectric, multiferroic and magnetic, e.g. (Ba,Sr)TiO(3), Pb(Zr(x) Ti(1-x))O(3), BiFeO(3) and Pr(x)Ca(1-x)MnO(3); (iii) large band gap high-k dielectrics, e.g. Al(2)O(3) and Gd(2)O(3); (iv) graphene oxides. In the non-oxide category, higher chalcogenides are front runners, e.g. In(2)Se(3) and In(2)Te(3). Hence, the number of materials showing this technologically interesting behaviour for information storage is enormous. Resistive switching in these materials can form the basis for the next generation of NVM, i.e. RRAM, when current semiconductor memory technology reaches its limit in terms of density. RRAMs may be the high-density and low-cost NVMs of the future. A review on this topic is of importance to focus concentration on the most promising materials to accelerate application into the semiconductor industry. This review is a small effort to realize the ambitious goal of RRAMs. Its basic focus is on resistive switching in various materials with particular emphasis on binary TMOs. It also addresses the current understanding of resistive switching behaviour. Moreover, a brief comparison between RRAMs and memristors is included. The review ends with the current status of RRAMs in terms of stability, scalability and switching speed, which are three important aspects of integration onto semiconductors.

  19. Emerging memories: resistive switching mechanisms and current status

    NASA Astrophysics Data System (ADS)

    Jeong, Doo Seok; Thomas, Reji; Katiyar, R. S.; Scott, J. F.; Kohlstedt, H.; Petraru, A.; Hwang, Cheol Seong

    2012-07-01

    The resistance switching behaviour of several materials has recently attracted considerable attention for its application in non-volatile memory (NVM) devices, popularly described as resistive random access memories (RRAMs). RRAM is a type of NVM that uses a material(s) that changes the resistance when a voltage is applied. Resistive switching phenomena have been observed in many oxides: (i) binary transition metal oxides (TMOs), e.g. TiO2, Cr2O3, FeOx and NiO; (ii) perovskite-type complex TMOs that are variously functional, paraelectric, ferroelectric, multiferroic and magnetic, e.g. (Ba,Sr)TiO3, Pb(Zrx Ti1-x)O3, BiFeO3 and PrxCa1-xMnO3 (iii) large band gap high-k dielectrics, e.g. Al2O3 and Gd2O3; (iv) graphene oxides. In the non-oxide category, higher chalcogenides are front runners, e.g. In2Se3 and In2Te3. Hence, the number of materials showing this technologically interesting behaviour for information storage is enormous. Resistive switching in these materials can form the basis for the next generation of NVM, i.e. RRAM, when current semiconductor memory technology reaches its limit in terms of density. RRAMs may be the high-density and low-cost NVMs of the future. A review on this topic is of importance to focus concentration on the most promising materials to accelerate application into the semiconductor industry. This review is a small effort to realize the ambitious goal of RRAMs. Its basic focus is on resistive switching in various materials with particular emphasis on binary TMOs. It also addresses the current understanding of resistive switching behaviour. Moreover, a brief comparison between RRAMs and memristors is included. The review ends with the current status of RRAMs in terms of stability, scalability and switching speed, which are three important aspects of integration onto semiconductors.

  20. Memory Matters

    MedlinePlus

    ... blood vessel (which carries the blood) bursts. continue Brain Injuries Affect Memory At any age, an injury to ... with somebody's memory. Some people who recover from brain injuries need to learn old things all over again, ...

  1. Architectures for Improved Organic Semiconductor Devices

    NASA Astrophysics Data System (ADS)

    Beck, Jonathan H.

    Advancements in the microelectronics industry have brought increasing performance and decreasing prices to a wide range of users. Conventional silicon-based electronics have followed Moore's law to provide an ever-increasing integrated circuit transistor density, which drives processing power, solid-state memory density, and sensor technologies. As shrinking conventional integrated circuits became more challenging, researchers began exploring electronics with the potential to penetrate new applications with a low price of entry: "Electronics everywhere." The new generation of electronics is thin, light, flexible, and inexpensive. Organic electronics are part of the new generation of thin-film electronics, relying on the synthetic flexibility of carbon molecules to create organic semiconductors, absorbers, and emitters which perform useful tasks. Organic electronics can be fabricated with low energy input on a variety of novel substrates, including inexpensive plastic sheets. The potential ease of synthesis and fabrication of organic-based devices means that organic electronics can be made at very low cost. Successfully demonstrated organic semiconductor devices include photovoltaics, photodetectors, transistors, and light emitting diodes. Several challenges that face organic semiconductor devices are low performance relative to conventional devices, long-term device stability, and development of new organic-compatible processes and materials. While the absorption and emission performance of organic materials in photovoltaics and light emitting diodes is extraordinarily high for thin films, the charge conduction mobilities are generally low. Building highly efficient devices with low-mobility materials is one challenge. Many organic semiconductor films are unstable during fabrication, storage, and operation due to reactions with water, oxygen and hydroxide. A final challenge facing organic electronics is the need for new processes and materials for electrodes

  2. 0.6-1.0 V operation set/reset voltage (3 V) generator for three-dimensional integrated resistive random access memory and NAND flash hybrid solid-state drive

    NASA Astrophysics Data System (ADS)

    Tanaka, Masahiro; Hachiya, Shogo; Ishii, Tomoya; Ning, Sheyang; Tsurumi, Kota; Takeuchi, Ken

    2016-04-01

    A 0.6-1.0 V, 25.9 mm2 boost converter is proposed to generate resistive random access memory (ReRAM) write (set/reset) voltage for three-dimensional (3D) integrated ReRAM and NAND flash hybrid solid-state drive (SSD). The proposed boost converter uses an integrated area-efficient V BUF generation circuit to obtain short ReRAM sector write time, small circuit size, and small energy consumption simultaneously. In specific, the proposed boost converter reduces ReRAM sector write time by 65% compared with a conventional one-stage boost converter (Conventional 1) which uses 1.0 V operating voltage. On the other hand, by using the same ReRAM sector write time, the proposed boost converter reduces 49% circuit area and 46% energy consumption compared with a conventional two-stage boost converter (Conventional 2). In addition, by using the proposed boost converter, the operating voltage, V DD, can be reduced to 0.6 V. The lowest 159 nJ energy consumption can be obtained when V DD is 0.7 V.

  3. Unifying Memory and Database Transactions

    NASA Astrophysics Data System (ADS)

    Dias, Ricardo J.; Lourenço, João M.

    Software Transactional Memory is a concurrency control technique gaining increasing popularity, as it provides high-level concurrency control constructs and eases the development of highly multi-threaded applications. But this easiness comes at the expense of restricting the operations that can be executed within a memory transaction, and operations such as terminal and file I/O are either not allowed or incur in serious performance penalties. Database I/O is another example of operations that usually are not allowed within a memory transaction. This paper proposes to combine memory and database transactions in a single unified model, benefiting from the ACID properties of the database transactions and from the speed of main memory data processing. The new unified model covers, without differentiating, both memory and database operations. Thus, the users are allowed to freely intertwine memory and database accesses within the same transaction, knowing that the memory and database contents will always remain consistent and that the transaction will atomically abort or commit the operations in both memory and database. This approach allows to increase the granularity of the in-memory atomic actions and hence, simplifies the reasoning about them.

  4. Kansas Advanced Semiconductor Project

    SciTech Connect

    Baringer, P.; Bean, A.; Bolton, T.; Horton-Smith, G.; Maravin, Y.; Ratra, B.; Stanton, N.; von Toerne, E.; Wilson, G.

    2007-09-21

    KASP (Kansas Advanced Semiconductor Project) completed the new Layer 0 upgrade for D0, assumed key electronics projects for the US CMS project, finished important new physics measurements with the D0 experiment at Fermilab, made substantial contributions to detector studies for the proposed e+e- international linear collider (ILC), and advanced key initiatives in non-accelerator-based neutrino physics.

  5. Chemically Derivatized Semiconductor Photoelectrodes.

    ERIC Educational Resources Information Center

    Wrighton, Mark S.

    1983-01-01

    Deliberate modification of semiconductor photoelectrodes to improve durability and enhance rate of desirable interfacial redox processes is discussed for a variety of systems. Modification with molecular-based systems or with metals/metal oxides yields results indicating an important role for surface modification in devices for fundamental study…

  6. Physics of Organic Semiconductors

    NASA Astrophysics Data System (ADS)

    Brütting, Wolfgang

    2004-05-01

    Organic semiconductors are of steadily growing interest as active components in electronics and optoelectronics. Due to their flexibility, low cost and ease-of-production they represent a valid alternative to conventional inorganic semiconductor technology in a number of applications, such as flat panel displays and illumination, plastic integrated circuits or solar energy conversion. Although first commercial applications of this technology are being realized nowadays, there is still the need for a deeper scientific understanding in order to achieve optimum device performance.This special issue of physica status solidi (a) tries to give an overview of our present-day knowledge of the physics behind organic semiconductor devices. Contributions from 17 international research groups cover various aspects of this field ranging from the growth of organic layers and crystals, their electronic properties at interfaces, their photophysics and electrical transport properties to the application of these materials in different devices like organic field-effect transistors, photovoltaic cells and organic light-emitting diodes.Putting together such a special issue one soon realizes that it is simply impossible to fully cover the whole area of organic semiconductors. Nevertheless, we hope that the reader will find the collection of topics in this issue useful for getting an up-to-date review of a field which is still developing very dynamically.

  7. Logical Access Control Mechanisms in Computer Systems.

    ERIC Educational Resources Information Center

    Hsiao, David K.

    The subject of access control mechanisms in computer systems is concerned with effective means to protect the anonymity of private information on the one hand, and to regulate the access to shareable information on the other hand. Effective means for access control may be considered on three levels: memory, process and logical. This report is a…

  8. Memory Dysfunction

    PubMed Central

    Matthews, Brandy R.

    2015-01-01

    Purpose of Review: This article highlights the dissociable human memory systems of episodic, semantic, and procedural memory in the context of neurologic illnesses known to adversely affect specific neuroanatomic structures relevant to each memory system. Recent Findings: Advances in functional neuroimaging and refinement of neuropsychological and bedside assessment tools continue to support a model of multiple memory systems that are distinct yet complementary and to support the potential for one system to be engaged as a compensatory strategy when a counterpart system fails. Summary: Episodic memory, the ability to recall personal episodes, is the subtype of memory most often perceived as dysfunctional by patients and informants. Medial temporal lobe structures, especially the hippocampal formation and associated cortical and subcortical structures, are most often associated with episodic memory loss. Episodic memory dysfunction may present acutely, as in concussion; transiently, as in transient global amnesia (TGA); subacutely, as in thiamine deficiency; or chronically, as in Alzheimer disease. Semantic memory refers to acquired knowledge about the world. Anterior and inferior temporal lobe structures are most often associated with semantic memory loss. The semantic variant of primary progressive aphasia (svPPA) is the paradigmatic disorder resulting in predominant semantic memory dysfunction. Working memory, associated with frontal lobe function, is the active maintenance of information in the mind that can be potentially manipulated to complete goal-directed tasks. Procedural memory, the ability to learn skills that become automatic, involves the basal ganglia, cerebellum, and supplementary motor cortex. Parkinson disease and related disorders result in procedural memory deficits. Most memory concerns warrant bedside cognitive or neuropsychological evaluation and neuroimaging to assess for specific neuropathologies and guide treatment. PMID:26039844

  9. Semiconductor-based, large-area, flexible, electronic devices

    DOEpatents

    Goyal, Amit

    2011-03-15

    Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  10. Balancing the Lifetime and Storage Overhead on Error Correction for Phase Change Memory.

    PubMed

    An, Ning; Wang, Rui; Gao, Yuan; Yang, Hailong; Qian, Depei

    2015-01-01

    As DRAM is facing the scaling difficulty in terms of energy cost and reliability, some nonvolatile storage materials were proposed to be the substitute or supplement of main memory. Phase Change Memory (PCM) is one of the most promising nonvolatile memory that could be put into use in the near future. However, before becoming a qualified main memory technology, PCM should be designed reliably so that it can ensure the computer system's stable running even when errors occur. The typical wear-out errors in PCM have been well studied, but the transient errors, that caused by high-energy particles striking on the complementary metal-oxide semiconductor (CMOS) circuit of PCM chips or by resistance drifting in multi-level cell PCM, have attracted little focus. In this paper, we propose an innovative mechanism, Local-ECC-Global-ECPs (LEGE), which addresses both soft errors and hard errors (wear-out errors) in PCM memory systems. Our idea is to deploy a local error correction code (ECC) section to every data line, which can detect and correct one-bit errors immediately, and a global error correction pointers (ECPs) buffer for the whole memory chip, which can be reloaded to correct more hard error bits. The local ECC is used to detect and correct the unknown one-bit errors, and the global ECPs buffer is used to store the corrected value of hard errors. In comparison to ECP-6, our method provides almost identical lifetimes, but reduces approximately 50% storage overhead. Moreover, our structure reduces approximately 3.55% access latency overhead by increasing 1.61% storage overhead compared to PAYG, a hard error only solution.

  11. Design relationships for holographic memories.

    NASA Technical Reports Server (NTRS)

    Lugt, A. V.

    1973-01-01

    The maximum capacity of a block-oriented, random-access memory is determined primarily by the geometrical parameters of the lenses required to create a Fourier transform of a spatial bit pattern and to image the reconstructed bits onto a photodetector array. Furthermore, the maximum packing density is determined primarily by the same parameters. Several important relationships are developed that are useful in the preliminary design of holographic memories.

  12. Semiconductor radiation detector

    DOEpatents

    Patt, Bradley E.; Iwanczyk, Jan S.; Tull, Carolyn R.; Vilkelis, Gintas

    2002-01-01

    A semiconductor radiation detector is provided to detect x-ray and light photons. The entrance electrode is segmented by using variable doping concentrations. Further, the entrance electrode is physically segmented by inserting n+ regions between p+ regions. The p+ regions and the n+ regions are individually biased. The detector elements can be used in an array, and the p+ regions and the n+ regions can be biased by applying potential at a single point. The back side of the semiconductor radiation detector has an n+ anode for collecting created charges and a number of p+ cathodes. Biased n+ inserts can be placed between the p+ cathodes, and an internal resistor divider can be used to bias the n+ inserts as well as the p+ cathodes. A polysilicon spiral guard can be implemented surrounding the active area of the entrance electrode or surrounding an array of entrance electrodes.

  13. Three dimensional strained semiconductors

    DOEpatents

    Voss, Lars; Conway, Adam; Nikolic, Rebecca J.; Leao, Cedric Rocha; Shao, Qinghui

    2016-11-08

    In one embodiment, an apparatus includes a three dimensional structure comprising a semiconductor material, and at least one thin film in contact with at least one exterior surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the three dimensional structure. In another embodiment, a method includes forming a three dimensional structure comprising a semiconductor material, and depositing at least one thin film on at least one surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one of: an induced strain of at least 0.05%, and an induced strain in at least 5% of a volume of the structure.

  14. Isotopically controlled semiconductors

    SciTech Connect

    Haller, Eugene E.

    2006-06-19

    The following article is an edited transcript based on the Turnbull Lecture given by Eugene E. Haller at the 2005 Materials Research Society Fall Meeting in Boston on November 29, 2005. The David Turnbull Lectureship is awarded to recognize the career of a scientist who has made outstanding contributions to understanding materials phenomena and properties through research, writing, and lecturing, as exemplified by the life work of David Turnbull. Haller was named the 2005 David Turnbull Lecturer for his 'pioneering achievements and leadership in establishing the field of isotopically engineered semiconductors; for outstanding contributions to materials growth, doping and diffusion; and for excellence in lecturing, writing, and fostering international collaborations'. The scientific interest, increased availability, and technological promise of highly enriched isotopes have led to a sharp rise in the number of experimental and theoretical studies with isotopically controlled semiconductor crystals. This article reviews results obtained with isotopically controlled semiconductor bulk and thin-film heterostructures. Isotopic composition affects several properties such as phonon energies, band structure, and lattice constant in subtle, but, for their physical understanding, significant ways. Large isotope-related effects are observed for thermal conductivity in local vibrational modes of impurities and after neutron transmutation doping. Spectacularly sharp photoluminescence lines have been observed in ultrapure, isotopically enriched silicon crystals. Isotope multilayer structures are especially well suited for simultaneous self- and dopant-diffusion studies. The absence of any chemical, mechanical, or electrical driving forces makes possible the study of an ideal random-walk problem. Isotopically controlled semiconductors may find applications in quantum computing, nanoscience, and spintronics.

  15. Metal Contacts in Semiconductors.

    DTIC Science & Technology

    1983-11-01

    surfaces, Pnotoelectron spe troscopy, Auger electron spectro- I scopy, Schottky barriers, ohmic contacts, Defects in semiconductors, Cadmium * telluride...Indium phosphide, Gallium arsenide, Gallium Selenide . j 20. ABSTR ACT (roothat ow rees esh " neceay and td..ity by block -. b*w) SThe application of...angstroms. Also, provided one eliminates the systems where cadmium outdiffusion into high work function metals occurs then good agreement between the

  16. Tunable semiconductor lasers

    NASA Technical Reports Server (NTRS)

    Taghavi-Larigani, Shervin (Inventor); Vanzyl, Jakob J. (Inventor); Yariv, Amnon (Inventor)

    2006-01-01

    Tunable semiconductor lasers are disclosed requiring minimized coupling regions. Multiple laser embodiments employ ring resonators or ring resonator pairs using only a single coupling region with the gain medium are detailed. Tuning can be performed by changing the phase of the coupling coefficient between the gain medium and a ring resonator of the laser. Another embodiment provides a tunable laser including two Mach-Zehnder interferometers in series and a reflector coupled to a gain medium.

  17. Semiconductor Ion Implanters

    NASA Astrophysics Data System (ADS)

    MacKinnon, Barry A.; Ruffell, John P.

    2011-06-01

    In 1953 the Raytheon CK722 transistor was priced at 7.60. Based upon this, an Intel Xeon Quad Core processor containing 820,000,000 transistors should list at 6.2 billion! Particle accelerator technology plays an important part in the remarkable story of why that Intel product can be purchased today for a few hundred dollars. Most people of the mid twentieth century would be astonished at the ubiquity of semiconductors in the products we now buy and use every day. Though relatively expensive in the nineteen fifties they now exist in a wide range of items from high-end multicore microprocessors like the Intel product to disposable items containing `only' hundreds or thousands like RFID chips and talking greeting cards. This historical development has been fueled by continuous advancement of the several individual technologies involved in the production of semiconductor devices including Ion Implantation and the charged particle beamlines at the heart of implant machines. In the course of its 40 year development, the worldwide implanter industry has reached annual sales levels around 2B, installed thousands of dedicated machines and directly employs thousands of workers. It represents in all these measures, as much and possibly more than any other industrial application of particle accelerator technology. This presentation discusses the history of implanter development. It touches on some of the people involved and on some of the developmental changes and challenges imposed as the requirements of the semiconductor industry evolved.

  18. Semiconductor Ion Implanters

    SciTech Connect

    MacKinnon, Barry A.; Ruffell, John P.

    2011-06-01

    In 1953 the Raytheon CK722 transistor was priced at $7.60. Based upon this, an Intel Xeon Quad Core processor containing 820,000,000 transistors should list at $6.2 billion. Particle accelerator technology plays an important part in the remarkable story of why that Intel product can be purchased today for a few hundred dollars. Most people of the mid twentieth century would be astonished at the ubiquity of semiconductors in the products we now buy and use every day. Though relatively expensive in the nineteen fifties they now exist in a wide range of items from high-end multicore microprocessors like the Intel product to disposable items containing 'only' hundreds or thousands like RFID chips and talking greeting cards. This historical development has been fueled by continuous advancement of the several individual technologies involved in the production of semiconductor devices including Ion Implantation and the charged particle beamlines at the heart of implant machines. In the course of its 40 year development, the worldwide implanter industry has reached annual sales levels around $2B, installed thousands of dedicated machines and directly employs thousands of workers. It represents in all these measures, as much and possibly more than any other industrial application of particle accelerator technology. This presentation discusses the history of implanter development. It touches on some of the people involved and on some of the developmental changes and challenges imposed as the requirements of the semiconductor industry evolved.

  19. Performance of an MPI-only semiconductor device simulator on a quad socket/quad core InfiniBand platform.

    SciTech Connect

    Shadid, John Nicolas; Lin, Paul Tinphone

    2009-01-01

    This preliminary study considers the scaling and performance of a finite element (FE) semiconductor device simulator on a capacity cluster with 272 compute nodes based on a homogeneous multicore node architecture utilizing 16 cores. The inter-node communication backbone for this Tri-Lab Linux Capacity Cluster (TLCC) machine is comprised of an InfiniBand interconnect. The nonuniform memory access (NUMA) nodes consist of 2.2 GHz quad socket/quad core AMD Opteron processors. The performance results for this study are obtained with a FE semiconductor device simulation code (Charon) that is based on a fully-coupled Newton-Krylov solver with domain decomposition and multilevel preconditioners. Scaling and multicore performance results are presented for large-scale problems of 100+ million unknowns on up to 4096 cores. A parallel scaling comparison is also presented with the Cray XT3/4 Red Storm capability platform. The results indicate that an MPI-only programming model for utilizing the multicore nodes is reasonably efficient on all 16 cores per compute node. However, the results also indicated that the multilevel preconditioner, which is critical for large-scale capability type simulations, scales better on the Red Storm machine than the TLCC machine.

  20. Charging and exciton-mediated decharging of metal nanoparticles in organic semiconductor matrices

    SciTech Connect

    Ligorio, Giovanni; Vittorio Nardi, Marco Christodoulou, Christos; Florea, Ileana; Ersen, Ovidiu; Monteiro, Nicolas-Crespo; Brinkmann, Martin; Koch, Norbert

    2014-04-21

    Gold nanoparticles (Au-NPs) were deposited on the surface of n- and p-type organic semiconductors to form defined model systems for charge storage based electrically addressable memory elements. We used ultraviolet photoelectron spectroscopy to study the electronic properties and found that the Au-NPs become positively charged because of photoelectron emission, evidenced by spectral shifts to higher binding energy. Upon illumination with light that can be absorbed by the organic semiconductors, dynamic charge neutrality of the Au-NPs could be re-established through electron transfer from excitons. The light-controlled charge state of the Au-NPs could add optical addressability to memory elements.

  1. Vertical bloch line memory

    NASA Technical Reports Server (NTRS)

    Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-chuan (Inventor)

    1995-01-01

    A new read gate design for the vertical Bloch line (VBL) memory is disclosed which offers larger operating margin than the existing read gate designs. In the existing read gate designs, a current is applied to all the stripes. The stripes that contain a VBL pair are chopped, while the stripes that do not contain a VBL pair are not chopped. The information is then detected by inspecting the presence or absence of the bubble. The margin of the chopping current amplitude is very small, and sometimes non-existent. A new method of reading Vertical Bloch Line memory is also disclosed. Instead of using the wall chirality to separate the two binary states, the spatial deflection of the stripe head is used. Also disclosed herein is a compact memory which uses vertical Bloch line (VBL) memory technology for providing data storage. A three-dimensional arrangement in the form of stacks of VBL memory layers is used to achieve high volumetric storage density. High data transfer rate is achieved by operating all the layers in parallel. Using Hall effect sensing, and optical sensing via the Faraday effect to access the data from within the three-dimensional packages, an even higher data transfer rate can be achieved due to parallel operation within each layer.

  2. Flashbulb Memories

    PubMed Central

    Hirst, William; Phelps, Elizabeth A.

    2015-01-01

    We review and analyze the key theories, debates, findings, and omissions of the existing literature on flashbulb memories (FBMs), including what factors affect their formation, retention, and degree of confidence. We argue that FBMs do not require special memory mechanisms and are best characterized as involving both forgetting and mnemonic distortions, despite a high level of confidence. Factual memories for FBM-inducing events generally follow a similar pattern. Although no necessary and sufficient factors straightforwardly account for FBM retention, media attention particularly shapes memory for the events themselves. FBMs are best characterized in term of repetitions, even of mnemonic distortions, whereas event memories evidence corrections. The bearing of this literature on social identity and traumatic memories is also discussed. PMID:26997762

  3. Virtual memory

    NASA Technical Reports Server (NTRS)

    Denning, P. J.

    1986-01-01

    Virtual memory was conceived as a way to automate overlaying of program segments. Modern computers have very large main memories, but need automatic solutions to the relocation and protection problems. Virtual memory serves this need as well and is thus useful in computers of all sizes. The history of the idea is traced, showing how it has become a widespread, little noticed feature of computers today.

  4. Skilled Memory.

    DTIC Science & Technology

    1980-11-06

    Morse code (Bryan & Harter , 1899). In every case, memory performance of the expert seems to violate the established limits of short- term memory. How is...of immediate memory. Quarterly Journal of Experimental psychology, 1958, 10, 12-21. Bryan, W. L., & Harter N. psychological Review, 1899, 6, 345-375...16, 1980 Page 5 Civil Govt Non Govt Dr. Susan Chipman 1 Dr. John R. Anderson Learning and Development Department of Psychology National Institute of

  5. Arteriovenous Access

    PubMed Central

    MacRae, Jennifer M.; Dipchand, Christine; Oliver, Matthew; Moist, Louise; Yilmaz, Serdar; Lok, Charmaine; Leung, Kelvin; Clark, Edward; Hiremath, Swapnil; Kappel, Joanne; Kiaii, Mercedeh; Luscombe, Rick; Miller, Lisa M.

    2016-01-01

    Complications of vascular access lead to morbidity and may reduce quality of life. In this module, we review both infectious and noninfectious arteriovenous access complications including neuropathy, aneurysm, and high-output access. For the challenging patients who have developed many complications and are now nearing their last vascular access, we highlight some potentially novel approaches. PMID:28270919

  6. Disruptions in autobiographical memory processing in depression and the emergence of memory therapeutics.

    PubMed

    Dalgleish, Tim; Werner-Seidler, Aliza

    2014-11-01

    Depression is characterized by distinct profiles of disturbance in ways autobiographical memories are represented, recalled, and maintained. We review four core domains of difficulty: systematic biases in favor of negative material; impoverished access and responses to positive memories; reduced access to the specific details of the personal past; and dysfunctional processes of rumination and avoidance around personal autobiographical material. These difficulties drive the onset and maintenance of depression; consequently, interventions targeted at these maladaptive processes have clinical potential. Memory therapeutics is the development of novel clinical techniques, translated from basic research, that target memory difficulties in those with emotional disorders. We discuss prototypical examples from this clinical domain including MEmory Specificity Training, positive memory elaboration, memory rescripting, and the method-of-loci (MoL).

  7. Crossed excitons in a semiconductor nanostructure of mixed dimensionality

    SciTech Connect

    Owschimikow, Nina Kolarczik, Mirco; Kaptan, Yücel I.; Grosse, Nicolai B.; Woggon, Ulrike

    2014-09-08

    Semiconductor systems of reduced dimensionality, e.g., quantum dots or quantum wells, display a characteristic spectrum of confined excitons. Combining several of these systems may lead to the formation of “crossed” excitons, and thus new equilibrium states and scattering channels. We derive gain excitation spectra from two-color pump-probe experiments on an In(Ga)As based quantum dot semiconductor optical amplifier by analyzing the amplitudes of the traces. This grants access to the quantum dot response, even in the presence of strong absorption by the surroundings at the excitation energy. The gain excitation spectra yield evidence of crossed quantum dot-bulk states.

  8. Tunable High Brightness Semiconductor Sources

    DTIC Science & Technology

    2015-05-01

    AFRL-RY-WP-TR-2015-0066 TUNABLE HIGH BRIGHTNESS SEMICONDUCTOR SOURCES Robert Bedford, Saima Husaini, Charles Reyner, and Tuoc Dang...3. DATES COVERED (From - To) May 2015 Final 5 November 2010 – 1 February 2015 4. TITLE AND SUBTITLE TUNABLE HIGH BRIGHTNESS SEMICONDUCTOR SOURCES 5a...included within the Tunable High Brightness Semiconductor Sources work unit includes several technology advancements. First, theoretical advances in mid

  9. New developments in power semiconductors

    NASA Technical Reports Server (NTRS)

    Sundberg, G. R.

    1983-01-01

    This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.

  10. Magnetic Random Access Memory for Embedded Computing

    DTIC Science & Technology

    2007-10-29

    candidate for these applications, and magnetic tunneling junctions are no exception . 6.1 MTJs As Programmable Switches In most cases the configuration of...ferromag magnetiza two state of the pin and free m from the t polarized  placing th the  pinne increased  process cho uctor, Inc., o sen is the Fle f Boise...Figure 7.  MTJs are placed between the P and N  halves of a 4‐transistor latch The MTJs are programmed to  opposite states In  case  of a single event

  11. Magnetic Random Access Memory; Integrated Passive Components

    DTIC Science & Technology

    2010-06-02

    Donohoe University of Idaho Electrical and Computer Engineering BEL 210, POB 441023 Moscow, ID 83844-1023 2 June 2010 Final Report...University of Idaho Electrical and Computer Engineering BEL 210, POB 441023 Moscow, ID 83844-1023 MRAM-III INTPASS-I Final 9...and  diced. In the  lab , the MTJ cells are deposited, and the upper metal traces completed.                                    Figure 13 shows the

  12. Direct memory access transfer completion notification

    DOEpatents

    Archer, Charles J.; Blocksome, Michael A.; Parker, Jeffrey J.

    2010-08-17

    Methods, apparatus, and products are disclosed for DMA transfer completion notification that include: inserting, by an origin DMA engine on an origin compute node in an injection FIFO buffer, a data descriptor for an application message to be transferred to a target compute node on behalf of an application on the origin compute node; inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the message, the completion notification descriptor specifying an address of a completion notification field in application storage for the application; transferring, by the origin DMA engine to the target compute node, the message in dependence upon the data descriptor; and notifying, by the origin DMA engine, the application that the transfer of the message is complete, including performing a local direct put operation to store predesignated notification data at the address of the completion notification field.

  13. Authenticating Secure Tokens Using Slow Memory Access

    DTIC Science & Technology

    1999-01-01

    Computer, v. 31, n. 9, September 1998, pp. 29–33. [SK97] B. Schneier and J. Kelsey, “Remote Auditing of Software Outputs Using a Trusted Coprocessor,” Journal of Future Generation Computer Systems , v.13, n.1, 1997, pp. 9–18.

  14. Direct memory access transfer completion notification

    DOEpatents

    Archer, Charles J. , Blocksome; Michael A. , Parker; Jeffrey J.

    2011-02-15

    Methods, systems, and products are disclosed for DMA transfer completion notification that include: inserting, by an origin DMA on an origin node in an origin injection FIFO, a data descriptor for an application message; inserting, by the origin DMA, a reflection descriptor in the origin injection FIFO, the reflection descriptor specifying a remote get operation for injecting a completion notification descriptor in a reflection injection FIFO on a reflection node; transferring, by the origin DMA to a target node, the message in dependence upon the data descriptor; in response to completing the message transfer, transferring, by the origin DMA to the reflection node, the completion notification descriptor in dependence upon the reflection descriptor; receiving, by the origin DMA from the reflection node, a completion packet; and notifying, by the origin DMA in response to receiving the completion packet, the origin node's processing core that the message transfer is complete.

  15. Method of passivating semiconductor surfaces

    DOEpatents

    Wanlass, M.W.

    1990-06-19

    A method is described for passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.

  16. Electrodes for Semiconductor Gas Sensors.

    PubMed

    Lee, Sung Pil

    2017-03-25

    The electrodes of semiconductor gas sensors are important in characterizing sensors based on their sensitivity, selectivity, reversibility, response time, and long-term stability. The types and materials of electrodes used for semiconductor gas sensors are analyzed. In addition, the effect of interfacial zones and surface states of electrode-semiconductor interfaces on their characteristics is studied. This study describes that the gas interaction mechanism of the electrode-semiconductor interfaces should take into account the interfacial zone, surface states, image force, and tunneling effect.

  17. Method of passivating semiconductor surfaces

    DOEpatents

    Wanlass, Mark W.

    1990-01-01

    A method of passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.

  18. Optical memory development. Volume 3: The membrane light value page composer

    NASA Technical Reports Server (NTRS)

    Cosentino, L. S.; Nagle, E. M.; Stewart, W. C.

    1972-01-01

    The feasibility of producing a page composer for optical memory systems using thin, deformable, membrane-mirror elements as light valves was investigated. The electromechanical and optical performances of such elements were determined both analytically and experimentally. It was found that fast switching (approximately 10 microseconds), high-contrast (10 or greater), fatigue-free operation over missions of cycles, and efficient utilization of input light could be obtained with membrane light valves. Several arrays of 64 elements were made on substrates with feedthroughs, allowing access to individual elements from the backside of the substrate. Single light valves on such arrays were successfully operated with the transistors designed and produced for selection and storage at each bit location. This simulated the operation of a prototype page composer with semiconductor chips beam-lead bonded to the back of the substrate.

  19. Episodic Memories

    ERIC Educational Resources Information Center

    Conway, Martin A.

    2009-01-01

    An account of episodic memories is developed that focuses on the types of knowledge they represent, their properties, and the functions they might serve. It is proposed that episodic memories consist of "episodic elements," summary records of experience often in the form of visual images, associated to a "conceptual frame" that provides a…

  20. Collaging Memories

    ERIC Educational Resources Information Center

    Wallach, Michele

    2011-01-01

    Even middle school students can have memories of their childhoods, of an earlier time. The art of Romare Bearden and the writings of Paul Auster can be used to introduce ideas about time and memory to students and inspire works of their own. Bearden is an exceptional role model for young artists, not only because of his astounding art, but also…

  1. Mechanical stress effects on Pb(Zr,Ti)O3 thin-film ferroelectric capacitors embedded in a standard complementary metal-oxide-semiconductor process

    NASA Astrophysics Data System (ADS)

    Acosta, Antonio G.; Rodriguez, John A.; Nishida, Toshikazu

    2014-06-01

    We report experimental investigations of externally applied mechanical stress on 70 nm Pb(Zr,Ti)O3 ferroelectric capacitors embedded within a 130 nm complementary metal-oxide-semiconductor manufacturing process. An average increase in the remnant polarization of 3.37% per 100 MPa compressive uniaxial stress was observed. The maximum polarization increased by 2.68% per 100 MPa, while the cycling endurance was not affected by stress. The significant difference between experiment and the lattice distortion model suggests that two mechanisms are responsible for the polarization change. These results indicate that stress engineering may be used to enhance the signal margin in ferroelectric random access memory and enable technology scaling.

  2. Nanoscale Semiconductor Electronics

    DTIC Science & Technology

    2015-02-25

    MONITOR’S REPORT Kirtland AFB, NM 87117-5776 NUMBER(S) AFRL -RV-PS-TR-2014-0202 12. DISTRIBUTION / AVAILABILITY STATEMENT Approved for public release...Kingman Rd, Suite 0944 Ft Belvoir, VA 22060-6218 1 cy AFRL /RVIL Kirtland AFB, NM 87117-5776 2 cys Official Record Copy AFRL /RVSE/Jesse Mee 1 cy ... AFRL -RV-PS- AFRL -RV-PS- TR-2014-0202 TR-2014-0202 NANOSCALE SEMICONDUCTOR ELECTRONICS Steven R. J. Brueck and Ganesh Balakrishnan University of New

  3. Electrowetting on semiconductors

    NASA Astrophysics Data System (ADS)

    Palma, Cesar; Deegan, Robert

    2015-01-01

    Applying a voltage difference between a conductor and a sessile droplet sitting on a thin dielectric film separating it from the conductor will cause the drop to spread. When the conductor is a good metal, the change of the drop's contact angle due to the voltage is given by the Young-Lippmann (YL) equation. Here, we report experiments with lightly doped, single crystal silicon as the conductive electrode. We derive a modified YL equation that includes effects due to the semiconductor and contact line pinning. We show that light induces a non-reversible wetting transition, and that our model agrees well with our experimental results.

  4. Semiconductor cooling apparatus

    NASA Technical Reports Server (NTRS)

    Banks, Bruce A. (Inventor); Gaier, James R. (Inventor)

    1993-01-01

    Gas derived graphite fibers generated by the decomposition of an organic gas are joined with a suitable binder. This produces a high thermal conductivity composite material which passively conducts heat from a source, such as a semiconductor, to a heat sink. The fibers may be intercalated. The intercalate can be halogen or halide salt, alkaline metal, or any other species which contributes to the electrical conductivity improvement of the graphite fiber. The fibers are bundled and joined with a suitable binder to form a high thermal conductivity composite material device. The heat transfer device may also be made of intercalated highly oriented pyrolytic graphite and machined, rather than made of fibers.

  5. Microwave semiconductor devices

    NASA Astrophysics Data System (ADS)

    Sitch, J. E.

    1985-03-01

    The state of the art of microwave semiconductor design is reviewed, with emphasis on developments of the past 10-12 years. Consideration is given to: varistor diodes; varactor diodes; and transit time negative diodes. The design principles of bipolar and unipolar transistors are discussed, with reference to power FETs, traveling-wave FETs, and camel or planar-doped barrier transistors. Recent innovations in the field of fabrication technology are also considered, including: crystal growth; doping; and packaging. Several schematic drawings and photographs of the different devices are provided.

  6. Semiconductor Terahertz Technology

    DTIC Science & Technology

    2009-06-15

    COVERED (From - To) 15-June-2009 Final Report 12 Apr 07 - 15 Apr 09 4. TITLE AND SUBTITLE Sa. CONTRACT NUMBER FA8718-07-C-0030 Semiconductor Terahertz ...and the other for the phononic waveguides. 15. SUBJECT TERMS Quantum cascade laser, gennanium, gennanium-tin, terahertz 16. SECURITY CLASStFICATION OF...7 Figure 7 lllustration of a GaAs-based active region waveguide with either Ga or Au as cladding operating in the Restrahlen band of GaN . 10 Figure 8

  7. Chemically Derivatized Semiconductor Photoelectrodes.

    DTIC Science & Technology

    1982-01-04

    as Si, Ge, and GaAs derivatized with reagents based on ferrocene such as those represented by I and II. Work with p-type semiconductor photoelectrode...Concerning n-type Si it was found that EtOH/0.1 M En-Bu4N)C104 solutions containing A = ferrocene and A+ = ferri-- cinium result in a constant output of...electrical energy from an illuminated photoelectrochemical device configured as in Scheme II.(20) The ferrocene captures the photogenerated h+ at a rate -4

  8. Layered semiconductor neutron detectors

    DOEpatents

    Mao, Samuel S; Perry, Dale L

    2013-12-10

    Room temperature operating solid state hand held neutron detectors integrate one or more relatively thin layers of a high neutron interaction cross-section element or materials with semiconductor detectors. The high neutron interaction cross-section element (e.g., Gd, B or Li) or materials comprising at least one high neutron interaction cross-section element can be in the form of unstructured layers or micro- or nano-structured arrays. Such architecture provides high efficiency neutron detector devices by capturing substantially more carriers produced from high energy .alpha.-particles or .gamma.-photons generated by neutron interaction.

  9. Power semiconductor controlled drives

    NASA Astrophysics Data System (ADS)

    Dubey, Gopal K.

    This book presents power semiconductor controlled drives employing dc motors, induction motors, and synchronous motors. The dynamics of motor and load systems are covered. Open-loop and closed-loop drives are considered, and thyristor, power transistor, and GTO converters are discussed. In-depth coverage is given to ac drives, particularly those fed by voltage and current source inverters and cycloconverters. Full coverage is given to brushless and commutatorless dc drives, including load-commuted synchronous motor drives. Rectifier-controlled dc drives are presented in detail.

  10. Semiconductor devices incorporating multilayer interference regions

    DOEpatents

    Biefeld, R.M.; Drummond, T.J.; Gourley, P.L.; Zipperian, T.E.

    1987-08-31

    A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration. 8 figs.

  11. Semiconductor devices incorporating multilayer interference regions

    DOEpatents

    Biefeld, Robert M.; Drummond, Timothy J.; Gourley, Paul L.; Zipperian, Thomas E.

    1990-01-01

    A semiconductor high reflector comprising a number of thin alternating layers of semiconductor materials is electrically tunable and may be used as a temperature insensitive semiconductor laser in a Fabry-Perot configuration.

  12. A power-efficient and non-volatile programmable logic array based on phase change memory

    NASA Astrophysics Data System (ADS)

    Du, Yuan; Ye, Yong; Kang, Yong; Xia, Yangyang; Song, Zhitang; Chen, Bomy

    2016-10-01

    Recently, numerous efforts have been made on NVM-based Field Programmable Gate Arrays (FPGAs) because the emerging non-volatile memory (NVM) technologies have the advantages of lower leakage power and higher density than Static Random Access Memory (SRAM) technology. However, the cost and the scale of FPGAs are so high and large that they can't be applied in the consumer electronics field and Internet of Things (IoT). Due to the small scale and low cost, Programmable Logic Array (PLA) is an ideal option for these fields. However, up to now there are few researches on non-volatile PLA based on emerging NVMs. In this paper, a power-efficient non-volatile PLA based on Phase Change Memory (PCM) is proposed. The proposed non-volatile PLA architecture has been evaluated using the 40 nm Complementary Metal Oxide Semiconductor (CMOS) technology, and the simulation results show the correct functionality of the PLA. After the PLA reads the configuration bits from the non-volatile programmable elements (PEs), the power of the programmable elements can be OFF. Therefore, the standby power of the programmable elements is much smaller than that of the commonly SRAM-based PLAs. The simulation results also show that the total power of nvPLA is reduced by about 53.6% when the supply power of Programmable Element is OFF.

  13. Memory conformity affects inaccurate memories more than accurate memories.

    PubMed

    Wright, Daniel B; Villalba, Daniella K

    2012-01-01

    After controlling for initial confidence, inaccurate memories were shown to be more easily distorted than accurate memories. In two experiments groups of participants viewed 50 stimuli and were then presented with these stimuli plus 50 fillers. During this test phase participants reported their confidence that each stimulus was originally shown. This was followed by computer-generated responses from a bogus participant. After being exposed to this response participants again rated the confidence of their memory. The computer-generated responses systematically distorted participants' responses. Memory distortion depended on initial memory confidence, with uncertain memories being more malleable than confident memories. This effect was moderated by whether the participant's memory was initially accurate or inaccurate. Inaccurate memories were more malleable than accurate memories. The data were consistent with a model describing two types of memory (i.e., recollective and non-recollective memories), which differ in how susceptible these memories are to memory distortion.

  14. A study on degradation mechanisms and low voltage operations in MNOS-type memory devices

    NASA Astrophysics Data System (ADS)

    Suzuki, E.

    1984-05-01

    Metal-nitride-oxide semiconductor (MNOS) type nonvolatile semiconductor memory devices that use electronic traps in the gate insulator as memory sites are studied. A method for measuring the separation of electrons and holes by utilizing the structure of insulated-gate field effect transistors is examined, and mechanisms of carrier conduction in MNOS structures are clarified. Degradation mechanisms of MNOS structure are investigated to improve the devices and to develop new memory devices. It is shown that positive holes, especially those injected from the gate into the nitride, play an important role in degrading the devices. A new electrically erasable programmable read-only memory with metal oxide nitride oxide semiconductor structures is proposed, and its superior memory properties are demonstrated.

  15. A Memory Design for the Message-Driven Processor

    DTIC Science & Technology

    1988-08-01

    SHAKESPEARE , in Hamlet , I, iii, 75 The MDP’s Memory Unit (MU) provides storage for objects and messages. The memory array can be accessed by index...handling by direct word enqueueing rather than the QRB’s is recommended in this case. Chapter 6 Conclusion I’ll note you in my book of memory. - SHAKESPEARE

  16. Fibre ring cavity semiconductor laser

    SciTech Connect

    Duraev, V P; Medvedev, S V

    2013-10-31

    This paper presents a study of semiconductor lasers having a polarisation maintaining fibre ring cavity. We examine the operating principle and report main characteristics of a semiconductor ring laser, in particular in single- and multiple-frequency regimes, and discuss its application areas. (lasers)

  17. Process for producing chalcogenide semiconductors

    DOEpatents

    Noufi, Rommel; Chen, Yih-Wen

    1987-01-01

    A process for producing chalcogenide semiconductor material is disclosed. The process includes forming a base metal layer and then contacting this layer with a solution having a low pH and containing ions from at least one chalcogen to chalcogenize the layer and form the chalcogenide semiconductor material.

  18. Process for producing chalcogenide semiconductors

    DOEpatents

    Noufi, R.; Chen, Y.W.

    1985-04-30

    A process for producing chalcogenide semiconductor material is disclosed. The process includes forming a base metal layer and then contacting this layer with a solution having a low pH and containing ions from at least one chalcogen to chalcogenize the layer and form the chalcogenide semiconductor material.

  19. Variable temperature semiconductor film deposition

    DOEpatents

    Li, Xiaonan; Sheldon, Peter

    1998-01-01

    A method of depositing a semiconductor material on a substrate. The method sequentially comprises (a) providing the semiconductor material in a depositable state such as a vapor for deposition on the substrate; (b) depositing the semiconductor material on the substrate while heating the substrate to a first temperature sufficient to cause the semiconductor material to form a first film layer having a first grain size; (c) continually depositing the semiconductor material on the substrate while cooling the substrate to a second temperature sufficient to cause the semiconductor material to form a second film layer deposited on the first film layer and having a second grain size smaller than the first grain size; and (d) raising the substrate temperature, while either continuing or not continuing to deposit semiconductor material to form a third film layer, to thereby anneal the film layers into a single layer having favorable efficiency characteristics in photovoltaic applications. A preferred semiconductor material is cadmium telluride deposited on a glass/tin oxide substrate already having thereon a film layer of cadmium sulfide.

  20. Variable temperature semiconductor film deposition

    DOEpatents

    Li, X.; Sheldon, P.

    1998-01-27

    A method of depositing a semiconductor material on a substrate is disclosed. The method sequentially comprises (a) providing the semiconductor material in a depositable state such as a vapor for deposition on the substrate; (b) depositing the semiconductor material on the substrate while heating the substrate to a first temperature sufficient to cause the semiconductor material to form a first film layer having a first grain size; (c) continually depositing the semiconductor material on the substrate while cooling the substrate to a second temperature sufficient to cause the semiconductor material to form a second film layer deposited on the first film layer and having a second grain size smaller than the first grain size; and (d) raising the substrate temperature, while either continuing or not continuing to deposit semiconductor material to form a third film layer, to thereby anneal the film layers into a single layer having favorable efficiency characteristics in photovoltaic applications. A preferred semiconductor material is cadmium telluride deposited on a glass/tin oxide substrate already having thereon a film layer of cadmium sulfide.

  1. Progress in semiconductor drift detectors

    SciTech Connect

    Rehak, P.; Walton, J.; Gatti, E.; Longoni, A.; Sanpietro, M.; Kemmer, J.; Dietl, H.; Holl, P.; Klanner, R.; Lutz, G.

    1985-01-01

    Progress in testing semiconductor drift detectors is reported. Generally better position and energy resolutions were obtained than resolutions published previously. The improvement is mostly due to new electronics better matched to different detectors. It is shown that semiconductor drift detectors are becoming versatile and reliable detectors for position and energy measurements.

  2. Three dimensional magnetic abacus memory

    PubMed Central

    Zhang, ShiLei; Zhang, JingYan; Baker, Alexander A.; Wang, ShouGuo; Yu, GuangHua; Hesjedal, Thorsten

    2014-01-01

    Stacking nonvolatile memory cells into a three-dimensional matrix represents a powerful solution for the future of magnetic memory. However, it is technologically challenging to access the data in the storage medium if large numbers of bits are stacked on top of each other. Here we introduce a new type of multilevel, nonvolatile magnetic memory concept, the magnetic abacus. Instead of storing information in individual magnetic layers, thereby having to read out each magnetic layer separately, the magnetic abacus adopts a new encoding scheme. It is inspired by the idea of second quantisation, dealing with the memory state of the entire stack simultaneously. Direct read operations are implemented by measuring the artificially engineered ‘quantised' Hall voltage, each representing a count of the spin-up and spin-down layers in the stack. This new memory system further allows for both flexible scaling of the system and fast communication among cells. The magnetic abacus provides a promising approach for future nonvolatile 3D magnetic random access memory. PMID:25146338

  3. Kanerva's sparse distributed memory: An associative memory algorithm well-suited to the Connection Machine

    NASA Technical Reports Server (NTRS)

    Rogers, David

    1988-01-01

    The advent of the Connection Machine profoundly changes the world of supercomputers. The highly nontraditional architecture makes possible the exploration of algorithms that were impractical for standard Von Neumann architectures. Sparse distributed memory (SDM) is an example of such an algorithm. Sparse distributed memory is a particularly simple and elegant formulation for an associative memory. The foundations for sparse distributed memory are described, and some simple examples of using the memory are presented. The relationship of sparse distributed memory to three important computational systems is shown: random-access memory, neural networks, and the cerebellum of the brain. Finally, the implementation of the algorithm for sparse distributed memory on the Connection Machine is discussed.

  4. Physics with isotopically controlled semiconductors

    SciTech Connect

    Haller, E. E.

    2010-07-15

    This paper is based on a tutorial presentation at the International Conference on Defects in Semiconductors (ICDS-25) held in Saint Petersburg, Russia in July 2009. The tutorial focused on a review of recent research involving isotopically controlled semiconductors. Studies with isotopically enriched semiconductor structures experienced a dramatic expansion at the end of the Cold War when significant quantities of enriched isotopes of elements forming semiconductors became available for worldwide collaborations. Isotopes of an element differ in nuclear mass, may have different nuclear spins and undergo different nuclear reactions. Among the latter, the capture of thermal neutrons which can lead to neutron transmutation doping, is the most prominent effect for semiconductors. Experimental and theoretical research exploiting the differences in all the properties has been conducted and will be illustrated with selected examples.

  5. Magnonic Holographic Memory

    NASA Astrophysics Data System (ADS)

    Khitun, Alexander; Kozhevnikov, Alexander; Gertz, Frederick; Filimonov, Yuri

    2015-03-01

    Collective oscillation of spins in magnetic lattice known as spin waves (magnons) possess relatively long coherence length at room temperature, which makes it possible to build sub-micrometer scale holographic devices similar to the devices developed in optics. In this work, we present a prototype 2-bit magnonic holographic memory. The memory consists of the double-cross waveguide structure made of Y3Fe2(FeO4)3 with magnets placed on the top of waveguide junctions. Information is encoded in the orientation of the magnets, while the read-out is accomplished by the spin waves generated by the micro-antennas placed on the edges of the waveguides. The interference pattern produced by multiple spin waves makes it possible to build a unique holographic image of the magnetic structure and recognize the state of the each magnet. The development of magnonic holographic devices opens a new horizon for building scalable holographic devices compatible with conventional electronic devices. This work was supported in part by the FAME Center, one of six centers of STARnet, a Semiconductor Research Corporation program sponsored by MARCO and DARPA and by the National Science Foundation under the NEB2020 Grant ECCS-1124714.

  6. Staging memory for massively parallel processor

    NASA Technical Reports Server (NTRS)

    Batcher, Kenneth E. (Inventor)

    1988-01-01

    The invention herein relates to a computer organization capable of rapidly processing extremely large volumes of data. A staging memory is provided having a main stager portion consisting of a large number of memory banks which are accessed in parallel to receive, store, and transfer data words simultaneous with each other. Substager portions interconnect with the main stager portion to match input and output data formats with the data format of the main stager portion. An address generator is coded for accessing the data banks for receiving or transferring the appropriate words. Input and output permutation networks arrange the lineal order of data into and out of the memory banks.

  7. Shared memory for a fault-tolerant computer

    NASA Technical Reports Server (NTRS)

    Gilley, G. C. (Inventor)

    1976-01-01

    A system is described for sharing a memory in a fault-tolerant computer. The memory is under the direct control and monitoring of error detecting and error diagnostic units in the fault-tolerant computer. This computer verifies that data to and from the memory is legally encoded and verifies that words read from the memory at a desired address are, in fact, actually delivered from that desired address. The means are provided for a second processor, which is independent of the direct control and monitoring of the error checking and diagnostic units of the fault-tolerant computer, and to share the memory of the fault-tolerant computer. Circuitry is included to verify that: (1) the processor has properly accessed a desired memory location in the memory; (2) a data word read-out from the memory is properly coded; and (3) no inactive memory was erroneously outputting data onto the shared memory bus.

  8. Future Development of Dense Ferroelectric Memories for Space Applications

    NASA Technical Reports Server (NTRS)

    Philpy, Stephen C.; Derbenwick, Gary F.

    2001-01-01

    The availability of high density, radiation tolerant, nonvolatile memories is critical for space applications. Ferroelectric memories, when fabricated with radiation hardened complementary metal oxide semiconductors (CMOS), can be manufactured and packaged to provide high density replacements for Flash memory, which is not radiation tolerant. Previous work showed ferroelectric memory cells to be resistant to single event upsets and proton irradiation, and ferroelectric storage capacitors to be resistant to neutron exposure. In addition to radiation hardness, the fast programming times, virtually unlimited endurance, and low voltage, low power operation make ferroelectric memories ideal for space missions. Previously, a commercial double level metal 64-kilobit ferroelectric memory was presented. Although the capabilities of radiation hardened wafer fabrication facilities lag behind those of the most modern commercial wafer fabrication facilities, several paths to achieving radiation tolerant, dense ferroelectric memories are emerging. Both short and long term solutions are presented in this paper. Although worldwide major semiconductor companies are introducing commercial ferroelectric memories, funding limitations must be overcome to proceed with the development of high density, radiation tolerant ferroelectric memories.

  9. Misaligned feeding impairs memories

    PubMed Central

    Loh, Dawn H; Jami, Shekib A; Flores, Richard E; Truong, Danny; Ghiani, Cristina A; O’Dell, Thomas J; Colwell, Christopher S

    2015-01-01

    Robust sleep/wake rhythms are important for health and cognitive function. Unfortunately, many people are living in an environment where their circadian system is challenged by inappropriate meal- or work-times. Here we scheduled food access to the sleep time and examined the impact on learning and memory in mice. Under these conditions, we demonstrate that the molecular clock in the master pacemaker, the suprachiasmatic nucleus (SCN), is unaltered while the molecular clock in the hippocampus is synchronized by the timing of food availability. This chronic circadian misalignment causes reduced hippocampal long term potentiation and total CREB expression. Importantly this mis-timed feeding resulted in dramatic deficits in hippocampal-dependent learning and memory. Our findings suggest that the timing of meals have far-reaching effects on hippocampal physiology and learned behaviour. DOI: http://dx.doi.org/10.7554/eLife.09460.001 PMID:26652002

  10. Nonlinear intersubband dynamics in semiconductor nanostructures

    NASA Astrophysics Data System (ADS)

    Wijewardane, Harshani Ovamini

    The intersubband (ISB) dynamics of conduction electrons in semiconductor quantum wells exhibits a variety of interesting and potentially useful nonlinear phenomena. In this work we present three different formalisms which we use to describe ISB effects in the nonlinear regime. We first develop a density-matrix approach based on time-dependent density functional theory (TDDFT) to describe nonlinear ISB conduction electron dynamics in the time domain. We apply this formalism to study coherent control of optical bistability. We then focus on the fact that the exact time-dependent exchange-correlation (xc) potential contains information about the previous history of the system, including its initial state. We describe two different formalisms which go beyond the adiabatic approximation and apply them to collective charge-density oscillations in quantum wells. First, we develop a viscosity-based TDDFT in the time domain and show how the memory and velocity dependence of the viscosity-based xc potential introduces retardation, which in turn leads to decoherence and energy relaxation. The other formalism is the time-dependent optimized effective potential method (TDOEP). We solve the full TDOEP integral equation with exact exchange and show how the memory arises from the exact exchange and results in retardation effects in the electron dynamics.

  11. Memory loss

    MedlinePlus

    ... this page: //medlineplus.gov/ency/article/003257.htm Memory loss To use the sharing features on this ... Bethesda, MD 20894 U.S. Department of Health and Human Services National Institutes of Health Page last updated: ...

  12. Semiconductor nanowire lasers

    NASA Astrophysics Data System (ADS)

    Eaton, Samuel W.; Fu, Anthony; Wong, Andrew B.; Ning, Cun-Zheng; Yang, Peidong

    2016-06-01

    The discovery and continued development of the laser has revolutionized both science and industry. The advent of miniaturized, semiconductor lasers has made this technology an integral part of everyday life. Exciting research continues with a new focus on nanowire lasers because of their great potential in the field of optoelectronics. In this Review, we explore the latest advancements in the development of nanowire lasers and offer our perspective on future improvements and trends. We discuss fundamental material considerations and the latest, most effective materials for nanowire lasers. A discussion of novel cavity designs and amplification methods is followed by some of the latest work on surface plasmon polariton nanowire lasers. Finally, exciting new reports of electrically pumped nanowire lasers with the potential for integrated optoelectronic applications are described.

  13. Photocatalysis Using Semiconductor Nanoclusters

    SciTech Connect

    Thurston, T.R.; Wilcoxon,J.P.

    1999-01-21

    We report on experiments using nanosize MoS{sub 2} to photo-oxidize organic pollutants in water using visible light as the energy source. We have demonstrated that we can vary the redox potentials and absorbance characteristics of these small semiconductors by adjusting their size, and our studies of the photooxidation of organic molecules have revealed that the rate of oxidation increases with increasing bandgap (i.e. more positive valence band and more negative conduction band potentials). Because these photocatalysis reactions can be performed with the nanoclusters fully dispersed and stable in solution, liquid chromatography can be used to determine both the intermediate reaction products and the state of the nanoclusters during the reaction. We have demonstrated that the MoS{sub 2} nanoclusters remain unchanged during the photooxidation process by this technique. We also report on studies of MoS{sub 2} nanoclusters deposited on TiO{sub 2} powder.

  14. Semiconductor adiabatic qubits

    DOEpatents

    Carroll, Malcolm S.; Witzel, Wayne; Jacobson, Noah Tobias; Ganti, Anand; Landahl, Andrew J.; Lilly, Michael; Nguyen, Khoi Thi; Bishop, Nathaniel; Carr, Stephen M.; Bussmann, Ezra; Nielsen, Erik; Levy, James Ewers; Blume-Kohout, Robin J.; Rahman, Rajib

    2016-12-27

    A quantum computing device that includes a plurality of semiconductor adiabatic qubits is described herein. The qubits are programmed with local biases and coupling terms between qubits that represent a problem of interest. The qubits are initialized by way of a tuneable parameter, a local tunnel coupling within each qubit, such that the qubits remain in a ground energy state, and that initial state is represented by the qubits being in a superposition of |0> and |1> states. The parameter is altered over time adiabatically or such that relaxation mechanisms maintain a large fraction of ground state occupation through decreasing the tunnel coupling barrier within each qubit with the appropriate schedule. The final state when tunnel coupling is effectively zero represents the solution state to the problem represented in the |0> and |1> basis, which can be accurately read at each qubit location.

  15. Semiconductor radiation detector

    DOEpatents

    Bell, Zane W.; Burger, Arnold

    2010-03-30

    A semiconductor detector for ionizing electromagnetic radiation, neutrons, and energetic charged particles. The detecting element is comprised of a compound having the composition I-III-VI.sub.2 or II-IV-V.sub.2 where the "I" component is from column 1A or 1B of the periodic table, the "II" component is from column 2B, the "III" component is from column 3A, the "IV" component is from column 4A, the "V" component is from column 5A, and the "VI" component is from column 6A. The detecting element detects ionizing radiation by generating a signal proportional to the energy deposited in the element, and detects neutrons by virtue of the ionizing radiation emitted by one or more of the constituent materials subsequent to capture. The detector may contain more than one neutron-sensitive component.

  16. Web Accessibility and Accessibility Instruction

    ERIC Educational Resources Information Center

    Green, Ravonne A.; Huprich, Julia

    2009-01-01

    Section 508 of the Americans with Disabilities Act (ADA) mandates that programs and services be accessible to people with disabilities. While schools of library and information science (SLIS*) and university libraries should model accessible Web sites, this may not be the case. This article examines previous studies about the Web accessibility of…

  17. System and method for programmable bank selection for banked memory subsystems

    DOEpatents

    Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan

    2010-09-07

    A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

  18. A multilevel nonvolatile magnetoelectric memory

    NASA Astrophysics Data System (ADS)

    Shen, Jianxin; Cong, Junzhuang; Shang, Dashan; Chai, Yisheng; Shen, Shipeng; Zhai, Kun; Sun, Young

    2016-09-01

    The coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories have been proposed and explored in the past decade. Here we propose a new principle to realize a multilevel nonvolatile memory based on the multiple states of the magnetoelectric coefficient (α) of multiferroics. Because the states of α depends on the relative orientation between magnetization and polarization, one can reach different levels of α by controlling the ratio of up and down ferroelectric domains with external electric fields. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure confirm that the states of α can be well controlled between positive and negative by applying selective electric fields. Consequently, two-level, four-level, and eight-level nonvolatile memory devices are demonstrated at room temperature. This kind of multilevel magnetoelectric memory retains all the advantages of ferroelectric random access memory but overcomes the drawback of destructive reading of polarization. In contrast, the reading of α is nondestructive and highly efficient in a parallel way, with an independent reading coil shared by all the memory cells.

  19. A multilevel nonvolatile magnetoelectric memory

    PubMed Central

    Shen, Jianxin; Cong, Junzhuang; Shang, Dashan; Chai, Yisheng; Shen, Shipeng; Zhai, Kun; Sun, Young

    2016-01-01

    The coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories have been proposed and explored in the past decade. Here we propose a new principle to realize a multilevel nonvolatile memory based on the multiple states of the magnetoelectric coefficient (α) of multiferroics. Because the states of α depends on the relative orientation between magnetization and polarization, one can reach different levels of α by controlling the ratio of up and down ferroelectric domains with external electric fields. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure confirm that the states of α can be well controlled between positive and negative by applying selective electric fields. Consequently, two-level, four-level, and eight-level nonvolatile memory devices are demonstrated at room temperature. This kind of multilevel magnetoelectric memory retains all the advantages of ferroelectric random access memory but overcomes the drawback of destructive reading of polarization. In contrast, the reading of α is nondestructive and highly efficient in a parallel way, with an independent reading coil shared by all the memory cells. PMID:27681812

  20. Polycrystalline silicon ring resonator photodiodes in a bulk complementary metal-oxide-semiconductor process.

    PubMed

    Mehta, Karan K; Orcutt, Jason S; Shainline, Jeffrey M; Tehar-Zahav, Ofer; Sternberg, Zvi; Meade, Roy; Popović, Miloš A; Ram, Rajeev J

    2014-02-15

    We present measurements on resonant photodetectors utilizing sub-bandgap absorption in polycrystalline silicon ring resonators, in which light is localized in the intrinsic region of a p+/p/i/n/n+ diode. The devices, operating both at λ=1280 and λ=1550  nm and fabricated in a complementary metal-oxide-semiconductor (CMOS) dynamic random-access memory emulation process, exhibit detection quantum efficiencies around 20% and few-gigahertz response bandwidths. We observe this performance at low reverse biases in the range of a few volts and in devices with dark currents below 50 pA at 10 V. These results demonstrate that such photodetector behavior, previously reported by Preston et al. [Opt. Lett. 36, 52 (2011)], is achievable in bulk CMOS processes, with significant improvements with respect to the previous work in quantum efficiency, dark current, linearity, bandwidth, and operating bias due to additional midlevel doping implants and different material deposition. The present work thus offers a robust realization of a fully CMOS-fabricated all-silicon photodetector functional across a wide wavelength range.

  1. CMOS Camera Array With Onboard Memory

    NASA Technical Reports Server (NTRS)

    Gat, Nahum

    2009-01-01

    A compact CMOS (complementary metal oxide semiconductor) camera system has been developed with high resolution (1.3 Megapixels), a USB (universal serial bus) 2.0 interface, and an onboard memory. Exposure times, and other operating parameters, are sent from a control PC via the USB port. Data from the camera can be received via the USB port and the interface allows for simple control and data capture through a laptop computer.

  2. Semiconductor Nanocrystals for Biological Imaging

    SciTech Connect

    Fu, Aihua; Gu, Weiwei; Larabell, Carolyn; Alivisatos, A. Paul

    2005-06-28

    Conventional organic fluorophores suffer from poor photo stability, narrow absorption spectra and broad emission feature. Semiconductor nanocrystals, on the other hand, are highly photo-stable with broad absorption spectra and narrow size-tunable emission spectra. Recent advances in the synthesis of these materials have resulted in bright, sensitive, extremely photo-stable and biocompatible semiconductor fluorophores. Commercial availability facilitates their application in a variety of unprecedented biological experiments, including multiplexed cellular imaging, long-term in vitro and in vivo labeling, deep tissue structure mapping and single particle investigation of dynamic cellular processes. Semiconductor nanocrystals are one of the first examples of nanotechnology enabling a new class of biomedical applications.

  3. Empathy and autobiographical memory: are they linked?

    PubMed

    Tani, Franca; Peterson, Carole; Smorti, Andrea

    2014-01-01

    Autobiographical memory and empathy have been linked with social interaction variables as well as gender in independent bodies of literature. However a scarcity of research exists on the direct link between autobiographical memory and empathy. Exploring this link, in particular for memory of friendships and empathy, was the authors' main aim. A total of 107 Italian undergraduates participated. A memory fluency task was used to assess accessibility of memories spanning their entire life (preschool through university) and an empathy scale (Italian version of the Interpersonal Reactivity Index) was employed to measure the participants' level and dimensions of empathy. For men, empathy scores were related to how many memories they could recall. Specifically, men with higher scores on the fantasy and empathic concern scales and those with lower scores on the personal distress scales recalled more memories of friends. However, affective quality of their memories was unrelated to empathy. In contrast, for women there was no relationship between number of memories and empathy, but the emotional tone of their memories was related to empathy: those with higher scores on the personal distress scale had proportionately fewer affectively positive memories. Results are discussed in terms of gender differences in both empathy and parental socialization patterns.

  4. Semiconductor device PN junction fabrication using optical processing of amorphous semiconductor material

    SciTech Connect

    Sopori, Bhushan; Rangappan, Anikara

    2014-11-25

    Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.

  5. Demonstration and characterisation of a non-inverting all-optical read/write regenerative memory

    NASA Astrophysics Data System (ADS)

    Johnson, N. C.; Harrison, J. A.; Blow, K. J.

    2008-09-01

    An all-optical regenerative memory device using a single loop mirror and a semiconductor optical amplifier is experimentally demonstrated. This configuration has potential for a low power all-optical stable memory device with non-inverting characteristics where packets are stored by continuously injecting the regenerated data back into the loop.

  6. Optically induced transport through semiconductor-based molecular electronics

    NASA Astrophysics Data System (ADS)

    Li, Guangqi; Fainberg, Boris D.; Seideman, Tamar

    2015-04-01

    A tight binding model is used to investigate photoinduced tunneling current through a molecular bridge coupled to two semiconductor electrodes. A quantum master equation is developed within a non-Markovian theory based on second-order perturbation theory with respect to the molecule-semiconductor electrode coupling. The spectral functions are generated using a one dimensional alternating bond model, and the coupling between the molecule and the electrodes is expressed through a corresponding correlation function. Since the molecular bridge orbitals are inside the bandgap between the conduction and valence bands, charge carrier tunneling is inhibited in the dark. Subject to the dipole interaction with the laser field, virtual molecular states are generated via the absorption and emission of photons, and new tunneling channels open. Interesting phenomena arising from memory are noted. Such a phenomenon could serve as a switch.

  7. Optically induced transport through semiconductor-based molecular electronics

    SciTech Connect

    Li, Guangqi; Seideman, Tamar; Fainberg, Boris D.

    2015-04-21

    A tight binding model is used to investigate photoinduced tunneling current through a molecular bridge coupled to two semiconductor electrodes. A quantum master equation is developed within a non-Markovian theory based on second-order perturbation theory with respect to the molecule-semiconductor electrode coupling. The spectral functions are generated using a one dimensional alternating bond model, and the coupling between the molecule and the electrodes is expressed through a corresponding correlation function. Since the molecular bridge orbitals are inside the bandgap between the conduction and valence bands, charge carrier tunneling is inhibited in the dark. Subject to the dipole interaction with the laser field, virtual molecular states are generated via the absorption and emission of photons, and new tunneling channels open. Interesting phenomena arising from memory are noted. Such a phenomenon could serve as a switch.

  8. Investigations of Photovoltaic Ferroelectric-Semiconductor Nonvolatile Memory.

    DTIC Science & Technology

    1981-03-01

    HEWLETT-PACKARD BOX 3310 100 MARKET ST APT 1 3404 EAST HARMONY RD2U ATTN J. M. KIRSCH, MTS ATTN R. SCHAEFER ATTN L. W. JAMES , MTS FULLERTON, CA 92633...CRYOGENICS INC MARYLAND ACADEMY SCIENCE REnFORD, MA 01730 ATTN W. N. LAWLESS 601 LIGHT ST WESTERVILLE, ON 43081 ATTN S. A. KARON , DIR EXN MONACO ENTERPRISES

  9. Analysis of space radiation data of semiconductor memories

    NASA Technical Reports Server (NTRS)

    Stassinopoulos, E. G.; Brucker, G. J.; Stauffer, C. A.

    1996-01-01

    This article presents an analysis of radiation effects for several select device types and technologies aboard the Combined Release and Radiation Effects Satellite (CRRES) satellite. These space-flight measurements covered a period of about 14 months of mission lifetime. Single Event Upset (SEU) data of the investigated devices from the Microelectronics Package (MEP) were processed and analyzed. Valid upset measurements were determined by correcting for invalid readings, hard failures, missing data tapes (thus voids in data), and periods over which devices were disabled from interrogation. The basic resolution time of the measurement system was confirmed to be 2 s. Lessons learned, important findings, and recommendations are presented.

  10. Semiconductor technology program. Progress briefs

    NASA Technical Reports Server (NTRS)

    Bullis, W. M.

    1980-01-01

    Measurement technology for semiconductor materials, process control, and devices is reviewed. Activities include: optical linewidth and thermal resistance measurements; device modeling; dopant density profiles; resonance ionization spectroscopy; and deep level measurements. Standardized oxide charge terminology is also described.

  11. Metal-Insulator-Semiconductor Photodetectors

    PubMed Central

    Lin, Chu-Hsuan; Liu, Chee Wee

    2010-01-01

    The major radiation of the Sun can be roughly divided into three regions: ultraviolet, visible, and infrared light. Detection in these three regions is important to human beings. The metal-insulator-semiconductor photodetector, with a simpler process than the pn-junction photodetector and a lower dark current than the MSM photodetector, has been developed for light detection in these three regions. Ideal UV photodetectors with high UV-to-visible rejection ratio could be demonstrated with III–V metal-insulator-semiconductor UV photodetectors. The visible-light detection and near-infrared optical communications have been implemented with Si and Ge metal-insulator-semiconductor photodetectors. For mid- and long-wavelength infrared detection, metal-insulator-semiconductor SiGe/Si quantum dot infrared photodetectors have been developed, and the detection spectrum covers atmospheric transmission windows. PMID:22163382

  12. Signal processing for semiconductor detectors

    SciTech Connect

    Goulding, F.S.; Landis, D.A.

    1982-02-01

    A balanced perspective is provided on the processing of signals produced by semiconductor detectors. The general problems of pulse shaping to optimize resolution with constraints imposed by noise, counting rate and rise time fluctuations are discussed.

  13. Optical properties of semiconductor microcavities

    NASA Astrophysics Data System (ADS)

    Son, Joong-Kon

    Thanks to the difference in energy gap between two semiconductors and to their different indices of refraction, semiconductor heterostructures can confine electrons as well as photons. This property makes it possible to build semiconductor-based optical resonators (microcavities) with a radiation dipole (a quantum well) in its midst to investigate the coupling between the optical modes of the microcavity with the exciton modes of the quantum well. Such an interaction, besides its intrinsic interest, is relevant to vertically-emitting semiconductor lasers, based on the quantum well- microcavity system. In this thesis, we will present experimental evidence of temperature and electric-field dependent exciton-cavity coupling in GaAs-GaAlAs microcavities.

  14. Fear Memory.

    PubMed

    Izquierdo, Ivan; Furini, Cristiane R G; Myskiw, Jociane C

    2016-04-01

    Fear memory is the best-studied form of memory. It was thoroughly investigated in the past 60 years mostly using two classical conditioning procedures (contextual fear conditioning and fear conditioning to a tone) and one instrumental procedure (one-trial inhibitory avoidance). Fear memory is formed in the hippocampus (contextual conditioning and inhibitory avoidance), in the basolateral amygdala (inhibitory avoidance), and in the lateral amygdala (conditioning to a tone). The circuitry involves, in addition, the pre- and infralimbic ventromedial prefrontal cortex, the central amygdala subnuclei, and the dentate gyrus. Fear learning models, notably inhibitory avoidance, have also been very useful for the analysis of the biochemical mechanisms of memory consolidation as a whole. These studies have capitalized on in vitro observations on long-term potentiation and other kinds of plasticity. The effect of a very large number of drugs on fear learning has been intensively studied, often as a prelude to the investigation of effects on anxiety. The extinction of fear learning involves to an extent a reversal of the flow of information in the mentioned structures and is used in the therapy of posttraumatic stress disorder and fear memories in general.

  15. Dye Sensitization of Semiconductor Particles

    SciTech Connect

    Hartland, G. V.

    2003-01-13

    In this project electron transfer at semiconductor liquid interfaces was examined by ultrafast time-resolved and steady-state optical techniques. The experiments primarily yielded information about the electron transfer from titanium dioxide semiconductor particles to absorbed molecules. The results show that the rate of electron transfer depends on the structure of the molecule, and the crystalline phase of the particle. These results can be qualitatively explained by Marcus theory for electron transfer.

  16. Semiconductor crystal high resolution imager

    NASA Technical Reports Server (NTRS)

    Levin, Craig S. (Inventor); Matteson, James (Inventor)

    2011-01-01

    A radiation imaging device (10). The radiation image device (10) comprises a subject radiation station (12) producing photon emissions (14), and at least one semiconductor crystal detector (16) arranged in an edge-on orientation with respect to the emitted photons (14) to directly receive the emitted photons (14) and produce a signal. The semiconductor crystal detector (16) comprises at least one anode and at least one cathode that produces the signal in response to the emitted photons (14).

  17. Laser Assisted Semiconductor Device Processing

    DTIC Science & Technology

    1980-11-30

    In strongly absorbing semiconductors, the dominant absorption mechanism at frequencies higher than the bandgap frequency is interband transitions. The...current). The solution for miconductors. In strongly absorbing semiconductors, the n(x,t ) is a closed-form expression consisting of complemen- dominant 0...representative profles are shown in Fis. $-12. o -- For Nd: YAG in silicon. E, _0.99hv and the profiks are therefore and-gap recombination dominated

  18. Optical response from lenslike semiconductor nipple arrays

    NASA Astrophysics Data System (ADS)

    Wu, H.-M.; Lai, C.-M.; Peng, L.-H.

    2008-11-01

    The authors reported the use of recessive size reduction in self-assembled polystyrene sphere mask with anisotropic etching to form lenslike nipple arrays onto the surface of silicon and gallium nitride. These devices are shown to exhibit a filling factor near to an ideal close-packed condition and paraboloidlike etch profile with slope increased proportionally to the device aspect ratio. Specular reflectivity of less than 3% was observed over the visible spectral range for the 0.35-μm-period nipple-lens arrays. Using two-dimensional rigorous coupled-wave analysis, the latter phenomenon can be ascribed to a gradual index matching mechanism accessed by a high surface-coverage semiconductor nipple array structure.

  19. Survey of cryogenic semiconductor devices

    SciTech Connect

    Talarico, L.J.; McKeever, J.W.

    1996-04-01

    Improved reliability and electronic performance can be achieved in a system operated at cryogenic temperatures because of the reduction in mechanical insult and in disruptive effects of thermal energy on electronic devices. Continuing discoveries of new superconductors with ever increasing values of T{sub c} above that of liquid nitrogen temperature (LNT) have provided incentive for developing semiconductor electronic systems that may also operate in the superconductor`s liquid nitrogen bath. Because of the interest in high-temperature superconductor (HTS) devices, liquid nitrogen is the cryogen of choice and LNT is the temperature on which this review is focused. The purpose of this survey is to locate and assemble published information comparing the room temperature (298 K), performance of commercially available conventional and hybrid semiconductor device with their performance at LNT (77K), to help establish their candidacy as cryogenic electronic devices specifically for use at LNT. The approach to gathering information for this survey included the following activities. Periodicals and proceedings were searched for information on the behavior of semiconductor devices at LNT. Telephone calls were made to representatives of semiconductor industries, to semiconductor subcontractors, to university faculty members prominent for their research in the area of cryogenic semiconductors, and to representatives of the National Aeronautics and Space Administration (NASA) and NASA subcontractors. The sources and contacts are listed with their responses in the introduction, and a list of references appears at the end of the survey.

  20. Access Denied

    ERIC Educational Resources Information Center

    Villano, Matt

    2008-01-01

    Building access control (BAC)--a catchall phrase to describe the systems that control access to facilities across campus--has traditionally been handled with remarkably low-tech solutions: (1) manual locks; (2) electronic locks; and (3) ID cards with magnetic strips. Recent improvements have included smart cards and keyless solutions that make use…

  1. Open Access

    ERIC Educational Resources Information Center

    Suber, Peter

    2012-01-01

    The Internet lets us share perfect copies of our work with a worldwide audience at virtually no cost. We take advantage of this revolutionary opportunity when we make our work "open access": digital, online, free of charge, and free of most copyright and licensing restrictions. Open access is made possible by the Internet and copyright-holder…

  2. Impurity gettering in semiconductors

    DOEpatents

    Sopori, Bhushan L.

    1995-01-01

    A process for impurity gettering in a semiconductor substrate or device such as a silicon substrate or device. The process comprises hydrogenating the substrate or device at the back side thereof with sufficient intensity and for a time period sufficient to produce a damaged back side. Thereafter, the substrate or device is illuminated with electromagnetic radiation at an intensity and for a time period sufficient to cause the impurities to diffuse to the back side and alloy with a metal there present to form a contact and capture the impurities. The impurity gettering process also can function to simultaneously passivate defects within the substrate or device, with the defects likewise diffusing to the back side for simultaneous passivation. Simultaneously, substantially all hydrogen-induced damage on the back side of the substrate or device is likewise annihilated. Also taught is an alternate process comprising thermal treatment after hydrogenation of the substrate or device at a temperature of from about 500.degree. C. to about 700.degree. C. for a time period sufficient to cause the impurities to diffuse to the damaged back side thereof for subsequent capture by an alloying metal.

  3. Impurity gettering in semiconductors

    DOEpatents

    Sopori, B.L.

    1995-06-20

    A process for impurity gettering in a semiconductor substrate or device such as a silicon substrate or device is disclosed. The process comprises hydrogenating the substrate or device at the back side thereof with sufficient intensity and for a time period sufficient to produce a damaged back side. Thereafter, the substrate or device is illuminated with electromagnetic radiation at an intensity and for a time period sufficient to cause the impurities to diffuse to the back side and alloy with a metal there present to form a contact and capture the impurities. The impurity gettering process also can function to simultaneously passivate defects within the substrate or device, with the defects likewise diffusing to the back side for simultaneous passivation. Simultaneously, substantially all hydrogen-induced damage on the back side of the substrate or device is likewise annihilated. Also taught is an alternate process comprising thermal treatment after hydrogenation of the substrate or device at a temperature of from about 500 C to about 700 C for a time period sufficient to cause the impurities to diffuse to the damaged back side thereof for subsequent capture by an alloying metal. 1 fig.

  4. 75 FR 49526 - Freescale Semiconductor, Inc., Technical Information Center, Tempe, AZ; Freescale Semiconductor...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-08-13

    ... Employment and Training Administration Freescale Semiconductor, Inc., Technical Information Center, Tempe, AZ; Freescale Semiconductor, Inc., Technical Information Center, Woburn, MA; Amended Certification Regarding... Semiconductor, Inc., Technical Information Center, Tempe, Arizona. The notice was published in the...

  5. Memory cell operation based on small Josephson junctions arrays

    NASA Astrophysics Data System (ADS)

    Braiman, Y.; Nair, N.; Rezac, J.; Imam, N.

    2016-12-01

    In this paper we analyze a cryogenic memory cell circuit based on a small coupled array of Josephson junctions. All the basic memory operations (e.g., write, read, and reset) are implemented on the same circuit and different junctions in the array can in principle be utilized for these operations. The presented memory operation paradigm is fundamentally different from conventional single quantum flux operation logics (SFQ). As an example, we demonstrate memory operation driven by a SFQ pulse employing an inductively coupled array of three Josephson junctions. We have chosen realistic Josephson junction parameters based on state-of-the-art fabrication capabilities and have calculated access times and access energies for basic memory cell operations. We also implemented an optimization procedure based on the simulated annealing algorithm to calculate the optimized and typical values of access times and access energies.

  6. Sparse distributed memory: Principles and operation

    NASA Technical Reports Server (NTRS)

    Flynn, M. J.; Kanerva, P.; Bhadkamkar, N.

    1989-01-01

    Sparse distributed memory is a generalized random access memory (RAM) for long (1000 bit) binary words. Such words can be written into and read from the memory, and they can also be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original write address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech recognition and scene analysis, in signal detection and verification, and in adaptive control of automated equipment, in general, in dealing with real world information in real time. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. Major design issues were resolved which were faced in building the memories. The design is described of a prototype memory with 256 bit addresses and from 8 to 128 K locations for 256 bit words. A key aspect of the design is extensive use of dynamic RAM and other standard components.

  7. Sparse distributed memory prototype: Principles of operation

    NASA Technical Reports Server (NTRS)

    Flynn, Michael J.; Kanerva, Pentti; Ahanin, Bahram; Bhadkamkar, Neal; Flaherty, Paul; Hickey, Philip

    1988-01-01

    Sparse distributed memory is a generalized random access memory (RAM) for long binary words. Such words can be written into and read from the memory, and they can be used to address the memory. The main attribute of the memory is sensitivity to similarity, meaning that a word can be read back not only by giving the original right address but also by giving one close to it as measured by the Hamming distance between addresses. Large memories of this kind are expected to have wide use in speech and scene analysis, in signal detection and verification, and in adaptive control of automated equipment. The memory can be realized as a simple, massively parallel computer. Digital technology has reached a point where building large memories is becoming practical. The research is aimed at resolving major design issues that have to be faced in building the memories. The design of a prototype memory with 256-bit addresses and from 8K to 128K locations for 256-bit words is described. A key aspect of the design is extensive use of dynamic RAM and other standard components.

  8. Local electronic properties of organic semiconductor interfaces

    NASA Astrophysics Data System (ADS)

    Blumenfeld, Michael L.

    Understanding organic semiconductor interfaces is critical to developing organic photovoltaics (OPV). OPV interfaces are disordered due to weak intermolecular interactions, resulting in diverse charge transfer micro-environments. I present experimental data isolating high-order intermolecular interactions controlling interfacial energy level alignment and describe new instrumental capabilities providing access to the local electronic and kinetic landscape at organic semiconductor interfaces. Interface formation between vanadyl naphthalocyanine (VONc) and highly ordered pyrolytic graphite (HOPG) is investigated. Ultraviolet photoemission spectroscopy (UPS) shows that the VONc binding energy (BE) decouples from the work function, shifting in an opposite direction and contradicting the standard interface dipole model. This effect is quantitatively described using an electrostatic depolarization model and confirmed by simulations which show an inhomogeneous potential at the interface. New data and literature values suggest orthogonality between polarizability and molecular dipole in polar porphyrazines. Their potential for interface engineering is discussed. The electron-rich Au(111)/VONc interface is investigated. The organic layer induces a large interface dipole in Au(111) which can be fit to a depolarization model. Ionization potential and depolarization data suggest that the second VONc layer on Au(111) adopts a tilted geometry. Electrostatic differences between Au(111)/VONc and HOPG/VONc are discussed, demonstrating that interface dipole contributions are not interchangeable. The surface states of the Au(111)/VONc interface are characterized by angle resolved 2-photon photoemission to determine the magnitude of the perturbation. The measured free-electron-like effective mass and BE destabilization of the Shockley state is attributed to step edges caused by lifting the Au(111) (22x 3 ) reconstruction. The Shockley state is accessible primarily through resonance

  9. Fueling Memories

    PubMed Central

    Powell, Jonathan D.; Pollizzi, Kristen

    2012-01-01

    A hallmark of the adaptive immune response is rapid and robust activation upon rechallenge. In the current issue of Immunity van der Windt et al. (2012) provide an important link between mitochondrial respiratory capacity and the development of CD8+ T cell memory. PMID:22284413

  10. Childhood Memories.

    ERIC Educational Resources Information Center

    Soto, Lourdes Diaz

    2001-01-01

    Describes how artwork can be a valuable catalyst for discussions in preservice education classes, allowing students to explore how their work as educators relates to their childhood memories and can be shaped by childhood experiences. Examines an art exhibition in which diverse artists depicted autobiographical text in their paintings. Discusses…

  11. Hollow memories

    NASA Astrophysics Data System (ADS)

    2014-04-01

    A hollow-core optical fibre filled with warm caesium atoms can temporarily store the properties of photons. Michael Sprague from the University of Oxford, UK, explains to Nature Photonics how this optical memory could be a useful building block for fibre-based quantum optics.

  12. Wide-Bandgap Semiconductors

    SciTech Connect

    Chinthavali, M.S.

    2005-11-22

    With the increase in demand for more efficient, higher-power, and higher-temperature operation of power converters, design engineers face the challenge of increasing the efficiency and power density of converters [1, 2]. Development in power semiconductors is vital for achieving the design goals set by the industry. Silicon (Si) power devices have reached their theoretical limits in terms of higher-temperature and higher-power operation by virtue of the physical properties of the material. To overcome these limitations, research has focused on wide-bandgap materials such as silicon carbide (SiC), gallium nitride (GaN), and diamond because of their superior material advantages such as large bandgap, high thermal conductivity, and high critical breakdown field strength. Diamond is the ultimate material for power devices because of its greater than tenfold improvement in electrical properties compared with silicon; however, it is more suited for higher-voltage (grid level) higher-power applications based on the intrinsic properties of the material [3]. GaN and SiC power devices have similar performance improvements over Si power devices. GaN performs only slightly better than SiC. Both SiC and GaN have processing issues that need to be resolved before they can seriously challenge Si power devices; however, SiC is at a more technically advanced stage than GaN. SiC is considered to be the best transition material for future power devices before high-power diamond device technology matures. Since SiC power devices have lower losses than Si devices, SiC-based power converters are more efficient. With the high-temperature operation capability of SiC, thermal management requirements are reduced; therefore, a smaller heat sink would be sufficient. In addition, since SiC power devices can be switched at higher frequencies, smaller passive components are required in power converters. Smaller heat sinks and passive components result in higher-power-density power converters

  13. Dielectric screening in semiconductors

    NASA Astrophysics Data System (ADS)

    Harrison, Walter A.; Klepeis, John E.

    1988-01-01

    Intra-atomic and interatomic Coulomb interactions are incorporated into bond-orbital theory, based upon universal tight-binding parameters, in order to treat the effects of charge redistribution in semiconductor bonds. The dielectric function ɛ(q) is obtained for wave numbers in a [100] direction. The screening of differences in average hybrid energy across a heterojunction is calculated in detail, indicating that the decay length for the potential depends upon the relative values of Madelung and intra-atomic Coulomb terms. The parameters used here predict an imaginary decay length and thus an oscillating potential near the interface. The same theory is applied to point defects by imbedding a cluster in a matrix lattice, taking charges in that lattice to be consistent with continuum theory. Illustrating the theory with a phosphorus impurity in silicon, it is seen that the impurity and its neighboring atoms have charges on the order of only one-tenth of an electronic charge, alternating in sign from neighbor to neighbor as for planar defects. Although there are shifts in the term values on the order of a volt, the difference in these shifts for neighboring atoms is much smaller so that the effect on the bonds is quite small. This behavior is analogous to the response of a dielectric continuum to a point charge: The medium is locally neutral except at the center of the cluster and there are slowly varying potentials e2/ɛr. Because of this slow variation, free-atom term values should ordinarily suffice for the calculation of bond properties and bond lengths at impurities. Corrections are larger for homovalent substitutions such as carbon in silicon.

  14. Development and characterization of a ferroelectric non-volatile memory for flexible electronics

    NASA Astrophysics Data System (ADS)

    Mao, Duo

    Flexible electronics have received significant attention recently because of the potential applications in displays, sensors, radio frequency identification (RFID) tags and other integrated circuits. Electrically addressable non-volatile memory is a key component for these applications. The major challenges are to fabricate the memory at a low temperature compatible with plastic substrates while maintaining good device reliability, by being compatible with process as needed to integrate with other electronic components for system-on-chip applications. In this work, ferroelectric capacitors fabricated at low temperature were developed. Based on that, a ferroelectric random access memory (FRAM) for flexible electronics was developed and characterized. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer was used as a ferroelectric material and a photolithographic process was developed to fabricate ferroelectric capacitors. Different characterization methods including atomic force microscopy, x-ray diffraction and Fourier-transform infrared reflection-absorption spectroscopy were used to study the material properties of the P(VDF-TrFE) film. The material properties were correlated with the electrical characteristics of the ferroelectric capacitors. To understand the polarization switching behavior of the P(VDF-TrFE) ferroelectric capacitors, a Nucleation-Limited-Switching (NLS) model was used to study the switching kinetics. The switching kinetics were characterized over the temperature range from -60 °C to 100 °C. Fatigue characteristics were studied at different electrical stress voltages and frequencies to evaluate the reliability of the ferroelectric capacitor. The degradation mechanism is attributed to the increase of the activation field and the suppression of the switchable polarization. To develop a FRAM circuit for flexible electronics, an n-channel thin film transistor (TFT) based on CdS as the semiconductor was integrated with a P

  15. Equal Access.

    ERIC Educational Resources Information Center

    De Patta, Joe

    2003-01-01

    Presents an interview with Stephen McCarthy, co-partner and president of Equal Access ADA Consulting Architects of San Diego, California, about designing schools to naturally integrate compliance with the Americans with Disabilities Act (ADA). (EV)

  16. DIODE STEERED MANGETIC-CORE MEMORY

    DOEpatents

    Melmed, A.S.; Shevlin, R.T.; Laupheimer, R.

    1962-09-18

    A word-arranged magnetic-core memory is designed for use in a digital computer utilizing the reverse or back current property of the semi-conductor diodes to restore the information in the memory after read-out. In order to ob tain a read-out signal from a magnetic core storage unit, it is necessary to change the states of some of the magnetic cores. In order to retain the information in the memory after read-out it is then necessary to provide a means to return the switched cores to their states before read-out. A rewrite driver passes a pulse back through each row of cores in which some switching has taken place. This pulse combines with the reverse current pulses of diodes for each column in which a core is switched during read-out to cause the particular cores to be switched back into their states prior to read-out. (AEC)

  17. Integrated Vertical Bloch Line (VBL) memory

    NASA Technical Reports Server (NTRS)

    Katti, R. R.; Wu, J. C.; Stadler, H. L.

    1991-01-01

    Vertical Bloch Line (VBL) Memory is a recently conceived, integrated, solid state, block access, VLSI memory which offers the potential of 1 Gbit/sq cm areal storage density, data rates of hundreds of megabits/sec, and submillisecond average access time simultaneously at relatively low mass, volume, and power values when compared to alternative technologies. VBLs are micromagnetic structures within magnetic domain walls which can be manipulated using magnetic fields from integrated conductors. The presence or absence of BVL pairs are used to store binary information. At present, efforts are being directed at developing a single chip memory using 25 Mbit/sq cm technology in magnetic garnet material which integrates, at a single operating point, the writing, storage, reading, and amplification functions needed in a memory. The current design architecture, functional elements, and supercomputer simulation results are described which are used to assist the design process.

  18. Plasmonic doped semiconductor nanocrystals: Properties, fabrication, applications and perspectives

    NASA Astrophysics Data System (ADS)

    Kriegel, Ilka; Scotognella, Francesco; Manna, Liberato

    2017-02-01

    Degenerately doped semiconductor nanocrystals (NCs) are of recent interest to the NC community due to their tunable localized surface plasmon resonances (LSPRs) in the near infrared (NIR). The high level of doping in such materials with carrier densities in the range of 1021cm-3 leads to degeneracy of the doping levels and intense plasmonic absorption in the NIR. The lower carrier density in degenerately doped semiconductor NCs compared to noble metals enables LSPR tuning over a wide spectral range, since even a minor change of the carrier density strongly affects the spectral position of the LSPR. Two classes of degenerate semiconductors are most relevant in this respect: impurity doped semiconductors, such as metal oxides, and vacancy doped semiconductors, such as copper chalcogenides. In the latter it is the density of copper vacancies that controls the carrier concentration, while in the former the introduction of impurity atoms adds carriers to the system. LSPR tuning in vacancy doped semiconductor NCs such as copper chalcogenides occurs by chemically controlling the copper vacancy density. This goes in hand with complex structural modifications of the copper chalcogenide crystal lattice. In contrast the LSPR of degenerately doped metal oxide NCs is modified by varying the doping concentration or by the choice of host and dopant atoms, but also through the addition of capacitive charge carriers to the conduction band of the metal oxide upon post-synthetic treatments, such as by electrochemical- or photodoping. The NIR LSPRs and the option of their spectral fine-tuning make accessible important new features, such as the controlled coupling of the LSPR to other physical signatures or the enhancement of optical signals in the NIR, sensing application by LSPR tracking, energy production from the NIR plasmon resonance or bio-medical applications in the biological window. In this review we highlight the recent advances in the synthesis of various different plasmonic

  19. Scalable Iterative Solvers Applied to 3D Parallel Simulation of Advanced Semiconductor Devices

    NASA Astrophysics Data System (ADS)

    García-Loureiro, A. J.; Aldegunde, M.; Seoane, N.

    2009-08-01

    We have studied the performance of a preconditioned iterative solver to speed up a 3D semiconductor device simulator. Since 3D simulations necessitate large computing resources, the choice of algorithms and their parameters become of utmost importance. This code uses a density gradient drift-diffusion semiconductor transport model based on the finite element method which is one of the most general and complex discretisation techniques. It has been implemented for a distributed memory multiprocessor environment using the Message Passing Interface (MPI) library. We have applied this simulator to a 67 nm effective gate length Si MOSFET.

  20. Solution processed molecular floating gate for flexible flash memories

    PubMed Central

    Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.

    2013-01-01

    Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758